libgcc/config/lm32/_divsi3.c

   1 /* _divsi3 for Lattice Mico32.
   2    Contributed by Jon Beniston <jon@beniston.com>
   3
   4    Copyright (C) 2009-2018 Free Software Foundation, Inc.
   5
   6    This file is free software; you can redistribute it and/or modify it
   7    under the terms of the GNU General Public License as published by the
   8    Free Software Foundation; either version 3, or (at your option) any
   9    later version.
  10
  11    This file is distributed in the hope that it will be useful, but
  12    WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14    General Public License for more details.
  15
  16    Under Section 7 of GPL version 3, you are granted additional
  17    permissions described in the GCC Runtime Library Exception, version
  18    3.1, as published by the Free Software Foundation.
  19
  20    You should have received a copy of the GNU General Public License and
  21    a copy of the GCC Runtime Library Exception along with this program;
  22    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  23    <http://www.gnu.org/licenses/>. */
  24
  25 #include "libgcc_lm32.h"
  26
  27 /* Signed integer division.  */
  28
  29 static const UQItype __divsi3_table[] = {
  30   0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  31   0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  32   0, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  33   0, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  34   0, 4, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  35   0, 5, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  36   0, 6, 3, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  37   0, 7, 3, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
  38   0, 8, 4, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
  39   0, 9, 4, 3, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0,
  40   0, 10, 5, 3, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0,
  41   0, 11, 5, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0,
  42   0, 12, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0,
  43   0, 13, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, 0,
  44   0, 14, 7, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0,
  45   0, 15, 7, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1,
  46 };
  47
  48 SItype
  49 __divsi3 (SItype a, SItype b)
  50 {
  51   int neg = 0;
  52   SItype res;
  53   int cfg;
  54
  55   if (b == 0)
  56     {
  57       /* Raise divide by zero exception.  */
  58       int eba, sr;
  59       /* Save interrupt enable.  */
  60       __asm__ __volatile__ ("rcsr %0, IE":"=r" (sr));
  61       sr = (sr & 1) << 1;
  62       __asm__ __volatile__ ("wcsr IE, %0"::"r" (sr));
  63       /* Branch to exception handler.  */
  64       __asm__ __volatile__ ("rcsr %0, EBA":"=r" (eba));
  65       eba += 32 * 5;
  66       __asm__ __volatile__ ("mv ea, ra");
  67       __asm__ __volatile__ ("b %0"::"r" (eba));
  68       __builtin_unreachable ();
  69     }
  70
  71   if (((USItype) (a | b)) < 16)
  72     res = __divsi3_table[(a << 4) + b];
  73   else
  74     {
  75
  76       if (a < 0)
  77         {
  78           a = -a;
  79           neg = !neg;
  80         }
  81
  82       if (b < 0)
  83         {
  84           b = -b;
  85           neg = !neg;
  86         }
  87
  88     __asm__ ("rcsr %0, CFG":"=r" (cfg));
  89       if (cfg & 2)
  90       __asm__ ("divu %0, %1, %2": "=r" (res):"r" (a), "r" (b));
  91       else
  92         res = __udivmodsi4 (a, b, 0);
  93
  94       if (neg)
  95         res = -res;
  96     }
  97
  98   return res;
  99 }