1 ; Options for the rs6000 port of the compiler
3 ; Copyright (C) 2005-2018 Free Software Foundation, Inc.
4 ; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
6 ; This file is part of GCC.
8 ; GCC is free software; you can redistribute it and/or modify it under
9 ; the terms of the GNU General Public License as published by the Free
10 ; Software Foundation; either version 3, or (at your option) any later
13 ; GCC is distributed in the hope that it will be useful, but WITHOUT
14 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 ; License for more details.
18 ; You should have received a copy of the GNU General Public License
19 ; along with GCC; see the file COPYING3. If not see
20 ; <http://www.gnu.org/licenses/>.
23 config/rs6000/rs6000-opts.h
25 ;; ISA flag bits (on/off)
27 HOST_WIDE_INT rs6000_isa_flags = TARGET_DEFAULT
30 HOST_WIDE_INT x_rs6000_isa_flags
32 ;; Miscellaneous flag bits that were set explicitly by the user
34 HOST_WIDE_INT rs6000_isa_flags_explicit
37 HOST_WIDE_INT x_rs6000_isa_flags_explicit
41 enum processor_type rs6000_cpu = PROCESSOR_PPC603
45 enum processor_type rs6000_tune = PROCESSOR_PPC603
47 ;; Always emit branch hint bits.
49 unsigned char rs6000_always_hint
51 ;; Schedule instructions for group formation.
53 unsigned char rs6000_sched_groups
55 ;; Align branch targets.
57 unsigned char rs6000_align_branch_targets
59 ;; Support for -msched-costly-dep option.
61 enum rs6000_dependence_cost rs6000_sched_costly_dep = no_dep_costly
63 ;; Support for -minsert-sched-nops option.
65 enum rs6000_nop_insertion rs6000_sched_insert_nops = sched_finish_none
67 ;; Non-zero to allow overriding loop alignment.
69 unsigned char can_override_loop_align
71 ;; Which small data model to use (for System V targets only)
73 enum rs6000_sdata_type rs6000_sdata = SDATA_DATA
75 ;; Bit size of immediate TLS offsets and string from which it is decoded.
77 int rs6000_tls_size = 32
79 ;; ABI enumeration available for subtarget to use.
81 enum rs6000_abi rs6000_current_abi = ABI_NONE
83 ;; Type of traceback to use.
85 enum rs6000_traceback_type rs6000_traceback = traceback_default
87 ;; Control alignment for fields within structures.
89 unsigned char rs6000_alignment_flags
91 ;; Code model for 64-bit linux.
93 enum rs6000_cmodel rs6000_current_cmodel = CMODEL_SMALL
95 ;; What type of reciprocal estimation instructions to generate
97 unsigned int rs6000_recip_control
99 ;; Mask of what builtin functions are allowed
101 HOST_WIDE_INT rs6000_builtin_mask
105 unsigned int rs6000_debug
107 ;; Whether to enable the -mfloat128 stuff without necessarily enabling the
108 ;; __float128 keyword.
110 unsigned char x_TARGET_FLOAT128_TYPE
113 unsigned char TARGET_FLOAT128_TYPE
115 ;; This option existed in the past, but now is always on.
117 Target RejectNegative Undocumented Ignore
120 Target Report Mask(POWERPC64) Var(rs6000_isa_flags)
121 Use PowerPC-64 instruction set.
124 Target Report Mask(PPC_GPOPT) Var(rs6000_isa_flags)
125 Use PowerPC General Purpose group optional instructions.
128 Target Report Mask(PPC_GFXOPT) Var(rs6000_isa_flags)
129 Use PowerPC Graphics group optional instructions.
132 Target Report Mask(MFCRF) Var(rs6000_isa_flags)
133 Use PowerPC V2.01 single field mfcr instruction.
136 Target Report Mask(POPCNTB) Var(rs6000_isa_flags)
137 Use PowerPC V2.02 popcntb instruction.
140 Target Report Mask(FPRND) Var(rs6000_isa_flags)
141 Use PowerPC V2.02 floating point rounding instructions.
144 Target Report Mask(CMPB) Var(rs6000_isa_flags)
145 Use PowerPC V2.05 compare bytes instruction.
148 Target Report Mask(MFPGPR) Var(rs6000_isa_flags)
149 Use extended PowerPC V2.05 move floating point to/from GPR instructions.
152 Target Report Mask(ALTIVEC) Var(rs6000_isa_flags)
153 Use AltiVec instructions.
156 Target Report Var(rs6000_fold_gimple) Init(1)
157 Enable early gimple folding of builtins.
160 Target Report Mask(DFP) Var(rs6000_isa_flags)
161 Use decimal floating point instructions.
164 Target Report Mask(MULHW) Var(rs6000_isa_flags)
165 Use 4xx half-word multiply instructions.
168 Target Report Mask(DLMZB) Var(rs6000_isa_flags)
169 Use 4xx string-search dlmzb instruction.
172 Target Report Mask(MULTIPLE) Var(rs6000_isa_flags)
173 Generate load/store multiple instructions.
175 ;; This option existed in the past, but now is always off.
177 Target RejectNegative Undocumented Ignore
180 Target RejectNegative Undocumented Warn(%<-mstring%> is deprecated)
183 Target Report RejectNegative Mask(SOFT_FLOAT) Var(rs6000_isa_flags)
184 Do not use hardware floating point.
187 Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) Var(rs6000_isa_flags)
188 Use hardware floating point.
191 Target Report Mask(POPCNTD) Var(rs6000_isa_flags)
192 Use PowerPC V2.06 popcntd instruction.
195 Target Report Var(TARGET_FRIZ) Init(-1) Save
196 Under -ffast-math, generate a FRIZ instruction for (double)(long long) conversions.
199 Target RejectNegative Joined Var(rs6000_veclibabi_name)
200 Vector library ABI to use.
203 Target Report Mask(VSX) Var(rs6000_isa_flags)
204 Use vector/scalar (VSX) instructions.
207 Target Undocumented Report Var(TARGET_VSX_ALIGN_128) Save
208 ; If -mvsx, set alignment to 128 bits instead of 32/64
211 Target Undocumented Var(TARGET_ALLOW_MOVMISALIGN) Init(-1) Save
212 ; Allow the movmisalign in DF/DI vectors
214 mefficient-unaligned-vsx
215 Target Undocumented Report Mask(EFFICIENT_UNALIGNED_VSX) Var(rs6000_isa_flags)
216 ; Consider unaligned VSX vector and fp accesses to be efficient
219 Target Undocumented Report Var(TARGET_SCHED_GROUPS) Init(-1) Save
220 ; Explicitly set rs6000_sched_groups
223 Target Undocumented Report Var(TARGET_ALWAYS_HINT) Init(-1) Save
224 ; Explicitly set rs6000_always_hint
226 malign-branch-targets
227 Target Undocumented Report Var(TARGET_ALIGN_BRANCH_TARGETS) Init(-1) Save
228 ; Explicitly set rs6000_align_branch_targets
231 Target Report RejectNegative Mask(NO_UPDATE) Var(rs6000_isa_flags)
232 Do not generate load/store with update instructions.
235 Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) Var(rs6000_isa_flags)
236 Generate load/store with update instructions.
239 Target Report Var(TARGET_SINGLE_PIC_BASE) Init(0)
240 Do not load the PIC register in function prologues.
242 mavoid-indexed-addresses
243 Target Report Var(TARGET_AVOID_XFORM) Init(-1) Save
244 Avoid generation of indexed load/store instructions when possible.
247 Target Report Var(tls_markers) Init(1) Save
248 Mark __tls_get_addr calls with argument info.
251 Target Undocumented Var(TARGET_SCHED_PROLOG) Init(1) Save
254 Target Report Var(TARGET_SCHED_PROLOG) Save
255 Schedule the start and end of the procedure.
258 Target Report RejectNegative Var(aix_struct_return) Save
259 Return all structures in memory (AIX default).
262 Target Report RejectNegative Var(aix_struct_return,0) Save
263 Return small structures in registers (SVR4 default).
266 Target Report Var(TARGET_XL_COMPAT) Save
267 Conform more closely to IBM XLC semantics.
271 Generate software reciprocal divide and square root for better throughput.
274 Target Report RejectNegative Joined Var(rs6000_recip_name)
275 Generate software reciprocal divide and square root for better throughput.
278 Target Report Mask(RECIP_PRECISION) Var(rs6000_isa_flags)
279 Assume that the reciprocal estimate instructions provide more accuracy.
282 Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC) Save
283 Do not place floating point constants in TOC.
286 Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0) Save
287 Place floating point constants in TOC.
290 Target RejectNegative Var(TARGET_NO_SUM_IN_TOC) Save
291 Do not place symbol+offset constants in TOC.
294 Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) Save
295 Place symbol+offset constants in TOC.
297 ; Output only one TOC entry per module. Normally linking fails if
298 ; there are more than 16K unique variables/constants in an executable. With
299 ; this option, linking fails only if there are more than 16K modules, or
300 ; if there are more than 16K unique variables/constant in a single module.
302 ; This is at the cost of having 2 extra loads and one extra store per
303 ; function, and one less allocable register.
305 Target Report Mask(MINIMAL_TOC) Var(rs6000_isa_flags)
306 Use only one TOC entry per procedure.
310 Put everything in the regular TOC.
313 Target Report Var(TARGET_ALTIVEC_VRSAVE) Save
314 Generate VRSAVE instructions when generating AltiVec code.
317 Target RejectNegative Alias(mvrsave) NegativeAlias Warn(%<-mvrsave=no%> is deprecated; use %<-mno-vrsave%> instead)
318 Deprecated option. Use -mno-vrsave instead.
321 Target RejectNegative Alias(mvrsave) Warn(%<-mvrsave=yes%> is deprecated; use %<-mvrsave%> instead)
322 Deprecated option. Use -mvrsave instead.
324 mblock-move-inline-limit=
325 Target Report Var(rs6000_block_move_inline_limit) Init(0) RejectNegative Joined UInteger Save
326 Max number of bytes to move inline.
328 mblock-compare-inline-limit=
329 Target Report Var(rs6000_block_compare_inline_limit) Init(31) RejectNegative Joined UInteger Save
330 Max number of bytes to compare without loops.
332 mblock-compare-inline-loop-limit=
333 Target Report Var(rs6000_block_compare_inline_loop_limit) Init(-1) RejectNegative Joined UInteger Save
334 Max number of bytes to compare with loops.
336 mstring-compare-inline-limit=
337 Target Report Var(rs6000_string_compare_inline_limit) Init(8) RejectNegative Joined UInteger Save
338 Max number of pairs of load insns for compare.
341 Target Report Mask(ISEL) Var(rs6000_isa_flags)
342 Generate isel instructions.
345 Target RejectNegative Alias(misel) NegativeAlias Warn(%<-misel=no%> is deprecated; use %<-mno-isel%> instead)
346 Deprecated option. Use -mno-isel instead.
349 Target RejectNegative Alias(misel) Warn(%<-misel=yes%> is deprecated; use %<-misel%> instead)
350 Deprecated option. Use -misel instead.
353 Target RejectNegative Joined
354 -mdebug= Enable debug output.
357 Target RejectNegative Var(rs6000_altivec_abi) Save
358 Use the AltiVec ABI extensions.
361 Target RejectNegative Var(rs6000_altivec_abi, 0)
362 Do not use the AltiVec ABI extensions.
365 Target RejectNegative Var(rs6000_elf_abi, 1) Save
369 Target RejectNegative Var(rs6000_elf_abi, 2)
372 ; These are here for testing during development only, do not document
373 ; in the manual please.
375 ; If we want Darwin's struct-by-value-in-regs ABI.
377 Target RejectNegative Undocumented Warn(using darwin64 ABI) Var(rs6000_darwin64_abi) Save
380 Target RejectNegative Undocumented Warn(using old darwin ABI) Var(rs6000_darwin64_abi, 0)
383 Target RejectNegative Var(rs6000_ieeequad) Save
386 Target RejectNegative Var(rs6000_ieeequad, 0)
389 Target RejectNegative Joined Var(rs6000_cpu_index) Init(-1) Enum(rs6000_cpu_opt_value) Save
390 -mcpu= Use features of and schedule code for given CPU.
393 Target RejectNegative Joined Var(rs6000_tune_index) Init(-1) Enum(rs6000_cpu_opt_value) Save
394 -mtune= Schedule code for given CPU.
397 Target RejectNegative Joined Enum(rs6000_traceback_type) Var(rs6000_traceback)
398 -mtraceback=[full,part,no] Select type of traceback table.
401 Name(rs6000_traceback_type) Type(enum rs6000_traceback_type)
404 Enum(rs6000_traceback_type) String(full) Value(traceback_full)
407 Enum(rs6000_traceback_type) String(part) Value(traceback_part)
410 Enum(rs6000_traceback_type) String(no) Value(traceback_none)
413 Target Report Var(rs6000_default_long_calls) Save
414 Avoid all range limits on call instructions.
416 ; This option existed in the past, but now is always on.
418 Target RejectNegative Undocumented Ignore
421 Target Var(rs6000_warn_altivec_long) Init(1) Save
422 Warn about deprecated 'vector long ...' AltiVec type usage.
425 Target RejectNegative Joined UInteger Var(rs6000_long_double_type_size) Save
426 -mlong-double-[64,128] Specify size of long double.
428 ; This option existed in the past, but now is always on.
430 Target RejectNegative Undocumented Ignore
433 Target RejectNegative Joined Var(rs6000_sched_costly_dep_str)
434 Determine which dependences between insns are considered costly.
437 Target RejectNegative Joined Var(rs6000_sched_insert_nops_str)
438 Specify which post scheduling nop insertion scheme to apply.
441 Target RejectNegative Joined Enum(rs6000_alignment_flags) Var(rs6000_alignment_flags)
442 Specify alignment of structure fields default/natural.
445 Name(rs6000_alignment_flags) Type(unsigned char)
446 Valid arguments to -malign-:
449 Enum(rs6000_alignment_flags) String(power) Value(MASK_ALIGN_POWER)
452 Enum(rs6000_alignment_flags) String(natural) Value(MASK_ALIGN_NATURAL)
454 mprioritize-restricted-insns=
455 Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority) Save
456 Specify scheduling priority for dispatch slot restricted insns.
458 mpointers-to-nested-functions
459 Target Report Var(TARGET_POINTERS_TO_NESTED_FUNCTIONS) Init(1) Save
460 Use r11 to hold the static link in calls to functions via pointers.
463 Target Report Mask(SAVE_TOC_INDIRECT) Var(rs6000_isa_flags)
464 Save the TOC in the prologue for indirect calls rather than inline.
466 ; This option existed in the past, but now is always the same as -mvsx.
468 Target RejectNegative Undocumented Ignore
471 Target Report Mask(P8_FUSION) Var(rs6000_isa_flags)
472 Fuse certain integer operations together for better performance on power8.
475 Target Undocumented Mask(P8_FUSION_SIGN) Var(rs6000_isa_flags)
476 Allow sign extension in fusion operations.
479 Target Report Mask(P8_VECTOR) Var(rs6000_isa_flags)
480 Use vector and scalar instructions added in ISA 2.07.
483 Target Report Mask(CRYPTO) Var(rs6000_isa_flags)
484 Use ISA 2.07 Category:Vector.AES and Category:Vector.SHA2 instructions.
487 Target Undocumented Mask(DIRECT_MOVE) Var(rs6000_isa_flags) Ignore Warn(%qs is deprecated)
490 Target Report Mask(HTM) Var(rs6000_isa_flags)
491 Use ISA 2.07 transactional memory (HTM) instructions.
494 Target Report Mask(QUAD_MEMORY) Var(rs6000_isa_flags)
495 Generate the quad word memory instructions (lq/stq).
498 Target Report Mask(QUAD_MEMORY_ATOMIC) Var(rs6000_isa_flags)
499 Generate the quad word memory atomic instructions (lqarx/stqcx).
502 Target Report Var(rs6000_compat_align_parm) Init(0) Save
503 Generate aggregate parameter passing code with at most 64-bit alignment.
506 Target Undocumented Var(rs6000_optimize_swaps) Init(1) Save
507 Analyze and remove doubleword swaps from VSX computations.
510 Target Undocumented Report Mask(P9_FUSION) Var(rs6000_isa_flags)
511 Fuse certain operations together for better performance on power9.
514 Target Undocumented Report Mask(P9_MISC) Var(rs6000_isa_flags)
515 Use certain scalar instructions added in ISA 3.0.
518 Target Undocumented Report Mask(P9_VECTOR) Var(rs6000_isa_flags)
519 Use vector instructions added in ISA 3.0.
522 Target Undocumented Mask(P9_MINMAX) Var(rs6000_isa_flags)
523 Use the new min/max instructions defined in ISA 3.0.
526 Target Undocumented Mask(TOC_FUSION) Var(rs6000_isa_flags)
527 Fuse medium/large code model toc references with the memory instruction.
530 Target Undocumented Report Mask(MODULO) Var(rs6000_isa_flags)
531 Generate the integer modulo instructions.
534 Target Report Mask(FLOAT128_KEYWORD) Var(rs6000_isa_flags)
535 Enable IEEE 128-bit floating point via the __float128 keyword.
538 Target Report Mask(FLOAT128_HW) Var(rs6000_isa_flags)
539 Enable using IEEE 128-bit floating point instructions.
542 Target Undocumented Mask(FLOAT128_CVT) Var(rs6000_isa_flags)
543 Enable default conversions between __float128 & long double.
545 mstack-protector-guard=
546 Target RejectNegative Joined Enum(stack_protector_guard) Var(rs6000_stack_protector_guard) Init(SSP_TLS)
547 Use given stack-protector guard.
550 Name(stack_protector_guard) Type(enum stack_protector_guard)
551 Valid arguments to -mstack-protector-guard=:
554 Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
557 Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
559 mstack-protector-guard-reg=
560 Target RejectNegative Joined Var(rs6000_stack_protector_guard_reg_str)
561 Use the given base register for addressing the stack-protector guard.
564 int rs6000_stack_protector_guard_reg = 0
566 mstack-protector-guard-offset=
567 Target RejectNegative Joined Integer Var(rs6000_stack_protector_guard_offset_str)
568 Use the given offset for addressing the stack-protector guard.
571 long rs6000_stack_protector_guard_offset = 0
573 ;; -mno-speculate-indirect-jumps adds deliberate misprediction to indirect
574 ;; branches via the CTR.
575 mspeculate-indirect-jumps
576 Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save