Daily bump.
[official-gcc.git] / gcc / auto-inc-dec.c
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1 /* Discovery of auto-inc and auto-dec instructions.
2 Copyright (C) 2006-2014 Free Software Foundation, Inc.
3 Contributed by Kenneth Zadeck <zadeck@naturalbridge.com>
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "tm.h"
25 #include "tree.h"
26 #include "rtl.h"
27 #include "tm_p.h"
28 #include "hard-reg-set.h"
29 #include "predict.h"
30 #include "vec.h"
31 #include "hashtab.h"
32 #include "hash-set.h"
33 #include "machmode.h"
34 #include "input.h"
35 #include "function.h"
36 #include "dominance.h"
37 #include "cfg.h"
38 #include "cfgrtl.h"
39 #include "basic-block.h"
40 #include "insn-config.h"
41 #include "regs.h"
42 #include "flags.h"
43 #include "except.h"
44 #include "diagnostic-core.h"
45 #include "recog.h"
46 #include "expr.h"
47 #include "tree-pass.h"
48 #include "df.h"
49 #include "dbgcnt.h"
50 #include "target.h"
52 /* This pass was originally removed from flow.c. However there is
53 almost nothing that remains of that code.
55 There are (4) basic forms that are matched:
57 (1) FORM_PRE_ADD
58 a <- b + c
59 ...
62 becomes
64 a <- b
65 ...
66 *(a += c) pre
69 (2) FORM_PRE_INC
70 a += c
71 ...
74 becomes
76 *(a += c) pre
79 (3) FORM_POST_ADD
81 ...
82 b <- a + c
84 (For this case to be true, b must not be assigned or used between
85 the *a and the assignment to b. B must also be a Pmode reg.)
87 becomes
89 b <- a
90 ...
91 *(b += c) post
94 (4) FORM_POST_INC
96 ...
97 a <- a + c
99 becomes
101 *(a += c) post
103 There are three types of values of c.
105 1) c is a constant equal to the width of the value being accessed by
106 the pointer. This is useful for machines that have
107 HAVE_PRE_INCREMENT, HAVE_POST_INCREMENT, HAVE_PRE_DECREMENT or
108 HAVE_POST_DECREMENT defined.
110 2) c is a constant not equal to the width of the value being accessed
111 by the pointer. This is useful for machines that have
112 HAVE_PRE_MODIFY_DISP, HAVE_POST_MODIFY_DISP defined.
114 3) c is a register. This is useful for machines that have
115 HAVE_PRE_MODIFY_REG, HAVE_POST_MODIFY_REG
117 The is one special case: if a already had an offset equal to it +-
118 its width and that offset is equal to -c when the increment was
119 before the ref or +c if the increment was after the ref, then if we
120 can do the combination but switch the pre/post bit. */
122 #ifdef AUTO_INC_DEC
124 enum form
126 FORM_PRE_ADD,
127 FORM_PRE_INC,
128 FORM_POST_ADD,
129 FORM_POST_INC,
130 FORM_last
133 /* The states of the second operands of mem refs and inc insns. If no
134 second operand of the mem_ref was found, it is assumed to just be
135 ZERO. SIZE is the size of the mode accessed in the memref. The
136 ANY is used for constants that are not +-size or 0. REG is used if
137 the forms are reg1 + reg2. */
139 enum inc_state
141 INC_ZERO, /* == 0 */
142 INC_NEG_SIZE, /* == +size */
143 INC_POS_SIZE, /* == -size */
144 INC_NEG_ANY, /* == some -constant */
145 INC_POS_ANY, /* == some +constant */
146 INC_REG, /* == some register */
147 INC_last
150 /* The eight forms that pre/post inc/dec can take. */
151 enum gen_form
153 NOTHING,
154 SIMPLE_PRE_INC, /* ++size */
155 SIMPLE_POST_INC, /* size++ */
156 SIMPLE_PRE_DEC, /* --size */
157 SIMPLE_POST_DEC, /* size-- */
158 DISP_PRE, /* ++con */
159 DISP_POST, /* con++ */
160 REG_PRE, /* ++reg */
161 REG_POST /* reg++ */
164 /* Tmp mem rtx for use in cost modeling. */
165 static rtx mem_tmp;
167 static enum inc_state
168 set_inc_state (HOST_WIDE_INT val, int size)
170 if (val == 0)
171 return INC_ZERO;
172 if (val < 0)
173 return (val == -size) ? INC_NEG_SIZE : INC_NEG_ANY;
174 else
175 return (val == size) ? INC_POS_SIZE : INC_POS_ANY;
178 /* The DECISION_TABLE that describes what form, if any, the increment
179 or decrement will take. It is a three dimensional table. The first
180 index is the type of constant or register found as the second
181 operand of the inc insn. The second index is the type of constant
182 or register found as the second operand of the memory reference (if
183 no second operand exists, 0 is used). The third index is the form
184 and location (relative to the mem reference) of inc insn. */
186 static bool initialized = false;
187 static enum gen_form decision_table[INC_last][INC_last][FORM_last];
189 static void
190 init_decision_table (void)
192 enum gen_form value;
194 if (HAVE_PRE_INCREMENT || HAVE_PRE_MODIFY_DISP)
196 /* Prefer the simple form if both are available. */
197 value = (HAVE_PRE_INCREMENT) ? SIMPLE_PRE_INC : DISP_PRE;
199 decision_table[INC_POS_SIZE][INC_ZERO][FORM_PRE_ADD] = value;
200 decision_table[INC_POS_SIZE][INC_ZERO][FORM_PRE_INC] = value;
202 decision_table[INC_POS_SIZE][INC_POS_SIZE][FORM_POST_ADD] = value;
203 decision_table[INC_POS_SIZE][INC_POS_SIZE][FORM_POST_INC] = value;
206 if (HAVE_POST_INCREMENT || HAVE_POST_MODIFY_DISP)
208 /* Prefer the simple form if both are available. */
209 value = (HAVE_POST_INCREMENT) ? SIMPLE_POST_INC : DISP_POST;
211 decision_table[INC_POS_SIZE][INC_ZERO][FORM_POST_ADD] = value;
212 decision_table[INC_POS_SIZE][INC_ZERO][FORM_POST_INC] = value;
214 decision_table[INC_POS_SIZE][INC_NEG_SIZE][FORM_PRE_ADD] = value;
215 decision_table[INC_POS_SIZE][INC_NEG_SIZE][FORM_PRE_INC] = value;
218 if (HAVE_PRE_DECREMENT || HAVE_PRE_MODIFY_DISP)
220 /* Prefer the simple form if both are available. */
221 value = (HAVE_PRE_DECREMENT) ? SIMPLE_PRE_DEC : DISP_PRE;
223 decision_table[INC_NEG_SIZE][INC_ZERO][FORM_PRE_ADD] = value;
224 decision_table[INC_NEG_SIZE][INC_ZERO][FORM_PRE_INC] = value;
226 decision_table[INC_NEG_SIZE][INC_NEG_SIZE][FORM_POST_ADD] = value;
227 decision_table[INC_NEG_SIZE][INC_NEG_SIZE][FORM_POST_INC] = value;
230 if (HAVE_POST_DECREMENT || HAVE_POST_MODIFY_DISP)
232 /* Prefer the simple form if both are available. */
233 value = (HAVE_POST_DECREMENT) ? SIMPLE_POST_DEC : DISP_POST;
235 decision_table[INC_NEG_SIZE][INC_ZERO][FORM_POST_ADD] = value;
236 decision_table[INC_NEG_SIZE][INC_ZERO][FORM_POST_INC] = value;
238 decision_table[INC_NEG_SIZE][INC_POS_SIZE][FORM_PRE_ADD] = value;
239 decision_table[INC_NEG_SIZE][INC_POS_SIZE][FORM_PRE_INC] = value;
242 if (HAVE_PRE_MODIFY_DISP)
244 decision_table[INC_POS_ANY][INC_ZERO][FORM_PRE_ADD] = DISP_PRE;
245 decision_table[INC_POS_ANY][INC_ZERO][FORM_PRE_INC] = DISP_PRE;
247 decision_table[INC_POS_ANY][INC_POS_ANY][FORM_POST_ADD] = DISP_PRE;
248 decision_table[INC_POS_ANY][INC_POS_ANY][FORM_POST_INC] = DISP_PRE;
250 decision_table[INC_NEG_ANY][INC_ZERO][FORM_PRE_ADD] = DISP_PRE;
251 decision_table[INC_NEG_ANY][INC_ZERO][FORM_PRE_INC] = DISP_PRE;
253 decision_table[INC_NEG_ANY][INC_NEG_ANY][FORM_POST_ADD] = DISP_PRE;
254 decision_table[INC_NEG_ANY][INC_NEG_ANY][FORM_POST_INC] = DISP_PRE;
257 if (HAVE_POST_MODIFY_DISP)
259 decision_table[INC_POS_ANY][INC_ZERO][FORM_POST_ADD] = DISP_POST;
260 decision_table[INC_POS_ANY][INC_ZERO][FORM_POST_INC] = DISP_POST;
262 decision_table[INC_POS_ANY][INC_NEG_ANY][FORM_PRE_ADD] = DISP_POST;
263 decision_table[INC_POS_ANY][INC_NEG_ANY][FORM_PRE_INC] = DISP_POST;
265 decision_table[INC_NEG_ANY][INC_ZERO][FORM_POST_ADD] = DISP_POST;
266 decision_table[INC_NEG_ANY][INC_ZERO][FORM_POST_INC] = DISP_POST;
268 decision_table[INC_NEG_ANY][INC_POS_ANY][FORM_PRE_ADD] = DISP_POST;
269 decision_table[INC_NEG_ANY][INC_POS_ANY][FORM_PRE_INC] = DISP_POST;
272 /* This is much simpler than the other cases because we do not look
273 for the reg1-reg2 case. Note that we do not have a INC_POS_REG
274 and INC_NEG_REG states. Most of the use of such states would be
275 on a target that had an R1 - R2 update address form.
277 There is the remote possibility that you could also catch a = a +
278 b; *(a - b) as a postdecrement of (a + b). However, it is
279 unclear if *(a - b) would ever be generated on a machine that did
280 not have that kind of addressing mode. The IA-64 and RS6000 will
281 not do this, and I cannot speak for any other. If any
282 architecture does have an a-b update for, these cases should be
283 added. */
284 if (HAVE_PRE_MODIFY_REG)
286 decision_table[INC_REG][INC_ZERO][FORM_PRE_ADD] = REG_PRE;
287 decision_table[INC_REG][INC_ZERO][FORM_PRE_INC] = REG_PRE;
289 decision_table[INC_REG][INC_REG][FORM_POST_ADD] = REG_PRE;
290 decision_table[INC_REG][INC_REG][FORM_POST_INC] = REG_PRE;
293 if (HAVE_POST_MODIFY_REG)
295 decision_table[INC_REG][INC_ZERO][FORM_POST_ADD] = REG_POST;
296 decision_table[INC_REG][INC_ZERO][FORM_POST_INC] = REG_POST;
299 initialized = true;
302 /* Parsed fields of an inc insn of the form "reg_res = reg0+reg1" or
303 "reg_res = reg0+c". */
305 static struct inc_insn
307 rtx_insn *insn; /* The insn being parsed. */
308 rtx pat; /* The pattern of the insn. */
309 bool reg1_is_const; /* True if reg1 is const, false if reg1 is a reg. */
310 enum form form;
311 rtx reg_res;
312 rtx reg0;
313 rtx reg1;
314 enum inc_state reg1_state;/* The form of the const if reg1 is a const. */
315 HOST_WIDE_INT reg1_val;/* Value if reg1 is const. */
316 } inc_insn;
319 /* Dump the parsed inc insn to FILE. */
321 static void
322 dump_inc_insn (FILE *file)
324 const char *f = ((inc_insn.form == FORM_PRE_ADD)
325 || (inc_insn.form == FORM_PRE_INC)) ? "pre" : "post";
327 dump_insn_slim (file, inc_insn.insn);
329 switch (inc_insn.form)
331 case FORM_PRE_ADD:
332 case FORM_POST_ADD:
333 if (inc_insn.reg1_is_const)
334 fprintf (file, "found %s add(%d) r[%d]=r[%d]+%d\n",
335 f, INSN_UID (inc_insn.insn),
336 REGNO (inc_insn.reg_res),
337 REGNO (inc_insn.reg0), (int) inc_insn.reg1_val);
338 else
339 fprintf (file, "found %s add(%d) r[%d]=r[%d]+r[%d]\n",
340 f, INSN_UID (inc_insn.insn),
341 REGNO (inc_insn.reg_res),
342 REGNO (inc_insn.reg0), REGNO (inc_insn.reg1));
343 break;
345 case FORM_PRE_INC:
346 case FORM_POST_INC:
347 if (inc_insn.reg1_is_const)
348 fprintf (file, "found %s inc(%d) r[%d]+=%d\n",
349 f, INSN_UID (inc_insn.insn),
350 REGNO (inc_insn.reg_res), (int) inc_insn.reg1_val);
351 else
352 fprintf (file, "found %s inc(%d) r[%d]+=r[%d]\n",
353 f, INSN_UID (inc_insn.insn),
354 REGNO (inc_insn.reg_res), REGNO (inc_insn.reg1));
355 break;
357 default:
358 break;
363 /* Parsed fields of a mem ref of the form "*(reg0+reg1)" or "*(reg0+c)". */
365 static struct mem_insn
367 rtx_insn *insn; /* The insn being parsed. */
368 rtx pat; /* The pattern of the insn. */
369 rtx *mem_loc; /* The address of the field that holds the mem */
370 /* that is to be replaced. */
371 bool reg1_is_const; /* True if reg1 is const, false if reg1 is a reg. */
372 rtx reg0;
373 rtx reg1; /* This is either a reg or a const depending on
374 reg1_is_const. */
375 enum inc_state reg1_state;/* The form of the const if reg1 is a const. */
376 HOST_WIDE_INT reg1_val;/* Value if reg1 is const. */
377 } mem_insn;
380 /* Dump the parsed mem insn to FILE. */
382 static void
383 dump_mem_insn (FILE *file)
385 dump_insn_slim (file, mem_insn.insn);
387 if (mem_insn.reg1_is_const)
388 fprintf (file, "found mem(%d) *(r[%d]+%d)\n",
389 INSN_UID (mem_insn.insn),
390 REGNO (mem_insn.reg0), (int) mem_insn.reg1_val);
391 else
392 fprintf (file, "found mem(%d) *(r[%d]+r[%d])\n",
393 INSN_UID (mem_insn.insn),
394 REGNO (mem_insn.reg0), REGNO (mem_insn.reg1));
398 /* The following three arrays contain pointers to instructions. They
399 are indexed by REGNO. At any point in the basic block where we are
400 looking these three arrays contain, respectively, the next insn
401 that uses REGNO, the next inc or add insn that uses REGNO and the
402 next insn that sets REGNO.
404 The arrays are not cleared when we move from block to block so
405 whenever an insn is retrieved from these arrays, it's block number
406 must be compared with the current block.
409 static rtx_insn **reg_next_use = NULL;
410 static rtx_insn **reg_next_inc_use = NULL;
411 static rtx_insn **reg_next_def = NULL;
414 /* Move dead note that match PATTERN to TO_INSN from FROM_INSN. We do
415 not really care about moving any other notes from the inc or add
416 insn. Moving the REG_EQUAL and REG_EQUIV is clearly wrong and it
417 does not appear that there are any other kinds of relevant notes. */
419 static void
420 move_dead_notes (rtx_insn *to_insn, rtx_insn *from_insn, rtx pattern)
422 rtx note;
423 rtx next_note;
424 rtx prev_note = NULL;
426 for (note = REG_NOTES (from_insn); note; note = next_note)
428 next_note = XEXP (note, 1);
430 if ((REG_NOTE_KIND (note) == REG_DEAD)
431 && pattern == XEXP (note, 0))
433 XEXP (note, 1) = REG_NOTES (to_insn);
434 REG_NOTES (to_insn) = note;
435 if (prev_note)
436 XEXP (prev_note, 1) = next_note;
437 else
438 REG_NOTES (from_insn) = next_note;
440 else prev_note = note;
445 /* Create a mov insn DEST_REG <- SRC_REG and insert it before
446 NEXT_INSN. */
448 static rtx_insn *
449 insert_move_insn_before (rtx_insn *next_insn, rtx dest_reg, rtx src_reg)
451 rtx_insn *insns;
453 start_sequence ();
454 emit_move_insn (dest_reg, src_reg);
455 insns = get_insns ();
456 end_sequence ();
457 emit_insn_before (insns, next_insn);
458 return insns;
462 /* Change mem_insn.mem_loc so that uses NEW_ADDR which has an
463 increment of INC_REG. To have reached this point, the change is a
464 legitimate one from a dataflow point of view. The only questions
465 are is this a valid change to the instruction and is this a
466 profitable change to the instruction. */
468 static bool
469 attempt_change (rtx new_addr, rtx inc_reg)
471 /* There are four cases: For the two cases that involve an add
472 instruction, we are going to have to delete the add and insert a
473 mov. We are going to assume that the mov is free. This is
474 fairly early in the backend and there are a lot of opportunities
475 for removing that move later. In particular, there is the case
476 where the move may be dead, this is what dead code elimination
477 passes are for. The two cases where we have an inc insn will be
478 handled mov free. */
480 basic_block bb = BLOCK_FOR_INSN (mem_insn.insn);
481 rtx_insn *mov_insn = NULL;
482 int regno;
483 rtx mem = *mem_insn.mem_loc;
484 machine_mode mode = GET_MODE (mem);
485 rtx new_mem;
486 int old_cost = 0;
487 int new_cost = 0;
488 bool speed = optimize_bb_for_speed_p (bb);
490 PUT_MODE (mem_tmp, mode);
491 XEXP (mem_tmp, 0) = new_addr;
493 old_cost = (set_src_cost (mem, speed)
494 + set_rtx_cost (PATTERN (inc_insn.insn), speed));
495 new_cost = set_src_cost (mem_tmp, speed);
497 /* The first item of business is to see if this is profitable. */
498 if (old_cost < new_cost)
500 if (dump_file)
501 fprintf (dump_file, "cost failure old=%d new=%d\n", old_cost, new_cost);
502 return false;
505 /* Jump through a lot of hoops to keep the attributes up to date. We
506 do not want to call one of the change address variants that take
507 an offset even though we know the offset in many cases. These
508 assume you are changing where the address is pointing by the
509 offset. */
510 new_mem = replace_equiv_address_nv (mem, new_addr);
511 if (! validate_change (mem_insn.insn, mem_insn.mem_loc, new_mem, 0))
513 if (dump_file)
514 fprintf (dump_file, "validation failure\n");
515 return false;
518 /* From here to the end of the function we are committed to the
519 change, i.e. nothing fails. Generate any necessary movs, move
520 any regnotes, and fix up the reg_next_{use,inc_use,def}. */
521 switch (inc_insn.form)
523 case FORM_PRE_ADD:
524 /* Replace the addition with a move. Do it at the location of
525 the addition since the operand of the addition may change
526 before the memory reference. */
527 mov_insn = insert_move_insn_before (inc_insn.insn,
528 inc_insn.reg_res, inc_insn.reg0);
529 move_dead_notes (mov_insn, inc_insn.insn, inc_insn.reg0);
531 regno = REGNO (inc_insn.reg_res);
532 reg_next_def[regno] = mov_insn;
533 reg_next_use[regno] = NULL;
534 regno = REGNO (inc_insn.reg0);
535 reg_next_use[regno] = mov_insn;
536 df_recompute_luids (bb);
537 break;
539 case FORM_POST_INC:
540 regno = REGNO (inc_insn.reg_res);
541 if (reg_next_use[regno] == reg_next_inc_use[regno])
542 reg_next_inc_use[regno] = NULL;
544 /* Fallthru. */
545 case FORM_PRE_INC:
546 regno = REGNO (inc_insn.reg_res);
547 reg_next_def[regno] = mem_insn.insn;
548 reg_next_use[regno] = NULL;
550 break;
552 case FORM_POST_ADD:
553 mov_insn = insert_move_insn_before (mem_insn.insn,
554 inc_insn.reg_res, inc_insn.reg0);
555 move_dead_notes (mov_insn, inc_insn.insn, inc_insn.reg0);
557 /* Do not move anything to the mov insn because the instruction
558 pointer for the main iteration has not yet hit that. It is
559 still pointing to the mem insn. */
560 regno = REGNO (inc_insn.reg_res);
561 reg_next_def[regno] = mem_insn.insn;
562 reg_next_use[regno] = NULL;
564 regno = REGNO (inc_insn.reg0);
565 reg_next_use[regno] = mem_insn.insn;
566 if ((reg_next_use[regno] == reg_next_inc_use[regno])
567 || (reg_next_inc_use[regno] == inc_insn.insn))
568 reg_next_inc_use[regno] = NULL;
569 df_recompute_luids (bb);
570 break;
572 case FORM_last:
573 default:
574 gcc_unreachable ();
577 if (!inc_insn.reg1_is_const)
579 regno = REGNO (inc_insn.reg1);
580 reg_next_use[regno] = mem_insn.insn;
581 if ((reg_next_use[regno] == reg_next_inc_use[regno])
582 || (reg_next_inc_use[regno] == inc_insn.insn))
583 reg_next_inc_use[regno] = NULL;
586 delete_insn (inc_insn.insn);
588 if (dump_file && mov_insn)
590 fprintf (dump_file, "inserting mov ");
591 dump_insn_slim (dump_file, mov_insn);
594 /* Record that this insn has an implicit side effect. */
595 add_reg_note (mem_insn.insn, REG_INC, inc_reg);
597 if (dump_file)
599 fprintf (dump_file, "****success ");
600 dump_insn_slim (dump_file, mem_insn.insn);
603 return true;
607 /* Try to combine the instruction in INC_INSN with the instruction in
608 MEM_INSN. First the form is determined using the DECISION_TABLE
609 and the results of parsing the INC_INSN and the MEM_INSN.
610 Assuming the form is ok, a prototype new address is built which is
611 passed to ATTEMPT_CHANGE for final processing. */
613 static bool
614 try_merge (void)
616 enum gen_form gen_form;
617 rtx mem = *mem_insn.mem_loc;
618 rtx inc_reg = inc_insn.form == FORM_POST_ADD ?
619 inc_insn.reg_res : mem_insn.reg0;
621 /* The width of the mem being accessed. */
622 int size = GET_MODE_SIZE (GET_MODE (mem));
623 rtx_insn *last_insn = NULL;
624 machine_mode reg_mode = GET_MODE (inc_reg);
626 switch (inc_insn.form)
628 case FORM_PRE_ADD:
629 case FORM_PRE_INC:
630 last_insn = mem_insn.insn;
631 break;
632 case FORM_POST_INC:
633 case FORM_POST_ADD:
634 last_insn = inc_insn.insn;
635 break;
636 case FORM_last:
637 default:
638 gcc_unreachable ();
641 /* Cannot handle auto inc of the stack. */
642 if (inc_reg == stack_pointer_rtx)
644 if (dump_file)
645 fprintf (dump_file, "cannot inc stack %d failure\n", REGNO (inc_reg));
646 return false;
649 /* Look to see if the inc register is dead after the memory
650 reference. If it is, do not do the combination. */
651 if (find_regno_note (last_insn, REG_DEAD, REGNO (inc_reg)))
653 if (dump_file)
654 fprintf (dump_file, "dead failure %d\n", REGNO (inc_reg));
655 return false;
658 mem_insn.reg1_state = (mem_insn.reg1_is_const)
659 ? set_inc_state (mem_insn.reg1_val, size) : INC_REG;
660 inc_insn.reg1_state = (inc_insn.reg1_is_const)
661 ? set_inc_state (inc_insn.reg1_val, size) : INC_REG;
663 /* Now get the form that we are generating. */
664 gen_form = decision_table
665 [inc_insn.reg1_state][mem_insn.reg1_state][inc_insn.form];
667 if (dbg_cnt (auto_inc_dec) == false)
668 return false;
670 switch (gen_form)
672 default:
673 case NOTHING:
674 return false;
676 case SIMPLE_PRE_INC: /* ++size */
677 if (dump_file)
678 fprintf (dump_file, "trying SIMPLE_PRE_INC\n");
679 return attempt_change (gen_rtx_PRE_INC (reg_mode, inc_reg), inc_reg);
680 break;
682 case SIMPLE_POST_INC: /* size++ */
683 if (dump_file)
684 fprintf (dump_file, "trying SIMPLE_POST_INC\n");
685 return attempt_change (gen_rtx_POST_INC (reg_mode, inc_reg), inc_reg);
686 break;
688 case SIMPLE_PRE_DEC: /* --size */
689 if (dump_file)
690 fprintf (dump_file, "trying SIMPLE_PRE_DEC\n");
691 return attempt_change (gen_rtx_PRE_DEC (reg_mode, inc_reg), inc_reg);
692 break;
694 case SIMPLE_POST_DEC: /* size-- */
695 if (dump_file)
696 fprintf (dump_file, "trying SIMPLE_POST_DEC\n");
697 return attempt_change (gen_rtx_POST_DEC (reg_mode, inc_reg), inc_reg);
698 break;
700 case DISP_PRE: /* ++con */
701 if (dump_file)
702 fprintf (dump_file, "trying DISP_PRE\n");
703 return attempt_change (gen_rtx_PRE_MODIFY (reg_mode,
704 inc_reg,
705 gen_rtx_PLUS (reg_mode,
706 inc_reg,
707 inc_insn.reg1)),
708 inc_reg);
709 break;
711 case DISP_POST: /* con++ */
712 if (dump_file)
713 fprintf (dump_file, "trying POST_DISP\n");
714 return attempt_change (gen_rtx_POST_MODIFY (reg_mode,
715 inc_reg,
716 gen_rtx_PLUS (reg_mode,
717 inc_reg,
718 inc_insn.reg1)),
719 inc_reg);
720 break;
722 case REG_PRE: /* ++reg */
723 if (dump_file)
724 fprintf (dump_file, "trying PRE_REG\n");
725 return attempt_change (gen_rtx_PRE_MODIFY (reg_mode,
726 inc_reg,
727 gen_rtx_PLUS (reg_mode,
728 inc_reg,
729 inc_insn.reg1)),
730 inc_reg);
731 break;
733 case REG_POST: /* reg++ */
734 if (dump_file)
735 fprintf (dump_file, "trying POST_REG\n");
736 return attempt_change (gen_rtx_POST_MODIFY (reg_mode,
737 inc_reg,
738 gen_rtx_PLUS (reg_mode,
739 inc_reg,
740 inc_insn.reg1)),
741 inc_reg);
742 break;
746 /* Return the next insn that uses (if reg_next_use is passed in
747 NEXT_ARRAY) or defines (if reg_next_def is passed in NEXT_ARRAY)
748 REGNO in BB. */
750 static rtx_insn *
751 get_next_ref (int regno, basic_block bb, rtx_insn **next_array)
753 rtx_insn *insn = next_array[regno];
755 /* Lazy about cleaning out the next_arrays. */
756 if (insn && BLOCK_FOR_INSN (insn) != bb)
758 next_array[regno] = NULL;
759 insn = NULL;
762 return insn;
766 /* Reverse the operands in a mem insn. */
768 static void
769 reverse_mem (void)
771 rtx tmp = mem_insn.reg1;
772 mem_insn.reg1 = mem_insn.reg0;
773 mem_insn.reg0 = tmp;
777 /* Reverse the operands in a inc insn. */
779 static void
780 reverse_inc (void)
782 rtx tmp = inc_insn.reg1;
783 inc_insn.reg1 = inc_insn.reg0;
784 inc_insn.reg0 = tmp;
788 /* Return true if INSN is of a form "a = b op c" where a and b are
789 regs. op is + if c is a reg and +|- if c is a const. Fill in
790 INC_INSN with what is found.
792 This function is called in two contexts, if BEFORE_MEM is true,
793 this is called for each insn in the basic block. If BEFORE_MEM is
794 false, it is called for the instruction in the block that uses the
795 index register for some memory reference that is currently being
796 processed. */
798 static bool
799 parse_add_or_inc (rtx_insn *insn, bool before_mem)
801 rtx pat = single_set (insn);
802 if (!pat)
803 return false;
805 /* Result must be single reg. */
806 if (!REG_P (SET_DEST (pat)))
807 return false;
809 if ((GET_CODE (SET_SRC (pat)) != PLUS)
810 && (GET_CODE (SET_SRC (pat)) != MINUS))
811 return false;
813 if (!REG_P (XEXP (SET_SRC (pat), 0)))
814 return false;
816 inc_insn.insn = insn;
817 inc_insn.pat = pat;
818 inc_insn.reg_res = SET_DEST (pat);
819 inc_insn.reg0 = XEXP (SET_SRC (pat), 0);
820 if (rtx_equal_p (inc_insn.reg_res, inc_insn.reg0))
821 inc_insn.form = before_mem ? FORM_PRE_INC : FORM_POST_INC;
822 else
823 inc_insn.form = before_mem ? FORM_PRE_ADD : FORM_POST_ADD;
825 if (CONST_INT_P (XEXP (SET_SRC (pat), 1)))
827 /* Process a = b + c where c is a const. */
828 inc_insn.reg1_is_const = true;
829 if (GET_CODE (SET_SRC (pat)) == PLUS)
831 inc_insn.reg1 = XEXP (SET_SRC (pat), 1);
832 inc_insn.reg1_val = INTVAL (inc_insn.reg1);
834 else
836 inc_insn.reg1_val = -INTVAL (XEXP (SET_SRC (pat), 1));
837 inc_insn.reg1 = GEN_INT (inc_insn.reg1_val);
839 return true;
841 else if ((HAVE_PRE_MODIFY_REG || HAVE_POST_MODIFY_REG)
842 && (REG_P (XEXP (SET_SRC (pat), 1)))
843 && GET_CODE (SET_SRC (pat)) == PLUS)
845 /* Process a = b + c where c is a reg. */
846 inc_insn.reg1 = XEXP (SET_SRC (pat), 1);
847 inc_insn.reg1_is_const = false;
849 if (inc_insn.form == FORM_PRE_INC
850 || inc_insn.form == FORM_POST_INC)
851 return true;
852 else if (rtx_equal_p (inc_insn.reg_res, inc_insn.reg1))
854 /* Reverse the two operands and turn *_ADD into *_INC since
855 a = c + a. */
856 reverse_inc ();
857 inc_insn.form = before_mem ? FORM_PRE_INC : FORM_POST_INC;
858 return true;
860 else
861 return true;
864 return false;
868 /* A recursive function that checks all of the mem uses in
869 ADDRESS_OF_X to see if any single one of them is compatible with
870 what has been found in inc_insn.
872 -1 is returned for success. 0 is returned if nothing was found and
873 1 is returned for failure. */
875 static int
876 find_address (rtx *address_of_x)
878 rtx x = *address_of_x;
879 enum rtx_code code = GET_CODE (x);
880 const char *const fmt = GET_RTX_FORMAT (code);
881 int i;
882 int value = 0;
883 int tem;
885 if (code == MEM && rtx_equal_p (XEXP (x, 0), inc_insn.reg_res))
887 /* Match with *reg0. */
888 mem_insn.mem_loc = address_of_x;
889 mem_insn.reg0 = inc_insn.reg_res;
890 mem_insn.reg1_is_const = true;
891 mem_insn.reg1_val = 0;
892 mem_insn.reg1 = GEN_INT (0);
893 return -1;
895 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
896 && rtx_equal_p (XEXP (XEXP (x, 0), 0), inc_insn.reg_res))
898 rtx b = XEXP (XEXP (x, 0), 1);
899 mem_insn.mem_loc = address_of_x;
900 mem_insn.reg0 = inc_insn.reg_res;
901 mem_insn.reg1 = b;
902 mem_insn.reg1_is_const = inc_insn.reg1_is_const;
903 if (CONST_INT_P (b))
905 /* Match with *(reg0 + reg1) where reg1 is a const. */
906 HOST_WIDE_INT val = INTVAL (b);
907 if (inc_insn.reg1_is_const
908 && (inc_insn.reg1_val == val || inc_insn.reg1_val == -val))
910 mem_insn.reg1_val = val;
911 return -1;
914 else if (!inc_insn.reg1_is_const
915 && rtx_equal_p (inc_insn.reg1, b))
916 /* Match with *(reg0 + reg1). */
917 return -1;
920 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
922 /* If REG occurs inside a MEM used in a bit-field reference,
923 that is unacceptable. */
924 if (find_address (&XEXP (x, 0)))
925 return 1;
928 if (x == inc_insn.reg_res)
929 return 1;
931 /* Time for some deep diving. */
932 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
934 if (fmt[i] == 'e')
936 tem = find_address (&XEXP (x, i));
937 /* If this is the first use, let it go so the rest of the
938 insn can be checked. */
939 if (value == 0)
940 value = tem;
941 else if (tem != 0)
942 /* More than one match was found. */
943 return 1;
945 else if (fmt[i] == 'E')
947 int j;
948 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
950 tem = find_address (&XVECEXP (x, i, j));
951 /* If this is the first use, let it go so the rest of
952 the insn can be checked. */
953 if (value == 0)
954 value = tem;
955 else if (tem != 0)
956 /* More than one match was found. */
957 return 1;
961 return value;
964 /* Once a suitable mem reference has been found and the MEM_INSN
965 structure has been filled in, FIND_INC is called to see if there is
966 a suitable add or inc insn that follows the mem reference and
967 determine if it is suitable to merge.
969 In the case where the MEM_INSN has two registers in the reference,
970 this function may be called recursively. The first time looking
971 for an add of the first register, and if that fails, looking for an
972 add of the second register. The FIRST_TRY parameter is used to
973 only allow the parameters to be reversed once. */
975 static bool
976 find_inc (bool first_try)
978 rtx_insn *insn;
979 basic_block bb = BLOCK_FOR_INSN (mem_insn.insn);
980 rtx_insn *other_insn;
981 df_ref def;
983 /* Make sure this reg appears only once in this insn. */
984 if (count_occurrences (PATTERN (mem_insn.insn), mem_insn.reg0, 1) != 1)
986 if (dump_file)
987 fprintf (dump_file, "mem count failure\n");
988 return false;
991 if (dump_file)
992 dump_mem_insn (dump_file);
994 /* Find the next use that is an inc. */
995 insn = get_next_ref (REGNO (mem_insn.reg0),
996 BLOCK_FOR_INSN (mem_insn.insn),
997 reg_next_inc_use);
998 if (!insn)
999 return false;
1001 /* Even though we know the next use is an add or inc because it came
1002 from the reg_next_inc_use, we must still reparse. */
1003 if (!parse_add_or_inc (insn, false))
1005 /* Next use was not an add. Look for one extra case. It could be
1006 that we have:
1008 *(a + b)
1009 ...= a;
1010 ...= b + a
1012 if we reverse the operands in the mem ref we would
1013 find this. Only try it once though. */
1014 if (first_try && !mem_insn.reg1_is_const)
1016 reverse_mem ();
1017 return find_inc (false);
1019 else
1020 return false;
1023 /* Need to assure that none of the operands of the inc instruction are
1024 assigned to by the mem insn. */
1025 FOR_EACH_INSN_DEF (def, mem_insn.insn)
1027 unsigned int regno = DF_REF_REGNO (def);
1028 if ((regno == REGNO (inc_insn.reg0))
1029 || (regno == REGNO (inc_insn.reg_res)))
1031 if (dump_file)
1032 fprintf (dump_file, "inc conflicts with store failure.\n");
1033 return false;
1035 if (!inc_insn.reg1_is_const && (regno == REGNO (inc_insn.reg1)))
1037 if (dump_file)
1038 fprintf (dump_file, "inc conflicts with store failure.\n");
1039 return false;
1043 if (dump_file)
1044 dump_inc_insn (dump_file);
1046 if (inc_insn.form == FORM_POST_ADD)
1048 /* Make sure that there is no insn that assigns to inc_insn.res
1049 between the mem_insn and the inc_insn. */
1050 rtx_insn *other_insn = get_next_ref (REGNO (inc_insn.reg_res),
1051 BLOCK_FOR_INSN (mem_insn.insn),
1052 reg_next_def);
1053 if (other_insn != inc_insn.insn)
1055 if (dump_file)
1056 fprintf (dump_file,
1057 "result of add is assigned to between mem and inc insns.\n");
1058 return false;
1061 other_insn = get_next_ref (REGNO (inc_insn.reg_res),
1062 BLOCK_FOR_INSN (mem_insn.insn),
1063 reg_next_use);
1064 if (other_insn
1065 && (other_insn != inc_insn.insn)
1066 && (DF_INSN_LUID (inc_insn.insn) > DF_INSN_LUID (other_insn)))
1068 if (dump_file)
1069 fprintf (dump_file,
1070 "result of add is used between mem and inc insns.\n");
1071 return false;
1074 /* For the post_add to work, the result_reg of the inc must not be
1075 used in the mem insn since this will become the new index
1076 register. */
1077 if (reg_overlap_mentioned_p (inc_insn.reg_res, PATTERN (mem_insn.insn)))
1079 if (dump_file)
1080 fprintf (dump_file, "base reg replacement failure.\n");
1081 return false;
1085 if (mem_insn.reg1_is_const)
1087 if (mem_insn.reg1_val == 0)
1089 if (!inc_insn.reg1_is_const)
1091 /* The mem looks like *r0 and the rhs of the add has two
1092 registers. */
1093 int luid = DF_INSN_LUID (inc_insn.insn);
1094 if (inc_insn.form == FORM_POST_ADD)
1096 /* The trick is that we are not going to increment r0,
1097 we are going to increment the result of the add insn.
1098 For this trick to be correct, the result reg of
1099 the inc must be a valid addressing reg. */
1100 addr_space_t as = MEM_ADDR_SPACE (*mem_insn.mem_loc);
1101 if (GET_MODE (inc_insn.reg_res)
1102 != targetm.addr_space.address_mode (as))
1104 if (dump_file)
1105 fprintf (dump_file, "base reg mode failure.\n");
1106 return false;
1109 /* We also need to make sure that the next use of
1110 inc result is after the inc. */
1111 other_insn
1112 = get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_use);
1113 if (other_insn && luid > DF_INSN_LUID (other_insn))
1114 return false;
1116 if (!rtx_equal_p (mem_insn.reg0, inc_insn.reg0))
1117 reverse_inc ();
1120 other_insn
1121 = get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_def);
1122 if (other_insn && luid > DF_INSN_LUID (other_insn))
1123 return false;
1126 /* Both the inc/add and the mem have a constant. Need to check
1127 that the constants are ok. */
1128 else if ((mem_insn.reg1_val != inc_insn.reg1_val)
1129 && (mem_insn.reg1_val != -inc_insn.reg1_val))
1130 return false;
1132 else
1134 /* The mem insn is of the form *(a + b) where a and b are both
1135 regs. It may be that in order to match the add or inc we
1136 need to treat it as if it was *(b + a). It may also be that
1137 the add is of the form a + c where c does not match b and
1138 then we just abandon this. */
1140 int luid = DF_INSN_LUID (inc_insn.insn);
1141 rtx_insn *other_insn;
1143 /* Make sure this reg appears only once in this insn. */
1144 if (count_occurrences (PATTERN (mem_insn.insn), mem_insn.reg1, 1) != 1)
1145 return false;
1147 if (inc_insn.form == FORM_POST_ADD)
1149 /* For this trick to be correct, the result reg of the inc
1150 must be a valid addressing reg. */
1151 addr_space_t as = MEM_ADDR_SPACE (*mem_insn.mem_loc);
1152 if (GET_MODE (inc_insn.reg_res)
1153 != targetm.addr_space.address_mode (as))
1155 if (dump_file)
1156 fprintf (dump_file, "base reg mode failure.\n");
1157 return false;
1160 if (rtx_equal_p (mem_insn.reg0, inc_insn.reg0))
1162 if (!rtx_equal_p (mem_insn.reg1, inc_insn.reg1))
1164 /* See comment above on find_inc (false) call. */
1165 if (first_try)
1167 reverse_mem ();
1168 return find_inc (false);
1170 else
1171 return false;
1174 /* Need to check that there are no assignments to b
1175 before the add insn. */
1176 other_insn
1177 = get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_def);
1178 if (other_insn && luid > DF_INSN_LUID (other_insn))
1179 return false;
1180 /* All ok for the next step. */
1182 else
1184 /* We know that mem_insn.reg0 must equal inc_insn.reg1
1185 or else we would not have found the inc insn. */
1186 reverse_mem ();
1187 if (!rtx_equal_p (mem_insn.reg0, inc_insn.reg0))
1189 /* See comment above on find_inc (false) call. */
1190 if (first_try)
1191 return find_inc (false);
1192 else
1193 return false;
1195 /* To have gotten here know that.
1196 *(b + a)
1198 ... = (b + a)
1200 We also know that the lhs of the inc is not b or a. We
1201 need to make sure that there are no assignments to b
1202 between the mem ref and the inc. */
1204 other_insn
1205 = get_next_ref (REGNO (inc_insn.reg0), bb, reg_next_def);
1206 if (other_insn && luid > DF_INSN_LUID (other_insn))
1207 return false;
1210 /* Need to check that the next use of the add result is later than
1211 add insn since this will be the reg incremented. */
1212 other_insn
1213 = get_next_ref (REGNO (inc_insn.reg_res), bb, reg_next_use);
1214 if (other_insn && luid > DF_INSN_LUID (other_insn))
1215 return false;
1217 else /* FORM_POST_INC. There is less to check here because we
1218 know that operands must line up. */
1220 if (!rtx_equal_p (mem_insn.reg1, inc_insn.reg1))
1221 /* See comment above on find_inc (false) call. */
1223 if (first_try)
1225 reverse_mem ();
1226 return find_inc (false);
1228 else
1229 return false;
1232 /* To have gotten here know that.
1233 *(a + b)
1235 ... = (a + b)
1237 We also know that the lhs of the inc is not b. We need to make
1238 sure that there are no assignments to b between the mem ref and
1239 the inc. */
1240 other_insn
1241 = get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_def);
1242 if (other_insn && luid > DF_INSN_LUID (other_insn))
1243 return false;
1247 if (inc_insn.form == FORM_POST_INC)
1249 other_insn
1250 = get_next_ref (REGNO (inc_insn.reg0), bb, reg_next_use);
1251 /* When we found inc_insn, we were looking for the
1252 next add or inc, not the next insn that used the
1253 reg. Because we are going to increment the reg
1254 in this form, we need to make sure that there
1255 were no intervening uses of reg. */
1256 if (inc_insn.insn != other_insn)
1257 return false;
1260 return try_merge ();
1264 /* A recursive function that walks ADDRESS_OF_X to find all of the mem
1265 uses in pat that could be used as an auto inc or dec. It then
1266 calls FIND_INC for each one. */
1268 static bool
1269 find_mem (rtx *address_of_x)
1271 rtx x = *address_of_x;
1272 enum rtx_code code = GET_CODE (x);
1273 const char *const fmt = GET_RTX_FORMAT (code);
1274 int i;
1276 if (code == MEM && REG_P (XEXP (x, 0)))
1278 /* Match with *reg0. */
1279 mem_insn.mem_loc = address_of_x;
1280 mem_insn.reg0 = XEXP (x, 0);
1281 mem_insn.reg1_is_const = true;
1282 mem_insn.reg1_val = 0;
1283 mem_insn.reg1 = GEN_INT (0);
1284 if (find_inc (true))
1285 return true;
1287 if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
1288 && REG_P (XEXP (XEXP (x, 0), 0)))
1290 rtx reg1 = XEXP (XEXP (x, 0), 1);
1291 mem_insn.mem_loc = address_of_x;
1292 mem_insn.reg0 = XEXP (XEXP (x, 0), 0);
1293 mem_insn.reg1 = reg1;
1294 if (CONST_INT_P (reg1))
1296 mem_insn.reg1_is_const = true;
1297 /* Match with *(reg0 + c) where c is a const. */
1298 mem_insn.reg1_val = INTVAL (reg1);
1299 if (find_inc (true))
1300 return true;
1302 else if (REG_P (reg1))
1304 /* Match with *(reg0 + reg1). */
1305 mem_insn.reg1_is_const = false;
1306 if (find_inc (true))
1307 return true;
1311 if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
1313 /* If REG occurs inside a MEM used in a bit-field reference,
1314 that is unacceptable. */
1315 return false;
1318 /* Time for some deep diving. */
1319 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1321 if (fmt[i] == 'e')
1323 if (find_mem (&XEXP (x, i)))
1324 return true;
1326 else if (fmt[i] == 'E')
1328 int j;
1329 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1330 if (find_mem (&XVECEXP (x, i, j)))
1331 return true;
1334 return false;
1338 /* Try to combine all incs and decs by constant values with memory
1339 references in BB. */
1341 static void
1342 merge_in_block (int max_reg, basic_block bb)
1344 rtx_insn *insn;
1345 rtx_insn *curr;
1346 int success_in_block = 0;
1348 if (dump_file)
1349 fprintf (dump_file, "\n\nstarting bb %d\n", bb->index);
1351 FOR_BB_INSNS_REVERSE_SAFE (bb, insn, curr)
1353 bool insn_is_add_or_inc = true;
1355 if (!NONDEBUG_INSN_P (insn))
1356 continue;
1358 /* This continue is deliberate. We do not want the uses of the
1359 jump put into reg_next_use because it is not considered safe to
1360 combine a preincrement with a jump. */
1361 if (JUMP_P (insn))
1362 continue;
1364 if (dump_file)
1365 dump_insn_slim (dump_file, insn);
1367 /* Does this instruction increment or decrement a register? */
1368 if (parse_add_or_inc (insn, true))
1370 int regno = REGNO (inc_insn.reg_res);
1371 /* Cannot handle case where there are three separate regs
1372 before a mem ref. Too many moves would be needed to be
1373 profitable. */
1374 if ((inc_insn.form == FORM_PRE_INC) || inc_insn.reg1_is_const)
1376 mem_insn.insn = get_next_ref (regno, bb, reg_next_use);
1377 if (mem_insn.insn)
1379 bool ok = true;
1380 if (!inc_insn.reg1_is_const)
1382 /* We are only here if we are going to try a
1383 HAVE_*_MODIFY_REG type transformation. c is a
1384 reg and we must sure that the path from the
1385 inc_insn to the mem_insn.insn is both def and use
1386 clear of c because the inc insn is going to move
1387 into the mem_insn.insn. */
1388 int luid = DF_INSN_LUID (mem_insn.insn);
1389 rtx_insn *other_insn
1390 = get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_use);
1392 if (other_insn && luid > DF_INSN_LUID (other_insn))
1393 ok = false;
1395 other_insn
1396 = get_next_ref (REGNO (inc_insn.reg1), bb, reg_next_def);
1398 if (other_insn && luid > DF_INSN_LUID (other_insn))
1399 ok = false;
1402 if (dump_file)
1403 dump_inc_insn (dump_file);
1405 if (ok && find_address (&PATTERN (mem_insn.insn)) == -1)
1407 if (dump_file)
1408 dump_mem_insn (dump_file);
1409 if (try_merge ())
1411 success_in_block++;
1412 insn_is_add_or_inc = false;
1418 else
1420 insn_is_add_or_inc = false;
1421 mem_insn.insn = insn;
1422 if (find_mem (&PATTERN (insn)))
1423 success_in_block++;
1426 /* If the inc insn was merged with a mem, the inc insn is gone
1427 and there is noting to update. */
1428 if (df_insn_info *insn_info = DF_INSN_INFO_GET (insn))
1430 df_ref def, use;
1432 /* Need to update next use. */
1433 FOR_EACH_INSN_INFO_DEF (def, insn_info)
1435 reg_next_use[DF_REF_REGNO (def)] = NULL;
1436 reg_next_inc_use[DF_REF_REGNO (def)] = NULL;
1437 reg_next_def[DF_REF_REGNO (def)] = insn;
1440 FOR_EACH_INSN_INFO_USE (use, insn_info)
1442 reg_next_use[DF_REF_REGNO (use)] = insn;
1443 if (insn_is_add_or_inc)
1444 reg_next_inc_use[DF_REF_REGNO (use)] = insn;
1445 else
1446 reg_next_inc_use[DF_REF_REGNO (use)] = NULL;
1449 else if (dump_file)
1450 fprintf (dump_file, "skipping update of deleted insn %d\n",
1451 INSN_UID (insn));
1454 /* If we were successful, try again. There may have been several
1455 opportunities that were interleaved. This is rare but
1456 gcc.c-torture/compile/pr17273.c actually exhibits this. */
1457 if (success_in_block)
1459 /* In this case, we must clear these vectors since the trick of
1460 testing if the stale insn in the block will not work. */
1461 memset (reg_next_use, 0, max_reg * sizeof (rtx));
1462 memset (reg_next_inc_use, 0, max_reg * sizeof (rtx));
1463 memset (reg_next_def, 0, max_reg * sizeof (rtx));
1464 df_recompute_luids (bb);
1465 merge_in_block (max_reg, bb);
1469 #endif
1471 /* Discover auto-inc auto-dec instructions. */
1473 namespace {
1475 const pass_data pass_data_inc_dec =
1477 RTL_PASS, /* type */
1478 "auto_inc_dec", /* name */
1479 OPTGROUP_NONE, /* optinfo_flags */
1480 TV_AUTO_INC_DEC, /* tv_id */
1481 0, /* properties_required */
1482 0, /* properties_provided */
1483 0, /* properties_destroyed */
1484 0, /* todo_flags_start */
1485 TODO_df_finish, /* todo_flags_finish */
1488 class pass_inc_dec : public rtl_opt_pass
1490 public:
1491 pass_inc_dec (gcc::context *ctxt)
1492 : rtl_opt_pass (pass_data_inc_dec, ctxt)
1495 /* opt_pass methods: */
1496 virtual bool gate (function *)
1498 #ifdef AUTO_INC_DEC
1499 return (optimize > 0 && flag_auto_inc_dec);
1500 #else
1501 return false;
1502 #endif
1506 unsigned int execute (function *);
1508 }; // class pass_inc_dec
1510 unsigned int
1511 pass_inc_dec::execute (function *fun ATTRIBUTE_UNUSED)
1513 #ifdef AUTO_INC_DEC
1514 basic_block bb;
1515 int max_reg = max_reg_num ();
1517 if (!initialized)
1518 init_decision_table ();
1520 mem_tmp = gen_rtx_MEM (Pmode, NULL_RTX);
1522 df_note_add_problem ();
1523 df_analyze ();
1525 reg_next_use = XCNEWVEC (rtx_insn *, max_reg);
1526 reg_next_inc_use = XCNEWVEC (rtx_insn *, max_reg);
1527 reg_next_def = XCNEWVEC (rtx_insn *, max_reg);
1528 FOR_EACH_BB_FN (bb, fun)
1529 merge_in_block (max_reg, bb);
1531 free (reg_next_use);
1532 free (reg_next_inc_use);
1533 free (reg_next_def);
1535 mem_tmp = NULL;
1536 #endif
1537 return 0;
1540 } // anon namespace
1542 rtl_opt_pass *
1543 make_pass_inc_dec (gcc::context *ctxt)
1545 return new pass_inc_dec (ctxt);