2008-05-15 Richard Guenther <rguenther@suse.de>
[official-gcc.git] / gcc / caller-save.c
blob7976fd5fd7509b7901f0e11836b2074887392827
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #include "config.h"
22 #include "system.h"
23 #include "coretypes.h"
24 #include "tm.h"
25 #include "rtl.h"
26 #include "regs.h"
27 #include "insn-config.h"
28 #include "flags.h"
29 #include "hard-reg-set.h"
30 #include "recog.h"
31 #include "basic-block.h"
32 #include "reload.h"
33 #include "function.h"
34 #include "expr.h"
35 #include "toplev.h"
36 #include "tm_p.h"
37 #include "addresses.h"
38 #include "df.h"
39 #include "ggc.h"
41 #ifndef MAX_MOVE_MAX
42 #define MAX_MOVE_MAX MOVE_MAX
43 #endif
45 #ifndef MIN_UNITS_PER_WORD
46 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
47 #endif
49 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
51 /* Modes for each hard register that we can save. The smallest mode is wide
52 enough to save the entire contents of the register. When saving the
53 register because it is live we first try to save in multi-register modes.
54 If that is not possible the save is done one register at a time. */
56 static enum machine_mode
57 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
59 /* For each hard register, a place on the stack where it can be saved,
60 if needed. */
62 static rtx
63 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
65 /* We will only make a register eligible for caller-save if it can be
66 saved in its widest mode with a simple SET insn as long as the memory
67 address is valid. We record the INSN_CODE is those insns here since
68 when we emit them, the addresses might not be valid, so they might not
69 be recognized. */
71 static int
72 cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
73 static int
74 cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
76 /* Set of hard regs currently residing in save area (during insn scan). */
78 static HARD_REG_SET hard_regs_saved;
80 /* Number of registers currently in hard_regs_saved. */
82 static int n_regs_saved;
84 /* Computed by mark_referenced_regs, all regs referenced in a given
85 insn. */
86 static HARD_REG_SET referenced_regs;
89 static void mark_set_regs (rtx, const_rtx, void *);
90 static void mark_referenced_regs (rtx);
91 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
92 enum machine_mode *);
93 static int insert_restore (struct insn_chain *, int, int, int,
94 enum machine_mode *);
95 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
96 rtx);
97 static void add_stored_regs (rtx, const_rtx, void *);
99 static GTY(()) rtx savepat;
100 static GTY(()) rtx restpat;
101 static GTY(()) rtx test_reg;
102 static GTY(()) rtx test_mem;
103 static GTY(()) rtx saveinsn;
104 static GTY(()) rtx restinsn;
106 /* Return the INSN_CODE used to save register REG in mode MODE. */
107 static int
108 reg_save_code (int reg, enum machine_mode mode)
110 bool ok;
111 if (cached_reg_save_code[reg][mode])
112 return cached_reg_save_code[reg][mode];
113 if (!HARD_REGNO_MODE_OK (reg, mode))
115 cached_reg_save_code[reg][mode] = -1;
116 cached_reg_restore_code[reg][mode] = -1;
117 return -1;
120 /* Update the register number and modes of the register
121 and memory operand. */
122 SET_REGNO (test_reg, reg);
123 PUT_MODE (test_reg, mode);
124 PUT_MODE (test_mem, mode);
126 /* Force re-recognition of the modified insns. */
127 INSN_CODE (saveinsn) = -1;
128 INSN_CODE (restinsn) = -1;
130 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
131 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
133 /* Now extract both insns and see if we can meet their
134 constraints. */
135 ok = (cached_reg_save_code[reg][mode] != -1
136 && cached_reg_restore_code[reg][mode] != -1);
137 if (ok)
139 extract_insn (saveinsn);
140 ok = constrain_operands (1);
141 extract_insn (restinsn);
142 ok &= constrain_operands (1);
145 if (! ok)
147 cached_reg_save_code[reg][mode] = -1;
148 cached_reg_restore_code[reg][mode] = -1;
150 gcc_assert (cached_reg_save_code[reg][mode]);
151 return cached_reg_save_code[reg][mode];
154 /* Return the INSN_CODE used to restore register REG in mode MODE. */
155 static int
156 reg_restore_code (int reg, enum machine_mode mode)
158 if (cached_reg_restore_code[reg][mode])
159 return cached_reg_restore_code[reg][mode];
160 /* Populate our cache. */
161 reg_save_code (reg, mode);
162 return cached_reg_restore_code[reg][mode];
165 /* Initialize for caller-save.
167 Look at all the hard registers that are used by a call and for which
168 regclass.c has not already excluded from being used across a call.
170 Ensure that we can find a mode to save the register and that there is a
171 simple insn to save and restore the register. This latter check avoids
172 problems that would occur if we tried to save the MQ register of some
173 machines directly into memory. */
175 void
176 init_caller_save (void)
178 rtx addr_reg;
179 int offset;
180 rtx address;
181 int i, j;
183 /* First find all the registers that we need to deal with and all
184 the modes that they can have. If we can't find a mode to use,
185 we can't have the register live over calls. */
187 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
189 if (call_used_regs[i] && ! call_fixed_regs[i])
191 for (j = 1; j <= MOVE_MAX_WORDS; j++)
193 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
194 VOIDmode);
195 if (regno_save_mode[i][j] == VOIDmode && j == 1)
197 call_fixed_regs[i] = 1;
198 SET_HARD_REG_BIT (call_fixed_reg_set, i);
202 else
203 regno_save_mode[i][1] = VOIDmode;
206 /* The following code tries to approximate the conditions under which
207 we can easily save and restore a register without scratch registers or
208 other complexities. It will usually work, except under conditions where
209 the validity of an insn operand is dependent on the address offset.
210 No such cases are currently known.
212 We first find a typical offset from some BASE_REG_CLASS register.
213 This address is chosen by finding the first register in the class
214 and by finding the smallest power of two that is a valid offset from
215 that register in every mode we will use to save registers. */
217 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
218 if (TEST_HARD_REG_BIT
219 (reg_class_contents
220 [(int) base_reg_class (regno_save_mode [i][1], PLUS, CONST_INT)], i))
221 break;
223 gcc_assert (i < FIRST_PSEUDO_REGISTER);
225 addr_reg = gen_rtx_REG (Pmode, i);
227 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
229 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
231 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
232 if (regno_save_mode[i][1] != VOIDmode
233 && ! strict_memory_address_p (regno_save_mode[i][1], address))
234 break;
236 if (i == FIRST_PSEUDO_REGISTER)
237 break;
240 /* If we didn't find a valid address, we must use register indirect. */
241 if (offset == 0)
242 address = addr_reg;
244 /* Next we try to form an insn to save and restore the register. We
245 see if such an insn is recognized and meets its constraints.
247 To avoid lots of unnecessary RTL allocation, we construct all the RTL
248 once, then modify the memory and register operands in-place. */
250 test_reg = gen_rtx_REG (VOIDmode, 0);
251 test_mem = gen_rtx_MEM (VOIDmode, address);
252 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
253 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
255 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0);
256 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0);
258 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
259 for (j = 1; j <= MOVE_MAX_WORDS; j++)
260 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
262 regno_save_mode[i][j] = VOIDmode;
263 if (j == 1)
265 call_fixed_regs[i] = 1;
266 SET_HARD_REG_BIT (call_fixed_reg_set, i);
271 /* Initialize save areas by showing that we haven't allocated any yet. */
273 void
274 init_save_areas (void)
276 int i, j;
278 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
279 for (j = 1; j <= MOVE_MAX_WORDS; j++)
280 regno_save_mem[i][j] = 0;
283 /* Allocate save areas for any hard registers that might need saving.
284 We take a conservative approach here and look for call-clobbered hard
285 registers that are assigned to pseudos that cross calls. This may
286 overestimate slightly (especially if some of these registers are later
287 used as spill registers), but it should not be significant.
289 Future work:
291 In the fallback case we should iterate backwards across all possible
292 modes for the save, choosing the largest available one instead of
293 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
295 We do not try to use "move multiple" instructions that exist
296 on some machines (such as the 68k moveml). It could be a win to try
297 and use them when possible. The hard part is doing it in a way that is
298 machine independent since they might be saving non-consecutive
299 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
301 void
302 setup_save_areas (void)
304 int i, j, k;
305 unsigned int r;
306 HARD_REG_SET hard_regs_used;
308 /* Allocate space in the save area for the largest multi-register
309 pseudos first, then work backwards to single register
310 pseudos. */
312 /* Find and record all call-used hard-registers in this function. */
313 CLEAR_HARD_REG_SET (hard_regs_used);
314 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
315 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
317 unsigned int regno = reg_renumber[i];
318 unsigned int endregno
319 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);
321 for (r = regno; r < endregno; r++)
322 if (call_used_regs[r])
323 SET_HARD_REG_BIT (hard_regs_used, r);
326 /* Now run through all the call-used hard-registers and allocate
327 space for them in the caller-save area. Try to allocate space
328 in a manner which allows multi-register saves/restores to be done. */
330 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
331 for (j = MOVE_MAX_WORDS; j > 0; j--)
333 int do_save = 1;
335 /* If no mode exists for this size, try another. Also break out
336 if we have already saved this hard register. */
337 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
338 continue;
340 /* See if any register in this group has been saved. */
341 for (k = 0; k < j; k++)
342 if (regno_save_mem[i + k][1])
344 do_save = 0;
345 break;
347 if (! do_save)
348 continue;
350 for (k = 0; k < j; k++)
351 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
353 do_save = 0;
354 break;
356 if (! do_save)
357 continue;
359 /* We have found an acceptable mode to store in. */
360 regno_save_mem[i][j]
361 = assign_stack_local (regno_save_mode[i][j],
362 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
364 /* Setup single word save area just in case... */
365 for (k = 0; k < j; k++)
366 /* This should not depend on WORDS_BIG_ENDIAN.
367 The order of words in regs is the same as in memory. */
368 regno_save_mem[i + k][1]
369 = adjust_address_nv (regno_save_mem[i][j],
370 regno_save_mode[i + k][1],
371 k * UNITS_PER_WORD);
374 /* Now loop again and set the alias set of any save areas we made to
375 the alias set used to represent frame objects. */
376 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
377 for (j = MOVE_MAX_WORDS; j > 0; j--)
378 if (regno_save_mem[i][j] != 0)
379 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
382 /* Find the places where hard regs are live across calls and save them. */
384 void
385 save_call_clobbered_regs (void)
387 struct insn_chain *chain, *next;
388 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
390 /* Computed in mark_set_regs, holds all registers set by the current
391 instruction. */
392 HARD_REG_SET this_insn_sets;
394 CLEAR_HARD_REG_SET (hard_regs_saved);
395 n_regs_saved = 0;
397 for (chain = reload_insn_chain; chain != 0; chain = next)
399 rtx insn = chain->insn;
400 enum rtx_code code = GET_CODE (insn);
402 next = chain->next;
404 gcc_assert (!chain->is_caller_save_insn);
406 if (INSN_P (insn))
408 /* If some registers have been saved, see if INSN references
409 any of them. We must restore them before the insn if so. */
411 if (n_regs_saved)
413 int regno;
415 if (code == JUMP_INSN)
416 /* Restore all registers if this is a JUMP_INSN. */
417 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
418 else
420 CLEAR_HARD_REG_SET (referenced_regs);
421 mark_referenced_regs (PATTERN (insn));
422 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
425 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
426 if (TEST_HARD_REG_BIT (referenced_regs, regno))
427 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
430 if (code == CALL_INSN
431 && ! SIBLING_CALL_P (insn)
432 && ! find_reg_note (insn, REG_NORETURN, NULL))
434 unsigned regno;
435 HARD_REG_SET hard_regs_to_save;
436 reg_set_iterator rsi;
438 /* Use the register life information in CHAIN to compute which
439 regs are live during the call. */
440 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
441 &chain->live_throughout);
442 /* Save hard registers always in the widest mode available. */
443 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
444 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
445 save_mode [regno] = regno_save_mode [regno][1];
446 else
447 save_mode [regno] = VOIDmode;
449 /* Look through all live pseudos, mark their hard registers
450 and choose proper mode for saving. */
451 EXECUTE_IF_SET_IN_REG_SET
452 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
454 int r = reg_renumber[regno];
455 int nregs;
456 enum machine_mode mode;
458 gcc_assert (r >= 0);
459 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
460 mode = HARD_REGNO_CALLER_SAVE_MODE
461 (r, nregs, PSEUDO_REGNO_MODE (regno));
462 if (GET_MODE_BITSIZE (mode)
463 > GET_MODE_BITSIZE (save_mode[r]))
464 save_mode[r] = mode;
465 while (nregs-- > 0)
466 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
469 /* Record all registers set in this call insn. These don't need
470 to be saved. N.B. the call insn might set a subreg of a
471 multi-hard-reg pseudo; then the pseudo is considered live
472 during the call, but the subreg that is set isn't. */
473 CLEAR_HARD_REG_SET (this_insn_sets);
474 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
476 /* Compute which hard regs must be saved before this call. */
477 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
478 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
479 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
480 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
482 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
483 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
484 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
486 /* Must recompute n_regs_saved. */
487 n_regs_saved = 0;
488 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
489 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
490 n_regs_saved++;
494 if (chain->next == 0 || chain->next->block > chain->block)
496 int regno;
497 /* At the end of the basic block, we must restore any registers that
498 remain saved. If the last insn in the block is a JUMP_INSN, put
499 the restore before the insn, otherwise, put it after the insn. */
501 if (n_regs_saved)
502 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
503 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
504 regno += insert_restore (chain, JUMP_P (insn),
505 regno, MOVE_MAX_WORDS, save_mode);
510 /* Here from note_stores, or directly from save_call_clobbered_regs, when
511 an insn stores a value in a register.
512 Set the proper bit or bits in this_insn_sets. All pseudos that have
513 been assigned hard regs have had their register number changed already,
514 so we can ignore pseudos. */
515 static void
516 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
518 int regno, endregno, i;
519 HARD_REG_SET *this_insn_sets = data;
521 if (GET_CODE (reg) == SUBREG)
523 rtx inner = SUBREG_REG (reg);
524 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
525 return;
526 regno = subreg_regno (reg);
527 endregno = regno + subreg_nregs (reg);
529 else if (REG_P (reg)
530 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
532 regno = REGNO (reg);
533 endregno = END_HARD_REGNO (reg);
535 else
536 return;
538 for (i = regno; i < endregno; i++)
539 SET_HARD_REG_BIT (*this_insn_sets, i);
542 /* Here from note_stores when an insn stores a value in a register.
543 Set the proper bit or bits in the passed regset. All pseudos that have
544 been assigned hard regs have had their register number changed already,
545 so we can ignore pseudos. */
546 static void
547 add_stored_regs (rtx reg, const_rtx setter, void *data)
549 int regno, endregno, i;
550 enum machine_mode mode = GET_MODE (reg);
551 int offset = 0;
553 if (GET_CODE (setter) == CLOBBER)
554 return;
556 if (GET_CODE (reg) == SUBREG
557 && REG_P (SUBREG_REG (reg))
558 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
560 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
561 GET_MODE (SUBREG_REG (reg)),
562 SUBREG_BYTE (reg),
563 GET_MODE (reg));
564 regno = REGNO (SUBREG_REG (reg)) + offset;
565 endregno = regno + subreg_nregs (reg);
567 else
569 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
570 return;
572 regno = REGNO (reg) + offset;
573 endregno = end_hard_regno (mode, regno);
576 for (i = regno; i < endregno; i++)
577 SET_REGNO_REG_SET ((regset) data, i);
580 /* Walk X and record all referenced registers in REFERENCED_REGS. */
581 static void
582 mark_referenced_regs (rtx x)
584 enum rtx_code code = GET_CODE (x);
585 const char *fmt;
586 int i, j;
588 if (code == SET)
589 mark_referenced_regs (SET_SRC (x));
590 if (code == SET || code == CLOBBER)
592 x = SET_DEST (x);
593 code = GET_CODE (x);
594 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
595 || code == PC || code == CC0
596 || (code == SUBREG && REG_P (SUBREG_REG (x))
597 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
598 /* If we're setting only part of a multi-word register,
599 we shall mark it as referenced, because the words
600 that are not being set should be restored. */
601 && ((GET_MODE_SIZE (GET_MODE (x))
602 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
603 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
604 <= UNITS_PER_WORD))))
605 return;
607 if (code == MEM || code == SUBREG)
609 x = XEXP (x, 0);
610 code = GET_CODE (x);
613 if (code == REG)
615 int regno = REGNO (x);
616 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
617 : reg_renumber[regno]);
619 if (hardregno >= 0)
620 add_to_hard_reg_set (&referenced_regs, GET_MODE (x), hardregno);
621 /* If this is a pseudo that did not get a hard register, scan its
622 memory location, since it might involve the use of another
623 register, which might be saved. */
624 else if (reg_equiv_mem[regno] != 0)
625 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
626 else if (reg_equiv_address[regno] != 0)
627 mark_referenced_regs (reg_equiv_address[regno]);
628 return;
631 fmt = GET_RTX_FORMAT (code);
632 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
634 if (fmt[i] == 'e')
635 mark_referenced_regs (XEXP (x, i));
636 else if (fmt[i] == 'E')
637 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
638 mark_referenced_regs (XVECEXP (x, i, j));
642 /* Insert a sequence of insns to restore. Place these insns in front of
643 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
644 the maximum number of registers which should be restored during this call.
645 It should never be less than 1 since we only work with entire registers.
647 Note that we have verified in init_caller_save that we can do this
648 with a simple SET, so use it. Set INSN_CODE to what we save there
649 since the address might not be valid so the insn might not be recognized.
650 These insns will be reloaded and have register elimination done by
651 find_reload, so we need not worry about that here.
653 Return the extra number of registers saved. */
655 static int
656 insert_restore (struct insn_chain *chain, int before_p, int regno,
657 int maxrestore, enum machine_mode *save_mode)
659 int i, k;
660 rtx pat = NULL_RTX;
661 int code;
662 unsigned int numregs = 0;
663 struct insn_chain *new;
664 rtx mem;
666 /* A common failure mode if register status is not correct in the
667 RTL is for this routine to be called with a REGNO we didn't
668 expect to save. That will cause us to write an insn with a (nil)
669 SET_DEST or SET_SRC. Instead of doing so and causing a crash
670 later, check for this common case here instead. This will remove
671 one step in debugging such problems. */
672 gcc_assert (regno_save_mem[regno][1]);
674 /* Get the pattern to emit and update our status.
676 See if we can restore `maxrestore' registers at once. Work
677 backwards to the single register case. */
678 for (i = maxrestore; i > 0; i--)
680 int j;
681 int ok = 1;
683 if (regno_save_mem[regno][i] == 0)
684 continue;
686 for (j = 0; j < i; j++)
687 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
689 ok = 0;
690 break;
692 /* Must do this one restore at a time. */
693 if (! ok)
694 continue;
696 numregs = i;
697 break;
700 mem = regno_save_mem [regno][numregs];
701 if (save_mode [regno] != VOIDmode
702 && save_mode [regno] != GET_MODE (mem)
703 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
704 mem = adjust_address (mem, save_mode[regno], 0);
705 else
706 mem = copy_rtx (mem);
707 pat = gen_rtx_SET (VOIDmode,
708 gen_rtx_REG (GET_MODE (mem),
709 regno), mem);
710 code = reg_restore_code (regno, GET_MODE (mem));
711 new = insert_one_insn (chain, before_p, code, pat);
713 /* Clear status for all registers we restored. */
714 for (k = 0; k < i; k++)
716 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
717 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
718 n_regs_saved--;
721 /* Tell our callers how many extra registers we saved/restored. */
722 return numregs - 1;
725 /* Like insert_restore above, but save registers instead. */
727 static int
728 insert_save (struct insn_chain *chain, int before_p, int regno,
729 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
731 int i;
732 unsigned int k;
733 rtx pat = NULL_RTX;
734 int code;
735 unsigned int numregs = 0;
736 struct insn_chain *new;
737 rtx mem;
739 /* A common failure mode if register status is not correct in the
740 RTL is for this routine to be called with a REGNO we didn't
741 expect to save. That will cause us to write an insn with a (nil)
742 SET_DEST or SET_SRC. Instead of doing so and causing a crash
743 later, check for this common case here. This will remove one
744 step in debugging such problems. */
745 gcc_assert (regno_save_mem[regno][1]);
747 /* Get the pattern to emit and update our status.
749 See if we can save several registers with a single instruction.
750 Work backwards to the single register case. */
751 for (i = MOVE_MAX_WORDS; i > 0; i--)
753 int j;
754 int ok = 1;
755 if (regno_save_mem[regno][i] == 0)
756 continue;
758 for (j = 0; j < i; j++)
759 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
761 ok = 0;
762 break;
764 /* Must do this one save at a time. */
765 if (! ok)
766 continue;
768 numregs = i;
769 break;
772 mem = regno_save_mem [regno][numregs];
773 if (save_mode [regno] != VOIDmode
774 && save_mode [regno] != GET_MODE (mem)
775 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
776 mem = adjust_address (mem, save_mode[regno], 0);
777 else
778 mem = copy_rtx (mem);
779 pat = gen_rtx_SET (VOIDmode, mem,
780 gen_rtx_REG (GET_MODE (mem),
781 regno));
782 code = reg_save_code (regno, GET_MODE (mem));
783 new = insert_one_insn (chain, before_p, code, pat);
785 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
786 for (k = 0; k < numregs; k++)
788 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
789 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
790 n_regs_saved++;
793 /* Tell our callers how many extra registers we saved/restored. */
794 return numregs - 1;
797 /* Emit a new caller-save insn and set the code. */
798 static struct insn_chain *
799 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
801 rtx insn = chain->insn;
802 struct insn_chain *new;
804 #ifdef HAVE_cc0
805 /* If INSN references CC0, put our insns in front of the insn that sets
806 CC0. This is always safe, since the only way we could be passed an
807 insn that references CC0 is for a restore, and doing a restore earlier
808 isn't a problem. We do, however, assume here that CALL_INSNs don't
809 reference CC0. Guard against non-INSN's like CODE_LABEL. */
811 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
812 && before_p
813 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
814 chain = chain->prev, insn = chain->insn;
815 #endif
817 new = new_insn_chain ();
818 if (before_p)
820 rtx link;
822 new->prev = chain->prev;
823 if (new->prev != 0)
824 new->prev->next = new;
825 else
826 reload_insn_chain = new;
828 chain->prev = new;
829 new->next = chain;
830 new->insn = emit_insn_before (pat, insn);
831 /* ??? It would be nice if we could exclude the already / still saved
832 registers from the live sets. */
833 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
834 /* Registers that die in CHAIN->INSN still live in the new insn. */
835 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
837 if (REG_NOTE_KIND (link) == REG_DEAD)
839 rtx reg = XEXP (link, 0);
840 int regno, i;
842 gcc_assert (REG_P (reg));
843 regno = REGNO (reg);
844 if (regno >= FIRST_PSEUDO_REGISTER)
845 regno = reg_renumber[regno];
846 if (regno < 0)
847 continue;
848 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
849 i >= 0; i--)
850 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
854 /* If CHAIN->INSN is a call, then the registers which contain
855 the arguments to the function are live in the new insn. */
856 if (CALL_P (chain->insn))
858 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
859 link != NULL_RTX;
860 link = XEXP (link, 1))
862 rtx arg = XEXP (link, 0);
864 if (GET_CODE (arg) == USE)
866 rtx reg = XEXP (arg, 0);
868 if (REG_P (reg))
870 int i, regno = REGNO (reg);
872 /* Registers in CALL_INSN_FUNCTION_USAGE are always
873 hard registers. */
874 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
876 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
877 i >= 0; i--)
878 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
885 CLEAR_REG_SET (&new->dead_or_set);
886 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
887 BB_HEAD (BASIC_BLOCK (chain->block)) = new->insn;
889 else
891 new->next = chain->next;
892 if (new->next != 0)
893 new->next->prev = new;
894 chain->next = new;
895 new->prev = chain;
896 new->insn = emit_insn_after (pat, insn);
897 /* ??? It would be nice if we could exclude the already / still saved
898 registers from the live sets, and observe REG_UNUSED notes. */
899 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
900 /* Registers that are set in CHAIN->INSN live in the new insn.
901 (Unless there is a REG_UNUSED note for them, but we don't
902 look for them here.) */
903 note_stores (PATTERN (chain->insn), add_stored_regs,
904 &new->live_throughout);
905 CLEAR_REG_SET (&new->dead_or_set);
906 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
907 BB_END (BASIC_BLOCK (chain->block)) = new->insn;
909 new->block = chain->block;
910 new->is_caller_save_insn = 1;
912 INSN_CODE (new->insn) = code;
913 return new;
915 #include "gt-caller-save.h"