PR tree-optimize/23817
[official-gcc.git] / gcc / config / mips / mips-modes.def
blob39c2f164978526e1ba9da0f5864e6f990bd8cba9
1 /* MIPS extra machine modes.
2 Copyright (C) 2003, 2004 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street, Fifth Floor,
19 Boston, MA 02110-1301, USA. */
21 /* MIPS has a quirky almost-IEEE format for all its
22 floating point. */
23 RESET_FLOAT_FORMAT (SF, mips_single_format);
24 RESET_FLOAT_FORMAT (DF, mips_double_format);
26 /* Irix6 will override this via MIPS_TFMODE_FORMAT. */
27 FLOAT_MODE (TF, 16, mips_quad_format);
29 /* Vector modes. */
30 VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */
31 VECTOR_MODES (INT, 4); /* V4QI V2HI */
33 /* Paired single comparison instructions use 2 or 4 CC. */
34 CC_MODE (CCV2);
35 ADJUST_BYTESIZE (CCV2, 8);
36 ADJUST_ALIGNMENT (CCV2, 8);
38 CC_MODE (CCV4);
39 ADJUST_BYTESIZE (CCV4, 16);
40 ADJUST_ALIGNMENT (CCV4, 16);
42 /* For MIPS DSP control registers. */
43 CC_MODE (CCDSP);