libgfortran/config/fpu-387.h

   1 /* FPU-related code for x86 and x86_64 processors.
   2    Copyright (C) 2005-2013 Free Software Foundation, Inc.
   3    Contributed by Francois-Xavier Coudert <coudert@clipper.ens.fr>
   4
   5 This file is part of the GNU Fortran 95 runtime library (libgfortran).
   6
   7 Libgfortran is free software; you can redistribute it and/or
   8 modify it under the terms of the GNU General Public
   9 License as published by the Free Software Foundation; either
  10 version 3 of the License, or (at your option) any later version.
  11
  12 Libgfortran is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 Under Section 7 of GPL version 3, you are granted additional
  18 permissions described in the GCC Runtime Library Exception, version
  19 3.1, as published by the Free Software Foundation.
  20
  21 You should have received a copy of the GNU General Public License and
  22 a copy of the GCC Runtime Library Exception along with this program;
  23 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  24 <http://www.gnu.org/licenses/>.  */
  25
  26 #ifndef __x86_64__
  27 #include "cpuid.h"
  28 #endif
  29
  30 #if defined(__sun__) && defined(__svr4__)
  31 #include <signal.h>
  32 #include <ucontext.h>
  33
  34 static volatile sig_atomic_t sigill_caught;
  35
  36 static void
  37 sigill_hdlr (int sig __attribute((unused)),
  38              siginfo_t *sip __attribute__((unused)),
  39              ucontext_t *ucp)
  40 {
  41   sigill_caught = 1;
  42   /* Set PC to the instruction after the faulting one to skip over it,
  43      otherwise we enter an infinite loop.  3 is the size of the movaps
  44      instruction.  */
  45   ucp->uc_mcontext.gregs[EIP] += 3;
  46   setcontext (ucp);
  47 }
  48 #endif
  49
  50 static int
  51 has_sse (void)
  52 {
  53 #ifndef __x86_64__
  54   unsigned int eax, ebx, ecx, edx;
  55
  56   if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
  57     return 0;
  58
  59 #if defined(__sun__) && defined(__svr4__)
  60   /* Solaris 2 before Solaris 9 4/04 cannot execute SSE instructions even
  61      if the CPU supports them.  Programs receive SIGILL instead, so check
  62      for that at runtime.  */
  63
  64   if (edx & bit_SSE)
  65     {
  66       struct sigaction act, oact;
  67
  68       act.sa_handler = sigill_hdlr;
  69       sigemptyset (&act.sa_mask);
  70       /* Need to set SA_SIGINFO so a ucontext_t * is passed to the handler.  */
  71       act.sa_flags = SA_SIGINFO;
  72       sigaction (SIGILL, &act, &oact);
  73
  74       /* We need a single SSE instruction here so the handler can safely skip
  75          over it.  */
  76       __asm__ __volatile__ ("movaps\t%xmm0,%xmm0");
  77
  78       sigaction (SIGILL, &oact, NULL);
  79
  80       if (sigill_caught)
  81         return 0;
  82     }
  83 #endif /* __sun__ && __svr4__ */
  84
  85   return edx & bit_SSE;
  86 #else
  87   return 1;
  88 #endif
  89 }
  90
  91 /* i387 -- see linux <fpu_control.h> header file for details.  */
  92 #define _FPU_MASK_IM  0x01
  93 #define _FPU_MASK_DM  0x02
  94 #define _FPU_MASK_ZM  0x04
  95 #define _FPU_MASK_OM  0x08
  96 #define _FPU_MASK_UM  0x10
  97 #define _FPU_MASK_PM  0x20
  98 #define _FPU_MASK_ALL 0x3f
  99
 100 #define _FPU_EX_ALL   0x3f
 101
 102 void set_fpu (void)
 103 {
 104   int excepts = 0;
 105   unsigned short cw;
 106
 107   __asm__ __volatile__ ("fstcw\t%0" : "=m" (cw));
 108
 109   if (options.fpe & GFC_FPE_INVALID) excepts |= _FPU_MASK_IM;
 110   if (options.fpe & GFC_FPE_DENORMAL) excepts |= _FPU_MASK_DM;
 111   if (options.fpe & GFC_FPE_ZERO) excepts |= _FPU_MASK_ZM;
 112   if (options.fpe & GFC_FPE_OVERFLOW) excepts |= _FPU_MASK_OM;
 113   if (options.fpe & GFC_FPE_UNDERFLOW) excepts |= _FPU_MASK_UM;
 114   if (options.fpe & GFC_FPE_INEXACT) excepts |= _FPU_MASK_PM;
 115
 116   cw |= _FPU_MASK_ALL;
 117   cw &= ~excepts;
 118
 119   __asm__ __volatile__ ("fnclex\n\tfldcw\t%0" : : "m" (cw));
 120
 121   if (has_sse())
 122     {
 123       unsigned int cw_sse;
 124
 125       __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse));
 126
 127       /* The SSE exception masks are shifted by 7 bits.  */
 128       cw_sse |= _FPU_MASK_ALL << 7;
 129       cw_sse &= ~(excepts << 7);
 130
 131       /* Clear stalled exception flags.  */
 132       cw_sse &= ~_FPU_EX_ALL;
 133
 134       __asm__ __volatile__ ("%vldmxcsr\t%0" : : "m" (cw_sse));
 135     }
 136 }
 137
 138 int
 139 get_fpu_except_flags (void)
 140 {
 141   unsigned short cw;
 142   int excepts;
 143   int result = 0;
 144
 145   __asm__ __volatile__ ("fnstsw\t%0" : "=a" (cw));
 146   excepts = cw;
 147
 148   if (has_sse())
 149     {
 150       unsigned int cw_sse;
 151
 152       __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse));
 153       excepts |= cw_sse;
 154     }
 155
 156   excepts &= _FPU_EX_ALL;
 157
 158   if (excepts & _FPU_MASK_IM) result |= GFC_FPE_INVALID;
 159   if (excepts & _FPU_MASK_DM) result |= GFC_FPE_DENORMAL;
 160   if (excepts & _FPU_MASK_ZM) result |= GFC_FPE_ZERO;
 161   if (excepts & _FPU_MASK_OM) result |= GFC_FPE_OVERFLOW;
 162   if (excepts & _FPU_MASK_UM) result |= GFC_FPE_UNDERFLOW;
 163   if (excepts & _FPU_MASK_PM) result |= GFC_FPE_INEXACT;
 164
 165   return result;
 166 }