gcc/rtl.def

   1 /* This file contains the definitions and documentation for the
   2    Register Transfer Expressions (rtx's) that make up the
   3    Register Transfer Language (rtl) used in the Back End of the GNU compiler.
   4    Copyright (C) 1987, 1988, 1992, 1994 Free Software Foundation, Inc.
   5
   6 This file is part of GNU CC.
   7
   8 GNU CC is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 2, or (at your option)
  11 any later version.
  12
  13 GNU CC is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GNU CC; see the file COPYING.  If not, write to
  20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
  21
  22
  23 /* Expression definitions and descriptions for all targets are in this file.
  24    Some will not be used for some targets.
  25
  26    The fields in the cpp macro call "DEF_RTL_EXPR()"
  27    are used to create declarations in the C source of the compiler.
  28
  29    The fields are:
  30
  31    1.  The internal name of the rtx used in the C source.
  32    It is a tag in the enumeration "enum rtx_code" defined in "rtl.h".
  33    By convention these are in UPPER_CASE.
  34
  35    2.  The name of the rtx in the external ASCII format read by
  36    read_rtx(), and printed by print_rtx().
  37    These names are stored in rtx_name[].
  38    By convention these are the internal (field 1) names in lower_case.
  39
  40    3.  The print format, and type of each rtx->fld[] (field) in this rtx.
  41    These formats are stored in rtx_format[].
  42    The meaning of the formats is documented in front of this array in rtl.c
  43
  44    4.  The class of the rtx.  These are stored in rtx_class and are accessed
  45    via the GET_RTX_CLASS macro.  They are defined as follows:
  46
  47      "o" an rtx code that can be used to represent an object (e.g, REG, MEM)
  48      "<" an rtx code for a comparison (e.g, EQ, NE, LT)
  49      "1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
  50      "c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
  51      "3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
  52      "2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
  53      "b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
  54      "i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
  55      "m" an rtx code for something that matches in insns (e.g, MATCH_DUP)
  56      "x" everything else
  57
  58    */
  59
  60 /* ---------------------------------------------------------------------
  61    Expressions (and "meta" expressions) used for structuring the
  62    rtl representation of a program.
  63    --------------------------------------------------------------------- */
  64
  65 /* an expression code name unknown to the reader */
  66 DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x')
  67
  68 /* (NIL) is used by rtl reader and printer to represent a null pointer.  */
  69
  70 DEF_RTL_EXPR(NIL, "nil", "*", 'x')
  71
  72 /* ---------------------------------------------------------------------
  73    Expressions used in constructing lists.
  74    --------------------------------------------------------------------- */
  75
  76 /* a linked list of expressions */
  77 DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x')
  78
  79 /* a linked list of instructions.
  80    The insns are represented in print by their uids.  */
  81 DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x')
  82
  83 /* ----------------------------------------------------------------------
  84    Expression types for machine descriptions.
  85    These do not appear in actual rtl code in the compiler.
  86    ---------------------------------------------------------------------- */
  87
  88 /* Appears only in machine descriptions.
  89    Means use the function named by the second arg (the string)
  90    as a predicate; if matched, store the structure that was matched
  91    in the operand table at index specified by the first arg (the integer).
  92    If the second arg is the null string, the structure is just stored.
  93
  94    A third string argument indicates to the register allocator restrictions
  95    on where the operand can be allocated.
  96
  97    If the target needs no restriction on any instruction this field should
  98    be the null string.
  99
 100    The string is prepended by:
 101    '=' to indicate the operand is only written to.
 102    '+' to indicate the operand is both read and written to.
 103
 104    Each character in the string represents an allocatable class for an operand.
 105    'g' indicates the operand can be any valid class.
 106    'i' indicates the operand can be immediate (in the instruction) data.
 107    'r' indicates the operand can be in a register.
 108    'm' indicates the operand can be in memory.
 109    'o' a subset of the 'm' class.  Those memory addressing modes that
 110        can be offset at compile time (have a constant added to them).
 111
 112    Other characters indicate target dependent operand classes and
 113    are described in each target's machine description.
 114
 115    For instructions with more than one operand, sets of classes can be
 116    separated by a comma to indicate the appropriate multi-operand constraints.
 117    There must be a 1 to 1 correspondence between these sets of classes in
 118    all operands for an instruction.
 119    */
 120 DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm')
 121
 122 /* Appears only in machine descriptions.
 123    Means match a SCRATCH or a register.  When used to generate rtl, a
 124    SCRATCH is generated.  As for MATCH_OPERAND, the mode specifies
 125    the desired mode and the first argument is the operand number.
 126    The second argument is the constraint.  */
 127 DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm')
 128
 129 /* Appears only in machine descriptions.
 130    Means match only something equal to what is stored in the operand table
 131    at the index specified by the argument.  */
 132 DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm')
 133
 134 /* Appears only in machine descriptions.
 135    Means apply a predicate, AND match recursively the operands of the rtx.
 136    Operand 0 is the operand-number, as in match_operand.
 137    Operand 1 is a predicate to apply (as a string, a function name).
 138    Operand 2 is a vector of expressions, each of which must match
 139    one subexpression of the rtx this construct is matching.  */
 140 DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm')
 141
 142 /* Appears only in machine descriptions.
 143    Means to match a PARALLEL of arbitrary length.  The predicate is applied
 144    to the PARALLEL and the initial expressions in the PARALLEL are matched.
 145    Operand 0 is the operand-number, as in match_operand.
 146    Operand 1 is a predicate to apply to the PARALLEL.
 147    Operand 2 is a vector of expressions, each of which must match the
 148    corresponding element in the PARALLEL.  */
 149 DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm')
 150
 151 /* Appears only in machine descriptions.
 152    Means match only something equal to what is stored in the operand table
 153    at the index specified by the argument.  For MATCH_OPERATOR.  */
 154 DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm')
 155
 156 /* Appears only in machine descriptions.
 157    Means match only something equal to what is stored in the operand table
 158    at the index specified by the argument.  For MATCH_PARALLEL.  */
 159 DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm')
 160
 161 /* Appears only in machine descriptions.
 162    Defines the pattern for one kind of instruction.
 163    Operand:
 164    0: names this instruction.
 165       If the name is the null string, the instruction is in the
 166       machine description just to be recognized, and will never be emitted by
 167       the tree to rtl expander.
 168    1: is the pattern.
 169    2: is a string which is a C expression
 170       giving an additional condition for recognizing this pattern.
 171       A null string means no extra condition.
 172    3: is the action to execute if this pattern is matched.
 173       If this assembler code template starts with a * then it is a fragment of
 174       C code to run to decide on a template to use.  Otherwise, it is the
 175       template to use.
 176    4: optionally, a vector of attributes for this insn.
 177      */
 178 DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEssV", 'x')
 179
 180 /* Definition of a peephole optimization.
 181    1st operand: vector of insn patterns to match
 182    2nd operand: C expression that must be true
 183    3rd operand: template or C code to produce assembler output.
 184    4: optionally, a vector of attributes for this insn.
 185      */
 186 DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EssV", 'x')
 187
 188 /* Definition of a split operation.
 189    1st operand: insn pattern to match
 190    2nd operand: C expression that must be true
 191    3rd operand: vector of insn patterns to place into a SEQUENCE
 192    4th operand: optionally, some C code to execute before generating the
 193         insns.  This might, for example, create some RTX's and store them in
 194         elements of `recog_operand' for use by the vector of insn-patterns.
 195         (`operands' is an alias here for `recog_operand').   */
 196 DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x')
 197
 198 /* Definition of a combiner pattern.
 199    Operands not defined yet.  */
 200 DEF_RTL_EXPR(DEFINE_COMBINE, "define_combine", "Ess", 'x')
 201
 202 /* Define how to generate multiple insns for a standard insn name.
 203    1st operand: the insn name.
 204    2nd operand: vector of insn-patterns.
 205         Use match_operand to substitute an element of `recog_operand'.
 206    3rd operand: C expression that must be true for this to be available.
 207         This may not test any operands.
 208    4th operand: Extra C code to execute before generating the insns.
 209         This might, for example, create some RTX's and store them in
 210         elements of `recog_operand' for use by the vector of insn-patterns.
 211         (`operands' is an alias here for `recog_operand').  */
 212 DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x')
 213
 214 /* Define a requirement for delay slots.
 215    1st operand: Condition involving insn attributes that, if true,
 216                 indicates that the insn requires the number of delay slots
 217                 shown.
 218    2nd operand: Vector whose length is the three times the number of delay
 219                 slots required.
 220                 Each entry gives three conditions, each involving attributes.
 221                 The first must be true for an insn to occupy that delay slot
 222                 location.  The second is true for all insns that can be
 223                 annulled if the branch is true and the third is true for all
 224                 insns that can be annulled if the branch is false.
 225
 226    Multiple DEFINE_DELAYs may be present.  They indicate differing
 227    requirements for delay slots.  */
 228 DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x')
 229
 230 /* Define a set of insns that requires a function unit.  This means that
 231    these insns produce their result after a delay and that there may be
 232    restrictions on the number of insns of this type that can be scheduled
 233    simultaneously.
 234
 235    More than one DEFINE_FUNCTION_UNIT can be specified for a function unit.
 236    Each gives a set of operations and associated delays.  The first three
 237    operands must be the same for each operation for the same function unit.
 238
 239    All delays are specified in cycles.
 240
 241    1st operand: Name of function unit (mostly for documentation)
 242    2nd operand: Number of identical function units in CPU
 243    3rd operand: Total number of simultaneous insns that can execute on this
 244                 function unit; 0 if unlimited.
 245    4th operand: Condition involving insn attribute, that, if true, specifies
 246                 those insns that this expression applies to.
 247    5th operand: Constant delay after which insn result will be
 248                 available.
 249    6th operand: Delay until next insn can be scheduled on the function unit
 250                 executing this operation.  The meaning depends on whether or
 251                 not the next operand is supplied.
 252    7th operand: If this operand is not specified, the 6th operand gives the
 253                 number of cycles after the instruction matching the 4th
 254                 operand begins using the function unit until a subsequent
 255                 insn can begin.  A value of zero should be used for a
 256                 unit with no issue constraints.  If only one operation can
 257                 be executed a time and the unit is busy for the entire time,
 258                 the 3rd operand should be specified as 1, the 6th operand
 259                 sould be specified as 0, and the 7th operand should not
 260                 be specified.
 261
 262                 If this operand is specified, it is a list of attribute
 263                 expressions.  If an insn for which any of these expressions
 264                 is true is currently executing on the function unit, the
 265                 issue delay will be given by the 6th operand.  Otherwise,
 266                 the insn can be immediately scheduled (subject to the limit
 267                 on the number of simultaneous operations executing on the
 268                 unit.)  */
 269 DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x')
 270
 271 /* Define attribute computation for `asm' instructions.  */
 272 DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' )
 273
 274 /* SEQUENCE appears in the result of a `gen_...' function
 275    for a DEFINE_EXPAND that wants to make several insns.
 276    Its elements are the bodies of the insns that should be made.
 277    `emit_insn' takes the SEQUENCE apart and makes separate insns.  */
 278 DEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x')
 279
 280 /* Refers to the address of its argument.
 281    This appears only in machine descriptions, indicating that
 282    any expression that would be acceptable as the operand of MEM
 283    should be matched.  */
 284 DEF_RTL_EXPR(ADDRESS, "address", "e", 'm')
 285
 286 /* ----------------------------------------------------------------------
 287    Expressions used for insn attributes.  These also do not appear in
 288    actual rtl code in the compiler.
 289    ---------------------------------------------------------------------- */
 290
 291 /* Definition of an insn attribute.
 292    1st operand: name of the attribute
 293    2nd operand: comma-separated list of possible attribute values
 294    3rd operand: expression for the default value of the attribute. */
 295 DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x')
 296
 297 /* Marker for the name of an attribute. */
 298 DEF_RTL_EXPR(ATTR, "attr", "s", 'x')
 299
 300 /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and
 301    in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that
 302    pattern.
 303
 304    (set_attr "name" "value") is equivalent to
 305    (set (attr "name") (const_string "value"))  */
 306 DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x')
 307
 308 /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to
 309    specify that attribute values are to be assigned according to the
 310    alternative matched.
 311
 312    The following three expressions are equivalent:
 313
 314    (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1")
 315                             (eq_attrq "alternative" "2") (const_string "a2")]
 316                            (const_string "a3")))
 317    (set_attr_alternative "att" [(const_string "a1") (const_string "a2")
 318                                  (const_string "a3")])
 319    (set_attr "att" "a1,a2,a3")
 320  */
 321 DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x')
 322
 323 /* A conditional expression true if the value of the specified attribute of
 324    the current insn equals the specified value.  The first operand is the
 325    attribute name and the second is the comparison value.  */
 326 DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x')
 327
 328 /* A conditional expression which is true if the specified flag is
 329    true for the insn being scheduled in reorg.
 330
 331    genattr.c defines the following flags which can be tested by
 332    (attr_flag "foo") expressions in eligible_for_delay.
 333
 334    forward, backward, very_likely, likely, very_unlikely, and unlikely.  */
 335
 336 DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x')
 337
 338 /* ----------------------------------------------------------------------
 339    Expression types used for things in the instruction chain.
 340
 341    All formats must start with "iuu" to handle the chain.
 342    Each insn expression holds an rtl instruction and its semantics
 343    during back-end processing.
 344    See macros's in "rtl.h" for the meaning of each rtx->fld[].
 345
 346    ---------------------------------------------------------------------- */
 347
 348 /* An instruction that cannot jump.  */
 349 DEF_RTL_EXPR(INSN, "insn", "iuueiee", 'i')
 350
 351 /* An instruction that can possibly jump.
 352    Fields ( rtx->fld[] ) have exact same meaning as INSN's.  */
 353 DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuueiee0", 'i')
 354
 355 /* An instruction that can possibly call a subroutine
 356    but which will not change which instruction comes next
 357    in the current function.
 358    Field ( rtx->fld[7] ) is CALL_INSN_FUNCTION_USAGE.
 359    All other fields ( rtx->fld[] ) have exact same meaning as INSN's.  */
 360 DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuueieee", 'i')
 361
 362 /* A marker that indicates that control will not flow through.  */
 363 DEF_RTL_EXPR(BARRIER, "barrier", "iuu", 'x')
 364
 365 /* Holds a label that is followed by instructions.
 366    Operand:
 367    3: is a number that is unique in the entire compilation.
 368    4: is the user-given name of the label, if any.
 369    5: is used in jump.c for the use-count of the label.
 370    and in flow.c to point to the chain of label_ref's to this label.  */
 371 DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuis0", 'x')
 372
 373 /* Say where in the code a source line starts, for symbol table's sake.
 374    Contains a filename and a line number.  Line numbers <= 0 are special:
 375    0 is used in a dummy placed at the front of every function
 376       just so there will never be a need to delete the first insn;
 377    -1 indicates a dummy; insns to be deleted by flow analysis and combining
 378       are really changed to NOTEs with a number of -1.
 379    -2 means beginning of a name binding contour; output N_LBRAC.
 380    -3 means end of a contour; output N_RBRAC.  */
 381 DEF_RTL_EXPR(NOTE, "note", "iuusn", 'x')
 382
 383 /* INLINE_HEADER is use by inline function machinery.  The information
 384    it contains helps to build the mapping function between the rtx's of
 385    the function to be inlined and the current function being expanded.  */
 386
 387 DEF_RTL_EXPR(INLINE_HEADER, "inline_header", "iuuuiiiiiieiiEe", 'x')
 388
 389 /* ----------------------------------------------------------------------
 390    Top level constituents of INSN, JUMP_INSN and CALL_INSN.
 391    ---------------------------------------------------------------------- */
 392
 393 /* Several operations to be done in parallel.  */
 394 DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
 395
 396 /* A string that is passed through to the assembler as input.
 397      One can obviously pass comments through by using the
 398      assembler comment syntax.
 399      These occur in an insn all by themselves as the PATTERN.
 400      They also appear inside an ASM_OPERANDS
 401      as a convenient way to hold a string.  */
 402 DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x')
 403
 404 /* An assembler instruction with operands.
 405    1st operand is the instruction template.
 406    2nd operand is the constraint for the output.
 407    3rd operand is the number of the output this expression refers to.
 408      When an insn stores more than one value, a separate ASM_OPERANDS
 409      is made for each output; this integer distinguishes them.
 410    4th is a vector of values of input operands.
 411    5th is a vector of modes and constraints for the input operands.
 412      Each element is an ASM_INPUT containing a constraint string
 413      and whose mode indicates the mode of the input operand.
 414    6th is the name of the containing source file.
 415    7th is the source line number.  */
 416 DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x')
 417
 418 /* A machine-specific operation.
 419    1st operand is a vector of operands being used by the operation so that
 420      any needed reloads can be done.
 421    2nd operand is a unique value saying which of a number of machine-specific
 422      operations is to be performed.
 423    (Note that the vector must be the first operand because of the way that
 424    genrecog.c record positions within an insn.)
 425    This can occur all by itself in a PATTERN, as a component of a PARALLEL,
 426    or inside an expression.  */
 427 DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x')
 428
 429 /* Similar, but a volatile operation and one which may trap.  */
 430 DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x')
 431
 432 /* Vector of addresses, stored as full words.  */
 433 /* Each element is a LABEL_REF to a CODE_LABEL whose address we want.  */
 434 DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x')
 435
 436 /* Vector of address differences X0 - BASE, X1 - BASE, ...
 437    First operand is BASE; the vector contains the X's.
 438    The machine mode of this rtx says how much space to leave
 439    for each difference.  */
 440 DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eE", 'x')
 441
 442 /* ----------------------------------------------------------------------
 443    At the top level of an instruction (perhaps under PARALLEL).
 444    ---------------------------------------------------------------------- */
 445
 446 /* Assignment.
 447    Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to.
 448    Operand 2 is the value stored there.
 449    ALL assignment must use SET.
 450    Instructions that do multiple assignments must use multiple SET,
 451    under PARALLEL.  */
 452 DEF_RTL_EXPR(SET, "set", "ee", 'x')
 453
 454 /* Indicate something is used in a way that we don't want to explain.
 455    For example, subroutine calls will use the register
 456    in which the static chain is passed.  */
 457 DEF_RTL_EXPR(USE, "use", "e", 'x')
 458
 459 /* Indicate something is clobbered in a way that we don't want to explain.
 460    For example, subroutine calls will clobber some physical registers
 461    (the ones that are by convention not saved).  */
 462 DEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x')
 463
 464 /* Call a subroutine.
 465    Operand 1 is the address to call.
 466    Operand 2 is the number of arguments.  */
 467
 468 DEF_RTL_EXPR(CALL, "call", "ee", 'x')
 469
 470 /* Return from a subroutine.  */
 471
 472 DEF_RTL_EXPR(RETURN, "return", "", 'x')
 473
 474 /* Conditional trap.
 475    Operand 1 is the condition.
 476    Operand 2 is the trap code.
 477    For an unconditional trap, make the condition (const_int 1).  */
 478 DEF_RTL_EXPR(TRAP_IF, "trap_if", "ei", 'x')
 479
 480 /* ----------------------------------------------------------------------
 481    Primitive values for use in expressions.
 482    ---------------------------------------------------------------------- */
 483
 484 /* numeric integer constant */
 485 DEF_RTL_EXPR(CONST_INT, "const_int", "w", 'o')
 486
 487 /* numeric double constant.
 488    Operand 0 is the MEM that stores this constant in memory,
 489    or various other things (see comments at immed_double_const in varasm.c).
 490    Operand 1 is a chain of all CONST_DOUBLEs in use in the current function.
 491    Remaining operands hold the actual value.
 492    The number of operands may be more than 2 if cross-compiling;
 493    see init_rtl.  */
 494 DEF_RTL_EXPR(CONST_DOUBLE, "const_double", "e0ww", 'o')
 495
 496 /* String constant.  Used only for attributes right now.  */
 497 DEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o')
 498
 499 /* This is used to encapsulate an expression whose value is constant
 500    (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be
 501    recognized as a constant operand rather than by arithmetic instructions.  */
 502
 503 DEF_RTL_EXPR(CONST, "const", "e", 'o')
 504
 505 /* program counter.  Ordinary jumps are represented
 506    by a SET whose first operand is (PC).  */
 507 DEF_RTL_EXPR(PC, "pc", "", 'o')
 508
 509 /* A register.  The "operand" is the register number, accessed
 510    with the REGNO macro.  If this number is less than FIRST_PSEUDO_REGISTER
 511    than a hardware register is being referred to.  */
 512 DEF_RTL_EXPR(REG, "reg", "i", 'o')
 513
 514 /* A scratch register.  This represents a register used only within a
 515    single insn.  It will be turned into a REG during register allocation
 516    or reload unless the constraint indicates that the register won't be
 517    needed, in which case it can remain a SCRATCH.  This code is
 518    marked as having one operand so it can be turned into a REG.  */
 519 DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o')
 520
 521 /* One word of a multi-word value.
 522    The first operand is the complete value; the second says which word.
 523    The WORDS_BIG_ENDIAN flag controls whether word number 0
 524    (as numbered in a SUBREG) is the most or least significant word.
 525
 526    This is also used to refer to a value in a different machine mode.
 527    For example, it can be used to refer to a SImode value as if it were
 528    Qimode, or vice versa.  Then the word number is always 0.  */
 529 DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x')
 530
 531 /* This one-argument rtx is used for move instructions
 532    that are guaranteed to alter only the low part of a destination.
 533    Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...))
 534    has an unspecified effect on the high part of REG,
 535    but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...))
 536    is guaranteed to alter only the bits of REG that are in HImode.
 537
 538    The actual instruction used is probably the same in both cases,
 539    but the register constraints may be tighter when STRICT_LOW_PART
 540    is in use.  */
 541
 542 DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x')
 543
 544 /* (CONCAT a b) represents the virtual concatenation of a and b
 545    to make a value that has as many bits as a and b put together.
 546    This is used for complex values.  Normally it appears only
 547    in DECL_RTLs and during RTL generation, but not in the insn chain.  */
 548 DEF_RTL_EXPR(CONCAT, "concat", "ee", 'o')
 549
 550 /* A memory location; operand is the address.
 551    Can be nested inside a VOLATILE.  */
 552 DEF_RTL_EXPR(MEM, "mem", "e", 'o')
 553
 554 /* Reference to an assembler label in the code for this function.
 555    The operand is a CODE_LABEL found in the insn chain.
 556    The unprinted fields 1 and 2 are used in flow.c for the
 557    LABEL_NEXTREF and CONTAINING_INSN.  */
 558 DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o')
 559
 560 /* Reference to a named label: the string that is the first operand,
 561    with `_' added implicitly in front.
 562    Exception: if the first character explicitly given is `*',
 563    to give it to the assembler, remove the `*' and do not add `_'.  */
 564 DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s", 'o')
 565
 566 /* The condition code register is represented, in our imagination,
 567    as a register holding a value that can be compared to zero.
 568    In fact, the machine has already compared them and recorded the
 569    results; but instructions that look at the condition code
 570    pretend to be looking at the entire value and comparing it.  */
 571 DEF_RTL_EXPR(CC0, "cc0", "", 'o')
 572
 573 /* =====================================================================
 574    A QUEUED expression really points to a member of the queue of instructions
 575    to be output later for postincrement/postdecrement.
 576    QUEUED expressions never become part of instructions.
 577    When a QUEUED expression would be put into an instruction,
 578    instead either the incremented variable or a copy of its previous
 579    value is used.
 580
 581    Operands are:
 582    0. the variable to be incremented (a REG rtx).
 583    1. the incrementing instruction, or 0 if it hasn't been output yet.
 584    2. A REG rtx for a copy of the old value of the variable, or 0 if none yet.
 585    3. the body to use for the incrementing instruction
 586    4. the next QUEUED expression in the queue.
 587    ====================================================================== */
 588
 589 DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x')
 590
 591 /* ----------------------------------------------------------------------
 592    Expressions for operators in an rtl pattern
 593    ---------------------------------------------------------------------- */
 594
 595 /* if_then_else.  This is used in representing ordinary
 596    conditional jump instructions.
 597      Operand:
 598      0:  condition
 599      1:  then expr
 600      2:  else expr */
 601 DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3')
 602
 603 /* General conditional. The first operand is a vector composed of pairs of
 604    expressions.  The first element of each pair is evaluated, in turn.
 605    The value of the conditional is the second expression of the first pair
 606    whose first expression evaluates non-zero.  If none of the expressions is
 607    true, the second operand will be used as the value of the conditional.
 608
 609    This should be replaced with use of IF_THEN_ELSE.  */
 610 DEF_RTL_EXPR(COND, "cond", "Ee", 'x')
 611
 612 /* Comparison, produces a condition code result.  */
 613 DEF_RTL_EXPR(COMPARE, "compare", "ee", '2')
 614
 615 /* plus */
 616 DEF_RTL_EXPR(PLUS, "plus", "ee", 'c')
 617
 618 /* Operand 0 minus operand 1.  */
 619 DEF_RTL_EXPR(MINUS, "minus", "ee", '2')
 620
 621 /* Minus operand 0.  */
 622 DEF_RTL_EXPR(NEG, "neg", "e", '1')
 623
 624 DEF_RTL_EXPR(MULT, "mult", "ee", 'c')
 625
 626 /* Operand 0 divided by operand 1.  */
 627 DEF_RTL_EXPR(DIV, "div", "ee", '2')
 628 /* Remainder of operand 0 divided by operand 1.  */
 629 DEF_RTL_EXPR(MOD, "mod", "ee", '2')
 630
 631 /* Unsigned divide and remainder.  */
 632 DEF_RTL_EXPR(UDIV, "udiv", "ee", '2')
 633 DEF_RTL_EXPR(UMOD, "umod", "ee", '2')
 634
 635 /* Bitwise operations.  */
 636 DEF_RTL_EXPR(AND, "and", "ee", 'c')
 637
 638 DEF_RTL_EXPR(IOR, "ior", "ee", 'c')
 639
 640 DEF_RTL_EXPR(XOR, "xor", "ee", 'c')
 641
 642 DEF_RTL_EXPR(NOT, "not", "e", '1')
 643
 644 /* Operand:
 645      0:  value to be shifted.
 646      1:  number of bits.  */
 647 DEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2')
 648 DEF_RTL_EXPR(ROTATE, "rotate", "ee", '2')
 649
 650 /* Right shift operations, for machines where these are not the same
 651    as left shifting with a negative argument.  */
 652
 653 DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2')
 654 DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2')
 655 DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2')
 656
 657 /* Minimum and maximum values of two operands.  We need both signed and
 658    unsigned forms.  (We cannot use MIN for SMIN because it conflicts
 659    with a macro of the same name.) */
 660
 661 DEF_RTL_EXPR(SMIN, "smin", "ee", 'c')
 662 DEF_RTL_EXPR(SMAX, "smax", "ee", 'c')
 663 DEF_RTL_EXPR(UMIN, "umin", "ee", 'c')
 664 DEF_RTL_EXPR(UMAX, "umax", "ee", 'c')
 665
 666 /* These unary operations are used to represent incrementation
 667    and decrementation as they occur in memory addresses.
 668    The amount of increment or decrement are not represented
 669    because they can be understood from the machine-mode of the
 670    containing MEM.  These operations exist in only two cases:
 671    1. pushes onto the stack.
 672    2. created automatically by the life_analysis pass in flow.c.  */
 673 DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'x')
 674 DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'x')
 675 DEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'x')
 676 DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'x')
 677
 678 /* Comparison operations.  The ordered comparisons exist in two
 679    flavors, signed and unsigned.  */
 680 DEF_RTL_EXPR(NE, "ne", "ee", '<')
 681 DEF_RTL_EXPR(EQ, "eq", "ee", '<')
 682 DEF_RTL_EXPR(GE, "ge", "ee", '<')
 683 DEF_RTL_EXPR(GT, "gt", "ee", '<')
 684 DEF_RTL_EXPR(LE, "le", "ee", '<')
 685 DEF_RTL_EXPR(LT, "lt", "ee", '<')
 686 DEF_RTL_EXPR(GEU, "geu", "ee", '<')
 687 DEF_RTL_EXPR(GTU, "gtu", "ee", '<')
 688 DEF_RTL_EXPR(LEU, "leu", "ee", '<')
 689 DEF_RTL_EXPR(LTU, "ltu", "ee", '<')
 690
 691 /* Represents the result of sign-extending the sole operand.
 692    The machine modes of the operand and of the SIGN_EXTEND expression
 693    determine how much sign-extension is going on.  */
 694 DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1')
 695
 696 /* Similar for zero-extension (such as unsigned short to int).  */
 697 DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1')
 698
 699 /* Similar but here the operand has a wider mode.  */
 700 DEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1')
 701
 702 /* Similar for extending floating-point values (such as SFmode to DFmode).  */
 703 DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1')
 704 DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1')
 705
 706 /* Conversion of fixed point operand to floating point value.  */
 707 DEF_RTL_EXPR(FLOAT, "float", "e", '1')
 708
 709 /* With fixed-point machine mode:
 710    Conversion of floating point operand to fixed point value.
 711    Value is defined only when the operand's value is an integer.
 712    With floating-point machine mode (and operand with same mode):
 713    Operand is rounded toward zero to produce an integer value
 714    represented in floating point.  */
 715 DEF_RTL_EXPR(FIX, "fix", "e", '1')
 716
 717 /* Conversion of unsigned fixed point operand to floating point value.  */
 718 DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1')
 719
 720 /* With fixed-point machine mode:
 721    Conversion of floating point operand to *unsigned* fixed point value.
 722    Value is defined only when the operand's value is an integer.  */
 723 DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1')
 724
 725 /* Absolute value */
 726 DEF_RTL_EXPR(ABS, "abs", "e", '1')
 727
 728 /* Square root */
 729 DEF_RTL_EXPR(SQRT, "sqrt", "e", '1')
 730
 731 /* Find first bit that is set.
 732    Value is 1 + number of trailing zeros in the arg.,
 733    or 0 if arg is 0.  */
 734 DEF_RTL_EXPR(FFS, "ffs", "e", '1')
 735
 736 /* Reference to a signed bit-field of specified size and position.
 737    Operand 0 is the memory unit (usually SImode or QImode) which
 738    contains the field's first bit.  Operand 1 is the width, in bits.
 739    Operand 2 is the number of bits in the memory unit before the
 740    first bit of this field.
 741    If BITS_BIG_ENDIAN is defined, the first bit is the msb and
 742    operand 2 counts from the msb of the memory unit.
 743    Otherwise, the first bit is the lsb and operand 2 counts from
 744    the lsb of the memory unit.  */
 745 DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b')
 746
 747 /* Similar for unsigned bit-field.  */
 748 DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b')
 749
 750 /* For RISC machines.  These save memory when splitting insns.  */
 751
 752 /* HIGH are the high-order bits of a constant expression.  */
 753 DEF_RTL_EXPR(HIGH, "high", "e", 'o')
 754
 755 /* LO_SUM is the sum of a register and the low-order bits
 756    of a constant expression.  */
 757 DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o')
 758
 759 /*
 760 Local variables:
 761 mode:c
 762 version-control: t
 763 End:
 764 */