gcc-4_8-branch/gcc/ChangeLog.linaro

   1 2013-10-03  Christophe Lyon  <christophe.lyon@linaro.org>
   2
   3         Backport from trunk r202164.
   4         2013-09-02  Bin Cheng  <bin.cheng@arm.com>
   5
   6         * tree-ssa-loop-ivopts.c (set_autoinc_for_original_candidates):
   7         Find auto-increment use both before and after candidate.
   8
   9 2013-10-03  Christophe Lyon  <christophe.lyon@linaro.org>
  10
  11         Backport from trunk r202279.
  12         2013-09-05  Richard Earnshaw  <rearnsha@arm.com>
  13
  14         * arm.c (thumb2_emit_strd_push): Rewrite to use pre-decrement on
  15         initial store.
  16         * thumb2.md (thumb2_storewb_parisi): New pattern.
  17
  18 2013-10-03  Christophe Lyon  <christophe.lyon@linaro.org>
  19
  20         Backport from trunk r202275.
  21         2013-09-05  Yufeng Zhang  <yufeng.zhang@arm.com>
  22
  23         * config/aarch64/aarch64-option-extensions.def: Add
  24         AARCH64_OPT_EXTENSION of 'crc'.
  25         * config/aarch64/aarch64.h (AARCH64_FL_CRC): New define.
  26         (AARCH64_ISA_CRC): Ditto.
  27         * doc/invoke.texi (-march and -mcpu feature modifiers): Add
  28         description of the CRC extension.
  29
  30 2013-10-01  Christophe Lyon  <christophe.lyon@linaro.org>
  31
  32         Backport from trunk r201250.
  33         2013-07-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  34
  35         * config/arm/arm.md (arm_addsi3, addsi3_carryin_<optab>,
  36         addsi3_carryin_alt2_<optab>): Correct output template.
  37
  38 2013-10-01  Kugan Vivekanandarajah  <kuganv@linaro.org>
  39
  40         Backport from trunk r203059,203116.
  41         2013-10-01  Kugan Vivekanandarajah  <kuganv@linaro.org>
  42
  43         PR target/58578
  44         Revert
  45         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
  46         * config/arm/arm.md (arm_ashldi3_1bit):  define_insn into
  47         define_insn_and_split.
  48         (arm_ashrdi3_1bit,arm_lshrdi3_1bit): Likewise.
  49         (shiftsi3_compare): New pattern.
  50         (rrx): New pattern.
  51         * config/arm/unspecs.md (UNSPEC_RRX): New.
  52
  53 2013-09-11  Christophe Lyon  <christophe.lyon@linaro.org>
  54
  55         * LINARO-VERSION: Bump version.
  56
  57 2013-09-10  Christophe Lyon  <christophe.lyon@linaro.org>
  58
  59         GCC Linaro 4.8-2013.09 released.
  60
  61 2013-09-10  Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
  62
  63         Backport from trunk r200197, 201411.
  64         2013-06-19  Richard Earnshaw  <rearnsha@arm.com>
  65
  66         arm.md (split for eq(reg, 0)): Add variants for ARMv5 and Thumb2.
  67         (peepholes for eq(reg, not-0)): Ensure condition register is dead after
  68         pattern.  Use more efficient sequences on ARMv5 and Thumb2.
  69
  70         2013-08-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  71
  72         * config/arm/arm.md (peepholes for eq (reg1) (reg2/imm)):
  73         Generate canonical plus rtx with negated immediate instead of minus
  74         where appropriate.
  75         * config/arm/arm.c (thumb2_reorg): Handle ADCS <Rd>, <Rn> case.
  76
  77 2013-09-10  Christophe Lyon  <christophe.lyon@linaro.org>
  78
  79         Backport from trunk r200593,201024,201025,201122,201124,201126.
  80         2013-07-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
  81
  82         * config/arm/arm.md (arm_andsi3_insn): Add alternatives for 16-bit
  83         encoding.
  84         (iorsi3_insn): Likewise.
  85         (arm_xorsi3): Likewise.
  86
  87         2013-07-18  Sofiane Naci  <sofiane.naci@arm.com>
  88
  89         * config/arm/arm.md (attribute "type"): Rename "simple_alu_imm" to
  90         "arlo_imm".  Rename "alu_reg" to "arlo_reg".  Rename "simple_alu_shift" to
  91         "extend".  Split "alu_shift" into "shift" and "arlo_shift".  Split
  92         "alu_shift_reg" into "shift_reg" and "arlo_shift_reg".  List types
  93         in alphabetical order.
  94         (attribute "core_cycles"): Update for attribute changes.
  95         (arm_addsi3): Likewise.
  96         (addsi3_compare0): Likewise.
  97         (addsi3_compare0_scratch): Likewise.
  98         (addsi3_compare_op1): Likewise.
  99         (addsi3_compare_op2): Likewise.
 100         (compare_addsi2_op0): Likewise.
 101         (compare_addsi2_op1): Likewise.
 102         (addsi3_carryin_shift_<optab>): Likewise.
 103         (subsi3_carryin_shift): Likewise.
 104         (rsbsi3_carryin_shift): Likewise.
 105         (arm_subsi3_insn): Likewise.
 106         (subsi3_compare0): Likewise.
 107         (subsi3_compare): Likewise.
 108         (arm_andsi3_insn): Likewise.
 109         (thumb1_andsi3_insn): Likewise.
 110         (andsi3_compare0): Likewise.
 111         (andsi3_compare0_scratch): Likewise.
 112         (zeroextractsi_compare0_scratch
 113         (andsi_not_shiftsi_si): Likewise.
 114         (iorsi3_insn): Likewise.
 115         (iorsi3_compare0): Likewise.
 116         (iorsi3_compare0_scratch): Likewise.
 117         (arm_xorsi3): Likewise.
 118         (thumb1_xorsi3_insn): Likewise.
 119         (xorsi3_compare0): Likewise.
 120         (xorsi3_compare0_scratch): Likewise.
 121         (satsi_<SAT:code>_shift): Likewise.
 122         (rrx): Likewise.
 123         (arm_shiftsi3): Likewise.
 124         (shiftsi3_compare0): Likewise.
 125         (not_shiftsi): Likewise.
 126         (not_shiftsi_compare0): Likewise.
 127         (not_shiftsi_compare0_scratch): Likewise.
 128         (arm_one_cmplsi2): Likewise.
 129         (thumb_one_complsi2): Likewise.
 130         (notsi_compare0): Likewise.
 131         (notsi_compare0_scratch): Likewise.
 132         (thumb1_zero_extendhisi2): Likewise.
 133         (arm_zero_extendhisi2): Likewise.
 134         (arm_zero_extendhisi2_v6): Likewise.
 135         (arm_zero_extendhisi2addsi): Likewise.
 136         (thumb1_zero_extendqisi2): Likewise.
 137         (thumb1_zero_extendqisi2_v6): Likewise.
 138         (arm_zero_extendqisi2): Likewise.
 139         (arm_zero_extendqisi2_v6): Likewise.
 140         (arm_zero_extendqisi2addsi): Likewise.
 141         (thumb1_extendhisi2): Likewise.
 142         (arm_extendhisi2): Likewise.
 143         (arm_extendhisi2_v6): Likewise.
 144         (arm_extendqisi): Likewise.
 145         (arm_extendqisi_v6): Likewise.
 146         (arm_extendqisi2addsi): Likewise.
 147         (thumb1_extendqisi2): Likewise.
 148         (thumb1_movdi_insn): Likewise.
 149         (arm_movsi_insn): Likewise.
 150         (movsi_compare0): Likewise.
 151         (movhi_insn_arch4): Likewise.
 152         (movhi_bytes): Likewise.
 153         (arm_movqi_insn): Likewise.
 154         (thumb1_movqi_insn): Likewise.
 155         (arm32_movhf): Likewise.
 156         (thumb1_movhf): Likewise.
 157         (arm_movsf_soft_insn): Likewise.
 158         (thumb1_movsf_insn): Likewise.
 159         (movdf_soft_insn): Likewise.
 160         (thumb_movdf_insn): Likewise.
 161         (arm_cmpsi_insn): Likewise.
 162         (cmpsi_shiftsi): Likewise.
 163         (cmpsi_shiftsi_swp): Likewise.
 164         (arm_cmpsi_negshiftsi_si): Likewise.
 165         (movsicc_insn): Likewise.
 166         (movsfcc_soft_insn): Likewise.
 167         (arith_shiftsi): Likewise.
 168         (arith_shiftsi_compare0
 169         (arith_shiftsi_compare0_scratch
 170         (sub_shiftsi): Likewise.
 171         (sub_shiftsi_compare0
 172         (sub_shiftsi_compare0_scratch
 173         (and_scc): Likewise.
 174         (cond_move): Likewise.
 175         (if_plus_move): Likewise.
 176         (if_move_plus): Likewise.
 177         (if_move_not): Likewise.
 178         (if_not_move): Likewise.
 179         (if_shift_move): Likewise.
 180         (if_move_shift): Likewise.
 181         (if_shift_shift): Likewise.
 182         (if_not_arith): Likewise.
 183         (if_arith_not): Likewise.
 184         (cond_move_not): Likewise.
 185         (thumb1_ashlsi3): Set type attribute.
 186         (thumb1_ashrsi3): Likewise.
 187         (thumb1_lshrsi3): Likewise.
 188         (thumb1_rotrsi3): Likewise.
 189         (shiftsi3_compare0_scratch): Likewise.
 190         * config/arm/neon.md (neon_mov<mode>): Update for attribute changes.
 191         (neon_mov<mode>): Likewise.
 192         * config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): Update for attribute
 193         changes.
 194         (thumb2_movsi_insn): Likewise.
 195         (thumb2_cmpsi_neg_shiftsi): Likewise.
 196         (thumb2_extendqisi_v6): Likewise.
 197         (thumb2_zero_extendhisi2_v6): Likewise.
 198         (thumb2_zero_extendqisi2_v6): Likewise.
 199         (thumb2_shiftsi3_short): Likewise.
 200         (thumb2_addsi3_compare0_scratch): Likewise.
 201         (orsi_not_shiftsi_si): Likewise.
 202         * config/arm/vfp.md (arm_movsi_vfp): Update for attribute changes.
 203         * config/arm/arm-fixed.md (arm_ssatsihi_shift): Update for attribute
 204         changes.
 205         * config/arm/arm1020e.md (1020alu_op): Update for attribute changes.
 206         (1020alu_shift_op): Likewise.
 207         (1020alu_shift_reg_op): Likewise.
 208         * config/arm/arm1026ejs.md (alu_op): Update for attribute changes.
 209         (alu_shift_op): Likewise.
 210         (alu_shift_reg_op): Likewise.
 211         * config/arm/arm1136jfs.md (11_alu_op): Update for attribute changes.
 212         (11_alu_shift_op): Likewise.
 213         (11_alu_shift_reg_op): Likewise.
 214         * config/arm/arm926ejs.md (9_alu_op): Update for attribute changes.
 215         (9_alu_shift_reg_op): Likewise.
 216         * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute changes.
 217         (cortex_a15_alu_shift): Likewise.
 218         (cortex_a15_alu_shift_reg): Likewise.
 219         * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute changes.
 220         (cortex_a5_alu_shift): Likewise.
 221         * config/arm/cortex-a53.md (cortex_a53_alu) : Update for attribute
 222         changes.
 223         (cortex_a53_alu_shift): Likewise.
 224         * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute
 225         changes.
 226         (cortex_a7_alu_reg): Likewise.
 227         (cortex_a7_alu_shift): Likewise.
 228         * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute changes.
 229         (cortex_a8_alu_shift): Likewise.
 230         (cortex_a8_alu_shift_reg): Likewise.
 231         (cortex_a8_mov): Likewise.
 232         * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute changes.
 233         (cortex_a9_dp_shift): Likewise.
 234         * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute changes.
 235         * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute changes.
 236         (cortex_r4_mov): Likewise.
 237         (cortex_r4_alu_shift): Likewise.
 238         (cortex_r4_alu_shift_reg): Likewise.
 239         * config/arm/fa526.md (526_alu_op): Update for attribute changes.
 240         (526_alu_shift_op): Likewise.
 241         * config/arm/fa606te.md (606te_alu_op): Update for attribute changes.
 242         * config/arm/fa626te.md (626te_alu_op): Update for attribute changes.
 243         (626te_alu_shift_op): Likewise.
 244         * config/arm/fa726te.md (726te_shift_op): Update for attribute changes.
 245         (726te_alu_op): Likewise.
 246         (726te_alu_shift_op): Likewise.
 247         (726te_alu_shift_reg_op): Likewise.
 248         * config/arm/fmp626.md (mp626_alu_op): Update for attribute changes.
 249         (mp626_alu_shift_op): Likewise.
 250         * config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute changes.
 251         (pj4_alu_e1_conds): Likewise.
 252         (pj4_alu): Likewise.
 253         (pj4_alu_conds): Likewise.
 254         (pj4_shift): Likewise.
 255         (pj4_shift_conds): Likewise.
 256         (pj4_alu_shift): Likewise.
 257         (pj4_alu_shift_conds): Likewise.
 258         * config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute changes.
 259         (cortexa7_older_only): Likewise.
 260         (cortexa7_younger): Likewise.
 261
 262         2013-07-18  Sofiane Naci  <sofiane.naci@arm.com>
 263
 264         * config/arm/arm.md (attribute "insn"): Delete values "mrs", "msr",
 265         "xtab" and "sat".  Move value "clz" from here to ...
 266         (attriubte "type"): ... here.
 267         (satsi_<SAT:code>): Delete "insn" attribute.
 268         (satsi_<SAT:code>_shift): Likewise.
 269         (arm_zero_extendqisi2addsi): Likewise.
 270         (arm_extendqisi2addsi): Likewise.
 271         (clzsi2): Update for attribute changes.
 272         (rbitsi2): Likewise.
 273         * config/arm/arm-fixed.md (arm_ssatsihi_shift): Delete "insn" attribute.
 274         (arm_usatsihi): Likewise.
 275         * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change.
 276
 277         2013-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 278
 279         * config/arm/predicates.md (shiftable_operator_strict_it):
 280         New predicate.
 281         * config/arm/thumb2.md (thumb_andsi_not_shiftsi_si):
 282         Disable cond_exec version for arm_restrict_it.
 283         (thumb2_smaxsi3): Convert to generate cond_exec.
 284         (thumb2_sminsi3): Likewise.
 285         (thumb32_umaxsi3): Likewise.
 286         (thumb2_uminsi3): Likewise.
 287         (thumb2_abssi2): Adjust constraints for arm_restrict_it.
 288         (thumb2_neg_abssi2): Likewise.
 289         (thumb2_mov_scc): Add alternative for 16-bit encoding.
 290         (thumb2_movsicc_insn): Adjust alternatives.
 291         (thumb2_mov_negscc): Disable for arm_restrict_it.
 292         (thumb2_mov_negscc_strict_it): New pattern.
 293         (thumb2_mov_notscc_strict_it): New pattern.
 294         (thumb2_mov_notscc): Disable for arm_restrict_it.
 295         (thumb2_ior_scc): Likewise.
 296         (thumb2_ior_scc_strict_it): New pattern.
 297         (thumb2_cond_move): Adjust for arm_restrict_it.
 298         (thumb2_cond_arith): Disable for arm_restrict_it.
 299         (thumb2_cond_arith_strict_it): New pattern.
 300         (thumb2_cond_sub): Adjust for arm_restrict_it.
 301         (thumb2_movcond): Likewise.
 302         (thumb2_extendqisi_v6): Disable cond_exec variant for arm_restrict_it.
 303         (thumb2_zero_extendhisi2_v6): Likewise.
 304         (thumb2_zero_extendqisi2_v6): Likewise.
 305         (orsi_notsi_si): Likewise.
 306         (orsi_not_shiftsi_si): Likewise.
 307
 308         2013-07-22  Sofiane Naci  <sofiane.naci@arm.com>
 309
 310         * config/arm/arm.md (attribute "insn"): Delete.
 311         (attribute "type"): Add "mov_imm", "mov_reg", "mov_shift",
 312         "mov_shift_reg", "mvn_imm", "mvn_reg", "mvn_shift" and "mvn_shift_reg".
 313         (not_shiftsi): Update for attribute change.
 314         (not_shiftsi_compare0): Likewise.
 315         (not_shiftsi_compare0_scratch): Likewise.
 316         (arm_one_cmplsi2): Likewise.
 317         (thumb1_one_cmplsi2): Likewise.
 318         (notsi_compare0): Likewise.
 319         (notsi_compare0_scratch): Likewise.
 320         (thumb1_movdi_insn): Likewise.
 321         (arm_movsi_insn): Likewise.
 322         (movhi_insn_arch4): Likewise.
 323         (movhi_bytes): Likewise.
 324         (arm_movqi_insn): Likewise.
 325         (thumb1_movqi_insn): Likewise.
 326         (arm32_movhf): Likewise.
 327         (thumb1_movhf): Likewise.
 328         (arm_movsf_soft_insn): Likewise.
 329         (thumb1_movsf_insn): Likewise.
 330         (thumb_movdf_insn): Likewise.
 331         (movsicc_insn): Likewise.
 332         (movsfcc_soft_insn): Likewise.
 333         (and_scc): Likewise.
 334         (cond_move): Likewise.
 335         (if_move_not): Likewise.
 336         (if_not_move): Likewise.
 337         (if_shift_move): Likewise.
 338         (if_move_shift): Likewise.
 339         (if_shift_shift): Likewise.
 340         (if_not_arith): Likewise.
 341         (if_arith_not): Likewise.
 342         (cond_move_not): Likewise.
 343         * config/arm/neon.md (neon_mov<mode>): Update for attribute change.
 344         (neon_mov<mode>): Likewise.
 345         * config/arm/vfp.md (arm_movsi_vfp): Update for attribute change.
 346         (thumb2_movsi_vfp): Likewise.
 347         (movsf_vfp): Likewise.
 348         (thumb2_movsf_vfp): Likewise.
 349         * config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute change.
 350         (cortexa7_older_only): Likewise.
 351         (cortexa7_younger): Likewise.
 352         * config/arm/arm1020e.md (1020alu_op): Update for attribute change.
 353         (1020alu_shift_op): Likewise.
 354         (1020alu_shift_reg_op): Likewise.
 355         * config/arm/arm1026ejs.md (alu_op): Update for attribute change.
 356         (alu_shift_op): Likewise.
 357         (alu_shift_reg_op): Likewise.
 358         * config/arm/arm1136jfs.md (11_alu_op): Update for attribute change.
 359         (11_alu_shift_op): Likewise.
 360         (11_alu_shift_reg_op): Likewise.
 361         * config/arm/arm926ejs.md (9_alu_op): Update for attribute change.
 362         (9_alu_shift_reg_op): Likewise.
 363         * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute change.
 364         (cortex_a15_alu_shift): Likewise.
 365         (cortex_a15_alu_shift_reg): Likewise.
 366         * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute change.
 367         (cortex_a5_alu_shift): Likewise.
 368         * config/arm/cortex-a53.md (cortex_a53_alu): Update for attribute change.
 369         (cortex_a53_alu_shift): Likewise.
 370         * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute change.
 371         (cortex_a7_alu_reg): Likewise.
 372         (cortex_a7_alu_shift): Likewise.
 373         * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change.
 374         (cortex_a8_alu_shift): Likewise.
 375         (cortex_a8_alu_shift_reg): Likewise.
 376         (cortex_a8_mov): Likewise.
 377         * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute change.
 378         (cortex_a9_dp_shift): Likewise.
 379         * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute change.
 380         * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute change.
 381         (cortex_r4_mov): Likewise.
 382         (cortex_r4_alu_shift): Likewise.
 383         (cortex_r4_alu_shift_reg): Likewise.
 384         * config/arm/fa526.md (526_alu_op): Update for attribute change.
 385         (526_alu_shift_op): Likewise.
 386         * config/arm/fa606te.md (606te_alu_op): Update for attribute change.
 387         * config/arm/fa626te.md (626te_alu_op): Update for attribute change.
 388         (626te_alu_shift_op): Likewise.
 389         * config/arm/fa726te.md (726te_shift_op): Update for attribute change.
 390         (726te_alu_op): Likewise.
 391         (726te_alu_shift_op): Likewise.
 392         (726te_alu_shift_reg_op): Likewise.
 393         * config/arm/fmp626.md (mp626_alu_op): Update for attribute change.
 394         (mp626_alu_shift_op): Likewise.
 395         * config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute change.
 396         (pj4_alu_e1_conds): Likewise.
 397         (pj4_alu): Likewise.
 398         (pj4_alu_conds): Likewise.
 399         (pj4_shift): Likewise.
 400         (pj4_shift_conds): Likewise.
 401         (pj4_alu_shift): Likewise.
 402         (pj4_alu_shift_conds): Likewise.
 403
 404         2013-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 405
 406         * config/arm/constraints.md (Pd): Allow TARGET_THUMB
 407         instead of TARGET_THUMB1.
 408         (Pz): New constraint.
 409         * config/arm/arm.md (arm_addsi3): Add alternatives for 16-bit
 410         encodings.
 411         (compare_negsi_si): Likewise.
 412         (compare_addsi2_op0): Likewise.
 413         (compare_addsi2_op1): Likewise.
 414         (addsi3_carryin_<optab>): Likewise.
 415         (addsi3_carryin_alt2_<optab>): Likewise.
 416         (addsi3_carryin_shift_<optab>): Disable cond_exec variant
 417         for arm_restrict_it.
 418         (subsi3_carryin): Likewise.
 419         (arm_subsi3_insn): Add alternatives for 16-bit encoding.
 420         (minmax_arithsi): Disable for arm_restrict_it.
 421         (minmax_arithsi_non_canon): Adjust for arm_restrict_it.
 422         (satsi_<SAT:code>): Disable cond_exec variant for arm_restrict_it.
 423         (satsi_<SAT:code>_shift): Likewise.
 424         (arm_shiftsi3): Add alternative for 16-bit encoding.
 425         (arm32_movhf): Disable for arm_restrict_it.
 426         (arm_cmpdi_unsigned): Add alternatives for 16-bit encoding.
 427         (arm_movtas_ze): Disable cond_exec variant for arm_restrict_it.
 428
 429 2013-09-09  Kugan Vivekanandarajah  <kuganv@linaro.org>
 430
 431         Backport from trunk r201412.
 432         2013-08-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 433
 434         * config/arm/arm.md (minmax_arithsi_non_canon): Emit canonical RTL form
 435         when subtracting a constant.
 436
 437 2013-09-05  Yvan Roux  <yvan.roux@linaro.org>
 438
 439         Backport from trunk r201249.
 440         2013-07-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 441
 442         * config/arm/arm-fixed.md (ssmulsa3, usmulusa3):
 443         Adjust for arm_restrict_it.
 444         Remove trailing whitespace.
 445
 446 2013-09-05  Yvan Roux  <yvan.roux@linaro.org>
 447
 448         Backport from trunk r201342.
 449         2013-07-30  Richard Earnshaw  <rearnsha@arm.com>
 450
 451         * config.gcc (arm): Require 64-bit host-wide-int for all ARM target
 452         configs.
 453
 454 2013-09-05  Christophe Lyon  <christophe.lyon@linaro.org>
 455
 456         Backport from trunk r199527,199792,199814.
 457         2013-05-31  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 458
 459         PR target/56315
 460         * config/arm/arm.c (const_ok_for_dimode_op): Handle IOR.
 461         * config/arm/arm.md (*iordi3_insn): Change to insn_and_split.
 462         * config/arm/neon.md (iordi3_neon): Remove.
 463         (neon_vorr<mode>): Generate iordi3 instead of iordi3_neon.
 464         * config/arm/predicates.md (imm_for_neon_logic_operand):
 465         Move to earlier in the file.
 466         (neon_logic_op2): Likewise.
 467         (arm_iordi_operand_neon): New predicate.
 468
 469         2013-06-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 470
 471         * config/arm/constraints.md (Df): New constraint.
 472         * config/arm/arm.md (iordi3_insn): Use Df constraint instead of De.
 473         Correct length attribute for last two alternatives.
 474
 475         2013-06-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 476
 477         PR target/56315
 478         * config/arm/arm.md (*xordi3_insn): Change to insn_and_split.
 479         (xordi3): Change operand 2 constraint to arm_xordi_operand.
 480         * config/arm/arm.c (const_ok_for_dimode_op): Handle XOR.
 481         * config/arm/constraints.md (Dg): New constraint.
 482         * config/arm/neon.md (xordi3_neon): Remove.
 483         (neon_veor<mode>): Generate xordi3 instead of xordi3_neon.
 484         * config/arm/predicates.md (arm_xordi_operand): New predicate.
 485
 486 2013-09-05  Christophe Lyon  <christophe.lyon@linaro.org>
 487
 488         Backport from trunk r201599.
 489         2013-08-08  Richard Earnshaw  <rearnsha@arm.com>
 490
 491         PR target/57431
 492         * arm/neon.md (neon_vld1_dupdi): New expand pattern.
 493         (neon_vld1_dup<mode> VD iterator): Iterate over VD not VDX.
 494
 495 2013-09-05  Christophe Lyon  <christophe.lyon@linaro.org>
 496
 497         Backport from trunk r201589.
 498         2013-08-08  Bernd Edlinger  <bernd.edlinger@hotmail.de>
 499
 500         PR target/58065
 501         * config/arm/arm.h (MALLOC_ABI_ALIGNMENT): Define.
 502
 503 2013-09-03  Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>
 504
 505         Backport from trunk
 506         r201624, r201666.
 507         2013-08-09  James Greenhalgh  <james.greenhalgh@arm.com>
 508
 509         * config/aarch64/aarch64-simd-builtins.def (get_lane_signed): Remove.
 510         (get_lane_unsigned): Likewise.
 511         (dup_lane_scalar): Likewise.
 512         (get_lane): enable for VALL.
 513         * config/aarch64/aarch64-simd.md
 514         (aarch64_dup_lane_scalar<mode>): Remove.
 515         (aarch64_get_lane_signed<mode>): Likewise.
 516         (aarch64_get_lane_unsigned<mode>): Likewise.
 517         (aarch64_get_lane_extend<GPI:mode><VDQQH:mode>): New.
 518         (aarch64_get_lane_zero_extendsi<mode>): Likewise.
 519         (aarch64_get_lane<mode>): Enable for all vector modes.
 520         (aarch64_get_lanedi): Remove misleading constraints.
 521         * config/aarch64/arm_neon.h
 522         (__aarch64_vget_lane_any): Define.
 523         (__aarch64_vget<q>_lane_<fpsu><8,16,32,64>): Likewise.
 524         (vget<q>_lane_<fpsu><8,16,32,64>): Use __aarch64_vget_lane macros.
 525         (vdup<bhsd>_lane_<su><8,16,32,64>): Likewise.
 526          * config/aarch64/iterators.md (VDQQH): New.
 527         (VDQQHS): Likewise.
 528         (vwcore): Likewise.
 529
 530         2013-08-12  James Greenhalgh  <james.greenhalgh@arm.com>
 531
 532         * config/aarch64/arm_none.h
 533         (vdup<bhsd>_lane_<su><8,16,32,64>): Fix macro call.
 534
 535 2013-08-26  Kugan Vivekanandarajah  <kuganv@linaro.org>
 536
 537         Backport from trunk r201341.
 538         2013-07-30  Richard Earnshaw  <rearnsha@arm.com>
 539
 540         * arm.md (mulhi3): New expand pattern.
 541
 542 2013-08-16  Christophe Lyon  <christophe.lyon@linaro.org>
 543
 544         * LINARO-VERSION: Bump version.
 545
 546 2013-08-14  Christophe Lyon  <christophe.lyon@linaro.org>
 547
 548         GCC Linaro 4.8-2013.08 released.
 549
 550 2013-08-08  Christophe Lyon  <christophe.lyon@linaro.org>
 551
 552         Backport from trunk
 553         r198489,200167,200199,200510,200513,200515,200576.
 554         2013-05-01  Greta Yorsh  <Greta.Yorsh@arm.com>
 555
 556         * config/arm/thumb2.md (thumb2_smaxsi3,thumb2_sminsi3): Convert
 557         define_insn to define_insn_and_split.
 558         (thumb32_umaxsi3,thumb2_uminsi3): Likewise.
 559         (thumb2_negdi2,thumb2_abssi2,thumb2_neg_abssi2): Likewise.
 560         (thumb2_mov_scc,thumb2_mov_negscc,thumb2_mov_notscc): Likewise.
 561         (thumb2_movsicc_insn,thumb2_and_scc,thumb2_ior_scc): Likewise.
 562         (thumb2_negscc): Likewise.
 563
 564         2013-06-18  Sofiane Naci  <sofiane.naci@arm.com>
 565
 566         * config/arm/arm.md (attribute "insn"): Move multiplication and division
 567         attributes to...
 568         (attribute "type"): ... here.  Remove mult.
 569         (attribute "mul32"): New attribute.
 570         (attribute "mul64"): Add umaal.
 571         (*arm_mulsi3): Update attributes.
 572         (*arm_mulsi3_v6): Likewise.
 573         (*thumb_mulsi3): Likewise.
 574         (*thumb_mulsi3_v6): Likewise.
 575         (*mulsi3_compare0): Likewise.
 576         (*mulsi3_compare0_v6): Likewise.
 577         (*mulsi_compare0_scratch): Likewise.
 578         (*mulsi_compare0_scratch_v6): Likewise.
 579         (*mulsi3addsi): Likewise.
 580         (*mulsi3addsi_v6): Likewise.
 581         (*mulsi3addsi_compare0): Likewise.
 582         (*mulsi3addsi_compare0_v6): Likewise.
 583         (*mulsi3addsi_compare0_scratch): Likewise.
 584         (*mulsi3addsi_compare0_scratch_v6): Likewise.
 585         (*mulsi3subsi): Likewise.
 586         (*mulsidi3adddi): Likewise.
 587         (*mulsi3addsi_v6): Likewise.
 588         (*mulsidi3adddi_v6): Likewise.
 589         (*mulsidi3_nov6): Likewise.
 590         (*mulsidi3_v6): Likewise.
 591         (*umulsidi3_nov6): Likewise.
 592         (*umulsidi3_v6): Likewise.
 593         (*umulsidi3adddi): Likewise.
 594         (*umulsidi3adddi_v6): Likewise.
 595         (*smulsi3_highpart_nov6): Likewise.
 596         (*smulsi3_highpart_v6): Likewise.
 597         (*umulsi3_highpart_nov6): Likewise.
 598         (*umulsi3_highpart_v6): Likewise.
 599         (mulhisi3): Likewise.
 600         (*mulhisi3tb): Likewise.
 601         (*mulhisi3bt): Likewise.
 602         (*mulhisi3tt): Likewise.
 603         (maddhisi4): Likewise.
 604         (*maddhisi4tb): Likewise.
 605         (*maddhisi4tt): Likewise.
 606         (maddhidi4): Likewise.
 607         (*maddhidi4tb): Likewise.
 608         (*maddhidi4tt): Likewise.
 609         (divsi3): Likewise.
 610         (udivsi3): Likewise.
 611         * config/arm/thumb2.md (thumb2_mulsi_short): Update attributes.
 612         (thumb2_mulsi_short_compare0): Likewise.
 613         (thumb2_mulsi_short_compare0_scratch): Likewise.
 614         * config/arm/arm1020e.md (1020mult1): Update attribute change.
 615         (1020mult2): Likewise.
 616         (1020mult3): Likewise.
 617         (1020mult4): Likewise.
 618         (1020mult5): Likewise.
 619         (1020mult6): Likewise.
 620         * config/arm/cortex-a15.md (cortex_a15_mult32): Update attribute change.
 621         (cortex_a15_mult64): Likewise.
 622         (cortex_a15_sdiv): Likewise.
 623         (cortex_a15_udiv): Likewise.
 624         * config/arm/arm1026ejs.md (mult1): Update attribute change.
 625         (mult2): Likewise.
 626         (mult3): Likewise.
 627         (mult4): Likewise.
 628         (mult5): Likewise.
 629         (mult6): Likewise.
 630         * config/arm/marvell-pj4.md (pj4_ir_mul): Update attribute change.
 631         (pj4_ir_div): Likewise.
 632         * config/arm/arm1136jfs.md (11_mult1): Update attribute change.
 633         (11_mult2): Likewise.
 634         (11_mult3): Likewise.
 635         (11_mult4): Likewise.
 636         (11_mult5): Likewise.
 637         (11_mult6): Likewise.
 638         (11_mult7): Likewise.
 639         * config/arm/cortex-a8.md (cortex_a8_mul): Update attribute change.
 640         (cortex_a8_mla): Likewise.
 641         (cortex_a8_mull): Likewise.
 642         (cortex_a8_smulwy): Likewise.
 643         (cortex_a8_smlald): Likewise.
 644         * config/arm/cortex-m4.md (cortex_m4_alu): Update attribute change.
 645         * config/arm/cortex-r4.md (cortex_r4_mul_4): Update attribute change.
 646         (cortex_r4_mul_3): Likewise.
 647         (cortex_r4_mla_4): Likewise.
 648         (cortex_r4_mla_3): Likewise.
 649         (cortex_r4_smlald): Likewise.
 650         (cortex_r4_mull): Likewise.
 651         (cortex_r4_sdiv): Likewise.
 652         (cortex_r4_udiv): Likewise.
 653         * config/arm/cortex-a7.md (cortex_a7_mul): Update attribute change.
 654         (cortex_a7_idiv): Likewise.
 655         * config/arm/arm926ejs.md (9_mult1): Update attribute change.
 656         (9_mult2): Likewise.
 657         (9_mult3): Likewise.
 658         (9_mult4): Likewise.
 659         (9_mult5): Likewise.
 660         (9_mult6): Likewise.
 661         * config/arm/cortex-a53.md (cortex_a53_mul): Update attribute change.
 662         (cortex_a53_sdiv): Likewise.
 663         (cortex_a53_udiv): Likewise.
 664         * config/arm/fa726te.md (726te_mult_op): Update attribute change.
 665         * config/arm/fmp626.md (mp626_mult1): Update attribute change.
 666         (mp626_mult2): Likewise.
 667         (mp626_mult3): Likewise.
 668         (mp626_mult4): Likewise.
 669         * config/arm/fa526.md (526_mult1): Update attribute change.
 670         (526_mult2): Likewise.
 671         * config/arm/arm-generic.md (mult): Update attribute change.
 672         (mult_ldsched_strongarm): Likewise.
 673         (mult_ldsched): Likewise.
 674         (multi_cycle): Likewise.
 675         * config/arm/cortex-a5.md (cortex_a5_mul): Update attribute change.
 676         * config/arm/fa606te.md (606te_mult1): Update attribute change.
 677         (606te_mult2): Likewise.
 678         (606te_mult3): Likewise.
 679         (606te_mult4): Likewise.
 680         * config/arm/cortex-a9.md (cortex_a9_mult16): Update attribute change.
 681         (cortex_a9_mac16): Likewise.
 682         (cortex_a9_multiply): Likewise.
 683         (cortex_a9_mac): Likewise.
 684         (cortex_a9_multiply_long): Likewise.
 685         * config/arm/fa626te.md (626te_mult1): Update attribute change.
 686         (626te_mult2): Likewise.
 687         (626te_mult3): Likewise.
 688         (626te_mult4): Likewise.
 689
 690         2013-06-19  Sofiane Naci  <sofiane.naci@arm.com>
 691
 692         * config/arm/vfp.md: Move VFP instruction classification documentation
 693         to ...
 694         * config/arm/arm.md: ... here.  Update instruction classification
 695         documentation.
 696
 697         2013-06-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 698
 699         * config/arm/predicates.md (arm_cond_move_operator): New predicate.
 700         * config/arm/arm.md (movsfcc): Use arm_cond_move_operator predicate.
 701         (movdfcc): Likewise.
 702         * config/arm/vfp.md (*thumb2_movsf_vfp):
 703         Disable predication for arm_restrict_it.
 704         (*thumb2_movsfcc_vfp): Disable for arm_restrict_it.
 705         (*thumb2_movdfcc_vfp): Likewise.
 706         (*abssf2_vfp, *absdf2_vfp, *negsf2_vfp, *negdf2_vfp,*addsf3_vfp,
 707         *adddf3_vfp, *subsf3_vfp, *subdf3_vfpc, *divsf3_vfp,*divdf3_vfp,
 708         *mulsf3_vfp, *muldf3_vfp, *mulsf3negsf_vfp, *muldf3negdf_vfp,
 709         *mulsf3addsf_vfp, *muldf3adddf_vfp, *mulsf3subsf_vfp,
 710         *muldf3subdf_vfp, *mulsf3negsfaddsf_vfp, *fmuldf3negdfadddf_vfp,
 711         *mulsf3negsfsubsf_vfp, *muldf3negdfsubdf_vfp, *fma<SDF:mode>4,
 712         *fmsub<SDF:mode>4, *fnmsub<SDF:mode>4, *fnmadd<SDF:mode>4,
 713         *extendsfdf2_vfp, *truncdfsf2_vfp, *extendhfsf2, *truncsfhf2,
 714         *truncsisf2_vfp, *truncsidf2_vfp, fixuns_truncsfsi2, fixuns_truncdfsi2,
 715         *floatsisf2_vfp, *floatsidf2_vfp, floatunssisf2, floatunssidf2,
 716         *sqrtsf2_vfp, *sqrtdf2_vfp, *cmpsf_vfp, *cmpsf_trap_vfp, *cmpdf_vfp,
 717         *cmpdf_trap_vfp, <vrint_pattern><SDF:mode>2):
 718         Disable predication for arm_restrict_it.
 719
 720         2013-06-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 721
 722         * config/arm/arm.md (arm_mulsi3_v6): Add alternative for 16-bit
 723         encoding.
 724         (mulsi3addsi_v6): Disable predicable variant for arm_restrict_it.
 725         (mulsi3subsi): Likewise.
 726         (mulsidi3adddi): Likewise.
 727         (mulsidi3_v6): Likewise.
 728         (umulsidi3_v6): Likewise.
 729         (umulsidi3adddi_v6): Likewise.
 730         (smulsi3_highpart_v6): Likewise.
 731         (umulsi3_highpart_v6): Likewise.
 732         (mulhisi3tb): Likewise.
 733         (mulhisi3bt): Likewise.
 734         (mulhisi3tt): Likewise.
 735         (maddhisi4): Likewise.
 736         (maddhisi4tb): Likewise.
 737         (maddhisi4tt): Likewise.
 738         (maddhidi4): Likewise.
 739         (maddhidi4tb): Likewise.
 740         (maddhidi4tt): Likewise.
 741         (zeroextractsi_compare0_scratch): Likewise.
 742         (insv_zero): Likewise.
 743         (insv_t2): Likewise.
 744         (anddi_notzesidi_di): Likewise.
 745         (anddi_notsesidi_di): Likewise.
 746         (andsi_notsi_si): Likewise.
 747         (iordi_zesidi_di): Likewise.
 748         (xordi_zesidi_di): Likewise.
 749         (andsi_iorsi3_notsi): Likewise.
 750         (smax_0): Likewise.
 751         (smax_m1): Likewise.
 752         (smin_0): Likewise.
 753         (not_shiftsi): Likewise.
 754         (unaligned_loadsi): Likewise.
 755         (unaligned_loadhis): Likewise.
 756         (unaligned_loadhiu): Likewise.
 757         (unaligned_storesi): Likewise.
 758         (unaligned_storehi): Likewise.
 759         (extv_reg): Likewise.
 760         (extzv_t2): Likewise.
 761         (divsi3): Likewise.
 762         (udivsi3): Likewise.
 763         (arm_zero_extendhisi2addsi): Likewise.
 764         (arm_zero_extendqisi2addsi): Likewise.
 765         (compareqi_eq0): Likewise.
 766         (arm_extendhisi2_v6): Likewise.
 767         (arm_extendqisi2addsi): Likewise.
 768         (arm_movt): Likewise.
 769         (thumb2_ldrd): Likewise.
 770         (thumb2_ldrd_base): Likewise.
 771         (thumb2_ldrd_base_neg): Likewise.
 772         (thumb2_strd): Likewise.
 773         (thumb2_strd_base): Likewise.
 774         (thumb2_strd_base_neg): Likewise.
 775         (arm_negsi2): Add alternative for 16-bit encoding.
 776         (arm_one_cmplsi2): Likewise.
 777
 778         2013-06-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 779
 780         * config/arm/constraints.md (Ts): New constraint.
 781         * config/arm/arm.md (arm_movqi_insn): Add alternatives for
 782         16-bit encodings.
 783         (compare_scc): Use "Ts" constraint for operand 0.
 784         (ior_scc_scc): Likewise.
 785         (and_scc_scc): Likewise.
 786         (and_scc_scc_nodom): Likewise.
 787         (ior_scc_scc_cmp): Likewise for operand 7.
 788         (and_scc_scc_cmp): Likewise.
 789         * config/arm/thumb2.md (thumb2_movsi_insn):
 790         Add alternatives for 16-bit encodings.
 791         (thumb2_movhi_insn): Likewise.
 792         (thumb2_movsicc_insn): Likewise.
 793         (thumb2_and_scc): Take 'and' outside cond_exec.  Use "Ts" constraint.
 794         (thumb2_negscc): Use "Ts" constraint.
 795         Move mvn instruction outside cond_exec block.
 796         * config/arm/vfp.md (thumb2_movsi_vfp): Add alternatives
 797         for 16-bit encodings.
 798
 799         2013-07-01  Sofiane Naci  <sofiane.naci@arm.com>
 800
 801         * arm.md (attribute "wtype"): Delete.  Move attribute values from here
 802         to ...
 803         (attribute "type"): ... here, and prefix with "wmmx_".
 804         (attribute "core_cycles"): Update for attribute changes.
 805         * iwmmxt.md (tbcstv8qi): Update for attribute changes.
 806         (tbcstv4hi): Likewise.
 807         (tbcstv2si): Likewise.
 808         (iwmmxt_iordi3): Likewise.
 809         (iwmmxt_xordi3): Likewise.
 810         (iwmmxt_anddi3): Likewise.
 811         (iwmmxt_nanddi3): Likewise.
 812         (iwmmxt_arm_movdi): Likewise.
 813         (iwmmxt_movsi_insn): Likewise.
 814         (mov<mode>_internal): Likewise.
 815         (and<mode>3_iwmmxt): Likewise.
 816         (ior<mode>3_iwmmxt): Likewise.
 817         (xor<mode>3_iwmmxt): Likewise.
 818         (add<mode>3_iwmmxt): Likewise.
 819         (ssaddv8qi3): Likewise.
 820         (ssaddv4hi3): Likewise.
 821         (ssaddv2si3): Likewise.
 822         (usaddv8qi3): Likewise.
 823         (usaddv4hi3): Likewise.
 824         (usaddv2si3): Likewise.
 825         (sub<mode>3_iwmmxt): Likewise.
 826         (sssubv8qi3): Likewise.
 827         (sssubv4hi3): Likewise.
 828         (sssubv2si3): Likewise.
 829         (ussubv8qi3): Likewise.
 830         (ussubv4hi3): Likewise.
 831         (ussubv2si3): Likewise.
 832         (mulv4hi3_iwmmxt): Likewise.
 833         (smulv4hi3_highpart): Likewise.
 834         (umulv4hi3_highpart): Likewise.
 835         (iwmmxt_wmacs): Likewise.
 836         (iwmmxt_wmacsz): Likewise.
 837         (iwmmxt_wmacu): Likewise.
 838         (iwmmxt_wmacuz): Likewise.
 839         (iwmmxt_clrdi): Likewise.
 840         (iwmmxt_clrv8qi): Likewise.
 841         (iwmmxt_clr4hi): Likewise.
 842         (iwmmxt_clr2si): Likewise.
 843         (iwmmxt_uavgrndv8qi3): Likewise.
 844         (iwmmxt_uavgrndv4hi3): Likewise.
 845         (iwmmxt_uavgv8qi3): Likewise.
 846         (iwmmxt_uavgv4hi3): Likewise.
 847         (iwmmxt_tinsrb): Likewise.
 848         (iwmmxt_tinsrh): Likewise.
 849         (iwmmxt_tinsrw): Likewise.
 850         (iwmmxt_textrmub): Likewise.
 851         (iwmmxt_textrmsb): Likewise.
 852         (iwmmxt_textrmuh): Likewise.
 853         (iwmmxt_textrmsh): Likewise.
 854         (iwmmxt_textrmw): Likewise.
 855         (iwmxxt_wshufh): Likewise.
 856         (eqv8qi3): Likewise.
 857         (eqv4hi3): Likewise.
 858         (eqv2si3): Likewise.
 859         (gtuv8qi3): Likewise.
 860         (gtuv4hi3): Likewise.
 861         (gtuv2si3): Likewise.
 862         (gtv8qi3): Likewise.
 863         (gtv4hi3): Likewise.
 864         (gtv2si3): Likewise.
 865         (smax<mode>3_iwmmxt): Likewise.
 866         (umax<mode>3_iwmmxt): Likewise.
 867         (smin<mode>3_iwmmxt): Likewise.
 868         (umin<mode>3_iwmmxt): Likewise.
 869         (iwmmxt_wpackhss): Likewise.
 870         (iwmmxt_wpackwss): Likewise.
 871         (iwmmxt_wpackdss): Likewise.
 872         (iwmmxt_wpackhus): Likewise.
 873         (iwmmxt_wpackwus): Likewise.
 874         (iwmmxt_wpackdus): Likewise.
 875         (iwmmxt_wunpckihb): Likewise.
 876         (iwmmxt_wunpckihh): Likewise.
 877         (iwmmxt_wunpckihw): Likewise.
 878         (iwmmxt_wunpckilb): Likewise.
 879         (iwmmxt_wunpckilh): Likewise.
 880         (iwmmxt_wunpckilw): Likewise.
 881         (iwmmxt_wunpckehub): Likewise.
 882         (iwmmxt_wunpckehuh): Likewise.
 883         (iwmmxt_wunpckehuw): Likewise.
 884         (iwmmxt_wunpckehsb): Likewise.
 885         (iwmmxt_wunpckehsh): Likewise.
 886         (iwmmxt_wunpckehsw): Likewise.
 887         (iwmmxt_wunpckelub): Likewise.
 888         (iwmmxt_wunpckeluh): Likewise.
 889         (iwmmxt_wunpckeluw): Likewise.
 890         (iwmmxt_wunpckelsb): Likewise.
 891         (iwmmxt_wunpckelsh): Likewise.
 892         (iwmmxt_wunpckelsw): Likewise.
 893         (ror<mode>3): Likewise.
 894         (ashr<mode>3_iwmmxt): Likewise.
 895         (lshr<mode>3_iwmmxt): Likewise.
 896         (ashl<mode>3_iwmmxt): Likewise.
 897         (ror<mode>3_di): Likewise.
 898         (ashr<mode>3_di): Likewise.
 899         (lshr<mode>3_di): Likewise.
 900         (ashl<mode>3_di): Likewise.
 901         (iwmmxt_wmadds): Likewise.
 902         (iwmmxt_wmaddu): Likewise.
 903         (iwmmxt_tmia): Likewise.
 904         (iwmmxt_tmiaph): Likewise.
 905         (iwmmxt_tmiabb): Likewise.
 906         (iwmmxt_tmiatb): Likewise.
 907         (iwmmxt_tmiabt): Likewise.
 908         (iwmmxt_tmiatt): Likewise.
 909         (iwmmxt_tmovmskb): Likewise.
 910         (iwmmxt_tmovmskh): Likewise.
 911         (iwmmxt_tmovmskw): Likewise.
 912         (iwmmxt_waccb): Likewise.
 913         (iwmmxt_wacch): Likewise.
 914         (iwmmxt_waccw): Likewise.
 915         (iwmmxt_waligni): Likewise.
 916         (iwmmxt_walignr): Likewise.
 917         (iwmmxt_walignr0): Likewise.
 918         (iwmmxt_walignr1): Likewise.
 919         (iwmmxt_walignr2): Likewise.
 920         (iwmmxt_walignr3): Likewise.
 921         (iwmmxt_wsadb): Likewise.
 922         (iwmmxt_wsadh): Likewise.
 923         (iwmmxt_wsadbz): Likewise.
 924         (iwmmxt_wsadhz): Likewise.
 925         * iwmmxt2.md (iwmmxt_wabs<mode>3): Update for attribute changes.
 926         (iwmmxt_wabsdiffb): Likewise.
 927         (iwmmxt_wabsdiffh): Likewise.
 928         (iwmmxt_wabsdiffw): Likewise.
 929         (iwmmxt_waddsubhx): Likewise
 930         (iwmmxt_wsubaddhx): Likewise.
 931         (addc<mode>3): Likewise.
 932         (iwmmxt_avg4): Likewise.
 933         (iwmmxt_avg4r): Likewise.
 934         (iwmmxt_wmaddsx): Likewise.
 935         (iwmmxt_wmaddux): Likewise.
 936         (iwmmxt_wmaddsn): Likewise.
 937         (iwmmxt_wmaddun): Likewise.
 938         (iwmmxt_wmulwsm): Likewise.
 939         (iwmmxt_wmulwum): Likewise.
 940         (iwmmxt_wmulsmr): Likewise.
 941         (iwmmxt_wmulumr): Likewise.
 942         (iwmmxt_wmulwsmr): Likewise.
 943         (iwmmxt_wmulwumr): Likewise.
 944         (iwmmxt_wmulwl): Likewise.
 945         (iwmmxt_wqmulm): Likewise.
 946         (iwmmxt_wqmulwm): Likewise.
 947         (iwmmxt_wqmulmr): Likewise.
 948         (iwmmxt_wqmulwmr): Likewise.
 949         (iwmmxt_waddbhusm): Likewise.
 950         (iwmmxt_waddbhusl): Likewise.
 951         (iwmmxt_wqmiabb): Likewise.
 952         (iwmmxt_wqmiabt): Likewise.
 953         (iwmmxt_wqmiatb): Likewise.
 954         (iwmmxt_wqmiatt): Likewise.
 955         (iwmmxt_wqmiabbn): Likewise.
 956         (iwmmxt_wqmiabtn): Likewise.
 957         (iwmmxt_wqmiatbn): Likewise.
 958         (iwmmxt_wqmiattn): Likewise.
 959         (iwmmxt_wmiabb): Likewise.
 960         (iwmmxt_wmiabt): Likewise.
 961         (iwmmxt_wmiatb): Likewise.
 962         (iwmmxt_wmiatt): Likewise.
 963         (iwmmxt_wmiabbn): Likewise.
 964         (iwmmxt_wmiabtn): Likewise.
 965         (iwmmxt_wmiatbn): Likewise.
 966         (iwmmxt_wmiattn): Likewise.
 967         (iwmmxt_wmiawbb): Likewise.
 968         (iwmmxt_wmiawbt): Likewise.
 969         (iwmmxt_wmiawtb): Likewise.
 970         (iwmmxt_wmiawtt): Likewise.
 971         (iwmmxt_wmiawbbn): Likewise.
 972         (iwmmxt_wmiawbtn): Likewise.
 973         (iwmmxt_wmiawtbn): Likewise.
 974         (iwmmxt_wmiawttn): Likewise.
 975         (iwmmxt_wmerge): Likewise.
 976         (iwmmxt_tandc<mode>3): Likewise.
 977         (iwmmxt_torc<mode>3): Likewise.
 978         (iwmmxt_torvsc<mode>3): Likewise.
 979         (iwmmxt_textrc<mode>3): Likewise.
 980         * marvell-f-iwmmxt.md (wmmxt_shift): Update for attribute changes.
 981         (wmmxt_pack): Likewise.
 982         (wmmxt_mult_c1): Likewise.
 983         (wmmxt_mult_c2): Likewise.
 984         (wmmxt_alu_c1): Likewise.
 985         (wmmxt_alu_c2): Likewise.
 986         (wmmxt_alu_c3): Likewise.
 987         (wmmxt_transfer_c1): Likewise.
 988         (wmmxt_transfer_c2): Likewise.
 989         (wmmxt_transfer_c3): Likewise.
 990         (marvell_f_iwmmxt_wstr): Likewise.
 991         (marvell_f_iwmmxt_wldr): Likewise.
 992
 993 2013-08-07  Christophe Lyon  <christophe.lyon@linaro.org>
 994
 995         Backport from trunk r201237.
 996         2013-07-25  Terry Guo  <terry.guo@arm.com>
 997
 998         * config/arm/arm.c (thumb1_size_rtx_costs): Assign proper cost for
 999         shift_add/shift_sub0/shift_sub1 RTXs.
1000
1001 2013-08-06  Christophe Lyon  <christophe.lyon@linaro.org>
1002
1003         Backport from trunk r200596,201067,201083.
1004         2013-07-02  Ian Bolton  <ian.bolton@arm.com>
1005
1006         * config/aarch64/aarch64-simd.md (absdi2): Support abs for
1007         DI mode.
1008
1009         2013-07-19  Ian Bolton  <ian.bolton@arm.com>
1010
1011         * config/aarch64/arm_neon.h (vabs_s64): New function
1012
1013         2013-07-20  James Greenhalgh  <james.greenhalgh@arm.com>
1014
1015         * config/aarch64/aarch64-builtins.c
1016         (aarch64_fold_builtin): Fold abs in all modes.
1017         * config/aarch64/aarch64-simd-builtins.def
1018         (abs): Enable for all modes.
1019         * config/aarch64/arm_neon.h
1020         (vabs<q>_s<8,16,32,64): Rewrite using builtins.
1021         (vabs_f64): Add missing intrinsic.
1022
1023 2013-08-06  Christophe Lyon  <christophe.lyon@linaro.org>
1024
1025         Backport from trunk r198735,198831,199959.
1026         2013-05-09  Sofiane Naci  <sofiane.naci@arm.com>
1027
1028         * config/aarch64/aarch64.md: New movtf split.
1029         (*movtf_aarch64): Update.
1030         (aarch64_movdi_tilow): Handle TF modes and rename to
1031         aarch64_movdi_<mode>low.
1032         (aarch64_movdi_tihigh): Handle TF modes and rename to
1033         aarch64_movdi_<mode>high
1034         (aarch64_movtihigh_di): Handle TF modes and rename to
1035         aarch64_mov<mode>high_di
1036         (aarch64_movtilow_di): Handle TF modes and rename to
1037         aarch64_mov<mode>low_di
1038         (aarch64_movtilow_tilow): Remove spurious whitespace.
1039         * config/aarch64/aarch64.c (aarch64_split_128bit_move): Handle TFmode
1040         splits.
1041         (aarch64_print_operand): Update.
1042
1043         2013-05-13  Sofiane Naci  <sofiane.naci@arm.com>
1044
1045         * config/aarch64/aarch64-simd.md (aarch64_simd_mov<mode>): Group
1046         similar switch cases.
1047         (aarch64_simd_mov): Rename to aarch64_split_simd_mov. Update.
1048         (aarch64_simd_mov_to_<mode>low): Delete.
1049         (aarch64_simd_mov_to_<mode>high): Delete.
1050         (move_lo_quad_<mode>): Add w<-r alternative.
1051         (aarch64_simd_move_hi_quad_<mode>): Likewise.
1052         (aarch64_simd_mov_from_*): Update type attribute.
1053         * config/aarch64/aarch64.c (aarch64_split_simd_move): Refacror switch
1054         statement.
1055
1056         2013-06-11  Sofiane Naci  <sofiane.naci@arm.com>
1057
1058         * config/aarch64/aarch64-simd.md (move_lo_quad_<mode>): Update.
1059
1060 2013-08-06  Christophe Lyon  <christophe.lyon@linaro.org>
1061
1062         Backport from trunk r199438,199439,201326.
1063
1064         2013-05-30  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1065
1066         * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): New added.
1067         (arm_emit_multi_reg_pop): Add REG_CFA_ADJUST_CFA notes.
1068         (arm_emit_vfp_multi_reg_pop): Likewise.
1069         (thumb2_emit_ldrd_pop): Likewise.
1070         (arm_expand_epilogue): Add misc REG_CFA notes.
1071         (arm_unwind_emit): Skip REG_CFA_ADJUST_CFA and REG_CFA_RESTORE.
1072
1073         2013-05-30  Bernd Schmidt  <bernds@codesourcery.com>
1074             Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1075
1076         * config/arm/arm-protos.h: Add and update function protos.
1077         * config/arm/arm.c (use_simple_return_p): New added.
1078         (thumb2_expand_return): Check simple_return flag.
1079         * config/arm/arm.md: Add simple_return and conditional simple_return.
1080         * config/arm/iterators.md: Add iterator for return and simple_return.
1081
1082         2013-07-30  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1083
1084         PR rtl-optimization/57637
1085         * function.c (move_insn_for_shrink_wrap): Also check the
1086         GEN set of the LIVE problem for the liveness analysis
1087         if it exists, otherwise give up.
1088
1089 2013-08-06  Christophe Lyon  <christophe.lyon@linaro.org>
1090
1091         Backport from trunk r198928,198973,199203,201240,201241,201307.
1092         2013-05-15  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1093
1094         PR target/19599
1095         * config/arm/predicates.md (call_insn_operand): New predicate.
1096         * config/arm/constraints.md ("Cs", "Ss"):  New constraints.
1097         * config/arm/arm.md (*call_insn, *call_value_insn): Match only
1098         if insn is not a tail call.
1099         (*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through
1100         registers.
1101         * config/arm/arm.h (enum reg_class): New caller save register class.
1102         (REG_CLASS_NAMES): Likewise.
1103         (REG_CLASS_CONTENTS): Likewise.
1104         * config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling
1105         without decls.
1106
1107         2013-05-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1108
1109         PR target/19599
1110         * config/arm/arm.c (arm_function_ok_for_sibcall): Add check
1111         for NULL decl.
1112
1113         2013-05-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1114
1115         PR target/19599
1116         PR target/57340
1117         * config/arm/arm.c (any_sibcall_uses_r3): Rename to ..
1118         (any_sibcall_could_use_r3): this and handle indirect calls.
1119         (arm_get_frame_offsets): Rename use of any_sibcall_uses_r3.
1120
1121         2013-07-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1122
1123         PR target/19599
1124         PR target/57731
1125         PR target/57748
1126         * config/arm/arm.md ("*sibcall_value_insn): Replace use of
1127         Ss with US. Adjust output for v5 and v4t.
1128         (*sibcall_value_insn): Likewise and loosen predicate on
1129         operand0.
1130         * config/arm/constraints.md ("Ss"): Rename to US.
1131
1132         2013-07-25  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1133
1134         * config/arm/arm.md (*sibcall_insn): Remove unnecessary space.
1135
1136         2013-07-29  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1137         Fix incorrect changelog entry.
1138
1139         Replace
1140         PR target/57748
1141         with
1142         PR target/57837
1143
1144 2013-08-05  Yvan Roux  <yvan.roux@linaro.org>
1145
1146         Backport from trunk r200922.
1147         2013-07-12  Tejas Belagod  <tejas.belagod@arm.com>
1148
1149         * config/aarch64/aarch64-protos.h
1150         (aarch64_simd_immediate_valid_for_move): Remove.
1151         * config/aarch64/aarch64.c (simd_immediate_info): New member.
1152         (aarch64_simd_valid_immediate): Recognize idioms for shifting ones
1153         cases.
1154         (aarch64_output_simd_mov_immediate): Print the correct shift specifier.
1155
1156 2013-08-05  Yvan Roux  <yvan.roux@linaro.org>
1157
1158         Backport from trunk r200670.
1159         2013-07-04  Tejas Belagod  <tejas.belagod@arm.com>
1160
1161         * config/aarch64/aarch64-protos.h (cpu_vector_cost): New.
1162         (tune_params): New member 'const vec_costs'.
1163         * config/aarch64/aarch64.c (generic_vector_cost): New.
1164         (generic_tunings): New member 'generic_vector_cost'.
1165         (aarch64_builtin_vectorization_cost): New.
1166         (aarch64_add_stmt_cost): New.
1167         (TARGET_VECTORIZE_ADD_STMT_COST): New.
1168         (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): New.
1169
1170 2013-08-05  Yvan Roux  <yvan.roux@linaro.org>
1171
1172         Backport from trunk r200637.
1173         2013-07-03  Yufeng Zhang  <yufeng.zhang@arm.com>
1174
1175         * config/aarch64/aarch64.h (enum arm_abi_type): Remove.
1176         (ARM_ABI_AAPCS64): Ditto.
1177         (arm_abi): Ditto.
1178         (ARM_DEFAULT_ABI): Ditto.
1179
1180 2013-08-05  Yvan Roux  <yvan.roux@linaro.org>
1181
1182         Backport from trunk r200532, r200565.
1183         2013-06-28  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1184
1185         * config/aarch64/aarch64.c (aarch64_cannot_force_const_mem): Adjust
1186         layout.
1187
1188         2013-06-29  Yufeng Zhang  <yufeng.zhang@arm.com>
1189
1190         * config/aarch64/aarch64.c: Remove junk from the beginning of the
1191         file.
1192
1193 2013-08-05  Yvan Roux  <yvan.roux@linaro.org>
1194
1195         Backport from trunk r200531.
1196         2013-06-28  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1197
1198         * config/aarch64/aarch64-protos.h (aarch64_symbol_type):
1199         Update comment w.r.t SYMBOL_TINY_ABSOLUTE.
1200
1201 2013-08-05  Yvan Roux  <yvan.roux@linaro.org>
1202
1203         Backport from trunk r200519.
1204         2013-06-28  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1205
1206         * config/aarch64/aarch64-protos.h
1207         aarch64_classify_symbol_expression): Define.
1208         (aarch64_symbolic_constant_p): Remove.
1209         * config/aarch64/aarch64.c (aarch64_classify_symbol_expression): Remove
1210         static.  Fix line length and white space.
1211         (aarch64_symbolic_constant_p): Remove.
1212         * config/aarch64/predicates.md (aarch64_valid_symref):
1213         Use aarch64_classify_symbol_expression.
1214
1215 2013-08-05  Yvan Roux  <yvan.roux@linaro.org>
1216
1217         Backport from trunk r200466, r200467.
1218         2013-06-27  Yufeng Zhang  <yufeng.zhang@arm.com>
1219
1220         * config/aarch64/aarch64.c (aarch64_force_temporary): Add an extra
1221         parameter 'mode' of type 'enum machine_mode mode'; change to pass
1222         'mode' to force_reg.
1223         (aarch64_add_offset): Update calls to aarch64_force_temporary.
1224         (aarch64_expand_mov_immediate): Likewise.
1225
1226         2013-06-27  Yufeng Zhang  <yufeng.zhang@arm.com>
1227
1228         * config/aarch64/aarch64.c (aarch64_add_offset): Change to pass
1229         'mode' to aarch64_plus_immediate and gen_rtx_PLUS.
1230
1231 2013-08-05  Yvan Roux  <yvan.roux@linaro.org>
1232
1233         Backport from trunk r200419.
1234         2013-06-26  Greta Yorsh  <Greta.Yorsh@arm.com>
1235
1236         * config/arm/arm.h (MAX_CONDITIONAL_EXECUTE): Define macro.
1237         * config/arm/arm-protos.h (arm_max_conditional_execute): New
1238         declaration.
1239         (tune_params): Update comment.
1240         * config/arm/arm.c (arm_cortex_a15_tune): Set max_cond_insns to 2.
1241         (arm_max_conditional_execute): New function.
1242         (thumb2_final_prescan_insn): Use max_insn_skipped and
1243         MAX_INSN_PER_IT_BLOCK to compute maximum instructions in a block.
1244
1245 2013-07-24  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1246
1247         * LINARO-VERSION: Bump version.
1248
1249 2013-07-19  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1250
1251         GCC Linaro 4.8-2013.07-1 released.
1252
1253 2013-07-19  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1254
1255         Backport from trunk r201005.
1256         2013-07-17  Yvan Roux  <yvan.roux@linaro.org>
1257
1258         PR target/57909
1259         * config/arm/arm.c (gen_movmem_ldrd_strd): Fix unaligned load/store
1260         usage in HI mode.
1261
1262 2013-07-05  Christophe Lyon  <christophe.lyon@linaro.org>
1263
1264         GCC Linaro 4.8-2013.07 released.
1265
1266 2013-07-03  Christophe Lyon  <christophe.lyon@linaro.org>
1267
1268         Revert backport from trunk r198928,198973,199203.
1269         2013-05-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1270
1271         PR target/19599
1272         PR target/57340
1273         * config/arm/arm.c (any_sibcall_uses_r3): Rename to ..
1274         (any_sibcall_could_use_r3): this and handle indirect calls.
1275         (arm_get_frame_offsets): Rename use of any_sibcall_uses_r3.
1276
1277         2013-05-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1278
1279         PR target/19599
1280         * config/arm/arm.c (arm_function_ok_for_sibcall): Add check
1281         for NULL decl.
1282
1283         2013-05-15  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1284
1285         PR target/19599
1286         * config/arm/predicates.md (call_insn_operand): New predicate.
1287         * config/arm/constraints.md ("Cs", "Ss"):  New constraints.
1288         * config/arm/arm.md (*call_insn, *call_value_insn): Match only
1289         if insn is not a tail call.
1290         (*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through
1291         registers.
1292         * config/arm/arm.h (enum reg_class): New caller save register class.
1293         (REG_CLASS_NAMES): Likewise.
1294         (REG_CLASS_CONTENTS): Likewise.
1295         * config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling
1296         without decls.
1297
1298 2013-07-03  Christophe Lyon  <christophe.lyon@linaro.org>
1299
1300         Revert backport from mainline (r199438, r199439)
1301         2013-05-30  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1302
1303         * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): New added.
1304         (arm_emit_multi_reg_pop): Add REG_CFA_ADJUST_CFA notes.
1305         (arm_emit_vfp_multi_reg_pop): Likewise.
1306         (thumb2_emit_ldrd_pop): Likewise.
1307         (arm_expand_epilogue): Add misc REG_CFA notes.
1308         (arm_unwind_emit): Skip REG_CFA_ADJUST_CFA and REG_CFA_RESTORE.
1309
1310         2013-05-30  Bernd Schmidt  <bernds@codesourcery.com>
1311                     Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1312
1313         * config/arm/arm-protos.h: Add and update function protos.
1314         * config/arm/arm.c (use_simple_return_p): New added.
1315         (thumb2_expand_return): Check simple_return flag.
1316         * config/arm/arm.md: Add simple_return and conditional simple_return.
1317         * config/arm/iterators.md: Add iterator for return and simple_return.
1318         * gcc.dg/shrink-wrap-alloca.c: New added.
1319         * gcc.dg/shrink-wrap-pretend.c: New added.
1320         * gcc.dg/shrink-wrap-sibcall.c: New added.
1321
1322 2013-07-03  Christophe Lyon  <christophe.lyon@linaro.org>
1323
1324         Backport from trunk r199640, 199705, 199733, 199734, 199739.
1325         2013-06-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1326
1327         * rtl.def: Add extra fourth optional field to define_cond_exec.
1328         * gensupport.c (process_one_cond_exec): Process attributes from
1329         define_cond_exec.
1330         * doc/md.texi: Document fourth field in define_cond_exec.
1331
1332         2013-06-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1333
1334         * config/arm/arm.md (enabled_for_depr_it): New attribute.
1335         (predicable_short_it): Likewise.
1336         (predicated): Likewise.
1337         (enabled): Handle above.
1338         (define_cond_exec): Set predicated attribute to yes.
1339
1340         2013-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1341
1342         * config/arm/sync.md (atomic_loaddi_1):
1343         Disable predication for arm_restrict_it.
1344         (arm_load_exclusive<mode>): Likewise.
1345         (arm_load_exclusivesi): Likewise.
1346         (arm_load_exclusivedi): Likewise.
1347         (arm_load_acquire_exclusive<mode>): Likewise.
1348         (arm_load_acquire_exclusivesi): Likewise.
1349         (arm_load_acquire_exclusivedi): Likewise.
1350         (arm_store_exclusive<mode>): Likewise.
1351         (arm_store_exclusive<mode>): Likewise.
1352         (arm_store_release_exclusivedi): Likewise.
1353         (arm_store_release_exclusive<mode>): Likewise.
1354
1355         2013-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1356
1357         * config/arm/arm-ldmstm.ml: Set "predicable_short_it" to "no"
1358         where appropriate.
1359         * config/arm/ldmstm.md: Regenerate.
1360
1361         2013-06-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1362
1363         * config/arm/arm-fixed.md (add<mode>3,usadd<mode>3,ssadd<mode>3,
1364         sub<mode>3, ussub<mode>3, sssub<mode>3, arm_ssatsihi_shift,
1365         arm_usatsihi): Adjust alternatives for arm_restrict_it.
1366
1367 2013-07-02  Rob Savoye  <rob.savoye@linaro.org>
1368
1369         Backport from trunk 200096
1370
1371         2013-06-14  Vidya Praveen <vidyapraveen@arm.com>
1372
1373         * config/aarch64/aarch64-simd.md (aarch64_<su>mlal_lo<mode>):
1374         New pattern.
1375         (aarch64_<su>mlal_hi<mode>, aarch64_<su>mlsl_lo<mode>): Likewise.
1376         (aarch64_<su>mlsl_hi<mode>, aarch64_<su>mlal<mode>): Likewise.
1377         (aarch64_<su>mlsl<mode>): Likewise.
1378
1379 2013-07-02  Rob Savoye  <rob.savoye@linaro.org>
1380
1381         Backport from trunk 200062
1382
1383         2013-06-13  Bin Cheng  <bin.cheng@arm.com>
1384         * fold-const.c (operand_equal_p): Consider NOP_EXPR and
1385         CONVERT_EXPR as equal nodes.
1386
1387 2013-07-02  Rob Savoye  <rob.savoye@linaro.org>
1388         Backport from trunk 199810
1389
1390         2013-06-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1391
1392         * config/arm/arm.md (anddi3_insn): Remove duplicate alternatives.
1393         Clean up alternatives.
1394
1395 2013-06-20  Rob Savoye  <rob.savoye@linaro.org>
1396
1397         Backport from trunk 200152
1398         2013-06-17  Sofiane Naci  <sofiane.naci@arm.com>
1399
1400         * config/aarch64/aarch64-simd.md (aarch64_dup_lane<mode>): Add r<-w
1401         alternative and update.
1402         (aarch64_dup_lanedi): Delete.
1403         * config/aarch64/arm_neon.h (vdup<bhsd>_lane_*): Update.
1404         * config/aarch64/aarch64-simd-builtins.def: Update.
1405
1406 2013-06-20  Rob Savoye  <rob.savoye@linaro.org>
1407
1408         Backport from trunk 200061
1409         2013-06-13  Bin Cheng  <bin.cheng@arm.com>
1410
1411         * rtlanal.c (noop_move_p): Check the code to be executed for
1412         COND_EXEC.
1413
1414 2013-06-20  Rob Savoye  <rob.savoye@linaro.org>
1415
1416         Backport from trunk 199694
1417         2013-06-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1418
1419         * config/arm/arm.c (MAX_INSN_PER_IT_BLOCK): New macro.
1420         (arm_option_override): Override arm_restrict_it where appropriate.
1421         (thumb2_final_prescan_insn): Use MAX_INSN_PER_IT_BLOCK.
1422         * config/arm/arm.opt (mrestrict-it): New command-line option.
1423         * doc/invoke.texi: Document -mrestrict-it.
1424
1425 2013-06-20  Christophe Lyon  <christophe.lyon@linaro.org>
1426
1427         Backport from trunk r198683.
1428         2013-05-07  Christophe Lyon  <christophe.lyon@linaro.org>
1429
1430         * config/arm/arm.c (arm_asan_shadow_offset): New function.
1431         (TARGET_ASAN_SHADOW_OFFSET): Define.
1432         * config/arm/linux-eabi.h (ASAN_CC1_SPEC): Define.
1433         (LINUX_OR_ANDROID_CC): Add ASAN_CC1_SPEC.
1434
1435 2013-06-11  Rob Savoye  <rob.savoye@linaro.org>
1436
1437         GCC Linaro gcc-linaro-4.8-2013.06 released.
1438
1439 2013-06-06  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1440
1441         Backport from mainline (r199438, r199439)
1442         2013-05-30  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1443
1444         * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): New added.
1445         (arm_emit_multi_reg_pop): Add REG_CFA_ADJUST_CFA notes.
1446         (arm_emit_vfp_multi_reg_pop): Likewise.
1447         (thumb2_emit_ldrd_pop): Likewise.
1448         (arm_expand_epilogue): Add misc REG_CFA notes.
1449         (arm_unwind_emit): Skip REG_CFA_ADJUST_CFA and REG_CFA_RESTORE.
1450
1451         2013-05-30  Bernd Schmidt  <bernds@codesourcery.com>
1452                     Zhenqiang Chen  <zhenqiang.chen@linaro.org>
1453
1454         * config/arm/arm-protos.h: Add and update function protos.
1455         * config/arm/arm.c (use_simple_return_p): New added.
1456         (thumb2_expand_return): Check simple_return flag.
1457         * config/arm/arm.md: Add simple_return and conditional simple_return.
1458         * config/arm/iterators.md: Add iterator for return and simple_return.
1459         * gcc.dg/shrink-wrap-alloca.c: New added.
1460         * gcc.dg/shrink-wrap-pretend.c: New added.
1461         * gcc.dg/shrink-wrap-sibcall.c: New added.
1462
1463 2013-06-06  Kugan Vivekanandarajah  <kuganv@linaro.org>
1464
1465         Backport from mainline r198879:
1466
1467         2013-05-14  Chung-Lin Tang  <cltang@codesourcery.com>
1468         PR target/42017
1469         * config/arm/arm.h (EPILOGUE_USES): Only return true
1470         for LR_REGNUM after epilogue_completed.
1471
1472 2013-06-05  Christophe Lyon  <christophe.lyon@linaro.org>
1473
1474         Backport from trunk r199652,199653,199656,199657,199658.
1475
1476         2013-06-04  Ian Bolton  <ian.bolton@arm.com>
1477
1478         * config/aarch64/aarch64.md (*mov<mode>_aarch64): Call
1479         into function to generate MOVI instruction.
1480         * config/aarch64/aarch64.c (aarch64_simd_container_mode):
1481         New function.
1482         (aarch64_preferred_simd_mode): Turn into wrapper.
1483         (aarch64_output_scalar_simd_mov_immediate): New function.
1484         * config/aarch64/aarch64-protos.h: Add prototype for above.
1485
1486         2013-06-04  Ian Bolton  <ian.bolton@arm.com>
1487
1488         * config/aarch64/aarch64.c (simd_immediate_info): Remove
1489         element_char member.
1490         (sizetochar): Return signed char.
1491         (aarch64_simd_valid_immediate): Remove elchar and other
1492         unnecessary variables.
1493         (aarch64_output_simd_mov_immediate): Take rtx instead of &rtx.
1494         Calculate element_char as required.
1495         * config/aarch64/aarch64-protos.h: Update and move prototype
1496         for aarch64_output_simd_mov_immediate.
1497         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>):
1498         Update arguments.
1499
1500         2013-06-04  Ian Bolton  <ian.bolton@arm.com>
1501
1502         * config/aarch64/aarch64.c (simd_immediate_info): Struct to hold
1503         information completed by aarch64_simd_valid_immediate.
1504         (aarch64_legitimate_constant_p): Update arguments.
1505         (aarch64_simd_valid_immediate): Work with struct rather than many
1506         pointers.
1507         (aarch64_simd_scalar_immediate_valid_for_move): Update arguments.
1508         (aarch64_simd_make_constant): Update arguments.
1509         (aarch64_output_simd_mov_immediate): Work with struct rather than
1510         many pointers.  Output immediate directly rather than as operand.
1511         * config/aarch64/aarch64-protos.h (aarch64_simd_valid_immediate):
1512         Update prototype.
1513         * config/aarch64/constraints.md (Dn): Update arguments.
1514
1515         2013-06-04  Ian Bolton  <ian.bolton@arm.com>
1516
1517         * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): No
1518         longer static.
1519         (aarch64_simd_immediate_valid_for_move): Remove.
1520         (aarch64_simd_scalar_immediate_valid_for_move): Update call.
1521         (aarch64_simd_make_constant): Update call.
1522         (aarch64_output_simd_mov_immediate): Update call.
1523         * config/aarch64/aarch64-protos.h (aarch64_simd_valid_immediate):
1524         Add prototype.
1525         * config/aarch64/constraints.md (Dn): Update call.
1526
1527         2013-06-04  Ian Bolton  <ian.bolton@arm.com>
1528
1529         * config/aarch64/aarch64.c (aarch64_simd_valid_immediate): Change
1530         return type to bool for prototype.
1531         (aarch64_legitimate_constant_p): Check for true instead of not -1.
1532         (aarch64_simd_valid_immediate): Fix up each return to return a bool.
1533         (aarch64_simd_immediate_valid_for_move): Update retval for bool.
1534
1535 2013-06-04  Christophe Lyon  <christophe.lyon@linaro.org>
1536
1537         Backport from trunk r199261.
1538         2013-05-23  Christian Bruel  <christian.bruel@st.com>
1539
1540         PR debug/57351
1541         * config/arm/arm.c (arm_dwarf_register_span): Do not use dbx number.
1542
1543 2013-06-03  Christophe Lyon  <christophe.lyon@linaro.org>
1544
1545         Backport from trunk
1546         r198890,199254,199259,199260,199293,199407,199408,199454,199544,199545.
1547
1548         2013-05-31  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1549
1550         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
1551         Remove un-necessary braces.
1552
1553         2013-05-31  Marcus Shawcroft  <marcus.shawcroft@arm.com>
1554
1555         * config/aarch64/aarch64.c (aarch64_classify_symbol):
1556         Use SYMBOL_TINY_ABSOLUTE for AARCH64_CMODEL_TINY_PIC.
1557
1558         2013-05-30  Ian Bolton  <ian.bolton@arm.com>
1559
1560         * config/aarch64/aarch64.md (insv<mode>): New define_expand.
1561         (*insv_reg<mode>): New define_insn.
1562
1563         2012-05-29  Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
1564             Marcus Shawcroft  <marcus.shawcroft@arm.com>
1565
1566         * config/aarch64/aarch64-protos.h (aarch64_symbol_type): Define
1567         SYMBOL_TINY_ABSOLUTE.
1568         * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Handle
1569         SYMBOL_TINY_ABSOLUTE.
1570         (aarch64_expand_mov_immediate): Likewise.
1571         (aarch64_classify_symbol): Likewise.
1572         (aarch64_mov_operand_p): Remove ATTRIBUTE_UNUSED.
1573         Permit SYMBOL_TINY_ABSOLUTE.
1574         * config/aarch64/predicates.md (aarch64_mov_operand): Permit CONST.
1575
1576         2013-05-29  Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
1577             Marcus Shawcroft  <marcus.shawcroft@arm.com>
1578
1579         * config/aarch64/aarch64.c (aarch64_classify_symbol): Remove comment.
1580         Refactor if/switch.  Replace gcc_assert with if.
1581
1582         2013-05-24  Ian Bolton  <ian.bolton@arm.com>
1583
1584         * config/aarch64/aarch64.c (aarch64_print_operand): Change the
1585         X format specifier to only display bottom 16 bits.
1586         * config/aarch64/aarch64.md (insv_imm<mode>): Allow any size of
1587         immediate to match for operand 2, since it will be masked.
1588
1589         2013-05-23  Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
1590             Marcus Shawcroft  <marcus.shawcroft@arm.com>
1591
1592         * config/aarch64/aarch64.md (*movdi_aarch64): Replace Usa with S.
1593         * config/aarch64/constraints.md (Usa): Remove.
1594         * doc/md.texi (AArch64 Usa): Remove.
1595
1596         2013-05-23  Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
1597             Marcus Shawcroft  <marcus.shawcroft@arm.com>
1598
1599         * config/aarch64/aarch64-protos.h (aarch64_mov_operand_p): Define.
1600         * config/aarch64/aarch64.c (aarch64_mov_operand_p): Define.
1601         * config/aarch64/predicates.md (aarch64_const_address): Remove.
1602         (aarch64_mov_operand): Use aarch64_mov_operand_p.
1603
1604         2013-05-23  Vidya Praveen <vidyapraveen@arm.com>
1605
1606         * config/aarch64/aarch64-simd.md (clzv4si2): Support for CLZ
1607         instruction (AdvSIMD).
1608         * config/aarch64/aarch64-builtins.c
1609         (aarch64_builtin_vectorized_function): Handler for BUILT_IN_CLZ.
1610         * config/aarch64/aarch-simd-builtins.def: Entry for CLZ.
1611
1612         2013-05-14  James Greenhalgh  <james.greenhalgh@arm.com>
1613
1614         * config/aarch64/aarch64-simd.md
1615         (aarch64_vcond_internal<mode>): Rename to...
1616         (aarch64_vcond_internal<mode><mode>): ...This, for integer modes.
1617         (aarch64_vcond_internal<VDQF_COND:mode><VDQF:mode>): ...This for
1618         float modes. Clarify all iterator modes.
1619         (vcond<mode><mode>): Use new name for vcond expanders.
1620         (vcond<v_cmp_result><mode>): Likewise.
1621         (vcondu<mode><mode>: Likewise.
1622         * config/aarch64/iterators.md (VDQF_COND): New.
1623
1624 2013-05-29  Christophe Lyon  <christophe.lyon@linaro.org>
1625
1626         Backport from trunk r198928,198973,199203.
1627         2013-05-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1628
1629         PR target/19599
1630         PR target/57340
1631         * config/arm/arm.c (any_sibcall_uses_r3): Rename to ..
1632         (any_sibcall_could_use_r3): this and handle indirect calls.
1633         (arm_get_frame_offsets): Rename use of any_sibcall_uses_r3.
1634
1635         2013-05-16  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1636
1637         PR target/19599
1638         * config/arm/arm.c (arm_function_ok_for_sibcall): Add check
1639         for NULL decl.
1640
1641         2013-05-15  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1642
1643         PR target/19599
1644         * config/arm/predicates.md (call_insn_operand): New predicate.
1645         * config/arm/constraints.md ("Cs", "Ss"):  New constraints.
1646         * config/arm/arm.md (*call_insn, *call_value_insn): Match only
1647         if insn is not a tail call.
1648         (*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through
1649         registers.
1650         * config/arm/arm.h (enum reg_class): New caller save register class.
1651         (REG_CLASS_NAMES): Likewise.
1652         (REG_CLASS_CONTENTS): Likewise.
1653         * config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling
1654         without decls.
1655
1656 2013-05-28  Christophe Lyon  <christophe.lyon@linaro.org>
1657
1658         Backport from trunk r198680.
1659         2013-05-07  Sofiane Naci  <sofiane.naci@arm.com>
1660
1661         * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>): call splitter.
1662         (aarch64_simd_mov<mode>): New expander.
1663         (aarch64_simd_mov_to_<mode>low): New instruction pattern.
1664         (aarch64_simd_mov_to_<mode>high): Likewise.
1665         (aarch64_simd_mov_from_<mode>low): Likewise.
1666         (aarch64_simd_mov_from_<mode>high): Likewise.
1667         (aarch64_dup_lane<mode>): Update.
1668         (aarch64_dup_lanedi): New instruction pattern.
1669         * config/aarch64/aarch64-protos.h (aarch64_split_simd_move): New prototype.
1670         * config/aarch64/aarch64.c (aarch64_split_simd_move): New function.
1671
1672 2013-05-28  Christophe Lyon  <christophe.lyon@linaro.org>
1673
1674         Backport from trunk r198497-198500.
1675         2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>
1676
1677         * config/aarch64/aarch64-builtins.c
1678         (aarch64_gimple_fold_builtin.c): Fold more modes for reduc_splus_.
1679         * config/aarch64/aarch64-simd-builtins.def
1680         (reduc_splus_): Add new modes.
1681         (reduc_uplus_): New.
1682         * config/aarch64/aarch64-simd.md (aarch64_addvv4sf): Remove.
1683         (reduc_uplus_v4sf): Likewise.
1684         (reduc_splus_v4sf): Likewise.
1685         (aarch64_addv<mode>): Likewise.
1686         (reduc_uplus_<mode>): Likewise.
1687         (reduc_splus_<mode>): Likewise.
1688         (aarch64_addvv2di): Likewise.
1689         (reduc_uplus_v2di): Likewise.
1690         (reduc_splus_v2di): Likewise.
1691         (aarch64_addvv2si): Likewise.
1692         (reduc_uplus_v2si): Likewise.
1693         (reduc_splus_v2si): Likewise.
1694         (reduc_<sur>plus_<mode>): New.
1695         (reduc_<sur>plus_v2di): Likewise.
1696         (reduc_<sur>plus_v2si): Likewise.
1697         (reduc_<sur>plus_v4sf): Likewise.
1698         (aarch64_addpv4sf): Likewise.
1699         * config/aarch64/arm_neon.h
1700         (vaddv<q>_<s,u,f><8, 16, 32, 64): Rewrite using builtins.
1701         * config/aarch64/iterators.md (unspec): Remove UNSPEC_ADDV,
1702         add UNSPEC_SADDV, UNSPEC_UADDV.
1703         (SUADDV): New.
1704         (sur): Add UNSPEC_SADDV, UNSPEC_UADDV.
1705
1706         2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>
1707
1708         * config/aarch64/arm_neon.h
1709         (v<max,min><nm><q><v>_<sfu><8, 16, 32, 64>): Rewrite using builtins.
1710
1711         2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>
1712
1713         * config/aarch64/aarch64-builtins
1714         (aarch64_gimple_fold_builtin): Fold reduc_<su><maxmin>_ builtins.
1715
1716         2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>
1717
1718         * config/aarch64/aarch64-simd-builtins.def
1719         (reduc_smax_): New.
1720         (reduc_smin_): Likewise.
1721         (reduc_umax_): Likewise.
1722         (reduc_umin_): Likewise.
1723         (reduc_smax_nan_): Likewise.
1724         (reduc_smin_nan_): Likewise.
1725         (fmax): Remove.
1726         (fmin): Likewise.
1727         (smax): Update for V2SF, V4SF and V2DF modes.
1728         (smin): Likewise.
1729         (smax_nan): New.
1730         (smin_nan): Likewise.
1731         * config/aarch64/aarch64-simd.md (<maxmin><mode>3): Rename to...
1732         (<su><maxmin><mode>3): ...This, refactor.
1733         (s<maxmin><mode>3): New.
1734         (<maxmin_uns><mode>3): Likewise.
1735         (reduc_<maxmin_uns>_<mode>): Refactor.
1736         (reduc_<maxmin_uns>_v4sf): Likewise.
1737         (reduc_<maxmin_uns>_v2si): Likewise.
1738         (aarch64_<fmaxmin><mode>: Remove.
1739         * config/aarch64/arm_neon.h (vmax<q>_f<32,64>): Rewrite to use
1740         new builtin names.
1741         (vmin<q>_f<32,64>): Likewise.
1742         * config/iterators.md (unspec): Add UNSPEC_FMAXNMV, UNSPEC_FMINNMV.
1743         (FMAXMIN): New.
1744         (su): Add mappings for smax, smin, umax, umin.
1745         (maxmin): New.
1746         (FMAXMINV): Add UNSPEC_FMAXNMV, UNSPEC_FMINNMV.
1747         (FMAXMIN): Rename as...
1748         (FMAXMIN_UNS): ...This.
1749         (maxminv): Remove.
1750         (fmaxminv): Likewise.
1751         (fmaxmin): Likewise.
1752         (maxmin_uns): New.
1753         (maxmin_uns_op): Likewise.
1754
1755 2013-05-28  Christophe Lyon  <christophe.lyon@linaro.org>
1756
1757         Backport from trunk r199241.
1758         2013-05-23  James Greenhalgh  <james.greenhalgh@arm.com>
1759
1760         * config/aarch64/aarch64-simd.md
1761         (aarch64_cm<optab>di): Add clobber of CC_REGNUM to unsplit pattern.
1762
1763 2013-05-23  Christophe Lyon  <christophe.lyon@linaro.org>
1764
1765         Backport from trunk r198970.
1766         2013-05-16  Greta Yorsh  <Greta.Yorsh@arm.com>
1767
1768         * config/arm/arm-protos.h (gen_movmem_ldrd_strd): New declaration.
1769         * config/arm/arm.c (next_consecutive_mem): New function.
1770         (gen_movmem_ldrd_strd): Likewise.
1771         * config/arm/arm.md (movmemqi): Update condition and code.
1772         (unaligned_loaddi, unaligned_storedi): New patterns.
1773
1774 2013-05-19  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1775
1776         * LINARO-VERSION: Bump version number.
1777
1778 2013-05-14  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1779
1780         GCC Linaro 4.8-2013.05 released.
1781
1782 2013-05-14  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1783
1784         Backport from trunk r198677.
1785         2013-05-07  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
1786
1787         * config/aarch64/aarch64.md
1788         (cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Restrict the
1789         shift value between 0-4.
1790
1791 2013-05-14  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1792
1793         Backport from trunk r198574-198575.
1794         2013-05-03  Vidya Praveen  <vidyapraveen@arm.com>
1795
1796         * config/aarch64/aarch64-simd.md (simd_fabd): Correct the description.
1797
1798         2013-05-03  Vidya Praveen  <vidyapraveen@arm.com>
1799
1800         * config/aarch64/aarch64-simd.md (*fabd_scalar<mode>3): Support
1801         scalar form of FABD instruction.
1802
1803 2013-05-14  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1804
1805         Backport from trunk r198490-198496
1806         2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>
1807
1808         * config/aarch64/arm_neon.h
1809         (vac<ge, gt><sd>_f<32, 64>): Rename to...
1810         (vca<ge, gt><sd>_f<32, 64>): ...this, reimpliment in C.
1811         (vca<ge, gt, lt, le><q>_f<32, 64>): Reimpliment in C.
1812
1813         2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>
1814
1815         * config/aarch64/aarch64-simd.md (*aarch64_fac<optab><mode>): New.
1816         * config/aarch64/iterators.md (FAC_COMPARISONS): New.
1817
1818         2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>
1819
1820         * config/aarch64/aarch64-simd.md
1821         (vcond<mode>_internal): Handle special cases for constant masks.
1822         (vcond<mode><mode>): Allow nonmemory_operands for outcome vectors.
1823         (vcondu<mode><mode>): Likewise.
1824         (vcond<v_cmp_result><mode>): New.
1825
1826         2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>
1827
1828         * config/aarch64/aarch64-builtins.c (BUILTIN_VALLDI): Define.
1829         (aarch64_fold_builtin): Add folding for cm<eq,ge,gt,tst>.
1830         * config/aarch64/aarch64-simd-builtins.def
1831         (cmeq): Update to BUILTIN_VALLDI.
1832         (cmgt): Likewise.
1833         (cmge): Likewise.
1834         (cmle): Likewise.
1835         (cmlt): Likewise.
1836         * config/aarch64/arm_neon.h
1837         (vc<eq, lt, le, gt, ge, tst><z><qsd>_<fpsu><8,16,32,64>): Remap
1838         to builtins or C as appropriate.
1839
1840         2013-05-01  James Greenhalgh  <james.greenhalgh@arm.com>
1841
1842         * config/aarch64/aarch64-simd-builtins.def (cmhs): Rename to...
1843         (cmgeu): ...This.
1844         (cmhi): Rename to...
1845         (cmgtu): ...This.
1846         * config/aarch64/aarch64-simd.md
1847         (simd_mode): Add SF.
1848         (aarch64_vcond_internal): Use new names for unsigned comparison insns.
1849         (aarch64_cm<optab><mode>): Rewrite to not use UNSPECs.
1850         * config/aarch64/aarch64.md (*cstore<mode>_neg): Rename to...
1851         (cstore<mode>_neg): ...This.
1852         * config/aarch64/iterators.md
1853         (VALLF): new.
1854         (unspec): Remove UNSPEC_CM<EQ, LE, LT, GE, GT, HS, HI, TST>.
1855         (COMPARISONS): New.
1856         (UCOMPARISONS): Likewise.
1857         (optab): Add missing comparisons.
1858         (n_optab): New.
1859         (cmp_1): Likewise.
1860         (cmp_2): Likewise.
1861         (CMP): Likewise.
1862         (cmp): Remove.
1863         (VCMP_S): Likewise.
1864         (VCMP_U): Likewise.
1865         (V_cmp_result): Add DF, SF modes.
1866         (v_cmp_result): Likewise.
1867         (v): Likewise.
1868         (vmtype): Likewise.
1869         * config/aarch64/predicates.md (aarch64_reg_or_fp_zero): New.
1870
1871 2013-05-14  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1872
1873         Backport from trunk r198191.
1874         2013-04-23  Sofiane Naci  <sofiane.naci@arm.com>
1875
1876         * config/aarch64/aarch64.md (*mov<mode>_aarch64): Add simd attribute.
1877
1878 2013-05-14  Matthew Gretton-Dann  <matthew.gretton-dann@lianro.org>
1879
1880         Backport from trunk r197838.
1881         2013-04-11   Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
1882
1883         * config/aarch64/aarch64.c (aarch64_select_cc_mode): Allow NEG
1884         code in CC_NZ mode.
1885         * config/aarch64/aarch64.md (*neg_<shift><mode>3_compare0): New
1886         pattern.
1887
1888 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1889
1890         Backport from trunk r198019.
1891         2013-04-16   Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
1892
1893         * config/aarch64/aarch64.md (*adds_mul_imm_<mode>): New pattern.
1894         (*subs_mul_imm_<mode>): New pattern.
1895
1896 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1897
1898         Backport from trunk r198424-198425.
1899         2013-04-29  Ian Bolton  <ian.bolton@arm.com>
1900
1901         * config/aarch64/aarch64.md (movsi_aarch64): Support LDR/STR
1902         from/to S register.
1903         (movdi_aarch64): Support LDR/STR from/to D register.
1904
1905         2013-04-29  Ian Bolton  <ian.bolton@arm.com>
1906
1907         * common/config/aarch64/aarch64-common.c: Enable REE pass at O2
1908         or higher by default.
1909
1910 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1911
1912         Backport from trunk r198412.
1913         2013-04-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1914
1915         * config/arm/arm.md (store_minmaxsi): Use only when
1916         optimize_insn_for_size_p.
1917
1918 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
1919
1920         Backport from trunk 198394,198396-198400,198402-198404.
1921         2013-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
1922
1923         * config/aarch64/arm_neon.h
1924         (vcvt<sd>_f<32,64>_s<32,64>): Rewrite in C.
1925         (vcvt<q>_f<32,64>_s<32,64>): Rewrite using builtins.
1926         (vcvt_<high_>_f<32,64>_f<32,64>): Likewise.
1927         (vcvt<qsd>_<su><32,64>_f<32,64>): Likewise.
1928         (vcvta<qsd>_<su><32,64>_f<32,64>): Likewise.
1929         (vcvtm<qsd>_<su><32,64>_f<32,64>): Likewise.
1930         (vcvtn<qsd>_<su><32,64>_f<32,64>): Likewise.
1931         (vcvtp<qsd>_<su><32,64>_f<32,64>): Likewise.
1932
1933         2013-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
1934
1935         * config/aarch64/aarch64-simd.md
1936         (<optab><VDQF:mode><fcvt_target>2): New, maps to fix, fixuns.
1937         (<fix_trunc_optab><VDQF:mode><fcvt_target>2): New, maps to
1938         fix_trunc, fixuns_trunc.
1939         (ftrunc<VDQF:mode>2): New.
1940         * config/aarch64/iterators.md (optab): Add fix, fixuns.
1941         (fix_trunc_optab): New.
1942
1943         2013-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
1944
1945         * config/aarch64/aarch64-builtins.c
1946         (aarch64_builtin_vectorized_function): Vectorize over ifloorf,
1947         iceilf, lround, iroundf.
1948
1949         2013-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
1950
1951         * config/aarch64/aarch64-simd-builtins.def (vec_unpacks_hi_): New.
1952         (float_truncate_hi_): Likewise.
1953         (float_extend_lo_): Likewise.
1954         (float_truncate_lo_): Likewise.
1955         * config/aarch64/aarch64-simd.md (vec_unpacks_lo_v4sf): New.
1956         (aarch64_float_extend_lo_v2df): Likewise.
1957         (vec_unpacks_hi_v4sf): Likewise.
1958         (aarch64_float_truncate_lo_v2sf): Likewise.
1959         (aarch64_float_truncate_hi_v4sf): Likewise.
1960         (vec_pack_trunc_v2df): Likewise.
1961         (vec_pack_trunc_df): Likewise.
1962
1963         2013-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
1964
1965         * config/aarch64/aarch64-builtins.c
1966         (aarch64_fold_builtin): Fold float conversions.
1967         * config/aarch64/aarch64-simd-builtins.def
1968         (floatv2si, floatv4si, floatv2di): New.
1969         (floatunsv2si, floatunsv4si, floatunsv2di): Likewise.
1970         * config/aarch64/aarch64-simd.md
1971         (<optab><fcvt_target><VDQF:mode>2): New, expands to float and floatuns.
1972         * config/aarch64/iterators.md (FLOATUORS): New.
1973         (optab): Add float, floatuns.
1974         (su_optab): Likewise.
1975
1976         2013-04-29  James Greenhalgh  <james.greenhalgh@arm.com>
1977
1978         * config/aarch64/aarch64-builtins.c
1979         (aarch64_builtin_vectorized_function): Fold to standard pattern names.
1980         * config/aarch64/aarch64-simd-builtins.def (frintn): New.
1981         (frintz): Rename to...
1982         (btrunc): ...this.
1983         (frintp): Rename to...
1984         (ceil): ...this.
1985         (frintm): Rename to...
1986         (floor): ...this.
1987         (frinti): Rename to...
1988         (nearbyint): ...this.
1989         (frintx): Rename to...
1990         (rint): ...this.
1991         (frinta): Rename to...
1992         (round): ...this.
1993         * config/aarch64/aarch64-simd.md
1994         (aarch64_frint<frint_suffix><mode>): Delete.
1995         (<frint_pattern><mode>2): Convert to insn.
1996         * config/aarch64/aarch64.md (unspec): Add UNSPEC_FRINTN.
1997         * config/aarch64/iterators.md (FRINT): Add UNSPEC_FRINTN.
1998         (frint_pattern): Likewise.
1999         (frint_suffix): Likewise.
2000
2001 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2002
2003         Backport from trunk r198302-198306,198316.
2004         2013-04-25  James Greenhalgh  <james.greenhalgh@arm.com>
2005
2006         * config/aarch64/aarch64-simd.md
2007         (aarch64_simd_bsl<mode>_internal): Rewrite RTL to not use UNSPEC_BSL.
2008         (aarch64_simd_bsl<mode>): Likewise.
2009         * config/aarch64/iterators.md (unspec): Remove UNSPEC_BSL.
2010
2011         2013-04-25  James Greenhalgh  <jame.greenhalgh@arm.com>
2012
2013         * config/aarch64/aarch64-simd.md (neg<mode>2): Use VDQ iterator.
2014
2015         2013-04-25  James Greenhalgh  <james.greenhalgh@arm.com>
2016
2017         * config/aarch64/aarch64-builtins.c
2018         (aarch64_fold_builtin): New.
2019         * config/aarch64/aarch64-protos.h (aarch64_fold_builtin): New.
2020         * config/aarch64/aarch64.c (TARGET_FOLD_BUILTIN): Define.
2021         * config/aarch64/aarch64-simd-builtins.def (abs): New.
2022         * config/aarch64/arm_neon.h
2023         (vabs<q>_<f32, 64>): Implement using __builtin_aarch64_fabs.
2024
2025         2013-04-25  James Greenhalgh  <james.greenhalgh@arm.com>
2026             Tejas Belagod  <tejas.belagod@arm.com>
2027
2028         * config/aarch64/aarch64-builtins.c
2029         (aarch64_gimple_fold_builtin): New.
2030         * config/aarch64/aarch64-protos.h (aarch64_gimple_fold_builtin): New.
2031         * config/aarch64/aarch64-simd-builtins.def (addv): New.
2032         * config/aarch64/aarch64-simd.md (addpv4sf): New.
2033         (addvv4sf): Update.
2034         * config/aarch64/aarch64.c (TARGET_GIMPLE_FOLD_BUILTIN): Define.
2035
2036         2013-04-25  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
2037
2038         * config/aarch64/aarch64.md
2039         (*cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): New pattern.
2040
2041         2013-04-25  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
2042
2043         * config/aarch64/aarch64.md (*ngc<mode>): New pattern.
2044         (*ngcsi_uxtw): New pattern.
2045
2046 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2047
2048         Backport from trunk 198298.
2049         2013-04-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2050             Julian Brown  <julian@codesourcery.com>
2051
2052         * config/arm/arm.c (neon_builtin_type_mode): Add T_V4HF.
2053         (TB_DREG): Add T_V4HF.
2054         (v4hf_UP): New macro.
2055         (neon_itype): Add NEON_FLOAT_WIDEN, NEON_FLOAT_NARROW.
2056         (arm_init_neon_builtins): Handle NEON_FLOAT_WIDEN,
2057         NEON_FLOAT_NARROW.
2058         Handle initialisation of V4HF. Adjust initialisation of reinterpret
2059         built-ins.
2060         (arm_expand_neon_builtin): Handle NEON_FLOAT_WIDEN,
2061         NEON_FLOAT_NARROW.
2062         (arm_vector_mode_supported_p): Handle V4HF.
2063         (arm_mangle_map): Handle V4HFmode.
2064         * config/arm/arm.h (VALID_NEON_DREG_MODE): Add V4HF.
2065         * config/arm/arm_neon_builtins.def: Add entries for
2066         vcvtv4hfv4sf, vcvtv4sfv4hf.
2067         * config/arm/neon.md (neon_vcvtv4sfv4hf): New pattern.
2068         (neon_vcvtv4hfv4sf): Likewise.
2069         * config/arm/neon-gen.ml: Handle half-precision floating point
2070         features.
2071         * config/arm/neon-testgen.ml: Handle Requires_FP_bit feature.
2072         * config/arm/arm_neon.h: Regenerate.
2073         * config/arm/neon.ml (type elts): Add F16.
2074         (type vectype): Add T_float16x4, T_floatHF.
2075         (type vecmode): Add V4HF.
2076         (type features): Add Requires_FP_bit feature.
2077         (elt_width): Handle F16.
2078         (elt_class): Likewise.
2079         (elt_of_class_width): Likewise.
2080         (mode_of_elt): Refactor.
2081         (type_for_elt): Handle F16, fix error messages.
2082         (vectype_size): Handle T_float16x4.
2083         (vcvt_sh): New function.
2084         (ops): Add entries for vcvt_f16_f32, vcvt_f32_f16.
2085         (string_of_vectype): Handle T_floatHF, T_float16, T_float16x4.
2086         (string_of_mode): Handle V4HF.
2087         * doc/arm-neon-intrinsics.texi: Regenerate.
2088
2089 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2090
2091         Backport from trunk r198136-198137,198142,198176.
2092         2013-04-23  Andreas Schwab  <schwab@linux-m68k.org>
2093
2094         * coretypes.h (gimple_stmt_iterator): Add struct to make
2095         compatible with C.
2096
2097         2013-04-22  James Greenhalgh  <james.greenhalgh@arm.com>
2098
2099         * coretypes.h (gimple_stmt_iterator_d): Forward declare.
2100         (gimple_stmt_iterator): New typedef.
2101         * gimple.h (gimple_stmt_iterator): Rename to...
2102         (gimple_stmt_iterator_d): ... This.
2103         * doc/tm.texi.in (TARGET_FOLD_BUILTIN): Detail restriction that
2104         trees be valid for GIMPLE and GENERIC.
2105         (TARGET_GIMPLE_FOLD_BUILTIN): New.
2106         * gimple-fold.c (gimple_fold_call): Call target hook
2107         gimple_fold_builtin.
2108         * hooks.c (hook_bool_gsiptr_false): New.
2109         * hooks.h (hook_bool_gsiptr_false): New.
2110         * target.def (fold_stmt): New.
2111         * doc/tm.texi: Regenerate.
2112
2113         2013-04-22  James Greenhalgh  <james.greenhalgh@arm.com>
2114
2115         * config/aarch64/aarch64-builtins.c
2116         (CF): Remove.
2117         (CF0, CF1, CF2, CF3, CF4, CF10): New.
2118         (VAR<1-12>): Add MAP parameter.
2119         (BUILTIN_*): Likewise.
2120         * config/aarch64/aarch64-simd-builtins.def: Set MAP parameter.
2121         * config/aarch64/aarch64-simd.md (aarch64_sshl_n<mode>): Remove.
2122         (aarch64_ushl_n<mode>): Likewise.
2123         (aarch64_sshr_n<mode>): Likewise.
2124         (aarch64_ushr_n<mode>): Likewise.
2125         (aarch64_<maxmin><mode>): Likewise.
2126         (aarch64_sqrt<mode>): Likewise.
2127         * config/aarch64/arm_neon.h (vshl<q>_n_*): Use new builtin names.
2128         (vshr<q>_n_*): Likewise.
2129
2130         2013-04-22  James Greenhalgh  <james.greenhalgh@arm.com>
2131
2132         * config/aarch64/aarch64-builtins.c
2133         (aarch64_simd_builtin_type_mode): Handle SF types.
2134         (sf_UP): Define.
2135         (BUILTIN_GPF): Define.
2136         (aarch64_init_simd_builtins): Handle SF types.
2137         * config/aarch64/aarch64-simd-builtins.def (frecpe): Add support.
2138         (frecps): Likewise.
2139         (frecpx): Likewise.
2140         * config/aarch64/aarch64-simd.md
2141         (simd_types): Update simd_frcp<esx> to simd_frecp<esx>.
2142         (aarch64_frecpe<mode>): New.
2143         (aarch64_frecps<mode>): Likewise.
2144         * config/aarch64/aarch64.md (unspec): Add UNSPEC_FRECP<ESX>.
2145         (v8type): Add frecp<esx>.
2146         (aarch64_frecp<FRECP:frecp_suffix><mode>): New.
2147         (aarch64_frecps<mode>): Likewise.
2148         * config/aarch64/iterators.md (FRECP): New.
2149         (frecp_suffix): Likewise.
2150         * config/aarch64/arm_neon.h
2151         (vrecp<esx><qsd>_<fd><32, 64>): Convert to using builtins.
2152
2153 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2154
2155         Backport from trunk r198030.
2156         2013-04-17  Greta Yorsh  <Greta.Yorsh at arm.com>
2157
2158         * config/arm/arm.md (movsicc_insn): Convert define_insn into
2159         define_insn_and_split.
2160         (and_scc,ior_scc,negscc): Likewise.
2161         (cmpsi2_addneg, subsi3_compare): Convert to named patterns.
2162
2163 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2164
2165         Backport from trunk r198020.
2166         2013-04-16   Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
2167
2168         * config/aarch64/aarch64.md (*adds_<optab><mode>_multp2):
2169         New pattern.
2170         (*subs_<optab><mode>_multp2): New pattern.
2171         (*adds_<optab><ALLX:mode>_<GPI:mode>): New pattern.
2172         (*subs_<optab><ALLX:mode>_<GPI:mode>): New pattern.
2173
2174 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2175
2176         Backport from trunk r198004,198029.
2177         2013-04-17  Greta Yorsh  <Greta.Yorsh at arm.com>
2178
2179         * config/arm/arm.c (use_return_insn): Return 0 for targets that
2180         can benefit from using a sequence of LDRD instructions in epilogue
2181         instead of a single LDM instruction.
2182
2183         2013-04-16  Greta Yorsh  <Greta.Yorsh at arm.com>
2184
2185         * config/arm/arm.c (emit_multi_reg_push): New declaration
2186         for an existing function.
2187         (arm_emit_strd_push): New function.
2188         (arm_expand_prologue): Used here.
2189         (arm_emit_ldrd_pop): New function.
2190         (arm_expand_epilogue): Used here.
2191         (arm_get_frame_offsets): Update condition.
2192         (arm_emit_multi_reg_pop): Add a special case for load of a single
2193         register with writeback.
2194
2195 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2196
2197         Backport from trunk r197965.
2198         2013-04-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2199
2200         * config/arm/arm.c (const_ok_for_dimode_op): Handle AND case.
2201         * config/arm/arm.md (*anddi3_insn): Change to insn_and_split.
2202         * config/arm/constraints.md (De): New constraint.
2203         * config/arm/neon.md (anddi3_neon): Delete.
2204         (neon_vand<mode>): Expand to standard anddi3 pattern.
2205         * config/arm/predicates.md (imm_for_neon_inv_logic_operand):
2206         Move earlier in the file.
2207         (neon_inv_logic_op2): Likewise.
2208         (arm_anddi_operand_neon): New predicate.
2209
2210 2013-05-02  Matthew Gretton-Dann <matthew.gretton-dann@linaro.org>
2211
2212         Backport from trunk r197925.
2213         2013-04-12  Greta Yorsh  <Greta.Yorsh@arm.com>
2214
2215         * config/arm/arm.md (mov_scc,mov_negscc,mov_notscc): Convert
2216         define_insn into define_insn_and_split and emit movsicc patterns.
2217
2218 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2219
2220         Backport from trunk r197807.
2221         2013-04-11   Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
2222
2223         * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Define.
2224
2225 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2226
2227         Backport from trunk r197642.
2228         2013-04-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2229
2230         * config/arm/arm.md (minmax_arithsi_non_canon): New pattern.
2231
2232 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2233
2234         Backport from trunk r197530,197921.
2235         2013-04-12  Greta Yorsh  <Greta.Yorsh@arm.com>
2236
2237         * config/arm/arm.c (gen_operands_ldrd_strd): Initialize "base".
2238
2239         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
2240
2241         * config/arm/constraints.md (q): New constraint.
2242         * config/arm/ldrdstrd.md: New file.
2243         * config/arm/arm.md (ldrdstrd.md) New include.
2244         (arm_movdi): Use "q" instead of "r" constraint
2245         for double-word memory access.
2246         (movdf_soft_insn): Likewise.
2247         * config/arm/vfp.md (movdi_vfp): Likewise.
2248         * config/arm/t-arm (MD_INCLUDES): Add ldrdstrd.md.
2249         * config/arm/arm-protos.h (gen_operands_ldrd_strd): New declaration.
2250         * config/arm/arm.c (gen_operands_ldrd_strd): New function.
2251         (mem_ok_for_ldrd_strd): Likewise.
2252         (output_move_double): Update assertion.
2253
2254 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2255
2256         Backport of trunk r197518-197522,197526-197528.
2257         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
2258
2259         * config/arm/arm.md (arm_smax_insn): Convert define_insn into
2260         define_insn_and_split.
2261         (arm_smin_insn,arm_umaxsi3,arm_uminsi3): Likewise.
2262
2263         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
2264
2265         * config/arm/arm.md (arm_ashldi3_1bit): Convert define_insn into
2266         define_insn_and_split.
2267         (arm_ashrdi3_1bit,arm_lshrdi3_1bit): Likewise.
2268         (shiftsi3_compare): New pattern.
2269         (rrx): New pattern.
2270         * config/arm/unspecs.md (UNSPEC_RRX): New.
2271
2272         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
2273
2274         * config/arm/arm.md (negdi_extendsidi): New pattern.
2275         (negdi_zero_extendsidi): Likewise.
2276
2277         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
2278
2279         * config/arm/arm.md (andsi_iorsi3_notsi): Convert define_insn into
2280         define_insn_and_split.
2281         (arm_negdi2,arm_abssi2,arm_neg_abssi2): Likewise.
2282         (arm_cmpdi_insn,arm_cmpdi_unsigned): Likewise.
2283
2284         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
2285
2286         * config/arm/arm.md (arm_subdi3): Convert define_insn into
2287         define_insn_and_split.
2288         (subdi_di_zesidi,subdi_di_sesidi): Likewise.
2289         (subdi_zesidi_di,subdi_sesidi_di,subdi_zesidi_zesidi): Likewise.
2290
2291         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
2292
2293         * config/arm/arm.md (subsi3_carryin): New pattern.
2294         (subsi3_carryin_const): Likewise.
2295         (subsi3_carryin_compare,subsi3_carryin_compare_const): Likewise.
2296         (subsi3_carryin_shift,rsbsi3_carryin_shift): Likewise.
2297
2298         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
2299
2300         * config/arm/arm.md (incscc,arm_incscc,decscc,arm_decscc): Delete.
2301
2302         2013-04-05  Greta Yorsh  <Greta.Yorsh@arm.com>
2303
2304         * config/arm/arm.md (addsi3_carryin_<optab>): Set attribute predicable.
2305         (addsi3_carryin_alt2_<optab>,addsi3_carryin_shift_<optab>): Likewise.
2306
2307 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2308
2309         Backport of trunk r197517.
2310         2013-04-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2311
2312         * config/arm/arm.c (arm_expand_builtin): Change fcode
2313         type to unsigned int.
2314
2315 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2316
2317         Backport of trunk r197513.
2318         2013-04-05  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
2319
2320         * doc/invoke.texi (ARM Options): Document cortex-a53 support.
2321
2322 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2323
2324         Backport of trunk r197489-197491.
2325         2013-04-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2326
2327         * config/arm/arm-protos.h (arm_builtin_vectorized_function):
2328         New function prototype.
2329         * config/arm/arm.c (TARGET_VECTORIZE_BUILTINS): Define.
2330         (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Likewise.
2331         (arm_builtin_vectorized_function): New function.
2332
2333         2013-04-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2334
2335         * config/arm/arm_neon_builtins.def: New file.
2336         * config/arm/arm.c (neon_builtin_data): Move contents to
2337         arm_neon_builtins.def.
2338         (enum arm_builtins): Include neon builtin definitions.
2339         (ARM_BUILTIN_NEON_BASE): Move from enum to macro.
2340         * config/arm/t-arm (arm.o): Add dependency on
2341         arm_neon_builtins.def.
2342
2343 2013-05-02  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2344
2345         Backport of trunk 196795-196797,196957
2346         2013-03-19  Ian Bolton  <ian.bolton@arm.com>
2347
2348         * config/aarch64/aarch64.md (*sub<mode>3_carryin): New pattern.
2349         (*subsi3_carryin_uxtw): Likewise.
2350
2351         2013-03-19  Ian Bolton  <ian.bolton@arm.com>
2352
2353         * config/aarch64/aarch64.md (*ror<mode>3_insn): New pattern.
2354         (*rorsi3_insn_uxtw): Likewise.
2355
2356         2013-03-19  Ian Bolton  <ian.bolton@arm.com>
2357
2358         * config/aarch64/aarch64.md (*extr<mode>5_insn): New pattern.
2359         (*extrsi5_insn_uxtw): Likewise.
2360
2361 2013-04-10  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2362
2363         * LINARO-VERSION: Bump version number.
2364
2365 2013-04-09  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2366
2367         * GCC Linaro 4.8-2013.04 released.
2368
2369         * LINARO-VERSION: New file.
2370         * configure.ac: Add Linaro version string.
2371         * configure: Regenerate.
2372
2373 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2374
2375         Backport of trunk r197346.
2376         2013-04-02  Ian Caulfield  <ian.caulfield@arm.com>
2377             Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
2378
2379         * config/arm/arm-arches.def (armv8-a): Default to cortex-a53.
2380         * config/arm/t-arm (MD_INCLUDES): Depend on cortex-a53.md.
2381         * config/arm/cortex-a53.md: New file.
2382         * config/arm/bpabi.h (BE8_LINK_SPEC): Handle cortex-a53.
2383         * config/arm/arm.md (generic_sched, generic_vfp): Handle cortex-a53.
2384         * config/arm/arm.c (arm_issue_rate): Likewise.
2385         * config/arm/arm-tune.md: Regenerate
2386         * config/arm/arm-tables.opt: Regenerate.
2387         * config/arm/arm-cores.def: Add cortex-a53.
2388
2389 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2390
2391         Backport of trunk r197342.
2392         2013-04-02  Sofiane Naci  <sofiane.naci@arm.com>
2393
2394         * config/aarch64/aarch64.md (*mov<mode>_aarch64): Add variants for
2395         scalar load/store operations using B/H registers.
2396         (*zero_extend<SHORT:mode><GPI:mode>2_aarch64): Likewise.
2397
2398 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2399
2400         Backport of trunk r197341.
2401         2013-04-02  Sofiane Naci  <sofiane.naci@arm.com>
2402
2403         * config/aarch64/aarch64.md (*mov<mode>_aarch64): Add alternatives for
2404         scalar move.
2405         * config/aarch64/aarch64.c
2406         (aarch64_simd_scalar_immediate_valid_for_move): New.
2407         * config/aarch64/aarch64-protos.h
2408         (aarch64_simd_scalar_immediate_valid_for_move): New.
2409         * config/aarch64/constraints.md (Dh, Dq): New.
2410         * config/aarch64/iterators.md (hq): New.
2411
2412 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2413
2414         Backport from trunk r197207.
2415         2013-03-28   Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
2416
2417         * config/aarch64/aarch64.md (*and<mode>3_compare0): New pattern.
2418         (*andsi3_compare0_uxtw): New pattern.
2419         (*and_<SHIFT:optab><mode>3_compare0): New pattern.
2420         (*and_<SHIFT:optab>si3_compare0_uxtw): New pattern.
2421
2422 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2423
2424         Backport from trunk r197153.
2425         2013-03-27  Terry Guo  <terry.guo@arm.com>
2426
2427         * config/arm/arm-cores.def: Added core cortex-r7.
2428         * config/arm/arm-tune.md: Regenerated.
2429         * config/arm/arm-tables.opt: Regenerated.
2430         * doc/invoke.texi: Added entry for core cortex-r7.
2431
2432 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2433
2434         Backport from trunk r197052.
2435         2013-03-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2436
2437         * config/arm/arm.md (f_sels, f_seld): New types.
2438         (*cmov<mode>): New pattern.
2439         * config/arm/predicates.md (arm_vsel_comparison_operator): New
2440         predicate.
2441
2442 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2443
2444         Backport from trunk r197046.
2445         2013-03-25  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
2446
2447         * config/arm/arm.c (arm_emit_load_exclusive): Add acq parameter.
2448         Emit load-acquire versions when acq is true.
2449         (arm_emit_store_exclusive): Add rel parameter.
2450         Emit store-release versions when rel is true.
2451         (arm_split_compare_and_swap): Use acquire-release instructions
2452         instead.
2453         of barriers when appropriate.
2454         (arm_split_atomic_op): Likewise.
2455         * config/arm/arm.h (TARGET_HAVE_LDACQ): New macro.
2456         * config/arm/unspecs.md (VUNSPEC_LAX): New unspec.
2457         (VUNSPEC_SLX): Likewise.
2458         (VUNSPEC_LDA): Likewise.
2459         (VUNSPEC_STL): Likewise.
2460         * config/arm/sync.md (atomic_load<mode>): New pattern.
2461         (atomic_store<mode>): Likewise.
2462         (arm_load_acquire_exclusive<mode>): Likewise.
2463         (arm_load_acquire_exclusivesi): Likewise.
2464         (arm_load_acquire_exclusivedi): Likewise.
2465         (arm_store_release_exclusive<mode>): Likewise.
2466
2467 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2468
2469         Backport from trunk r196876.
2470         2013-03-21  Christophe Lyon  <christophe.lyon@linaro.org>
2471
2472         * config/arm/arm-protos.h (tune_params): Add
2473         prefer_neon_for_64bits field.
2474         * config/arm/arm.c (prefer_neon_for_64bits): New variable.
2475         (arm_slowmul_tune): Default prefer_neon_for_64bits to false.
2476         (arm_fastmul_tune, arm_strongarm_tune, arm_xscale_tune): Ditto.
2477         (arm_9e_tune, arm_v6t2_tune, arm_cortex_tune): Ditto.
2478         (arm_cortex_a15_tune, arm_cortex_a5_tune): Ditto.
2479         (arm_cortex_a9_tune, arm_v6m_tune, arm_fa726te_tune): Ditto.
2480         (arm_option_override): Handle -mneon-for-64bits new option.
2481         * config/arm/arm.h (TARGET_PREFER_NEON_64BITS): New macro.
2482         (prefer_neon_for_64bits): Declare new variable.
2483         * config/arm/arm.md (arch): Rename neon_onlya8 and neon_nota8 to
2484         avoid_neon_for_64bits and neon_for_64bits. Remove onlya8 and
2485         nota8.
2486         (arch_enabled): Handle new arch types. Remove support for onlya8
2487         and nota8.
2488         (one_cmpldi2): Use new arch names.
2489         * config/arm/arm.opt (mneon-for-64bits): Add option.
2490         * config/arm/neon.md (adddi3_neon, subdi3_neon, iordi3_neon)
2491         (anddi3_neon, xordi3_neon, ashldi3_neon, <shift>di3_neon): Use
2492         neon_for_64bits instead of nota8 and avoid_neon_for_64bits instead
2493         of onlya8.
2494         * doc/invoke.texi (-mneon-for-64bits): Document.
2495
2496 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2497
2498         Backport from trunk r196858.
2499         2013-03-21   Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
2500
2501         * config/aarch64/aarch64-simd.md (simd_fabd): New Attribute.
2502         (abd<mode>_3): New pattern.
2503         (aba<mode>_3): New pattern.
2504         (fabd<mode>_3): New pattern.
2505
2506 2013-04-08  Matthew Gretton-Dann  <matthew.gretton-dann@linaro.org>
2507
2508         Backport from trunk r196856.
2509         2013-03-21   Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
2510
2511         * config/aarch64/aarch64-elf.h (REGISTER_PREFIX): Remove.
2512         * config/aarch64/aarch64.c (aarch64_print_operand): Remove all
2513         occurrence of REGISTER_PREFIX as its empty string.