1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
44 #include "hard-reg-set.h"
45 #include "basic-block.h"
46 #include "insn-config.h"
56 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
57 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
59 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
60 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
61 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
64 /* Vector mapping INSN_UIDs to luids.
65 The luids are like uids but increase monotonically always.
66 We use them to see whether a jump comes from outside a given loop. */
70 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
71 number the insn is contained in. */
73 struct loop
**uid_loop
;
75 /* 1 + largest uid of any insn. */
79 /* 1 + luid of last insn. */
83 /* Number of loops detected in current function. Used as index to the
86 static int max_loop_num
;
88 /* Bound on pseudo register number before loop optimization.
89 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
90 unsigned int max_reg_before_loop
;
92 /* The value to pass to the next call of reg_scan_update. */
93 static int loop_max_reg
;
95 #define obstack_chunk_alloc xmalloc
96 #define obstack_chunk_free free
98 /* During the analysis of a loop, a chain of `struct movable's
99 is made to record all the movable insns found.
100 Then the entire chain can be scanned to decide which to move. */
104 rtx insn
; /* A movable insn */
105 rtx set_src
; /* The expression this reg is set from. */
106 rtx set_dest
; /* The destination of this SET. */
107 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
108 of any registers used within the LIBCALL. */
109 int consec
; /* Number of consecutive following insns
110 that must be moved with this one. */
111 unsigned int regno
; /* The register it sets */
112 short lifetime
; /* lifetime of that register;
113 may be adjusted when matching movables
114 that load the same value are found. */
115 short savings
; /* Number of insns we can move for this reg,
116 including other movables that force this
117 or match this one. */
118 unsigned int cond
: 1; /* 1 if only conditionally movable */
119 unsigned int force
: 1; /* 1 means MUST move this insn */
120 unsigned int global
: 1; /* 1 means reg is live outside this loop */
121 /* If PARTIAL is 1, GLOBAL means something different:
122 that the reg is live outside the range from where it is set
123 to the following label. */
124 unsigned int done
: 1; /* 1 inhibits further processing of this */
126 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
127 In particular, moving it does not make it
129 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
130 load SRC, rather than copying INSN. */
131 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
132 first insn of a consecutive sets group. */
133 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
134 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
135 that we should avoid changing when clearing
136 the rest of the reg. */
137 struct movable
*match
; /* First entry for same value */
138 struct movable
*forces
; /* An insn that must be moved if this is */
139 struct movable
*next
;
143 FILE *loop_dump_stream
;
145 /* Forward declarations. */
147 static void find_and_verify_loops
PARAMS ((rtx
, struct loops
*));
148 static void mark_loop_jump
PARAMS ((rtx
, struct loop
*));
149 static void prescan_loop
PARAMS ((struct loop
*));
150 static int reg_in_basic_block_p
PARAMS ((rtx
, rtx
));
151 static int consec_sets_invariant_p
PARAMS ((const struct loop
*,
153 static int labels_in_range_p
PARAMS ((rtx
, int));
154 static void count_one_set
PARAMS ((struct loop_regs
*, rtx
, rtx
, rtx
*));
155 static void note_addr_stored
PARAMS ((rtx
, rtx
, void *));
156 static void note_set_pseudo_multiple_uses
PARAMS ((rtx
, rtx
, void *));
157 static int loop_reg_used_before_p
PARAMS ((const struct loop
*, rtx
, rtx
));
158 static void scan_loop
PARAMS ((struct loop
*, int));
160 static void replace_call_address
PARAMS ((rtx
, rtx
, rtx
));
162 static rtx skip_consec_insns
PARAMS ((rtx
, int));
163 static int libcall_benefit
PARAMS ((rtx
));
164 static void ignore_some_movables
PARAMS ((struct loop_movables
*));
165 static void force_movables
PARAMS ((struct loop_movables
*));
166 static void combine_movables
PARAMS ((struct loop_movables
*,
167 struct loop_regs
*));
168 static int regs_match_p
PARAMS ((rtx
, rtx
, struct loop_movables
*));
169 static int rtx_equal_for_loop_p
PARAMS ((rtx
, rtx
, struct loop_movables
*,
170 struct loop_regs
*));
171 static void add_label_notes
PARAMS ((rtx
, rtx
));
172 static void move_movables
PARAMS ((struct loop
*loop
, struct loop_movables
*,
174 static void loop_movables_add
PARAMS((struct loop_movables
*,
176 static void loop_movables_free
PARAMS((struct loop_movables
*));
177 static int count_nonfixed_reads
PARAMS ((const struct loop
*, rtx
));
178 static void loop_bivs_find
PARAMS((struct loop
*));
179 static void loop_bivs_init_find
PARAMS((struct loop
*));
180 static void loop_bivs_check
PARAMS((struct loop
*));
181 static void loop_givs_find
PARAMS((struct loop
*));
182 static void loop_givs_check
PARAMS((struct loop
*));
183 static int loop_biv_eliminable_p
PARAMS((struct loop
*, struct iv_class
*,
185 static int loop_giv_reduce_benefit
PARAMS((struct loop
*, struct iv_class
*,
186 struct induction
*, rtx
));
187 static void loop_givs_dead_check
PARAMS((struct loop
*, struct iv_class
*));
188 static void loop_givs_reduce
PARAMS((struct loop
*, struct iv_class
*));
189 static void loop_givs_rescan
PARAMS((struct loop
*, struct iv_class
*,
191 static void loop_ivs_free
PARAMS((struct loop
*));
192 static void strength_reduce
PARAMS ((struct loop
*, int, int));
193 static void find_single_use_in_loop
PARAMS ((struct loop_regs
*, rtx
, rtx
));
194 static int valid_initial_value_p
PARAMS ((rtx
, rtx
, int, rtx
));
195 static void find_mem_givs
PARAMS ((const struct loop
*, rtx
, rtx
, int, int));
196 static void record_biv
PARAMS ((struct loop
*, struct induction
*,
197 rtx
, rtx
, rtx
, rtx
, rtx
*,
199 static void check_final_value
PARAMS ((const struct loop
*,
200 struct induction
*));
201 static void loop_ivs_dump
PARAMS((const struct loop
*, FILE *, int));
202 static void loop_iv_class_dump
PARAMS((const struct iv_class
*, FILE *, int));
203 static void loop_biv_dump
PARAMS((const struct induction
*, FILE *, int));
204 static void loop_giv_dump
PARAMS((const struct induction
*, FILE *, int));
205 static void record_giv
PARAMS ((const struct loop
*, struct induction
*,
206 rtx
, rtx
, rtx
, rtx
, rtx
, rtx
, int,
207 enum g_types
, int, int, rtx
*));
208 static void update_giv_derive
PARAMS ((const struct loop
*, rtx
));
209 static void check_ext_dependant_givs
PARAMS ((struct iv_class
*,
210 struct loop_info
*));
211 static int basic_induction_var
PARAMS ((const struct loop
*, rtx
,
212 enum machine_mode
, rtx
, rtx
,
213 rtx
*, rtx
*, rtx
**));
214 static rtx simplify_giv_expr
PARAMS ((const struct loop
*, rtx
, rtx
*, int *));
215 static int general_induction_var
PARAMS ((const struct loop
*loop
, rtx
, rtx
*,
216 rtx
*, rtx
*, rtx
*, int, int *,
218 static int consec_sets_giv
PARAMS ((const struct loop
*, int, rtx
,
219 rtx
, rtx
, rtx
*, rtx
*, rtx
*, rtx
*));
220 static int check_dbra_loop
PARAMS ((struct loop
*, int));
221 static rtx express_from_1
PARAMS ((rtx
, rtx
, rtx
));
222 static rtx combine_givs_p
PARAMS ((struct induction
*, struct induction
*));
223 static int cmp_combine_givs_stats
PARAMS ((const PTR
, const PTR
));
224 static void combine_givs
PARAMS ((struct loop_regs
*, struct iv_class
*));
225 static int product_cheap_p
PARAMS ((rtx
, rtx
));
226 static int maybe_eliminate_biv
PARAMS ((const struct loop
*, struct iv_class
*,
228 static int maybe_eliminate_biv_1
PARAMS ((const struct loop
*, rtx
, rtx
,
229 struct iv_class
*, int,
231 static int last_use_this_basic_block
PARAMS ((rtx
, rtx
));
232 static void record_initial
PARAMS ((rtx
, rtx
, void *));
233 static void update_reg_last_use
PARAMS ((rtx
, rtx
));
234 static rtx next_insn_in_loop
PARAMS ((const struct loop
*, rtx
));
235 static void loop_regs_scan
PARAMS ((const struct loop
*, int, int *));
236 static void load_mems
PARAMS ((const struct loop
*));
237 static int insert_loop_mem
PARAMS ((rtx
*, void *));
238 static int replace_loop_mem
PARAMS ((rtx
*, void *));
239 static void replace_loop_mems
PARAMS ((rtx
, rtx
, rtx
));
240 static int replace_loop_reg
PARAMS ((rtx
*, void *));
241 static void replace_loop_regs
PARAMS ((rtx insn
, rtx
, rtx
));
242 static void note_reg_stored
PARAMS ((rtx
, rtx
, void *));
243 static void try_copy_prop
PARAMS ((const struct loop
*, rtx
, unsigned int));
244 static void try_swap_copy_prop
PARAMS ((const struct loop
*, rtx
,
246 static int replace_label
PARAMS ((rtx
*, void *));
247 static rtx check_insn_for_givs
PARAMS((struct loop
*, rtx
, int, int));
248 static rtx check_insn_for_bivs
PARAMS((struct loop
*, rtx
, int, int));
249 static rtx gen_add_mult
PARAMS ((rtx
, rtx
, rtx
, rtx
));
250 static void loop_regs_update
PARAMS ((const struct loop
*, rtx
));
251 static int iv_add_mult_cost
PARAMS ((rtx
, rtx
, rtx
, rtx
));
253 static rtx loop_insn_emit_after
PARAMS((const struct loop
*, basic_block
,
255 static rtx loop_call_insn_emit_before
PARAMS((const struct loop
*,
256 basic_block
, rtx
, rtx
));
257 static rtx loop_call_insn_hoist
PARAMS((const struct loop
*, rtx
));
258 static rtx loop_insn_sink_or_swim
PARAMS((const struct loop
*, rtx
));
260 static void loop_dump_aux
PARAMS ((const struct loop
*, FILE *, int));
261 static void loop_delete_insns
PARAMS ((rtx
, rtx
));
262 void debug_ivs
PARAMS ((const struct loop
*));
263 void debug_iv_class
PARAMS ((const struct iv_class
*));
264 void debug_biv
PARAMS ((const struct induction
*));
265 void debug_giv
PARAMS ((const struct induction
*));
266 void debug_loop
PARAMS ((const struct loop
*));
267 void debug_loops
PARAMS ((const struct loops
*));
269 typedef struct rtx_pair
275 typedef struct loop_replace_args
282 /* Nonzero iff INSN is between START and END, inclusive. */
283 #define INSN_IN_RANGE_P(INSN, START, END) \
284 (INSN_UID (INSN) < max_uid_for_loop \
285 && INSN_LUID (INSN) >= INSN_LUID (START) \
286 && INSN_LUID (INSN) <= INSN_LUID (END))
288 /* Indirect_jump_in_function is computed once per function. */
289 static int indirect_jump_in_function
;
290 static int indirect_jump_in_function_p
PARAMS ((rtx
));
292 static int compute_luids
PARAMS ((rtx
, rtx
, int));
294 static int biv_elimination_giv_has_0_offset
PARAMS ((struct induction
*,
298 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
299 copy the value of the strength reduced giv to its original register. */
300 static int copy_cost
;
302 /* Cost of using a register, to normalize the benefits of a giv. */
303 static int reg_address_cost
;
308 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
310 reg_address_cost
= address_cost (reg
, SImode
);
312 copy_cost
= COSTS_N_INSNS (1);
315 /* Compute the mapping from uids to luids.
316 LUIDs are numbers assigned to insns, like uids,
317 except that luids increase monotonically through the code.
318 Start at insn START and stop just before END. Assign LUIDs
319 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
321 compute_luids (start
, end
, prev_luid
)
328 for (insn
= start
, i
= prev_luid
; insn
!= end
; insn
= NEXT_INSN (insn
))
330 if (INSN_UID (insn
) >= max_uid_for_loop
)
332 /* Don't assign luids to line-number NOTEs, so that the distance in
333 luids between two insns is not affected by -g. */
334 if (GET_CODE (insn
) != NOTE
335 || NOTE_LINE_NUMBER (insn
) <= 0)
336 uid_luid
[INSN_UID (insn
)] = ++i
;
338 /* Give a line number note the same luid as preceding insn. */
339 uid_luid
[INSN_UID (insn
)] = i
;
344 /* Entry point of this file. Perform loop optimization
345 on the current function. F is the first insn of the function
346 and DUMPFILE is a stream for output of a trace of actions taken
347 (or 0 if none should be output). */
350 loop_optimize (f
, dumpfile
, flags
)
351 /* f is the first instruction of a chain of insns for one function */
358 struct loops loops_data
;
359 struct loops
*loops
= &loops_data
;
360 struct loop_info
*loops_info
;
362 loop_dump_stream
= dumpfile
;
364 init_recog_no_volatile ();
366 max_reg_before_loop
= max_reg_num ();
367 loop_max_reg
= max_reg_before_loop
;
371 /* Count the number of loops. */
374 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
376 if (GET_CODE (insn
) == NOTE
377 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
381 /* Don't waste time if no loops. */
382 if (max_loop_num
== 0)
385 loops
->num
= max_loop_num
;
387 /* Get size to use for tables indexed by uids.
388 Leave some space for labels allocated by find_and_verify_loops. */
389 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
391 uid_luid
= (int *) xcalloc (max_uid_for_loop
, sizeof (int));
392 uid_loop
= (struct loop
**) xcalloc (max_uid_for_loop
,
393 sizeof (struct loop
*));
395 /* Allocate storage for array of loops. */
396 loops
->array
= (struct loop
*)
397 xcalloc (loops
->num
, sizeof (struct loop
));
399 /* Find and process each loop.
400 First, find them, and record them in order of their beginnings. */
401 find_and_verify_loops (f
, loops
);
403 /* Allocate and initialize auxiliary loop information. */
404 loops_info
= xcalloc (loops
->num
, sizeof (struct loop_info
));
405 for (i
= 0; i
< loops
->num
; i
++)
406 loops
->array
[i
].aux
= loops_info
+ i
;
408 /* Now find all register lifetimes. This must be done after
409 find_and_verify_loops, because it might reorder the insns in the
411 reg_scan (f
, max_reg_before_loop
, 1);
413 /* This must occur after reg_scan so that registers created by gcse
414 will have entries in the register tables.
416 We could have added a call to reg_scan after gcse_main in toplev.c,
417 but moving this call to init_alias_analysis is more efficient. */
418 init_alias_analysis ();
420 /* See if we went too far. Note that get_max_uid already returns
421 one more that the maximum uid of all insn. */
422 if (get_max_uid () > max_uid_for_loop
)
424 /* Now reset it to the actual size we need. See above. */
425 max_uid_for_loop
= get_max_uid ();
427 /* find_and_verify_loops has already called compute_luids, but it
428 might have rearranged code afterwards, so we need to recompute
430 max_luid
= compute_luids (f
, NULL_RTX
, 0);
432 /* Don't leave gaps in uid_luid for insns that have been
433 deleted. It is possible that the first or last insn
434 using some register has been deleted by cross-jumping.
435 Make sure that uid_luid for that former insn's uid
436 points to the general area where that insn used to be. */
437 for (i
= 0; i
< max_uid_for_loop
; i
++)
439 uid_luid
[0] = uid_luid
[i
];
440 if (uid_luid
[0] != 0)
443 for (i
= 0; i
< max_uid_for_loop
; i
++)
444 if (uid_luid
[i
] == 0)
445 uid_luid
[i
] = uid_luid
[i
- 1];
447 /* Determine if the function has indirect jump. On some systems
448 this prevents low overhead loop instructions from being used. */
449 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
451 /* Now scan the loops, last ones first, since this means inner ones are done
452 before outer ones. */
453 for (i
= max_loop_num
- 1; i
>= 0; i
--)
455 struct loop
*loop
= &loops
->array
[i
];
457 if (! loop
->invalid
&& loop
->end
)
458 scan_loop (loop
, flags
);
461 /* If there were lexical blocks inside the loop, they have been
462 replicated. We will now have more than one NOTE_INSN_BLOCK_BEG
463 and NOTE_INSN_BLOCK_END for each such block. We must duplicate
464 the BLOCKs as well. */
465 if (write_symbols
!= NO_DEBUG
)
468 end_alias_analysis ();
477 /* Returns the next insn, in execution order, after INSN. START and
478 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
479 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
480 insn-stream; it is used with loops that are entered near the
484 next_insn_in_loop (loop
, insn
)
485 const struct loop
*loop
;
488 insn
= NEXT_INSN (insn
);
490 if (insn
== loop
->end
)
493 /* Go to the top of the loop, and continue there. */
500 if (insn
== loop
->scan_start
)
507 /* Optimize one loop described by LOOP. */
509 /* ??? Could also move memory writes out of loops if the destination address
510 is invariant, the source is invariant, the memory write is not volatile,
511 and if we can prove that no read inside the loop can read this address
512 before the write occurs. If there is a read of this address after the
513 write, then we can also mark the memory read as invariant. */
516 scan_loop (loop
, flags
)
520 struct loop_info
*loop_info
= LOOP_INFO (loop
);
521 struct loop_regs
*regs
= LOOP_REGS (loop
);
523 rtx loop_start
= loop
->start
;
524 rtx loop_end
= loop
->end
;
526 /* 1 if we are scanning insns that could be executed zero times. */
528 /* 1 if we are scanning insns that might never be executed
529 due to a subroutine call which might exit before they are reached. */
531 /* Jump insn that enters the loop, or 0 if control drops in. */
532 rtx loop_entry_jump
= 0;
533 /* Number of insns in the loop. */
536 rtx temp
, update_start
, update_end
;
537 /* The SET from an insn, if it is the only SET in the insn. */
539 /* Chain describing insns movable in current loop. */
540 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
541 /* Ratio of extra register life span we can justify
542 for saving an instruction. More if loop doesn't call subroutines
543 since in that case saving an insn makes more difference
544 and more registers are available. */
546 /* Nonzero if we are scanning instructions in a sub-loop. */
555 /* Determine whether this loop starts with a jump down to a test at
556 the end. This will occur for a small number of loops with a test
557 that is too complex to duplicate in front of the loop.
559 We search for the first insn or label in the loop, skipping NOTEs.
560 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
561 (because we might have a loop executed only once that contains a
562 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
563 (in case we have a degenerate loop).
565 Note that if we mistakenly think that a loop is entered at the top
566 when, in fact, it is entered at the exit test, the only effect will be
567 slightly poorer optimization. Making the opposite error can generate
568 incorrect code. Since very few loops now start with a jump to the
569 exit test, the code here to detect that case is very conservative. */
571 for (p
= NEXT_INSN (loop_start
);
573 && GET_CODE (p
) != CODE_LABEL
&& ! INSN_P (p
)
574 && (GET_CODE (p
) != NOTE
575 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
576 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
580 loop
->scan_start
= p
;
582 /* If loop end is the end of the current function, then emit a
583 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
584 note insn. This is the position we use when sinking insns out of
586 if (NEXT_INSN (loop
->end
) != 0)
587 loop
->sink
= NEXT_INSN (loop
->end
);
589 loop
->sink
= emit_note_after (NOTE_INSN_DELETED
, loop
->end
);
591 /* Set up variables describing this loop. */
593 threshold
= (loop_info
->has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
595 /* If loop has a jump before the first label,
596 the true entry is the target of that jump.
597 Start scan from there.
598 But record in LOOP->TOP the place where the end-test jumps
599 back to so we can scan that after the end of the loop. */
600 if (GET_CODE (p
) == JUMP_INSN
)
604 /* Loop entry must be unconditional jump (and not a RETURN) */
605 if (any_uncondjump_p (p
)
606 && JUMP_LABEL (p
) != 0
607 /* Check to see whether the jump actually
608 jumps out of the loop (meaning it's no loop).
609 This case can happen for things like
610 do {..} while (0). If this label was generated previously
611 by loop, we can't tell anything about it and have to reject
613 && INSN_IN_RANGE_P (JUMP_LABEL (p
), loop_start
, loop_end
))
615 loop
->top
= next_label (loop
->scan_start
);
616 loop
->scan_start
= JUMP_LABEL (p
);
620 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
621 as required by loop_reg_used_before_p. So skip such loops. (This
622 test may never be true, but it's best to play it safe.)
624 Also, skip loops where we do not start scanning at a label. This
625 test also rejects loops starting with a JUMP_INSN that failed the
628 if (INSN_UID (loop
->scan_start
) >= max_uid_for_loop
629 || GET_CODE (loop
->scan_start
) != CODE_LABEL
)
631 if (loop_dump_stream
)
632 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
633 INSN_UID (loop_start
), INSN_UID (loop_end
));
637 /* Allocate extra space for REGs that might be created by load_mems.
638 We allocate a little extra slop as well, in the hopes that we
639 won't have to reallocate the regs array. */
640 loop_regs_scan (loop
, loop_info
->mems_idx
+ 16, &insn_count
);
642 if (loop_dump_stream
)
644 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
645 INSN_UID (loop_start
), INSN_UID (loop_end
), insn_count
);
647 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
648 INSN_UID (loop
->cont
));
651 /* Scan through the loop finding insns that are safe to move.
652 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
653 this reg will be considered invariant for subsequent insns.
654 We consider whether subsequent insns use the reg
655 in deciding whether it is worth actually moving.
657 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
658 and therefore it is possible that the insns we are scanning
659 would never be executed. At such times, we must make sure
660 that it is safe to execute the insn once instead of zero times.
661 When MAYBE_NEVER is 0, all insns will be executed at least once
662 so that is not a problem. */
664 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
666 p
= next_insn_in_loop (loop
, p
))
668 if (GET_CODE (p
) == INSN
669 && (set
= single_set (p
))
670 && GET_CODE (SET_DEST (set
)) == REG
671 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
676 rtx src
= SET_SRC (set
);
677 rtx dependencies
= 0;
679 /* Figure out what to use as a source of this insn. If a REG_EQUIV
680 note is given or if a REG_EQUAL note with a constant operand is
681 specified, use it as the source and mark that we should move
682 this insn by calling emit_move_insn rather that duplicating the
685 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
687 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
689 src
= XEXP (temp
, 0), move_insn
= 1;
692 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
693 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
694 src
= XEXP (temp
, 0), move_insn
= 1;
695 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
697 src
= XEXP (temp
, 0);
698 /* A libcall block can use regs that don't appear in
699 the equivalent expression. To move the libcall,
700 we must move those regs too. */
701 dependencies
= libcall_other_reg (p
, src
);
705 /* Don't try to optimize a register that was made
706 by loop-optimization for an inner loop.
707 We don't know its life-span, so we can't compute the benefit. */
708 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
710 else if (/* The register is used in basic blocks other
711 than the one where it is set (meaning that
712 something after this point in the loop might
713 depend on its value before the set). */
714 ! reg_in_basic_block_p (p
, SET_DEST (set
))
715 /* And the set is not guaranteed to be executed one
716 the loop starts, or the value before the set is
717 needed before the set occurs...
719 ??? Note we have quadratic behaviour here, mitigated
720 by the fact that the previous test will often fail for
721 large loops. Rather than re-scanning the entire loop
722 each time for register usage, we should build tables
723 of the register usage and use them here instead. */
725 || loop_reg_used_before_p (loop
, set
, p
)))
726 /* It is unsafe to move the set.
728 This code used to consider it OK to move a set of a variable
729 which was not created by the user and not used in an exit test.
730 That behavior is incorrect and was removed. */
732 else if ((tem
= loop_invariant_p (loop
, src
))
733 && (dependencies
== 0
734 || (tem2
= loop_invariant_p (loop
, dependencies
)) != 0)
735 && (regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
== 1
737 = consec_sets_invariant_p
738 (loop
, SET_DEST (set
),
739 regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
,
741 /* If the insn can cause a trap (such as divide by zero),
742 can't move it unless it's guaranteed to be executed
743 once loop is entered. Even a function call might
744 prevent the trap insn from being reached
745 (since it might exit!) */
746 && ! ((maybe_never
|| call_passed
)
747 && may_trap_p (src
)))
749 register struct movable
*m
;
750 register int regno
= REGNO (SET_DEST (set
));
752 /* A potential lossage is where we have a case where two insns
753 can be combined as long as they are both in the loop, but
754 we move one of them outside the loop. For large loops,
755 this can lose. The most common case of this is the address
756 of a function being called.
758 Therefore, if this register is marked as being used exactly
759 once if we are in a loop with calls (a "large loop"), see if
760 we can replace the usage of this register with the source
761 of this SET. If we can, delete this insn.
763 Don't do this if P has a REG_RETVAL note or if we have
764 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
766 if (loop_info
->has_call
767 && regs
->array
[regno
].single_usage
!= 0
768 && regs
->array
[regno
].single_usage
!= const0_rtx
769 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
770 && (REGNO_LAST_UID (regno
)
771 == INSN_UID (regs
->array
[regno
].single_usage
))
772 && regs
->array
[regno
].set_in_loop
== 1
773 && ! side_effects_p (SET_SRC (set
))
774 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
775 && (! SMALL_REGISTER_CLASSES
776 || (! (GET_CODE (SET_SRC (set
)) == REG
777 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
778 /* This test is not redundant; SET_SRC (set) might be
779 a call-clobbered register and the life of REGNO
780 might span a call. */
781 && ! modified_between_p (SET_SRC (set
), p
,
782 regs
->array
[regno
].single_usage
)
783 && no_labels_between_p (p
, regs
->array
[regno
].single_usage
)
784 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
785 regs
->array
[regno
].single_usage
))
787 /* Replace any usage in a REG_EQUAL note. Must copy the
788 new source, so that we don't get rtx sharing between the
789 SET_SOURCE and REG_NOTES of insn p. */
790 REG_NOTES (regs
->array
[regno
].single_usage
)
791 = replace_rtx (REG_NOTES (regs
->array
[regno
].single_usage
),
792 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
795 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
796 NOTE_SOURCE_FILE (p
) = 0;
797 regs
->array
[regno
].set_in_loop
= 0;
801 m
= (struct movable
*) xmalloc (sizeof (struct movable
));
805 m
->dependencies
= dependencies
;
806 m
->set_dest
= SET_DEST (set
);
808 m
->consec
= regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
- 1;
812 m
->move_insn
= move_insn
;
813 m
->move_insn_first
= 0;
814 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
815 m
->savemode
= VOIDmode
;
817 /* Set M->cond if either loop_invariant_p
818 or consec_sets_invariant_p returned 2
819 (only conditionally invariant). */
820 m
->cond
= ((tem
| tem1
| tem2
) > 1);
821 m
->global
= LOOP_REG_GLOBAL_P (loop
, regno
);
823 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
824 m
->savings
= regs
->array
[regno
].n_times_set
;
825 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
826 m
->savings
+= libcall_benefit (p
);
827 regs
->array
[regno
].set_in_loop
= move_insn
? -2 : -1;
828 /* Add M to the end of the chain MOVABLES. */
829 loop_movables_add (movables
, m
);
833 /* It is possible for the first instruction to have a
834 REG_EQUAL note but a non-invariant SET_SRC, so we must
835 remember the status of the first instruction in case
836 the last instruction doesn't have a REG_EQUAL note. */
837 m
->move_insn_first
= m
->move_insn
;
839 /* Skip this insn, not checking REG_LIBCALL notes. */
840 p
= next_nonnote_insn (p
);
841 /* Skip the consecutive insns, if there are any. */
842 p
= skip_consec_insns (p
, m
->consec
);
843 /* Back up to the last insn of the consecutive group. */
844 p
= prev_nonnote_insn (p
);
846 /* We must now reset m->move_insn, m->is_equiv, and possibly
847 m->set_src to correspond to the effects of all the
849 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
851 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
854 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
855 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
856 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
861 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
864 /* If this register is always set within a STRICT_LOW_PART
865 or set to zero, then its high bytes are constant.
866 So clear them outside the loop and within the loop
867 just load the low bytes.
868 We must check that the machine has an instruction to do so.
869 Also, if the value loaded into the register
870 depends on the same register, this cannot be done. */
871 else if (SET_SRC (set
) == const0_rtx
872 && GET_CODE (NEXT_INSN (p
)) == INSN
873 && (set1
= single_set (NEXT_INSN (p
)))
874 && GET_CODE (set1
) == SET
875 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
876 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
877 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
879 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
881 register int regno
= REGNO (SET_DEST (set
));
882 if (regs
->array
[regno
].set_in_loop
== 2)
884 register struct movable
*m
;
885 m
= (struct movable
*) xmalloc (sizeof (struct movable
));
888 m
->set_dest
= SET_DEST (set
);
895 m
->move_insn_first
= 0;
897 /* If the insn may not be executed on some cycles,
898 we can't clear the whole reg; clear just high part.
899 Not even if the reg is used only within this loop.
906 Clearing x before the inner loop could clobber a value
907 being saved from the last time around the outer loop.
908 However, if the reg is not used outside this loop
909 and all uses of the register are in the same
910 basic block as the store, there is no problem.
912 If this insn was made by loop, we don't know its
913 INSN_LUID and hence must make a conservative
915 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
916 || LOOP_REG_GLOBAL_P (loop
, regno
)
917 || (labels_in_range_p
918 (p
, REGNO_FIRST_LUID (regno
))));
919 if (maybe_never
&& m
->global
)
920 m
->savemode
= GET_MODE (SET_SRC (set1
));
922 m
->savemode
= VOIDmode
;
926 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
928 regs
->array
[regno
].set_in_loop
= -1;
929 /* Add M to the end of the chain MOVABLES. */
930 loop_movables_add (movables
, m
);
934 /* Past a call insn, we get to insns which might not be executed
935 because the call might exit. This matters for insns that trap.
936 Constant and pure call insns always return, so they don't count. */
937 else if (GET_CODE (p
) == CALL_INSN
&& ! CONST_CALL_P (p
))
939 /* Past a label or a jump, we get to insns for which we
940 can't count on whether or how many times they will be
941 executed during each iteration. Therefore, we can
942 only move out sets of trivial variables
943 (those not used after the loop). */
944 /* Similar code appears twice in strength_reduce. */
945 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
946 /* If we enter the loop in the middle, and scan around to the
947 beginning, don't set maybe_never for that. This must be an
948 unconditional jump, otherwise the code at the top of the
949 loop might never be executed. Unconditional jumps are
950 followed a by barrier then loop end. */
951 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop
->top
952 && NEXT_INSN (NEXT_INSN (p
)) == loop_end
953 && any_uncondjump_p (p
)))
955 else if (GET_CODE (p
) == NOTE
)
957 /* At the virtual top of a converted loop, insns are again known to
958 be executed: logically, the loop begins here even though the exit
959 code has been duplicated. */
960 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
961 maybe_never
= call_passed
= 0;
962 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
964 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
969 /* If one movable subsumes another, ignore that other. */
971 ignore_some_movables (movables
);
973 /* For each movable insn, see if the reg that it loads
974 leads when it dies right into another conditionally movable insn.
975 If so, record that the second insn "forces" the first one,
976 since the second can be moved only if the first is. */
978 force_movables (movables
);
980 /* See if there are multiple movable insns that load the same value.
981 If there are, make all but the first point at the first one
982 through the `match' field, and add the priorities of them
983 all together as the priority of the first. */
985 combine_movables (movables
, regs
);
987 /* Now consider each movable insn to decide whether it is worth moving.
988 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
990 Generally this increases code size, so do not move moveables when
991 optimizing for code size. */
994 move_movables (loop
, movables
, threshold
, insn_count
);
996 /* Now candidates that still are negative are those not moved.
997 Change regs->array[I].set_in_loop to indicate that those are not actually
999 for (i
= 0; i
< regs
->num
; i
++)
1000 if (regs
->array
[i
].set_in_loop
< 0)
1001 regs
->array
[i
].set_in_loop
= regs
->array
[i
].n_times_set
;
1003 /* Now that we've moved some things out of the loop, we might be able to
1004 hoist even more memory references. */
1007 /* Recalculate regs->array if load_mems has created new registers. */
1008 if (max_reg_num () > regs
->num
)
1009 loop_regs_scan (loop
, 0, &insn_count
);
1011 for (update_start
= loop_start
;
1012 PREV_INSN (update_start
)
1013 && GET_CODE (PREV_INSN (update_start
)) != CODE_LABEL
;
1014 update_start
= PREV_INSN (update_start
))
1016 update_end
= NEXT_INSN (loop_end
);
1018 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1019 loop_max_reg
= max_reg_num ();
1021 if (flag_strength_reduce
)
1023 if (update_end
&& GET_CODE (update_end
) == CODE_LABEL
)
1024 /* Ensure our label doesn't go away. */
1025 LABEL_NUSES (update_end
)++;
1027 strength_reduce (loop
, insn_count
, flags
);
1029 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1030 loop_max_reg
= max_reg_num ();
1032 if (update_end
&& GET_CODE (update_end
) == CODE_LABEL
1033 && --LABEL_NUSES (update_end
) == 0)
1034 delete_insn (update_end
);
1038 /* The movable information is required for strength reduction. */
1039 loop_movables_free (movables
);
1046 /* Add elements to *OUTPUT to record all the pseudo-regs
1047 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1050 record_excess_regs (in_this
, not_in_this
, output
)
1051 rtx in_this
, not_in_this
;
1058 code
= GET_CODE (in_this
);
1072 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1073 && ! reg_mentioned_p (in_this
, not_in_this
))
1074 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1081 fmt
= GET_RTX_FORMAT (code
);
1082 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1089 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1090 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1094 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1100 /* Check what regs are referred to in the libcall block ending with INSN,
1101 aside from those mentioned in the equivalent value.
1102 If there are none, return 0.
1103 If there are one or more, return an EXPR_LIST containing all of them. */
1106 libcall_other_reg (insn
, equiv
)
1109 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1110 rtx p
= XEXP (note
, 0);
1113 /* First, find all the regs used in the libcall block
1114 that are not mentioned as inputs to the result. */
1118 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1119 || GET_CODE (p
) == CALL_INSN
)
1120 record_excess_regs (PATTERN (p
), equiv
, &output
);
1127 /* Return 1 if all uses of REG
1128 are between INSN and the end of the basic block. */
1131 reg_in_basic_block_p (insn
, reg
)
1134 int regno
= REGNO (reg
);
1137 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1140 /* Search this basic block for the already recorded last use of the reg. */
1141 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1143 switch (GET_CODE (p
))
1150 /* Ordinary insn: if this is the last use, we win. */
1151 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1156 /* Jump insn: if this is the last use, we win. */
1157 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1159 /* Otherwise, it's the end of the basic block, so we lose. */
1164 /* It's the end of the basic block, so we lose. */
1172 /* The "last use" that was recorded can't be found after the first
1173 use. This can happen when the last use was deleted while
1174 processing an inner loop, this inner loop was then completely
1175 unrolled, and the outer loop is always exited after the inner loop,
1176 so that everything after the first use becomes a single basic block. */
1180 /* Compute the benefit of eliminating the insns in the block whose
1181 last insn is LAST. This may be a group of insns used to compute a
1182 value directly or can contain a library call. */
1185 libcall_benefit (last
)
1191 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1192 insn
!= last
; insn
= NEXT_INSN (insn
))
1194 if (GET_CODE (insn
) == CALL_INSN
)
1195 benefit
+= 10; /* Assume at least this many insns in a library
1197 else if (GET_CODE (insn
) == INSN
1198 && GET_CODE (PATTERN (insn
)) != USE
1199 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1206 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1209 skip_consec_insns (insn
, count
)
1213 for (; count
> 0; count
--)
1217 /* If first insn of libcall sequence, skip to end. */
1218 /* Do this at start of loop, since INSN is guaranteed to
1220 if (GET_CODE (insn
) != NOTE
1221 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1222 insn
= XEXP (temp
, 0);
1225 insn
= NEXT_INSN (insn
);
1226 while (GET_CODE (insn
) == NOTE
);
1232 /* Ignore any movable whose insn falls within a libcall
1233 which is part of another movable.
1234 We make use of the fact that the movable for the libcall value
1235 was made later and so appears later on the chain. */
1238 ignore_some_movables (movables
)
1239 struct loop_movables
*movables
;
1241 register struct movable
*m
, *m1
;
1243 for (m
= movables
->head
; m
; m
= m
->next
)
1245 /* Is this a movable for the value of a libcall? */
1246 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1250 /* Check for earlier movables inside that range,
1251 and mark them invalid. We cannot use LUIDs here because
1252 insns created by loop.c for prior loops don't have LUIDs.
1253 Rather than reject all such insns from movables, we just
1254 explicitly check each insn in the libcall (since invariant
1255 libcalls aren't that common). */
1256 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1257 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1258 if (m1
->insn
== insn
)
1264 /* For each movable insn, see if the reg that it loads
1265 leads when it dies right into another conditionally movable insn.
1266 If so, record that the second insn "forces" the first one,
1267 since the second can be moved only if the first is. */
1270 force_movables (movables
)
1271 struct loop_movables
*movables
;
1273 register struct movable
*m
, *m1
;
1274 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
1275 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1276 if (!m1
->partial
&& !m1
->done
)
1278 int regno
= m1
->regno
;
1279 for (m
= m1
->next
; m
; m
= m
->next
)
1280 /* ??? Could this be a bug? What if CSE caused the
1281 register of M1 to be used after this insn?
1282 Since CSE does not update regno_last_uid,
1283 this insn M->insn might not be where it dies.
1284 But very likely this doesn't matter; what matters is
1285 that M's reg is computed from M1's reg. */
1286 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1289 if (m
!= 0 && m
->set_src
== m1
->set_dest
1290 /* If m->consec, m->set_src isn't valid. */
1294 /* Increase the priority of the moving the first insn
1295 since it permits the second to be moved as well. */
1299 m1
->lifetime
+= m
->lifetime
;
1300 m1
->savings
+= m
->savings
;
1305 /* Find invariant expressions that are equal and can be combined into
1309 combine_movables (movables
, regs
)
1310 struct loop_movables
*movables
;
1311 struct loop_regs
*regs
;
1313 register struct movable
*m
;
1314 char *matched_regs
= (char *) xmalloc (regs
->num
);
1315 enum machine_mode mode
;
1317 /* Regs that are set more than once are not allowed to match
1318 or be matched. I'm no longer sure why not. */
1319 /* Perhaps testing m->consec_sets would be more appropriate here? */
1321 for (m
= movables
->head
; m
; m
= m
->next
)
1322 if (m
->match
== 0 && regs
->array
[m
->regno
].n_times_set
== 1
1325 register struct movable
*m1
;
1326 int regno
= m
->regno
;
1328 memset (matched_regs
, 0, regs
->num
);
1329 matched_regs
[regno
] = 1;
1331 /* We want later insns to match the first one. Don't make the first
1332 one match any later ones. So start this loop at m->next. */
1333 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1334 if (m
!= m1
&& m1
->match
== 0
1335 && regs
->array
[m1
->regno
].n_times_set
== 1
1336 /* A reg used outside the loop mustn't be eliminated. */
1338 /* A reg used for zero-extending mustn't be eliminated. */
1340 && (matched_regs
[m1
->regno
]
1343 /* Can combine regs with different modes loaded from the
1344 same constant only if the modes are the same or
1345 if both are integer modes with M wider or the same
1346 width as M1. The check for integer is redundant, but
1347 safe, since the only case of differing destination
1348 modes with equal sources is when both sources are
1349 VOIDmode, i.e., CONST_INT. */
1350 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1351 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1352 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1353 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1354 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1355 /* See if the source of M1 says it matches M. */
1356 && ((GET_CODE (m1
->set_src
) == REG
1357 && matched_regs
[REGNO (m1
->set_src
)])
1358 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1360 && ((m
->dependencies
== m1
->dependencies
)
1361 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1363 m
->lifetime
+= m1
->lifetime
;
1364 m
->savings
+= m1
->savings
;
1367 matched_regs
[m1
->regno
] = 1;
1371 /* Now combine the regs used for zero-extension.
1372 This can be done for those not marked `global'
1373 provided their lives don't overlap. */
1375 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1376 mode
= GET_MODE_WIDER_MODE (mode
))
1378 register struct movable
*m0
= 0;
1380 /* Combine all the registers for extension from mode MODE.
1381 Don't combine any that are used outside this loop. */
1382 for (m
= movables
->head
; m
; m
= m
->next
)
1383 if (m
->partial
&& ! m
->global
1384 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1386 register struct movable
*m1
;
1387 int first
= REGNO_FIRST_LUID (m
->regno
);
1388 int last
= REGNO_LAST_LUID (m
->regno
);
1392 /* First one: don't check for overlap, just record it. */
1397 /* Make sure they extend to the same mode.
1398 (Almost always true.) */
1399 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1402 /* We already have one: check for overlap with those
1403 already combined together. */
1404 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1405 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1406 if (! (REGNO_FIRST_LUID (m1
->regno
) > last
1407 || REGNO_LAST_LUID (m1
->regno
) < first
))
1410 /* No overlap: we can combine this with the others. */
1411 m0
->lifetime
+= m
->lifetime
;
1412 m0
->savings
+= m
->savings
;
1422 free (matched_regs
);
1425 /* Return 1 if regs X and Y will become the same if moved. */
1428 regs_match_p (x
, y
, movables
)
1430 struct loop_movables
*movables
;
1432 unsigned int xn
= REGNO (x
);
1433 unsigned int yn
= REGNO (y
);
1434 struct movable
*mx
, *my
;
1436 for (mx
= movables
->head
; mx
; mx
= mx
->next
)
1437 if (mx
->regno
== xn
)
1440 for (my
= movables
->head
; my
; my
= my
->next
)
1441 if (my
->regno
== yn
)
1445 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1447 || mx
== my
->match
));
1450 /* Return 1 if X and Y are identical-looking rtx's.
1451 This is the Lisp function EQUAL for rtx arguments.
1453 If two registers are matching movables or a movable register and an
1454 equivalent constant, consider them equal. */
1457 rtx_equal_for_loop_p (x
, y
, movables
, regs
)
1459 struct loop_movables
*movables
;
1460 struct loop_regs
*regs
;
1464 register struct movable
*m
;
1465 register enum rtx_code code
;
1466 register const char *fmt
;
1470 if (x
== 0 || y
== 0)
1473 code
= GET_CODE (x
);
1475 /* If we have a register and a constant, they may sometimes be
1477 if (GET_CODE (x
) == REG
&& regs
->array
[REGNO (x
)].set_in_loop
== -2
1480 for (m
= movables
->head
; m
; m
= m
->next
)
1481 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1482 && rtx_equal_p (m
->set_src
, y
))
1485 else if (GET_CODE (y
) == REG
&& regs
->array
[REGNO (y
)].set_in_loop
== -2
1488 for (m
= movables
->head
; m
; m
= m
->next
)
1489 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1490 && rtx_equal_p (m
->set_src
, x
))
1494 /* Otherwise, rtx's of different codes cannot be equal. */
1495 if (code
!= GET_CODE (y
))
1498 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1499 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1501 if (GET_MODE (x
) != GET_MODE (y
))
1504 /* These three types of rtx's can be compared nonrecursively. */
1506 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1508 if (code
== LABEL_REF
)
1509 return XEXP (x
, 0) == XEXP (y
, 0);
1510 if (code
== SYMBOL_REF
)
1511 return XSTR (x
, 0) == XSTR (y
, 0);
1513 /* Compare the elements. If any pair of corresponding elements
1514 fail to match, return 0 for the whole things. */
1516 fmt
= GET_RTX_FORMAT (code
);
1517 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1522 if (XWINT (x
, i
) != XWINT (y
, i
))
1527 if (XINT (x
, i
) != XINT (y
, i
))
1532 /* Two vectors must have the same length. */
1533 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1536 /* And the corresponding elements must match. */
1537 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1538 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
1539 movables
, regs
) == 0)
1544 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
, regs
)
1550 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1555 /* These are just backpointers, so they don't matter. */
1561 /* It is believed that rtx's at this level will never
1562 contain anything but integers and other rtx's,
1563 except for within LABEL_REFs and SYMBOL_REFs. */
1571 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1572 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1573 references is incremented once for each added note. */
1576 add_label_notes (x
, insns
)
1580 enum rtx_code code
= GET_CODE (x
);
1585 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1587 /* This code used to ignore labels that referred to dispatch tables to
1588 avoid flow generating (slighly) worse code.
1590 We no longer ignore such label references (see LABEL_REF handling in
1591 mark_jump_label for additional information). */
1592 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1593 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1595 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
, XEXP (x
, 0),
1597 if (LABEL_P (XEXP (x
, 0)))
1598 LABEL_NUSES (XEXP (x
, 0))++;
1602 fmt
= GET_RTX_FORMAT (code
);
1603 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1606 add_label_notes (XEXP (x
, i
), insns
);
1607 else if (fmt
[i
] == 'E')
1608 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1609 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1613 /* Scan MOVABLES, and move the insns that deserve to be moved.
1614 If two matching movables are combined, replace one reg with the
1615 other throughout. */
1618 move_movables (loop
, movables
, threshold
, insn_count
)
1620 struct loop_movables
*movables
;
1624 struct loop_regs
*regs
= LOOP_REGS (loop
);
1625 int nregs
= regs
->num
;
1627 register struct movable
*m
;
1629 rtx loop_start
= loop
->start
;
1630 rtx loop_end
= loop
->end
;
1631 /* Map of pseudo-register replacements to handle combining
1632 when we move several insns that load the same value
1633 into different pseudo-registers. */
1634 rtx
*reg_map
= (rtx
*) xcalloc (nregs
, sizeof (rtx
));
1635 char *already_moved
= (char *) xcalloc (nregs
, sizeof (char));
1639 for (m
= movables
->head
; m
; m
= m
->next
)
1641 /* Describe this movable insn. */
1643 if (loop_dump_stream
)
1645 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1646 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1648 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1650 fprintf (loop_dump_stream
, "cond ");
1652 fprintf (loop_dump_stream
, "force ");
1654 fprintf (loop_dump_stream
, "global ");
1656 fprintf (loop_dump_stream
, "done ");
1658 fprintf (loop_dump_stream
, "move-insn ");
1660 fprintf (loop_dump_stream
, "matches %d ",
1661 INSN_UID (m
->match
->insn
));
1663 fprintf (loop_dump_stream
, "forces %d ",
1664 INSN_UID (m
->forces
->insn
));
1667 /* Count movables. Value used in heuristics in strength_reduce. */
1670 /* Ignore the insn if it's already done (it matched something else).
1671 Otherwise, see if it is now safe to move. */
1675 || (1 == loop_invariant_p (loop
, m
->set_src
)
1676 && (m
->dependencies
== 0
1677 || 1 == loop_invariant_p (loop
, m
->dependencies
))
1679 || 1 == consec_sets_invariant_p (loop
, m
->set_dest
,
1682 && (! m
->forces
|| m
->forces
->done
))
1686 int savings
= m
->savings
;
1688 /* We have an insn that is safe to move.
1689 Compute its desirability. */
1694 if (loop_dump_stream
)
1695 fprintf (loop_dump_stream
, "savings %d ", savings
);
1697 if (regs
->array
[regno
].moved_once
&& loop_dump_stream
)
1698 fprintf (loop_dump_stream
, "halved since already moved ");
1700 /* An insn MUST be moved if we already moved something else
1701 which is safe only if this one is moved too: that is,
1702 if already_moved[REGNO] is nonzero. */
1704 /* An insn is desirable to move if the new lifetime of the
1705 register is no more than THRESHOLD times the old lifetime.
1706 If it's not desirable, it means the loop is so big
1707 that moving won't speed things up much,
1708 and it is liable to make register usage worse. */
1710 /* It is also desirable to move if it can be moved at no
1711 extra cost because something else was already moved. */
1713 if (already_moved
[regno
]
1714 || flag_move_all_movables
1715 || (threshold
* savings
* m
->lifetime
) >=
1716 (regs
->array
[regno
].moved_once
? insn_count
* 2 : insn_count
)
1717 || (m
->forces
&& m
->forces
->done
1718 && regs
->array
[m
->forces
->regno
].n_times_set
== 1))
1721 register struct movable
*m1
;
1722 rtx first
= NULL_RTX
;
1724 /* Now move the insns that set the reg. */
1726 if (m
->partial
&& m
->match
)
1730 /* Find the end of this chain of matching regs.
1731 Thus, we load each reg in the chain from that one reg.
1732 And that reg is loaded with 0 directly,
1733 since it has ->match == 0. */
1734 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1735 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1736 SET_DEST (PATTERN (m1
->insn
)));
1737 i1
= loop_insn_hoist (loop
, newpat
);
1739 /* Mark the moved, invariant reg as being allowed to
1740 share a hard reg with the other matching invariant. */
1741 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1742 r1
= SET_DEST (PATTERN (m
->insn
));
1743 r2
= SET_DEST (PATTERN (m1
->insn
));
1745 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1746 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1748 delete_insn (m
->insn
);
1753 if (loop_dump_stream
)
1754 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1756 /* If we are to re-generate the item being moved with a
1757 new move insn, first delete what we have and then emit
1758 the move insn before the loop. */
1759 else if (m
->move_insn
)
1763 for (count
= m
->consec
; count
>= 0; count
--)
1765 /* If this is the first insn of a library call sequence,
1767 if (GET_CODE (p
) != NOTE
1768 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1771 /* If this is the last insn of a libcall sequence, then
1772 delete every insn in the sequence except the last.
1773 The last insn is handled in the normal manner. */
1774 if (GET_CODE (p
) != NOTE
1775 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1777 temp
= XEXP (temp
, 0);
1779 temp
= delete_insn (temp
);
1783 p
= delete_insn (p
);
1785 /* simplify_giv_expr expects that it can walk the insns
1786 at m->insn forwards and see this old sequence we are
1787 tossing here. delete_insn does preserve the next
1788 pointers, but when we skip over a NOTE we must fix
1789 it up. Otherwise that code walks into the non-deleted
1791 while (p
&& GET_CODE (p
) == NOTE
)
1792 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
1796 emit_move_insn (m
->set_dest
, m
->set_src
);
1797 temp
= get_insns ();
1798 seq
= gen_sequence ();
1801 add_label_notes (m
->set_src
, temp
);
1803 i1
= loop_insn_hoist (loop
, seq
);
1804 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1806 = gen_rtx_EXPR_LIST (m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1807 m
->set_src
, REG_NOTES (i1
));
1809 if (loop_dump_stream
)
1810 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1812 /* The more regs we move, the less we like moving them. */
1817 for (count
= m
->consec
; count
>= 0; count
--)
1821 /* If first insn of libcall sequence, skip to end. */
1822 /* Do this at start of loop, since p is guaranteed to
1824 if (GET_CODE (p
) != NOTE
1825 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1828 /* If last insn of libcall sequence, move all
1829 insns except the last before the loop. The last
1830 insn is handled in the normal manner. */
1831 if (GET_CODE (p
) != NOTE
1832 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1836 rtx fn_address_insn
= 0;
1839 for (temp
= XEXP (temp
, 0); temp
!= p
;
1840 temp
= NEXT_INSN (temp
))
1846 if (GET_CODE (temp
) == NOTE
)
1849 body
= PATTERN (temp
);
1851 /* Find the next insn after TEMP,
1852 not counting USE or NOTE insns. */
1853 for (next
= NEXT_INSN (temp
); next
!= p
;
1854 next
= NEXT_INSN (next
))
1855 if (! (GET_CODE (next
) == INSN
1856 && GET_CODE (PATTERN (next
)) == USE
)
1857 && GET_CODE (next
) != NOTE
)
1860 /* If that is the call, this may be the insn
1861 that loads the function address.
1863 Extract the function address from the insn
1864 that loads it into a register.
1865 If this insn was cse'd, we get incorrect code.
1867 So emit a new move insn that copies the
1868 function address into the register that the
1869 call insn will use. flow.c will delete any
1870 redundant stores that we have created. */
1871 if (GET_CODE (next
) == CALL_INSN
1872 && GET_CODE (body
) == SET
1873 && GET_CODE (SET_DEST (body
)) == REG
1874 && (n
= find_reg_note (temp
, REG_EQUAL
,
1877 fn_reg
= SET_SRC (body
);
1878 if (GET_CODE (fn_reg
) != REG
)
1879 fn_reg
= SET_DEST (body
);
1880 fn_address
= XEXP (n
, 0);
1881 fn_address_insn
= temp
;
1883 /* We have the call insn.
1884 If it uses the register we suspect it might,
1885 load it with the correct address directly. */
1886 if (GET_CODE (temp
) == CALL_INSN
1888 && reg_referenced_p (fn_reg
, body
))
1889 loop_insn_emit_after (loop
, 0, fn_address_insn
,
1891 (fn_reg
, fn_address
));
1893 if (GET_CODE (temp
) == CALL_INSN
)
1895 i1
= loop_call_insn_hoist (loop
, body
);
1896 /* Because the USAGE information potentially
1897 contains objects other than hard registers
1898 we need to copy it. */
1899 if (CALL_INSN_FUNCTION_USAGE (temp
))
1900 CALL_INSN_FUNCTION_USAGE (i1
)
1901 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1904 i1
= loop_insn_hoist (loop
, body
);
1907 if (temp
== fn_address_insn
)
1908 fn_address_insn
= i1
;
1909 REG_NOTES (i1
) = REG_NOTES (temp
);
1915 if (m
->savemode
!= VOIDmode
)
1917 /* P sets REG to zero; but we should clear only
1918 the bits that are not covered by the mode
1920 rtx reg
= m
->set_dest
;
1926 (GET_MODE (reg
), and_optab
, reg
,
1927 GEN_INT ((((HOST_WIDE_INT
) 1
1928 << GET_MODE_BITSIZE (m
->savemode
)))
1930 reg
, 1, OPTAB_LIB_WIDEN
);
1934 emit_move_insn (reg
, tem
);
1935 sequence
= gen_sequence ();
1937 i1
= loop_insn_hoist (loop
, sequence
);
1939 else if (GET_CODE (p
) == CALL_INSN
)
1941 i1
= loop_call_insn_hoist (loop
, PATTERN (p
));
1942 /* Because the USAGE information potentially
1943 contains objects other than hard registers
1944 we need to copy it. */
1945 if (CALL_INSN_FUNCTION_USAGE (p
))
1946 CALL_INSN_FUNCTION_USAGE (i1
)
1947 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1949 else if (count
== m
->consec
&& m
->move_insn_first
)
1952 /* The SET_SRC might not be invariant, so we must
1953 use the REG_EQUAL note. */
1955 emit_move_insn (m
->set_dest
, m
->set_src
);
1956 temp
= get_insns ();
1957 seq
= gen_sequence ();
1960 add_label_notes (m
->set_src
, temp
);
1962 i1
= loop_insn_hoist (loop
, seq
);
1963 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1965 = gen_rtx_EXPR_LIST ((m
->is_equiv
? REG_EQUIV
1967 m
->set_src
, REG_NOTES (i1
));
1970 i1
= loop_insn_hoist (loop
, PATTERN (p
));
1972 if (REG_NOTES (i1
) == 0)
1974 REG_NOTES (i1
) = REG_NOTES (p
);
1976 /* If there is a REG_EQUAL note present whose value
1977 is not loop invariant, then delete it, since it
1978 may cause problems with later optimization passes.
1979 It is possible for cse to create such notes
1980 like this as a result of record_jump_cond. */
1982 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1983 && ! loop_invariant_p (loop
, XEXP (temp
, 0)))
1984 remove_note (i1
, temp
);
1990 if (loop_dump_stream
)
1991 fprintf (loop_dump_stream
, " moved to %d",
1994 /* If library call, now fix the REG_NOTES that contain
1995 insn pointers, namely REG_LIBCALL on FIRST
1996 and REG_RETVAL on I1. */
1997 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
1999 XEXP (temp
, 0) = first
;
2000 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2001 XEXP (temp
, 0) = i1
;
2008 /* simplify_giv_expr expects that it can walk the insns
2009 at m->insn forwards and see this old sequence we are
2010 tossing here. delete_insn does preserve the next
2011 pointers, but when we skip over a NOTE we must fix
2012 it up. Otherwise that code walks into the non-deleted
2014 while (p
&& GET_CODE (p
) == NOTE
)
2015 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
2018 /* The more regs we move, the less we like moving them. */
2022 /* Any other movable that loads the same register
2024 already_moved
[regno
] = 1;
2026 /* This reg has been moved out of one loop. */
2027 regs
->array
[regno
].moved_once
= 1;
2029 /* The reg set here is now invariant. */
2031 regs
->array
[regno
].set_in_loop
= 0;
2035 /* Change the length-of-life info for the register
2036 to say it lives at least the full length of this loop.
2037 This will help guide optimizations in outer loops. */
2039 if (REGNO_FIRST_LUID (regno
) > INSN_LUID (loop_start
))
2040 /* This is the old insn before all the moved insns.
2041 We can't use the moved insn because it is out of range
2042 in uid_luid. Only the old insns have luids. */
2043 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2044 if (REGNO_LAST_LUID (regno
) < INSN_LUID (loop_end
))
2045 REGNO_LAST_UID (regno
) = INSN_UID (loop_end
);
2047 /* Combine with this moved insn any other matching movables. */
2050 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
2055 /* Schedule the reg loaded by M1
2056 for replacement so that shares the reg of M.
2057 If the modes differ (only possible in restricted
2058 circumstances, make a SUBREG.
2060 Note this assumes that the target dependent files
2061 treat REG and SUBREG equally, including within
2062 GO_IF_LEGITIMATE_ADDRESS and in all the
2063 predicates since we never verify that replacing the
2064 original register with a SUBREG results in a
2065 recognizable insn. */
2066 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2067 reg_map
[m1
->regno
] = m
->set_dest
;
2070 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2073 /* Get rid of the matching insn
2074 and prevent further processing of it. */
2077 /* if library call, delete all insn except last, which
2079 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2082 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2083 temp
= NEXT_INSN (temp
))
2086 delete_insn (m1
->insn
);
2088 /* Any other movable that loads the same register
2090 already_moved
[m1
->regno
] = 1;
2092 /* The reg merged here is now invariant,
2093 if the reg it matches is invariant. */
2095 regs
->array
[m1
->regno
].set_in_loop
= 0;
2098 else if (loop_dump_stream
)
2099 fprintf (loop_dump_stream
, "not desirable");
2101 else if (loop_dump_stream
&& !m
->match
)
2102 fprintf (loop_dump_stream
, "not safe");
2104 if (loop_dump_stream
)
2105 fprintf (loop_dump_stream
, "\n");
2109 new_start
= loop_start
;
2111 /* Go through all the instructions in the loop, making
2112 all the register substitutions scheduled in REG_MAP. */
2113 for (p
= new_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
2114 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2115 || GET_CODE (p
) == CALL_INSN
)
2117 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2118 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2124 free (already_moved
);
2129 loop_movables_add (movables
, m
)
2130 struct loop_movables
*movables
;
2133 if (movables
->head
== 0)
2136 movables
->last
->next
= m
;
2142 loop_movables_free (movables
)
2143 struct loop_movables
*movables
;
2146 struct movable
*m_next
;
2148 for (m
= movables
->head
; m
; m
= m_next
)
2156 /* Scan X and replace the address of any MEM in it with ADDR.
2157 REG is the address that MEM should have before the replacement. */
2160 replace_call_address (x
, reg
, addr
)
2163 register enum rtx_code code
;
2165 register const char *fmt
;
2169 code
= GET_CODE (x
);
2183 /* Short cut for very common case. */
2184 replace_call_address (XEXP (x
, 1), reg
, addr
);
2188 /* Short cut for very common case. */
2189 replace_call_address (XEXP (x
, 0), reg
, addr
);
2193 /* If this MEM uses a reg other than the one we expected,
2194 something is wrong. */
2195 if (XEXP (x
, 0) != reg
)
2204 fmt
= GET_RTX_FORMAT (code
);
2205 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2208 replace_call_address (XEXP (x
, i
), reg
, addr
);
2209 else if (fmt
[i
] == 'E')
2212 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2213 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2219 /* Return the number of memory refs to addresses that vary
2223 count_nonfixed_reads (loop
, x
)
2224 const struct loop
*loop
;
2227 register enum rtx_code code
;
2229 register const char *fmt
;
2235 code
= GET_CODE (x
);
2249 return ((loop_invariant_p (loop
, XEXP (x
, 0)) != 1)
2250 + count_nonfixed_reads (loop
, XEXP (x
, 0)));
2257 fmt
= GET_RTX_FORMAT (code
);
2258 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2261 value
+= count_nonfixed_reads (loop
, XEXP (x
, i
));
2265 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2266 value
+= count_nonfixed_reads (loop
, XVECEXP (x
, i
, j
));
2272 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2273 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2274 `unknown_address_altered', `unknown_constant_address_altered', and
2275 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2276 list `store_mems' in LOOP. */
2282 register int level
= 1;
2284 struct loop_info
*loop_info
= LOOP_INFO (loop
);
2285 rtx start
= loop
->start
;
2286 rtx end
= loop
->end
;
2287 /* The label after END. Jumping here is just like falling off the
2288 end of the loop. We use next_nonnote_insn instead of next_label
2289 as a hedge against the (pathological) case where some actual insn
2290 might end up between the two. */
2291 rtx exit_target
= next_nonnote_insn (end
);
2293 loop_info
->has_indirect_jump
= indirect_jump_in_function
;
2294 loop_info
->pre_header_has_call
= 0;
2295 loop_info
->has_call
= 0;
2296 loop_info
->has_nonconst_call
= 0;
2297 loop_info
->has_volatile
= 0;
2298 loop_info
->has_tablejump
= 0;
2299 loop_info
->has_multiple_exit_targets
= 0;
2302 loop_info
->unknown_address_altered
= 0;
2303 loop_info
->unknown_constant_address_altered
= 0;
2304 loop_info
->store_mems
= NULL_RTX
;
2305 loop_info
->first_loop_store_insn
= NULL_RTX
;
2306 loop_info
->mems_idx
= 0;
2307 loop_info
->num_mem_sets
= 0;
2310 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
2311 insn
= PREV_INSN (insn
))
2313 if (GET_CODE (insn
) == CALL_INSN
)
2315 loop_info
->pre_header_has_call
= 1;
2320 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2321 insn
= NEXT_INSN (insn
))
2323 if (GET_CODE (insn
) == NOTE
)
2325 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2328 /* Count number of loops contained in this one. */
2331 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2336 else if (GET_CODE (insn
) == CALL_INSN
)
2338 if (! CONST_CALL_P (insn
))
2340 loop_info
->unknown_address_altered
= 1;
2341 loop_info
->has_nonconst_call
= 1;
2343 loop_info
->has_call
= 1;
2345 else if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2347 rtx label1
= NULL_RTX
;
2348 rtx label2
= NULL_RTX
;
2350 if (volatile_refs_p (PATTERN (insn
)))
2351 loop_info
->has_volatile
= 1;
2353 if (GET_CODE (insn
) == JUMP_INSN
2354 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
2355 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
))
2356 loop_info
->has_tablejump
= 1;
2358 note_stores (PATTERN (insn
), note_addr_stored
, loop_info
);
2359 if (! loop_info
->first_loop_store_insn
&& loop_info
->store_mems
)
2360 loop_info
->first_loop_store_insn
= insn
;
2362 if (! loop_info
->has_multiple_exit_targets
2363 && GET_CODE (insn
) == JUMP_INSN
2364 && GET_CODE (PATTERN (insn
)) == SET
2365 && SET_DEST (PATTERN (insn
)) == pc_rtx
)
2367 if (GET_CODE (SET_SRC (PATTERN (insn
))) == IF_THEN_ELSE
)
2369 label1
= XEXP (SET_SRC (PATTERN (insn
)), 1);
2370 label2
= XEXP (SET_SRC (PATTERN (insn
)), 2);
2374 label1
= SET_SRC (PATTERN (insn
));
2379 if (label1
&& label1
!= pc_rtx
)
2381 if (GET_CODE (label1
) != LABEL_REF
)
2383 /* Something tricky. */
2384 loop_info
->has_multiple_exit_targets
= 1;
2387 else if (XEXP (label1
, 0) != exit_target
2388 && LABEL_OUTSIDE_LOOP_P (label1
))
2390 /* A jump outside the current loop. */
2391 loop_info
->has_multiple_exit_targets
= 1;
2402 else if (GET_CODE (insn
) == RETURN
)
2403 loop_info
->has_multiple_exit_targets
= 1;
2406 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2407 if (/* An exception thrown by a called function might land us
2409 ! loop_info
->has_nonconst_call
2410 /* We don't want loads for MEMs moved to a location before the
2411 one at which their stack memory becomes allocated. (Note
2412 that this is not a problem for malloc, etc., since those
2413 require actual function calls. */
2414 && ! current_function_calls_alloca
2415 /* There are ways to leave the loop other than falling off the
2417 && ! loop_info
->has_multiple_exit_targets
)
2418 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2419 insn
= NEXT_INSN (insn
))
2420 for_each_rtx (&insn
, insert_loop_mem
, loop_info
);
2422 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2423 that loop_invariant_p and load_mems can use true_dependence
2424 to determine what is really clobbered. */
2425 if (loop_info
->unknown_address_altered
)
2427 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
2429 loop_info
->store_mems
2430 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
2432 if (loop_info
->unknown_constant_address_altered
)
2434 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
2436 RTX_UNCHANGING_P (mem
) = 1;
2437 loop_info
->store_mems
2438 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
2442 /* Scan the function looking for loops. Record the start and end of each loop.
2443 Also mark as invalid loops any loops that contain a setjmp or are branched
2444 to from outside the loop. */
2447 find_and_verify_loops (f
, loops
)
2449 struct loops
*loops
;
2454 struct loop
*current_loop
;
2455 struct loop
*next_loop
;
2458 num_loops
= loops
->num
;
2460 compute_luids (f
, NULL_RTX
, 0);
2462 /* If there are jumps to undefined labels,
2463 treat them as jumps out of any/all loops.
2464 This also avoids writing past end of tables when there are no loops. */
2467 /* Find boundaries of loops, mark which loops are contained within
2468 loops, and invalidate loops that have setjmp. */
2471 current_loop
= NULL
;
2472 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2474 if (GET_CODE (insn
) == NOTE
)
2475 switch (NOTE_LINE_NUMBER (insn
))
2477 case NOTE_INSN_LOOP_BEG
:
2478 next_loop
= loops
->array
+ num_loops
;
2479 next_loop
->num
= num_loops
;
2481 next_loop
->start
= insn
;
2482 next_loop
->outer
= current_loop
;
2483 current_loop
= next_loop
;
2486 case NOTE_INSN_SETJMP
:
2487 /* In this case, we must invalidate our current loop and any
2489 for (loop
= current_loop
; loop
; loop
= loop
->outer
)
2492 if (loop_dump_stream
)
2493 fprintf (loop_dump_stream
,
2494 "\nLoop at %d ignored due to setjmp.\n",
2495 INSN_UID (loop
->start
));
2499 case NOTE_INSN_LOOP_CONT
:
2500 current_loop
->cont
= insn
;
2503 case NOTE_INSN_LOOP_VTOP
:
2504 current_loop
->vtop
= insn
;
2507 case NOTE_INSN_LOOP_END
:
2511 current_loop
->end
= insn
;
2512 current_loop
= current_loop
->outer
;
2519 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2520 enclosing loop, but this doesn't matter. */
2521 uid_loop
[INSN_UID (insn
)] = current_loop
;
2524 /* Any loop containing a label used in an initializer must be invalidated,
2525 because it can be jumped into from anywhere. */
2527 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2529 for (loop
= uid_loop
[INSN_UID (XEXP (label
, 0))];
2530 loop
; loop
= loop
->outer
)
2534 /* Any loop containing a label used for an exception handler must be
2535 invalidated, because it can be jumped into from anywhere. */
2537 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2539 for (loop
= uid_loop
[INSN_UID (XEXP (label
, 0))];
2540 loop
; loop
= loop
->outer
)
2544 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2545 loop that it is not contained within, that loop is marked invalid.
2546 If any INSN or CALL_INSN uses a label's address, then the loop containing
2547 that label is marked invalid, because it could be jumped into from
2550 Also look for blocks of code ending in an unconditional branch that
2551 exits the loop. If such a block is surrounded by a conditional
2552 branch around the block, move the block elsewhere (see below) and
2553 invert the jump to point to the code block. This may eliminate a
2554 label in our loop and will simplify processing by both us and a
2555 possible second cse pass. */
2557 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2560 struct loop
*this_loop
= uid_loop
[INSN_UID (insn
)];
2562 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2564 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2567 for (loop
= uid_loop
[INSN_UID (XEXP (note
, 0))];
2568 loop
; loop
= loop
->outer
)
2573 if (GET_CODE (insn
) != JUMP_INSN
)
2576 mark_loop_jump (PATTERN (insn
), this_loop
);
2578 /* See if this is an unconditional branch outside the loop. */
2580 && (GET_CODE (PATTERN (insn
)) == RETURN
2581 || (any_uncondjump_p (insn
)
2582 && onlyjump_p (insn
)
2583 && (uid_loop
[INSN_UID (JUMP_LABEL (insn
))]
2585 && get_max_uid () < max_uid_for_loop
)
2588 rtx our_next
= next_real_insn (insn
);
2589 rtx last_insn_to_move
= NEXT_INSN (insn
);
2590 struct loop
*dest_loop
;
2591 struct loop
*outer_loop
= NULL
;
2593 /* Go backwards until we reach the start of the loop, a label,
2595 for (p
= PREV_INSN (insn
);
2596 GET_CODE (p
) != CODE_LABEL
2597 && ! (GET_CODE (p
) == NOTE
2598 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2599 && GET_CODE (p
) != JUMP_INSN
;
2603 /* Check for the case where we have a jump to an inner nested
2604 loop, and do not perform the optimization in that case. */
2606 if (JUMP_LABEL (insn
))
2608 dest_loop
= uid_loop
[INSN_UID (JUMP_LABEL (insn
))];
2611 for (outer_loop
= dest_loop
; outer_loop
;
2612 outer_loop
= outer_loop
->outer
)
2613 if (outer_loop
== this_loop
)
2618 /* Make sure that the target of P is within the current loop. */
2620 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2621 && uid_loop
[INSN_UID (JUMP_LABEL (p
))] != this_loop
)
2622 outer_loop
= this_loop
;
2624 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2625 we have a block of code to try to move.
2627 We look backward and then forward from the target of INSN
2628 to find a BARRIER at the same loop depth as the target.
2629 If we find such a BARRIER, we make a new label for the start
2630 of the block, invert the jump in P and point it to that label,
2631 and move the block of code to the spot we found. */
2634 && GET_CODE (p
) == JUMP_INSN
2635 && JUMP_LABEL (p
) != 0
2636 /* Just ignore jumps to labels that were never emitted.
2637 These always indicate compilation errors. */
2638 && INSN_UID (JUMP_LABEL (p
)) != 0
2639 && any_condjump_p (p
) && onlyjump_p (p
)
2640 && next_real_insn (JUMP_LABEL (p
)) == our_next
2641 /* If it's not safe to move the sequence, then we
2643 && insns_safe_to_move_p (p
, NEXT_INSN (insn
),
2644 &last_insn_to_move
))
2647 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2648 struct loop
*target_loop
= uid_loop
[INSN_UID (target
)];
2651 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2652 if (GET_CODE (loc
) == BARRIER
2653 /* Don't move things inside a tablejump. */
2654 && ((loc2
= next_nonnote_insn (loc
)) == 0
2655 || GET_CODE (loc2
) != CODE_LABEL
2656 || (loc2
= next_nonnote_insn (loc2
)) == 0
2657 || GET_CODE (loc2
) != JUMP_INSN
2658 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2659 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2660 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2664 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2665 if (GET_CODE (loc
) == BARRIER
2666 /* Don't move things inside a tablejump. */
2667 && ((loc2
= next_nonnote_insn (loc
)) == 0
2668 || GET_CODE (loc2
) != CODE_LABEL
2669 || (loc2
= next_nonnote_insn (loc2
)) == 0
2670 || GET_CODE (loc2
) != JUMP_INSN
2671 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2672 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2673 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2678 rtx cond_label
= JUMP_LABEL (p
);
2679 rtx new_label
= get_label_after (p
);
2681 /* Ensure our label doesn't go away. */
2682 LABEL_NUSES (cond_label
)++;
2684 /* Verify that uid_loop is large enough and that
2686 if (invert_jump (p
, new_label
, 1))
2690 /* If no suitable BARRIER was found, create a suitable
2691 one before TARGET. Since TARGET is a fall through
2692 path, we'll need to insert an jump around our block
2693 and a add a BARRIER before TARGET.
2695 This creates an extra unconditional jump outside
2696 the loop. However, the benefits of removing rarely
2697 executed instructions from inside the loop usually
2698 outweighs the cost of the extra unconditional jump
2699 outside the loop. */
2704 temp
= gen_jump (JUMP_LABEL (insn
));
2705 temp
= emit_jump_insn_before (temp
, target
);
2706 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2707 LABEL_NUSES (JUMP_LABEL (insn
))++;
2708 loc
= emit_barrier_before (target
);
2711 /* Include the BARRIER after INSN and copy the
2713 new_label
= squeeze_notes (new_label
,
2715 reorder_insns (new_label
, last_insn_to_move
, loc
);
2717 /* All those insns are now in TARGET_LOOP. */
2719 q
!= NEXT_INSN (last_insn_to_move
);
2721 uid_loop
[INSN_UID (q
)] = target_loop
;
2723 /* The label jumped to by INSN is no longer a loop
2724 exit. Unless INSN does not have a label (e.g.,
2725 it is a RETURN insn), search loop->exit_labels
2726 to find its label_ref, and remove it. Also turn
2727 off LABEL_OUTSIDE_LOOP_P bit. */
2728 if (JUMP_LABEL (insn
))
2730 for (q
= 0, r
= this_loop
->exit_labels
;
2732 q
= r
, r
= LABEL_NEXTREF (r
))
2733 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2735 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2737 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2739 this_loop
->exit_labels
= LABEL_NEXTREF (r
);
2743 for (loop
= this_loop
; loop
&& loop
!= target_loop
;
2747 /* If we didn't find it, then something is
2753 /* P is now a jump outside the loop, so it must be put
2754 in loop->exit_labels, and marked as such.
2755 The easiest way to do this is to just call
2756 mark_loop_jump again for P. */
2757 mark_loop_jump (PATTERN (p
), this_loop
);
2759 /* If INSN now jumps to the insn after it,
2761 if (JUMP_LABEL (insn
) != 0
2762 && (next_real_insn (JUMP_LABEL (insn
))
2763 == next_real_insn (insn
)))
2767 /* Continue the loop after where the conditional
2768 branch used to jump, since the only branch insn
2769 in the block (if it still remains) is an inter-loop
2770 branch and hence needs no processing. */
2771 insn
= NEXT_INSN (cond_label
);
2773 if (--LABEL_NUSES (cond_label
) == 0)
2774 delete_insn (cond_label
);
2776 /* This loop will be continued with NEXT_INSN (insn). */
2777 insn
= PREV_INSN (insn
);
2784 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2785 loops it is contained in, mark the target loop invalid.
2787 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2790 mark_loop_jump (x
, loop
)
2794 struct loop
*dest_loop
;
2795 struct loop
*outer_loop
;
2798 switch (GET_CODE (x
))
2811 /* There could be a label reference in here. */
2812 mark_loop_jump (XEXP (x
, 0), loop
);
2818 mark_loop_jump (XEXP (x
, 0), loop
);
2819 mark_loop_jump (XEXP (x
, 1), loop
);
2823 /* This may refer to a LABEL_REF or SYMBOL_REF. */
2824 mark_loop_jump (XEXP (x
, 1), loop
);
2829 mark_loop_jump (XEXP (x
, 0), loop
);
2833 dest_loop
= uid_loop
[INSN_UID (XEXP (x
, 0))];
2835 /* Link together all labels that branch outside the loop. This
2836 is used by final_[bg]iv_value and the loop unrolling code. Also
2837 mark this LABEL_REF so we know that this branch should predict
2840 /* A check to make sure the label is not in an inner nested loop,
2841 since this does not count as a loop exit. */
2844 for (outer_loop
= dest_loop
; outer_loop
;
2845 outer_loop
= outer_loop
->outer
)
2846 if (outer_loop
== loop
)
2852 if (loop
&& ! outer_loop
)
2854 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2855 LABEL_NEXTREF (x
) = loop
->exit_labels
;
2856 loop
->exit_labels
= x
;
2858 for (outer_loop
= loop
;
2859 outer_loop
&& outer_loop
!= dest_loop
;
2860 outer_loop
= outer_loop
->outer
)
2861 outer_loop
->exit_count
++;
2864 /* If this is inside a loop, but not in the current loop or one enclosed
2865 by it, it invalidates at least one loop. */
2870 /* We must invalidate every nested loop containing the target of this
2871 label, except those that also contain the jump insn. */
2873 for (; dest_loop
; dest_loop
= dest_loop
->outer
)
2875 /* Stop when we reach a loop that also contains the jump insn. */
2876 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
2877 if (dest_loop
== outer_loop
)
2880 /* If we get here, we know we need to invalidate a loop. */
2881 if (loop_dump_stream
&& ! dest_loop
->invalid
)
2882 fprintf (loop_dump_stream
,
2883 "\nLoop at %d ignored due to multiple entry points.\n",
2884 INSN_UID (dest_loop
->start
));
2886 dest_loop
->invalid
= 1;
2891 /* If this is not setting pc, ignore. */
2892 if (SET_DEST (x
) == pc_rtx
)
2893 mark_loop_jump (SET_SRC (x
), loop
);
2897 mark_loop_jump (XEXP (x
, 1), loop
);
2898 mark_loop_jump (XEXP (x
, 2), loop
);
2903 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2904 mark_loop_jump (XVECEXP (x
, 0, i
), loop
);
2908 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2909 mark_loop_jump (XVECEXP (x
, 1, i
), loop
);
2913 /* Strictly speaking this is not a jump into the loop, only a possible
2914 jump out of the loop. However, we have no way to link the destination
2915 of this jump onto the list of exit labels. To be safe we mark this
2916 loop and any containing loops as invalid. */
2919 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
2921 if (loop_dump_stream
&& ! outer_loop
->invalid
)
2922 fprintf (loop_dump_stream
,
2923 "\nLoop at %d ignored due to unknown exit jump.\n",
2924 INSN_UID (outer_loop
->start
));
2925 outer_loop
->invalid
= 1;
2932 /* Return nonzero if there is a label in the range from
2933 insn INSN to and including the insn whose luid is END
2934 INSN must have an assigned luid (i.e., it must not have
2935 been previously created by loop.c). */
2938 labels_in_range_p (insn
, end
)
2942 while (insn
&& INSN_LUID (insn
) <= end
)
2944 if (GET_CODE (insn
) == CODE_LABEL
)
2946 insn
= NEXT_INSN (insn
);
2952 /* Record that a memory reference X is being set. */
2955 note_addr_stored (x
, y
, data
)
2957 rtx y ATTRIBUTE_UNUSED
;
2958 void *data ATTRIBUTE_UNUSED
;
2960 struct loop_info
*loop_info
= data
;
2962 if (x
== 0 || GET_CODE (x
) != MEM
)
2965 /* Count number of memory writes.
2966 This affects heuristics in strength_reduce. */
2967 loop_info
->num_mem_sets
++;
2969 /* BLKmode MEM means all memory is clobbered. */
2970 if (GET_MODE (x
) == BLKmode
)
2972 if (RTX_UNCHANGING_P (x
))
2973 loop_info
->unknown_constant_address_altered
= 1;
2975 loop_info
->unknown_address_altered
= 1;
2980 loop_info
->store_mems
= gen_rtx_EXPR_LIST (VOIDmode
, x
,
2981 loop_info
->store_mems
);
2984 /* X is a value modified by an INSN that references a biv inside a loop
2985 exit test (ie, X is somehow related to the value of the biv). If X
2986 is a pseudo that is used more than once, then the biv is (effectively)
2987 used more than once. DATA is a pointer to a loop_regs structure. */
2990 note_set_pseudo_multiple_uses (x
, y
, data
)
2992 rtx y ATTRIBUTE_UNUSED
;
2995 struct loop_regs
*regs
= (struct loop_regs
*) data
;
3000 while (GET_CODE (x
) == STRICT_LOW_PART
3001 || GET_CODE (x
) == SIGN_EXTRACT
3002 || GET_CODE (x
) == ZERO_EXTRACT
3003 || GET_CODE (x
) == SUBREG
)
3006 if (GET_CODE (x
) != REG
|| REGNO (x
) < FIRST_PSEUDO_REGISTER
)
3009 /* If we do not have usage information, or if we know the register
3010 is used more than once, note that fact for check_dbra_loop. */
3011 if (REGNO (x
) >= max_reg_before_loop
3012 || ! regs
->array
[REGNO (x
)].single_usage
3013 || regs
->array
[REGNO (x
)].single_usage
== const0_rtx
)
3014 regs
->multiple_uses
= 1;
3017 /* Return nonzero if the rtx X is invariant over the current loop.
3019 The value is 2 if we refer to something only conditionally invariant.
3021 A memory ref is invariant if it is not volatile and does not conflict
3022 with anything stored in `loop_info->store_mems'. */
3025 loop_invariant_p (loop
, x
)
3026 const struct loop
*loop
;
3029 struct loop_info
*loop_info
= LOOP_INFO (loop
);
3030 struct loop_regs
*regs
= LOOP_REGS (loop
);
3032 register enum rtx_code code
;
3033 register const char *fmt
;
3034 int conditional
= 0;
3039 code
= GET_CODE (x
);
3049 /* A LABEL_REF is normally invariant, however, if we are unrolling
3050 loops, and this label is inside the loop, then it isn't invariant.
3051 This is because each unrolled copy of the loop body will have
3052 a copy of this label. If this was invariant, then an insn loading
3053 the address of this label into a register might get moved outside
3054 the loop, and then each loop body would end up using the same label.
3056 We don't know the loop bounds here though, so just fail for all
3058 if (flag_unroll_loops
)
3065 case UNSPEC_VOLATILE
:
3069 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3070 since the reg might be set by initialization within the loop. */
3072 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
3073 || x
== arg_pointer_rtx
)
3074 && ! current_function_has_nonlocal_goto
)
3077 if (LOOP_INFO (loop
)->has_call
3078 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
3081 if (regs
->array
[REGNO (x
)].set_in_loop
< 0)
3084 return regs
->array
[REGNO (x
)].set_in_loop
== 0;
3087 /* Volatile memory references must be rejected. Do this before
3088 checking for read-only items, so that volatile read-only items
3089 will be rejected also. */
3090 if (MEM_VOLATILE_P (x
))
3093 /* See if there is any dependence between a store and this load. */
3094 mem_list_entry
= loop_info
->store_mems
;
3095 while (mem_list_entry
)
3097 if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
3101 mem_list_entry
= XEXP (mem_list_entry
, 1);
3104 /* It's not invalidated by a store in memory
3105 but we must still verify the address is invariant. */
3109 /* Don't mess with insns declared volatile. */
3110 if (MEM_VOLATILE_P (x
))
3118 fmt
= GET_RTX_FORMAT (code
);
3119 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3123 int tem
= loop_invariant_p (loop
, XEXP (x
, i
));
3129 else if (fmt
[i
] == 'E')
3132 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3134 int tem
= loop_invariant_p (loop
, XVECEXP (x
, i
, j
));
3144 return 1 + conditional
;
3147 /* Return nonzero if all the insns in the loop that set REG
3148 are INSN and the immediately following insns,
3149 and if each of those insns sets REG in an invariant way
3150 (not counting uses of REG in them).
3152 The value is 2 if some of these insns are only conditionally invariant.
3154 We assume that INSN itself is the first set of REG
3155 and that its source is invariant. */
3158 consec_sets_invariant_p (loop
, reg
, n_sets
, insn
)
3159 const struct loop
*loop
;
3163 struct loop_regs
*regs
= LOOP_REGS (loop
);
3165 unsigned int regno
= REGNO (reg
);
3167 /* Number of sets we have to insist on finding after INSN. */
3168 int count
= n_sets
- 1;
3169 int old
= regs
->array
[regno
].set_in_loop
;
3173 /* If N_SETS hit the limit, we can't rely on its value. */
3177 regs
->array
[regno
].set_in_loop
= 0;
3181 register enum rtx_code code
;
3185 code
= GET_CODE (p
);
3187 /* If library call, skip to end of it. */
3188 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3193 && (set
= single_set (p
))
3194 && GET_CODE (SET_DEST (set
)) == REG
3195 && REGNO (SET_DEST (set
)) == regno
)
3197 this = loop_invariant_p (loop
, SET_SRC (set
));
3200 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3202 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3203 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3205 this = (CONSTANT_P (XEXP (temp
, 0))
3206 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3207 && loop_invariant_p (loop
, XEXP (temp
, 0))));
3214 else if (code
!= NOTE
)
3216 regs
->array
[regno
].set_in_loop
= old
;
3221 regs
->array
[regno
].set_in_loop
= old
;
3222 /* If loop_invariant_p ever returned 2, we return 2. */
3223 return 1 + (value
& 2);
3227 /* I don't think this condition is sufficient to allow INSN
3228 to be moved, so we no longer test it. */
3230 /* Return 1 if all insns in the basic block of INSN and following INSN
3231 that set REG are invariant according to TABLE. */
3234 all_sets_invariant_p (reg
, insn
, table
)
3238 register rtx p
= insn
;
3239 register int regno
= REGNO (reg
);
3243 register enum rtx_code code
;
3245 code
= GET_CODE (p
);
3246 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3248 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3249 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3250 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3252 if (! loop_invariant_p (loop
, SET_SRC (PATTERN (p
)), table
))
3259 /* Look at all uses (not sets) of registers in X. For each, if it is
3260 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3261 a different insn, set USAGE[REGNO] to const0_rtx. */
3264 find_single_use_in_loop (regs
, insn
, x
)
3265 struct loop_regs
*regs
;
3269 enum rtx_code code
= GET_CODE (x
);
3270 const char *fmt
= GET_RTX_FORMAT (code
);
3274 regs
->array
[REGNO (x
)].single_usage
3275 = (regs
->array
[REGNO (x
)].single_usage
!= 0
3276 && regs
->array
[REGNO (x
)].single_usage
!= insn
)
3277 ? const0_rtx
: insn
;
3279 else if (code
== SET
)
3281 /* Don't count SET_DEST if it is a REG; otherwise count things
3282 in SET_DEST because if a register is partially modified, it won't
3283 show up as a potential movable so we don't care how USAGE is set
3285 if (GET_CODE (SET_DEST (x
)) != REG
)
3286 find_single_use_in_loop (regs
, insn
, SET_DEST (x
));
3287 find_single_use_in_loop (regs
, insn
, SET_SRC (x
));
3290 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3292 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3293 find_single_use_in_loop (regs
, insn
, XEXP (x
, i
));
3294 else if (fmt
[i
] == 'E')
3295 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3296 find_single_use_in_loop (regs
, insn
, XVECEXP (x
, i
, j
));
3300 /* Count and record any set in X which is contained in INSN. Update
3301 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3305 count_one_set (regs
, insn
, x
, last_set
)
3306 struct loop_regs
*regs
;
3310 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3311 /* Don't move a reg that has an explicit clobber.
3312 It's not worth the pain to try to do it correctly. */
3313 regs
->array
[REGNO (XEXP (x
, 0))].may_not_optimize
= 1;
3315 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3317 rtx dest
= SET_DEST (x
);
3318 while (GET_CODE (dest
) == SUBREG
3319 || GET_CODE (dest
) == ZERO_EXTRACT
3320 || GET_CODE (dest
) == SIGN_EXTRACT
3321 || GET_CODE (dest
) == STRICT_LOW_PART
)
3322 dest
= XEXP (dest
, 0);
3323 if (GET_CODE (dest
) == REG
)
3325 register int regno
= REGNO (dest
);
3326 /* If this is the first setting of this reg
3327 in current basic block, and it was set before,
3328 it must be set in two basic blocks, so it cannot
3329 be moved out of the loop. */
3330 if (regs
->array
[regno
].set_in_loop
> 0
3332 regs
->array
[regno
].may_not_optimize
= 1;
3333 /* If this is not first setting in current basic block,
3334 see if reg was used in between previous one and this.
3335 If so, neither one can be moved. */
3336 if (last_set
[regno
] != 0
3337 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3338 regs
->array
[regno
].may_not_optimize
= 1;
3339 if (regs
->array
[regno
].set_in_loop
< 127)
3340 ++regs
->array
[regno
].set_in_loop
;
3341 last_set
[regno
] = insn
;
3346 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3347 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3348 contained in insn INSN is used by any insn that precedes INSN in
3349 cyclic order starting from the loop entry point.
3351 We don't want to use INSN_LUID here because if we restrict INSN to those
3352 that have a valid INSN_LUID, it means we cannot move an invariant out
3353 from an inner loop past two loops. */
3356 loop_reg_used_before_p (loop
, set
, insn
)
3357 const struct loop
*loop
;
3360 rtx reg
= SET_DEST (set
);
3363 /* Scan forward checking for register usage. If we hit INSN, we
3364 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3365 for (p
= loop
->scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3367 if (INSN_P (p
) && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3377 /* A "basic induction variable" or biv is a pseudo reg that is set
3378 (within this loop) only by incrementing or decrementing it. */
3379 /* A "general induction variable" or giv is a pseudo reg whose
3380 value is a linear function of a biv. */
3382 /* Bivs are recognized by `basic_induction_var';
3383 Givs by `general_induction_var'. */
3385 /* Communication with routines called via `note_stores'. */
3387 static rtx note_insn
;
3389 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3391 static rtx addr_placeholder
;
3393 /* ??? Unfinished optimizations, and possible future optimizations,
3394 for the strength reduction code. */
3396 /* ??? The interaction of biv elimination, and recognition of 'constant'
3397 bivs, may cause problems. */
3399 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3400 performance problems.
3402 Perhaps don't eliminate things that can be combined with an addressing
3403 mode. Find all givs that have the same biv, mult_val, and add_val;
3404 then for each giv, check to see if its only use dies in a following
3405 memory address. If so, generate a new memory address and check to see
3406 if it is valid. If it is valid, then store the modified memory address,
3407 otherwise, mark the giv as not done so that it will get its own iv. */
3409 /* ??? Could try to optimize branches when it is known that a biv is always
3412 /* ??? When replace a biv in a compare insn, we should replace with closest
3413 giv so that an optimized branch can still be recognized by the combiner,
3414 e.g. the VAX acb insn. */
3416 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3417 was rerun in loop_optimize whenever a register was added or moved.
3418 Also, some of the optimizations could be a little less conservative. */
3420 /* Scan the loop body and call FNCALL for each insn. In the addition to the
3421 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
3424 NOT_EVERY_ITERATION if current insn is not executed at least once for every
3425 loop iteration except for the last one.
3427 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
3431 for_each_insn_in_loop (loop
, fncall
)
3433 loop_insn_callback fncall
;
3435 /* This is 1 if current insn is not executed at least once for every loop
3437 int not_every_iteration
= 0;
3438 int maybe_multiple
= 0;
3439 int past_loop_latch
= 0;
3443 /* If loop_scan_start points to the loop exit test, we have to be wary of
3444 subversive use of gotos inside expression statements. */
3445 if (prev_nonnote_insn (loop
->scan_start
) != prev_nonnote_insn (loop
->start
))
3446 maybe_multiple
= back_branch_in_range_p (loop
, loop
->scan_start
);
3448 /* Scan through loop to find all possible bivs. */
3450 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
3452 p
= next_insn_in_loop (loop
, p
))
3454 p
= fncall (loop
, p
, not_every_iteration
, maybe_multiple
);
3456 /* Past CODE_LABEL, we get to insns that may be executed multiple
3457 times. The only way we can be sure that they can't is if every
3458 jump insn between here and the end of the loop either
3459 returns, exits the loop, is a jump to a location that is still
3460 behind the label, or is a jump to the loop start. */
3462 if (GET_CODE (p
) == CODE_LABEL
)
3470 insn
= NEXT_INSN (insn
);
3471 if (insn
== loop
->scan_start
)
3473 if (insn
== loop
->end
)
3479 if (insn
== loop
->scan_start
)
3483 if (GET_CODE (insn
) == JUMP_INSN
3484 && GET_CODE (PATTERN (insn
)) != RETURN
3485 && (!any_condjump_p (insn
)
3486 || (JUMP_LABEL (insn
) != 0
3487 && JUMP_LABEL (insn
) != loop
->scan_start
3488 && !loop_insn_first_p (p
, JUMP_LABEL (insn
)))))
3496 /* Past a jump, we get to insns for which we can't count
3497 on whether they will be executed during each iteration. */
3498 /* This code appears twice in strength_reduce. There is also similar
3499 code in scan_loop. */
3500 if (GET_CODE (p
) == JUMP_INSN
3501 /* If we enter the loop in the middle, and scan around to the
3502 beginning, don't set not_every_iteration for that.
3503 This can be any kind of jump, since we want to know if insns
3504 will be executed if the loop is executed. */
3505 && !(JUMP_LABEL (p
) == loop
->top
3506 && ((NEXT_INSN (NEXT_INSN (p
)) == loop
->end
3507 && any_uncondjump_p (p
))
3508 || (NEXT_INSN (p
) == loop
->end
&& any_condjump_p (p
)))))
3512 /* If this is a jump outside the loop, then it also doesn't
3513 matter. Check to see if the target of this branch is on the
3514 loop->exits_labels list. */
3516 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
3517 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3521 not_every_iteration
= 1;
3524 else if (GET_CODE (p
) == NOTE
)
3526 /* At the virtual top of a converted loop, insns are again known to
3527 be executed each iteration: logically, the loop begins here
3528 even though the exit code has been duplicated.
3530 Insns are also again known to be executed each iteration at
3531 the LOOP_CONT note. */
3532 if ((NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
3533 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_CONT
)
3535 not_every_iteration
= 0;
3536 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3538 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3542 /* Note if we pass a loop latch. If we do, then we can not clear
3543 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
3544 a loop since a jump before the last CODE_LABEL may have started
3545 a new loop iteration.
3547 Note that LOOP_TOP is only set for rotated loops and we need
3548 this check for all loops, so compare against the CODE_LABEL
3549 which immediately follows LOOP_START. */
3550 if (GET_CODE (p
) == JUMP_INSN
3551 && JUMP_LABEL (p
) == NEXT_INSN (loop
->start
))
3552 past_loop_latch
= 1;
3554 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3555 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3556 or not an insn is known to be executed each iteration of the
3557 loop, whether or not any iterations are known to occur.
3559 Therefore, if we have just passed a label and have no more labels
3560 between here and the test insn of the loop, and we have not passed
3561 a jump to the top of the loop, then we know these insns will be
3562 executed each iteration. */
3564 if (not_every_iteration
3566 && GET_CODE (p
) == CODE_LABEL
3567 && no_labels_between_p (p
, loop
->end
)
3568 && loop_insn_first_p (p
, loop
->cont
))
3569 not_every_iteration
= 0;
3574 loop_bivs_find (loop
)
3577 struct loop_regs
*regs
= LOOP_REGS (loop
);
3578 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
3579 /* Temporary list pointers for traversing ivs->list. */
3580 struct iv_class
*bl
, **backbl
;
3584 for_each_insn_in_loop (loop
, check_insn_for_bivs
);
3586 /* Scan ivs->list to remove all regs that proved not to be bivs.
3587 Make a sanity check against regs->n_times_set. */
3588 for (backbl
= &ivs
->list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3590 if (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
3591 /* Above happens if register modified by subreg, etc. */
3592 /* Make sure it is not recognized as a basic induction var: */
3593 || regs
->array
[bl
->regno
].n_times_set
!= bl
->biv_count
3594 /* If never incremented, it is invariant that we decided not to
3595 move. So leave it alone. */
3596 || ! bl
->incremented
)
3598 if (loop_dump_stream
)
3599 fprintf (loop_dump_stream
, "Biv %d: discarded, %s\n",
3601 (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
3602 ? "not induction variable"
3603 : (! bl
->incremented
? "never incremented"
3606 REG_IV_TYPE (ivs
, bl
->regno
) = NOT_BASIC_INDUCT
;
3613 if (loop_dump_stream
)
3614 fprintf (loop_dump_stream
, "Biv %d: verified\n", bl
->regno
);
3620 /* Determine how BIVS are initialised by looking through pre-header
3621 extended basic block. */
3623 loop_bivs_init_find (loop
)
3626 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
3627 /* Temporary list pointers for traversing ivs->list. */
3628 struct iv_class
*bl
;
3632 /* Find initial value for each biv by searching backwards from loop_start,
3633 halting at first label. Also record any test condition. */
3636 for (p
= loop
->start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3642 if (GET_CODE (p
) == CALL_INSN
)
3646 note_stores (PATTERN (p
), record_initial
, ivs
);
3648 /* Record any test of a biv that branches around the loop if no store
3649 between it and the start of loop. We only care about tests with
3650 constants and registers and only certain of those. */
3651 if (GET_CODE (p
) == JUMP_INSN
3652 && JUMP_LABEL (p
) != 0
3653 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop
->end
)
3654 && (test
= get_condition_for_loop (loop
, p
)) != 0
3655 && GET_CODE (XEXP (test
, 0)) == REG
3656 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3657 && (bl
= REG_IV_CLASS (ivs
, REGNO (XEXP (test
, 0)))) != 0
3658 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop
->start
)
3659 && bl
->init_insn
== 0)
3661 /* If an NE test, we have an initial value! */
3662 if (GET_CODE (test
) == NE
)
3665 bl
->init_set
= gen_rtx_SET (VOIDmode
,
3666 XEXP (test
, 0), XEXP (test
, 1));
3669 bl
->initial_test
= test
;
3675 /* Look at the each biv and see if we can say anything better about its
3676 initial value from any initializing insns set up above. (This is done
3677 in two passes to avoid missing SETs in a PARALLEL.) */
3679 loop_bivs_check (loop
)
3682 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
3683 /* Temporary list pointers for traversing ivs->list. */
3684 struct iv_class
*bl
;
3685 struct iv_class
**backbl
;
3687 for (backbl
= &ivs
->list
; (bl
= *backbl
); backbl
= &bl
->next
)
3692 if (! bl
->init_insn
)
3695 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3696 is a constant, use the value of that. */
3697 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
3698 && CONSTANT_P (XEXP (note
, 0)))
3699 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
3700 && CONSTANT_P (XEXP (note
, 0))))
3701 src
= XEXP (note
, 0);
3703 src
= SET_SRC (bl
->init_set
);
3705 if (loop_dump_stream
)
3706 fprintf (loop_dump_stream
,
3707 "Biv %d: initialized at insn %d: initial value ",
3708 bl
->regno
, INSN_UID (bl
->init_insn
));
3710 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3711 || GET_MODE (src
) == VOIDmode
)
3712 && valid_initial_value_p (src
, bl
->init_insn
,
3713 LOOP_INFO (loop
)->pre_header_has_call
,
3716 bl
->initial_value
= src
;
3718 if (loop_dump_stream
)
3720 print_simple_rtl (loop_dump_stream
, src
);
3721 fputc ('\n', loop_dump_stream
);
3724 /* If we can't make it a giv,
3725 let biv keep initial value of "itself". */
3726 else if (loop_dump_stream
)
3727 fprintf (loop_dump_stream
, "is complex\n");
3732 /* Search the loop for general induction variables. */
3735 loop_givs_find (loop
)
3738 for_each_insn_in_loop (loop
, check_insn_for_givs
);
3742 /* For each giv for which we still don't know whether or not it is
3743 replaceable, check to see if it is replaceable because its final value
3744 can be calculated. */
3747 loop_givs_check (loop
)
3750 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
3751 struct iv_class
*bl
;
3753 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
3755 struct induction
*v
;
3757 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3758 if (! v
->replaceable
&& ! v
->not_replaceable
)
3759 check_final_value (loop
, v
);
3764 /* Return non-zero if it is possible to eliminate the biv BL provided
3765 all givs are reduced. This is possible if either the reg is not
3766 used outside the loop, or we can compute what its final value will
3770 loop_biv_eliminable_p (loop
, bl
, threshold
, insn_count
)
3772 struct iv_class
*bl
;
3776 /* For architectures with a decrement_and_branch_until_zero insn,
3777 don't do this if we put a REG_NONNEG note on the endtest for this
3780 #ifdef HAVE_decrement_and_branch_until_zero
3783 if (loop_dump_stream
)
3784 fprintf (loop_dump_stream
,
3785 "Cannot eliminate nonneg biv %d.\n", bl
->regno
);
3790 /* Check that biv is used outside loop or if it has a final value.
3791 Compare against bl->init_insn rather than loop->start. We aren't
3792 concerned with any uses of the biv between init_insn and
3793 loop->start since these won't be affected by the value of the biv
3794 elsewhere in the function, so long as init_insn doesn't use the
3797 if ((REGNO_LAST_LUID (bl
->regno
) < INSN_LUID (loop
->end
)
3799 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3800 && REGNO_FIRST_LUID (bl
->regno
) >= INSN_LUID (bl
->init_insn
)
3801 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3802 || (bl
->final_value
= final_biv_value (loop
, bl
)))
3803 return maybe_eliminate_biv (loop
, bl
, 0, threshold
, insn_count
);
3805 if (loop_dump_stream
)
3807 fprintf (loop_dump_stream
,
3808 "Cannot eliminate biv %d.\n",
3810 fprintf (loop_dump_stream
,
3811 "First use: insn %d, last use: insn %d.\n",
3812 REGNO_FIRST_UID (bl
->regno
),
3813 REGNO_LAST_UID (bl
->regno
));
3819 /* Reduce each giv of BL that we have decided to reduce. */
3822 loop_givs_reduce (loop
, bl
)
3824 struct iv_class
*bl
;
3826 struct induction
*v
;
3828 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3830 struct induction
*tv
;
3831 if (! v
->ignore
&& v
->same
== 0)
3833 int auto_inc_opt
= 0;
3835 /* If the code for derived givs immediately below has already
3836 allocated a new_reg, we must keep it. */
3838 v
->new_reg
= gen_reg_rtx (v
->mode
);
3841 /* If the target has auto-increment addressing modes, and
3842 this is an address giv, then try to put the increment
3843 immediately after its use, so that flow can create an
3844 auto-increment addressing mode. */
3845 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
3846 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
3847 /* We don't handle reversed biv's because bl->biv->insn
3848 does not have a valid INSN_LUID. */
3850 && v
->always_executed
&& ! v
->maybe_multiple
3851 && INSN_UID (v
->insn
) < max_uid_for_loop
)
3853 /* If other giv's have been combined with this one, then
3854 this will work only if all uses of the other giv's occur
3855 before this giv's insn. This is difficult to check.
3857 We simplify this by looking for the common case where
3858 there is one DEST_REG giv, and this giv's insn is the
3859 last use of the dest_reg of that DEST_REG giv. If the
3860 increment occurs after the address giv, then we can
3861 perform the optimization. (Otherwise, the increment
3862 would have to go before other_giv, and we would not be
3863 able to combine it with the address giv to get an
3864 auto-inc address.) */
3865 if (v
->combined_with
)
3867 struct induction
*other_giv
= 0;
3869 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
3877 if (! tv
&& other_giv
3878 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
3879 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
3880 == INSN_UID (v
->insn
))
3881 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
3884 /* Check for case where increment is before the address
3885 giv. Do this test in "loop order". */
3886 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
3887 && (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
3888 || (INSN_LUID (bl
->biv
->insn
)
3889 > INSN_LUID (loop
->scan_start
))))
3890 || (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
3891 && (INSN_LUID (loop
->scan_start
)
3892 < INSN_LUID (bl
->biv
->insn
))))
3901 /* We can't put an insn immediately after one setting
3902 cc0, or immediately before one using cc0. */
3903 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
3904 || (auto_inc_opt
== -1
3905 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
3907 && sets_cc0_p (PATTERN (prev
))))
3913 v
->auto_inc_opt
= 1;
3917 /* For each place where the biv is incremented, add an insn
3918 to increment the new, reduced reg for the giv. */
3919 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
3924 insert_before
= tv
->insn
;
3925 else if (auto_inc_opt
== 1)
3926 insert_before
= NEXT_INSN (v
->insn
);
3928 insert_before
= v
->insn
;
3930 if (tv
->mult_val
== const1_rtx
)
3931 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
3932 v
->new_reg
, v
->new_reg
,
3934 else /* tv->mult_val == const0_rtx */
3935 /* A multiply is acceptable here
3936 since this is presumed to be seldom executed. */
3937 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
3938 v
->add_val
, v
->new_reg
,
3942 /* Add code at loop start to initialize giv's reduced reg. */
3944 loop_iv_add_mult_hoist (loop
,
3945 extend_value_for_giv (v
, bl
->initial_value
),
3946 v
->mult_val
, v
->add_val
, v
->new_reg
);
3952 /* Check for givs whose first use is their definition and whose
3953 last use is the definition of another giv. If so, it is likely
3954 dead and should not be used to derive another giv nor to
3958 loop_givs_dead_check (loop
, bl
)
3959 struct loop
*loop ATTRIBUTE_UNUSED
;
3960 struct iv_class
*bl
;
3962 struct induction
*v
;
3964 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3967 || (v
->same
&& v
->same
->ignore
))
3970 if (v
->giv_type
== DEST_REG
3971 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
3973 struct induction
*v1
;
3975 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
3976 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
3984 loop_givs_rescan (loop
, bl
, reg_map
)
3986 struct iv_class
*bl
;
3989 struct induction
*v
;
3991 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3993 if (v
->same
&& v
->same
->ignore
)
3999 /* Update expression if this was combined, in case other giv was
4002 v
->new_reg
= replace_rtx (v
->new_reg
,
4003 v
->same
->dest_reg
, v
->same
->new_reg
);
4005 /* See if this register is known to be a pointer to something. If
4006 so, see if we can find the alignment. First see if there is a
4007 destination register that is a pointer. If so, this shares the
4008 alignment too. Next see if we can deduce anything from the
4009 computational information. If not, and this is a DEST_ADDR
4010 giv, at least we know that it's a pointer, though we don't know
4012 if (GET_CODE (v
->new_reg
) == REG
4013 && v
->giv_type
== DEST_REG
4014 && REG_POINTER (v
->dest_reg
))
4015 mark_reg_pointer (v
->new_reg
,
4016 REGNO_POINTER_ALIGN (REGNO (v
->dest_reg
)));
4017 else if (GET_CODE (v
->new_reg
) == REG
4018 && REG_POINTER (v
->src_reg
))
4020 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->src_reg
));
4023 || GET_CODE (v
->add_val
) != CONST_INT
4024 || INTVAL (v
->add_val
) % (align
/ BITS_PER_UNIT
) != 0)
4027 mark_reg_pointer (v
->new_reg
, align
);
4029 else if (GET_CODE (v
->new_reg
) == REG
4030 && GET_CODE (v
->add_val
) == REG
4031 && REG_POINTER (v
->add_val
))
4033 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->add_val
));
4035 if (align
== 0 || GET_CODE (v
->mult_val
) != CONST_INT
4036 || INTVAL (v
->mult_val
) % (align
/ BITS_PER_UNIT
) != 0)
4039 mark_reg_pointer (v
->new_reg
, align
);
4041 else if (GET_CODE (v
->new_reg
) == REG
&& v
->giv_type
== DEST_ADDR
)
4042 mark_reg_pointer (v
->new_reg
, 0);
4044 if (v
->giv_type
== DEST_ADDR
)
4045 /* Store reduced reg as the address in the memref where we found
4047 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4048 else if (v
->replaceable
)
4050 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4054 /* Not replaceable; emit an insn to set the original giv reg from
4055 the reduced giv, same as above. */
4056 loop_insn_emit_after (loop
, 0, v
->insn
,
4057 gen_move_insn (v
->dest_reg
, v
->new_reg
));
4060 /* When a loop is reversed, givs which depend on the reversed
4061 biv, and which are live outside the loop, must be set to their
4062 correct final value. This insn is only needed if the giv is
4063 not replaceable. The correct final value is the same as the
4064 value that the giv starts the reversed loop with. */
4065 if (bl
->reversed
&& ! v
->replaceable
)
4066 loop_iv_add_mult_sink (loop
,
4067 extend_value_for_giv (v
, bl
->initial_value
),
4068 v
->mult_val
, v
->add_val
, v
->dest_reg
);
4069 else if (v
->final_value
)
4070 loop_insn_sink_or_swim (loop
,
4071 gen_move_insn (v
->dest_reg
, v
->final_value
));
4073 if (loop_dump_stream
)
4075 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4076 INSN_UID (v
->insn
));
4077 print_simple_rtl (loop_dump_stream
, v
->new_reg
);
4078 fprintf (loop_dump_stream
, "\n");
4085 loop_giv_reduce_benefit (loop
, bl
, v
, test_reg
)
4086 struct loop
*loop ATTRIBUTE_UNUSED
;
4087 struct iv_class
*bl
;
4088 struct induction
*v
;
4094 benefit
= v
->benefit
;
4095 PUT_MODE (test_reg
, v
->mode
);
4096 add_cost
= iv_add_mult_cost (bl
->biv
->add_val
, v
->mult_val
,
4097 test_reg
, test_reg
);
4099 /* Reduce benefit if not replaceable, since we will insert a
4100 move-insn to replace the insn that calculates this giv. Don't do
4101 this unless the giv is a user variable, since it will often be
4102 marked non-replaceable because of the duplication of the exit
4103 code outside the loop. In such a case, the copies we insert are
4104 dead and will be deleted. So they don't have a cost. Similar
4105 situations exist. */
4106 /* ??? The new final_[bg]iv_value code does a much better job of
4107 finding replaceable giv's, and hence this code may no longer be
4109 if (! v
->replaceable
&& ! bl
->eliminable
4110 && REG_USERVAR_P (v
->dest_reg
))
4111 benefit
-= copy_cost
;
4113 /* Decrease the benefit to count the add-insns that we will insert
4114 to increment the reduced reg for the giv. ??? This can
4115 overestimate the run-time cost of the additional insns, e.g. if
4116 there are multiple basic blocks that increment the biv, but only
4117 one of these blocks is executed during each iteration. There is
4118 no good way to detect cases like this with the current structure
4119 of the loop optimizer. This code is more accurate for
4120 determining code size than run-time benefits. */
4121 benefit
-= add_cost
* bl
->biv_count
;
4123 /* Decide whether to strength-reduce this giv or to leave the code
4124 unchanged (recompute it from the biv each time it is used). This
4125 decision can be made independently for each giv. */
4128 /* Attempt to guess whether autoincrement will handle some of the
4129 new add insns; if so, increase BENEFIT (undo the subtraction of
4130 add_cost that was done above). */
4131 if (v
->giv_type
== DEST_ADDR
4132 /* Increasing the benefit is risky, since this is only a guess.
4133 Avoid increasing register pressure in cases where there would
4134 be no other benefit from reducing this giv. */
4136 && GET_CODE (v
->mult_val
) == CONST_INT
)
4138 int size
= GET_MODE_SIZE (GET_MODE (v
->mem
));
4140 if (HAVE_POST_INCREMENT
4141 && INTVAL (v
->mult_val
) == size
)
4142 benefit
+= add_cost
* bl
->biv_count
;
4143 else if (HAVE_PRE_INCREMENT
4144 && INTVAL (v
->mult_val
) == size
)
4145 benefit
+= add_cost
* bl
->biv_count
;
4146 else if (HAVE_POST_DECREMENT
4147 && -INTVAL (v
->mult_val
) == size
)
4148 benefit
+= add_cost
* bl
->biv_count
;
4149 else if (HAVE_PRE_DECREMENT
4150 && -INTVAL (v
->mult_val
) == size
)
4151 benefit
+= add_cost
* bl
->biv_count
;
4159 /* Free IV structures for LOOP. */
4162 loop_ivs_free (loop
)
4165 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4166 struct iv_class
*iv
= ivs
->list
;
4172 struct iv_class
*next
= iv
->next
;
4173 struct induction
*induction
;
4174 struct induction
*next_induction
;
4176 for (induction
= iv
->biv
; induction
; induction
= next_induction
)
4178 next_induction
= induction
->next_iv
;
4181 for (induction
= iv
->giv
; induction
; induction
= next_induction
)
4183 next_induction
= induction
->next_iv
;
4193 /* Perform strength reduction and induction variable elimination.
4195 Pseudo registers created during this function will be beyond the
4196 last valid index in several tables including
4197 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
4198 problem here, because the added registers cannot be givs outside of
4199 their loop, and hence will never be reconsidered. But scan_loop
4200 must check regnos to make sure they are in bounds. */
4203 strength_reduce (loop
, insn_count
, flags
)
4208 struct loop_info
*loop_info
= LOOP_INFO (loop
);
4209 struct loop_regs
*regs
= LOOP_REGS (loop
);
4210 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4212 /* Temporary list pointer for traversing ivs->list. */
4213 struct iv_class
*bl
;
4214 /* Ratio of extra register life span we can justify
4215 for saving an instruction. More if loop doesn't call subroutines
4216 since in that case saving an insn makes more difference
4217 and more registers are available. */
4218 /* ??? could set this to last value of threshold in move_movables */
4219 int threshold
= (loop_info
->has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
4220 /* Map of pseudo-register replacements. */
4221 rtx
*reg_map
= NULL
;
4223 int unrolled_insn_copies
= 0;
4224 rtx test_reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
4226 addr_placeholder
= gen_reg_rtx (Pmode
);
4228 ivs
->n_regs
= max_reg_before_loop
;
4229 ivs
->regs
= (struct iv
*) xcalloc (ivs
->n_regs
, sizeof (struct iv
));
4231 /* Find all BIVs in loop. */
4232 loop_bivs_find (loop
);
4234 /* Exit if there are no bivs. */
4237 /* Can still unroll the loop anyways, but indicate that there is no
4238 strength reduction info available. */
4239 if (flags
& LOOP_UNROLL
)
4240 unroll_loop (loop
, insn_count
, 0);
4242 loop_ivs_free (loop
);
4246 /* Determine how BIVS are initialised by looking through pre-header
4247 extended basic block. */
4248 loop_bivs_init_find (loop
);
4250 /* Look at the each biv and see if we can say anything better about its
4251 initial value from any initializing insns set up above. */
4252 loop_bivs_check (loop
);
4254 /* Search the loop for general induction variables. */
4255 loop_givs_find (loop
);
4257 /* Try to calculate and save the number of loop iterations. This is
4258 set to zero if the actual number can not be calculated. This must
4259 be called after all giv's have been identified, since otherwise it may
4260 fail if the iteration variable is a giv. */
4261 loop_iterations (loop
);
4263 /* Now for each giv for which we still don't know whether or not it is
4264 replaceable, check to see if it is replaceable because its final value
4265 can be calculated. This must be done after loop_iterations is called,
4266 so that final_giv_value will work correctly. */
4267 loop_givs_check (loop
);
4269 /* Try to prove that the loop counter variable (if any) is always
4270 nonnegative; if so, record that fact with a REG_NONNEG note
4271 so that "decrement and branch until zero" insn can be used. */
4272 check_dbra_loop (loop
, insn_count
);
4274 /* Create reg_map to hold substitutions for replaceable giv regs.
4275 Some givs might have been made from biv increments, so look at
4276 ivs->reg_iv_type for a suitable size. */
4277 reg_map_size
= ivs
->n_regs
;
4278 reg_map
= (rtx
*) xcalloc (reg_map_size
, sizeof (rtx
));
4280 /* Examine each iv class for feasibility of strength reduction/induction
4281 variable elimination. */
4283 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
4285 struct induction
*v
;
4288 /* Test whether it will be possible to eliminate this biv
4289 provided all givs are reduced. */
4290 bl
->eliminable
= loop_biv_eliminable_p (loop
, bl
, threshold
, insn_count
);
4292 /* Check each extension dependent giv in this class to see if its
4293 root biv is safe from wrapping in the interior mode. */
4294 check_ext_dependant_givs (bl
, loop_info
);
4296 /* Combine all giv's for this iv_class. */
4297 combine_givs (regs
, bl
);
4299 /* This will be true at the end, if all givs which depend on this
4300 biv have been strength reduced.
4301 We can't (currently) eliminate the biv unless this is so. */
4302 bl
->all_reduced
= 1;
4304 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4306 struct induction
*tv
;
4308 if (v
->ignore
|| v
->same
)
4311 benefit
= loop_giv_reduce_benefit (loop
, bl
, v
, test_reg
);
4313 /* If an insn is not to be strength reduced, then set its ignore
4314 flag, and clear bl->all_reduced. */
4316 /* A giv that depends on a reversed biv must be reduced if it is
4317 used after the loop exit, otherwise, it would have the wrong
4318 value after the loop exit. To make it simple, just reduce all
4319 of such giv's whether or not we know they are used after the loop
4322 if (! flag_reduce_all_givs
4323 && v
->lifetime
* threshold
* benefit
< insn_count
4326 if (loop_dump_stream
)
4327 fprintf (loop_dump_stream
,
4328 "giv of insn %d not worth while, %d vs %d.\n",
4330 v
->lifetime
* threshold
* benefit
, insn_count
);
4332 bl
->all_reduced
= 0;
4336 /* Check that we can increment the reduced giv without a
4337 multiply insn. If not, reject it. */
4339 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4340 if (tv
->mult_val
== const1_rtx
4341 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4343 if (loop_dump_stream
)
4344 fprintf (loop_dump_stream
,
4345 "giv of insn %d: would need a multiply.\n",
4346 INSN_UID (v
->insn
));
4348 bl
->all_reduced
= 0;
4354 /* Check for givs whose first use is their definition and whose
4355 last use is the definition of another giv. If so, it is likely
4356 dead and should not be used to derive another giv nor to
4358 loop_givs_dead_check (loop
, bl
);
4360 /* Reduce each giv that we decided to reduce. */
4361 loop_givs_reduce (loop
, bl
);
4363 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4366 For each giv register that can be reduced now: if replaceable,
4367 substitute reduced reg wherever the old giv occurs;
4368 else add new move insn "giv_reg = reduced_reg". */
4369 loop_givs_rescan (loop
, bl
, reg_map
);
4371 /* All the givs based on the biv bl have been reduced if they
4374 /* For each giv not marked as maybe dead that has been combined with a
4375 second giv, clear any "maybe dead" mark on that second giv.
4376 v->new_reg will either be or refer to the register of the giv it
4379 Doing this clearing avoids problems in biv elimination where
4380 a giv's new_reg is a complex value that can't be put in the
4381 insn but the giv combined with (with a reg as new_reg) is
4382 marked maybe_dead. Since the register will be used in either
4383 case, we'd prefer it be used from the simpler giv. */
4385 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4386 if (! v
->maybe_dead
&& v
->same
)
4387 v
->same
->maybe_dead
= 0;
4389 /* Try to eliminate the biv, if it is a candidate.
4390 This won't work if ! bl->all_reduced,
4391 since the givs we planned to use might not have been reduced.
4393 We have to be careful that we didn't initially think we could
4394 eliminate this biv because of a giv that we now think may be
4395 dead and shouldn't be used as a biv replacement.
4397 Also, there is the possibility that we may have a giv that looks
4398 like it can be used to eliminate a biv, but the resulting insn
4399 isn't valid. This can happen, for example, on the 88k, where a
4400 JUMP_INSN can compare a register only with zero. Attempts to
4401 replace it with a compare with a constant will fail.
4403 Note that in cases where this call fails, we may have replaced some
4404 of the occurrences of the biv with a giv, but no harm was done in
4405 doing so in the rare cases where it can occur. */
4407 if (bl
->all_reduced
== 1 && bl
->eliminable
4408 && maybe_eliminate_biv (loop
, bl
, 1, threshold
, insn_count
))
4410 /* ?? If we created a new test to bypass the loop entirely,
4411 or otherwise drop straight in, based on this test, then
4412 we might want to rewrite it also. This way some later
4413 pass has more hope of removing the initialization of this
4416 /* If final_value != 0, then the biv may be used after loop end
4417 and we must emit an insn to set it just in case.
4419 Reversed bivs already have an insn after the loop setting their
4420 value, so we don't need another one. We can't calculate the
4421 proper final value for such a biv here anyways. */
4422 if (bl
->final_value
&& ! bl
->reversed
)
4423 loop_insn_sink_or_swim (loop
, gen_move_insn
4424 (bl
->biv
->dest_reg
, bl
->final_value
));
4426 if (loop_dump_stream
)
4427 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4432 /* Go through all the instructions in the loop, making all the
4433 register substitutions scheduled in REG_MAP. */
4435 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
4436 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4437 || GET_CODE (p
) == CALL_INSN
)
4439 replace_regs (PATTERN (p
), reg_map
, reg_map_size
, 0);
4440 replace_regs (REG_NOTES (p
), reg_map
, reg_map_size
, 0);
4444 if (loop_info
->n_iterations
> 0)
4446 /* When we completely unroll a loop we will likely not need the increment
4447 of the loop BIV and we will not need the conditional branch at the
4449 unrolled_insn_copies
= insn_count
- 2;
4452 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
4453 need the comparison before the conditional branch at the end of the
4455 unrolled_insn_copies
-= 1;
4458 /* We'll need one copy for each loop iteration. */
4459 unrolled_insn_copies
*= loop_info
->n_iterations
;
4461 /* A little slop to account for the ability to remove initialization
4462 code, better CSE, and other secondary benefits of completely
4463 unrolling some loops. */
4464 unrolled_insn_copies
-= 1;
4466 /* Clamp the value. */
4467 if (unrolled_insn_copies
< 0)
4468 unrolled_insn_copies
= 0;
4471 /* Unroll loops from within strength reduction so that we can use the
4472 induction variable information that strength_reduce has already
4473 collected. Always unroll loops that would be as small or smaller
4474 unrolled than when rolled. */
4475 if ((flags
& LOOP_UNROLL
)
4476 || (loop_info
->n_iterations
> 0
4477 && unrolled_insn_copies
<= insn_count
))
4478 unroll_loop (loop
, insn_count
, 1);
4480 #ifdef HAVE_doloop_end
4481 if (HAVE_doloop_end
&& (flags
& LOOP_BCT
) && flag_branch_on_count_reg
)
4482 doloop_optimize (loop
);
4483 #endif /* HAVE_doloop_end */
4485 if (loop_dump_stream
)
4486 fprintf (loop_dump_stream
, "\n");
4488 loop_ivs_free (loop
);
4493 /*Record all basic induction variables calculated in the insn. */
4495 check_insn_for_bivs (loop
, p
, not_every_iteration
, maybe_multiple
)
4498 int not_every_iteration
;
4501 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4508 if (GET_CODE (p
) == INSN
4509 && (set
= single_set (p
))
4510 && GET_CODE (SET_DEST (set
)) == REG
)
4512 dest_reg
= SET_DEST (set
);
4513 if (REGNO (dest_reg
) < max_reg_before_loop
4514 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
4515 && REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != NOT_BASIC_INDUCT
)
4517 if (basic_induction_var (loop
, SET_SRC (set
),
4518 GET_MODE (SET_SRC (set
)),
4519 dest_reg
, p
, &inc_val
, &mult_val
,
4522 /* It is a possible basic induction variable.
4523 Create and initialize an induction structure for it. */
4526 = (struct induction
*) xmalloc (sizeof (struct induction
));
4528 record_biv (loop
, v
, p
, dest_reg
, inc_val
, mult_val
, location
,
4529 not_every_iteration
, maybe_multiple
);
4530 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = BASIC_INDUCT
;
4532 else if (REGNO (dest_reg
) < ivs
->n_regs
)
4533 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = NOT_BASIC_INDUCT
;
4539 /* Record all givs calculated in the insn.
4540 A register is a giv if: it is only set once, it is a function of a
4541 biv and a constant (or invariant), and it is not a biv. */
4543 check_insn_for_givs (loop
, p
, not_every_iteration
, maybe_multiple
)
4546 int not_every_iteration
;
4549 struct loop_regs
*regs
= LOOP_REGS (loop
);
4552 /* Look for a general induction variable in a register. */
4553 if (GET_CODE (p
) == INSN
4554 && (set
= single_set (p
))
4555 && GET_CODE (SET_DEST (set
)) == REG
4556 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
4565 rtx last_consec_insn
;
4567 dest_reg
= SET_DEST (set
);
4568 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
4571 if (/* SET_SRC is a giv. */
4572 (general_induction_var (loop
, SET_SRC (set
), &src_reg
, &add_val
,
4573 &mult_val
, &ext_val
, 0, &benefit
, VOIDmode
)
4574 /* Equivalent expression is a giv. */
4575 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
4576 && general_induction_var (loop
, XEXP (regnote
, 0), &src_reg
,
4577 &add_val
, &mult_val
, &ext_val
, 0,
4578 &benefit
, VOIDmode
)))
4579 /* Don't try to handle any regs made by loop optimization.
4580 We have nothing on them in regno_first_uid, etc. */
4581 && REGNO (dest_reg
) < max_reg_before_loop
4582 /* Don't recognize a BASIC_INDUCT_VAR here. */
4583 && dest_reg
!= src_reg
4584 /* This must be the only place where the register is set. */
4585 && (regs
->array
[REGNO (dest_reg
)].n_times_set
== 1
4586 /* or all sets must be consecutive and make a giv. */
4587 || (benefit
= consec_sets_giv (loop
, benefit
, p
,
4589 &add_val
, &mult_val
, &ext_val
,
4590 &last_consec_insn
))))
4593 = (struct induction
*) xmalloc (sizeof (struct induction
));
4595 /* If this is a library call, increase benefit. */
4596 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
4597 benefit
+= libcall_benefit (p
);
4599 /* Skip the consecutive insns, if there are any. */
4600 if (regs
->array
[REGNO (dest_reg
)].n_times_set
!= 1)
4601 p
= last_consec_insn
;
4603 record_giv (loop
, v
, p
, src_reg
, dest_reg
, mult_val
, add_val
,
4604 ext_val
, benefit
, DEST_REG
, not_every_iteration
,
4605 maybe_multiple
, NULL_PTR
);
4610 #ifndef DONT_REDUCE_ADDR
4611 /* Look for givs which are memory addresses. */
4612 /* This resulted in worse code on a VAX 8600. I wonder if it
4614 if (GET_CODE (p
) == INSN
)
4615 find_mem_givs (loop
, PATTERN (p
), p
, not_every_iteration
,
4619 /* Update the status of whether giv can derive other givs. This can
4620 change when we pass a label or an insn that updates a biv. */
4621 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4622 || GET_CODE (p
) == CODE_LABEL
)
4623 update_giv_derive (loop
, p
);
4627 /* Return 1 if X is a valid source for an initial value (or as value being
4628 compared against in an initial test).
4630 X must be either a register or constant and must not be clobbered between
4631 the current insn and the start of the loop.
4633 INSN is the insn containing X. */
4636 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4645 /* Only consider pseudos we know about initialized in insns whose luids
4647 if (GET_CODE (x
) != REG
4648 || REGNO (x
) >= max_reg_before_loop
)
4651 /* Don't use call-clobbered registers across a call which clobbers it. On
4652 some machines, don't use any hard registers at all. */
4653 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4654 && (SMALL_REGISTER_CLASSES
4655 || (call_used_regs
[REGNO (x
)] && call_seen
)))
4658 /* Don't use registers that have been clobbered before the start of the
4660 if (reg_set_between_p (x
, insn
, loop_start
))
4666 /* Scan X for memory refs and check each memory address
4667 as a possible giv. INSN is the insn whose pattern X comes from.
4668 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4669 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
4670 more thanonce in each loop iteration. */
4673 find_mem_givs (loop
, x
, insn
, not_every_iteration
, maybe_multiple
)
4674 const struct loop
*loop
;
4677 int not_every_iteration
, maybe_multiple
;
4680 register enum rtx_code code
;
4681 register const char *fmt
;
4686 code
= GET_CODE (x
);
4711 /* This code used to disable creating GIVs with mult_val == 1 and
4712 add_val == 0. However, this leads to lost optimizations when
4713 it comes time to combine a set of related DEST_ADDR GIVs, since
4714 this one would not be seen. */
4716 if (general_induction_var (loop
, XEXP (x
, 0), &src_reg
, &add_val
,
4717 &mult_val
, &ext_val
, 1, &benefit
,
4720 /* Found one; record it. */
4722 = (struct induction
*) xmalloc (sizeof (struct induction
));
4724 record_giv (loop
, v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4725 add_val
, ext_val
, benefit
, DEST_ADDR
,
4726 not_every_iteration
, maybe_multiple
, &XEXP (x
, 0));
4737 /* Recursively scan the subexpressions for other mem refs. */
4739 fmt
= GET_RTX_FORMAT (code
);
4740 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4742 find_mem_givs (loop
, XEXP (x
, i
), insn
, not_every_iteration
,
4744 else if (fmt
[i
] == 'E')
4745 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4746 find_mem_givs (loop
, XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4750 /* Fill in the data about one biv update.
4751 V is the `struct induction' in which we record the biv. (It is
4752 allocated by the caller, with alloca.)
4753 INSN is the insn that sets it.
4754 DEST_REG is the biv's reg.
4756 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4757 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4758 being set to INC_VAL.
4760 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4761 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4762 can be executed more than once per iteration. If MAYBE_MULTIPLE
4763 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4764 executed exactly once per iteration. */
4767 record_biv (loop
, v
, insn
, dest_reg
, inc_val
, mult_val
, location
,
4768 not_every_iteration
, maybe_multiple
)
4770 struct induction
*v
;
4776 int not_every_iteration
;
4779 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4780 struct iv_class
*bl
;
4783 v
->src_reg
= dest_reg
;
4784 v
->dest_reg
= dest_reg
;
4785 v
->mult_val
= mult_val
;
4786 v
->add_val
= inc_val
;
4787 v
->ext_dependant
= NULL_RTX
;
4788 v
->location
= location
;
4789 v
->mode
= GET_MODE (dest_reg
);
4790 v
->always_computable
= ! not_every_iteration
;
4791 v
->always_executed
= ! not_every_iteration
;
4792 v
->maybe_multiple
= maybe_multiple
;
4794 /* Add this to the reg's iv_class, creating a class
4795 if this is the first incrementation of the reg. */
4797 bl
= REG_IV_CLASS (ivs
, REGNO (dest_reg
));
4800 /* Create and initialize new iv_class. */
4802 bl
= (struct iv_class
*) xmalloc (sizeof (struct iv_class
));
4804 bl
->regno
= REGNO (dest_reg
);
4810 /* Set initial value to the reg itself. */
4811 bl
->initial_value
= dest_reg
;
4812 bl
->final_value
= 0;
4813 /* We haven't seen the initializing insn yet */
4816 bl
->initial_test
= 0;
4817 bl
->incremented
= 0;
4821 bl
->total_benefit
= 0;
4823 /* Add this class to ivs->list. */
4824 bl
->next
= ivs
->list
;
4827 /* Put it in the array of biv register classes. */
4828 REG_IV_CLASS (ivs
, REGNO (dest_reg
)) = bl
;
4831 /* Update IV_CLASS entry for this biv. */
4832 v
->next_iv
= bl
->biv
;
4835 if (mult_val
== const1_rtx
)
4836 bl
->incremented
= 1;
4838 if (loop_dump_stream
)
4839 loop_biv_dump (v
, loop_dump_stream
, 0);
4842 /* Fill in the data about one giv.
4843 V is the `struct induction' in which we record the giv. (It is
4844 allocated by the caller, with alloca.)
4845 INSN is the insn that sets it.
4846 BENEFIT estimates the savings from deleting this insn.
4847 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4848 into a register or is used as a memory address.
4850 SRC_REG is the biv reg which the giv is computed from.
4851 DEST_REG is the giv's reg (if the giv is stored in a reg).
4852 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4853 LOCATION points to the place where this giv's value appears in INSN. */
4856 record_giv (loop
, v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, ext_val
,
4857 benefit
, type
, not_every_iteration
, maybe_multiple
, location
)
4858 const struct loop
*loop
;
4859 struct induction
*v
;
4863 rtx mult_val
, add_val
, ext_val
;
4866 int not_every_iteration
, maybe_multiple
;
4869 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4870 struct induction
*b
;
4871 struct iv_class
*bl
;
4872 rtx set
= single_set (insn
);
4875 /* Attempt to prove constantness of the values. */
4876 temp
= simplify_rtx (add_val
);
4881 v
->src_reg
= src_reg
;
4883 v
->dest_reg
= dest_reg
;
4884 v
->mult_val
= mult_val
;
4885 v
->add_val
= add_val
;
4886 v
->ext_dependant
= ext_val
;
4887 v
->benefit
= benefit
;
4888 v
->location
= location
;
4890 v
->combined_with
= 0;
4891 v
->maybe_multiple
= maybe_multiple
;
4893 v
->derive_adjustment
= 0;
4899 v
->auto_inc_opt
= 0;
4903 /* The v->always_computable field is used in update_giv_derive, to
4904 determine whether a giv can be used to derive another giv. For a
4905 DEST_REG giv, INSN computes a new value for the giv, so its value
4906 isn't computable if INSN insn't executed every iteration.
4907 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4908 it does not compute a new value. Hence the value is always computable
4909 regardless of whether INSN is executed each iteration. */
4911 if (type
== DEST_ADDR
)
4912 v
->always_computable
= 1;
4914 v
->always_computable
= ! not_every_iteration
;
4916 v
->always_executed
= ! not_every_iteration
;
4918 if (type
== DEST_ADDR
)
4920 v
->mode
= GET_MODE (*location
);
4923 else /* type == DEST_REG */
4925 v
->mode
= GET_MODE (SET_DEST (set
));
4927 v
->lifetime
= LOOP_REG_LIFETIME (loop
, REGNO (dest_reg
));
4929 /* If the lifetime is zero, it means that this register is
4930 really a dead store. So mark this as a giv that can be
4931 ignored. This will not prevent the biv from being eliminated. */
4932 if (v
->lifetime
== 0)
4935 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
4936 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
4939 /* Add the giv to the class of givs computed from one biv. */
4941 bl
= REG_IV_CLASS (ivs
, REGNO (src_reg
));
4944 v
->next_iv
= bl
->giv
;
4946 /* Don't count DEST_ADDR. This is supposed to count the number of
4947 insns that calculate givs. */
4948 if (type
== DEST_REG
)
4950 bl
->total_benefit
+= benefit
;
4953 /* Fatal error, biv missing for this giv? */
4956 if (type
== DEST_ADDR
)
4960 /* The giv can be replaced outright by the reduced register only if all
4961 of the following conditions are true:
4962 - the insn that sets the giv is always executed on any iteration
4963 on which the giv is used at all
4964 (there are two ways to deduce this:
4965 either the insn is executed on every iteration,
4966 or all uses follow that insn in the same basic block),
4967 - the giv is not used outside the loop
4968 - no assignments to the biv occur during the giv's lifetime. */
4970 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4971 /* Previous line always fails if INSN was moved by loop opt. */
4972 && REGNO_LAST_LUID (REGNO (dest_reg
))
4973 < INSN_LUID (loop
->end
)
4974 && (! not_every_iteration
4975 || last_use_this_basic_block (dest_reg
, insn
)))
4977 /* Now check that there are no assignments to the biv within the
4978 giv's lifetime. This requires two separate checks. */
4980 /* Check each biv update, and fail if any are between the first
4981 and last use of the giv.
4983 If this loop contains an inner loop that was unrolled, then
4984 the insn modifying the biv may have been emitted by the loop
4985 unrolling code, and hence does not have a valid luid. Just
4986 mark the biv as not replaceable in this case. It is not very
4987 useful as a biv, because it is used in two different loops.
4988 It is very unlikely that we would be able to optimize the giv
4989 using this biv anyways. */
4992 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4994 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4995 || ((INSN_LUID (b
->insn
)
4996 >= REGNO_FIRST_LUID (REGNO (dest_reg
)))
4997 && (INSN_LUID (b
->insn
)
4998 <= REGNO_LAST_LUID (REGNO (dest_reg
)))))
5001 v
->not_replaceable
= 1;
5006 /* If there are any backwards branches that go from after the
5007 biv update to before it, then this giv is not replaceable. */
5009 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5010 if (back_branch_in_range_p (loop
, b
->insn
))
5013 v
->not_replaceable
= 1;
5019 /* May still be replaceable, we don't have enough info here to
5022 v
->not_replaceable
= 0;
5026 /* Record whether the add_val contains a const_int, for later use by
5031 v
->no_const_addval
= 1;
5032 if (tem
== const0_rtx
)
5034 else if (CONSTANT_P (add_val
))
5035 v
->no_const_addval
= 0;
5036 if (GET_CODE (tem
) == PLUS
)
5040 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
5041 tem
= XEXP (tem
, 0);
5042 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
5043 tem
= XEXP (tem
, 1);
5047 if (CONSTANT_P (XEXP (tem
, 1)))
5048 v
->no_const_addval
= 0;
5052 if (loop_dump_stream
)
5053 loop_giv_dump (v
, loop_dump_stream
, 0);
5056 /* All this does is determine whether a giv can be made replaceable because
5057 its final value can be calculated. This code can not be part of record_giv
5058 above, because final_giv_value requires that the number of loop iterations
5059 be known, and that can not be accurately calculated until after all givs
5060 have been identified. */
5063 check_final_value (loop
, v
)
5064 const struct loop
*loop
;
5065 struct induction
*v
;
5067 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5068 struct iv_class
*bl
;
5069 rtx final_value
= 0;
5071 bl
= REG_IV_CLASS (ivs
, REGNO (v
->src_reg
));
5073 /* DEST_ADDR givs will never reach here, because they are always marked
5074 replaceable above in record_giv. */
5076 /* The giv can be replaced outright by the reduced register only if all
5077 of the following conditions are true:
5078 - the insn that sets the giv is always executed on any iteration
5079 on which the giv is used at all
5080 (there are two ways to deduce this:
5081 either the insn is executed on every iteration,
5082 or all uses follow that insn in the same basic block),
5083 - its final value can be calculated (this condition is different
5084 than the one above in record_giv)
5085 - it's not used before the it's set
5086 - no assignments to the biv occur during the giv's lifetime. */
5089 /* This is only called now when replaceable is known to be false. */
5090 /* Clear replaceable, so that it won't confuse final_giv_value. */
5094 if ((final_value
= final_giv_value (loop
, v
))
5095 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
5097 int biv_increment_seen
= 0, before_giv_insn
= 0;
5103 /* When trying to determine whether or not a biv increment occurs
5104 during the lifetime of the giv, we can ignore uses of the variable
5105 outside the loop because final_value is true. Hence we can not
5106 use regno_last_uid and regno_first_uid as above in record_giv. */
5108 /* Search the loop to determine whether any assignments to the
5109 biv occur during the giv's lifetime. Start with the insn
5110 that sets the giv, and search around the loop until we come
5111 back to that insn again.
5113 Also fail if there is a jump within the giv's lifetime that jumps
5114 to somewhere outside the lifetime but still within the loop. This
5115 catches spaghetti code where the execution order is not linear, and
5116 hence the above test fails. Here we assume that the giv lifetime
5117 does not extend from one iteration of the loop to the next, so as
5118 to make the test easier. Since the lifetime isn't known yet,
5119 this requires two loops. See also record_giv above. */
5121 last_giv_use
= v
->insn
;
5128 before_giv_insn
= 1;
5129 p
= NEXT_INSN (loop
->start
);
5134 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5135 || GET_CODE (p
) == CALL_INSN
)
5137 /* It is possible for the BIV increment to use the GIV if we
5138 have a cycle. Thus we must be sure to check each insn for
5139 both BIV and GIV uses, and we must check for BIV uses
5142 if (! biv_increment_seen
5143 && reg_set_p (v
->src_reg
, PATTERN (p
)))
5144 biv_increment_seen
= 1;
5146 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5148 if (biv_increment_seen
|| before_giv_insn
)
5151 v
->not_replaceable
= 1;
5159 /* Now that the lifetime of the giv is known, check for branches
5160 from within the lifetime to outside the lifetime if it is still
5170 p
= NEXT_INSN (loop
->start
);
5171 if (p
== last_giv_use
)
5174 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
5175 && LABEL_NAME (JUMP_LABEL (p
))
5176 && ((loop_insn_first_p (JUMP_LABEL (p
), v
->insn
)
5177 && loop_insn_first_p (loop
->start
, JUMP_LABEL (p
)))
5178 || (loop_insn_first_p (last_giv_use
, JUMP_LABEL (p
))
5179 && loop_insn_first_p (JUMP_LABEL (p
), loop
->end
))))
5182 v
->not_replaceable
= 1;
5184 if (loop_dump_stream
)
5185 fprintf (loop_dump_stream
,
5186 "Found branch outside giv lifetime.\n");
5193 /* If it is replaceable, then save the final value. */
5195 v
->final_value
= final_value
;
5198 if (loop_dump_stream
&& v
->replaceable
)
5199 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
5200 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
5203 /* Update the status of whether a giv can derive other givs.
5205 We need to do something special if there is or may be an update to the biv
5206 between the time the giv is defined and the time it is used to derive
5209 In addition, a giv that is only conditionally set is not allowed to
5210 derive another giv once a label has been passed.
5212 The cases we look at are when a label or an update to a biv is passed. */
5215 update_giv_derive (loop
, p
)
5216 const struct loop
*loop
;
5219 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5220 struct iv_class
*bl
;
5221 struct induction
*biv
, *giv
;
5225 /* Search all IV classes, then all bivs, and finally all givs.
5227 There are three cases we are concerned with. First we have the situation
5228 of a giv that is only updated conditionally. In that case, it may not
5229 derive any givs after a label is passed.
5231 The second case is when a biv update occurs, or may occur, after the
5232 definition of a giv. For certain biv updates (see below) that are
5233 known to occur between the giv definition and use, we can adjust the
5234 giv definition. For others, or when the biv update is conditional,
5235 we must prevent the giv from deriving any other givs. There are two
5236 sub-cases within this case.
5238 If this is a label, we are concerned with any biv update that is done
5239 conditionally, since it may be done after the giv is defined followed by
5240 a branch here (actually, we need to pass both a jump and a label, but
5241 this extra tracking doesn't seem worth it).
5243 If this is a jump, we are concerned about any biv update that may be
5244 executed multiple times. We are actually only concerned about
5245 backward jumps, but it is probably not worth performing the test
5246 on the jump again here.
5248 If this is a biv update, we must adjust the giv status to show that a
5249 subsequent biv update was performed. If this adjustment cannot be done,
5250 the giv cannot derive further givs. */
5252 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
5253 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5254 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5257 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5259 /* If cant_derive is already true, there is no point in
5260 checking all of these conditions again. */
5261 if (giv
->cant_derive
)
5264 /* If this giv is conditionally set and we have passed a label,
5265 it cannot derive anything. */
5266 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5267 giv
->cant_derive
= 1;
5269 /* Skip givs that have mult_val == 0, since
5270 they are really invariants. Also skip those that are
5271 replaceable, since we know their lifetime doesn't contain
5273 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5276 /* The only way we can allow this giv to derive another
5277 is if this is a biv increment and we can form the product
5278 of biv->add_val and giv->mult_val. In this case, we will
5279 be able to compute a compensation. */
5280 else if (biv
->insn
== p
)
5285 if (biv
->mult_val
== const1_rtx
)
5286 tem
= simplify_giv_expr (loop
,
5287 gen_rtx_MULT (giv
->mode
,
5290 &ext_val_dummy
, &dummy
);
5292 if (tem
&& giv
->derive_adjustment
)
5293 tem
= simplify_giv_expr
5295 gen_rtx_PLUS (giv
->mode
, tem
, giv
->derive_adjustment
),
5296 &ext_val_dummy
, &dummy
);
5299 giv
->derive_adjustment
= tem
;
5301 giv
->cant_derive
= 1;
5303 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5304 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5305 giv
->cant_derive
= 1;
5310 /* Check whether an insn is an increment legitimate for a basic induction var.
5311 X is the source of insn P, or a part of it.
5312 MODE is the mode in which X should be interpreted.
5314 DEST_REG is the putative biv, also the destination of the insn.
5315 We accept patterns of these forms:
5316 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5317 REG = INVARIANT + REG
5319 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5320 store the additive term into *INC_VAL, and store the place where
5321 we found the additive term into *LOCATION.
5323 If X is an assignment of an invariant into DEST_REG, we set
5324 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5326 We also want to detect a BIV when it corresponds to a variable
5327 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5328 of the variable may be a PLUS that adds a SUBREG of that variable to
5329 an invariant and then sign- or zero-extends the result of the PLUS
5332 Most GIVs in such cases will be in the promoted mode, since that is the
5333 probably the natural computation mode (and almost certainly the mode
5334 used for addresses) on the machine. So we view the pseudo-reg containing
5335 the variable as the BIV, as if it were simply incremented.
5337 Note that treating the entire pseudo as a BIV will result in making
5338 simple increments to any GIVs based on it. However, if the variable
5339 overflows in its declared mode but not its promoted mode, the result will
5340 be incorrect. This is acceptable if the variable is signed, since
5341 overflows in such cases are undefined, but not if it is unsigned, since
5342 those overflows are defined. So we only check for SIGN_EXTEND and
5345 If we cannot find a biv, we return 0. */
5348 basic_induction_var (loop
, x
, mode
, dest_reg
, p
, inc_val
, mult_val
, location
)
5349 const struct loop
*loop
;
5351 enum machine_mode mode
;
5358 register enum rtx_code code
;
5362 code
= GET_CODE (x
);
5367 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
5368 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5369 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5370 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5372 argp
= &XEXP (x
, 1);
5374 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
5375 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5376 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5377 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5379 argp
= &XEXP (x
, 0);
5385 if (loop_invariant_p (loop
, arg
) != 1)
5388 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5389 *mult_val
= const1_rtx
;
5394 /* If this is a SUBREG for a promoted variable, check the inner
5396 if (SUBREG_PROMOTED_VAR_P (x
))
5397 return basic_induction_var (loop
, SUBREG_REG (x
),
5398 GET_MODE (SUBREG_REG (x
)),
5399 dest_reg
, p
, inc_val
, mult_val
, location
);
5403 /* If this register is assigned in a previous insn, look at its
5404 source, but don't go outside the loop or past a label. */
5406 /* If this sets a register to itself, we would repeat any previous
5407 biv increment if we applied this strategy blindly. */
5408 if (rtx_equal_p (dest_reg
, x
))
5417 insn
= PREV_INSN (insn
);
5419 while (insn
&& GET_CODE (insn
) == NOTE
5420 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5424 set
= single_set (insn
);
5427 dest
= SET_DEST (set
);
5429 || (GET_CODE (dest
) == SUBREG
5430 && (GET_MODE_SIZE (GET_MODE (dest
)) <= UNITS_PER_WORD
)
5431 && (GET_MODE_CLASS (GET_MODE (dest
)) == MODE_INT
)
5432 && SUBREG_REG (dest
) == x
))
5433 return basic_induction_var (loop
, SET_SRC (set
),
5434 (GET_MODE (SET_SRC (set
)) == VOIDmode
5436 : GET_MODE (SET_SRC (set
))),
5438 inc_val
, mult_val
, location
);
5440 while (GET_CODE (dest
) == SIGN_EXTRACT
5441 || GET_CODE (dest
) == ZERO_EXTRACT
5442 || GET_CODE (dest
) == SUBREG
5443 || GET_CODE (dest
) == STRICT_LOW_PART
)
5444 dest
= XEXP (dest
, 0);
5450 /* Can accept constant setting of biv only when inside inner most loop.
5451 Otherwise, a biv of an inner loop may be incorrectly recognized
5452 as a biv of the outer loop,
5453 causing code to be moved INTO the inner loop. */
5455 if (loop_invariant_p (loop
, x
) != 1)
5460 /* convert_modes aborts if we try to convert to or from CCmode, so just
5461 exclude that case. It is very unlikely that a condition code value
5462 would be a useful iterator anyways. */
5463 if (loop
->level
== 1
5464 && GET_MODE_CLASS (mode
) != MODE_CC
5465 && GET_MODE_CLASS (GET_MODE (dest_reg
)) != MODE_CC
)
5467 /* Possible bug here? Perhaps we don't know the mode of X. */
5468 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5469 *mult_val
= const0_rtx
;
5476 return basic_induction_var (loop
, XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5477 dest_reg
, p
, inc_val
, mult_val
, location
);
5480 /* Similar, since this can be a sign extension. */
5481 for (insn
= PREV_INSN (p
);
5482 (insn
&& GET_CODE (insn
) == NOTE
5483 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5484 insn
= PREV_INSN (insn
))
5488 set
= single_set (insn
);
5490 if (! rtx_equal_p (dest_reg
, XEXP (x
, 0))
5491 && set
&& SET_DEST (set
) == XEXP (x
, 0)
5492 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5493 && INTVAL (XEXP (x
, 1)) >= 0
5494 && GET_CODE (SET_SRC (set
)) == ASHIFT
5495 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5496 return basic_induction_var (loop
, XEXP (SET_SRC (set
), 0),
5497 GET_MODE (XEXP (x
, 0)),
5498 dest_reg
, insn
, inc_val
, mult_val
,
5507 /* A general induction variable (giv) is any quantity that is a linear
5508 function of a basic induction variable,
5509 i.e. giv = biv * mult_val + add_val.
5510 The coefficients can be any loop invariant quantity.
5511 A giv need not be computed directly from the biv;
5512 it can be computed by way of other givs. */
5514 /* Determine whether X computes a giv.
5515 If it does, return a nonzero value
5516 which is the benefit from eliminating the computation of X;
5517 set *SRC_REG to the register of the biv that it is computed from;
5518 set *ADD_VAL and *MULT_VAL to the coefficients,
5519 such that the value of X is biv * mult + add; */
5522 general_induction_var (loop
, x
, src_reg
, add_val
, mult_val
, ext_val
,
5523 is_addr
, pbenefit
, addr_mode
)
5524 const struct loop
*loop
;
5532 enum machine_mode addr_mode
;
5534 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5537 /* If this is an invariant, forget it, it isn't a giv. */
5538 if (loop_invariant_p (loop
, x
) == 1)
5542 *ext_val
= NULL_RTX
;
5543 x
= simplify_giv_expr (loop
, x
, ext_val
, pbenefit
);
5547 switch (GET_CODE (x
))
5551 /* Since this is now an invariant and wasn't before, it must be a giv
5552 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5554 *src_reg
= ivs
->list
->biv
->dest_reg
;
5555 *mult_val
= const0_rtx
;
5560 /* This is equivalent to a BIV. */
5562 *mult_val
= const1_rtx
;
5563 *add_val
= const0_rtx
;
5567 /* Either (plus (biv) (invar)) or
5568 (plus (mult (biv) (invar_1)) (invar_2)). */
5569 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5571 *src_reg
= XEXP (XEXP (x
, 0), 0);
5572 *mult_val
= XEXP (XEXP (x
, 0), 1);
5576 *src_reg
= XEXP (x
, 0);
5577 *mult_val
= const1_rtx
;
5579 *add_val
= XEXP (x
, 1);
5583 /* ADD_VAL is zero. */
5584 *src_reg
= XEXP (x
, 0);
5585 *mult_val
= XEXP (x
, 1);
5586 *add_val
= const0_rtx
;
5593 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5594 unless they are CONST_INT). */
5595 if (GET_CODE (*add_val
) == USE
)
5596 *add_val
= XEXP (*add_val
, 0);
5597 if (GET_CODE (*mult_val
) == USE
)
5598 *mult_val
= XEXP (*mult_val
, 0);
5601 *pbenefit
+= address_cost (orig_x
, addr_mode
) - reg_address_cost
;
5603 *pbenefit
+= rtx_cost (orig_x
, SET
);
5605 /* Always return true if this is a giv so it will be detected as such,
5606 even if the benefit is zero or negative. This allows elimination
5607 of bivs that might otherwise not be eliminated. */
5611 /* Given an expression, X, try to form it as a linear function of a biv.
5612 We will canonicalize it to be of the form
5613 (plus (mult (BIV) (invar_1))
5615 with possible degeneracies.
5617 The invariant expressions must each be of a form that can be used as a
5618 machine operand. We surround then with a USE rtx (a hack, but localized
5619 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5620 routine; it is the caller's responsibility to strip them.
5622 If no such canonicalization is possible (i.e., two biv's are used or an
5623 expression that is neither invariant nor a biv or giv), this routine
5626 For a non-zero return, the result will have a code of CONST_INT, USE,
5627 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5629 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5631 static rtx sge_plus
PARAMS ((enum machine_mode
, rtx
, rtx
));
5632 static rtx sge_plus_constant
PARAMS ((rtx
, rtx
));
5635 simplify_giv_expr (loop
, x
, ext_val
, benefit
)
5636 const struct loop
*loop
;
5641 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5642 struct loop_regs
*regs
= LOOP_REGS (loop
);
5643 enum machine_mode mode
= GET_MODE (x
);
5647 /* If this is not an integer mode, or if we cannot do arithmetic in this
5648 mode, this can't be a giv. */
5649 if (mode
!= VOIDmode
5650 && (GET_MODE_CLASS (mode
) != MODE_INT
5651 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5654 switch (GET_CODE (x
))
5657 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
5658 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
5659 if (arg0
== 0 || arg1
== 0)
5662 /* Put constant last, CONST_INT last if both constant. */
5663 if ((GET_CODE (arg0
) == USE
5664 || GET_CODE (arg0
) == CONST_INT
)
5665 && ! ((GET_CODE (arg0
) == USE
5666 && GET_CODE (arg1
) == USE
)
5667 || GET_CODE (arg1
) == CONST_INT
))
5668 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5670 /* Handle addition of zero, then addition of an invariant. */
5671 if (arg1
== const0_rtx
)
5673 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5674 switch (GET_CODE (arg0
))
5678 /* Adding two invariants must result in an invariant, so enclose
5679 addition operation inside a USE and return it. */
5680 if (GET_CODE (arg0
) == USE
)
5681 arg0
= XEXP (arg0
, 0);
5682 if (GET_CODE (arg1
) == USE
)
5683 arg1
= XEXP (arg1
, 0);
5685 if (GET_CODE (arg0
) == CONST_INT
)
5686 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5687 if (GET_CODE (arg1
) == CONST_INT
)
5688 tem
= sge_plus_constant (arg0
, arg1
);
5690 tem
= sge_plus (mode
, arg0
, arg1
);
5692 if (GET_CODE (tem
) != CONST_INT
)
5693 tem
= gen_rtx_USE (mode
, tem
);
5698 /* biv + invar or mult + invar. Return sum. */
5699 return gen_rtx_PLUS (mode
, arg0
, arg1
);
5702 /* (a + invar_1) + invar_2. Associate. */
5704 simplify_giv_expr (loop
,
5716 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5717 MULT to reduce cases. */
5718 if (GET_CODE (arg0
) == REG
)
5719 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
5720 if (GET_CODE (arg1
) == REG
)
5721 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
5723 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5724 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5725 Recurse to associate the second PLUS. */
5726 if (GET_CODE (arg1
) == MULT
)
5727 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5729 if (GET_CODE (arg1
) == PLUS
)
5731 simplify_giv_expr (loop
,
5733 gen_rtx_PLUS (mode
, arg0
,
5738 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5739 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5742 if (!rtx_equal_p (arg0
, arg1
))
5745 return simplify_giv_expr (loop
,
5754 /* Handle "a - b" as "a + b * (-1)". */
5755 return simplify_giv_expr (loop
,
5764 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
5765 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
5766 if (arg0
== 0 || arg1
== 0)
5769 /* Put constant last, CONST_INT last if both constant. */
5770 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5771 && GET_CODE (arg1
) != CONST_INT
)
5772 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5774 /* If second argument is not now constant, not giv. */
5775 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5778 /* Handle multiply by 0 or 1. */
5779 if (arg1
== const0_rtx
)
5782 else if (arg1
== const1_rtx
)
5785 switch (GET_CODE (arg0
))
5788 /* biv * invar. Done. */
5789 return gen_rtx_MULT (mode
, arg0
, arg1
);
5792 /* Product of two constants. */
5793 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5796 /* invar * invar is a giv, but attempt to simplify it somehow. */
5797 if (GET_CODE (arg1
) != CONST_INT
)
5800 arg0
= XEXP (arg0
, 0);
5801 if (GET_CODE (arg0
) == MULT
)
5803 /* (invar_0 * invar_1) * invar_2. Associate. */
5804 return simplify_giv_expr (loop
,
5813 /* Porpagate the MULT expressions to the intermost nodes. */
5814 else if (GET_CODE (arg0
) == PLUS
)
5816 /* (invar_0 + invar_1) * invar_2. Distribute. */
5817 return simplify_giv_expr (loop
,
5829 return gen_rtx_USE (mode
, gen_rtx_MULT (mode
, arg0
, arg1
));
5832 /* (a * invar_1) * invar_2. Associate. */
5833 return simplify_giv_expr (loop
,
5842 /* (a + invar_1) * invar_2. Distribute. */
5843 return simplify_giv_expr (loop
,
5858 /* Shift by constant is multiply by power of two. */
5859 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5863 simplify_giv_expr (loop
,
5866 GEN_INT ((HOST_WIDE_INT
) 1
5867 << INTVAL (XEXP (x
, 1)))),
5871 /* "-a" is "a * (-1)" */
5872 return simplify_giv_expr (loop
,
5873 gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
5877 /* "~a" is "-a - 1". Silly, but easy. */
5878 return simplify_giv_expr (loop
,
5879 gen_rtx_MINUS (mode
,
5880 gen_rtx_NEG (mode
, XEXP (x
, 0)),
5885 /* Already in proper form for invariant. */
5891 /* Conditionally recognize extensions of simple IVs. After we've
5892 computed loop traversal counts and verified the range of the
5893 source IV, we'll reevaluate this as a GIV. */
5894 if (*ext_val
== NULL_RTX
)
5896 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
5897 if (arg0
&& *ext_val
== NULL_RTX
&& GET_CODE (arg0
) == REG
)
5899 *ext_val
= gen_rtx_fmt_e (GET_CODE (x
), mode
, arg0
);
5906 /* If this is a new register, we can't deal with it. */
5907 if (REGNO (x
) >= max_reg_before_loop
)
5910 /* Check for biv or giv. */
5911 switch (REG_IV_TYPE (ivs
, REGNO (x
)))
5915 case GENERAL_INDUCT
:
5917 struct induction
*v
= REG_IV_INFO (ivs
, REGNO (x
));
5919 /* Form expression from giv and add benefit. Ensure this giv
5920 can derive another and subtract any needed adjustment if so. */
5922 /* Increasing the benefit here is risky. The only case in which it
5923 is arguably correct is if this is the only use of V. In other
5924 cases, this will artificially inflate the benefit of the current
5925 giv, and lead to suboptimal code. Thus, it is disabled, since
5926 potentially not reducing an only marginally beneficial giv is
5927 less harmful than reducing many givs that are not really
5930 rtx single_use
= regs
->array
[REGNO (x
)].single_usage
;
5931 if (single_use
&& single_use
!= const0_rtx
)
5932 *benefit
+= v
->benefit
;
5938 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
,
5939 v
->src_reg
, v
->mult_val
),
5942 if (v
->derive_adjustment
)
5943 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
5944 arg0
= simplify_giv_expr (loop
, tem
, ext_val
, benefit
);
5947 if (!v
->ext_dependant
)
5952 *ext_val
= v
->ext_dependant
;
5960 /* If it isn't an induction variable, and it is invariant, we
5961 may be able to simplify things further by looking through
5962 the bits we just moved outside the loop. */
5963 if (loop_invariant_p (loop
, x
) == 1)
5966 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
5968 for (m
= movables
->head
; m
; m
= m
->next
)
5969 if (rtx_equal_p (x
, m
->set_dest
))
5971 /* Ok, we found a match. Substitute and simplify. */
5973 /* If we match another movable, we must use that, as
5974 this one is going away. */
5976 return simplify_giv_expr (loop
, m
->match
->set_dest
,
5979 /* If consec is non-zero, this is a member of a group of
5980 instructions that were moved together. We handle this
5981 case only to the point of seeking to the last insn and
5982 looking for a REG_EQUAL. Fail if we don't find one. */
5989 tem
= NEXT_INSN (tem
);
5993 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
5995 tem
= XEXP (tem
, 0);
5999 tem
= single_set (m
->insn
);
6001 tem
= SET_SRC (tem
);
6006 /* What we are most interested in is pointer
6007 arithmetic on invariants -- only take
6008 patterns we may be able to do something with. */
6009 if (GET_CODE (tem
) == PLUS
6010 || GET_CODE (tem
) == MULT
6011 || GET_CODE (tem
) == ASHIFT
6012 || GET_CODE (tem
) == CONST_INT
6013 || GET_CODE (tem
) == SYMBOL_REF
)
6015 tem
= simplify_giv_expr (loop
, tem
, ext_val
,
6020 else if (GET_CODE (tem
) == CONST
6021 && GET_CODE (XEXP (tem
, 0)) == PLUS
6022 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
6023 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
6025 tem
= simplify_giv_expr (loop
, XEXP (tem
, 0),
6037 /* Fall through to general case. */
6039 /* If invariant, return as USE (unless CONST_INT).
6040 Otherwise, not giv. */
6041 if (GET_CODE (x
) == USE
)
6044 if (loop_invariant_p (loop
, x
) == 1)
6046 if (GET_CODE (x
) == CONST_INT
)
6048 if (GET_CODE (x
) == CONST
6049 && GET_CODE (XEXP (x
, 0)) == PLUS
6050 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
6051 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
6053 return gen_rtx_USE (mode
, x
);
6060 /* This routine folds invariants such that there is only ever one
6061 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6064 sge_plus_constant (x
, c
)
6067 if (GET_CODE (x
) == CONST_INT
)
6068 return GEN_INT (INTVAL (x
) + INTVAL (c
));
6069 else if (GET_CODE (x
) != PLUS
)
6070 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
6071 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
6073 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
6074 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
6076 else if (GET_CODE (XEXP (x
, 0)) == PLUS
6077 || GET_CODE (XEXP (x
, 1)) != PLUS
)
6079 return gen_rtx_PLUS (GET_MODE (x
),
6080 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
6084 return gen_rtx_PLUS (GET_MODE (x
),
6085 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
6090 sge_plus (mode
, x
, y
)
6091 enum machine_mode mode
;
6094 while (GET_CODE (y
) == PLUS
)
6096 rtx a
= XEXP (y
, 0);
6097 if (GET_CODE (a
) == CONST_INT
)
6098 x
= sge_plus_constant (x
, a
);
6100 x
= gen_rtx_PLUS (mode
, x
, a
);
6103 if (GET_CODE (y
) == CONST_INT
)
6104 x
= sge_plus_constant (x
, y
);
6106 x
= gen_rtx_PLUS (mode
, x
, y
);
6110 /* Help detect a giv that is calculated by several consecutive insns;
6114 The caller has already identified the first insn P as having a giv as dest;
6115 we check that all other insns that set the same register follow
6116 immediately after P, that they alter nothing else,
6117 and that the result of the last is still a giv.
6119 The value is 0 if the reg set in P is not really a giv.
6120 Otherwise, the value is the amount gained by eliminating
6121 all the consecutive insns that compute the value.
6123 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6124 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6126 The coefficients of the ultimate giv value are stored in
6127 *MULT_VAL and *ADD_VAL. */
6130 consec_sets_giv (loop
, first_benefit
, p
, src_reg
, dest_reg
,
6131 add_val
, mult_val
, ext_val
, last_consec_insn
)
6132 const struct loop
*loop
;
6140 rtx
*last_consec_insn
;
6142 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6143 struct loop_regs
*regs
= LOOP_REGS (loop
);
6150 /* Indicate that this is a giv so that we can update the value produced in
6151 each insn of the multi-insn sequence.
6153 This induction structure will be used only by the call to
6154 general_induction_var below, so we can allocate it on our stack.
6155 If this is a giv, our caller will replace the induct var entry with
6156 a new induction structure. */
6157 struct induction
*v
;
6159 if (REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != UNKNOWN_INDUCT
)
6162 v
= (struct induction
*) alloca (sizeof (struct induction
));
6163 v
->src_reg
= src_reg
;
6164 v
->mult_val
= *mult_val
;
6165 v
->add_val
= *add_val
;
6166 v
->benefit
= first_benefit
;
6168 v
->derive_adjustment
= 0;
6169 v
->ext_dependant
= NULL_RTX
;
6171 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
6172 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
6174 count
= regs
->array
[REGNO (dest_reg
)].n_times_set
- 1;
6179 code
= GET_CODE (p
);
6181 /* If libcall, skip to end of call sequence. */
6182 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
6186 && (set
= single_set (p
))
6187 && GET_CODE (SET_DEST (set
)) == REG
6188 && SET_DEST (set
) == dest_reg
6189 && (general_induction_var (loop
, SET_SRC (set
), &src_reg
,
6190 add_val
, mult_val
, ext_val
, 0,
6192 /* Giv created by equivalent expression. */
6193 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
6194 && general_induction_var (loop
, XEXP (temp
, 0), &src_reg
,
6195 add_val
, mult_val
, ext_val
, 0,
6196 &benefit
, VOIDmode
)))
6197 && src_reg
== v
->src_reg
)
6199 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
6200 benefit
+= libcall_benefit (p
);
6203 v
->mult_val
= *mult_val
;
6204 v
->add_val
= *add_val
;
6205 v
->benefit
+= benefit
;
6207 else if (code
!= NOTE
)
6209 /* Allow insns that set something other than this giv to a
6210 constant. Such insns are needed on machines which cannot
6211 include long constants and should not disqualify a giv. */
6213 && (set
= single_set (p
))
6214 && SET_DEST (set
) != dest_reg
6215 && CONSTANT_P (SET_SRC (set
)))
6218 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
6223 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
6224 *last_consec_insn
= p
;
6228 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6229 represented by G1. If no such expression can be found, or it is clear that
6230 it cannot possibly be a valid address, 0 is returned.
6232 To perform the computation, we note that
6235 where `v' is the biv.
6237 So G2 = (y/b) * G1 + (b - a*y/x).
6239 Note that MULT = y/x.
6241 Update: A and B are now allowed to be additive expressions such that
6242 B contains all variables in A. That is, computing B-A will not require
6243 subtracting variables. */
6246 express_from_1 (a
, b
, mult
)
6249 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6251 if (mult
== const0_rtx
)
6254 /* If MULT is not 1, we cannot handle A with non-constants, since we
6255 would then be required to subtract multiples of the registers in A.
6256 This is theoretically possible, and may even apply to some Fortran
6257 constructs, but it is a lot of work and we do not attempt it here. */
6259 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
6262 /* In general these structures are sorted top to bottom (down the PLUS
6263 chain), but not left to right across the PLUS. If B is a higher
6264 order giv than A, we can strip one level and recurse. If A is higher
6265 order, we'll eventually bail out, but won't know that until the end.
6266 If they are the same, we'll strip one level around this loop. */
6268 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
6270 rtx ra
, rb
, oa
, ob
, tmp
;
6272 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6273 if (GET_CODE (ra
) == PLUS
)
6274 tmp
= ra
, ra
= oa
, oa
= tmp
;
6276 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
6277 if (GET_CODE (rb
) == PLUS
)
6278 tmp
= rb
, rb
= ob
, ob
= tmp
;
6280 if (rtx_equal_p (ra
, rb
))
6281 /* We matched: remove one reg completely. */
6283 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
6284 /* An alternate match. */
6286 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
6287 /* An alternate match. */
6291 /* Indicates an extra register in B. Strip one level from B and
6292 recurse, hoping B was the higher order expression. */
6293 ob
= express_from_1 (a
, ob
, mult
);
6296 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
6300 /* Here we are at the last level of A, go through the cases hoping to
6301 get rid of everything but a constant. */
6303 if (GET_CODE (a
) == PLUS
)
6307 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6308 if (rtx_equal_p (oa
, b
))
6310 else if (!rtx_equal_p (ra
, b
))
6313 if (GET_CODE (oa
) != CONST_INT
)
6316 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
6318 else if (GET_CODE (a
) == CONST_INT
)
6320 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
6322 else if (CONSTANT_P (a
))
6324 return simplify_gen_binary (MINUS
, GET_MODE (b
) != VOIDmode
? GET_MODE (b
) : GET_MODE (a
), const0_rtx
, a
);
6326 else if (GET_CODE (b
) == PLUS
)
6328 if (rtx_equal_p (a
, XEXP (b
, 0)))
6330 else if (rtx_equal_p (a
, XEXP (b
, 1)))
6335 else if (rtx_equal_p (a
, b
))
6342 express_from (g1
, g2
)
6343 struct induction
*g1
, *g2
;
6347 /* The value that G1 will be multiplied by must be a constant integer. Also,
6348 the only chance we have of getting a valid address is if b*c/a (see above
6349 for notation) is also an integer. */
6350 if (GET_CODE (g1
->mult_val
) == CONST_INT
6351 && GET_CODE (g2
->mult_val
) == CONST_INT
)
6353 if (g1
->mult_val
== const0_rtx
6354 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
6356 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
6358 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
6362 /* ??? Find out if the one is a multiple of the other? */
6366 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
6367 if (add
== NULL_RTX
)
6369 /* Failed. If we've got a multiplication factor between G1 and G2,
6370 scale G1's addend and try again. */
6371 if (INTVAL (mult
) > 1)
6373 rtx g1_add_val
= g1
->add_val
;
6374 if (GET_CODE (g1_add_val
) == MULT
6375 && GET_CODE (XEXP (g1_add_val
, 1)) == CONST_INT
)
6378 m
= INTVAL (mult
) * INTVAL (XEXP (g1_add_val
, 1));
6379 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
),
6380 XEXP (g1_add_val
, 0), GEN_INT (m
));
6384 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
), g1_add_val
,
6388 add
= express_from_1 (g1_add_val
, g2
->add_val
, const1_rtx
);
6391 if (add
== NULL_RTX
)
6394 /* Form simplified final result. */
6395 if (mult
== const0_rtx
)
6397 else if (mult
== const1_rtx
)
6398 mult
= g1
->dest_reg
;
6400 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
6402 if (add
== const0_rtx
)
6406 if (GET_CODE (add
) == PLUS
6407 && CONSTANT_P (XEXP (add
, 1)))
6409 rtx tem
= XEXP (add
, 1);
6410 mult
= gen_rtx_PLUS (g2
->mode
, mult
, XEXP (add
, 0));
6414 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
6418 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6419 represented by G1. This indicates that G2 should be combined with G1 and
6420 that G2 can use (either directly or via an address expression) a register
6421 used to represent G1. */
6424 combine_givs_p (g1
, g2
)
6425 struct induction
*g1
, *g2
;
6429 /* With the introduction of ext dependant givs, we must care for modes.
6430 G2 must not use a wider mode than G1. */
6431 if (GET_MODE_SIZE (g1
->mode
) < GET_MODE_SIZE (g2
->mode
))
6434 ret
= comb
= express_from (g1
, g2
);
6435 if (comb
== NULL_RTX
)
6437 if (g1
->mode
!= g2
->mode
)
6438 ret
= gen_lowpart (g2
->mode
, comb
);
6440 /* If these givs are identical, they can be combined. We use the results
6441 of express_from because the addends are not in a canonical form, so
6442 rtx_equal_p is a weaker test. */
6443 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
6444 combination to be the other way round. */
6445 if (comb
== g1
->dest_reg
6446 && (g1
->giv_type
== DEST_REG
|| g2
->giv_type
== DEST_ADDR
))
6451 /* If G2 can be expressed as a function of G1 and that function is valid
6452 as an address and no more expensive than using a register for G2,
6453 the expression of G2 in terms of G1 can be used. */
6455 && g2
->giv_type
== DEST_ADDR
6456 && memory_address_p (GET_MODE (g2
->mem
), ret
)
6457 /* ??? Looses, especially with -fforce-addr, where *g2->location
6458 will always be a register, and so anything more complicated
6462 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
)
6464 && rtx_cost (tem
, MEM
) <= rtx_cost (*g2
->location
, MEM
)
6475 /* Check each extension dependant giv in this class to see if its
6476 root biv is safe from wrapping in the interior mode, which would
6477 make the giv illegal. */
6480 check_ext_dependant_givs (bl
, loop_info
)
6481 struct iv_class
*bl
;
6482 struct loop_info
*loop_info
;
6484 int ze_ok
= 0, se_ok
= 0, info_ok
= 0;
6485 enum machine_mode biv_mode
= GET_MODE (bl
->biv
->src_reg
);
6486 HOST_WIDE_INT start_val
;
6487 unsigned HOST_WIDE_INT u_end_val
= 0;
6488 unsigned HOST_WIDE_INT u_start_val
= 0;
6490 struct induction
*v
;
6492 /* Make sure the iteration data is available. We must have
6493 constants in order to be certain of no overflow. */
6494 /* ??? An unknown iteration count with an increment of +-1
6495 combined with friendly exit tests of against an invariant
6496 value is also ameanable to optimization. Not implemented. */
6497 if (loop_info
->n_iterations
> 0
6498 && bl
->initial_value
6499 && GET_CODE (bl
->initial_value
) == CONST_INT
6500 && (incr
= biv_total_increment (bl
))
6501 && GET_CODE (incr
) == CONST_INT
6502 /* Make sure the host can represent the arithmetic. */
6503 && HOST_BITS_PER_WIDE_INT
>= GET_MODE_BITSIZE (biv_mode
))
6505 unsigned HOST_WIDE_INT abs_incr
, total_incr
;
6506 HOST_WIDE_INT s_end_val
;
6510 start_val
= INTVAL (bl
->initial_value
);
6511 u_start_val
= start_val
;
6513 neg_incr
= 0, abs_incr
= INTVAL (incr
);
6514 if (INTVAL (incr
) < 0)
6515 neg_incr
= 1, abs_incr
= -abs_incr
;
6516 total_incr
= abs_incr
* loop_info
->n_iterations
;
6518 /* Check for host arithmatic overflow. */
6519 if (total_incr
/ loop_info
->n_iterations
== abs_incr
)
6521 unsigned HOST_WIDE_INT u_max
;
6522 HOST_WIDE_INT s_max
;
6524 u_end_val
= start_val
+ (neg_incr
? -total_incr
: total_incr
);
6525 s_end_val
= u_end_val
;
6526 u_max
= GET_MODE_MASK (biv_mode
);
6529 /* Check zero extension of biv ok. */
6531 /* Check for host arithmatic overflow. */
6533 ? u_end_val
< u_start_val
6534 : u_end_val
> u_start_val
)
6535 /* Check for target arithmetic overflow. */
6537 ? 1 /* taken care of with host overflow */
6538 : u_end_val
<= u_max
))
6543 /* Check sign extension of biv ok. */
6544 /* ??? While it is true that overflow with signed and pointer
6545 arithmetic is undefined, I fear too many programmers don't
6546 keep this fact in mind -- myself included on occasion.
6547 So leave alone with the signed overflow optimizations. */
6548 if (start_val
>= -s_max
- 1
6549 /* Check for host arithmatic overflow. */
6551 ? s_end_val
< start_val
6552 : s_end_val
> start_val
)
6553 /* Check for target arithmetic overflow. */
6555 ? s_end_val
>= -s_max
- 1
6556 : s_end_val
<= s_max
))
6563 /* Invalidate givs that fail the tests. */
6564 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6565 if (v
->ext_dependant
)
6567 enum rtx_code code
= GET_CODE (v
->ext_dependant
);
6580 /* We don't know whether this value is being used as either
6581 signed or unsigned, so to safely truncate we must satisfy
6582 both. The initial check here verifies the BIV itself;
6583 once that is successful we may check its range wrt the
6587 enum machine_mode outer_mode
= GET_MODE (v
->ext_dependant
);
6588 unsigned HOST_WIDE_INT max
= GET_MODE_MASK (outer_mode
) >> 1;
6590 /* We know from the above that both endpoints are nonnegative,
6591 and that there is no wrapping. Verify that both endpoints
6592 are within the (signed) range of the outer mode. */
6593 if (u_start_val
<= max
&& u_end_val
<= max
)
6604 if (loop_dump_stream
)
6606 fprintf (loop_dump_stream
,
6607 "Verified ext dependant giv at %d of reg %d\n",
6608 INSN_UID (v
->insn
), bl
->regno
);
6613 if (loop_dump_stream
)
6618 why
= "biv iteration values overflowed";
6622 incr
= biv_total_increment (bl
);
6623 if (incr
== const1_rtx
)
6624 why
= "biv iteration info incomplete; incr by 1";
6626 why
= "biv iteration info incomplete";
6629 fprintf (loop_dump_stream
,
6630 "Failed ext dependant giv at %d, %s\n",
6631 INSN_UID (v
->insn
), why
);
6638 /* Generate a version of VALUE in a mode appropriate for initializing V. */
6641 extend_value_for_giv (v
, value
)
6642 struct induction
*v
;
6645 rtx ext_dep
= v
->ext_dependant
;
6650 /* Recall that check_ext_dependant_givs verified that the known bounds
6651 of a biv did not overflow or wrap with respect to the extension for
6652 the giv. Therefore, constants need no additional adjustment. */
6653 if (CONSTANT_P (value
) && GET_MODE (value
) == VOIDmode
)
6656 /* Otherwise, we must adjust the value to compensate for the
6657 differing modes of the biv and the giv. */
6658 return gen_rtx_fmt_e (GET_CODE (ext_dep
), GET_MODE (ext_dep
), value
);
6661 struct combine_givs_stats
6668 cmp_combine_givs_stats (xp
, yp
)
6672 const struct combine_givs_stats
* const x
=
6673 (const struct combine_givs_stats
*) xp
;
6674 const struct combine_givs_stats
* const y
=
6675 (const struct combine_givs_stats
*) yp
;
6677 d
= y
->total_benefit
- x
->total_benefit
;
6678 /* Stabilize the sort. */
6680 d
= x
->giv_number
- y
->giv_number
;
6684 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6685 any other. If so, point SAME to the giv combined with and set NEW_REG to
6686 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6687 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6690 combine_givs (regs
, bl
)
6691 struct loop_regs
*regs
;
6692 struct iv_class
*bl
;
6694 /* Additional benefit to add for being combined multiple times. */
6695 const int extra_benefit
= 3;
6697 struct induction
*g1
, *g2
, **giv_array
;
6698 int i
, j
, k
, giv_count
;
6699 struct combine_givs_stats
*stats
;
6702 /* Count givs, because bl->giv_count is incorrect here. */
6704 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
6709 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
6711 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
6713 giv_array
[i
++] = g1
;
6715 stats
= (struct combine_givs_stats
*) xcalloc (giv_count
, sizeof (*stats
));
6716 can_combine
= (rtx
*) xcalloc (giv_count
, giv_count
* sizeof (rtx
));
6718 for (i
= 0; i
< giv_count
; i
++)
6724 stats
[i
].giv_number
= i
;
6726 /* If a DEST_REG GIV is used only once, do not allow it to combine
6727 with anything, for in doing so we will gain nothing that cannot
6728 be had by simply letting the GIV with which we would have combined
6729 to be reduced on its own. The losage shows up in particular with
6730 DEST_ADDR targets on hosts with reg+reg addressing, though it can
6731 be seen elsewhere as well. */
6732 if (g1
->giv_type
== DEST_REG
6733 && (single_use
= regs
->array
[REGNO (g1
->dest_reg
)].single_usage
)
6734 && single_use
!= const0_rtx
)
6737 this_benefit
= g1
->benefit
;
6738 /* Add an additional weight for zero addends. */
6739 if (g1
->no_const_addval
)
6742 for (j
= 0; j
< giv_count
; j
++)
6748 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
6750 can_combine
[i
* giv_count
+ j
] = this_combine
;
6751 this_benefit
+= g2
->benefit
+ extra_benefit
;
6754 stats
[i
].total_benefit
= this_benefit
;
6757 /* Iterate, combining until we can't. */
6759 qsort (stats
, giv_count
, sizeof (*stats
), cmp_combine_givs_stats
);
6761 if (loop_dump_stream
)
6763 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
6764 for (k
= 0; k
< giv_count
; k
++)
6766 g1
= giv_array
[stats
[k
].giv_number
];
6767 if (!g1
->combined_with
&& !g1
->same
)
6768 fprintf (loop_dump_stream
, " {%d, %d}",
6769 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
6770 stats
[k
].total_benefit
);
6772 putc ('\n', loop_dump_stream
);
6775 for (k
= 0; k
< giv_count
; k
++)
6777 int g1_add_benefit
= 0;
6779 i
= stats
[k
].giv_number
;
6782 /* If it has already been combined, skip. */
6783 if (g1
->combined_with
|| g1
->same
)
6786 for (j
= 0; j
< giv_count
; j
++)
6789 if (g1
!= g2
&& can_combine
[i
* giv_count
+ j
]
6790 /* If it has already been combined, skip. */
6791 && ! g2
->same
&& ! g2
->combined_with
)
6795 g2
->new_reg
= can_combine
[i
* giv_count
+ j
];
6797 g1
->combined_with
++;
6798 g1
->lifetime
+= g2
->lifetime
;
6800 g1_add_benefit
+= g2
->benefit
;
6802 /* ??? The new final_[bg]iv_value code does a much better job
6803 of finding replaceable giv's, and hence this code may no
6804 longer be necessary. */
6805 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
6806 g1_add_benefit
-= copy_cost
;
6808 /* To help optimize the next set of combinations, remove
6809 this giv from the benefits of other potential mates. */
6810 for (l
= 0; l
< giv_count
; ++l
)
6812 int m
= stats
[l
].giv_number
;
6813 if (can_combine
[m
* giv_count
+ j
])
6814 stats
[l
].total_benefit
-= g2
->benefit
+ extra_benefit
;
6817 if (loop_dump_stream
)
6818 fprintf (loop_dump_stream
,
6819 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
6820 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
),
6821 g1
->benefit
, g1_add_benefit
, g1
->lifetime
);
6825 /* To help optimize the next set of combinations, remove
6826 this giv from the benefits of other potential mates. */
6827 if (g1
->combined_with
)
6829 for (j
= 0; j
< giv_count
; ++j
)
6831 int m
= stats
[j
].giv_number
;
6832 if (can_combine
[m
* giv_count
+ i
])
6833 stats
[j
].total_benefit
-= g1
->benefit
+ extra_benefit
;
6836 g1
->benefit
+= g1_add_benefit
;
6838 /* We've finished with this giv, and everything it touched.
6839 Restart the combination so that proper weights for the
6840 rest of the givs are properly taken into account. */
6841 /* ??? Ideally we would compact the arrays at this point, so
6842 as to not cover old ground. But sanely compacting
6843 can_combine is tricky. */
6853 /* Generate sequence for REG = B * M + A. */
6856 gen_add_mult (b
, m
, a
, reg
)
6857 rtx b
; /* initial value of basic induction variable */
6858 rtx m
; /* multiplicative constant */
6859 rtx a
; /* additive constant */
6860 rtx reg
; /* destination register */
6866 /* Use unsigned arithmetic. */
6867 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
6869 emit_move_insn (reg
, result
);
6870 seq
= gen_sequence ();
6877 /* Update registers created in insn sequence SEQ. */
6880 loop_regs_update (loop
, seq
)
6881 const struct loop
*loop ATTRIBUTE_UNUSED
;
6884 /* Update register info for alias analysis. */
6886 if (GET_CODE (seq
) == SEQUENCE
)
6889 for (i
= 0; i
< XVECLEN (seq
, 0); ++i
)
6891 rtx set
= single_set (XVECEXP (seq
, 0, i
));
6892 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
6893 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
6898 rtx set
= single_set (seq
);
6899 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
6900 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
6905 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
6908 loop_iv_add_mult_emit_before (loop
, b
, m
, a
, reg
, before_bb
, before_insn
)
6909 const struct loop
*loop
;
6910 rtx b
; /* initial value of basic induction variable */
6911 rtx m
; /* multiplicative constant */
6912 rtx a
; /* additive constant */
6913 rtx reg
; /* destination register */
6914 basic_block before_bb
;
6921 loop_iv_add_mult_hoist (loop
, b
, m
, a
, reg
);
6925 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
6926 seq
= gen_add_mult (copy_rtx (b
), m
, copy_rtx (a
), reg
);
6928 /* Increase the lifetime of any invariants moved further in code. */
6929 update_reg_last_use (a
, before_insn
);
6930 update_reg_last_use (b
, before_insn
);
6931 update_reg_last_use (m
, before_insn
);
6933 loop_insn_emit_before (loop
, before_bb
, before_insn
, seq
);
6935 /* It is possible that the expansion created lots of new registers.
6936 Iterate over the sequence we just created and record them all. */
6937 loop_regs_update (loop
, seq
);
6941 /* Emit insns in loop pre-header to set REG = B * M + A. */
6944 loop_iv_add_mult_sink (loop
, b
, m
, a
, reg
)
6945 const struct loop
*loop
;
6946 rtx b
; /* initial value of basic induction variable */
6947 rtx m
; /* multiplicative constant */
6948 rtx a
; /* additive constant */
6949 rtx reg
; /* destination register */
6953 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
6954 seq
= gen_add_mult (copy_rtx (b
), m
, copy_rtx (a
), reg
);
6956 /* Increase the lifetime of any invariants moved further in code.
6957 ???? Is this really necessary? */
6958 update_reg_last_use (a
, loop
->sink
);
6959 update_reg_last_use (b
, loop
->sink
);
6960 update_reg_last_use (m
, loop
->sink
);
6962 loop_insn_sink (loop
, seq
);
6964 /* It is possible that the expansion created lots of new registers.
6965 Iterate over the sequence we just created and record them all. */
6966 loop_regs_update (loop
, seq
);
6970 /* Emit insns after loop to set REG = B * M + A. */
6973 loop_iv_add_mult_hoist (loop
, b
, m
, a
, reg
)
6974 const struct loop
*loop
;
6975 rtx b
; /* initial value of basic induction variable */
6976 rtx m
; /* multiplicative constant */
6977 rtx a
; /* additive constant */
6978 rtx reg
; /* destination register */
6982 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
6983 seq
= gen_add_mult (copy_rtx (b
), m
, copy_rtx (a
), reg
);
6985 loop_insn_hoist (loop
, seq
);
6987 /* It is possible that the expansion created lots of new registers.
6988 Iterate over the sequence we just created and record them all. */
6989 loop_regs_update (loop
, seq
);
6994 /* Similar to gen_add_mult, but compute cost rather than generating
6998 iv_add_mult_cost (b
, m
, a
, reg
)
6999 rtx b
; /* initial value of basic induction variable */
7000 rtx m
; /* multiplicative constant */
7001 rtx a
; /* additive constant */
7002 rtx reg
; /* destination register */
7008 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
7010 emit_move_insn (reg
, result
);
7011 last
= get_last_insn ();
7014 rtx t
= single_set (last
);
7016 cost
+= rtx_cost (SET_SRC (t
), SET
);
7017 last
= PREV_INSN (last
);
7023 /* Test whether A * B can be computed without
7024 an actual multiply insn. Value is 1 if so. */
7027 product_cheap_p (a
, b
)
7035 /* If only one is constant, make it B. */
7036 if (GET_CODE (a
) == CONST_INT
)
7037 tmp
= a
, a
= b
, b
= tmp
;
7039 /* If first constant, both constant, so don't need multiply. */
7040 if (GET_CODE (a
) == CONST_INT
)
7043 /* If second not constant, neither is constant, so would need multiply. */
7044 if (GET_CODE (b
) != CONST_INT
)
7047 /* One operand is constant, so might not need multiply insn. Generate the
7048 code for the multiply and see if a call or multiply, or long sequence
7049 of insns is generated. */
7052 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 1);
7053 tmp
= gen_sequence ();
7056 if (GET_CODE (tmp
) == SEQUENCE
)
7058 if (XVEC (tmp
, 0) == 0)
7060 else if (XVECLEN (tmp
, 0) > 3)
7063 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
7065 rtx insn
= XVECEXP (tmp
, 0, i
);
7067 if (GET_CODE (insn
) != INSN
7068 || (GET_CODE (PATTERN (insn
)) == SET
7069 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
7070 || (GET_CODE (PATTERN (insn
)) == PARALLEL
7071 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
7072 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
7079 else if (GET_CODE (tmp
) == SET
7080 && GET_CODE (SET_SRC (tmp
)) == MULT
)
7082 else if (GET_CODE (tmp
) == PARALLEL
7083 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
7084 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
7090 /* Check to see if loop can be terminated by a "decrement and branch until
7091 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7092 Also try reversing an increment loop to a decrement loop
7093 to see if the optimization can be performed.
7094 Value is nonzero if optimization was performed. */
7096 /* This is useful even if the architecture doesn't have such an insn,
7097 because it might change a loops which increments from 0 to n to a loop
7098 which decrements from n to 0. A loop that decrements to zero is usually
7099 faster than one that increments from zero. */
7101 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7102 such as approx_final_value, biv_total_increment, loop_iterations, and
7103 final_[bg]iv_value. */
7106 check_dbra_loop (loop
, insn_count
)
7110 struct loop_info
*loop_info
= LOOP_INFO (loop
);
7111 struct loop_regs
*regs
= LOOP_REGS (loop
);
7112 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
7113 struct iv_class
*bl
;
7120 rtx before_comparison
;
7124 int compare_and_branch
;
7125 rtx loop_start
= loop
->start
;
7126 rtx loop_end
= loop
->end
;
7128 /* If last insn is a conditional branch, and the insn before tests a
7129 register value, try to optimize it. Otherwise, we can't do anything. */
7131 jump
= PREV_INSN (loop_end
);
7132 comparison
= get_condition_for_loop (loop
, jump
);
7133 if (comparison
== 0)
7135 if (!onlyjump_p (jump
))
7138 /* Try to compute whether the compare/branch at the loop end is one or
7139 two instructions. */
7140 get_condition (jump
, &first_compare
);
7141 if (first_compare
== jump
)
7142 compare_and_branch
= 1;
7143 else if (first_compare
== prev_nonnote_insn (jump
))
7144 compare_and_branch
= 2;
7149 /* If more than one condition is present to control the loop, then
7150 do not proceed, as this function does not know how to rewrite
7151 loop tests with more than one condition.
7153 Look backwards from the first insn in the last comparison
7154 sequence and see if we've got another comparison sequence. */
7157 if ((jump1
= prev_nonnote_insn (first_compare
)) != loop
->cont
)
7158 if (GET_CODE (jump1
) == JUMP_INSN
)
7162 /* Check all of the bivs to see if the compare uses one of them.
7163 Skip biv's set more than once because we can't guarantee that
7164 it will be zero on the last iteration. Also skip if the biv is
7165 used between its update and the test insn. */
7167 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
7169 if (bl
->biv_count
== 1
7170 && ! bl
->biv
->maybe_multiple
7171 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
7172 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
7180 /* Look for the case where the basic induction variable is always
7181 nonnegative, and equals zero on the last iteration.
7182 In this case, add a reg_note REG_NONNEG, which allows the
7183 m68k DBRA instruction to be used. */
7185 if (((GET_CODE (comparison
) == GT
7186 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
7187 && INTVAL (XEXP (comparison
, 1)) == -1)
7188 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
7189 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
7190 && INTVAL (bl
->biv
->add_val
) < 0)
7192 /* Initial value must be greater than 0,
7193 init_val % -dec_value == 0 to ensure that it equals zero on
7194 the last iteration */
7196 if (GET_CODE (bl
->initial_value
) == CONST_INT
7197 && INTVAL (bl
->initial_value
) > 0
7198 && (INTVAL (bl
->initial_value
)
7199 % (-INTVAL (bl
->biv
->add_val
))) == 0)
7201 /* register always nonnegative, add REG_NOTE to branch */
7202 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
7204 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
7211 /* If the decrement is 1 and the value was tested as >= 0 before
7212 the loop, then we can safely optimize. */
7213 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
7215 if (GET_CODE (p
) == CODE_LABEL
)
7217 if (GET_CODE (p
) != JUMP_INSN
)
7220 before_comparison
= get_condition_for_loop (loop
, p
);
7221 if (before_comparison
7222 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
7223 && GET_CODE (before_comparison
) == LT
7224 && XEXP (before_comparison
, 1) == const0_rtx
7225 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
7226 && INTVAL (bl
->biv
->add_val
) == -1)
7228 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
7230 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
7238 else if (GET_CODE (bl
->biv
->add_val
) == CONST_INT
7239 && INTVAL (bl
->biv
->add_val
) > 0)
7241 /* Try to change inc to dec, so can apply above optimization. */
7243 all registers modified are induction variables or invariant,
7244 all memory references have non-overlapping addresses
7245 (obviously true if only one write)
7246 allow 2 insns for the compare/jump at the end of the loop. */
7247 /* Also, we must avoid any instructions which use both the reversed
7248 biv and another biv. Such instructions will fail if the loop is
7249 reversed. We meet this condition by requiring that either
7250 no_use_except_counting is true, or else that there is only
7252 int num_nonfixed_reads
= 0;
7253 /* 1 if the iteration var is used only to count iterations. */
7254 int no_use_except_counting
= 0;
7255 /* 1 if the loop has no memory store, or it has a single memory store
7256 which is reversible. */
7257 int reversible_mem_store
= 1;
7259 if (bl
->giv_count
== 0 && ! loop
->exit_count
)
7261 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
7262 struct iv_class
*blt
;
7264 /* If there are no givs for this biv, and the only exit is the
7265 fall through at the end of the loop, then
7266 see if perhaps there are no uses except to count. */
7267 no_use_except_counting
= 1;
7268 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
7271 rtx set
= single_set (p
);
7273 if (set
&& GET_CODE (SET_DEST (set
)) == REG
7274 && REGNO (SET_DEST (set
)) == bl
->regno
)
7275 /* An insn that sets the biv is okay. */
7277 else if ((p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
7278 || p
== prev_nonnote_insn (loop_end
))
7279 && reg_mentioned_p (bivreg
, PATTERN (p
)))
7281 /* If either of these insns uses the biv and sets a pseudo
7282 that has more than one usage, then the biv has uses
7283 other than counting since it's used to derive a value
7284 that is used more than one time. */
7285 note_stores (PATTERN (p
), note_set_pseudo_multiple_uses
,
7287 if (regs
->multiple_uses
)
7289 no_use_except_counting
= 0;
7293 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
7295 no_use_except_counting
= 0;
7300 /* A biv has uses besides counting if it is used to set another biv. */
7301 for (blt
= ivs
->list
; blt
; blt
= blt
->next
)
7302 if (blt
->init_set
&& reg_mentioned_p (bivreg
, SET_SRC (blt
->init_set
)))
7304 no_use_except_counting
= 0;
7309 if (no_use_except_counting
)
7310 /* No need to worry about MEMs. */
7312 else if (loop_info
->num_mem_sets
<= 1)
7314 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
7316 num_nonfixed_reads
+= count_nonfixed_reads (loop
, PATTERN (p
));
7318 /* If the loop has a single store, and the destination address is
7319 invariant, then we can't reverse the loop, because this address
7320 might then have the wrong value at loop exit.
7321 This would work if the source was invariant also, however, in that
7322 case, the insn should have been moved out of the loop. */
7324 if (loop_info
->num_mem_sets
== 1)
7326 struct induction
*v
;
7328 reversible_mem_store
7329 = (! loop_info
->unknown_address_altered
7330 && ! loop_info
->unknown_constant_address_altered
7331 && ! loop_invariant_p (loop
,
7332 XEXP (XEXP (loop_info
->store_mems
, 0),
7335 /* If the store depends on a register that is set after the
7336 store, it depends on the initial value, and is thus not
7338 for (v
= bl
->giv
; reversible_mem_store
&& v
; v
= v
->next_iv
)
7340 if (v
->giv_type
== DEST_REG
7341 && reg_mentioned_p (v
->dest_reg
,
7342 PATTERN (loop_info
->first_loop_store_insn
))
7343 && loop_insn_first_p (loop_info
->first_loop_store_insn
,
7345 reversible_mem_store
= 0;
7352 /* This code only acts for innermost loops. Also it simplifies
7353 the memory address check by only reversing loops with
7354 zero or one memory access.
7355 Two memory accesses could involve parts of the same array,
7356 and that can't be reversed.
7357 If the biv is used only for counting, than we don't need to worry
7358 about all these things. */
7360 if ((num_nonfixed_reads
<= 1
7361 && ! loop_info
->has_nonconst_call
7362 && ! loop_info
->has_volatile
7363 && reversible_mem_store
7364 && (bl
->giv_count
+ bl
->biv_count
+ loop_info
->num_mem_sets
7365 + LOOP_MOVABLES (loop
)->num
+ compare_and_branch
== insn_count
)
7366 && (bl
== ivs
->list
&& bl
->next
== 0))
7367 || no_use_except_counting
)
7371 /* Loop can be reversed. */
7372 if (loop_dump_stream
)
7373 fprintf (loop_dump_stream
, "Can reverse loop\n");
7375 /* Now check other conditions:
7377 The increment must be a constant, as must the initial value,
7378 and the comparison code must be LT.
7380 This test can probably be improved since +/- 1 in the constant
7381 can be obtained by changing LT to LE and vice versa; this is
7385 /* for constants, LE gets turned into LT */
7386 && (GET_CODE (comparison
) == LT
7387 || (GET_CODE (comparison
) == LE
7388 && no_use_except_counting
)))
7390 HOST_WIDE_INT add_val
, add_adjust
, comparison_val
= 0;
7391 rtx initial_value
, comparison_value
;
7393 enum rtx_code cmp_code
;
7394 int comparison_const_width
;
7395 unsigned HOST_WIDE_INT comparison_sign_mask
;
7397 add_val
= INTVAL (bl
->biv
->add_val
);
7398 comparison_value
= XEXP (comparison
, 1);
7399 if (GET_MODE (comparison_value
) == VOIDmode
)
7400 comparison_const_width
7401 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison
, 0)));
7403 comparison_const_width
7404 = GET_MODE_BITSIZE (GET_MODE (comparison_value
));
7405 if (comparison_const_width
> HOST_BITS_PER_WIDE_INT
)
7406 comparison_const_width
= HOST_BITS_PER_WIDE_INT
;
7407 comparison_sign_mask
7408 = (unsigned HOST_WIDE_INT
) 1 << (comparison_const_width
- 1);
7410 /* If the comparison value is not a loop invariant, then we
7411 can not reverse this loop.
7413 ??? If the insns which initialize the comparison value as
7414 a whole compute an invariant result, then we could move
7415 them out of the loop and proceed with loop reversal. */
7416 if (! loop_invariant_p (loop
, comparison_value
))
7419 if (GET_CODE (comparison_value
) == CONST_INT
)
7420 comparison_val
= INTVAL (comparison_value
);
7421 initial_value
= bl
->initial_value
;
7423 /* Normalize the initial value if it is an integer and
7424 has no other use except as a counter. This will allow
7425 a few more loops to be reversed. */
7426 if (no_use_except_counting
7427 && GET_CODE (comparison_value
) == CONST_INT
7428 && GET_CODE (initial_value
) == CONST_INT
)
7430 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
7431 /* The code below requires comparison_val to be a multiple
7432 of add_val in order to do the loop reversal, so
7433 round up comparison_val to a multiple of add_val.
7434 Since comparison_value is constant, we know that the
7435 current comparison code is LT. */
7436 comparison_val
= comparison_val
+ add_val
- 1;
7438 -= (unsigned HOST_WIDE_INT
) comparison_val
% add_val
;
7439 /* We postpone overflow checks for COMPARISON_VAL here;
7440 even if there is an overflow, we might still be able to
7441 reverse the loop, if converting the loop exit test to
7443 initial_value
= const0_rtx
;
7446 /* First check if we can do a vanilla loop reversal. */
7447 if (initial_value
== const0_rtx
7448 /* If we have a decrement_and_branch_on_count,
7449 prefer the NE test, since this will allow that
7450 instruction to be generated. Note that we must
7451 use a vanilla loop reversal if the biv is used to
7452 calculate a giv or has a non-counting use. */
7453 #if ! defined (HAVE_decrement_and_branch_until_zero) \
7454 && defined (HAVE_decrement_and_branch_on_count)
7455 && (! (add_val
== 1 && loop
->vtop
7456 && (bl
->biv_count
== 0
7457 || no_use_except_counting
)))
7459 && GET_CODE (comparison_value
) == CONST_INT
7460 /* Now do postponed overflow checks on COMPARISON_VAL. */
7461 && ! (((comparison_val
- add_val
) ^ INTVAL (comparison_value
))
7462 & comparison_sign_mask
))
7464 /* Register will always be nonnegative, with value
7465 0 on last iteration */
7466 add_adjust
= add_val
;
7470 else if (add_val
== 1 && loop
->vtop
7471 && (bl
->biv_count
== 0
7472 || no_use_except_counting
))
7480 if (GET_CODE (comparison
) == LE
)
7481 add_adjust
-= add_val
;
7483 /* If the initial value is not zero, or if the comparison
7484 value is not an exact multiple of the increment, then we
7485 can not reverse this loop. */
7486 if (initial_value
== const0_rtx
7487 && GET_CODE (comparison_value
) == CONST_INT
)
7489 if (((unsigned HOST_WIDE_INT
) comparison_val
% add_val
) != 0)
7494 if (! no_use_except_counting
|| add_val
!= 1)
7498 final_value
= comparison_value
;
7500 /* Reset these in case we normalized the initial value
7501 and comparison value above. */
7502 if (GET_CODE (comparison_value
) == CONST_INT
7503 && GET_CODE (initial_value
) == CONST_INT
)
7505 comparison_value
= GEN_INT (comparison_val
);
7507 = GEN_INT (comparison_val
+ INTVAL (bl
->initial_value
));
7509 bl
->initial_value
= initial_value
;
7511 /* Save some info needed to produce the new insns. */
7512 reg
= bl
->biv
->dest_reg
;
7513 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
7514 if (jump_label
== pc_rtx
)
7515 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
7516 new_add_val
= GEN_INT (-INTVAL (bl
->biv
->add_val
));
7518 /* Set start_value; if this is not a CONST_INT, we need
7520 Initialize biv to start_value before loop start.
7521 The old initializing insn will be deleted as a
7522 dead store by flow.c. */
7523 if (initial_value
== const0_rtx
7524 && GET_CODE (comparison_value
) == CONST_INT
)
7526 start_value
= GEN_INT (comparison_val
- add_adjust
);
7527 loop_insn_hoist (loop
, gen_move_insn (reg
, start_value
));
7529 else if (GET_CODE (initial_value
) == CONST_INT
)
7531 rtx offset
= GEN_INT (-INTVAL (initial_value
) - add_adjust
);
7532 enum machine_mode mode
= GET_MODE (reg
);
7533 enum insn_code icode
7534 = add_optab
->handlers
[(int) mode
].insn_code
;
7536 if (! (*insn_data
[icode
].operand
[0].predicate
) (reg
, mode
)
7537 || ! ((*insn_data
[icode
].operand
[1].predicate
)
7538 (comparison_value
, mode
))
7539 || ! ((*insn_data
[icode
].operand
[2].predicate
)
7543 = gen_rtx_PLUS (mode
, comparison_value
, offset
);
7544 loop_insn_hoist (loop
, (GEN_FCN (icode
)
7545 (reg
, comparison_value
, offset
)));
7546 if (GET_CODE (comparison
) == LE
)
7547 final_value
= gen_rtx_PLUS (mode
, comparison_value
,
7550 else if (! add_adjust
)
7552 enum machine_mode mode
= GET_MODE (reg
);
7553 enum insn_code icode
7554 = sub_optab
->handlers
[(int) mode
].insn_code
;
7555 if (! (*insn_data
[icode
].operand
[0].predicate
) (reg
, mode
)
7556 || ! ((*insn_data
[icode
].operand
[1].predicate
)
7557 (comparison_value
, mode
))
7558 || ! ((*insn_data
[icode
].operand
[2].predicate
)
7559 (initial_value
, mode
)))
7562 = gen_rtx_MINUS (mode
, comparison_value
, initial_value
);
7563 loop_insn_hoist (loop
, (GEN_FCN (icode
)
7564 (reg
, comparison_value
,
7568 /* We could handle the other cases too, but it'll be
7569 better to have a testcase first. */
7572 /* We may not have a single insn which can increment a reg, so
7573 create a sequence to hold all the insns from expand_inc. */
7575 expand_inc (reg
, new_add_val
);
7576 tem
= gen_sequence ();
7579 p
= loop_insn_emit_before (loop
, 0, bl
->biv
->insn
, tem
);
7580 delete_insn (bl
->biv
->insn
);
7582 /* Update biv info to reflect its new status. */
7584 bl
->initial_value
= start_value
;
7585 bl
->biv
->add_val
= new_add_val
;
7587 /* Update loop info. */
7588 loop_info
->initial_value
= reg
;
7589 loop_info
->initial_equiv_value
= reg
;
7590 loop_info
->final_value
= const0_rtx
;
7591 loop_info
->final_equiv_value
= const0_rtx
;
7592 loop_info
->comparison_value
= const0_rtx
;
7593 loop_info
->comparison_code
= cmp_code
;
7594 loop_info
->increment
= new_add_val
;
7596 /* Inc LABEL_NUSES so that delete_insn will
7597 not delete the label. */
7598 LABEL_NUSES (XEXP (jump_label
, 0))++;
7600 /* Emit an insn after the end of the loop to set the biv's
7601 proper exit value if it is used anywhere outside the loop. */
7602 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
7604 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
7605 loop_insn_sink (loop
, gen_move_insn (reg
, final_value
));
7607 /* Delete compare/branch at end of loop. */
7608 delete_insn (PREV_INSN (loop_end
));
7609 if (compare_and_branch
== 2)
7610 delete_insn (first_compare
);
7612 /* Add new compare/branch insn at end of loop. */
7614 emit_cmp_and_jump_insns (reg
, const0_rtx
, cmp_code
, NULL_RTX
,
7615 GET_MODE (reg
), 0, 0,
7616 XEXP (jump_label
, 0));
7617 tem
= gen_sequence ();
7619 emit_jump_insn_before (tem
, loop_end
);
7621 for (tem
= PREV_INSN (loop_end
);
7622 tem
&& GET_CODE (tem
) != JUMP_INSN
;
7623 tem
= PREV_INSN (tem
))
7627 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
7633 /* Increment of LABEL_NUSES done above. */
7634 /* Register is now always nonnegative,
7635 so add REG_NONNEG note to the branch. */
7636 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, reg
,
7642 /* No insn may reference both the reversed and another biv or it
7643 will fail (see comment near the top of the loop reversal
7645 Earlier on, we have verified that the biv has no use except
7646 counting, or it is the only biv in this function.
7647 However, the code that computes no_use_except_counting does
7648 not verify reg notes. It's possible to have an insn that
7649 references another biv, and has a REG_EQUAL note with an
7650 expression based on the reversed biv. To avoid this case,
7651 remove all REG_EQUAL notes based on the reversed biv
7653 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
7657 rtx set
= single_set (p
);
7658 /* If this is a set of a GIV based on the reversed biv, any
7659 REG_EQUAL notes should still be correct. */
7661 || GET_CODE (SET_DEST (set
)) != REG
7662 || (size_t) REGNO (SET_DEST (set
)) >= ivs
->n_regs
7663 || REG_IV_TYPE (ivs
, REGNO (SET_DEST (set
))) != GENERAL_INDUCT
7664 || REG_IV_INFO (ivs
, REGNO (SET_DEST (set
)))->src_reg
!= bl
->biv
->src_reg
)
7665 for (pnote
= ®_NOTES (p
); *pnote
;)
7667 if (REG_NOTE_KIND (*pnote
) == REG_EQUAL
7668 && reg_mentioned_p (regno_reg_rtx
[bl
->regno
],
7670 *pnote
= XEXP (*pnote
, 1);
7672 pnote
= &XEXP (*pnote
, 1);
7676 /* Mark that this biv has been reversed. Each giv which depends
7677 on this biv, and which is also live past the end of the loop
7678 will have to be fixed up. */
7682 if (loop_dump_stream
)
7684 fprintf (loop_dump_stream
, "Reversed loop");
7686 fprintf (loop_dump_stream
, " and added reg_nonneg\n");
7688 fprintf (loop_dump_stream
, "\n");
7699 /* Verify whether the biv BL appears to be eliminable,
7700 based on the insns in the loop that refer to it.
7702 If ELIMINATE_P is non-zero, actually do the elimination.
7704 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7705 determine whether invariant insns should be placed inside or at the
7706 start of the loop. */
7709 maybe_eliminate_biv (loop
, bl
, eliminate_p
, threshold
, insn_count
)
7710 const struct loop
*loop
;
7711 struct iv_class
*bl
;
7713 int threshold
, insn_count
;
7715 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
7716 rtx reg
= bl
->biv
->dest_reg
;
7719 /* Scan all insns in the loop, stopping if we find one that uses the
7720 biv in a way that we cannot eliminate. */
7722 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
7724 enum rtx_code code
= GET_CODE (p
);
7725 basic_block where_bb
= 0;
7726 rtx where_insn
= threshold
>= insn_count
? 0 : p
;
7728 /* If this is a libcall that sets a giv, skip ahead to its end. */
7729 if (GET_RTX_CLASS (code
) == 'i')
7731 rtx note
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
7735 rtx last
= XEXP (note
, 0);
7736 rtx set
= single_set (last
);
7738 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
7740 unsigned int regno
= REGNO (SET_DEST (set
));
7742 if (regno
< ivs
->n_regs
7743 && REG_IV_TYPE (ivs
, regno
) == GENERAL_INDUCT
7744 && REG_IV_INFO (ivs
, regno
)->src_reg
== bl
->biv
->src_reg
)
7749 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
7750 && reg_mentioned_p (reg
, PATTERN (p
))
7751 && ! maybe_eliminate_biv_1 (loop
, PATTERN (p
), p
, bl
,
7752 eliminate_p
, where_bb
, where_insn
))
7754 if (loop_dump_stream
)
7755 fprintf (loop_dump_stream
,
7756 "Cannot eliminate biv %d: biv used in insn %d.\n",
7757 bl
->regno
, INSN_UID (p
));
7764 if (loop_dump_stream
)
7765 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
7766 bl
->regno
, eliminate_p
? "was" : "can be");
7773 /* INSN and REFERENCE are instructions in the same insn chain.
7774 Return non-zero if INSN is first. */
7777 loop_insn_first_p (insn
, reference
)
7778 rtx insn
, reference
;
7782 for (p
= insn
, q
= reference
;;)
7784 /* Start with test for not first so that INSN == REFERENCE yields not
7786 if (q
== insn
|| ! p
)
7788 if (p
== reference
|| ! q
)
7791 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
7792 previous insn, hence the <= comparison below does not work if
7794 if (INSN_UID (p
) < max_uid_for_loop
7795 && INSN_UID (q
) < max_uid_for_loop
7796 && GET_CODE (p
) != NOTE
)
7797 return INSN_LUID (p
) <= INSN_LUID (q
);
7799 if (INSN_UID (p
) >= max_uid_for_loop
7800 || GET_CODE (p
) == NOTE
)
7802 if (INSN_UID (q
) >= max_uid_for_loop
)
7807 /* We are trying to eliminate BIV in INSN using GIV. Return non-zero if
7808 the offset that we have to take into account due to auto-increment /
7809 div derivation is zero. */
7811 biv_elimination_giv_has_0_offset (biv
, giv
, insn
)
7812 struct induction
*biv
, *giv
;
7815 /* If the giv V had the auto-inc address optimization applied
7816 to it, and INSN occurs between the giv insn and the biv
7817 insn, then we'd have to adjust the value used here.
7818 This is rare, so we don't bother to make this possible. */
7819 if (giv
->auto_inc_opt
7820 && ((loop_insn_first_p (giv
->insn
, insn
)
7821 && loop_insn_first_p (insn
, biv
->insn
))
7822 || (loop_insn_first_p (biv
->insn
, insn
)
7823 && loop_insn_first_p (insn
, giv
->insn
))))
7829 /* If BL appears in X (part of the pattern of INSN), see if we can
7830 eliminate its use. If so, return 1. If not, return 0.
7832 If BIV does not appear in X, return 1.
7834 If ELIMINATE_P is non-zero, actually do the elimination.
7835 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
7836 Depending on how many items have been moved out of the loop, it
7837 will either be before INSN (when WHERE_INSN is non-zero) or at the
7838 start of the loop (when WHERE_INSN is zero). */
7841 maybe_eliminate_biv_1 (loop
, x
, insn
, bl
, eliminate_p
, where_bb
, where_insn
)
7842 const struct loop
*loop
;
7844 struct iv_class
*bl
;
7846 basic_block where_bb
;
7849 enum rtx_code code
= GET_CODE (x
);
7850 rtx reg
= bl
->biv
->dest_reg
;
7851 enum machine_mode mode
= GET_MODE (reg
);
7852 struct induction
*v
;
7864 /* If we haven't already been able to do something with this BIV,
7865 we can't eliminate it. */
7871 /* If this sets the BIV, it is not a problem. */
7872 if (SET_DEST (x
) == reg
)
7875 /* If this is an insn that defines a giv, it is also ok because
7876 it will go away when the giv is reduced. */
7877 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7878 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
7882 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
7884 /* Can replace with any giv that was reduced and
7885 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7886 Require a constant for MULT_VAL, so we know it's nonzero.
7887 ??? We disable this optimization to avoid potential
7890 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7891 if (GET_CODE (v
->mult_val
) == CONST_INT
&& v
->mult_val
!= const0_rtx
7892 && v
->add_val
== const0_rtx
7893 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7897 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
7903 /* If the giv has the opposite direction of change,
7904 then reverse the comparison. */
7905 if (INTVAL (v
->mult_val
) < 0)
7906 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
7907 const0_rtx
, v
->new_reg
);
7911 /* We can probably test that giv's reduced reg. */
7912 if (validate_change (insn
, &SET_SRC (x
), new, 0))
7916 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
7917 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
7918 Require a constant for MULT_VAL, so we know it's nonzero.
7919 ??? Do this only if ADD_VAL is a pointer to avoid a potential
7920 overflow problem. */
7922 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7923 if (GET_CODE (v
->mult_val
) == CONST_INT
7924 && v
->mult_val
!= const0_rtx
7925 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7927 && (GET_CODE (v
->add_val
) == SYMBOL_REF
7928 || GET_CODE (v
->add_val
) == LABEL_REF
7929 || GET_CODE (v
->add_val
) == CONST
7930 || (GET_CODE (v
->add_val
) == REG
7931 && REG_POINTER (v
->add_val
))))
7933 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
7939 /* If the giv has the opposite direction of change,
7940 then reverse the comparison. */
7941 if (INTVAL (v
->mult_val
) < 0)
7942 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
7945 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
7946 copy_rtx (v
->add_val
));
7948 /* Replace biv with the giv's reduced register. */
7949 update_reg_last_use (v
->add_val
, insn
);
7950 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
7953 /* Insn doesn't support that constant or invariant. Copy it
7954 into a register (it will be a loop invariant.) */
7955 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
7957 loop_insn_emit_before (loop
, 0, where_insn
,
7959 copy_rtx (v
->add_val
)));
7961 /* Substitute the new register for its invariant value in
7962 the compare expression. */
7963 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
7964 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
7973 case GT
: case GE
: case GTU
: case GEU
:
7974 case LT
: case LE
: case LTU
: case LEU
:
7975 /* See if either argument is the biv. */
7976 if (XEXP (x
, 0) == reg
)
7977 arg
= XEXP (x
, 1), arg_operand
= 1;
7978 else if (XEXP (x
, 1) == reg
)
7979 arg
= XEXP (x
, 0), arg_operand
= 0;
7983 if (CONSTANT_P (arg
))
7985 /* First try to replace with any giv that has constant positive
7986 mult_val and constant add_val. We might be able to support
7987 negative mult_val, but it seems complex to do it in general. */
7989 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7990 if (GET_CODE (v
->mult_val
) == CONST_INT
7991 && INTVAL (v
->mult_val
) > 0
7992 && (GET_CODE (v
->add_val
) == SYMBOL_REF
7993 || GET_CODE (v
->add_val
) == LABEL_REF
7994 || GET_CODE (v
->add_val
) == CONST
7995 || (GET_CODE (v
->add_val
) == REG
7996 && REG_POINTER (v
->add_val
)))
7997 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8000 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8006 /* Replace biv with the giv's reduced reg. */
8007 validate_change (insn
, &XEXP (x
, 1 - arg_operand
), v
->new_reg
, 1);
8009 /* If all constants are actually constant integers and
8010 the derived constant can be directly placed in the COMPARE,
8012 if (GET_CODE (arg
) == CONST_INT
8013 && GET_CODE (v
->mult_val
) == CONST_INT
8014 && GET_CODE (v
->add_val
) == CONST_INT
)
8016 validate_change (insn
, &XEXP (x
, arg_operand
),
8017 GEN_INT (INTVAL (arg
)
8018 * INTVAL (v
->mult_val
)
8019 + INTVAL (v
->add_val
)), 1);
8023 /* Otherwise, load it into a register. */
8024 tem
= gen_reg_rtx (mode
);
8025 loop_iv_add_mult_emit_before (loop
, arg
,
8026 v
->mult_val
, v
->add_val
,
8027 tem
, where_bb
, where_insn
);
8028 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8030 if (apply_change_group ())
8034 /* Look for giv with positive constant mult_val and nonconst add_val.
8035 Insert insns to calculate new compare value.
8036 ??? Turn this off due to possible overflow. */
8038 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8039 if (GET_CODE (v
->mult_val
) == CONST_INT
8040 && INTVAL (v
->mult_val
) > 0
8041 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8047 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8053 tem
= gen_reg_rtx (mode
);
8055 /* Replace biv with giv's reduced register. */
8056 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
8059 /* Compute value to compare against. */
8060 loop_iv_add_mult_emit_before (loop
, arg
,
8061 v
->mult_val
, v
->add_val
,
8062 tem
, where_bb
, where_insn
);
8063 /* Use it in this insn. */
8064 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8065 if (apply_change_group ())
8069 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
8071 if (loop_invariant_p (loop
, arg
) == 1)
8073 /* Look for giv with constant positive mult_val and nonconst
8074 add_val. Insert insns to compute new compare value.
8075 ??? Turn this off due to possible overflow. */
8077 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8078 if (GET_CODE (v
->mult_val
) == CONST_INT
&& INTVAL (v
->mult_val
) > 0
8079 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8085 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8091 tem
= gen_reg_rtx (mode
);
8093 /* Replace biv with giv's reduced register. */
8094 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
8097 /* Compute value to compare against. */
8098 loop_iv_add_mult_emit_before (loop
, arg
,
8099 v
->mult_val
, v
->add_val
,
8100 tem
, where_bb
, where_insn
);
8101 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8102 if (apply_change_group ())
8107 /* This code has problems. Basically, you can't know when
8108 seeing if we will eliminate BL, whether a particular giv
8109 of ARG will be reduced. If it isn't going to be reduced,
8110 we can't eliminate BL. We can try forcing it to be reduced,
8111 but that can generate poor code.
8113 The problem is that the benefit of reducing TV, below should
8114 be increased if BL can actually be eliminated, but this means
8115 we might have to do a topological sort of the order in which
8116 we try to process biv. It doesn't seem worthwhile to do
8117 this sort of thing now. */
8120 /* Otherwise the reg compared with had better be a biv. */
8121 if (GET_CODE (arg
) != REG
8122 || REG_IV_TYPE (ivs
, REGNO (arg
)) != BASIC_INDUCT
)
8125 /* Look for a pair of givs, one for each biv,
8126 with identical coefficients. */
8127 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8129 struct induction
*tv
;
8131 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
8134 for (tv
= REG_IV_CLASS (ivs
, REGNO (arg
))->giv
; tv
;
8136 if (! tv
->ignore
&& ! tv
->maybe_dead
8137 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
8138 && rtx_equal_p (tv
->add_val
, v
->add_val
)
8139 && tv
->mode
== mode
)
8141 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8147 /* Replace biv with its giv's reduced reg. */
8148 XEXP (x
, 1 - arg_operand
) = v
->new_reg
;
8149 /* Replace other operand with the other giv's
8151 XEXP (x
, arg_operand
) = tv
->new_reg
;
8158 /* If we get here, the biv can't be eliminated. */
8162 /* If this address is a DEST_ADDR giv, it doesn't matter if the
8163 biv is used in it, since it will be replaced. */
8164 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8165 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
8173 /* See if any subexpression fails elimination. */
8174 fmt
= GET_RTX_FORMAT (code
);
8175 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
8180 if (! maybe_eliminate_biv_1 (loop
, XEXP (x
, i
), insn
, bl
,
8181 eliminate_p
, where_bb
, where_insn
))
8186 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8187 if (! maybe_eliminate_biv_1 (loop
, XVECEXP (x
, i
, j
), insn
, bl
,
8188 eliminate_p
, where_bb
, where_insn
))
8197 /* Return nonzero if the last use of REG
8198 is in an insn following INSN in the same basic block. */
8201 last_use_this_basic_block (reg
, insn
)
8207 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
8210 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
8216 /* Called via `note_stores' to record the initial value of a biv. Here we
8217 just record the location of the set and process it later. */
8220 record_initial (dest
, set
, data
)
8223 void *data ATTRIBUTE_UNUSED
;
8225 struct loop_ivs
*ivs
= (struct loop_ivs
*) data
;
8226 struct iv_class
*bl
;
8228 if (GET_CODE (dest
) != REG
8229 || REGNO (dest
) >= ivs
->n_regs
8230 || REG_IV_TYPE (ivs
, REGNO (dest
)) != BASIC_INDUCT
)
8233 bl
= REG_IV_CLASS (ivs
, REGNO (dest
));
8235 /* If this is the first set found, record it. */
8236 if (bl
->init_insn
== 0)
8238 bl
->init_insn
= note_insn
;
8243 /* If any of the registers in X are "old" and currently have a last use earlier
8244 than INSN, update them to have a last use of INSN. Their actual last use
8245 will be the previous insn but it will not have a valid uid_luid so we can't
8246 use it. X must be a source expression only. */
8249 update_reg_last_use (x
, insn
)
8253 /* Check for the case where INSN does not have a valid luid. In this case,
8254 there is no need to modify the regno_last_uid, as this can only happen
8255 when code is inserted after the loop_end to set a pseudo's final value,
8256 and hence this insn will never be the last use of x.
8257 ???? This comment is not correct. See for example loop_givs_reduce.
8258 This may insert an insn before another new insn. */
8259 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
8260 && INSN_UID (insn
) < max_uid_for_loop
8261 && REGNO_LAST_LUID (REGNO (x
)) < INSN_LUID (insn
))
8263 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
8268 register const char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
8269 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
8272 update_reg_last_use (XEXP (x
, i
), insn
);
8273 else if (fmt
[i
] == 'E')
8274 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
8275 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
8280 /* Given an insn INSN and condition COND, return the condition in a
8281 canonical form to simplify testing by callers. Specifically:
8283 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
8284 (2) Both operands will be machine operands; (cc0) will have been replaced.
8285 (3) If an operand is a constant, it will be the second operand.
8286 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
8287 for GE, GEU, and LEU.
8289 If the condition cannot be understood, or is an inequality floating-point
8290 comparison which needs to be reversed, 0 will be returned.
8292 If REVERSE is non-zero, then reverse the condition prior to canonizing it.
8294 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8295 insn used in locating the condition was found. If a replacement test
8296 of the condition is desired, it should be placed in front of that
8297 insn and we will be sure that the inputs are still valid.
8299 If WANT_REG is non-zero, we wish the condition to be relative to that
8300 register, if possible. Therefore, do not canonicalize the condition
8304 canonicalize_condition (insn
, cond
, reverse
, earliest
, want_reg
)
8316 int reverse_code
= 0;
8317 enum machine_mode mode
;
8319 code
= GET_CODE (cond
);
8320 mode
= GET_MODE (cond
);
8321 op0
= XEXP (cond
, 0);
8322 op1
= XEXP (cond
, 1);
8325 code
= reversed_comparison_code (cond
, insn
);
8326 if (code
== UNKNOWN
)
8332 /* If we are comparing a register with zero, see if the register is set
8333 in the previous insn to a COMPARE or a comparison operation. Perform
8334 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
8337 while (GET_RTX_CLASS (code
) == '<'
8338 && op1
== CONST0_RTX (GET_MODE (op0
))
8341 /* Set non-zero when we find something of interest. */
8345 /* If comparison with cc0, import actual comparison from compare
8349 if ((prev
= prev_nonnote_insn (prev
)) == 0
8350 || GET_CODE (prev
) != INSN
8351 || (set
= single_set (prev
)) == 0
8352 || SET_DEST (set
) != cc0_rtx
)
8355 op0
= SET_SRC (set
);
8356 op1
= CONST0_RTX (GET_MODE (op0
));
8362 /* If this is a COMPARE, pick up the two things being compared. */
8363 if (GET_CODE (op0
) == COMPARE
)
8365 op1
= XEXP (op0
, 1);
8366 op0
= XEXP (op0
, 0);
8369 else if (GET_CODE (op0
) != REG
)
8372 /* Go back to the previous insn. Stop if it is not an INSN. We also
8373 stop if it isn't a single set or if it has a REG_INC note because
8374 we don't want to bother dealing with it. */
8376 if ((prev
= prev_nonnote_insn (prev
)) == 0
8377 || GET_CODE (prev
) != INSN
8378 || FIND_REG_INC_NOTE (prev
, 0))
8381 set
= set_of (op0
, prev
);
8384 && (GET_CODE (set
) != SET
8385 || !rtx_equal_p (SET_DEST (set
), op0
)))
8388 /* If this is setting OP0, get what it sets it to if it looks
8392 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
8394 /* ??? We may not combine comparisons done in a CCmode with
8395 comparisons not done in a CCmode. This is to aid targets
8396 like Alpha that have an IEEE compliant EQ instruction, and
8397 a non-IEEE compliant BEQ instruction. The use of CCmode is
8398 actually artificial, simply to prevent the combination, but
8399 should not affect other platforms.
8401 However, we must allow VOIDmode comparisons to match either
8402 CCmode or non-CCmode comparison, because some ports have
8403 modeless comparisons inside branch patterns.
8405 ??? This mode check should perhaps look more like the mode check
8406 in simplify_comparison in combine. */
8408 if ((GET_CODE (SET_SRC (set
)) == COMPARE
8411 && GET_MODE_CLASS (inner_mode
) == MODE_INT
8412 && (GET_MODE_BITSIZE (inner_mode
)
8413 <= HOST_BITS_PER_WIDE_INT
)
8414 && (STORE_FLAG_VALUE
8415 & ((HOST_WIDE_INT
) 1
8416 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
8417 #ifdef FLOAT_STORE_FLAG_VALUE
8419 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
8420 && (REAL_VALUE_NEGATIVE
8421 (FLOAT_STORE_FLAG_VALUE (inner_mode
))))
8424 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
8425 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
8426 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
8427 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
8429 else if (((code
== EQ
8431 && (GET_MODE_BITSIZE (inner_mode
)
8432 <= HOST_BITS_PER_WIDE_INT
)
8433 && GET_MODE_CLASS (inner_mode
) == MODE_INT
8434 && (STORE_FLAG_VALUE
8435 & ((HOST_WIDE_INT
) 1
8436 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
8437 #ifdef FLOAT_STORE_FLAG_VALUE
8439 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
8440 && (REAL_VALUE_NEGATIVE
8441 (FLOAT_STORE_FLAG_VALUE (inner_mode
))))
8444 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
8445 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
8446 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
8447 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
8457 else if (reg_set_p (op0
, prev
))
8458 /* If this sets OP0, but not directly, we have to give up. */
8463 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
8464 code
= GET_CODE (x
);
8467 code
= reversed_comparison_code (x
, prev
);
8468 if (code
== UNKNOWN
)
8473 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
8479 /* If constant is first, put it last. */
8480 if (CONSTANT_P (op0
))
8481 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
8483 /* If OP0 is the result of a comparison, we weren't able to find what
8484 was really being compared, so fail. */
8485 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
8488 /* Canonicalize any ordered comparison with integers involving equality
8489 if we can do computations in the relevant mode and we do not
8492 if (GET_CODE (op1
) == CONST_INT
8493 && GET_MODE (op0
) != VOIDmode
8494 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
8496 HOST_WIDE_INT const_val
= INTVAL (op1
);
8497 unsigned HOST_WIDE_INT uconst_val
= const_val
;
8498 unsigned HOST_WIDE_INT max_val
8499 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
8504 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
8505 code
= LT
, op1
= GEN_INT (const_val
+ 1);
8508 /* When cross-compiling, const_val might be sign-extended from
8509 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
8511 if ((HOST_WIDE_INT
) (const_val
& max_val
)
8512 != (((HOST_WIDE_INT
) 1
8513 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
8514 code
= GT
, op1
= GEN_INT (const_val
- 1);
8518 if (uconst_val
< max_val
)
8519 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
8523 if (uconst_val
!= 0)
8524 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
8533 /* Never return CC0; return zero instead. */
8538 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
8541 /* Given a jump insn JUMP, return the condition that will cause it to branch
8542 to its JUMP_LABEL. If the condition cannot be understood, or is an
8543 inequality floating-point comparison which needs to be reversed, 0 will
8546 If EARLIEST is non-zero, it is a pointer to a place where the earliest
8547 insn used in locating the condition was found. If a replacement test
8548 of the condition is desired, it should be placed in front of that
8549 insn and we will be sure that the inputs are still valid. */
8552 get_condition (jump
, earliest
)
8560 /* If this is not a standard conditional jump, we can't parse it. */
8561 if (GET_CODE (jump
) != JUMP_INSN
8562 || ! any_condjump_p (jump
))
8564 set
= pc_set (jump
);
8566 cond
= XEXP (SET_SRC (set
), 0);
8568 /* If this branches to JUMP_LABEL when the condition is false, reverse
8571 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
8572 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
8574 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
);
8577 /* Similar to above routine, except that we also put an invariant last
8578 unless both operands are invariants. */
8581 get_condition_for_loop (loop
, x
)
8582 const struct loop
*loop
;
8585 rtx comparison
= get_condition (x
, NULL_PTR
);
8588 || ! loop_invariant_p (loop
, XEXP (comparison
, 0))
8589 || loop_invariant_p (loop
, XEXP (comparison
, 1)))
8592 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
8593 XEXP (comparison
, 1), XEXP (comparison
, 0));
8596 /* Scan the function and determine whether it has indirect (computed) jumps.
8598 This is taken mostly from flow.c; similar code exists elsewhere
8599 in the compiler. It may be useful to put this into rtlanal.c. */
8601 indirect_jump_in_function_p (start
)
8606 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
8607 if (computed_jump_p (insn
))
8613 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8614 documentation for LOOP_MEMS for the definition of `appropriate'.
8615 This function is called from prescan_loop via for_each_rtx. */
8618 insert_loop_mem (mem
, data
)
8620 void *data ATTRIBUTE_UNUSED
;
8622 struct loop_info
*loop_info
= data
;
8629 switch (GET_CODE (m
))
8635 /* We're not interested in MEMs that are only clobbered. */
8639 /* We're not interested in the MEM associated with a
8640 CONST_DOUBLE, so there's no need to traverse into this. */
8644 /* We're not interested in any MEMs that only appear in notes. */
8648 /* This is not a MEM. */
8652 /* See if we've already seen this MEM. */
8653 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
8654 if (rtx_equal_p (m
, loop_info
->mems
[i
].mem
))
8656 if (GET_MODE (m
) != GET_MODE (loop_info
->mems
[i
].mem
))
8657 /* The modes of the two memory accesses are different. If
8658 this happens, something tricky is going on, and we just
8659 don't optimize accesses to this MEM. */
8660 loop_info
->mems
[i
].optimize
= 0;
8665 /* Resize the array, if necessary. */
8666 if (loop_info
->mems_idx
== loop_info
->mems_allocated
)
8668 if (loop_info
->mems_allocated
!= 0)
8669 loop_info
->mems_allocated
*= 2;
8671 loop_info
->mems_allocated
= 32;
8673 loop_info
->mems
= (loop_mem_info
*)
8674 xrealloc (loop_info
->mems
,
8675 loop_info
->mems_allocated
* sizeof (loop_mem_info
));
8678 /* Actually insert the MEM. */
8679 loop_info
->mems
[loop_info
->mems_idx
].mem
= m
;
8680 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8681 because we can't put it in a register. We still store it in the
8682 table, though, so that if we see the same address later, but in a
8683 non-BLK mode, we'll not think we can optimize it at that point. */
8684 loop_info
->mems
[loop_info
->mems_idx
].optimize
= (GET_MODE (m
) != BLKmode
);
8685 loop_info
->mems
[loop_info
->mems_idx
].reg
= NULL_RTX
;
8686 ++loop_info
->mems_idx
;
8692 /* Allocate REGS->ARRAY or reallocate it if it is too small.
8694 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
8695 register that is modified by an insn between FROM and TO. If the
8696 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
8697 more, stop incrementing it, to avoid overflow.
8699 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
8700 register I is used, if it is only used once. Otherwise, it is set
8701 to 0 (for no uses) or const0_rtx for more than one use. This
8702 parameter may be zero, in which case this processing is not done.
8704 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
8705 optimize register I.
8707 Store in *COUNT_PTR the number of actual instructions
8708 in the loop. We use this to decide what is worth moving out. */
8711 loop_regs_scan (loop
, extra_size
, count_ptr
)
8712 const struct loop
*loop
;
8716 struct loop_regs
*regs
= LOOP_REGS (loop
);
8718 /* last_set[n] is nonzero iff reg n has been set in the current
8719 basic block. In that case, it is the insn that last set reg n. */
8725 old_nregs
= regs
->num
;
8726 regs
->num
= max_reg_num ();
8728 /* Grow the regs array if not allocated or too small. */
8729 if (regs
->num
>= regs
->size
)
8731 regs
->size
= regs
->num
+ extra_size
;
8733 regs
->array
= (struct loop_reg
*)
8734 xrealloc (regs
->array
, regs
->size
* sizeof (*regs
->array
));
8736 /* Zero the new elements. */
8737 memset (regs
->array
+ old_nregs
, 0,
8738 (regs
->size
- old_nregs
) * sizeof (*regs
->array
));
8741 /* Clear previously scanned fields but do not clear n_times_set. */
8742 for (i
= 0; i
< old_nregs
; i
++)
8744 regs
->array
[i
].set_in_loop
= 0;
8745 regs
->array
[i
].may_not_optimize
= 0;
8746 regs
->array
[i
].single_usage
= NULL_RTX
;
8749 last_set
= (rtx
*) xcalloc (regs
->num
, sizeof (rtx
));
8751 /* Scan the loop, recording register usage. */
8752 for (insn
= loop
->top
? loop
->top
: loop
->start
; insn
!= loop
->end
;
8753 insn
= NEXT_INSN (insn
))
8759 /* Record registers that have exactly one use. */
8760 find_single_use_in_loop (regs
, insn
, PATTERN (insn
));
8762 /* Include uses in REG_EQUAL notes. */
8763 if (REG_NOTES (insn
))
8764 find_single_use_in_loop (regs
, insn
, REG_NOTES (insn
));
8766 if (GET_CODE (PATTERN (insn
)) == SET
8767 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
8768 count_one_set (regs
, insn
, PATTERN (insn
), last_set
);
8769 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
8772 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
8773 count_one_set (regs
, insn
, XVECEXP (PATTERN (insn
), 0, i
),
8778 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
8779 memset (last_set
, 0, regs
->num
* sizeof (rtx
));
8782 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8784 regs
->array
[i
].may_not_optimize
= 1;
8785 regs
->array
[i
].set_in_loop
= 1;
8788 #ifdef AVOID_CCMODE_COPIES
8789 /* Don't try to move insns which set CC registers if we should not
8790 create CCmode register copies. */
8791 for (i
= regs
->num
- 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
8792 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
8793 regs
->array
[i
].may_not_optimize
= 1;
8796 /* Set regs->array[I].n_times_set for the new registers. */
8797 for (i
= old_nregs
; i
< regs
->num
; i
++)
8798 regs
->array
[i
].n_times_set
= regs
->array
[i
].set_in_loop
;
8805 /* Move MEMs into registers for the duration of the loop. */
8809 const struct loop
*loop
;
8811 struct loop_info
*loop_info
= LOOP_INFO (loop
);
8812 struct loop_regs
*regs
= LOOP_REGS (loop
);
8813 int maybe_never
= 0;
8815 rtx p
, prev_ebb_head
;
8816 rtx label
= NULL_RTX
;
8818 /* Nonzero if the next instruction may never be executed. */
8819 int next_maybe_never
= 0;
8820 unsigned int last_max_reg
= max_reg_num ();
8822 if (loop_info
->mems_idx
== 0)
8825 /* We cannot use next_label here because it skips over normal insns. */
8826 end_label
= next_nonnote_insn (loop
->end
);
8827 if (end_label
&& GET_CODE (end_label
) != CODE_LABEL
)
8828 end_label
= NULL_RTX
;
8830 /* Check to see if it's possible that some instructions in the loop are
8831 never executed. Also check if there is a goto out of the loop other
8832 than right after the end of the loop. */
8833 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
8835 p
= next_insn_in_loop (loop
, p
))
8837 if (GET_CODE (p
) == CODE_LABEL
)
8839 else if (GET_CODE (p
) == JUMP_INSN
8840 /* If we enter the loop in the middle, and scan
8841 around to the beginning, don't set maybe_never
8842 for that. This must be an unconditional jump,
8843 otherwise the code at the top of the loop might
8844 never be executed. Unconditional jumps are
8845 followed a by barrier then loop end. */
8846 && ! (GET_CODE (p
) == JUMP_INSN
8847 && JUMP_LABEL (p
) == loop
->top
8848 && NEXT_INSN (NEXT_INSN (p
)) == loop
->end
8849 && any_uncondjump_p (p
)))
8851 /* If this is a jump outside of the loop but not right
8852 after the end of the loop, we would have to emit new fixup
8853 sequences for each such label. */
8854 if (/* If we can't tell where control might go when this
8855 JUMP_INSN is executed, we must be conservative. */
8857 || (JUMP_LABEL (p
) != end_label
8858 && (INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
8859 || INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop
->start
)
8860 || INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop
->end
))))
8863 if (!any_condjump_p (p
))
8864 /* Something complicated. */
8867 /* If there are any more instructions in the loop, they
8868 might not be reached. */
8869 next_maybe_never
= 1;
8871 else if (next_maybe_never
)
8875 /* Find start of the extended basic block that enters the loop. */
8876 for (p
= loop
->start
;
8877 PREV_INSN (p
) && GET_CODE (p
) != CODE_LABEL
;
8884 /* Build table of mems that get set to constant values before the
8886 for (; p
!= loop
->start
; p
= NEXT_INSN (p
))
8887 cselib_process_insn (p
);
8889 /* Actually move the MEMs. */
8890 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
8892 regset_head load_copies
;
8893 regset_head store_copies
;
8896 rtx mem
= loop_info
->mems
[i
].mem
;
8899 if (MEM_VOLATILE_P (mem
)
8900 || loop_invariant_p (loop
, XEXP (mem
, 0)) != 1)
8901 /* There's no telling whether or not MEM is modified. */
8902 loop_info
->mems
[i
].optimize
= 0;
8904 /* Go through the MEMs written to in the loop to see if this
8905 one is aliased by one of them. */
8906 mem_list_entry
= loop_info
->store_mems
;
8907 while (mem_list_entry
)
8909 if (rtx_equal_p (mem
, XEXP (mem_list_entry
, 0)))
8911 else if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
8914 /* MEM is indeed aliased by this store. */
8915 loop_info
->mems
[i
].optimize
= 0;
8918 mem_list_entry
= XEXP (mem_list_entry
, 1);
8921 if (flag_float_store
&& written
8922 && GET_MODE_CLASS (GET_MODE (mem
)) == MODE_FLOAT
)
8923 loop_info
->mems
[i
].optimize
= 0;
8925 /* If this MEM is written to, we must be sure that there
8926 are no reads from another MEM that aliases this one. */
8927 if (loop_info
->mems
[i
].optimize
&& written
)
8931 for (j
= 0; j
< loop_info
->mems_idx
; ++j
)
8935 else if (true_dependence (mem
,
8937 loop_info
->mems
[j
].mem
,
8940 /* It's not safe to hoist loop_info->mems[i] out of
8941 the loop because writes to it might not be
8942 seen by reads from loop_info->mems[j]. */
8943 loop_info
->mems
[i
].optimize
= 0;
8949 if (maybe_never
&& may_trap_p (mem
))
8950 /* We can't access the MEM outside the loop; it might
8951 cause a trap that wouldn't have happened otherwise. */
8952 loop_info
->mems
[i
].optimize
= 0;
8954 if (!loop_info
->mems
[i
].optimize
)
8955 /* We thought we were going to lift this MEM out of the
8956 loop, but later discovered that we could not. */
8959 INIT_REG_SET (&load_copies
);
8960 INIT_REG_SET (&store_copies
);
8962 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
8963 order to keep scan_loop from moving stores to this MEM
8964 out of the loop just because this REG is neither a
8965 user-variable nor used in the loop test. */
8966 reg
= gen_reg_rtx (GET_MODE (mem
));
8967 REG_USERVAR_P (reg
) = 1;
8968 loop_info
->mems
[i
].reg
= reg
;
8970 /* Now, replace all references to the MEM with the
8971 corresponding pseudos. */
8973 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
8975 p
= next_insn_in_loop (loop
, p
))
8981 set
= single_set (p
);
8983 /* See if this copies the mem into a register that isn't
8984 modified afterwards. We'll try to do copy propagation
8985 a little further on. */
8987 /* @@@ This test is _way_ too conservative. */
8989 && GET_CODE (SET_DEST (set
)) == REG
8990 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
8991 && REGNO (SET_DEST (set
)) < last_max_reg
8992 && regs
->array
[REGNO (SET_DEST (set
))].n_times_set
== 1
8993 && rtx_equal_p (SET_SRC (set
), mem
))
8994 SET_REGNO_REG_SET (&load_copies
, REGNO (SET_DEST (set
)));
8996 /* See if this copies the mem from a register that isn't
8997 modified afterwards. We'll try to remove the
8998 redundant copy later on by doing a little register
8999 renaming and copy propagation. This will help
9000 to untangle things for the BIV detection code. */
9003 && GET_CODE (SET_SRC (set
)) == REG
9004 && REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
9005 && REGNO (SET_SRC (set
)) < last_max_reg
9006 && regs
->array
[REGNO (SET_SRC (set
))].n_times_set
== 1
9007 && rtx_equal_p (SET_DEST (set
), mem
))
9008 SET_REGNO_REG_SET (&store_copies
, REGNO (SET_SRC (set
)));
9010 /* Replace the memory reference with the shadow register. */
9011 replace_loop_mems (p
, loop_info
->mems
[i
].mem
,
9012 loop_info
->mems
[i
].reg
);
9015 if (GET_CODE (p
) == CODE_LABEL
9016 || GET_CODE (p
) == JUMP_INSN
)
9020 if (! apply_change_group ())
9021 /* We couldn't replace all occurrences of the MEM. */
9022 loop_info
->mems
[i
].optimize
= 0;
9025 /* Load the memory immediately before LOOP->START, which is
9026 the NOTE_LOOP_BEG. */
9027 cselib_val
*e
= cselib_lookup (mem
, VOIDmode
, 0);
9031 struct elt_loc_list
*const_equiv
= 0;
9035 struct elt_loc_list
*equiv
;
9036 struct elt_loc_list
*best_equiv
= 0;
9037 for (equiv
= e
->locs
; equiv
; equiv
= equiv
->next
)
9039 if (CONSTANT_P (equiv
->loc
))
9040 const_equiv
= equiv
;
9041 else if (GET_CODE (equiv
->loc
) == REG
9042 /* Extending hard register lifetimes causes crash
9043 on SRC targets. Doing so on non-SRC is
9044 probably also not good idea, since we most
9045 probably have pseudoregister equivalence as
9047 && REGNO (equiv
->loc
) >= FIRST_PSEUDO_REGISTER
)
9050 /* Use the constant equivalence if that is cheap enough. */
9052 best_equiv
= const_equiv
;
9053 else if (const_equiv
9054 && (rtx_cost (const_equiv
->loc
, SET
)
9055 <= rtx_cost (best_equiv
->loc
, SET
)))
9057 best_equiv
= const_equiv
;
9061 /* If best_equiv is nonzero, we know that MEM is set to a
9062 constant or register before the loop. We will use this
9063 knowledge to initialize the shadow register with that
9064 constant or reg rather than by loading from MEM. */
9066 best
= copy_rtx (best_equiv
->loc
);
9069 set
= gen_move_insn (reg
, best
);
9070 set
= loop_insn_hoist (loop
, set
);
9073 for (p
= prev_ebb_head
; p
!= loop
->start
; p
= NEXT_INSN (p
))
9074 if (REGNO_LAST_UID (REGNO (best
)) == INSN_UID (p
))
9076 REGNO_LAST_UID (REGNO (best
)) = INSN_UID (set
);
9082 REG_NOTES (set
) = gen_rtx_EXPR_LIST (REG_EQUAL
,
9083 copy_rtx (const_equiv
->loc
),
9088 if (label
== NULL_RTX
)
9090 label
= gen_label_rtx ();
9091 emit_label_after (label
, loop
->end
);
9094 /* Store the memory immediately after END, which is
9095 the NOTE_LOOP_END. */
9096 set
= gen_move_insn (copy_rtx (mem
), reg
);
9097 loop_insn_emit_after (loop
, 0, label
, set
);
9100 if (loop_dump_stream
)
9102 fprintf (loop_dump_stream
, "Hoisted regno %d %s from ",
9103 REGNO (reg
), (written
? "r/w" : "r/o"));
9104 print_rtl (loop_dump_stream
, mem
);
9105 fputc ('\n', loop_dump_stream
);
9108 /* Attempt a bit of copy propagation. This helps untangle the
9109 data flow, and enables {basic,general}_induction_var to find
9111 EXECUTE_IF_SET_IN_REG_SET
9112 (&load_copies
, FIRST_PSEUDO_REGISTER
, j
,
9114 try_copy_prop (loop
, reg
, j
);
9116 CLEAR_REG_SET (&load_copies
);
9118 EXECUTE_IF_SET_IN_REG_SET
9119 (&store_copies
, FIRST_PSEUDO_REGISTER
, j
,
9121 try_swap_copy_prop (loop
, reg
, j
);
9123 CLEAR_REG_SET (&store_copies
);
9127 if (label
!= NULL_RTX
&& end_label
!= NULL_RTX
)
9129 /* Now, we need to replace all references to the previous exit
9130 label with the new one. */
9135 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
9137 for_each_rtx (&p
, replace_label
, &rr
);
9139 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
9140 field. This is not handled by for_each_rtx because it doesn't
9141 handle unprinted ('0') fields. We need to update JUMP_LABEL
9142 because the immediately following unroll pass will use it.
9143 replace_label would not work anyways, because that only handles
9145 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == end_label
)
9146 JUMP_LABEL (p
) = label
;
9153 /* For communication between note_reg_stored and its caller. */
9154 struct note_reg_stored_arg
9160 /* Called via note_stores, record in SET_SEEN whether X, which is written,
9163 note_reg_stored (x
, setter
, arg
)
9164 rtx x
, setter ATTRIBUTE_UNUSED
;
9167 struct note_reg_stored_arg
*t
= (struct note_reg_stored_arg
*) arg
;
9172 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
9173 There must be exactly one insn that sets this pseudo; it will be
9174 deleted if all replacements succeed and we can prove that the register
9175 is not used after the loop. */
9178 try_copy_prop (loop
, replacement
, regno
)
9179 const struct loop
*loop
;
9183 /* This is the reg that we are copying from. */
9184 rtx reg_rtx
= regno_reg_rtx
[regno
];
9187 /* These help keep track of whether we replaced all uses of the reg. */
9188 int replaced_last
= 0;
9189 int store_is_first
= 0;
9191 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
9193 insn
= next_insn_in_loop (loop
, insn
))
9197 /* Only substitute within one extended basic block from the initializing
9199 if (GET_CODE (insn
) == CODE_LABEL
&& init_insn
)
9202 if (! INSN_P (insn
))
9205 /* Is this the initializing insn? */
9206 set
= single_set (insn
);
9208 && GET_CODE (SET_DEST (set
)) == REG
9209 && REGNO (SET_DEST (set
)) == regno
)
9215 if (REGNO_FIRST_UID (regno
) == INSN_UID (insn
))
9219 /* Only substitute after seeing the initializing insn. */
9220 if (init_insn
&& insn
!= init_insn
)
9222 struct note_reg_stored_arg arg
;
9224 replace_loop_regs (insn
, reg_rtx
, replacement
);
9225 if (REGNO_LAST_UID (regno
) == INSN_UID (insn
))
9228 /* Stop replacing when REPLACEMENT is modified. */
9229 arg
.reg
= replacement
;
9231 note_stores (PATTERN (insn
), note_reg_stored
, &arg
);
9238 if (apply_change_group ())
9240 if (loop_dump_stream
)
9241 fprintf (loop_dump_stream
, " Replaced reg %d", regno
);
9242 if (store_is_first
&& replaced_last
)
9247 /* Assume we're just deleting INIT_INSN. */
9249 /* Look for REG_RETVAL note. If we're deleting the end of
9250 the libcall sequence, the whole sequence can go. */
9251 retval_note
= find_reg_note (init_insn
, REG_RETVAL
, NULL_RTX
);
9252 /* If we found a REG_RETVAL note, find the first instruction
9255 first
= XEXP (retval_note
, 0);
9257 /* Delete the instructions. */
9258 loop_delete_insns (first
, init_insn
);
9260 if (loop_dump_stream
)
9261 fprintf (loop_dump_stream
, ".\n");
9265 /* Replace all the instructions from FIRST up to and including LAST
9266 with NOTE_INSN_DELETED notes. */
9269 loop_delete_insns (first
, last
)
9275 PUT_CODE (first
, NOTE
);
9276 NOTE_LINE_NUMBER (first
) = NOTE_INSN_DELETED
;
9277 if (loop_dump_stream
)
9278 fprintf (loop_dump_stream
, ", deleting init_insn (%d)",
9281 /* If this was the LAST instructions we're supposed to delete,
9286 first
= NEXT_INSN (first
);
9290 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
9291 loop LOOP if the order of the sets of these registers can be
9292 swapped. There must be exactly one insn within the loop that sets
9293 this pseudo followed immediately by a move insn that sets
9294 REPLACEMENT with REGNO. */
9296 try_swap_copy_prop (loop
, replacement
, regno
)
9297 const struct loop
*loop
;
9303 unsigned int new_regno
;
9305 new_regno
= REGNO (replacement
);
9307 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
9309 insn
= next_insn_in_loop (loop
, insn
))
9311 /* Search for the insn that copies REGNO to NEW_REGNO? */
9313 && (set
= single_set (insn
))
9314 && GET_CODE (SET_DEST (set
)) == REG
9315 && REGNO (SET_DEST (set
)) == new_regno
9316 && GET_CODE (SET_SRC (set
)) == REG
9317 && REGNO (SET_SRC (set
)) == regno
)
9321 if (insn
!= NULL_RTX
)
9326 /* Some DEF-USE info would come in handy here to make this
9327 function more general. For now, just check the previous insn
9328 which is the most likely candidate for setting REGNO. */
9330 prev_insn
= PREV_INSN (insn
);
9333 && (prev_set
= single_set (prev_insn
))
9334 && GET_CODE (SET_DEST (prev_set
)) == REG
9335 && REGNO (SET_DEST (prev_set
)) == regno
)
9338 (set (reg regno) (expr))
9339 (set (reg new_regno) (reg regno))
9341 so try converting this to:
9342 (set (reg new_regno) (expr))
9343 (set (reg regno) (reg new_regno))
9345 The former construct is often generated when a global
9346 variable used for an induction variable is shadowed by a
9347 register (NEW_REGNO). The latter construct improves the
9348 chances of GIV replacement and BIV elimination. */
9350 validate_change (prev_insn
, &SET_DEST (prev_set
),
9352 validate_change (insn
, &SET_DEST (set
),
9354 validate_change (insn
, &SET_SRC (set
),
9357 if (apply_change_group ())
9359 if (loop_dump_stream
)
9360 fprintf (loop_dump_stream
,
9361 " Swapped set of reg %d at %d with reg %d at %d.\n",
9362 regno
, INSN_UID (insn
),
9363 new_regno
, INSN_UID (prev_insn
));
9365 /* Update first use of REGNO. */
9366 if (REGNO_FIRST_UID (regno
) == INSN_UID (prev_insn
))
9367 REGNO_FIRST_UID (regno
) = INSN_UID (insn
);
9369 /* Now perform copy propagation to hopefully
9370 remove all uses of REGNO within the loop. */
9371 try_copy_prop (loop
, replacement
, regno
);
9377 /* Replace MEM with its associated pseudo register. This function is
9378 called from load_mems via for_each_rtx. DATA is actually a pointer
9379 to a structure describing the instruction currently being scanned
9380 and the MEM we are currently replacing. */
9383 replace_loop_mem (mem
, data
)
9387 loop_replace_args
*args
= (loop_replace_args
*) data
;
9393 switch (GET_CODE (m
))
9399 /* We're not interested in the MEM associated with a
9400 CONST_DOUBLE, so there's no need to traverse into one. */
9404 /* This is not a MEM. */
9408 if (!rtx_equal_p (args
->match
, m
))
9409 /* This is not the MEM we are currently replacing. */
9412 /* Actually replace the MEM. */
9413 validate_change (args
->insn
, mem
, args
->replacement
, 1);
9419 replace_loop_mems (insn
, mem
, reg
)
9424 loop_replace_args args
;
9428 args
.replacement
= reg
;
9430 for_each_rtx (&insn
, replace_loop_mem
, &args
);
9433 /* Replace one register with another. Called through for_each_rtx; PX points
9434 to the rtx being scanned. DATA is actually a pointer to
9435 a structure of arguments. */
9438 replace_loop_reg (px
, data
)
9443 loop_replace_args
*args
= (loop_replace_args
*) data
;
9448 if (x
== args
->match
)
9449 validate_change (args
->insn
, px
, args
->replacement
, 1);
9455 replace_loop_regs (insn
, reg
, replacement
)
9460 loop_replace_args args
;
9464 args
.replacement
= replacement
;
9466 for_each_rtx (&insn
, replace_loop_reg
, &args
);
9469 /* Replace occurrences of the old exit label for the loop with the new
9470 one. DATA is an rtx_pair containing the old and new labels,
9474 replace_label (x
, data
)
9479 rtx old_label
= ((rtx_pair
*) data
)->r1
;
9480 rtx new_label
= ((rtx_pair
*) data
)->r2
;
9485 if (GET_CODE (l
) != LABEL_REF
)
9488 if (XEXP (l
, 0) != old_label
)
9491 XEXP (l
, 0) = new_label
;
9492 ++LABEL_NUSES (new_label
);
9493 --LABEL_NUSES (old_label
);
9498 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
9499 (ignored in the interim). */
9502 loop_insn_emit_after (loop
, where_bb
, where_insn
, pattern
)
9503 const struct loop
*loop ATTRIBUTE_UNUSED
;
9504 basic_block where_bb ATTRIBUTE_UNUSED
;
9508 return emit_insn_after (pattern
, where_insn
);
9512 /* If WHERE_INSN is non-zero emit insn for PATTERN before WHERE_INSN
9513 in basic block WHERE_BB (ignored in the interim) within the loop
9514 otherwise hoist PATTERN into the loop pre-header. */
9517 loop_insn_emit_before (loop
, where_bb
, where_insn
, pattern
)
9518 const struct loop
*loop
;
9519 basic_block where_bb ATTRIBUTE_UNUSED
;
9524 return loop_insn_hoist (loop
, pattern
);
9525 return emit_insn_before (pattern
, where_insn
);
9529 /* Emit call insn for PATTERN before WHERE_INSN in basic block
9530 WHERE_BB (ignored in the interim) within the loop. */
9533 loop_call_insn_emit_before (loop
, where_bb
, where_insn
, pattern
)
9534 const struct loop
*loop ATTRIBUTE_UNUSED
;
9535 basic_block where_bb ATTRIBUTE_UNUSED
;
9539 return emit_call_insn_before (pattern
, where_insn
);
9543 /* Hoist insn for PATTERN into the loop pre-header. */
9546 loop_insn_hoist (loop
, pattern
)
9547 const struct loop
*loop
;
9550 return loop_insn_emit_before (loop
, 0, loop
->start
, pattern
);
9554 /* Hoist call insn for PATTERN into the loop pre-header. */
9557 loop_call_insn_hoist (loop
, pattern
)
9558 const struct loop
*loop
;
9561 return loop_call_insn_emit_before (loop
, 0, loop
->start
, pattern
);
9565 /* Sink insn for PATTERN after the loop end. */
9568 loop_insn_sink (loop
, pattern
)
9569 const struct loop
*loop
;
9572 return loop_insn_emit_before (loop
, 0, loop
->sink
, pattern
);
9576 /* If the loop has multiple exits, emit insn for PATTERN before the
9577 loop to ensure that it will always be executed no matter how the
9578 loop exits. Otherwise, emit the insn for PATTERN after the loop,
9579 since this is slightly more efficient. */
9582 loop_insn_sink_or_swim (loop
, pattern
)
9583 const struct loop
*loop
;
9586 if (loop
->exit_count
)
9587 return loop_insn_hoist (loop
, pattern
);
9589 return loop_insn_sink (loop
, pattern
);
9593 loop_ivs_dump (loop
, file
, verbose
)
9594 const struct loop
*loop
;
9598 struct iv_class
*bl
;
9601 if (! loop
|| ! file
)
9604 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
9607 fprintf (file
, "Loop %d: %d IV classes\n", loop
->num
, iv_num
);
9609 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
9611 loop_iv_class_dump (bl
, file
, verbose
);
9618 loop_iv_class_dump (bl
, file
, verbose
)
9619 const struct iv_class
*bl
;
9621 int verbose ATTRIBUTE_UNUSED
;
9623 struct induction
*v
;
9630 fprintf (file
, "IV class for reg %d, benefit %d\n",
9631 bl
->regno
, bl
->total_benefit
);
9633 fprintf (file
, " Init insn %d", INSN_UID (bl
->init_insn
));
9634 if (bl
->initial_value
)
9636 fprintf (file
, ", init val: ");
9637 print_simple_rtl (file
, bl
->initial_value
);
9639 if (bl
->initial_test
)
9641 fprintf (file
, ", init test: ");
9642 print_simple_rtl (file
, bl
->initial_test
);
9646 if (bl
->final_value
)
9648 fprintf (file
, " Final val: ");
9649 print_simple_rtl (file
, bl
->final_value
);
9653 if ((incr
= biv_total_increment (bl
)))
9655 fprintf (file
, " Total increment: ");
9656 print_simple_rtl (file
, incr
);
9660 /* List the increments. */
9661 for (i
= 0, v
= bl
->biv
; v
; v
= v
->next_iv
, i
++)
9663 fprintf (file
, " Inc%d: insn %d, incr: ", i
, INSN_UID (v
->insn
));
9664 print_simple_rtl (file
, v
->add_val
);
9668 /* List the givs. */
9669 for (i
= 0, v
= bl
->giv
; v
; v
= v
->next_iv
, i
++)
9671 fprintf (file
, " Giv%d: insn %d, benefit %d, ",
9672 i
, INSN_UID (v
->insn
), v
->benefit
);
9673 if (v
->giv_type
== DEST_ADDR
)
9674 print_simple_rtl (file
, v
->mem
);
9676 print_simple_rtl (file
, single_set (v
->insn
));
9683 loop_biv_dump (v
, file
, verbose
)
9684 const struct induction
*v
;
9693 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
9694 fprintf (file
, " const ");
9695 print_simple_rtl (file
, v
->add_val
);
9697 if (verbose
&& v
->final_value
)
9700 fprintf (file
, " final ");
9701 print_simple_rtl (file
, v
->final_value
);
9709 loop_giv_dump (v
, file
, verbose
)
9710 const struct induction
*v
;
9717 if (v
->giv_type
== DEST_REG
)
9718 fprintf (file
, "Giv %d: insn %d",
9719 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
9721 fprintf (file
, "Dest address: insn %d",
9722 INSN_UID (v
->insn
));
9724 fprintf (file
, " src reg %d benefit %d",
9725 REGNO (v
->src_reg
), v
->benefit
);
9726 fprintf (file
, " lifetime %d",
9730 fprintf (file
, " replaceable");
9732 if (v
->no_const_addval
)
9733 fprintf (file
, " ncav");
9735 if (v
->ext_dependant
)
9737 switch (GET_CODE (v
->ext_dependant
))
9740 fprintf (file
, " ext se");
9743 fprintf (file
, " ext ze");
9746 fprintf (file
, " ext tr");
9754 fprintf (file
, " mult ");
9755 print_simple_rtl (file
, v
->mult_val
);
9758 fprintf (file
, " add ");
9759 print_simple_rtl (file
, v
->add_val
);
9761 if (verbose
&& v
->final_value
)
9764 fprintf (file
, " final ");
9765 print_simple_rtl (file
, v
->final_value
);
9774 const struct loop
*loop
;
9776 loop_ivs_dump (loop
, stderr
, 1);
9782 const struct iv_class
*bl
;
9784 loop_iv_class_dump (bl
, stderr
, 1);
9790 const struct induction
*v
;
9792 loop_biv_dump (v
, stderr
, 1);
9798 const struct induction
*v
;
9800 loop_giv_dump (v
, stderr
, 1);
9804 #define LOOP_BLOCK_NUM_1(INSN) \
9805 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
9807 /* The notes do not have an assigned block, so look at the next insn. */
9808 #define LOOP_BLOCK_NUM(INSN) \
9809 ((INSN) ? (GET_CODE (INSN) == NOTE \
9810 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
9811 : LOOP_BLOCK_NUM_1 (INSN)) \
9814 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
9817 loop_dump_aux (loop
, file
, verbose
)
9818 const struct loop
*loop
;
9820 int verbose ATTRIBUTE_UNUSED
;
9824 if (! loop
|| ! file
)
9827 /* Print diagnostics to compare our concept of a loop with
9828 what the loop notes say. */
9829 if (! PREV_INSN (loop
->first
->head
)
9830 || GET_CODE (PREV_INSN (loop
->first
->head
)) != NOTE
9831 || NOTE_LINE_NUMBER (PREV_INSN (loop
->first
->head
))
9832 != NOTE_INSN_LOOP_BEG
)
9833 fprintf (file
, ";; No NOTE_INSN_LOOP_BEG at %d\n",
9834 INSN_UID (PREV_INSN (loop
->first
->head
)));
9835 if (! NEXT_INSN (loop
->last
->end
)
9836 || GET_CODE (NEXT_INSN (loop
->last
->end
)) != NOTE
9837 || NOTE_LINE_NUMBER (NEXT_INSN (loop
->last
->end
))
9838 != NOTE_INSN_LOOP_END
)
9839 fprintf (file
, ";; No NOTE_INSN_LOOP_END at %d\n",
9840 INSN_UID (NEXT_INSN (loop
->last
->end
)));
9845 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
9846 LOOP_BLOCK_NUM (loop
->start
),
9847 LOOP_INSN_UID (loop
->start
),
9848 LOOP_BLOCK_NUM (loop
->cont
),
9849 LOOP_INSN_UID (loop
->cont
),
9850 LOOP_BLOCK_NUM (loop
->cont
),
9851 LOOP_INSN_UID (loop
->cont
),
9852 LOOP_BLOCK_NUM (loop
->vtop
),
9853 LOOP_INSN_UID (loop
->vtop
),
9854 LOOP_BLOCK_NUM (loop
->end
),
9855 LOOP_INSN_UID (loop
->end
));
9856 fprintf (file
, ";; top %d (%d), scan start %d (%d)\n",
9857 LOOP_BLOCK_NUM (loop
->top
),
9858 LOOP_INSN_UID (loop
->top
),
9859 LOOP_BLOCK_NUM (loop
->scan_start
),
9860 LOOP_INSN_UID (loop
->scan_start
));
9861 fprintf (file
, ";; exit_count %d", loop
->exit_count
);
9862 if (loop
->exit_count
)
9864 fputs (", labels:", file
);
9865 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
9867 fprintf (file
, " %d ",
9868 LOOP_INSN_UID (XEXP (label
, 0)));
9873 /* This can happen when a marked loop appears as two nested loops,
9874 say from while (a || b) {}. The inner loop won't match
9875 the loop markers but the outer one will. */
9876 if (LOOP_BLOCK_NUM (loop
->cont
) != loop
->latch
->index
)
9877 fprintf (file
, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
9881 /* Call this function from the debugger to dump LOOP. */
9885 const struct loop
*loop
;
9887 flow_loop_dump (loop
, stderr
, loop_dump_aux
, 1);
9890 /* Call this function from the debugger to dump LOOPS. */
9894 const struct loops
*loops
;
9896 flow_loops_dump (loops
, stderr
, loop_dump_aux
, 1);