1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
74 Using a reload register for several reloads in one insn:
76 When an insn has reloads, it is considered as having three parts:
77 the input reloads, the insn itself after reloading, and the output reloads.
78 Reloads of values used in memory addresses are often needed for only one part.
80 When this is so, reload_when_needed records which part needs the reload.
81 Two reloads for different parts of the insn can share the same reload
84 When a reload is used for addresses in multiple parts, or when it is
85 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
86 a register with any other reload. */
94 #include "insn-config.h"
95 #include "insn-codes.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
107 #ifndef REGISTER_MOVE_COST
108 #define REGISTER_MOVE_COST(x, y) 2
111 #ifndef REGNO_MODE_OK_FOR_BASE_P
112 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
115 #ifndef REG_MODE_OK_FOR_BASE_P
116 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
119 /* All reloads of the current insn are recorded here. See reload.h for
122 struct reload rld
[MAX_RELOADS
];
124 /* All the "earlyclobber" operands of the current insn
125 are recorded here. */
127 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
129 int reload_n_operands
;
131 /* Replacing reloads.
133 If `replace_reloads' is nonzero, then as each reload is recorded
134 an entry is made for it in the table `replacements'.
135 Then later `subst_reloads' can look through that table and
136 perform all the replacements needed. */
138 /* Nonzero means record the places to replace. */
139 static int replace_reloads
;
141 /* Each replacement is recorded with a structure like this. */
144 rtx
*where
; /* Location to store in */
145 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
146 a SUBREG; 0 otherwise. */
147 int what
; /* which reload this is for */
148 enum machine_mode mode
; /* mode it must have */
151 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
153 /* Number of replacements currently recorded. */
154 static int n_replacements
;
156 /* Used to track what is modified by an operand. */
159 int reg_flag
; /* Nonzero if referencing a register. */
160 int safe
; /* Nonzero if this can't conflict with anything. */
161 rtx base
; /* Base address for MEM. */
162 HOST_WIDE_INT start
; /* Starting offset or register number. */
163 HOST_WIDE_INT end
; /* Ending offset or register number. */
166 #ifdef SECONDARY_MEMORY_NEEDED
168 /* Save MEMs needed to copy from one class of registers to another. One MEM
169 is used per mode, but normally only one or two modes are ever used.
171 We keep two versions, before and after register elimination. The one
172 after register elimination is record separately for each operand. This
173 is done in case the address is not valid to be sure that we separately
176 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
177 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
180 /* The instruction we are doing reloads for;
181 so we can test whether a register dies in it. */
182 static rtx this_insn
;
184 /* Nonzero if this instruction is a user-specified asm with operands. */
185 static int this_insn_is_asm
;
187 /* If hard_regs_live_known is nonzero,
188 we can tell which hard regs are currently live,
189 at least enough to succeed in choosing dummy reloads. */
190 static int hard_regs_live_known
;
192 /* Indexed by hard reg number,
193 element is nonnegative if hard reg has been spilled.
194 This vector is passed to `find_reloads' as an argument
195 and is not changed here. */
196 static short *static_reload_reg_p
;
198 /* Set to 1 in subst_reg_equivs if it changes anything. */
199 static int subst_reg_equivs_changed
;
201 /* On return from push_reload, holds the reload-number for the OUT
202 operand, which can be different for that from the input operand. */
203 static int output_reloadnum
;
205 /* Compare two RTX's. */
206 #define MATCHES(x, y) \
207 (x == y || (x != 0 && (GET_CODE (x) == REG \
208 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
209 : rtx_equal_p (x, y) && ! side_effects_p (x))))
211 /* Indicates if two reloads purposes are for similar enough things that we
212 can merge their reloads. */
213 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
214 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
215 || ((when1) == (when2) && (op1) == (op2)) \
216 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
217 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
218 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
219 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
220 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
222 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
223 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
224 ((when1) != (when2) \
225 || ! ((op1) == (op2) \
226 || (when1) == RELOAD_FOR_INPUT \
227 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
228 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
230 /* If we are going to reload an address, compute the reload type to
232 #define ADDR_TYPE(type) \
233 ((type) == RELOAD_FOR_INPUT_ADDRESS \
234 ? RELOAD_FOR_INPADDR_ADDRESS \
235 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
236 ? RELOAD_FOR_OUTADDR_ADDRESS \
239 #ifdef HAVE_SECONDARY_RELOADS
240 static int push_secondary_reload
PROTO((int, rtx
, int, int, enum reg_class
,
241 enum machine_mode
, enum reload_type
,
244 static enum reg_class find_valid_class
PROTO((enum machine_mode
, int));
245 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
246 enum machine_mode
, enum machine_mode
,
247 int, int, int, enum reload_type
));
248 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
249 static void combine_reloads
PROTO((void));
250 static int find_reusable_reload
PROTO((rtx
*, rtx
, enum reg_class
,
251 enum reload_type
, int, int));
252 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
253 enum machine_mode
, enum machine_mode
,
254 enum reg_class
, int, int));
255 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
256 static struct decomposition decompose
PROTO((rtx
));
257 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
258 static int alternative_allows_memconst
PROTO((const char *, int));
259 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int, rtx
));
260 static rtx make_memloc
PROTO((rtx
, int));
261 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
262 int, enum reload_type
, int, rtx
));
263 static rtx subst_reg_equivs
PROTO((rtx
, rtx
));
264 static rtx subst_indexed_address
PROTO((rtx
));
265 static int find_reloads_address_1
PROTO((enum machine_mode
, rtx
, int, rtx
*,
266 int, enum reload_type
,int, rtx
));
267 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
268 enum machine_mode
, int,
269 enum reload_type
, int));
270 static rtx find_reloads_subreg_address
PROTO((rtx
, int, int, enum reload_type
,
272 static int find_inc_amount
PROTO((rtx
, rtx
));
273 static int loc_mentioned_in_p
PROTO((rtx
*, rtx
));
274 extern void debug_reload_to_stream
PROTO((FILE *));
275 extern void debug_reload
PROTO((void));
277 #ifdef HAVE_SECONDARY_RELOADS
279 /* Determine if any secondary reloads are needed for loading (if IN_P is
280 non-zero) or storing (if IN_P is zero) X to or from a reload register of
281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
284 Return the reload number of the secondary reload we made, or -1 if
285 we didn't need one. *PICODE is set to the insn_code to use if we do
286 need a secondary reload. */
289 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
295 enum reg_class reload_class
;
296 enum machine_mode reload_mode
;
297 enum reload_type type
;
298 enum insn_code
*picode
;
300 enum reg_class
class = NO_REGS
;
301 enum machine_mode mode
= reload_mode
;
302 enum insn_code icode
= CODE_FOR_nothing
;
303 enum reg_class t_class
= NO_REGS
;
304 enum machine_mode t_mode
= VOIDmode
;
305 enum insn_code t_icode
= CODE_FOR_nothing
;
306 enum reload_type secondary_type
;
307 int s_reload
, t_reload
= -1;
309 if (type
== RELOAD_FOR_INPUT_ADDRESS
310 || type
== RELOAD_FOR_OUTPUT_ADDRESS
311 || type
== RELOAD_FOR_INPADDR_ADDRESS
312 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
313 secondary_type
= type
;
315 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
317 *picode
= CODE_FOR_nothing
;
319 /* If X is a paradoxical SUBREG, use the inner value to determine both the
320 mode and object being reloaded. */
321 if (GET_CODE (x
) == SUBREG
322 && (GET_MODE_SIZE (GET_MODE (x
))
323 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
326 reload_mode
= GET_MODE (x
);
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
335 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem
[REGNO (x
)] != 0)
337 x
= reg_equiv_mem
[REGNO (x
)];
339 #ifdef SECONDARY_INPUT_RELOAD_CLASS
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
344 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
349 /* If we don't need any secondary registers, done. */
350 if (class == NO_REGS
)
353 /* Get a possible insn to use. If the predicate doesn't accept X, don't
356 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
357 : reload_out_optab
[(int) reload_mode
]);
359 if (icode
!= CODE_FOR_nothing
360 && insn_data
[(int) icode
].operand
[in_p
].predicate
361 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
362 icode
= CODE_FOR_nothing
;
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
370 if (icode
!= CODE_FOR_nothing
)
372 /* If IN_P is non-zero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
378 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
379 enum reg_class insn_class
380 = (insn_letter
== 'r' ? GENERAL_REGS
381 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
383 if (insn_class
== NO_REGS
385 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
386 /* The scratch register's constraint must start with "=&". */
387 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
388 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
391 if (reg_class_subset_p (reload_class
, insn_class
))
392 mode
= insn_data
[(int) icode
].operand
[2].mode
;
395 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
397 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
398 t_class
= (t_letter
== 'r' ? GENERAL_REGS
399 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
401 icode
= CODE_FOR_nothing
;
405 /* This case isn't valid, so fail. Reload is allowed to use the same
406 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
407 in the case of a secondary register, we actually need two different
408 registers for correct code. We fail here to prevent the possibility of
409 silently generating incorrect code later.
411 The convention is that secondary input reloads are valid only if the
412 secondary_class is different from class. If you have such a case, you
413 can not use secondary reloads, you must work around the problem some
416 Allow this when MODE is not reload_mode and assume that the generated
417 code handles this case (it does on the Alpha, which is the only place
418 this currently happens). */
420 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
423 /* If we need a tertiary reload, see if we have one we can reuse or else
426 if (t_class
!= NO_REGS
)
428 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
429 if (rld
[t_reload
].secondary_p
430 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
431 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
432 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
433 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
434 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
435 == CODE_FOR_nothing
))
436 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
437 == CODE_FOR_nothing
)))
438 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
439 && MERGABLE_RELOADS (secondary_type
,
440 rld
[t_reload
].when_needed
,
441 opnum
, rld
[t_reload
].opnum
))
444 rld
[t_reload
].inmode
= t_mode
;
446 rld
[t_reload
].outmode
= t_mode
;
448 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
449 rld
[t_reload
].class = t_class
;
451 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
452 rld
[t_reload
].optional
&= optional
;
453 rld
[t_reload
].secondary_p
= 1;
454 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
455 opnum
, rld
[t_reload
].opnum
))
456 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
459 if (t_reload
== n_reloads
)
461 /* We need to make a new tertiary reload for this register class. */
462 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
463 rld
[t_reload
].class = t_class
;
464 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
465 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
466 rld
[t_reload
].reg_rtx
= 0;
467 rld
[t_reload
].optional
= optional
;
468 rld
[t_reload
].nongroup
= 0;
469 rld
[t_reload
].inc
= 0;
470 /* Maybe we could combine these, but it seems too tricky. */
471 rld
[t_reload
].nocombine
= 1;
472 rld
[t_reload
].in_reg
= 0;
473 rld
[t_reload
].out_reg
= 0;
474 rld
[t_reload
].opnum
= opnum
;
475 rld
[t_reload
].when_needed
= secondary_type
;
476 rld
[t_reload
].secondary_in_reload
= -1;
477 rld
[t_reload
].secondary_out_reload
= -1;
478 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
479 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
480 rld
[t_reload
].secondary_p
= 1;
486 /* See if we can reuse an existing secondary reload. */
487 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
488 if (rld
[s_reload
].secondary_p
489 && (reg_class_subset_p (class, rld
[s_reload
].class)
490 || reg_class_subset_p (rld
[s_reload
].class, class))
491 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
492 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
493 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
494 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
495 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
496 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
497 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
498 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
499 opnum
, rld
[s_reload
].opnum
))
502 rld
[s_reload
].inmode
= mode
;
504 rld
[s_reload
].outmode
= mode
;
506 if (reg_class_subset_p (class, rld
[s_reload
].class))
507 rld
[s_reload
].class = class;
509 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
510 rld
[s_reload
].optional
&= optional
;
511 rld
[s_reload
].secondary_p
= 1;
512 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
513 opnum
, rld
[s_reload
].opnum
))
514 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
517 if (s_reload
== n_reloads
)
519 #ifdef SECONDARY_MEMORY_NEEDED
520 /* If we need a memory location to copy between the two reload regs,
521 set it up now. Note that we do the input case before making
522 the reload and the output case after. This is due to the
523 way reloads are output. */
525 if (in_p
&& icode
== CODE_FOR_nothing
526 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
527 get_secondary_mem (x
, reload_mode
, opnum
, type
);
530 /* We need to make a new secondary reload for this register class. */
531 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
532 rld
[s_reload
].class = class;
534 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
535 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
536 rld
[s_reload
].reg_rtx
= 0;
537 rld
[s_reload
].optional
= optional
;
538 rld
[s_reload
].nongroup
= 0;
539 rld
[s_reload
].inc
= 0;
540 /* Maybe we could combine these, but it seems too tricky. */
541 rld
[s_reload
].nocombine
= 1;
542 rld
[s_reload
].in_reg
= 0;
543 rld
[s_reload
].out_reg
= 0;
544 rld
[s_reload
].opnum
= opnum
;
545 rld
[s_reload
].when_needed
= secondary_type
;
546 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
547 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
548 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
549 rld
[s_reload
].secondary_out_icode
550 = ! in_p
? t_icode
: CODE_FOR_nothing
;
551 rld
[s_reload
].secondary_p
= 1;
555 #ifdef SECONDARY_MEMORY_NEEDED
556 if (! in_p
&& icode
== CODE_FOR_nothing
557 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
558 get_secondary_mem (x
, mode
, opnum
, type
);
565 #endif /* HAVE_SECONDARY_RELOADS */
567 #ifdef SECONDARY_MEMORY_NEEDED
569 /* Return a memory location that will be used to copy X in mode MODE.
570 If we haven't already made a location for this mode in this insn,
571 call find_reloads_address on the location being returned. */
574 get_secondary_mem (x
, mode
, opnum
, type
)
575 rtx x ATTRIBUTE_UNUSED
;
576 enum machine_mode mode
;
578 enum reload_type type
;
583 /* By default, if MODE is narrower than a word, widen it to a word.
584 This is required because most machines that require these memory
585 locations do not support short load and stores from all registers
586 (e.g., FP registers). */
588 #ifdef SECONDARY_MEMORY_NEEDED_MODE
589 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
591 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
592 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
595 /* If we already have made a MEM for this operand in MODE, return it. */
596 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
597 return secondary_memlocs_elim
[(int) mode
][opnum
];
599 /* If this is the first time we've tried to get a MEM for this mode,
600 allocate a new one. `something_changed' in reload will get set
601 by noticing that the frame size has changed. */
603 if (secondary_memlocs
[(int) mode
] == 0)
605 #ifdef SECONDARY_MEMORY_NEEDED_RTX
606 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
608 secondary_memlocs
[(int) mode
]
609 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
613 /* Get a version of the address doing any eliminations needed. If that
614 didn't give us a new MEM, make a new one if it isn't valid. */
616 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
617 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
619 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
620 loc
= copy_rtx (loc
);
622 /* The only time the call below will do anything is if the stack
623 offset is too large. In that case IND_LEVELS doesn't matter, so we
624 can just pass a zero. Adjust the type to be the address of the
625 corresponding object. If the address was valid, save the eliminated
626 address. If it wasn't valid, we need to make a reload each time, so
631 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
632 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
635 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
639 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
643 /* Clear any secondary memory locations we've made. */
646 clear_secondary_mem ()
648 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
650 #endif /* SECONDARY_MEMORY_NEEDED */
652 /* Find the largest class for which every register number plus N is valid in
653 M1 (if in range). Abort if no such class exists. */
655 static enum reg_class
656 find_valid_class (m1
, n
)
657 enum machine_mode m1
;
662 enum reg_class best_class
= NO_REGS
;
665 for (class = 1; class < N_REG_CLASSES
; class++)
668 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
669 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
670 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
671 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
674 if (! bad
&& reg_class_size
[class] > best_size
)
675 best_class
= class, best_size
= reg_class_size
[class];
684 /* Return the number of a previously made reload that can be combined with
685 a new one, or n_reloads if none of the existing reloads can be used.
686 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
687 push_reload, they determine the kind of the new reload that we try to
688 combine. P_IN points to the corresponding value of IN, which can be
689 modified by this function.
690 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
692 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
694 enum reg_class
class;
695 enum reload_type type
;
696 int opnum
, dont_share
;
700 /* We can't merge two reloads if the output of either one is
703 if (earlyclobber_operand_p (out
))
706 /* We can use an existing reload if the class is right
707 and at least one of IN and OUT is a match
708 and the other is at worst neutral.
709 (A zero compared against anything is neutral.)
711 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
712 for the same thing since that can cause us to need more reload registers
713 than we otherwise would. */
715 for (i
= 0; i
< n_reloads
; i
++)
716 if ((reg_class_subset_p (class, rld
[i
].class)
717 || reg_class_subset_p (rld
[i
].class, class))
718 /* If the existing reload has a register, it must fit our class. */
719 && (rld
[i
].reg_rtx
== 0
720 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
721 true_regnum (rld
[i
].reg_rtx
)))
722 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
723 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
724 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
725 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
726 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
727 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
728 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
731 /* Reloading a plain reg for input can match a reload to postincrement
732 that reg, since the postincrement's value is the right value.
733 Likewise, it can match a preincrement reload, since we regard
734 the preincrementation as happening before any ref in this insn
736 for (i
= 0; i
< n_reloads
; i
++)
737 if ((reg_class_subset_p (class, rld
[i
].class)
738 || reg_class_subset_p (rld
[i
].class, class))
739 /* If the existing reload has a register, it must fit our
741 && (rld
[i
].reg_rtx
== 0
742 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
743 true_regnum (rld
[i
].reg_rtx
)))
744 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
745 && ((GET_CODE (in
) == REG
746 && (GET_CODE (rld
[i
].in
) == POST_INC
747 || GET_CODE (rld
[i
].in
) == POST_DEC
748 || GET_CODE (rld
[i
].in
) == PRE_INC
749 || GET_CODE (rld
[i
].in
) == PRE_DEC
)
750 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
752 (GET_CODE (rld
[i
].in
) == REG
753 && (GET_CODE (in
) == POST_INC
754 || GET_CODE (in
) == POST_DEC
755 || GET_CODE (in
) == PRE_INC
756 || GET_CODE (in
) == PRE_DEC
)
757 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
758 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
759 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
760 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
761 opnum
, rld
[i
].opnum
))
763 /* Make sure reload_in ultimately has the increment,
764 not the plain register. */
765 if (GET_CODE (in
) == REG
)
772 /* Record one reload that needs to be performed.
773 IN is an rtx saying where the data are to be found before this instruction.
774 OUT says where they must be stored after the instruction.
775 (IN is zero for data not read, and OUT is zero for data not written.)
776 INLOC and OUTLOC point to the places in the instructions where
777 IN and OUT were found.
778 If IN and OUT are both non-zero, it means the same register must be used
779 to reload both IN and OUT.
781 CLASS is a register class required for the reloaded data.
782 INMODE is the machine mode that the instruction requires
783 for the reg that replaces IN and OUTMODE is likewise for OUT.
785 If IN is zero, then OUT's location and mode should be passed as
788 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
790 OPTIONAL nonzero means this reload does not need to be performed:
791 it can be discarded if that is more convenient.
793 OPNUM and TYPE say what the purpose of this reload is.
795 The return value is the reload-number for this reload.
797 If both IN and OUT are nonzero, in some rare cases we might
798 want to make two separate reloads. (Actually we never do this now.)
799 Therefore, the reload-number for OUT is stored in
800 output_reloadnum when we return; the return value applies to IN.
801 Usually (presently always), when IN and OUT are nonzero,
802 the two reload-numbers are equal, but the caller should be careful to
806 push_reload (in
, out
, inloc
, outloc
, class,
807 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
810 enum reg_class
class;
811 enum machine_mode inmode
, outmode
;
815 enum reload_type type
;
819 int dont_remove_subreg
= 0;
820 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
821 int secondary_in_reload
= -1, secondary_out_reload
= -1;
822 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
823 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
825 /* INMODE and/or OUTMODE could be VOIDmode if no mode
826 has been specified for the operand. In that case,
827 use the operand's mode as the mode to reload. */
828 if (inmode
== VOIDmode
&& in
!= 0)
829 inmode
= GET_MODE (in
);
830 if (outmode
== VOIDmode
&& out
!= 0)
831 outmode
= GET_MODE (out
);
833 /* If IN is a pseudo register everywhere-equivalent to a constant, and
834 it is not in a hard register, reload straight from the constant,
835 since we want to get rid of such pseudo registers.
836 Often this is done earlier, but not always in find_reloads_address. */
837 if (in
!= 0 && GET_CODE (in
) == REG
)
839 register int regno
= REGNO (in
);
841 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
842 && reg_equiv_constant
[regno
] != 0)
843 in
= reg_equiv_constant
[regno
];
846 /* Likewise for OUT. Of course, OUT will never be equivalent to
847 an actual constant, but it might be equivalent to a memory location
848 (in the case of a parameter). */
849 if (out
!= 0 && GET_CODE (out
) == REG
)
851 register int regno
= REGNO (out
);
853 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
854 && reg_equiv_constant
[regno
] != 0)
855 out
= reg_equiv_constant
[regno
];
858 /* If we have a read-write operand with an address side-effect,
859 change either IN or OUT so the side-effect happens only once. */
860 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
862 if (GET_CODE (XEXP (in
, 0)) == POST_INC
863 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
864 in
= gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
865 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
866 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
867 out
= gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
870 /* If we are reloading a (SUBREG constant ...), really reload just the
871 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
872 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
873 a pseudo and hence will become a MEM) with M1 wider than M2 and the
874 register is a pseudo, also reload the inside expression.
875 For machines that extend byte loads, do this for any SUBREG of a pseudo
876 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
877 M2 is an integral mode that gets extended when loaded.
878 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
879 either M1 is not valid for R or M2 is wider than a word but we only
880 need one word to store an M2-sized quantity in R.
881 (However, if OUT is nonzero, we need to reload the reg *and*
882 the subreg, so do nothing here, and let following statement handle it.)
884 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
885 we can't handle it here because CONST_INT does not indicate a mode.
887 Similarly, we must reload the inside expression if we have a
888 STRICT_LOW_PART (presumably, in == out in the cas).
890 Also reload the inner expression if it does not require a secondary
891 reload but the SUBREG does.
893 Finally, reload the inner expression if it is a register that is in
894 the class whose registers cannot be referenced in a different size
895 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
896 cannot reload just the inside since we might end up with the wrong
897 register class. But if it is inside a STRICT_LOW_PART, we have
898 no choice, so we hope we do get the right register class there. */
900 if (in
!= 0 && GET_CODE (in
) == SUBREG
901 && (SUBREG_WORD (in
) == 0 || strict_low
)
902 #ifdef CLASS_CANNOT_CHANGE_SIZE
903 && class != CLASS_CANNOT_CHANGE_SIZE
905 && (CONSTANT_P (SUBREG_REG (in
))
906 || GET_CODE (SUBREG_REG (in
)) == PLUS
908 || (((GET_CODE (SUBREG_REG (in
)) == REG
909 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
910 || GET_CODE (SUBREG_REG (in
)) == MEM
)
911 && ((GET_MODE_SIZE (inmode
)
912 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
913 #ifdef LOAD_EXTEND_OP
914 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
915 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
917 && (GET_MODE_SIZE (inmode
)
918 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
919 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
920 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
922 #ifdef WORD_REGISTER_OPERATIONS
923 || ((GET_MODE_SIZE (inmode
)
924 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
925 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
926 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
930 || (GET_CODE (SUBREG_REG (in
)) == REG
931 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
932 /* The case where out is nonzero
933 is handled differently in the following statement. */
934 && (out
== 0 || SUBREG_WORD (in
) == 0)
935 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
936 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
938 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
940 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
941 GET_MODE (SUBREG_REG (in
)))))
942 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
945 #ifdef SECONDARY_INPUT_RELOAD_CLASS
946 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
947 && (SECONDARY_INPUT_RELOAD_CLASS (class,
948 GET_MODE (SUBREG_REG (in
)),
952 #ifdef CLASS_CANNOT_CHANGE_SIZE
953 || (GET_CODE (SUBREG_REG (in
)) == REG
954 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
955 && (TEST_HARD_REG_BIT
956 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
957 REGNO (SUBREG_REG (in
))))
958 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
959 != GET_MODE_SIZE (inmode
)))
963 in_subreg_loc
= inloc
;
964 inloc
= &SUBREG_REG (in
);
966 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
967 if (GET_CODE (in
) == MEM
)
968 /* This is supposed to happen only for paradoxical subregs made by
969 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
970 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
973 inmode
= GET_MODE (in
);
976 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
977 either M1 is not valid for R or M2 is wider than a word but we only
978 need one word to store an M2-sized quantity in R.
980 However, we must reload the inner reg *as well as* the subreg in
983 /* Similar issue for (SUBREG constant ...) if it was not handled by the
984 code above. This can happen if SUBREG_WORD != 0. */
986 if (in
!= 0 && GET_CODE (in
) == SUBREG
987 && (CONSTANT_P (SUBREG_REG (in
))
988 || (GET_CODE (SUBREG_REG (in
)) == REG
989 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
990 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
))
993 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
994 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
996 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
998 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
999 GET_MODE (SUBREG_REG (in
)))))))))
1001 /* This relies on the fact that emit_reload_insns outputs the
1002 instructions for input reloads of type RELOAD_OTHER in the same
1003 order as the reloads. Thus if the outer reload is also of type
1004 RELOAD_OTHER, we are guaranteed that this inner reload will be
1005 output before the outer reload. */
1006 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1007 find_valid_class (inmode
, SUBREG_WORD (in
)),
1008 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1009 dont_remove_subreg
= 1;
1012 /* Similarly for paradoxical and problematical SUBREGs on the output.
1013 Note that there is no reason we need worry about the previous value
1014 of SUBREG_REG (out); even if wider than out,
1015 storing in a subreg is entitled to clobber it all
1016 (except in the case of STRICT_LOW_PART,
1017 and in that case the constraint should label it input-output.) */
1018 if (out
!= 0 && GET_CODE (out
) == SUBREG
1019 && (SUBREG_WORD (out
) == 0 || strict_low
)
1020 #ifdef CLASS_CANNOT_CHANGE_SIZE
1021 && class != CLASS_CANNOT_CHANGE_SIZE
1023 && (CONSTANT_P (SUBREG_REG (out
))
1025 || (((GET_CODE (SUBREG_REG (out
)) == REG
1026 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1027 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1028 && ((GET_MODE_SIZE (outmode
)
1029 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1030 #ifdef WORD_REGISTER_OPERATIONS
1031 || ((GET_MODE_SIZE (outmode
)
1032 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1033 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1034 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1038 || (GET_CODE (SUBREG_REG (out
)) == REG
1039 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1040 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1041 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1043 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1045 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1046 GET_MODE (SUBREG_REG (out
)))))
1047 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1048 + SUBREG_WORD (out
)),
1050 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1051 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1052 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1053 GET_MODE (SUBREG_REG (out
)),
1057 #ifdef CLASS_CANNOT_CHANGE_SIZE
1058 || (GET_CODE (SUBREG_REG (out
)) == REG
1059 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1060 && (TEST_HARD_REG_BIT
1061 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
1062 REGNO (SUBREG_REG (out
))))
1063 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1064 != GET_MODE_SIZE (outmode
)))
1068 out_subreg_loc
= outloc
;
1069 outloc
= &SUBREG_REG (out
);
1071 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1072 if (GET_CODE (out
) == MEM
1073 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1076 outmode
= GET_MODE (out
);
1079 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1080 either M1 is not valid for R or M2 is wider than a word but we only
1081 need one word to store an M2-sized quantity in R.
1083 However, we must reload the inner reg *as well as* the subreg in
1084 that case. In this case, the inner reg is an in-out reload. */
1086 if (out
!= 0 && GET_CODE (out
) == SUBREG
1087 && GET_CODE (SUBREG_REG (out
)) == REG
1088 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1089 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
),
1091 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1092 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1094 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1096 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1097 GET_MODE (SUBREG_REG (out
)))))))
1099 /* This relies on the fact that emit_reload_insns outputs the
1100 instructions for output reloads of type RELOAD_OTHER in reverse
1101 order of the reloads. Thus if the outer reload is also of type
1102 RELOAD_OTHER, we are guaranteed that this inner reload will be
1103 output after the outer reload. */
1104 dont_remove_subreg
= 1;
1105 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1107 find_valid_class (outmode
, SUBREG_WORD (out
)),
1108 VOIDmode
, VOIDmode
, 0, 0,
1109 opnum
, RELOAD_OTHER
);
1112 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1113 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1114 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1115 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1118 /* If IN is a SUBREG of a hard register, make a new REG. This
1119 simplifies some of the cases below. */
1121 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1122 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1123 && ! dont_remove_subreg
)
1124 in
= gen_rtx_REG (GET_MODE (in
),
1125 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1127 /* Similarly for OUT. */
1128 if (out
!= 0 && GET_CODE (out
) == SUBREG
1129 && GET_CODE (SUBREG_REG (out
)) == REG
1130 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1131 && ! dont_remove_subreg
)
1132 out
= gen_rtx_REG (GET_MODE (out
),
1133 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1135 /* Narrow down the class of register wanted if that is
1136 desirable on this machine for efficiency. */
1138 class = PREFERRED_RELOAD_CLASS (in
, class);
1140 /* Output reloads may need analogous treatment, different in detail. */
1141 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1143 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1146 /* Make sure we use a class that can handle the actual pseudo
1147 inside any subreg. For example, on the 386, QImode regs
1148 can appear within SImode subregs. Although GENERAL_REGS
1149 can handle SImode, QImode needs a smaller class. */
1150 #ifdef LIMIT_RELOAD_CLASS
1152 class = LIMIT_RELOAD_CLASS (inmode
, class);
1153 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1154 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1157 class = LIMIT_RELOAD_CLASS (outmode
, class);
1158 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1159 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1162 /* Verify that this class is at least possible for the mode that
1164 if (this_insn_is_asm
)
1166 enum machine_mode mode
;
1167 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1171 if (mode
== VOIDmode
)
1173 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1178 outmode
= word_mode
;
1180 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1181 if (HARD_REGNO_MODE_OK (i
, mode
)
1182 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1184 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1187 for (j
= 1; j
< nregs
; j
++)
1188 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1193 if (i
== FIRST_PSEUDO_REGISTER
)
1195 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1200 /* Optional output reloads are always OK even if we have no register class,
1201 since the function of these reloads is only to have spill_reg_store etc.
1202 set, so that the storing insn can be deleted later. */
1203 if (class == NO_REGS
1204 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1207 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1211 /* See if we need a secondary reload register to move between CLASS
1212 and IN or CLASS and OUT. Get the icode and push any required reloads
1213 needed for each of them if so. */
1215 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1218 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1219 &secondary_in_icode
);
1222 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1223 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1224 secondary_out_reload
1225 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1226 type
, &secondary_out_icode
);
1229 /* We found no existing reload suitable for re-use.
1230 So add an additional reload. */
1232 #ifdef SECONDARY_MEMORY_NEEDED
1233 /* If a memory location is needed for the copy, make one. */
1234 if (in
!= 0 && GET_CODE (in
) == REG
1235 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1236 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1238 get_secondary_mem (in
, inmode
, opnum
, type
);
1244 rld
[i
].class = class;
1245 rld
[i
].inmode
= inmode
;
1246 rld
[i
].outmode
= outmode
;
1248 rld
[i
].optional
= optional
;
1249 rld
[i
].nongroup
= 0;
1251 rld
[i
].nocombine
= 0;
1252 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1253 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1254 rld
[i
].opnum
= opnum
;
1255 rld
[i
].when_needed
= type
;
1256 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1257 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1258 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1259 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1260 rld
[i
].secondary_p
= 0;
1264 #ifdef SECONDARY_MEMORY_NEEDED
1265 if (out
!= 0 && GET_CODE (out
) == REG
1266 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1267 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1269 get_secondary_mem (out
, outmode
, opnum
, type
);
1274 /* We are reusing an existing reload,
1275 but we may have additional information for it.
1276 For example, we may now have both IN and OUT
1277 while the old one may have just one of them. */
1279 /* The modes can be different. If they are, we want to reload in
1280 the larger mode, so that the value is valid for both modes. */
1281 if (inmode
!= VOIDmode
1282 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1283 rld
[i
].inmode
= inmode
;
1284 if (outmode
!= VOIDmode
1285 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1286 rld
[i
].outmode
= outmode
;
1289 rtx in_reg
= inloc
? *inloc
: 0;
1290 /* If we merge reloads for two distinct rtl expressions that
1291 are identical in content, there might be duplicate address
1292 reloads. Remove the extra set now, so that if we later find
1293 that we can inherit this reload, we can get rid of the
1294 address reloads altogether.
1296 Do not do this if both reloads are optional since the result
1297 would be an optional reload which could potentially leave
1298 unresolved address replacements.
1300 It is not sufficient to call transfer_replacements since
1301 choose_reload_regs will remove the replacements for address
1302 reloads of inherited reloads which results in the same
1304 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1305 && ! (rld
[i
].optional
&& optional
))
1307 /* We must keep the address reload with the lower operand
1309 if (opnum
> rld
[i
].opnum
)
1311 remove_address_replacements (in
);
1313 in_reg
= rld
[i
].in_reg
;
1316 remove_address_replacements (rld
[i
].in
);
1319 rld
[i
].in_reg
= in_reg
;
1324 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1326 if (reg_class_subset_p (class, rld
[i
].class))
1327 rld
[i
].class = class;
1328 rld
[i
].optional
&= optional
;
1329 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1330 opnum
, rld
[i
].opnum
))
1331 rld
[i
].when_needed
= RELOAD_OTHER
;
1332 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1335 /* If the ostensible rtx being reload differs from the rtx found
1336 in the location to substitute, this reload is not safe to combine
1337 because we cannot reliably tell whether it appears in the insn. */
1339 if (in
!= 0 && in
!= *inloc
)
1340 rld
[i
].nocombine
= 1;
1343 /* This was replaced by changes in find_reloads_address_1 and the new
1344 function inc_for_reload, which go with a new meaning of reload_inc. */
1346 /* If this is an IN/OUT reload in an insn that sets the CC,
1347 it must be for an autoincrement. It doesn't work to store
1348 the incremented value after the insn because that would clobber the CC.
1349 So we must do the increment of the value reloaded from,
1350 increment it, store it back, then decrement again. */
1351 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1355 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1356 /* If we did not find a nonzero amount-to-increment-by,
1357 that contradicts the belief that IN is being incremented
1358 in an address in this insn. */
1359 if (rld
[i
].inc
== 0)
1364 /* If we will replace IN and OUT with the reload-reg,
1365 record where they are located so that substitution need
1366 not do a tree walk. */
1368 if (replace_reloads
)
1372 register struct replacement
*r
= &replacements
[n_replacements
++];
1374 r
->subreg_loc
= in_subreg_loc
;
1378 if (outloc
!= 0 && outloc
!= inloc
)
1380 register struct replacement
*r
= &replacements
[n_replacements
++];
1383 r
->subreg_loc
= out_subreg_loc
;
1388 /* If this reload is just being introduced and it has both
1389 an incoming quantity and an outgoing quantity that are
1390 supposed to be made to match, see if either one of the two
1391 can serve as the place to reload into.
1393 If one of them is acceptable, set rld[i].reg_rtx
1396 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1398 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1401 earlyclobber_operand_p (out
));
1403 /* If the outgoing register already contains the same value
1404 as the incoming one, we can dispense with loading it.
1405 The easiest way to tell the caller that is to give a phony
1406 value for the incoming operand (same as outgoing one). */
1407 if (rld
[i
].reg_rtx
== out
1408 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1409 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1410 static_reload_reg_p
, i
, inmode
))
1414 /* If this is an input reload and the operand contains a register that
1415 dies in this insn and is used nowhere else, see if it is the right class
1416 to be used for this reload. Use it if so. (This occurs most commonly
1417 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1418 this if it is also an output reload that mentions the register unless
1419 the output is a SUBREG that clobbers an entire register.
1421 Note that the operand might be one of the spill regs, if it is a
1422 pseudo reg and we are in a block where spilling has not taken place.
1423 But if there is no spilling in this block, that is OK.
1424 An explicitly used hard reg cannot be a spill reg. */
1426 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1431 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1432 if (REG_NOTE_KIND (note
) == REG_DEAD
1433 && GET_CODE (XEXP (note
, 0)) == REG
1434 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1435 && reg_mentioned_p (XEXP (note
, 0), in
)
1436 && ! refers_to_regno_for_reload_p (regno
,
1438 + HARD_REGNO_NREGS (regno
,
1440 PATTERN (this_insn
), inloc
)
1441 /* If this is also an output reload, IN cannot be used as
1442 the reload register if it is set in this insn unless IN
1444 && (out
== 0 || in
== out
1445 || ! hard_reg_set_here_p (regno
,
1447 + HARD_REGNO_NREGS (regno
,
1449 PATTERN (this_insn
)))
1450 /* ??? Why is this code so different from the previous?
1451 Is there any simple coherent way to describe the two together?
1452 What's going on here. */
1454 || (GET_CODE (in
) == SUBREG
1455 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1457 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1458 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1459 /* Make sure the operand fits in the reg that dies. */
1460 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1461 && HARD_REGNO_MODE_OK (regno
, inmode
)
1462 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1463 && HARD_REGNO_MODE_OK (regno
, outmode
)
1464 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1465 && !fixed_regs
[regno
])
1467 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1473 output_reloadnum
= i
;
1478 /* Record an additional place we must replace a value
1479 for which we have already recorded a reload.
1480 RELOADNUM is the value returned by push_reload
1481 when the reload was recorded.
1482 This is used in insn patterns that use match_dup. */
1485 push_replacement (loc
, reloadnum
, mode
)
1488 enum machine_mode mode
;
1490 if (replace_reloads
)
1492 register struct replacement
*r
= &replacements
[n_replacements
++];
1493 r
->what
= reloadnum
;
1500 /* Transfer all replacements that used to be in reload FROM to be in
1504 transfer_replacements (to
, from
)
1509 for (i
= 0; i
< n_replacements
; i
++)
1510 if (replacements
[i
].what
== from
)
1511 replacements
[i
].what
= to
;
1514 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1515 or a subpart of it. If we have any replacements registered for IN_RTX,
1516 cancel the reloads that were supposed to load them.
1517 Return non-zero if we canceled any reloads. */
1519 remove_address_replacements (in_rtx
)
1523 char reload_flags
[MAX_RELOADS
];
1524 int something_changed
= 0;
1526 bzero (reload_flags
, sizeof reload_flags
);
1527 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1529 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1530 reload_flags
[replacements
[i
].what
] |= 1;
1533 replacements
[j
++] = replacements
[i
];
1534 reload_flags
[replacements
[i
].what
] |= 2;
1537 /* Note that the following store must be done before the recursive calls. */
1540 for (i
= n_reloads
- 1; i
>= 0; i
--)
1542 if (reload_flags
[i
] == 1)
1544 deallocate_reload_reg (i
);
1545 remove_address_replacements (rld
[i
].in
);
1547 something_changed
= 1;
1550 return something_changed
;
1553 /* Return non-zero if IN contains a piece of rtl that has the address LOC */
1555 loc_mentioned_in_p (loc
, in
)
1558 enum rtx_code code
= GET_CODE (in
);
1559 const char *fmt
= GET_RTX_FORMAT (code
);
1562 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1564 if (loc
== &in
->fld
[i
].rtx
)
1568 if (loc_mentioned_in_p (loc
, XEXP (in
, i
)))
1571 else if (fmt
[i
] == 'E')
1572 for (j
= XVECLEN (in
, i
) - 1; i
>= 0; i
--)
1573 if (loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
1579 /* If there is only one output reload, and it is not for an earlyclobber
1580 operand, try to combine it with a (logically unrelated) input reload
1581 to reduce the number of reload registers needed.
1583 This is safe if the input reload does not appear in
1584 the value being output-reloaded, because this implies
1585 it is not needed any more once the original insn completes.
1587 If that doesn't work, see we can use any of the registers that
1588 die in this insn as a reload register. We can if it is of the right
1589 class and does not appear in the value being output-reloaded. */
1595 int output_reload
= -1;
1596 int secondary_out
= -1;
1599 /* Find the output reload; return unless there is exactly one
1600 and that one is mandatory. */
1602 for (i
= 0; i
< n_reloads
; i
++)
1603 if (rld
[i
].out
!= 0)
1605 if (output_reload
>= 0)
1610 if (output_reload
< 0 || rld
[output_reload
].optional
)
1613 /* An input-output reload isn't combinable. */
1615 if (rld
[output_reload
].in
!= 0)
1618 /* If this reload is for an earlyclobber operand, we can't do anything. */
1619 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1622 /* Check each input reload; can we combine it? */
1624 for (i
= 0; i
< n_reloads
; i
++)
1625 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1626 /* Life span of this reload must not extend past main insn. */
1627 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1628 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1629 && rld
[i
].when_needed
!= RELOAD_OTHER
1630 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1631 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1632 rld
[output_reload
].outmode
))
1634 && rld
[i
].reg_rtx
== 0
1635 #ifdef SECONDARY_MEMORY_NEEDED
1636 /* Don't combine two reloads with different secondary
1637 memory locations. */
1638 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1639 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1640 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1641 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1643 && (SMALL_REGISTER_CLASSES
1644 ? (rld
[i
].class == rld
[output_reload
].class)
1645 : (reg_class_subset_p (rld
[i
].class,
1646 rld
[output_reload
].class)
1647 || reg_class_subset_p (rld
[output_reload
].class,
1649 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1650 /* Args reversed because the first arg seems to be
1651 the one that we imagine being modified
1652 while the second is the one that might be affected. */
1653 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1655 /* However, if the input is a register that appears inside
1656 the output, then we also can't share.
1657 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1658 If the same reload reg is used for both reg 69 and the
1659 result to be stored in memory, then that result
1660 will clobber the address of the memory ref. */
1661 && ! (GET_CODE (rld
[i
].in
) == REG
1662 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1663 rld
[output_reload
].out
))))
1664 && (reg_class_size
[(int) rld
[i
].class]
1665 || SMALL_REGISTER_CLASSES
)
1666 /* We will allow making things slightly worse by combining an
1667 input and an output, but no worse than that. */
1668 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1669 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1673 /* We have found a reload to combine with! */
1674 rld
[i
].out
= rld
[output_reload
].out
;
1675 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1676 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1677 /* Mark the old output reload as inoperative. */
1678 rld
[output_reload
].out
= 0;
1679 /* The combined reload is needed for the entire insn. */
1680 rld
[i
].when_needed
= RELOAD_OTHER
;
1681 /* If the output reload had a secondary reload, copy it. */
1682 if (rld
[output_reload
].secondary_out_reload
!= -1)
1684 rld
[i
].secondary_out_reload
1685 = rld
[output_reload
].secondary_out_reload
;
1686 rld
[i
].secondary_out_icode
1687 = rld
[output_reload
].secondary_out_icode
;
1690 #ifdef SECONDARY_MEMORY_NEEDED
1691 /* Copy any secondary MEM. */
1692 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1693 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1694 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1696 /* If required, minimize the register class. */
1697 if (reg_class_subset_p (rld
[output_reload
].class,
1699 rld
[i
].class = rld
[output_reload
].class;
1701 /* Transfer all replacements from the old reload to the combined. */
1702 for (j
= 0; j
< n_replacements
; j
++)
1703 if (replacements
[j
].what
== output_reload
)
1704 replacements
[j
].what
= i
;
1709 /* If this insn has only one operand that is modified or written (assumed
1710 to be the first), it must be the one corresponding to this reload. It
1711 is safe to use anything that dies in this insn for that output provided
1712 that it does not occur in the output (we already know it isn't an
1713 earlyclobber. If this is an asm insn, give up. */
1715 if (INSN_CODE (this_insn
) == -1)
1718 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1719 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1720 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1723 /* See if some hard register that dies in this insn and is not used in
1724 the output is the right class. Only works if the register we pick
1725 up can fully hold our output reload. */
1726 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1727 if (REG_NOTE_KIND (note
) == REG_DEAD
1728 && GET_CODE (XEXP (note
, 0)) == REG
1729 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1730 rld
[output_reload
].out
)
1731 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1732 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1733 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1734 REGNO (XEXP (note
, 0)))
1735 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1736 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1737 /* Ensure that a secondary or tertiary reload for this output
1738 won't want this register. */
1739 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1740 || (! (TEST_HARD_REG_BIT
1741 (reg_class_contents
[(int) rld
[secondary_out
].class],
1742 REGNO (XEXP (note
, 0))))
1743 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1744 || ! (TEST_HARD_REG_BIT
1745 (reg_class_contents
[(int) rld
[secondary_out
].class],
1746 REGNO (XEXP (note
, 0)))))))
1747 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1749 rld
[output_reload
].reg_rtx
1750 = gen_rtx_REG (rld
[output_reload
].outmode
,
1751 REGNO (XEXP (note
, 0)));
1756 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1757 See if one of IN and OUT is a register that may be used;
1758 this is desirable since a spill-register won't be needed.
1759 If so, return the register rtx that proves acceptable.
1761 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1762 CLASS is the register class required for the reload.
1764 If FOR_REAL is >= 0, it is the number of the reload,
1765 and in some cases when it can be discovered that OUT doesn't need
1766 to be computed, clear out rld[FOR_REAL].out.
1768 If FOR_REAL is -1, this should not be done, because this call
1769 is just to see if a register can be found, not to find and install it.
1771 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1772 puts an additional constraint on being able to use IN for OUT since
1773 IN must not appear elsewhere in the insn (it is assumed that IN itself
1774 is safe from the earlyclobber). */
1777 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1778 inmode
, outmode
, class, for_real
, earlyclobber
)
1779 rtx real_in
, real_out
;
1780 rtx
*inloc
, *outloc
;
1781 enum machine_mode inmode
, outmode
;
1782 enum reg_class
class;
1792 /* If operands exceed a word, we can't use either of them
1793 unless they have the same size. */
1794 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1795 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1796 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1799 /* Find the inside of any subregs. */
1800 while (GET_CODE (out
) == SUBREG
)
1802 out_offset
= SUBREG_WORD (out
);
1803 out
= SUBREG_REG (out
);
1805 while (GET_CODE (in
) == SUBREG
)
1807 in_offset
= SUBREG_WORD (in
);
1808 in
= SUBREG_REG (in
);
1811 /* Narrow down the reg class, the same way push_reload will;
1812 otherwise we might find a dummy now, but push_reload won't. */
1813 class = PREFERRED_RELOAD_CLASS (in
, class);
1815 /* See if OUT will do. */
1816 if (GET_CODE (out
) == REG
1817 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1819 register int regno
= REGNO (out
) + out_offset
;
1820 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1823 /* When we consider whether the insn uses OUT,
1824 ignore references within IN. They don't prevent us
1825 from copying IN into OUT, because those refs would
1826 move into the insn that reloads IN.
1828 However, we only ignore IN in its role as this reload.
1829 If the insn uses IN elsewhere and it contains OUT,
1830 that counts. We can't be sure it's the "same" operand
1831 so it might not go through this reload. */
1833 *inloc
= const0_rtx
;
1835 if (regno
< FIRST_PSEUDO_REGISTER
1836 /* A fixed reg that can overlap other regs better not be used
1837 for reloading in any way. */
1838 #ifdef OVERLAPPING_REGNO_P
1839 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1841 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1842 PATTERN (this_insn
), outloc
))
1845 for (i
= 0; i
< nwords
; i
++)
1846 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1852 if (GET_CODE (real_out
) == REG
)
1855 value
= gen_rtx_REG (outmode
, regno
);
1862 /* Consider using IN if OUT was not acceptable
1863 or if OUT dies in this insn (like the quotient in a divmod insn).
1864 We can't use IN unless it is dies in this insn,
1865 which means we must know accurately which hard regs are live.
1866 Also, the result can't go in IN if IN is used within OUT,
1867 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1868 if (hard_regs_live_known
1869 && GET_CODE (in
) == REG
1870 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1872 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1873 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1874 && !fixed_regs
[REGNO (in
)]
1875 && HARD_REGNO_MODE_OK (REGNO (in
),
1876 /* The only case where out and real_out might
1877 have different modes is where real_out
1878 is a subreg, and in that case, out
1880 (GET_MODE (out
) != VOIDmode
1881 ? GET_MODE (out
) : outmode
)))
1883 register int regno
= REGNO (in
) + in_offset
;
1884 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1886 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1887 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1888 PATTERN (this_insn
))
1890 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1891 PATTERN (this_insn
), inloc
)))
1894 for (i
= 0; i
< nwords
; i
++)
1895 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1901 /* If we were going to use OUT as the reload reg
1902 and changed our mind, it means OUT is a dummy that
1903 dies here. So don't bother copying value to it. */
1904 if (for_real
>= 0 && value
== real_out
)
1905 rld
[for_real
].out
= 0;
1906 if (GET_CODE (real_in
) == REG
)
1909 value
= gen_rtx_REG (inmode
, regno
);
1917 /* This page contains subroutines used mainly for determining
1918 whether the IN or an OUT of a reload can serve as the
1921 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1924 earlyclobber_operand_p (x
)
1929 for (i
= 0; i
< n_earlyclobbers
; i
++)
1930 if (reload_earlyclobbers
[i
] == x
)
1936 /* Return 1 if expression X alters a hard reg in the range
1937 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1938 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1939 X should be the body of an instruction. */
1942 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1943 register int beg_regno
, end_regno
;
1946 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1948 register rtx op0
= SET_DEST (x
);
1949 while (GET_CODE (op0
) == SUBREG
)
1950 op0
= SUBREG_REG (op0
);
1951 if (GET_CODE (op0
) == REG
)
1953 register int r
= REGNO (op0
);
1954 /* See if this reg overlaps range under consideration. */
1956 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1960 else if (GET_CODE (x
) == PARALLEL
)
1962 register int i
= XVECLEN (x
, 0) - 1;
1964 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1971 /* Return 1 if ADDR is a valid memory address for mode MODE,
1972 and check that each pseudo reg has the proper kind of
1976 strict_memory_address_p (mode
, addr
)
1977 enum machine_mode mode
;
1980 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1987 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1988 if they are the same hard reg, and has special hacks for
1989 autoincrement and autodecrement.
1990 This is specifically intended for find_reloads to use
1991 in determining whether two operands match.
1992 X is the operand whose number is the lower of the two.
1994 The value is 2 if Y contains a pre-increment that matches
1995 a non-incrementing address in X. */
1997 /* ??? To be completely correct, we should arrange to pass
1998 for X the output operand and for Y the input operand.
1999 For now, we assume that the output operand has the lower number
2000 because that is natural in (SET output (... input ...)). */
2003 operands_match_p (x
, y
)
2007 register RTX_CODE code
= GET_CODE (x
);
2008 register const char *fmt
;
2013 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2014 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2015 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2021 i
= REGNO (SUBREG_REG (x
));
2022 if (i
>= FIRST_PSEUDO_REGISTER
)
2024 i
+= SUBREG_WORD (x
);
2029 if (GET_CODE (y
) == SUBREG
)
2031 j
= REGNO (SUBREG_REG (y
));
2032 if (j
>= FIRST_PSEUDO_REGISTER
)
2034 j
+= SUBREG_WORD (y
);
2039 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2040 multiple hard register group, so that for example (reg:DI 0) and
2041 (reg:SI 1) will be considered the same register. */
2042 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2043 && i
< FIRST_PSEUDO_REGISTER
)
2044 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2045 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2046 && j
< FIRST_PSEUDO_REGISTER
)
2047 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2051 /* If two operands must match, because they are really a single
2052 operand of an assembler insn, then two postincrements are invalid
2053 because the assembler insn would increment only once.
2054 On the other hand, an postincrement matches ordinary indexing
2055 if the postincrement is the output operand. */
2056 if (code
== POST_DEC
|| code
== POST_INC
)
2057 return operands_match_p (XEXP (x
, 0), y
);
2058 /* Two preincrements are invalid
2059 because the assembler insn would increment only once.
2060 On the other hand, an preincrement matches ordinary indexing
2061 if the preincrement is the input operand.
2062 In this case, return 2, since some callers need to do special
2063 things when this happens. */
2064 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
2065 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2069 /* Now we have disposed of all the cases
2070 in which different rtx codes can match. */
2071 if (code
!= GET_CODE (y
))
2073 if (code
== LABEL_REF
)
2074 return XEXP (x
, 0) == XEXP (y
, 0);
2075 if (code
== SYMBOL_REF
)
2076 return XSTR (x
, 0) == XSTR (y
, 0);
2078 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2080 if (GET_MODE (x
) != GET_MODE (y
))
2083 /* Compare the elements. If any pair of corresponding elements
2084 fail to match, return 0 for the whole things. */
2087 fmt
= GET_RTX_FORMAT (code
);
2088 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2094 if (XWINT (x
, i
) != XWINT (y
, i
))
2099 if (XINT (x
, i
) != XINT (y
, i
))
2104 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2107 /* If any subexpression returns 2,
2108 we should return 2 if we are successful. */
2117 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2119 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2121 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2129 /* It is believed that rtx's at this level will never
2130 contain anything but integers and other rtx's,
2131 except for within LABEL_REFs and SYMBOL_REFs. */
2136 return 1 + success_2
;
2139 /* Describe the range of registers or memory referenced by X.
2140 If X is a register, set REG_FLAG and put the first register
2141 number into START and the last plus one into END.
2142 If X is a memory reference, put a base address into BASE
2143 and a range of integer offsets into START and END.
2144 If X is pushing on the stack, we can assume it causes no trouble,
2145 so we set the SAFE field. */
2147 static struct decomposition
2151 struct decomposition val
;
2157 if (GET_CODE (x
) == MEM
)
2159 rtx base
= NULL_RTX
, offset
= 0;
2160 rtx addr
= XEXP (x
, 0);
2162 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2163 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2165 val
.base
= XEXP (addr
, 0);
2166 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2167 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2168 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2172 if (GET_CODE (addr
) == CONST
)
2174 addr
= XEXP (addr
, 0);
2177 if (GET_CODE (addr
) == PLUS
)
2179 if (CONSTANT_P (XEXP (addr
, 0)))
2181 base
= XEXP (addr
, 1);
2182 offset
= XEXP (addr
, 0);
2184 else if (CONSTANT_P (XEXP (addr
, 1)))
2186 base
= XEXP (addr
, 0);
2187 offset
= XEXP (addr
, 1);
2194 offset
= const0_rtx
;
2196 if (GET_CODE (offset
) == CONST
)
2197 offset
= XEXP (offset
, 0);
2198 if (GET_CODE (offset
) == PLUS
)
2200 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2202 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2203 offset
= XEXP (offset
, 0);
2205 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2207 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2208 offset
= XEXP (offset
, 1);
2212 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2213 offset
= const0_rtx
;
2216 else if (GET_CODE (offset
) != CONST_INT
)
2218 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2219 offset
= const0_rtx
;
2222 if (all_const
&& GET_CODE (base
) == PLUS
)
2223 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2225 if (GET_CODE (offset
) != CONST_INT
)
2228 val
.start
= INTVAL (offset
);
2229 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2233 else if (GET_CODE (x
) == REG
)
2236 val
.start
= true_regnum (x
);
2239 /* A pseudo with no hard reg. */
2240 val
.start
= REGNO (x
);
2241 val
.end
= val
.start
+ 1;
2245 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2247 else if (GET_CODE (x
) == SUBREG
)
2249 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2250 /* This could be more precise, but it's good enough. */
2251 return decompose (SUBREG_REG (x
));
2253 val
.start
= true_regnum (x
);
2255 return decompose (SUBREG_REG (x
));
2258 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2260 else if (CONSTANT_P (x
)
2261 /* This hasn't been assigned yet, so it can't conflict yet. */
2262 || GET_CODE (x
) == SCRATCH
)
2269 /* Return 1 if altering Y will not modify the value of X.
2270 Y is also described by YDATA, which should be decompose (Y). */
2273 immune_p (x
, y
, ydata
)
2275 struct decomposition ydata
;
2277 struct decomposition xdata
;
2280 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2284 if (GET_CODE (y
) != MEM
)
2286 /* If Y is memory and X is not, Y can't affect X. */
2287 if (GET_CODE (x
) != MEM
)
2290 xdata
= decompose (x
);
2292 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2294 /* If bases are distinct symbolic constants, there is no overlap. */
2295 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2297 /* Constants and stack slots never overlap. */
2298 if (CONSTANT_P (xdata
.base
)
2299 && (ydata
.base
== frame_pointer_rtx
2300 || ydata
.base
== hard_frame_pointer_rtx
2301 || ydata
.base
== stack_pointer_rtx
))
2303 if (CONSTANT_P (ydata
.base
)
2304 && (xdata
.base
== frame_pointer_rtx
2305 || xdata
.base
== hard_frame_pointer_rtx
2306 || xdata
.base
== stack_pointer_rtx
))
2308 /* If either base is variable, we don't know anything. */
2313 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2316 /* Similar, but calls decompose. */
2319 safe_from_earlyclobber (op
, clobber
)
2322 struct decomposition early_data
;
2324 early_data
= decompose (clobber
);
2325 return immune_p (op
, clobber
, early_data
);
2328 /* Main entry point of this file: search the body of INSN
2329 for values that need reloading and record them with push_reload.
2330 REPLACE nonzero means record also where the values occur
2331 so that subst_reloads can be used.
2333 IND_LEVELS says how many levels of indirection are supported by this
2334 machine; a value of zero means that a memory reference is not a valid
2337 LIVE_KNOWN says we have valid information about which hard
2338 regs are live at each point in the program; this is true when
2339 we are called from global_alloc but false when stupid register
2340 allocation has been done.
2342 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2343 which is nonnegative if the reg has been commandeered for reloading into.
2344 It is copied into STATIC_RELOAD_REG_P and referenced from there
2345 by various subroutines.
2347 Return TRUE if some operands need to be changed, because of swapping
2348 commutative operands, reg_equiv_address substitution, or whatever. */
2351 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2353 int replace
, ind_levels
;
2355 short *reload_reg_p
;
2357 register int insn_code_number
;
2360 /* These start out as the constraints for the insn
2361 and they are chewed up as we consider alternatives. */
2362 char *constraints
[MAX_RECOG_OPERANDS
];
2363 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2365 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2366 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2367 /* Nonzero for a MEM operand whose entire address needs a reload. */
2368 int address_reloaded
[MAX_RECOG_OPERANDS
];
2369 /* Value of enum reload_type to use for operand. */
2370 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2371 /* Value of enum reload_type to use within address of operand. */
2372 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2373 /* Save the usage of each operand. */
2374 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2375 int no_input_reloads
= 0, no_output_reloads
= 0;
2377 int this_alternative
[MAX_RECOG_OPERANDS
];
2378 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2379 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2380 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2381 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2383 int goal_alternative
[MAX_RECOG_OPERANDS
];
2384 int this_alternative_number
;
2385 int goal_alternative_number
;
2386 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2387 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2388 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2389 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2390 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2391 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2392 int goal_alternative_swapped
;
2396 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2397 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2398 rtx body
= PATTERN (insn
);
2399 rtx set
= single_set (insn
);
2400 int goal_earlyclobber
, this_earlyclobber
;
2401 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2407 n_earlyclobbers
= 0;
2408 replace_reloads
= replace
;
2409 hard_regs_live_known
= live_known
;
2410 static_reload_reg_p
= reload_reg_p
;
2412 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2413 neither are insns that SET cc0. Insns that use CC0 are not allowed
2414 to have any input reloads. */
2415 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2416 no_output_reloads
= 1;
2419 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2420 no_input_reloads
= 1;
2421 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2422 no_output_reloads
= 1;
2425 #ifdef SECONDARY_MEMORY_NEEDED
2426 /* The eliminated forms of any secondary memory locations are per-insn, so
2427 clear them out here. */
2429 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2432 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2433 is cheap to move between them. If it is not, there may not be an insn
2434 to do the copy, so we may need a reload. */
2435 if (GET_CODE (body
) == SET
2436 && GET_CODE (SET_DEST (body
)) == REG
2437 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2438 && GET_CODE (SET_SRC (body
)) == REG
2439 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2440 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2441 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2444 extract_insn (insn
);
2446 noperands
= reload_n_operands
= recog_data
.n_operands
;
2447 n_alternatives
= recog_data
.n_alternatives
;
2449 /* Just return "no reloads" if insn has no operands with constraints. */
2450 if (noperands
== 0 || n_alternatives
== 0)
2453 insn_code_number
= INSN_CODE (insn
);
2454 this_insn_is_asm
= insn_code_number
< 0;
2456 memcpy (operand_mode
, recog_data
.operand_mode
,
2457 noperands
* sizeof (enum machine_mode
));
2458 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2462 /* If we will need to know, later, whether some pair of operands
2463 are the same, we must compare them now and save the result.
2464 Reloading the base and index registers will clobber them
2465 and afterward they will fail to match. */
2467 for (i
= 0; i
< noperands
; i
++)
2472 substed_operand
[i
] = recog_data
.operand
[i
];
2475 modified
[i
] = RELOAD_READ
;
2477 /* Scan this operand's constraint to see if it is an output operand,
2478 an in-out operand, is commutative, or should match another. */
2483 modified
[i
] = RELOAD_WRITE
;
2485 modified
[i
] = RELOAD_READ_WRITE
;
2488 /* The last operand should not be marked commutative. */
2489 if (i
== noperands
- 1)
2494 else if (c
>= '0' && c
<= '9')
2497 operands_match
[c
][i
]
2498 = operands_match_p (recog_data
.operand
[c
],
2499 recog_data
.operand
[i
]);
2501 /* An operand may not match itself. */
2505 /* If C can be commuted with C+1, and C might need to match I,
2506 then C+1 might also need to match I. */
2507 if (commutative
>= 0)
2509 if (c
== commutative
|| c
== commutative
+ 1)
2511 int other
= c
+ (c
== commutative
? 1 : -1);
2512 operands_match
[other
][i
]
2513 = operands_match_p (recog_data
.operand
[other
],
2514 recog_data
.operand
[i
]);
2516 if (i
== commutative
|| i
== commutative
+ 1)
2518 int other
= i
+ (i
== commutative
? 1 : -1);
2519 operands_match
[c
][other
]
2520 = operands_match_p (recog_data
.operand
[c
],
2521 recog_data
.operand
[other
]);
2523 /* Note that C is supposed to be less than I.
2524 No need to consider altering both C and I because in
2525 that case we would alter one into the other. */
2531 /* Examine each operand that is a memory reference or memory address
2532 and reload parts of the addresses into index registers.
2533 Also here any references to pseudo regs that didn't get hard regs
2534 but are equivalent to constants get replaced in the insn itself
2535 with those constants. Nobody will ever see them again.
2537 Finally, set up the preferred classes of each operand. */
2539 for (i
= 0; i
< noperands
; i
++)
2541 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2543 address_reloaded
[i
] = 0;
2544 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2545 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2548 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2549 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2552 if (*constraints
[i
] == 0)
2553 /* Ignore things like match_operator operands. */
2555 else if (constraints
[i
][0] == 'p')
2557 find_reloads_address (VOIDmode
, NULL_PTR
,
2558 recog_data
.operand
[i
],
2559 recog_data
.operand_loc
[i
],
2560 i
, operand_type
[i
], ind_levels
, insn
);
2562 /* If we now have a simple operand where we used to have a
2563 PLUS or MULT, re-recognize and try again. */
2564 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2565 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2566 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2567 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2569 INSN_CODE (insn
) = -1;
2570 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2575 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2576 substed_operand
[i
] = recog_data
.operand
[i
];
2578 else if (code
== MEM
)
2581 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2582 recog_data
.operand_loc
[i
],
2583 XEXP (recog_data
.operand
[i
], 0),
2584 &XEXP (recog_data
.operand
[i
], 0),
2585 i
, address_type
[i
], ind_levels
, insn
);
2586 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2587 substed_operand
[i
] = recog_data
.operand
[i
];
2589 else if (code
== SUBREG
)
2591 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2593 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2596 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2599 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2600 that didn't get a hard register, emit a USE with a REG_EQUAL
2601 note in front so that we might inherit a previous, possibly
2605 && GET_CODE (op
) == MEM
2606 && GET_CODE (reg
) == REG
2607 && (GET_MODE_SIZE (GET_MODE (reg
))
2608 >= GET_MODE_SIZE (GET_MODE (op
))))
2609 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2610 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2611 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2613 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2615 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2616 /* We can get a PLUS as an "operand" as a result of register
2617 elimination. See eliminate_regs and gen_reload. We handle
2618 a unary operator by reloading the operand. */
2619 substed_operand
[i
] = recog_data
.operand
[i
]
2620 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2621 ind_levels
, 0, insn
);
2622 else if (code
== REG
)
2624 /* This is equivalent to calling find_reloads_toplev.
2625 The code is duplicated for speed.
2626 When we find a pseudo always equivalent to a constant,
2627 we replace it by the constant. We must be sure, however,
2628 that we don't try to replace it in the insn in which it
2630 register int regno
= REGNO (recog_data
.operand
[i
]);
2631 if (reg_equiv_constant
[regno
] != 0
2632 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2634 /* Record the existing mode so that the check if constants are
2635 allowed will work when operand_mode isn't specified. */
2637 if (operand_mode
[i
] == VOIDmode
)
2638 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2640 substed_operand
[i
] = recog_data
.operand
[i
]
2641 = reg_equiv_constant
[regno
];
2643 if (reg_equiv_memory_loc
[regno
] != 0
2644 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2645 /* We need not give a valid is_set_dest argument since the case
2646 of a constant equivalence was checked above. */
2647 substed_operand
[i
] = recog_data
.operand
[i
]
2648 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2649 ind_levels
, 0, insn
);
2651 /* If the operand is still a register (we didn't replace it with an
2652 equivalent), get the preferred class to reload it into. */
2653 code
= GET_CODE (recog_data
.operand
[i
]);
2655 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2656 >= FIRST_PSEUDO_REGISTER
)
2657 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2661 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2662 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2666 /* If we made any reloads for addresses, see if they violate a
2667 "no input reloads" requirement for this insn. */
2668 if (no_input_reloads
)
2669 for (i
= 0; i
< n_reloads
; i
++)
2674 /* If this is simply a copy from operand 1 to operand 0, merge the
2675 preferred classes for the operands. */
2676 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2677 && recog_data
.operand
[1] == SET_SRC (set
))
2679 preferred_class
[0] = preferred_class
[1]
2680 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2681 pref_or_nothing
[0] |= pref_or_nothing
[1];
2682 pref_or_nothing
[1] |= pref_or_nothing
[0];
2685 /* Now see what we need for pseudo-regs that didn't get hard regs
2686 or got the wrong kind of hard reg. For this, we must consider
2687 all the operands together against the register constraints. */
2689 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2692 goal_alternative_swapped
= 0;
2695 /* The constraints are made of several alternatives.
2696 Each operand's constraint looks like foo,bar,... with commas
2697 separating the alternatives. The first alternatives for all
2698 operands go together, the second alternatives go together, etc.
2700 First loop over alternatives. */
2702 for (this_alternative_number
= 0;
2703 this_alternative_number
< n_alternatives
;
2704 this_alternative_number
++)
2706 /* Loop over operands for one constraint alternative. */
2707 /* LOSERS counts those that don't fit this alternative
2708 and would require loading. */
2710 /* BAD is set to 1 if it some operand can't fit this alternative
2711 even after reloading. */
2713 /* REJECT is a count of how undesirable this alternative says it is
2714 if any reloading is required. If the alternative matches exactly
2715 then REJECT is ignored, but otherwise it gets this much
2716 counted against it in addition to the reloading needed. Each
2717 ? counts three times here since we want the disparaging caused by
2718 a bad register class to only count 1/3 as much. */
2721 this_earlyclobber
= 0;
2723 for (i
= 0; i
< noperands
; i
++)
2725 register char *p
= constraints
[i
];
2726 register int win
= 0;
2727 /* 0 => this operand can be reloaded somehow for this alternative */
2729 /* 0 => this operand can be reloaded if the alternative allows regs. */
2732 register rtx operand
= recog_data
.operand
[i
];
2734 /* Nonzero means this is a MEM that must be reloaded into a reg
2735 regardless of what the constraint says. */
2736 int force_reload
= 0;
2738 /* Nonzero if a constant forced into memory would be OK for this
2741 int earlyclobber
= 0;
2743 /* If the predicate accepts a unary operator, it means that
2744 we need to reload the operand, but do not do this for
2745 match_operator and friends. */
2746 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2747 operand
= XEXP (operand
, 0);
2749 /* If the operand is a SUBREG, extract
2750 the REG or MEM (or maybe even a constant) within.
2751 (Constants can occur as a result of reg_equiv_constant.) */
2753 while (GET_CODE (operand
) == SUBREG
)
2755 offset
+= SUBREG_WORD (operand
);
2756 operand
= SUBREG_REG (operand
);
2757 /* Force reload if this is a constant or PLUS or if there may
2758 be a problem accessing OPERAND in the outer mode. */
2759 if (CONSTANT_P (operand
)
2760 || GET_CODE (operand
) == PLUS
2761 /* We must force a reload of paradoxical SUBREGs
2762 of a MEM because the alignment of the inner value
2763 may not be enough to do the outer reference. On
2764 big-endian machines, it may also reference outside
2767 On machines that extend byte operations and we have a
2768 SUBREG where both the inner and outer modes are no wider
2769 than a word and the inner mode is narrower, is integral,
2770 and gets extended when loaded from memory, combine.c has
2771 made assumptions about the behavior of the machine in such
2772 register access. If the data is, in fact, in memory we
2773 must always load using the size assumed to be in the
2774 register and let the insn do the different-sized
2777 This is doubly true if WORD_REGISTER_OPERATIONS. In
2778 this case eliminate_regs has left non-paradoxical
2779 subregs for push_reloads to see. Make sure it does
2780 by forcing the reload.
2782 ??? When is it right at this stage to have a subreg
2783 of a mem that is _not_ to be handled specialy? IMO
2784 those should have been reduced to just a mem. */
2785 || ((GET_CODE (operand
) == MEM
2786 || (GET_CODE (operand
)== REG
2787 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2788 #ifndef WORD_REGISTER_OPERATIONS
2789 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2790 < BIGGEST_ALIGNMENT
)
2791 && (GET_MODE_SIZE (operand_mode
[i
])
2792 > GET_MODE_SIZE (GET_MODE (operand
))))
2793 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2794 #ifdef LOAD_EXTEND_OP
2795 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2796 && (GET_MODE_SIZE (GET_MODE (operand
))
2798 && (GET_MODE_SIZE (operand_mode
[i
])
2799 > GET_MODE_SIZE (GET_MODE (operand
)))
2800 && INTEGRAL_MODE_P (GET_MODE (operand
))
2801 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2806 /* Subreg of a hard reg which can't handle the subreg's mode
2807 or which would handle that mode in the wrong number of
2808 registers for subregging to work. */
2809 || (GET_CODE (operand
) == REG
2810 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2811 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2812 && (GET_MODE_SIZE (GET_MODE (operand
))
2814 && ((GET_MODE_SIZE (GET_MODE (operand
))
2816 != HARD_REGNO_NREGS (REGNO (operand
),
2817 GET_MODE (operand
))))
2818 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2823 this_alternative
[i
] = (int) NO_REGS
;
2824 this_alternative_win
[i
] = 0;
2825 this_alternative_offmemok
[i
] = 0;
2826 this_alternative_earlyclobber
[i
] = 0;
2827 this_alternative_matches
[i
] = -1;
2829 /* An empty constraint or empty alternative
2830 allows anything which matched the pattern. */
2831 if (*p
== 0 || *p
== ',')
2834 /* Scan this alternative's specs for this operand;
2835 set WIN if the operand fits any letter in this alternative.
2836 Otherwise, clear BADOP if this operand could
2837 fit some letter after reloads,
2838 or set WINREG if this operand could fit after reloads
2839 provided the constraint allows some registers. */
2841 while (*p
&& (c
= *p
++) != ',')
2844 case '=': case '+': case '*':
2848 /* The last operand should not be marked commutative. */
2849 if (i
!= noperands
- 1)
2862 /* Ignore rest of this alternative as far as
2863 reloading is concerned. */
2864 while (*p
&& *p
!= ',') p
++;
2867 case '0': case '1': case '2': case '3': case '4':
2868 case '5': case '6': case '7': case '8': case '9':
2871 this_alternative_matches
[i
] = c
;
2872 /* We are supposed to match a previous operand.
2873 If we do, we win if that one did.
2874 If we do not, count both of the operands as losers.
2875 (This is too conservative, since most of the time
2876 only a single reload insn will be needed to make
2877 the two operands win. As a result, this alternative
2878 may be rejected when it is actually desirable.) */
2879 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2880 /* If we are matching as if two operands were swapped,
2881 also pretend that operands_match had been computed
2883 But if I is the second of those and C is the first,
2884 don't exchange them, because operands_match is valid
2885 only on one side of its diagonal. */
2887 [(c
== commutative
|| c
== commutative
+ 1)
2888 ? 2*commutative
+ 1 - c
: c
]
2889 [(i
== commutative
|| i
== commutative
+ 1)
2890 ? 2*commutative
+ 1 - i
: i
])
2891 : operands_match
[c
][i
])
2893 /* If we are matching a non-offsettable address where an
2894 offsettable address was expected, then we must reject
2895 this combination, because we can't reload it. */
2896 if (this_alternative_offmemok
[c
]
2897 && GET_CODE (recog_data
.operand
[c
]) == MEM
2898 && this_alternative
[c
] == (int) NO_REGS
2899 && ! this_alternative_win
[c
])
2902 win
= this_alternative_win
[c
];
2906 /* Operands don't match. */
2908 /* Retroactively mark the operand we had to match
2909 as a loser, if it wasn't already. */
2910 if (this_alternative_win
[c
])
2912 this_alternative_win
[c
] = 0;
2913 if (this_alternative
[c
] == (int) NO_REGS
)
2915 /* But count the pair only once in the total badness of
2916 this alternative, if the pair can be a dummy reload. */
2918 = find_dummy_reload (recog_data
.operand
[i
],
2919 recog_data
.operand
[c
],
2920 recog_data
.operand_loc
[i
],
2921 recog_data
.operand_loc
[c
],
2922 operand_mode
[i
], operand_mode
[c
],
2923 this_alternative
[c
], -1,
2924 this_alternative_earlyclobber
[c
]);
2929 /* This can be fixed with reloads if the operand
2930 we are supposed to match can be fixed with reloads. */
2932 this_alternative
[i
] = this_alternative
[c
];
2934 /* If we have to reload this operand and some previous
2935 operand also had to match the same thing as this
2936 operand, we don't know how to do that. So reject this
2938 if (! win
|| force_reload
)
2939 for (j
= 0; j
< i
; j
++)
2940 if (this_alternative_matches
[j
]
2941 == this_alternative_matches
[i
])
2947 /* All necessary reloads for an address_operand
2948 were handled in find_reloads_address. */
2949 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2956 if (GET_CODE (operand
) == MEM
2957 || (GET_CODE (operand
) == REG
2958 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2959 && reg_renumber
[REGNO (operand
)] < 0))
2961 if (CONSTANT_P (operand
)
2962 /* force_const_mem does not accept HIGH. */
2963 && GET_CODE (operand
) != HIGH
)
2969 if (GET_CODE (operand
) == MEM
2970 && ! address_reloaded
[i
]
2971 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2972 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2977 if (GET_CODE (operand
) == MEM
2978 && ! address_reloaded
[i
]
2979 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2980 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2984 /* Memory operand whose address is not offsettable. */
2988 if (GET_CODE (operand
) == MEM
2989 && ! (ind_levels
? offsettable_memref_p (operand
)
2990 : offsettable_nonstrict_memref_p (operand
))
2991 /* Certain mem addresses will become offsettable
2992 after they themselves are reloaded. This is important;
2993 we don't want our own handling of unoffsettables
2994 to override the handling of reg_equiv_address. */
2995 && !(GET_CODE (XEXP (operand
, 0)) == REG
2997 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3001 /* Memory operand whose address is offsettable. */
3005 if ((GET_CODE (operand
) == MEM
3006 /* If IND_LEVELS, find_reloads_address won't reload a
3007 pseudo that didn't get a hard reg, so we have to
3008 reject that case. */
3009 && ((ind_levels
? offsettable_memref_p (operand
)
3010 : offsettable_nonstrict_memref_p (operand
))
3011 /* A reloaded address is offsettable because it is now
3012 just a simple register indirect. */
3013 || address_reloaded
[i
]))
3014 || (GET_CODE (operand
) == REG
3015 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3016 && reg_renumber
[REGNO (operand
)] < 0
3017 /* If reg_equiv_address is nonzero, we will be
3018 loading it into a register; hence it will be
3019 offsettable, but we cannot say that reg_equiv_mem
3020 is offsettable without checking. */
3021 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3022 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3023 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3025 /* force_const_mem does not accept HIGH. */
3026 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3027 || GET_CODE (operand
) == MEM
)
3034 /* Output operand that is stored before the need for the
3035 input operands (and their index registers) is over. */
3036 earlyclobber
= 1, this_earlyclobber
= 1;
3040 #ifndef REAL_ARITHMETIC
3041 /* Match any floating double constant, but only if
3042 we can examine the bits of it reliably. */
3043 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3044 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3045 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3048 if (GET_CODE (operand
) == CONST_DOUBLE
)
3053 if (GET_CODE (operand
) == CONST_DOUBLE
)
3059 if (GET_CODE (operand
) == CONST_DOUBLE
3060 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3065 if (GET_CODE (operand
) == CONST_INT
3066 || (GET_CODE (operand
) == CONST_DOUBLE
3067 && GET_MODE (operand
) == VOIDmode
))
3070 if (CONSTANT_P (operand
)
3071 #ifdef LEGITIMATE_PIC_OPERAND_P
3072 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3079 if (GET_CODE (operand
) == CONST_INT
3080 || (GET_CODE (operand
) == CONST_DOUBLE
3081 && GET_MODE (operand
) == VOIDmode
))
3093 if (GET_CODE (operand
) == CONST_INT
3094 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3104 /* A PLUS is never a valid operand, but reload can make
3105 it from a register when eliminating registers. */
3106 && GET_CODE (operand
) != PLUS
3107 /* A SCRATCH is not a valid operand. */
3108 && GET_CODE (operand
) != SCRATCH
3109 #ifdef LEGITIMATE_PIC_OPERAND_P
3110 && (! CONSTANT_P (operand
)
3112 || LEGITIMATE_PIC_OPERAND_P (operand
))
3114 && (GENERAL_REGS
== ALL_REGS
3115 || GET_CODE (operand
) != REG
3116 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3117 && reg_renumber
[REGNO (operand
)] < 0)))
3119 /* Drop through into 'r' case */
3123 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3126 #ifdef EXTRA_CONSTRAINT
3132 if (EXTRA_CONSTRAINT (operand
, c
))
3139 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3142 if (GET_MODE (operand
) == BLKmode
)
3145 if (GET_CODE (operand
) == REG
3146 && reg_fits_class_p (operand
, this_alternative
[i
],
3147 offset
, GET_MODE (recog_data
.operand
[i
])))
3154 /* If this operand could be handled with a reg,
3155 and some reg is allowed, then this operand can be handled. */
3156 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3159 /* Record which operands fit this alternative. */
3160 this_alternative_earlyclobber
[i
] = earlyclobber
;
3161 if (win
&& ! force_reload
)
3162 this_alternative_win
[i
] = 1;
3165 int const_to_mem
= 0;
3167 this_alternative_offmemok
[i
] = offmemok
;
3171 /* Alternative loses if it has no regs for a reg operand. */
3172 if (GET_CODE (operand
) == REG
3173 && this_alternative
[i
] == (int) NO_REGS
3174 && this_alternative_matches
[i
] < 0)
3177 /* If this is a constant that is reloaded into the desired
3178 class by copying it to memory first, count that as another
3179 reload. This is consistent with other code and is
3180 required to avoid choosing another alternative when
3181 the constant is moved into memory by this function on
3182 an early reload pass. Note that the test here is
3183 precisely the same as in the code below that calls
3185 if (CONSTANT_P (operand
)
3186 /* force_const_mem does not accept HIGH. */
3187 && GET_CODE (operand
) != HIGH
3188 && ((PREFERRED_RELOAD_CLASS (operand
,
3189 (enum reg_class
) this_alternative
[i
])
3191 || no_input_reloads
)
3192 && operand_mode
[i
] != VOIDmode
)
3195 if (this_alternative
[i
] != (int) NO_REGS
)
3199 /* If we can't reload this value at all, reject this
3200 alternative. Note that we could also lose due to
3201 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3204 if (! CONSTANT_P (operand
)
3205 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3206 && (PREFERRED_RELOAD_CLASS (operand
,
3207 (enum reg_class
) this_alternative
[i
])
3211 /* Alternative loses if it requires a type of reload not
3212 permitted for this insn. We can always reload SCRATCH
3213 and objects with a REG_UNUSED note. */
3214 else if (GET_CODE (operand
) != SCRATCH
3215 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3216 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3218 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3223 /* We prefer to reload pseudos over reloading other things,
3224 since such reloads may be able to be eliminated later.
3225 If we are reloading a SCRATCH, we won't be generating any
3226 insns, just using a register, so it is also preferred.
3227 So bump REJECT in other cases. Don't do this in the
3228 case where we are forcing a constant into memory and
3229 it will then win since we don't want to have a different
3230 alternative match then. */
3231 if (! (GET_CODE (operand
) == REG
3232 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3233 && GET_CODE (operand
) != SCRATCH
3234 && ! (const_to_mem
&& constmemok
))
3237 /* Input reloads can be inherited more often than output
3238 reloads can be removed, so penalize output reloads. */
3239 if (operand_type
[i
] != RELOAD_FOR_INPUT
3240 && GET_CODE (operand
) != SCRATCH
)
3244 /* If this operand is a pseudo register that didn't get a hard
3245 reg and this alternative accepts some register, see if the
3246 class that we want is a subset of the preferred class for this
3247 register. If not, but it intersects that class, use the
3248 preferred class instead. If it does not intersect the preferred
3249 class, show that usage of this alternative should be discouraged;
3250 it will be discouraged more still if the register is `preferred
3251 or nothing'. We do this because it increases the chance of
3252 reusing our spill register in a later insn and avoiding a pair
3253 of memory stores and loads.
3255 Don't bother with this if this alternative will accept this
3258 Don't do this for a multiword operand, since it is only a
3259 small win and has the risk of requiring more spill registers,
3260 which could cause a large loss.
3262 Don't do this if the preferred class has only one register
3263 because we might otherwise exhaust the class. */
3266 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3267 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3268 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3270 if (! reg_class_subset_p (this_alternative
[i
],
3271 preferred_class
[i
]))
3273 /* Since we don't have a way of forming the intersection,
3274 we just do something special if the preferred class
3275 is a subset of the class we have; that's the most
3276 common case anyway. */
3277 if (reg_class_subset_p (preferred_class
[i
],
3278 this_alternative
[i
]))
3279 this_alternative
[i
] = (int) preferred_class
[i
];
3281 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3286 /* Now see if any output operands that are marked "earlyclobber"
3287 in this alternative conflict with any input operands
3288 or any memory addresses. */
3290 for (i
= 0; i
< noperands
; i
++)
3291 if (this_alternative_earlyclobber
[i
]
3292 && this_alternative_win
[i
])
3294 struct decomposition early_data
;
3296 early_data
= decompose (recog_data
.operand
[i
]);
3298 if (modified
[i
] == RELOAD_READ
)
3301 if (this_alternative
[i
] == NO_REGS
)
3303 this_alternative_earlyclobber
[i
] = 0;
3304 if (this_insn_is_asm
)
3305 error_for_asm (this_insn
,
3306 "`&' constraint used with no register class");
3311 for (j
= 0; j
< noperands
; j
++)
3312 /* Is this an input operand or a memory ref? */
3313 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3314 || modified
[j
] != RELOAD_WRITE
)
3316 /* Ignore things like match_operator operands. */
3317 && *recog_data
.constraints
[j
] != 0
3318 /* Don't count an input operand that is constrained to match
3319 the early clobber operand. */
3320 && ! (this_alternative_matches
[j
] == i
3321 && rtx_equal_p (recog_data
.operand
[i
],
3322 recog_data
.operand
[j
]))
3323 /* Is it altered by storing the earlyclobber operand? */
3324 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3327 /* If the output is in a single-reg class,
3328 it's costly to reload it, so reload the input instead. */
3329 if (reg_class_size
[this_alternative
[i
]] == 1
3330 && (GET_CODE (recog_data
.operand
[j
]) == REG
3331 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3334 this_alternative_win
[j
] = 0;
3339 /* If an earlyclobber operand conflicts with something,
3340 it must be reloaded, so request this and count the cost. */
3344 this_alternative_win
[i
] = 0;
3345 for (j
= 0; j
< noperands
; j
++)
3346 if (this_alternative_matches
[j
] == i
3347 && this_alternative_win
[j
])
3349 this_alternative_win
[j
] = 0;
3355 /* If one alternative accepts all the operands, no reload required,
3356 choose that alternative; don't consider the remaining ones. */
3359 /* Unswap these so that they are never swapped at `finish'. */
3360 if (commutative
>= 0)
3362 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3363 recog_data
.operand
[commutative
+ 1]
3364 = substed_operand
[commutative
+ 1];
3366 for (i
= 0; i
< noperands
; i
++)
3368 goal_alternative_win
[i
] = 1;
3369 goal_alternative
[i
] = this_alternative
[i
];
3370 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3371 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3372 goal_alternative_earlyclobber
[i
]
3373 = this_alternative_earlyclobber
[i
];
3375 goal_alternative_number
= this_alternative_number
;
3376 goal_alternative_swapped
= swapped
;
3377 goal_earlyclobber
= this_earlyclobber
;
3381 /* REJECT, set by the ! and ? constraint characters and when a register
3382 would be reloaded into a non-preferred class, discourages the use of
3383 this alternative for a reload goal. REJECT is incremented by six
3384 for each ? and two for each non-preferred class. */
3385 losers
= losers
* 6 + reject
;
3387 /* If this alternative can be made to work by reloading,
3388 and it needs less reloading than the others checked so far,
3389 record it as the chosen goal for reloading. */
3390 if (! bad
&& best
> losers
)
3392 for (i
= 0; i
< noperands
; i
++)
3394 goal_alternative
[i
] = this_alternative
[i
];
3395 goal_alternative_win
[i
] = this_alternative_win
[i
];
3396 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3397 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3398 goal_alternative_earlyclobber
[i
]
3399 = this_alternative_earlyclobber
[i
];
3401 goal_alternative_swapped
= swapped
;
3403 goal_alternative_number
= this_alternative_number
;
3404 goal_earlyclobber
= this_earlyclobber
;
3408 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3409 then we need to try each alternative twice,
3410 the second time matching those two operands
3411 as if we had exchanged them.
3412 To do this, really exchange them in operands.
3414 If we have just tried the alternatives the second time,
3415 return operands to normal and drop through. */
3417 if (commutative
>= 0)
3422 register enum reg_class tclass
;
3425 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3426 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3428 tclass
= preferred_class
[commutative
];
3429 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3430 preferred_class
[commutative
+ 1] = tclass
;
3432 t
= pref_or_nothing
[commutative
];
3433 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3434 pref_or_nothing
[commutative
+ 1] = t
;
3436 memcpy (constraints
, recog_data
.constraints
,
3437 noperands
* sizeof (char *));
3442 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3443 recog_data
.operand
[commutative
+ 1]
3444 = substed_operand
[commutative
+ 1];
3448 /* The operands don't meet the constraints.
3449 goal_alternative describes the alternative
3450 that we could reach by reloading the fewest operands.
3451 Reload so as to fit it. */
3453 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3455 /* No alternative works with reloads?? */
3456 if (insn_code_number
>= 0)
3457 fatal_insn ("Unable to generate reloads for:", insn
);
3458 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3459 /* Avoid further trouble with this insn. */
3460 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3465 /* Jump to `finish' from above if all operands are valid already.
3466 In that case, goal_alternative_win is all 1. */
3469 /* Right now, for any pair of operands I and J that are required to match,
3471 goal_alternative_matches[J] is I.
3472 Set up goal_alternative_matched as the inverse function:
3473 goal_alternative_matched[I] = J. */
3475 for (i
= 0; i
< noperands
; i
++)
3476 goal_alternative_matched
[i
] = -1;
3478 for (i
= 0; i
< noperands
; i
++)
3479 if (! goal_alternative_win
[i
]
3480 && goal_alternative_matches
[i
] >= 0)
3481 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3483 /* If the best alternative is with operands 1 and 2 swapped,
3484 consider them swapped before reporting the reloads. Update the
3485 operand numbers of any reloads already pushed. */
3487 if (goal_alternative_swapped
)
3491 tem
= substed_operand
[commutative
];
3492 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3493 substed_operand
[commutative
+ 1] = tem
;
3494 tem
= recog_data
.operand
[commutative
];
3495 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3496 recog_data
.operand
[commutative
+ 1] = tem
;
3497 tem
= *recog_data
.operand_loc
[commutative
];
3498 *recog_data
.operand_loc
[commutative
]
3499 = *recog_data
.operand_loc
[commutative
+ 1];
3500 *recog_data
.operand_loc
[commutative
+1] = tem
;
3502 for (i
= 0; i
< n_reloads
; i
++)
3504 if (rld
[i
].opnum
== commutative
)
3505 rld
[i
].opnum
= commutative
+ 1;
3506 else if (rld
[i
].opnum
== commutative
+ 1)
3507 rld
[i
].opnum
= commutative
;
3511 for (i
= 0; i
< noperands
; i
++)
3513 operand_reloadnum
[i
] = -1;
3515 /* If this is an earlyclobber operand, we need to widen the scope.
3516 The reload must remain valid from the start of the insn being
3517 reloaded until after the operand is stored into its destination.
3518 We approximate this with RELOAD_OTHER even though we know that we
3519 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3521 One special case that is worth checking is when we have an
3522 output that is earlyclobber but isn't used past the insn (typically
3523 a SCRATCH). In this case, we only need have the reload live
3524 through the insn itself, but not for any of our input or output
3526 But we must not accidentally narrow the scope of an existing
3527 RELOAD_OTHER reload - leave these alone.
3529 In any case, anything needed to address this operand can remain
3530 however they were previously categorized. */
3532 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3534 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3535 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3538 /* Any constants that aren't allowed and can't be reloaded
3539 into registers are here changed into memory references. */
3540 for (i
= 0; i
< noperands
; i
++)
3541 if (! goal_alternative_win
[i
]
3542 && CONSTANT_P (recog_data
.operand
[i
])
3543 /* force_const_mem does not accept HIGH. */
3544 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3545 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3546 (enum reg_class
) goal_alternative
[i
])
3548 || no_input_reloads
)
3549 && operand_mode
[i
] != VOIDmode
)
3551 substed_operand
[i
] = recog_data
.operand
[i
]
3552 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3553 recog_data
.operand
[i
]),
3554 i
, address_type
[i
], ind_levels
, 0, insn
);
3555 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3556 goal_alternative_number
))
3557 goal_alternative_win
[i
] = 1;
3560 /* Record the values of the earlyclobber operands for the caller. */
3561 if (goal_earlyclobber
)
3562 for (i
= 0; i
< noperands
; i
++)
3563 if (goal_alternative_earlyclobber
[i
])
3564 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3566 /* Now record reloads for all the operands that need them. */
3567 for (i
= 0; i
< noperands
; i
++)
3568 if (! goal_alternative_win
[i
])
3570 /* Operands that match previous ones have already been handled. */
3571 if (goal_alternative_matches
[i
] >= 0)
3573 /* Handle an operand with a nonoffsettable address
3574 appearing where an offsettable address will do
3575 by reloading the address into a base register.
3577 ??? We can also do this when the operand is a register and
3578 reg_equiv_mem is not offsettable, but this is a bit tricky,
3579 so we don't bother with it. It may not be worth doing. */
3580 else if (goal_alternative_matched
[i
] == -1
3581 && goal_alternative_offmemok
[i
]
3582 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3584 operand_reloadnum
[i
]
3585 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3586 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3588 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3589 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3590 rld
[operand_reloadnum
[i
]].inc
3591 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3593 /* If this operand is an output, we will have made any
3594 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3595 now we are treating part of the operand as an input, so
3596 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3598 if (modified
[i
] == RELOAD_WRITE
)
3600 for (j
= 0; j
< n_reloads
; j
++)
3602 if (rld
[j
].opnum
== i
)
3604 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3605 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3606 else if (rld
[j
].when_needed
3607 == RELOAD_FOR_OUTADDR_ADDRESS
)
3608 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3613 else if (goal_alternative_matched
[i
] == -1)
3615 operand_reloadnum
[i
]
3616 = push_reload ((modified
[i
] != RELOAD_WRITE
3617 ? recog_data
.operand
[i
] : 0),
3618 (modified
[i
] != RELOAD_READ
3619 ? recog_data
.operand
[i
] : 0),
3620 (modified
[i
] != RELOAD_WRITE
3621 ? recog_data
.operand_loc
[i
] : 0),
3622 (modified
[i
] != RELOAD_READ
3623 ? recog_data
.operand_loc
[i
] : 0),
3624 (enum reg_class
) goal_alternative
[i
],
3625 (modified
[i
] == RELOAD_WRITE
3626 ? VOIDmode
: operand_mode
[i
]),
3627 (modified
[i
] == RELOAD_READ
3628 ? VOIDmode
: operand_mode
[i
]),
3629 (insn_code_number
< 0 ? 0
3630 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3631 0, i
, operand_type
[i
]);
3633 /* In a matching pair of operands, one must be input only
3634 and the other must be output only.
3635 Pass the input operand as IN and the other as OUT. */
3636 else if (modified
[i
] == RELOAD_READ
3637 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3639 operand_reloadnum
[i
]
3640 = push_reload (recog_data
.operand
[i
],
3641 recog_data
.operand
[goal_alternative_matched
[i
]],
3642 recog_data
.operand_loc
[i
],
3643 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3644 (enum reg_class
) goal_alternative
[i
],
3646 operand_mode
[goal_alternative_matched
[i
]],
3647 0, 0, i
, RELOAD_OTHER
);
3648 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3650 else if (modified
[i
] == RELOAD_WRITE
3651 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3653 operand_reloadnum
[goal_alternative_matched
[i
]]
3654 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3655 recog_data
.operand
[i
],
3656 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3657 recog_data
.operand_loc
[i
],
3658 (enum reg_class
) goal_alternative
[i
],
3659 operand_mode
[goal_alternative_matched
[i
]],
3661 0, 0, i
, RELOAD_OTHER
);
3662 operand_reloadnum
[i
] = output_reloadnum
;
3664 else if (insn_code_number
>= 0)
3668 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3669 /* Avoid further trouble with this insn. */
3670 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3675 else if (goal_alternative_matched
[i
] < 0
3676 && goal_alternative_matches
[i
] < 0
3679 /* For each non-matching operand that's a MEM or a pseudo-register
3680 that didn't get a hard register, make an optional reload.
3681 This may get done even if the insn needs no reloads otherwise. */
3683 rtx operand
= recog_data
.operand
[i
];
3685 while (GET_CODE (operand
) == SUBREG
)
3686 operand
= XEXP (operand
, 0);
3687 if ((GET_CODE (operand
) == MEM
3688 || (GET_CODE (operand
) == REG
3689 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3690 /* If this is only for an output, the optional reload would not
3691 actually cause us to use a register now, just note that
3692 something is stored here. */
3693 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3694 || modified
[i
] == RELOAD_WRITE
)
3695 && ! no_input_reloads
3696 /* An optional output reload might allow to delete INSN later.
3697 We mustn't make in-out reloads on insns that are not permitted
3699 If this is an asm, we can't delete it; we must not even call
3700 push_reload for an optional output reload in this case,
3701 because we can't be sure that the constraint allows a register,
3702 and push_reload verifies the constraints for asms. */
3703 && (modified
[i
] == RELOAD_READ
3704 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3705 operand_reloadnum
[i
]
3706 = push_reload ((modified
[i
] != RELOAD_WRITE
3707 ? recog_data
.operand
[i
] : 0),
3708 (modified
[i
] != RELOAD_READ
3709 ? recog_data
.operand
[i
] : 0),
3710 (modified
[i
] != RELOAD_WRITE
3711 ? recog_data
.operand_loc
[i
] : 0),
3712 (modified
[i
] != RELOAD_READ
3713 ? recog_data
.operand_loc
[i
] : 0),
3714 (enum reg_class
) goal_alternative
[i
],
3715 (modified
[i
] == RELOAD_WRITE
3716 ? VOIDmode
: operand_mode
[i
]),
3717 (modified
[i
] == RELOAD_READ
3718 ? VOIDmode
: operand_mode
[i
]),
3719 (insn_code_number
< 0 ? 0
3720 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3721 1, i
, operand_type
[i
]);
3722 /* If a memory reference remains (either as a MEM or a pseudo that
3723 did not get a hard register), yet we can't make an optional
3724 reload, check if this is actually a pseudo register reference;
3725 we then need to emit a USE and/or a CLOBBER so that reload
3726 inheritance will do the right thing. */
3728 && (GET_CODE (operand
) == MEM
3729 || (GET_CODE (operand
) == REG
3730 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3731 && reg_renumber
[REGNO (operand
)] < 0)))
3733 operand
= *recog_data
.operand_loc
[i
];
3735 while (GET_CODE (operand
) == SUBREG
)
3736 operand
= XEXP (operand
, 0);
3737 if (GET_CODE (operand
) == REG
)
3739 if (modified
[i
] != RELOAD_WRITE
)
3740 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3741 if (modified
[i
] != RELOAD_READ
)
3742 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3746 else if (goal_alternative_matches
[i
] >= 0
3747 && goal_alternative_win
[goal_alternative_matches
[i
]]
3748 && modified
[i
] == RELOAD_READ
3749 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3750 && ! no_input_reloads
&& ! no_output_reloads
3753 /* Similarly, make an optional reload for a pair of matching
3754 objects that are in MEM or a pseudo that didn't get a hard reg. */
3756 rtx operand
= recog_data
.operand
[i
];
3758 while (GET_CODE (operand
) == SUBREG
)
3759 operand
= XEXP (operand
, 0);
3760 if ((GET_CODE (operand
) == MEM
3761 || (GET_CODE (operand
) == REG
3762 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3763 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3765 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3766 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3767 recog_data
.operand
[i
],
3768 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3769 recog_data
.operand_loc
[i
],
3770 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3771 operand_mode
[goal_alternative_matches
[i
]],
3773 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3776 /* Perform whatever substitutions on the operands we are supposed
3777 to make due to commutativity or replacement of registers
3778 with equivalent constants or memory slots. */
3780 for (i
= 0; i
< noperands
; i
++)
3782 /* We only do this on the last pass through reload, because it is
3783 possible for some data (like reg_equiv_address) to be changed during
3784 later passes. Moreover, we loose the opportunity to get a useful
3785 reload_{in,out}_reg when we do these replacements. */
3789 rtx substitution
= substed_operand
[i
];
3791 *recog_data
.operand_loc
[i
] = substitution
;
3793 /* If we're replacing an operand with a LABEL_REF, we need
3794 to make sure that there's a REG_LABEL note attached to
3795 this instruction. */
3796 if (GET_CODE (insn
) != JUMP_INSN
3797 && GET_CODE (substitution
) == LABEL_REF
3798 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3799 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3800 XEXP (substitution
, 0),
3804 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3807 /* If this insn pattern contains any MATCH_DUP's, make sure that
3808 they will be substituted if the operands they match are substituted.
3809 Also do now any substitutions we already did on the operands.
3811 Don't do this if we aren't making replacements because we might be
3812 propagating things allocated by frame pointer elimination into places
3813 it doesn't expect. */
3815 if (insn_code_number
>= 0 && replace
)
3816 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3818 int opno
= recog_data
.dup_num
[i
];
3819 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3820 if (operand_reloadnum
[opno
] >= 0)
3821 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3822 insn_data
[insn_code_number
].operand
[opno
].mode
);
3826 /* This loses because reloading of prior insns can invalidate the equivalence
3827 (or at least find_equiv_reg isn't smart enough to find it any more),
3828 causing this insn to need more reload regs than it needed before.
3829 It may be too late to make the reload regs available.
3830 Now this optimization is done safely in choose_reload_regs. */
3832 /* For each reload of a reg into some other class of reg,
3833 search for an existing equivalent reg (same value now) in the right class.
3834 We can use it as long as we don't need to change its contents. */
3835 for (i
= 0; i
< n_reloads
; i
++)
3836 if (rld
[i
].reg_rtx
== 0
3838 && GET_CODE (rld
[i
].in
) == REG
3842 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3843 static_reload_reg_p
, 0, rld
[i
].inmode
);
3844 /* Prevent generation of insn to load the value
3845 because the one we found already has the value. */
3847 rld
[i
].in
= rld
[i
].reg_rtx
;
3851 /* Perhaps an output reload can be combined with another
3852 to reduce needs by one. */
3853 if (!goal_earlyclobber
)
3856 /* If we have a pair of reloads for parts of an address, they are reloading
3857 the same object, the operands themselves were not reloaded, and they
3858 are for two operands that are supposed to match, merge the reloads and
3859 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3861 for (i
= 0; i
< n_reloads
; i
++)
3865 for (j
= i
+ 1; j
< n_reloads
; j
++)
3866 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3867 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3868 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3869 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3870 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3871 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3872 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3873 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3874 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3875 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3876 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3877 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3878 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3879 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3880 || (goal_alternative_matches
[rld
[j
].opnum
]
3883 for (k
= 0; k
< n_replacements
; k
++)
3884 if (replacements
[k
].what
== j
)
3885 replacements
[k
].what
= i
;
3887 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3888 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3889 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3891 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3896 /* Scan all the reloads and update their type.
3897 If a reload is for the address of an operand and we didn't reload
3898 that operand, change the type. Similarly, change the operand number
3899 of a reload when two operands match. If a reload is optional, treat it
3900 as though the operand isn't reloaded.
3902 ??? This latter case is somewhat odd because if we do the optional
3903 reload, it means the object is hanging around. Thus we need only
3904 do the address reload if the optional reload was NOT done.
3906 Change secondary reloads to be the address type of their operand, not
3909 If an operand's reload is now RELOAD_OTHER, change any
3910 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3911 RELOAD_FOR_OTHER_ADDRESS. */
3913 for (i
= 0; i
< n_reloads
; i
++)
3915 if (rld
[i
].secondary_p
3916 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3917 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3919 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3920 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3921 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3922 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3923 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3924 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3926 /* If we have a secondary reload to go along with this reload,
3927 change its type to RELOAD_FOR_OPADDR_ADDR. */
3929 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3930 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3931 && rld
[i
].secondary_in_reload
!= -1)
3933 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3935 rld
[secondary_in_reload
].when_needed
3936 = RELOAD_FOR_OPADDR_ADDR
;
3938 /* If there's a tertiary reload we have to change it also. */
3939 if (secondary_in_reload
> 0
3940 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3941 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3942 = RELOAD_FOR_OPADDR_ADDR
;
3945 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3946 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3947 && rld
[i
].secondary_out_reload
!= -1)
3949 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3951 rld
[secondary_out_reload
].when_needed
3952 = RELOAD_FOR_OPADDR_ADDR
;
3954 /* If there's a tertiary reload we have to change it also. */
3955 if (secondary_out_reload
3956 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3957 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3958 = RELOAD_FOR_OPADDR_ADDR
;
3961 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3962 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3963 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3965 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3968 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3969 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3970 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3971 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3973 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
3975 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
3976 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
3979 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3980 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3981 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3983 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3984 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3985 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3986 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3987 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3988 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3989 This is complicated by the fact that a single operand can have more
3990 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
3991 choose_reload_regs without affecting code quality, and cases that
3992 actually fail are extremely rare, so it turns out to be better to fix
3993 the problem here by not generating cases that choose_reload_regs will
3995 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
3996 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
3998 We can reduce the register pressure by exploiting that a
3999 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4000 does not conflict with any of them, if it is only used for the first of
4001 the RELOAD_FOR_X_ADDRESS reloads. */
4003 int first_op_addr_num
= -2;
4004 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4005 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4007 /* We use last_op_addr_reload and the contents of the above arrays
4008 first as flags - -2 means no instance encountered, -1 means exactly
4009 one instance encountered.
4010 If more than one instance has been encountered, we store the reload
4011 number of the first reload of the kind in question; reload numbers
4012 are known to be non-negative. */
4013 for (i
= 0; i
< noperands
; i
++)
4014 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4015 for (i
= n_reloads
- 1; i
>= 0; i
--)
4017 switch (rld
[i
].when_needed
)
4019 case RELOAD_FOR_OPERAND_ADDRESS
:
4020 if (++first_op_addr_num
>= 0)
4022 first_op_addr_num
= i
;
4026 case RELOAD_FOR_INPUT_ADDRESS
:
4027 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4029 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4033 case RELOAD_FOR_OUTPUT_ADDRESS
:
4034 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4036 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4047 for (i
= 0; i
< n_reloads
; i
++)
4049 int first_num
, type
;
4051 switch (rld
[i
].when_needed
)
4053 case RELOAD_FOR_OPADDR_ADDR
:
4054 first_num
= first_op_addr_num
;
4055 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4057 case RELOAD_FOR_INPADDR_ADDRESS
:
4058 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4059 type
= RELOAD_FOR_INPUT_ADDRESS
;
4061 case RELOAD_FOR_OUTADDR_ADDRESS
:
4062 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4063 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4070 else if (i
> first_num
)
4071 rld
[i
].when_needed
= type
;
4074 /* Check if the only TYPE reload that uses reload I is
4075 reload FIRST_NUM. */
4076 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4078 if (rld
[j
].when_needed
== type
4079 && (rld
[i
].secondary_p
4080 ? rld
[j
].secondary_in_reload
== i
4081 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4083 rld
[i
].when_needed
= type
;
4092 /* See if we have any reloads that are now allowed to be merged
4093 because we've changed when the reload is needed to
4094 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4095 check for the most common cases. */
4097 for (i
= 0; i
< n_reloads
; i
++)
4098 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4099 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4100 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4101 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4102 for (j
= 0; j
< n_reloads
; j
++)
4103 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4104 && rld
[j
].when_needed
== rld
[i
].when_needed
4105 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4106 && rld
[i
].class == rld
[j
].class
4107 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4108 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4110 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4111 transfer_replacements (i
, j
);
4115 /* Set which reloads must use registers not used in any group. Start
4116 with those that conflict with a group and then include ones that
4117 conflict with ones that are already known to conflict with a group. */
4120 for (i
= 0; i
< n_reloads
; i
++)
4122 enum machine_mode mode
= rld
[i
].inmode
;
4123 enum reg_class
class = rld
[i
].class;
4126 if (GET_MODE_SIZE (rld
[i
].outmode
) > GET_MODE_SIZE (mode
))
4127 mode
= rld
[i
].outmode
;
4128 size
= CLASS_MAX_NREGS (class, mode
);
4131 for (j
= 0; j
< n_reloads
; j
++)
4132 if ((CLASS_MAX_NREGS (rld
[j
].class,
4133 (GET_MODE_SIZE (rld
[j
].outmode
)
4134 > GET_MODE_SIZE (rld
[j
].inmode
))
4135 ? rld
[j
].outmode
: rld
[j
].inmode
)
4138 && (rld
[j
].in
!= 0 || rld
[j
].out
!= 0
4139 || rld
[j
].secondary_p
)
4140 && reloads_conflict (i
, j
)
4141 && reg_classes_intersect_p (class, rld
[j
].class))
4143 rld
[i
].nongroup
= 1;
4153 for (i
= 0; i
< n_reloads
; i
++)
4155 enum machine_mode mode
= rld
[i
].inmode
;
4156 enum reg_class
class = rld
[i
].class;
4159 if (GET_MODE_SIZE (rld
[i
].outmode
) > GET_MODE_SIZE (mode
))
4160 mode
= rld
[i
].outmode
;
4161 size
= CLASS_MAX_NREGS (class, mode
);
4163 if (! rld
[i
].nongroup
&& size
== 1)
4164 for (j
= 0; j
< n_reloads
; j
++)
4166 && reloads_conflict (i
, j
)
4167 && reg_classes_intersect_p (class, rld
[j
].class))
4169 rld
[i
].nongroup
= 1;
4176 /* Compute reload_mode and reload_nregs. */
4177 for (i
= 0; i
< n_reloads
; i
++)
4180 = (rld
[i
].inmode
== VOIDmode
4181 || (GET_MODE_SIZE (rld
[i
].outmode
)
4182 > GET_MODE_SIZE (rld
[i
].inmode
)))
4183 ? rld
[i
].outmode
: rld
[i
].inmode
;
4185 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4191 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4192 accepts a memory operand with constant address. */
4195 alternative_allows_memconst (constraint
, altnum
)
4196 const char *constraint
;
4200 /* Skip alternatives before the one requested. */
4203 while (*constraint
++ != ',');
4206 /* Scan the requested alternative for 'm' or 'o'.
4207 If one of them is present, this alternative accepts memory constants. */
4208 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4209 if (c
== 'm' || c
== 'o')
4214 /* Scan X for memory references and scan the addresses for reloading.
4215 Also checks for references to "constant" regs that we want to eliminate
4216 and replaces them with the values they stand for.
4217 We may alter X destructively if it contains a reference to such.
4218 If X is just a constant reg, we return the equivalent value
4221 IND_LEVELS says how many levels of indirect addressing this machine
4224 OPNUM and TYPE identify the purpose of the reload.
4226 IS_SET_DEST is true if X is the destination of a SET, which is not
4227 appropriate to be replaced by a constant.
4229 INSN, if nonzero, is the insn in which we do the reload. It is used
4230 to determine if we may generate output reloads, and where to put USEs
4231 for pseudos that we have to replace with stack slots. */
4234 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
)
4237 enum reload_type type
;
4242 register RTX_CODE code
= GET_CODE (x
);
4244 register const char *fmt
= GET_RTX_FORMAT (code
);
4250 /* This code is duplicated for speed in find_reloads. */
4251 register int regno
= REGNO (x
);
4252 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4253 x
= reg_equiv_constant
[regno
];
4255 /* This creates (subreg (mem...)) which would cause an unnecessary
4256 reload of the mem. */
4257 else if (reg_equiv_mem
[regno
] != 0)
4258 x
= reg_equiv_mem
[regno
];
4260 else if (reg_equiv_memory_loc
[regno
]
4261 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4263 rtx mem
= make_memloc (x
, regno
);
4264 if (reg_equiv_address
[regno
]
4265 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4267 /* If this is not a toplevel operand, find_reloads doesn't see
4268 this substitution. We have to emit a USE of the pseudo so
4269 that delete_output_reload can see it. */
4270 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4271 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4273 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4274 opnum
, type
, ind_levels
, insn
);
4282 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4283 opnum
, type
, ind_levels
, insn
);
4287 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4289 /* Check for SUBREG containing a REG that's equivalent to a constant.
4290 If the constant has a known value, truncate it right now.
4291 Similarly if we are extracting a single-word of a multi-word
4292 constant. If the constant is symbolic, allow it to be substituted
4293 normally. push_reload will strip the subreg later. If the
4294 constant is VOIDmode, abort because we will lose the mode of
4295 the register (this should never happen because one of the cases
4296 above should handle it). */
4298 register int regno
= REGNO (SUBREG_REG (x
));
4301 if (subreg_lowpart_p (x
)
4302 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4303 && reg_equiv_constant
[regno
] != 0
4304 && (tem
= gen_lowpart_common (GET_MODE (x
),
4305 reg_equiv_constant
[regno
])) != 0)
4308 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4309 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4310 && reg_equiv_constant
[regno
] != 0
4311 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4313 GET_MODE (SUBREG_REG (x
)))) != 0)
4315 /* TEM is now a word sized constant for the bits from X that
4316 we wanted. However, TEM may be the wrong representation.
4318 Use gen_lowpart_common to convert a CONST_INT into a
4319 CONST_DOUBLE and vice versa as needed according to by the mode
4321 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4327 /* If the SUBREG is wider than a word, the above test will fail.
4328 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4329 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4330 a 32 bit target. We still can - and have to - handle this
4331 for non-paradoxical subregs of CONST_INTs. */
4332 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4333 && reg_equiv_constant
[regno
] != 0
4334 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4335 && (GET_MODE_SIZE (GET_MODE (x
))
4336 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4338 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4339 if (WORDS_BIG_ENDIAN
)
4340 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4341 - GET_MODE_BITSIZE (GET_MODE (x
))
4343 /* Here we use the knowledge that CONST_INTs have a
4344 HOST_WIDE_INT field. */
4345 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4346 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4347 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4350 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4351 && reg_equiv_constant
[regno
] != 0
4352 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4355 /* If the subreg contains a reg that will be converted to a mem,
4356 convert the subreg to a narrower memref now.
4357 Otherwise, we would get (subreg (mem ...) ...),
4358 which would force reload of the mem.
4360 We also need to do this if there is an equivalent MEM that is
4361 not offsettable. In that case, alter_subreg would produce an
4362 invalid address on big-endian machines.
4364 For machines that extend byte loads, we must not reload using
4365 a wider mode if we have a paradoxical SUBREG. find_reloads will
4366 force a reload in that case. So we should not do anything here. */
4368 else if (regno
>= FIRST_PSEUDO_REGISTER
4369 #ifdef LOAD_EXTEND_OP
4370 && (GET_MODE_SIZE (GET_MODE (x
))
4371 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4373 && (reg_equiv_address
[regno
] != 0
4374 || (reg_equiv_mem
[regno
] != 0
4375 && (! strict_memory_address_p (GET_MODE (x
),
4376 XEXP (reg_equiv_mem
[regno
], 0))
4377 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4378 || num_not_at_initial_offset
))))
4379 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4383 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4387 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4388 ind_levels
, is_set_dest
, insn
);
4389 /* If we have replaced a reg with it's equivalent memory loc -
4390 that can still be handled here e.g. if it's in a paradoxical
4391 subreg - we must make the change in a copy, rather than using
4392 a destructive change. This way, find_reloads can still elect
4393 not to do the change. */
4394 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4396 x
= shallow_copy_rtx (x
);
4399 XEXP (x
, i
) = new_part
;
4405 /* Return a mem ref for the memory equivalent of reg REGNO.
4406 This mem ref is not shared with anything. */
4409 make_memloc (ad
, regno
)
4413 /* We must rerun eliminate_regs, in case the elimination
4414 offsets have changed. */
4416 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4418 /* If TEM might contain a pseudo, we must copy it to avoid
4419 modifying it when we do the substitution for the reload. */
4420 if (rtx_varies_p (tem
))
4421 tem
= copy_rtx (tem
);
4423 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4424 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4428 /* Record all reloads needed for handling memory address AD
4429 which appears in *LOC in a memory reference to mode MODE
4430 which itself is found in location *MEMREFLOC.
4431 Note that we take shortcuts assuming that no multi-reg machine mode
4432 occurs as part of an address.
4434 OPNUM and TYPE specify the purpose of this reload.
4436 IND_LEVELS says how many levels of indirect addressing this machine
4439 INSN, if nonzero, is the insn in which we do the reload. It is used
4440 to determine if we may generate output reloads, and where to put USEs
4441 for pseudos that we have to replace with stack slots.
4443 Value is nonzero if this address is reloaded or replaced as a whole.
4444 This is interesting to the caller if the address is an autoincrement.
4446 Note that there is no verification that the address will be valid after
4447 this routine does its work. Instead, we rely on the fact that the address
4448 was valid when reload started. So we need only undo things that reload
4449 could have broken. These are wrong register types, pseudos not allocated
4450 to a hard register, and frame pointer elimination. */
4453 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4454 enum machine_mode mode
;
4459 enum reload_type type
;
4464 int removed_and
= 0;
4467 /* If the address is a register, see if it is a legitimate address and
4468 reload if not. We first handle the cases where we need not reload
4469 or where we must reload in a non-standard way. */
4471 if (GET_CODE (ad
) == REG
)
4475 if (reg_equiv_constant
[regno
] != 0
4476 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4478 *loc
= ad
= reg_equiv_constant
[regno
];
4482 tem
= reg_equiv_memory_loc
[regno
];
4485 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4487 tem
= make_memloc (ad
, regno
);
4488 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4490 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4491 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4494 /* We can avoid a reload if the register's equivalent memory
4495 expression is valid as an indirect memory address.
4496 But not all addresses are valid in a mem used as an indirect
4497 address: only reg or reg+constant. */
4500 && strict_memory_address_p (mode
, tem
)
4501 && (GET_CODE (XEXP (tem
, 0)) == REG
4502 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4503 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4504 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4506 /* TEM is not the same as what we'll be replacing the
4507 pseudo with after reload, put a USE in front of INSN
4508 in the final reload pass. */
4510 && num_not_at_initial_offset
4511 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4514 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4515 /* This doesn't really count as replacing the address
4516 as a whole, since it is still a memory access. */
4524 /* The only remaining case where we can avoid a reload is if this is a
4525 hard register that is valid as a base register and which is not the
4526 subject of a CLOBBER in this insn. */
4528 else if (regno
< FIRST_PSEUDO_REGISTER
4529 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4530 && ! regno_clobbered_p (regno
, this_insn
))
4533 /* If we do not have one of the cases above, we must do the reload. */
4534 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4535 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4539 if (strict_memory_address_p (mode
, ad
))
4541 /* The address appears valid, so reloads are not needed.
4542 But the address may contain an eliminable register.
4543 This can happen because a machine with indirect addressing
4544 may consider a pseudo register by itself a valid address even when
4545 it has failed to get a hard reg.
4546 So do a tree-walk to find and eliminate all such regs. */
4548 /* But first quickly dispose of a common case. */
4549 if (GET_CODE (ad
) == PLUS
4550 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4551 && GET_CODE (XEXP (ad
, 0)) == REG
4552 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4555 subst_reg_equivs_changed
= 0;
4556 *loc
= subst_reg_equivs (ad
, insn
);
4558 if (! subst_reg_equivs_changed
)
4561 /* Check result for validity after substitution. */
4562 if (strict_memory_address_p (mode
, ad
))
4566 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4571 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4576 *memrefloc
= copy_rtx (*memrefloc
);
4577 XEXP (*memrefloc
, 0) = ad
;
4578 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4584 /* The address is not valid. We have to figure out why. First see if
4585 we have an outer AND and remove it if so. Then analyze what's inside. */
4587 if (GET_CODE (ad
) == AND
)
4590 loc
= &XEXP (ad
, 0);
4594 /* One possibility for why the address is invalid is that it is itself
4595 a MEM. This can happen when the frame pointer is being eliminated, a
4596 pseudo is not allocated to a hard register, and the offset between the
4597 frame and stack pointers is not its initial value. In that case the
4598 pseudo will have been replaced by a MEM referring to the
4600 if (GET_CODE (ad
) == MEM
)
4602 /* First ensure that the address in this MEM is valid. Then, unless
4603 indirect addresses are valid, reload the MEM into a register. */
4605 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4606 opnum
, ADDR_TYPE (type
),
4607 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4609 /* If tem was changed, then we must create a new memory reference to
4610 hold it and store it back into memrefloc. */
4611 if (tem
!= ad
&& memrefloc
)
4613 *memrefloc
= copy_rtx (*memrefloc
);
4614 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4615 loc
= &XEXP (*memrefloc
, 0);
4617 loc
= &XEXP (*loc
, 0);
4620 /* Check similar cases as for indirect addresses as above except
4621 that we can allow pseudos and a MEM since they should have been
4622 taken care of above. */
4625 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4626 || GET_CODE (XEXP (tem
, 0)) == MEM
4627 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4628 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4629 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4630 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4632 /* Must use TEM here, not AD, since it is the one that will
4633 have any subexpressions reloaded, if needed. */
4634 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4635 BASE_REG_CLASS
, GET_MODE (tem
),
4638 return ! removed_and
;
4644 /* If we have address of a stack slot but it's not valid because the
4645 displacement is too large, compute the sum in a register.
4646 Handle all base registers here, not just fp/ap/sp, because on some
4647 targets (namely SH) we can also get too large displacements from
4648 big-endian corrections. */
4649 else if (GET_CODE (ad
) == PLUS
4650 && GET_CODE (XEXP (ad
, 0)) == REG
4651 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4652 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4653 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4655 /* Unshare the MEM rtx so we can safely alter it. */
4658 *memrefloc
= copy_rtx (*memrefloc
);
4659 loc
= &XEXP (*memrefloc
, 0);
4661 loc
= &XEXP (*loc
, 0);
4664 if (double_reg_address_ok
)
4666 /* Unshare the sum as well. */
4667 *loc
= ad
= copy_rtx (ad
);
4669 /* Reload the displacement into an index reg.
4670 We assume the frame pointer or arg pointer is a base reg. */
4671 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4672 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4678 /* If the sum of two regs is not necessarily valid,
4679 reload the sum into a base reg.
4680 That will at least work. */
4681 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4682 Pmode
, opnum
, type
, ind_levels
);
4684 return ! removed_and
;
4687 /* If we have an indexed stack slot, there are three possible reasons why
4688 it might be invalid: The index might need to be reloaded, the address
4689 might have been made by frame pointer elimination and hence have a
4690 constant out of range, or both reasons might apply.
4692 We can easily check for an index needing reload, but even if that is the
4693 case, we might also have an invalid constant. To avoid making the
4694 conservative assumption and requiring two reloads, we see if this address
4695 is valid when not interpreted strictly. If it is, the only problem is
4696 that the index needs a reload and find_reloads_address_1 will take care
4699 There is still a case when we might generate an extra reload,
4700 however. In certain cases eliminate_regs will return a MEM for a REG
4701 (see the code there for details). In those cases, memory_address_p
4702 applied to our address will return 0 so we will think that our offset
4703 must be too large. But it might indeed be valid and the only problem
4704 is that a MEM is present where a REG should be. This case should be
4705 very rare and there doesn't seem to be any way to avoid it.
4707 If we decide to do something here, it must be that
4708 `double_reg_address_ok' is true and that this address rtl was made by
4709 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4710 rework the sum so that the reload register will be added to the index.
4711 This is safe because we know the address isn't shared.
4713 We check for fp/ap/sp as both the first and second operand of the
4716 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4717 && GET_CODE (XEXP (ad
, 0)) == PLUS
4718 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4719 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4720 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4722 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4723 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4725 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4726 && ! memory_address_p (mode
, ad
))
4728 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4729 plus_constant (XEXP (XEXP (ad
, 0), 0),
4730 INTVAL (XEXP (ad
, 1))),
4731 XEXP (XEXP (ad
, 0), 1));
4732 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4733 GET_MODE (ad
), opnum
, type
, ind_levels
);
4734 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4740 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4741 && GET_CODE (XEXP (ad
, 0)) == PLUS
4742 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4743 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4744 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4746 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4747 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4749 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4750 && ! memory_address_p (mode
, ad
))
4752 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4753 XEXP (XEXP (ad
, 0), 0),
4754 plus_constant (XEXP (XEXP (ad
, 0), 1),
4755 INTVAL (XEXP (ad
, 1))));
4756 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4757 GET_MODE (ad
), opnum
, type
, ind_levels
);
4758 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4764 /* See if address becomes valid when an eliminable register
4765 in a sum is replaced. */
4768 if (GET_CODE (ad
) == PLUS
)
4769 tem
= subst_indexed_address (ad
);
4770 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4772 /* Ok, we win that way. Replace any additional eliminable
4775 subst_reg_equivs_changed
= 0;
4776 tem
= subst_reg_equivs (tem
, insn
);
4778 /* Make sure that didn't make the address invalid again. */
4780 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4787 /* If constants aren't valid addresses, reload the constant address
4789 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4791 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4792 Unshare it so we can safely alter it. */
4793 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4794 && CONSTANT_POOL_ADDRESS_P (ad
))
4796 *memrefloc
= copy_rtx (*memrefloc
);
4797 loc
= &XEXP (*memrefloc
, 0);
4799 loc
= &XEXP (*loc
, 0);
4802 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4804 return ! removed_and
;
4807 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4811 /* Find all pseudo regs appearing in AD
4812 that are eliminable in favor of equivalent values
4813 and do not have hard regs; replace them by their equivalents.
4814 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4815 front of it for pseudos that we have to replace with stack slots. */
4818 subst_reg_equivs (ad
, insn
)
4822 register RTX_CODE code
= GET_CODE (ad
);
4824 register const char *fmt
;
4840 register int regno
= REGNO (ad
);
4842 if (reg_equiv_constant
[regno
] != 0)
4844 subst_reg_equivs_changed
= 1;
4845 return reg_equiv_constant
[regno
];
4847 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4849 rtx mem
= make_memloc (ad
, regno
);
4850 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4852 subst_reg_equivs_changed
= 1;
4853 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4861 /* Quickly dispose of a common case. */
4862 if (XEXP (ad
, 0) == frame_pointer_rtx
4863 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4871 fmt
= GET_RTX_FORMAT (code
);
4872 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4874 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4878 /* Compute the sum of X and Y, making canonicalizations assumed in an
4879 address, namely: sum constant integers, surround the sum of two
4880 constants with a CONST, put the constant as the second operand, and
4881 group the constant on the outermost sum.
4883 This routine assumes both inputs are already in canonical form. */
4890 enum machine_mode mode
= GET_MODE (x
);
4892 if (mode
== VOIDmode
)
4893 mode
= GET_MODE (y
);
4895 if (mode
== VOIDmode
)
4898 if (GET_CODE (x
) == CONST_INT
)
4899 return plus_constant (y
, INTVAL (x
));
4900 else if (GET_CODE (y
) == CONST_INT
)
4901 return plus_constant (x
, INTVAL (y
));
4902 else if (CONSTANT_P (x
))
4903 tem
= x
, x
= y
, y
= tem
;
4905 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4906 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4908 /* Note that if the operands of Y are specified in the opposite
4909 order in the recursive calls below, infinite recursion will occur. */
4910 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4911 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4913 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4914 constant will have been placed second. */
4915 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4917 if (GET_CODE (x
) == CONST
)
4919 if (GET_CODE (y
) == CONST
)
4922 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4925 return gen_rtx_PLUS (mode
, x
, y
);
4928 /* If ADDR is a sum containing a pseudo register that should be
4929 replaced with a constant (from reg_equiv_constant),
4930 return the result of doing so, and also apply the associative
4931 law so that the result is more likely to be a valid address.
4932 (But it is not guaranteed to be one.)
4934 Note that at most one register is replaced, even if more are
4935 replaceable. Also, we try to put the result into a canonical form
4936 so it is more likely to be a valid address.
4938 In all other cases, return ADDR. */
4941 subst_indexed_address (addr
)
4944 rtx op0
= 0, op1
= 0, op2
= 0;
4948 if (GET_CODE (addr
) == PLUS
)
4950 /* Try to find a register to replace. */
4951 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4952 if (GET_CODE (op0
) == REG
4953 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4954 && reg_renumber
[regno
] < 0
4955 && reg_equiv_constant
[regno
] != 0)
4956 op0
= reg_equiv_constant
[regno
];
4957 else if (GET_CODE (op1
) == REG
4958 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4959 && reg_renumber
[regno
] < 0
4960 && reg_equiv_constant
[regno
] != 0)
4961 op1
= reg_equiv_constant
[regno
];
4962 else if (GET_CODE (op0
) == PLUS
4963 && (tem
= subst_indexed_address (op0
)) != op0
)
4965 else if (GET_CODE (op1
) == PLUS
4966 && (tem
= subst_indexed_address (op1
)) != op1
)
4971 /* Pick out up to three things to add. */
4972 if (GET_CODE (op1
) == PLUS
)
4973 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4974 else if (GET_CODE (op0
) == PLUS
)
4975 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4977 /* Compute the sum. */
4979 op1
= form_sum (op1
, op2
);
4981 op0
= form_sum (op0
, op1
);
4988 /* Record the pseudo registers we must reload into hard registers in a
4989 subexpression of a would-be memory address, X referring to a value
4990 in mode MODE. (This function is not called if the address we find
4993 CONTEXT = 1 means we are considering regs as index regs,
4994 = 0 means we are considering them as base regs.
4996 OPNUM and TYPE specify the purpose of any reloads made.
4998 IND_LEVELS says how many levels of indirect addressing are
4999 supported at this point in the address.
5001 INSN, if nonzero, is the insn in which we do the reload. It is used
5002 to determine if we may generate output reloads.
5004 We return nonzero if X, as a whole, is reloaded or replaced. */
5006 /* Note that we take shortcuts assuming that no multi-reg machine mode
5007 occurs as part of an address.
5008 Also, this is not fully machine-customizable; it works for machines
5009 such as vaxes and 68000's and 32000's, but other possible machines
5010 could have addressing modes that this does not handle right. */
5013 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5014 enum machine_mode mode
;
5019 enum reload_type type
;
5023 register RTX_CODE code
= GET_CODE (x
);
5029 register rtx orig_op0
= XEXP (x
, 0);
5030 register rtx orig_op1
= XEXP (x
, 1);
5031 register RTX_CODE code0
= GET_CODE (orig_op0
);
5032 register RTX_CODE code1
= GET_CODE (orig_op1
);
5033 register rtx op0
= orig_op0
;
5034 register rtx op1
= orig_op1
;
5036 if (GET_CODE (op0
) == SUBREG
)
5038 op0
= SUBREG_REG (op0
);
5039 code0
= GET_CODE (op0
);
5040 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5041 op0
= gen_rtx_REG (word_mode
,
5042 REGNO (op0
) + SUBREG_WORD (orig_op0
));
5045 if (GET_CODE (op1
) == SUBREG
)
5047 op1
= SUBREG_REG (op1
);
5048 code1
= GET_CODE (op1
);
5049 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5050 op1
= gen_rtx_REG (GET_MODE (op1
),
5051 REGNO (op1
) + SUBREG_WORD (orig_op1
));
5054 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5055 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5057 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5058 type
, ind_levels
, insn
);
5059 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5060 type
, ind_levels
, insn
);
5063 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5064 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5066 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5067 type
, ind_levels
, insn
);
5068 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5069 type
, ind_levels
, insn
);
5072 else if (code0
== CONST_INT
|| code0
== CONST
5073 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5074 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5075 type
, ind_levels
, insn
);
5077 else if (code1
== CONST_INT
|| code1
== CONST
5078 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5079 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5080 type
, ind_levels
, insn
);
5082 else if (code0
== REG
&& code1
== REG
)
5084 if (REG_OK_FOR_INDEX_P (op0
)
5085 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5087 else if (REG_OK_FOR_INDEX_P (op1
)
5088 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5090 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5091 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5092 type
, ind_levels
, insn
);
5093 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5094 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5095 type
, ind_levels
, insn
);
5096 else if (REG_OK_FOR_INDEX_P (op1
))
5097 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5098 type
, ind_levels
, insn
);
5099 else if (REG_OK_FOR_INDEX_P (op0
))
5100 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5101 type
, ind_levels
, insn
);
5104 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5105 type
, ind_levels
, insn
);
5106 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5107 type
, ind_levels
, insn
);
5111 else if (code0
== REG
)
5113 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5114 type
, ind_levels
, insn
);
5115 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5116 type
, ind_levels
, insn
);
5119 else if (code1
== REG
)
5121 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5122 type
, ind_levels
, insn
);
5123 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5124 type
, ind_levels
, insn
);
5134 if (GET_CODE (XEXP (x
, 0)) == REG
)
5136 register int regno
= REGNO (XEXP (x
, 0));
5140 /* A register that is incremented cannot be constant! */
5141 if (regno
>= FIRST_PSEUDO_REGISTER
5142 && reg_equiv_constant
[regno
] != 0)
5145 /* Handle a register that is equivalent to a memory location
5146 which cannot be addressed directly. */
5147 if (reg_equiv_memory_loc
[regno
] != 0
5148 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5150 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5151 if (reg_equiv_address
[regno
]
5152 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5154 /* First reload the memory location's address.
5155 We can't use ADDR_TYPE (type) here, because we need to
5156 write back the value after reading it, hence we actually
5157 need two registers. */
5158 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5159 &XEXP (tem
, 0), opnum
, type
,
5161 /* Put this inside a new increment-expression. */
5162 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5163 /* Proceed to reload that, as if it contained a register. */
5167 /* If we have a hard register that is ok as an index,
5168 don't make a reload. If an autoincrement of a nice register
5169 isn't "valid", it must be that no autoincrement is "valid".
5170 If that is true and something made an autoincrement anyway,
5171 this must be a special context where one is allowed.
5172 (For example, a "push" instruction.)
5173 We can't improve this address, so leave it alone. */
5175 /* Otherwise, reload the autoincrement into a suitable hard reg
5176 and record how much to increment by. */
5178 if (reg_renumber
[regno
] >= 0)
5179 regno
= reg_renumber
[regno
];
5180 if ((regno
>= FIRST_PSEUDO_REGISTER
5181 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5182 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5189 /* If we can output the register afterwards, do so, this
5190 saves the extra update.
5191 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5192 CALL_INSN - and it does not set CC0.
5193 But don't do this if we cannot directly address the
5194 memory location, since this will make it harder to
5195 reuse address reloads, and increases register pressure.
5196 Also don't do this if we can probably update x directly. */
5197 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5199 : reg_equiv_mem
[regno
]);
5200 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5201 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5202 && memory_operand (equiv
, GET_MODE (equiv
))
5204 && ! sets_cc0_p (PATTERN (insn
))
5206 && ! (icode
!= CODE_FOR_nothing
5207 && ((*insn_data
[icode
].operand
[0].predicate
)
5209 && ((*insn_data
[icode
].operand
[1].predicate
)
5215 = push_reload (x
, x
, loc
, loc
,
5216 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5217 GET_MODE (x
), GET_MODE (x
), 0, 0,
5218 opnum
, RELOAD_OTHER
);
5220 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5221 LOC above is part of the new MEM, not the MEM in INSN.
5223 We must also replace the address of the MEM in INSN. */
5224 if (&XEXP (x_orig
, 0) != loc
)
5225 push_replacement (&XEXP (x_orig
, 0), reloadnum
, VOIDmode
);
5231 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5232 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5233 GET_MODE (x
), GET_MODE (x
), 0, 0,
5236 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5242 /* Update the REG_INC notes. */
5244 for (link
= REG_NOTES (this_insn
);
5245 link
; link
= XEXP (link
, 1))
5246 if (REG_NOTE_KIND (link
) == REG_INC
5247 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5248 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5254 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5256 /* This is probably the result of a substitution, by eliminate_regs,
5257 of an equivalent address for a pseudo that was not allocated to a
5258 hard register. Verify that the specified address is valid and
5259 reload it into a register. */
5260 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5261 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5265 /* Since we know we are going to reload this item, don't decrement
5266 for the indirection level.
5268 Note that this is actually conservative: it would be slightly
5269 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5271 /* We can't use ADDR_TYPE (type) here, because we need to
5272 write back the value after reading it, hence we actually
5273 need two registers. */
5274 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5275 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5276 opnum
, type
, ind_levels
, insn
);
5278 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5279 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5280 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5282 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5284 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5286 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5293 /* This is probably the result of a substitution, by eliminate_regs, of
5294 an equivalent address for a pseudo that was not allocated to a hard
5295 register. Verify that the specified address is valid and reload it
5298 Since we know we are going to reload this item, don't decrement for
5299 the indirection level.
5301 Note that this is actually conservative: it would be slightly more
5302 efficient to use the value of SPILL_INDIRECT_LEVELS from
5305 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5306 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5307 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5308 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5309 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5314 register int regno
= REGNO (x
);
5316 if (reg_equiv_constant
[regno
] != 0)
5318 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5319 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5320 GET_MODE (x
), opnum
, type
, ind_levels
);
5324 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5325 that feeds this insn. */
5326 if (reg_equiv_mem
[regno
] != 0)
5328 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5329 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5330 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5335 if (reg_equiv_memory_loc
[regno
]
5336 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5338 rtx tem
= make_memloc (x
, regno
);
5339 if (reg_equiv_address
[regno
] != 0
5340 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5343 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5344 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5349 if (reg_renumber
[regno
] >= 0)
5350 regno
= reg_renumber
[regno
];
5352 if ((regno
>= FIRST_PSEUDO_REGISTER
5353 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5354 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5356 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5357 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5358 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5362 /* If a register appearing in an address is the subject of a CLOBBER
5363 in this insn, reload it into some other register to be safe.
5364 The CLOBBER is supposed to make the register unavailable
5365 from before this insn to after it. */
5366 if (regno_clobbered_p (regno
, this_insn
))
5368 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5369 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5370 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5377 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5379 /* If this is a SUBREG of a hard register and the resulting register
5380 is of the wrong class, reload the whole SUBREG. This avoids
5381 needless copies if SUBREG_REG is multi-word. */
5382 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5384 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5386 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5387 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5389 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5390 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5391 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5395 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5396 is larger than the class size, then reload the whole SUBREG. */
5399 enum reg_class
class = (context
? INDEX_REG_CLASS
5401 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5402 > reg_class_size
[class])
5404 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5406 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5407 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5419 register const char *fmt
= GET_RTX_FORMAT (code
);
5422 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5425 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5426 opnum
, type
, ind_levels
, insn
);
5433 /* X, which is found at *LOC, is a part of an address that needs to be
5434 reloaded into a register of class CLASS. If X is a constant, or if
5435 X is a PLUS that contains a constant, check that the constant is a
5436 legitimate operand and that we are supposed to be able to load
5437 it into the register.
5439 If not, force the constant into memory and reload the MEM instead.
5441 MODE is the mode to use, in case X is an integer constant.
5443 OPNUM and TYPE describe the purpose of any reloads made.
5445 IND_LEVELS says how many levels of indirect addressing this machine
5449 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5452 enum reg_class
class;
5453 enum machine_mode mode
;
5455 enum reload_type type
;
5459 && (! LEGITIMATE_CONSTANT_P (x
)
5460 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5464 /* If this is a CONST_INT, it could have been created by a
5465 plus_constant call in eliminate_regs, which means it may be
5466 on the reload_obstack. reload_obstack will be freed later, so
5467 we can't allow such RTL to be put in the constant pool. There
5468 is code in force_const_mem to check for this case, but it doesn't
5469 work because we have already popped off the reload_obstack, so
5470 rtl_obstack == saveable_obstack is true at this point. */
5471 if (GET_CODE (x
) == CONST_INT
)
5472 tem
= x
= force_const_mem (mode
, GEN_INT (INTVAL (x
)));
5474 tem
= x
= force_const_mem (mode
, x
);
5476 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5477 opnum
, type
, ind_levels
, 0);
5480 else if (GET_CODE (x
) == PLUS
5481 && CONSTANT_P (XEXP (x
, 1))
5482 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5483 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5487 /* See comment above. */
5488 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5489 tem
= force_const_mem (GET_MODE (x
), GEN_INT (INTVAL (XEXP (x
, 1))));
5491 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5493 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5494 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5495 opnum
, type
, ind_levels
, 0);
5498 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5499 mode
, VOIDmode
, 0, 0, opnum
, type
);
5502 /* X, a subreg of a pseudo, is a part of an address that needs to be
5505 If the pseudo is equivalent to a memory location that cannot be directly
5506 addressed, make the necessary address reloads.
5508 If address reloads have been necessary, or if the address is changed
5509 by register elimination, return the rtx of the memory location;
5510 otherwise, return X.
5512 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5515 OPNUM and TYPE identify the purpose of the reload.
5517 IND_LEVELS says how many levels of indirect addressing are
5518 supported at this point in the address.
5520 INSN, if nonzero, is the insn in which we do the reload. It is used
5521 to determine where to put USEs for pseudos that we have to replace with
5525 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5530 enum reload_type type
;
5534 int regno
= REGNO (SUBREG_REG (x
));
5536 if (reg_equiv_memory_loc
[regno
])
5538 /* If the address is not directly addressable, or if the address is not
5539 offsettable, then it must be replaced. */
5541 && (reg_equiv_address
[regno
]
5542 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5545 if (force_replace
|| num_not_at_initial_offset
)
5547 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5549 /* If the address changes because of register elimination, then
5550 it must be replaced. */
5552 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5554 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5556 if (BYTES_BIG_ENDIAN
)
5560 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5561 offset
+= MIN (size
, UNITS_PER_WORD
);
5562 size
= GET_MODE_SIZE (GET_MODE (x
));
5563 offset
-= MIN (size
, UNITS_PER_WORD
);
5565 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5566 PUT_MODE (tem
, GET_MODE (x
));
5567 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5568 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5570 /* If this is not a toplevel operand, find_reloads doesn't see
5571 this substitution. We have to emit a USE of the pseudo so
5572 that delete_output_reload can see it. */
5573 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5574 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5582 /* Substitute into the current INSN the registers into which we have reloaded
5583 the things that need reloading. The array `replacements'
5584 says contains the locations of all pointers that must be changed
5585 and says what to replace them with.
5587 Return the rtx that X translates into; usually X, but modified. */
5594 for (i
= 0; i
< n_replacements
; i
++)
5596 register struct replacement
*r
= &replacements
[i
];
5597 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5600 /* Encapsulate RELOADREG so its machine mode matches what
5601 used to be there. Note that gen_lowpart_common will
5602 do the wrong thing if RELOADREG is multi-word. RELOADREG
5603 will always be a REG here. */
5604 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5605 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5607 /* If we are putting this into a SUBREG and RELOADREG is a
5608 SUBREG, we would be making nested SUBREGs, so we have to fix
5609 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5611 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5613 if (GET_MODE (*r
->subreg_loc
)
5614 == GET_MODE (SUBREG_REG (reloadreg
)))
5615 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5618 *r
->where
= SUBREG_REG (reloadreg
);
5619 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5623 *r
->where
= reloadreg
;
5625 /* If reload got no reg and isn't optional, something's wrong. */
5626 else if (! rld
[r
->what
].optional
)
5631 /* Make a copy of any replacements being done into X and move those copies
5632 to locations in Y, a copy of X. We only look at the highest level of
5636 copy_replacements (x
, y
)
5641 enum rtx_code code
= GET_CODE (x
);
5642 const char *fmt
= GET_RTX_FORMAT (code
);
5643 struct replacement
*r
;
5645 /* We can't support X being a SUBREG because we might then need to know its
5646 location if something inside it was replaced. */
5650 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5652 for (j
= 0; j
< n_replacements
; j
++)
5654 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5656 r
= &replacements
[n_replacements
++];
5657 r
->where
= replacements
[j
].where
;
5658 r
->subreg_loc
= &XEXP (y
, i
);
5659 r
->what
= replacements
[j
].what
;
5660 r
->mode
= replacements
[j
].mode
;
5662 else if (replacements
[j
].where
== &XEXP (x
, i
))
5664 r
= &replacements
[n_replacements
++];
5665 r
->where
= &XEXP (y
, i
);
5667 r
->what
= replacements
[j
].what
;
5668 r
->mode
= replacements
[j
].mode
;
5673 /* Change any replacements being done to *X to be done to *Y */
5676 move_replacements (x
, y
)
5682 for (i
= 0; i
< n_replacements
; i
++)
5683 if (replacements
[i
].subreg_loc
== x
)
5684 replacements
[i
].subreg_loc
= y
;
5685 else if (replacements
[i
].where
== x
)
5687 replacements
[i
].where
= y
;
5688 replacements
[i
].subreg_loc
= 0;
5692 /* If LOC was scheduled to be replaced by something, return the replacement.
5693 Otherwise, return *LOC. */
5696 find_replacement (loc
)
5699 struct replacement
*r
;
5701 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5703 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5705 if (reloadreg
&& r
->where
== loc
)
5707 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5708 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5712 else if (reloadreg
&& r
->subreg_loc
== loc
)
5714 /* RELOADREG must be either a REG or a SUBREG.
5716 ??? Is it actually still ever a SUBREG? If so, why? */
5718 if (GET_CODE (reloadreg
) == REG
)
5719 return gen_rtx_REG (GET_MODE (*loc
),
5720 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5721 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5724 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5725 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5729 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5730 what's inside and make a new rtl if so. */
5731 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5732 || GET_CODE (*loc
) == MULT
)
5734 rtx x
= find_replacement (&XEXP (*loc
, 0));
5735 rtx y
= find_replacement (&XEXP (*loc
, 1));
5737 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5738 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5744 /* Return nonzero if register in range [REGNO, ENDREGNO)
5745 appears either explicitly or implicitly in X
5746 other than being stored into (except for earlyclobber operands).
5748 References contained within the substructure at LOC do not count.
5749 LOC may be zero, meaning don't ignore anything.
5751 This is similar to refers_to_regno_p in rtlanal.c except that we
5752 look at equivalences for pseudos that didn't get hard registers. */
5755 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5756 int regno
, endregno
;
5761 register RTX_CODE code
;
5762 register const char *fmt
;
5768 code
= GET_CODE (x
);
5775 /* If this is a pseudo, a hard register must not have been allocated.
5776 X must therefore either be a constant or be in memory. */
5777 if (i
>= FIRST_PSEUDO_REGISTER
)
5779 if (reg_equiv_memory_loc
[i
])
5780 return refers_to_regno_for_reload_p (regno
, endregno
,
5781 reg_equiv_memory_loc
[i
],
5784 if (reg_equiv_constant
[i
])
5790 return (endregno
> i
5791 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
5792 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
5796 /* If this is a SUBREG of a hard reg, we can see exactly which
5797 registers are being modified. Otherwise, handle normally. */
5798 if (GET_CODE (SUBREG_REG (x
)) == REG
5799 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5801 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5803 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5804 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5806 return endregno
> inner_regno
&& regno
< inner_endregno
;
5812 if (&SET_DEST (x
) != loc
5813 /* Note setting a SUBREG counts as referring to the REG it is in for
5814 a pseudo but not for hard registers since we can
5815 treat each word individually. */
5816 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5817 && loc
!= &SUBREG_REG (SET_DEST (x
))
5818 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5819 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5820 && refers_to_regno_for_reload_p (regno
, endregno
,
5821 SUBREG_REG (SET_DEST (x
)),
5823 /* If the output is an earlyclobber operand, this is
5825 || ((GET_CODE (SET_DEST (x
)) != REG
5826 || earlyclobber_operand_p (SET_DEST (x
)))
5827 && refers_to_regno_for_reload_p (regno
, endregno
,
5828 SET_DEST (x
), loc
))))
5831 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5840 /* X does not match, so try its subexpressions. */
5842 fmt
= GET_RTX_FORMAT (code
);
5843 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5845 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5853 if (refers_to_regno_for_reload_p (regno
, endregno
,
5857 else if (fmt
[i
] == 'E')
5860 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5861 if (loc
!= &XVECEXP (x
, i
, j
)
5862 && refers_to_regno_for_reload_p (regno
, endregno
,
5863 XVECEXP (x
, i
, j
), loc
))
5870 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5871 we check if any register number in X conflicts with the relevant register
5872 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5873 contains a MEM (we don't bother checking for memory addresses that can't
5874 conflict because we expect this to be a rare case.
5876 This function is similar to reg_overlap_mention_p in rtlanal.c except
5877 that we look at equivalences for pseudos that didn't get hard registers. */
5880 reg_overlap_mentioned_for_reload_p (x
, in
)
5883 int regno
, endregno
;
5885 /* Overly conservative. */
5886 if (GET_CODE (x
) == STRICT_LOW_PART
)
5889 /* If either argument is a constant, then modifying X can not affect IN. */
5890 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5892 else if (GET_CODE (x
) == SUBREG
)
5894 regno
= REGNO (SUBREG_REG (x
));
5895 if (regno
< FIRST_PSEUDO_REGISTER
)
5896 regno
+= SUBREG_WORD (x
);
5898 else if (GET_CODE (x
) == REG
)
5902 /* If this is a pseudo, it must not have been assigned a hard register.
5903 Therefore, it must either be in memory or be a constant. */
5905 if (regno
>= FIRST_PSEUDO_REGISTER
)
5907 if (reg_equiv_memory_loc
[regno
])
5908 return refers_to_mem_for_reload_p (in
);
5909 else if (reg_equiv_constant
[regno
])
5914 else if (GET_CODE (x
) == MEM
)
5915 return refers_to_mem_for_reload_p (in
);
5916 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5917 || GET_CODE (x
) == CC0
)
5918 return reg_mentioned_p (x
, in
);
5922 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5923 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5925 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5928 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5932 refers_to_mem_for_reload_p (x
)
5938 if (GET_CODE (x
) == MEM
)
5941 if (GET_CODE (x
) == REG
)
5942 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5943 && reg_equiv_memory_loc
[REGNO (x
)]);
5945 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5946 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5948 && (GET_CODE (XEXP (x
, i
)) == MEM
5949 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5955 /* Check the insns before INSN to see if there is a suitable register
5956 containing the same value as GOAL.
5957 If OTHER is -1, look for a register in class CLASS.
5958 Otherwise, just see if register number OTHER shares GOAL's value.
5960 Return an rtx for the register found, or zero if none is found.
5962 If RELOAD_REG_P is (short *)1,
5963 we reject any hard reg that appears in reload_reg_rtx
5964 because such a hard reg is also needed coming into this insn.
5966 If RELOAD_REG_P is any other nonzero value,
5967 it is a vector indexed by hard reg number
5968 and we reject any hard reg whose element in the vector is nonnegative
5969 as well as any that appears in reload_reg_rtx.
5971 If GOAL is zero, then GOALREG is a register number; we look
5972 for an equivalent for that register.
5974 MODE is the machine mode of the value we want an equivalence for.
5975 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5977 This function is used by jump.c as well as in the reload pass.
5979 If GOAL is the sum of the stack pointer and a constant, we treat it
5980 as if it were a constant except that sp is required to be unchanging. */
5983 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5986 enum reg_class
class;
5988 short *reload_reg_p
;
5990 enum machine_mode mode
;
5992 register rtx p
= insn
;
5993 rtx goaltry
, valtry
, value
, where
;
5995 register int regno
= -1;
5999 int goal_mem_addr_varies
= 0;
6000 int need_stable_sp
= 0;
6006 else if (GET_CODE (goal
) == REG
)
6007 regno
= REGNO (goal
);
6008 else if (GET_CODE (goal
) == MEM
)
6010 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6011 if (MEM_VOLATILE_P (goal
))
6013 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6015 /* An address with side effects must be reexecuted. */
6028 else if (CONSTANT_P (goal
))
6030 else if (GET_CODE (goal
) == PLUS
6031 && XEXP (goal
, 0) == stack_pointer_rtx
6032 && CONSTANT_P (XEXP (goal
, 1)))
6033 goal_const
= need_stable_sp
= 1;
6034 else if (GET_CODE (goal
) == PLUS
6035 && XEXP (goal
, 0) == frame_pointer_rtx
6036 && CONSTANT_P (XEXP (goal
, 1)))
6041 /* On some machines, certain regs must always be rejected
6042 because they don't behave the way ordinary registers do. */
6044 #ifdef OVERLAPPING_REGNO_P
6045 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
6046 && OVERLAPPING_REGNO_P (regno
))
6050 /* Scan insns back from INSN, looking for one that copies
6051 a value into or out of GOAL.
6052 Stop and give up if we reach a label. */
6057 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6059 if (GET_CODE (p
) == INSN
6060 /* If we don't want spill regs ... */
6061 && (! (reload_reg_p
!= 0
6062 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6063 /* ... then ignore insns introduced by reload; they aren't useful
6064 and can cause results in reload_as_needed to be different
6065 from what they were when calculating the need for spills.
6066 If we notice an input-reload insn here, we will reject it below,
6067 but it might hide a usable equivalent. That makes bad code.
6068 It may even abort: perhaps no reg was spilled for this insn
6069 because it was assumed we would find that equivalent. */
6070 || INSN_UID (p
) < reload_first_uid
))
6073 pat
= single_set (p
);
6074 /* First check for something that sets some reg equal to GOAL. */
6077 && true_regnum (SET_SRC (pat
)) == regno
6078 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6081 && true_regnum (SET_DEST (pat
)) == regno
6082 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6084 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6085 /* When looking for stack pointer + const,
6086 make sure we don't use a stack adjust. */
6087 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6088 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6090 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6091 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6093 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6094 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6095 /* If we are looking for a constant,
6096 and something equivalent to that constant was copied
6097 into a reg, we can use that reg. */
6098 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6100 && rtx_equal_p (XEXP (tem
, 0), goal
)
6101 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6102 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6104 && GET_CODE (SET_DEST (pat
)) == REG
6105 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6106 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
6107 && GET_CODE (goal
) == CONST_INT
6108 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
6110 && rtx_equal_p (goal
, goaltry
)
6111 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
6113 && (valueno
= true_regnum (valtry
)) >= 0)
6114 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6116 && GET_CODE (SET_DEST (pat
)) == REG
6117 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6118 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
6119 && GET_CODE (goal
) == CONST_INT
6120 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6122 && rtx_equal_p (goal
, goaltry
)
6124 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6125 && (valueno
= true_regnum (valtry
)) >= 0)))
6128 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
6129 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6139 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6140 (or copying VALUE into GOAL, if GOAL is also a register).
6141 Now verify that VALUE is really valid. */
6143 /* VALUENO is the register number of VALUE; a hard register. */
6145 /* Don't try to re-use something that is killed in this insn. We want
6146 to be able to trust REG_UNUSED notes. */
6147 if (find_reg_note (where
, REG_UNUSED
, value
))
6150 /* If we propose to get the value from the stack pointer or if GOAL is
6151 a MEM based on the stack pointer, we need a stable SP. */
6152 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6153 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6157 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6158 if (GET_MODE (value
) != mode
)
6161 /* Reject VALUE if it was loaded from GOAL
6162 and is also a register that appears in the address of GOAL. */
6164 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6165 && refers_to_regno_for_reload_p (valueno
,
6167 + HARD_REGNO_NREGS (valueno
, mode
)),
6171 /* Reject registers that overlap GOAL. */
6173 if (!goal_mem
&& !goal_const
6174 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
6175 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
6178 /* Reject VALUE if it is one of the regs reserved for reloads.
6179 Reload1 knows how to reuse them anyway, and it would get
6180 confused if we allocated one without its knowledge.
6181 (Now that insns introduced by reload are ignored above,
6182 this case shouldn't happen, but I'm not positive.) */
6184 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
6185 && reload_reg_p
[valueno
] >= 0)
6188 /* On some machines, certain regs must always be rejected
6189 because they don't behave the way ordinary registers do. */
6191 #ifdef OVERLAPPING_REGNO_P
6192 if (OVERLAPPING_REGNO_P (valueno
))
6196 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6197 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6199 /* Reject VALUE if it is a register being used for an input reload
6200 even if it is not one of those reserved. */
6202 if (reload_reg_p
!= 0)
6205 for (i
= 0; i
< n_reloads
; i
++)
6206 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6208 int regno1
= REGNO (rld
[i
].reg_rtx
);
6209 int nregs1
= HARD_REGNO_NREGS (regno1
,
6210 GET_MODE (rld
[i
].reg_rtx
));
6211 if (regno1
< valueno
+ valuenregs
6212 && regno1
+ nregs1
> valueno
)
6218 /* We must treat frame pointer as varying here,
6219 since it can vary--in a nonlocal goto as generated by expand_goto. */
6220 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6222 /* Now verify that the values of GOAL and VALUE remain unaltered
6223 until INSN is reached. */
6232 /* Don't trust the conversion past a function call
6233 if either of the two is in a call-clobbered register, or memory. */
6234 if (GET_CODE (p
) == CALL_INSN
6235 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
6236 && call_used_regs
[regno
])
6238 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
6239 && call_used_regs
[valueno
])
6245 #ifdef NON_SAVING_SETJMP
6246 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6247 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6251 #ifdef INSN_CLOBBERS_REGNO_P
6252 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
6253 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
6254 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
6255 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
6259 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6263 /* Watch out for unspec_volatile, and volatile asms. */
6264 if (volatile_insn_p (pat
))
6267 /* If this insn P stores in either GOAL or VALUE, return 0.
6268 If GOAL is a memory ref and this insn writes memory, return 0.
6269 If GOAL is a memory ref and its address is not constant,
6270 and this insn P changes a register used in GOAL, return 0. */
6272 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6274 register rtx dest
= SET_DEST (pat
);
6275 while (GET_CODE (dest
) == SUBREG
6276 || GET_CODE (dest
) == ZERO_EXTRACT
6277 || GET_CODE (dest
) == SIGN_EXTRACT
6278 || GET_CODE (dest
) == STRICT_LOW_PART
)
6279 dest
= XEXP (dest
, 0);
6280 if (GET_CODE (dest
) == REG
)
6282 register int xregno
= REGNO (dest
);
6284 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6285 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6288 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6290 if (xregno
< valueno
+ valuenregs
6291 && xregno
+ xnregs
> valueno
)
6293 if (goal_mem_addr_varies
6294 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6296 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6299 else if (goal_mem
&& GET_CODE (dest
) == MEM
6300 && ! push_operand (dest
, GET_MODE (dest
)))
6302 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6303 && reg_equiv_memory_loc
[regno
] != 0)
6305 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6308 else if (GET_CODE (pat
) == PARALLEL
)
6311 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6313 register rtx v1
= XVECEXP (pat
, 0, i
);
6314 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6316 register rtx dest
= SET_DEST (v1
);
6317 while (GET_CODE (dest
) == SUBREG
6318 || GET_CODE (dest
) == ZERO_EXTRACT
6319 || GET_CODE (dest
) == SIGN_EXTRACT
6320 || GET_CODE (dest
) == STRICT_LOW_PART
)
6321 dest
= XEXP (dest
, 0);
6322 if (GET_CODE (dest
) == REG
)
6324 register int xregno
= REGNO (dest
);
6326 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6327 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6330 if (xregno
< regno
+ nregs
6331 && xregno
+ xnregs
> regno
)
6333 if (xregno
< valueno
+ valuenregs
6334 && xregno
+ xnregs
> valueno
)
6336 if (goal_mem_addr_varies
6337 && reg_overlap_mentioned_for_reload_p (dest
,
6340 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6343 else if (goal_mem
&& GET_CODE (dest
) == MEM
6344 && ! push_operand (dest
, GET_MODE (dest
)))
6346 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6347 && reg_equiv_memory_loc
[regno
] != 0)
6349 else if (need_stable_sp
6350 && push_operand (dest
, GET_MODE (dest
)))
6356 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6360 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6361 link
= XEXP (link
, 1))
6363 pat
= XEXP (link
, 0);
6364 if (GET_CODE (pat
) == CLOBBER
)
6366 register rtx dest
= SET_DEST (pat
);
6367 while (GET_CODE (dest
) == SUBREG
6368 || GET_CODE (dest
) == ZERO_EXTRACT
6369 || GET_CODE (dest
) == SIGN_EXTRACT
6370 || GET_CODE (dest
) == STRICT_LOW_PART
)
6371 dest
= XEXP (dest
, 0);
6372 if (GET_CODE (dest
) == REG
)
6374 register int xregno
= REGNO (dest
);
6376 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6377 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6380 if (xregno
< regno
+ nregs
6381 && xregno
+ xnregs
> regno
)
6383 if (xregno
< valueno
+ valuenregs
6384 && xregno
+ xnregs
> valueno
)
6386 if (goal_mem_addr_varies
6387 && reg_overlap_mentioned_for_reload_p (dest
,
6391 else if (goal_mem
&& GET_CODE (dest
) == MEM
6392 && ! push_operand (dest
, GET_MODE (dest
)))
6394 else if (need_stable_sp
6395 && push_operand (dest
, GET_MODE (dest
)))
6402 /* If this insn auto-increments or auto-decrements
6403 either regno or valueno, return 0 now.
6404 If GOAL is a memory ref and its address is not constant,
6405 and this insn P increments a register used in GOAL, return 0. */
6409 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6410 if (REG_NOTE_KIND (link
) == REG_INC
6411 && GET_CODE (XEXP (link
, 0)) == REG
)
6413 register int incno
= REGNO (XEXP (link
, 0));
6414 if (incno
< regno
+ nregs
&& incno
>= regno
)
6416 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6418 if (goal_mem_addr_varies
6419 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6429 /* Find a place where INCED appears in an increment or decrement operator
6430 within X, and return the amount INCED is incremented or decremented by.
6431 The value is always positive. */
6434 find_inc_amount (x
, inced
)
6437 register enum rtx_code code
= GET_CODE (x
);
6438 register const char *fmt
;
6443 register rtx addr
= XEXP (x
, 0);
6444 if ((GET_CODE (addr
) == PRE_DEC
6445 || GET_CODE (addr
) == POST_DEC
6446 || GET_CODE (addr
) == PRE_INC
6447 || GET_CODE (addr
) == POST_INC
)
6448 && XEXP (addr
, 0) == inced
)
6449 return GET_MODE_SIZE (GET_MODE (x
));
6452 fmt
= GET_RTX_FORMAT (code
);
6453 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6457 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6464 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6466 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6476 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6479 regno_clobbered_p (regno
, insn
)
6483 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6484 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6485 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6487 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6489 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6493 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6494 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6495 && REGNO (XEXP (elt
, 0)) == regno
)
6503 static const char *reload_when_needed_name
[] =
6506 "RELOAD_FOR_OUTPUT",
6508 "RELOAD_FOR_INPUT_ADDRESS",
6509 "RELOAD_FOR_INPADDR_ADDRESS",
6510 "RELOAD_FOR_OUTPUT_ADDRESS",
6511 "RELOAD_FOR_OUTADDR_ADDRESS",
6512 "RELOAD_FOR_OPERAND_ADDRESS",
6513 "RELOAD_FOR_OPADDR_ADDR",
6515 "RELOAD_FOR_OTHER_ADDRESS"
6518 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6520 /* These functions are used to print the variables set by 'find_reloads' */
6523 debug_reload_to_stream (f
)
6531 for (r
= 0; r
< n_reloads
; r
++)
6533 fprintf (f
, "Reload %d: ", r
);
6537 fprintf (f
, "reload_in (%s) = ",
6538 GET_MODE_NAME (rld
[r
].inmode
));
6539 print_inline_rtx (f
, rld
[r
].in
, 24);
6540 fprintf (f
, "\n\t");
6543 if (rld
[r
].out
!= 0)
6545 fprintf (f
, "reload_out (%s) = ",
6546 GET_MODE_NAME (rld
[r
].outmode
));
6547 print_inline_rtx (f
, rld
[r
].out
, 24);
6548 fprintf (f
, "\n\t");
6551 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6553 fprintf (f
, "%s (opnum = %d)",
6554 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6557 if (rld
[r
].optional
)
6558 fprintf (f
, ", optional");
6560 if (rld
[r
].nongroup
)
6561 fprintf (stderr
, ", nongroup");
6563 if (rld
[r
].inc
!= 0)
6564 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6566 if (rld
[r
].nocombine
)
6567 fprintf (f
, ", can't combine");
6569 if (rld
[r
].secondary_p
)
6570 fprintf (f
, ", secondary_reload_p");
6572 if (rld
[r
].in_reg
!= 0)
6574 fprintf (f
, "\n\treload_in_reg: ");
6575 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6578 if (rld
[r
].out_reg
!= 0)
6580 fprintf (f
, "\n\treload_out_reg: ");
6581 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6584 if (rld
[r
].reg_rtx
!= 0)
6586 fprintf (f
, "\n\treload_reg_rtx: ");
6587 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6591 if (rld
[r
].secondary_in_reload
!= -1)
6593 fprintf (f
, "%ssecondary_in_reload = %d",
6594 prefix
, rld
[r
].secondary_in_reload
);
6598 if (rld
[r
].secondary_out_reload
!= -1)
6599 fprintf (f
, "%ssecondary_out_reload = %d\n",
6600 prefix
, rld
[r
].secondary_out_reload
);
6603 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6605 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6606 insn_data
[rld
[r
].secondary_in_icode
].name
);
6610 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6611 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6612 insn_data
[rld
[r
].secondary_out_icode
].name
);
6621 debug_reload_to_stream (stderr
);