1 /* If-conversion support.
2 Copyright (C) 2000-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
48 #ifndef MAX_CONDITIONAL_EXECUTE
49 #define MAX_CONDITIONAL_EXECUTE \
50 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
54 #define IFCVT_MULTIPLE_DUMPS 1
56 #define NULL_BLOCK ((basic_block) NULL)
58 /* True if after combine pass. */
59 static bool ifcvt_after_combine
;
61 /* True if the target has the cbranchcc4 optab. */
62 static bool have_cbranchcc4
;
64 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
65 static int num_possible_if_blocks
;
67 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
69 static int num_updated_if_blocks
;
71 /* # of changes made. */
72 static int num_true_changes
;
74 /* Whether conditional execution changes were made. */
75 static int cond_exec_changed_p
;
77 /* Forward references. */
78 static int count_bb_insns (const_basic_block
);
79 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
80 static rtx_insn
*first_active_insn (basic_block
);
81 static rtx_insn
*last_active_insn (basic_block
, int);
82 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
83 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
84 static basic_block
block_fallthru (basic_block
);
85 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
87 static rtx
cond_exec_get_condition (rtx_insn
*);
88 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
89 static int noce_operand_ok (const_rtx
);
90 static void merge_if_block (ce_if_block
*);
91 static int find_cond_trap (basic_block
, edge
, edge
);
92 static basic_block
find_if_header (basic_block
, int);
93 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
94 static int noce_find_if_block (basic_block
, edge
, edge
, int);
95 static int cond_exec_find_if_block (ce_if_block
*);
96 static int find_if_case_1 (basic_block
, edge
, edge
);
97 static int find_if_case_2 (basic_block
, edge
, edge
);
98 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
100 static void noce_emit_move_insn (rtx
, rtx
);
101 static rtx_insn
*block_has_only_trap (basic_block
);
103 /* Count the number of non-jump active insns in BB. */
106 count_bb_insns (const_basic_block bb
)
109 rtx_insn
*insn
= BB_HEAD (bb
);
113 if (active_insn_p (insn
) && !JUMP_P (insn
))
116 if (insn
== BB_END (bb
))
118 insn
= NEXT_INSN (insn
);
124 /* Determine whether the total insn_rtx_cost on non-jump insns in
125 basic block BB is less than MAX_COST. This function returns
126 false if the cost of any instruction could not be estimated.
128 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
129 as those insns are being speculated. MAX_COST is scaled with SCALE
130 plus a small fudge factor. */
133 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
136 rtx_insn
*insn
= BB_HEAD (bb
);
137 bool speed
= optimize_bb_for_speed_p (bb
);
139 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
140 applied to insn_rtx_cost when optimizing for size. Only do
141 this after combine because if-conversion might interfere with
142 passes before combine.
144 Use optimize_function_for_speed_p instead of the pre-defined
145 variable speed to make sure it is set to same value for all
146 basic blocks in one if-conversion transformation. */
147 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
148 scale
= REG_BR_PROB_BASE
;
149 /* Our branch probability/scaling factors are just estimates and don't
150 account for cases where we can get speculation for free and other
151 secondary benefits. So we fudge the scale factor to make speculating
152 appear a little more profitable when optimizing for performance. */
154 scale
+= REG_BR_PROB_BASE
/ 8;
161 if (NONJUMP_INSN_P (insn
))
163 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
167 /* If this instruction is the load or set of a "stack" register,
168 such as a floating point register on x87, then the cost of
169 speculatively executing this insn may need to include
170 the additional cost of popping its result off of the
171 register stack. Unfortunately, correctly recognizing and
172 accounting for this additional overhead is tricky, so for
173 now we simply prohibit such speculative execution. */
176 rtx set
= single_set (insn
);
177 if (set
&& STACK_REG_P (SET_DEST (set
)))
183 if (count
>= max_cost
)
186 else if (CALL_P (insn
))
189 if (insn
== BB_END (bb
))
191 insn
= NEXT_INSN (insn
);
197 /* Return the first non-jump active insn in the basic block. */
200 first_active_insn (basic_block bb
)
202 rtx_insn
*insn
= BB_HEAD (bb
);
206 if (insn
== BB_END (bb
))
208 insn
= NEXT_INSN (insn
);
211 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
213 if (insn
== BB_END (bb
))
215 insn
= NEXT_INSN (insn
);
224 /* Return the last non-jump active (non-jump) insn in the basic block. */
227 last_active_insn (basic_block bb
, int skip_use_p
)
229 rtx_insn
*insn
= BB_END (bb
);
230 rtx_insn
*head
= BB_HEAD (bb
);
234 || DEBUG_INSN_P (insn
)
236 && NONJUMP_INSN_P (insn
)
237 && GET_CODE (PATTERN (insn
)) == USE
))
241 insn
= PREV_INSN (insn
);
250 /* Return the active insn before INSN inside basic block CURR_BB. */
253 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
255 if (!insn
|| insn
== BB_HEAD (curr_bb
))
258 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
260 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
263 /* No other active insn all the way to the start of the basic block. */
264 if (insn
== BB_HEAD (curr_bb
))
271 /* Return the active insn after INSN inside basic block CURR_BB. */
274 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
276 if (!insn
|| insn
== BB_END (curr_bb
))
279 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
281 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
284 /* No other active insn all the way to the end of the basic block. */
285 if (insn
== BB_END (curr_bb
))
292 /* Return the basic block reached by falling though the basic block BB. */
295 block_fallthru (basic_block bb
)
297 edge e
= find_fallthru_edge (bb
->succs
);
299 return (e
) ? e
->dest
: NULL_BLOCK
;
302 /* Return true if RTXs A and B can be safely interchanged. */
305 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
307 if (!rtx_equal_p (a
, b
))
310 if (GET_CODE (a
) != MEM
)
313 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
314 reference is not. Interchanging a dead type-unsafe memory reference with
315 a live type-safe one creates a live type-unsafe memory reference, in other
316 words, it makes the program illegal.
317 We check here conservatively whether the two memory references have equal
318 memory attributes. */
320 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
324 /* Go through a bunch of insns, converting them to conditional
325 execution format if possible. Return TRUE if all of the non-note
326 insns were processed. */
329 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
330 /* if block information */rtx_insn
*start
,
331 /* first insn to look at */rtx end
,
332 /* last insn to look at */rtx test
,
333 /* conditional execution test */int prob_val
,
334 /* probability of branch taken. */int mod_ok
)
336 int must_be_last
= FALSE
;
344 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
346 /* dwarf2out can't cope with conditional prologues. */
347 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
350 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
353 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
355 /* dwarf2out can't cope with conditional unwind info. */
356 if (RTX_FRAME_RELATED_P (insn
))
359 /* Remove USE insns that get in the way. */
360 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
362 /* ??? Ug. Actually unlinking the thing is problematic,
363 given what we'd have to coordinate with our callers. */
364 SET_INSN_DELETED (insn
);
368 /* Last insn wasn't last? */
372 if (modified_in_p (test
, insn
))
379 /* Now build the conditional form of the instruction. */
380 pattern
= PATTERN (insn
);
381 xtest
= copy_rtx (test
);
383 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
385 if (GET_CODE (pattern
) == COND_EXEC
)
387 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
390 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
391 COND_EXEC_TEST (pattern
));
392 pattern
= COND_EXEC_CODE (pattern
);
395 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
397 /* If the machine needs to modify the insn being conditionally executed,
398 say for example to force a constant integer operand into a temp
399 register, do so here. */
400 #ifdef IFCVT_MODIFY_INSN
401 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
406 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
408 if (CALL_P (insn
) && prob_val
>= 0)
409 validate_change (insn
, ®_NOTES (insn
),
410 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
411 prob_val
, REG_NOTES (insn
)), 1);
421 /* Return the condition for a jump. Do not do any special processing. */
424 cond_exec_get_condition (rtx_insn
*jump
)
428 if (any_condjump_p (jump
))
429 test_if
= SET_SRC (pc_set (jump
));
432 cond
= XEXP (test_if
, 0);
434 /* If this branches to JUMP_LABEL when the condition is false,
435 reverse the condition. */
436 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
437 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
439 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
443 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
450 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
451 to conditional execution. Return TRUE if we were successful at
452 converting the block. */
455 cond_exec_process_if_block (ce_if_block
* ce_info
,
456 /* if block information */int do_multiple_p
)
458 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
459 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
460 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
461 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
462 rtx_insn
*then_start
; /* first insn in THEN block */
463 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
464 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
465 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
466 int max
; /* max # of insns to convert. */
467 int then_mod_ok
; /* whether conditional mods are ok in THEN */
468 rtx true_expr
; /* test for else block insns */
469 rtx false_expr
; /* test for then block insns */
470 int true_prob_val
; /* probability of else block */
471 int false_prob_val
; /* probability of then block */
472 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
473 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
474 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
475 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
476 int then_n_insns
, else_n_insns
, n_insns
;
477 enum rtx_code false_code
;
480 /* If test is comprised of && or || elements, and we've failed at handling
481 all of them together, just use the last test if it is the special case of
482 && elements without an ELSE block. */
483 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
485 if (else_bb
|| ! ce_info
->and_and_p
)
488 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
489 ce_info
->num_multiple_test_blocks
= 0;
490 ce_info
->num_and_and_blocks
= 0;
491 ce_info
->num_or_or_blocks
= 0;
494 /* Find the conditional jump to the ELSE or JOIN part, and isolate
496 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
500 /* If the conditional jump is more than just a conditional jump,
501 then we can not do conditional execution conversion on this block. */
502 if (! onlyjump_p (BB_END (test_bb
)))
505 /* Collect the bounds of where we're to search, skipping any labels, jumps
506 and notes at the beginning and end of the block. Then count the total
507 number of insns and see if it is small enough to convert. */
508 then_start
= first_active_insn (then_bb
);
509 then_end
= last_active_insn (then_bb
, TRUE
);
510 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
511 n_insns
= then_n_insns
;
512 max
= MAX_CONDITIONAL_EXECUTE
;
519 else_start
= first_active_insn (else_bb
);
520 else_end
= last_active_insn (else_bb
, TRUE
);
521 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
522 n_insns
+= else_n_insns
;
524 /* Look for matching sequences at the head and tail of the two blocks,
525 and limit the range of insns to be converted if possible. */
526 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
527 &then_first_tail
, &else_first_tail
,
529 if (then_first_tail
== BB_HEAD (then_bb
))
530 then_start
= then_end
= NULL
;
531 if (else_first_tail
== BB_HEAD (else_bb
))
532 else_start
= else_end
= NULL
;
537 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
539 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
540 n_insns
-= 2 * n_matching
;
545 && then_n_insns
> n_matching
546 && else_n_insns
> n_matching
)
548 int longest_match
= MIN (then_n_insns
- n_matching
,
549 else_n_insns
- n_matching
);
551 = flow_find_head_matching_sequence (then_bb
, else_bb
,
560 /* We won't pass the insns in the head sequence to
561 cond_exec_process_insns, so we need to test them here
562 to make sure that they don't clobber the condition. */
563 for (insn
= BB_HEAD (then_bb
);
564 insn
!= NEXT_INSN (then_last_head
);
565 insn
= NEXT_INSN (insn
))
566 if (!LABEL_P (insn
) && !NOTE_P (insn
)
567 && !DEBUG_INSN_P (insn
)
568 && modified_in_p (test_expr
, insn
))
572 if (then_last_head
== then_end
)
573 then_start
= then_end
= NULL
;
574 if (else_last_head
== else_end
)
575 else_start
= else_end
= NULL
;
580 then_start
= find_active_insn_after (then_bb
, then_last_head
);
582 else_start
= find_active_insn_after (else_bb
, else_last_head
);
583 n_insns
-= 2 * n_matching
;
591 /* Map test_expr/test_jump into the appropriate MD tests to use on
592 the conditionally executed code. */
594 true_expr
= test_expr
;
596 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
597 if (false_code
!= UNKNOWN
)
598 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
599 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
601 false_expr
= NULL_RTX
;
603 #ifdef IFCVT_MODIFY_TESTS
604 /* If the machine description needs to modify the tests, such as setting a
605 conditional execution register from a comparison, it can do so here. */
606 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
608 /* See if the conversion failed. */
609 if (!true_expr
|| !false_expr
)
613 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
616 true_prob_val
= XINT (note
, 0);
617 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
625 /* If we have && or || tests, do them here. These tests are in the adjacent
626 blocks after the first block containing the test. */
627 if (ce_info
->num_multiple_test_blocks
> 0)
629 basic_block bb
= test_bb
;
630 basic_block last_test_bb
= ce_info
->last_test_bb
;
637 rtx_insn
*start
, *end
;
639 enum rtx_code f_code
;
641 bb
= block_fallthru (bb
);
642 start
= first_active_insn (bb
);
643 end
= last_active_insn (bb
, TRUE
);
645 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
646 false_prob_val
, FALSE
))
649 /* If the conditional jump is more than just a conditional jump, then
650 we can not do conditional execution conversion on this block. */
651 if (! onlyjump_p (BB_END (bb
)))
654 /* Find the conditional jump and isolate the test. */
655 t
= cond_exec_get_condition (BB_END (bb
));
659 f_code
= reversed_comparison_code (t
, BB_END (bb
));
660 if (f_code
== UNKNOWN
)
663 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
664 if (ce_info
->and_and_p
)
666 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
667 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
671 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
672 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
675 /* If the machine description needs to modify the tests, such as
676 setting a conditional execution register from a comparison, it can
678 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
679 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
681 /* See if the conversion failed. */
689 while (bb
!= last_test_bb
);
692 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
693 on then THEN block. */
694 then_mod_ok
= (else_bb
== NULL_BLOCK
);
696 /* Go through the THEN and ELSE blocks converting the insns if possible
697 to conditional execution. */
701 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
702 false_expr
, false_prob_val
,
706 if (else_bb
&& else_end
707 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
708 true_expr
, true_prob_val
, TRUE
))
711 /* If we cannot apply the changes, fail. Do not go through the normal fail
712 processing, since apply_change_group will call cancel_changes. */
713 if (! apply_change_group ())
715 #ifdef IFCVT_MODIFY_CANCEL
716 /* Cancel any machine dependent changes. */
717 IFCVT_MODIFY_CANCEL (ce_info
);
722 #ifdef IFCVT_MODIFY_FINAL
723 /* Do any machine dependent final modifications. */
724 IFCVT_MODIFY_FINAL (ce_info
);
727 /* Conversion succeeded. */
729 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
730 n_insns
, (n_insns
== 1) ? " was" : "s were");
732 /* Merge the blocks! If we had matching sequences, make sure to delete one
733 copy at the appropriate location first: delete the copy in the THEN branch
734 for a tail sequence so that the remaining one is executed last for both
735 branches, and delete the copy in the ELSE branch for a head sequence so
736 that the remaining one is executed first for both branches. */
739 rtx_insn
*from
= then_first_tail
;
741 from
= find_active_insn_after (then_bb
, from
);
742 delete_insn_chain (from
, BB_END (then_bb
), false);
745 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
747 merge_if_block (ce_info
);
748 cond_exec_changed_p
= TRUE
;
752 #ifdef IFCVT_MODIFY_CANCEL
753 /* Cancel any machine dependent changes. */
754 IFCVT_MODIFY_CANCEL (ce_info
);
761 /* Used by noce_process_if_block to communicate with its subroutines.
763 The subroutines know that A and B may be evaluated freely. They
764 know that X is a register. They should insert new instructions
765 before cond_earliest. */
769 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
770 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
772 /* The jump that ends TEST_BB. */
775 /* The jump condition. */
778 /* New insns should be inserted before this one. */
779 rtx_insn
*cond_earliest
;
781 /* Insns in the THEN and ELSE block. There is always just this
782 one insns in those blocks. The insns are single_set insns.
783 If there was no ELSE block, INSN_B is the last insn before
784 COND_EARLIEST, or NULL_RTX. In the former case, the insn
785 operands are still valid, as if INSN_B was moved down below
787 rtx_insn
*insn_a
, *insn_b
;
789 /* The SET_SRC of INSN_A and INSN_B. */
792 /* The SET_DEST of INSN_A. */
795 /* True if this if block is not canonical. In the canonical form of
796 if blocks, the THEN_BB is the block reached via the fallthru edge
797 from TEST_BB. For the noce transformations, we allow the symmetric
799 bool then_else_reversed
;
801 /* True if the contents of then_bb and else_bb are a
802 simple single set instruction. */
806 /* The total rtx cost of the instructions in then_bb and else_bb. */
807 unsigned int then_cost
;
808 unsigned int else_cost
;
810 /* Estimated cost of the particular branch instruction. */
811 unsigned int branch_cost
;
814 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
815 static int noce_try_move (struct noce_if_info
*);
816 static int noce_try_store_flag (struct noce_if_info
*);
817 static int noce_try_addcc (struct noce_if_info
*);
818 static int noce_try_store_flag_constants (struct noce_if_info
*);
819 static int noce_try_store_flag_mask (struct noce_if_info
*);
820 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
822 static int noce_try_cmove (struct noce_if_info
*);
823 static int noce_try_cmove_arith (struct noce_if_info
*);
824 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
825 static int noce_try_minmax (struct noce_if_info
*);
826 static int noce_try_abs (struct noce_if_info
*);
827 static int noce_try_sign_mask (struct noce_if_info
*);
829 /* Helper function for noce_try_store_flag*. */
832 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
835 rtx cond
= if_info
->cond
;
839 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
840 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
842 /* If earliest == jump, or when the condition is complex, try to
843 build the store_flag insn directly. */
847 rtx set
= pc_set (if_info
->jump
);
848 cond
= XEXP (SET_SRC (set
), 0);
849 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
850 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
851 reversep
= !reversep
;
852 if (if_info
->then_else_reversed
)
853 reversep
= !reversep
;
857 code
= reversed_comparison_code (cond
, if_info
->jump
);
859 code
= GET_CODE (cond
);
861 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
862 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
864 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
866 rtx set
= gen_rtx_SET (x
, src
);
869 rtx_insn
*insn
= emit_insn (set
);
871 if (recog_memoized (insn
) >= 0)
873 rtx_insn
*seq
= get_insns ();
877 if_info
->cond_earliest
= if_info
->jump
;
885 /* Don't even try if the comparison operands or the mode of X are weird. */
886 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
889 return emit_store_flag (x
, code
, XEXP (cond
, 0),
890 XEXP (cond
, 1), VOIDmode
,
891 (code
== LTU
|| code
== LEU
892 || code
== GEU
|| code
== GTU
), normalize
);
895 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
896 X is the destination/target and Y is the value to copy. */
899 noce_emit_move_insn (rtx x
, rtx y
)
901 machine_mode outmode
;
905 if (GET_CODE (x
) != STRICT_LOW_PART
)
907 rtx_insn
*seq
, *insn
;
912 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
913 otherwise construct a suitable SET pattern ourselves. */
914 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
915 ? emit_move_insn (x
, y
)
916 : emit_insn (gen_rtx_SET (x
, y
));
920 if (recog_memoized (insn
) <= 0)
922 if (GET_CODE (x
) == ZERO_EXTRACT
)
924 rtx op
= XEXP (x
, 0);
925 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
926 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
928 /* store_bit_field expects START to be relative to
929 BYTES_BIG_ENDIAN and adjusts this value for machines with
930 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
931 invoke store_bit_field again it is necessary to have the START
932 value from the first call. */
933 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
936 start
= BITS_PER_UNIT
- start
- size
;
939 gcc_assert (REG_P (op
));
940 start
= BITS_PER_WORD
- start
- size
;
944 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
945 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
949 switch (GET_RTX_CLASS (GET_CODE (y
)))
952 ot
= code_to_optab (GET_CODE (y
));
956 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
957 if (target
!= NULL_RTX
)
960 emit_move_insn (x
, target
);
969 ot
= code_to_optab (GET_CODE (y
));
973 target
= expand_binop (GET_MODE (y
), ot
,
974 XEXP (y
, 0), XEXP (y
, 1),
976 if (target
!= NULL_RTX
)
979 emit_move_insn (x
, target
);
996 inner
= XEXP (outer
, 0);
997 outmode
= GET_MODE (outer
);
998 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
999 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1000 0, 0, outmode
, y
, false);
1003 /* Return the CC reg if it is used in COND. */
1006 cc_in_cond (rtx cond
)
1008 if (have_cbranchcc4
&& cond
1009 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1010 return XEXP (cond
, 0);
1015 /* Return sequence of instructions generated by if conversion. This
1016 function calls end_sequence() to end the current stream, ensures
1017 that the instructions are unshared, recognizable non-jump insns.
1018 On failure, this function returns a NULL_RTX. */
1021 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1024 rtx_insn
*seq
= get_insns ();
1025 rtx cc
= cc_in_cond (if_info
->cond
);
1027 set_used_flags (if_info
->x
);
1028 set_used_flags (if_info
->cond
);
1029 set_used_flags (if_info
->a
);
1030 set_used_flags (if_info
->b
);
1032 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1033 set_used_flags (insn
);
1035 unshare_all_rtl_in_chain (seq
);
1038 /* Make sure that all of the instructions emitted are recognizable,
1039 and that we haven't introduced a new jump instruction.
1040 As an exercise for the reader, build a general mechanism that
1041 allows proper placement of required clobbers. */
1042 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1044 || recog_memoized (insn
) == -1
1045 /* Make sure new generated code does not clobber CC. */
1046 || (cc
&& set_of (cc
, insn
)))
1052 /* Return true iff the then and else basic block (if it exists)
1053 consist of a single simple set instruction. */
1056 noce_simple_bbs (struct noce_if_info
*if_info
)
1058 if (!if_info
->then_simple
)
1061 if (if_info
->else_bb
)
1062 return if_info
->else_simple
;
1067 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1068 "if (a == b) x = a; else x = b" into "x = b". */
1071 noce_try_move (struct noce_if_info
*if_info
)
1073 rtx cond
= if_info
->cond
;
1074 enum rtx_code code
= GET_CODE (cond
);
1078 if (code
!= NE
&& code
!= EQ
)
1081 if (!noce_simple_bbs (if_info
))
1084 /* This optimization isn't valid if either A or B could be a NaN
1085 or a signed zero. */
1086 if (HONOR_NANS (if_info
->x
)
1087 || HONOR_SIGNED_ZEROS (if_info
->x
))
1090 /* Check whether the operands of the comparison are A and in
1092 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1093 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1094 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1095 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1097 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1100 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1102 /* Avoid generating the move if the source is the destination. */
1103 if (! rtx_equal_p (if_info
->x
, y
))
1106 noce_emit_move_insn (if_info
->x
, y
);
1107 seq
= end_ifcvt_sequence (if_info
);
1111 emit_insn_before_setloc (seq
, if_info
->jump
,
1112 INSN_LOCATION (if_info
->insn_a
));
1119 /* Convert "if (test) x = 1; else x = 0".
1121 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1122 tried in noce_try_store_flag_constants after noce_try_cmove has had
1123 a go at the conversion. */
1126 noce_try_store_flag (struct noce_if_info
*if_info
)
1132 if (!noce_simple_bbs (if_info
))
1135 if (CONST_INT_P (if_info
->b
)
1136 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1137 && if_info
->a
== const0_rtx
)
1139 else if (if_info
->b
== const0_rtx
1140 && CONST_INT_P (if_info
->a
)
1141 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1142 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1150 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1153 if (target
!= if_info
->x
)
1154 noce_emit_move_insn (if_info
->x
, target
);
1156 seq
= end_ifcvt_sequence (if_info
);
1160 emit_insn_before_setloc (seq
, if_info
->jump
,
1161 INSN_LOCATION (if_info
->insn_a
));
1172 /* Convert "if (test) x = -A; else x = A" into
1173 x = A; if (test) x = -x if the machine can do the
1174 conditional negate form of this cheaply.
1175 Try this before noce_try_cmove that will just load the
1176 immediates into two registers and do a conditional select
1177 between them. If the target has a conditional negate or
1178 conditional invert operation we can save a potentially
1179 expensive constant synthesis. */
1182 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1184 if (!noce_simple_bbs (if_info
))
1187 if (!CONST_INT_P (if_info
->a
)
1188 || !CONST_INT_P (if_info
->b
)
1189 || !REG_P (if_info
->x
))
1192 machine_mode mode
= GET_MODE (if_info
->x
);
1194 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1195 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1197 rtx cond
= if_info
->cond
;
1205 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1207 else if (val_a
== ~val_b
)
1215 rtx tmp
= gen_reg_rtx (mode
);
1216 noce_emit_move_insn (tmp
, if_info
->a
);
1218 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1222 rtx_insn
*seq
= get_insns ();
1230 if (target
!= if_info
->x
)
1231 noce_emit_move_insn (if_info
->x
, target
);
1233 seq
= end_ifcvt_sequence (if_info
);
1238 emit_insn_before_setloc (seq
, if_info
->jump
,
1239 INSN_LOCATION (if_info
->insn_a
));
1248 /* Convert "if (test) x = a; else x = b", for A and B constant.
1249 Also allow A = y + c1, B = y + c2, with a common y between A
1253 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1258 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1261 machine_mode mode
= GET_MODE (if_info
->x
);;
1262 rtx common
= NULL_RTX
;
1267 /* Handle cases like x := test ? y + 3 : y + 4. */
1268 if (GET_CODE (a
) == PLUS
1269 && GET_CODE (b
) == PLUS
1270 && CONST_INT_P (XEXP (a
, 1))
1271 && CONST_INT_P (XEXP (b
, 1))
1272 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1273 && noce_operand_ok (XEXP (a
, 0))
1274 && if_info
->branch_cost
>= 2)
1276 common
= XEXP (a
, 0);
1281 if (!noce_simple_bbs (if_info
))
1287 ifalse
= INTVAL (a
);
1289 bool subtract_flag_p
= false;
1291 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1292 /* Make sure we can represent the difference between the two values. */
1294 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1297 diff
= trunc_int_for_mode (diff
, mode
);
1299 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1303 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1306 /* We could collapse these cases but it is easier to follow the
1307 diff/STORE_FLAG_VALUE combinations when they are listed
1311 => 4 + (test != 0). */
1312 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1315 => can_reverse | 4 + (test == 0)
1316 !can_reverse | 3 - (test != 0). */
1317 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1319 reversep
= can_reverse
;
1320 subtract_flag_p
= !can_reverse
;
1321 /* If we need to subtract the flag and we have PLUS-immediate
1322 A and B then it is unlikely to be beneficial to play tricks
1324 if (subtract_flag_p
&& common
)
1328 => can_reverse | 3 + (test == 0)
1329 !can_reverse | 4 - (test != 0). */
1330 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1332 reversep
= can_reverse
;
1333 subtract_flag_p
= !can_reverse
;
1334 /* If we need to subtract the flag and we have PLUS-immediate
1335 A and B then it is unlikely to be beneficial to play tricks
1337 if (subtract_flag_p
&& common
)
1341 => 4 + (test != 0). */
1342 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1347 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1348 && (STORE_FLAG_VALUE
== 1
1349 || if_info
->branch_cost
>= 2))
1351 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1352 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1357 else if (itrue
== -1
1358 && (STORE_FLAG_VALUE
== -1
1359 || if_info
->branch_cost
>= 2))
1361 else if (ifalse
== -1 && can_reverse
1362 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1372 std::swap (itrue
, ifalse
);
1373 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1378 /* If we have x := test ? x + 3 : x + 4 then move the original
1379 x out of the way while we store flags. */
1380 if (common
&& rtx_equal_p (common
, if_info
->x
))
1382 common
= gen_reg_rtx (mode
);
1383 noce_emit_move_insn (common
, if_info
->x
);
1386 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1393 /* if (test) x = 3; else x = 4;
1394 => x = 3 + (test == 0); */
1395 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1397 /* Add the common part now. This may allow combine to merge this
1398 with the store flag operation earlier into some sort of conditional
1399 increment/decrement if the target allows it. */
1401 target
= expand_simple_binop (mode
, PLUS
,
1403 target
, 0, OPTAB_WIDEN
);
1405 /* Always use ifalse here. It should have been swapped with itrue
1406 when appropriate when reversep is true. */
1407 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1408 gen_int_mode (ifalse
, mode
), target
,
1409 if_info
->x
, 0, OPTAB_WIDEN
);
1411 /* Other cases are not beneficial when the original A and B are PLUS
1418 /* if (test) x = 8; else x = 0;
1419 => x = (test != 0) << 3; */
1420 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1422 target
= expand_simple_binop (mode
, ASHIFT
,
1423 target
, GEN_INT (tmp
), if_info
->x
, 0,
1427 /* if (test) x = -1; else x = b;
1428 => x = -(test != 0) | b; */
1429 else if (itrue
== -1)
1431 target
= expand_simple_binop (mode
, IOR
,
1432 target
, gen_int_mode (ifalse
, mode
),
1433 if_info
->x
, 0, OPTAB_WIDEN
);
1447 if (target
!= if_info
->x
)
1448 noce_emit_move_insn (if_info
->x
, target
);
1450 seq
= end_ifcvt_sequence (if_info
);
1454 emit_insn_before_setloc (seq
, if_info
->jump
,
1455 INSN_LOCATION (if_info
->insn_a
));
1462 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1463 similarly for "foo--". */
1466 noce_try_addcc (struct noce_if_info
*if_info
)
1470 int subtract
, normalize
;
1472 if (!noce_simple_bbs (if_info
))
1475 if (GET_CODE (if_info
->a
) == PLUS
1476 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1477 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1480 rtx cond
= if_info
->cond
;
1481 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1483 /* First try to use addcc pattern. */
1484 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1485 && general_operand (XEXP (cond
, 1), VOIDmode
))
1488 target
= emit_conditional_add (if_info
->x
, code
,
1493 XEXP (if_info
->a
, 1),
1494 GET_MODE (if_info
->x
),
1495 (code
== LTU
|| code
== GEU
1496 || code
== LEU
|| code
== GTU
));
1499 if (target
!= if_info
->x
)
1500 noce_emit_move_insn (if_info
->x
, target
);
1502 seq
= end_ifcvt_sequence (if_info
);
1506 emit_insn_before_setloc (seq
, if_info
->jump
,
1507 INSN_LOCATION (if_info
->insn_a
));
1513 /* If that fails, construct conditional increment or decrement using
1515 if (if_info
->branch_cost
>= 2
1516 && (XEXP (if_info
->a
, 1) == const1_rtx
1517 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1520 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1521 subtract
= 0, normalize
= 0;
1522 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1523 subtract
= 1, normalize
= 0;
1525 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1528 target
= noce_emit_store_flag (if_info
,
1529 gen_reg_rtx (GET_MODE (if_info
->x
)),
1533 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1534 subtract
? MINUS
: PLUS
,
1535 if_info
->b
, target
, if_info
->x
,
1539 if (target
!= if_info
->x
)
1540 noce_emit_move_insn (if_info
->x
, target
);
1542 seq
= end_ifcvt_sequence (if_info
);
1546 emit_insn_before_setloc (seq
, if_info
->jump
,
1547 INSN_LOCATION (if_info
->insn_a
));
1557 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1560 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1566 if (!noce_simple_bbs (if_info
))
1570 if ((if_info
->branch_cost
>= 2
1571 || STORE_FLAG_VALUE
== -1)
1572 && ((if_info
->a
== const0_rtx
1573 && rtx_equal_p (if_info
->b
, if_info
->x
))
1574 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1577 && if_info
->b
== const0_rtx
1578 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1581 target
= noce_emit_store_flag (if_info
,
1582 gen_reg_rtx (GET_MODE (if_info
->x
)),
1585 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1587 target
, if_info
->x
, 0,
1592 int old_cost
, new_cost
, insn_cost
;
1595 if (target
!= if_info
->x
)
1596 noce_emit_move_insn (if_info
->x
, target
);
1598 seq
= end_ifcvt_sequence (if_info
);
1602 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1603 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1604 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1605 new_cost
= seq_cost (seq
, speed_p
);
1607 if (new_cost
> old_cost
)
1610 emit_insn_before_setloc (seq
, if_info
->jump
,
1611 INSN_LOCATION (if_info
->insn_a
));
1621 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1624 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1625 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1627 rtx target ATTRIBUTE_UNUSED
;
1628 int unsignedp ATTRIBUTE_UNUSED
;
1630 /* If earliest == jump, try to build the cmove insn directly.
1631 This is helpful when combine has created some complex condition
1632 (like for alpha's cmovlbs) that we can't hope to regenerate
1633 through the normal interface. */
1635 if (if_info
->cond_earliest
== if_info
->jump
)
1637 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1638 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1639 cond
, vtrue
, vfalse
);
1640 rtx set
= gen_rtx_SET (x
, if_then_else
);
1643 rtx_insn
*insn
= emit_insn (set
);
1645 if (recog_memoized (insn
) >= 0)
1647 rtx_insn
*seq
= get_insns ();
1657 /* Don't even try if the comparison operands are weird
1658 except that the target supports cbranchcc4. */
1659 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1660 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1662 if (!have_cbranchcc4
1663 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1664 || cmp_b
!= const0_rtx
)
1668 unsignedp
= (code
== LTU
|| code
== GEU
1669 || code
== LEU
|| code
== GTU
);
1671 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1672 vtrue
, vfalse
, GET_MODE (x
),
1677 /* We might be faced with a situation like:
1680 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1681 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1683 We can't do a conditional move in mode M, but it's possible that we
1684 could do a conditional move in mode N instead and take a subreg of
1687 If we can't create new pseudos, though, don't bother. */
1688 if (reload_completed
)
1691 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1693 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1694 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1695 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1696 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1697 rtx promoted_target
;
1699 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1700 || byte_vtrue
!= byte_vfalse
1701 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1702 != SUBREG_PROMOTED_VAR_P (vfalse
))
1703 || (SUBREG_PROMOTED_GET (vtrue
)
1704 != SUBREG_PROMOTED_GET (vfalse
)))
1707 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1709 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1710 VOIDmode
, reg_vtrue
, reg_vfalse
,
1711 GET_MODE (reg_vtrue
), unsignedp
);
1712 /* Nope, couldn't do it in that mode either. */
1716 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1717 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1718 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1719 emit_move_insn (x
, target
);
1726 /* Try only simple constants and registers here. More complex cases
1727 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1728 has had a go at it. */
1731 noce_try_cmove (struct noce_if_info
*if_info
)
1737 if (!noce_simple_bbs (if_info
))
1740 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1741 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1745 code
= GET_CODE (if_info
->cond
);
1746 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1747 XEXP (if_info
->cond
, 0),
1748 XEXP (if_info
->cond
, 1),
1749 if_info
->a
, if_info
->b
);
1753 if (target
!= if_info
->x
)
1754 noce_emit_move_insn (if_info
->x
, target
);
1756 seq
= end_ifcvt_sequence (if_info
);
1760 emit_insn_before_setloc (seq
, if_info
->jump
,
1761 INSN_LOCATION (if_info
->insn_a
));
1764 /* If both a and b are constants try a last-ditch transformation:
1765 if (test) x = a; else x = b;
1766 => x = (-(test != 0) & (b - a)) + a;
1767 Try this only if the target-specific expansion above has failed.
1768 The target-specific expander may want to generate sequences that
1769 we don't know about, so give them a chance before trying this
1771 else if (!targetm
.have_conditional_execution ()
1772 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1773 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1774 || if_info
->branch_cost
>= 3))
1776 machine_mode mode
= GET_MODE (if_info
->x
);
1777 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1778 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1779 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1786 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1787 /* Make sure we can represent the difference
1788 between the two values. */
1790 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1796 diff
= trunc_int_for_mode (diff
, mode
);
1797 target
= expand_simple_binop (mode
, AND
,
1798 target
, gen_int_mode (diff
, mode
),
1799 if_info
->x
, 0, OPTAB_WIDEN
);
1801 target
= expand_simple_binop (mode
, PLUS
,
1802 target
, gen_int_mode (ifalse
, mode
),
1803 if_info
->x
, 0, OPTAB_WIDEN
);
1806 if (target
!= if_info
->x
)
1807 noce_emit_move_insn (if_info
->x
, target
);
1809 seq
= end_ifcvt_sequence (if_info
);
1813 emit_insn_before_setloc (seq
, if_info
->jump
,
1814 INSN_LOCATION (if_info
->insn_a
));
1830 /* Return true if X contains a conditional code mode rtx. */
1833 contains_ccmode_rtx_p (rtx x
)
1835 subrtx_iterator::array_type array
;
1836 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1837 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1843 /* Helper for bb_valid_for_noce_process_p. Validate that
1844 the rtx insn INSN is a single set that does not set
1845 the conditional register CC and is in general valid for
1849 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1852 || !NONJUMP_INSN_P (insn
)
1853 || (cc
&& set_of (cc
, insn
)))
1856 rtx sset
= single_set (insn
);
1858 /* Currently support only simple single sets in test_bb. */
1860 || !noce_operand_ok (SET_DEST (sset
))
1861 || contains_ccmode_rtx_p (SET_DEST (sset
))
1862 || !noce_operand_ok (SET_SRC (sset
)))
1869 /* Return true iff the registers that the insns in BB_A set do not
1870 get used in BB_B. */
1873 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
)
1876 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1881 FOR_BB_INSNS (bb_a
, a_insn
)
1883 if (!active_insn_p (a_insn
))
1886 rtx sset_a
= single_set (a_insn
);
1890 BITMAP_FREE (bba_sets
);
1894 /* Record all registers that BB_A sets. */
1895 FOR_EACH_INSN_DEF (def
, a_insn
)
1896 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1901 FOR_BB_INSNS (bb_b
, b_insn
)
1903 if (!active_insn_p (b_insn
))
1906 rtx sset_b
= single_set (b_insn
);
1910 BITMAP_FREE (bba_sets
);
1914 /* Make sure this is a REG and not some instance
1915 of ZERO_EXTRACT or SUBREG or other dangerous stuff. */
1916 if (!REG_P (SET_DEST (sset_b
)))
1918 BITMAP_FREE (bba_sets
);
1922 /* If the insn uses a reg set in BB_A return false. */
1923 FOR_EACH_INSN_USE (use
, b_insn
)
1925 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1927 BITMAP_FREE (bba_sets
);
1934 BITMAP_FREE (bba_sets
);
1938 /* Emit copies of all the active instructions in BB except the last.
1939 This is a helper for noce_try_cmove_arith. */
1942 noce_emit_all_but_last (basic_block bb
)
1944 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
1946 FOR_BB_INSNS (bb
, insn
)
1948 if (insn
!= last
&& active_insn_p (insn
))
1950 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
1952 emit_insn (PATTERN (to_emit
));
1957 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
1958 the resulting insn or NULL if it's not a valid insn. */
1961 noce_emit_insn (rtx to_emit
)
1963 gcc_assert (to_emit
);
1964 rtx_insn
*insn
= emit_insn (to_emit
);
1966 if (recog_memoized (insn
) < 0)
1972 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
1973 and including the penultimate one in BB if it is not simple
1974 (as indicated by SIMPLE). Then emit LAST_INSN as the last
1975 insn in the block. The reason for that is that LAST_INSN may
1976 have been modified by the preparation in noce_try_cmove_arith. */
1979 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
1982 noce_emit_all_but_last (bb
);
1984 if (last_insn
&& !noce_emit_insn (last_insn
))
1990 /* Try more complex cases involving conditional_move. */
1993 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1999 rtx_insn
*insn_a
, *insn_b
;
2000 bool a_simple
= if_info
->then_simple
;
2001 bool b_simple
= if_info
->else_simple
;
2002 basic_block then_bb
= if_info
->then_bb
;
2003 basic_block else_bb
= if_info
->else_bb
;
2007 rtx_insn
*ifcvt_seq
;
2009 /* A conditional move from two memory sources is equivalent to a
2010 conditional on their addresses followed by a load. Don't do this
2011 early because it'll screw alias analysis. Note that we've
2012 already checked for no side effects. */
2013 /* ??? FIXME: Magic number 5. */
2014 if (cse_not_expected
2015 && MEM_P (a
) && MEM_P (b
)
2016 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
2017 && if_info
->branch_cost
>= 5)
2019 machine_mode address_mode
= get_address_mode (a
);
2023 x
= gen_reg_rtx (address_mode
);
2027 /* ??? We could handle this if we knew that a load from A or B could
2028 not trap or fault. This is also true if we've already loaded
2029 from the address along the path from ENTRY. */
2030 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2033 /* if (test) x = a + b; else x = c - d;
2040 code
= GET_CODE (if_info
->cond
);
2041 insn_a
= if_info
->insn_a
;
2042 insn_b
= if_info
->insn_b
;
2044 machine_mode x_mode
= GET_MODE (x
);
2046 if (!can_conditionally_move_p (x_mode
))
2049 unsigned int then_cost
;
2050 unsigned int else_cost
;
2052 then_cost
= if_info
->then_cost
;
2057 else_cost
= if_info
->else_cost
;
2061 /* We're going to execute one of the basic blocks anyway, so
2062 bail out if the most expensive of the two blocks is unacceptable. */
2063 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
2066 /* Possibly rearrange operands to make things come out more natural. */
2067 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
2070 if (rtx_equal_p (b
, x
))
2072 else if (general_operand (b
, GET_MODE (b
)))
2077 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2079 std::swap (insn_a
, insn_b
);
2080 std::swap (a_simple
, b_simple
);
2081 std::swap (then_bb
, else_bb
);
2085 if (then_bb
&& else_bb
&& !a_simple
&& !b_simple
2086 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
)
2087 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
)))
2092 /* If one of the blocks is empty then the corresponding B or A value
2093 came from the test block. The non-empty complex block that we will
2094 emit might clobber the register used by B or A, so move it to a pseudo
2097 rtx tmp_a
= NULL_RTX
;
2098 rtx tmp_b
= NULL_RTX
;
2100 if (b_simple
|| !else_bb
)
2101 tmp_b
= gen_reg_rtx (x_mode
);
2103 if (a_simple
|| !then_bb
)
2104 tmp_a
= gen_reg_rtx (x_mode
);
2109 rtx emit_a
= NULL_RTX
;
2110 rtx emit_b
= NULL_RTX
;
2111 rtx_insn
*tmp_insn
= NULL
;
2112 bool modified_in_a
= false;
2113 bool modified_in_b
= false;
2114 /* If either operand is complex, load it into a register first.
2115 The best way to do this is to copy the original insn. In this
2116 way we preserve any clobbers etc that the insn may have had.
2117 This is of course not possible in the IS_MEM case. */
2119 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2124 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2125 emit_a
= gen_rtx_SET (reg
, a
);
2131 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2133 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2134 rtx set
= single_set (copy_of_a
);
2137 emit_a
= PATTERN (copy_of_a
);
2141 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2142 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2148 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2152 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2153 emit_b
= gen_rtx_SET (reg
, b
);
2159 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2160 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2161 rtx set
= single_set (copy_of_b
);
2164 emit_b
= PATTERN (copy_of_b
);
2168 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2169 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2175 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2176 if (tmp_b
&& then_bb
)
2178 FOR_BB_INSNS (then_bb
, tmp_insn
)
2179 /* Don't check inside insn_a. We will have changed it to emit_a
2180 with a destination that doesn't conflict. */
2181 if (!(insn_a
&& tmp_insn
== insn_a
)
2182 && modified_in_p (orig_b
, tmp_insn
))
2184 modified_in_a
= true;
2190 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2191 if (tmp_a
&& else_bb
)
2193 FOR_BB_INSNS (else_bb
, tmp_insn
)
2194 /* Don't check inside insn_b. We will have changed it to emit_b
2195 with a destination that doesn't conflict. */
2196 if (!(insn_b
&& tmp_insn
== insn_b
)
2197 && modified_in_p (orig_a
, tmp_insn
))
2199 modified_in_b
= true;
2204 /* If insn to set up A clobbers any registers B depends on, try to
2205 swap insn that sets up A with the one that sets up B. If even
2206 that doesn't help, punt. */
2207 if (modified_in_a
&& !modified_in_b
)
2209 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2210 goto end_seq_and_fail
;
2212 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2213 goto end_seq_and_fail
;
2215 else if (!modified_in_a
)
2217 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2218 goto end_seq_and_fail
;
2220 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2221 goto end_seq_and_fail
;
2224 goto end_seq_and_fail
;
2226 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2227 XEXP (if_info
->cond
, 1), a
, b
);
2230 goto end_seq_and_fail
;
2232 /* If we're handling a memory for above, emit the load now. */
2235 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2237 /* Copy over flags as appropriate. */
2238 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2239 MEM_VOLATILE_P (mem
) = 1;
2240 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2241 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2243 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2245 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2246 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2248 noce_emit_move_insn (if_info
->x
, mem
);
2250 else if (target
!= x
)
2251 noce_emit_move_insn (x
, target
);
2253 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2257 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2258 INSN_LOCATION (if_info
->insn_a
));
2266 /* For most cases, the simplified condition we found is the best
2267 choice, but this is not the case for the min/max/abs transforms.
2268 For these we wish to know that it is A or B in the condition. */
2271 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2272 rtx_insn
**earliest
)
2278 /* If target is already mentioned in the known condition, return it. */
2279 if (reg_mentioned_p (target
, if_info
->cond
))
2281 *earliest
= if_info
->cond_earliest
;
2282 return if_info
->cond
;
2285 set
= pc_set (if_info
->jump
);
2286 cond
= XEXP (SET_SRC (set
), 0);
2288 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2289 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2290 if (if_info
->then_else_reversed
)
2293 /* If we're looking for a constant, try to make the conditional
2294 have that constant in it. There are two reasons why it may
2295 not have the constant we want:
2297 1. GCC may have needed to put the constant in a register, because
2298 the target can't compare directly against that constant. For
2299 this case, we look for a SET immediately before the comparison
2300 that puts a constant in that register.
2302 2. GCC may have canonicalized the conditional, for example
2303 replacing "if x < 4" with "if x <= 3". We can undo that (or
2304 make equivalent types of changes) to get the constants we need
2305 if they're off by one in the right direction. */
2307 if (CONST_INT_P (target
))
2309 enum rtx_code code
= GET_CODE (if_info
->cond
);
2310 rtx op_a
= XEXP (if_info
->cond
, 0);
2311 rtx op_b
= XEXP (if_info
->cond
, 1);
2312 rtx_insn
*prev_insn
;
2314 /* First, look to see if we put a constant in a register. */
2315 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2317 && BLOCK_FOR_INSN (prev_insn
)
2318 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2319 && INSN_P (prev_insn
)
2320 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2322 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2324 src
= SET_SRC (PATTERN (prev_insn
));
2325 if (CONST_INT_P (src
))
2327 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2329 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2332 if (CONST_INT_P (op_a
))
2334 std::swap (op_a
, op_b
);
2335 code
= swap_condition (code
);
2340 /* Now, look to see if we can get the right constant by
2341 adjusting the conditional. */
2342 if (CONST_INT_P (op_b
))
2344 HOST_WIDE_INT desired_val
= INTVAL (target
);
2345 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2350 if (actual_val
== desired_val
+ 1)
2353 op_b
= GEN_INT (desired_val
);
2357 if (actual_val
== desired_val
- 1)
2360 op_b
= GEN_INT (desired_val
);
2364 if (actual_val
== desired_val
- 1)
2367 op_b
= GEN_INT (desired_val
);
2371 if (actual_val
== desired_val
+ 1)
2374 op_b
= GEN_INT (desired_val
);
2382 /* If we made any changes, generate a new conditional that is
2383 equivalent to what we started with, but has the right
2385 if (code
!= GET_CODE (if_info
->cond
)
2386 || op_a
!= XEXP (if_info
->cond
, 0)
2387 || op_b
!= XEXP (if_info
->cond
, 1))
2389 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2390 *earliest
= if_info
->cond_earliest
;
2395 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2396 earliest
, target
, have_cbranchcc4
, true);
2397 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2400 /* We almost certainly searched back to a different place.
2401 Need to re-verify correct lifetimes. */
2403 /* X may not be mentioned in the range (cond_earliest, jump]. */
2404 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2405 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2408 /* A and B may not be modified in the range [cond_earliest, jump). */
2409 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2411 && (modified_in_p (if_info
->a
, insn
)
2412 || modified_in_p (if_info
->b
, insn
)))
2418 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2421 noce_try_minmax (struct noce_if_info
*if_info
)
2424 rtx_insn
*earliest
, *seq
;
2425 enum rtx_code code
, op
;
2428 if (!noce_simple_bbs (if_info
))
2431 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2432 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2433 to get the target to tell us... */
2434 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2435 || HONOR_NANS (if_info
->x
))
2438 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2442 /* Verify the condition is of the form we expect, and canonicalize
2443 the comparison code. */
2444 code
= GET_CODE (cond
);
2445 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2447 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2450 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2452 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2454 code
= swap_condition (code
);
2459 /* Determine what sort of operation this is. Note that the code is for
2460 a taken branch, so the code->operation mapping appears backwards. */
2493 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2494 if_info
->a
, if_info
->b
,
2495 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2501 if (target
!= if_info
->x
)
2502 noce_emit_move_insn (if_info
->x
, target
);
2504 seq
= end_ifcvt_sequence (if_info
);
2508 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2509 if_info
->cond
= cond
;
2510 if_info
->cond_earliest
= earliest
;
2515 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2516 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2520 noce_try_abs (struct noce_if_info
*if_info
)
2522 rtx cond
, target
, a
, b
, c
;
2523 rtx_insn
*earliest
, *seq
;
2525 bool one_cmpl
= false;
2527 if (!noce_simple_bbs (if_info
))
2530 /* Reject modes with signed zeros. */
2531 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2534 /* Recognize A and B as constituting an ABS or NABS. The canonical
2535 form is a branch around the negation, taken when the object is the
2536 first operand of a comparison against 0 that evaluates to true. */
2539 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2541 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2546 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2551 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2560 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2564 /* Verify the condition is of the form we expect. */
2565 if (rtx_equal_p (XEXP (cond
, 0), b
))
2567 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2575 /* Verify that C is zero. Search one step backward for a
2576 REG_EQUAL note or a simple source if necessary. */
2580 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2582 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2583 && (set
= single_set (insn
))
2584 && rtx_equal_p (SET_DEST (set
), c
))
2586 rtx note
= find_reg_equal_equiv_note (insn
);
2596 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2597 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2598 c
= get_pool_constant (XEXP (c
, 0));
2600 /* Work around funny ideas get_condition has wrt canonicalization.
2601 Note that these rtx constants are known to be CONST_INT, and
2602 therefore imply integer comparisons.
2603 The one_cmpl case is more complicated, as we want to handle
2604 only x < 0 ? ~x : x or x >= 0 ? ~x : x but not
2605 x <= 0 ? ~x : x or x > 0 ? ~x : x, as the latter two
2606 have different result for x == 0. */
2607 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2609 if (one_cmpl
&& negate
)
2612 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2614 if (one_cmpl
&& !negate
)
2617 else if (c
== CONST0_RTX (GET_MODE (b
)))
2620 switch (GET_CODE (cond
))
2627 /* >= 0 is the same case as above > -1. */
2636 /* <= 0 is the same case as above < 1. */
2647 /* Determine what sort of operation this is. */
2648 switch (GET_CODE (cond
))
2667 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2670 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2672 /* ??? It's a quandary whether cmove would be better here, especially
2673 for integers. Perhaps combine will clean things up. */
2674 if (target
&& negate
)
2677 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2680 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2690 if (target
!= if_info
->x
)
2691 noce_emit_move_insn (if_info
->x
, target
);
2693 seq
= end_ifcvt_sequence (if_info
);
2697 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2698 if_info
->cond
= cond
;
2699 if_info
->cond_earliest
= earliest
;
2704 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2707 noce_try_sign_mask (struct noce_if_info
*if_info
)
2713 bool t_unconditional
;
2715 if (!noce_simple_bbs (if_info
))
2718 cond
= if_info
->cond
;
2719 code
= GET_CODE (cond
);
2724 if (if_info
->a
== const0_rtx
)
2726 if ((code
== LT
&& c
== const0_rtx
)
2727 || (code
== LE
&& c
== constm1_rtx
))
2730 else if (if_info
->b
== const0_rtx
)
2732 if ((code
== GE
&& c
== const0_rtx
)
2733 || (code
== GT
&& c
== constm1_rtx
))
2737 if (! t
|| side_effects_p (t
))
2740 /* We currently don't handle different modes. */
2741 mode
= GET_MODE (t
);
2742 if (GET_MODE (m
) != mode
)
2745 /* This is only profitable if T is unconditionally executed/evaluated in the
2746 original insn sequence or T is cheap. The former happens if B is the
2747 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2748 INSN_B which can happen for e.g. conditional stores to memory. For the
2749 cost computation use the block TEST_BB where the evaluation will end up
2750 after the transformation. */
2753 && (if_info
->insn_b
== NULL_RTX
2754 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2755 if (!(t_unconditional
2756 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2757 < COSTS_N_INSNS (2))))
2761 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2762 "(signed) m >> 31" directly. This benefits targets with specialized
2763 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2764 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2765 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2774 noce_emit_move_insn (if_info
->x
, t
);
2776 seq
= end_ifcvt_sequence (if_info
);
2780 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2785 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2789 noce_try_bitop (struct noce_if_info
*if_info
)
2791 rtx cond
, x
, a
, result
;
2798 cond
= if_info
->cond
;
2799 code
= GET_CODE (cond
);
2801 if (!noce_simple_bbs (if_info
))
2804 /* Check for no else condition. */
2805 if (! rtx_equal_p (x
, if_info
->b
))
2808 /* Check for a suitable condition. */
2809 if (code
!= NE
&& code
!= EQ
)
2811 if (XEXP (cond
, 1) != const0_rtx
)
2813 cond
= XEXP (cond
, 0);
2815 /* ??? We could also handle AND here. */
2816 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2818 if (XEXP (cond
, 1) != const1_rtx
2819 || !CONST_INT_P (XEXP (cond
, 2))
2820 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2822 bitnum
= INTVAL (XEXP (cond
, 2));
2823 mode
= GET_MODE (x
);
2824 if (BITS_BIG_ENDIAN
)
2825 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2826 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2833 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2835 /* Check for "if (X & C) x = x op C". */
2836 if (! rtx_equal_p (x
, XEXP (a
, 0))
2837 || !CONST_INT_P (XEXP (a
, 1))
2838 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2839 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2842 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2843 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2844 if (GET_CODE (a
) == IOR
)
2845 result
= (code
== NE
) ? a
: NULL_RTX
;
2846 else if (code
== NE
)
2848 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2849 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2850 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2854 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2855 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2856 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2859 else if (GET_CODE (a
) == AND
)
2861 /* Check for "if (X & C) x &= ~C". */
2862 if (! rtx_equal_p (x
, XEXP (a
, 0))
2863 || !CONST_INT_P (XEXP (a
, 1))
2864 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2865 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2868 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2869 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2870 result
= (code
== EQ
) ? a
: NULL_RTX
;
2878 noce_emit_move_insn (x
, result
);
2879 seq
= end_ifcvt_sequence (if_info
);
2883 emit_insn_before_setloc (seq
, if_info
->jump
,
2884 INSN_LOCATION (if_info
->insn_a
));
2890 /* Similar to get_condition, only the resulting condition must be
2891 valid at JUMP, instead of at EARLIEST.
2893 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2894 THEN block of the caller, and we have to reverse the condition. */
2897 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2902 if (! any_condjump_p (jump
))
2905 set
= pc_set (jump
);
2907 /* If this branches to JUMP_LABEL when the condition is false,
2908 reverse the condition. */
2909 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2910 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2912 /* We may have to reverse because the caller's if block is not canonical,
2913 i.e. the THEN block isn't the fallthrough block for the TEST block
2914 (see find_if_header). */
2915 if (then_else_reversed
)
2918 /* If the condition variable is a register and is MODE_INT, accept it. */
2920 cond
= XEXP (SET_SRC (set
), 0);
2921 tmp
= XEXP (cond
, 0);
2922 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2923 && (GET_MODE (tmp
) != BImode
2924 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2929 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2930 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2934 /* Otherwise, fall back on canonicalize_condition to do the dirty
2935 work of manipulating MODE_CC values and COMPARE rtx codes. */
2936 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2937 NULL_RTX
, have_cbranchcc4
, true);
2939 /* We don't handle side-effects in the condition, like handling
2940 REG_INC notes and making sure no duplicate conditions are emitted. */
2941 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2947 /* Return true if OP is ok for if-then-else processing. */
2950 noce_operand_ok (const_rtx op
)
2952 if (side_effects_p (op
))
2955 /* We special-case memories, so handle any of them with
2956 no address side effects. */
2958 return ! side_effects_p (XEXP (op
, 0));
2960 return ! may_trap_p (op
);
2963 /* Return true if X contains a MEM subrtx. */
2966 contains_mem_rtx_p (rtx x
)
2968 subrtx_iterator::array_type array
;
2969 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
2976 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
2977 The condition used in this if-conversion is in COND.
2978 In practice, check that TEST_BB ends with a single set
2979 x := a and all previous computations
2980 in TEST_BB don't produce any values that are live after TEST_BB.
2981 In other words, all the insns in TEST_BB are there only
2982 to compute a value for x. Put the rtx cost of the insns
2983 in TEST_BB into COST. Record whether TEST_BB is a single simple
2984 set instruction in SIMPLE_P. */
2987 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
2988 unsigned int *cost
, bool *simple_p
)
2993 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
2994 rtx last_set
= NULL_RTX
;
2996 rtx cc
= cc_in_cond (cond
);
2998 if (!insn_valid_noce_process_p (last_insn
, cc
))
3000 last_set
= single_set (last_insn
);
3002 rtx x
= SET_DEST (last_set
);
3003 rtx_insn
*first_insn
= first_active_insn (test_bb
);
3004 rtx first_set
= single_set (first_insn
);
3009 /* We have a single simple set, that's okay. */
3010 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3012 if (first_insn
== last_insn
)
3014 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3015 *cost
= insn_rtx_cost (first_set
, speed_p
);
3019 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3020 gcc_assert (prev_last_insn
);
3022 /* For now, disallow setting x multiple times in test_bb. */
3023 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3026 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3028 /* The regs that are live out of test_bb. */
3029 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3031 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3033 FOR_BB_INSNS (test_bb
, insn
)
3035 if (insn
!= last_insn
)
3037 if (!active_insn_p (insn
))
3040 if (!insn_valid_noce_process_p (insn
, cc
))
3041 goto free_bitmap_and_fail
;
3043 rtx sset
= single_set (insn
);
3046 if (contains_mem_rtx_p (SET_SRC (sset
))
3047 || !REG_P (SET_DEST (sset
))
3048 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3049 goto free_bitmap_and_fail
;
3051 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3052 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3056 /* If any of the intermediate results in test_bb are live after test_bb
3058 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3059 goto free_bitmap_and_fail
;
3061 BITMAP_FREE (test_bb_temps
);
3062 *cost
= potential_cost
;
3066 free_bitmap_and_fail
:
3067 BITMAP_FREE (test_bb_temps
);
3071 /* We have something like:
3074 { i = a; j = b; k = c; }
3078 tmp_i = (x > y) ? a : i;
3079 tmp_j = (x > y) ? b : j;
3080 tmp_k = (x > y) ? c : k;
3085 Subsequent passes are expected to clean up the extra moves.
3087 Look for special cases such as writes to one register which are
3088 read back in another SET, as might occur in a swap idiom or
3097 Which we want to rewrite to:
3099 tmp_i = (x > y) ? a : i;
3100 tmp_j = (x > y) ? tmp_i : j;
3104 We can catch these when looking at (SET x y) by keeping a list of the
3105 registers we would have targeted before if-conversion and looking back
3106 through it for an overlap with Y. If we find one, we rewire the
3107 conditional set to use the temporary we introduced earlier.
3109 IF_INFO contains the useful information about the block structure and
3110 jump instructions. */
3113 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3115 basic_block test_bb
= if_info
->test_bb
;
3116 basic_block then_bb
= if_info
->then_bb
;
3117 basic_block join_bb
= if_info
->join_bb
;
3118 rtx_insn
*jump
= if_info
->jump
;
3119 rtx_insn
*cond_earliest
;
3124 /* Decompose the condition attached to the jump. */
3125 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3126 rtx x
= XEXP (cond
, 0);
3127 rtx y
= XEXP (cond
, 1);
3128 rtx_code cond_code
= GET_CODE (cond
);
3130 /* The true targets for a conditional move. */
3131 auto_vec
<rtx
> targets
;
3132 /* The temporaries introduced to allow us to not consider register
3134 auto_vec
<rtx
> temporaries
;
3135 /* The insns we've emitted. */
3136 auto_vec
<rtx_insn
*> unmodified_insns
;
3139 FOR_BB_INSNS (then_bb
, insn
)
3141 /* Skip over non-insns. */
3142 if (!active_insn_p (insn
))
3145 rtx set
= single_set (insn
);
3146 gcc_checking_assert (set
);
3148 rtx target
= SET_DEST (set
);
3149 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3150 rtx new_val
= SET_SRC (set
);
3151 rtx old_val
= target
;
3153 /* If we were supposed to read from an earlier write in this block,
3154 we've changed the register allocation. Rewire the read. While
3155 we are looking, also try to catch a swap idiom. */
3156 for (int i
= count
- 1; i
>= 0; --i
)
3157 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3159 /* Catch a "swap" style idiom. */
3160 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3161 /* The write to targets[i] is only live until the read
3162 here. As the condition codes match, we can propagate
3164 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3166 new_val
= temporaries
[i
];
3170 /* If we had a non-canonical conditional jump (i.e. one where
3171 the fallthrough is to the "else" case) we need to reverse
3172 the conditional select. */
3173 if (if_info
->then_else_reversed
)
3174 std::swap (old_val
, new_val
);
3176 /* Actually emit the conditional move. */
3177 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3178 x
, y
, new_val
, old_val
);
3180 /* If we failed to expand the conditional move, drop out and don't
3182 if (temp_dest
== NULL_RTX
)
3190 targets
.safe_push (target
);
3191 temporaries
.safe_push (temp_dest
);
3192 unmodified_insns
.safe_push (insn
);
3195 /* We must have seen some sort of insn to insert, otherwise we were
3196 given an empty BB to convert, and we can't handle that. */
3197 gcc_assert (!unmodified_insns
.is_empty ());
3199 /* Now fixup the assignments. */
3200 for (int i
= 0; i
< count
; i
++)
3201 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3203 /* Actually emit the sequence. */
3204 rtx_insn
*seq
= get_insns ();
3206 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3207 set_used_flags (insn
);
3209 /* Mark all our temporaries and targets as used. */
3210 for (int i
= 0; i
< count
; i
++)
3212 set_used_flags (temporaries
[i
]);
3213 set_used_flags (targets
[i
]);
3216 set_used_flags (cond
);
3220 unshare_all_rtl_in_chain (seq
);
3226 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3228 || recog_memoized (insn
) == -1)
3231 emit_insn_before_setloc (seq
, if_info
->jump
,
3232 INSN_LOCATION (unmodified_insns
.last ()));
3234 /* Clean up THEN_BB and the edges in and out of it. */
3235 remove_edge (find_edge (test_bb
, join_bb
));
3236 remove_edge (find_edge (then_bb
, join_bb
));
3237 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3238 delete_basic_block (then_bb
);
3241 /* Maybe merge blocks now the jump is simple enough. */
3242 if (can_merge_blocks_p (test_bb
, join_bb
))
3244 merge_blocks (test_bb
, join_bb
);
3248 num_updated_if_blocks
++;
3252 /* Return true iff basic block TEST_BB is comprised of only
3253 (SET (REG) (REG)) insns suitable for conversion to a series
3254 of conditional moves. FORNOW: Use II to find the expected cost of
3255 the branch into/over TEST_BB.
3257 TODO: This creates an implicit "magic number" for branch_cost.
3258 II->branch_cost now guides the maximum number of set instructions in
3259 a basic block which is considered profitable to completely
3263 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
,
3264 struct noce_if_info
*ii
)
3269 FOR_BB_INSNS (test_bb
, insn
)
3271 /* Skip over notes etc. */
3272 if (!active_insn_p (insn
))
3275 /* We only handle SET insns. */
3276 rtx set
= single_set (insn
);
3277 if (set
== NULL_RTX
)
3280 rtx dest
= SET_DEST (set
);
3281 rtx src
= SET_SRC (set
);
3283 /* We can possibly relax this, but for now only handle REG to REG
3284 moves. This avoids any issues that might come from introducing
3285 loads/stores that might violate data-race-freedom guarantees. */
3286 if (!(REG_P (src
) && REG_P (dest
)))
3289 /* Destination must be appropriate for a conditional write. */
3290 if (!noce_operand_ok (dest
))
3293 /* We must be able to conditionally move in this mode. */
3294 if (!can_conditionally_move_p (GET_MODE (dest
)))
3300 /* FORNOW: Our cost model is a count of the number of instructions we
3301 would if-convert. This is suboptimal, and should be improved as part
3302 of a wider rework of branch_cost. */
3303 if (count
> ii
->branch_cost
)
3309 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3310 it without using conditional execution. Return TRUE if we were successful
3311 at converting the block. */
3314 noce_process_if_block (struct noce_if_info
*if_info
)
3316 basic_block test_bb
= if_info
->test_bb
; /* test block */
3317 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3318 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3319 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3320 rtx_insn
*jump
= if_info
->jump
;
3321 rtx cond
= if_info
->cond
;
3322 rtx_insn
*insn_a
, *insn_b
;
3324 rtx orig_x
, x
, a
, b
;
3326 /* We're looking for patterns of the form
3328 (1) if (...) x = a; else x = b;
3329 (2) x = b; if (...) x = a;
3330 (3) if (...) x = a; // as if with an initial x = x.
3331 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3332 The later patterns require jumps to be more expensive.
3333 For the if (...) x = a; else x = b; case we allow multiple insns
3334 inside the then and else blocks as long as their only effect is
3335 to calculate a value for x.
3336 ??? For future expansion, further expand the "multiple X" rules. */
3338 /* First look for multiple SETS. */
3340 && HAVE_conditional_move
3342 && bb_ok_for_noce_convert_multiple_sets (then_bb
, if_info
))
3344 if (noce_convert_multiple_sets (if_info
))
3348 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3349 &if_info
->then_simple
))
3353 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3354 &if_info
->else_simple
))
3357 insn_a
= last_active_insn (then_bb
, FALSE
);
3358 set_a
= single_set (insn_a
);
3361 x
= SET_DEST (set_a
);
3362 a
= SET_SRC (set_a
);
3364 /* Look for the other potential set. Make sure we've got equivalent
3366 /* ??? This is overconservative. Storing to two different mems is
3367 as easy as conditionally computing the address. Storing to a
3368 single mem merely requires a scratch memory to use as one of the
3369 destination addresses; often the memory immediately below the
3370 stack pointer is available for this. */
3374 insn_b
= last_active_insn (else_bb
, FALSE
);
3375 set_b
= single_set (insn_b
);
3378 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3383 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3384 /* We're going to be moving the evaluation of B down from above
3385 COND_EARLIEST to JUMP. Make sure the relevant data is still
3388 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3389 || !NONJUMP_INSN_P (insn_b
)
3390 || (set_b
= single_set (insn_b
)) == NULL_RTX
3391 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3392 || ! noce_operand_ok (SET_SRC (set_b
))
3393 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3394 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3395 /* Avoid extending the lifetime of hard registers on small
3396 register class machines. */
3397 || (REG_P (SET_SRC (set_b
))
3398 && HARD_REGISTER_P (SET_SRC (set_b
))
3399 && targetm
.small_register_classes_for_mode_p
3400 (GET_MODE (SET_SRC (set_b
))))
3401 /* Likewise with X. In particular this can happen when
3402 noce_get_condition looks farther back in the instruction
3403 stream than one might expect. */
3404 || reg_overlap_mentioned_p (x
, cond
)
3405 || reg_overlap_mentioned_p (x
, a
)
3406 || modified_between_p (x
, insn_b
, jump
))
3413 /* If x has side effects then only the if-then-else form is safe to
3414 convert. But even in that case we would need to restore any notes
3415 (such as REG_INC) at then end. That can be tricky if
3416 noce_emit_move_insn expands to more than one insn, so disable the
3417 optimization entirely for now if there are side effects. */
3418 if (side_effects_p (x
))
3421 b
= (set_b
? SET_SRC (set_b
) : x
);
3423 /* Only operate on register destinations, and even then avoid extending
3424 the lifetime of hard registers on small register class machines. */
3427 || (HARD_REGISTER_P (x
)
3428 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3430 if (GET_MODE (x
) == BLKmode
)
3433 if (GET_CODE (x
) == ZERO_EXTRACT
3434 && (!CONST_INT_P (XEXP (x
, 1))
3435 || !CONST_INT_P (XEXP (x
, 2))))
3438 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3439 ? XEXP (x
, 0) : x
));
3442 /* Don't operate on sources that may trap or are volatile. */
3443 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3447 /* Set up the info block for our subroutines. */
3448 if_info
->insn_a
= insn_a
;
3449 if_info
->insn_b
= insn_b
;
3454 /* Try optimizations in some approximation of a useful order. */
3455 /* ??? Should first look to see if X is live incoming at all. If it
3456 isn't, we don't need anything but an unconditional set. */
3458 /* Look and see if A and B are really the same. Avoid creating silly
3459 cmove constructs that no one will fix up later. */
3460 if (noce_simple_bbs (if_info
)
3461 && rtx_interchangeable_p (a
, b
))
3463 /* If we have an INSN_B, we don't have to create any new rtl. Just
3464 move the instruction that we already have. If we don't have an
3465 INSN_B, that means that A == X, and we've got a noop move. In
3466 that case don't do anything and let the code below delete INSN_A. */
3467 if (insn_b
&& else_bb
)
3471 if (else_bb
&& insn_b
== BB_END (else_bb
))
3472 BB_END (else_bb
) = PREV_INSN (insn_b
);
3473 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3475 /* If there was a REG_EQUAL note, delete it since it may have been
3476 true due to this insn being after a jump. */
3477 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3478 remove_note (insn_b
, note
);
3482 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3483 x must be executed twice. */
3484 else if (insn_b
&& side_effects_p (orig_x
))
3491 if (!set_b
&& MEM_P (orig_x
))
3492 /* We want to avoid store speculation to avoid cases like
3493 if (pthread_mutex_trylock(mutex))
3495 Rather than go to much effort here, we rely on the SSA optimizers,
3496 which do a good enough job these days. */
3499 if (noce_try_move (if_info
))
3501 if (noce_try_store_flag (if_info
))
3503 if (noce_try_bitop (if_info
))
3505 if (noce_try_minmax (if_info
))
3507 if (noce_try_abs (if_info
))
3509 if (noce_try_inverse_constants (if_info
))
3511 if (!targetm
.have_conditional_execution ()
3512 && noce_try_store_flag_constants (if_info
))
3514 if (HAVE_conditional_move
3515 && noce_try_cmove (if_info
))
3517 if (! targetm
.have_conditional_execution ())
3519 if (noce_try_addcc (if_info
))
3521 if (noce_try_store_flag_mask (if_info
))
3523 if (HAVE_conditional_move
3524 && noce_try_cmove_arith (if_info
))
3526 if (noce_try_sign_mask (if_info
))
3530 if (!else_bb
&& set_b
)
3542 /* If we used a temporary, fix it up now. */
3548 noce_emit_move_insn (orig_x
, x
);
3550 set_used_flags (orig_x
);
3551 unshare_all_rtl_in_chain (seq
);
3554 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3557 /* The original THEN and ELSE blocks may now be removed. The test block
3558 must now jump to the join block. If the test block and the join block
3559 can be merged, do so. */
3562 delete_basic_block (else_bb
);
3566 remove_edge (find_edge (test_bb
, join_bb
));
3568 remove_edge (find_edge (then_bb
, join_bb
));
3569 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3570 delete_basic_block (then_bb
);
3573 if (can_merge_blocks_p (test_bb
, join_bb
))
3575 merge_blocks (test_bb
, join_bb
);
3579 num_updated_if_blocks
++;
3583 /* Check whether a block is suitable for conditional move conversion.
3584 Every insn must be a simple set of a register to a constant or a
3585 register. For each assignment, store the value in the pointer map
3586 VALS, keyed indexed by register pointer, then store the register
3587 pointer in REGS. COND is the condition we will test. */
3590 check_cond_move_block (basic_block bb
,
3591 hash_map
<rtx
, rtx
> *vals
,
3596 rtx cc
= cc_in_cond (cond
);
3598 /* We can only handle simple jumps at the end of the basic block.
3599 It is almost impossible to update the CFG otherwise. */
3601 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3604 FOR_BB_INSNS (bb
, insn
)
3608 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3610 set
= single_set (insn
);
3614 dest
= SET_DEST (set
);
3615 src
= SET_SRC (set
);
3617 || (HARD_REGISTER_P (dest
)
3618 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3621 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3624 if (side_effects_p (src
) || side_effects_p (dest
))
3627 if (may_trap_p (src
) || may_trap_p (dest
))
3630 /* Don't try to handle this if the source register was
3631 modified earlier in the block. */
3634 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3635 && vals
->get (SUBREG_REG (src
))))
3638 /* Don't try to handle this if the destination register was
3639 modified earlier in the block. */
3640 if (vals
->get (dest
))
3643 /* Don't try to handle this if the condition uses the
3644 destination register. */
3645 if (reg_overlap_mentioned_p (dest
, cond
))
3648 /* Don't try to handle this if the source register is modified
3649 later in the block. */
3650 if (!CONSTANT_P (src
)
3651 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3654 /* Skip it if the instruction to be moved might clobber CC. */
3655 if (cc
&& set_of (cc
, insn
))
3658 vals
->put (dest
, src
);
3660 regs
->safe_push (dest
);
3666 /* Given a basic block BB suitable for conditional move conversion,
3667 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3668 the register values depending on COND, emit the insns in the block as
3669 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3670 processed. The caller has started a sequence for the conversion.
3671 Return true if successful, false if something goes wrong. */
3674 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3675 basic_block bb
, rtx cond
,
3676 hash_map
<rtx
, rtx
> *then_vals
,
3677 hash_map
<rtx
, rtx
> *else_vals
,
3682 rtx cond_arg0
, cond_arg1
;
3684 code
= GET_CODE (cond
);
3685 cond_arg0
= XEXP (cond
, 0);
3686 cond_arg1
= XEXP (cond
, 1);
3688 FOR_BB_INSNS (bb
, insn
)
3690 rtx set
, target
, dest
, t
, e
;
3692 /* ??? Maybe emit conditional debug insn? */
3693 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3695 set
= single_set (insn
);
3696 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3698 dest
= SET_DEST (set
);
3700 rtx
*then_slot
= then_vals
->get (dest
);
3701 rtx
*else_slot
= else_vals
->get (dest
);
3702 t
= then_slot
? *then_slot
: NULL_RTX
;
3703 e
= else_slot
? *else_slot
: NULL_RTX
;
3707 /* If this register was set in the then block, we already
3708 handled this case there. */
3721 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3727 noce_emit_move_insn (dest
, target
);
3733 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3734 it using only conditional moves. Return TRUE if we were successful at
3735 converting the block. */
3738 cond_move_process_if_block (struct noce_if_info
*if_info
)
3740 basic_block test_bb
= if_info
->test_bb
;
3741 basic_block then_bb
= if_info
->then_bb
;
3742 basic_block else_bb
= if_info
->else_bb
;
3743 basic_block join_bb
= if_info
->join_bb
;
3744 rtx_insn
*jump
= if_info
->jump
;
3745 rtx cond
= if_info
->cond
;
3746 rtx_insn
*seq
, *loc_insn
;
3749 vec
<rtx
> then_regs
= vNULL
;
3750 vec
<rtx
> else_regs
= vNULL
;
3752 int success_p
= FALSE
;
3754 /* Build a mapping for each block to the value used for each
3756 hash_map
<rtx
, rtx
> then_vals
;
3757 hash_map
<rtx
, rtx
> else_vals
;
3759 /* Make sure the blocks are suitable. */
3760 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3762 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3765 /* Make sure the blocks can be used together. If the same register
3766 is set in both blocks, and is not set to a constant in both
3767 cases, then both blocks must set it to the same register. We
3768 have already verified that if it is set to a register, that the
3769 source register does not change after the assignment. Also count
3770 the number of registers set in only one of the blocks. */
3772 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3774 rtx
*then_slot
= then_vals
.get (reg
);
3775 rtx
*else_slot
= else_vals
.get (reg
);
3777 gcc_checking_assert (then_slot
);
3782 rtx then_val
= *then_slot
;
3783 rtx else_val
= *else_slot
;
3784 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3785 && !rtx_equal_p (then_val
, else_val
))
3790 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3791 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3793 gcc_checking_assert (else_vals
.get (reg
));
3794 if (!then_vals
.get (reg
))
3798 /* Make sure it is reasonable to convert this block. What matters
3799 is the number of assignments currently made in only one of the
3800 branches, since if we convert we are going to always execute
3802 if (c
> MAX_CONDITIONAL_EXECUTE
)
3805 /* Try to emit the conditional moves. First do the then block,
3806 then do anything left in the else blocks. */
3808 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3809 &then_vals
, &else_vals
, false)
3811 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3812 &then_vals
, &else_vals
, true)))
3817 seq
= end_ifcvt_sequence (if_info
);
3821 loc_insn
= first_active_insn (then_bb
);
3824 loc_insn
= first_active_insn (else_bb
);
3825 gcc_assert (loc_insn
);
3827 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3831 delete_basic_block (else_bb
);
3835 remove_edge (find_edge (test_bb
, join_bb
));
3837 remove_edge (find_edge (then_bb
, join_bb
));
3838 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3839 delete_basic_block (then_bb
);
3842 if (can_merge_blocks_p (test_bb
, join_bb
))
3844 merge_blocks (test_bb
, join_bb
);
3848 num_updated_if_blocks
++;
3853 then_regs
.release ();
3854 else_regs
.release ();
3859 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3860 IF-THEN-ELSE-JOIN block.
3862 If so, we'll try to convert the insns to not require the branch,
3863 using only transformations that do not require conditional execution.
3865 Return TRUE if we were successful at converting the block. */
3868 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3871 basic_block then_bb
, else_bb
, join_bb
;
3872 bool then_else_reversed
= false;
3875 rtx_insn
*cond_earliest
;
3876 struct noce_if_info if_info
;
3878 /* We only ever should get here before reload. */
3879 gcc_assert (!reload_completed
);
3881 /* Recognize an IF-THEN-ELSE-JOIN block. */
3882 if (single_pred_p (then_edge
->dest
)
3883 && single_succ_p (then_edge
->dest
)
3884 && single_pred_p (else_edge
->dest
)
3885 && single_succ_p (else_edge
->dest
)
3886 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3888 then_bb
= then_edge
->dest
;
3889 else_bb
= else_edge
->dest
;
3890 join_bb
= single_succ (then_bb
);
3892 /* Recognize an IF-THEN-JOIN block. */
3893 else if (single_pred_p (then_edge
->dest
)
3894 && single_succ_p (then_edge
->dest
)
3895 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3897 then_bb
= then_edge
->dest
;
3898 else_bb
= NULL_BLOCK
;
3899 join_bb
= else_edge
->dest
;
3901 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3902 of basic blocks in cfglayout mode does not matter, so the fallthrough
3903 edge can go to any basic block (and not just to bb->next_bb, like in
3905 else if (single_pred_p (else_edge
->dest
)
3906 && single_succ_p (else_edge
->dest
)
3907 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3909 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3910 To make this work, we have to invert the THEN and ELSE blocks
3911 and reverse the jump condition. */
3912 then_bb
= else_edge
->dest
;
3913 else_bb
= NULL_BLOCK
;
3914 join_bb
= single_succ (then_bb
);
3915 then_else_reversed
= true;
3918 /* Not a form we can handle. */
3921 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3922 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3925 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3928 num_possible_if_blocks
++;
3933 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3934 (else_bb
) ? "-ELSE" : "",
3935 pass
, test_bb
->index
, then_bb
->index
);
3938 fprintf (dump_file
, ", else %d", else_bb
->index
);
3940 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3943 /* If the conditional jump is more than just a conditional
3944 jump, then we can not do if-conversion on this block. */
3945 jump
= BB_END (test_bb
);
3946 if (! onlyjump_p (jump
))
3949 /* If this is not a standard conditional jump, we can't parse it. */
3950 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3954 /* We must be comparing objects whose modes imply the size. */
3955 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3958 /* Initialize an IF_INFO struct to pass around. */
3959 memset (&if_info
, 0, sizeof if_info
);
3960 if_info
.test_bb
= test_bb
;
3961 if_info
.then_bb
= then_bb
;
3962 if_info
.else_bb
= else_bb
;
3963 if_info
.join_bb
= join_bb
;
3964 if_info
.cond
= cond
;
3965 if_info
.cond_earliest
= cond_earliest
;
3966 if_info
.jump
= jump
;
3967 if_info
.then_else_reversed
= then_else_reversed
;
3968 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3969 predictable_edge_p (then_edge
));
3971 /* Do the real work. */
3973 if (noce_process_if_block (&if_info
))
3976 if (HAVE_conditional_move
3977 && cond_move_process_if_block (&if_info
))
3984 /* Merge the blocks and mark for local life update. */
3987 merge_if_block (struct ce_if_block
* ce_info
)
3989 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3990 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3991 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3992 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3993 basic_block combo_bb
;
3995 /* All block merging is done into the lower block numbers. */
3998 df_set_bb_dirty (test_bb
);
4000 /* Merge any basic blocks to handle && and || subtests. Each of
4001 the blocks are on the fallthru path from the predecessor block. */
4002 if (ce_info
->num_multiple_test_blocks
> 0)
4004 basic_block bb
= test_bb
;
4005 basic_block last_test_bb
= ce_info
->last_test_bb
;
4006 basic_block fallthru
= block_fallthru (bb
);
4011 fallthru
= block_fallthru (bb
);
4012 merge_blocks (combo_bb
, bb
);
4015 while (bb
!= last_test_bb
);
4018 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4019 label, but it might if there were || tests. That label's count should be
4020 zero, and it normally should be removed. */
4024 /* If THEN_BB has no successors, then there's a BARRIER after it.
4025 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4026 is no longer needed, and in fact it is incorrect to leave it in
4028 if (EDGE_COUNT (then_bb
->succs
) == 0
4029 && EDGE_COUNT (combo_bb
->succs
) > 1)
4031 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4032 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4033 end
= NEXT_INSN (end
);
4035 if (end
&& BARRIER_P (end
))
4038 merge_blocks (combo_bb
, then_bb
);
4042 /* The ELSE block, if it existed, had a label. That label count
4043 will almost always be zero, but odd things can happen when labels
4044 get their addresses taken. */
4047 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4048 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4049 is no longer needed, and in fact it is incorrect to leave it in
4051 if (EDGE_COUNT (else_bb
->succs
) == 0
4052 && EDGE_COUNT (combo_bb
->succs
) > 1)
4054 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4055 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4056 end
= NEXT_INSN (end
);
4058 if (end
&& BARRIER_P (end
))
4061 merge_blocks (combo_bb
, else_bb
);
4065 /* If there was no join block reported, that means it was not adjacent
4066 to the others, and so we cannot merge them. */
4070 rtx_insn
*last
= BB_END (combo_bb
);
4072 /* The outgoing edge for the current COMBO block should already
4073 be correct. Verify this. */
4074 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4075 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4076 || (NONJUMP_INSN_P (last
)
4077 && GET_CODE (PATTERN (last
)) == TRAP_IF
4078 && (TRAP_CONDITION (PATTERN (last
))
4079 == const_true_rtx
)));
4082 /* There should still be something at the end of the THEN or ELSE
4083 blocks taking us to our final destination. */
4084 gcc_assert (JUMP_P (last
)
4085 || (EDGE_SUCC (combo_bb
, 0)->dest
4086 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4088 && SIBLING_CALL_P (last
))
4089 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4090 && can_throw_internal (last
)));
4093 /* The JOIN block may have had quite a number of other predecessors too.
4094 Since we've already merged the TEST, THEN and ELSE blocks, we should
4095 have only one remaining edge from our if-then-else diamond. If there
4096 is more than one remaining edge, it must come from elsewhere. There
4097 may be zero incoming edges if the THEN block didn't actually join
4098 back up (as with a call to a non-return function). */
4099 else if (EDGE_COUNT (join_bb
->preds
) < 2
4100 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4102 /* We can merge the JOIN cleanly and update the dataflow try
4103 again on this pass.*/
4104 merge_blocks (combo_bb
, join_bb
);
4109 /* We cannot merge the JOIN. */
4111 /* The outgoing edge for the current COMBO block should already
4112 be correct. Verify this. */
4113 gcc_assert (single_succ_p (combo_bb
)
4114 && single_succ (combo_bb
) == join_bb
);
4116 /* Remove the jump and cruft from the end of the COMBO block. */
4117 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4118 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4121 num_updated_if_blocks
++;
4124 /* Find a block ending in a simple IF condition and try to transform it
4125 in some way. When converting a multi-block condition, put the new code
4126 in the first such block and delete the rest. Return a pointer to this
4127 first block if some transformation was done. Return NULL otherwise. */
4130 find_if_header (basic_block test_bb
, int pass
)
4132 ce_if_block ce_info
;
4136 /* The kind of block we're looking for has exactly two successors. */
4137 if (EDGE_COUNT (test_bb
->succs
) != 2)
4140 then_edge
= EDGE_SUCC (test_bb
, 0);
4141 else_edge
= EDGE_SUCC (test_bb
, 1);
4143 if (df_get_bb_dirty (then_edge
->dest
))
4145 if (df_get_bb_dirty (else_edge
->dest
))
4148 /* Neither edge should be abnormal. */
4149 if ((then_edge
->flags
& EDGE_COMPLEX
)
4150 || (else_edge
->flags
& EDGE_COMPLEX
))
4153 /* Nor exit the loop. */
4154 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4155 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4158 /* The THEN edge is canonically the one that falls through. */
4159 if (then_edge
->flags
& EDGE_FALLTHRU
)
4161 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4162 std::swap (then_edge
, else_edge
);
4164 /* Otherwise this must be a multiway branch of some sort. */
4167 memset (&ce_info
, 0, sizeof (ce_info
));
4168 ce_info
.test_bb
= test_bb
;
4169 ce_info
.then_bb
= then_edge
->dest
;
4170 ce_info
.else_bb
= else_edge
->dest
;
4171 ce_info
.pass
= pass
;
4173 #ifdef IFCVT_MACHDEP_INIT
4174 IFCVT_MACHDEP_INIT (&ce_info
);
4177 if (!reload_completed
4178 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4181 if (reload_completed
4182 && targetm
.have_conditional_execution ()
4183 && cond_exec_find_if_block (&ce_info
))
4186 if (targetm
.have_trap ()
4187 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4188 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4191 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4192 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4194 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4196 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4204 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4205 /* Set this so we continue looking. */
4206 cond_exec_changed_p
= TRUE
;
4207 return ce_info
.test_bb
;
4210 /* Return true if a block has two edges, one of which falls through to the next
4211 block, and the other jumps to a specific block, so that we can tell if the
4212 block is part of an && test or an || test. Returns either -1 or the number
4213 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4216 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4219 int fallthru_p
= FALSE
;
4226 if (!cur_bb
|| !target_bb
)
4229 /* If no edges, obviously it doesn't jump or fallthru. */
4230 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4233 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4235 if (cur_edge
->flags
& EDGE_COMPLEX
)
4236 /* Anything complex isn't what we want. */
4239 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4242 else if (cur_edge
->dest
== target_bb
)
4249 if ((jump_p
& fallthru_p
) == 0)
4252 /* Don't allow calls in the block, since this is used to group && and ||
4253 together for conditional execution support. ??? we should support
4254 conditional execution support across calls for IA-64 some day, but
4255 for now it makes the code simpler. */
4256 end
= BB_END (cur_bb
);
4257 insn
= BB_HEAD (cur_bb
);
4259 while (insn
!= NULL_RTX
)
4266 && !DEBUG_INSN_P (insn
)
4267 && GET_CODE (PATTERN (insn
)) != USE
4268 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4274 insn
= NEXT_INSN (insn
);
4280 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4281 block. If so, we'll try to convert the insns to not require the branch.
4282 Return TRUE if we were successful at converting the block. */
4285 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4287 basic_block test_bb
= ce_info
->test_bb
;
4288 basic_block then_bb
= ce_info
->then_bb
;
4289 basic_block else_bb
= ce_info
->else_bb
;
4290 basic_block join_bb
= NULL_BLOCK
;
4295 ce_info
->last_test_bb
= test_bb
;
4297 /* We only ever should get here after reload,
4298 and if we have conditional execution. */
4299 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4301 /* Discover if any fall through predecessors of the current test basic block
4302 were && tests (which jump to the else block) or || tests (which jump to
4304 if (single_pred_p (test_bb
)
4305 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4307 basic_block bb
= single_pred (test_bb
);
4308 basic_block target_bb
;
4309 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4312 /* Determine if the preceding block is an && or || block. */
4313 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4315 ce_info
->and_and_p
= TRUE
;
4316 target_bb
= else_bb
;
4318 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4320 ce_info
->and_and_p
= FALSE
;
4321 target_bb
= then_bb
;
4324 target_bb
= NULL_BLOCK
;
4326 if (target_bb
&& n_insns
<= max_insns
)
4328 int total_insns
= 0;
4331 ce_info
->last_test_bb
= test_bb
;
4333 /* Found at least one && or || block, look for more. */
4336 ce_info
->test_bb
= test_bb
= bb
;
4337 total_insns
+= n_insns
;
4340 if (!single_pred_p (bb
))
4343 bb
= single_pred (bb
);
4344 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4346 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4348 ce_info
->num_multiple_test_blocks
= blocks
;
4349 ce_info
->num_multiple_test_insns
= total_insns
;
4351 if (ce_info
->and_and_p
)
4352 ce_info
->num_and_and_blocks
= blocks
;
4354 ce_info
->num_or_or_blocks
= blocks
;
4358 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4359 other than any || blocks which jump to the THEN block. */
4360 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4363 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4364 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4366 if (cur_edge
->flags
& EDGE_COMPLEX
)
4370 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4372 if (cur_edge
->flags
& EDGE_COMPLEX
)
4376 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4377 if (EDGE_COUNT (then_bb
->succs
) > 0
4378 && (!single_succ_p (then_bb
)
4379 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4380 || (epilogue_completed
4381 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4384 /* If the THEN block has no successors, conditional execution can still
4385 make a conditional call. Don't do this unless the ELSE block has
4386 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4387 Check for the last insn of the THEN block being an indirect jump, which
4388 is listed as not having any successors, but confuses the rest of the CE
4389 code processing. ??? we should fix this in the future. */
4390 if (EDGE_COUNT (then_bb
->succs
) == 0)
4392 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4394 rtx_insn
*last_insn
= BB_END (then_bb
);
4397 && NOTE_P (last_insn
)
4398 && last_insn
!= BB_HEAD (then_bb
))
4399 last_insn
= PREV_INSN (last_insn
);
4402 && JUMP_P (last_insn
)
4403 && ! simplejump_p (last_insn
))
4407 else_bb
= NULL_BLOCK
;
4413 /* If the THEN block's successor is the other edge out of the TEST block,
4414 then we have an IF-THEN combo without an ELSE. */
4415 else if (single_succ (then_bb
) == else_bb
)
4418 else_bb
= NULL_BLOCK
;
4421 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4422 has exactly one predecessor and one successor, and the outgoing edge
4423 is not complex, then we have an IF-THEN-ELSE combo. */
4424 else if (single_succ_p (else_bb
)
4425 && single_succ (then_bb
) == single_succ (else_bb
)
4426 && single_pred_p (else_bb
)
4427 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4428 && !(epilogue_completed
4429 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4430 join_bb
= single_succ (else_bb
);
4432 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4436 num_possible_if_blocks
++;
4441 "\nIF-THEN%s block found, pass %d, start block %d "
4442 "[insn %d], then %d [%d]",
4443 (else_bb
) ? "-ELSE" : "",
4446 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4448 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4451 fprintf (dump_file
, ", else %d [%d]",
4453 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4455 fprintf (dump_file
, ", join %d [%d]",
4457 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4459 if (ce_info
->num_multiple_test_blocks
> 0)
4460 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4461 ce_info
->num_multiple_test_blocks
,
4462 (ce_info
->and_and_p
) ? "&&" : "||",
4463 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4464 ce_info
->last_test_bb
->index
,
4465 ((BB_HEAD (ce_info
->last_test_bb
))
4466 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4469 fputc ('\n', dump_file
);
4472 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4473 first condition for free, since we've already asserted that there's a
4474 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4475 we checked the FALLTHRU flag, those are already adjacent to the last IF
4477 /* ??? As an enhancement, move the ELSE block. Have to deal with
4478 BLOCK notes, if by no other means than backing out the merge if they
4479 exist. Sticky enough I don't want to think about it now. */
4481 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4483 if ((next
= next
->next_bb
) != join_bb
4484 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4492 /* Do the real work. */
4494 ce_info
->else_bb
= else_bb
;
4495 ce_info
->join_bb
= join_bb
;
4497 /* If we have && and || tests, try to first handle combining the && and ||
4498 tests into the conditional code, and if that fails, go back and handle
4499 it without the && and ||, which at present handles the && case if there
4500 was no ELSE block. */
4501 if (cond_exec_process_if_block (ce_info
, TRUE
))
4504 if (ce_info
->num_multiple_test_blocks
)
4508 if (cond_exec_process_if_block (ce_info
, FALSE
))
4515 /* Convert a branch over a trap, or a branch
4516 to a trap, into a conditional trap. */
4519 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4521 basic_block then_bb
= then_edge
->dest
;
4522 basic_block else_bb
= else_edge
->dest
;
4523 basic_block other_bb
, trap_bb
;
4524 rtx_insn
*trap
, *jump
;
4526 rtx_insn
*cond_earliest
;
4529 /* Locate the block with the trap instruction. */
4530 /* ??? While we look for no successors, we really ought to allow
4531 EH successors. Need to fix merge_if_block for that to work. */
4532 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4533 trap_bb
= then_bb
, other_bb
= else_bb
;
4534 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4535 trap_bb
= else_bb
, other_bb
= then_bb
;
4541 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4542 test_bb
->index
, trap_bb
->index
);
4545 /* If this is not a standard conditional jump, we can't parse it. */
4546 jump
= BB_END (test_bb
);
4547 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4551 /* If the conditional jump is more than just a conditional jump, then
4552 we can not do if-conversion on this block. */
4553 if (! onlyjump_p (jump
))
4556 /* We must be comparing objects whose modes imply the size. */
4557 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4560 /* Reverse the comparison code, if necessary. */
4561 code
= GET_CODE (cond
);
4562 if (then_bb
== trap_bb
)
4564 code
= reversed_comparison_code (cond
, jump
);
4565 if (code
== UNKNOWN
)
4569 /* Attempt to generate the conditional trap. */
4570 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4571 copy_rtx (XEXP (cond
, 1)),
4572 TRAP_CODE (PATTERN (trap
)));
4576 /* Emit the new insns before cond_earliest. */
4577 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4579 /* Delete the trap block if possible. */
4580 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4581 df_set_bb_dirty (test_bb
);
4582 df_set_bb_dirty (then_bb
);
4583 df_set_bb_dirty (else_bb
);
4585 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4587 delete_basic_block (trap_bb
);
4591 /* Wire together the blocks again. */
4592 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4593 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4594 else if (trap_bb
== then_bb
)
4596 rtx lab
= JUMP_LABEL (jump
);
4597 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4598 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4599 LABEL_NUSES (lab
) += 1;
4600 JUMP_LABEL (newjump
) = lab
;
4601 emit_barrier_after (newjump
);
4605 if (can_merge_blocks_p (test_bb
, other_bb
))
4607 merge_blocks (test_bb
, other_bb
);
4611 num_updated_if_blocks
++;
4615 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4619 block_has_only_trap (basic_block bb
)
4623 /* We're not the exit block. */
4624 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4627 /* The block must have no successors. */
4628 if (EDGE_COUNT (bb
->succs
) > 0)
4631 /* The only instruction in the THEN block must be the trap. */
4632 trap
= first_active_insn (bb
);
4633 if (! (trap
== BB_END (bb
)
4634 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4635 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4641 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4642 transformable, but not necessarily the other. There need be no
4645 Return TRUE if we were successful at converting the block.
4647 Cases we'd like to look at:
4650 if (test) goto over; // x not live
4658 if (! test) goto label;
4661 if (test) goto E; // x not live
4675 (3) // This one's really only interesting for targets that can do
4676 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4677 // it results in multiple branches on a cache line, which often
4678 // does not sit well with predictors.
4680 if (test1) goto E; // predicted not taken
4696 (A) Don't do (2) if the branch is predicted against the block we're
4697 eliminating. Do it anyway if we can eliminate a branch; this requires
4698 that the sole successor of the eliminated block postdominate the other
4701 (B) With CE, on (3) we can steal from both sides of the if, creating
4710 Again, this is most useful if J postdominates.
4712 (C) CE substitutes for helpful life information.
4714 (D) These heuristics need a lot of work. */
4716 /* Tests for case 1 above. */
4719 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4721 basic_block then_bb
= then_edge
->dest
;
4722 basic_block else_bb
= else_edge
->dest
;
4724 int then_bb_index
, then_prob
;
4725 rtx else_target
= NULL_RTX
;
4727 /* If we are partitioning hot/cold basic blocks, we don't want to
4728 mess up unconditional or indirect jumps that cross between hot
4731 Basic block partitioning may result in some jumps that appear to
4732 be optimizable (or blocks that appear to be mergeable), but which really
4733 must be left untouched (they are required to make it safely across
4734 partition boundaries). See the comments at the top of
4735 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4737 if ((BB_END (then_bb
)
4738 && JUMP_P (BB_END (then_bb
))
4739 && CROSSING_JUMP_P (BB_END (then_bb
)))
4740 || (BB_END (test_bb
)
4741 && JUMP_P (BB_END (test_bb
))
4742 && CROSSING_JUMP_P (BB_END (test_bb
)))
4743 || (BB_END (else_bb
)
4744 && JUMP_P (BB_END (else_bb
))
4745 && CROSSING_JUMP_P (BB_END (else_bb
))))
4748 /* THEN has one successor. */
4749 if (!single_succ_p (then_bb
))
4752 /* THEN does not fall through, but is not strange either. */
4753 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4756 /* THEN has one predecessor. */
4757 if (!single_pred_p (then_bb
))
4760 /* THEN must do something. */
4761 if (forwarder_block_p (then_bb
))
4764 num_possible_if_blocks
++;
4767 "\nIF-CASE-1 found, start %d, then %d\n",
4768 test_bb
->index
, then_bb
->index
);
4770 if (then_edge
->probability
)
4771 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4773 then_prob
= REG_BR_PROB_BASE
/ 2;
4775 /* We're speculating from the THEN path, we want to make sure the cost
4776 of speculation is within reason. */
4777 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4778 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4779 predictable_edge_p (then_edge
)))))
4782 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4784 rtx_insn
*jump
= BB_END (else_edge
->src
);
4785 gcc_assert (JUMP_P (jump
));
4786 else_target
= JUMP_LABEL (jump
);
4789 /* Registers set are dead, or are predicable. */
4790 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4791 single_succ_edge (then_bb
), 1))
4794 /* Conversion went ok, including moving the insns and fixing up the
4795 jump. Adjust the CFG to match. */
4797 /* We can avoid creating a new basic block if then_bb is immediately
4798 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4799 through to else_bb. */
4801 if (then_bb
->next_bb
== else_bb
4802 && then_bb
->prev_bb
== test_bb
4803 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4805 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4808 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4809 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4810 else_bb
, else_target
);
4812 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4815 df_set_bb_dirty (test_bb
);
4816 df_set_bb_dirty (else_bb
);
4818 then_bb_index
= then_bb
->index
;
4819 delete_basic_block (then_bb
);
4821 /* Make rest of code believe that the newly created block is the THEN_BB
4822 block we removed. */
4825 df_bb_replace (then_bb_index
, new_bb
);
4826 /* This should have been done above via force_nonfallthru_and_redirect
4827 (possibly called from redirect_edge_and_branch_force). */
4828 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4832 num_updated_if_blocks
++;
4837 /* Test for case 2 above. */
4840 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4842 basic_block then_bb
= then_edge
->dest
;
4843 basic_block else_bb
= else_edge
->dest
;
4845 int then_prob
, else_prob
;
4847 /* We do not want to speculate (empty) loop latches. */
4849 && else_bb
->loop_father
->latch
== else_bb
)
4852 /* If we are partitioning hot/cold basic blocks, we don't want to
4853 mess up unconditional or indirect jumps that cross between hot
4856 Basic block partitioning may result in some jumps that appear to
4857 be optimizable (or blocks that appear to be mergeable), but which really
4858 must be left untouched (they are required to make it safely across
4859 partition boundaries). See the comments at the top of
4860 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4862 if ((BB_END (then_bb
)
4863 && JUMP_P (BB_END (then_bb
))
4864 && CROSSING_JUMP_P (BB_END (then_bb
)))
4865 || (BB_END (test_bb
)
4866 && JUMP_P (BB_END (test_bb
))
4867 && CROSSING_JUMP_P (BB_END (test_bb
)))
4868 || (BB_END (else_bb
)
4869 && JUMP_P (BB_END (else_bb
))
4870 && CROSSING_JUMP_P (BB_END (else_bb
))))
4873 /* ELSE has one successor. */
4874 if (!single_succ_p (else_bb
))
4877 else_succ
= single_succ_edge (else_bb
);
4879 /* ELSE outgoing edge is not complex. */
4880 if (else_succ
->flags
& EDGE_COMPLEX
)
4883 /* ELSE has one predecessor. */
4884 if (!single_pred_p (else_bb
))
4887 /* THEN is not EXIT. */
4888 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4891 if (else_edge
->probability
)
4893 else_prob
= else_edge
->probability
;
4894 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4898 else_prob
= REG_BR_PROB_BASE
/ 2;
4899 then_prob
= REG_BR_PROB_BASE
/ 2;
4902 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4903 if (else_prob
> then_prob
)
4905 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4906 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4912 num_possible_if_blocks
++;
4915 "\nIF-CASE-2 found, start %d, else %d\n",
4916 test_bb
->index
, else_bb
->index
);
4918 /* We're speculating from the ELSE path, we want to make sure the cost
4919 of speculation is within reason. */
4920 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4921 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4922 predictable_edge_p (else_edge
)))))
4925 /* Registers set are dead, or are predicable. */
4926 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4929 /* Conversion went ok, including moving the insns and fixing up the
4930 jump. Adjust the CFG to match. */
4932 df_set_bb_dirty (test_bb
);
4933 df_set_bb_dirty (then_bb
);
4934 delete_basic_block (else_bb
);
4937 num_updated_if_blocks
++;
4939 /* ??? We may now fallthru from one of THEN's successors into a join
4940 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4945 /* Used by the code above to perform the actual rtl transformations.
4946 Return TRUE if successful.
4948 TEST_BB is the block containing the conditional branch. MERGE_BB
4949 is the block containing the code to manipulate. DEST_EDGE is an
4950 edge representing a jump to the join block; after the conversion,
4951 TEST_BB should be branching to its destination.
4952 REVERSEP is true if the sense of the branch should be reversed. */
4955 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4956 basic_block other_bb
, edge dest_edge
, int reversep
)
4958 basic_block new_dest
= dest_edge
->dest
;
4959 rtx_insn
*head
, *end
, *jump
;
4960 rtx_insn
*earliest
= NULL
;
4962 bitmap merge_set
= NULL
;
4963 /* Number of pending changes. */
4964 int n_validated_changes
= 0;
4965 rtx new_dest_label
= NULL_RTX
;
4967 jump
= BB_END (test_bb
);
4969 /* Find the extent of the real code in the merge block. */
4970 head
= BB_HEAD (merge_bb
);
4971 end
= BB_END (merge_bb
);
4973 while (DEBUG_INSN_P (end
) && end
!= head
)
4974 end
= PREV_INSN (end
);
4976 /* If merge_bb ends with a tablejump, predicating/moving insn's
4977 into test_bb and then deleting merge_bb will result in the jumptable
4978 that follows merge_bb being removed along with merge_bb and then we
4979 get an unresolved reference to the jumptable. */
4980 if (tablejump_p (end
, NULL
, NULL
))
4984 head
= NEXT_INSN (head
);
4985 while (DEBUG_INSN_P (head
) && head
!= end
)
4986 head
= NEXT_INSN (head
);
4994 head
= NEXT_INSN (head
);
4995 while (DEBUG_INSN_P (head
) && head
!= end
)
4996 head
= NEXT_INSN (head
);
5001 if (!onlyjump_p (end
))
5008 end
= PREV_INSN (end
);
5009 while (DEBUG_INSN_P (end
) && end
!= head
)
5010 end
= PREV_INSN (end
);
5013 /* Don't move frame-related insn across the conditional branch. This
5014 can lead to one of the paths of the branch having wrong unwind info. */
5015 if (epilogue_completed
)
5017 rtx_insn
*insn
= head
;
5020 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5024 insn
= NEXT_INSN (insn
);
5028 /* Disable handling dead code by conditional execution if the machine needs
5029 to do anything funny with the tests, etc. */
5030 #ifndef IFCVT_MODIFY_TESTS
5031 if (targetm
.have_conditional_execution ())
5033 /* In the conditional execution case, we have things easy. We know
5034 the condition is reversible. We don't have to check life info
5035 because we're going to conditionally execute the code anyway.
5036 All that's left is making sure the insns involved can actually
5041 cond
= cond_exec_get_condition (jump
);
5045 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5046 int prob_val
= (note
? XINT (note
, 0) : -1);
5050 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5053 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5056 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5059 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5060 && verify_changes (0))
5061 n_validated_changes
= num_validated_changes ();
5069 /* If we allocated new pseudos (e.g. in the conditional move
5070 expander called from noce_emit_cmove), we must resize the
5072 if (max_regno
< max_reg_num ())
5073 max_regno
= max_reg_num ();
5075 /* Try the NCE path if the CE path did not result in any changes. */
5076 if (n_validated_changes
== 0)
5083 /* In the non-conditional execution case, we have to verify that there
5084 are no trapping operations, no calls, no references to memory, and
5085 that any registers modified are dead at the branch site. */
5087 if (!any_condjump_p (jump
))
5090 /* Find the extent of the conditional. */
5091 cond
= noce_get_condition (jump
, &earliest
, false);
5095 live
= BITMAP_ALLOC (®_obstack
);
5096 simulate_backwards_to_point (merge_bb
, live
, end
);
5097 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5099 df_get_live_in (other_bb
), NULL
);
5104 /* Collect the set of registers set in MERGE_BB. */
5105 merge_set
= BITMAP_ALLOC (®_obstack
);
5107 FOR_BB_INSNS (merge_bb
, insn
)
5108 if (NONDEBUG_INSN_P (insn
))
5109 df_simulate_find_defs (insn
, merge_set
);
5111 /* If shrink-wrapping, disable this optimization when test_bb is
5112 the first basic block and merge_bb exits. The idea is to not
5113 move code setting up a return register as that may clobber a
5114 register used to pass function parameters, which then must be
5115 saved in caller-saved regs. A caller-saved reg requires the
5116 prologue, killing a shrink-wrap opportunity. */
5117 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5118 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5119 && single_succ_p (new_dest
)
5120 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5121 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5126 return_regs
= BITMAP_ALLOC (®_obstack
);
5128 /* Start off with the intersection of regs used to pass
5129 params and regs used to return values. */
5130 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5131 if (FUNCTION_ARG_REGNO_P (i
)
5132 && targetm
.calls
.function_value_regno_p (i
))
5133 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5135 bitmap_and_into (return_regs
,
5136 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5137 bitmap_and_into (return_regs
,
5138 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5139 if (!bitmap_empty_p (return_regs
))
5141 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5142 if (NONDEBUG_INSN_P (insn
))
5146 /* If this insn sets any reg in return_regs, add all
5147 reg uses to the set of regs we're interested in. */
5148 FOR_EACH_INSN_DEF (def
, insn
)
5149 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5151 df_simulate_uses (insn
, return_regs
);
5155 if (bitmap_intersect_p (merge_set
, return_regs
))
5157 BITMAP_FREE (return_regs
);
5158 BITMAP_FREE (merge_set
);
5162 BITMAP_FREE (return_regs
);
5167 /* We don't want to use normal invert_jump or redirect_jump because
5168 we don't want to delete_insn called. Also, we want to do our own
5169 change group management. */
5171 old_dest
= JUMP_LABEL (jump
);
5172 if (other_bb
!= new_dest
)
5174 if (!any_condjump_p (jump
))
5177 if (JUMP_P (BB_END (dest_edge
->src
)))
5178 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5179 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5180 new_dest_label
= ret_rtx
;
5182 new_dest_label
= block_label (new_dest
);
5184 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5186 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5187 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5191 if (verify_changes (n_validated_changes
))
5192 confirm_change_group ();
5196 if (other_bb
!= new_dest
)
5198 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5201 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5204 std::swap (BRANCH_EDGE (test_bb
)->count
,
5205 FALLTHRU_EDGE (test_bb
)->count
);
5206 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5207 FALLTHRU_EDGE (test_bb
)->probability
);
5208 update_br_prob_note (test_bb
);
5212 /* Move the insns out of MERGE_BB to before the branch. */
5217 if (end
== BB_END (merge_bb
))
5218 BB_END (merge_bb
) = PREV_INSN (head
);
5220 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5221 notes being moved might become invalid. */
5227 if (! INSN_P (insn
))
5229 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5232 remove_note (insn
, note
);
5233 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5235 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5236 notes referring to the registers being set might become invalid. */
5242 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5243 remove_reg_equal_equiv_notes_for_regno (i
);
5245 BITMAP_FREE (merge_set
);
5248 reorder_insns (head
, end
, PREV_INSN (earliest
));
5251 /* Remove the jump and edge if we can. */
5252 if (other_bb
== new_dest
)
5255 remove_edge (BRANCH_EDGE (test_bb
));
5256 /* ??? Can't merge blocks here, as then_bb is still in use.
5257 At minimum, the merge will get done just before bb-reorder. */
5266 BITMAP_FREE (merge_set
);
5271 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5272 we are after combine pass. */
5275 if_convert (bool after_combine
)
5282 df_live_add_problem ();
5283 df_live_set_all_dirty ();
5286 /* Record whether we are after combine pass. */
5287 ifcvt_after_combine
= after_combine
;
5288 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5289 != CODE_FOR_nothing
);
5290 num_possible_if_blocks
= 0;
5291 num_updated_if_blocks
= 0;
5292 num_true_changes
= 0;
5294 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5295 mark_loop_exit_edges ();
5296 loop_optimizer_finalize ();
5297 free_dominance_info (CDI_DOMINATORS
);
5299 /* Compute postdominators. */
5300 calculate_dominance_info (CDI_POST_DOMINATORS
);
5302 df_set_flags (DF_LR_RUN_DCE
);
5304 /* Go through each of the basic blocks looking for things to convert. If we
5305 have conditional execution, we make multiple passes to allow us to handle
5306 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5311 /* Only need to do dce on the first pass. */
5312 df_clear_flags (DF_LR_RUN_DCE
);
5313 cond_exec_changed_p
= FALSE
;
5316 #ifdef IFCVT_MULTIPLE_DUMPS
5317 if (dump_file
&& pass
> 1)
5318 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5321 FOR_EACH_BB_FN (bb
, cfun
)
5324 while (!df_get_bb_dirty (bb
)
5325 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5329 #ifdef IFCVT_MULTIPLE_DUMPS
5330 if (dump_file
&& cond_exec_changed_p
)
5331 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5334 while (cond_exec_changed_p
);
5336 #ifdef IFCVT_MULTIPLE_DUMPS
5338 fprintf (dump_file
, "\n\n========== no more changes\n");
5341 free_dominance_info (CDI_POST_DOMINATORS
);
5346 clear_aux_for_blocks ();
5348 /* If we allocated new pseudos, we must resize the array for sched1. */
5349 if (max_regno
< max_reg_num ())
5350 max_regno
= max_reg_num ();
5352 /* Write the final stats. */
5353 if (dump_file
&& num_possible_if_blocks
> 0)
5356 "\n%d possible IF blocks searched.\n",
5357 num_possible_if_blocks
);
5359 "%d IF blocks converted.\n",
5360 num_updated_if_blocks
);
5362 "%d true changes made.\n\n\n",
5367 df_remove_problem (df_live
);
5369 checking_verify_flow_info ();
5372 /* If-conversion and CFG cleanup. */
5374 rest_of_handle_if_conversion (void)
5376 if (flag_if_conversion
)
5380 dump_reg_info (dump_file
);
5381 dump_flow_info (dump_file
, dump_flags
);
5383 cleanup_cfg (CLEANUP_EXPENSIVE
);
5393 const pass_data pass_data_rtl_ifcvt
=
5395 RTL_PASS
, /* type */
5397 OPTGROUP_NONE
, /* optinfo_flags */
5398 TV_IFCVT
, /* tv_id */
5399 0, /* properties_required */
5400 0, /* properties_provided */
5401 0, /* properties_destroyed */
5402 0, /* todo_flags_start */
5403 TODO_df_finish
, /* todo_flags_finish */
5406 class pass_rtl_ifcvt
: public rtl_opt_pass
5409 pass_rtl_ifcvt (gcc::context
*ctxt
)
5410 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5413 /* opt_pass methods: */
5414 virtual bool gate (function
*)
5416 return (optimize
> 0) && dbg_cnt (if_conversion
);
5419 virtual unsigned int execute (function
*)
5421 return rest_of_handle_if_conversion ();
5424 }; // class pass_rtl_ifcvt
5429 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5431 return new pass_rtl_ifcvt (ctxt
);
5435 /* Rerun if-conversion, as combine may have simplified things enough
5436 to now meet sequence length restrictions. */
5440 const pass_data pass_data_if_after_combine
=
5442 RTL_PASS
, /* type */
5444 OPTGROUP_NONE
, /* optinfo_flags */
5445 TV_IFCVT
, /* tv_id */
5446 0, /* properties_required */
5447 0, /* properties_provided */
5448 0, /* properties_destroyed */
5449 0, /* todo_flags_start */
5450 TODO_df_finish
, /* todo_flags_finish */
5453 class pass_if_after_combine
: public rtl_opt_pass
5456 pass_if_after_combine (gcc::context
*ctxt
)
5457 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5460 /* opt_pass methods: */
5461 virtual bool gate (function
*)
5463 return optimize
> 0 && flag_if_conversion
5464 && dbg_cnt (if_after_combine
);
5467 virtual unsigned int execute (function
*)
5473 }; // class pass_if_after_combine
5478 make_pass_if_after_combine (gcc::context
*ctxt
)
5480 return new pass_if_after_combine (ctxt
);
5486 const pass_data pass_data_if_after_reload
=
5488 RTL_PASS
, /* type */
5490 OPTGROUP_NONE
, /* optinfo_flags */
5491 TV_IFCVT2
, /* tv_id */
5492 0, /* properties_required */
5493 0, /* properties_provided */
5494 0, /* properties_destroyed */
5495 0, /* todo_flags_start */
5496 TODO_df_finish
, /* todo_flags_finish */
5499 class pass_if_after_reload
: public rtl_opt_pass
5502 pass_if_after_reload (gcc::context
*ctxt
)
5503 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5506 /* opt_pass methods: */
5507 virtual bool gate (function
*)
5509 return optimize
> 0 && flag_if_conversion2
5510 && dbg_cnt (if_after_reload
);
5513 virtual unsigned int execute (function
*)
5519 }; // class pass_if_after_reload
5524 make_pass_if_after_reload (gcc::context
*ctxt
)
5526 return new pass_if_after_reload (ctxt
);