1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 1988, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
43 #include "hard-reg-set.h"
44 #include "basic-block.h"
45 #include "insn-config.h"
55 #include "insn-flags.h"
58 /* Not really meaningful values, but at least something. */
59 #ifndef SIMULTANEOUS_PREFETCHES
60 #define SIMULTANEOUS_PREFETCHES 3
62 #ifndef PREFETCH_BLOCK
63 #define PREFETCH_BLOCK 32
66 #define HAVE_prefetch 0
67 #define CODE_FOR_prefetch 0
68 #define gen_prefetch(a,b,c) (abort(), NULL_RTX)
71 /* Give up the prefetch optimizations once we exceed a given threshhold.
72 It is unlikely that we would be able to optimize something in a loop
73 with so many detected prefetches. */
74 #define MAX_PREFETCHES 100
75 /* The number of prefetch blocks that are beneficial to fetch at once before
76 a loop with a known (and low) iteration count. */
77 #define PREFETCH_BLOCKS_BEFORE_LOOP_MAX 6
78 /* For very tiny loops it is not worthwhile to prefetch even before the loop,
79 since it is likely that the data are already in the cache. */
80 #define PREFETCH_BLOCKS_BEFORE_LOOP_MIN 2
82 /* Parameterize some prefetch heuristics so they can be turned on and off
83 easily for performance testing on new architecures. These can be
84 defined in target-dependent files. */
86 /* Prefetch is worthwhile only when loads/stores are dense. */
87 #ifndef PREFETCH_ONLY_DENSE_MEM
88 #define PREFETCH_ONLY_DENSE_MEM 1
91 /* Define what we mean by "dense" loads and stores; This value divided by 256
92 is the minimum percentage of memory references that worth prefetching. */
93 #ifndef PREFETCH_DENSE_MEM
94 #define PREFETCH_DENSE_MEM 220
97 /* Do not prefetch for a loop whose iteration count is known to be low. */
98 #ifndef PREFETCH_NO_LOW_LOOPCNT
99 #define PREFETCH_NO_LOW_LOOPCNT 1
102 /* Define what we mean by a "low" iteration count. */
103 #ifndef PREFETCH_LOW_LOOPCNT
104 #define PREFETCH_LOW_LOOPCNT 32
107 /* Do not prefetch for a loop that contains a function call; such a loop is
108 probably not an internal loop. */
109 #ifndef PREFETCH_NO_CALL
110 #define PREFETCH_NO_CALL 1
113 /* Do not prefetch accesses with an extreme stride. */
114 #ifndef PREFETCH_NO_EXTREME_STRIDE
115 #define PREFETCH_NO_EXTREME_STRIDE 1
118 /* Define what we mean by an "extreme" stride. */
119 #ifndef PREFETCH_EXTREME_STRIDE
120 #define PREFETCH_EXTREME_STRIDE 4096
123 /* Define a limit to how far apart indices can be and still be merged
124 into a single prefetch. */
125 #ifndef PREFETCH_EXTREME_DIFFERENCE
126 #define PREFETCH_EXTREME_DIFFERENCE 4096
129 /* Issue prefetch instructions before the loop to fetch data to be used
130 in the first few loop iterations. */
131 #ifndef PREFETCH_BEFORE_LOOP
132 #define PREFETCH_BEFORE_LOOP 1
135 /* Do not handle reversed order prefetches (negative stride). */
136 #ifndef PREFETCH_NO_REVERSE_ORDER
137 #define PREFETCH_NO_REVERSE_ORDER 1
140 /* Prefetch even if the GIV is in conditional code. */
141 #ifndef PREFETCH_CONDITIONAL
142 #define PREFETCH_CONDITIONAL 1
145 #define LOOP_REG_LIFETIME(LOOP, REGNO) \
146 ((REGNO_LAST_LUID (REGNO) - REGNO_FIRST_LUID (REGNO)))
148 #define LOOP_REG_GLOBAL_P(LOOP, REGNO) \
149 ((REGNO_LAST_LUID (REGNO) > INSN_LUID ((LOOP)->end) \
150 || REGNO_FIRST_LUID (REGNO) < INSN_LUID ((LOOP)->start)))
152 #define LOOP_REGNO_NREGS(REGNO, SET_DEST) \
153 ((REGNO) < FIRST_PSEUDO_REGISTER \
154 ? HARD_REGNO_NREGS ((REGNO), GET_MODE (SET_DEST)) : 1)
157 /* Vector mapping INSN_UIDs to luids.
158 The luids are like uids but increase monotonically always.
159 We use them to see whether a jump comes from outside a given loop. */
163 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
164 number the insn is contained in. */
166 struct loop
**uid_loop
;
168 /* 1 + largest uid of any insn. */
170 int max_uid_for_loop
;
172 /* 1 + luid of last insn. */
176 /* Number of loops detected in current function. Used as index to the
179 static int max_loop_num
;
181 /* Bound on pseudo register number before loop optimization.
182 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
183 unsigned int max_reg_before_loop
;
185 /* The value to pass to the next call of reg_scan_update. */
186 static int loop_max_reg
;
188 /* During the analysis of a loop, a chain of `struct movable's
189 is made to record all the movable insns found.
190 Then the entire chain can be scanned to decide which to move. */
194 rtx insn
; /* A movable insn */
195 rtx set_src
; /* The expression this reg is set from. */
196 rtx set_dest
; /* The destination of this SET. */
197 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
198 of any registers used within the LIBCALL. */
199 int consec
; /* Number of consecutive following insns
200 that must be moved with this one. */
201 unsigned int regno
; /* The register it sets */
202 short lifetime
; /* lifetime of that register;
203 may be adjusted when matching movables
204 that load the same value are found. */
205 short savings
; /* Number of insns we can move for this reg,
206 including other movables that force this
207 or match this one. */
208 unsigned int cond
: 1; /* 1 if only conditionally movable */
209 unsigned int force
: 1; /* 1 means MUST move this insn */
210 unsigned int global
: 1; /* 1 means reg is live outside this loop */
211 /* If PARTIAL is 1, GLOBAL means something different:
212 that the reg is live outside the range from where it is set
213 to the following label. */
214 unsigned int done
: 1; /* 1 inhibits further processing of this */
216 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
217 In particular, moving it does not make it
219 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
220 load SRC, rather than copying INSN. */
221 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
222 first insn of a consecutive sets group. */
223 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
224 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
225 that we should avoid changing when clearing
226 the rest of the reg. */
227 struct movable
*match
; /* First entry for same value */
228 struct movable
*forces
; /* An insn that must be moved if this is */
229 struct movable
*next
;
233 FILE *loop_dump_stream
;
235 /* Forward declarations. */
237 static void invalidate_loops_containing_label
PARAMS ((rtx
));
238 static void find_and_verify_loops
PARAMS ((rtx
, struct loops
*));
239 static void mark_loop_jump
PARAMS ((rtx
, struct loop
*));
240 static void prescan_loop
PARAMS ((struct loop
*));
241 static int reg_in_basic_block_p
PARAMS ((rtx
, rtx
));
242 static int consec_sets_invariant_p
PARAMS ((const struct loop
*,
244 static int labels_in_range_p
PARAMS ((rtx
, int));
245 static void count_one_set
PARAMS ((struct loop_regs
*, rtx
, rtx
, rtx
*));
246 static void note_addr_stored
PARAMS ((rtx
, rtx
, void *));
247 static void note_set_pseudo_multiple_uses
PARAMS ((rtx
, rtx
, void *));
248 static int loop_reg_used_before_p
PARAMS ((const struct loop
*, rtx
, rtx
));
249 static void scan_loop
PARAMS ((struct loop
*, int));
251 static void replace_call_address
PARAMS ((rtx
, rtx
, rtx
));
253 static rtx skip_consec_insns
PARAMS ((rtx
, int));
254 static int libcall_benefit
PARAMS ((rtx
));
255 static void ignore_some_movables
PARAMS ((struct loop_movables
*));
256 static void force_movables
PARAMS ((struct loop_movables
*));
257 static void combine_movables
PARAMS ((struct loop_movables
*,
258 struct loop_regs
*));
259 static int num_unmoved_movables
PARAMS ((const struct loop
*));
260 static int regs_match_p
PARAMS ((rtx
, rtx
, struct loop_movables
*));
261 static int rtx_equal_for_loop_p
PARAMS ((rtx
, rtx
, struct loop_movables
*,
262 struct loop_regs
*));
263 static void add_label_notes
PARAMS ((rtx
, rtx
));
264 static void move_movables
PARAMS ((struct loop
*loop
, struct loop_movables
*,
266 static void loop_movables_add
PARAMS((struct loop_movables
*,
268 static void loop_movables_free
PARAMS((struct loop_movables
*));
269 static int count_nonfixed_reads
PARAMS ((const struct loop
*, rtx
));
270 static void loop_bivs_find
PARAMS((struct loop
*));
271 static void loop_bivs_init_find
PARAMS((struct loop
*));
272 static void loop_bivs_check
PARAMS((struct loop
*));
273 static void loop_givs_find
PARAMS((struct loop
*));
274 static void loop_givs_check
PARAMS((struct loop
*));
275 static int loop_biv_eliminable_p
PARAMS((struct loop
*, struct iv_class
*,
277 static int loop_giv_reduce_benefit
PARAMS((struct loop
*, struct iv_class
*,
278 struct induction
*, rtx
));
279 static void loop_givs_dead_check
PARAMS((struct loop
*, struct iv_class
*));
280 static void loop_givs_reduce
PARAMS((struct loop
*, struct iv_class
*));
281 static void loop_givs_rescan
PARAMS((struct loop
*, struct iv_class
*,
283 static void loop_ivs_free
PARAMS((struct loop
*));
284 static void strength_reduce
PARAMS ((struct loop
*, int));
285 static void find_single_use_in_loop
PARAMS ((struct loop_regs
*, rtx
, rtx
));
286 static int valid_initial_value_p
PARAMS ((rtx
, rtx
, int, rtx
));
287 static void find_mem_givs
PARAMS ((const struct loop
*, rtx
, rtx
, int, int));
288 static void record_biv
PARAMS ((struct loop
*, struct induction
*,
289 rtx
, rtx
, rtx
, rtx
, rtx
*,
291 static void check_final_value
PARAMS ((const struct loop
*,
292 struct induction
*));
293 static void loop_ivs_dump
PARAMS((const struct loop
*, FILE *, int));
294 static void loop_iv_class_dump
PARAMS((const struct iv_class
*, FILE *, int));
295 static void loop_biv_dump
PARAMS((const struct induction
*, FILE *, int));
296 static void loop_giv_dump
PARAMS((const struct induction
*, FILE *, int));
297 static void record_giv
PARAMS ((const struct loop
*, struct induction
*,
298 rtx
, rtx
, rtx
, rtx
, rtx
, rtx
, int,
299 enum g_types
, int, int, rtx
*));
300 static void update_giv_derive
PARAMS ((const struct loop
*, rtx
));
301 static void check_ext_dependent_givs
PARAMS ((struct iv_class
*,
302 struct loop_info
*));
303 static int basic_induction_var
PARAMS ((const struct loop
*, rtx
,
304 enum machine_mode
, rtx
, rtx
,
305 rtx
*, rtx
*, rtx
**));
306 static rtx simplify_giv_expr
PARAMS ((const struct loop
*, rtx
, rtx
*, int *));
307 static int general_induction_var
PARAMS ((const struct loop
*loop
, rtx
, rtx
*,
308 rtx
*, rtx
*, rtx
*, int, int *,
310 static int consec_sets_giv
PARAMS ((const struct loop
*, int, rtx
,
311 rtx
, rtx
, rtx
*, rtx
*, rtx
*, rtx
*));
312 static int check_dbra_loop
PARAMS ((struct loop
*, int));
313 static rtx express_from_1
PARAMS ((rtx
, rtx
, rtx
));
314 static rtx combine_givs_p
PARAMS ((struct induction
*, struct induction
*));
315 static int cmp_combine_givs_stats
PARAMS ((const PTR
, const PTR
));
316 static void combine_givs
PARAMS ((struct loop_regs
*, struct iv_class
*));
317 static int product_cheap_p
PARAMS ((rtx
, rtx
));
318 static int maybe_eliminate_biv
PARAMS ((const struct loop
*, struct iv_class
*,
320 static int maybe_eliminate_biv_1
PARAMS ((const struct loop
*, rtx
, rtx
,
321 struct iv_class
*, int,
323 static int last_use_this_basic_block
PARAMS ((rtx
, rtx
));
324 static void record_initial
PARAMS ((rtx
, rtx
, void *));
325 static void update_reg_last_use
PARAMS ((rtx
, rtx
));
326 static rtx next_insn_in_loop
PARAMS ((const struct loop
*, rtx
));
327 static void loop_regs_scan
PARAMS ((const struct loop
*, int));
328 static int count_insns_in_loop
PARAMS ((const struct loop
*));
329 static void load_mems
PARAMS ((const struct loop
*));
330 static int insert_loop_mem
PARAMS ((rtx
*, void *));
331 static int replace_loop_mem
PARAMS ((rtx
*, void *));
332 static void replace_loop_mems
PARAMS ((rtx
, rtx
, rtx
));
333 static int replace_loop_reg
PARAMS ((rtx
*, void *));
334 static void replace_loop_regs
PARAMS ((rtx insn
, rtx
, rtx
));
335 static void note_reg_stored
PARAMS ((rtx
, rtx
, void *));
336 static void try_copy_prop
PARAMS ((const struct loop
*, rtx
, unsigned int));
337 static void try_swap_copy_prop
PARAMS ((const struct loop
*, rtx
,
339 static int replace_label
PARAMS ((rtx
*, void *));
340 static rtx check_insn_for_givs
PARAMS((struct loop
*, rtx
, int, int));
341 static rtx check_insn_for_bivs
PARAMS((struct loop
*, rtx
, int, int));
342 static rtx gen_add_mult
PARAMS ((rtx
, rtx
, rtx
, rtx
));
343 static void loop_regs_update
PARAMS ((const struct loop
*, rtx
));
344 static int iv_add_mult_cost
PARAMS ((rtx
, rtx
, rtx
, rtx
));
346 static rtx loop_insn_emit_after
PARAMS((const struct loop
*, basic_block
,
348 static rtx loop_call_insn_emit_before
PARAMS((const struct loop
*,
349 basic_block
, rtx
, rtx
));
350 static rtx loop_call_insn_hoist
PARAMS((const struct loop
*, rtx
));
351 static rtx loop_insn_sink_or_swim
PARAMS((const struct loop
*, rtx
));
353 static void loop_dump_aux
PARAMS ((const struct loop
*, FILE *, int));
354 static void loop_delete_insns
PARAMS ((rtx
, rtx
));
355 static HOST_WIDE_INT remove_constant_addition
PARAMS ((rtx
*));
356 static rtx gen_load_of_final_value
PARAMS ((rtx
, rtx
));
357 void debug_ivs
PARAMS ((const struct loop
*));
358 void debug_iv_class
PARAMS ((const struct iv_class
*));
359 void debug_biv
PARAMS ((const struct induction
*));
360 void debug_giv
PARAMS ((const struct induction
*));
361 void debug_loop
PARAMS ((const struct loop
*));
362 void debug_loops
PARAMS ((const struct loops
*));
364 typedef struct rtx_pair
370 typedef struct loop_replace_args
377 /* Nonzero iff INSN is between START and END, inclusive. */
378 #define INSN_IN_RANGE_P(INSN, START, END) \
379 (INSN_UID (INSN) < max_uid_for_loop \
380 && INSN_LUID (INSN) >= INSN_LUID (START) \
381 && INSN_LUID (INSN) <= INSN_LUID (END))
383 /* Indirect_jump_in_function is computed once per function. */
384 static int indirect_jump_in_function
;
385 static int indirect_jump_in_function_p
PARAMS ((rtx
));
387 static int compute_luids
PARAMS ((rtx
, rtx
, int));
389 static int biv_elimination_giv_has_0_offset
PARAMS ((struct induction
*,
393 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
394 copy the value of the strength reduced giv to its original register. */
395 static int copy_cost
;
397 /* Cost of using a register, to normalize the benefits of a giv. */
398 static int reg_address_cost
;
403 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
405 reg_address_cost
= address_cost (reg
, SImode
);
407 copy_cost
= COSTS_N_INSNS (1);
410 /* Compute the mapping from uids to luids.
411 LUIDs are numbers assigned to insns, like uids,
412 except that luids increase monotonically through the code.
413 Start at insn START and stop just before END. Assign LUIDs
414 starting with PREV_LUID + 1. Return the last assigned LUID + 1. */
416 compute_luids (start
, end
, prev_luid
)
423 for (insn
= start
, i
= prev_luid
; insn
!= end
; insn
= NEXT_INSN (insn
))
425 if (INSN_UID (insn
) >= max_uid_for_loop
)
427 /* Don't assign luids to line-number NOTEs, so that the distance in
428 luids between two insns is not affected by -g. */
429 if (GET_CODE (insn
) != NOTE
430 || NOTE_LINE_NUMBER (insn
) <= 0)
431 uid_luid
[INSN_UID (insn
)] = ++i
;
433 /* Give a line number note the same luid as preceding insn. */
434 uid_luid
[INSN_UID (insn
)] = i
;
439 /* Entry point of this file. Perform loop optimization
440 on the current function. F is the first insn of the function
441 and DUMPFILE is a stream for output of a trace of actions taken
442 (or 0 if none should be output). */
445 loop_optimize (f
, dumpfile
, flags
)
446 /* f is the first instruction of a chain of insns for one function */
453 struct loops loops_data
;
454 struct loops
*loops
= &loops_data
;
455 struct loop_info
*loops_info
;
457 loop_dump_stream
= dumpfile
;
459 init_recog_no_volatile ();
461 max_reg_before_loop
= max_reg_num ();
462 loop_max_reg
= max_reg_before_loop
;
466 /* Count the number of loops. */
469 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
471 if (GET_CODE (insn
) == NOTE
472 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
476 /* Don't waste time if no loops. */
477 if (max_loop_num
== 0)
480 loops
->num
= max_loop_num
;
482 /* Get size to use for tables indexed by uids.
483 Leave some space for labels allocated by find_and_verify_loops. */
484 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
486 uid_luid
= (int *) xcalloc (max_uid_for_loop
, sizeof (int));
487 uid_loop
= (struct loop
**) xcalloc (max_uid_for_loop
,
488 sizeof (struct loop
*));
490 /* Allocate storage for array of loops. */
491 loops
->array
= (struct loop
*)
492 xcalloc (loops
->num
, sizeof (struct loop
));
494 /* Find and process each loop.
495 First, find them, and record them in order of their beginnings. */
496 find_and_verify_loops (f
, loops
);
498 /* Allocate and initialize auxiliary loop information. */
499 loops_info
= xcalloc (loops
->num
, sizeof (struct loop_info
));
500 for (i
= 0; i
< loops
->num
; i
++)
501 loops
->array
[i
].aux
= loops_info
+ i
;
503 /* Now find all register lifetimes. This must be done after
504 find_and_verify_loops, because it might reorder the insns in the
506 reg_scan (f
, max_reg_before_loop
, 1);
508 /* This must occur after reg_scan so that registers created by gcse
509 will have entries in the register tables.
511 We could have added a call to reg_scan after gcse_main in toplev.c,
512 but moving this call to init_alias_analysis is more efficient. */
513 init_alias_analysis ();
515 /* See if we went too far. Note that get_max_uid already returns
516 one more that the maximum uid of all insn. */
517 if (get_max_uid () > max_uid_for_loop
)
519 /* Now reset it to the actual size we need. See above. */
520 max_uid_for_loop
= get_max_uid ();
522 /* find_and_verify_loops has already called compute_luids, but it
523 might have rearranged code afterwards, so we need to recompute
525 max_luid
= compute_luids (f
, NULL_RTX
, 0);
527 /* Don't leave gaps in uid_luid for insns that have been
528 deleted. It is possible that the first or last insn
529 using some register has been deleted by cross-jumping.
530 Make sure that uid_luid for that former insn's uid
531 points to the general area where that insn used to be. */
532 for (i
= 0; i
< max_uid_for_loop
; i
++)
534 uid_luid
[0] = uid_luid
[i
];
535 if (uid_luid
[0] != 0)
538 for (i
= 0; i
< max_uid_for_loop
; i
++)
539 if (uid_luid
[i
] == 0)
540 uid_luid
[i
] = uid_luid
[i
- 1];
542 /* Determine if the function has indirect jump. On some systems
543 this prevents low overhead loop instructions from being used. */
544 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
546 /* Now scan the loops, last ones first, since this means inner ones are done
547 before outer ones. */
548 for (i
= max_loop_num
- 1; i
>= 0; i
--)
550 struct loop
*loop
= &loops
->array
[i
];
552 if (! loop
->invalid
&& loop
->end
)
553 scan_loop (loop
, flags
);
556 end_alias_analysis ();
565 /* Returns the next insn, in execution order, after INSN. START and
566 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
567 respectively. LOOP->TOP, if non-NULL, is the top of the loop in the
568 insn-stream; it is used with loops that are entered near the
572 next_insn_in_loop (loop
, insn
)
573 const struct loop
*loop
;
576 insn
= NEXT_INSN (insn
);
578 if (insn
== loop
->end
)
581 /* Go to the top of the loop, and continue there. */
588 if (insn
== loop
->scan_start
)
595 /* Optimize one loop described by LOOP. */
597 /* ??? Could also move memory writes out of loops if the destination address
598 is invariant, the source is invariant, the memory write is not volatile,
599 and if we can prove that no read inside the loop can read this address
600 before the write occurs. If there is a read of this address after the
601 write, then we can also mark the memory read as invariant. */
604 scan_loop (loop
, flags
)
608 struct loop_info
*loop_info
= LOOP_INFO (loop
);
609 struct loop_regs
*regs
= LOOP_REGS (loop
);
611 rtx loop_start
= loop
->start
;
612 rtx loop_end
= loop
->end
;
614 /* 1 if we are scanning insns that could be executed zero times. */
616 /* 1 if we are scanning insns that might never be executed
617 due to a subroutine call which might exit before they are reached. */
619 /* Jump insn that enters the loop, or 0 if control drops in. */
620 rtx loop_entry_jump
= 0;
621 /* Number of insns in the loop. */
624 rtx temp
, update_start
, update_end
;
625 /* The SET from an insn, if it is the only SET in the insn. */
627 /* Chain describing insns movable in current loop. */
628 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
629 /* Ratio of extra register life span we can justify
630 for saving an instruction. More if loop doesn't call subroutines
631 since in that case saving an insn makes more difference
632 and more registers are available. */
634 /* Nonzero if we are scanning instructions in a sub-loop. */
643 /* Determine whether this loop starts with a jump down to a test at
644 the end. This will occur for a small number of loops with a test
645 that is too complex to duplicate in front of the loop.
647 We search for the first insn or label in the loop, skipping NOTEs.
648 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
649 (because we might have a loop executed only once that contains a
650 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
651 (in case we have a degenerate loop).
653 Note that if we mistakenly think that a loop is entered at the top
654 when, in fact, it is entered at the exit test, the only effect will be
655 slightly poorer optimization. Making the opposite error can generate
656 incorrect code. Since very few loops now start with a jump to the
657 exit test, the code here to detect that case is very conservative. */
659 for (p
= NEXT_INSN (loop_start
);
661 && GET_CODE (p
) != CODE_LABEL
&& ! INSN_P (p
)
662 && (GET_CODE (p
) != NOTE
663 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
664 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
668 loop
->scan_start
= p
;
670 /* If loop end is the end of the current function, then emit a
671 NOTE_INSN_DELETED after loop_end and set loop->sink to the dummy
672 note insn. This is the position we use when sinking insns out of
674 if (NEXT_INSN (loop
->end
) != 0)
675 loop
->sink
= NEXT_INSN (loop
->end
);
677 loop
->sink
= emit_note_after (NOTE_INSN_DELETED
, loop
->end
);
679 /* Set up variables describing this loop. */
681 threshold
= (loop_info
->has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
683 /* If loop has a jump before the first label,
684 the true entry is the target of that jump.
685 Start scan from there.
686 But record in LOOP->TOP the place where the end-test jumps
687 back to so we can scan that after the end of the loop. */
688 if (GET_CODE (p
) == JUMP_INSN
)
692 /* Loop entry must be unconditional jump (and not a RETURN) */
693 if (any_uncondjump_p (p
)
694 && JUMP_LABEL (p
) != 0
695 /* Check to see whether the jump actually
696 jumps out of the loop (meaning it's no loop).
697 This case can happen for things like
698 do {..} while (0). If this label was generated previously
699 by loop, we can't tell anything about it and have to reject
701 && INSN_IN_RANGE_P (JUMP_LABEL (p
), loop_start
, loop_end
))
703 loop
->top
= next_label (loop
->scan_start
);
704 loop
->scan_start
= JUMP_LABEL (p
);
708 /* If LOOP->SCAN_START was an insn created by loop, we don't know its luid
709 as required by loop_reg_used_before_p. So skip such loops. (This
710 test may never be true, but it's best to play it safe.)
712 Also, skip loops where we do not start scanning at a label. This
713 test also rejects loops starting with a JUMP_INSN that failed the
716 if (INSN_UID (loop
->scan_start
) >= max_uid_for_loop
717 || GET_CODE (loop
->scan_start
) != CODE_LABEL
)
719 if (loop_dump_stream
)
720 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
721 INSN_UID (loop_start
), INSN_UID (loop_end
));
725 /* Allocate extra space for REGs that might be created by load_mems.
726 We allocate a little extra slop as well, in the hopes that we
727 won't have to reallocate the regs array. */
728 loop_regs_scan (loop
, loop_info
->mems_idx
+ 16);
729 insn_count
= count_insns_in_loop (loop
);
731 if (loop_dump_stream
)
733 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
734 INSN_UID (loop_start
), INSN_UID (loop_end
), insn_count
);
736 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
737 INSN_UID (loop
->cont
));
740 /* Scan through the loop finding insns that are safe to move.
741 Set REGS->ARRAY[I].SET_IN_LOOP negative for the reg I being set, so that
742 this reg will be considered invariant for subsequent insns.
743 We consider whether subsequent insns use the reg
744 in deciding whether it is worth actually moving.
746 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
747 and therefore it is possible that the insns we are scanning
748 would never be executed. At such times, we must make sure
749 that it is safe to execute the insn once instead of zero times.
750 When MAYBE_NEVER is 0, all insns will be executed at least once
751 so that is not a problem. */
753 for (in_libcall
= 0, p
= next_insn_in_loop (loop
, loop
->scan_start
);
755 p
= next_insn_in_loop (loop
, p
))
757 if (in_libcall
&& INSN_P (p
) && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
759 if (GET_CODE (p
) == INSN
)
761 temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
765 && (set
= single_set (p
))
766 && GET_CODE (SET_DEST (set
)) == REG
767 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
768 && SET_DEST (set
) != pic_offset_table_rtx
770 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
775 rtx src
= SET_SRC (set
);
776 rtx dependencies
= 0;
778 /* Figure out what to use as a source of this insn. If a
779 REG_EQUIV note is given or if a REG_EQUAL note with a
780 constant operand is specified, use it as the source and
781 mark that we should move this insn by calling
782 emit_move_insn rather that duplicating the insn.
784 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL
786 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
788 src
= XEXP (temp
, 0), move_insn
= 1;
791 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
792 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
793 src
= XEXP (temp
, 0), move_insn
= 1;
794 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
796 src
= XEXP (temp
, 0);
797 /* A libcall block can use regs that don't appear in
798 the equivalent expression. To move the libcall,
799 we must move those regs too. */
800 dependencies
= libcall_other_reg (p
, src
);
804 /* For parallels, add any possible uses to the depencies, as
805 we can't move the insn without resolving them first. */
806 if (GET_CODE (PATTERN (p
)) == PARALLEL
)
808 for (i
= 0; i
< XVECLEN (PATTERN (p
), 0); i
++)
810 rtx x
= XVECEXP (PATTERN (p
), 0, i
);
811 if (GET_CODE (x
) == USE
)
813 = gen_rtx_EXPR_LIST (VOIDmode
, XEXP (x
, 0),
818 /* Don't try to optimize a register that was made
819 by loop-optimization for an inner loop.
820 We don't know its life-span, so we can't compute
822 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
824 else if (/* The register is used in basic blocks other
825 than the one where it is set (meaning that
826 something after this point in the loop might
827 depend on its value before the set). */
828 ! reg_in_basic_block_p (p
, SET_DEST (set
))
829 /* And the set is not guaranteed to be executed once
830 the loop starts, or the value before the set is
831 needed before the set occurs...
833 ??? Note we have quadratic behavior here, mitigated
834 by the fact that the previous test will often fail for
835 large loops. Rather than re-scanning the entire loop
836 each time for register usage, we should build tables
837 of the register usage and use them here instead. */
839 || loop_reg_used_before_p (loop
, set
, p
)))
840 /* It is unsafe to move the set.
842 This code used to consider it OK to move a set of a variable
843 which was not created by the user and not used in an exit
845 That behavior is incorrect and was removed. */
847 else if ((tem
= loop_invariant_p (loop
, src
))
848 && (dependencies
== 0
850 = loop_invariant_p (loop
, dependencies
)) != 0)
851 && (regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
== 1
853 = consec_sets_invariant_p
854 (loop
, SET_DEST (set
),
855 regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
,
857 /* If the insn can cause a trap (such as divide by zero),
858 can't move it unless it's guaranteed to be executed
859 once loop is entered. Even a function call might
860 prevent the trap insn from being reached
861 (since it might exit!) */
862 && ! ((maybe_never
|| call_passed
)
863 && may_trap_p (src
)))
866 int regno
= REGNO (SET_DEST (set
));
868 /* A potential lossage is where we have a case where two insns
869 can be combined as long as they are both in the loop, but
870 we move one of them outside the loop. For large loops,
871 this can lose. The most common case of this is the address
872 of a function being called.
874 Therefore, if this register is marked as being used
875 exactly once if we are in a loop with calls
876 (a "large loop"), see if we can replace the usage of
877 this register with the source of this SET. If we can,
880 Don't do this if P has a REG_RETVAL note or if we have
881 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
883 if (loop_info
->has_call
884 && regs
->array
[regno
].single_usage
!= 0
885 && regs
->array
[regno
].single_usage
!= const0_rtx
886 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
887 && (REGNO_LAST_UID (regno
)
888 == INSN_UID (regs
->array
[regno
].single_usage
))
889 && regs
->array
[regno
].set_in_loop
== 1
890 && GET_CODE (SET_SRC (set
)) != ASM_OPERANDS
891 && ! side_effects_p (SET_SRC (set
))
892 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
893 && (! SMALL_REGISTER_CLASSES
894 || (! (GET_CODE (SET_SRC (set
)) == REG
895 && (REGNO (SET_SRC (set
))
896 < FIRST_PSEUDO_REGISTER
))))
897 /* This test is not redundant; SET_SRC (set) might be
898 a call-clobbered register and the life of REGNO
899 might span a call. */
900 && ! modified_between_p (SET_SRC (set
), p
,
901 regs
->array
[regno
].single_usage
)
902 && no_labels_between_p (p
,
903 regs
->array
[regno
].single_usage
)
904 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
905 regs
->array
[regno
].single_usage
))
907 /* Replace any usage in a REG_EQUAL note. Must copy
908 the new source, so that we don't get rtx sharing
909 between the SET_SOURCE and REG_NOTES of insn p. */
910 REG_NOTES (regs
->array
[regno
].single_usage
)
912 (REG_NOTES (regs
->array
[regno
].single_usage
),
913 SET_DEST (set
), copy_rtx (SET_SRC (set
))));
916 for (i
= 0; i
< LOOP_REGNO_NREGS (regno
, SET_DEST (set
));
918 regs
->array
[regno
+i
].set_in_loop
= 0;
922 m
= (struct movable
*) xmalloc (sizeof (struct movable
));
926 m
->dependencies
= dependencies
;
927 m
->set_dest
= SET_DEST (set
);
930 = regs
->array
[REGNO (SET_DEST (set
))].set_in_loop
- 1;
934 m
->move_insn
= move_insn
;
935 m
->move_insn_first
= 0;
936 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
937 m
->savemode
= VOIDmode
;
939 /* Set M->cond if either loop_invariant_p
940 or consec_sets_invariant_p returned 2
941 (only conditionally invariant). */
942 m
->cond
= ((tem
| tem1
| tem2
) > 1);
943 m
->global
= LOOP_REG_GLOBAL_P (loop
, regno
);
945 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
946 m
->savings
= regs
->array
[regno
].n_times_set
;
947 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
948 m
->savings
+= libcall_benefit (p
);
949 for (i
= 0; i
< (int) LOOP_REGNO_NREGS (regno
, SET_DEST (set
)); i
++)
950 regs
->array
[regno
+i
].set_in_loop
= move_insn
? -2 : -1;
951 /* Add M to the end of the chain MOVABLES. */
952 loop_movables_add (movables
, m
);
956 /* It is possible for the first instruction to have a
957 REG_EQUAL note but a non-invariant SET_SRC, so we must
958 remember the status of the first instruction in case
959 the last instruction doesn't have a REG_EQUAL note. */
960 m
->move_insn_first
= m
->move_insn
;
962 /* Skip this insn, not checking REG_LIBCALL notes. */
963 p
= next_nonnote_insn (p
);
964 /* Skip the consecutive insns, if there are any. */
965 p
= skip_consec_insns (p
, m
->consec
);
966 /* Back up to the last insn of the consecutive group. */
967 p
= prev_nonnote_insn (p
);
969 /* We must now reset m->move_insn, m->is_equiv, and
970 possibly m->set_src to correspond to the effects of
972 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
974 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
977 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
978 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
979 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
985 = (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
988 /* If this register is always set within a STRICT_LOW_PART
989 or set to zero, then its high bytes are constant.
990 So clear them outside the loop and within the loop
991 just load the low bytes.
992 We must check that the machine has an instruction to do so.
993 Also, if the value loaded into the register
994 depends on the same register, this cannot be done. */
995 else if (SET_SRC (set
) == const0_rtx
996 && GET_CODE (NEXT_INSN (p
)) == INSN
997 && (set1
= single_set (NEXT_INSN (p
)))
998 && GET_CODE (set1
) == SET
999 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
1000 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
1001 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
1003 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
1005 int regno
= REGNO (SET_DEST (set
));
1006 if (regs
->array
[regno
].set_in_loop
== 2)
1009 m
= (struct movable
*) xmalloc (sizeof (struct movable
));
1012 m
->set_dest
= SET_DEST (set
);
1013 m
->dependencies
= 0;
1019 m
->move_insn_first
= 0;
1021 /* If the insn may not be executed on some cycles,
1022 we can't clear the whole reg; clear just high part.
1023 Not even if the reg is used only within this loop.
1030 Clearing x before the inner loop could clobber a value
1031 being saved from the last time around the outer loop.
1032 However, if the reg is not used outside this loop
1033 and all uses of the register are in the same
1034 basic block as the store, there is no problem.
1036 If this insn was made by loop, we don't know its
1037 INSN_LUID and hence must make a conservative
1039 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
1040 || LOOP_REG_GLOBAL_P (loop
, regno
)
1041 || (labels_in_range_p
1042 (p
, REGNO_FIRST_LUID (regno
))));
1043 if (maybe_never
&& m
->global
)
1044 m
->savemode
= GET_MODE (SET_SRC (set1
));
1046 m
->savemode
= VOIDmode
;
1050 m
->lifetime
= LOOP_REG_LIFETIME (loop
, regno
);
1053 i
< (int) LOOP_REGNO_NREGS (regno
, SET_DEST (set
));
1055 regs
->array
[regno
+i
].set_in_loop
= -1;
1056 /* Add M to the end of the chain MOVABLES. */
1057 loop_movables_add (movables
, m
);
1062 /* Past a call insn, we get to insns which might not be executed
1063 because the call might exit. This matters for insns that trap.
1064 Constant and pure call insns always return, so they don't count. */
1065 else if (GET_CODE (p
) == CALL_INSN
&& ! CONST_OR_PURE_CALL_P (p
))
1067 /* Past a label or a jump, we get to insns for which we
1068 can't count on whether or how many times they will be
1069 executed during each iteration. Therefore, we can
1070 only move out sets of trivial variables
1071 (those not used after the loop). */
1072 /* Similar code appears twice in strength_reduce. */
1073 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1074 /* If we enter the loop in the middle, and scan around to the
1075 beginning, don't set maybe_never for that. This must be an
1076 unconditional jump, otherwise the code at the top of the
1077 loop might never be executed. Unconditional jumps are
1078 followed by a barrier then the loop_end. */
1079 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop
->top
1080 && NEXT_INSN (NEXT_INSN (p
)) == loop_end
1081 && any_uncondjump_p (p
)))
1083 else if (GET_CODE (p
) == NOTE
)
1085 /* At the virtual top of a converted loop, insns are again known to
1086 be executed: logically, the loop begins here even though the exit
1087 code has been duplicated. */
1088 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1089 maybe_never
= call_passed
= 0;
1090 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1092 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1097 /* If one movable subsumes another, ignore that other. */
1099 ignore_some_movables (movables
);
1101 /* For each movable insn, see if the reg that it loads
1102 leads when it dies right into another conditionally movable insn.
1103 If so, record that the second insn "forces" the first one,
1104 since the second can be moved only if the first is. */
1106 force_movables (movables
);
1108 /* See if there are multiple movable insns that load the same value.
1109 If there are, make all but the first point at the first one
1110 through the `match' field, and add the priorities of them
1111 all together as the priority of the first. */
1113 combine_movables (movables
, regs
);
1115 /* Now consider each movable insn to decide whether it is worth moving.
1116 Store 0 in regs->array[I].set_in_loop for each reg I that is moved.
1118 Generally this increases code size, so do not move moveables when
1119 optimizing for code size. */
1121 if (! optimize_size
)
1123 move_movables (loop
, movables
, threshold
, insn_count
);
1125 /* Recalculate regs->array if move_movables has created new
1127 if (max_reg_num () > regs
->num
)
1129 loop_regs_scan (loop
, 0);
1130 for (update_start
= loop_start
;
1131 PREV_INSN (update_start
)
1132 && GET_CODE (PREV_INSN (update_start
)) != CODE_LABEL
;
1133 update_start
= PREV_INSN (update_start
))
1135 update_end
= NEXT_INSN (loop_end
);
1137 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1138 loop_max_reg
= max_reg_num ();
1142 /* Now candidates that still are negative are those not moved.
1143 Change regs->array[I].set_in_loop to indicate that those are not actually
1145 for (i
= 0; i
< regs
->num
; i
++)
1146 if (regs
->array
[i
].set_in_loop
< 0)
1147 regs
->array
[i
].set_in_loop
= regs
->array
[i
].n_times_set
;
1149 /* Now that we've moved some things out of the loop, we might be able to
1150 hoist even more memory references. */
1153 /* Recalculate regs->array if load_mems has created new registers. */
1154 if (max_reg_num () > regs
->num
)
1155 loop_regs_scan (loop
, 0);
1157 for (update_start
= loop_start
;
1158 PREV_INSN (update_start
)
1159 && GET_CODE (PREV_INSN (update_start
)) != CODE_LABEL
;
1160 update_start
= PREV_INSN (update_start
))
1162 update_end
= NEXT_INSN (loop_end
);
1164 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1165 loop_max_reg
= max_reg_num ();
1167 if (flag_strength_reduce
)
1169 if (update_end
&& GET_CODE (update_end
) == CODE_LABEL
)
1170 /* Ensure our label doesn't go away. */
1171 LABEL_NUSES (update_end
)++;
1173 strength_reduce (loop
, flags
);
1175 reg_scan_update (update_start
, update_end
, loop_max_reg
);
1176 loop_max_reg
= max_reg_num ();
1178 if (update_end
&& GET_CODE (update_end
) == CODE_LABEL
1179 && --LABEL_NUSES (update_end
) == 0)
1180 delete_related_insns (update_end
);
1184 /* The movable information is required for strength reduction. */
1185 loop_movables_free (movables
);
1192 /* Add elements to *OUTPUT to record all the pseudo-regs
1193 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1196 record_excess_regs (in_this
, not_in_this
, output
)
1197 rtx in_this
, not_in_this
;
1204 code
= GET_CODE (in_this
);
1218 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1219 && ! reg_mentioned_p (in_this
, not_in_this
))
1220 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1227 fmt
= GET_RTX_FORMAT (code
);
1228 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1235 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1236 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1240 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1246 /* Check what regs are referred to in the libcall block ending with INSN,
1247 aside from those mentioned in the equivalent value.
1248 If there are none, return 0.
1249 If there are one or more, return an EXPR_LIST containing all of them. */
1252 libcall_other_reg (insn
, equiv
)
1255 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1256 rtx p
= XEXP (note
, 0);
1259 /* First, find all the regs used in the libcall block
1260 that are not mentioned as inputs to the result. */
1264 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1265 || GET_CODE (p
) == CALL_INSN
)
1266 record_excess_regs (PATTERN (p
), equiv
, &output
);
1273 /* Return 1 if all uses of REG
1274 are between INSN and the end of the basic block. */
1277 reg_in_basic_block_p (insn
, reg
)
1280 int regno
= REGNO (reg
);
1283 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1286 /* Search this basic block for the already recorded last use of the reg. */
1287 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1289 switch (GET_CODE (p
))
1296 /* Ordinary insn: if this is the last use, we win. */
1297 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1302 /* Jump insn: if this is the last use, we win. */
1303 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1305 /* Otherwise, it's the end of the basic block, so we lose. */
1310 /* It's the end of the basic block, so we lose. */
1318 /* The "last use" that was recorded can't be found after the first
1319 use. This can happen when the last use was deleted while
1320 processing an inner loop, this inner loop was then completely
1321 unrolled, and the outer loop is always exited after the inner loop,
1322 so that everything after the first use becomes a single basic block. */
1326 /* Compute the benefit of eliminating the insns in the block whose
1327 last insn is LAST. This may be a group of insns used to compute a
1328 value directly or can contain a library call. */
1331 libcall_benefit (last
)
1337 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1338 insn
!= last
; insn
= NEXT_INSN (insn
))
1340 if (GET_CODE (insn
) == CALL_INSN
)
1341 benefit
+= 10; /* Assume at least this many insns in a library
1343 else if (GET_CODE (insn
) == INSN
1344 && GET_CODE (PATTERN (insn
)) != USE
1345 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1352 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1355 skip_consec_insns (insn
, count
)
1359 for (; count
> 0; count
--)
1363 /* If first insn of libcall sequence, skip to end. */
1364 /* Do this at start of loop, since INSN is guaranteed to
1366 if (GET_CODE (insn
) != NOTE
1367 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1368 insn
= XEXP (temp
, 0);
1371 insn
= NEXT_INSN (insn
);
1372 while (GET_CODE (insn
) == NOTE
);
1378 /* Ignore any movable whose insn falls within a libcall
1379 which is part of another movable.
1380 We make use of the fact that the movable for the libcall value
1381 was made later and so appears later on the chain. */
1384 ignore_some_movables (movables
)
1385 struct loop_movables
*movables
;
1387 struct movable
*m
, *m1
;
1389 for (m
= movables
->head
; m
; m
= m
->next
)
1391 /* Is this a movable for the value of a libcall? */
1392 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1396 /* Check for earlier movables inside that range,
1397 and mark them invalid. We cannot use LUIDs here because
1398 insns created by loop.c for prior loops don't have LUIDs.
1399 Rather than reject all such insns from movables, we just
1400 explicitly check each insn in the libcall (since invariant
1401 libcalls aren't that common). */
1402 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1403 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1404 if (m1
->insn
== insn
)
1410 /* For each movable insn, see if the reg that it loads
1411 leads when it dies right into another conditionally movable insn.
1412 If so, record that the second insn "forces" the first one,
1413 since the second can be moved only if the first is. */
1416 force_movables (movables
)
1417 struct loop_movables
*movables
;
1419 struct movable
*m
, *m1
;
1421 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
1422 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1423 if (!m1
->partial
&& !m1
->done
)
1425 int regno
= m1
->regno
;
1426 for (m
= m1
->next
; m
; m
= m
->next
)
1427 /* ??? Could this be a bug? What if CSE caused the
1428 register of M1 to be used after this insn?
1429 Since CSE does not update regno_last_uid,
1430 this insn M->insn might not be where it dies.
1431 But very likely this doesn't matter; what matters is
1432 that M's reg is computed from M1's reg. */
1433 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1436 if (m
!= 0 && m
->set_src
== m1
->set_dest
1437 /* If m->consec, m->set_src isn't valid. */
1441 /* Increase the priority of the moving the first insn
1442 since it permits the second to be moved as well. */
1446 m1
->lifetime
+= m
->lifetime
;
1447 m1
->savings
+= m
->savings
;
1452 /* Find invariant expressions that are equal and can be combined into
1456 combine_movables (movables
, regs
)
1457 struct loop_movables
*movables
;
1458 struct loop_regs
*regs
;
1461 char *matched_regs
= (char *) xmalloc (regs
->num
);
1462 enum machine_mode mode
;
1464 /* Regs that are set more than once are not allowed to match
1465 or be matched. I'm no longer sure why not. */
1466 /* Only pseudo registers are allowed to match or be matched,
1467 since move_movables does not validate the change. */
1468 /* Perhaps testing m->consec_sets would be more appropriate here? */
1470 for (m
= movables
->head
; m
; m
= m
->next
)
1471 if (m
->match
== 0 && regs
->array
[m
->regno
].n_times_set
== 1
1472 && m
->regno
>= FIRST_PSEUDO_REGISTER
1476 int regno
= m
->regno
;
1478 memset (matched_regs
, 0, regs
->num
);
1479 matched_regs
[regno
] = 1;
1481 /* We want later insns to match the first one. Don't make the first
1482 one match any later ones. So start this loop at m->next. */
1483 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1484 if (m
!= m1
&& m1
->match
== 0
1485 && regs
->array
[m1
->regno
].n_times_set
== 1
1486 && m1
->regno
>= FIRST_PSEUDO_REGISTER
1487 /* A reg used outside the loop mustn't be eliminated. */
1489 /* A reg used for zero-extending mustn't be eliminated. */
1491 && (matched_regs
[m1
->regno
]
1494 /* Can combine regs with different modes loaded from the
1495 same constant only if the modes are the same or
1496 if both are integer modes with M wider or the same
1497 width as M1. The check for integer is redundant, but
1498 safe, since the only case of differing destination
1499 modes with equal sources is when both sources are
1500 VOIDmode, i.e., CONST_INT. */
1501 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1502 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1503 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1504 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1505 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1506 /* See if the source of M1 says it matches M. */
1507 && ((GET_CODE (m1
->set_src
) == REG
1508 && matched_regs
[REGNO (m1
->set_src
)])
1509 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1511 && ((m
->dependencies
== m1
->dependencies
)
1512 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1514 m
->lifetime
+= m1
->lifetime
;
1515 m
->savings
+= m1
->savings
;
1518 matched_regs
[m1
->regno
] = 1;
1522 /* Now combine the regs used for zero-extension.
1523 This can be done for those not marked `global'
1524 provided their lives don't overlap. */
1526 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1527 mode
= GET_MODE_WIDER_MODE (mode
))
1529 struct movable
*m0
= 0;
1531 /* Combine all the registers for extension from mode MODE.
1532 Don't combine any that are used outside this loop. */
1533 for (m
= movables
->head
; m
; m
= m
->next
)
1534 if (m
->partial
&& ! m
->global
1535 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1539 int first
= REGNO_FIRST_LUID (m
->regno
);
1540 int last
= REGNO_LAST_LUID (m
->regno
);
1544 /* First one: don't check for overlap, just record it. */
1549 /* Make sure they extend to the same mode.
1550 (Almost always true.) */
1551 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1554 /* We already have one: check for overlap with those
1555 already combined together. */
1556 for (m1
= movables
->head
; m1
!= m
; m1
= m1
->next
)
1557 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1558 if (! (REGNO_FIRST_LUID (m1
->regno
) > last
1559 || REGNO_LAST_LUID (m1
->regno
) < first
))
1562 /* No overlap: we can combine this with the others. */
1563 m0
->lifetime
+= m
->lifetime
;
1564 m0
->savings
+= m
->savings
;
1574 free (matched_regs
);
1577 /* Returns the number of movable instructions in LOOP that were not
1578 moved outside the loop. */
1581 num_unmoved_movables (loop
)
1582 const struct loop
*loop
;
1587 for (m
= LOOP_MOVABLES (loop
)->head
; m
; m
= m
->next
)
1595 /* Return 1 if regs X and Y will become the same if moved. */
1598 regs_match_p (x
, y
, movables
)
1600 struct loop_movables
*movables
;
1602 unsigned int xn
= REGNO (x
);
1603 unsigned int yn
= REGNO (y
);
1604 struct movable
*mx
, *my
;
1606 for (mx
= movables
->head
; mx
; mx
= mx
->next
)
1607 if (mx
->regno
== xn
)
1610 for (my
= movables
->head
; my
; my
= my
->next
)
1611 if (my
->regno
== yn
)
1615 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1617 || mx
== my
->match
));
1620 /* Return 1 if X and Y are identical-looking rtx's.
1621 This is the Lisp function EQUAL for rtx arguments.
1623 If two registers are matching movables or a movable register and an
1624 equivalent constant, consider them equal. */
1627 rtx_equal_for_loop_p (x
, y
, movables
, regs
)
1629 struct loop_movables
*movables
;
1630 struct loop_regs
*regs
;
1640 if (x
== 0 || y
== 0)
1643 code
= GET_CODE (x
);
1645 /* If we have a register and a constant, they may sometimes be
1647 if (GET_CODE (x
) == REG
&& regs
->array
[REGNO (x
)].set_in_loop
== -2
1650 for (m
= movables
->head
; m
; m
= m
->next
)
1651 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1652 && rtx_equal_p (m
->set_src
, y
))
1655 else if (GET_CODE (y
) == REG
&& regs
->array
[REGNO (y
)].set_in_loop
== -2
1658 for (m
= movables
->head
; m
; m
= m
->next
)
1659 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1660 && rtx_equal_p (m
->set_src
, x
))
1664 /* Otherwise, rtx's of different codes cannot be equal. */
1665 if (code
!= GET_CODE (y
))
1668 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1669 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1671 if (GET_MODE (x
) != GET_MODE (y
))
1674 /* These three types of rtx's can be compared nonrecursively. */
1676 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1678 if (code
== LABEL_REF
)
1679 return XEXP (x
, 0) == XEXP (y
, 0);
1680 if (code
== SYMBOL_REF
)
1681 return XSTR (x
, 0) == XSTR (y
, 0);
1683 /* Compare the elements. If any pair of corresponding elements
1684 fail to match, return 0 for the whole things. */
1686 fmt
= GET_RTX_FORMAT (code
);
1687 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1692 if (XWINT (x
, i
) != XWINT (y
, i
))
1697 if (XINT (x
, i
) != XINT (y
, i
))
1702 /* Two vectors must have the same length. */
1703 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1706 /* And the corresponding elements must match. */
1707 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1708 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
1709 movables
, regs
) == 0)
1714 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
, regs
)
1720 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1725 /* These are just backpointers, so they don't matter. */
1731 /* It is believed that rtx's at this level will never
1732 contain anything but integers and other rtx's,
1733 except for within LABEL_REFs and SYMBOL_REFs. */
1741 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1742 insns in INSNS which use the reference. LABEL_NUSES for CODE_LABEL
1743 references is incremented once for each added note. */
1746 add_label_notes (x
, insns
)
1750 enum rtx_code code
= GET_CODE (x
);
1755 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1757 /* This code used to ignore labels that referred to dispatch tables to
1758 avoid flow generating (slighly) worse code.
1760 We no longer ignore such label references (see LABEL_REF handling in
1761 mark_jump_label for additional information). */
1762 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1763 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1765 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
, XEXP (x
, 0),
1767 if (LABEL_P (XEXP (x
, 0)))
1768 LABEL_NUSES (XEXP (x
, 0))++;
1772 fmt
= GET_RTX_FORMAT (code
);
1773 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1776 add_label_notes (XEXP (x
, i
), insns
);
1777 else if (fmt
[i
] == 'E')
1778 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1779 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1783 /* Scan MOVABLES, and move the insns that deserve to be moved.
1784 If two matching movables are combined, replace one reg with the
1785 other throughout. */
1788 move_movables (loop
, movables
, threshold
, insn_count
)
1790 struct loop_movables
*movables
;
1794 struct loop_regs
*regs
= LOOP_REGS (loop
);
1795 int nregs
= regs
->num
;
1799 rtx loop_start
= loop
->start
;
1800 rtx loop_end
= loop
->end
;
1801 /* Map of pseudo-register replacements to handle combining
1802 when we move several insns that load the same value
1803 into different pseudo-registers. */
1804 rtx
*reg_map
= (rtx
*) xcalloc (nregs
, sizeof (rtx
));
1805 char *already_moved
= (char *) xcalloc (nregs
, sizeof (char));
1807 for (m
= movables
->head
; m
; m
= m
->next
)
1809 /* Describe this movable insn. */
1811 if (loop_dump_stream
)
1813 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1814 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1816 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1818 fprintf (loop_dump_stream
, "cond ");
1820 fprintf (loop_dump_stream
, "force ");
1822 fprintf (loop_dump_stream
, "global ");
1824 fprintf (loop_dump_stream
, "done ");
1826 fprintf (loop_dump_stream
, "move-insn ");
1828 fprintf (loop_dump_stream
, "matches %d ",
1829 INSN_UID (m
->match
->insn
));
1831 fprintf (loop_dump_stream
, "forces %d ",
1832 INSN_UID (m
->forces
->insn
));
1835 /* Ignore the insn if it's already done (it matched something else).
1836 Otherwise, see if it is now safe to move. */
1840 || (1 == loop_invariant_p (loop
, m
->set_src
)
1841 && (m
->dependencies
== 0
1842 || 1 == loop_invariant_p (loop
, m
->dependencies
))
1844 || 1 == consec_sets_invariant_p (loop
, m
->set_dest
,
1847 && (! m
->forces
|| m
->forces
->done
))
1851 int savings
= m
->savings
;
1853 /* We have an insn that is safe to move.
1854 Compute its desirability. */
1859 if (loop_dump_stream
)
1860 fprintf (loop_dump_stream
, "savings %d ", savings
);
1862 if (regs
->array
[regno
].moved_once
&& loop_dump_stream
)
1863 fprintf (loop_dump_stream
, "halved since already moved ");
1865 /* An insn MUST be moved if we already moved something else
1866 which is safe only if this one is moved too: that is,
1867 if already_moved[REGNO] is nonzero. */
1869 /* An insn is desirable to move if the new lifetime of the
1870 register is no more than THRESHOLD times the old lifetime.
1871 If it's not desirable, it means the loop is so big
1872 that moving won't speed things up much,
1873 and it is liable to make register usage worse. */
1875 /* It is also desirable to move if it can be moved at no
1876 extra cost because something else was already moved. */
1878 if (already_moved
[regno
]
1879 || flag_move_all_movables
1880 || (threshold
* savings
* m
->lifetime
) >=
1881 (regs
->array
[regno
].moved_once
? insn_count
* 2 : insn_count
)
1882 || (m
->forces
&& m
->forces
->done
1883 && regs
->array
[m
->forces
->regno
].n_times_set
== 1))
1887 rtx first
= NULL_RTX
;
1889 /* Now move the insns that set the reg. */
1891 if (m
->partial
&& m
->match
)
1895 /* Find the end of this chain of matching regs.
1896 Thus, we load each reg in the chain from that one reg.
1897 And that reg is loaded with 0 directly,
1898 since it has ->match == 0. */
1899 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1900 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1901 SET_DEST (PATTERN (m1
->insn
)));
1902 i1
= loop_insn_hoist (loop
, newpat
);
1904 /* Mark the moved, invariant reg as being allowed to
1905 share a hard reg with the other matching invariant. */
1906 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1907 r1
= SET_DEST (PATTERN (m
->insn
));
1908 r2
= SET_DEST (PATTERN (m1
->insn
));
1910 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1911 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1913 delete_insn (m
->insn
);
1918 if (loop_dump_stream
)
1919 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1921 /* If we are to re-generate the item being moved with a
1922 new move insn, first delete what we have and then emit
1923 the move insn before the loop. */
1924 else if (m
->move_insn
)
1928 for (count
= m
->consec
; count
>= 0; count
--)
1930 /* If this is the first insn of a library call sequence,
1931 something is very wrong. */
1932 if (GET_CODE (p
) != NOTE
1933 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1936 /* If this is the last insn of a libcall sequence, then
1937 delete every insn in the sequence except the last.
1938 The last insn is handled in the normal manner. */
1939 if (GET_CODE (p
) != NOTE
1940 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1942 temp
= XEXP (temp
, 0);
1944 temp
= delete_insn (temp
);
1948 p
= delete_insn (p
);
1950 /* simplify_giv_expr expects that it can walk the insns
1951 at m->insn forwards and see this old sequence we are
1952 tossing here. delete_insn does preserve the next
1953 pointers, but when we skip over a NOTE we must fix
1954 it up. Otherwise that code walks into the non-deleted
1956 while (p
&& GET_CODE (p
) == NOTE
)
1957 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
1961 emit_move_insn (m
->set_dest
, m
->set_src
);
1965 add_label_notes (m
->set_src
, seq
);
1967 i1
= loop_insn_hoist (loop
, seq
);
1968 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1969 set_unique_reg_note (i1
,
1970 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1973 if (loop_dump_stream
)
1974 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1976 /* The more regs we move, the less we like moving them. */
1981 for (count
= m
->consec
; count
>= 0; count
--)
1985 /* If first insn of libcall sequence, skip to end. */
1986 /* Do this at start of loop, since p is guaranteed to
1988 if (GET_CODE (p
) != NOTE
1989 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1992 /* If last insn of libcall sequence, move all
1993 insns except the last before the loop. The last
1994 insn is handled in the normal manner. */
1995 if (GET_CODE (p
) != NOTE
1996 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
2000 rtx fn_address_insn
= 0;
2003 for (temp
= XEXP (temp
, 0); temp
!= p
;
2004 temp
= NEXT_INSN (temp
))
2010 if (GET_CODE (temp
) == NOTE
)
2013 body
= PATTERN (temp
);
2015 /* Find the next insn after TEMP,
2016 not counting USE or NOTE insns. */
2017 for (next
= NEXT_INSN (temp
); next
!= p
;
2018 next
= NEXT_INSN (next
))
2019 if (! (GET_CODE (next
) == INSN
2020 && GET_CODE (PATTERN (next
)) == USE
)
2021 && GET_CODE (next
) != NOTE
)
2024 /* If that is the call, this may be the insn
2025 that loads the function address.
2027 Extract the function address from the insn
2028 that loads it into a register.
2029 If this insn was cse'd, we get incorrect code.
2031 So emit a new move insn that copies the
2032 function address into the register that the
2033 call insn will use. flow.c will delete any
2034 redundant stores that we have created. */
2035 if (GET_CODE (next
) == CALL_INSN
2036 && GET_CODE (body
) == SET
2037 && GET_CODE (SET_DEST (body
)) == REG
2038 && (n
= find_reg_note (temp
, REG_EQUAL
,
2041 fn_reg
= SET_SRC (body
);
2042 if (GET_CODE (fn_reg
) != REG
)
2043 fn_reg
= SET_DEST (body
);
2044 fn_address
= XEXP (n
, 0);
2045 fn_address_insn
= temp
;
2047 /* We have the call insn.
2048 If it uses the register we suspect it might,
2049 load it with the correct address directly. */
2050 if (GET_CODE (temp
) == CALL_INSN
2052 && reg_referenced_p (fn_reg
, body
))
2053 loop_insn_emit_after (loop
, 0, fn_address_insn
,
2055 (fn_reg
, fn_address
));
2057 if (GET_CODE (temp
) == CALL_INSN
)
2059 i1
= loop_call_insn_hoist (loop
, body
);
2060 /* Because the USAGE information potentially
2061 contains objects other than hard registers
2062 we need to copy it. */
2063 if (CALL_INSN_FUNCTION_USAGE (temp
))
2064 CALL_INSN_FUNCTION_USAGE (i1
)
2065 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
2068 i1
= loop_insn_hoist (loop
, body
);
2071 if (temp
== fn_address_insn
)
2072 fn_address_insn
= i1
;
2073 REG_NOTES (i1
) = REG_NOTES (temp
);
2074 REG_NOTES (temp
) = NULL
;
2080 if (m
->savemode
!= VOIDmode
)
2082 /* P sets REG to zero; but we should clear only
2083 the bits that are not covered by the mode
2085 rtx reg
= m
->set_dest
;
2090 tem
= expand_simple_binop
2091 (GET_MODE (reg
), AND
, reg
,
2092 GEN_INT ((((HOST_WIDE_INT
) 1
2093 << GET_MODE_BITSIZE (m
->savemode
)))
2095 reg
, 1, OPTAB_LIB_WIDEN
);
2099 emit_move_insn (reg
, tem
);
2100 sequence
= get_insns ();
2102 i1
= loop_insn_hoist (loop
, sequence
);
2104 else if (GET_CODE (p
) == CALL_INSN
)
2106 i1
= loop_call_insn_hoist (loop
, PATTERN (p
));
2107 /* Because the USAGE information potentially
2108 contains objects other than hard registers
2109 we need to copy it. */
2110 if (CALL_INSN_FUNCTION_USAGE (p
))
2111 CALL_INSN_FUNCTION_USAGE (i1
)
2112 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
2114 else if (count
== m
->consec
&& m
->move_insn_first
)
2117 /* The SET_SRC might not be invariant, so we must
2118 use the REG_EQUAL note. */
2120 emit_move_insn (m
->set_dest
, m
->set_src
);
2124 add_label_notes (m
->set_src
, seq
);
2126 i1
= loop_insn_hoist (loop
, seq
);
2127 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2128 set_unique_reg_note (i1
, m
->is_equiv
? REG_EQUIV
2129 : REG_EQUAL
, m
->set_src
);
2132 i1
= loop_insn_hoist (loop
, PATTERN (p
));
2134 if (REG_NOTES (i1
) == 0)
2136 REG_NOTES (i1
) = REG_NOTES (p
);
2137 REG_NOTES (p
) = NULL
;
2139 /* If there is a REG_EQUAL note present whose value
2140 is not loop invariant, then delete it, since it
2141 may cause problems with later optimization passes.
2142 It is possible for cse to create such notes
2143 like this as a result of record_jump_cond. */
2145 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2146 && ! loop_invariant_p (loop
, XEXP (temp
, 0)))
2147 remove_note (i1
, temp
);
2153 if (loop_dump_stream
)
2154 fprintf (loop_dump_stream
, " moved to %d",
2157 /* If library call, now fix the REG_NOTES that contain
2158 insn pointers, namely REG_LIBCALL on FIRST
2159 and REG_RETVAL on I1. */
2160 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2162 XEXP (temp
, 0) = first
;
2163 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2164 XEXP (temp
, 0) = i1
;
2171 /* simplify_giv_expr expects that it can walk the insns
2172 at m->insn forwards and see this old sequence we are
2173 tossing here. delete_insn does preserve the next
2174 pointers, but when we skip over a NOTE we must fix
2175 it up. Otherwise that code walks into the non-deleted
2177 while (p
&& GET_CODE (p
) == NOTE
)
2178 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
2181 /* The more regs we move, the less we like moving them. */
2185 /* Any other movable that loads the same register
2187 already_moved
[regno
] = 1;
2189 /* This reg has been moved out of one loop. */
2190 regs
->array
[regno
].moved_once
= 1;
2192 /* The reg set here is now invariant. */
2196 for (i
= 0; i
< (int) LOOP_REGNO_NREGS (regno
, m
->set_dest
); i
++)
2197 regs
->array
[regno
+i
].set_in_loop
= 0;
2202 /* Change the length-of-life info for the register
2203 to say it lives at least the full length of this loop.
2204 This will help guide optimizations in outer loops. */
2206 if (REGNO_FIRST_LUID (regno
) > INSN_LUID (loop_start
))
2207 /* This is the old insn before all the moved insns.
2208 We can't use the moved insn because it is out of range
2209 in uid_luid. Only the old insns have luids. */
2210 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2211 if (REGNO_LAST_LUID (regno
) < INSN_LUID (loop_end
))
2212 REGNO_LAST_UID (regno
) = INSN_UID (loop_end
);
2214 /* Combine with this moved insn any other matching movables. */
2217 for (m1
= movables
->head
; m1
; m1
= m1
->next
)
2222 /* Schedule the reg loaded by M1
2223 for replacement so that shares the reg of M.
2224 If the modes differ (only possible in restricted
2225 circumstances, make a SUBREG.
2227 Note this assumes that the target dependent files
2228 treat REG and SUBREG equally, including within
2229 GO_IF_LEGITIMATE_ADDRESS and in all the
2230 predicates since we never verify that replacing the
2231 original register with a SUBREG results in a
2232 recognizable insn. */
2233 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2234 reg_map
[m1
->regno
] = m
->set_dest
;
2237 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2240 /* Get rid of the matching insn
2241 and prevent further processing of it. */
2244 /* if library call, delete all insns. */
2245 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2247 delete_insn_chain (XEXP (temp
, 0), m1
->insn
);
2249 delete_insn (m1
->insn
);
2251 /* Any other movable that loads the same register
2253 already_moved
[m1
->regno
] = 1;
2255 /* The reg merged here is now invariant,
2256 if the reg it matches is invariant. */
2261 i
< (int) LOOP_REGNO_NREGS (regno
, m1
->set_dest
);
2263 regs
->array
[m1
->regno
+i
].set_in_loop
= 0;
2267 else if (loop_dump_stream
)
2268 fprintf (loop_dump_stream
, "not desirable");
2270 else if (loop_dump_stream
&& !m
->match
)
2271 fprintf (loop_dump_stream
, "not safe");
2273 if (loop_dump_stream
)
2274 fprintf (loop_dump_stream
, "\n");
2278 new_start
= loop_start
;
2280 /* Go through all the instructions in the loop, making
2281 all the register substitutions scheduled in REG_MAP. */
2282 for (p
= new_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
2283 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2284 || GET_CODE (p
) == CALL_INSN
)
2286 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2287 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2293 free (already_moved
);
2298 loop_movables_add (movables
, m
)
2299 struct loop_movables
*movables
;
2302 if (movables
->head
== 0)
2305 movables
->last
->next
= m
;
2311 loop_movables_free (movables
)
2312 struct loop_movables
*movables
;
2315 struct movable
*m_next
;
2317 for (m
= movables
->head
; m
; m
= m_next
)
2325 /* Scan X and replace the address of any MEM in it with ADDR.
2326 REG is the address that MEM should have before the replacement. */
2329 replace_call_address (x
, reg
, addr
)
2338 code
= GET_CODE (x
);
2352 /* Short cut for very common case. */
2353 replace_call_address (XEXP (x
, 1), reg
, addr
);
2357 /* Short cut for very common case. */
2358 replace_call_address (XEXP (x
, 0), reg
, addr
);
2362 /* If this MEM uses a reg other than the one we expected,
2363 something is wrong. */
2364 if (XEXP (x
, 0) != reg
)
2373 fmt
= GET_RTX_FORMAT (code
);
2374 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2377 replace_call_address (XEXP (x
, i
), reg
, addr
);
2378 else if (fmt
[i
] == 'E')
2381 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2382 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2388 /* Return the number of memory refs to addresses that vary
2392 count_nonfixed_reads (loop
, x
)
2393 const struct loop
*loop
;
2404 code
= GET_CODE (x
);
2418 return ((loop_invariant_p (loop
, XEXP (x
, 0)) != 1)
2419 + count_nonfixed_reads (loop
, XEXP (x
, 0)));
2426 fmt
= GET_RTX_FORMAT (code
);
2427 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2430 value
+= count_nonfixed_reads (loop
, XEXP (x
, i
));
2434 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2435 value
+= count_nonfixed_reads (loop
, XVECEXP (x
, i
, j
));
2441 /* Scan a loop setting the elements `cont', `vtop', `loops_enclosed',
2442 `has_call', `has_nonconst_call', `has_volatile', `has_tablejump',
2443 `unknown_address_altered', `unknown_constant_address_altered', and
2444 `num_mem_sets' in LOOP. Also, fill in the array `mems' and the
2445 list `store_mems' in LOOP. */
2453 struct loop_info
*loop_info
= LOOP_INFO (loop
);
2454 rtx start
= loop
->start
;
2455 rtx end
= loop
->end
;
2456 /* The label after END. Jumping here is just like falling off the
2457 end of the loop. We use next_nonnote_insn instead of next_label
2458 as a hedge against the (pathological) case where some actual insn
2459 might end up between the two. */
2460 rtx exit_target
= next_nonnote_insn (end
);
2462 loop_info
->has_indirect_jump
= indirect_jump_in_function
;
2463 loop_info
->pre_header_has_call
= 0;
2464 loop_info
->has_call
= 0;
2465 loop_info
->has_nonconst_call
= 0;
2466 loop_info
->has_prefetch
= 0;
2467 loop_info
->has_volatile
= 0;
2468 loop_info
->has_tablejump
= 0;
2469 loop_info
->has_multiple_exit_targets
= 0;
2472 loop_info
->unknown_address_altered
= 0;
2473 loop_info
->unknown_constant_address_altered
= 0;
2474 loop_info
->store_mems
= NULL_RTX
;
2475 loop_info
->first_loop_store_insn
= NULL_RTX
;
2476 loop_info
->mems_idx
= 0;
2477 loop_info
->num_mem_sets
= 0;
2480 for (insn
= start
; insn
&& GET_CODE (insn
) != CODE_LABEL
;
2481 insn
= PREV_INSN (insn
))
2483 if (GET_CODE (insn
) == CALL_INSN
)
2485 loop_info
->pre_header_has_call
= 1;
2490 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2491 insn
= NEXT_INSN (insn
))
2493 switch (GET_CODE (insn
))
2496 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2499 /* Count number of loops contained in this one. */
2502 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2507 if (! CONST_OR_PURE_CALL_P (insn
))
2509 loop_info
->unknown_address_altered
= 1;
2510 loop_info
->has_nonconst_call
= 1;
2512 else if (pure_call_p (insn
))
2513 loop_info
->has_nonconst_call
= 1;
2514 loop_info
->has_call
= 1;
2515 if (can_throw_internal (insn
))
2516 loop_info
->has_multiple_exit_targets
= 1;
2520 if (! loop_info
->has_multiple_exit_targets
)
2522 rtx set
= pc_set (insn
);
2526 rtx src
= SET_SRC (set
);
2529 if (GET_CODE (src
) == IF_THEN_ELSE
)
2531 label1
= XEXP (src
, 1);
2532 label2
= XEXP (src
, 2);
2542 if (label1
&& label1
!= pc_rtx
)
2544 if (GET_CODE (label1
) != LABEL_REF
)
2546 /* Something tricky. */
2547 loop_info
->has_multiple_exit_targets
= 1;
2550 else if (XEXP (label1
, 0) != exit_target
2551 && LABEL_OUTSIDE_LOOP_P (label1
))
2553 /* A jump outside the current loop. */
2554 loop_info
->has_multiple_exit_targets
= 1;
2566 /* A return, or something tricky. */
2567 loop_info
->has_multiple_exit_targets
= 1;
2573 if (volatile_refs_p (PATTERN (insn
)))
2574 loop_info
->has_volatile
= 1;
2576 if (GET_CODE (insn
) == JUMP_INSN
2577 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
2578 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
))
2579 loop_info
->has_tablejump
= 1;
2581 note_stores (PATTERN (insn
), note_addr_stored
, loop_info
);
2582 if (! loop_info
->first_loop_store_insn
&& loop_info
->store_mems
)
2583 loop_info
->first_loop_store_insn
= insn
;
2585 if (flag_non_call_exceptions
&& can_throw_internal (insn
))
2586 loop_info
->has_multiple_exit_targets
= 1;
2594 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2595 if (/* An exception thrown by a called function might land us
2597 ! loop_info
->has_nonconst_call
2598 /* We don't want loads for MEMs moved to a location before the
2599 one at which their stack memory becomes allocated. (Note
2600 that this is not a problem for malloc, etc., since those
2601 require actual function calls. */
2602 && ! current_function_calls_alloca
2603 /* There are ways to leave the loop other than falling off the
2605 && ! loop_info
->has_multiple_exit_targets
)
2606 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2607 insn
= NEXT_INSN (insn
))
2608 for_each_rtx (&insn
, insert_loop_mem
, loop_info
);
2610 /* BLKmode MEMs are added to LOOP_STORE_MEM as necessary so
2611 that loop_invariant_p and load_mems can use true_dependence
2612 to determine what is really clobbered. */
2613 if (loop_info
->unknown_address_altered
)
2615 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
2617 loop_info
->store_mems
2618 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
2620 if (loop_info
->unknown_constant_address_altered
)
2622 rtx mem
= gen_rtx_MEM (BLKmode
, const0_rtx
);
2624 RTX_UNCHANGING_P (mem
) = 1;
2625 loop_info
->store_mems
2626 = gen_rtx_EXPR_LIST (VOIDmode
, mem
, loop_info
->store_mems
);
2630 /* Invalidate all loops containing LABEL. */
2633 invalidate_loops_containing_label (label
)
2637 for (loop
= uid_loop
[INSN_UID (label
)]; loop
; loop
= loop
->outer
)
2641 /* Scan the function looking for loops. Record the start and end of each loop.
2642 Also mark as invalid loops any loops that contain a setjmp or are branched
2643 to from outside the loop. */
2646 find_and_verify_loops (f
, loops
)
2648 struct loops
*loops
;
2653 struct loop
*current_loop
;
2654 struct loop
*next_loop
;
2657 num_loops
= loops
->num
;
2659 compute_luids (f
, NULL_RTX
, 0);
2661 /* If there are jumps to undefined labels,
2662 treat them as jumps out of any/all loops.
2663 This also avoids writing past end of tables when there are no loops. */
2666 /* Find boundaries of loops, mark which loops are contained within
2667 loops, and invalidate loops that have setjmp. */
2670 current_loop
= NULL
;
2671 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2673 if (GET_CODE (insn
) == NOTE
)
2674 switch (NOTE_LINE_NUMBER (insn
))
2676 case NOTE_INSN_LOOP_BEG
:
2677 next_loop
= loops
->array
+ num_loops
;
2678 next_loop
->num
= num_loops
;
2680 next_loop
->start
= insn
;
2681 next_loop
->outer
= current_loop
;
2682 current_loop
= next_loop
;
2685 case NOTE_INSN_LOOP_CONT
:
2686 current_loop
->cont
= insn
;
2689 case NOTE_INSN_LOOP_VTOP
:
2690 current_loop
->vtop
= insn
;
2693 case NOTE_INSN_LOOP_END
:
2697 current_loop
->end
= insn
;
2698 current_loop
= current_loop
->outer
;
2705 if (GET_CODE (insn
) == CALL_INSN
2706 && find_reg_note (insn
, REG_SETJMP
, NULL
))
2708 /* In this case, we must invalidate our current loop and any
2710 for (loop
= current_loop
; loop
; loop
= loop
->outer
)
2713 if (loop_dump_stream
)
2714 fprintf (loop_dump_stream
,
2715 "\nLoop at %d ignored due to setjmp.\n",
2716 INSN_UID (loop
->start
));
2720 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2721 enclosing loop, but this doesn't matter. */
2722 uid_loop
[INSN_UID (insn
)] = current_loop
;
2725 /* Any loop containing a label used in an initializer must be invalidated,
2726 because it can be jumped into from anywhere. */
2727 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2728 invalidate_loops_containing_label (XEXP (label
, 0));
2730 /* Any loop containing a label used for an exception handler must be
2731 invalidated, because it can be jumped into from anywhere. */
2732 for_each_eh_label (invalidate_loops_containing_label
);
2734 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2735 loop that it is not contained within, that loop is marked invalid.
2736 If any INSN or CALL_INSN uses a label's address, then the loop containing
2737 that label is marked invalid, because it could be jumped into from
2740 Also look for blocks of code ending in an unconditional branch that
2741 exits the loop. If such a block is surrounded by a conditional
2742 branch around the block, move the block elsewhere (see below) and
2743 invert the jump to point to the code block. This may eliminate a
2744 label in our loop and will simplify processing by both us and a
2745 possible second cse pass. */
2747 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2750 struct loop
*this_loop
= uid_loop
[INSN_UID (insn
)];
2752 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2754 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2756 invalidate_loops_containing_label (XEXP (note
, 0));
2759 if (GET_CODE (insn
) != JUMP_INSN
)
2762 mark_loop_jump (PATTERN (insn
), this_loop
);
2764 /* See if this is an unconditional branch outside the loop. */
2766 && (GET_CODE (PATTERN (insn
)) == RETURN
2767 || (any_uncondjump_p (insn
)
2768 && onlyjump_p (insn
)
2769 && (uid_loop
[INSN_UID (JUMP_LABEL (insn
))]
2771 && get_max_uid () < max_uid_for_loop
)
2774 rtx our_next
= next_real_insn (insn
);
2775 rtx last_insn_to_move
= NEXT_INSN (insn
);
2776 struct loop
*dest_loop
;
2777 struct loop
*outer_loop
= NULL
;
2779 /* Go backwards until we reach the start of the loop, a label,
2781 for (p
= PREV_INSN (insn
);
2782 GET_CODE (p
) != CODE_LABEL
2783 && ! (GET_CODE (p
) == NOTE
2784 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2785 && GET_CODE (p
) != JUMP_INSN
;
2789 /* Check for the case where we have a jump to an inner nested
2790 loop, and do not perform the optimization in that case. */
2792 if (JUMP_LABEL (insn
))
2794 dest_loop
= uid_loop
[INSN_UID (JUMP_LABEL (insn
))];
2797 for (outer_loop
= dest_loop
; outer_loop
;
2798 outer_loop
= outer_loop
->outer
)
2799 if (outer_loop
== this_loop
)
2804 /* Make sure that the target of P is within the current loop. */
2806 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2807 && uid_loop
[INSN_UID (JUMP_LABEL (p
))] != this_loop
)
2808 outer_loop
= this_loop
;
2810 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2811 we have a block of code to try to move.
2813 We look backward and then forward from the target of INSN
2814 to find a BARRIER at the same loop depth as the target.
2815 If we find such a BARRIER, we make a new label for the start
2816 of the block, invert the jump in P and point it to that label,
2817 and move the block of code to the spot we found. */
2820 && GET_CODE (p
) == JUMP_INSN
2821 && JUMP_LABEL (p
) != 0
2822 /* Just ignore jumps to labels that were never emitted.
2823 These always indicate compilation errors. */
2824 && INSN_UID (JUMP_LABEL (p
)) != 0
2825 && any_condjump_p (p
) && onlyjump_p (p
)
2826 && next_real_insn (JUMP_LABEL (p
)) == our_next
2827 /* If it's not safe to move the sequence, then we
2829 && insns_safe_to_move_p (p
, NEXT_INSN (insn
),
2830 &last_insn_to_move
))
2833 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2834 struct loop
*target_loop
= uid_loop
[INSN_UID (target
)];
2838 /* Search for possible garbage past the conditional jumps
2839 and look for the last barrier. */
2840 for (tmp
= last_insn_to_move
;
2841 tmp
&& GET_CODE (tmp
) != CODE_LABEL
; tmp
= NEXT_INSN (tmp
))
2842 if (GET_CODE (tmp
) == BARRIER
)
2843 last_insn_to_move
= tmp
;
2845 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2846 if (GET_CODE (loc
) == BARRIER
2847 /* Don't move things inside a tablejump. */
2848 && ((loc2
= next_nonnote_insn (loc
)) == 0
2849 || GET_CODE (loc2
) != CODE_LABEL
2850 || (loc2
= next_nonnote_insn (loc2
)) == 0
2851 || GET_CODE (loc2
) != JUMP_INSN
2852 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2853 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2854 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2858 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2859 if (GET_CODE (loc
) == BARRIER
2860 /* Don't move things inside a tablejump. */
2861 && ((loc2
= next_nonnote_insn (loc
)) == 0
2862 || GET_CODE (loc2
) != CODE_LABEL
2863 || (loc2
= next_nonnote_insn (loc2
)) == 0
2864 || GET_CODE (loc2
) != JUMP_INSN
2865 || (GET_CODE (PATTERN (loc2
)) != ADDR_VEC
2866 && GET_CODE (PATTERN (loc2
)) != ADDR_DIFF_VEC
))
2867 && uid_loop
[INSN_UID (loc
)] == target_loop
)
2872 rtx cond_label
= JUMP_LABEL (p
);
2873 rtx new_label
= get_label_after (p
);
2875 /* Ensure our label doesn't go away. */
2876 LABEL_NUSES (cond_label
)++;
2878 /* Verify that uid_loop is large enough and that
2880 if (invert_jump (p
, new_label
, 1))
2884 /* If no suitable BARRIER was found, create a suitable
2885 one before TARGET. Since TARGET is a fall through
2886 path, we'll need to insert an jump around our block
2887 and add a BARRIER before TARGET.
2889 This creates an extra unconditional jump outside
2890 the loop. However, the benefits of removing rarely
2891 executed instructions from inside the loop usually
2892 outweighs the cost of the extra unconditional jump
2893 outside the loop. */
2898 temp
= gen_jump (JUMP_LABEL (insn
));
2899 temp
= emit_jump_insn_before (temp
, target
);
2900 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2901 LABEL_NUSES (JUMP_LABEL (insn
))++;
2902 loc
= emit_barrier_before (target
);
2905 /* Include the BARRIER after INSN and copy the
2907 if (squeeze_notes (&new_label
, &last_insn_to_move
))
2909 reorder_insns (new_label
, last_insn_to_move
, loc
);
2911 /* All those insns are now in TARGET_LOOP. */
2913 q
!= NEXT_INSN (last_insn_to_move
);
2915 uid_loop
[INSN_UID (q
)] = target_loop
;
2917 /* The label jumped to by INSN is no longer a loop
2918 exit. Unless INSN does not have a label (e.g.,
2919 it is a RETURN insn), search loop->exit_labels
2920 to find its label_ref, and remove it. Also turn
2921 off LABEL_OUTSIDE_LOOP_P bit. */
2922 if (JUMP_LABEL (insn
))
2924 for (q
= 0, r
= this_loop
->exit_labels
;
2926 q
= r
, r
= LABEL_NEXTREF (r
))
2927 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2929 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2931 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2933 this_loop
->exit_labels
= LABEL_NEXTREF (r
);
2937 for (loop
= this_loop
; loop
&& loop
!= target_loop
;
2941 /* If we didn't find it, then something is
2947 /* P is now a jump outside the loop, so it must be put
2948 in loop->exit_labels, and marked as such.
2949 The easiest way to do this is to just call
2950 mark_loop_jump again for P. */
2951 mark_loop_jump (PATTERN (p
), this_loop
);
2953 /* If INSN now jumps to the insn after it,
2955 if (JUMP_LABEL (insn
) != 0
2956 && (next_real_insn (JUMP_LABEL (insn
))
2957 == next_real_insn (insn
)))
2958 delete_related_insns (insn
);
2961 /* Continue the loop after where the conditional
2962 branch used to jump, since the only branch insn
2963 in the block (if it still remains) is an inter-loop
2964 branch and hence needs no processing. */
2965 insn
= NEXT_INSN (cond_label
);
2967 if (--LABEL_NUSES (cond_label
) == 0)
2968 delete_related_insns (cond_label
);
2970 /* This loop will be continued with NEXT_INSN (insn). */
2971 insn
= PREV_INSN (insn
);
2978 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2979 loops it is contained in, mark the target loop invalid.
2981 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2984 mark_loop_jump (x
, loop
)
2988 struct loop
*dest_loop
;
2989 struct loop
*outer_loop
;
2992 switch (GET_CODE (x
))
3005 /* There could be a label reference in here. */
3006 mark_loop_jump (XEXP (x
, 0), loop
);
3012 mark_loop_jump (XEXP (x
, 0), loop
);
3013 mark_loop_jump (XEXP (x
, 1), loop
);
3017 /* This may refer to a LABEL_REF or SYMBOL_REF. */
3018 mark_loop_jump (XEXP (x
, 1), loop
);
3023 mark_loop_jump (XEXP (x
, 0), loop
);
3027 dest_loop
= uid_loop
[INSN_UID (XEXP (x
, 0))];
3029 /* Link together all labels that branch outside the loop. This
3030 is used by final_[bg]iv_value and the loop unrolling code. Also
3031 mark this LABEL_REF so we know that this branch should predict
3034 /* A check to make sure the label is not in an inner nested loop,
3035 since this does not count as a loop exit. */
3038 for (outer_loop
= dest_loop
; outer_loop
;
3039 outer_loop
= outer_loop
->outer
)
3040 if (outer_loop
== loop
)
3046 if (loop
&& ! outer_loop
)
3048 LABEL_OUTSIDE_LOOP_P (x
) = 1;
3049 LABEL_NEXTREF (x
) = loop
->exit_labels
;
3050 loop
->exit_labels
= x
;
3052 for (outer_loop
= loop
;
3053 outer_loop
&& outer_loop
!= dest_loop
;
3054 outer_loop
= outer_loop
->outer
)
3055 outer_loop
->exit_count
++;
3058 /* If this is inside a loop, but not in the current loop or one enclosed
3059 by it, it invalidates at least one loop. */
3064 /* We must invalidate every nested loop containing the target of this
3065 label, except those that also contain the jump insn. */
3067 for (; dest_loop
; dest_loop
= dest_loop
->outer
)
3069 /* Stop when we reach a loop that also contains the jump insn. */
3070 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3071 if (dest_loop
== outer_loop
)
3074 /* If we get here, we know we need to invalidate a loop. */
3075 if (loop_dump_stream
&& ! dest_loop
->invalid
)
3076 fprintf (loop_dump_stream
,
3077 "\nLoop at %d ignored due to multiple entry points.\n",
3078 INSN_UID (dest_loop
->start
));
3080 dest_loop
->invalid
= 1;
3085 /* If this is not setting pc, ignore. */
3086 if (SET_DEST (x
) == pc_rtx
)
3087 mark_loop_jump (SET_SRC (x
), loop
);
3091 mark_loop_jump (XEXP (x
, 1), loop
);
3092 mark_loop_jump (XEXP (x
, 2), loop
);
3097 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
3098 mark_loop_jump (XVECEXP (x
, 0, i
), loop
);
3102 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
3103 mark_loop_jump (XVECEXP (x
, 1, i
), loop
);
3107 /* Strictly speaking this is not a jump into the loop, only a possible
3108 jump out of the loop. However, we have no way to link the destination
3109 of this jump onto the list of exit labels. To be safe we mark this
3110 loop and any containing loops as invalid. */
3113 for (outer_loop
= loop
; outer_loop
; outer_loop
= outer_loop
->outer
)
3115 if (loop_dump_stream
&& ! outer_loop
->invalid
)
3116 fprintf (loop_dump_stream
,
3117 "\nLoop at %d ignored due to unknown exit jump.\n",
3118 INSN_UID (outer_loop
->start
));
3119 outer_loop
->invalid
= 1;
3126 /* Return nonzero if there is a label in the range from
3127 insn INSN to and including the insn whose luid is END
3128 INSN must have an assigned luid (i.e., it must not have
3129 been previously created by loop.c). */
3132 labels_in_range_p (insn
, end
)
3136 while (insn
&& INSN_LUID (insn
) <= end
)
3138 if (GET_CODE (insn
) == CODE_LABEL
)
3140 insn
= NEXT_INSN (insn
);
3146 /* Record that a memory reference X is being set. */
3149 note_addr_stored (x
, y
, data
)
3151 rtx y ATTRIBUTE_UNUSED
;
3152 void *data ATTRIBUTE_UNUSED
;
3154 struct loop_info
*loop_info
= data
;
3156 if (x
== 0 || GET_CODE (x
) != MEM
)
3159 /* Count number of memory writes.
3160 This affects heuristics in strength_reduce. */
3161 loop_info
->num_mem_sets
++;
3163 /* BLKmode MEM means all memory is clobbered. */
3164 if (GET_MODE (x
) == BLKmode
)
3166 if (RTX_UNCHANGING_P (x
))
3167 loop_info
->unknown_constant_address_altered
= 1;
3169 loop_info
->unknown_address_altered
= 1;
3174 loop_info
->store_mems
= gen_rtx_EXPR_LIST (VOIDmode
, x
,
3175 loop_info
->store_mems
);
3178 /* X is a value modified by an INSN that references a biv inside a loop
3179 exit test (ie, X is somehow related to the value of the biv). If X
3180 is a pseudo that is used more than once, then the biv is (effectively)
3181 used more than once. DATA is a pointer to a loop_regs structure. */
3184 note_set_pseudo_multiple_uses (x
, y
, data
)
3186 rtx y ATTRIBUTE_UNUSED
;
3189 struct loop_regs
*regs
= (struct loop_regs
*) data
;
3194 while (GET_CODE (x
) == STRICT_LOW_PART
3195 || GET_CODE (x
) == SIGN_EXTRACT
3196 || GET_CODE (x
) == ZERO_EXTRACT
3197 || GET_CODE (x
) == SUBREG
)
3200 if (GET_CODE (x
) != REG
|| REGNO (x
) < FIRST_PSEUDO_REGISTER
)
3203 /* If we do not have usage information, or if we know the register
3204 is used more than once, note that fact for check_dbra_loop. */
3205 if (REGNO (x
) >= max_reg_before_loop
3206 || ! regs
->array
[REGNO (x
)].single_usage
3207 || regs
->array
[REGNO (x
)].single_usage
== const0_rtx
)
3208 regs
->multiple_uses
= 1;
3211 /* Return nonzero if the rtx X is invariant over the current loop.
3213 The value is 2 if we refer to something only conditionally invariant.
3215 A memory ref is invariant if it is not volatile and does not conflict
3216 with anything stored in `loop_info->store_mems'. */
3219 loop_invariant_p (loop
, x
)
3220 const struct loop
*loop
;
3223 struct loop_info
*loop_info
= LOOP_INFO (loop
);
3224 struct loop_regs
*regs
= LOOP_REGS (loop
);
3228 int conditional
= 0;
3233 code
= GET_CODE (x
);
3243 /* A LABEL_REF is normally invariant, however, if we are unrolling
3244 loops, and this label is inside the loop, then it isn't invariant.
3245 This is because each unrolled copy of the loop body will have
3246 a copy of this label. If this was invariant, then an insn loading
3247 the address of this label into a register might get moved outside
3248 the loop, and then each loop body would end up using the same label.
3250 We don't know the loop bounds here though, so just fail for all
3252 if (flag_unroll_loops
)
3259 case UNSPEC_VOLATILE
:
3263 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3264 since the reg might be set by initialization within the loop. */
3266 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
3267 || x
== arg_pointer_rtx
|| x
== pic_offset_table_rtx
)
3268 && ! current_function_has_nonlocal_goto
)
3271 if (LOOP_INFO (loop
)->has_call
3272 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
3275 if (regs
->array
[REGNO (x
)].set_in_loop
< 0)
3278 return regs
->array
[REGNO (x
)].set_in_loop
== 0;
3281 /* Volatile memory references must be rejected. Do this before
3282 checking for read-only items, so that volatile read-only items
3283 will be rejected also. */
3284 if (MEM_VOLATILE_P (x
))
3287 /* See if there is any dependence between a store and this load. */
3288 mem_list_entry
= loop_info
->store_mems
;
3289 while (mem_list_entry
)
3291 if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
3295 mem_list_entry
= XEXP (mem_list_entry
, 1);
3298 /* It's not invalidated by a store in memory
3299 but we must still verify the address is invariant. */
3303 /* Don't mess with insns declared volatile. */
3304 if (MEM_VOLATILE_P (x
))
3312 fmt
= GET_RTX_FORMAT (code
);
3313 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3317 int tem
= loop_invariant_p (loop
, XEXP (x
, i
));
3323 else if (fmt
[i
] == 'E')
3326 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3328 int tem
= loop_invariant_p (loop
, XVECEXP (x
, i
, j
));
3338 return 1 + conditional
;
3341 /* Return nonzero if all the insns in the loop that set REG
3342 are INSN and the immediately following insns,
3343 and if each of those insns sets REG in an invariant way
3344 (not counting uses of REG in them).
3346 The value is 2 if some of these insns are only conditionally invariant.
3348 We assume that INSN itself is the first set of REG
3349 and that its source is invariant. */
3352 consec_sets_invariant_p (loop
, reg
, n_sets
, insn
)
3353 const struct loop
*loop
;
3357 struct loop_regs
*regs
= LOOP_REGS (loop
);
3359 unsigned int regno
= REGNO (reg
);
3361 /* Number of sets we have to insist on finding after INSN. */
3362 int count
= n_sets
- 1;
3363 int old
= regs
->array
[regno
].set_in_loop
;
3367 /* If N_SETS hit the limit, we can't rely on its value. */
3371 regs
->array
[regno
].set_in_loop
= 0;
3379 code
= GET_CODE (p
);
3381 /* If library call, skip to end of it. */
3382 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3387 && (set
= single_set (p
))
3388 && GET_CODE (SET_DEST (set
)) == REG
3389 && REGNO (SET_DEST (set
)) == regno
)
3391 this = loop_invariant_p (loop
, SET_SRC (set
));
3394 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3396 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3397 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3399 this = (CONSTANT_P (XEXP (temp
, 0))
3400 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3401 && loop_invariant_p (loop
, XEXP (temp
, 0))));
3408 else if (code
!= NOTE
)
3410 regs
->array
[regno
].set_in_loop
= old
;
3415 regs
->array
[regno
].set_in_loop
= old
;
3416 /* If loop_invariant_p ever returned 2, we return 2. */
3417 return 1 + (value
& 2);
3421 /* I don't think this condition is sufficient to allow INSN
3422 to be moved, so we no longer test it. */
3424 /* Return 1 if all insns in the basic block of INSN and following INSN
3425 that set REG are invariant according to TABLE. */
3428 all_sets_invariant_p (reg
, insn
, table
)
3433 int regno
= REGNO (reg
);
3439 code
= GET_CODE (p
);
3440 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3442 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3443 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3444 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3446 if (! loop_invariant_p (loop
, SET_SRC (PATTERN (p
)), table
))
3453 /* Look at all uses (not sets) of registers in X. For each, if it is
3454 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3455 a different insn, set USAGE[REGNO] to const0_rtx. */
3458 find_single_use_in_loop (regs
, insn
, x
)
3459 struct loop_regs
*regs
;
3463 enum rtx_code code
= GET_CODE (x
);
3464 const char *fmt
= GET_RTX_FORMAT (code
);
3468 regs
->array
[REGNO (x
)].single_usage
3469 = (regs
->array
[REGNO (x
)].single_usage
!= 0
3470 && regs
->array
[REGNO (x
)].single_usage
!= insn
)
3471 ? const0_rtx
: insn
;
3473 else if (code
== SET
)
3475 /* Don't count SET_DEST if it is a REG; otherwise count things
3476 in SET_DEST because if a register is partially modified, it won't
3477 show up as a potential movable so we don't care how USAGE is set
3479 if (GET_CODE (SET_DEST (x
)) != REG
)
3480 find_single_use_in_loop (regs
, insn
, SET_DEST (x
));
3481 find_single_use_in_loop (regs
, insn
, SET_SRC (x
));
3484 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3486 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3487 find_single_use_in_loop (regs
, insn
, XEXP (x
, i
));
3488 else if (fmt
[i
] == 'E')
3489 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3490 find_single_use_in_loop (regs
, insn
, XVECEXP (x
, i
, j
));
3494 /* Count and record any set in X which is contained in INSN. Update
3495 REGS->array[I].MAY_NOT_OPTIMIZE and LAST_SET for any register I set
3499 count_one_set (regs
, insn
, x
, last_set
)
3500 struct loop_regs
*regs
;
3504 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3505 /* Don't move a reg that has an explicit clobber.
3506 It's not worth the pain to try to do it correctly. */
3507 regs
->array
[REGNO (XEXP (x
, 0))].may_not_optimize
= 1;
3509 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3511 rtx dest
= SET_DEST (x
);
3512 while (GET_CODE (dest
) == SUBREG
3513 || GET_CODE (dest
) == ZERO_EXTRACT
3514 || GET_CODE (dest
) == SIGN_EXTRACT
3515 || GET_CODE (dest
) == STRICT_LOW_PART
)
3516 dest
= XEXP (dest
, 0);
3517 if (GET_CODE (dest
) == REG
)
3520 int regno
= REGNO (dest
);
3521 for (i
= 0; i
< (int) LOOP_REGNO_NREGS (regno
, dest
); i
++)
3523 /* If this is the first setting of this reg
3524 in current basic block, and it was set before,
3525 it must be set in two basic blocks, so it cannot
3526 be moved out of the loop. */
3527 if (regs
->array
[regno
].set_in_loop
> 0
3529 regs
->array
[regno
+i
].may_not_optimize
= 1;
3530 /* If this is not first setting in current basic block,
3531 see if reg was used in between previous one and this.
3532 If so, neither one can be moved. */
3533 if (last_set
[regno
] != 0
3534 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3535 regs
->array
[regno
+i
].may_not_optimize
= 1;
3536 if (regs
->array
[regno
+i
].set_in_loop
< 127)
3537 ++regs
->array
[regno
+i
].set_in_loop
;
3538 last_set
[regno
+i
] = insn
;
3544 /* Given a loop that is bounded by LOOP->START and LOOP->END and that
3545 is entered at LOOP->SCAN_START, return 1 if the register set in SET
3546 contained in insn INSN is used by any insn that precedes INSN in
3547 cyclic order starting from the loop entry point.
3549 We don't want to use INSN_LUID here because if we restrict INSN to those
3550 that have a valid INSN_LUID, it means we cannot move an invariant out
3551 from an inner loop past two loops. */
3554 loop_reg_used_before_p (loop
, set
, insn
)
3555 const struct loop
*loop
;
3558 rtx reg
= SET_DEST (set
);
3561 /* Scan forward checking for register usage. If we hit INSN, we
3562 are done. Otherwise, if we hit LOOP->END, wrap around to LOOP->START. */
3563 for (p
= loop
->scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3565 if (INSN_P (p
) && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3576 /* Information we collect about arrays that we might want to prefetch. */
3577 struct prefetch_info
3579 struct iv_class
*class; /* Class this prefetch is based on. */
3580 struct induction
*giv
; /* GIV this prefetch is based on. */
3581 rtx base_address
; /* Start prefetching from this address plus
3583 HOST_WIDE_INT index
;
3584 HOST_WIDE_INT stride
; /* Prefetch stride in bytes in each
3586 unsigned int bytes_accessed
; /* Sum of sizes of all accesses to this
3587 prefetch area in one iteration. */
3588 unsigned int total_bytes
; /* Total bytes loop will access in this block.
3589 This is set only for loops with known
3590 iteration counts and is 0xffffffff
3592 int prefetch_in_loop
; /* Number of prefetch insns in loop. */
3593 int prefetch_before_loop
; /* Number of prefetch insns before loop. */
3594 unsigned int write
: 1; /* 1 for read/write prefetches. */
3597 /* Data used by check_store function. */
3598 struct check_store_data
3604 static void check_store
PARAMS ((rtx
, rtx
, void *));
3605 static void emit_prefetch_instructions
PARAMS ((struct loop
*));
3606 static int rtx_equal_for_prefetch_p
PARAMS ((rtx
, rtx
));
3608 /* Set mem_write when mem_address is found. Used as callback to
3611 check_store (x
, pat
, data
)
3612 rtx x
, pat ATTRIBUTE_UNUSED
;
3615 struct check_store_data
*d
= (struct check_store_data
*) data
;
3617 if ((GET_CODE (x
) == MEM
) && rtx_equal_p (d
->mem_address
, XEXP (x
, 0)))
3621 /* Like rtx_equal_p, but attempts to swap commutative operands. This is
3622 important to get some addresses combined. Later more sophisticated
3623 transformations can be added when necesary.
3625 ??? Same trick with swapping operand is done at several other places.
3626 It can be nice to develop some common way to handle this. */
3629 rtx_equal_for_prefetch_p (x
, y
)
3634 enum rtx_code code
= GET_CODE (x
);
3639 if (code
!= GET_CODE (y
))
3642 code
= GET_CODE (x
);
3644 if (GET_RTX_CLASS (code
) == 'c')
3646 return ((rtx_equal_for_prefetch_p (XEXP (x
, 0), XEXP (y
, 0))
3647 && rtx_equal_for_prefetch_p (XEXP (x
, 1), XEXP (y
, 1)))
3648 || (rtx_equal_for_prefetch_p (XEXP (x
, 0), XEXP (y
, 1))
3649 && rtx_equal_for_prefetch_p (XEXP (x
, 1), XEXP (y
, 0))));
3651 /* Compare the elements. If any pair of corresponding elements fails to
3652 match, return 0 for the whole thing. */
3654 fmt
= GET_RTX_FORMAT (code
);
3655 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3660 if (XWINT (x
, i
) != XWINT (y
, i
))
3665 if (XINT (x
, i
) != XINT (y
, i
))
3670 /* Two vectors must have the same length. */
3671 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
3674 /* And the corresponding elements must match. */
3675 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3676 if (rtx_equal_for_prefetch_p (XVECEXP (x
, i
, j
),
3677 XVECEXP (y
, i
, j
)) == 0)
3682 if (rtx_equal_for_prefetch_p (XEXP (x
, i
), XEXP (y
, i
)) == 0)
3687 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
3692 /* These are just backpointers, so they don't matter. */
3698 /* It is believed that rtx's at this level will never
3699 contain anything but integers and other rtx's,
3700 except for within LABEL_REFs and SYMBOL_REFs. */
3708 /* Remove constant addition value from the expression X (when present)
3711 static HOST_WIDE_INT
3712 remove_constant_addition (x
)
3715 HOST_WIDE_INT addval
= 0;
3718 /* Avoid clobbering a shared CONST expression. */
3719 if (GET_CODE (exp
) == CONST
)
3721 if (GET_CODE (XEXP (exp
, 0)) == PLUS
3722 && GET_CODE (XEXP (XEXP (exp
, 0), 0)) == SYMBOL_REF
3723 && GET_CODE (XEXP (XEXP (exp
, 0), 1)) == CONST_INT
)
3725 *x
= XEXP (XEXP (exp
, 0), 0);
3726 return INTVAL (XEXP (XEXP (exp
, 0), 1));
3731 if (GET_CODE (exp
) == CONST_INT
)
3733 addval
= INTVAL (exp
);
3737 /* For plus expression recurse on ourself. */
3738 else if (GET_CODE (exp
) == PLUS
)
3740 addval
+= remove_constant_addition (&XEXP (exp
, 0));
3741 addval
+= remove_constant_addition (&XEXP (exp
, 1));
3743 /* In case our parameter was constant, remove extra zero from the
3745 if (XEXP (exp
, 0) == const0_rtx
)
3747 else if (XEXP (exp
, 1) == const0_rtx
)
3754 /* Attempt to identify accesses to arrays that are most likely to cause cache
3755 misses, and emit prefetch instructions a few prefetch blocks forward.
3757 To detect the arrays we use the GIV information that was collected by the
3758 strength reduction pass.
3760 The prefetch instructions are generated after the GIV information is done
3761 and before the strength reduction process. The new GIVs are injected into
3762 the strength reduction tables, so the prefetch addresses are optimized as
3765 GIVs are split into base address, stride, and constant addition values.
3766 GIVs with the same address, stride and close addition values are combined
3767 into a single prefetch. Also writes to GIVs are detected, so that prefetch
3768 for write instructions can be used for the block we write to, on machines
3769 that support write prefetches.
3771 Several heuristics are used to determine when to prefetch. They are
3772 controlled by defined symbols that can be overridden for each target. */
3775 emit_prefetch_instructions (loop
)
3778 int num_prefetches
= 0;
3779 int num_real_prefetches
= 0;
3780 int num_real_write_prefetches
= 0;
3781 int num_prefetches_before
= 0;
3782 int num_write_prefetches_before
= 0;
3785 struct iv_class
*bl
;
3786 struct induction
*iv
;
3787 struct prefetch_info info
[MAX_PREFETCHES
];
3788 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
3793 /* Consider only loops w/o calls. When a call is done, the loop is probably
3794 slow enough to read the memory. */
3795 if (PREFETCH_NO_CALL
&& LOOP_INFO (loop
)->has_call
)
3797 if (loop_dump_stream
)
3798 fprintf (loop_dump_stream
, "Prefetch: ignoring loop: has call.\n");
3803 /* Don't prefetch in loops known to have few iterations. */
3804 if (PREFETCH_NO_LOW_LOOPCNT
3805 && LOOP_INFO (loop
)->n_iterations
3806 && LOOP_INFO (loop
)->n_iterations
<= PREFETCH_LOW_LOOPCNT
)
3808 if (loop_dump_stream
)
3809 fprintf (loop_dump_stream
,
3810 "Prefetch: ignoring loop: not enough iterations.\n");
3814 /* Search all induction variables and pick those interesting for the prefetch
3816 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
3818 struct induction
*biv
= bl
->biv
, *biv1
;
3823 /* Expect all BIVs to be executed in each iteration. This makes our
3824 analysis more conservative. */
3827 /* Discard non-constant additions that we can't handle well yet, and
3828 BIVs that are executed multiple times; such BIVs ought to be
3829 handled in the nested loop. We accept not_every_iteration BIVs,
3830 since these only result in larger strides and make our
3831 heuristics more conservative. */
3832 if (GET_CODE (biv
->add_val
) != CONST_INT
)
3834 if (loop_dump_stream
)
3836 fprintf (loop_dump_stream
,
3837 "Prefetch: ignoring biv %d: non-constant addition at insn %d:",
3838 REGNO (biv
->src_reg
), INSN_UID (biv
->insn
));
3839 print_rtl (loop_dump_stream
, biv
->add_val
);
3840 fprintf (loop_dump_stream
, "\n");
3845 if (biv
->maybe_multiple
)
3847 if (loop_dump_stream
)
3849 fprintf (loop_dump_stream
,
3850 "Prefetch: ignoring biv %d: maybe_multiple at insn %i:",
3851 REGNO (biv
->src_reg
), INSN_UID (biv
->insn
));
3852 print_rtl (loop_dump_stream
, biv
->add_val
);
3853 fprintf (loop_dump_stream
, "\n");
3858 basestride
+= INTVAL (biv1
->add_val
);
3859 biv1
= biv1
->next_iv
;
3862 if (biv1
|| !basestride
)
3865 for (iv
= bl
->giv
; iv
; iv
= iv
->next_iv
)
3869 HOST_WIDE_INT index
= 0;
3871 HOST_WIDE_INT stride
= 0;
3872 int stride_sign
= 1;
3873 struct check_store_data d
;
3874 const char *ignore_reason
= NULL
;
3875 int size
= GET_MODE_SIZE (GET_MODE (iv
));
3877 /* See whether an induction variable is interesting to us and if
3878 not, report the reason. */
3879 if (iv
->giv_type
!= DEST_ADDR
)
3880 ignore_reason
= "giv is not a destination address";
3882 /* We are interested only in constant stride memory references
3883 in order to be able to compute density easily. */
3884 else if (GET_CODE (iv
->mult_val
) != CONST_INT
)
3885 ignore_reason
= "stride is not constant";
3889 stride
= INTVAL (iv
->mult_val
) * basestride
;
3896 /* On some targets, reversed order prefetches are not
3898 if (PREFETCH_NO_REVERSE_ORDER
&& stride_sign
< 0)
3899 ignore_reason
= "reversed order stride";
3901 /* Prefetch of accesses with an extreme stride might not be
3902 worthwhile, either. */
3903 else if (PREFETCH_NO_EXTREME_STRIDE
3904 && stride
> PREFETCH_EXTREME_STRIDE
)
3905 ignore_reason
= "extreme stride";
3907 /* Ignore GIVs with varying add values; we can't predict the
3908 value for the next iteration. */
3909 else if (!loop_invariant_p (loop
, iv
->add_val
))
3910 ignore_reason
= "giv has varying add value";
3912 /* Ignore GIVs in the nested loops; they ought to have been
3914 else if (iv
->maybe_multiple
)
3915 ignore_reason
= "giv is in nested loop";
3918 if (ignore_reason
!= NULL
)
3920 if (loop_dump_stream
)
3921 fprintf (loop_dump_stream
,
3922 "Prefetch: ignoring giv at %d: %s.\n",
3923 INSN_UID (iv
->insn
), ignore_reason
);
3927 /* Determine the pointer to the basic array we are examining. It is
3928 the sum of the BIV's initial value and the GIV's add_val. */
3929 address
= copy_rtx (iv
->add_val
);
3930 temp
= copy_rtx (bl
->initial_value
);
3932 address
= simplify_gen_binary (PLUS
, Pmode
, temp
, address
);
3933 index
= remove_constant_addition (&address
);
3936 d
.mem_address
= *iv
->location
;
3938 /* When the GIV is not always executed, we might be better off by
3939 not dirtying the cache pages. */
3940 if (PREFETCH_CONDITIONAL
|| iv
->always_executed
)
3941 note_stores (PATTERN (iv
->insn
), check_store
, &d
);
3944 if (loop_dump_stream
)
3945 fprintf (loop_dump_stream
, "Prefetch: Ignoring giv at %d: %s\n",
3946 INSN_UID (iv
->insn
), "in conditional code.");
3950 /* Attempt to find another prefetch to the same array and see if we
3951 can merge this one. */
3952 for (i
= 0; i
< num_prefetches
; i
++)
3953 if (rtx_equal_for_prefetch_p (address
, info
[i
].base_address
)
3954 && stride
== info
[i
].stride
)
3956 /* In case both access same array (same location
3957 just with small difference in constant indexes), merge
3958 the prefetches. Just do the later and the earlier will
3959 get prefetched from previous iteration.
3960 The artificial threshold should not be too small,
3961 but also not bigger than small portion of memory usually
3962 traversed by single loop. */
3963 if (index
>= info
[i
].index
3964 && index
- info
[i
].index
< PREFETCH_EXTREME_DIFFERENCE
)
3966 info
[i
].write
|= d
.mem_write
;
3967 info
[i
].bytes_accessed
+= size
;
3968 info
[i
].index
= index
;
3971 info
[num_prefetches
].base_address
= address
;
3976 if (index
< info
[i
].index
3977 && info
[i
].index
- index
< PREFETCH_EXTREME_DIFFERENCE
)
3979 info
[i
].write
|= d
.mem_write
;
3980 info
[i
].bytes_accessed
+= size
;
3986 /* Merging failed. */
3989 info
[num_prefetches
].giv
= iv
;
3990 info
[num_prefetches
].class = bl
;
3991 info
[num_prefetches
].index
= index
;
3992 info
[num_prefetches
].stride
= stride
;
3993 info
[num_prefetches
].base_address
= address
;
3994 info
[num_prefetches
].write
= d
.mem_write
;
3995 info
[num_prefetches
].bytes_accessed
= size
;
3997 if (num_prefetches
>= MAX_PREFETCHES
)
3999 if (loop_dump_stream
)
4000 fprintf (loop_dump_stream
,
4001 "Maximal number of prefetches exceeded.\n");
4008 for (i
= 0; i
< num_prefetches
; i
++)
4012 /* Attempt to calculate the total number of bytes fetched by all
4013 iterations of the loop. Avoid overflow. */
4014 if (LOOP_INFO (loop
)->n_iterations
4015 && ((unsigned HOST_WIDE_INT
) (0xffffffff / info
[i
].stride
)
4016 >= LOOP_INFO (loop
)->n_iterations
))
4017 info
[i
].total_bytes
= info
[i
].stride
* LOOP_INFO (loop
)->n_iterations
;
4019 info
[i
].total_bytes
= 0xffffffff;
4021 density
= info
[i
].bytes_accessed
* 100 / info
[i
].stride
;
4023 /* Prefetch might be worthwhile only when the loads/stores are dense. */
4024 if (PREFETCH_ONLY_DENSE_MEM
)
4025 if (density
* 256 > PREFETCH_DENSE_MEM
* 100
4026 && (info
[i
].total_bytes
/ PREFETCH_BLOCK
4027 >= PREFETCH_BLOCKS_BEFORE_LOOP_MIN
))
4029 info
[i
].prefetch_before_loop
= 1;
4030 info
[i
].prefetch_in_loop
4031 = (info
[i
].total_bytes
/ PREFETCH_BLOCK
4032 > PREFETCH_BLOCKS_BEFORE_LOOP_MAX
);
4036 info
[i
].prefetch_in_loop
= 0, info
[i
].prefetch_before_loop
= 0;
4037 if (loop_dump_stream
)
4038 fprintf (loop_dump_stream
,
4039 "Prefetch: ignoring giv at %d: %d%% density is too low.\n",
4040 INSN_UID (info
[i
].giv
->insn
), density
);
4043 info
[i
].prefetch_in_loop
= 1, info
[i
].prefetch_before_loop
= 1;
4045 /* Find how many prefetch instructions we'll use within the loop. */
4046 if (info
[i
].prefetch_in_loop
!= 0)
4048 info
[i
].prefetch_in_loop
= ((info
[i
].stride
+ PREFETCH_BLOCK
- 1)
4050 num_real_prefetches
+= info
[i
].prefetch_in_loop
;
4052 num_real_write_prefetches
+= info
[i
].prefetch_in_loop
;
4056 /* Determine how many iterations ahead to prefetch within the loop, based
4057 on how many prefetches we currently expect to do within the loop. */
4058 if (num_real_prefetches
!= 0)
4060 if ((ahead
= SIMULTANEOUS_PREFETCHES
/ num_real_prefetches
) == 0)
4062 if (loop_dump_stream
)
4063 fprintf (loop_dump_stream
,
4064 "Prefetch: ignoring prefetches within loop: ahead is zero; %d < %d\n",
4065 SIMULTANEOUS_PREFETCHES
, num_real_prefetches
);
4066 num_real_prefetches
= 0, num_real_write_prefetches
= 0;
4069 /* We'll also use AHEAD to determine how many prefetch instructions to
4070 emit before a loop, so don't leave it zero. */
4072 ahead
= PREFETCH_BLOCKS_BEFORE_LOOP_MAX
;
4074 for (i
= 0; i
< num_prefetches
; i
++)
4076 /* Update if we've decided not to prefetch anything within the loop. */
4077 if (num_real_prefetches
== 0)
4078 info
[i
].prefetch_in_loop
= 0;
4080 /* Find how many prefetch instructions we'll use before the loop. */
4081 if (info
[i
].prefetch_before_loop
!= 0)
4083 int n
= info
[i
].total_bytes
/ PREFETCH_BLOCK
;
4086 info
[i
].prefetch_before_loop
= n
;
4087 num_prefetches_before
+= n
;
4089 num_write_prefetches_before
+= n
;
4092 if (loop_dump_stream
)
4094 if (info
[i
].prefetch_in_loop
== 0
4095 && info
[i
].prefetch_before_loop
== 0)
4097 fprintf (loop_dump_stream
, "Prefetch insn: %d",
4098 INSN_UID (info
[i
].giv
->insn
));
4099 fprintf (loop_dump_stream
,
4100 "; in loop: %d; before: %d; %s\n",
4101 info
[i
].prefetch_in_loop
,
4102 info
[i
].prefetch_before_loop
,
4103 info
[i
].write
? "read/write" : "read only");
4104 fprintf (loop_dump_stream
,
4105 " density: %d%%; bytes_accessed: %u; total_bytes: %u\n",
4106 (int) (info
[i
].bytes_accessed
* 100 / info
[i
].stride
),
4107 info
[i
].bytes_accessed
, info
[i
].total_bytes
);
4108 fprintf (loop_dump_stream
, " index: ");
4109 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, info
[i
].index
);
4110 fprintf (loop_dump_stream
, "; stride: ");
4111 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, info
[i
].stride
);
4112 fprintf (loop_dump_stream
, "; address: ");
4113 print_rtl (loop_dump_stream
, info
[i
].base_address
);
4114 fprintf (loop_dump_stream
, "\n");
4118 if (num_real_prefetches
+ num_prefetches_before
> 0)
4120 /* Record that this loop uses prefetch instructions. */
4121 LOOP_INFO (loop
)->has_prefetch
= 1;
4123 if (loop_dump_stream
)
4125 fprintf (loop_dump_stream
, "Real prefetches needed within loop: %d (write: %d)\n",
4126 num_real_prefetches
, num_real_write_prefetches
);
4127 fprintf (loop_dump_stream
, "Real prefetches needed before loop: %d (write: %d)\n",
4128 num_prefetches_before
, num_write_prefetches_before
);
4132 for (i
= 0; i
< num_prefetches
; i
++)
4136 for (y
= 0; y
< info
[i
].prefetch_in_loop
; y
++)
4138 rtx loc
= copy_rtx (*info
[i
].giv
->location
);
4140 int bytes_ahead
= PREFETCH_BLOCK
* (ahead
+ y
);
4141 rtx before_insn
= info
[i
].giv
->insn
;
4142 rtx prev_insn
= PREV_INSN (info
[i
].giv
->insn
);
4145 /* We can save some effort by offsetting the address on
4146 architectures with offsettable memory references. */
4147 if (offsettable_address_p (0, VOIDmode
, loc
))
4148 loc
= plus_constant (loc
, bytes_ahead
);
4151 rtx reg
= gen_reg_rtx (Pmode
);
4152 loop_iv_add_mult_emit_before (loop
, loc
, const1_rtx
,
4153 GEN_INT (bytes_ahead
), reg
,
4159 /* Make sure the address operand is valid for prefetch. */
4160 if (! (*insn_data
[(int)CODE_FOR_prefetch
].operand
[0].predicate
)
4161 (loc
, insn_data
[(int)CODE_FOR_prefetch
].operand
[0].mode
))
4162 loc
= force_reg (Pmode
, loc
);
4163 emit_insn (gen_prefetch (loc
, GEN_INT (info
[i
].write
),
4167 emit_insn_before (seq
, before_insn
);
4169 /* Check all insns emitted and record the new GIV
4171 insn
= NEXT_INSN (prev_insn
);
4172 while (insn
!= before_insn
)
4174 insn
= check_insn_for_givs (loop
, insn
,
4175 info
[i
].giv
->always_executed
,
4176 info
[i
].giv
->maybe_multiple
);
4177 insn
= NEXT_INSN (insn
);
4181 if (PREFETCH_BEFORE_LOOP
)
4183 /* Emit insns before the loop to fetch the first cache lines or,
4184 if we're not prefetching within the loop, everything we expect
4186 for (y
= 0; y
< info
[i
].prefetch_before_loop
; y
++)
4188 rtx reg
= gen_reg_rtx (Pmode
);
4189 rtx loop_start
= loop
->start
;
4190 rtx init_val
= info
[i
].class->initial_value
;
4191 rtx add_val
= simplify_gen_binary (PLUS
, Pmode
,
4192 info
[i
].giv
->add_val
,
4193 GEN_INT (y
* PREFETCH_BLOCK
));
4195 /* Functions called by LOOP_IV_ADD_EMIT_BEFORE expect a
4196 non-constant INIT_VAL to have the same mode as REG, which
4197 in this case we know to be Pmode. */
4198 if (GET_MODE (init_val
) != Pmode
&& !CONSTANT_P (init_val
))
4199 init_val
= convert_to_mode (Pmode
, init_val
, 0);
4200 loop_iv_add_mult_emit_before (loop
, init_val
,
4201 info
[i
].giv
->mult_val
,
4202 add_val
, reg
, 0, loop_start
);
4203 emit_insn_before (gen_prefetch (reg
, GEN_INT (info
[i
].write
),
4213 /* A "basic induction variable" or biv is a pseudo reg that is set
4214 (within this loop) only by incrementing or decrementing it. */
4215 /* A "general induction variable" or giv is a pseudo reg whose
4216 value is a linear function of a biv. */
4218 /* Bivs are recognized by `basic_induction_var';
4219 Givs by `general_induction_var'. */
4221 /* Communication with routines called via `note_stores'. */
4223 static rtx note_insn
;
4225 /* Dummy register to have nonzero DEST_REG for DEST_ADDR type givs. */
4227 static rtx addr_placeholder
;
4229 /* ??? Unfinished optimizations, and possible future optimizations,
4230 for the strength reduction code. */
4232 /* ??? The interaction of biv elimination, and recognition of 'constant'
4233 bivs, may cause problems. */
4235 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
4236 performance problems.
4238 Perhaps don't eliminate things that can be combined with an addressing
4239 mode. Find all givs that have the same biv, mult_val, and add_val;
4240 then for each giv, check to see if its only use dies in a following
4241 memory address. If so, generate a new memory address and check to see
4242 if it is valid. If it is valid, then store the modified memory address,
4243 otherwise, mark the giv as not done so that it will get its own iv. */
4245 /* ??? Could try to optimize branches when it is known that a biv is always
4248 /* ??? When replace a biv in a compare insn, we should replace with closest
4249 giv so that an optimized branch can still be recognized by the combiner,
4250 e.g. the VAX acb insn. */
4252 /* ??? Many of the checks involving uid_luid could be simplified if regscan
4253 was rerun in loop_optimize whenever a register was added or moved.
4254 Also, some of the optimizations could be a little less conservative. */
4256 /* Scan the loop body and call FNCALL for each insn. In the addition to the
4257 LOOP and INSN parameters pass MAYBE_MULTIPLE and NOT_EVERY_ITERATION to the
4260 NOT_EVERY_ITERATION is 1 if current insn is not known to be executed at
4261 least once for every loop iteration except for the last one.
4263 MAYBE_MULTIPLE is 1 if current insn may be executed more than once for every
4267 for_each_insn_in_loop (loop
, fncall
)
4269 loop_insn_callback fncall
;
4271 int not_every_iteration
= 0;
4272 int maybe_multiple
= 0;
4273 int past_loop_latch
= 0;
4277 /* If loop_scan_start points to the loop exit test, we have to be wary of
4278 subversive use of gotos inside expression statements. */
4279 if (prev_nonnote_insn (loop
->scan_start
) != prev_nonnote_insn (loop
->start
))
4280 maybe_multiple
= back_branch_in_range_p (loop
, loop
->scan_start
);
4282 /* Scan through loop and update NOT_EVERY_ITERATION and MAYBE_MULTIPLE. */
4283 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
4285 p
= next_insn_in_loop (loop
, p
))
4287 p
= fncall (loop
, p
, not_every_iteration
, maybe_multiple
);
4289 /* Past CODE_LABEL, we get to insns that may be executed multiple
4290 times. The only way we can be sure that they can't is if every
4291 jump insn between here and the end of the loop either
4292 returns, exits the loop, is a jump to a location that is still
4293 behind the label, or is a jump to the loop start. */
4295 if (GET_CODE (p
) == CODE_LABEL
)
4303 insn
= NEXT_INSN (insn
);
4304 if (insn
== loop
->scan_start
)
4306 if (insn
== loop
->end
)
4312 if (insn
== loop
->scan_start
)
4316 if (GET_CODE (insn
) == JUMP_INSN
4317 && GET_CODE (PATTERN (insn
)) != RETURN
4318 && (!any_condjump_p (insn
)
4319 || (JUMP_LABEL (insn
) != 0
4320 && JUMP_LABEL (insn
) != loop
->scan_start
4321 && !loop_insn_first_p (p
, JUMP_LABEL (insn
)))))
4329 /* Past a jump, we get to insns for which we can't count
4330 on whether they will be executed during each iteration. */
4331 /* This code appears twice in strength_reduce. There is also similar
4332 code in scan_loop. */
4333 if (GET_CODE (p
) == JUMP_INSN
4334 /* If we enter the loop in the middle, and scan around to the
4335 beginning, don't set not_every_iteration for that.
4336 This can be any kind of jump, since we want to know if insns
4337 will be executed if the loop is executed. */
4338 && !(JUMP_LABEL (p
) == loop
->top
4339 && ((NEXT_INSN (NEXT_INSN (p
)) == loop
->end
4340 && any_uncondjump_p (p
))
4341 || (NEXT_INSN (p
) == loop
->end
&& any_condjump_p (p
)))))
4345 /* If this is a jump outside the loop, then it also doesn't
4346 matter. Check to see if the target of this branch is on the
4347 loop->exits_labels list. */
4349 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
4350 if (XEXP (label
, 0) == JUMP_LABEL (p
))
4354 not_every_iteration
= 1;
4357 else if (GET_CODE (p
) == NOTE
)
4359 /* At the virtual top of a converted loop, insns are again known to
4360 be executed each iteration: logically, the loop begins here
4361 even though the exit code has been duplicated.
4363 Insns are also again known to be executed each iteration at
4364 the LOOP_CONT note. */
4365 if ((NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
4366 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_CONT
)
4368 not_every_iteration
= 0;
4369 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
4371 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
4375 /* Note if we pass a loop latch. If we do, then we can not clear
4376 NOT_EVERY_ITERATION below when we pass the last CODE_LABEL in
4377 a loop since a jump before the last CODE_LABEL may have started
4378 a new loop iteration.
4380 Note that LOOP_TOP is only set for rotated loops and we need
4381 this check for all loops, so compare against the CODE_LABEL
4382 which immediately follows LOOP_START. */
4383 if (GET_CODE (p
) == JUMP_INSN
4384 && JUMP_LABEL (p
) == NEXT_INSN (loop
->start
))
4385 past_loop_latch
= 1;
4387 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4388 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4389 or not an insn is known to be executed each iteration of the
4390 loop, whether or not any iterations are known to occur.
4392 Therefore, if we have just passed a label and have no more labels
4393 between here and the test insn of the loop, and we have not passed
4394 a jump to the top of the loop, then we know these insns will be
4395 executed each iteration. */
4397 if (not_every_iteration
4399 && GET_CODE (p
) == CODE_LABEL
4400 && no_labels_between_p (p
, loop
->end
)
4401 && loop_insn_first_p (p
, loop
->cont
))
4402 not_every_iteration
= 0;
4407 loop_bivs_find (loop
)
4410 struct loop_regs
*regs
= LOOP_REGS (loop
);
4411 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4412 /* Temporary list pointers for traversing ivs->list. */
4413 struct iv_class
*bl
, **backbl
;
4417 for_each_insn_in_loop (loop
, check_insn_for_bivs
);
4419 /* Scan ivs->list to remove all regs that proved not to be bivs.
4420 Make a sanity check against regs->n_times_set. */
4421 for (backbl
= &ivs
->list
, bl
= *backbl
; bl
; bl
= bl
->next
)
4423 if (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
4424 /* Above happens if register modified by subreg, etc. */
4425 /* Make sure it is not recognized as a basic induction var: */
4426 || regs
->array
[bl
->regno
].n_times_set
!= bl
->biv_count
4427 /* If never incremented, it is invariant that we decided not to
4428 move. So leave it alone. */
4429 || ! bl
->incremented
)
4431 if (loop_dump_stream
)
4432 fprintf (loop_dump_stream
, "Biv %d: discarded, %s\n",
4434 (REG_IV_TYPE (ivs
, bl
->regno
) != BASIC_INDUCT
4435 ? "not induction variable"
4436 : (! bl
->incremented
? "never incremented"
4439 REG_IV_TYPE (ivs
, bl
->regno
) = NOT_BASIC_INDUCT
;
4446 if (loop_dump_stream
)
4447 fprintf (loop_dump_stream
, "Biv %d: verified\n", bl
->regno
);
4453 /* Determine how BIVS are initialized by looking through pre-header
4454 extended basic block. */
4456 loop_bivs_init_find (loop
)
4459 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4460 /* Temporary list pointers for traversing ivs->list. */
4461 struct iv_class
*bl
;
4465 /* Find initial value for each biv by searching backwards from loop_start,
4466 halting at first label. Also record any test condition. */
4469 for (p
= loop
->start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
4475 if (GET_CODE (p
) == CALL_INSN
)
4479 note_stores (PATTERN (p
), record_initial
, ivs
);
4481 /* Record any test of a biv that branches around the loop if no store
4482 between it and the start of loop. We only care about tests with
4483 constants and registers and only certain of those. */
4484 if (GET_CODE (p
) == JUMP_INSN
4485 && JUMP_LABEL (p
) != 0
4486 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop
->end
)
4487 && (test
= get_condition_for_loop (loop
, p
)) != 0
4488 && GET_CODE (XEXP (test
, 0)) == REG
4489 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
4490 && (bl
= REG_IV_CLASS (ivs
, REGNO (XEXP (test
, 0)))) != 0
4491 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop
->start
)
4492 && bl
->init_insn
== 0)
4494 /* If an NE test, we have an initial value! */
4495 if (GET_CODE (test
) == NE
)
4498 bl
->init_set
= gen_rtx_SET (VOIDmode
,
4499 XEXP (test
, 0), XEXP (test
, 1));
4502 bl
->initial_test
= test
;
4508 /* Look at the each biv and see if we can say anything better about its
4509 initial value from any initializing insns set up above. (This is done
4510 in two passes to avoid missing SETs in a PARALLEL.) */
4512 loop_bivs_check (loop
)
4515 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4516 /* Temporary list pointers for traversing ivs->list. */
4517 struct iv_class
*bl
;
4518 struct iv_class
**backbl
;
4520 for (backbl
= &ivs
->list
; (bl
= *backbl
); backbl
= &bl
->next
)
4525 if (! bl
->init_insn
)
4528 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
4529 is a constant, use the value of that. */
4530 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
4531 && CONSTANT_P (XEXP (note
, 0)))
4532 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
4533 && CONSTANT_P (XEXP (note
, 0))))
4534 src
= XEXP (note
, 0);
4536 src
= SET_SRC (bl
->init_set
);
4538 if (loop_dump_stream
)
4539 fprintf (loop_dump_stream
,
4540 "Biv %d: initialized at insn %d: initial value ",
4541 bl
->regno
, INSN_UID (bl
->init_insn
));
4543 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
4544 || GET_MODE (src
) == VOIDmode
)
4545 && valid_initial_value_p (src
, bl
->init_insn
,
4546 LOOP_INFO (loop
)->pre_header_has_call
,
4549 bl
->initial_value
= src
;
4551 if (loop_dump_stream
)
4553 print_simple_rtl (loop_dump_stream
, src
);
4554 fputc ('\n', loop_dump_stream
);
4557 /* If we can't make it a giv,
4558 let biv keep initial value of "itself". */
4559 else if (loop_dump_stream
)
4560 fprintf (loop_dump_stream
, "is complex\n");
4565 /* Search the loop for general induction variables. */
4568 loop_givs_find (loop
)
4571 for_each_insn_in_loop (loop
, check_insn_for_givs
);
4575 /* For each giv for which we still don't know whether or not it is
4576 replaceable, check to see if it is replaceable because its final value
4577 can be calculated. */
4580 loop_givs_check (loop
)
4583 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
4584 struct iv_class
*bl
;
4586 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
4588 struct induction
*v
;
4590 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4591 if (! v
->replaceable
&& ! v
->not_replaceable
)
4592 check_final_value (loop
, v
);
4597 /* Return nonzero if it is possible to eliminate the biv BL provided
4598 all givs are reduced. This is possible if either the reg is not
4599 used outside the loop, or we can compute what its final value will
4603 loop_biv_eliminable_p (loop
, bl
, threshold
, insn_count
)
4605 struct iv_class
*bl
;
4609 /* For architectures with a decrement_and_branch_until_zero insn,
4610 don't do this if we put a REG_NONNEG note on the endtest for this
4613 #ifdef HAVE_decrement_and_branch_until_zero
4616 if (loop_dump_stream
)
4617 fprintf (loop_dump_stream
,
4618 "Cannot eliminate nonneg biv %d.\n", bl
->regno
);
4623 /* Check that biv is used outside loop or if it has a final value.
4624 Compare against bl->init_insn rather than loop->start. We aren't
4625 concerned with any uses of the biv between init_insn and
4626 loop->start since these won't be affected by the value of the biv
4627 elsewhere in the function, so long as init_insn doesn't use the
4630 if ((REGNO_LAST_LUID (bl
->regno
) < INSN_LUID (loop
->end
)
4632 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
4633 && REGNO_FIRST_LUID (bl
->regno
) >= INSN_LUID (bl
->init_insn
)
4634 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4635 || (bl
->final_value
= final_biv_value (loop
, bl
)))
4636 return maybe_eliminate_biv (loop
, bl
, 0, threshold
, insn_count
);
4638 if (loop_dump_stream
)
4640 fprintf (loop_dump_stream
,
4641 "Cannot eliminate biv %d.\n",
4643 fprintf (loop_dump_stream
,
4644 "First use: insn %d, last use: insn %d.\n",
4645 REGNO_FIRST_UID (bl
->regno
),
4646 REGNO_LAST_UID (bl
->regno
));
4652 /* Reduce each giv of BL that we have decided to reduce. */
4655 loop_givs_reduce (loop
, bl
)
4657 struct iv_class
*bl
;
4659 struct induction
*v
;
4661 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4663 struct induction
*tv
;
4664 if (! v
->ignore
&& v
->same
== 0)
4666 int auto_inc_opt
= 0;
4668 /* If the code for derived givs immediately below has already
4669 allocated a new_reg, we must keep it. */
4671 v
->new_reg
= gen_reg_rtx (v
->mode
);
4674 /* If the target has auto-increment addressing modes, and
4675 this is an address giv, then try to put the increment
4676 immediately after its use, so that flow can create an
4677 auto-increment addressing mode. */
4678 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4679 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4680 /* We don't handle reversed biv's because bl->biv->insn
4681 does not have a valid INSN_LUID. */
4683 && v
->always_executed
&& ! v
->maybe_multiple
4684 && INSN_UID (v
->insn
) < max_uid_for_loop
)
4686 /* If other giv's have been combined with this one, then
4687 this will work only if all uses of the other giv's occur
4688 before this giv's insn. This is difficult to check.
4690 We simplify this by looking for the common case where
4691 there is one DEST_REG giv, and this giv's insn is the
4692 last use of the dest_reg of that DEST_REG giv. If the
4693 increment occurs after the address giv, then we can
4694 perform the optimization. (Otherwise, the increment
4695 would have to go before other_giv, and we would not be
4696 able to combine it with the address giv to get an
4697 auto-inc address.) */
4698 if (v
->combined_with
)
4700 struct induction
*other_giv
= 0;
4702 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4710 if (! tv
&& other_giv
4711 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4712 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4713 == INSN_UID (v
->insn
))
4714 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4717 /* Check for case where increment is before the address
4718 giv. Do this test in "loop order". */
4719 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4720 && (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
4721 || (INSN_LUID (bl
->biv
->insn
)
4722 > INSN_LUID (loop
->scan_start
))))
4723 || (INSN_LUID (v
->insn
) < INSN_LUID (loop
->scan_start
)
4724 && (INSN_LUID (loop
->scan_start
)
4725 < INSN_LUID (bl
->biv
->insn
))))
4734 /* We can't put an insn immediately after one setting
4735 cc0, or immediately before one using cc0. */
4736 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4737 || (auto_inc_opt
== -1
4738 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4740 && sets_cc0_p (PATTERN (prev
))))
4746 v
->auto_inc_opt
= 1;
4750 /* For each place where the biv is incremented, add an insn
4751 to increment the new, reduced reg for the giv. */
4752 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4757 insert_before
= NEXT_INSN (tv
->insn
);
4758 else if (auto_inc_opt
== 1)
4759 insert_before
= NEXT_INSN (v
->insn
);
4761 insert_before
= v
->insn
;
4763 if (tv
->mult_val
== const1_rtx
)
4764 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
4765 v
->new_reg
, v
->new_reg
,
4767 else /* tv->mult_val == const0_rtx */
4768 /* A multiply is acceptable here
4769 since this is presumed to be seldom executed. */
4770 loop_iv_add_mult_emit_before (loop
, tv
->add_val
, v
->mult_val
,
4771 v
->add_val
, v
->new_reg
,
4775 /* Add code at loop start to initialize giv's reduced reg. */
4777 loop_iv_add_mult_hoist (loop
,
4778 extend_value_for_giv (v
, bl
->initial_value
),
4779 v
->mult_val
, v
->add_val
, v
->new_reg
);
4785 /* Check for givs whose first use is their definition and whose
4786 last use is the definition of another giv. If so, it is likely
4787 dead and should not be used to derive another giv nor to
4791 loop_givs_dead_check (loop
, bl
)
4792 struct loop
*loop ATTRIBUTE_UNUSED
;
4793 struct iv_class
*bl
;
4795 struct induction
*v
;
4797 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4800 || (v
->same
&& v
->same
->ignore
))
4803 if (v
->giv_type
== DEST_REG
4804 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4806 struct induction
*v1
;
4808 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4809 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4817 loop_givs_rescan (loop
, bl
, reg_map
)
4819 struct iv_class
*bl
;
4822 struct induction
*v
;
4824 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4826 if (v
->same
&& v
->same
->ignore
)
4832 /* Update expression if this was combined, in case other giv was
4835 v
->new_reg
= replace_rtx (v
->new_reg
,
4836 v
->same
->dest_reg
, v
->same
->new_reg
);
4838 /* See if this register is known to be a pointer to something. If
4839 so, see if we can find the alignment. First see if there is a
4840 destination register that is a pointer. If so, this shares the
4841 alignment too. Next see if we can deduce anything from the
4842 computational information. If not, and this is a DEST_ADDR
4843 giv, at least we know that it's a pointer, though we don't know
4845 if (GET_CODE (v
->new_reg
) == REG
4846 && v
->giv_type
== DEST_REG
4847 && REG_POINTER (v
->dest_reg
))
4848 mark_reg_pointer (v
->new_reg
,
4849 REGNO_POINTER_ALIGN (REGNO (v
->dest_reg
)));
4850 else if (GET_CODE (v
->new_reg
) == REG
4851 && REG_POINTER (v
->src_reg
))
4853 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->src_reg
));
4856 || GET_CODE (v
->add_val
) != CONST_INT
4857 || INTVAL (v
->add_val
) % (align
/ BITS_PER_UNIT
) != 0)
4860 mark_reg_pointer (v
->new_reg
, align
);
4862 else if (GET_CODE (v
->new_reg
) == REG
4863 && GET_CODE (v
->add_val
) == REG
4864 && REG_POINTER (v
->add_val
))
4866 unsigned int align
= REGNO_POINTER_ALIGN (REGNO (v
->add_val
));
4868 if (align
== 0 || GET_CODE (v
->mult_val
) != CONST_INT
4869 || INTVAL (v
->mult_val
) % (align
/ BITS_PER_UNIT
) != 0)
4872 mark_reg_pointer (v
->new_reg
, align
);
4874 else if (GET_CODE (v
->new_reg
) == REG
&& v
->giv_type
== DEST_ADDR
)
4875 mark_reg_pointer (v
->new_reg
, 0);
4877 if (v
->giv_type
== DEST_ADDR
)
4878 /* Store reduced reg as the address in the memref where we found
4880 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4881 else if (v
->replaceable
)
4883 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4887 rtx original_insn
= v
->insn
;
4890 /* Not replaceable; emit an insn to set the original giv reg from
4891 the reduced giv, same as above. */
4892 v
->insn
= loop_insn_emit_after (loop
, 0, original_insn
,
4893 gen_move_insn (v
->dest_reg
,
4896 /* The original insn may have a REG_EQUAL note. This note is
4897 now incorrect and may result in invalid substitutions later.
4898 The original insn is dead, but may be part of a libcall
4899 sequence, which doesn't seem worth the bother of handling. */
4900 note
= find_reg_note (original_insn
, REG_EQUAL
, NULL_RTX
);
4902 remove_note (original_insn
, note
);
4905 /* When a loop is reversed, givs which depend on the reversed
4906 biv, and which are live outside the loop, must be set to their
4907 correct final value. This insn is only needed if the giv is
4908 not replaceable. The correct final value is the same as the
4909 value that the giv starts the reversed loop with. */
4910 if (bl
->reversed
&& ! v
->replaceable
)
4911 loop_iv_add_mult_sink (loop
,
4912 extend_value_for_giv (v
, bl
->initial_value
),
4913 v
->mult_val
, v
->add_val
, v
->dest_reg
);
4914 else if (v
->final_value
)
4915 loop_insn_sink_or_swim (loop
,
4916 gen_load_of_final_value (v
->dest_reg
,
4919 if (loop_dump_stream
)
4921 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4922 INSN_UID (v
->insn
));
4923 print_simple_rtl (loop_dump_stream
, v
->new_reg
);
4924 fprintf (loop_dump_stream
, "\n");
4931 loop_giv_reduce_benefit (loop
, bl
, v
, test_reg
)
4932 struct loop
*loop ATTRIBUTE_UNUSED
;
4933 struct iv_class
*bl
;
4934 struct induction
*v
;
4940 benefit
= v
->benefit
;
4941 PUT_MODE (test_reg
, v
->mode
);
4942 add_cost
= iv_add_mult_cost (bl
->biv
->add_val
, v
->mult_val
,
4943 test_reg
, test_reg
);
4945 /* Reduce benefit if not replaceable, since we will insert a
4946 move-insn to replace the insn that calculates this giv. Don't do
4947 this unless the giv is a user variable, since it will often be
4948 marked non-replaceable because of the duplication of the exit
4949 code outside the loop. In such a case, the copies we insert are
4950 dead and will be deleted. So they don't have a cost. Similar
4951 situations exist. */
4952 /* ??? The new final_[bg]iv_value code does a much better job of
4953 finding replaceable giv's, and hence this code may no longer be
4955 if (! v
->replaceable
&& ! bl
->eliminable
4956 && REG_USERVAR_P (v
->dest_reg
))
4957 benefit
-= copy_cost
;
4959 /* Decrease the benefit to count the add-insns that we will insert
4960 to increment the reduced reg for the giv. ??? This can
4961 overestimate the run-time cost of the additional insns, e.g. if
4962 there are multiple basic blocks that increment the biv, but only
4963 one of these blocks is executed during each iteration. There is
4964 no good way to detect cases like this with the current structure
4965 of the loop optimizer. This code is more accurate for
4966 determining code size than run-time benefits. */
4967 benefit
-= add_cost
* bl
->biv_count
;
4969 /* Decide whether to strength-reduce this giv or to leave the code
4970 unchanged (recompute it from the biv each time it is used). This
4971 decision can be made independently for each giv. */
4974 /* Attempt to guess whether autoincrement will handle some of the
4975 new add insns; if so, increase BENEFIT (undo the subtraction of
4976 add_cost that was done above). */
4977 if (v
->giv_type
== DEST_ADDR
4978 /* Increasing the benefit is risky, since this is only a guess.
4979 Avoid increasing register pressure in cases where there would
4980 be no other benefit from reducing this giv. */
4982 && GET_CODE (v
->mult_val
) == CONST_INT
)
4984 int size
= GET_MODE_SIZE (GET_MODE (v
->mem
));
4986 if (HAVE_POST_INCREMENT
4987 && INTVAL (v
->mult_val
) == size
)
4988 benefit
+= add_cost
* bl
->biv_count
;
4989 else if (HAVE_PRE_INCREMENT
4990 && INTVAL (v
->mult_val
) == size
)
4991 benefit
+= add_cost
* bl
->biv_count
;
4992 else if (HAVE_POST_DECREMENT
4993 && -INTVAL (v
->mult_val
) == size
)
4994 benefit
+= add_cost
* bl
->biv_count
;
4995 else if (HAVE_PRE_DECREMENT
4996 && -INTVAL (v
->mult_val
) == size
)
4997 benefit
+= add_cost
* bl
->biv_count
;
5005 /* Free IV structures for LOOP. */
5008 loop_ivs_free (loop
)
5011 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5012 struct iv_class
*iv
= ivs
->list
;
5018 struct iv_class
*next
= iv
->next
;
5019 struct induction
*induction
;
5020 struct induction
*next_induction
;
5022 for (induction
= iv
->biv
; induction
; induction
= next_induction
)
5024 next_induction
= induction
->next_iv
;
5027 for (induction
= iv
->giv
; induction
; induction
= next_induction
)
5029 next_induction
= induction
->next_iv
;
5039 /* Perform strength reduction and induction variable elimination.
5041 Pseudo registers created during this function will be beyond the
5042 last valid index in several tables including
5043 REGS->ARRAY[I].N_TIMES_SET and REGNO_LAST_UID. This does not cause a
5044 problem here, because the added registers cannot be givs outside of
5045 their loop, and hence will never be reconsidered. But scan_loop
5046 must check regnos to make sure they are in bounds. */
5049 strength_reduce (loop
, flags
)
5053 struct loop_info
*loop_info
= LOOP_INFO (loop
);
5054 struct loop_regs
*regs
= LOOP_REGS (loop
);
5055 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5057 /* Temporary list pointer for traversing ivs->list. */
5058 struct iv_class
*bl
;
5059 /* Ratio of extra register life span we can justify
5060 for saving an instruction. More if loop doesn't call subroutines
5061 since in that case saving an insn makes more difference
5062 and more registers are available. */
5063 /* ??? could set this to last value of threshold in move_movables */
5064 int threshold
= (loop_info
->has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
5065 /* Map of pseudo-register replacements. */
5066 rtx
*reg_map
= NULL
;
5068 int unrolled_insn_copies
= 0;
5069 rtx test_reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
5070 int insn_count
= count_insns_in_loop (loop
);
5072 addr_placeholder
= gen_reg_rtx (Pmode
);
5074 ivs
->n_regs
= max_reg_before_loop
;
5075 ivs
->regs
= (struct iv
*) xcalloc (ivs
->n_regs
, sizeof (struct iv
));
5077 /* Find all BIVs in loop. */
5078 loop_bivs_find (loop
);
5080 /* Exit if there are no bivs. */
5083 /* Can still unroll the loop anyways, but indicate that there is no
5084 strength reduction info available. */
5085 if (flags
& LOOP_UNROLL
)
5086 unroll_loop (loop
, insn_count
, 0);
5088 loop_ivs_free (loop
);
5092 /* Determine how BIVS are initialized by looking through pre-header
5093 extended basic block. */
5094 loop_bivs_init_find (loop
);
5096 /* Look at the each biv and see if we can say anything better about its
5097 initial value from any initializing insns set up above. */
5098 loop_bivs_check (loop
);
5100 /* Search the loop for general induction variables. */
5101 loop_givs_find (loop
);
5103 /* Try to calculate and save the number of loop iterations. This is
5104 set to zero if the actual number can not be calculated. This must
5105 be called after all giv's have been identified, since otherwise it may
5106 fail if the iteration variable is a giv. */
5107 loop_iterations (loop
);
5109 #ifdef HAVE_prefetch
5110 if (flags
& LOOP_PREFETCH
)
5111 emit_prefetch_instructions (loop
);
5114 /* Now for each giv for which we still don't know whether or not it is
5115 replaceable, check to see if it is replaceable because its final value
5116 can be calculated. This must be done after loop_iterations is called,
5117 so that final_giv_value will work correctly. */
5118 loop_givs_check (loop
);
5120 /* Try to prove that the loop counter variable (if any) is always
5121 nonnegative; if so, record that fact with a REG_NONNEG note
5122 so that "decrement and branch until zero" insn can be used. */
5123 check_dbra_loop (loop
, insn_count
);
5125 /* Create reg_map to hold substitutions for replaceable giv regs.
5126 Some givs might have been made from biv increments, so look at
5127 ivs->reg_iv_type for a suitable size. */
5128 reg_map_size
= ivs
->n_regs
;
5129 reg_map
= (rtx
*) xcalloc (reg_map_size
, sizeof (rtx
));
5131 /* Examine each iv class for feasibility of strength reduction/induction
5132 variable elimination. */
5134 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
5136 struct induction
*v
;
5139 /* Test whether it will be possible to eliminate this biv
5140 provided all givs are reduced. */
5141 bl
->eliminable
= loop_biv_eliminable_p (loop
, bl
, threshold
, insn_count
);
5143 /* This will be true at the end, if all givs which depend on this
5144 biv have been strength reduced.
5145 We can't (currently) eliminate the biv unless this is so. */
5146 bl
->all_reduced
= 1;
5148 /* Check each extension dependent giv in this class to see if its
5149 root biv is safe from wrapping in the interior mode. */
5150 check_ext_dependent_givs (bl
, loop_info
);
5152 /* Combine all giv's for this iv_class. */
5153 combine_givs (regs
, bl
);
5155 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5157 struct induction
*tv
;
5159 if (v
->ignore
|| v
->same
)
5162 benefit
= loop_giv_reduce_benefit (loop
, bl
, v
, test_reg
);
5164 /* If an insn is not to be strength reduced, then set its ignore
5165 flag, and clear bl->all_reduced. */
5167 /* A giv that depends on a reversed biv must be reduced if it is
5168 used after the loop exit, otherwise, it would have the wrong
5169 value after the loop exit. To make it simple, just reduce all
5170 of such giv's whether or not we know they are used after the loop
5173 if (! flag_reduce_all_givs
5174 && v
->lifetime
* threshold
* benefit
< insn_count
5177 if (loop_dump_stream
)
5178 fprintf (loop_dump_stream
,
5179 "giv of insn %d not worth while, %d vs %d.\n",
5181 v
->lifetime
* threshold
* benefit
, insn_count
);
5183 bl
->all_reduced
= 0;
5187 /* Check that we can increment the reduced giv without a
5188 multiply insn. If not, reject it. */
5190 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
5191 if (tv
->mult_val
== const1_rtx
5192 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
5194 if (loop_dump_stream
)
5195 fprintf (loop_dump_stream
,
5196 "giv of insn %d: would need a multiply.\n",
5197 INSN_UID (v
->insn
));
5199 bl
->all_reduced
= 0;
5205 /* Check for givs whose first use is their definition and whose
5206 last use is the definition of another giv. If so, it is likely
5207 dead and should not be used to derive another giv nor to
5209 loop_givs_dead_check (loop
, bl
);
5211 /* Reduce each giv that we decided to reduce. */
5212 loop_givs_reduce (loop
, bl
);
5214 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
5217 For each giv register that can be reduced now: if replaceable,
5218 substitute reduced reg wherever the old giv occurs;
5219 else add new move insn "giv_reg = reduced_reg". */
5220 loop_givs_rescan (loop
, bl
, reg_map
);
5222 /* All the givs based on the biv bl have been reduced if they
5225 /* For each giv not marked as maybe dead that has been combined with a
5226 second giv, clear any "maybe dead" mark on that second giv.
5227 v->new_reg will either be or refer to the register of the giv it
5230 Doing this clearing avoids problems in biv elimination where
5231 a giv's new_reg is a complex value that can't be put in the
5232 insn but the giv combined with (with a reg as new_reg) is
5233 marked maybe_dead. Since the register will be used in either
5234 case, we'd prefer it be used from the simpler giv. */
5236 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
5237 if (! v
->maybe_dead
&& v
->same
)
5238 v
->same
->maybe_dead
= 0;
5240 /* Try to eliminate the biv, if it is a candidate.
5241 This won't work if ! bl->all_reduced,
5242 since the givs we planned to use might not have been reduced.
5244 We have to be careful that we didn't initially think we could
5245 eliminate this biv because of a giv that we now think may be
5246 dead and shouldn't be used as a biv replacement.
5248 Also, there is the possibility that we may have a giv that looks
5249 like it can be used to eliminate a biv, but the resulting insn
5250 isn't valid. This can happen, for example, on the 88k, where a
5251 JUMP_INSN can compare a register only with zero. Attempts to
5252 replace it with a compare with a constant will fail.
5254 Note that in cases where this call fails, we may have replaced some
5255 of the occurrences of the biv with a giv, but no harm was done in
5256 doing so in the rare cases where it can occur. */
5258 if (bl
->all_reduced
== 1 && bl
->eliminable
5259 && maybe_eliminate_biv (loop
, bl
, 1, threshold
, insn_count
))
5261 /* ?? If we created a new test to bypass the loop entirely,
5262 or otherwise drop straight in, based on this test, then
5263 we might want to rewrite it also. This way some later
5264 pass has more hope of removing the initialization of this
5267 /* If final_value != 0, then the biv may be used after loop end
5268 and we must emit an insn to set it just in case.
5270 Reversed bivs already have an insn after the loop setting their
5271 value, so we don't need another one. We can't calculate the
5272 proper final value for such a biv here anyways. */
5273 if (bl
->final_value
&& ! bl
->reversed
)
5274 loop_insn_sink_or_swim (loop
,
5275 gen_load_of_final_value (bl
->biv
->dest_reg
,
5278 if (loop_dump_stream
)
5279 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
5282 /* See above note wrt final_value. But since we couldn't eliminate
5283 the biv, we must set the value after the loop instead of before. */
5284 else if (bl
->final_value
&& ! bl
->reversed
)
5285 loop_insn_sink (loop
, gen_load_of_final_value (bl
->biv
->dest_reg
,
5289 /* Go through all the instructions in the loop, making all the
5290 register substitutions scheduled in REG_MAP. */
5292 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
5293 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5294 || GET_CODE (p
) == CALL_INSN
)
5296 replace_regs (PATTERN (p
), reg_map
, reg_map_size
, 0);
5297 replace_regs (REG_NOTES (p
), reg_map
, reg_map_size
, 0);
5301 if (loop_info
->n_iterations
> 0)
5303 /* When we completely unroll a loop we will likely not need the increment
5304 of the loop BIV and we will not need the conditional branch at the
5306 unrolled_insn_copies
= insn_count
- 2;
5309 /* When we completely unroll a loop on a HAVE_cc0 machine we will not
5310 need the comparison before the conditional branch at the end of the
5312 unrolled_insn_copies
-= 1;
5315 /* We'll need one copy for each loop iteration. */
5316 unrolled_insn_copies
*= loop_info
->n_iterations
;
5318 /* A little slop to account for the ability to remove initialization
5319 code, better CSE, and other secondary benefits of completely
5320 unrolling some loops. */
5321 unrolled_insn_copies
-= 1;
5323 /* Clamp the value. */
5324 if (unrolled_insn_copies
< 0)
5325 unrolled_insn_copies
= 0;
5328 /* Unroll loops from within strength reduction so that we can use the
5329 induction variable information that strength_reduce has already
5330 collected. Always unroll loops that would be as small or smaller
5331 unrolled than when rolled. */
5332 if ((flags
& LOOP_UNROLL
)
5333 || ((flags
& LOOP_AUTO_UNROLL
)
5334 && loop_info
->n_iterations
> 0
5335 && unrolled_insn_copies
<= insn_count
))
5336 unroll_loop (loop
, insn_count
, 1);
5338 #ifdef HAVE_doloop_end
5339 if (HAVE_doloop_end
&& (flags
& LOOP_BCT
) && flag_branch_on_count_reg
)
5340 doloop_optimize (loop
);
5341 #endif /* HAVE_doloop_end */
5343 /* In case number of iterations is known, drop branch prediction note
5344 in the branch. Do that only in second loop pass, as loop unrolling
5345 may change the number of iterations performed. */
5346 if (flags
& LOOP_BCT
)
5348 unsigned HOST_WIDE_INT n
5349 = loop_info
->n_iterations
/ loop_info
->unroll_number
;
5351 predict_insn (prev_nonnote_insn (loop
->end
), PRED_LOOP_ITERATIONS
,
5352 REG_BR_PROB_BASE
- REG_BR_PROB_BASE
/ n
);
5355 if (loop_dump_stream
)
5356 fprintf (loop_dump_stream
, "\n");
5358 loop_ivs_free (loop
);
5363 /*Record all basic induction variables calculated in the insn. */
5365 check_insn_for_bivs (loop
, p
, not_every_iteration
, maybe_multiple
)
5368 int not_every_iteration
;
5371 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5378 if (GET_CODE (p
) == INSN
5379 && (set
= single_set (p
))
5380 && GET_CODE (SET_DEST (set
)) == REG
)
5382 dest_reg
= SET_DEST (set
);
5383 if (REGNO (dest_reg
) < max_reg_before_loop
5384 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
5385 && REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != NOT_BASIC_INDUCT
)
5387 if (basic_induction_var (loop
, SET_SRC (set
),
5388 GET_MODE (SET_SRC (set
)),
5389 dest_reg
, p
, &inc_val
, &mult_val
,
5392 /* It is a possible basic induction variable.
5393 Create and initialize an induction structure for it. */
5396 = (struct induction
*) xmalloc (sizeof (struct induction
));
5398 record_biv (loop
, v
, p
, dest_reg
, inc_val
, mult_val
, location
,
5399 not_every_iteration
, maybe_multiple
);
5400 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = BASIC_INDUCT
;
5402 else if (REGNO (dest_reg
) < ivs
->n_regs
)
5403 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = NOT_BASIC_INDUCT
;
5409 /* Record all givs calculated in the insn.
5410 A register is a giv if: it is only set once, it is a function of a
5411 biv and a constant (or invariant), and it is not a biv. */
5413 check_insn_for_givs (loop
, p
, not_every_iteration
, maybe_multiple
)
5416 int not_every_iteration
;
5419 struct loop_regs
*regs
= LOOP_REGS (loop
);
5422 /* Look for a general induction variable in a register. */
5423 if (GET_CODE (p
) == INSN
5424 && (set
= single_set (p
))
5425 && GET_CODE (SET_DEST (set
)) == REG
5426 && ! regs
->array
[REGNO (SET_DEST (set
))].may_not_optimize
)
5435 rtx last_consec_insn
;
5437 dest_reg
= SET_DEST (set
);
5438 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
5441 if (/* SET_SRC is a giv. */
5442 (general_induction_var (loop
, SET_SRC (set
), &src_reg
, &add_val
,
5443 &mult_val
, &ext_val
, 0, &benefit
, VOIDmode
)
5444 /* Equivalent expression is a giv. */
5445 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5446 && general_induction_var (loop
, XEXP (regnote
, 0), &src_reg
,
5447 &add_val
, &mult_val
, &ext_val
, 0,
5448 &benefit
, VOIDmode
)))
5449 /* Don't try to handle any regs made by loop optimization.
5450 We have nothing on them in regno_first_uid, etc. */
5451 && REGNO (dest_reg
) < max_reg_before_loop
5452 /* Don't recognize a BASIC_INDUCT_VAR here. */
5453 && dest_reg
!= src_reg
5454 /* This must be the only place where the register is set. */
5455 && (regs
->array
[REGNO (dest_reg
)].n_times_set
== 1
5456 /* or all sets must be consecutive and make a giv. */
5457 || (benefit
= consec_sets_giv (loop
, benefit
, p
,
5459 &add_val
, &mult_val
, &ext_val
,
5460 &last_consec_insn
))))
5463 = (struct induction
*) xmalloc (sizeof (struct induction
));
5465 /* If this is a library call, increase benefit. */
5466 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5467 benefit
+= libcall_benefit (p
);
5469 /* Skip the consecutive insns, if there are any. */
5470 if (regs
->array
[REGNO (dest_reg
)].n_times_set
!= 1)
5471 p
= last_consec_insn
;
5473 record_giv (loop
, v
, p
, src_reg
, dest_reg
, mult_val
, add_val
,
5474 ext_val
, benefit
, DEST_REG
, not_every_iteration
,
5475 maybe_multiple
, (rtx
*) 0);
5480 #ifndef DONT_REDUCE_ADDR
5481 /* Look for givs which are memory addresses. */
5482 /* This resulted in worse code on a VAX 8600. I wonder if it
5484 if (GET_CODE (p
) == INSN
)
5485 find_mem_givs (loop
, PATTERN (p
), p
, not_every_iteration
,
5489 /* Update the status of whether giv can derive other givs. This can
5490 change when we pass a label or an insn that updates a biv. */
5491 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5492 || GET_CODE (p
) == CODE_LABEL
)
5493 update_giv_derive (loop
, p
);
5497 /* Return 1 if X is a valid source for an initial value (or as value being
5498 compared against in an initial test).
5500 X must be either a register or constant and must not be clobbered between
5501 the current insn and the start of the loop.
5503 INSN is the insn containing X. */
5506 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
5515 /* Only consider pseudos we know about initialized in insns whose luids
5517 if (GET_CODE (x
) != REG
5518 || REGNO (x
) >= max_reg_before_loop
)
5521 /* Don't use call-clobbered registers across a call which clobbers it. On
5522 some machines, don't use any hard registers at all. */
5523 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
5524 && (SMALL_REGISTER_CLASSES
5525 || (call_used_regs
[REGNO (x
)] && call_seen
)))
5528 /* Don't use registers that have been clobbered before the start of the
5530 if (reg_set_between_p (x
, insn
, loop_start
))
5536 /* Scan X for memory refs and check each memory address
5537 as a possible giv. INSN is the insn whose pattern X comes from.
5538 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
5539 every loop iteration. MAYBE_MULTIPLE is 1 if the insn might be executed
5540 more thanonce in each loop iteration. */
5543 find_mem_givs (loop
, x
, insn
, not_every_iteration
, maybe_multiple
)
5544 const struct loop
*loop
;
5547 int not_every_iteration
, maybe_multiple
;
5556 code
= GET_CODE (x
);
5581 /* This code used to disable creating GIVs with mult_val == 1 and
5582 add_val == 0. However, this leads to lost optimizations when
5583 it comes time to combine a set of related DEST_ADDR GIVs, since
5584 this one would not be seen. */
5586 if (general_induction_var (loop
, XEXP (x
, 0), &src_reg
, &add_val
,
5587 &mult_val
, &ext_val
, 1, &benefit
,
5590 /* Found one; record it. */
5592 = (struct induction
*) xmalloc (sizeof (struct induction
));
5594 record_giv (loop
, v
, insn
, src_reg
, addr_placeholder
, mult_val
,
5595 add_val
, ext_val
, benefit
, DEST_ADDR
,
5596 not_every_iteration
, maybe_multiple
, &XEXP (x
, 0));
5607 /* Recursively scan the subexpressions for other mem refs. */
5609 fmt
= GET_RTX_FORMAT (code
);
5610 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5612 find_mem_givs (loop
, XEXP (x
, i
), insn
, not_every_iteration
,
5614 else if (fmt
[i
] == 'E')
5615 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
5616 find_mem_givs (loop
, XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
5620 /* Fill in the data about one biv update.
5621 V is the `struct induction' in which we record the biv. (It is
5622 allocated by the caller, with alloca.)
5623 INSN is the insn that sets it.
5624 DEST_REG is the biv's reg.
5626 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
5627 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
5628 being set to INC_VAL.
5630 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
5631 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
5632 can be executed more than once per iteration. If MAYBE_MULTIPLE
5633 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
5634 executed exactly once per iteration. */
5637 record_biv (loop
, v
, insn
, dest_reg
, inc_val
, mult_val
, location
,
5638 not_every_iteration
, maybe_multiple
)
5640 struct induction
*v
;
5646 int not_every_iteration
;
5649 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5650 struct iv_class
*bl
;
5653 v
->src_reg
= dest_reg
;
5654 v
->dest_reg
= dest_reg
;
5655 v
->mult_val
= mult_val
;
5656 v
->add_val
= inc_val
;
5657 v
->ext_dependent
= NULL_RTX
;
5658 v
->location
= location
;
5659 v
->mode
= GET_MODE (dest_reg
);
5660 v
->always_computable
= ! not_every_iteration
;
5661 v
->always_executed
= ! not_every_iteration
;
5662 v
->maybe_multiple
= maybe_multiple
;
5664 /* Add this to the reg's iv_class, creating a class
5665 if this is the first incrementation of the reg. */
5667 bl
= REG_IV_CLASS (ivs
, REGNO (dest_reg
));
5670 /* Create and initialize new iv_class. */
5672 bl
= (struct iv_class
*) xmalloc (sizeof (struct iv_class
));
5674 bl
->regno
= REGNO (dest_reg
);
5680 /* Set initial value to the reg itself. */
5681 bl
->initial_value
= dest_reg
;
5682 bl
->final_value
= 0;
5683 /* We haven't seen the initializing insn yet */
5686 bl
->initial_test
= 0;
5687 bl
->incremented
= 0;
5691 bl
->total_benefit
= 0;
5693 /* Add this class to ivs->list. */
5694 bl
->next
= ivs
->list
;
5697 /* Put it in the array of biv register classes. */
5698 REG_IV_CLASS (ivs
, REGNO (dest_reg
)) = bl
;
5701 /* Update IV_CLASS entry for this biv. */
5702 v
->next_iv
= bl
->biv
;
5705 if (mult_val
== const1_rtx
)
5706 bl
->incremented
= 1;
5708 if (loop_dump_stream
)
5709 loop_biv_dump (v
, loop_dump_stream
, 0);
5712 /* Fill in the data about one giv.
5713 V is the `struct induction' in which we record the giv. (It is
5714 allocated by the caller, with alloca.)
5715 INSN is the insn that sets it.
5716 BENEFIT estimates the savings from deleting this insn.
5717 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
5718 into a register or is used as a memory address.
5720 SRC_REG is the biv reg which the giv is computed from.
5721 DEST_REG is the giv's reg (if the giv is stored in a reg).
5722 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
5723 LOCATION points to the place where this giv's value appears in INSN. */
5726 record_giv (loop
, v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, ext_val
,
5727 benefit
, type
, not_every_iteration
, maybe_multiple
, location
)
5728 const struct loop
*loop
;
5729 struct induction
*v
;
5733 rtx mult_val
, add_val
, ext_val
;
5736 int not_every_iteration
, maybe_multiple
;
5739 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5740 struct induction
*b
;
5741 struct iv_class
*bl
;
5742 rtx set
= single_set (insn
);
5745 /* Attempt to prove constantness of the values. Don't let simplity_rtx
5746 undo the MULT canonicalization that we performed earlier. */
5747 temp
= simplify_rtx (add_val
);
5749 && ! (GET_CODE (add_val
) == MULT
5750 && GET_CODE (temp
) == ASHIFT
))
5754 v
->src_reg
= src_reg
;
5756 v
->dest_reg
= dest_reg
;
5757 v
->mult_val
= mult_val
;
5758 v
->add_val
= add_val
;
5759 v
->ext_dependent
= ext_val
;
5760 v
->benefit
= benefit
;
5761 v
->location
= location
;
5763 v
->combined_with
= 0;
5764 v
->maybe_multiple
= maybe_multiple
;
5766 v
->derive_adjustment
= 0;
5772 v
->auto_inc_opt
= 0;
5776 /* The v->always_computable field is used in update_giv_derive, to
5777 determine whether a giv can be used to derive another giv. For a
5778 DEST_REG giv, INSN computes a new value for the giv, so its value
5779 isn't computable if INSN insn't executed every iteration.
5780 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
5781 it does not compute a new value. Hence the value is always computable
5782 regardless of whether INSN is executed each iteration. */
5784 if (type
== DEST_ADDR
)
5785 v
->always_computable
= 1;
5787 v
->always_computable
= ! not_every_iteration
;
5789 v
->always_executed
= ! not_every_iteration
;
5791 if (type
== DEST_ADDR
)
5793 v
->mode
= GET_MODE (*location
);
5796 else /* type == DEST_REG */
5798 v
->mode
= GET_MODE (SET_DEST (set
));
5800 v
->lifetime
= LOOP_REG_LIFETIME (loop
, REGNO (dest_reg
));
5802 /* If the lifetime is zero, it means that this register is
5803 really a dead store. So mark this as a giv that can be
5804 ignored. This will not prevent the biv from being eliminated. */
5805 if (v
->lifetime
== 0)
5808 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
5809 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
5812 /* Add the giv to the class of givs computed from one biv. */
5814 bl
= REG_IV_CLASS (ivs
, REGNO (src_reg
));
5817 v
->next_iv
= bl
->giv
;
5819 /* Don't count DEST_ADDR. This is supposed to count the number of
5820 insns that calculate givs. */
5821 if (type
== DEST_REG
)
5823 bl
->total_benefit
+= benefit
;
5826 /* Fatal error, biv missing for this giv? */
5829 if (type
== DEST_ADDR
)
5833 /* The giv can be replaced outright by the reduced register only if all
5834 of the following conditions are true:
5835 - the insn that sets the giv is always executed on any iteration
5836 on which the giv is used at all
5837 (there are two ways to deduce this:
5838 either the insn is executed on every iteration,
5839 or all uses follow that insn in the same basic block),
5840 - the giv is not used outside the loop
5841 - no assignments to the biv occur during the giv's lifetime. */
5843 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
5844 /* Previous line always fails if INSN was moved by loop opt. */
5845 && REGNO_LAST_LUID (REGNO (dest_reg
))
5846 < INSN_LUID (loop
->end
)
5847 && (! not_every_iteration
5848 || last_use_this_basic_block (dest_reg
, insn
)))
5850 /* Now check that there are no assignments to the biv within the
5851 giv's lifetime. This requires two separate checks. */
5853 /* Check each biv update, and fail if any are between the first
5854 and last use of the giv.
5856 If this loop contains an inner loop that was unrolled, then
5857 the insn modifying the biv may have been emitted by the loop
5858 unrolling code, and hence does not have a valid luid. Just
5859 mark the biv as not replaceable in this case. It is not very
5860 useful as a biv, because it is used in two different loops.
5861 It is very unlikely that we would be able to optimize the giv
5862 using this biv anyways. */
5865 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5867 if (INSN_UID (b
->insn
) >= max_uid_for_loop
5868 || ((INSN_LUID (b
->insn
)
5869 >= REGNO_FIRST_LUID (REGNO (dest_reg
)))
5870 && (INSN_LUID (b
->insn
)
5871 <= REGNO_LAST_LUID (REGNO (dest_reg
)))))
5874 v
->not_replaceable
= 1;
5879 /* If there are any backwards branches that go from after the
5880 biv update to before it, then this giv is not replaceable. */
5882 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
5883 if (back_branch_in_range_p (loop
, b
->insn
))
5886 v
->not_replaceable
= 1;
5892 /* May still be replaceable, we don't have enough info here to
5895 v
->not_replaceable
= 0;
5899 /* Record whether the add_val contains a const_int, for later use by
5904 v
->no_const_addval
= 1;
5905 if (tem
== const0_rtx
)
5907 else if (CONSTANT_P (add_val
))
5908 v
->no_const_addval
= 0;
5909 if (GET_CODE (tem
) == PLUS
)
5913 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
5914 tem
= XEXP (tem
, 0);
5915 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
5916 tem
= XEXP (tem
, 1);
5920 if (CONSTANT_P (XEXP (tem
, 1)))
5921 v
->no_const_addval
= 0;
5925 if (loop_dump_stream
)
5926 loop_giv_dump (v
, loop_dump_stream
, 0);
5929 /* All this does is determine whether a giv can be made replaceable because
5930 its final value can be calculated. This code can not be part of record_giv
5931 above, because final_giv_value requires that the number of loop iterations
5932 be known, and that can not be accurately calculated until after all givs
5933 have been identified. */
5936 check_final_value (loop
, v
)
5937 const struct loop
*loop
;
5938 struct induction
*v
;
5940 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
5941 struct iv_class
*bl
;
5942 rtx final_value
= 0;
5944 bl
= REG_IV_CLASS (ivs
, REGNO (v
->src_reg
));
5946 /* DEST_ADDR givs will never reach here, because they are always marked
5947 replaceable above in record_giv. */
5949 /* The giv can be replaced outright by the reduced register only if all
5950 of the following conditions are true:
5951 - the insn that sets the giv is always executed on any iteration
5952 on which the giv is used at all
5953 (there are two ways to deduce this:
5954 either the insn is executed on every iteration,
5955 or all uses follow that insn in the same basic block),
5956 - its final value can be calculated (this condition is different
5957 than the one above in record_giv)
5958 - it's not used before the it's set
5959 - no assignments to the biv occur during the giv's lifetime. */
5962 /* This is only called now when replaceable is known to be false. */
5963 /* Clear replaceable, so that it won't confuse final_giv_value. */
5967 if ((final_value
= final_giv_value (loop
, v
))
5968 && (v
->always_executed
5969 || last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
5971 int biv_increment_seen
= 0, before_giv_insn
= 0;
5977 /* When trying to determine whether or not a biv increment occurs
5978 during the lifetime of the giv, we can ignore uses of the variable
5979 outside the loop because final_value is true. Hence we can not
5980 use regno_last_uid and regno_first_uid as above in record_giv. */
5982 /* Search the loop to determine whether any assignments to the
5983 biv occur during the giv's lifetime. Start with the insn
5984 that sets the giv, and search around the loop until we come
5985 back to that insn again.
5987 Also fail if there is a jump within the giv's lifetime that jumps
5988 to somewhere outside the lifetime but still within the loop. This
5989 catches spaghetti code where the execution order is not linear, and
5990 hence the above test fails. Here we assume that the giv lifetime
5991 does not extend from one iteration of the loop to the next, so as
5992 to make the test easier. Since the lifetime isn't known yet,
5993 this requires two loops. See also record_giv above. */
5995 last_giv_use
= v
->insn
;
6002 before_giv_insn
= 1;
6003 p
= NEXT_INSN (loop
->start
);
6008 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
6009 || GET_CODE (p
) == CALL_INSN
)
6011 /* It is possible for the BIV increment to use the GIV if we
6012 have a cycle. Thus we must be sure to check each insn for
6013 both BIV and GIV uses, and we must check for BIV uses
6016 if (! biv_increment_seen
6017 && reg_set_p (v
->src_reg
, PATTERN (p
)))
6018 biv_increment_seen
= 1;
6020 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
6022 if (biv_increment_seen
|| before_giv_insn
)
6025 v
->not_replaceable
= 1;
6033 /* Now that the lifetime of the giv is known, check for branches
6034 from within the lifetime to outside the lifetime if it is still
6044 p
= NEXT_INSN (loop
->start
);
6045 if (p
== last_giv_use
)
6048 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
6049 && LABEL_NAME (JUMP_LABEL (p
))
6050 && ((loop_insn_first_p (JUMP_LABEL (p
), v
->insn
)
6051 && loop_insn_first_p (loop
->start
, JUMP_LABEL (p
)))
6052 || (loop_insn_first_p (last_giv_use
, JUMP_LABEL (p
))
6053 && loop_insn_first_p (JUMP_LABEL (p
), loop
->end
))))
6056 v
->not_replaceable
= 1;
6058 if (loop_dump_stream
)
6059 fprintf (loop_dump_stream
,
6060 "Found branch outside giv lifetime.\n");
6067 /* If it is replaceable, then save the final value. */
6069 v
->final_value
= final_value
;
6072 if (loop_dump_stream
&& v
->replaceable
)
6073 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
6074 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
6077 /* Update the status of whether a giv can derive other givs.
6079 We need to do something special if there is or may be an update to the biv
6080 between the time the giv is defined and the time it is used to derive
6083 In addition, a giv that is only conditionally set is not allowed to
6084 derive another giv once a label has been passed.
6086 The cases we look at are when a label or an update to a biv is passed. */
6089 update_giv_derive (loop
, p
)
6090 const struct loop
*loop
;
6093 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6094 struct iv_class
*bl
;
6095 struct induction
*biv
, *giv
;
6099 /* Search all IV classes, then all bivs, and finally all givs.
6101 There are three cases we are concerned with. First we have the situation
6102 of a giv that is only updated conditionally. In that case, it may not
6103 derive any givs after a label is passed.
6105 The second case is when a biv update occurs, or may occur, after the
6106 definition of a giv. For certain biv updates (see below) that are
6107 known to occur between the giv definition and use, we can adjust the
6108 giv definition. For others, or when the biv update is conditional,
6109 we must prevent the giv from deriving any other givs. There are two
6110 sub-cases within this case.
6112 If this is a label, we are concerned with any biv update that is done
6113 conditionally, since it may be done after the giv is defined followed by
6114 a branch here (actually, we need to pass both a jump and a label, but
6115 this extra tracking doesn't seem worth it).
6117 If this is a jump, we are concerned about any biv update that may be
6118 executed multiple times. We are actually only concerned about
6119 backward jumps, but it is probably not worth performing the test
6120 on the jump again here.
6122 If this is a biv update, we must adjust the giv status to show that a
6123 subsequent biv update was performed. If this adjustment cannot be done,
6124 the giv cannot derive further givs. */
6126 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
6127 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
6128 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
6131 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
6133 /* If cant_derive is already true, there is no point in
6134 checking all of these conditions again. */
6135 if (giv
->cant_derive
)
6138 /* If this giv is conditionally set and we have passed a label,
6139 it cannot derive anything. */
6140 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
6141 giv
->cant_derive
= 1;
6143 /* Skip givs that have mult_val == 0, since
6144 they are really invariants. Also skip those that are
6145 replaceable, since we know their lifetime doesn't contain
6147 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
6150 /* The only way we can allow this giv to derive another
6151 is if this is a biv increment and we can form the product
6152 of biv->add_val and giv->mult_val. In this case, we will
6153 be able to compute a compensation. */
6154 else if (biv
->insn
== p
)
6159 if (biv
->mult_val
== const1_rtx
)
6160 tem
= simplify_giv_expr (loop
,
6161 gen_rtx_MULT (giv
->mode
,
6164 &ext_val_dummy
, &dummy
);
6166 if (tem
&& giv
->derive_adjustment
)
6167 tem
= simplify_giv_expr
6169 gen_rtx_PLUS (giv
->mode
, tem
, giv
->derive_adjustment
),
6170 &ext_val_dummy
, &dummy
);
6173 giv
->derive_adjustment
= tem
;
6175 giv
->cant_derive
= 1;
6177 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
6178 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
6179 giv
->cant_derive
= 1;
6184 /* Check whether an insn is an increment legitimate for a basic induction var.
6185 X is the source of insn P, or a part of it.
6186 MODE is the mode in which X should be interpreted.
6188 DEST_REG is the putative biv, also the destination of the insn.
6189 We accept patterns of these forms:
6190 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
6191 REG = INVARIANT + REG
6193 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
6194 store the additive term into *INC_VAL, and store the place where
6195 we found the additive term into *LOCATION.
6197 If X is an assignment of an invariant into DEST_REG, we set
6198 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
6200 We also want to detect a BIV when it corresponds to a variable
6201 whose mode was promoted via PROMOTED_MODE. In that case, an increment
6202 of the variable may be a PLUS that adds a SUBREG of that variable to
6203 an invariant and then sign- or zero-extends the result of the PLUS
6206 Most GIVs in such cases will be in the promoted mode, since that is the
6207 probably the natural computation mode (and almost certainly the mode
6208 used for addresses) on the machine. So we view the pseudo-reg containing
6209 the variable as the BIV, as if it were simply incremented.
6211 Note that treating the entire pseudo as a BIV will result in making
6212 simple increments to any GIVs based on it. However, if the variable
6213 overflows in its declared mode but not its promoted mode, the result will
6214 be incorrect. This is acceptable if the variable is signed, since
6215 overflows in such cases are undefined, but not if it is unsigned, since
6216 those overflows are defined. So we only check for SIGN_EXTEND and
6219 If we cannot find a biv, we return 0. */
6222 basic_induction_var (loop
, x
, mode
, dest_reg
, p
, inc_val
, mult_val
, location
)
6223 const struct loop
*loop
;
6225 enum machine_mode mode
;
6236 code
= GET_CODE (x
);
6241 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
6242 || (GET_CODE (XEXP (x
, 0)) == SUBREG
6243 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
6244 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
6246 argp
= &XEXP (x
, 1);
6248 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
6249 || (GET_CODE (XEXP (x
, 1)) == SUBREG
6250 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
6251 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
6253 argp
= &XEXP (x
, 0);
6259 if (loop_invariant_p (loop
, arg
) != 1)
6262 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
6263 *mult_val
= const1_rtx
;
6268 /* If what's inside the SUBREG is a BIV, then the SUBREG. This will
6269 handle addition of promoted variables.
6270 ??? The comment at the start of this function is wrong: promoted
6271 variable increments don't look like it says they do. */
6272 return basic_induction_var (loop
, SUBREG_REG (x
),
6273 GET_MODE (SUBREG_REG (x
)),
6274 dest_reg
, p
, inc_val
, mult_val
, location
);
6277 /* If this register is assigned in a previous insn, look at its
6278 source, but don't go outside the loop or past a label. */
6280 /* If this sets a register to itself, we would repeat any previous
6281 biv increment if we applied this strategy blindly. */
6282 if (rtx_equal_p (dest_reg
, x
))
6291 insn
= PREV_INSN (insn
);
6293 while (insn
&& GET_CODE (insn
) == NOTE
6294 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6298 set
= single_set (insn
);
6301 dest
= SET_DEST (set
);
6303 || (GET_CODE (dest
) == SUBREG
6304 && (GET_MODE_SIZE (GET_MODE (dest
)) <= UNITS_PER_WORD
)
6305 && (GET_MODE_CLASS (GET_MODE (dest
)) == MODE_INT
)
6306 && SUBREG_REG (dest
) == x
))
6307 return basic_induction_var (loop
, SET_SRC (set
),
6308 (GET_MODE (SET_SRC (set
)) == VOIDmode
6310 : GET_MODE (SET_SRC (set
))),
6312 inc_val
, mult_val
, location
);
6314 while (GET_CODE (dest
) == SIGN_EXTRACT
6315 || GET_CODE (dest
) == ZERO_EXTRACT
6316 || GET_CODE (dest
) == SUBREG
6317 || GET_CODE (dest
) == STRICT_LOW_PART
)
6318 dest
= XEXP (dest
, 0);
6324 /* Can accept constant setting of biv only when inside inner most loop.
6325 Otherwise, a biv of an inner loop may be incorrectly recognized
6326 as a biv of the outer loop,
6327 causing code to be moved INTO the inner loop. */
6329 if (loop_invariant_p (loop
, x
) != 1)
6334 /* convert_modes aborts if we try to convert to or from CCmode, so just
6335 exclude that case. It is very unlikely that a condition code value
6336 would be a useful iterator anyways. convert_modes aborts if we try to
6337 convert a float mode to non-float or vice versa too. */
6338 if (loop
->level
== 1
6339 && GET_MODE_CLASS (mode
) == GET_MODE_CLASS (GET_MODE (dest_reg
))
6340 && GET_MODE_CLASS (mode
) != MODE_CC
)
6342 /* Possible bug here? Perhaps we don't know the mode of X. */
6343 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
6344 *mult_val
= const0_rtx
;
6351 return basic_induction_var (loop
, XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
6352 dest_reg
, p
, inc_val
, mult_val
, location
);
6355 /* Similar, since this can be a sign extension. */
6356 for (insn
= PREV_INSN (p
);
6357 (insn
&& GET_CODE (insn
) == NOTE
6358 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
6359 insn
= PREV_INSN (insn
))
6363 set
= single_set (insn
);
6365 if (! rtx_equal_p (dest_reg
, XEXP (x
, 0))
6366 && set
&& SET_DEST (set
) == XEXP (x
, 0)
6367 && GET_CODE (XEXP (x
, 1)) == CONST_INT
6368 && INTVAL (XEXP (x
, 1)) >= 0
6369 && GET_CODE (SET_SRC (set
)) == ASHIFT
6370 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
6371 return basic_induction_var (loop
, XEXP (SET_SRC (set
), 0),
6372 GET_MODE (XEXP (x
, 0)),
6373 dest_reg
, insn
, inc_val
, mult_val
,
6382 /* A general induction variable (giv) is any quantity that is a linear
6383 function of a basic induction variable,
6384 i.e. giv = biv * mult_val + add_val.
6385 The coefficients can be any loop invariant quantity.
6386 A giv need not be computed directly from the biv;
6387 it can be computed by way of other givs. */
6389 /* Determine whether X computes a giv.
6390 If it does, return a nonzero value
6391 which is the benefit from eliminating the computation of X;
6392 set *SRC_REG to the register of the biv that it is computed from;
6393 set *ADD_VAL and *MULT_VAL to the coefficients,
6394 such that the value of X is biv * mult + add; */
6397 general_induction_var (loop
, x
, src_reg
, add_val
, mult_val
, ext_val
,
6398 is_addr
, pbenefit
, addr_mode
)
6399 const struct loop
*loop
;
6407 enum machine_mode addr_mode
;
6409 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6412 /* If this is an invariant, forget it, it isn't a giv. */
6413 if (loop_invariant_p (loop
, x
) == 1)
6417 *ext_val
= NULL_RTX
;
6418 x
= simplify_giv_expr (loop
, x
, ext_val
, pbenefit
);
6422 switch (GET_CODE (x
))
6426 /* Since this is now an invariant and wasn't before, it must be a giv
6427 with MULT_VAL == 0. It doesn't matter which BIV we associate this
6429 *src_reg
= ivs
->list
->biv
->dest_reg
;
6430 *mult_val
= const0_rtx
;
6435 /* This is equivalent to a BIV. */
6437 *mult_val
= const1_rtx
;
6438 *add_val
= const0_rtx
;
6442 /* Either (plus (biv) (invar)) or
6443 (plus (mult (biv) (invar_1)) (invar_2)). */
6444 if (GET_CODE (XEXP (x
, 0)) == MULT
)
6446 *src_reg
= XEXP (XEXP (x
, 0), 0);
6447 *mult_val
= XEXP (XEXP (x
, 0), 1);
6451 *src_reg
= XEXP (x
, 0);
6452 *mult_val
= const1_rtx
;
6454 *add_val
= XEXP (x
, 1);
6458 /* ADD_VAL is zero. */
6459 *src_reg
= XEXP (x
, 0);
6460 *mult_val
= XEXP (x
, 1);
6461 *add_val
= const0_rtx
;
6468 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
6469 unless they are CONST_INT). */
6470 if (GET_CODE (*add_val
) == USE
)
6471 *add_val
= XEXP (*add_val
, 0);
6472 if (GET_CODE (*mult_val
) == USE
)
6473 *mult_val
= XEXP (*mult_val
, 0);
6476 *pbenefit
+= address_cost (orig_x
, addr_mode
) - reg_address_cost
;
6478 *pbenefit
+= rtx_cost (orig_x
, SET
);
6480 /* Always return true if this is a giv so it will be detected as such,
6481 even if the benefit is zero or negative. This allows elimination
6482 of bivs that might otherwise not be eliminated. */
6486 /* Given an expression, X, try to form it as a linear function of a biv.
6487 We will canonicalize it to be of the form
6488 (plus (mult (BIV) (invar_1))
6490 with possible degeneracies.
6492 The invariant expressions must each be of a form that can be used as a
6493 machine operand. We surround then with a USE rtx (a hack, but localized
6494 and certainly unambiguous!) if not a CONST_INT for simplicity in this
6495 routine; it is the caller's responsibility to strip them.
6497 If no such canonicalization is possible (i.e., two biv's are used or an
6498 expression that is neither invariant nor a biv or giv), this routine
6501 For a nonzero return, the result will have a code of CONST_INT, USE,
6502 REG (for a BIV), PLUS, or MULT. No other codes will occur.
6504 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
6506 static rtx sge_plus
PARAMS ((enum machine_mode
, rtx
, rtx
));
6507 static rtx sge_plus_constant
PARAMS ((rtx
, rtx
));
6510 simplify_giv_expr (loop
, x
, ext_val
, benefit
)
6511 const struct loop
*loop
;
6516 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
6517 struct loop_regs
*regs
= LOOP_REGS (loop
);
6518 enum machine_mode mode
= GET_MODE (x
);
6522 /* If this is not an integer mode, or if we cannot do arithmetic in this
6523 mode, this can't be a giv. */
6524 if (mode
!= VOIDmode
6525 && (GET_MODE_CLASS (mode
) != MODE_INT
6526 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
6529 switch (GET_CODE (x
))
6532 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
6533 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
6534 if (arg0
== 0 || arg1
== 0)
6537 /* Put constant last, CONST_INT last if both constant. */
6538 if ((GET_CODE (arg0
) == USE
6539 || GET_CODE (arg0
) == CONST_INT
)
6540 && ! ((GET_CODE (arg0
) == USE
6541 && GET_CODE (arg1
) == USE
)
6542 || GET_CODE (arg1
) == CONST_INT
))
6543 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6545 /* Handle addition of zero, then addition of an invariant. */
6546 if (arg1
== const0_rtx
)
6548 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
6549 switch (GET_CODE (arg0
))
6553 /* Adding two invariants must result in an invariant, so enclose
6554 addition operation inside a USE and return it. */
6555 if (GET_CODE (arg0
) == USE
)
6556 arg0
= XEXP (arg0
, 0);
6557 if (GET_CODE (arg1
) == USE
)
6558 arg1
= XEXP (arg1
, 0);
6560 if (GET_CODE (arg0
) == CONST_INT
)
6561 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6562 if (GET_CODE (arg1
) == CONST_INT
)
6563 tem
= sge_plus_constant (arg0
, arg1
);
6565 tem
= sge_plus (mode
, arg0
, arg1
);
6567 if (GET_CODE (tem
) != CONST_INT
)
6568 tem
= gen_rtx_USE (mode
, tem
);
6573 /* biv + invar or mult + invar. Return sum. */
6574 return gen_rtx_PLUS (mode
, arg0
, arg1
);
6577 /* (a + invar_1) + invar_2. Associate. */
6579 simplify_giv_expr (loop
,
6591 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
6592 MULT to reduce cases. */
6593 if (GET_CODE (arg0
) == REG
)
6594 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
6595 if (GET_CODE (arg1
) == REG
)
6596 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
6598 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
6599 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
6600 Recurse to associate the second PLUS. */
6601 if (GET_CODE (arg1
) == MULT
)
6602 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6604 if (GET_CODE (arg1
) == PLUS
)
6606 simplify_giv_expr (loop
,
6608 gen_rtx_PLUS (mode
, arg0
,
6613 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
6614 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
6617 if (!rtx_equal_p (arg0
, arg1
))
6620 return simplify_giv_expr (loop
,
6629 /* Handle "a - b" as "a + b * (-1)". */
6630 return simplify_giv_expr (loop
,
6639 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
6640 arg1
= simplify_giv_expr (loop
, XEXP (x
, 1), ext_val
, benefit
);
6641 if (arg0
== 0 || arg1
== 0)
6644 /* Put constant last, CONST_INT last if both constant. */
6645 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
6646 && GET_CODE (arg1
) != CONST_INT
)
6647 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
6649 /* If second argument is not now constant, not giv. */
6650 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
6653 /* Handle multiply by 0 or 1. */
6654 if (arg1
== const0_rtx
)
6657 else if (arg1
== const1_rtx
)
6660 switch (GET_CODE (arg0
))
6663 /* biv * invar. Done. */
6664 return gen_rtx_MULT (mode
, arg0
, arg1
);
6667 /* Product of two constants. */
6668 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
6671 /* invar * invar is a giv, but attempt to simplify it somehow. */
6672 if (GET_CODE (arg1
) != CONST_INT
)
6675 arg0
= XEXP (arg0
, 0);
6676 if (GET_CODE (arg0
) == MULT
)
6678 /* (invar_0 * invar_1) * invar_2. Associate. */
6679 return simplify_giv_expr (loop
,
6688 /* Porpagate the MULT expressions to the intermost nodes. */
6689 else if (GET_CODE (arg0
) == PLUS
)
6691 /* (invar_0 + invar_1) * invar_2. Distribute. */
6692 return simplify_giv_expr (loop
,
6704 return gen_rtx_USE (mode
, gen_rtx_MULT (mode
, arg0
, arg1
));
6707 /* (a * invar_1) * invar_2. Associate. */
6708 return simplify_giv_expr (loop
,
6717 /* (a + invar_1) * invar_2. Distribute. */
6718 return simplify_giv_expr (loop
,
6733 /* Shift by constant is multiply by power of two. */
6734 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
6738 simplify_giv_expr (loop
,
6741 GEN_INT ((HOST_WIDE_INT
) 1
6742 << INTVAL (XEXP (x
, 1)))),
6746 /* "-a" is "a * (-1)" */
6747 return simplify_giv_expr (loop
,
6748 gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
6752 /* "~a" is "-a - 1". Silly, but easy. */
6753 return simplify_giv_expr (loop
,
6754 gen_rtx_MINUS (mode
,
6755 gen_rtx_NEG (mode
, XEXP (x
, 0)),
6760 /* Already in proper form for invariant. */
6766 /* Conditionally recognize extensions of simple IVs. After we've
6767 computed loop traversal counts and verified the range of the
6768 source IV, we'll reevaluate this as a GIV. */
6769 if (*ext_val
== NULL_RTX
)
6771 arg0
= simplify_giv_expr (loop
, XEXP (x
, 0), ext_val
, benefit
);
6772 if (arg0
&& *ext_val
== NULL_RTX
&& GET_CODE (arg0
) == REG
)
6774 *ext_val
= gen_rtx_fmt_e (GET_CODE (x
), mode
, arg0
);
6781 /* If this is a new register, we can't deal with it. */
6782 if (REGNO (x
) >= max_reg_before_loop
)
6785 /* Check for biv or giv. */
6786 switch (REG_IV_TYPE (ivs
, REGNO (x
)))
6790 case GENERAL_INDUCT
:
6792 struct induction
*v
= REG_IV_INFO (ivs
, REGNO (x
));
6794 /* Form expression from giv and add benefit. Ensure this giv
6795 can derive another and subtract any needed adjustment if so. */
6797 /* Increasing the benefit here is risky. The only case in which it
6798 is arguably correct is if this is the only use of V. In other
6799 cases, this will artificially inflate the benefit of the current
6800 giv, and lead to suboptimal code. Thus, it is disabled, since
6801 potentially not reducing an only marginally beneficial giv is
6802 less harmful than reducing many givs that are not really
6805 rtx single_use
= regs
->array
[REGNO (x
)].single_usage
;
6806 if (single_use
&& single_use
!= const0_rtx
)
6807 *benefit
+= v
->benefit
;
6813 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
,
6814 v
->src_reg
, v
->mult_val
),
6817 if (v
->derive_adjustment
)
6818 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
6819 arg0
= simplify_giv_expr (loop
, tem
, ext_val
, benefit
);
6822 if (!v
->ext_dependent
)
6827 *ext_val
= v
->ext_dependent
;
6835 /* If it isn't an induction variable, and it is invariant, we
6836 may be able to simplify things further by looking through
6837 the bits we just moved outside the loop. */
6838 if (loop_invariant_p (loop
, x
) == 1)
6841 struct loop_movables
*movables
= LOOP_MOVABLES (loop
);
6843 for (m
= movables
->head
; m
; m
= m
->next
)
6844 if (rtx_equal_p (x
, m
->set_dest
))
6846 /* Ok, we found a match. Substitute and simplify. */
6848 /* If we match another movable, we must use that, as
6849 this one is going away. */
6851 return simplify_giv_expr (loop
, m
->match
->set_dest
,
6854 /* If consec is nonzero, this is a member of a group of
6855 instructions that were moved together. We handle this
6856 case only to the point of seeking to the last insn and
6857 looking for a REG_EQUAL. Fail if we don't find one. */
6864 tem
= NEXT_INSN (tem
);
6868 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
6870 tem
= XEXP (tem
, 0);
6874 tem
= single_set (m
->insn
);
6876 tem
= SET_SRC (tem
);
6881 /* What we are most interested in is pointer
6882 arithmetic on invariants -- only take
6883 patterns we may be able to do something with. */
6884 if (GET_CODE (tem
) == PLUS
6885 || GET_CODE (tem
) == MULT
6886 || GET_CODE (tem
) == ASHIFT
6887 || GET_CODE (tem
) == CONST_INT
6888 || GET_CODE (tem
) == SYMBOL_REF
)
6890 tem
= simplify_giv_expr (loop
, tem
, ext_val
,
6895 else if (GET_CODE (tem
) == CONST
6896 && GET_CODE (XEXP (tem
, 0)) == PLUS
6897 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
6898 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
6900 tem
= simplify_giv_expr (loop
, XEXP (tem
, 0),
6912 /* Fall through to general case. */
6914 /* If invariant, return as USE (unless CONST_INT).
6915 Otherwise, not giv. */
6916 if (GET_CODE (x
) == USE
)
6919 if (loop_invariant_p (loop
, x
) == 1)
6921 if (GET_CODE (x
) == CONST_INT
)
6923 if (GET_CODE (x
) == CONST
6924 && GET_CODE (XEXP (x
, 0)) == PLUS
6925 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
6926 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
6928 return gen_rtx_USE (mode
, x
);
6935 /* This routine folds invariants such that there is only ever one
6936 CONST_INT in the summation. It is only used by simplify_giv_expr. */
6939 sge_plus_constant (x
, c
)
6942 if (GET_CODE (x
) == CONST_INT
)
6943 return GEN_INT (INTVAL (x
) + INTVAL (c
));
6944 else if (GET_CODE (x
) != PLUS
)
6945 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
6946 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
6948 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
6949 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
6951 else if (GET_CODE (XEXP (x
, 0)) == PLUS
6952 || GET_CODE (XEXP (x
, 1)) != PLUS
)
6954 return gen_rtx_PLUS (GET_MODE (x
),
6955 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
6959 return gen_rtx_PLUS (GET_MODE (x
),
6960 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
6965 sge_plus (mode
, x
, y
)
6966 enum machine_mode mode
;
6969 while (GET_CODE (y
) == PLUS
)
6971 rtx a
= XEXP (y
, 0);
6972 if (GET_CODE (a
) == CONST_INT
)
6973 x
= sge_plus_constant (x
, a
);
6975 x
= gen_rtx_PLUS (mode
, x
, a
);
6978 if (GET_CODE (y
) == CONST_INT
)
6979 x
= sge_plus_constant (x
, y
);
6981 x
= gen_rtx_PLUS (mode
, x
, y
);
6985 /* Help detect a giv that is calculated by several consecutive insns;
6989 The caller has already identified the first insn P as having a giv as dest;
6990 we check that all other insns that set the same register follow
6991 immediately after P, that they alter nothing else,
6992 and that the result of the last is still a giv.
6994 The value is 0 if the reg set in P is not really a giv.
6995 Otherwise, the value is the amount gained by eliminating
6996 all the consecutive insns that compute the value.
6998 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6999 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
7001 The coefficients of the ultimate giv value are stored in
7002 *MULT_VAL and *ADD_VAL. */
7005 consec_sets_giv (loop
, first_benefit
, p
, src_reg
, dest_reg
,
7006 add_val
, mult_val
, ext_val
, last_consec_insn
)
7007 const struct loop
*loop
;
7015 rtx
*last_consec_insn
;
7017 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
7018 struct loop_regs
*regs
= LOOP_REGS (loop
);
7025 /* Indicate that this is a giv so that we can update the value produced in
7026 each insn of the multi-insn sequence.
7028 This induction structure will be used only by the call to
7029 general_induction_var below, so we can allocate it on our stack.
7030 If this is a giv, our caller will replace the induct var entry with
7031 a new induction structure. */
7032 struct induction
*v
;
7034 if (REG_IV_TYPE (ivs
, REGNO (dest_reg
)) != UNKNOWN_INDUCT
)
7037 v
= (struct induction
*) alloca (sizeof (struct induction
));
7038 v
->src_reg
= src_reg
;
7039 v
->mult_val
= *mult_val
;
7040 v
->add_val
= *add_val
;
7041 v
->benefit
= first_benefit
;
7043 v
->derive_adjustment
= 0;
7044 v
->ext_dependent
= NULL_RTX
;
7046 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = GENERAL_INDUCT
;
7047 REG_IV_INFO (ivs
, REGNO (dest_reg
)) = v
;
7049 count
= regs
->array
[REGNO (dest_reg
)].n_times_set
- 1;
7054 code
= GET_CODE (p
);
7056 /* If libcall, skip to end of call sequence. */
7057 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
7061 && (set
= single_set (p
))
7062 && GET_CODE (SET_DEST (set
)) == REG
7063 && SET_DEST (set
) == dest_reg
7064 && (general_induction_var (loop
, SET_SRC (set
), &src_reg
,
7065 add_val
, mult_val
, ext_val
, 0,
7067 /* Giv created by equivalent expression. */
7068 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
7069 && general_induction_var (loop
, XEXP (temp
, 0), &src_reg
,
7070 add_val
, mult_val
, ext_val
, 0,
7071 &benefit
, VOIDmode
)))
7072 && src_reg
== v
->src_reg
)
7074 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
7075 benefit
+= libcall_benefit (p
);
7078 v
->mult_val
= *mult_val
;
7079 v
->add_val
= *add_val
;
7080 v
->benefit
+= benefit
;
7082 else if (code
!= NOTE
)
7084 /* Allow insns that set something other than this giv to a
7085 constant. Such insns are needed on machines which cannot
7086 include long constants and should not disqualify a giv. */
7088 && (set
= single_set (p
))
7089 && SET_DEST (set
) != dest_reg
7090 && CONSTANT_P (SET_SRC (set
)))
7093 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
7098 REG_IV_TYPE (ivs
, REGNO (dest_reg
)) = UNKNOWN_INDUCT
;
7099 *last_consec_insn
= p
;
7103 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7104 represented by G1. If no such expression can be found, or it is clear that
7105 it cannot possibly be a valid address, 0 is returned.
7107 To perform the computation, we note that
7110 where `v' is the biv.
7112 So G2 = (y/b) * G1 + (b - a*y/x).
7114 Note that MULT = y/x.
7116 Update: A and B are now allowed to be additive expressions such that
7117 B contains all variables in A. That is, computing B-A will not require
7118 subtracting variables. */
7121 express_from_1 (a
, b
, mult
)
7124 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
7126 if (mult
== const0_rtx
)
7129 /* If MULT is not 1, we cannot handle A with non-constants, since we
7130 would then be required to subtract multiples of the registers in A.
7131 This is theoretically possible, and may even apply to some Fortran
7132 constructs, but it is a lot of work and we do not attempt it here. */
7134 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
7137 /* In general these structures are sorted top to bottom (down the PLUS
7138 chain), but not left to right across the PLUS. If B is a higher
7139 order giv than A, we can strip one level and recurse. If A is higher
7140 order, we'll eventually bail out, but won't know that until the end.
7141 If they are the same, we'll strip one level around this loop. */
7143 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
7145 rtx ra
, rb
, oa
, ob
, tmp
;
7147 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
7148 if (GET_CODE (ra
) == PLUS
)
7149 tmp
= ra
, ra
= oa
, oa
= tmp
;
7151 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
7152 if (GET_CODE (rb
) == PLUS
)
7153 tmp
= rb
, rb
= ob
, ob
= tmp
;
7155 if (rtx_equal_p (ra
, rb
))
7156 /* We matched: remove one reg completely. */
7158 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
7159 /* An alternate match. */
7161 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
7162 /* An alternate match. */
7166 /* Indicates an extra register in B. Strip one level from B and
7167 recurse, hoping B was the higher order expression. */
7168 ob
= express_from_1 (a
, ob
, mult
);
7171 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
7175 /* Here we are at the last level of A, go through the cases hoping to
7176 get rid of everything but a constant. */
7178 if (GET_CODE (a
) == PLUS
)
7182 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
7183 if (rtx_equal_p (oa
, b
))
7185 else if (!rtx_equal_p (ra
, b
))
7188 if (GET_CODE (oa
) != CONST_INT
)
7191 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
7193 else if (GET_CODE (a
) == CONST_INT
)
7195 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
7197 else if (CONSTANT_P (a
))
7199 enum machine_mode mode_a
= GET_MODE (a
);
7200 enum machine_mode mode_b
= GET_MODE (b
);
7201 enum machine_mode mode
= mode_b
== VOIDmode
? mode_a
: mode_b
;
7202 return simplify_gen_binary (MINUS
, mode
, b
, a
);
7204 else if (GET_CODE (b
) == PLUS
)
7206 if (rtx_equal_p (a
, XEXP (b
, 0)))
7208 else if (rtx_equal_p (a
, XEXP (b
, 1)))
7213 else if (rtx_equal_p (a
, b
))
7220 express_from (g1
, g2
)
7221 struct induction
*g1
, *g2
;
7225 /* The value that G1 will be multiplied by must be a constant integer. Also,
7226 the only chance we have of getting a valid address is if b*c/a (see above
7227 for notation) is also an integer. */
7228 if (GET_CODE (g1
->mult_val
) == CONST_INT
7229 && GET_CODE (g2
->mult_val
) == CONST_INT
)
7231 if (g1
->mult_val
== const0_rtx
7232 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
7234 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
7236 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
7240 /* ??? Find out if the one is a multiple of the other? */
7244 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
7245 if (add
== NULL_RTX
)
7247 /* Failed. If we've got a multiplication factor between G1 and G2,
7248 scale G1's addend and try again. */
7249 if (INTVAL (mult
) > 1)
7251 rtx g1_add_val
= g1
->add_val
;
7252 if (GET_CODE (g1_add_val
) == MULT
7253 && GET_CODE (XEXP (g1_add_val
, 1)) == CONST_INT
)
7256 m
= INTVAL (mult
) * INTVAL (XEXP (g1_add_val
, 1));
7257 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
),
7258 XEXP (g1_add_val
, 0), GEN_INT (m
));
7262 g1_add_val
= gen_rtx_MULT (GET_MODE (g1_add_val
), g1_add_val
,
7266 add
= express_from_1 (g1_add_val
, g2
->add_val
, const1_rtx
);
7269 if (add
== NULL_RTX
)
7272 /* Form simplified final result. */
7273 if (mult
== const0_rtx
)
7275 else if (mult
== const1_rtx
)
7276 mult
= g1
->dest_reg
;
7278 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
7280 if (add
== const0_rtx
)
7284 if (GET_CODE (add
) == PLUS
7285 && CONSTANT_P (XEXP (add
, 1)))
7287 rtx tem
= XEXP (add
, 1);
7288 mult
= gen_rtx_PLUS (g2
->mode
, mult
, XEXP (add
, 0));
7292 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
7296 /* Return an rtx, if any, that expresses giv G2 as a function of the register
7297 represented by G1. This indicates that G2 should be combined with G1 and
7298 that G2 can use (either directly or via an address expression) a register
7299 used to represent G1. */
7302 combine_givs_p (g1
, g2
)
7303 struct induction
*g1
, *g2
;
7307 /* With the introduction of ext dependent givs, we must care for modes.
7308 G2 must not use a wider mode than G1. */
7309 if (GET_MODE_SIZE (g1
->mode
) < GET_MODE_SIZE (g2
->mode
))
7312 ret
= comb
= express_from (g1
, g2
);
7313 if (comb
== NULL_RTX
)
7315 if (g1
->mode
!= g2
->mode
)
7316 ret
= gen_lowpart (g2
->mode
, comb
);
7318 /* If these givs are identical, they can be combined. We use the results
7319 of express_from because the addends are not in a canonical form, so
7320 rtx_equal_p is a weaker test. */
7321 /* But don't combine a DEST_REG giv with a DEST_ADDR giv; we want the
7322 combination to be the other way round. */
7323 if (comb
== g1
->dest_reg
7324 && (g1
->giv_type
== DEST_REG
|| g2
->giv_type
== DEST_ADDR
))
7329 /* If G2 can be expressed as a function of G1 and that function is valid
7330 as an address and no more expensive than using a register for G2,
7331 the expression of G2 in terms of G1 can be used. */
7333 && g2
->giv_type
== DEST_ADDR
7334 && memory_address_p (GET_MODE (g2
->mem
), ret
)
7335 /* ??? Looses, especially with -fforce-addr, where *g2->location
7336 will always be a register, and so anything more complicated
7340 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
)
7342 && rtx_cost (tem
, MEM
) <= rtx_cost (*g2
->location
, MEM
)
7353 /* Check each extension dependent giv in this class to see if its
7354 root biv is safe from wrapping in the interior mode, which would
7355 make the giv illegal. */
7358 check_ext_dependent_givs (bl
, loop_info
)
7359 struct iv_class
*bl
;
7360 struct loop_info
*loop_info
;
7362 int ze_ok
= 0, se_ok
= 0, info_ok
= 0;
7363 enum machine_mode biv_mode
= GET_MODE (bl
->biv
->src_reg
);
7364 HOST_WIDE_INT start_val
;
7365 unsigned HOST_WIDE_INT u_end_val
= 0;
7366 unsigned HOST_WIDE_INT u_start_val
= 0;
7368 struct induction
*v
;
7370 /* Make sure the iteration data is available. We must have
7371 constants in order to be certain of no overflow. */
7372 /* ??? An unknown iteration count with an increment of +-1
7373 combined with friendly exit tests of against an invariant
7374 value is also ameanable to optimization. Not implemented. */
7375 if (loop_info
->n_iterations
> 0
7376 && bl
->initial_value
7377 && GET_CODE (bl
->initial_value
) == CONST_INT
7378 && (incr
= biv_total_increment (bl
))
7379 && GET_CODE (incr
) == CONST_INT
7380 /* Make sure the host can represent the arithmetic. */
7381 && HOST_BITS_PER_WIDE_INT
>= GET_MODE_BITSIZE (biv_mode
))
7383 unsigned HOST_WIDE_INT abs_incr
, total_incr
;
7384 HOST_WIDE_INT s_end_val
;
7388 start_val
= INTVAL (bl
->initial_value
);
7389 u_start_val
= start_val
;
7391 neg_incr
= 0, abs_incr
= INTVAL (incr
);
7392 if (INTVAL (incr
) < 0)
7393 neg_incr
= 1, abs_incr
= -abs_incr
;
7394 total_incr
= abs_incr
* loop_info
->n_iterations
;
7396 /* Check for host arithmatic overflow. */
7397 if (total_incr
/ loop_info
->n_iterations
== abs_incr
)
7399 unsigned HOST_WIDE_INT u_max
;
7400 HOST_WIDE_INT s_max
;
7402 u_end_val
= start_val
+ (neg_incr
? -total_incr
: total_incr
);
7403 s_end_val
= u_end_val
;
7404 u_max
= GET_MODE_MASK (biv_mode
);
7407 /* Check zero extension of biv ok. */
7409 /* Check for host arithmatic overflow. */
7411 ? u_end_val
< u_start_val
7412 : u_end_val
> u_start_val
)
7413 /* Check for target arithmetic overflow. */
7415 ? 1 /* taken care of with host overflow */
7416 : u_end_val
<= u_max
))
7421 /* Check sign extension of biv ok. */
7422 /* ??? While it is true that overflow with signed and pointer
7423 arithmetic is undefined, I fear too many programmers don't
7424 keep this fact in mind -- myself included on occasion.
7425 So leave alone with the signed overflow optimizations. */
7426 if (start_val
>= -s_max
- 1
7427 /* Check for host arithmatic overflow. */
7429 ? s_end_val
< start_val
7430 : s_end_val
> start_val
)
7431 /* Check for target arithmetic overflow. */
7433 ? s_end_val
>= -s_max
- 1
7434 : s_end_val
<= s_max
))
7441 /* Invalidate givs that fail the tests. */
7442 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7443 if (v
->ext_dependent
)
7445 enum rtx_code code
= GET_CODE (v
->ext_dependent
);
7458 /* We don't know whether this value is being used as either
7459 signed or unsigned, so to safely truncate we must satisfy
7460 both. The initial check here verifies the BIV itself;
7461 once that is successful we may check its range wrt the
7465 enum machine_mode outer_mode
= GET_MODE (v
->ext_dependent
);
7466 unsigned HOST_WIDE_INT max
= GET_MODE_MASK (outer_mode
) >> 1;
7468 /* We know from the above that both endpoints are nonnegative,
7469 and that there is no wrapping. Verify that both endpoints
7470 are within the (signed) range of the outer mode. */
7471 if (u_start_val
<= max
&& u_end_val
<= max
)
7482 if (loop_dump_stream
)
7484 fprintf (loop_dump_stream
,
7485 "Verified ext dependent giv at %d of reg %d\n",
7486 INSN_UID (v
->insn
), bl
->regno
);
7491 if (loop_dump_stream
)
7496 why
= "biv iteration values overflowed";
7500 incr
= biv_total_increment (bl
);
7501 if (incr
== const1_rtx
)
7502 why
= "biv iteration info incomplete; incr by 1";
7504 why
= "biv iteration info incomplete";
7507 fprintf (loop_dump_stream
,
7508 "Failed ext dependent giv at %d, %s\n",
7509 INSN_UID (v
->insn
), why
);
7512 bl
->all_reduced
= 0;
7517 /* Generate a version of VALUE in a mode appropriate for initializing V. */
7520 extend_value_for_giv (v
, value
)
7521 struct induction
*v
;
7524 rtx ext_dep
= v
->ext_dependent
;
7529 /* Recall that check_ext_dependent_givs verified that the known bounds
7530 of a biv did not overflow or wrap with respect to the extension for
7531 the giv. Therefore, constants need no additional adjustment. */
7532 if (CONSTANT_P (value
) && GET_MODE (value
) == VOIDmode
)
7535 /* Otherwise, we must adjust the value to compensate for the
7536 differing modes of the biv and the giv. */
7537 return gen_rtx_fmt_e (GET_CODE (ext_dep
), GET_MODE (ext_dep
), value
);
7540 struct combine_givs_stats
7547 cmp_combine_givs_stats (xp
, yp
)
7551 const struct combine_givs_stats
* const x
=
7552 (const struct combine_givs_stats
*) xp
;
7553 const struct combine_givs_stats
* const y
=
7554 (const struct combine_givs_stats
*) yp
;
7556 d
= y
->total_benefit
- x
->total_benefit
;
7557 /* Stabilize the sort. */
7559 d
= x
->giv_number
- y
->giv_number
;
7563 /* Check all pairs of givs for iv_class BL and see if any can be combined with
7564 any other. If so, point SAME to the giv combined with and set NEW_REG to
7565 be an expression (in terms of the other giv's DEST_REG) equivalent to the
7566 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
7569 combine_givs (regs
, bl
)
7570 struct loop_regs
*regs
;
7571 struct iv_class
*bl
;
7573 /* Additional benefit to add for being combined multiple times. */
7574 const int extra_benefit
= 3;
7576 struct induction
*g1
, *g2
, **giv_array
;
7577 int i
, j
, k
, giv_count
;
7578 struct combine_givs_stats
*stats
;
7581 /* Count givs, because bl->giv_count is incorrect here. */
7583 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7588 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
7590 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
7592 giv_array
[i
++] = g1
;
7594 stats
= (struct combine_givs_stats
*) xcalloc (giv_count
, sizeof (*stats
));
7595 can_combine
= (rtx
*) xcalloc (giv_count
, giv_count
* sizeof (rtx
));
7597 for (i
= 0; i
< giv_count
; i
++)
7603 stats
[i
].giv_number
= i
;
7605 /* If a DEST_REG GIV is used only once, do not allow it to combine
7606 with anything, for in doing so we will gain nothing that cannot
7607 be had by simply letting the GIV with which we would have combined
7608 to be reduced on its own. The losage shows up in particular with
7609 DEST_ADDR targets on hosts with reg+reg addressing, though it can
7610 be seen elsewhere as well. */
7611 if (g1
->giv_type
== DEST_REG
7612 && (single_use
= regs
->array
[REGNO (g1
->dest_reg
)].single_usage
)
7613 && single_use
!= const0_rtx
)
7616 this_benefit
= g1
->benefit
;
7617 /* Add an additional weight for zero addends. */
7618 if (g1
->no_const_addval
)
7621 for (j
= 0; j
< giv_count
; j
++)
7627 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
7629 can_combine
[i
* giv_count
+ j
] = this_combine
;
7630 this_benefit
+= g2
->benefit
+ extra_benefit
;
7633 stats
[i
].total_benefit
= this_benefit
;
7636 /* Iterate, combining until we can't. */
7638 qsort (stats
, giv_count
, sizeof (*stats
), cmp_combine_givs_stats
);
7640 if (loop_dump_stream
)
7642 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
7643 for (k
= 0; k
< giv_count
; k
++)
7645 g1
= giv_array
[stats
[k
].giv_number
];
7646 if (!g1
->combined_with
&& !g1
->same
)
7647 fprintf (loop_dump_stream
, " {%d, %d}",
7648 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
7649 stats
[k
].total_benefit
);
7651 putc ('\n', loop_dump_stream
);
7654 for (k
= 0; k
< giv_count
; k
++)
7656 int g1_add_benefit
= 0;
7658 i
= stats
[k
].giv_number
;
7661 /* If it has already been combined, skip. */
7662 if (g1
->combined_with
|| g1
->same
)
7665 for (j
= 0; j
< giv_count
; j
++)
7668 if (g1
!= g2
&& can_combine
[i
* giv_count
+ j
]
7669 /* If it has already been combined, skip. */
7670 && ! g2
->same
&& ! g2
->combined_with
)
7674 g2
->new_reg
= can_combine
[i
* giv_count
+ j
];
7676 /* For destination, we now may replace by mem expression instead
7677 of register. This changes the costs considerably, so add the
7679 if (g2
->giv_type
== DEST_ADDR
)
7680 g2
->benefit
= (g2
->benefit
+ reg_address_cost
7681 - address_cost (g2
->new_reg
,
7682 GET_MODE (g2
->mem
)));
7683 g1
->combined_with
++;
7684 g1
->lifetime
+= g2
->lifetime
;
7686 g1_add_benefit
+= g2
->benefit
;
7688 /* ??? The new final_[bg]iv_value code does a much better job
7689 of finding replaceable giv's, and hence this code may no
7690 longer be necessary. */
7691 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
7692 g1_add_benefit
-= copy_cost
;
7694 /* To help optimize the next set of combinations, remove
7695 this giv from the benefits of other potential mates. */
7696 for (l
= 0; l
< giv_count
; ++l
)
7698 int m
= stats
[l
].giv_number
;
7699 if (can_combine
[m
* giv_count
+ j
])
7700 stats
[l
].total_benefit
-= g2
->benefit
+ extra_benefit
;
7703 if (loop_dump_stream
)
7704 fprintf (loop_dump_stream
,
7705 "giv at %d combined with giv at %d; new benefit %d + %d, lifetime %d\n",
7706 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
),
7707 g1
->benefit
, g1_add_benefit
, g1
->lifetime
);
7711 /* To help optimize the next set of combinations, remove
7712 this giv from the benefits of other potential mates. */
7713 if (g1
->combined_with
)
7715 for (j
= 0; j
< giv_count
; ++j
)
7717 int m
= stats
[j
].giv_number
;
7718 if (can_combine
[m
* giv_count
+ i
])
7719 stats
[j
].total_benefit
-= g1
->benefit
+ extra_benefit
;
7722 g1
->benefit
+= g1_add_benefit
;
7724 /* We've finished with this giv, and everything it touched.
7725 Restart the combination so that proper weights for the
7726 rest of the givs are properly taken into account. */
7727 /* ??? Ideally we would compact the arrays at this point, so
7728 as to not cover old ground. But sanely compacting
7729 can_combine is tricky. */
7739 /* Generate sequence for REG = B * M + A. */
7742 gen_add_mult (b
, m
, a
, reg
)
7743 rtx b
; /* initial value of basic induction variable */
7744 rtx m
; /* multiplicative constant */
7745 rtx a
; /* additive constant */
7746 rtx reg
; /* destination register */
7752 /* Use unsigned arithmetic. */
7753 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
7755 emit_move_insn (reg
, result
);
7763 /* Update registers created in insn sequence SEQ. */
7766 loop_regs_update (loop
, seq
)
7767 const struct loop
*loop ATTRIBUTE_UNUSED
;
7772 /* Update register info for alias analysis. */
7774 if (seq
== NULL_RTX
)
7780 while (insn
!= NULL_RTX
)
7782 rtx set
= single_set (insn
);
7784 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
7785 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
7787 insn
= NEXT_INSN (insn
);
7790 else if (GET_CODE (seq
) == SET
7791 && GET_CODE (SET_DEST (seq
)) == REG
)
7792 record_base_value (REGNO (SET_DEST (seq
)), SET_SRC (seq
), 0);
7796 /* EMIT code before BEFORE_BB/BEFORE_INSN to set REG = B * M + A. */
7799 loop_iv_add_mult_emit_before (loop
, b
, m
, a
, reg
, before_bb
, before_insn
)
7800 const struct loop
*loop
;
7801 rtx b
; /* initial value of basic induction variable */
7802 rtx m
; /* multiplicative constant */
7803 rtx a
; /* additive constant */
7804 rtx reg
; /* destination register */
7805 basic_block before_bb
;
7812 loop_iv_add_mult_hoist (loop
, b
, m
, a
, reg
);
7816 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7817 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
7819 /* Increase the lifetime of any invariants moved further in code. */
7820 update_reg_last_use (a
, before_insn
);
7821 update_reg_last_use (b
, before_insn
);
7822 update_reg_last_use (m
, before_insn
);
7824 loop_insn_emit_before (loop
, before_bb
, before_insn
, seq
);
7826 /* It is possible that the expansion created lots of new registers.
7827 Iterate over the sequence we just created and record them all. */
7828 loop_regs_update (loop
, seq
);
7832 /* Emit insns in loop pre-header to set REG = B * M + A. */
7835 loop_iv_add_mult_sink (loop
, b
, m
, a
, reg
)
7836 const struct loop
*loop
;
7837 rtx b
; /* initial value of basic induction variable */
7838 rtx m
; /* multiplicative constant */
7839 rtx a
; /* additive constant */
7840 rtx reg
; /* destination register */
7844 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7845 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
7847 /* Increase the lifetime of any invariants moved further in code.
7848 ???? Is this really necessary? */
7849 update_reg_last_use (a
, loop
->sink
);
7850 update_reg_last_use (b
, loop
->sink
);
7851 update_reg_last_use (m
, loop
->sink
);
7853 loop_insn_sink (loop
, seq
);
7855 /* It is possible that the expansion created lots of new registers.
7856 Iterate over the sequence we just created and record them all. */
7857 loop_regs_update (loop
, seq
);
7861 /* Emit insns after loop to set REG = B * M + A. */
7864 loop_iv_add_mult_hoist (loop
, b
, m
, a
, reg
)
7865 const struct loop
*loop
;
7866 rtx b
; /* initial value of basic induction variable */
7867 rtx m
; /* multiplicative constant */
7868 rtx a
; /* additive constant */
7869 rtx reg
; /* destination register */
7873 /* Use copy_rtx to prevent unexpected sharing of these rtx. */
7874 seq
= gen_add_mult (copy_rtx (b
), copy_rtx (m
), copy_rtx (a
), reg
);
7876 loop_insn_hoist (loop
, seq
);
7878 /* It is possible that the expansion created lots of new registers.
7879 Iterate over the sequence we just created and record them all. */
7880 loop_regs_update (loop
, seq
);
7885 /* Similar to gen_add_mult, but compute cost rather than generating
7889 iv_add_mult_cost (b
, m
, a
, reg
)
7890 rtx b
; /* initial value of basic induction variable */
7891 rtx m
; /* multiplicative constant */
7892 rtx a
; /* additive constant */
7893 rtx reg
; /* destination register */
7899 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 1);
7901 emit_move_insn (reg
, result
);
7902 last
= get_last_insn ();
7905 rtx t
= single_set (last
);
7907 cost
+= rtx_cost (SET_SRC (t
), SET
);
7908 last
= PREV_INSN (last
);
7914 /* Test whether A * B can be computed without
7915 an actual multiply insn. Value is 1 if so.
7917 ??? This function stinks because it generates a ton of wasted RTL
7918 ??? and as a result fragments GC memory to no end. There are other
7919 ??? places in the compiler which are invoked a lot and do the same
7920 ??? thing, generate wasted RTL just to see if something is possible. */
7923 product_cheap_p (a
, b
)
7930 /* If only one is constant, make it B. */
7931 if (GET_CODE (a
) == CONST_INT
)
7932 tmp
= a
, a
= b
, b
= tmp
;
7934 /* If first constant, both constant, so don't need multiply. */
7935 if (GET_CODE (a
) == CONST_INT
)
7938 /* If second not constant, neither is constant, so would need multiply. */
7939 if (GET_CODE (b
) != CONST_INT
)
7942 /* One operand is constant, so might not need multiply insn. Generate the
7943 code for the multiply and see if a call or multiply, or long sequence
7944 of insns is generated. */
7947 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 1);
7955 while (tmp
!= NULL_RTX
)
7957 rtx next
= NEXT_INSN (tmp
);
7960 || GET_CODE (tmp
) != INSN
7961 || (GET_CODE (PATTERN (tmp
)) == SET
7962 && GET_CODE (SET_SRC (PATTERN (tmp
))) == MULT
)
7963 || (GET_CODE (PATTERN (tmp
)) == PARALLEL
7964 && GET_CODE (XVECEXP (PATTERN (tmp
), 0, 0)) == SET
7965 && GET_CODE (SET_SRC (XVECEXP (PATTERN (tmp
), 0, 0))) == MULT
))
7974 else if (GET_CODE (tmp
) == SET
7975 && GET_CODE (SET_SRC (tmp
)) == MULT
)
7977 else if (GET_CODE (tmp
) == PARALLEL
7978 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
7979 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
7985 /* Check to see if loop can be terminated by a "decrement and branch until
7986 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
7987 Also try reversing an increment loop to a decrement loop
7988 to see if the optimization can be performed.
7989 Value is nonzero if optimization was performed. */
7991 /* This is useful even if the architecture doesn't have such an insn,
7992 because it might change a loops which increments from 0 to n to a loop
7993 which decrements from n to 0. A loop that decrements to zero is usually
7994 faster than one that increments from zero. */
7996 /* ??? This could be rewritten to use some of the loop unrolling procedures,
7997 such as approx_final_value, biv_total_increment, loop_iterations, and
7998 final_[bg]iv_value. */
8001 check_dbra_loop (loop
, insn_count
)
8005 struct loop_info
*loop_info
= LOOP_INFO (loop
);
8006 struct loop_regs
*regs
= LOOP_REGS (loop
);
8007 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
8008 struct iv_class
*bl
;
8015 rtx before_comparison
;
8019 int compare_and_branch
;
8020 rtx loop_start
= loop
->start
;
8021 rtx loop_end
= loop
->end
;
8023 /* If last insn is a conditional branch, and the insn before tests a
8024 register value, try to optimize it. Otherwise, we can't do anything. */
8026 jump
= PREV_INSN (loop_end
);
8027 comparison
= get_condition_for_loop (loop
, jump
);
8028 if (comparison
== 0)
8030 if (!onlyjump_p (jump
))
8033 /* Try to compute whether the compare/branch at the loop end is one or
8034 two instructions. */
8035 get_condition (jump
, &first_compare
);
8036 if (first_compare
== jump
)
8037 compare_and_branch
= 1;
8038 else if (first_compare
== prev_nonnote_insn (jump
))
8039 compare_and_branch
= 2;
8044 /* If more than one condition is present to control the loop, then
8045 do not proceed, as this function does not know how to rewrite
8046 loop tests with more than one condition.
8048 Look backwards from the first insn in the last comparison
8049 sequence and see if we've got another comparison sequence. */
8052 if ((jump1
= prev_nonnote_insn (first_compare
)) != loop
->cont
)
8053 if (GET_CODE (jump1
) == JUMP_INSN
)
8057 /* Check all of the bivs to see if the compare uses one of them.
8058 Skip biv's set more than once because we can't guarantee that
8059 it will be zero on the last iteration. Also skip if the biv is
8060 used between its update and the test insn. */
8062 for (bl
= ivs
->list
; bl
; bl
= bl
->next
)
8064 if (bl
->biv_count
== 1
8065 && ! bl
->biv
->maybe_multiple
8066 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
8067 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
8075 /* Look for the case where the basic induction variable is always
8076 nonnegative, and equals zero on the last iteration.
8077 In this case, add a reg_note REG_NONNEG, which allows the
8078 m68k DBRA instruction to be used. */
8080 if (((GET_CODE (comparison
) == GT
8081 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
8082 && INTVAL (XEXP (comparison
, 1)) == -1)
8083 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
8084 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
8085 && INTVAL (bl
->biv
->add_val
) < 0)
8087 /* Initial value must be greater than 0,
8088 init_val % -dec_value == 0 to ensure that it equals zero on
8089 the last iteration */
8091 if (GET_CODE (bl
->initial_value
) == CONST_INT
8092 && INTVAL (bl
->initial_value
) > 0
8093 && (INTVAL (bl
->initial_value
)
8094 % (-INTVAL (bl
->biv
->add_val
))) == 0)
8096 /* register always nonnegative, add REG_NOTE to branch */
8097 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
8099 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
8106 /* If the decrement is 1 and the value was tested as >= 0 before
8107 the loop, then we can safely optimize. */
8108 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
8110 if (GET_CODE (p
) == CODE_LABEL
)
8112 if (GET_CODE (p
) != JUMP_INSN
)
8115 before_comparison
= get_condition_for_loop (loop
, p
);
8116 if (before_comparison
8117 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
8118 && GET_CODE (before_comparison
) == LT
8119 && XEXP (before_comparison
, 1) == const0_rtx
8120 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
8121 && INTVAL (bl
->biv
->add_val
) == -1)
8123 if (! find_reg_note (jump
, REG_NONNEG
, NULL_RTX
))
8125 = gen_rtx_EXPR_LIST (REG_NONNEG
, bl
->biv
->dest_reg
,
8133 else if (GET_CODE (bl
->biv
->add_val
) == CONST_INT
8134 && INTVAL (bl
->biv
->add_val
) > 0)
8136 /* Try to change inc to dec, so can apply above optimization. */
8138 all registers modified are induction variables or invariant,
8139 all memory references have non-overlapping addresses
8140 (obviously true if only one write)
8141 allow 2 insns for the compare/jump at the end of the loop. */
8142 /* Also, we must avoid any instructions which use both the reversed
8143 biv and another biv. Such instructions will fail if the loop is
8144 reversed. We meet this condition by requiring that either
8145 no_use_except_counting is true, or else that there is only
8147 int num_nonfixed_reads
= 0;
8148 /* 1 if the iteration var is used only to count iterations. */
8149 int no_use_except_counting
= 0;
8150 /* 1 if the loop has no memory store, or it has a single memory store
8151 which is reversible. */
8152 int reversible_mem_store
= 1;
8154 if (bl
->giv_count
== 0
8155 && !loop
->exit_count
8156 && !loop_info
->has_multiple_exit_targets
)
8158 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
8159 struct iv_class
*blt
;
8161 /* If there are no givs for this biv, and the only exit is the
8162 fall through at the end of the loop, then
8163 see if perhaps there are no uses except to count. */
8164 no_use_except_counting
= 1;
8165 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8168 rtx set
= single_set (p
);
8170 if (set
&& GET_CODE (SET_DEST (set
)) == REG
8171 && REGNO (SET_DEST (set
)) == bl
->regno
)
8172 /* An insn that sets the biv is okay. */
8174 else if ((p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
8175 || p
== prev_nonnote_insn (loop_end
))
8176 && reg_mentioned_p (bivreg
, PATTERN (p
)))
8178 /* If either of these insns uses the biv and sets a pseudo
8179 that has more than one usage, then the biv has uses
8180 other than counting since it's used to derive a value
8181 that is used more than one time. */
8182 note_stores (PATTERN (p
), note_set_pseudo_multiple_uses
,
8184 if (regs
->multiple_uses
)
8186 no_use_except_counting
= 0;
8190 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
8192 no_use_except_counting
= 0;
8197 /* A biv has uses besides counting if it is used to set
8199 for (blt
= ivs
->list
; blt
; blt
= blt
->next
)
8201 && reg_mentioned_p (bivreg
, SET_SRC (blt
->init_set
)))
8203 no_use_except_counting
= 0;
8208 if (no_use_except_counting
)
8209 /* No need to worry about MEMs. */
8211 else if (loop_info
->num_mem_sets
<= 1)
8213 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8215 num_nonfixed_reads
+= count_nonfixed_reads (loop
, PATTERN (p
));
8217 /* If the loop has a single store, and the destination address is
8218 invariant, then we can't reverse the loop, because this address
8219 might then have the wrong value at loop exit.
8220 This would work if the source was invariant also, however, in that
8221 case, the insn should have been moved out of the loop. */
8223 if (loop_info
->num_mem_sets
== 1)
8225 struct induction
*v
;
8227 /* If we could prove that each of the memory locations
8228 written to was different, then we could reverse the
8229 store -- but we don't presently have any way of
8231 reversible_mem_store
= 0;
8233 /* If the store depends on a register that is set after the
8234 store, it depends on the initial value, and is thus not
8236 for (v
= bl
->giv
; reversible_mem_store
&& v
; v
= v
->next_iv
)
8238 if (v
->giv_type
== DEST_REG
8239 && reg_mentioned_p (v
->dest_reg
,
8240 PATTERN (loop_info
->first_loop_store_insn
))
8241 && loop_insn_first_p (loop_info
->first_loop_store_insn
,
8243 reversible_mem_store
= 0;
8250 /* This code only acts for innermost loops. Also it simplifies
8251 the memory address check by only reversing loops with
8252 zero or one memory access.
8253 Two memory accesses could involve parts of the same array,
8254 and that can't be reversed.
8255 If the biv is used only for counting, than we don't need to worry
8256 about all these things. */
8258 if ((num_nonfixed_reads
<= 1
8259 && ! loop_info
->has_nonconst_call
8260 && ! loop_info
->has_prefetch
8261 && ! loop_info
->has_volatile
8262 && reversible_mem_store
8263 && (bl
->giv_count
+ bl
->biv_count
+ loop_info
->num_mem_sets
8264 + num_unmoved_movables (loop
) + compare_and_branch
== insn_count
)
8265 && (bl
== ivs
->list
&& bl
->next
== 0))
8266 || (no_use_except_counting
&& ! loop_info
->has_prefetch
))
8270 /* Loop can be reversed. */
8271 if (loop_dump_stream
)
8272 fprintf (loop_dump_stream
, "Can reverse loop\n");
8274 /* Now check other conditions:
8276 The increment must be a constant, as must the initial value,
8277 and the comparison code must be LT.
8279 This test can probably be improved since +/- 1 in the constant
8280 can be obtained by changing LT to LE and vice versa; this is
8284 /* for constants, LE gets turned into LT */
8285 && (GET_CODE (comparison
) == LT
8286 || (GET_CODE (comparison
) == LE
8287 && no_use_except_counting
)))
8289 HOST_WIDE_INT add_val
, add_adjust
, comparison_val
= 0;
8290 rtx initial_value
, comparison_value
;
8292 enum rtx_code cmp_code
;
8293 int comparison_const_width
;
8294 unsigned HOST_WIDE_INT comparison_sign_mask
;
8296 add_val
= INTVAL (bl
->biv
->add_val
);
8297 comparison_value
= XEXP (comparison
, 1);
8298 if (GET_MODE (comparison_value
) == VOIDmode
)
8299 comparison_const_width
8300 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison
, 0)));
8302 comparison_const_width
8303 = GET_MODE_BITSIZE (GET_MODE (comparison_value
));
8304 if (comparison_const_width
> HOST_BITS_PER_WIDE_INT
)
8305 comparison_const_width
= HOST_BITS_PER_WIDE_INT
;
8306 comparison_sign_mask
8307 = (unsigned HOST_WIDE_INT
) 1 << (comparison_const_width
- 1);
8309 /* If the comparison value is not a loop invariant, then we
8310 can not reverse this loop.
8312 ??? If the insns which initialize the comparison value as
8313 a whole compute an invariant result, then we could move
8314 them out of the loop and proceed with loop reversal. */
8315 if (! loop_invariant_p (loop
, comparison_value
))
8318 if (GET_CODE (comparison_value
) == CONST_INT
)
8319 comparison_val
= INTVAL (comparison_value
);
8320 initial_value
= bl
->initial_value
;
8322 /* Normalize the initial value if it is an integer and
8323 has no other use except as a counter. This will allow
8324 a few more loops to be reversed. */
8325 if (no_use_except_counting
8326 && GET_CODE (comparison_value
) == CONST_INT
8327 && GET_CODE (initial_value
) == CONST_INT
)
8329 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
8330 /* The code below requires comparison_val to be a multiple
8331 of add_val in order to do the loop reversal, so
8332 round up comparison_val to a multiple of add_val.
8333 Since comparison_value is constant, we know that the
8334 current comparison code is LT. */
8335 comparison_val
= comparison_val
+ add_val
- 1;
8337 -= (unsigned HOST_WIDE_INT
) comparison_val
% add_val
;
8338 /* We postpone overflow checks for COMPARISON_VAL here;
8339 even if there is an overflow, we might still be able to
8340 reverse the loop, if converting the loop exit test to
8342 initial_value
= const0_rtx
;
8345 /* First check if we can do a vanilla loop reversal. */
8346 if (initial_value
== const0_rtx
8347 /* If we have a decrement_and_branch_on_count,
8348 prefer the NE test, since this will allow that
8349 instruction to be generated. Note that we must
8350 use a vanilla loop reversal if the biv is used to
8351 calculate a giv or has a non-counting use. */
8352 #if ! defined (HAVE_decrement_and_branch_until_zero) \
8353 && defined (HAVE_decrement_and_branch_on_count)
8354 && (! (add_val
== 1 && loop
->vtop
8355 && (bl
->biv_count
== 0
8356 || no_use_except_counting
)))
8358 && GET_CODE (comparison_value
) == CONST_INT
8359 /* Now do postponed overflow checks on COMPARISON_VAL. */
8360 && ! (((comparison_val
- add_val
) ^ INTVAL (comparison_value
))
8361 & comparison_sign_mask
))
8363 /* Register will always be nonnegative, with value
8364 0 on last iteration */
8365 add_adjust
= add_val
;
8369 else if (add_val
== 1 && loop
->vtop
8370 && (bl
->biv_count
== 0
8371 || no_use_except_counting
))
8379 if (GET_CODE (comparison
) == LE
)
8380 add_adjust
-= add_val
;
8382 /* If the initial value is not zero, or if the comparison
8383 value is not an exact multiple of the increment, then we
8384 can not reverse this loop. */
8385 if (initial_value
== const0_rtx
8386 && GET_CODE (comparison_value
) == CONST_INT
)
8388 if (((unsigned HOST_WIDE_INT
) comparison_val
% add_val
) != 0)
8393 if (! no_use_except_counting
|| add_val
!= 1)
8397 final_value
= comparison_value
;
8399 /* Reset these in case we normalized the initial value
8400 and comparison value above. */
8401 if (GET_CODE (comparison_value
) == CONST_INT
8402 && GET_CODE (initial_value
) == CONST_INT
)
8404 comparison_value
= GEN_INT (comparison_val
);
8406 = GEN_INT (comparison_val
+ INTVAL (bl
->initial_value
));
8408 bl
->initial_value
= initial_value
;
8410 /* Save some info needed to produce the new insns. */
8411 reg
= bl
->biv
->dest_reg
;
8412 jump_label
= condjump_label (PREV_INSN (loop_end
));
8413 new_add_val
= GEN_INT (-INTVAL (bl
->biv
->add_val
));
8415 /* Set start_value; if this is not a CONST_INT, we need
8417 Initialize biv to start_value before loop start.
8418 The old initializing insn will be deleted as a
8419 dead store by flow.c. */
8420 if (initial_value
== const0_rtx
8421 && GET_CODE (comparison_value
) == CONST_INT
)
8423 start_value
= GEN_INT (comparison_val
- add_adjust
);
8424 loop_insn_hoist (loop
, gen_move_insn (reg
, start_value
));
8426 else if (GET_CODE (initial_value
) == CONST_INT
)
8428 enum machine_mode mode
= GET_MODE (reg
);
8429 rtx offset
= GEN_INT (-INTVAL (initial_value
) - add_adjust
);
8430 rtx add_insn
= gen_add3_insn (reg
, comparison_value
, offset
);
8436 = gen_rtx_PLUS (mode
, comparison_value
, offset
);
8437 loop_insn_hoist (loop
, add_insn
);
8438 if (GET_CODE (comparison
) == LE
)
8439 final_value
= gen_rtx_PLUS (mode
, comparison_value
,
8442 else if (! add_adjust
)
8444 enum machine_mode mode
= GET_MODE (reg
);
8445 rtx sub_insn
= gen_sub3_insn (reg
, comparison_value
,
8451 = gen_rtx_MINUS (mode
, comparison_value
, initial_value
);
8452 loop_insn_hoist (loop
, sub_insn
);
8455 /* We could handle the other cases too, but it'll be
8456 better to have a testcase first. */
8459 /* We may not have a single insn which can increment a reg, so
8460 create a sequence to hold all the insns from expand_inc. */
8462 expand_inc (reg
, new_add_val
);
8466 p
= loop_insn_emit_before (loop
, 0, bl
->biv
->insn
, tem
);
8467 delete_insn (bl
->biv
->insn
);
8469 /* Update biv info to reflect its new status. */
8471 bl
->initial_value
= start_value
;
8472 bl
->biv
->add_val
= new_add_val
;
8474 /* Update loop info. */
8475 loop_info
->initial_value
= reg
;
8476 loop_info
->initial_equiv_value
= reg
;
8477 loop_info
->final_value
= const0_rtx
;
8478 loop_info
->final_equiv_value
= const0_rtx
;
8479 loop_info
->comparison_value
= const0_rtx
;
8480 loop_info
->comparison_code
= cmp_code
;
8481 loop_info
->increment
= new_add_val
;
8483 /* Inc LABEL_NUSES so that delete_insn will
8484 not delete the label. */
8485 LABEL_NUSES (XEXP (jump_label
, 0))++;
8487 /* Emit an insn after the end of the loop to set the biv's
8488 proper exit value if it is used anywhere outside the loop. */
8489 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
8491 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
8492 loop_insn_sink (loop
, gen_load_of_final_value (reg
, final_value
));
8494 /* Delete compare/branch at end of loop. */
8495 delete_related_insns (PREV_INSN (loop_end
));
8496 if (compare_and_branch
== 2)
8497 delete_related_insns (first_compare
);
8499 /* Add new compare/branch insn at end of loop. */
8501 emit_cmp_and_jump_insns (reg
, const0_rtx
, cmp_code
, NULL_RTX
,
8503 XEXP (jump_label
, 0));
8506 emit_jump_insn_before (tem
, loop_end
);
8508 for (tem
= PREV_INSN (loop_end
);
8509 tem
&& GET_CODE (tem
) != JUMP_INSN
;
8510 tem
= PREV_INSN (tem
))
8514 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
8520 /* Increment of LABEL_NUSES done above. */
8521 /* Register is now always nonnegative,
8522 so add REG_NONNEG note to the branch. */
8523 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, reg
,
8529 /* No insn may reference both the reversed and another biv or it
8530 will fail (see comment near the top of the loop reversal
8532 Earlier on, we have verified that the biv has no use except
8533 counting, or it is the only biv in this function.
8534 However, the code that computes no_use_except_counting does
8535 not verify reg notes. It's possible to have an insn that
8536 references another biv, and has a REG_EQUAL note with an
8537 expression based on the reversed biv. To avoid this case,
8538 remove all REG_EQUAL notes based on the reversed biv
8540 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
8544 rtx set
= single_set (p
);
8545 /* If this is a set of a GIV based on the reversed biv, any
8546 REG_EQUAL notes should still be correct. */
8548 || GET_CODE (SET_DEST (set
)) != REG
8549 || (size_t) REGNO (SET_DEST (set
)) >= ivs
->n_regs
8550 || REG_IV_TYPE (ivs
, REGNO (SET_DEST (set
))) != GENERAL_INDUCT
8551 || REG_IV_INFO (ivs
, REGNO (SET_DEST (set
)))->src_reg
!= bl
->biv
->src_reg
)
8552 for (pnote
= ®_NOTES (p
); *pnote
;)
8554 if (REG_NOTE_KIND (*pnote
) == REG_EQUAL
8555 && reg_mentioned_p (regno_reg_rtx
[bl
->regno
],
8557 *pnote
= XEXP (*pnote
, 1);
8559 pnote
= &XEXP (*pnote
, 1);
8563 /* Mark that this biv has been reversed. Each giv which depends
8564 on this biv, and which is also live past the end of the loop
8565 will have to be fixed up. */
8569 if (loop_dump_stream
)
8571 fprintf (loop_dump_stream
, "Reversed loop");
8573 fprintf (loop_dump_stream
, " and added reg_nonneg\n");
8575 fprintf (loop_dump_stream
, "\n");
8586 /* Verify whether the biv BL appears to be eliminable,
8587 based on the insns in the loop that refer to it.
8589 If ELIMINATE_P is nonzero, actually do the elimination.
8591 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
8592 determine whether invariant insns should be placed inside or at the
8593 start of the loop. */
8596 maybe_eliminate_biv (loop
, bl
, eliminate_p
, threshold
, insn_count
)
8597 const struct loop
*loop
;
8598 struct iv_class
*bl
;
8600 int threshold
, insn_count
;
8602 struct loop_ivs
*ivs
= LOOP_IVS (loop
);
8603 rtx reg
= bl
->biv
->dest_reg
;
8606 /* Scan all insns in the loop, stopping if we find one that uses the
8607 biv in a way that we cannot eliminate. */
8609 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
8611 enum rtx_code code
= GET_CODE (p
);
8612 basic_block where_bb
= 0;
8613 rtx where_insn
= threshold
>= insn_count
? 0 : p
;
8615 /* If this is a libcall that sets a giv, skip ahead to its end. */
8616 if (GET_RTX_CLASS (code
) == 'i')
8618 rtx note
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
);
8622 rtx last
= XEXP (note
, 0);
8623 rtx set
= single_set (last
);
8625 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
8627 unsigned int regno
= REGNO (SET_DEST (set
));
8629 if (regno
< ivs
->n_regs
8630 && REG_IV_TYPE (ivs
, regno
) == GENERAL_INDUCT
8631 && REG_IV_INFO (ivs
, regno
)->src_reg
== bl
->biv
->src_reg
)
8636 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
8637 && reg_mentioned_p (reg
, PATTERN (p
))
8638 && ! maybe_eliminate_biv_1 (loop
, PATTERN (p
), p
, bl
,
8639 eliminate_p
, where_bb
, where_insn
))
8641 if (loop_dump_stream
)
8642 fprintf (loop_dump_stream
,
8643 "Cannot eliminate biv %d: biv used in insn %d.\n",
8644 bl
->regno
, INSN_UID (p
));
8651 if (loop_dump_stream
)
8652 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
8653 bl
->regno
, eliminate_p
? "was" : "can be");
8660 /* INSN and REFERENCE are instructions in the same insn chain.
8661 Return nonzero if INSN is first. */
8664 loop_insn_first_p (insn
, reference
)
8665 rtx insn
, reference
;
8669 for (p
= insn
, q
= reference
;;)
8671 /* Start with test for not first so that INSN == REFERENCE yields not
8673 if (q
== insn
|| ! p
)
8675 if (p
== reference
|| ! q
)
8678 /* Either of P or Q might be a NOTE. Notes have the same LUID as the
8679 previous insn, hence the <= comparison below does not work if
8681 if (INSN_UID (p
) < max_uid_for_loop
8682 && INSN_UID (q
) < max_uid_for_loop
8683 && GET_CODE (p
) != NOTE
)
8684 return INSN_LUID (p
) <= INSN_LUID (q
);
8686 if (INSN_UID (p
) >= max_uid_for_loop
8687 || GET_CODE (p
) == NOTE
)
8689 if (INSN_UID (q
) >= max_uid_for_loop
)
8694 /* We are trying to eliminate BIV in INSN using GIV. Return nonzero if
8695 the offset that we have to take into account due to auto-increment /
8696 div derivation is zero. */
8698 biv_elimination_giv_has_0_offset (biv
, giv
, insn
)
8699 struct induction
*biv
, *giv
;
8702 /* If the giv V had the auto-inc address optimization applied
8703 to it, and INSN occurs between the giv insn and the biv
8704 insn, then we'd have to adjust the value used here.
8705 This is rare, so we don't bother to make this possible. */
8706 if (giv
->auto_inc_opt
8707 && ((loop_insn_first_p (giv
->insn
, insn
)
8708 && loop_insn_first_p (insn
, biv
->insn
))
8709 || (loop_insn_first_p (biv
->insn
, insn
)
8710 && loop_insn_first_p (insn
, giv
->insn
))))
8716 /* If BL appears in X (part of the pattern of INSN), see if we can
8717 eliminate its use. If so, return 1. If not, return 0.
8719 If BIV does not appear in X, return 1.
8721 If ELIMINATE_P is nonzero, actually do the elimination.
8722 WHERE_INSN/WHERE_BB indicate where extra insns should be added.
8723 Depending on how many items have been moved out of the loop, it
8724 will either be before INSN (when WHERE_INSN is nonzero) or at the
8725 start of the loop (when WHERE_INSN is zero). */
8728 maybe_eliminate_biv_1 (loop
, x
, insn
, bl
, eliminate_p
, where_bb
, where_insn
)
8729 const struct loop
*loop
;
8731 struct iv_class
*bl
;
8733 basic_block where_bb
;
8736 enum rtx_code code
= GET_CODE (x
);
8737 rtx reg
= bl
->biv
->dest_reg
;
8738 enum machine_mode mode
= GET_MODE (reg
);
8739 struct induction
*v
;
8751 /* If we haven't already been able to do something with this BIV,
8752 we can't eliminate it. */
8758 /* If this sets the BIV, it is not a problem. */
8759 if (SET_DEST (x
) == reg
)
8762 /* If this is an insn that defines a giv, it is also ok because
8763 it will go away when the giv is reduced. */
8764 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8765 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
8769 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
8771 /* Can replace with any giv that was reduced and
8772 that has (MULT_VAL != 0) and (ADD_VAL == 0).
8773 Require a constant for MULT_VAL, so we know it's nonzero.
8774 ??? We disable this optimization to avoid potential
8777 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8778 if (GET_CODE (v
->mult_val
) == CONST_INT
&& v
->mult_val
!= const0_rtx
8779 && v
->add_val
== const0_rtx
8780 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8784 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8790 /* If the giv has the opposite direction of change,
8791 then reverse the comparison. */
8792 if (INTVAL (v
->mult_val
) < 0)
8793 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
8794 const0_rtx
, v
->new_reg
);
8798 /* We can probably test that giv's reduced reg. */
8799 if (validate_change (insn
, &SET_SRC (x
), new, 0))
8803 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
8804 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
8805 Require a constant for MULT_VAL, so we know it's nonzero.
8806 ??? Do this only if ADD_VAL is a pointer to avoid a potential
8807 overflow problem. */
8809 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8810 if (GET_CODE (v
->mult_val
) == CONST_INT
8811 && v
->mult_val
!= const0_rtx
8812 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8814 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8815 || GET_CODE (v
->add_val
) == LABEL_REF
8816 || GET_CODE (v
->add_val
) == CONST
8817 || (GET_CODE (v
->add_val
) == REG
8818 && REG_POINTER (v
->add_val
))))
8820 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8826 /* If the giv has the opposite direction of change,
8827 then reverse the comparison. */
8828 if (INTVAL (v
->mult_val
) < 0)
8829 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
8832 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
8833 copy_rtx (v
->add_val
));
8835 /* Replace biv with the giv's reduced register. */
8836 update_reg_last_use (v
->add_val
, insn
);
8837 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8840 /* Insn doesn't support that constant or invariant. Copy it
8841 into a register (it will be a loop invariant.) */
8842 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
8844 loop_insn_emit_before (loop
, 0, where_insn
,
8846 copy_rtx (v
->add_val
)));
8848 /* Substitute the new register for its invariant value in
8849 the compare expression. */
8850 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
8851 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
8860 case GT
: case GE
: case GTU
: case GEU
:
8861 case LT
: case LE
: case LTU
: case LEU
:
8862 /* See if either argument is the biv. */
8863 if (XEXP (x
, 0) == reg
)
8864 arg
= XEXP (x
, 1), arg_operand
= 1;
8865 else if (XEXP (x
, 1) == reg
)
8866 arg
= XEXP (x
, 0), arg_operand
= 0;
8870 if (CONSTANT_P (arg
))
8872 /* First try to replace with any giv that has constant positive
8873 mult_val and constant add_val. We might be able to support
8874 negative mult_val, but it seems complex to do it in general. */
8876 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8877 if (GET_CODE (v
->mult_val
) == CONST_INT
8878 && INTVAL (v
->mult_val
) > 0
8879 && (GET_CODE (v
->add_val
) == SYMBOL_REF
8880 || GET_CODE (v
->add_val
) == LABEL_REF
8881 || GET_CODE (v
->add_val
) == CONST
8882 || (GET_CODE (v
->add_val
) == REG
8883 && REG_POINTER (v
->add_val
)))
8884 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8887 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8890 /* Don't eliminate if the linear combination that makes up
8891 the giv overflows when it is applied to ARG. */
8892 if (GET_CODE (arg
) == CONST_INT
)
8896 if (GET_CODE (v
->add_val
) == CONST_INT
)
8897 add_val
= v
->add_val
;
8899 add_val
= const0_rtx
;
8901 if (const_mult_add_overflow_p (arg
, v
->mult_val
,
8909 /* Replace biv with the giv's reduced reg. */
8910 validate_change (insn
, &XEXP (x
, 1 - arg_operand
), v
->new_reg
, 1);
8912 /* If all constants are actually constant integers and
8913 the derived constant can be directly placed in the COMPARE,
8915 if (GET_CODE (arg
) == CONST_INT
8916 && GET_CODE (v
->add_val
) == CONST_INT
)
8918 tem
= expand_mult_add (arg
, NULL_RTX
, v
->mult_val
,
8919 v
->add_val
, mode
, 1);
8923 /* Otherwise, load it into a register. */
8924 tem
= gen_reg_rtx (mode
);
8925 loop_iv_add_mult_emit_before (loop
, arg
,
8926 v
->mult_val
, v
->add_val
,
8927 tem
, where_bb
, where_insn
);
8930 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8932 if (apply_change_group ())
8936 /* Look for giv with positive constant mult_val and nonconst add_val.
8937 Insert insns to calculate new compare value.
8938 ??? Turn this off due to possible overflow. */
8940 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8941 if (GET_CODE (v
->mult_val
) == CONST_INT
8942 && INTVAL (v
->mult_val
) > 0
8943 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8949 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8955 tem
= gen_reg_rtx (mode
);
8957 /* Replace biv with giv's reduced register. */
8958 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
8961 /* Compute value to compare against. */
8962 loop_iv_add_mult_emit_before (loop
, arg
,
8963 v
->mult_val
, v
->add_val
,
8964 tem
, where_bb
, where_insn
);
8965 /* Use it in this insn. */
8966 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
8967 if (apply_change_group ())
8971 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
8973 if (loop_invariant_p (loop
, arg
) == 1)
8975 /* Look for giv with constant positive mult_val and nonconst
8976 add_val. Insert insns to compute new compare value.
8977 ??? Turn this off due to possible overflow. */
8979 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
8980 if (GET_CODE (v
->mult_val
) == CONST_INT
&& INTVAL (v
->mult_val
) > 0
8981 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
8987 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
8993 tem
= gen_reg_rtx (mode
);
8995 /* Replace biv with giv's reduced register. */
8996 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
8999 /* Compute value to compare against. */
9000 loop_iv_add_mult_emit_before (loop
, arg
,
9001 v
->mult_val
, v
->add_val
,
9002 tem
, where_bb
, where_insn
);
9003 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
9004 if (apply_change_group ())
9009 /* This code has problems. Basically, you can't know when
9010 seeing if we will eliminate BL, whether a particular giv
9011 of ARG will be reduced. If it isn't going to be reduced,
9012 we can't eliminate BL. We can try forcing it to be reduced,
9013 but that can generate poor code.
9015 The problem is that the benefit of reducing TV, below should
9016 be increased if BL can actually be eliminated, but this means
9017 we might have to do a topological sort of the order in which
9018 we try to process biv. It doesn't seem worthwhile to do
9019 this sort of thing now. */
9022 /* Otherwise the reg compared with had better be a biv. */
9023 if (GET_CODE (arg
) != REG
9024 || REG_IV_TYPE (ivs
, REGNO (arg
)) != BASIC_INDUCT
)
9027 /* Look for a pair of givs, one for each biv,
9028 with identical coefficients. */
9029 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
9031 struct induction
*tv
;
9033 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
9036 for (tv
= REG_IV_CLASS (ivs
, REGNO (arg
))->giv
; tv
;
9038 if (! tv
->ignore
&& ! tv
->maybe_dead
9039 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
9040 && rtx_equal_p (tv
->add_val
, v
->add_val
)
9041 && tv
->mode
== mode
)
9043 if (! biv_elimination_giv_has_0_offset (bl
->biv
, v
, insn
))
9049 /* Replace biv with its giv's reduced reg. */
9050 XEXP (x
, 1 - arg_operand
) = v
->new_reg
;
9051 /* Replace other operand with the other giv's
9053 XEXP (x
, arg_operand
) = tv
->new_reg
;
9060 /* If we get here, the biv can't be eliminated. */
9064 /* If this address is a DEST_ADDR giv, it doesn't matter if the
9065 biv is used in it, since it will be replaced. */
9066 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
9067 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
9075 /* See if any subexpression fails elimination. */
9076 fmt
= GET_RTX_FORMAT (code
);
9077 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
9082 if (! maybe_eliminate_biv_1 (loop
, XEXP (x
, i
), insn
, bl
,
9083 eliminate_p
, where_bb
, where_insn
))
9088 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
9089 if (! maybe_eliminate_biv_1 (loop
, XVECEXP (x
, i
, j
), insn
, bl
,
9090 eliminate_p
, where_bb
, where_insn
))
9099 /* Return nonzero if the last use of REG
9100 is in an insn following INSN in the same basic block. */
9103 last_use_this_basic_block (reg
, insn
)
9109 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
9112 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
9118 /* Called via `note_stores' to record the initial value of a biv. Here we
9119 just record the location of the set and process it later. */
9122 record_initial (dest
, set
, data
)
9125 void *data ATTRIBUTE_UNUSED
;
9127 struct loop_ivs
*ivs
= (struct loop_ivs
*) data
;
9128 struct iv_class
*bl
;
9130 if (GET_CODE (dest
) != REG
9131 || REGNO (dest
) >= ivs
->n_regs
9132 || REG_IV_TYPE (ivs
, REGNO (dest
)) != BASIC_INDUCT
)
9135 bl
= REG_IV_CLASS (ivs
, REGNO (dest
));
9137 /* If this is the first set found, record it. */
9138 if (bl
->init_insn
== 0)
9140 bl
->init_insn
= note_insn
;
9145 /* If any of the registers in X are "old" and currently have a last use earlier
9146 than INSN, update them to have a last use of INSN. Their actual last use
9147 will be the previous insn but it will not have a valid uid_luid so we can't
9148 use it. X must be a source expression only. */
9151 update_reg_last_use (x
, insn
)
9155 /* Check for the case where INSN does not have a valid luid. In this case,
9156 there is no need to modify the regno_last_uid, as this can only happen
9157 when code is inserted after the loop_end to set a pseudo's final value,
9158 and hence this insn will never be the last use of x.
9159 ???? This comment is not correct. See for example loop_givs_reduce.
9160 This may insert an insn before another new insn. */
9161 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
9162 && INSN_UID (insn
) < max_uid_for_loop
9163 && REGNO_LAST_LUID (REGNO (x
)) < INSN_LUID (insn
))
9165 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
9170 const char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
9171 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
9174 update_reg_last_use (XEXP (x
, i
), insn
);
9175 else if (fmt
[i
] == 'E')
9176 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
9177 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
9182 /* Given an insn INSN and condition COND, return the condition in a
9183 canonical form to simplify testing by callers. Specifically:
9185 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
9186 (2) Both operands will be machine operands; (cc0) will have been replaced.
9187 (3) If an operand is a constant, it will be the second operand.
9188 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
9189 for GE, GEU, and LEU.
9191 If the condition cannot be understood, or is an inequality floating-point
9192 comparison which needs to be reversed, 0 will be returned.
9194 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
9196 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9197 insn used in locating the condition was found. If a replacement test
9198 of the condition is desired, it should be placed in front of that
9199 insn and we will be sure that the inputs are still valid.
9201 If WANT_REG is nonzero, we wish the condition to be relative to that
9202 register, if possible. Therefore, do not canonicalize the condition
9206 canonicalize_condition (insn
, cond
, reverse
, earliest
, want_reg
)
9218 int reverse_code
= 0;
9219 enum machine_mode mode
;
9221 code
= GET_CODE (cond
);
9222 mode
= GET_MODE (cond
);
9223 op0
= XEXP (cond
, 0);
9224 op1
= XEXP (cond
, 1);
9227 code
= reversed_comparison_code (cond
, insn
);
9228 if (code
== UNKNOWN
)
9234 /* If we are comparing a register with zero, see if the register is set
9235 in the previous insn to a COMPARE or a comparison operation. Perform
9236 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
9239 while (GET_RTX_CLASS (code
) == '<'
9240 && op1
== CONST0_RTX (GET_MODE (op0
))
9243 /* Set nonzero when we find something of interest. */
9247 /* If comparison with cc0, import actual comparison from compare
9251 if ((prev
= prev_nonnote_insn (prev
)) == 0
9252 || GET_CODE (prev
) != INSN
9253 || (set
= single_set (prev
)) == 0
9254 || SET_DEST (set
) != cc0_rtx
)
9257 op0
= SET_SRC (set
);
9258 op1
= CONST0_RTX (GET_MODE (op0
));
9264 /* If this is a COMPARE, pick up the two things being compared. */
9265 if (GET_CODE (op0
) == COMPARE
)
9267 op1
= XEXP (op0
, 1);
9268 op0
= XEXP (op0
, 0);
9271 else if (GET_CODE (op0
) != REG
)
9274 /* Go back to the previous insn. Stop if it is not an INSN. We also
9275 stop if it isn't a single set or if it has a REG_INC note because
9276 we don't want to bother dealing with it. */
9278 if ((prev
= prev_nonnote_insn (prev
)) == 0
9279 || GET_CODE (prev
) != INSN
9280 || FIND_REG_INC_NOTE (prev
, NULL_RTX
))
9283 set
= set_of (op0
, prev
);
9286 && (GET_CODE (set
) != SET
9287 || !rtx_equal_p (SET_DEST (set
), op0
)))
9290 /* If this is setting OP0, get what it sets it to if it looks
9294 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
9295 #ifdef FLOAT_STORE_FLAG_VALUE
9296 REAL_VALUE_TYPE fsfv
;
9299 /* ??? We may not combine comparisons done in a CCmode with
9300 comparisons not done in a CCmode. This is to aid targets
9301 like Alpha that have an IEEE compliant EQ instruction, and
9302 a non-IEEE compliant BEQ instruction. The use of CCmode is
9303 actually artificial, simply to prevent the combination, but
9304 should not affect other platforms.
9306 However, we must allow VOIDmode comparisons to match either
9307 CCmode or non-CCmode comparison, because some ports have
9308 modeless comparisons inside branch patterns.
9310 ??? This mode check should perhaps look more like the mode check
9311 in simplify_comparison in combine. */
9313 if ((GET_CODE (SET_SRC (set
)) == COMPARE
9316 && GET_MODE_CLASS (inner_mode
) == MODE_INT
9317 && (GET_MODE_BITSIZE (inner_mode
)
9318 <= HOST_BITS_PER_WIDE_INT
)
9319 && (STORE_FLAG_VALUE
9320 & ((HOST_WIDE_INT
) 1
9321 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9322 #ifdef FLOAT_STORE_FLAG_VALUE
9324 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9325 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
9326 REAL_VALUE_NEGATIVE (fsfv
)))
9329 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
9330 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9331 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9332 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9334 else if (((code
== EQ
9336 && (GET_MODE_BITSIZE (inner_mode
)
9337 <= HOST_BITS_PER_WIDE_INT
)
9338 && GET_MODE_CLASS (inner_mode
) == MODE_INT
9339 && (STORE_FLAG_VALUE
9340 & ((HOST_WIDE_INT
) 1
9341 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
9342 #ifdef FLOAT_STORE_FLAG_VALUE
9344 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
9345 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
9346 REAL_VALUE_NEGATIVE (fsfv
)))
9349 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
9350 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
9351 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
9352 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
9362 else if (reg_set_p (op0
, prev
))
9363 /* If this sets OP0, but not directly, we have to give up. */
9368 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
9369 code
= GET_CODE (x
);
9372 code
= reversed_comparison_code (x
, prev
);
9373 if (code
== UNKNOWN
)
9378 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
9384 /* If constant is first, put it last. */
9385 if (CONSTANT_P (op0
))
9386 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
9388 /* If OP0 is the result of a comparison, we weren't able to find what
9389 was really being compared, so fail. */
9390 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
9393 /* Canonicalize any ordered comparison with integers involving equality
9394 if we can do computations in the relevant mode and we do not
9397 if (GET_CODE (op1
) == CONST_INT
9398 && GET_MODE (op0
) != VOIDmode
9399 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
9401 HOST_WIDE_INT const_val
= INTVAL (op1
);
9402 unsigned HOST_WIDE_INT uconst_val
= const_val
;
9403 unsigned HOST_WIDE_INT max_val
9404 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
9409 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
9410 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
9413 /* When cross-compiling, const_val might be sign-extended from
9414 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
9416 if ((HOST_WIDE_INT
) (const_val
& max_val
)
9417 != (((HOST_WIDE_INT
) 1
9418 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
9419 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
9423 if (uconst_val
< max_val
)
9424 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
9428 if (uconst_val
!= 0)
9429 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
9438 /* Never return CC0; return zero instead. */
9443 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
9446 /* Given a jump insn JUMP, return the condition that will cause it to branch
9447 to its JUMP_LABEL. If the condition cannot be understood, or is an
9448 inequality floating-point comparison which needs to be reversed, 0 will
9451 If EARLIEST is nonzero, it is a pointer to a place where the earliest
9452 insn used in locating the condition was found. If a replacement test
9453 of the condition is desired, it should be placed in front of that
9454 insn and we will be sure that the inputs are still valid. */
9457 get_condition (jump
, earliest
)
9465 /* If this is not a standard conditional jump, we can't parse it. */
9466 if (GET_CODE (jump
) != JUMP_INSN
9467 || ! any_condjump_p (jump
))
9469 set
= pc_set (jump
);
9471 cond
= XEXP (SET_SRC (set
), 0);
9473 /* If this branches to JUMP_LABEL when the condition is false, reverse
9476 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
9477 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
9479 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
);
9482 /* Similar to above routine, except that we also put an invariant last
9483 unless both operands are invariants. */
9486 get_condition_for_loop (loop
, x
)
9487 const struct loop
*loop
;
9490 rtx comparison
= get_condition (x
, (rtx
*) 0);
9493 || ! loop_invariant_p (loop
, XEXP (comparison
, 0))
9494 || loop_invariant_p (loop
, XEXP (comparison
, 1)))
9497 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
9498 XEXP (comparison
, 1), XEXP (comparison
, 0));
9501 /* Scan the function and determine whether it has indirect (computed) jumps.
9503 This is taken mostly from flow.c; similar code exists elsewhere
9504 in the compiler. It may be useful to put this into rtlanal.c. */
9506 indirect_jump_in_function_p (start
)
9511 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
9512 if (computed_jump_p (insn
))
9518 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
9519 documentation for LOOP_MEMS for the definition of `appropriate'.
9520 This function is called from prescan_loop via for_each_rtx. */
9523 insert_loop_mem (mem
, data
)
9525 void *data ATTRIBUTE_UNUSED
;
9527 struct loop_info
*loop_info
= data
;
9534 switch (GET_CODE (m
))
9540 /* We're not interested in MEMs that are only clobbered. */
9544 /* We're not interested in the MEM associated with a
9545 CONST_DOUBLE, so there's no need to traverse into this. */
9549 /* We're not interested in any MEMs that only appear in notes. */
9553 /* This is not a MEM. */
9557 /* See if we've already seen this MEM. */
9558 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
9559 if (rtx_equal_p (m
, loop_info
->mems
[i
].mem
))
9561 if (GET_MODE (m
) != GET_MODE (loop_info
->mems
[i
].mem
))
9562 /* The modes of the two memory accesses are different. If
9563 this happens, something tricky is going on, and we just
9564 don't optimize accesses to this MEM. */
9565 loop_info
->mems
[i
].optimize
= 0;
9570 /* Resize the array, if necessary. */
9571 if (loop_info
->mems_idx
== loop_info
->mems_allocated
)
9573 if (loop_info
->mems_allocated
!= 0)
9574 loop_info
->mems_allocated
*= 2;
9576 loop_info
->mems_allocated
= 32;
9578 loop_info
->mems
= (loop_mem_info
*)
9579 xrealloc (loop_info
->mems
,
9580 loop_info
->mems_allocated
* sizeof (loop_mem_info
));
9583 /* Actually insert the MEM. */
9584 loop_info
->mems
[loop_info
->mems_idx
].mem
= m
;
9585 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
9586 because we can't put it in a register. We still store it in the
9587 table, though, so that if we see the same address later, but in a
9588 non-BLK mode, we'll not think we can optimize it at that point. */
9589 loop_info
->mems
[loop_info
->mems_idx
].optimize
= (GET_MODE (m
) != BLKmode
);
9590 loop_info
->mems
[loop_info
->mems_idx
].reg
= NULL_RTX
;
9591 ++loop_info
->mems_idx
;
9597 /* Allocate REGS->ARRAY or reallocate it if it is too small.
9599 Increment REGS->ARRAY[I].SET_IN_LOOP at the index I of each
9600 register that is modified by an insn between FROM and TO. If the
9601 value of an element of REGS->array[I].SET_IN_LOOP becomes 127 or
9602 more, stop incrementing it, to avoid overflow.
9604 Store in REGS->ARRAY[I].SINGLE_USAGE the single insn in which
9605 register I is used, if it is only used once. Otherwise, it is set
9606 to 0 (for no uses) or const0_rtx for more than one use. This
9607 parameter may be zero, in which case this processing is not done.
9609 Set REGS->ARRAY[I].MAY_NOT_OPTIMIZE nonzero if we should not
9610 optimize register I. */
9613 loop_regs_scan (loop
, extra_size
)
9614 const struct loop
*loop
;
9617 struct loop_regs
*regs
= LOOP_REGS (loop
);
9619 /* last_set[n] is nonzero iff reg n has been set in the current
9620 basic block. In that case, it is the insn that last set reg n. */
9625 old_nregs
= regs
->num
;
9626 regs
->num
= max_reg_num ();
9628 /* Grow the regs array if not allocated or too small. */
9629 if (regs
->num
>= regs
->size
)
9631 regs
->size
= regs
->num
+ extra_size
;
9633 regs
->array
= (struct loop_reg
*)
9634 xrealloc (regs
->array
, regs
->size
* sizeof (*regs
->array
));
9636 /* Zero the new elements. */
9637 memset (regs
->array
+ old_nregs
, 0,
9638 (regs
->size
- old_nregs
) * sizeof (*regs
->array
));
9641 /* Clear previously scanned fields but do not clear n_times_set. */
9642 for (i
= 0; i
< old_nregs
; i
++)
9644 regs
->array
[i
].set_in_loop
= 0;
9645 regs
->array
[i
].may_not_optimize
= 0;
9646 regs
->array
[i
].single_usage
= NULL_RTX
;
9649 last_set
= (rtx
*) xcalloc (regs
->num
, sizeof (rtx
));
9651 /* Scan the loop, recording register usage. */
9652 for (insn
= loop
->top
? loop
->top
: loop
->start
; insn
!= loop
->end
;
9653 insn
= NEXT_INSN (insn
))
9657 /* Record registers that have exactly one use. */
9658 find_single_use_in_loop (regs
, insn
, PATTERN (insn
));
9660 /* Include uses in REG_EQUAL notes. */
9661 if (REG_NOTES (insn
))
9662 find_single_use_in_loop (regs
, insn
, REG_NOTES (insn
));
9664 if (GET_CODE (PATTERN (insn
)) == SET
9665 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
9666 count_one_set (regs
, insn
, PATTERN (insn
), last_set
);
9667 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
9670 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
9671 count_one_set (regs
, insn
, XVECEXP (PATTERN (insn
), 0, i
),
9676 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
9677 memset (last_set
, 0, regs
->num
* sizeof (rtx
));
9680 /* Invalidate all hard registers clobbered by calls. With one exception:
9681 a call-clobbered PIC register is still function-invariant for our
9682 purposes, since we can hoist any PIC calculations out of the loop.
9683 Thus the call to rtx_varies_p. */
9684 if (LOOP_INFO (loop
)->has_call
)
9685 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
9686 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
)
9687 && rtx_varies_p (regno_reg_rtx
[i
], 1))
9689 regs
->array
[i
].may_not_optimize
= 1;
9690 regs
->array
[i
].set_in_loop
= 1;
9693 #ifdef AVOID_CCMODE_COPIES
9694 /* Don't try to move insns which set CC registers if we should not
9695 create CCmode register copies. */
9696 for (i
= regs
->num
- 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
9697 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
9698 regs
->array
[i
].may_not_optimize
= 1;
9701 /* Set regs->array[I].n_times_set for the new registers. */
9702 for (i
= old_nregs
; i
< regs
->num
; i
++)
9703 regs
->array
[i
].n_times_set
= regs
->array
[i
].set_in_loop
;
9708 /* Returns the number of real INSNs in the LOOP. */
9711 count_insns_in_loop (loop
)
9712 const struct loop
*loop
;
9717 for (insn
= loop
->top
? loop
->top
: loop
->start
; insn
!= loop
->end
;
9718 insn
= NEXT_INSN (insn
))
9725 /* Move MEMs into registers for the duration of the loop. */
9729 const struct loop
*loop
;
9731 struct loop_info
*loop_info
= LOOP_INFO (loop
);
9732 struct loop_regs
*regs
= LOOP_REGS (loop
);
9733 int maybe_never
= 0;
9735 rtx p
, prev_ebb_head
;
9736 rtx label
= NULL_RTX
;
9738 /* Nonzero if the next instruction may never be executed. */
9739 int next_maybe_never
= 0;
9740 unsigned int last_max_reg
= max_reg_num ();
9742 if (loop_info
->mems_idx
== 0)
9745 /* We cannot use next_label here because it skips over normal insns. */
9746 end_label
= next_nonnote_insn (loop
->end
);
9747 if (end_label
&& GET_CODE (end_label
) != CODE_LABEL
)
9748 end_label
= NULL_RTX
;
9750 /* Check to see if it's possible that some instructions in the loop are
9751 never executed. Also check if there is a goto out of the loop other
9752 than right after the end of the loop. */
9753 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
9755 p
= next_insn_in_loop (loop
, p
))
9757 if (GET_CODE (p
) == CODE_LABEL
)
9759 else if (GET_CODE (p
) == JUMP_INSN
9760 /* If we enter the loop in the middle, and scan
9761 around to the beginning, don't set maybe_never
9762 for that. This must be an unconditional jump,
9763 otherwise the code at the top of the loop might
9764 never be executed. Unconditional jumps are
9765 followed a by barrier then loop end. */
9766 && ! (GET_CODE (p
) == JUMP_INSN
9767 && JUMP_LABEL (p
) == loop
->top
9768 && NEXT_INSN (NEXT_INSN (p
)) == loop
->end
9769 && any_uncondjump_p (p
)))
9771 /* If this is a jump outside of the loop but not right
9772 after the end of the loop, we would have to emit new fixup
9773 sequences for each such label. */
9774 if (/* If we can't tell where control might go when this
9775 JUMP_INSN is executed, we must be conservative. */
9777 || (JUMP_LABEL (p
) != end_label
9778 && (INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
9779 || INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop
->start
)
9780 || INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop
->end
))))
9783 if (!any_condjump_p (p
))
9784 /* Something complicated. */
9787 /* If there are any more instructions in the loop, they
9788 might not be reached. */
9789 next_maybe_never
= 1;
9791 else if (next_maybe_never
)
9795 /* Find start of the extended basic block that enters the loop. */
9796 for (p
= loop
->start
;
9797 PREV_INSN (p
) && GET_CODE (p
) != CODE_LABEL
;
9804 /* Build table of mems that get set to constant values before the
9806 for (; p
!= loop
->start
; p
= NEXT_INSN (p
))
9807 cselib_process_insn (p
);
9809 /* Actually move the MEMs. */
9810 for (i
= 0; i
< loop_info
->mems_idx
; ++i
)
9812 regset_head load_copies
;
9813 regset_head store_copies
;
9816 rtx mem
= loop_info
->mems
[i
].mem
;
9819 if (MEM_VOLATILE_P (mem
)
9820 || loop_invariant_p (loop
, XEXP (mem
, 0)) != 1)
9821 /* There's no telling whether or not MEM is modified. */
9822 loop_info
->mems
[i
].optimize
= 0;
9824 /* Go through the MEMs written to in the loop to see if this
9825 one is aliased by one of them. */
9826 mem_list_entry
= loop_info
->store_mems
;
9827 while (mem_list_entry
)
9829 if (rtx_equal_p (mem
, XEXP (mem_list_entry
, 0)))
9831 else if (true_dependence (XEXP (mem_list_entry
, 0), VOIDmode
,
9834 /* MEM is indeed aliased by this store. */
9835 loop_info
->mems
[i
].optimize
= 0;
9838 mem_list_entry
= XEXP (mem_list_entry
, 1);
9841 if (flag_float_store
&& written
9842 && GET_MODE_CLASS (GET_MODE (mem
)) == MODE_FLOAT
)
9843 loop_info
->mems
[i
].optimize
= 0;
9845 /* If this MEM is written to, we must be sure that there
9846 are no reads from another MEM that aliases this one. */
9847 if (loop_info
->mems
[i
].optimize
&& written
)
9851 for (j
= 0; j
< loop_info
->mems_idx
; ++j
)
9855 else if (true_dependence (mem
,
9857 loop_info
->mems
[j
].mem
,
9860 /* It's not safe to hoist loop_info->mems[i] out of
9861 the loop because writes to it might not be
9862 seen by reads from loop_info->mems[j]. */
9863 loop_info
->mems
[i
].optimize
= 0;
9869 if (maybe_never
&& may_trap_p (mem
))
9870 /* We can't access the MEM outside the loop; it might
9871 cause a trap that wouldn't have happened otherwise. */
9872 loop_info
->mems
[i
].optimize
= 0;
9874 if (!loop_info
->mems
[i
].optimize
)
9875 /* We thought we were going to lift this MEM out of the
9876 loop, but later discovered that we could not. */
9879 INIT_REG_SET (&load_copies
);
9880 INIT_REG_SET (&store_copies
);
9882 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
9883 order to keep scan_loop from moving stores to this MEM
9884 out of the loop just because this REG is neither a
9885 user-variable nor used in the loop test. */
9886 reg
= gen_reg_rtx (GET_MODE (mem
));
9887 REG_USERVAR_P (reg
) = 1;
9888 loop_info
->mems
[i
].reg
= reg
;
9890 /* Now, replace all references to the MEM with the
9891 corresponding pseudos. */
9893 for (p
= next_insn_in_loop (loop
, loop
->scan_start
);
9895 p
= next_insn_in_loop (loop
, p
))
9901 set
= single_set (p
);
9903 /* See if this copies the mem into a register that isn't
9904 modified afterwards. We'll try to do copy propagation
9905 a little further on. */
9907 /* @@@ This test is _way_ too conservative. */
9909 && GET_CODE (SET_DEST (set
)) == REG
9910 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
9911 && REGNO (SET_DEST (set
)) < last_max_reg
9912 && regs
->array
[REGNO (SET_DEST (set
))].n_times_set
== 1
9913 && rtx_equal_p (SET_SRC (set
), mem
))
9914 SET_REGNO_REG_SET (&load_copies
, REGNO (SET_DEST (set
)));
9916 /* See if this copies the mem from a register that isn't
9917 modified afterwards. We'll try to remove the
9918 redundant copy later on by doing a little register
9919 renaming and copy propagation. This will help
9920 to untangle things for the BIV detection code. */
9923 && GET_CODE (SET_SRC (set
)) == REG
9924 && REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
9925 && REGNO (SET_SRC (set
)) < last_max_reg
9926 && regs
->array
[REGNO (SET_SRC (set
))].n_times_set
== 1
9927 && rtx_equal_p (SET_DEST (set
), mem
))
9928 SET_REGNO_REG_SET (&store_copies
, REGNO (SET_SRC (set
)));
9930 /* If this is a call which uses / clobbers this memory
9931 location, we must not change the interface here. */
9932 if (GET_CODE (p
) == CALL_INSN
9933 && reg_mentioned_p (loop_info
->mems
[i
].mem
,
9934 CALL_INSN_FUNCTION_USAGE (p
)))
9937 loop_info
->mems
[i
].optimize
= 0;
9941 /* Replace the memory reference with the shadow register. */
9942 replace_loop_mems (p
, loop_info
->mems
[i
].mem
,
9943 loop_info
->mems
[i
].reg
);
9946 if (GET_CODE (p
) == CODE_LABEL
9947 || GET_CODE (p
) == JUMP_INSN
)
9951 if (! loop_info
->mems
[i
].optimize
)
9952 ; /* We found we couldn't do the replacement, so do nothing. */
9953 else if (! apply_change_group ())
9954 /* We couldn't replace all occurrences of the MEM. */
9955 loop_info
->mems
[i
].optimize
= 0;
9958 /* Load the memory immediately before LOOP->START, which is
9959 the NOTE_LOOP_BEG. */
9960 cselib_val
*e
= cselib_lookup (mem
, VOIDmode
, 0);
9964 struct elt_loc_list
*const_equiv
= 0;
9968 struct elt_loc_list
*equiv
;
9969 struct elt_loc_list
*best_equiv
= 0;
9970 for (equiv
= e
->locs
; equiv
; equiv
= equiv
->next
)
9972 if (CONSTANT_P (equiv
->loc
))
9973 const_equiv
= equiv
;
9974 else if (GET_CODE (equiv
->loc
) == REG
9975 /* Extending hard register lifetimes causes crash
9976 on SRC targets. Doing so on non-SRC is
9977 probably also not good idea, since we most
9978 probably have pseudoregister equivalence as
9980 && REGNO (equiv
->loc
) >= FIRST_PSEUDO_REGISTER
)
9983 /* Use the constant equivalence if that is cheap enough. */
9985 best_equiv
= const_equiv
;
9986 else if (const_equiv
9987 && (rtx_cost (const_equiv
->loc
, SET
)
9988 <= rtx_cost (best_equiv
->loc
, SET
)))
9990 best_equiv
= const_equiv
;
9994 /* If best_equiv is nonzero, we know that MEM is set to a
9995 constant or register before the loop. We will use this
9996 knowledge to initialize the shadow register with that
9997 constant or reg rather than by loading from MEM. */
9999 best
= copy_rtx (best_equiv
->loc
);
10002 set
= gen_move_insn (reg
, best
);
10003 set
= loop_insn_hoist (loop
, set
);
10006 for (p
= prev_ebb_head
; p
!= loop
->start
; p
= NEXT_INSN (p
))
10007 if (REGNO_LAST_UID (REGNO (best
)) == INSN_UID (p
))
10009 REGNO_LAST_UID (REGNO (best
)) = INSN_UID (set
);
10015 set_unique_reg_note (set
, REG_EQUAL
, copy_rtx (const_equiv
->loc
));
10019 if (label
== NULL_RTX
)
10021 label
= gen_label_rtx ();
10022 emit_label_after (label
, loop
->end
);
10025 /* Store the memory immediately after END, which is
10026 the NOTE_LOOP_END. */
10027 set
= gen_move_insn (copy_rtx (mem
), reg
);
10028 loop_insn_emit_after (loop
, 0, label
, set
);
10031 if (loop_dump_stream
)
10033 fprintf (loop_dump_stream
, "Hoisted regno %d %s from ",
10034 REGNO (reg
), (written
? "r/w" : "r/o"));
10035 print_rtl (loop_dump_stream
, mem
);
10036 fputc ('\n', loop_dump_stream
);
10039 /* Attempt a bit of copy propagation. This helps untangle the
10040 data flow, and enables {basic,general}_induction_var to find
10042 EXECUTE_IF_SET_IN_REG_SET
10043 (&load_copies
, FIRST_PSEUDO_REGISTER
, j
,
10045 try_copy_prop (loop
, reg
, j
);
10047 CLEAR_REG_SET (&load_copies
);
10049 EXECUTE_IF_SET_IN_REG_SET
10050 (&store_copies
, FIRST_PSEUDO_REGISTER
, j
,
10052 try_swap_copy_prop (loop
, reg
, j
);
10054 CLEAR_REG_SET (&store_copies
);
10058 if (label
!= NULL_RTX
&& end_label
!= NULL_RTX
)
10060 /* Now, we need to replace all references to the previous exit
10061 label with the new one. */
10066 for (p
= loop
->start
; p
!= loop
->end
; p
= NEXT_INSN (p
))
10068 for_each_rtx (&p
, replace_label
, &rr
);
10070 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
10071 field. This is not handled by for_each_rtx because it doesn't
10072 handle unprinted ('0') fields. We need to update JUMP_LABEL
10073 because the immediately following unroll pass will use it.
10074 replace_label would not work anyways, because that only handles
10076 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == end_label
)
10077 JUMP_LABEL (p
) = label
;
10084 /* For communication between note_reg_stored and its caller. */
10085 struct note_reg_stored_arg
10091 /* Called via note_stores, record in SET_SEEN whether X, which is written,
10092 is equal to ARG. */
10094 note_reg_stored (x
, setter
, arg
)
10095 rtx x
, setter ATTRIBUTE_UNUSED
;
10098 struct note_reg_stored_arg
*t
= (struct note_reg_stored_arg
*) arg
;
10103 /* Try to replace every occurrence of pseudo REGNO with REPLACEMENT.
10104 There must be exactly one insn that sets this pseudo; it will be
10105 deleted if all replacements succeed and we can prove that the register
10106 is not used after the loop. */
10109 try_copy_prop (loop
, replacement
, regno
)
10110 const struct loop
*loop
;
10112 unsigned int regno
;
10114 /* This is the reg that we are copying from. */
10115 rtx reg_rtx
= regno_reg_rtx
[regno
];
10118 /* These help keep track of whether we replaced all uses of the reg. */
10119 int replaced_last
= 0;
10120 int store_is_first
= 0;
10122 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
10124 insn
= next_insn_in_loop (loop
, insn
))
10128 /* Only substitute within one extended basic block from the initializing
10130 if (GET_CODE (insn
) == CODE_LABEL
&& init_insn
)
10133 if (! INSN_P (insn
))
10136 /* Is this the initializing insn? */
10137 set
= single_set (insn
);
10139 && GET_CODE (SET_DEST (set
)) == REG
10140 && REGNO (SET_DEST (set
)) == regno
)
10146 if (REGNO_FIRST_UID (regno
) == INSN_UID (insn
))
10147 store_is_first
= 1;
10150 /* Only substitute after seeing the initializing insn. */
10151 if (init_insn
&& insn
!= init_insn
)
10153 struct note_reg_stored_arg arg
;
10155 replace_loop_regs (insn
, reg_rtx
, replacement
);
10156 if (REGNO_LAST_UID (regno
) == INSN_UID (insn
))
10159 /* Stop replacing when REPLACEMENT is modified. */
10160 arg
.reg
= replacement
;
10162 note_stores (PATTERN (insn
), note_reg_stored
, &arg
);
10165 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL
);
10167 /* It is possible that we've turned previously valid REG_EQUAL to
10168 invalid, as we change the REGNO to REPLACEMENT and unlike REGNO,
10169 REPLACEMENT is modified, we get different meaning. */
10170 if (note
&& reg_mentioned_p (replacement
, XEXP (note
, 0)))
10171 remove_note (insn
, note
);
10178 if (apply_change_group ())
10180 if (loop_dump_stream
)
10181 fprintf (loop_dump_stream
, " Replaced reg %d", regno
);
10182 if (store_is_first
&& replaced_last
)
10187 /* Assume we're just deleting INIT_INSN. */
10189 /* Look for REG_RETVAL note. If we're deleting the end of
10190 the libcall sequence, the whole sequence can go. */
10191 retval_note
= find_reg_note (init_insn
, REG_RETVAL
, NULL_RTX
);
10192 /* If we found a REG_RETVAL note, find the first instruction
10193 in the sequence. */
10195 first
= XEXP (retval_note
, 0);
10197 /* Delete the instructions. */
10198 loop_delete_insns (first
, init_insn
);
10200 if (loop_dump_stream
)
10201 fprintf (loop_dump_stream
, ".\n");
10205 /* Replace all the instructions from FIRST up to and including LAST
10206 with NOTE_INSN_DELETED notes. */
10209 loop_delete_insns (first
, last
)
10215 if (loop_dump_stream
)
10216 fprintf (loop_dump_stream
, ", deleting init_insn (%d)",
10218 delete_insn (first
);
10220 /* If this was the LAST instructions we're supposed to delete,
10225 first
= NEXT_INSN (first
);
10229 /* Try to replace occurrences of pseudo REGNO with REPLACEMENT within
10230 loop LOOP if the order of the sets of these registers can be
10231 swapped. There must be exactly one insn within the loop that sets
10232 this pseudo followed immediately by a move insn that sets
10233 REPLACEMENT with REGNO. */
10235 try_swap_copy_prop (loop
, replacement
, regno
)
10236 const struct loop
*loop
;
10238 unsigned int regno
;
10241 rtx set
= NULL_RTX
;
10242 unsigned int new_regno
;
10244 new_regno
= REGNO (replacement
);
10246 for (insn
= next_insn_in_loop (loop
, loop
->scan_start
);
10248 insn
= next_insn_in_loop (loop
, insn
))
10250 /* Search for the insn that copies REGNO to NEW_REGNO? */
10252 && (set
= single_set (insn
))
10253 && GET_CODE (SET_DEST (set
)) == REG
10254 && REGNO (SET_DEST (set
)) == new_regno
10255 && GET_CODE (SET_SRC (set
)) == REG
10256 && REGNO (SET_SRC (set
)) == regno
)
10260 if (insn
!= NULL_RTX
)
10265 /* Some DEF-USE info would come in handy here to make this
10266 function more general. For now, just check the previous insn
10267 which is the most likely candidate for setting REGNO. */
10269 prev_insn
= PREV_INSN (insn
);
10272 && (prev_set
= single_set (prev_insn
))
10273 && GET_CODE (SET_DEST (prev_set
)) == REG
10274 && REGNO (SET_DEST (prev_set
)) == regno
)
10277 (set (reg regno) (expr))
10278 (set (reg new_regno) (reg regno))
10280 so try converting this to:
10281 (set (reg new_regno) (expr))
10282 (set (reg regno) (reg new_regno))
10284 The former construct is often generated when a global
10285 variable used for an induction variable is shadowed by a
10286 register (NEW_REGNO). The latter construct improves the
10287 chances of GIV replacement and BIV elimination. */
10289 validate_change (prev_insn
, &SET_DEST (prev_set
),
10291 validate_change (insn
, &SET_DEST (set
),
10293 validate_change (insn
, &SET_SRC (set
),
10296 if (apply_change_group ())
10298 if (loop_dump_stream
)
10299 fprintf (loop_dump_stream
,
10300 " Swapped set of reg %d at %d with reg %d at %d.\n",
10301 regno
, INSN_UID (insn
),
10302 new_regno
, INSN_UID (prev_insn
));
10304 /* Update first use of REGNO. */
10305 if (REGNO_FIRST_UID (regno
) == INSN_UID (prev_insn
))
10306 REGNO_FIRST_UID (regno
) = INSN_UID (insn
);
10308 /* Now perform copy propagation to hopefully
10309 remove all uses of REGNO within the loop. */
10310 try_copy_prop (loop
, replacement
, regno
);
10316 /* Replace MEM with its associated pseudo register. This function is
10317 called from load_mems via for_each_rtx. DATA is actually a pointer
10318 to a structure describing the instruction currently being scanned
10319 and the MEM we are currently replacing. */
10322 replace_loop_mem (mem
, data
)
10326 loop_replace_args
*args
= (loop_replace_args
*) data
;
10332 switch (GET_CODE (m
))
10338 /* We're not interested in the MEM associated with a
10339 CONST_DOUBLE, so there's no need to traverse into one. */
10343 /* This is not a MEM. */
10347 if (!rtx_equal_p (args
->match
, m
))
10348 /* This is not the MEM we are currently replacing. */
10351 /* Actually replace the MEM. */
10352 validate_change (args
->insn
, mem
, args
->replacement
, 1);
10358 replace_loop_mems (insn
, mem
, reg
)
10363 loop_replace_args args
;
10367 args
.replacement
= reg
;
10369 for_each_rtx (&insn
, replace_loop_mem
, &args
);
10372 /* Replace one register with another. Called through for_each_rtx; PX points
10373 to the rtx being scanned. DATA is actually a pointer to
10374 a structure of arguments. */
10377 replace_loop_reg (px
, data
)
10382 loop_replace_args
*args
= (loop_replace_args
*) data
;
10387 if (x
== args
->match
)
10388 validate_change (args
->insn
, px
, args
->replacement
, 1);
10394 replace_loop_regs (insn
, reg
, replacement
)
10399 loop_replace_args args
;
10403 args
.replacement
= replacement
;
10405 for_each_rtx (&insn
, replace_loop_reg
, &args
);
10408 /* Replace occurrences of the old exit label for the loop with the new
10409 one. DATA is an rtx_pair containing the old and new labels,
10413 replace_label (x
, data
)
10418 rtx old_label
= ((rtx_pair
*) data
)->r1
;
10419 rtx new_label
= ((rtx_pair
*) data
)->r2
;
10424 if (GET_CODE (l
) != LABEL_REF
)
10427 if (XEXP (l
, 0) != old_label
)
10430 XEXP (l
, 0) = new_label
;
10431 ++LABEL_NUSES (new_label
);
10432 --LABEL_NUSES (old_label
);
10437 /* Emit insn for PATTERN after WHERE_INSN in basic block WHERE_BB
10438 (ignored in the interim). */
10441 loop_insn_emit_after (loop
, where_bb
, where_insn
, pattern
)
10442 const struct loop
*loop ATTRIBUTE_UNUSED
;
10443 basic_block where_bb ATTRIBUTE_UNUSED
;
10447 return emit_insn_after (pattern
, where_insn
);
10451 /* If WHERE_INSN is nonzero emit insn for PATTERN before WHERE_INSN
10452 in basic block WHERE_BB (ignored in the interim) within the loop
10453 otherwise hoist PATTERN into the loop pre-header. */
10456 loop_insn_emit_before (loop
, where_bb
, where_insn
, pattern
)
10457 const struct loop
*loop
;
10458 basic_block where_bb ATTRIBUTE_UNUSED
;
10463 return loop_insn_hoist (loop
, pattern
);
10464 return emit_insn_before (pattern
, where_insn
);
10468 /* Emit call insn for PATTERN before WHERE_INSN in basic block
10469 WHERE_BB (ignored in the interim) within the loop. */
10472 loop_call_insn_emit_before (loop
, where_bb
, where_insn
, pattern
)
10473 const struct loop
*loop ATTRIBUTE_UNUSED
;
10474 basic_block where_bb ATTRIBUTE_UNUSED
;
10478 return emit_call_insn_before (pattern
, where_insn
);
10482 /* Hoist insn for PATTERN into the loop pre-header. */
10485 loop_insn_hoist (loop
, pattern
)
10486 const struct loop
*loop
;
10489 return loop_insn_emit_before (loop
, 0, loop
->start
, pattern
);
10493 /* Hoist call insn for PATTERN into the loop pre-header. */
10496 loop_call_insn_hoist (loop
, pattern
)
10497 const struct loop
*loop
;
10500 return loop_call_insn_emit_before (loop
, 0, loop
->start
, pattern
);
10504 /* Sink insn for PATTERN after the loop end. */
10507 loop_insn_sink (loop
, pattern
)
10508 const struct loop
*loop
;
10511 return loop_insn_emit_before (loop
, 0, loop
->sink
, pattern
);
10514 /* bl->final_value can be eighter general_operand or PLUS of general_operand
10515 and constant. Emit sequence of intructions to load it into REG */
10517 gen_load_of_final_value (reg
, final_value
)
10518 rtx reg
, final_value
;
10522 final_value
= force_operand (final_value
, reg
);
10523 if (final_value
!= reg
)
10524 emit_move_insn (reg
, final_value
);
10525 seq
= get_insns ();
10530 /* If the loop has multiple exits, emit insn for PATTERN before the
10531 loop to ensure that it will always be executed no matter how the
10532 loop exits. Otherwise, emit the insn for PATTERN after the loop,
10533 since this is slightly more efficient. */
10536 loop_insn_sink_or_swim (loop
, pattern
)
10537 const struct loop
*loop
;
10540 if (loop
->exit_count
)
10541 return loop_insn_hoist (loop
, pattern
);
10543 return loop_insn_sink (loop
, pattern
);
10547 loop_ivs_dump (loop
, file
, verbose
)
10548 const struct loop
*loop
;
10552 struct iv_class
*bl
;
10555 if (! loop
|| ! file
)
10558 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
10561 fprintf (file
, "Loop %d: %d IV classes\n", loop
->num
, iv_num
);
10563 for (bl
= LOOP_IVS (loop
)->list
; bl
; bl
= bl
->next
)
10565 loop_iv_class_dump (bl
, file
, verbose
);
10566 fputc ('\n', file
);
10572 loop_iv_class_dump (bl
, file
, verbose
)
10573 const struct iv_class
*bl
;
10575 int verbose ATTRIBUTE_UNUSED
;
10577 struct induction
*v
;
10581 if (! bl
|| ! file
)
10584 fprintf (file
, "IV class for reg %d, benefit %d\n",
10585 bl
->regno
, bl
->total_benefit
);
10587 fprintf (file
, " Init insn %d", INSN_UID (bl
->init_insn
));
10588 if (bl
->initial_value
)
10590 fprintf (file
, ", init val: ");
10591 print_simple_rtl (file
, bl
->initial_value
);
10593 if (bl
->initial_test
)
10595 fprintf (file
, ", init test: ");
10596 print_simple_rtl (file
, bl
->initial_test
);
10598 fputc ('\n', file
);
10600 if (bl
->final_value
)
10602 fprintf (file
, " Final val: ");
10603 print_simple_rtl (file
, bl
->final_value
);
10604 fputc ('\n', file
);
10607 if ((incr
= biv_total_increment (bl
)))
10609 fprintf (file
, " Total increment: ");
10610 print_simple_rtl (file
, incr
);
10611 fputc ('\n', file
);
10614 /* List the increments. */
10615 for (i
= 0, v
= bl
->biv
; v
; v
= v
->next_iv
, i
++)
10617 fprintf (file
, " Inc%d: insn %d, incr: ", i
, INSN_UID (v
->insn
));
10618 print_simple_rtl (file
, v
->add_val
);
10619 fputc ('\n', file
);
10622 /* List the givs. */
10623 for (i
= 0, v
= bl
->giv
; v
; v
= v
->next_iv
, i
++)
10625 fprintf (file
, " Giv%d: insn %d, benefit %d, ",
10626 i
, INSN_UID (v
->insn
), v
->benefit
);
10627 if (v
->giv_type
== DEST_ADDR
)
10628 print_simple_rtl (file
, v
->mem
);
10630 print_simple_rtl (file
, single_set (v
->insn
));
10631 fputc ('\n', file
);
10637 loop_biv_dump (v
, file
, verbose
)
10638 const struct induction
*v
;
10647 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
10648 fprintf (file
, " const ");
10649 print_simple_rtl (file
, v
->add_val
);
10651 if (verbose
&& v
->final_value
)
10653 fputc ('\n', file
);
10654 fprintf (file
, " final ");
10655 print_simple_rtl (file
, v
->final_value
);
10658 fputc ('\n', file
);
10663 loop_giv_dump (v
, file
, verbose
)
10664 const struct induction
*v
;
10671 if (v
->giv_type
== DEST_REG
)
10672 fprintf (file
, "Giv %d: insn %d",
10673 REGNO (v
->dest_reg
), INSN_UID (v
->insn
));
10675 fprintf (file
, "Dest address: insn %d",
10676 INSN_UID (v
->insn
));
10678 fprintf (file
, " src reg %d benefit %d",
10679 REGNO (v
->src_reg
), v
->benefit
);
10680 fprintf (file
, " lifetime %d",
10683 if (v
->replaceable
)
10684 fprintf (file
, " replaceable");
10686 if (v
->no_const_addval
)
10687 fprintf (file
, " ncav");
10689 if (v
->ext_dependent
)
10691 switch (GET_CODE (v
->ext_dependent
))
10694 fprintf (file
, " ext se");
10697 fprintf (file
, " ext ze");
10700 fprintf (file
, " ext tr");
10707 fputc ('\n', file
);
10708 fprintf (file
, " mult ");
10709 print_simple_rtl (file
, v
->mult_val
);
10711 fputc ('\n', file
);
10712 fprintf (file
, " add ");
10713 print_simple_rtl (file
, v
->add_val
);
10715 if (verbose
&& v
->final_value
)
10717 fputc ('\n', file
);
10718 fprintf (file
, " final ");
10719 print_simple_rtl (file
, v
->final_value
);
10722 fputc ('\n', file
);
10728 const struct loop
*loop
;
10730 loop_ivs_dump (loop
, stderr
, 1);
10735 debug_iv_class (bl
)
10736 const struct iv_class
*bl
;
10738 loop_iv_class_dump (bl
, stderr
, 1);
10744 const struct induction
*v
;
10746 loop_biv_dump (v
, stderr
, 1);
10752 const struct induction
*v
;
10754 loop_giv_dump (v
, stderr
, 1);
10758 #define LOOP_BLOCK_NUM_1(INSN) \
10759 ((INSN) ? (BLOCK_FOR_INSN (INSN) ? BLOCK_NUM (INSN) : - 1) : -1)
10761 /* The notes do not have an assigned block, so look at the next insn. */
10762 #define LOOP_BLOCK_NUM(INSN) \
10763 ((INSN) ? (GET_CODE (INSN) == NOTE \
10764 ? LOOP_BLOCK_NUM_1 (next_nonnote_insn (INSN)) \
10765 : LOOP_BLOCK_NUM_1 (INSN)) \
10768 #define LOOP_INSN_UID(INSN) ((INSN) ? INSN_UID (INSN) : -1)
10771 loop_dump_aux (loop
, file
, verbose
)
10772 const struct loop
*loop
;
10774 int verbose ATTRIBUTE_UNUSED
;
10778 if (! loop
|| ! file
)
10781 /* Print diagnostics to compare our concept of a loop with
10782 what the loop notes say. */
10783 if (! PREV_INSN (loop
->first
->head
)
10784 || GET_CODE (PREV_INSN (loop
->first
->head
)) != NOTE
10785 || NOTE_LINE_NUMBER (PREV_INSN (loop
->first
->head
))
10786 != NOTE_INSN_LOOP_BEG
)
10787 fprintf (file
, ";; No NOTE_INSN_LOOP_BEG at %d\n",
10788 INSN_UID (PREV_INSN (loop
->first
->head
)));
10789 if (! NEXT_INSN (loop
->last
->end
)
10790 || GET_CODE (NEXT_INSN (loop
->last
->end
)) != NOTE
10791 || NOTE_LINE_NUMBER (NEXT_INSN (loop
->last
->end
))
10792 != NOTE_INSN_LOOP_END
)
10793 fprintf (file
, ";; No NOTE_INSN_LOOP_END at %d\n",
10794 INSN_UID (NEXT_INSN (loop
->last
->end
)));
10799 ";; start %d (%d), cont dom %d (%d), cont %d (%d), vtop %d (%d), end %d (%d)\n",
10800 LOOP_BLOCK_NUM (loop
->start
),
10801 LOOP_INSN_UID (loop
->start
),
10802 LOOP_BLOCK_NUM (loop
->cont
),
10803 LOOP_INSN_UID (loop
->cont
),
10804 LOOP_BLOCK_NUM (loop
->cont
),
10805 LOOP_INSN_UID (loop
->cont
),
10806 LOOP_BLOCK_NUM (loop
->vtop
),
10807 LOOP_INSN_UID (loop
->vtop
),
10808 LOOP_BLOCK_NUM (loop
->end
),
10809 LOOP_INSN_UID (loop
->end
));
10810 fprintf (file
, ";; top %d (%d), scan start %d (%d)\n",
10811 LOOP_BLOCK_NUM (loop
->top
),
10812 LOOP_INSN_UID (loop
->top
),
10813 LOOP_BLOCK_NUM (loop
->scan_start
),
10814 LOOP_INSN_UID (loop
->scan_start
));
10815 fprintf (file
, ";; exit_count %d", loop
->exit_count
);
10816 if (loop
->exit_count
)
10818 fputs (", labels:", file
);
10819 for (label
= loop
->exit_labels
; label
; label
= LABEL_NEXTREF (label
))
10821 fprintf (file
, " %d ",
10822 LOOP_INSN_UID (XEXP (label
, 0)));
10825 fputs ("\n", file
);
10827 /* This can happen when a marked loop appears as two nested loops,
10828 say from while (a || b) {}. The inner loop won't match
10829 the loop markers but the outer one will. */
10830 if (LOOP_BLOCK_NUM (loop
->cont
) != loop
->latch
->index
)
10831 fprintf (file
, ";; NOTE_INSN_LOOP_CONT not in loop latch\n");
10835 /* Call this function from the debugger to dump LOOP. */
10839 const struct loop
*loop
;
10841 flow_loop_dump (loop
, stderr
, loop_dump_aux
, 1);
10844 /* Call this function from the debugger to dump LOOPS. */
10847 debug_loops (loops
)
10848 const struct loops
*loops
;
10850 flow_loops_dump (loops
, stderr
, loop_dump_aux
, 1);