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* config/arm/arm.c (TARGET_SETUP_INCOMING_VARARGS): New.
[official-gcc.git] / gcc / config / i370 / i370.h
blob8109ddedc2e99df044235852f39ee4ee6b1d6b0a
1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
7
8 This file is part of GCC.
9
10 GCC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GCC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27
28 /* Target CPU builtins. */
29 #define TARGET_CPU_CPP_BUILTINS() \
30 do \
31 { \
32 builtin_define_std ("GCC"); \
33 builtin_define_std ("gcc"); \
34 builtin_assert ("machine=i370"); \
35 builtin_assert ("cpu=i370"); \
36 } \
37 while (0)
38
39 /* Run-time compilation parameters selecting different hardware subsets. */
40
41 extern int target_flags;
42
43 /* The sizes of the code and literals on the current page. */
44
45 extern int mvs_page_code, mvs_page_lit;
46
47 /* The current page number and the base page number for the function. */
48
49 extern int mvs_page_num, function_base_page;
50
51 /* The name of the current function. */
52
53 extern char *mvs_function_name;
54
55 /* The length of the function name malloc'd area. */
56
57 extern size_t mvs_function_name_length;
58
59 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
60 these are more than twice as fast as load-op-store.
61 On 3090 don't use this since load-op-store is much faster. */
62
63 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
64
65 /* Default target switches */
66
67 #define TARGET_DEFAULT 1
68
69 /* Macro to define tables used to set the flags. This is a list in braces
70 of pairs in braces, each pair being { "NAME", VALUE }
71 where VALUE is the bits to set or minus the bits to clear.
72 An empty string NAME is used to identify the default VALUE. */
73
74 #define TARGET_SWITCHES \
75 { { "char-instructions", 1, N_("Generate char instructions")}, \
76 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
77 { "", TARGET_DEFAULT, 0} }
78
79 #define OVERRIDE_OPTIONS override_options ()
80
81 /* To use IBM supplied macro function prologue and epilogue, define the
82 following to 1. Should only be needed if IBM changes the definition
83 of their prologue and epilogue. */
84
85 #define MACROPROLOGUE 0
86 #define MACROEPILOGUE 0
87
88 /* Target machine storage layout */
89
90 /* Define this if most significant bit is lowest numbered in instructions
91 that operate on numbered bit-fields. */
92
93 #define BITS_BIG_ENDIAN 1
94
95 /* Define this if most significant byte of a word is the lowest numbered. */
96
97 #define BYTES_BIG_ENDIAN 1
98
99 /* Define this if MS word of a multiword is the lowest numbered. */
100
101 #define WORDS_BIG_ENDIAN 1
102
103 /* Width of a word, in units (bytes). */
104
105 #define UNITS_PER_WORD 4
106
107 /* Allocation boundary (in *bits*) for storing pointers in memory. */
108
109 #define POINTER_BOUNDARY 32
110
111 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
112
113 #define PARM_BOUNDARY 32
114
115 /* Boundary (in *bits*) on which stack pointer should be aligned. */
116
117 #define STACK_BOUNDARY 32
118
119 /* Allocation boundary (in *bits*) for the code of a function. */
120
121 #define FUNCTION_BOUNDARY 32
122
123 /* There is no point aligning anything to a rounder boundary than this. */
124
125 #define BIGGEST_ALIGNMENT 64
126
127 /* Alignment of field after `int : 0' in a structure. */
128
129 #define EMPTY_FIELD_BOUNDARY 32
130
131 /* Define this if move instructions will actually fail to work when given
132 unaligned data. */
133
134 #define STRICT_ALIGNMENT 0
135
136 /* Define target floating point format. */
137
138 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
139
140 #ifdef TARGET_HLASM
141 /* HLASM requires #pragma map. */
142 #define REGISTER_TARGET_PRAGMAS() c_register_pragma (0, "map", i370_pr_map)
143 #endif /* TARGET_HLASM */
144
145 /* Define maximum length of page minus page escape overhead. */
146
147 #define MAX_MVS_PAGE_LENGTH 4080
148
149 /* Define special register allocation order desired.
150 Don't fiddle with this. I did, and I got all sorts of register
151 spill errors when compiling even relatively simple programs...
152 I have no clue why ...
153 E.g. this one is bad:
154 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
155 */
156
157 #define REG_ALLOC_ORDER \
158 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
159
160 /* Standard register usage. */
161
162 /* Number of actual hardware registers. The hardware registers are
163 assigned numbers for the compiler from 0 to just below
164 FIRST_PSEUDO_REGISTER.
165 All registers that the compiler knows about must be given numbers,
166 even those that are not normally considered general registers.
167 For the 370, we give the data registers numbers 0-15,
168 and the floating point registers numbers 16-19. */
169
170 #define FIRST_PSEUDO_REGISTER 20
171
172 /* Define base and page registers. */
173
174 #define BASE_REGISTER 3
175 #define PAGE_REGISTER 4
176
177 #ifdef TARGET_HLASM
178 /* 1 for registers that have pervasive standard uses and are not available
179 for the register allocator. These are registers that must have fixed,
180 valid values stored in them for the entire length of the subroutine call,
181 and must not in any way be moved around, jiggered with, etc. That is,
182 they must never be clobbered, and, if clobbered, the register allocator
183 will never restore them back.
184
185 We use five registers in this special way:
186 -- R3 which is used as the base register
187 -- R4 the page origin table pointer used to load R3,
188 -- R11 the arg pointer.
189 -- R12 the TCA pointer
190 -- R13 the stack (DSA) pointer
191
192 A fifth register is also exceptional: R14 is used in many branch
193 instructions to hold the target of the branch. Technically, this
194 does not qualify R14 as a register with a long-term meaning; it should
195 be enough, theoretically, to note that these instructions clobber
196 R14, and let the compiler deal with that. In practice, however,
197 the "clobber" directive acts as a barrier to optimization, and the
198 optimizer appears to be unable to perform optimizations around branches.
199 Thus, a much better strategy appears to give R14 a pervasive use;
200 this eliminates it from the register pool witout hurting optimization.
201
202 There are other registers which have special meanings, but its OK
203 for them to get clobbered, since other allocator config below will
204 make sure that they always have the right value. These are for
205 example:
206 -- R1 the returned structure pointer.
207 -- R10 the static chain reg.
208 -- R15 holds the value a subroutine returns.
209
210 Notice that it is *almost* safe to mark R11 as available to the allocator.
211 By marking it as a call_used_register, in most cases, the compiler
212 can handle it being clobbered. However, there are a few rare
213 circumstances where the register allocator will allocate r11 and
214 also try to use it as the arg pointer ... thus it must be marked fixed.
215 I think this is a bug, but I can't track it down...
216 */
217
218 #define FIXED_REGISTERS \
219 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
220 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
221
222 /* 1 for registers not available across function calls. These must include
223 the FIXED_REGISTERS and also any registers that can be used without being
224 saved.
225 The latter must include the registers where values are returned
226 and the register where structure-value addresses are passed.
227 NOTE: all floating registers are undefined across calls.
228 */
229
230 #define CALL_USED_REGISTERS \
231 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
232 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
233
234 /* Return number of consecutive hard regs needed starting at reg REGNO
235 to hold something of mode MODE.
236 This is ordinarily the length in words of a value of mode MODE
237 but can be less for certain modes in special long registers.
238 Note that DCmode (complex double) needs two regs.
239 */
240 #endif /* TARGET_HLASM */
241
242 /* ================= */
243 #ifdef TARGET_ELF_ABI
244 /* The Linux/ELF ABI uses the same register layout as the
245 * the MVS/OE version, with the following exceptions:
246 * -- r12 (rtca) is not used.
247 */
248
249 #define FIXED_REGISTERS \
250 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
251 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
252
253 #define CALL_USED_REGISTERS \
254 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
255 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
256
257 #endif /* TARGET_ELF_ABI */
258 /* ================= */
259
260
261 #define HARD_REGNO_NREGS(REGNO, MODE) \
262 ((REGNO) > 15 ? \
263 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
264 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
265
266 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
267 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
268 even registers can hold DI. The floating point registers can hold
269 either SF, DF, SC or DC. */
270
271 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
272 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
273 (((MODE) != DImode) && ((MODE) != DFmode))) \
274 : ((MODE) == SFmode || (MODE) == DFmode) || \
275 (MODE) == SCmode || (MODE) == DCmode)
276
277 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
278 mode MODE1 and one has mode MODE2.
279 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
280 for any hard reg, then this must be 0 for correct output. */
281
282 #define MODES_TIEABLE_P(MODE1, MODE2) \
283 (((MODE1) == SFmode || (MODE1) == DFmode) \
284 == ((MODE2) == SFmode || (MODE2) == DFmode))
285
286 /* Specify the registers used for certain standard purposes.
287 The values of these macros are register numbers. */
288
289 /* 370 PC isn't overloaded on a register. */
290
291 /* #define PC_REGNUM */
292
293 /* Register to use for pushing function arguments. */
294
295 #define STACK_POINTER_REGNUM 13
296
297 /* Base register for access to local variables of the function. */
298
299 #define FRAME_POINTER_REGNUM 13
300
301 /* Value should be nonzero if functions must have frame pointers.
302 Zero means the frame pointer need not be set up (and parms may be
303 accessed via the stack pointer) in functions that seem suitable.
304 This is computed in `reload', in reload1.c. */
305
306 #define FRAME_POINTER_REQUIRED 1
307
308 /* Base register for access to arguments of the function. */
309
310 #define ARG_POINTER_REGNUM 11
311
312 /* R10 is register in which static-chain is passed to a function.
313 Static-chaining is done when a nested function references as a global
314 a stack variable of its parent: e.g.
315 int parent_func (int arg) {
316 int x; // x is in parents stack
317 void child_func (void) { x++: } // child references x as global var
318 ...
319 }
320 */
321
322 #define STATIC_CHAIN_REGNUM 10
323
324 /* R1 is register in which address to store a structure value is passed to
325 a function. This is used only when returning 64-bit long-long in a 32-bit arch
326 and when calling functions that return structs by value. e.g.
327 typedef struct A_s { int a,b,c; } A_t;
328 A_t fun_returns_value (void) {
329 A_t a; a.a=1; a.b=2 a.c=3;
330 return a;
331 }
332 In the above, the storage for the return value is in the callers stack, and
333 the R1 points at that mem location.
334 */
335
336 #define STRUCT_VALUE_REGNUM 1
337
338 /* Define the classes of registers for register constraints in the
339 machine description. Also define ranges of constants.
340
341 One of the classes must always be named ALL_REGS and include all hard regs.
342 If there is more than one class, another class must be named NO_REGS
343 and contain no registers.
344
345 The name GENERAL_REGS must be the name of a class (or an alias for
346 another name such as ALL_REGS). This is the class of registers
347 that is allowed by "g" or "r" in a register constraint.
348 Also, registers outside this class are allocated only when
349 instructions express preferences for them.
350
351 The classes must be numbered in nondecreasing order; that is,
352 a larger-numbered class must never be contained completely
353 in a smaller-numbered class.
354
355 For any two classes, it is very desirable that there be another
356 class that represents their union. */
357
358 enum reg_class
359 {
360 NO_REGS, ADDR_REGS, DATA_REGS,
361 FP_REGS, ALL_REGS, LIM_REG_CLASSES
362 };
363
364 #define GENERAL_REGS DATA_REGS
365 #define N_REG_CLASSES (int) LIM_REG_CLASSES
366
367 /* Give names of register classes as strings for dump file. */
368
369 #define REG_CLASS_NAMES \
370 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
371
372 /* Define which registers fit in which classes. This is an initializer for
373 a vector of HARD_REG_SET of length N_REG_CLASSES. */
374
375 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
376
377 /* The same information, inverted:
378 Return the class number of the smallest class containing
379 reg number REGNO. This could be a conditional expression
380 or could index an array. */
381
382 #define REGNO_REG_CLASS(REGNO) \
383 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
384
385 /* The class value for index registers, and the one for base regs. */
386
387 #define INDEX_REG_CLASS ADDR_REGS
388 #define BASE_REG_CLASS ADDR_REGS
389
390 /* Get reg_class from a letter such as appears in the machine description. */
391
392 #define REG_CLASS_FROM_LETTER(C) \
393 ((C) == 'a' ? ADDR_REGS : \
394 ((C) == 'd' ? DATA_REGS : \
395 ((C) == 'f' ? FP_REGS : NO_REGS)))
396
397 /* The letters I, J, K, L and M in a register constraint string can be used
398 to stand for particular ranges of immediate operands.
399 This macro defines what the ranges are.
400 C is the letter, and VALUE is a constant value.
401 Return 1 if VALUE is in the range specified by C. */
402
403 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
404 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
405 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
406 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
407
408 /* Similar, but for floating constants, and defining letters G and H.
409 Here VALUE is the CONST_DOUBLE rtx itself. */
410
411 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
412
413 /* see recog.c for details */
414 #define EXTRA_CONSTRAINT(OP,C) \
415 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
416 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
417
418 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
419 return the class of reg to actually use. In general this is just CLASS;
420 but on some machines in some cases it is preferable to use a more
421 restrictive class.
422
423 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
424 rare occasions when lots of egisters are spilled, reload() will try
425 to put a const int into r0 and then use r0 as an index register.
426 */
427
428 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
429 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
430 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
431 GET_CODE(X) == LABEL_REF || \
432 GET_CODE(X) == SYMBOL_REF || \
433 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
434
435 /* Return the maximum number of consecutive registers needed to represent
436 mode MODE in a register of class CLASS.
437 Note that DCmode (complex double) needs two regs.
438 */
439
440 #define CLASS_MAX_NREGS(CLASS, MODE) \
441 ((CLASS) == FP_REGS ? \
442 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
443 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
444
445 /* Stack layout; function entry, exit and calling. */
446
447 /* Define this if pushing a word on the stack makes the stack pointer a
448 smaller address. */
449 /* ------------------------------------------------------------------- */
450
451 /* ================= */
452 #ifdef TARGET_HLASM
453 /* #define STACK_GROWS_DOWNWARD */
454
455 /* Define this if the nominal address of the stack frame is at the
456 high-address end of the local variables; that is, each additional local
457 variable allocated goes at a more negative offset in the frame. */
458
459 /* #define FRAME_GROWS_DOWNWARD */
460
461 /* Offset within stack frame to start allocating local variables at.
462 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
463 first local allocated. Otherwise, it is the offset to the BEGINNING
464 of the first local allocated. */
465
466 #define STARTING_FRAME_OFFSET \
467 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
468
469 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
470
471 /* If we generate an insn to push BYTES bytes, this says how many the stack
472 pointer really advances by. On the 370, we have no push instruction. */
473
474 #endif /* TARGET_HLASM */
475
476 /* ================= */
477 #ifdef TARGET_ELF_ABI
478
479 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
480 But we want the compiler to generate posistive displacements from the
481 stack pointer, and so we make the frame lie above the stack. */
482
483 #define STACK_GROWS_DOWNWARD
484 /* #define FRAME_GROWS_DOWNWARD */
485
486 /* Offset within stack frame to start allocating local variables at.
487 This is the offset to the BEGINNING of the first local allocated. */
488
489 #define STARTING_FRAME_OFFSET \
490 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
491
492 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
493
494 #endif /* TARGET_ELF_ABI */
495 /* ================= */
496
497 /* #define PUSH_ROUNDING(BYTES) */
498
499 /* Accumulate the outgoing argument count so we can request the right
500 DSA size and determine stack offset. */
501
502 #define ACCUMULATE_OUTGOING_ARGS 1
503
504 /* Define offset from stack pointer, to location where a parm can be
505 pushed. */
506
507 #define STACK_POINTER_OFFSET 148
508
509 /* Offset of first parameter from the argument pointer register value. */
510
511 #define FIRST_PARM_OFFSET(FNDECL) 0
512
513 /* 1 if N is a possible register number for function argument passing.
514 On the 370, no registers are used in this way. */
515
516 #define FUNCTION_ARG_REGNO_P(N) 0
517
518 /* Define a data type for recording info about an argument list during
519 the scan of that argument list. This data type should hold all
520 necessary information about the function itself and about the args
521 processed so far, enough to enable macros such as FUNCTION_ARG to
522 determine where the next arg should go. */
523
524 #define CUMULATIVE_ARGS int
525
526 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
527 a function whose data type is FNTYPE.
528 For a library call, FNTYPE is 0. */
529
530 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
531
532 /* Update the data in CUM to advance over an argument of mode MODE and
533 data type TYPE. (TYPE is null for libcalls where that information
534 may not be available.) */
535
536 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
537 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
538 ? 256 \
539 : (MODE) != BLKmode \
540 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
541 : (int_size_in_bytes (TYPE) + 3) / 4))
542
543 /* Define where to put the arguments to a function. Value is zero to push
544 the argument on the stack, or a hard register in which to store the
545 argument. */
546
547 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
548
549 /* For an arg passed partly in registers and partly in memory, this is the
550 number of registers used. For args passed entirely in registers or
551 entirely in memory, zero. */
552
553 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
554
555 /* Define if returning from a function call automatically pops the
556 arguments described by the number-of-args field in the call. */
557
558 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
559
560 /* The FUNCTION_VALUE macro defines how to find the value returned by a
561 function. VALTYPE is the data type of the value (as a tree).
562 If the precise function being called is known, FUNC is its FUNCTION_DECL;
563 otherwise, FUNC is NULL.
564
565 On the 370 the return value is in R15 or R16. However,
566 DImode (64-bit ints) scalars need to get returned on the stack,
567 with r15 pointing to the location. To accomplish this, we define
568 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
569 and the DImode scalars.
570 */
571
572 #define RET_REG(MODE) \
573 (((MODE) == DCmode || (MODE) == SCmode \
574 || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
575
576 #define FUNCTION_VALUE(VALTYPE, FUNC) \
577 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
578
579 #define RETURN_IN_MEMORY(VALTYPE) \
580 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
581
582 /* Define how to find the value returned by a library function assuming
583 the value has mode MODE. */
584
585 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
586
587 /* 1 if N is a possible register number for a function value.
588 On the 370 under C/370, R15 and R16 are thus used. */
589
590 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
591
592 /* This macro definition sets up a default value for `main' to return. */
593
594 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
595
596
597 /* Output assembler code for a block containing the constant parts of a
598 trampoline, leaving space for the variable parts.
599
600 On the 370, the trampoline contains these instructions:
601
602 BALR 14,0
603 USING *,14
604 L STATIC_CHAIN_REGISTER,X
605 L 15,Y
606 BR 15
607 X DS 0F
608 Y DS 0F */
609 /*
610 I am confused as to why this emitting raw binary, instead of instructions ...
611 see for example, rs6000/rs000.c for an example of a different way to
612 do this ... especially since BASR should probably be substituted for BALR.
613 */
614
615 #define TRAMPOLINE_TEMPLATE(FILE) \
616 { \
617 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
618 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
619 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
620 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
621 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
622 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
623 assemble_aligned_integer (2, const0_rtx); \
624 assemble_aligned_integer (2, const0_rtx); \
625 assemble_aligned_integer (2, const0_rtx); \
626 assemble_aligned_integer (2, const0_rtx); \
627 }
628
629 /* Length in units of the trampoline for entering a nested function. */
630
631 #define TRAMPOLINE_SIZE 20
632
633 /* Emit RTL insns to initialize the variable parts of a trampoline. */
634
635 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
636 { \
637 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
638 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
639 }
640
641 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
642 pointer does not matter (provided there is a frame pointer). */
643
644 #define EXIT_IGNORE_STACK 1
645
646 /* Addressing modes, and classification of registers for them. */
647
648 /* These assume that REGNO is a hard or pseudo reg number. They give
649 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
650 reg currently allocated to a suitable hard reg.
651 These definitions are NOT overridden anywhere. */
652
653 #define REGNO_OK_FOR_INDEX_P(REGNO) \
654 (((REGNO) > 0 && (REGNO) < 16) \
655 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
656
657 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
658
659 #define REGNO_OK_FOR_DATA_P(REGNO) \
660 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
661
662 #define REGNO_OK_FOR_FP_P(REGNO) \
663 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
664
665 /* Now macros that check whether X is a register and also,
666 strictly, whether it is in a specified class. */
667
668 /* 1 if X is a data register. */
669
670 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
671
672 /* 1 if X is an fp register. */
673
674 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
675
676 /* 1 if X is an address register. */
677
678 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
679
680 /* Maximum number of registers that can appear in a valid memory address. */
681
682 #define MAX_REGS_PER_ADDRESS 2
683
684 /* Recognize any constant value that is a valid address. */
685
686 #define CONSTANT_ADDRESS_P(X) \
687 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
688 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
689 || (GET_CODE (X) == CONST \
690 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
691 || (GET_CODE (X) == CONST \
692 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
693 && !SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (X, 0), 0))))
694
695 /* Nonzero if the constant value X is a legitimate general operand.
696 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
697
698 #define LEGITIMATE_CONSTANT_P(X) 1
699
700 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
701 its validity for a certain class. We have two alternate definitions
702 for each of them. The usual definition accepts all pseudo regs; the
703 other rejects them all. The symbol REG_OK_STRICT causes the latter
704 definition to be used.
705
706 Most source files want to accept pseudo regs in the hope that they will
707 get allocated to the class that the insn wants them to be in.
708 Some source files that are used after register allocation
709 need to be strict. */
710
711 #ifndef REG_OK_STRICT
712
713 /* Nonzero if X is a hard reg that can be used as an index or if it is
714 a pseudo reg. */
715
716 #define REG_OK_FOR_INDEX_P(X) \
717 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
718
719 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
720 a pseudo reg. */
721
722 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
723
724 #else /* REG_OK_STRICT */
725
726 /* Nonzero if X is a hard reg that can be used as an index. */
727
728 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
729
730 /* Nonzero if X is a hard reg that can be used as a base reg. */
731
732 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
733
734 #endif /* REG_OK_STRICT */
735
736 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
737 valid memory address for an instruction.
738 The MODE argument is the machine mode for the MEM expression
739 that wants to use this address.
740
741 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
742 except for CONSTANT_ADDRESS_P which is actually machine-independent.
743 */
744
745 #define COUNT_REGS(X, REGS, FAIL) \
746 if (REG_P (X)) { \
747 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
748 else goto FAIL; \
749 } \
750 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
751 goto FAIL;
752
753 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
754 { \
755 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
756 goto ADDR; \
757 if (GET_CODE (X) == PLUS) \
758 { \
759 int regs = 0; \
760 rtx x0 = XEXP (X, 0); \
761 rtx x1 = XEXP (X, 1); \
762 if (GET_CODE (x0) == PLUS) \
763 { \
764 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
765 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
766 COUNT_REGS (x1, regs, FAIL); \
767 if (regs == 2) \
768 goto ADDR; \
769 } \
770 else if (GET_CODE (x1) == PLUS) \
771 { \
772 COUNT_REGS (x0, regs, FAIL); \
773 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
774 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
775 if (regs == 2) \
776 goto ADDR; \
777 } \
778 else \
779 { \
780 COUNT_REGS (x0, regs, FAIL); \
781 COUNT_REGS (x1, regs, FAIL); \
782 if (regs != 0) \
783 goto ADDR; \
784 } \
785 } \
786 FAIL: ; \
787 }
788
789 /* The 370 has no mode dependent addresses. */
790
791 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
792
793 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
794 Try machine-dependent ways of modifying an illegitimate address
795 to be legitimate. If we find one, return the new, valid address.
796 This macro is used in only one place: `memory_address' in explow.c.
797
798 Several comments:
799 (1) It's not obvious that this macro results in better code
800 than its omission does. For historical reasons we leave it in.
801
802 (2) This macro may be (???) implicated in the accidental promotion
803 or RS operand to RX operands, which bombs out any RS, SI, SS
804 instruction that was expecting a simple address. Note that
805 this occurs fairly rarely ...
806
807 (3) There is a bug somewhere that causes either r4 to be spilled,
808 or causes r0 to be used as a base register. Changeing the macro
809 below will make the bug move around, but will not make it go away
810 ... Note that this is a rare bug ...
811
812 */
813
814 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
815 { \
816 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
817 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
818 copy_to_mode_reg (SImode, XEXP (X, 1))); \
819 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
820 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
821 copy_to_mode_reg (SImode, XEXP (X, 0))); \
822 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
823 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
824 force_operand (XEXP (X, 0), 0)); \
825 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
826 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
827 force_operand (XEXP (X, 1), 0)); \
828 if (memory_address_p (MODE, X)) \
829 goto WIN; \
830 }
831
832 /* Specify the machine mode that this machine uses for the index in the
833 tablejump instruction. */
834
835 #define CASE_VECTOR_MODE SImode
836
837 /* Define this if the tablejump instruction expects the table to contain
838 offsets from the address of the table.
839 Do not define this if the table should contain absolute addresses. */
840
841 /* #define CASE_VECTOR_PC_RELATIVE */
842
843 /* Define this if fixuns_trunc is the same as fix_trunc. */
844
845 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
846
847 /* We use "unsigned char" as default. */
848
849 #define DEFAULT_SIGNED_CHAR 0
850
851 /* Max number of bytes we can move from memory to memory in one reasonably
852 fast instruction. */
853
854 #define MOVE_MAX 256
855
856 /* Nonzero if access to memory by bytes is slow and undesirable. */
857
858 #define SLOW_BYTE_ACCESS 1
859
860 /* Define if shifts truncate the shift count which implies one can omit
861 a sign-extension or zero-extension of a shift count. */
862
863 /* #define SHIFT_COUNT_TRUNCATED */
864
865 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
866 is done just by pretending it is already truncated. */
867
868 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
869
870 /* ??? Investigate defining STORE_FLAG_VALUE to (-1). */
871
872 /* When a prototype says `char' or `short', really pass an `int'. */
873
874 #define PROMOTE_PROTOTYPES 1
875
876 /* Don't perform CSE on function addresses. */
877
878 #define NO_FUNCTION_CSE
879
880 /* Specify the machine mode that pointers have.
881 After generation of rtl, the compiler makes no further distinction
882 between pointers and any other objects of this machine mode. */
883
884 #define Pmode SImode
885
886 /* A function address in a call instruction is a byte address (for
887 indexing purposes) so give the MEM rtx a byte's mode. */
888
889 #define FUNCTION_MODE QImode
890
891 /* A C statement (sans semicolon) to update the integer variable COST
892 based on the relationship between INSN that is dependent on
893 DEP_INSN through the dependence LINK. The default is to make no
894 adjustment to COST. This can be used for example to specify to
895 the scheduler that an output- or anti-dependence does not incur
896 the same cost as a data-dependence.
897
898 We will want to use this to indicate that there is a cost associated
899 with the loading, followed by use of base registers ...
900 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
901 */
902
903 /* Tell final.c how to eliminate redundant test instructions. */
904
905 /* Here we define machine-dependent flags and fields in cc_status
906 (see `conditions.h'). */
907
908 /* Store in cc_status the expressions that the condition codes will
909 describe after execution of an instruction whose pattern is EXP.
910 Do not alter them if the instruction would not alter the cc's.
911
912 On the 370, load insns do not alter the cc's. However, in some
913 cases these instructions can make it possibly invalid to use the
914 saved cc's. In those cases we clear out some or all of the saved
915 cc's so they won't be used.
916
917 Note that only some arith instructions set the CC. These include
918 add, subtract, complement, various shifts. Note that multiply
919 and divide do *not* set set the CC. Therefore, in the code below,
920 don't set the status for MUL, DIV, etc.
921
922 Note that the bitwise ops set the condition code, but not in a
923 way that we can make use of it. So we treat these as clobbering,
924 rather than setting the CC. These are clobbered in the individual
925 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
926 */
927
928 #define NOTICE_UPDATE_CC(EXP, INSN) \
929 { \
930 rtx exp = (EXP); \
931 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
932 exp = XVECEXP (exp, 0, 0); \
933 if (GET_CODE (exp) != SET) \
934 CC_STATUS_INIT; \
935 else \
936 { \
937 if (XEXP (exp, 0) == cc0_rtx) \
938 { \
939 cc_status.value1 = XEXP (exp, 0); \
940 cc_status.value2 = XEXP (exp, 1); \
941 cc_status.flags = 0; \
942 } \
943 else \
944 { \
945 if (cc_status.value1 \
946 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
947 cc_status.value1 = 0; \
948 if (cc_status.value2 \
949 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
950 cc_status.value2 = 0; \
951 switch (GET_CODE (XEXP (exp, 1))) \
952 { \
953 case PLUS: case MINUS: case NEG: \
954 case NOT: case ABS: \
955 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
956 \
957 /* mult and div don't set any cc codes !! */ \
958 case MULT: /* case UMULT: */ case DIV: case UDIV: \
959 /* and, or and xor set the cc's the wrong way !! */ \
960 case AND: case IOR: case XOR: \
961 /* some shifts set the CC some don't. */ \
962 case ASHIFT: case ASHIFTRT: \
963 do {} while (0); \
964 default: \
965 break; \
966 } \
967 } \
968 } \
969 }
970
971
972 #define CC_STATUS_SET(V1, V2) \
973 { \
974 cc_status.flags = 0; \
975 cc_status.value1 = (V1); \
976 cc_status.value2 = (V2); \
977 if (cc_status.value1 \
978 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
979 cc_status.value2 = 0; \
980 }
981
982 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
983 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
984
985 /* ------------------------------------------ */
986 /* Control the assembler format that we output. */
987
988 /* Define standard character escape sequences for non-ASCII targets
989 only. */
990
991 #ifdef TARGET_EBCDIC
992 #define TARGET_ESC 39
993 #define TARGET_BELL 47
994 #define TARGET_BS 22
995 #define TARGET_TAB 5
996 #define TARGET_NEWLINE 21
997 #define TARGET_VT 11
998 #define TARGET_FF 12
999 #define TARGET_CR 13
1000 #endif
1001
1002 /* ======================================================== */
1003
1004 #ifdef TARGET_HLASM
1005 #define TEXT_SECTION_ASM_OP "* Program text area"
1006 #define DATA_SECTION_ASM_OP "* Program data area"
1007 #define INIT_SECTION_ASM_OP "* Program initialization area"
1008 #define SHARED_SECTION_ASM_OP "* Program shared data"
1009 #define CTOR_LIST_BEGIN /* NO OP */
1010 #define CTOR_LIST_END /* NO OP */
1011 #define MAX_MVS_LABEL_SIZE 8
1012
1013 /* How to refer to registers in assembler output. This sequence is
1014 indexed by compiler's hard-register-number (see above). */
1015
1016 #define REGISTER_NAMES \
1017 { "0", "1", "2", "3", "4", "5", "6", "7", \
1018 "8", "9", "10", "11", "12", "13", "14", "15", \
1019 "0", "2", "4", "6" \
1020 }
1021
1022 #define ASM_COMMENT_START "*"
1023 #define ASM_APP_OFF ""
1024 #define ASM_APP_ON ""
1025
1026 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1027 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1028
1029 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1030 { \
1031 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1032 if (mvs_check_alias (NAME, temp) == 2) \
1033 { \
1034 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1035 } \
1036 }
1037
1038 /* MVS externals are limited to 8 characters, upper case only.
1039 The '_' is mapped to '@', except for MVS functions, then '#'. */
1040
1041
1042 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1043 { \
1044 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1045 if (!mvs_get_alias (NAME, temp)) \
1046 strcpy (temp, NAME); \
1047 if (!strcmp (temp,"main")) \
1048 strcpy (temp,"gccmain"); \
1049 if (mvs_function_check (temp)) \
1050 ch = '#'; \
1051 else \
1052 ch = '@'; \
1053 for (bp = temp; *bp; bp++) \
1054 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1055 fprintf (FILE, "%s", temp); \
1056 }
1057
1058 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1059 sprintf (LABEL, "*%s%lu", PREFIX, (unsigned long)(NUM))
1060
1061 /* Generate case label. For HLASM we can change to the data CSECT
1062 and put the vectors out of the code body. The assembler just
1063 concatenates CSECTs with the same name. */
1064
1065 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1066 fprintf (FILE, "\tDS\t0F\n"); \
1067 fprintf (FILE,"\tCSECT\n"); \
1068 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1069
1070 /* Put the CSECT back to the code body */
1071
1072 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1073 assemble_name (FILE, mvs_function_name); \
1074 fputs ("\tCSECT\n", FILE);
1075
1076 /* This is how to output an element of a case-vector that is absolute. */
1077
1078 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1079 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1080
1081 /* This is how to output an element of a case-vector that is relative. */
1082
1083 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1084 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1085
1086 /* This is how to output an insn to push a register on the stack.
1087 It need not be very fast code.
1088 Right now, PUSH & POP are used only when profiling is enabled,
1089 and then, only to push the static chain reg and the function struct
1090 value reg, and only if those are used. Since profiling is not
1091 supported anyway, punt on this. */
1092
1093 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1094 mvs_check_page (FILE, 8, 4); \
1095 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1096 reg_names[REGNO], STACK_POINTER_OFFSET)
1097
1098 /* This is how to output an insn to pop a register from the stack.
1099 It need not be very fast code. */
1100
1101 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1102 mvs_check_page (FILE, 8, 0); \
1103 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1104 reg_names[REGNO], STACK_POINTER_OFFSET)
1105
1106 /* This outputs a text string. The string are chopped up to fit into
1107 an 80 byte record. Also, control and special characters, interpreted
1108 by the IBM assembler, are output numerically. */
1109
1110 #define MVS_ASCII_TEXT_LENGTH 48
1111
1112 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1113 { \
1114 size_t i, limit = (LEN); \
1115 int j; \
1116 for (j = 0, i = 0; i < limit; j++, i++) \
1117 { \
1118 int c = (PTR)[i]; \
1119 if (ISCNTRL (c) || c == '&') \
1120 { \
1121 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1122 fprintf (FILE, "'\n"); \
1123 j = -1; \
1124 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1125 } \
1126 else \
1127 { \
1128 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1129 fprintf (FILE, "\tDC\tC'"); \
1130 if ( c == '\'' ) \
1131 fprintf (FILE, "%c%c", c, c); \
1132 else \
1133 fprintf (FILE, "%c", c); \
1134 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1135 fprintf (FILE, "'\n" ); \
1136 } \
1137 } \
1138 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1139 fprintf (FILE, "'\n"); \
1140 }
1141
1142 /* This is how to output an assembler line that says to advance the
1143 location counter to a multiple of 2**LOG bytes. */
1144
1145 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1146 if (LOG) \
1147 { \
1148 if ((LOG) == 1) \
1149 fprintf (FILE, "\tDS\t0H\n" ); \
1150 else \
1151 fprintf (FILE, "\tDS\t0F\n" ); \
1152 } \
1153
1154 /* The maximum length of memory that the IBM assembler will allow in one
1155 DS operation. */
1156
1157 #define MAX_CHUNK 32767
1158
1159 /* A C statement to output to the stdio stream FILE an assembler
1160 instruction to advance the location counter by SIZE bytes. Those
1161 bytes should be zero when loaded. */
1162
1163 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1164 { \
1165 unsigned HOST_WIDE_INT s; \
1166 int k; \
1167 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1168 { \
1169 if (s > MAX_CHUNK) \
1170 k = MAX_CHUNK; \
1171 else \
1172 k = s; \
1173 fprintf (FILE, "\tDS\tXL%d\n", k); \
1174 } \
1175 }
1176
1177 /* A C statement (sans semicolon) to output to the stdio stream
1178 FILE the assembler definition of a common-label named NAME whose
1179 size is SIZE bytes. The variable ROUNDED is the size rounded up
1180 to whatever alignment the caller wants. */
1181
1182 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1183 { \
1184 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1185 if (mvs_check_alias(NAME, temp) == 2) \
1186 { \
1187 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1188 } \
1189 fputs ("\tENTRY\t", FILE); \
1190 assemble_name (FILE, NAME); \
1191 fputs ("\n", FILE); \
1192 fprintf (FILE, "\tDS\t0F\n"); \
1193 ASM_OUTPUT_LABEL (FILE,NAME); \
1194 ASM_OUTPUT_SKIP (FILE,SIZE); \
1195 }
1196
1197 /* A C statement (sans semicolon) to output to the stdio stream
1198 FILE the assembler definition of a local-common-label named NAME
1199 whose size is SIZE bytes. The variable ROUNDED is the size
1200 rounded up to whatever alignment the caller wants. */
1201
1202 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1203 { \
1204 fprintf (FILE, "\tDS\t0F\n"); \
1205 ASM_OUTPUT_LABEL (FILE,NAME); \
1206 ASM_OUTPUT_SKIP (FILE,SIZE); \
1207 }
1208
1209 #define ASM_PN_FORMAT "%s%lu"
1210
1211 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1212 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1213 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1214
1215 #define PRINT_OPERAND(FILE, XV, CODE) \
1216 { \
1217 switch (GET_CODE (XV)) \
1218 { \
1219 static char curreg[4]; \
1220 case REG: \
1221 if (CODE == 'N') \
1222 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1223 else \
1224 strcpy (curreg, reg_names[REGNO (XV)]); \
1225 fprintf (FILE, "%s", curreg); \
1226 break; \
1227 case MEM: \
1228 { \
1229 rtx addr = XEXP (XV, 0); \
1230 if (CODE == 'O') \
1231 { \
1232 if (GET_CODE (addr) == PLUS) \
1233 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (addr, 1))); \
1234 else \
1235 fprintf (FILE, "0"); \
1236 } \
1237 else if (CODE == 'R') \
1238 { \
1239 if (GET_CODE (addr) == PLUS) \
1240 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1241 else \
1242 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1243 } \
1244 else \
1245 output_address (XEXP (XV, 0)); \
1246 } \
1247 break; \
1248 case SYMBOL_REF: \
1249 case LABEL_REF: \
1250 mvs_page_lit += 4; \
1251 if (SYMBOL_REF_EXTERNAL_P (XV)) fprintf (FILE, "=V("); \
1252 else fprintf (FILE, "=A("); \
1253 output_addr_const (FILE, XV); \
1254 fprintf (FILE, ")"); \
1255 break; \
1256 case CONST_INT: \
1257 if (CODE == 'B') \
1258 fprintf (FILE, "%d", (int) (INTVAL (XV) & 0xff)); \
1259 else if (CODE == 'X') \
1260 fprintf (FILE, "%02X", (int) (INTVAL (XV) & 0xff)); \
1261 else if (CODE == 'h') \
1262 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (INTVAL (XV) << 16) >> 16); \
1263 else if (CODE == 'H') \
1264 { \
1265 mvs_page_lit += 2; \
1266 fprintf (FILE, "=H'" HOST_WIDE_INT_PRINT_DEC "'", (INTVAL (XV) << 16) >> 16); \
1267 } \
1268 else if (CODE == 'K') \
1269 { \
1270 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1271 mvs_page_lit += 4; \
1272 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", (INTVAL (XV) << 16) >> 16); \
1273 } \
1274 else if (CODE == 'W') \
1275 { \
1276 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1277 mvs_page_lit += 8; \
1278 if (0 <= INTVAL (XV)) { \
1279 fprintf (FILE, "=XL8'00000000"); \
1280 } else { \
1281 fprintf (FILE, "=XL8'FFFFFFFF"); \
1282 } \
1283 fprintf (FILE, "%08X'", INTVAL (XV)); \
1284 } \
1285 else \
1286 { \
1287 mvs_page_lit += 4; \
1288 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", INTVAL (XV)); \
1289 } \
1290 break; \
1291 case CONST_DOUBLE: \
1292 if (GET_MODE (XV) == DImode) \
1293 { \
1294 if (CODE == 'M') \
1295 { \
1296 mvs_page_lit += 4; \
1297 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1298 } \
1299 else if (CODE == 'L') \
1300 { \
1301 mvs_page_lit += 4; \
1302 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1303 } \
1304 else \
1305 { \
1306 mvs_page_lit += 8; \
1307 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1308 CONST_DOUBLE_HIGH (XV)); \
1309 } \
1310 } \
1311 else \
1312 { \
1313 char buf[50]; \
1314 if (GET_MODE (XV) == SFmode) \
1315 { \
1316 mvs_page_lit += 4; \
1317 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1318 sizeof (buf), 0, 1); \
1319 fprintf (FILE, "=E'%s'", buf); \
1320 } \
1321 else if (GET_MODE (XV) == DFmode) \
1322 { \
1323 mvs_page_lit += 8; \
1324 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1325 sizeof (buf), 0, 1); \
1326 fprintf (FILE, "=D'%s'", buf); \
1327 } \
1328 else /* VOIDmode */ \
1329 { \
1330 mvs_page_lit += 8; \
1331 fprintf (FILE, "=XL8'%08X%08X'", \
1332 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1333 } \
1334 } \
1335 break; \
1336 case CONST: \
1337 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1338 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1339 { \
1340 mvs_page_lit += 4; \
1341 if (SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (XV, 0), 0))) \
1342 { \
1343 fprintf (FILE, "=V("); \
1344 ASM_OUTPUT_LABELREF (FILE, \
1345 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1346 fprintf (FILE, ")\n\tA\t%s,=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1347 curreg, INTVAL (XEXP (XEXP (XV, 0), 1))); \
1348 } \
1349 else \
1350 { \
1351 fprintf (FILE, "=A("); \
1352 output_addr_const (FILE, XV); \
1353 fprintf (FILE, ")"); \
1354 } \
1355 } \
1356 else \
1357 { \
1358 mvs_page_lit += 4; \
1359 fprintf (FILE, "=F'"); \
1360 output_addr_const (FILE, XV); \
1361 fprintf (FILE, "'"); \
1362 } \
1363 break; \
1364 default: \
1365 abort(); \
1366 } \
1367 }
1368
1369 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1370 { \
1371 rtx breg, xreg, offset, plus; \
1372 \
1373 switch (GET_CODE (ADDR)) \
1374 { \
1375 case REG: \
1376 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1377 break; \
1378 case PLUS: \
1379 breg = 0; \
1380 xreg = 0; \
1381 offset = 0; \
1382 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1383 { \
1384 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1385 breg = XEXP (ADDR, 1); \
1386 else \
1387 offset = XEXP (ADDR, 1); \
1388 plus = XEXP (ADDR, 0); \
1389 } \
1390 else \
1391 { \
1392 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1393 breg = XEXP (ADDR, 0); \
1394 else \
1395 offset = XEXP (ADDR, 0); \
1396 plus = XEXP (ADDR, 1); \
1397 } \
1398 if (GET_CODE (plus) == PLUS) \
1399 { \
1400 if (GET_CODE (XEXP (plus, 0)) == REG) \
1401 { \
1402 if (breg) \
1403 xreg = XEXP (plus, 0); \
1404 else \
1405 breg = XEXP (plus, 0); \
1406 } \
1407 else \
1408 { \
1409 offset = XEXP (plus, 0); \
1410 } \
1411 if (GET_CODE (XEXP (plus, 1)) == REG) \
1412 { \
1413 if (breg) \
1414 xreg = XEXP (plus, 1); \
1415 else \
1416 breg = XEXP (plus, 1); \
1417 } \
1418 else \
1419 { \
1420 offset = XEXP (plus, 1); \
1421 } \
1422 } \
1423 else if (GET_CODE (plus) == REG) \
1424 { \
1425 if (breg) \
1426 xreg = plus; \
1427 else \
1428 breg = plus; \
1429 } \
1430 else \
1431 { \
1432 offset = plus; \
1433 } \
1434 if (offset) \
1435 { \
1436 if (GET_CODE (offset) == LABEL_REF) \
1437 fprintf (FILE, "L%d", \
1438 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1439 else \
1440 output_addr_const (FILE, offset); \
1441 } \
1442 else \
1443 fprintf (FILE, "0"); \
1444 if (xreg) \
1445 fprintf (FILE, "(%s,%s)", \
1446 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1447 else \
1448 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1449 break; \
1450 default: \
1451 mvs_page_lit += 4; \
1452 if (SYMBOL_REF_EXTERNAL_P (ADDR)) fprintf (FILE, "=V("); \
1453 else fprintf (FILE, "=A("); \
1454 output_addr_const (FILE, ADDR); \
1455 fprintf (FILE, ")"); \
1456 break; \
1457 } \
1458 }
1459
1460 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1461 { \
1462 if (strlen (NAME) + 1 > mvs_function_name_length) \
1463 { \
1464 if (mvs_function_name) \
1465 free (mvs_function_name); \
1466 mvs_function_name = 0; \
1467 } \
1468 if (!mvs_function_name) \
1469 { \
1470 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1471 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1472 } \
1473 if (!strcmp (NAME, "main")) \
1474 strcpy (mvs_function_name, "gccmain"); \
1475 else \
1476 strcpy (mvs_function_name, NAME); \
1477 fprintf (FILE, "\tDS\t0F\n"); \
1478 assemble_name (FILE, mvs_function_name); \
1479 fputs ("\tRMODE\tANY\n", FILE); \
1480 assemble_name (FILE, mvs_function_name); \
1481 fputs ("\tCSECT\n", FILE); \
1482 }
1483
1484 /* Output assembler code to FILE to increment profiler label # LABELNO
1485 for profiling a function entry. */
1486
1487 #define FUNCTION_PROFILER(FILE, LABELNO) \
1488 fprintf (FILE, "Error: No profiling available.\n")
1489
1490 #endif /* TARGET_HLASM */
1491
1492 /* ======================================================== */
1493
1494 #ifdef TARGET_ELF_ABI
1495
1496 /* How to refer to registers in assembler output. This sequence is
1497 indexed by compiler's hard-register-number (see above). */
1498
1499 #define REGISTER_NAMES \
1500 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1501 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1502 "f0", "f2", "f4", "f6" \
1503 }
1504
1505 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1506 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1507 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1508
1509 #define PRINT_OPERAND(FILE, XV, CODE) \
1510 { \
1511 switch (GET_CODE (XV)) \
1512 { \
1513 static char curreg[4]; \
1514 case REG: \
1515 if (CODE == 'N') \
1516 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1517 else \
1518 strcpy (curreg, reg_names[REGNO (XV)]); \
1519 fprintf (FILE, "%s", curreg); \
1520 break; \
1521 case MEM: \
1522 { \
1523 rtx addr = XEXP (XV, 0); \
1524 if (CODE == 'O') \
1525 { \
1526 if (GET_CODE (addr) == PLUS) \
1527 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (addr, 1))); \
1528 else \
1529 fprintf (FILE, "0"); \
1530 } \
1531 else if (CODE == 'R') \
1532 { \
1533 if (GET_CODE (addr) == PLUS) \
1534 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1535 else \
1536 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1537 } \
1538 else \
1539 output_address (XEXP (XV, 0)); \
1540 } \
1541 break; \
1542 case SYMBOL_REF: \
1543 case LABEL_REF: \
1544 mvs_page_lit += 4; \
1545 if (SYMBOL_REF_EXTERNAL_P (XV)) fprintf (FILE, "=V("); \
1546 else fprintf (FILE, "=A("); \
1547 output_addr_const (FILE, XV); \
1548 fprintf (FILE, ")"); \
1549 break; \
1550 case CONST_INT: \
1551 if (CODE == 'B') \
1552 fprintf (FILE, "%d", (int) (INTVAL (XV) & 0xff)); \
1553 else if (CODE == 'X') \
1554 fprintf (FILE, "%02X", (int) (INTVAL (XV) & 0xff)); \
1555 else if (CODE == 'h') \
1556 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (INTVAL (XV) << 16) >> 16); \
1557 else if (CODE == 'H') \
1558 { \
1559 mvs_page_lit += 2; \
1560 fprintf (FILE, "=H'" HOST_WIDE_INT_PRINT_DEC "'", \
1561 (INTVAL (XV) << 16) >> 16); \
1562 } \
1563 else if (CODE == 'K') \
1564 { \
1565 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1566 mvs_page_lit += 4; \
1567 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1568 (INTVAL (XV) << 16) >> 16); \
1569 } \
1570 else if (CODE == 'W') \
1571 { \
1572 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1573 mvs_page_lit += 8; \
1574 if (0 <= INTVAL (XV)) { \
1575 fprintf (FILE, "=XL8'00000000"); \
1576 } else { \
1577 fprintf (FILE, "=XL8'FFFFFFFF"); \
1578 } \
1579 fprintf (FILE, "%08X'", INTVAL (XV)); \
1580 } \
1581 else \
1582 { \
1583 mvs_page_lit += 4; \
1584 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", INTVAL (XV)); \
1585 } \
1586 break; \
1587 case CONST_DOUBLE: \
1588 if (GET_MODE (XV) == DImode) \
1589 { \
1590 if (CODE == 'M') \
1591 { \
1592 mvs_page_lit += 4; \
1593 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1594 } \
1595 else if (CODE == 'L') \
1596 { \
1597 mvs_page_lit += 4; \
1598 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1599 } \
1600 else \
1601 { \
1602 mvs_page_lit += 8; \
1603 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1604 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1605 } \
1606 } \
1607 else \
1608 { \
1609 char buf[50]; \
1610 if (GET_MODE (XV) == SFmode) \
1611 { \
1612 mvs_page_lit += 4; \
1613 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1614 sizeof (buf), 0, 1); \
1615 fprintf (FILE, "=E'%s'", buf); \
1616 } \
1617 else if (GET_MODE (XV) == DFmode) \
1618 { \
1619 mvs_page_lit += 8; \
1620 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1621 sizeof (buf), 0, 1); \
1622 fprintf (FILE, "=D'%s'", buf); \
1623 } \
1624 else /* VOIDmode */ \
1625 { \
1626 mvs_page_lit += 8; \
1627 fprintf (FILE, "=XL8'%08X%08X'", \
1628 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1629 } \
1630 } \
1631 break; \
1632 case CONST: \
1633 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1634 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1635 { \
1636 mvs_page_lit += 4; \
1637 if (SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (XV, 0), 0))) \
1638 { \
1639 fprintf (FILE, "=V("); \
1640 ASM_OUTPUT_LABELREF (FILE, \
1641 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1642 fprintf (FILE, ")\n\tA\t%s,=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1643 curreg, INTVAL (XEXP (XEXP (XV, 0), 1))); \
1644 } \
1645 else \
1646 { \
1647 fprintf (FILE, "=A("); \
1648 output_addr_const (FILE, XV); \
1649 fprintf (FILE, ")"); \
1650 } \
1651 } \
1652 else \
1653 { \
1654 mvs_page_lit += 4; \
1655 fprintf (FILE, "=bogus_bad_F'"); \
1656 output_addr_const (FILE, XV); \
1657 fprintf (FILE, "'"); \
1658 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1659 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1660 debug_rtx (XV); \
1661 abort(); \
1662 } \
1663 break; \
1664 default: \
1665 abort(); \
1666 } \
1667 }
1668
1669 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1670 { \
1671 rtx breg, xreg, offset, plus; \
1672 \
1673 switch (GET_CODE (ADDR)) \
1674 { \
1675 case REG: \
1676 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1677 break; \
1678 case PLUS: \
1679 breg = 0; \
1680 xreg = 0; \
1681 offset = 0; \
1682 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1683 { \
1684 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1685 breg = XEXP (ADDR, 1); \
1686 else \
1687 offset = XEXP (ADDR, 1); \
1688 plus = XEXP (ADDR, 0); \
1689 } \
1690 else \
1691 { \
1692 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1693 breg = XEXP (ADDR, 0); \
1694 else \
1695 offset = XEXP (ADDR, 0); \
1696 plus = XEXP (ADDR, 1); \
1697 } \
1698 if (GET_CODE (plus) == PLUS) \
1699 { \
1700 if (GET_CODE (XEXP (plus, 0)) == REG) \
1701 { \
1702 if (breg) \
1703 xreg = XEXP (plus, 0); \
1704 else \
1705 breg = XEXP (plus, 0); \
1706 } \
1707 else \
1708 { \
1709 offset = XEXP (plus, 0); \
1710 } \
1711 if (GET_CODE (XEXP (plus, 1)) == REG) \
1712 { \
1713 if (breg) \
1714 xreg = XEXP (plus, 1); \
1715 else \
1716 breg = XEXP (plus, 1); \
1717 } \
1718 else \
1719 { \
1720 offset = XEXP (plus, 1); \
1721 } \
1722 } \
1723 else if (GET_CODE (plus) == REG) \
1724 { \
1725 if (breg) \
1726 xreg = plus; \
1727 else \
1728 breg = plus; \
1729 } \
1730 else \
1731 { \
1732 offset = plus; \
1733 } \
1734 if (offset) \
1735 { \
1736 if (GET_CODE (offset) == LABEL_REF) \
1737 fprintf (FILE, "L%d", \
1738 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1739 else \
1740 output_addr_const (FILE, offset); \
1741 } \
1742 else \
1743 fprintf (FILE, "0"); \
1744 if (xreg) \
1745 fprintf (FILE, "(%s,%s)", \
1746 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1747 else \
1748 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1749 break; \
1750 default: \
1751 mvs_page_lit += 4; \
1752 if (SYMBOL_REF_EXTERNAL_P (ADDR)) fprintf (FILE, "=V("); \
1753 else fprintf (FILE, "=A("); \
1754 output_addr_const (FILE, ADDR); \
1755 fprintf (FILE, ")"); \
1756 break; \
1757 } \
1758 }
1759
1760 /* Output assembler code to FILE to increment profiler label # LABELNO
1761 for profiling a function entry. */
1762 /* Make it a no-op for now, so we can at least compile glibc */
1763 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1764 mvs_check_page (FILE, 24, 4); \
1765 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1766 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1767 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1768 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1769 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1770 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1771 }
1772
1773 /* Don't bother to output .extern pseudo-ops. They are not needed by
1774 ELF assemblers. */
1775
1776 #undef ASM_OUTPUT_EXTERNAL
1777
1778 #define ASM_DOUBLE "\t.double"
1779
1780 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1781
1782 /* let config/svr4.h define this ...
1783 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1784 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1785 */
1786
1787 /* This is how to output an element of a case-vector that is absolute. */
1788 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1789 mvs_check_page (FILE, 4, 0); \
1790 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1791
1792 /* This is how to output an element of a case-vector that is relative. */
1793 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1794 mvs_check_page (FILE, 4, 0); \
1795 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1796
1797 /* Right now, PUSH & POP are used only when profiling is enabled,
1798 and then, only to push the static chain reg and the function struct
1799 value reg, and only if those are used by the function being profiled.
1800 We don't need this for profiling, so punt. */
1801 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1802 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1803
1804
1805 /* Indicate that jump tables go in the text section. This is
1806 necessary when compiling PIC code. */
1807 #define JUMP_TABLES_IN_TEXT_SECTION 1
1808
1809 /* Define macro used to output shift-double opcodes when the shift
1810 count is in %cl. Some assemblers require %cl as an argument;
1811 some don't.
1812
1813 GAS requires the %cl argument, so override i386/unix.h. */
1814
1815 #undef SHIFT_DOUBLE_OMITS_COUNT
1816 #define SHIFT_DOUBLE_OMITS_COUNT 0
1817
1818 /* Implicit library calls should use memcpy, not bcopy, etc. */
1819 #define TARGET_MEM_FUNCTIONS
1820
1821 /* Output before read-only data. */
1822 #define TEXT_SECTION_ASM_OP "\t.text"
1823
1824 /* Output before writable (initialized) data. */
1825 #define DATA_SECTION_ASM_OP "\t.data"
1826
1827 /* Output before writable (uninitialized) data. */
1828 #define BSS_SECTION_ASM_OP "\t.bss"
1829
1830 /* In the past there was confusion as to what the argument to .align was
1831 in GAS. For the last several years the rule has been this: for a.out
1832 file formats that argument is LOG, and for all other file formats the
1833 argument is 1<<LOG.
1834
1835 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1836 doubt or guess work, and since this file is used for both a.out and other
1837 file formats, we use one of them. */
1838
1839 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1840 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1841
1842 /* Globalizing directive for a label. */
1843 #define GLOBAL_ASM_OP ".globl "
1844
1845 /* This says how to output an assembler line
1846 to define a global common symbol. */
1847
1848 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1849 ( fputs (".comm ", (FILE)), \
1850 assemble_name ((FILE), (NAME)), \
1851 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (ROUNDED)))
1852
1853 /* This says how to output an assembler line
1854 to define a local common symbol. */
1855
1856 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1857 ( fputs (".lcomm ", (FILE)), \
1858 assemble_name ((FILE), (NAME)), \
1859 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (ROUNDED)))
1860
1861 #endif /* TARGET_ELF_ABI */
1862 #endif /* ! GCC_I370_H */
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