1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num
= 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num
;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num
;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers
;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these are unique; no other rtx-object will be equal to any
93 rtx global_rtl
[GR_MAX
];
95 /* Commonly used RTL for hard registers. These objects are not necessarily
96 unique, so we allocate them separately from global_rtl. They are
97 initialized once per compilation unit, then copied into regno_reg_rtx
98 at the beginning of each function. */
99 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
101 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
102 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
103 record a copy of const[012]_rtx. */
105 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
109 REAL_VALUE_TYPE dconst0
;
110 REAL_VALUE_TYPE dconst1
;
111 REAL_VALUE_TYPE dconst2
;
112 REAL_VALUE_TYPE dconstm1
;
114 /* All references to the following fixed hard registers go through
115 these unique rtl objects. On machines where the frame-pointer and
116 arg-pointer are the same register, they use the same unique object.
118 After register allocation, other rtl objects which used to be pseudo-regs
119 may be clobbered to refer to the frame-pointer register.
120 But references that were originally to the frame-pointer can be
121 distinguished from the others because they contain frame_pointer_rtx.
123 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
124 tricky: until register elimination has taken place hard_frame_pointer_rtx
125 should be used if it is being set, and frame_pointer_rtx otherwise. After
126 register elimination hard_frame_pointer_rtx should always be used.
127 On machines where the two registers are same (most) then these are the
130 In an inline procedure, the stack and frame pointer rtxs may not be
131 used for anything else. */
132 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
133 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
134 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
135 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
136 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
138 /* This is used to implement __builtin_return_address for some machines.
139 See for instance the MIPS port. */
140 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
142 /* We make one copy of (const_int C) where C is in
143 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
144 to save space during the compilation and simplify comparisons of
147 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
149 /* A hash table storing CONST_INTs whose absolute value is greater
150 than MAX_SAVED_CONST_INT. */
152 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
153 htab_t const_int_htab
;
155 /* A hash table storing memory attribute structures. */
156 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
157 htab_t mem_attrs_htab
;
159 /* A hash table storing all CONST_DOUBLEs. */
160 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
161 htab_t const_double_htab
;
163 #define first_insn (cfun->emit->x_first_insn)
164 #define last_insn (cfun->emit->x_last_insn)
165 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
166 #define last_linenum (cfun->emit->x_last_linenum)
167 #define last_filename (cfun->emit->x_last_filename)
168 #define first_label_num (cfun->emit->x_first_label_num)
170 static rtx make_jump_insn_raw
PARAMS ((rtx
));
171 static rtx make_call_insn_raw
PARAMS ((rtx
));
172 static rtx find_line_note
PARAMS ((rtx
));
173 static rtx change_address_1
PARAMS ((rtx
, enum machine_mode
, rtx
,
175 static void unshare_all_rtl_1
PARAMS ((rtx
));
176 static void unshare_all_decls
PARAMS ((tree
));
177 static void reset_used_decls
PARAMS ((tree
));
178 static void mark_label_nuses
PARAMS ((rtx
));
179 static hashval_t const_int_htab_hash
PARAMS ((const void *));
180 static int const_int_htab_eq
PARAMS ((const void *,
182 static hashval_t const_double_htab_hash
PARAMS ((const void *));
183 static int const_double_htab_eq
PARAMS ((const void *,
185 static rtx lookup_const_double
PARAMS ((rtx
));
186 static hashval_t mem_attrs_htab_hash
PARAMS ((const void *));
187 static int mem_attrs_htab_eq
PARAMS ((const void *,
189 static mem_attrs
*get_mem_attrs
PARAMS ((HOST_WIDE_INT
, tree
, rtx
,
192 static tree component_ref_for_mem_expr
PARAMS ((tree
));
193 static rtx gen_const_vector_0
PARAMS ((enum machine_mode
));
195 /* Probability of the conditional branch currently proceeded by try_split.
196 Set to -1 otherwise. */
197 int split_branch_probability
= -1;
199 /* Returns a hash code for X (which is a really a CONST_INT). */
202 const_int_htab_hash (x
)
205 return (hashval_t
) INTVAL ((struct rtx_def
*) x
);
208 /* Returns non-zero if the value represented by X (which is really a
209 CONST_INT) is the same as that given by Y (which is really a
213 const_int_htab_eq (x
, y
)
217 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
220 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
222 const_double_htab_hash (x
)
229 for (i
= 0; i
< sizeof(CONST_DOUBLE_FORMAT
)-1; i
++)
230 h
^= XWINT (value
, i
);
234 /* Returns non-zero if the value represented by X (really a ...)
235 is the same as that represented by Y (really a ...) */
237 const_double_htab_eq (x
, y
)
241 rtx a
= (rtx
)x
, b
= (rtx
)y
;
244 if (GET_MODE (a
) != GET_MODE (b
))
246 for (i
= 0; i
< sizeof(CONST_DOUBLE_FORMAT
)-1; i
++)
247 if (XWINT (a
, i
) != XWINT (b
, i
))
253 /* Returns a hash code for X (which is a really a mem_attrs *). */
256 mem_attrs_htab_hash (x
)
259 mem_attrs
*p
= (mem_attrs
*) x
;
261 return (p
->alias
^ (p
->align
* 1000)
262 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
263 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
267 /* Returns non-zero if the value represented by X (which is really a
268 mem_attrs *) is the same as that given by Y (which is also really a
272 mem_attrs_htab_eq (x
, y
)
276 mem_attrs
*p
= (mem_attrs
*) x
;
277 mem_attrs
*q
= (mem_attrs
*) y
;
279 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
280 && p
->size
== q
->size
&& p
->align
== q
->align
);
283 /* Allocate a new mem_attrs structure and insert it into the hash table if
284 one identical to it is not already in the table. We are doing this for
288 get_mem_attrs (alias
, expr
, offset
, size
, align
, mode
)
294 enum machine_mode mode
;
299 /* If everything is the default, we can just return zero. */
300 if (alias
== 0 && expr
== 0 && offset
== 0
302 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
303 && (align
== BITS_PER_UNIT
305 && mode
!= BLKmode
&& align
== GET_MODE_ALIGNMENT (mode
))))
310 attrs
.offset
= offset
;
314 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
317 *slot
= ggc_alloc (sizeof (mem_attrs
));
318 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
324 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
325 don't attempt to share with the various global pieces of rtl (such as
326 frame_pointer_rtx). */
329 gen_raw_REG (mode
, regno
)
330 enum machine_mode mode
;
333 rtx x
= gen_rtx_raw_REG (mode
, regno
);
334 ORIGINAL_REGNO (x
) = regno
;
338 /* There are some RTL codes that require special attention; the generation
339 functions do the raw handling. If you add to this list, modify
340 special_rtx in gengenrtl.c as well. */
343 gen_rtx_CONST_INT (mode
, arg
)
344 enum machine_mode mode ATTRIBUTE_UNUSED
;
349 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
350 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
352 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
353 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
354 return const_true_rtx
;
357 /* Look up the CONST_INT in the hash table. */
358 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
359 (hashval_t
) arg
, INSERT
);
361 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
367 gen_int_mode (c
, mode
)
369 enum machine_mode mode
;
371 return GEN_INT (trunc_int_for_mode (c
, mode
));
374 /* CONST_DOUBLEs might be created from pairs of integers, or from
375 REAL_VALUE_TYPEs. Also, their length is known only at run time,
376 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
378 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
379 hash table. If so, return its counterpart; otherwise add it
380 to the hash table and return it. */
382 lookup_const_double (real
)
385 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
392 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
393 VALUE in mode MODE. */
395 const_double_from_real_value (value
, mode
)
396 REAL_VALUE_TYPE value
;
397 enum machine_mode mode
;
399 rtx real
= rtx_alloc (CONST_DOUBLE
);
400 PUT_MODE (real
, mode
);
402 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
404 return lookup_const_double (real
);
407 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
408 of ints: I0 is the low-order word and I1 is the high-order word.
409 Do not use this routine for non-integer modes; convert to
410 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
413 immed_double_const (i0
, i1
, mode
)
414 HOST_WIDE_INT i0
, i1
;
415 enum machine_mode mode
;
420 if (mode
!= VOIDmode
)
423 if (GET_MODE_CLASS (mode
) != MODE_INT
424 && GET_MODE_CLASS (mode
) != MODE_PARTIAL_INT
425 /* We can get a 0 for an error mark. */
426 && GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
427 && GET_MODE_CLASS (mode
) != MODE_VECTOR_FLOAT
)
430 /* We clear out all bits that don't belong in MODE, unless they and
431 our sign bit are all one. So we get either a reasonable negative
432 value or a reasonable unsigned value for this mode. */
433 width
= GET_MODE_BITSIZE (mode
);
434 if (width
< HOST_BITS_PER_WIDE_INT
435 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
436 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
437 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
438 else if (width
== HOST_BITS_PER_WIDE_INT
439 && ! (i1
== ~0 && i0
< 0))
441 else if (width
> 2 * HOST_BITS_PER_WIDE_INT
)
442 /* We cannot represent this value as a constant. */
445 /* If this would be an entire word for the target, but is not for
446 the host, then sign-extend on the host so that the number will
447 look the same way on the host that it would on the target.
449 For example, when building a 64 bit alpha hosted 32 bit sparc
450 targeted compiler, then we want the 32 bit unsigned value -1 to be
451 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
452 The latter confuses the sparc backend. */
454 if (width
< HOST_BITS_PER_WIDE_INT
455 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
456 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
458 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
461 ??? Strictly speaking, this is wrong if we create a CONST_INT for
462 a large unsigned constant with the size of MODE being
463 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
464 in a wider mode. In that case we will mis-interpret it as a
467 Unfortunately, the only alternative is to make a CONST_DOUBLE for
468 any constant in any mode if it is an unsigned constant larger
469 than the maximum signed integer in an int on the host. However,
470 doing this will break everyone that always expects to see a
471 CONST_INT for SImode and smaller.
473 We have always been making CONST_INTs in this case, so nothing
474 new is being broken. */
476 if (width
<= HOST_BITS_PER_WIDE_INT
)
477 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
480 /* If this integer fits in one word, return a CONST_INT. */
481 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
484 /* We use VOIDmode for integers. */
485 value
= rtx_alloc (CONST_DOUBLE
);
486 PUT_MODE (value
, VOIDmode
);
488 CONST_DOUBLE_LOW (value
) = i0
;
489 CONST_DOUBLE_HIGH (value
) = i1
;
491 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
492 XWINT (value
, i
) = 0;
494 return lookup_const_double (value
);
498 gen_rtx_REG (mode
, regno
)
499 enum machine_mode mode
;
502 /* In case the MD file explicitly references the frame pointer, have
503 all such references point to the same frame pointer. This is
504 used during frame pointer elimination to distinguish the explicit
505 references to these registers from pseudos that happened to be
508 If we have eliminated the frame pointer or arg pointer, we will
509 be using it as a normal register, for example as a spill
510 register. In such cases, we might be accessing it in a mode that
511 is not Pmode and therefore cannot use the pre-allocated rtx.
513 Also don't do this when we are making new REGs in reload, since
514 we don't want to get confused with the real pointers. */
516 if (mode
== Pmode
&& !reload_in_progress
)
518 if (regno
== FRAME_POINTER_REGNUM
)
519 return frame_pointer_rtx
;
520 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
521 if (regno
== HARD_FRAME_POINTER_REGNUM
)
522 return hard_frame_pointer_rtx
;
524 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
525 if (regno
== ARG_POINTER_REGNUM
)
526 return arg_pointer_rtx
;
528 #ifdef RETURN_ADDRESS_POINTER_REGNUM
529 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
530 return return_address_pointer_rtx
;
532 if (regno
== PIC_OFFSET_TABLE_REGNUM
533 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
534 return pic_offset_table_rtx
;
535 if (regno
== STACK_POINTER_REGNUM
)
536 return stack_pointer_rtx
;
540 /* If the per-function register table has been set up, try to re-use
541 an existing entry in that table to avoid useless generation of RTL.
543 This code is disabled for now until we can fix the various backends
544 which depend on having non-shared hard registers in some cases. Long
545 term we want to re-enable this code as it can significantly cut down
546 on the amount of useless RTL that gets generated. */
550 && regno
< FIRST_PSEUDO_REGISTER
551 && reg_raw_mode
[regno
] == mode
)
552 return regno_reg_rtx
[regno
];
555 return gen_raw_REG (mode
, regno
);
559 gen_rtx_MEM (mode
, addr
)
560 enum machine_mode mode
;
563 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
565 /* This field is not cleared by the mere allocation of the rtx, so
573 gen_rtx_SUBREG (mode
, reg
, offset
)
574 enum machine_mode mode
;
578 /* This is the most common failure type.
579 Catch it early so we can see who does it. */
580 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
583 /* This check isn't usable right now because combine will
584 throw arbitrary crap like a CALL into a SUBREG in
585 gen_lowpart_for_combine so we must just eat it. */
587 /* Check for this too. */
588 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
591 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
594 /* Generate a SUBREG representing the least-significant part of REG if MODE
595 is smaller than mode of REG, otherwise paradoxical SUBREG. */
598 gen_lowpart_SUBREG (mode
, reg
)
599 enum machine_mode mode
;
602 enum machine_mode inmode
;
604 inmode
= GET_MODE (reg
);
605 if (inmode
== VOIDmode
)
607 return gen_rtx_SUBREG (mode
, reg
,
608 subreg_lowpart_offset (mode
, inmode
));
611 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
613 ** This routine generates an RTX of the size specified by
614 ** <code>, which is an RTX code. The RTX structure is initialized
615 ** from the arguments <element1> through <elementn>, which are
616 ** interpreted according to the specific RTX type's format. The
617 ** special machine mode associated with the rtx (if any) is specified
620 ** gen_rtx can be invoked in a way which resembles the lisp-like
621 ** rtx it will generate. For example, the following rtx structure:
623 ** (plus:QI (mem:QI (reg:SI 1))
624 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
626 ** ...would be generated by the following C code:
628 ** gen_rtx (PLUS, QImode,
629 ** gen_rtx (MEM, QImode,
630 ** gen_rtx (REG, SImode, 1)),
631 ** gen_rtx (MEM, QImode,
632 ** gen_rtx (PLUS, SImode,
633 ** gen_rtx (REG, SImode, 2),
634 ** gen_rtx (REG, SImode, 3)))),
639 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
641 int i
; /* Array indices... */
642 const char *fmt
; /* Current rtx's format... */
643 rtx rt_val
; /* RTX to return to caller... */
646 VA_FIXEDARG (p
, enum rtx_code
, code
);
647 VA_FIXEDARG (p
, enum machine_mode
, mode
);
652 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
657 HOST_WIDE_INT arg0
= va_arg (p
, HOST_WIDE_INT
);
658 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
660 rt_val
= immed_double_const (arg0
, arg1
, mode
);
665 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
669 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
673 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
674 rt_val
->mode
= mode
; /* Store the machine mode... */
676 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
677 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
681 case '0': /* Unused field. */
684 case 'i': /* An integer? */
685 XINT (rt_val
, i
) = va_arg (p
, int);
688 case 'w': /* A wide integer? */
689 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
692 case 's': /* A string? */
693 XSTR (rt_val
, i
) = va_arg (p
, char *);
696 case 'e': /* An expression? */
697 case 'u': /* An insn? Same except when printing. */
698 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
701 case 'E': /* An RTX vector? */
702 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
705 case 'b': /* A bitmap? */
706 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
709 case 't': /* A tree? */
710 XTREE (rt_val
, i
) = va_arg (p
, tree
);
724 /* gen_rtvec (n, [rt1, ..., rtn])
726 ** This routine creates an rtvec and stores within it the
727 ** pointers to rtx's which are its arguments.
732 gen_rtvec
VPARAMS ((int n
, ...))
738 VA_FIXEDARG (p
, int, n
);
741 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
743 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
745 for (i
= 0; i
< n
; i
++)
746 vector
[i
] = va_arg (p
, rtx
);
748 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
752 return gen_rtvec_v (save_n
, vector
);
756 gen_rtvec_v (n
, argp
)
764 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
766 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
768 for (i
= 0; i
< n
; i
++)
769 rt_val
->elem
[i
] = *argp
++;
774 /* Generate a REG rtx for a new pseudo register of mode MODE.
775 This pseudo is assigned the next sequential register number. */
779 enum machine_mode mode
;
781 struct function
*f
= cfun
;
784 /* Don't let anything called after initial flow analysis create new
789 if (generating_concat_p
790 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
791 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
793 /* For complex modes, don't make a single pseudo.
794 Instead, make a CONCAT of two pseudos.
795 This allows noncontiguous allocation of the real and imaginary parts,
796 which makes much better code. Besides, allocating DCmode
797 pseudos overstrains reload on some machines like the 386. */
798 rtx realpart
, imagpart
;
799 int size
= GET_MODE_UNIT_SIZE (mode
);
800 enum machine_mode partmode
801 = mode_for_size (size
* BITS_PER_UNIT
,
802 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
803 ? MODE_FLOAT
: MODE_INT
),
806 realpart
= gen_reg_rtx (partmode
);
807 imagpart
= gen_reg_rtx (partmode
);
808 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
811 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
812 enough to have an element for this pseudo reg number. */
814 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
816 int old_size
= f
->emit
->regno_pointer_align_length
;
821 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
822 memset (new + old_size
, 0, old_size
);
823 f
->emit
->regno_pointer_align
= (unsigned char *) new;
825 new1
= (rtx
*) ggc_realloc (f
->emit
->x_regno_reg_rtx
,
826 old_size
* 2 * sizeof (rtx
));
827 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
828 regno_reg_rtx
= new1
;
830 new2
= (tree
*) ggc_realloc (f
->emit
->regno_decl
,
831 old_size
* 2 * sizeof (tree
));
832 memset (new2
+ old_size
, 0, old_size
* sizeof (tree
));
833 f
->emit
->regno_decl
= new2
;
835 f
->emit
->regno_pointer_align_length
= old_size
* 2;
838 val
= gen_raw_REG (mode
, reg_rtx_no
);
839 regno_reg_rtx
[reg_rtx_no
++] = val
;
843 /* Identify REG (which may be a CONCAT) as a user register. */
849 if (GET_CODE (reg
) == CONCAT
)
851 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
852 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
854 else if (GET_CODE (reg
) == REG
)
855 REG_USERVAR_P (reg
) = 1;
860 /* Identify REG as a probable pointer register and show its alignment
861 as ALIGN, if nonzero. */
864 mark_reg_pointer (reg
, align
)
868 if (! REG_POINTER (reg
))
870 REG_POINTER (reg
) = 1;
873 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
875 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
876 /* We can no-longer be sure just how aligned this pointer is */
877 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
880 /* Return 1 plus largest pseudo reg number used in the current function. */
888 /* Return 1 + the largest label number used so far in the current function. */
893 if (last_label_num
&& label_num
== base_label_num
)
894 return last_label_num
;
898 /* Return first label number used in this function (if any were used). */
901 get_first_label_num ()
903 return first_label_num
;
906 /* Return the final regno of X, which is a SUBREG of a hard
909 subreg_hard_regno (x
, check_mode
)
913 enum machine_mode mode
= GET_MODE (x
);
914 unsigned int byte_offset
, base_regno
, final_regno
;
915 rtx reg
= SUBREG_REG (x
);
917 /* This is where we attempt to catch illegal subregs
918 created by the compiler. */
919 if (GET_CODE (x
) != SUBREG
920 || GET_CODE (reg
) != REG
)
922 base_regno
= REGNO (reg
);
923 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
925 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
928 /* Catch non-congruent offsets too. */
929 byte_offset
= SUBREG_BYTE (x
);
930 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
933 final_regno
= subreg_regno (x
);
938 /* Return a value representing some low-order bits of X, where the number
939 of low-order bits is given by MODE. Note that no conversion is done
940 between floating-point and fixed-point values, rather, the bit
941 representation is returned.
943 This function handles the cases in common between gen_lowpart, below,
944 and two variants in cse.c and combine.c. These are the cases that can
945 be safely handled at all points in the compilation.
947 If this is not a case we can handle, return 0. */
950 gen_lowpart_common (mode
, x
)
951 enum machine_mode mode
;
954 int msize
= GET_MODE_SIZE (mode
);
955 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
958 if (GET_MODE (x
) == mode
)
961 /* MODE must occupy no more words than the mode of X. */
962 if (GET_MODE (x
) != VOIDmode
963 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
964 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
967 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
968 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
969 && GET_MODE (x
) != VOIDmode
&& msize
> xsize
)
972 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
974 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
975 && (GET_MODE_CLASS (mode
) == MODE_INT
976 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
978 /* If we are getting the low-order part of something that has been
979 sign- or zero-extended, we can either just use the object being
980 extended or make a narrower extension. If we want an even smaller
981 piece than the size of the object being extended, call ourselves
984 This case is used mostly by combine and cse. */
986 if (GET_MODE (XEXP (x
, 0)) == mode
)
988 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
989 return gen_lowpart_common (mode
, XEXP (x
, 0));
990 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
991 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
993 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
994 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
)
995 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
996 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
997 from the low-order part of the constant. */
998 else if ((GET_MODE_CLASS (mode
) == MODE_INT
999 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1000 && GET_MODE (x
) == VOIDmode
1001 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
1003 /* If MODE is twice the host word size, X is already the desired
1004 representation. Otherwise, if MODE is wider than a word, we can't
1005 do this. If MODE is exactly a word, return just one CONST_INT. */
1007 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
1009 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
1011 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
1012 return (GET_CODE (x
) == CONST_INT
? x
1013 : GEN_INT (CONST_DOUBLE_LOW (x
)));
1016 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
1017 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
1018 : CONST_DOUBLE_LOW (x
));
1020 /* Sign extend to HOST_WIDE_INT. */
1021 val
= trunc_int_for_mode (val
, mode
);
1023 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
1028 /* The floating-point emulator can handle all conversions between
1029 FP and integer operands. This simplifies reload because it
1030 doesn't have to deal with constructs like (subreg:DI
1031 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1032 /* Single-precision floats are always 32-bits and double-precision
1033 floats are always 64-bits. */
1035 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1036 && GET_MODE_BITSIZE (mode
) == 32
1037 && GET_CODE (x
) == CONST_INT
)
1043 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
1044 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1046 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1047 && GET_MODE_BITSIZE (mode
) == 64
1048 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
1049 && GET_MODE (x
) == VOIDmode
)
1053 HOST_WIDE_INT low
, high
;
1055 if (GET_CODE (x
) == CONST_INT
)
1058 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
1062 low
= CONST_DOUBLE_LOW (x
);
1063 high
= CONST_DOUBLE_HIGH (x
);
1066 #if HOST_BITS_PER_WIDE_INT == 32
1067 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1069 if (WORDS_BIG_ENDIAN
)
1070 i
[0] = high
, i
[1] = low
;
1072 i
[0] = low
, i
[1] = high
;
1077 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
1078 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
1080 else if ((GET_MODE_CLASS (mode
) == MODE_INT
1081 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
1082 && GET_CODE (x
) == CONST_DOUBLE
1083 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
1086 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
1087 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
1089 /* Convert 'r' into an array of four 32-bit words in target word
1091 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
1092 switch (GET_MODE_BITSIZE (GET_MODE (x
)))
1095 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[3 * endian
]);
1098 i
[3 - 3 * endian
] = 0;
1101 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
+ 2 * endian
);
1102 i
[2 - 2 * endian
] = 0;
1103 i
[3 - 2 * endian
] = 0;
1106 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
1107 i
[3 - 3 * endian
] = 0;
1110 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
1115 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1117 #if HOST_BITS_PER_WIDE_INT == 32
1118 return immed_double_const (i
[3 * endian
], i
[1 + endian
], mode
);
1120 if (HOST_BITS_PER_WIDE_INT
!= 64)
1123 return immed_double_const ((((unsigned long) i
[3 * endian
])
1124 | ((HOST_WIDE_INT
) i
[1 + endian
] << 32)),
1125 (((unsigned long) i
[2 - endian
])
1126 | ((HOST_WIDE_INT
) i
[3 - 3 * endian
] << 32)),
1131 /* Otherwise, we can't do this. */
1135 /* Return the real part (which has mode MODE) of a complex value X.
1136 This always comes at the low address in memory. */
1139 gen_realpart (mode
, x
)
1140 enum machine_mode mode
;
1143 if (WORDS_BIG_ENDIAN
1144 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1146 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1148 ("can't access real part of complex value in hard register");
1149 else if (WORDS_BIG_ENDIAN
)
1150 return gen_highpart (mode
, x
);
1152 return gen_lowpart (mode
, x
);
1155 /* Return the imaginary part (which has mode MODE) of a complex value X.
1156 This always comes at the high address in memory. */
1159 gen_imagpart (mode
, x
)
1160 enum machine_mode mode
;
1163 if (WORDS_BIG_ENDIAN
)
1164 return gen_lowpart (mode
, x
);
1165 else if (! WORDS_BIG_ENDIAN
1166 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1168 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1170 ("can't access imaginary part of complex value in hard register");
1172 return gen_highpart (mode
, x
);
1175 /* Return 1 iff X, assumed to be a SUBREG,
1176 refers to the real part of the complex value in its containing reg.
1177 Complex values are always stored with the real part in the first word,
1178 regardless of WORDS_BIG_ENDIAN. */
1181 subreg_realpart_p (x
)
1184 if (GET_CODE (x
) != SUBREG
)
1187 return ((unsigned int) SUBREG_BYTE (x
)
1188 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1191 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1192 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1193 least-significant part of X.
1194 MODE specifies how big a part of X to return;
1195 it usually should not be larger than a word.
1196 If X is a MEM whose address is a QUEUED, the value may be so also. */
1199 gen_lowpart (mode
, x
)
1200 enum machine_mode mode
;
1203 rtx result
= gen_lowpart_common (mode
, x
);
1207 else if (GET_CODE (x
) == REG
)
1209 /* Must be a hard reg that's not valid in MODE. */
1210 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1215 else if (GET_CODE (x
) == MEM
)
1217 /* The only additional case we can do is MEM. */
1219 if (WORDS_BIG_ENDIAN
)
1220 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1221 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1223 if (BYTES_BIG_ENDIAN
)
1224 /* Adjust the address so that the address-after-the-data
1226 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1227 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1229 return adjust_address (x
, mode
, offset
);
1231 else if (GET_CODE (x
) == ADDRESSOF
)
1232 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1237 /* Like `gen_lowpart', but refer to the most significant part.
1238 This is used to access the imaginary part of a complex number. */
1241 gen_highpart (mode
, x
)
1242 enum machine_mode mode
;
1245 unsigned int msize
= GET_MODE_SIZE (mode
);
1248 /* This case loses if X is a subreg. To catch bugs early,
1249 complain if an invalid MODE is used even in other cases. */
1250 if (msize
> UNITS_PER_WORD
1251 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1254 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1255 subreg_highpart_offset (mode
, GET_MODE (x
)));
1257 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1258 the target if we have a MEM. gen_highpart must return a valid operand,
1259 emitting code if necessary to do so. */
1260 if (result
!= NULL_RTX
&& GET_CODE (result
) == MEM
)
1261 result
= validize_mem (result
);
1268 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1269 be VOIDmode constant. */
1271 gen_highpart_mode (outermode
, innermode
, exp
)
1272 enum machine_mode outermode
, innermode
;
1275 if (GET_MODE (exp
) != VOIDmode
)
1277 if (GET_MODE (exp
) != innermode
)
1279 return gen_highpart (outermode
, exp
);
1281 return simplify_gen_subreg (outermode
, exp
, innermode
,
1282 subreg_highpart_offset (outermode
, innermode
));
1285 /* Return offset in bytes to get OUTERMODE low part
1286 of the value in mode INNERMODE stored in memory in target format. */
1289 subreg_lowpart_offset (outermode
, innermode
)
1290 enum machine_mode outermode
, innermode
;
1292 unsigned int offset
= 0;
1293 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1297 if (WORDS_BIG_ENDIAN
)
1298 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1299 if (BYTES_BIG_ENDIAN
)
1300 offset
+= difference
% UNITS_PER_WORD
;
1306 /* Return offset in bytes to get OUTERMODE high part
1307 of the value in mode INNERMODE stored in memory in target format. */
1309 subreg_highpart_offset (outermode
, innermode
)
1310 enum machine_mode outermode
, innermode
;
1312 unsigned int offset
= 0;
1313 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1315 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1320 if (! WORDS_BIG_ENDIAN
)
1321 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1322 if (! BYTES_BIG_ENDIAN
)
1323 offset
+= difference
% UNITS_PER_WORD
;
1329 /* Return 1 iff X, assumed to be a SUBREG,
1330 refers to the least significant part of its containing reg.
1331 If X is not a SUBREG, always return 1 (it is its own low part!). */
1334 subreg_lowpart_p (x
)
1337 if (GET_CODE (x
) != SUBREG
)
1339 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1342 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1343 == SUBREG_BYTE (x
));
1347 /* Helper routine for all the constant cases of operand_subword.
1348 Some places invoke this directly. */
1351 constant_subword (op
, offset
, mode
)
1354 enum machine_mode mode
;
1356 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1359 /* If OP is already an integer word, return it. */
1360 if (GET_MODE_CLASS (mode
) == MODE_INT
1361 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1364 /* The output is some bits, the width of the target machine's word.
1365 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1367 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1368 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1369 && GET_MODE_BITSIZE (mode
) == 64
1370 && GET_CODE (op
) == CONST_DOUBLE
)
1375 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1376 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1378 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1379 which the words are written depends on the word endianness.
1380 ??? This is a potential portability problem and should
1381 be fixed at some point.
1383 We must exercise caution with the sign bit. By definition there
1384 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1385 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1386 So we explicitly mask and sign-extend as necessary. */
1387 if (BITS_PER_WORD
== 32)
1390 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1391 return GEN_INT (val
);
1393 #if HOST_BITS_PER_WIDE_INT >= 64
1394 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1396 val
= k
[! WORDS_BIG_ENDIAN
];
1397 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1398 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1399 return GEN_INT (val
);
1402 else if (BITS_PER_WORD
== 16)
1404 val
= k
[offset
>> 1];
1405 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1407 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1408 return GEN_INT (val
);
1413 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1414 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1415 && GET_MODE_BITSIZE (mode
) > 64
1416 && GET_CODE (op
) == CONST_DOUBLE
)
1421 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1422 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1424 if (BITS_PER_WORD
== 32)
1427 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1428 return GEN_INT (val
);
1430 #if HOST_BITS_PER_WIDE_INT >= 64
1431 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1433 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1434 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1435 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1436 return GEN_INT (val
);
1443 /* Single word float is a little harder, since single- and double-word
1444 values often do not have the same high-order bits. We have already
1445 verified that we want the only defined word of the single-word value. */
1446 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1447 && GET_MODE_BITSIZE (mode
) == 32
1448 && GET_CODE (op
) == CONST_DOUBLE
)
1453 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1454 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1456 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1458 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1460 if (BITS_PER_WORD
== 16)
1462 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1464 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1467 return GEN_INT (val
);
1470 /* The only remaining cases that we can handle are integers.
1471 Convert to proper endianness now since these cases need it.
1472 At this point, offset == 0 means the low-order word.
1474 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1475 in general. However, if OP is (const_int 0), we can just return
1478 if (op
== const0_rtx
)
1481 if (GET_MODE_CLASS (mode
) != MODE_INT
1482 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1483 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1486 if (WORDS_BIG_ENDIAN
)
1487 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1489 /* Find out which word on the host machine this value is in and get
1490 it from the constant. */
1491 val
= (offset
/ size_ratio
== 0
1492 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1493 : (GET_CODE (op
) == CONST_INT
1494 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1496 /* Get the value we want into the low bits of val. */
1497 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1498 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1500 val
= trunc_int_for_mode (val
, word_mode
);
1502 return GEN_INT (val
);
1505 /* Return subword OFFSET of operand OP.
1506 The word number, OFFSET, is interpreted as the word number starting
1507 at the low-order address. OFFSET 0 is the low-order word if not
1508 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1510 If we cannot extract the required word, we return zero. Otherwise,
1511 an rtx corresponding to the requested word will be returned.
1513 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1514 reload has completed, a valid address will always be returned. After
1515 reload, if a valid address cannot be returned, we return zero.
1517 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1518 it is the responsibility of the caller.
1520 MODE is the mode of OP in case it is a CONST_INT.
1522 ??? This is still rather broken for some cases. The problem for the
1523 moment is that all callers of this thing provide no 'goal mode' to
1524 tell us to work with. This exists because all callers were written
1525 in a word based SUBREG world.
1526 Now use of this function can be deprecated by simplify_subreg in most
1531 operand_subword (op
, offset
, validate_address
, mode
)
1533 unsigned int offset
;
1534 int validate_address
;
1535 enum machine_mode mode
;
1537 if (mode
== VOIDmode
)
1538 mode
= GET_MODE (op
);
1540 if (mode
== VOIDmode
)
1543 /* If OP is narrower than a word, fail. */
1545 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1548 /* If we want a word outside OP, return zero. */
1550 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1553 /* Form a new MEM at the requested address. */
1554 if (GET_CODE (op
) == MEM
)
1556 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1558 if (! validate_address
)
1561 else if (reload_completed
)
1563 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1567 return replace_equiv_address (new, XEXP (new, 0));
1570 /* Rest can be handled by simplify_subreg. */
1571 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1574 /* Similar to `operand_subword', but never return 0. If we can't extract
1575 the required subword, put OP into a register and try again. If that fails,
1576 abort. We always validate the address in this case.
1578 MODE is the mode of OP, in case it is CONST_INT. */
1581 operand_subword_force (op
, offset
, mode
)
1583 unsigned int offset
;
1584 enum machine_mode mode
;
1586 rtx result
= operand_subword (op
, offset
, 1, mode
);
1591 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1593 /* If this is a register which can not be accessed by words, copy it
1594 to a pseudo register. */
1595 if (GET_CODE (op
) == REG
)
1596 op
= copy_to_reg (op
);
1598 op
= force_reg (mode
, op
);
1601 result
= operand_subword (op
, offset
, 1, mode
);
1608 /* Given a compare instruction, swap the operands.
1609 A test instruction is changed into a compare of 0 against the operand. */
1612 reverse_comparison (insn
)
1615 rtx body
= PATTERN (insn
);
1618 if (GET_CODE (body
) == SET
)
1619 comp
= SET_SRC (body
);
1621 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1623 if (GET_CODE (comp
) == COMPARE
)
1625 rtx op0
= XEXP (comp
, 0);
1626 rtx op1
= XEXP (comp
, 1);
1627 XEXP (comp
, 0) = op1
;
1628 XEXP (comp
, 1) = op0
;
1632 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1633 CONST0_RTX (GET_MODE (comp
)), comp
);
1634 if (GET_CODE (body
) == SET
)
1635 SET_SRC (body
) = new;
1637 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1641 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1642 or (2) a component ref of something variable. Represent the later with
1643 a NULL expression. */
1646 component_ref_for_mem_expr (ref
)
1649 tree inner
= TREE_OPERAND (ref
, 0);
1651 if (TREE_CODE (inner
) == COMPONENT_REF
)
1652 inner
= component_ref_for_mem_expr (inner
);
1655 tree placeholder_ptr
= 0;
1657 /* Now remove any conversions: they don't change what the underlying
1658 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1659 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1660 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1661 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1662 || TREE_CODE (inner
) == SAVE_EXPR
1663 || TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1664 if (TREE_CODE (inner
) == PLACEHOLDER_EXPR
)
1665 inner
= find_placeholder (inner
, &placeholder_ptr
);
1667 inner
= TREE_OPERAND (inner
, 0);
1669 if (! DECL_P (inner
))
1673 if (inner
== TREE_OPERAND (ref
, 0))
1676 return build (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1677 TREE_OPERAND (ref
, 1));
1680 /* Given REF, a MEM, and T, either the type of X or the expression
1681 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1682 if we are making a new object of this type. */
1685 set_mem_attributes (ref
, t
, objectp
)
1690 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1691 tree expr
= MEM_EXPR (ref
);
1692 rtx offset
= MEM_OFFSET (ref
);
1693 rtx size
= MEM_SIZE (ref
);
1694 unsigned int align
= MEM_ALIGN (ref
);
1697 /* It can happen that type_for_mode was given a mode for which there
1698 is no language-level type. In which case it returns NULL, which
1703 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1705 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1706 wrong answer, as it assumes that DECL_RTL already has the right alias
1707 info. Callers should not set DECL_RTL until after the call to
1708 set_mem_attributes. */
1709 if (DECL_P (t
) && ref
== DECL_RTL_IF_SET (t
))
1712 /* Get the alias set from the expression or type (perhaps using a
1713 front-end routine) and use it. */
1714 alias
= get_alias_set (t
);
1716 MEM_VOLATILE_P (ref
) = TYPE_VOLATILE (type
);
1717 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1718 RTX_UNCHANGING_P (ref
)
1719 |= ((lang_hooks
.honor_readonly
1720 && (TYPE_READONLY (type
) || TREE_READONLY (t
)))
1721 || (! TYPE_P (t
) && TREE_CONSTANT (t
)));
1723 /* If we are making an object of this type, or if this is a DECL, we know
1724 that it is a scalar if the type is not an aggregate. */
1725 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1726 MEM_SCALAR_P (ref
) = 1;
1728 /* We can set the alignment from the type if we are making an object,
1729 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1730 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
|| TYPE_ALIGN_OK (type
))
1731 align
= MAX (align
, TYPE_ALIGN (type
));
1733 /* If the size is known, we can set that. */
1734 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1735 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1737 /* If T is not a type, we may be able to deduce some more information about
1741 maybe_set_unchanging (ref
, t
);
1742 if (TREE_THIS_VOLATILE (t
))
1743 MEM_VOLATILE_P (ref
) = 1;
1745 /* Now remove any conversions: they don't change what the underlying
1746 object is. Likewise for SAVE_EXPR. */
1747 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1748 || TREE_CODE (t
) == NON_LVALUE_EXPR
1749 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1750 || TREE_CODE (t
) == SAVE_EXPR
)
1751 t
= TREE_OPERAND (t
, 0);
1753 /* If this expression can't be addressed (e.g., it contains a reference
1754 to a non-addressable field), show we don't change its alias set. */
1755 if (! can_address_p (t
))
1756 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1758 /* If this is a decl, set the attributes of the MEM from it. */
1762 offset
= const0_rtx
;
1763 size
= (DECL_SIZE_UNIT (t
)
1764 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1765 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1766 align
= DECL_ALIGN (t
);
1769 /* If this is a constant, we know the alignment. */
1770 else if (TREE_CODE_CLASS (TREE_CODE (t
)) == 'c')
1772 align
= TYPE_ALIGN (type
);
1773 #ifdef CONSTANT_ALIGNMENT
1774 align
= CONSTANT_ALIGNMENT (t
, align
);
1778 /* If this is a field reference and not a bit-field, record it. */
1779 /* ??? There is some information that can be gleened from bit-fields,
1780 such as the word offset in the structure that might be modified.
1781 But skip it for now. */
1782 else if (TREE_CODE (t
) == COMPONENT_REF
1783 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1785 expr
= component_ref_for_mem_expr (t
);
1786 offset
= const0_rtx
;
1787 /* ??? Any reason the field size would be different than
1788 the size we got from the type? */
1791 /* If this is an array reference, look for an outer field reference. */
1792 else if (TREE_CODE (t
) == ARRAY_REF
)
1794 tree off_tree
= size_zero_node
;
1799 = fold (build (PLUS_EXPR
, sizetype
,
1800 fold (build (MULT_EXPR
, sizetype
,
1801 TREE_OPERAND (t
, 1),
1802 TYPE_SIZE_UNIT (TREE_TYPE (t
)))),
1804 t
= TREE_OPERAND (t
, 0);
1806 while (TREE_CODE (t
) == ARRAY_REF
);
1808 if (TREE_CODE (t
) == COMPONENT_REF
)
1810 expr
= component_ref_for_mem_expr (t
);
1811 if (host_integerp (off_tree
, 1))
1812 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1813 /* ??? Any reason the field size would be different than
1814 the size we got from the type? */
1819 /* Now set the attributes we computed above. */
1821 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1823 /* If this is already known to be a scalar or aggregate, we are done. */
1824 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1827 /* If it is a reference into an aggregate, this is part of an aggregate.
1828 Otherwise we don't know. */
1829 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1830 || TREE_CODE (t
) == ARRAY_RANGE_REF
1831 || TREE_CODE (t
) == BIT_FIELD_REF
)
1832 MEM_IN_STRUCT_P (ref
) = 1;
1835 /* Set the alias set of MEM to SET. */
1838 set_mem_alias_set (mem
, set
)
1842 #ifdef ENABLE_CHECKING
1843 /* If the new and old alias sets don't conflict, something is wrong. */
1844 if (!alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)))
1848 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1849 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1853 /* Set the alignment of MEM to ALIGN bits. */
1856 set_mem_align (mem
, align
)
1860 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1861 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1865 /* Set the expr for MEM to EXPR. */
1868 set_mem_expr (mem
, expr
)
1873 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1874 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1877 /* Set the offset of MEM to OFFSET. */
1880 set_mem_offset (mem
, offset
)
1883 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1884 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1888 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1889 and its address changed to ADDR. (VOIDmode means don't change the mode.
1890 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1891 returned memory location is required to be valid. The memory
1892 attributes are not changed. */
1895 change_address_1 (memref
, mode
, addr
, validate
)
1897 enum machine_mode mode
;
1903 if (GET_CODE (memref
) != MEM
)
1905 if (mode
== VOIDmode
)
1906 mode
= GET_MODE (memref
);
1908 addr
= XEXP (memref
, 0);
1912 if (reload_in_progress
|| reload_completed
)
1914 if (! memory_address_p (mode
, addr
))
1918 addr
= memory_address (mode
, addr
);
1921 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1924 new = gen_rtx_MEM (mode
, addr
);
1925 MEM_COPY_ATTRIBUTES (new, memref
);
1929 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1930 way we are changing MEMREF, so we only preserve the alias set. */
1933 change_address (memref
, mode
, addr
)
1935 enum machine_mode mode
;
1938 rtx
new = change_address_1 (memref
, mode
, addr
, 1);
1939 enum machine_mode mmode
= GET_MODE (new);
1942 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0,
1943 mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
)),
1944 (mmode
== BLKmode
? BITS_PER_UNIT
1945 : GET_MODE_ALIGNMENT (mmode
)),
1951 /* Return a memory reference like MEMREF, but with its mode changed
1952 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1953 nonzero, the memory address is forced to be valid.
1954 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1955 and caller is responsible for adjusting MEMREF base register. */
1958 adjust_address_1 (memref
, mode
, offset
, validate
, adjust
)
1960 enum machine_mode mode
;
1961 HOST_WIDE_INT offset
;
1962 int validate
, adjust
;
1964 rtx addr
= XEXP (memref
, 0);
1966 rtx memoffset
= MEM_OFFSET (memref
);
1968 unsigned int memalign
= MEM_ALIGN (memref
);
1970 /* ??? Prefer to create garbage instead of creating shared rtl.
1971 This may happen even if offset is non-zero -- consider
1972 (plus (plus reg reg) const_int) -- so do this always. */
1973 addr
= copy_rtx (addr
);
1977 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1978 object, we can merge it into the LO_SUM. */
1979 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1981 && (unsigned HOST_WIDE_INT
) offset
1982 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1983 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1984 plus_constant (XEXP (addr
, 1), offset
));
1986 addr
= plus_constant (addr
, offset
);
1989 new = change_address_1 (memref
, mode
, addr
, validate
);
1991 /* Compute the new values of the memory attributes due to this adjustment.
1992 We add the offsets and update the alignment. */
1994 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1996 /* Compute the new alignment by taking the MIN of the alignment and the
1997 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2002 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
2004 /* We can compute the size in a number of ways. */
2005 if (GET_MODE (new) != BLKmode
)
2006 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2007 else if (MEM_SIZE (memref
))
2008 size
= plus_constant (MEM_SIZE (memref
), -offset
);
2010 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
2011 memoffset
, size
, memalign
, GET_MODE (new));
2013 /* At some point, we should validate that this offset is within the object,
2014 if all the appropriate values are known. */
2018 /* Return a memory reference like MEMREF, but with its mode changed
2019 to MODE and its address changed to ADDR, which is assumed to be
2020 MEMREF offseted by OFFSET bytes. If VALIDATE is
2021 nonzero, the memory address is forced to be valid. */
2024 adjust_automodify_address_1 (memref
, mode
, addr
, offset
, validate
)
2026 enum machine_mode mode
;
2028 HOST_WIDE_INT offset
;
2031 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
2032 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
2035 /* Return a memory reference like MEMREF, but whose address is changed by
2036 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2037 known to be in OFFSET (possibly 1). */
2040 offset_address (memref
, offset
, pow2
)
2045 rtx
new, addr
= XEXP (memref
, 0);
2047 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2049 /* At this point we don't know _why_ the address is invalid. It
2050 could have secondary memory refereces, multiplies or anything.
2052 However, if we did go and rearrange things, we can wind up not
2053 being able to recognize the magic around pic_offset_table_rtx.
2054 This stuff is fragile, and is yet another example of why it is
2055 bad to expose PIC machinery too early. */
2056 if (! memory_address_p (GET_MODE (memref
), new)
2057 && GET_CODE (addr
) == PLUS
2058 && XEXP (addr
, 0) == pic_offset_table_rtx
)
2060 addr
= force_reg (GET_MODE (addr
), addr
);
2061 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
2064 update_temp_slot_address (XEXP (memref
, 0), new);
2065 new = change_address_1 (memref
, VOIDmode
, new, 1);
2067 /* Update the alignment to reflect the offset. Reset the offset, which
2070 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
2071 MIN (MEM_ALIGN (memref
),
2072 (unsigned HOST_WIDE_INT
) pow2
* BITS_PER_UNIT
),
2077 /* Return a memory reference like MEMREF, but with its address changed to
2078 ADDR. The caller is asserting that the actual piece of memory pointed
2079 to is the same, just the form of the address is being changed, such as
2080 by putting something into a register. */
2083 replace_equiv_address (memref
, addr
)
2087 /* change_address_1 copies the memory attribute structure without change
2088 and that's exactly what we want here. */
2089 update_temp_slot_address (XEXP (memref
, 0), addr
);
2090 return change_address_1 (memref
, VOIDmode
, addr
, 1);
2093 /* Likewise, but the reference is not required to be valid. */
2096 replace_equiv_address_nv (memref
, addr
)
2100 return change_address_1 (memref
, VOIDmode
, addr
, 0);
2103 /* Return a memory reference like MEMREF, but with its mode widened to
2104 MODE and offset by OFFSET. This would be used by targets that e.g.
2105 cannot issue QImode memory operations and have to use SImode memory
2106 operations plus masking logic. */
2109 widen_memory_access (memref
, mode
, offset
)
2111 enum machine_mode mode
;
2112 HOST_WIDE_INT offset
;
2114 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
2115 tree expr
= MEM_EXPR (new);
2116 rtx memoffset
= MEM_OFFSET (new);
2117 unsigned int size
= GET_MODE_SIZE (mode
);
2119 /* If we don't know what offset we were at within the expression, then
2120 we can't know if we've overstepped the bounds. */
2126 if (TREE_CODE (expr
) == COMPONENT_REF
)
2128 tree field
= TREE_OPERAND (expr
, 1);
2130 if (! DECL_SIZE_UNIT (field
))
2136 /* Is the field at least as large as the access? If so, ok,
2137 otherwise strip back to the containing structure. */
2138 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
2139 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2140 && INTVAL (memoffset
) >= 0)
2143 if (! host_integerp (DECL_FIELD_OFFSET (field
), 1))
2149 expr
= TREE_OPERAND (expr
, 0);
2150 memoffset
= (GEN_INT (INTVAL (memoffset
)
2151 + tree_low_cst (DECL_FIELD_OFFSET (field
), 1)
2152 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2155 /* Similarly for the decl. */
2156 else if (DECL_P (expr
)
2157 && DECL_SIZE_UNIT (expr
)
2158 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2159 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2160 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2164 /* The widened memory access overflows the expression, which means
2165 that it could alias another expression. Zap it. */
2172 memoffset
= NULL_RTX
;
2174 /* The widened memory may alias other stuff, so zap the alias set. */
2175 /* ??? Maybe use get_alias_set on any remaining expression. */
2177 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2178 MEM_ALIGN (new), mode
);
2183 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2190 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2191 NULL
, label_num
++, NULL
, NULL
);
2193 LABEL_NUSES (label
) = 0;
2194 LABEL_ALTERNATE_NAME (label
) = NULL
;
2198 /* For procedure integration. */
2200 /* Install new pointers to the first and last insns in the chain.
2201 Also, set cur_insn_uid to one higher than the last in use.
2202 Used for an inline-procedure after copying the insn chain. */
2205 set_new_first_and_last_insn (first
, last
)
2214 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2215 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2220 /* Set the range of label numbers found in the current function.
2221 This is used when belatedly compiling an inline function. */
2224 set_new_first_and_last_label_num (first
, last
)
2227 base_label_num
= label_num
;
2228 first_label_num
= first
;
2229 last_label_num
= last
;
2232 /* Set the last label number found in the current function.
2233 This is used when belatedly compiling an inline function. */
2236 set_new_last_label_num (last
)
2239 base_label_num
= label_num
;
2240 last_label_num
= last
;
2243 /* Restore all variables describing the current status from the structure *P.
2244 This is used after a nested function. */
2247 restore_emit_status (p
)
2248 struct function
*p ATTRIBUTE_UNUSED
;
2253 /* Go through all the RTL insn bodies and copy any invalid shared
2254 structure. This routine should only be called once. */
2257 unshare_all_rtl (fndecl
, insn
)
2263 /* Make sure that virtual parameters are not shared. */
2264 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2265 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2267 /* Make sure that virtual stack slots are not shared. */
2268 unshare_all_decls (DECL_INITIAL (fndecl
));
2270 /* Unshare just about everything else. */
2271 unshare_all_rtl_1 (insn
);
2273 /* Make sure the addresses of stack slots found outside the insn chain
2274 (such as, in DECL_RTL of a variable) are not shared
2275 with the insn chain.
2277 This special care is necessary when the stack slot MEM does not
2278 actually appear in the insn chain. If it does appear, its address
2279 is unshared from all else at that point. */
2280 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2283 /* Go through all the RTL insn bodies and copy any invalid shared
2284 structure, again. This is a fairly expensive thing to do so it
2285 should be done sparingly. */
2288 unshare_all_rtl_again (insn
)
2294 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2297 reset_used_flags (PATTERN (p
));
2298 reset_used_flags (REG_NOTES (p
));
2299 reset_used_flags (LOG_LINKS (p
));
2302 /* Make sure that virtual stack slots are not shared. */
2303 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2305 /* Make sure that virtual parameters are not shared. */
2306 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2307 reset_used_flags (DECL_RTL (decl
));
2309 reset_used_flags (stack_slot_list
);
2311 unshare_all_rtl (cfun
->decl
, insn
);
2314 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2315 Assumes the mark bits are cleared at entry. */
2318 unshare_all_rtl_1 (insn
)
2321 for (; insn
; insn
= NEXT_INSN (insn
))
2324 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2325 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2326 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2330 /* Go through all virtual stack slots of a function and copy any
2331 shared structure. */
2333 unshare_all_decls (blk
)
2338 /* Copy shared decls. */
2339 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2340 if (DECL_RTL_SET_P (t
))
2341 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2343 /* Now process sub-blocks. */
2344 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2345 unshare_all_decls (t
);
2348 /* Go through all virtual stack slots of a function and mark them as
2351 reset_used_decls (blk
)
2357 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2358 if (DECL_RTL_SET_P (t
))
2359 reset_used_flags (DECL_RTL (t
));
2361 /* Now process sub-blocks. */
2362 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2363 reset_used_decls (t
);
2366 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2367 placed in the result directly, rather than being copied. MAY_SHARE is
2368 either a MEM of an EXPR_LIST of MEMs. */
2371 copy_most_rtx (orig
, may_share
)
2378 const char *format_ptr
;
2380 if (orig
== may_share
2381 || (GET_CODE (may_share
) == EXPR_LIST
2382 && in_expr_list_p (may_share
, orig
)))
2385 code
= GET_CODE (orig
);
2403 copy
= rtx_alloc (code
);
2404 PUT_MODE (copy
, GET_MODE (orig
));
2405 RTX_FLAG (copy
, in_struct
) = RTX_FLAG (orig
, in_struct
);
2406 RTX_FLAG (copy
, volatil
) = RTX_FLAG (orig
, volatil
);
2407 RTX_FLAG (copy
, unchanging
) = RTX_FLAG (orig
, unchanging
);
2408 RTX_FLAG (copy
, integrated
) = RTX_FLAG (orig
, integrated
);
2409 RTX_FLAG (copy
, frame_related
) = RTX_FLAG (orig
, frame_related
);
2411 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
2413 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
2415 switch (*format_ptr
++)
2418 XEXP (copy
, i
) = XEXP (orig
, i
);
2419 if (XEXP (orig
, i
) != NULL
&& XEXP (orig
, i
) != may_share
)
2420 XEXP (copy
, i
) = copy_most_rtx (XEXP (orig
, i
), may_share
);
2424 XEXP (copy
, i
) = XEXP (orig
, i
);
2429 XVEC (copy
, i
) = XVEC (orig
, i
);
2430 if (XVEC (orig
, i
) != NULL
)
2432 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
2433 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
2434 XVECEXP (copy
, i
, j
)
2435 = copy_most_rtx (XVECEXP (orig
, i
, j
), may_share
);
2440 XWINT (copy
, i
) = XWINT (orig
, i
);
2445 XINT (copy
, i
) = XINT (orig
, i
);
2449 XTREE (copy
, i
) = XTREE (orig
, i
);
2454 XSTR (copy
, i
) = XSTR (orig
, i
);
2458 /* Copy this through the wide int field; that's safest. */
2459 X0WINT (copy
, i
) = X0WINT (orig
, i
);
2469 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2470 Recursively does the same for subexpressions. */
2473 copy_rtx_if_shared (orig
)
2479 const char *format_ptr
;
2485 code
= GET_CODE (x
);
2487 /* These types may be freely shared. */
2501 /* SCRATCH must be shared because they represent distinct values. */
2505 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2506 a LABEL_REF, it isn't sharable. */
2507 if (GET_CODE (XEXP (x
, 0)) == PLUS
2508 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2509 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2518 /* The chain of insns is not being copied. */
2522 /* A MEM is allowed to be shared if its address is constant.
2524 We used to allow sharing of MEMs which referenced
2525 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2526 that can lose. instantiate_virtual_regs will not unshare
2527 the MEMs, and combine may change the structure of the address
2528 because it looks safe and profitable in one context, but
2529 in some other context it creates unrecognizable RTL. */
2530 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2539 /* This rtx may not be shared. If it has already been seen,
2540 replace it with a copy of itself. */
2542 if (RTX_FLAG (x
, used
))
2546 copy
= rtx_alloc (code
);
2548 (sizeof (*copy
) - sizeof (copy
->fld
)
2549 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
2553 RTX_FLAG (x
, used
) = 1;
2555 /* Now scan the subexpressions recursively.
2556 We can store any replaced subexpressions directly into X
2557 since we know X is not shared! Any vectors in X
2558 must be copied if X was copied. */
2560 format_ptr
= GET_RTX_FORMAT (code
);
2562 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2564 switch (*format_ptr
++)
2567 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
2571 if (XVEC (x
, i
) != NULL
)
2574 int len
= XVECLEN (x
, i
);
2576 if (copied
&& len
> 0)
2577 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2578 for (j
= 0; j
< len
; j
++)
2579 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
2587 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2588 to look for shared sub-parts. */
2591 reset_used_flags (x
)
2596 const char *format_ptr
;
2601 code
= GET_CODE (x
);
2603 /* These types may be freely shared so we needn't do any resetting
2625 /* The chain of insns is not being copied. */
2632 RTX_FLAG (x
, used
) = 0;
2634 format_ptr
= GET_RTX_FORMAT (code
);
2635 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2637 switch (*format_ptr
++)
2640 reset_used_flags (XEXP (x
, i
));
2644 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2645 reset_used_flags (XVECEXP (x
, i
, j
));
2651 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2652 Return X or the rtx for the pseudo reg the value of X was copied into.
2653 OTHER must be valid as a SET_DEST. */
2656 make_safe_from (x
, other
)
2660 switch (GET_CODE (other
))
2663 other
= SUBREG_REG (other
);
2665 case STRICT_LOW_PART
:
2668 other
= XEXP (other
, 0);
2674 if ((GET_CODE (other
) == MEM
2676 && GET_CODE (x
) != REG
2677 && GET_CODE (x
) != SUBREG
)
2678 || (GET_CODE (other
) == REG
2679 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2680 || reg_mentioned_p (other
, x
))))
2682 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2683 emit_move_insn (temp
, x
);
2689 /* Emission of insns (adding them to the doubly-linked list). */
2691 /* Return the first insn of the current sequence or current function. */
2699 /* Specify a new insn as the first in the chain. */
2702 set_first_insn (insn
)
2705 if (PREV_INSN (insn
) != 0)
2710 /* Return the last insn emitted in current sequence or current function. */
2718 /* Specify a new insn as the last in the chain. */
2721 set_last_insn (insn
)
2724 if (NEXT_INSN (insn
) != 0)
2729 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2732 get_last_insn_anywhere ()
2734 struct sequence_stack
*stack
;
2737 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2738 if (stack
->last
!= 0)
2743 /* Return the first nonnote insn emitted in current sequence or current
2744 function. This routine looks inside SEQUENCEs. */
2747 get_first_nonnote_insn ()
2749 rtx insn
= first_insn
;
2753 insn
= next_insn (insn
);
2754 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2761 /* Return the last nonnote insn emitted in current sequence or current
2762 function. This routine looks inside SEQUENCEs. */
2765 get_last_nonnote_insn ()
2767 rtx insn
= last_insn
;
2771 insn
= previous_insn (insn
);
2772 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2779 /* Return a number larger than any instruction's uid in this function. */
2784 return cur_insn_uid
;
2787 /* Renumber instructions so that no instruction UIDs are wasted. */
2790 renumber_insns (stream
)
2795 /* If we're not supposed to renumber instructions, don't. */
2796 if (!flag_renumber_insns
)
2799 /* If there aren't that many instructions, then it's not really
2800 worth renumbering them. */
2801 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2806 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2809 fprintf (stream
, "Renumbering insn %d to %d\n",
2810 INSN_UID (insn
), cur_insn_uid
);
2811 INSN_UID (insn
) = cur_insn_uid
++;
2815 /* Return the next insn. If it is a SEQUENCE, return the first insn
2824 insn
= NEXT_INSN (insn
);
2825 if (insn
&& GET_CODE (insn
) == INSN
2826 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2827 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2833 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2837 previous_insn (insn
)
2842 insn
= PREV_INSN (insn
);
2843 if (insn
&& GET_CODE (insn
) == INSN
2844 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2845 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2851 /* Return the next insn after INSN that is not a NOTE. This routine does not
2852 look inside SEQUENCEs. */
2855 next_nonnote_insn (insn
)
2860 insn
= NEXT_INSN (insn
);
2861 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2868 /* Return the previous insn before INSN that is not a NOTE. This routine does
2869 not look inside SEQUENCEs. */
2872 prev_nonnote_insn (insn
)
2877 insn
= PREV_INSN (insn
);
2878 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2885 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2886 or 0, if there is none. This routine does not look inside
2890 next_real_insn (insn
)
2895 insn
= NEXT_INSN (insn
);
2896 if (insn
== 0 || GET_CODE (insn
) == INSN
2897 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2904 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2905 or 0, if there is none. This routine does not look inside
2909 prev_real_insn (insn
)
2914 insn
= PREV_INSN (insn
);
2915 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2916 || GET_CODE (insn
) == JUMP_INSN
)
2923 /* Find the next insn after INSN that really does something. This routine
2924 does not look inside SEQUENCEs. Until reload has completed, this is the
2925 same as next_real_insn. */
2928 active_insn_p (insn
)
2931 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2932 || (GET_CODE (insn
) == INSN
2933 && (! reload_completed
2934 || (GET_CODE (PATTERN (insn
)) != USE
2935 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2939 next_active_insn (insn
)
2944 insn
= NEXT_INSN (insn
);
2945 if (insn
== 0 || active_insn_p (insn
))
2952 /* Find the last insn before INSN that really does something. This routine
2953 does not look inside SEQUENCEs. Until reload has completed, this is the
2954 same as prev_real_insn. */
2957 prev_active_insn (insn
)
2962 insn
= PREV_INSN (insn
);
2963 if (insn
== 0 || active_insn_p (insn
))
2970 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2978 insn
= NEXT_INSN (insn
);
2979 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2986 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2994 insn
= PREV_INSN (insn
);
2995 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
3003 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3004 and REG_CC_USER notes so we can find it. */
3007 link_cc0_insns (insn
)
3010 rtx user
= next_nonnote_insn (insn
);
3012 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
3013 user
= XVECEXP (PATTERN (user
), 0, 0);
3015 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
3017 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
3020 /* Return the next insn that uses CC0 after INSN, which is assumed to
3021 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3022 applied to the result of this function should yield INSN).
3024 Normally, this is simply the next insn. However, if a REG_CC_USER note
3025 is present, it contains the insn that uses CC0.
3027 Return 0 if we can't find the insn. */
3030 next_cc0_user (insn
)
3033 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3036 return XEXP (note
, 0);
3038 insn
= next_nonnote_insn (insn
);
3039 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3040 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3042 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3048 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3049 note, it is the previous insn. */
3052 prev_cc0_setter (insn
)
3055 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3058 return XEXP (note
, 0);
3060 insn
= prev_nonnote_insn (insn
);
3061 if (! sets_cc0_p (PATTERN (insn
)))
3068 /* Increment the label uses for all labels present in rtx. */
3071 mark_label_nuses (x
)
3078 code
= GET_CODE (x
);
3079 if (code
== LABEL_REF
)
3080 LABEL_NUSES (XEXP (x
, 0))++;
3082 fmt
= GET_RTX_FORMAT (code
);
3083 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3086 mark_label_nuses (XEXP (x
, i
));
3087 else if (fmt
[i
] == 'E')
3088 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3089 mark_label_nuses (XVECEXP (x
, i
, j
));
3094 /* Try splitting insns that can be split for better scheduling.
3095 PAT is the pattern which might split.
3096 TRIAL is the insn providing PAT.
3097 LAST is non-zero if we should return the last insn of the sequence produced.
3099 If this routine succeeds in splitting, it returns the first or last
3100 replacement insn depending on the value of LAST. Otherwise, it
3101 returns TRIAL. If the insn to be returned can be split, it will be. */
3104 try_split (pat
, trial
, last
)
3108 rtx before
= PREV_INSN (trial
);
3109 rtx after
= NEXT_INSN (trial
);
3110 int has_barrier
= 0;
3115 if (any_condjump_p (trial
)
3116 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3117 split_branch_probability
= INTVAL (XEXP (note
, 0));
3118 probability
= split_branch_probability
;
3120 seq
= split_insns (pat
, trial
);
3122 split_branch_probability
= -1;
3124 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3125 We may need to handle this specially. */
3126 if (after
&& GET_CODE (after
) == BARRIER
)
3129 after
= NEXT_INSN (after
);
3134 /* Sometimes there will be only one insn in that list, this case will
3135 normally arise only when we want it in turn to be split (SFmode on
3136 the 29k is an example). */
3137 if (NEXT_INSN (seq
) != NULL_RTX
)
3139 rtx insn_last
, insn
;
3142 /* Avoid infinite loop if any insn of the result matches
3143 the original pattern. */
3147 if (INSN_P (insn_last
)
3148 && rtx_equal_p (PATTERN (insn_last
), pat
))
3150 if (NEXT_INSN (insn_last
) == NULL_RTX
)
3152 insn_last
= NEXT_INSN (insn_last
);
3157 while (insn
!= NULL_RTX
)
3159 if (GET_CODE (insn
) == JUMP_INSN
)
3161 mark_jump_label (PATTERN (insn
), insn
, 0);
3163 if (probability
!= -1
3164 && any_condjump_p (insn
)
3165 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3167 /* We can preserve the REG_BR_PROB notes only if exactly
3168 one jump is created, otherwise the machine description
3169 is responsible for this step using
3170 split_branch_probability variable. */
3174 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3175 GEN_INT (probability
),
3180 insn
= PREV_INSN (insn
);
3183 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3184 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3185 if (GET_CODE (trial
) == CALL_INSN
)
3188 while (insn
!= NULL_RTX
)
3190 if (GET_CODE (insn
) == CALL_INSN
)
3191 CALL_INSN_FUNCTION_USAGE (insn
)
3192 = CALL_INSN_FUNCTION_USAGE (trial
);
3194 insn
= PREV_INSN (insn
);
3198 /* Copy notes, particularly those related to the CFG. */
3199 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3201 switch (REG_NOTE_KIND (note
))
3205 while (insn
!= NULL_RTX
)
3207 if (GET_CODE (insn
) == CALL_INSN
3208 || (flag_non_call_exceptions
3209 && may_trap_p (PATTERN (insn
))))
3211 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3214 insn
= PREV_INSN (insn
);
3220 case REG_ALWAYS_RETURN
:
3222 while (insn
!= NULL_RTX
)
3224 if (GET_CODE (insn
) == CALL_INSN
)
3226 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3229 insn
= PREV_INSN (insn
);
3233 case REG_NON_LOCAL_GOTO
:
3235 while (insn
!= NULL_RTX
)
3237 if (GET_CODE (insn
) == JUMP_INSN
)
3239 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3242 insn
= PREV_INSN (insn
);
3251 /* If there are LABELS inside the split insns increment the
3252 usage count so we don't delete the label. */
3253 if (GET_CODE (trial
) == INSN
)
3256 while (insn
!= NULL_RTX
)
3258 if (GET_CODE (insn
) == INSN
)
3259 mark_label_nuses (PATTERN (insn
));
3261 insn
= PREV_INSN (insn
);
3265 tem
= emit_insn_after_scope (seq
, trial
, INSN_SCOPE (trial
));
3267 delete_insn (trial
);
3269 emit_barrier_after (tem
);
3271 /* Recursively call try_split for each new insn created; by the
3272 time control returns here that insn will be fully split, so
3273 set LAST and continue from the insn after the one returned.
3274 We can't use next_active_insn here since AFTER may be a note.
3275 Ignore deleted insns, which can be occur if not optimizing. */
3276 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3277 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3278 tem
= try_split (PATTERN (tem
), tem
, 1);
3280 /* Avoid infinite loop if the result matches the original pattern. */
3281 else if (rtx_equal_p (PATTERN (seq
), pat
))
3285 PATTERN (trial
) = PATTERN (seq
);
3286 INSN_CODE (trial
) = -1;
3287 try_split (PATTERN (trial
), trial
, last
);
3290 /* Return either the first or the last insn, depending on which was
3293 ? (after
? PREV_INSN (after
) : last_insn
)
3294 : NEXT_INSN (before
);
3300 /* Make and return an INSN rtx, initializing all its slots.
3301 Store PATTERN in the pattern slots. */
3304 make_insn_raw (pattern
)
3309 insn
= rtx_alloc (INSN
);
3311 INSN_UID (insn
) = cur_insn_uid
++;
3312 PATTERN (insn
) = pattern
;
3313 INSN_CODE (insn
) = -1;
3314 LOG_LINKS (insn
) = NULL
;
3315 REG_NOTES (insn
) = NULL
;
3316 INSN_SCOPE (insn
) = NULL
;
3317 BLOCK_FOR_INSN (insn
) = NULL
;
3319 #ifdef ENABLE_RTL_CHECKING
3322 && (returnjump_p (insn
)
3323 || (GET_CODE (insn
) == SET
3324 && SET_DEST (insn
) == pc_rtx
)))
3326 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3334 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3337 make_jump_insn_raw (pattern
)
3342 insn
= rtx_alloc (JUMP_INSN
);
3343 INSN_UID (insn
) = cur_insn_uid
++;
3345 PATTERN (insn
) = pattern
;
3346 INSN_CODE (insn
) = -1;
3347 LOG_LINKS (insn
) = NULL
;
3348 REG_NOTES (insn
) = NULL
;
3349 JUMP_LABEL (insn
) = NULL
;
3350 INSN_SCOPE (insn
) = NULL
;
3351 BLOCK_FOR_INSN (insn
) = NULL
;
3356 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3359 make_call_insn_raw (pattern
)
3364 insn
= rtx_alloc (CALL_INSN
);
3365 INSN_UID (insn
) = cur_insn_uid
++;
3367 PATTERN (insn
) = pattern
;
3368 INSN_CODE (insn
) = -1;
3369 LOG_LINKS (insn
) = NULL
;
3370 REG_NOTES (insn
) = NULL
;
3371 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3372 INSN_SCOPE (insn
) = NULL
;
3373 BLOCK_FOR_INSN (insn
) = NULL
;
3378 /* Add INSN to the end of the doubly-linked list.
3379 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3385 PREV_INSN (insn
) = last_insn
;
3386 NEXT_INSN (insn
) = 0;
3388 if (NULL
!= last_insn
)
3389 NEXT_INSN (last_insn
) = insn
;
3391 if (NULL
== first_insn
)
3397 /* Add INSN into the doubly-linked list after insn AFTER. This and
3398 the next should be the only functions called to insert an insn once
3399 delay slots have been filled since only they know how to update a
3403 add_insn_after (insn
, after
)
3406 rtx next
= NEXT_INSN (after
);
3409 if (optimize
&& INSN_DELETED_P (after
))
3412 NEXT_INSN (insn
) = next
;
3413 PREV_INSN (insn
) = after
;
3417 PREV_INSN (next
) = insn
;
3418 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3419 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3421 else if (last_insn
== after
)
3425 struct sequence_stack
*stack
= seq_stack
;
3426 /* Scan all pending sequences too. */
3427 for (; stack
; stack
= stack
->next
)
3428 if (after
== stack
->last
)
3438 if (GET_CODE (after
) != BARRIER
3439 && GET_CODE (insn
) != BARRIER
3440 && (bb
= BLOCK_FOR_INSN (after
)))
3442 set_block_for_insn (insn
, bb
);
3444 bb
->flags
|= BB_DIRTY
;
3445 /* Should not happen as first in the BB is always
3446 either NOTE or LABEL. */
3447 if (bb
->end
== after
3448 /* Avoid clobbering of structure when creating new BB. */
3449 && GET_CODE (insn
) != BARRIER
3450 && (GET_CODE (insn
) != NOTE
3451 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3455 NEXT_INSN (after
) = insn
;
3456 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
3458 rtx sequence
= PATTERN (after
);
3459 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3463 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3464 the previous should be the only functions called to insert an insn once
3465 delay slots have been filled since only they know how to update a
3469 add_insn_before (insn
, before
)
3472 rtx prev
= PREV_INSN (before
);
3475 if (optimize
&& INSN_DELETED_P (before
))
3478 PREV_INSN (insn
) = prev
;
3479 NEXT_INSN (insn
) = before
;
3483 NEXT_INSN (prev
) = insn
;
3484 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3486 rtx sequence
= PATTERN (prev
);
3487 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3490 else if (first_insn
== before
)
3494 struct sequence_stack
*stack
= seq_stack
;
3495 /* Scan all pending sequences too. */
3496 for (; stack
; stack
= stack
->next
)
3497 if (before
== stack
->first
)
3499 stack
->first
= insn
;
3507 if (GET_CODE (before
) != BARRIER
3508 && GET_CODE (insn
) != BARRIER
3509 && (bb
= BLOCK_FOR_INSN (before
)))
3511 set_block_for_insn (insn
, bb
);
3513 bb
->flags
|= BB_DIRTY
;
3514 /* Should not happen as first in the BB is always
3515 either NOTE or LABEl. */
3516 if (bb
->head
== insn
3517 /* Avoid clobbering of structure when creating new BB. */
3518 && GET_CODE (insn
) != BARRIER
3519 && (GET_CODE (insn
) != NOTE
3520 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3524 PREV_INSN (before
) = insn
;
3525 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
3526 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3529 /* Remove an insn from its doubly-linked list. This function knows how
3530 to handle sequences. */
3535 rtx next
= NEXT_INSN (insn
);
3536 rtx prev
= PREV_INSN (insn
);
3541 NEXT_INSN (prev
) = next
;
3542 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3544 rtx sequence
= PATTERN (prev
);
3545 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3548 else if (first_insn
== insn
)
3552 struct sequence_stack
*stack
= seq_stack
;
3553 /* Scan all pending sequences too. */
3554 for (; stack
; stack
= stack
->next
)
3555 if (insn
== stack
->first
)
3557 stack
->first
= next
;
3567 PREV_INSN (next
) = prev
;
3568 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
3569 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3571 else if (last_insn
== insn
)
3575 struct sequence_stack
*stack
= seq_stack
;
3576 /* Scan all pending sequences too. */
3577 for (; stack
; stack
= stack
->next
)
3578 if (insn
== stack
->last
)
3587 if (GET_CODE (insn
) != BARRIER
3588 && (bb
= BLOCK_FOR_INSN (insn
)))
3591 bb
->flags
|= BB_DIRTY
;
3592 if (bb
->head
== insn
)
3594 /* Never ever delete the basic block note without deleting whole
3596 if (GET_CODE (insn
) == NOTE
)
3600 if (bb
->end
== insn
)
3605 /* Delete all insns made since FROM.
3606 FROM becomes the new last instruction. */
3609 delete_insns_since (from
)
3615 NEXT_INSN (from
) = 0;
3619 /* This function is deprecated, please use sequences instead.
3621 Move a consecutive bunch of insns to a different place in the chain.
3622 The insns to be moved are those between FROM and TO.
3623 They are moved to a new position after the insn AFTER.
3624 AFTER must not be FROM or TO or any insn in between.
3626 This function does not know about SEQUENCEs and hence should not be
3627 called after delay-slot filling has been done. */
3630 reorder_insns_nobb (from
, to
, after
)
3631 rtx from
, to
, after
;
3633 /* Splice this bunch out of where it is now. */
3634 if (PREV_INSN (from
))
3635 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3637 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3638 if (last_insn
== to
)
3639 last_insn
= PREV_INSN (from
);
3640 if (first_insn
== from
)
3641 first_insn
= NEXT_INSN (to
);
3643 /* Make the new neighbors point to it and it to them. */
3644 if (NEXT_INSN (after
))
3645 PREV_INSN (NEXT_INSN (after
)) = to
;
3647 NEXT_INSN (to
) = NEXT_INSN (after
);
3648 PREV_INSN (from
) = after
;
3649 NEXT_INSN (after
) = from
;
3650 if (after
== last_insn
)
3654 /* Same as function above, but take care to update BB boundaries. */
3656 reorder_insns (from
, to
, after
)
3657 rtx from
, to
, after
;
3659 rtx prev
= PREV_INSN (from
);
3660 basic_block bb
, bb2
;
3662 reorder_insns_nobb (from
, to
, after
);
3664 if (GET_CODE (after
) != BARRIER
3665 && (bb
= BLOCK_FOR_INSN (after
)))
3668 bb
->flags
|= BB_DIRTY
;
3670 if (GET_CODE (from
) != BARRIER
3671 && (bb2
= BLOCK_FOR_INSN (from
)))
3675 bb2
->flags
|= BB_DIRTY
;
3678 if (bb
->end
== after
)
3681 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3682 set_block_for_insn (x
, bb
);
3686 /* Return the line note insn preceding INSN. */
3689 find_line_note (insn
)
3692 if (no_line_numbers
)
3695 for (; insn
; insn
= PREV_INSN (insn
))
3696 if (GET_CODE (insn
) == NOTE
3697 && NOTE_LINE_NUMBER (insn
) >= 0)
3703 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3704 of the moved insns when debugging. This may insert a note between AFTER
3705 and FROM, and another one after TO. */
3708 reorder_insns_with_line_notes (from
, to
, after
)
3709 rtx from
, to
, after
;
3711 rtx from_line
= find_line_note (from
);
3712 rtx after_line
= find_line_note (after
);
3714 reorder_insns (from
, to
, after
);
3716 if (from_line
== after_line
)
3720 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3721 NOTE_LINE_NUMBER (from_line
),
3724 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3725 NOTE_LINE_NUMBER (after_line
),
3729 /* Remove unnecessary notes from the instruction stream. */
3732 remove_unnecessary_notes ()
3734 rtx block_stack
= NULL_RTX
;
3735 rtx eh_stack
= NULL_RTX
;
3740 /* We must not remove the first instruction in the function because
3741 the compiler depends on the first instruction being a note. */
3742 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3744 /* Remember what's next. */
3745 next
= NEXT_INSN (insn
);
3747 /* We're only interested in notes. */
3748 if (GET_CODE (insn
) != NOTE
)
3751 switch (NOTE_LINE_NUMBER (insn
))
3753 case NOTE_INSN_DELETED
:
3754 case NOTE_INSN_LOOP_END_TOP_COND
:
3758 case NOTE_INSN_EH_REGION_BEG
:
3759 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3762 case NOTE_INSN_EH_REGION_END
:
3763 /* Too many end notes. */
3764 if (eh_stack
== NULL_RTX
)
3766 /* Mismatched nesting. */
3767 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
3770 eh_stack
= XEXP (eh_stack
, 1);
3771 free_INSN_LIST_node (tmp
);
3774 case NOTE_INSN_BLOCK_BEG
:
3775 /* By now, all notes indicating lexical blocks should have
3776 NOTE_BLOCK filled in. */
3777 if (NOTE_BLOCK (insn
) == NULL_TREE
)
3779 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
3782 case NOTE_INSN_BLOCK_END
:
3783 /* Too many end notes. */
3784 if (block_stack
== NULL_RTX
)
3786 /* Mismatched nesting. */
3787 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
3790 block_stack
= XEXP (block_stack
, 1);
3791 free_INSN_LIST_node (tmp
);
3793 /* Scan back to see if there are any non-note instructions
3794 between INSN and the beginning of this block. If not,
3795 then there is no PC range in the generated code that will
3796 actually be in this block, so there's no point in
3797 remembering the existence of the block. */
3798 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
3800 /* This block contains a real instruction. Note that we
3801 don't include labels; if the only thing in the block
3802 is a label, then there are still no PC values that
3803 lie within the block. */
3807 /* We're only interested in NOTEs. */
3808 if (GET_CODE (tmp
) != NOTE
)
3811 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
3813 /* We just verified that this BLOCK matches us with
3814 the block_stack check above. Never delete the
3815 BLOCK for the outermost scope of the function; we
3816 can refer to names from that scope even if the
3817 block notes are messed up. */
3818 if (! is_body_block (NOTE_BLOCK (insn
))
3819 && (*debug_hooks
->ignore_block
) (NOTE_BLOCK (insn
)))
3826 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
3827 /* There's a nested block. We need to leave the
3828 current block in place since otherwise the debugger
3829 wouldn't be able to show symbols from our block in
3830 the nested block. */
3836 /* Too many begin notes. */
3837 if (block_stack
|| eh_stack
)
3842 /* Emit insn(s) of given code and pattern
3843 at a specified place within the doubly-linked list.
3845 All of the emit_foo global entry points accept an object
3846 X which is either an insn list or a PATTERN of a single
3849 There are thus a few canonical ways to generate code and
3850 emit it at a specific place in the instruction stream. For
3851 example, consider the instruction named SPOT and the fact that
3852 we would like to emit some instructions before SPOT. We might
3856 ... emit the new instructions ...
3857 insns_head = get_insns ();
3860 emit_insn_before (insns_head, SPOT);
3862 It used to be common to generate SEQUENCE rtl instead, but that
3863 is a relic of the past which no longer occurs. The reason is that
3864 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3865 generated would almost certainly die right after it was created. */
3867 /* Make X be output before the instruction BEFORE. */
3870 emit_insn_before (x
, before
)
3876 #ifdef ENABLE_RTL_CHECKING
3877 if (before
== NULL_RTX
)
3884 switch (GET_CODE (x
))
3895 rtx next
= NEXT_INSN (insn
);
3896 add_insn_before (insn
, before
);
3902 #ifdef ENABLE_RTL_CHECKING
3909 last
= make_insn_raw (x
);
3910 add_insn_before (last
, before
);
3917 /* Make an instruction with body X and code JUMP_INSN
3918 and output it before the instruction BEFORE. */
3921 emit_jump_insn_before (x
, before
)
3926 #ifdef ENABLE_RTL_CHECKING
3927 if (before
== NULL_RTX
)
3931 switch (GET_CODE (x
))
3942 rtx next
= NEXT_INSN (insn
);
3943 add_insn_before (insn
, before
);
3949 #ifdef ENABLE_RTL_CHECKING
3956 last
= make_jump_insn_raw (x
);
3957 add_insn_before (last
, before
);
3964 /* Make an instruction with body X and code CALL_INSN
3965 and output it before the instruction BEFORE. */
3968 emit_call_insn_before (x
, before
)
3973 #ifdef ENABLE_RTL_CHECKING
3974 if (before
== NULL_RTX
)
3978 switch (GET_CODE (x
))
3989 rtx next
= NEXT_INSN (insn
);
3990 add_insn_before (insn
, before
);
3996 #ifdef ENABLE_RTL_CHECKING
4003 last
= make_call_insn_raw (x
);
4004 add_insn_before (last
, before
);
4011 /* Make an insn of code BARRIER
4012 and output it before the insn BEFORE. */
4015 emit_barrier_before (before
)
4018 rtx insn
= rtx_alloc (BARRIER
);
4020 INSN_UID (insn
) = cur_insn_uid
++;
4022 add_insn_before (insn
, before
);
4026 /* Emit the label LABEL before the insn BEFORE. */
4029 emit_label_before (label
, before
)
4032 /* This can be called twice for the same label as a result of the
4033 confusion that follows a syntax error! So make it harmless. */
4034 if (INSN_UID (label
) == 0)
4036 INSN_UID (label
) = cur_insn_uid
++;
4037 add_insn_before (label
, before
);
4043 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4046 emit_note_before (subtype
, before
)
4050 rtx note
= rtx_alloc (NOTE
);
4051 INSN_UID (note
) = cur_insn_uid
++;
4052 NOTE_SOURCE_FILE (note
) = 0;
4053 NOTE_LINE_NUMBER (note
) = subtype
;
4054 BLOCK_FOR_INSN (note
) = NULL
;
4056 add_insn_before (note
, before
);
4060 /* Helper for emit_insn_after, handles lists of instructions
4063 static rtx emit_insn_after_1
PARAMS ((rtx
, rtx
));
4066 emit_insn_after_1 (first
, after
)
4073 if (GET_CODE (after
) != BARRIER
4074 && (bb
= BLOCK_FOR_INSN (after
)))
4076 bb
->flags
|= BB_DIRTY
;
4077 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4078 if (GET_CODE (last
) != BARRIER
)
4079 set_block_for_insn (last
, bb
);
4080 if (GET_CODE (last
) != BARRIER
)
4081 set_block_for_insn (last
, bb
);
4082 if (bb
->end
== after
)
4086 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
4089 after_after
= NEXT_INSN (after
);
4091 NEXT_INSN (after
) = first
;
4092 PREV_INSN (first
) = after
;
4093 NEXT_INSN (last
) = after_after
;
4095 PREV_INSN (after_after
) = last
;
4097 if (after
== last_insn
)
4102 /* Make X be output after the insn AFTER. */
4105 emit_insn_after (x
, after
)
4110 #ifdef ENABLE_RTL_CHECKING
4111 if (after
== NULL_RTX
)
4118 switch (GET_CODE (x
))
4126 last
= emit_insn_after_1 (x
, after
);
4129 #ifdef ENABLE_RTL_CHECKING
4136 last
= make_insn_raw (x
);
4137 add_insn_after (last
, after
);
4144 /* Similar to emit_insn_after, except that line notes are to be inserted so
4145 as to act as if this insn were at FROM. */
4148 emit_insn_after_with_line_notes (x
, after
, from
)
4151 rtx from_line
= find_line_note (from
);
4152 rtx after_line
= find_line_note (after
);
4153 rtx insn
= emit_insn_after (x
, after
);
4156 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
4157 NOTE_LINE_NUMBER (from_line
),
4161 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
4162 NOTE_LINE_NUMBER (after_line
),
4166 /* Make an insn of code JUMP_INSN with body X
4167 and output it after the insn AFTER. */
4170 emit_jump_insn_after (x
, after
)
4175 #ifdef ENABLE_RTL_CHECKING
4176 if (after
== NULL_RTX
)
4180 switch (GET_CODE (x
))
4188 last
= emit_insn_after_1 (x
, after
);
4191 #ifdef ENABLE_RTL_CHECKING
4198 last
= make_jump_insn_raw (x
);
4199 add_insn_after (last
, after
);
4206 /* Make an instruction with body X and code CALL_INSN
4207 and output it after the instruction AFTER. */
4210 emit_call_insn_after (x
, after
)
4215 #ifdef ENABLE_RTL_CHECKING
4216 if (after
== NULL_RTX
)
4220 switch (GET_CODE (x
))
4228 last
= emit_insn_after_1 (x
, after
);
4231 #ifdef ENABLE_RTL_CHECKING
4238 last
= make_call_insn_raw (x
);
4239 add_insn_after (last
, after
);
4246 /* Make an insn of code BARRIER
4247 and output it after the insn AFTER. */
4250 emit_barrier_after (after
)
4253 rtx insn
= rtx_alloc (BARRIER
);
4255 INSN_UID (insn
) = cur_insn_uid
++;
4257 add_insn_after (insn
, after
);
4261 /* Emit the label LABEL after the insn AFTER. */
4264 emit_label_after (label
, after
)
4267 /* This can be called twice for the same label
4268 as a result of the confusion that follows a syntax error!
4269 So make it harmless. */
4270 if (INSN_UID (label
) == 0)
4272 INSN_UID (label
) = cur_insn_uid
++;
4273 add_insn_after (label
, after
);
4279 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4282 emit_note_after (subtype
, after
)
4286 rtx note
= rtx_alloc (NOTE
);
4287 INSN_UID (note
) = cur_insn_uid
++;
4288 NOTE_SOURCE_FILE (note
) = 0;
4289 NOTE_LINE_NUMBER (note
) = subtype
;
4290 BLOCK_FOR_INSN (note
) = NULL
;
4291 add_insn_after (note
, after
);
4295 /* Emit a line note for FILE and LINE after the insn AFTER. */
4298 emit_line_note_after (file
, line
, after
)
4305 if (no_line_numbers
&& line
> 0)
4311 note
= rtx_alloc (NOTE
);
4312 INSN_UID (note
) = cur_insn_uid
++;
4313 NOTE_SOURCE_FILE (note
) = file
;
4314 NOTE_LINE_NUMBER (note
) = line
;
4315 BLOCK_FOR_INSN (note
) = NULL
;
4316 add_insn_after (note
, after
);
4320 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4322 emit_insn_after_scope (pattern
, after
, scope
)
4326 rtx last
= emit_insn_after (pattern
, after
);
4328 after
= NEXT_INSN (after
);
4331 if (active_insn_p (after
))
4332 INSN_SCOPE (after
) = scope
;
4335 after
= NEXT_INSN (after
);
4340 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4342 emit_jump_insn_after_scope (pattern
, after
, scope
)
4346 rtx last
= emit_jump_insn_after (pattern
, after
);
4348 after
= NEXT_INSN (after
);
4351 if (active_insn_p (after
))
4352 INSN_SCOPE (after
) = scope
;
4355 after
= NEXT_INSN (after
);
4360 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4362 emit_call_insn_after_scope (pattern
, after
, scope
)
4366 rtx last
= emit_call_insn_after (pattern
, after
);
4368 after
= NEXT_INSN (after
);
4371 if (active_insn_p (after
))
4372 INSN_SCOPE (after
) = scope
;
4375 after
= NEXT_INSN (after
);
4380 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4382 emit_insn_before_scope (pattern
, before
, scope
)
4383 rtx pattern
, before
;
4386 rtx first
= PREV_INSN (before
);
4387 rtx last
= emit_insn_before (pattern
, before
);
4389 first
= NEXT_INSN (first
);
4392 if (active_insn_p (first
))
4393 INSN_SCOPE (first
) = scope
;
4396 first
= NEXT_INSN (first
);
4401 /* Take X and emit it at the end of the doubly-linked
4404 Returns the last insn emitted. */
4410 rtx last
= last_insn
;
4416 switch (GET_CODE (x
))
4427 rtx next
= NEXT_INSN (insn
);
4434 #ifdef ENABLE_RTL_CHECKING
4441 last
= make_insn_raw (x
);
4449 /* Make an insn of code JUMP_INSN with pattern X
4450 and add it to the end of the doubly-linked list. */
4458 switch (GET_CODE (x
))
4469 rtx next
= NEXT_INSN (insn
);
4476 #ifdef ENABLE_RTL_CHECKING
4483 last
= make_jump_insn_raw (x
);
4491 /* Make an insn of code CALL_INSN with pattern X
4492 and add it to the end of the doubly-linked list. */
4500 switch (GET_CODE (x
))
4508 insn
= emit_insn (x
);
4511 #ifdef ENABLE_RTL_CHECKING
4518 insn
= make_call_insn_raw (x
);
4526 /* Add the label LABEL to the end of the doubly-linked list. */
4532 /* This can be called twice for the same label
4533 as a result of the confusion that follows a syntax error!
4534 So make it harmless. */
4535 if (INSN_UID (label
) == 0)
4537 INSN_UID (label
) = cur_insn_uid
++;
4543 /* Make an insn of code BARRIER
4544 and add it to the end of the doubly-linked list. */
4549 rtx barrier
= rtx_alloc (BARRIER
);
4550 INSN_UID (barrier
) = cur_insn_uid
++;
4555 /* Make an insn of code NOTE
4556 with data-fields specified by FILE and LINE
4557 and add it to the end of the doubly-linked list,
4558 but only if line-numbers are desired for debugging info. */
4561 emit_line_note (file
, line
)
4565 set_file_and_line_for_stmt (file
, line
);
4568 if (no_line_numbers
)
4572 return emit_note (file
, line
);
4575 /* Make an insn of code NOTE
4576 with data-fields specified by FILE and LINE
4577 and add it to the end of the doubly-linked list.
4578 If it is a line-number NOTE, omit it if it matches the previous one. */
4581 emit_note (file
, line
)
4589 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
4590 && line
== last_linenum
)
4592 last_filename
= file
;
4593 last_linenum
= line
;
4596 if (no_line_numbers
&& line
> 0)
4602 note
= rtx_alloc (NOTE
);
4603 INSN_UID (note
) = cur_insn_uid
++;
4604 NOTE_SOURCE_FILE (note
) = file
;
4605 NOTE_LINE_NUMBER (note
) = line
;
4606 BLOCK_FOR_INSN (note
) = NULL
;
4611 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4614 emit_line_note_force (file
, line
)
4619 return emit_line_note (file
, line
);
4622 /* Cause next statement to emit a line note even if the line number
4623 has not changed. This is used at the beginning of a function. */
4626 force_next_line_note ()
4631 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4632 note of this type already exists, remove it first. */
4635 set_unique_reg_note (insn
, kind
, datum
)
4640 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4646 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4647 has multiple sets (some callers assume single_set
4648 means the insn only has one set, when in fact it
4649 means the insn only has one * useful * set). */
4650 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4657 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4658 It serves no useful purpose and breaks eliminate_regs. */
4659 if (GET_CODE (datum
) == ASM_OPERANDS
)
4669 XEXP (note
, 0) = datum
;
4673 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4674 return REG_NOTES (insn
);
4677 /* Return an indication of which type of insn should have X as a body.
4678 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4684 if (GET_CODE (x
) == CODE_LABEL
)
4686 if (GET_CODE (x
) == CALL
)
4688 if (GET_CODE (x
) == RETURN
)
4690 if (GET_CODE (x
) == SET
)
4692 if (SET_DEST (x
) == pc_rtx
)
4694 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4699 if (GET_CODE (x
) == PARALLEL
)
4702 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4703 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4705 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4706 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4708 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4709 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4715 /* Emit the rtl pattern X as an appropriate kind of insn.
4716 If X is a label, it is simply added into the insn chain. */
4722 enum rtx_code code
= classify_insn (x
);
4724 if (code
== CODE_LABEL
)
4725 return emit_label (x
);
4726 else if (code
== INSN
)
4727 return emit_insn (x
);
4728 else if (code
== JUMP_INSN
)
4730 rtx insn
= emit_jump_insn (x
);
4731 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4732 return emit_barrier ();
4735 else if (code
== CALL_INSN
)
4736 return emit_call_insn (x
);
4741 /* Space for free sequence stack entries. */
4742 static GTY ((deletable (""))) struct sequence_stack
*free_sequence_stack
;
4744 /* Begin emitting insns to a sequence which can be packaged in an
4745 RTL_EXPR. If this sequence will contain something that might cause
4746 the compiler to pop arguments to function calls (because those
4747 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4748 details), use do_pending_stack_adjust before calling this function.
4749 That will ensure that the deferred pops are not accidentally
4750 emitted in the middle of this sequence. */
4755 struct sequence_stack
*tem
;
4757 if (free_sequence_stack
!= NULL
)
4759 tem
= free_sequence_stack
;
4760 free_sequence_stack
= tem
->next
;
4763 tem
= (struct sequence_stack
*) ggc_alloc (sizeof (struct sequence_stack
));
4765 tem
->next
= seq_stack
;
4766 tem
->first
= first_insn
;
4767 tem
->last
= last_insn
;
4768 tem
->sequence_rtl_expr
= seq_rtl_expr
;
4776 /* Similarly, but indicate that this sequence will be placed in T, an
4777 RTL_EXPR. See the documentation for start_sequence for more
4778 information about how to use this function. */
4781 start_sequence_for_rtl_expr (t
)
4789 /* Set up the insn chain starting with FIRST as the current sequence,
4790 saving the previously current one. See the documentation for
4791 start_sequence for more information about how to use this function. */
4794 push_to_sequence (first
)
4801 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4807 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4810 push_to_full_sequence (first
, last
)
4816 /* We really should have the end of the insn chain here. */
4817 if (last
&& NEXT_INSN (last
))
4821 /* Set up the outer-level insn chain
4822 as the current sequence, saving the previously current one. */
4825 push_topmost_sequence ()
4827 struct sequence_stack
*stack
, *top
= NULL
;
4831 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4834 first_insn
= top
->first
;
4835 last_insn
= top
->last
;
4836 seq_rtl_expr
= top
->sequence_rtl_expr
;
4839 /* After emitting to the outer-level insn chain, update the outer-level
4840 insn chain, and restore the previous saved state. */
4843 pop_topmost_sequence ()
4845 struct sequence_stack
*stack
, *top
= NULL
;
4847 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4850 top
->first
= first_insn
;
4851 top
->last
= last_insn
;
4852 /* ??? Why don't we save seq_rtl_expr here? */
4857 /* After emitting to a sequence, restore previous saved state.
4859 To get the contents of the sequence just made, you must call
4860 `get_insns' *before* calling here.
4862 If the compiler might have deferred popping arguments while
4863 generating this sequence, and this sequence will not be immediately
4864 inserted into the instruction stream, use do_pending_stack_adjust
4865 before calling get_insns. That will ensure that the deferred
4866 pops are inserted into this sequence, and not into some random
4867 location in the instruction stream. See INHIBIT_DEFER_POP for more
4868 information about deferred popping of arguments. */
4873 struct sequence_stack
*tem
= seq_stack
;
4875 first_insn
= tem
->first
;
4876 last_insn
= tem
->last
;
4877 seq_rtl_expr
= tem
->sequence_rtl_expr
;
4878 seq_stack
= tem
->next
;
4880 memset (tem
, 0, sizeof (*tem
));
4881 tem
->next
= free_sequence_stack
;
4882 free_sequence_stack
= tem
;
4885 /* This works like end_sequence, but records the old sequence in FIRST
4889 end_full_sequence (first
, last
)
4892 *first
= first_insn
;
4897 /* Return 1 if currently emitting into a sequence. */
4902 return seq_stack
!= 0;
4905 /* Put the various virtual registers into REGNO_REG_RTX. */
4908 init_virtual_regs (es
)
4909 struct emit_status
*es
;
4911 rtx
*ptr
= es
->x_regno_reg_rtx
;
4912 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4913 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4914 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4915 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4916 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4920 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4921 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4922 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4923 static int copy_insn_n_scratches
;
4925 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4926 copied an ASM_OPERANDS.
4927 In that case, it is the original input-operand vector. */
4928 static rtvec orig_asm_operands_vector
;
4930 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4931 copied an ASM_OPERANDS.
4932 In that case, it is the copied input-operand vector. */
4933 static rtvec copy_asm_operands_vector
;
4935 /* Likewise for the constraints vector. */
4936 static rtvec orig_asm_constraints_vector
;
4937 static rtvec copy_asm_constraints_vector
;
4939 /* Recursively create a new copy of an rtx for copy_insn.
4940 This function differs from copy_rtx in that it handles SCRATCHes and
4941 ASM_OPERANDs properly.
4942 Normally, this function is not used directly; use copy_insn as front end.
4943 However, you could first copy an insn pattern with copy_insn and then use
4944 this function afterwards to properly copy any REG_NOTEs containing
4954 const char *format_ptr
;
4956 code
= GET_CODE (orig
);
4973 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4974 if (copy_insn_scratch_in
[i
] == orig
)
4975 return copy_insn_scratch_out
[i
];
4979 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4980 a LABEL_REF, it isn't sharable. */
4981 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4982 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4983 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4987 /* A MEM with a constant address is not sharable. The problem is that
4988 the constant address may need to be reloaded. If the mem is shared,
4989 then reloading one copy of this mem will cause all copies to appear
4990 to have been reloaded. */
4996 copy
= rtx_alloc (code
);
4998 /* Copy the various flags, and other information. We assume that
4999 all fields need copying, and then clear the fields that should
5000 not be copied. That is the sensible default behavior, and forces
5001 us to explicitly document why we are *not* copying a flag. */
5002 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
5004 /* We do not copy the USED flag, which is used as a mark bit during
5005 walks over the RTL. */
5006 RTX_FLAG (copy
, used
) = 0;
5008 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5009 if (GET_RTX_CLASS (code
) == 'i')
5011 RTX_FLAG (copy
, jump
) = 0;
5012 RTX_FLAG (copy
, call
) = 0;
5013 RTX_FLAG (copy
, frame_related
) = 0;
5016 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
5018 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
5020 copy
->fld
[i
] = orig
->fld
[i
];
5021 switch (*format_ptr
++)
5024 if (XEXP (orig
, i
) != NULL
)
5025 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
5030 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
5031 XVEC (copy
, i
) = copy_asm_constraints_vector
;
5032 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
5033 XVEC (copy
, i
) = copy_asm_operands_vector
;
5034 else if (XVEC (orig
, i
) != NULL
)
5036 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
5037 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
5038 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
5049 /* These are left unchanged. */
5057 if (code
== SCRATCH
)
5059 i
= copy_insn_n_scratches
++;
5060 if (i
>= MAX_RECOG_OPERANDS
)
5062 copy_insn_scratch_in
[i
] = orig
;
5063 copy_insn_scratch_out
[i
] = copy
;
5065 else if (code
== ASM_OPERANDS
)
5067 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
5068 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
5069 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
5070 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
5076 /* Create a new copy of an rtx.
5077 This function differs from copy_rtx in that it handles SCRATCHes and
5078 ASM_OPERANDs properly.
5079 INSN doesn't really have to be a full INSN; it could be just the
5085 copy_insn_n_scratches
= 0;
5086 orig_asm_operands_vector
= 0;
5087 orig_asm_constraints_vector
= 0;
5088 copy_asm_operands_vector
= 0;
5089 copy_asm_constraints_vector
= 0;
5090 return copy_insn_1 (insn
);
5093 /* Initialize data structures and variables in this file
5094 before generating rtl for each function. */
5099 struct function
*f
= cfun
;
5101 f
->emit
= (struct emit_status
*) ggc_alloc (sizeof (struct emit_status
));
5104 seq_rtl_expr
= NULL
;
5106 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5109 first_label_num
= label_num
;
5113 /* Init the tables that describe all the pseudo regs. */
5115 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5117 f
->emit
->regno_pointer_align
5118 = (unsigned char *) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5119 * sizeof (unsigned char));
5122 = (rtx
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5126 = (tree
*) ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5129 /* Put copies of all the hard registers into regno_reg_rtx. */
5130 memcpy (regno_reg_rtx
,
5131 static_regno_reg_rtx
,
5132 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5134 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5135 init_virtual_regs (f
->emit
);
5137 /* Indicate that the virtual registers and stack locations are
5139 REG_POINTER (stack_pointer_rtx
) = 1;
5140 REG_POINTER (frame_pointer_rtx
) = 1;
5141 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5142 REG_POINTER (arg_pointer_rtx
) = 1;
5144 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5145 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5146 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5147 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5148 REG_POINTER (virtual_cfa_rtx
) = 1;
5150 #ifdef STACK_BOUNDARY
5151 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5152 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5153 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5154 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5156 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5157 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5158 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5159 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5160 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5163 #ifdef INIT_EXPANDERS
5168 /* Generate the constant 0. */
5171 gen_const_vector_0 (mode
)
5172 enum machine_mode mode
;
5177 enum machine_mode inner
;
5179 units
= GET_MODE_NUNITS (mode
);
5180 inner
= GET_MODE_INNER (mode
);
5182 v
= rtvec_alloc (units
);
5184 /* We need to call this function after we to set CONST0_RTX first. */
5185 if (!CONST0_RTX (inner
))
5188 for (i
= 0; i
< units
; ++i
)
5189 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
5191 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5195 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5196 all elements are zero. */
5198 gen_rtx_CONST_VECTOR (mode
, v
)
5199 enum machine_mode mode
;
5202 rtx inner_zero
= CONST0_RTX (GET_MODE_INNER (mode
));
5205 for (i
= GET_MODE_NUNITS (mode
) - 1; i
>= 0; i
--)
5206 if (RTVEC_ELT (v
, i
) != inner_zero
)
5207 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5208 return CONST0_RTX (mode
);
5211 /* Create some permanent unique rtl objects shared between all functions.
5212 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5215 init_emit_once (line_numbers
)
5219 enum machine_mode mode
;
5220 enum machine_mode double_mode
;
5222 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5224 const_int_htab
= htab_create (37, const_int_htab_hash
,
5225 const_int_htab_eq
, NULL
);
5227 const_double_htab
= htab_create (37, const_double_htab_hash
,
5228 const_double_htab_eq
, NULL
);
5230 mem_attrs_htab
= htab_create (37, mem_attrs_htab_hash
,
5231 mem_attrs_htab_eq
, NULL
);
5233 no_line_numbers
= ! line_numbers
;
5235 /* Compute the word and byte modes. */
5237 byte_mode
= VOIDmode
;
5238 word_mode
= VOIDmode
;
5239 double_mode
= VOIDmode
;
5241 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5242 mode
= GET_MODE_WIDER_MODE (mode
))
5244 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5245 && byte_mode
== VOIDmode
)
5248 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5249 && word_mode
== VOIDmode
)
5253 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5254 mode
= GET_MODE_WIDER_MODE (mode
))
5256 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5257 && double_mode
== VOIDmode
)
5261 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5263 /* Assign register numbers to the globally defined register rtx.
5264 This must be done at runtime because the register number field
5265 is in a union and some compilers can't initialize unions. */
5267 pc_rtx
= gen_rtx (PC
, VOIDmode
);
5268 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
5269 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5270 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5271 if (hard_frame_pointer_rtx
== 0)
5272 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5273 HARD_FRAME_POINTER_REGNUM
);
5274 if (arg_pointer_rtx
== 0)
5275 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5276 virtual_incoming_args_rtx
=
5277 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5278 virtual_stack_vars_rtx
=
5279 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5280 virtual_stack_dynamic_rtx
=
5281 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5282 virtual_outgoing_args_rtx
=
5283 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5284 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5286 /* Initialize RTL for commonly used hard registers. These are
5287 copied into regno_reg_rtx as we begin to compile each function. */
5288 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5289 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5291 #ifdef INIT_EXPANDERS
5292 /* This is to initialize {init|mark|free}_machine_status before the first
5293 call to push_function_context_to. This is needed by the Chill front
5294 end which calls push_function_context_to before the first call to
5295 init_function_start. */
5299 /* Create the unique rtx's for certain rtx codes and operand values. */
5301 /* Don't use gen_rtx here since gen_rtx in this case
5302 tries to use these variables. */
5303 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5304 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5305 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5307 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5308 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5309 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5311 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5313 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5314 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5315 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5316 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5318 for (i
= 0; i
<= 2; i
++)
5320 REAL_VALUE_TYPE
*r
=
5321 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5323 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5324 mode
= GET_MODE_WIDER_MODE (mode
))
5325 const_tiny_rtx
[i
][(int) mode
] =
5326 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5328 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5330 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5331 mode
= GET_MODE_WIDER_MODE (mode
))
5332 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5334 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5336 mode
= GET_MODE_WIDER_MODE (mode
))
5337 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5340 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5342 mode
= GET_MODE_WIDER_MODE (mode
))
5343 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5345 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5347 mode
= GET_MODE_WIDER_MODE (mode
))
5348 const_tiny_rtx
[0][(int) mode
] = gen_const_vector_0 (mode
);
5350 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5351 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5352 const_tiny_rtx
[0][i
] = const0_rtx
;
5354 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5355 if (STORE_FLAG_VALUE
== 1)
5356 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5358 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5359 return_address_pointer_rtx
5360 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5364 struct_value_rtx
= STRUCT_VALUE
;
5366 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
5369 #ifdef STRUCT_VALUE_INCOMING
5370 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
5372 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5373 struct_value_incoming_rtx
5374 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
5376 struct_value_incoming_rtx
= struct_value_rtx
;
5380 #ifdef STATIC_CHAIN_REGNUM
5381 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5383 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5384 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5385 static_chain_incoming_rtx
5386 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5389 static_chain_incoming_rtx
= static_chain_rtx
;
5393 static_chain_rtx
= STATIC_CHAIN
;
5395 #ifdef STATIC_CHAIN_INCOMING
5396 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5398 static_chain_incoming_rtx
= static_chain_rtx
;
5402 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5403 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5406 /* Query and clear/ restore no_line_numbers. This is used by the
5407 switch / case handling in stmt.c to give proper line numbers in
5408 warnings about unreachable code. */
5411 force_line_numbers ()
5413 int old
= no_line_numbers
;
5415 no_line_numbers
= 0;
5417 force_next_line_note ();
5422 restore_line_number_status (old_value
)
5425 no_line_numbers
= old_value
;
5428 /* Produce exact duplicate of insn INSN after AFTER.
5429 Care updating of libcall regions if present. */
5432 emit_copy_of_insn_after (insn
, after
)
5436 rtx note1
, note2
, link
;
5438 switch (GET_CODE (insn
))
5441 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5445 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5449 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5450 if (CALL_INSN_FUNCTION_USAGE (insn
))
5451 CALL_INSN_FUNCTION_USAGE (new)
5452 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5453 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5454 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5461 /* Update LABEL_NUSES. */
5462 mark_jump_label (PATTERN (new), new, 0);
5464 INSN_SCOPE (new) = INSN_SCOPE (insn
);
5466 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5468 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5469 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5471 if (GET_CODE (link
) == EXPR_LIST
)
5473 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5478 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5483 /* Fix the libcall sequences. */
5484 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5487 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5489 XEXP (note1
, 0) = p
;
5490 XEXP (note2
, 0) = new;
5495 #include "gt-emit-rtl.h"