1 ;; Constraint definitions for SPARC.
2 ;; Copyright (C) 2008, 2010 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
25 ;; Register constraints
27 (define_register_constraint "b" "(TARGET_V9 && TARGET_VIS ? EXTRA_FP_REGS : NO_REGS)"
28 "Any floating-point register in VIS mode")
30 (define_register_constraint "c" "FPCC_REGS"
31 "Floating-point condition code register")
33 (define_register_constraint "d" "(TARGET_V9 && TARGET_VIS ? FP_REGS : NO_REGS)"
34 "Lower floating-point register in VIS mode")
36 ;; In the non-V9 case, coerce V9 'e' class to 'f', so we can use 'e' in the
37 ;; MD file for V8 and V9.
38 (define_register_constraint "e" "(TARGET_FPU ? (TARGET_V9 ? EXTRA_FP_REGS : FP_REGS) : NO_REGS)"
39 "Any floating-point register")
41 (define_register_constraint "f" "(TARGET_FPU ? FP_REGS : NO_REGS)"
42 "Lower floating-point register")
44 (define_register_constraint "h" "(TARGET_V9 && TARGET_V8PLUS ? I64_REGS : NO_REGS)"
45 "64-bit global or out register in V8+ mode")
47 (define_memory_constraint "w"
48 "A memory with only a base register"
49 (match_operand 0 "mem_noofs_operand"))
51 ;; Floating-point constant constraints
53 (define_constraint "G"
54 "The floating-point zero constant"
55 (and (match_code "const_double")
56 (match_test "const_zero_operand (op, mode)")))
58 (define_constraint "C"
59 "The floating-point all-ones constant"
60 (and (match_code "const_double")
61 (match_test "const_all_ones_operand (op, mode)")))
63 ;; Integer constant constraints
65 (define_constraint "H"
66 "Valid operand of double arithmetic operation"
67 (and (match_code "const_double")
68 (match_test "arith_double_operand (op, DImode)")))
70 (define_constraint "I"
71 "Signed 13-bit integer constant"
72 (and (match_code "const_int")
73 (match_test "SPARC_SIMM13_P (ival)")))
75 (define_constraint "J"
76 "The integer zero constant"
77 (and (match_code "const_int")
78 (match_test "ival == 0")))
80 (define_constraint "K"
81 "Signed 32-bit constant that can be loaded with a sethi instruction"
82 (and (match_code "const_int")
83 (match_test "SPARC_SETHI32_P (ival)")))
85 (define_constraint "L"
86 "Signed 11-bit integer constant"
87 (and (match_code "const_int")
88 (match_test "SPARC_SIMM11_P (ival)")))
90 (define_constraint "M"
91 "Signed 10-bit integer constant"
92 (and (match_code "const_int")
93 (match_test "SPARC_SIMM10_P (ival)")))
95 (define_constraint "N"
96 "Signed constant that can be loaded with a sethi instruction"
97 (and (match_code "const_int")
98 (match_test "SPARC_SETHI_P (ival)")))
100 (define_constraint "O"
102 (and (match_code "const_int")
103 (match_test "ival == 4096")))
105 (define_constraint "P"
106 "The integer constant -1"
107 (and (match_code "const_int")
108 (match_test "ival == -1")))
111 ;; Our memory extra constraints have to emulate the behavior of 'm' and 'o',
112 ;; i.e. accept pseudo-registers during reload.
114 (define_constraint "D"
116 (and (match_code "const_vector")
117 (match_test "GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_INT")))
119 (define_constraint "Q"
120 "Floating-point constant that can be loaded with a sethi instruction"
121 (and (match_code "const_double")
122 (match_test "fp_sethi_p (op)")))
124 (define_constraint "R"
125 "Floating-point constant that can be loaded with a move instruction"
126 (and (match_code "const_double")
127 (match_test "fp_mov_p (op)")))
129 (define_constraint "S"
130 "Floating-point constant that can be loaded with a high/lo_sum sequence"
131 (and (match_code "const_double")
132 (match_test "fp_high_losum_p (op)")))
134 ;; Not needed in 64-bit mode
135 (define_constraint "T"
136 "Memory reference whose address is aligned to 8-byte boundary"
137 (and (match_test "TARGET_ARCH32")
138 (match_code "mem,reg")
139 (match_test "memory_ok_for_ldd (op)")))
141 ;; Not needed in 64-bit mode
142 (define_constraint "U"
143 "Pseudo-register or hard even-numbered integer register"
144 (and (match_test "TARGET_ARCH32")
146 (ior (match_test "REGNO (op) < FIRST_PSEUDO_REGISTER")
147 (not (match_test "reload_in_progress && reg_renumber [REGNO (op)] < 0")))
148 (match_test "register_ok_for_ldd (op)")))
150 ;; Equivalent to 'T' but available in 64-bit mode
151 (define_constraint "W"
152 "Memory reference for 'e' constraint floating-point register"
153 (and (match_code "mem,reg")
154 (match_test "memory_ok_for_ldd (op)")))
156 (define_constraint "Y"
157 "The vector zero constant"
158 (and (match_code "const_vector")
159 (match_test "const_zero_operand (op, mode)")))
161 (define_constraint "Z"
162 "The vector all ones constant"
163 (and (match_code "const_vector")
164 (match_test "const_all_ones_operand (op, mode)")))