1 /* If-conversion support.
2 Copyright (C) 2000-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "cfgcleanup.h"
42 #include "tree-pass.h"
44 #include "shrink-wrap.h"
49 #ifndef MAX_CONDITIONAL_EXECUTE
50 #define MAX_CONDITIONAL_EXECUTE \
51 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
55 #define IFCVT_MULTIPLE_DUMPS 1
57 #define NULL_BLOCK ((basic_block) NULL)
59 /* True if after combine pass. */
60 static bool ifcvt_after_combine
;
62 /* True if the target has the cbranchcc4 optab. */
63 static bool have_cbranchcc4
;
65 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
66 static int num_possible_if_blocks
;
68 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
70 static int num_updated_if_blocks
;
72 /* # of changes made. */
73 static int num_true_changes
;
75 /* Whether conditional execution changes were made. */
76 static int cond_exec_changed_p
;
78 /* Forward references. */
79 static int count_bb_insns (const_basic_block
);
80 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
81 static rtx_insn
*first_active_insn (basic_block
);
82 static rtx_insn
*last_active_insn (basic_block
, int);
83 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
84 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
85 static basic_block
block_fallthru (basic_block
);
86 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
88 static rtx
cond_exec_get_condition (rtx_insn
*);
89 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
90 static int noce_operand_ok (const_rtx
);
91 static void merge_if_block (ce_if_block
*);
92 static int find_cond_trap (basic_block
, edge
, edge
);
93 static basic_block
find_if_header (basic_block
, int);
94 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
95 static int noce_find_if_block (basic_block
, edge
, edge
, int);
96 static int cond_exec_find_if_block (ce_if_block
*);
97 static int find_if_case_1 (basic_block
, edge
, edge
);
98 static int find_if_case_2 (basic_block
, edge
, edge
);
99 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
101 static void noce_emit_move_insn (rtx
, rtx
);
102 static rtx_insn
*block_has_only_trap (basic_block
);
104 /* Count the number of non-jump active insns in BB. */
107 count_bb_insns (const_basic_block bb
)
110 rtx_insn
*insn
= BB_HEAD (bb
);
114 if (active_insn_p (insn
) && !JUMP_P (insn
))
117 if (insn
== BB_END (bb
))
119 insn
= NEXT_INSN (insn
);
125 /* Determine whether the total insn_rtx_cost on non-jump insns in
126 basic block BB is less than MAX_COST. This function returns
127 false if the cost of any instruction could not be estimated.
129 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
130 as those insns are being speculated. MAX_COST is scaled with SCALE
131 plus a small fudge factor. */
134 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
137 rtx_insn
*insn
= BB_HEAD (bb
);
138 bool speed
= optimize_bb_for_speed_p (bb
);
140 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
141 applied to insn_rtx_cost when optimizing for size. Only do
142 this after combine because if-conversion might interfere with
143 passes before combine.
145 Use optimize_function_for_speed_p instead of the pre-defined
146 variable speed to make sure it is set to same value for all
147 basic blocks in one if-conversion transformation. */
148 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
149 scale
= REG_BR_PROB_BASE
;
150 /* Our branch probability/scaling factors are just estimates and don't
151 account for cases where we can get speculation for free and other
152 secondary benefits. So we fudge the scale factor to make speculating
153 appear a little more profitable when optimizing for performance. */
155 scale
+= REG_BR_PROB_BASE
/ 8;
162 if (NONJUMP_INSN_P (insn
))
164 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
168 /* If this instruction is the load or set of a "stack" register,
169 such as a floating point register on x87, then the cost of
170 speculatively executing this insn may need to include
171 the additional cost of popping its result off of the
172 register stack. Unfortunately, correctly recognizing and
173 accounting for this additional overhead is tricky, so for
174 now we simply prohibit such speculative execution. */
177 rtx set
= single_set (insn
);
178 if (set
&& STACK_REG_P (SET_DEST (set
)))
184 if (count
>= max_cost
)
187 else if (CALL_P (insn
))
190 if (insn
== BB_END (bb
))
192 insn
= NEXT_INSN (insn
);
198 /* Return the first non-jump active insn in the basic block. */
201 first_active_insn (basic_block bb
)
203 rtx_insn
*insn
= BB_HEAD (bb
);
207 if (insn
== BB_END (bb
))
209 insn
= NEXT_INSN (insn
);
212 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
214 if (insn
== BB_END (bb
))
216 insn
= NEXT_INSN (insn
);
225 /* Return the last non-jump active (non-jump) insn in the basic block. */
228 last_active_insn (basic_block bb
, int skip_use_p
)
230 rtx_insn
*insn
= BB_END (bb
);
231 rtx_insn
*head
= BB_HEAD (bb
);
235 || DEBUG_INSN_P (insn
)
237 && NONJUMP_INSN_P (insn
)
238 && GET_CODE (PATTERN (insn
)) == USE
))
242 insn
= PREV_INSN (insn
);
251 /* Return the active insn before INSN inside basic block CURR_BB. */
254 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
256 if (!insn
|| insn
== BB_HEAD (curr_bb
))
259 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
261 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
264 /* No other active insn all the way to the start of the basic block. */
265 if (insn
== BB_HEAD (curr_bb
))
272 /* Return the active insn after INSN inside basic block CURR_BB. */
275 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
277 if (!insn
|| insn
== BB_END (curr_bb
))
280 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
282 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
285 /* No other active insn all the way to the end of the basic block. */
286 if (insn
== BB_END (curr_bb
))
293 /* Return the basic block reached by falling though the basic block BB. */
296 block_fallthru (basic_block bb
)
298 edge e
= find_fallthru_edge (bb
->succs
);
300 return (e
) ? e
->dest
: NULL_BLOCK
;
303 /* Return true if RTXs A and B can be safely interchanged. */
306 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
308 if (!rtx_equal_p (a
, b
))
311 if (GET_CODE (a
) != MEM
)
314 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
315 reference is not. Interchanging a dead type-unsafe memory reference with
316 a live type-safe one creates a live type-unsafe memory reference, in other
317 words, it makes the program illegal.
318 We check here conservatively whether the two memory references have equal
319 memory attributes. */
321 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
325 /* Go through a bunch of insns, converting them to conditional
326 execution format if possible. Return TRUE if all of the non-note
327 insns were processed. */
330 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
331 /* if block information */rtx_insn
*start
,
332 /* first insn to look at */rtx end
,
333 /* last insn to look at */rtx test
,
334 /* conditional execution test */int prob_val
,
335 /* probability of branch taken. */int mod_ok
)
337 int must_be_last
= FALSE
;
345 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
347 /* dwarf2out can't cope with conditional prologues. */
348 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
351 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
354 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
356 /* dwarf2out can't cope with conditional unwind info. */
357 if (RTX_FRAME_RELATED_P (insn
))
360 /* Remove USE insns that get in the way. */
361 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
363 /* ??? Ug. Actually unlinking the thing is problematic,
364 given what we'd have to coordinate with our callers. */
365 SET_INSN_DELETED (insn
);
369 /* Last insn wasn't last? */
373 if (modified_in_p (test
, insn
))
380 /* Now build the conditional form of the instruction. */
381 pattern
= PATTERN (insn
);
382 xtest
= copy_rtx (test
);
384 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
386 if (GET_CODE (pattern
) == COND_EXEC
)
388 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
391 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
392 COND_EXEC_TEST (pattern
));
393 pattern
= COND_EXEC_CODE (pattern
);
396 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
398 /* If the machine needs to modify the insn being conditionally executed,
399 say for example to force a constant integer operand into a temp
400 register, do so here. */
401 #ifdef IFCVT_MODIFY_INSN
402 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
407 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
409 if (CALL_P (insn
) && prob_val
>= 0)
410 validate_change (insn
, ®_NOTES (insn
),
411 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
412 prob_val
, REG_NOTES (insn
)), 1);
422 /* Return the condition for a jump. Do not do any special processing. */
425 cond_exec_get_condition (rtx_insn
*jump
)
429 if (any_condjump_p (jump
))
430 test_if
= SET_SRC (pc_set (jump
));
433 cond
= XEXP (test_if
, 0);
435 /* If this branches to JUMP_LABEL when the condition is false,
436 reverse the condition. */
437 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
438 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
440 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
444 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
451 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
452 to conditional execution. Return TRUE if we were successful at
453 converting the block. */
456 cond_exec_process_if_block (ce_if_block
* ce_info
,
457 /* if block information */int do_multiple_p
)
459 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
460 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
461 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
462 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
463 rtx_insn
*then_start
; /* first insn in THEN block */
464 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
465 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
466 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
467 int max
; /* max # of insns to convert. */
468 int then_mod_ok
; /* whether conditional mods are ok in THEN */
469 rtx true_expr
; /* test for else block insns */
470 rtx false_expr
; /* test for then block insns */
471 int true_prob_val
; /* probability of else block */
472 int false_prob_val
; /* probability of then block */
473 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
474 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
475 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
476 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
477 int then_n_insns
, else_n_insns
, n_insns
;
478 enum rtx_code false_code
;
481 /* If test is comprised of && or || elements, and we've failed at handling
482 all of them together, just use the last test if it is the special case of
483 && elements without an ELSE block. */
484 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
486 if (else_bb
|| ! ce_info
->and_and_p
)
489 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
490 ce_info
->num_multiple_test_blocks
= 0;
491 ce_info
->num_and_and_blocks
= 0;
492 ce_info
->num_or_or_blocks
= 0;
495 /* Find the conditional jump to the ELSE or JOIN part, and isolate
497 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
501 /* If the conditional jump is more than just a conditional jump,
502 then we can not do conditional execution conversion on this block. */
503 if (! onlyjump_p (BB_END (test_bb
)))
506 /* Collect the bounds of where we're to search, skipping any labels, jumps
507 and notes at the beginning and end of the block. Then count the total
508 number of insns and see if it is small enough to convert. */
509 then_start
= first_active_insn (then_bb
);
510 then_end
= last_active_insn (then_bb
, TRUE
);
511 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
512 n_insns
= then_n_insns
;
513 max
= MAX_CONDITIONAL_EXECUTE
;
520 else_start
= first_active_insn (else_bb
);
521 else_end
= last_active_insn (else_bb
, TRUE
);
522 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
523 n_insns
+= else_n_insns
;
525 /* Look for matching sequences at the head and tail of the two blocks,
526 and limit the range of insns to be converted if possible. */
527 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
528 &then_first_tail
, &else_first_tail
,
530 if (then_first_tail
== BB_HEAD (then_bb
))
531 then_start
= then_end
= NULL
;
532 if (else_first_tail
== BB_HEAD (else_bb
))
533 else_start
= else_end
= NULL
;
538 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
540 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
541 n_insns
-= 2 * n_matching
;
546 && then_n_insns
> n_matching
547 && else_n_insns
> n_matching
)
549 int longest_match
= MIN (then_n_insns
- n_matching
,
550 else_n_insns
- n_matching
);
552 = flow_find_head_matching_sequence (then_bb
, else_bb
,
561 /* We won't pass the insns in the head sequence to
562 cond_exec_process_insns, so we need to test them here
563 to make sure that they don't clobber the condition. */
564 for (insn
= BB_HEAD (then_bb
);
565 insn
!= NEXT_INSN (then_last_head
);
566 insn
= NEXT_INSN (insn
))
567 if (!LABEL_P (insn
) && !NOTE_P (insn
)
568 && !DEBUG_INSN_P (insn
)
569 && modified_in_p (test_expr
, insn
))
573 if (then_last_head
== then_end
)
574 then_start
= then_end
= NULL
;
575 if (else_last_head
== else_end
)
576 else_start
= else_end
= NULL
;
581 then_start
= find_active_insn_after (then_bb
, then_last_head
);
583 else_start
= find_active_insn_after (else_bb
, else_last_head
);
584 n_insns
-= 2 * n_matching
;
592 /* Map test_expr/test_jump into the appropriate MD tests to use on
593 the conditionally executed code. */
595 true_expr
= test_expr
;
597 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
598 if (false_code
!= UNKNOWN
)
599 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
600 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
602 false_expr
= NULL_RTX
;
604 #ifdef IFCVT_MODIFY_TESTS
605 /* If the machine description needs to modify the tests, such as setting a
606 conditional execution register from a comparison, it can do so here. */
607 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
609 /* See if the conversion failed. */
610 if (!true_expr
|| !false_expr
)
614 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
617 true_prob_val
= XINT (note
, 0);
618 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
626 /* If we have && or || tests, do them here. These tests are in the adjacent
627 blocks after the first block containing the test. */
628 if (ce_info
->num_multiple_test_blocks
> 0)
630 basic_block bb
= test_bb
;
631 basic_block last_test_bb
= ce_info
->last_test_bb
;
638 rtx_insn
*start
, *end
;
640 enum rtx_code f_code
;
642 bb
= block_fallthru (bb
);
643 start
= first_active_insn (bb
);
644 end
= last_active_insn (bb
, TRUE
);
646 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
647 false_prob_val
, FALSE
))
650 /* If the conditional jump is more than just a conditional jump, then
651 we can not do conditional execution conversion on this block. */
652 if (! onlyjump_p (BB_END (bb
)))
655 /* Find the conditional jump and isolate the test. */
656 t
= cond_exec_get_condition (BB_END (bb
));
660 f_code
= reversed_comparison_code (t
, BB_END (bb
));
661 if (f_code
== UNKNOWN
)
664 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
665 if (ce_info
->and_and_p
)
667 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
668 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
672 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
673 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
676 /* If the machine description needs to modify the tests, such as
677 setting a conditional execution register from a comparison, it can
679 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
680 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
682 /* See if the conversion failed. */
690 while (bb
!= last_test_bb
);
693 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
694 on then THEN block. */
695 then_mod_ok
= (else_bb
== NULL_BLOCK
);
697 /* Go through the THEN and ELSE blocks converting the insns if possible
698 to conditional execution. */
702 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
703 false_expr
, false_prob_val
,
707 if (else_bb
&& else_end
708 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
709 true_expr
, true_prob_val
, TRUE
))
712 /* If we cannot apply the changes, fail. Do not go through the normal fail
713 processing, since apply_change_group will call cancel_changes. */
714 if (! apply_change_group ())
716 #ifdef IFCVT_MODIFY_CANCEL
717 /* Cancel any machine dependent changes. */
718 IFCVT_MODIFY_CANCEL (ce_info
);
723 #ifdef IFCVT_MODIFY_FINAL
724 /* Do any machine dependent final modifications. */
725 IFCVT_MODIFY_FINAL (ce_info
);
728 /* Conversion succeeded. */
730 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
731 n_insns
, (n_insns
== 1) ? " was" : "s were");
733 /* Merge the blocks! If we had matching sequences, make sure to delete one
734 copy at the appropriate location first: delete the copy in the THEN branch
735 for a tail sequence so that the remaining one is executed last for both
736 branches, and delete the copy in the ELSE branch for a head sequence so
737 that the remaining one is executed first for both branches. */
740 rtx_insn
*from
= then_first_tail
;
742 from
= find_active_insn_after (then_bb
, from
);
743 delete_insn_chain (from
, get_last_bb_insn (then_bb
), false);
746 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
748 merge_if_block (ce_info
);
749 cond_exec_changed_p
= TRUE
;
753 #ifdef IFCVT_MODIFY_CANCEL
754 /* Cancel any machine dependent changes. */
755 IFCVT_MODIFY_CANCEL (ce_info
);
762 /* Used by noce_process_if_block to communicate with its subroutines.
764 The subroutines know that A and B may be evaluated freely. They
765 know that X is a register. They should insert new instructions
766 before cond_earliest. */
770 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
771 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
773 /* The jump that ends TEST_BB. */
776 /* The jump condition. */
779 /* New insns should be inserted before this one. */
780 rtx_insn
*cond_earliest
;
782 /* Insns in the THEN and ELSE block. There is always just this
783 one insns in those blocks. The insns are single_set insns.
784 If there was no ELSE block, INSN_B is the last insn before
785 COND_EARLIEST, or NULL_RTX. In the former case, the insn
786 operands are still valid, as if INSN_B was moved down below
788 rtx_insn
*insn_a
, *insn_b
;
790 /* The SET_SRC of INSN_A and INSN_B. */
793 /* The SET_DEST of INSN_A. */
796 /* The original set destination that the THEN and ELSE basic blocks finally
797 write their result to. */
799 /* True if this if block is not canonical. In the canonical form of
800 if blocks, the THEN_BB is the block reached via the fallthru edge
801 from TEST_BB. For the noce transformations, we allow the symmetric
803 bool then_else_reversed
;
805 /* True if the contents of then_bb and else_bb are a
806 simple single set instruction. */
810 /* The total rtx cost of the instructions in then_bb and else_bb. */
811 unsigned int then_cost
;
812 unsigned int else_cost
;
814 /* Estimated cost of the particular branch instruction. */
815 unsigned int branch_cost
;
817 /* The name of the noce transform that succeeded in if-converting
818 this structure. Used for debugging. */
819 const char *transform_name
;
822 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
823 static int noce_try_move (struct noce_if_info
*);
824 static int noce_try_ifelse_collapse (struct noce_if_info
*);
825 static int noce_try_store_flag (struct noce_if_info
*);
826 static int noce_try_addcc (struct noce_if_info
*);
827 static int noce_try_store_flag_constants (struct noce_if_info
*);
828 static int noce_try_store_flag_mask (struct noce_if_info
*);
829 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
831 static int noce_try_cmove (struct noce_if_info
*);
832 static int noce_try_cmove_arith (struct noce_if_info
*);
833 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
834 static int noce_try_minmax (struct noce_if_info
*);
835 static int noce_try_abs (struct noce_if_info
*);
836 static int noce_try_sign_mask (struct noce_if_info
*);
838 /* Helper function for noce_try_store_flag*. */
841 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
844 rtx cond
= if_info
->cond
;
848 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
849 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
851 /* If earliest == jump, or when the condition is complex, try to
852 build the store_flag insn directly. */
856 rtx set
= pc_set (if_info
->jump
);
857 cond
= XEXP (SET_SRC (set
), 0);
858 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
859 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
860 reversep
= !reversep
;
861 if (if_info
->then_else_reversed
)
862 reversep
= !reversep
;
866 code
= reversed_comparison_code (cond
, if_info
->jump
);
868 code
= GET_CODE (cond
);
870 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
871 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
873 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
875 rtx set
= gen_rtx_SET (x
, src
);
878 rtx_insn
*insn
= emit_insn (set
);
880 if (recog_memoized (insn
) >= 0)
882 rtx_insn
*seq
= get_insns ();
886 if_info
->cond_earliest
= if_info
->jump
;
894 /* Don't even try if the comparison operands or the mode of X are weird. */
895 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
898 return emit_store_flag (x
, code
, XEXP (cond
, 0),
899 XEXP (cond
, 1), VOIDmode
,
900 (code
== LTU
|| code
== LEU
901 || code
== GEU
|| code
== GTU
), normalize
);
904 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
905 X is the destination/target and Y is the value to copy. */
908 noce_emit_move_insn (rtx x
, rtx y
)
910 machine_mode outmode
;
914 if (GET_CODE (x
) != STRICT_LOW_PART
)
916 rtx_insn
*seq
, *insn
;
921 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
922 otherwise construct a suitable SET pattern ourselves. */
923 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
924 ? emit_move_insn (x
, y
)
925 : emit_insn (gen_rtx_SET (x
, y
));
929 if (recog_memoized (insn
) <= 0)
931 if (GET_CODE (x
) == ZERO_EXTRACT
)
933 rtx op
= XEXP (x
, 0);
934 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
935 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
937 /* store_bit_field expects START to be relative to
938 BYTES_BIG_ENDIAN and adjusts this value for machines with
939 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
940 invoke store_bit_field again it is necessary to have the START
941 value from the first call. */
942 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
945 start
= BITS_PER_UNIT
- start
- size
;
948 gcc_assert (REG_P (op
));
949 start
= BITS_PER_WORD
- start
- size
;
953 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
954 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
, false);
958 switch (GET_RTX_CLASS (GET_CODE (y
)))
961 ot
= code_to_optab (GET_CODE (y
));
965 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
966 if (target
!= NULL_RTX
)
969 emit_move_insn (x
, target
);
978 ot
= code_to_optab (GET_CODE (y
));
982 target
= expand_binop (GET_MODE (y
), ot
,
983 XEXP (y
, 0), XEXP (y
, 1),
985 if (target
!= NULL_RTX
)
988 emit_move_insn (x
, target
);
1004 outer
= XEXP (x
, 0);
1005 inner
= XEXP (outer
, 0);
1006 outmode
= GET_MODE (outer
);
1007 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1008 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1009 0, 0, outmode
, y
, false);
1012 /* Return the CC reg if it is used in COND. */
1015 cc_in_cond (rtx cond
)
1017 if (have_cbranchcc4
&& cond
1018 && GET_MODE_CLASS (GET_MODE (XEXP (cond
, 0))) == MODE_CC
)
1019 return XEXP (cond
, 0);
1024 /* Return sequence of instructions generated by if conversion. This
1025 function calls end_sequence() to end the current stream, ensures
1026 that the instructions are unshared, recognizable non-jump insns.
1027 On failure, this function returns a NULL_RTX. */
1030 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1033 rtx_insn
*seq
= get_insns ();
1034 rtx cc
= cc_in_cond (if_info
->cond
);
1036 set_used_flags (if_info
->x
);
1037 set_used_flags (if_info
->cond
);
1038 set_used_flags (if_info
->a
);
1039 set_used_flags (if_info
->b
);
1041 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1042 set_used_flags (insn
);
1044 unshare_all_rtl_in_chain (seq
);
1047 /* Make sure that all of the instructions emitted are recognizable,
1048 and that we haven't introduced a new jump instruction.
1049 As an exercise for the reader, build a general mechanism that
1050 allows proper placement of required clobbers. */
1051 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1053 || recog_memoized (insn
) == -1
1054 /* Make sure new generated code does not clobber CC. */
1055 || (cc
&& set_of (cc
, insn
)))
1061 /* Return true iff the then and else basic block (if it exists)
1062 consist of a single simple set instruction. */
1065 noce_simple_bbs (struct noce_if_info
*if_info
)
1067 if (!if_info
->then_simple
)
1070 if (if_info
->else_bb
)
1071 return if_info
->else_simple
;
1076 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1077 "if (a == b) x = a; else x = b" into "x = b". */
1080 noce_try_move (struct noce_if_info
*if_info
)
1082 rtx cond
= if_info
->cond
;
1083 enum rtx_code code
= GET_CODE (cond
);
1087 if (code
!= NE
&& code
!= EQ
)
1090 if (!noce_simple_bbs (if_info
))
1093 /* This optimization isn't valid if either A or B could be a NaN
1094 or a signed zero. */
1095 if (HONOR_NANS (if_info
->x
)
1096 || HONOR_SIGNED_ZEROS (if_info
->x
))
1099 /* Check whether the operands of the comparison are A and in
1101 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1102 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1103 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1104 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1106 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1109 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1111 /* Avoid generating the move if the source is the destination. */
1112 if (! rtx_equal_p (if_info
->x
, y
))
1115 noce_emit_move_insn (if_info
->x
, y
);
1116 seq
= end_ifcvt_sequence (if_info
);
1120 emit_insn_before_setloc (seq
, if_info
->jump
,
1121 INSN_LOCATION (if_info
->insn_a
));
1123 if_info
->transform_name
= "noce_try_move";
1129 /* Try forming an IF_THEN_ELSE (cond, b, a) and collapsing that
1130 through simplify_rtx. Sometimes that can eliminate the IF_THEN_ELSE.
1131 If that is the case, emit the result into x. */
1134 noce_try_ifelse_collapse (struct noce_if_info
* if_info
)
1136 if (!noce_simple_bbs (if_info
))
1139 machine_mode mode
= GET_MODE (if_info
->x
);
1140 rtx if_then_else
= simplify_gen_ternary (IF_THEN_ELSE
, mode
, mode
,
1141 if_info
->cond
, if_info
->b
,
1144 if (GET_CODE (if_then_else
) == IF_THEN_ELSE
)
1149 noce_emit_move_insn (if_info
->x
, if_then_else
);
1150 seq
= end_ifcvt_sequence (if_info
);
1154 emit_insn_before_setloc (seq
, if_info
->jump
,
1155 INSN_LOCATION (if_info
->insn_a
));
1157 if_info
->transform_name
= "noce_try_ifelse_collapse";
1162 /* Convert "if (test) x = 1; else x = 0".
1164 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1165 tried in noce_try_store_flag_constants after noce_try_cmove has had
1166 a go at the conversion. */
1169 noce_try_store_flag (struct noce_if_info
*if_info
)
1175 if (!noce_simple_bbs (if_info
))
1178 if (CONST_INT_P (if_info
->b
)
1179 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1180 && if_info
->a
== const0_rtx
)
1182 else if (if_info
->b
== const0_rtx
1183 && CONST_INT_P (if_info
->a
)
1184 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1185 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1193 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1196 if (target
!= if_info
->x
)
1197 noce_emit_move_insn (if_info
->x
, target
);
1199 seq
= end_ifcvt_sequence (if_info
);
1203 emit_insn_before_setloc (seq
, if_info
->jump
,
1204 INSN_LOCATION (if_info
->insn_a
));
1205 if_info
->transform_name
= "noce_try_store_flag";
1216 /* Convert "if (test) x = -A; else x = A" into
1217 x = A; if (test) x = -x if the machine can do the
1218 conditional negate form of this cheaply.
1219 Try this before noce_try_cmove that will just load the
1220 immediates into two registers and do a conditional select
1221 between them. If the target has a conditional negate or
1222 conditional invert operation we can save a potentially
1223 expensive constant synthesis. */
1226 noce_try_inverse_constants (struct noce_if_info
*if_info
)
1228 if (!noce_simple_bbs (if_info
))
1231 if (!CONST_INT_P (if_info
->a
)
1232 || !CONST_INT_P (if_info
->b
)
1233 || !REG_P (if_info
->x
))
1236 machine_mode mode
= GET_MODE (if_info
->x
);
1238 HOST_WIDE_INT val_a
= INTVAL (if_info
->a
);
1239 HOST_WIDE_INT val_b
= INTVAL (if_info
->b
);
1241 rtx cond
= if_info
->cond
;
1249 if (val_b
!= HOST_WIDE_INT_MIN
&& val_a
== -val_b
)
1251 else if (val_a
== ~val_b
)
1259 rtx tmp
= gen_reg_rtx (mode
);
1260 noce_emit_move_insn (tmp
, if_info
->a
);
1262 target
= emit_conditional_neg_or_complement (x
, code
, mode
, cond
, tmp
, tmp
);
1266 rtx_insn
*seq
= get_insns ();
1274 if (target
!= if_info
->x
)
1275 noce_emit_move_insn (if_info
->x
, target
);
1277 seq
= end_ifcvt_sequence (if_info
);
1282 emit_insn_before_setloc (seq
, if_info
->jump
,
1283 INSN_LOCATION (if_info
->insn_a
));
1284 if_info
->transform_name
= "noce_try_inverse_constants";
1293 /* Convert "if (test) x = a; else x = b", for A and B constant.
1294 Also allow A = y + c1, B = y + c2, with a common y between A
1298 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1303 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1306 machine_mode mode
= GET_MODE (if_info
->x
);;
1307 rtx common
= NULL_RTX
;
1312 /* Handle cases like x := test ? y + 3 : y + 4. */
1313 if (GET_CODE (a
) == PLUS
1314 && GET_CODE (b
) == PLUS
1315 && CONST_INT_P (XEXP (a
, 1))
1316 && CONST_INT_P (XEXP (b
, 1))
1317 && rtx_equal_p (XEXP (a
, 0), XEXP (b
, 0))
1318 /* Allow expressions that are not using the result or plain
1319 registers where we handle overlap below. */
1320 && (REG_P (XEXP (a
, 0))
1321 || (noce_operand_ok (XEXP (a
, 0))
1322 && ! reg_overlap_mentioned_p (if_info
->x
, XEXP (a
, 0))))
1323 && if_info
->branch_cost
>= 2)
1325 common
= XEXP (a
, 0);
1330 if (!noce_simple_bbs (if_info
))
1336 ifalse
= INTVAL (a
);
1338 bool subtract_flag_p
= false;
1340 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1341 /* Make sure we can represent the difference between the two values. */
1343 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1346 diff
= trunc_int_for_mode (diff
, mode
);
1348 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1352 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1355 /* We could collapse these cases but it is easier to follow the
1356 diff/STORE_FLAG_VALUE combinations when they are listed
1360 => 4 + (test != 0). */
1361 if (diff
< 0 && STORE_FLAG_VALUE
< 0)
1364 => can_reverse | 4 + (test == 0)
1365 !can_reverse | 3 - (test != 0). */
1366 else if (diff
> 0 && STORE_FLAG_VALUE
< 0)
1368 reversep
= can_reverse
;
1369 subtract_flag_p
= !can_reverse
;
1370 /* If we need to subtract the flag and we have PLUS-immediate
1371 A and B then it is unlikely to be beneficial to play tricks
1373 if (subtract_flag_p
&& common
)
1377 => can_reverse | 3 + (test == 0)
1378 !can_reverse | 4 - (test != 0). */
1379 else if (diff
< 0 && STORE_FLAG_VALUE
> 0)
1381 reversep
= can_reverse
;
1382 subtract_flag_p
= !can_reverse
;
1383 /* If we need to subtract the flag and we have PLUS-immediate
1384 A and B then it is unlikely to be beneficial to play tricks
1386 if (subtract_flag_p
&& common
)
1390 => 4 + (test != 0). */
1391 else if (diff
> 0 && STORE_FLAG_VALUE
> 0)
1396 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1397 && (STORE_FLAG_VALUE
== 1
1398 || if_info
->branch_cost
>= 2))
1400 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1401 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1406 else if (itrue
== -1
1407 && (STORE_FLAG_VALUE
== -1
1408 || if_info
->branch_cost
>= 2))
1410 else if (ifalse
== -1 && can_reverse
1411 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1421 std::swap (itrue
, ifalse
);
1422 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1427 /* If we have x := test ? x + 3 : x + 4 then move the original
1428 x out of the way while we store flags. */
1429 if (common
&& rtx_equal_p (common
, if_info
->x
))
1431 common
= gen_reg_rtx (mode
);
1432 noce_emit_move_insn (common
, if_info
->x
);
1435 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1442 /* if (test) x = 3; else x = 4;
1443 => x = 3 + (test == 0); */
1444 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1446 /* Add the common part now. This may allow combine to merge this
1447 with the store flag operation earlier into some sort of conditional
1448 increment/decrement if the target allows it. */
1450 target
= expand_simple_binop (mode
, PLUS
,
1452 target
, 0, OPTAB_WIDEN
);
1454 /* Always use ifalse here. It should have been swapped with itrue
1455 when appropriate when reversep is true. */
1456 target
= expand_simple_binop (mode
, subtract_flag_p
? MINUS
: PLUS
,
1457 gen_int_mode (ifalse
, mode
), target
,
1458 if_info
->x
, 0, OPTAB_WIDEN
);
1460 /* Other cases are not beneficial when the original A and B are PLUS
1467 /* if (test) x = 8; else x = 0;
1468 => x = (test != 0) << 3; */
1469 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1471 target
= expand_simple_binop (mode
, ASHIFT
,
1472 target
, GEN_INT (tmp
), if_info
->x
, 0,
1476 /* if (test) x = -1; else x = b;
1477 => x = -(test != 0) | b; */
1478 else if (itrue
== -1)
1480 target
= expand_simple_binop (mode
, IOR
,
1481 target
, gen_int_mode (ifalse
, mode
),
1482 if_info
->x
, 0, OPTAB_WIDEN
);
1496 if (target
!= if_info
->x
)
1497 noce_emit_move_insn (if_info
->x
, target
);
1499 seq
= end_ifcvt_sequence (if_info
);
1503 emit_insn_before_setloc (seq
, if_info
->jump
,
1504 INSN_LOCATION (if_info
->insn_a
));
1505 if_info
->transform_name
= "noce_try_store_flag_constants";
1513 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1514 similarly for "foo--". */
1517 noce_try_addcc (struct noce_if_info
*if_info
)
1521 int subtract
, normalize
;
1523 if (!noce_simple_bbs (if_info
))
1526 if (GET_CODE (if_info
->a
) == PLUS
1527 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1528 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1531 rtx cond
= if_info
->cond
;
1532 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1534 /* First try to use addcc pattern. */
1535 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1536 && general_operand (XEXP (cond
, 1), VOIDmode
))
1539 target
= emit_conditional_add (if_info
->x
, code
,
1544 XEXP (if_info
->a
, 1),
1545 GET_MODE (if_info
->x
),
1546 (code
== LTU
|| code
== GEU
1547 || code
== LEU
|| code
== GTU
));
1550 if (target
!= if_info
->x
)
1551 noce_emit_move_insn (if_info
->x
, target
);
1553 seq
= end_ifcvt_sequence (if_info
);
1557 emit_insn_before_setloc (seq
, if_info
->jump
,
1558 INSN_LOCATION (if_info
->insn_a
));
1559 if_info
->transform_name
= "noce_try_addcc";
1566 /* If that fails, construct conditional increment or decrement using
1568 if (if_info
->branch_cost
>= 2
1569 && (XEXP (if_info
->a
, 1) == const1_rtx
1570 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1573 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1574 subtract
= 0, normalize
= 0;
1575 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1576 subtract
= 1, normalize
= 0;
1578 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1581 target
= noce_emit_store_flag (if_info
,
1582 gen_reg_rtx (GET_MODE (if_info
->x
)),
1586 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1587 subtract
? MINUS
: PLUS
,
1588 if_info
->b
, target
, if_info
->x
,
1592 if (target
!= if_info
->x
)
1593 noce_emit_move_insn (if_info
->x
, target
);
1595 seq
= end_ifcvt_sequence (if_info
);
1599 emit_insn_before_setloc (seq
, if_info
->jump
,
1600 INSN_LOCATION (if_info
->insn_a
));
1601 if_info
->transform_name
= "noce_try_addcc";
1611 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1614 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1620 if (!noce_simple_bbs (if_info
))
1624 if ((if_info
->branch_cost
>= 2
1625 || STORE_FLAG_VALUE
== -1)
1626 && ((if_info
->a
== const0_rtx
1627 && rtx_equal_p (if_info
->b
, if_info
->x
))
1628 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1631 && if_info
->b
== const0_rtx
1632 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1635 target
= noce_emit_store_flag (if_info
,
1636 gen_reg_rtx (GET_MODE (if_info
->x
)),
1639 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1641 target
, if_info
->x
, 0,
1646 int old_cost
, new_cost
, insn_cost
;
1649 if (target
!= if_info
->x
)
1650 noce_emit_move_insn (if_info
->x
, target
);
1652 seq
= end_ifcvt_sequence (if_info
);
1656 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1657 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1658 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1659 new_cost
= seq_cost (seq
, speed_p
);
1661 if (new_cost
> old_cost
)
1664 emit_insn_before_setloc (seq
, if_info
->jump
,
1665 INSN_LOCATION (if_info
->insn_a
));
1666 if_info
->transform_name
= "noce_try_store_flag_mask";
1677 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1680 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1681 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1683 rtx target ATTRIBUTE_UNUSED
;
1684 int unsignedp ATTRIBUTE_UNUSED
;
1686 /* If earliest == jump, try to build the cmove insn directly.
1687 This is helpful when combine has created some complex condition
1688 (like for alpha's cmovlbs) that we can't hope to regenerate
1689 through the normal interface. */
1691 if (if_info
->cond_earliest
== if_info
->jump
)
1693 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1694 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1695 cond
, vtrue
, vfalse
);
1696 rtx set
= gen_rtx_SET (x
, if_then_else
);
1699 rtx_insn
*insn
= emit_insn (set
);
1701 if (recog_memoized (insn
) >= 0)
1703 rtx_insn
*seq
= get_insns ();
1713 /* Don't even try if the comparison operands are weird
1714 except that the target supports cbranchcc4. */
1715 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1716 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1718 if (!have_cbranchcc4
1719 || GET_MODE_CLASS (GET_MODE (cmp_a
)) != MODE_CC
1720 || cmp_b
!= const0_rtx
)
1724 unsignedp
= (code
== LTU
|| code
== GEU
1725 || code
== LEU
|| code
== GTU
);
1727 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1728 vtrue
, vfalse
, GET_MODE (x
),
1733 /* We might be faced with a situation like:
1736 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1737 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1739 We can't do a conditional move in mode M, but it's possible that we
1740 could do a conditional move in mode N instead and take a subreg of
1743 If we can't create new pseudos, though, don't bother. */
1744 if (reload_completed
)
1747 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1749 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1750 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1751 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1752 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1753 rtx promoted_target
;
1755 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1756 || byte_vtrue
!= byte_vfalse
1757 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1758 != SUBREG_PROMOTED_VAR_P (vfalse
))
1759 || (SUBREG_PROMOTED_GET (vtrue
)
1760 != SUBREG_PROMOTED_GET (vfalse
)))
1763 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1765 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1766 VOIDmode
, reg_vtrue
, reg_vfalse
,
1767 GET_MODE (reg_vtrue
), unsignedp
);
1768 /* Nope, couldn't do it in that mode either. */
1772 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1773 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1774 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1775 emit_move_insn (x
, target
);
1782 /* Try only simple constants and registers here. More complex cases
1783 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1784 has had a go at it. */
1787 noce_try_cmove (struct noce_if_info
*if_info
)
1793 if (!noce_simple_bbs (if_info
))
1796 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1797 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1801 code
= GET_CODE (if_info
->cond
);
1802 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1803 XEXP (if_info
->cond
, 0),
1804 XEXP (if_info
->cond
, 1),
1805 if_info
->a
, if_info
->b
);
1809 if (target
!= if_info
->x
)
1810 noce_emit_move_insn (if_info
->x
, target
);
1812 seq
= end_ifcvt_sequence (if_info
);
1816 emit_insn_before_setloc (seq
, if_info
->jump
,
1817 INSN_LOCATION (if_info
->insn_a
));
1818 if_info
->transform_name
= "noce_try_cmove";
1822 /* If both a and b are constants try a last-ditch transformation:
1823 if (test) x = a; else x = b;
1824 => x = (-(test != 0) & (b - a)) + a;
1825 Try this only if the target-specific expansion above has failed.
1826 The target-specific expander may want to generate sequences that
1827 we don't know about, so give them a chance before trying this
1829 else if (!targetm
.have_conditional_execution ()
1830 && CONST_INT_P (if_info
->a
) && CONST_INT_P (if_info
->b
)
1831 && ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1832 || if_info
->branch_cost
>= 3))
1834 machine_mode mode
= GET_MODE (if_info
->x
);
1835 HOST_WIDE_INT ifalse
= INTVAL (if_info
->a
);
1836 HOST_WIDE_INT itrue
= INTVAL (if_info
->b
);
1837 rtx target
= noce_emit_store_flag (if_info
, if_info
->x
, false, -1);
1844 HOST_WIDE_INT diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1845 /* Make sure we can represent the difference
1846 between the two values. */
1848 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1854 diff
= trunc_int_for_mode (diff
, mode
);
1855 target
= expand_simple_binop (mode
, AND
,
1856 target
, gen_int_mode (diff
, mode
),
1857 if_info
->x
, 0, OPTAB_WIDEN
);
1859 target
= expand_simple_binop (mode
, PLUS
,
1860 target
, gen_int_mode (ifalse
, mode
),
1861 if_info
->x
, 0, OPTAB_WIDEN
);
1864 if (target
!= if_info
->x
)
1865 noce_emit_move_insn (if_info
->x
, target
);
1867 seq
= end_ifcvt_sequence (if_info
);
1871 emit_insn_before_setloc (seq
, if_info
->jump
,
1872 INSN_LOCATION (if_info
->insn_a
));
1873 if_info
->transform_name
= "noce_try_cmove";
1889 /* Return true if X contains a conditional code mode rtx. */
1892 contains_ccmode_rtx_p (rtx x
)
1894 subrtx_iterator::array_type array
;
1895 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
1896 if (GET_MODE_CLASS (GET_MODE (*iter
)) == MODE_CC
)
1902 /* Helper for bb_valid_for_noce_process_p. Validate that
1903 the rtx insn INSN is a single set that does not set
1904 the conditional register CC and is in general valid for
1908 insn_valid_noce_process_p (rtx_insn
*insn
, rtx cc
)
1911 || !NONJUMP_INSN_P (insn
)
1912 || (cc
&& set_of (cc
, insn
)))
1915 rtx sset
= single_set (insn
);
1917 /* Currently support only simple single sets in test_bb. */
1919 || !noce_operand_ok (SET_DEST (sset
))
1920 || contains_ccmode_rtx_p (SET_DEST (sset
))
1921 || !noce_operand_ok (SET_SRC (sset
)))
1928 /* Return true iff the registers that the insns in BB_A set do not get
1929 used in BB_B. If TO_RENAME is non-NULL then it is a location that will be
1930 renamed later by the caller and so conflicts on it should be ignored
1931 in this function. */
1934 bbs_ok_for_cmove_arith (basic_block bb_a
, basic_block bb_b
, rtx to_rename
)
1937 bitmap bba_sets
= BITMAP_ALLOC (®_obstack
);
1942 FOR_BB_INSNS (bb_a
, a_insn
)
1944 if (!active_insn_p (a_insn
))
1947 rtx sset_a
= single_set (a_insn
);
1951 BITMAP_FREE (bba_sets
);
1954 /* Record all registers that BB_A sets. */
1955 FOR_EACH_INSN_DEF (def
, a_insn
)
1956 if (!(to_rename
&& DF_REF_REG (def
) == to_rename
))
1957 bitmap_set_bit (bba_sets
, DF_REF_REGNO (def
));
1962 FOR_BB_INSNS (bb_b
, b_insn
)
1964 if (!active_insn_p (b_insn
))
1967 rtx sset_b
= single_set (b_insn
);
1971 BITMAP_FREE (bba_sets
);
1975 /* Make sure this is a REG and not some instance
1976 of ZERO_EXTRACT or SUBREG or other dangerous stuff.
1977 If we have a memory destination then we have a pair of simple
1978 basic blocks performing an operation of the form [addr] = c ? a : b.
1979 bb_valid_for_noce_process_p will have ensured that these are
1980 the only stores present. In that case [addr] should be the location
1981 to be renamed. Assert that the callers set this up properly. */
1982 if (MEM_P (SET_DEST (sset_b
)))
1983 gcc_assert (rtx_equal_p (SET_DEST (sset_b
), to_rename
));
1984 else if (!REG_P (SET_DEST (sset_b
)))
1986 BITMAP_FREE (bba_sets
);
1990 /* If the insn uses a reg set in BB_A return false. */
1991 FOR_EACH_INSN_USE (use
, b_insn
)
1993 if (bitmap_bit_p (bba_sets
, DF_REF_REGNO (use
)))
1995 BITMAP_FREE (bba_sets
);
2002 BITMAP_FREE (bba_sets
);
2006 /* Emit copies of all the active instructions in BB except the last.
2007 This is a helper for noce_try_cmove_arith. */
2010 noce_emit_all_but_last (basic_block bb
)
2012 rtx_insn
*last
= last_active_insn (bb
, FALSE
);
2014 FOR_BB_INSNS (bb
, insn
)
2016 if (insn
!= last
&& active_insn_p (insn
))
2018 rtx_insn
*to_emit
= as_a
<rtx_insn
*> (copy_rtx (insn
));
2020 emit_insn (PATTERN (to_emit
));
2025 /* Helper for noce_try_cmove_arith. Emit the pattern TO_EMIT and return
2026 the resulting insn or NULL if it's not a valid insn. */
2029 noce_emit_insn (rtx to_emit
)
2031 gcc_assert (to_emit
);
2032 rtx_insn
*insn
= emit_insn (to_emit
);
2034 if (recog_memoized (insn
) < 0)
2040 /* Helper for noce_try_cmove_arith. Emit a copy of the insns up to
2041 and including the penultimate one in BB if it is not simple
2042 (as indicated by SIMPLE). Then emit LAST_INSN as the last
2043 insn in the block. The reason for that is that LAST_INSN may
2044 have been modified by the preparation in noce_try_cmove_arith. */
2047 noce_emit_bb (rtx last_insn
, basic_block bb
, bool simple
)
2050 noce_emit_all_but_last (bb
);
2052 if (last_insn
&& !noce_emit_insn (last_insn
))
2058 /* Try more complex cases involving conditional_move. */
2061 noce_try_cmove_arith (struct noce_if_info
*if_info
)
2067 rtx_insn
*insn_a
, *insn_b
;
2068 bool a_simple
= if_info
->then_simple
;
2069 bool b_simple
= if_info
->else_simple
;
2070 basic_block then_bb
= if_info
->then_bb
;
2071 basic_block else_bb
= if_info
->else_bb
;
2075 rtx_insn
*ifcvt_seq
;
2077 /* A conditional move from two memory sources is equivalent to a
2078 conditional on their addresses followed by a load. Don't do this
2079 early because it'll screw alias analysis. Note that we've
2080 already checked for no side effects. */
2081 /* ??? FIXME: Magic number 5. */
2082 if (cse_not_expected
2083 && MEM_P (a
) && MEM_P (b
)
2084 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
2085 && if_info
->branch_cost
>= 5)
2087 machine_mode address_mode
= get_address_mode (a
);
2091 x
= gen_reg_rtx (address_mode
);
2095 /* ??? We could handle this if we knew that a load from A or B could
2096 not trap or fault. This is also true if we've already loaded
2097 from the address along the path from ENTRY. */
2098 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
2101 /* if (test) x = a + b; else x = c - d;
2108 code
= GET_CODE (if_info
->cond
);
2109 insn_a
= if_info
->insn_a
;
2110 insn_b
= if_info
->insn_b
;
2112 machine_mode x_mode
= GET_MODE (x
);
2114 if (!can_conditionally_move_p (x_mode
))
2117 unsigned int then_cost
;
2118 unsigned int else_cost
;
2120 then_cost
= if_info
->then_cost
;
2125 else_cost
= if_info
->else_cost
;
2129 /* We're going to execute one of the basic blocks anyway, so
2130 bail out if the most expensive of the two blocks is unacceptable. */
2131 if (MAX (then_cost
, else_cost
) > COSTS_N_INSNS (if_info
->branch_cost
))
2134 /* Possibly rearrange operands to make things come out more natural. */
2135 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
2138 if (rtx_equal_p (b
, x
))
2140 else if (general_operand (b
, GET_MODE (b
)))
2145 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
2147 std::swap (insn_a
, insn_b
);
2148 std::swap (a_simple
, b_simple
);
2149 std::swap (then_bb
, else_bb
);
2153 if (then_bb
&& else_bb
2154 && (!bbs_ok_for_cmove_arith (then_bb
, else_bb
, if_info
->orig_x
)
2155 || !bbs_ok_for_cmove_arith (else_bb
, then_bb
, if_info
->orig_x
)))
2160 /* If one of the blocks is empty then the corresponding B or A value
2161 came from the test block. The non-empty complex block that we will
2162 emit might clobber the register used by B or A, so move it to a pseudo
2165 rtx tmp_a
= NULL_RTX
;
2166 rtx tmp_b
= NULL_RTX
;
2168 if (b_simple
|| !else_bb
)
2169 tmp_b
= gen_reg_rtx (x_mode
);
2171 if (a_simple
|| !then_bb
)
2172 tmp_a
= gen_reg_rtx (x_mode
);
2177 rtx emit_a
= NULL_RTX
;
2178 rtx emit_b
= NULL_RTX
;
2179 rtx_insn
*tmp_insn
= NULL
;
2180 bool modified_in_a
= false;
2181 bool modified_in_b
= false;
2182 /* If either operand is complex, load it into a register first.
2183 The best way to do this is to copy the original insn. In this
2184 way we preserve any clobbers etc that the insn may have had.
2185 This is of course not possible in the IS_MEM case. */
2187 if (! general_operand (a
, GET_MODE (a
)) || tmp_a
)
2192 rtx reg
= gen_reg_rtx (GET_MODE (a
));
2193 emit_a
= gen_rtx_SET (reg
, a
);
2199 a
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2201 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
2202 rtx set
= single_set (copy_of_a
);
2205 emit_a
= PATTERN (copy_of_a
);
2209 rtx tmp_reg
= tmp_a
? tmp_a
: gen_reg_rtx (GET_MODE (a
));
2210 emit_a
= gen_rtx_SET (tmp_reg
, a
);
2216 if (! general_operand (b
, GET_MODE (b
)) || tmp_b
)
2220 rtx reg
= gen_reg_rtx (GET_MODE (b
));
2221 emit_b
= gen_rtx_SET (reg
, b
);
2227 b
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2228 rtx_insn
*copy_of_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
2229 rtx set
= single_set (copy_of_b
);
2232 emit_b
= PATTERN (copy_of_b
);
2236 rtx tmp_reg
= tmp_b
? tmp_b
: gen_reg_rtx (GET_MODE (b
));
2237 emit_b
= gen_rtx_SET (tmp_reg
, b
);
2243 modified_in_a
= emit_a
!= NULL_RTX
&& modified_in_p (orig_b
, emit_a
);
2244 if (tmp_b
&& then_bb
)
2246 FOR_BB_INSNS (then_bb
, tmp_insn
)
2247 /* Don't check inside insn_a. We will have changed it to emit_a
2248 with a destination that doesn't conflict. */
2249 if (!(insn_a
&& tmp_insn
== insn_a
)
2250 && modified_in_p (orig_b
, tmp_insn
))
2252 modified_in_a
= true;
2258 modified_in_b
= emit_b
!= NULL_RTX
&& modified_in_p (orig_a
, emit_b
);
2259 if (tmp_a
&& else_bb
)
2261 FOR_BB_INSNS (else_bb
, tmp_insn
)
2262 /* Don't check inside insn_b. We will have changed it to emit_b
2263 with a destination that doesn't conflict. */
2264 if (!(insn_b
&& tmp_insn
== insn_b
)
2265 && modified_in_p (orig_a
, tmp_insn
))
2267 modified_in_b
= true;
2272 /* If insn to set up A clobbers any registers B depends on, try to
2273 swap insn that sets up A with the one that sets up B. If even
2274 that doesn't help, punt. */
2275 if (modified_in_a
&& !modified_in_b
)
2277 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2278 goto end_seq_and_fail
;
2280 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2281 goto end_seq_and_fail
;
2283 else if (!modified_in_a
)
2285 if (!noce_emit_bb (emit_a
, then_bb
, a_simple
))
2286 goto end_seq_and_fail
;
2288 if (!noce_emit_bb (emit_b
, else_bb
, b_simple
))
2289 goto end_seq_and_fail
;
2292 goto end_seq_and_fail
;
2294 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
2295 XEXP (if_info
->cond
, 1), a
, b
);
2298 goto end_seq_and_fail
;
2300 /* If we're handling a memory for above, emit the load now. */
2303 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
2305 /* Copy over flags as appropriate. */
2306 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
2307 MEM_VOLATILE_P (mem
) = 1;
2308 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
2309 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
2311 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
2313 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
2314 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
2316 noce_emit_move_insn (if_info
->x
, mem
);
2318 else if (target
!= x
)
2319 noce_emit_move_insn (x
, target
);
2321 ifcvt_seq
= end_ifcvt_sequence (if_info
);
2325 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
2326 INSN_LOCATION (if_info
->insn_a
));
2327 if_info
->transform_name
= "noce_try_cmove_arith";
2335 /* For most cases, the simplified condition we found is the best
2336 choice, but this is not the case for the min/max/abs transforms.
2337 For these we wish to know that it is A or B in the condition. */
2340 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
2341 rtx_insn
**earliest
)
2347 /* If target is already mentioned in the known condition, return it. */
2348 if (reg_mentioned_p (target
, if_info
->cond
))
2350 *earliest
= if_info
->cond_earliest
;
2351 return if_info
->cond
;
2354 set
= pc_set (if_info
->jump
);
2355 cond
= XEXP (SET_SRC (set
), 0);
2357 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2358 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
2359 if (if_info
->then_else_reversed
)
2362 /* If we're looking for a constant, try to make the conditional
2363 have that constant in it. There are two reasons why it may
2364 not have the constant we want:
2366 1. GCC may have needed to put the constant in a register, because
2367 the target can't compare directly against that constant. For
2368 this case, we look for a SET immediately before the comparison
2369 that puts a constant in that register.
2371 2. GCC may have canonicalized the conditional, for example
2372 replacing "if x < 4" with "if x <= 3". We can undo that (or
2373 make equivalent types of changes) to get the constants we need
2374 if they're off by one in the right direction. */
2376 if (CONST_INT_P (target
))
2378 enum rtx_code code
= GET_CODE (if_info
->cond
);
2379 rtx op_a
= XEXP (if_info
->cond
, 0);
2380 rtx op_b
= XEXP (if_info
->cond
, 1);
2381 rtx_insn
*prev_insn
;
2383 /* First, look to see if we put a constant in a register. */
2384 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
2386 && BLOCK_FOR_INSN (prev_insn
)
2387 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
2388 && INSN_P (prev_insn
)
2389 && GET_CODE (PATTERN (prev_insn
)) == SET
)
2391 rtx src
= find_reg_equal_equiv_note (prev_insn
);
2393 src
= SET_SRC (PATTERN (prev_insn
));
2394 if (CONST_INT_P (src
))
2396 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
2398 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
2401 if (CONST_INT_P (op_a
))
2403 std::swap (op_a
, op_b
);
2404 code
= swap_condition (code
);
2409 /* Now, look to see if we can get the right constant by
2410 adjusting the conditional. */
2411 if (CONST_INT_P (op_b
))
2413 HOST_WIDE_INT desired_val
= INTVAL (target
);
2414 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
2419 if (desired_val
!= HOST_WIDE_INT_MAX
2420 && actual_val
== desired_val
+ 1)
2423 op_b
= GEN_INT (desired_val
);
2427 if (desired_val
!= HOST_WIDE_INT_MIN
2428 && actual_val
== desired_val
- 1)
2431 op_b
= GEN_INT (desired_val
);
2435 if (desired_val
!= HOST_WIDE_INT_MIN
2436 && actual_val
== desired_val
- 1)
2439 op_b
= GEN_INT (desired_val
);
2443 if (desired_val
!= HOST_WIDE_INT_MAX
2444 && actual_val
== desired_val
+ 1)
2447 op_b
= GEN_INT (desired_val
);
2455 /* If we made any changes, generate a new conditional that is
2456 equivalent to what we started with, but has the right
2458 if (code
!= GET_CODE (if_info
->cond
)
2459 || op_a
!= XEXP (if_info
->cond
, 0)
2460 || op_b
!= XEXP (if_info
->cond
, 1))
2462 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
2463 *earliest
= if_info
->cond_earliest
;
2468 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
2469 earliest
, target
, have_cbranchcc4
, true);
2470 if (! cond
|| ! reg_mentioned_p (target
, cond
))
2473 /* We almost certainly searched back to a different place.
2474 Need to re-verify correct lifetimes. */
2476 /* X may not be mentioned in the range (cond_earliest, jump]. */
2477 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
2478 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
2481 /* A and B may not be modified in the range [cond_earliest, jump). */
2482 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
2484 && (modified_in_p (if_info
->a
, insn
)
2485 || modified_in_p (if_info
->b
, insn
)))
2491 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
2494 noce_try_minmax (struct noce_if_info
*if_info
)
2497 rtx_insn
*earliest
, *seq
;
2498 enum rtx_code code
, op
;
2501 if (!noce_simple_bbs (if_info
))
2504 /* ??? Reject modes with NaNs or signed zeros since we don't know how
2505 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
2506 to get the target to tell us... */
2507 if (HONOR_SIGNED_ZEROS (if_info
->x
)
2508 || HONOR_NANS (if_info
->x
))
2511 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
2515 /* Verify the condition is of the form we expect, and canonicalize
2516 the comparison code. */
2517 code
= GET_CODE (cond
);
2518 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
2520 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
2523 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
2525 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
2527 code
= swap_condition (code
);
2532 /* Determine what sort of operation this is. Note that the code is for
2533 a taken branch, so the code->operation mapping appears backwards. */
2566 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2567 if_info
->a
, if_info
->b
,
2568 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2574 if (target
!= if_info
->x
)
2575 noce_emit_move_insn (if_info
->x
, target
);
2577 seq
= end_ifcvt_sequence (if_info
);
2581 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2582 if_info
->cond
= cond
;
2583 if_info
->cond_earliest
= earliest
;
2584 if_info
->transform_name
= "noce_try_minmax";
2589 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2590 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2594 noce_try_abs (struct noce_if_info
*if_info
)
2596 rtx cond
, target
, a
, b
, c
;
2597 rtx_insn
*earliest
, *seq
;
2599 bool one_cmpl
= false;
2601 if (!noce_simple_bbs (if_info
))
2604 /* Reject modes with signed zeros. */
2605 if (HONOR_SIGNED_ZEROS (if_info
->x
))
2608 /* Recognize A and B as constituting an ABS or NABS. The canonical
2609 form is a branch around the negation, taken when the object is the
2610 first operand of a comparison against 0 that evaluates to true. */
2613 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2615 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2620 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2625 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2634 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2638 /* Verify the condition is of the form we expect. */
2639 if (rtx_equal_p (XEXP (cond
, 0), b
))
2641 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2649 /* Verify that C is zero. Search one step backward for a
2650 REG_EQUAL note or a simple source if necessary. */
2654 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2656 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2657 && (set
= single_set (insn
))
2658 && rtx_equal_p (SET_DEST (set
), c
))
2660 rtx note
= find_reg_equal_equiv_note (insn
);
2670 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2671 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2672 c
= get_pool_constant (XEXP (c
, 0));
2674 /* Work around funny ideas get_condition has wrt canonicalization.
2675 Note that these rtx constants are known to be CONST_INT, and
2676 therefore imply integer comparisons.
2677 The one_cmpl case is more complicated, as we want to handle
2678 only x < 0 ? ~x : x or x >= 0 ? x : ~x to one_cmpl_abs (x)
2679 and x < 0 ? x : ~x or x >= 0 ? ~x : x to ~one_cmpl_abs (x),
2680 but not other cases (x > -1 is equivalent of x >= 0). */
2681 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2683 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2688 else if (c
== CONST0_RTX (GET_MODE (b
)))
2691 && GET_CODE (cond
) != GE
2692 && GET_CODE (cond
) != LT
)
2698 /* Determine what sort of operation this is. */
2699 switch (GET_CODE (cond
))
2718 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2721 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2723 /* ??? It's a quandary whether cmove would be better here, especially
2724 for integers. Perhaps combine will clean things up. */
2725 if (target
&& negate
)
2728 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2731 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2741 if (target
!= if_info
->x
)
2742 noce_emit_move_insn (if_info
->x
, target
);
2744 seq
= end_ifcvt_sequence (if_info
);
2748 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2749 if_info
->cond
= cond
;
2750 if_info
->cond_earliest
= earliest
;
2751 if_info
->transform_name
= "noce_try_abs";
2756 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2759 noce_try_sign_mask (struct noce_if_info
*if_info
)
2765 bool t_unconditional
;
2767 if (!noce_simple_bbs (if_info
))
2770 cond
= if_info
->cond
;
2771 code
= GET_CODE (cond
);
2776 if (if_info
->a
== const0_rtx
)
2778 if ((code
== LT
&& c
== const0_rtx
)
2779 || (code
== LE
&& c
== constm1_rtx
))
2782 else if (if_info
->b
== const0_rtx
)
2784 if ((code
== GE
&& c
== const0_rtx
)
2785 || (code
== GT
&& c
== constm1_rtx
))
2789 if (! t
|| side_effects_p (t
))
2792 /* We currently don't handle different modes. */
2793 mode
= GET_MODE (t
);
2794 if (GET_MODE (m
) != mode
)
2797 /* This is only profitable if T is unconditionally executed/evaluated in the
2798 original insn sequence or T is cheap. The former happens if B is the
2799 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2800 INSN_B which can happen for e.g. conditional stores to memory. For the
2801 cost computation use the block TEST_BB where the evaluation will end up
2802 after the transformation. */
2805 && (if_info
->insn_b
== NULL_RTX
2806 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2807 if (!(t_unconditional
2808 || (set_src_cost (t
, mode
, optimize_bb_for_speed_p (if_info
->test_bb
))
2809 < COSTS_N_INSNS (2))))
2813 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2814 "(signed) m >> 31" directly. This benefits targets with specialized
2815 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2816 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2817 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2826 noce_emit_move_insn (if_info
->x
, t
);
2828 seq
= end_ifcvt_sequence (if_info
);
2832 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2833 if_info
->transform_name
= "noce_try_sign_mask";
2839 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2843 noce_try_bitop (struct noce_if_info
*if_info
)
2845 rtx cond
, x
, a
, result
;
2852 cond
= if_info
->cond
;
2853 code
= GET_CODE (cond
);
2855 if (!noce_simple_bbs (if_info
))
2858 /* Check for no else condition. */
2859 if (! rtx_equal_p (x
, if_info
->b
))
2862 /* Check for a suitable condition. */
2863 if (code
!= NE
&& code
!= EQ
)
2865 if (XEXP (cond
, 1) != const0_rtx
)
2867 cond
= XEXP (cond
, 0);
2869 /* ??? We could also handle AND here. */
2870 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2872 if (XEXP (cond
, 1) != const1_rtx
2873 || !CONST_INT_P (XEXP (cond
, 2))
2874 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2876 bitnum
= INTVAL (XEXP (cond
, 2));
2877 mode
= GET_MODE (x
);
2878 if (BITS_BIG_ENDIAN
)
2879 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2880 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2887 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2889 /* Check for "if (X & C) x = x op C". */
2890 if (! rtx_equal_p (x
, XEXP (a
, 0))
2891 || !CONST_INT_P (XEXP (a
, 1))
2892 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2893 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2896 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2897 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2898 if (GET_CODE (a
) == IOR
)
2899 result
= (code
== NE
) ? a
: NULL_RTX
;
2900 else if (code
== NE
)
2902 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2903 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2904 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2908 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2909 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2910 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2913 else if (GET_CODE (a
) == AND
)
2915 /* Check for "if (X & C) x &= ~C". */
2916 if (! rtx_equal_p (x
, XEXP (a
, 0))
2917 || !CONST_INT_P (XEXP (a
, 1))
2918 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2919 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2922 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2923 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2924 result
= (code
== EQ
) ? a
: NULL_RTX
;
2932 noce_emit_move_insn (x
, result
);
2933 seq
= end_ifcvt_sequence (if_info
);
2937 emit_insn_before_setloc (seq
, if_info
->jump
,
2938 INSN_LOCATION (if_info
->insn_a
));
2940 if_info
->transform_name
= "noce_try_bitop";
2945 /* Similar to get_condition, only the resulting condition must be
2946 valid at JUMP, instead of at EARLIEST.
2948 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2949 THEN block of the caller, and we have to reverse the condition. */
2952 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2957 if (! any_condjump_p (jump
))
2960 set
= pc_set (jump
);
2962 /* If this branches to JUMP_LABEL when the condition is false,
2963 reverse the condition. */
2964 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2965 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2967 /* We may have to reverse because the caller's if block is not canonical,
2968 i.e. the THEN block isn't the fallthrough block for the TEST block
2969 (see find_if_header). */
2970 if (then_else_reversed
)
2973 /* If the condition variable is a register and is MODE_INT, accept it. */
2975 cond
= XEXP (SET_SRC (set
), 0);
2976 tmp
= XEXP (cond
, 0);
2977 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2978 && (GET_MODE (tmp
) != BImode
2979 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2984 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2985 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2989 /* Otherwise, fall back on canonicalize_condition to do the dirty
2990 work of manipulating MODE_CC values and COMPARE rtx codes. */
2991 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2992 NULL_RTX
, have_cbranchcc4
, true);
2994 /* We don't handle side-effects in the condition, like handling
2995 REG_INC notes and making sure no duplicate conditions are emitted. */
2996 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
3002 /* Return true if OP is ok for if-then-else processing. */
3005 noce_operand_ok (const_rtx op
)
3007 if (side_effects_p (op
))
3010 /* We special-case memories, so handle any of them with
3011 no address side effects. */
3013 return ! side_effects_p (XEXP (op
, 0));
3015 return ! may_trap_p (op
);
3018 /* Return true if X contains a MEM subrtx. */
3021 contains_mem_rtx_p (rtx x
)
3023 subrtx_iterator::array_type array
;
3024 FOR_EACH_SUBRTX (iter
, array
, x
, ALL
)
3031 /* Return true iff basic block TEST_BB is valid for noce if-conversion.
3032 The condition used in this if-conversion is in COND.
3033 In practice, check that TEST_BB ends with a single set
3034 x := a and all previous computations
3035 in TEST_BB don't produce any values that are live after TEST_BB.
3036 In other words, all the insns in TEST_BB are there only
3037 to compute a value for x. Put the rtx cost of the insns
3038 in TEST_BB into COST. Record whether TEST_BB is a single simple
3039 set instruction in SIMPLE_P. */
3042 bb_valid_for_noce_process_p (basic_block test_bb
, rtx cond
,
3043 unsigned int *cost
, bool *simple_p
)
3048 rtx_insn
*last_insn
= last_active_insn (test_bb
, FALSE
);
3049 rtx last_set
= NULL_RTX
;
3051 rtx cc
= cc_in_cond (cond
);
3053 if (!insn_valid_noce_process_p (last_insn
, cc
))
3055 last_set
= single_set (last_insn
);
3057 rtx x
= SET_DEST (last_set
);
3058 rtx_insn
*first_insn
= first_active_insn (test_bb
);
3059 rtx first_set
= single_set (first_insn
);
3064 /* We have a single simple set, that's okay. */
3065 bool speed_p
= optimize_bb_for_speed_p (test_bb
);
3067 if (first_insn
== last_insn
)
3069 *simple_p
= noce_operand_ok (SET_DEST (first_set
));
3070 *cost
= insn_rtx_cost (first_set
, speed_p
);
3074 rtx_insn
*prev_last_insn
= PREV_INSN (last_insn
);
3075 gcc_assert (prev_last_insn
);
3077 /* For now, disallow setting x multiple times in test_bb. */
3078 if (REG_P (x
) && reg_set_between_p (x
, first_insn
, prev_last_insn
))
3081 bitmap test_bb_temps
= BITMAP_ALLOC (®_obstack
);
3083 /* The regs that are live out of test_bb. */
3084 bitmap test_bb_live_out
= df_get_live_out (test_bb
);
3086 int potential_cost
= insn_rtx_cost (last_set
, speed_p
);
3088 FOR_BB_INSNS (test_bb
, insn
)
3090 if (insn
!= last_insn
)
3092 if (!active_insn_p (insn
))
3095 if (!insn_valid_noce_process_p (insn
, cc
))
3096 goto free_bitmap_and_fail
;
3098 rtx sset
= single_set (insn
);
3101 if (contains_mem_rtx_p (SET_SRC (sset
))
3102 || !REG_P (SET_DEST (sset
))
3103 || reg_overlap_mentioned_p (SET_DEST (sset
), cond
))
3104 goto free_bitmap_and_fail
;
3106 potential_cost
+= insn_rtx_cost (sset
, speed_p
);
3107 bitmap_set_bit (test_bb_temps
, REGNO (SET_DEST (sset
)));
3111 /* If any of the intermediate results in test_bb are live after test_bb
3113 if (bitmap_intersect_p (test_bb_live_out
, test_bb_temps
))
3114 goto free_bitmap_and_fail
;
3116 BITMAP_FREE (test_bb_temps
);
3117 *cost
= potential_cost
;
3121 free_bitmap_and_fail
:
3122 BITMAP_FREE (test_bb_temps
);
3126 /* We have something like:
3129 { i = a; j = b; k = c; }
3133 tmp_i = (x > y) ? a : i;
3134 tmp_j = (x > y) ? b : j;
3135 tmp_k = (x > y) ? c : k;
3140 Subsequent passes are expected to clean up the extra moves.
3142 Look for special cases such as writes to one register which are
3143 read back in another SET, as might occur in a swap idiom or
3152 Which we want to rewrite to:
3154 tmp_i = (x > y) ? a : i;
3155 tmp_j = (x > y) ? tmp_i : j;
3159 We can catch these when looking at (SET x y) by keeping a list of the
3160 registers we would have targeted before if-conversion and looking back
3161 through it for an overlap with Y. If we find one, we rewire the
3162 conditional set to use the temporary we introduced earlier.
3164 IF_INFO contains the useful information about the block structure and
3165 jump instructions. */
3168 noce_convert_multiple_sets (struct noce_if_info
*if_info
)
3170 basic_block test_bb
= if_info
->test_bb
;
3171 basic_block then_bb
= if_info
->then_bb
;
3172 basic_block join_bb
= if_info
->join_bb
;
3173 rtx_insn
*jump
= if_info
->jump
;
3174 rtx_insn
*cond_earliest
;
3179 /* Decompose the condition attached to the jump. */
3180 rtx cond
= noce_get_condition (jump
, &cond_earliest
, false);
3181 rtx x
= XEXP (cond
, 0);
3182 rtx y
= XEXP (cond
, 1);
3183 rtx_code cond_code
= GET_CODE (cond
);
3185 /* The true targets for a conditional move. */
3186 auto_vec
<rtx
> targets
;
3187 /* The temporaries introduced to allow us to not consider register
3189 auto_vec
<rtx
> temporaries
;
3190 /* The insns we've emitted. */
3191 auto_vec
<rtx_insn
*> unmodified_insns
;
3194 FOR_BB_INSNS (then_bb
, insn
)
3196 /* Skip over non-insns. */
3197 if (!active_insn_p (insn
))
3200 rtx set
= single_set (insn
);
3201 gcc_checking_assert (set
);
3203 rtx target
= SET_DEST (set
);
3204 rtx temp
= gen_reg_rtx (GET_MODE (target
));
3205 rtx new_val
= SET_SRC (set
);
3206 rtx old_val
= target
;
3208 /* If we were supposed to read from an earlier write in this block,
3209 we've changed the register allocation. Rewire the read. While
3210 we are looking, also try to catch a swap idiom. */
3211 for (int i
= count
- 1; i
>= 0; --i
)
3212 if (reg_overlap_mentioned_p (new_val
, targets
[i
]))
3214 /* Catch a "swap" style idiom. */
3215 if (find_reg_note (insn
, REG_DEAD
, new_val
) != NULL_RTX
)
3216 /* The write to targets[i] is only live until the read
3217 here. As the condition codes match, we can propagate
3219 new_val
= SET_SRC (single_set (unmodified_insns
[i
]));
3221 new_val
= temporaries
[i
];
3225 /* If we had a non-canonical conditional jump (i.e. one where
3226 the fallthrough is to the "else" case) we need to reverse
3227 the conditional select. */
3228 if (if_info
->then_else_reversed
)
3229 std::swap (old_val
, new_val
);
3232 /* We allow simple lowpart register subreg SET sources in
3233 bb_ok_for_noce_convert_multiple_sets. Be careful when processing
3235 (set (reg:SI r1) (reg:SI r2))
3236 (set (reg:HI r3) (subreg:HI (r1)))
3237 For the second insn new_val or old_val (r1 in this example) will be
3238 taken from the temporaries and have the wider mode which will not
3239 match with the mode of the other source of the conditional move, so
3240 we'll end up trying to emit r4:HI = cond ? (r1:SI) : (r3:HI).
3241 Wrap the two cmove operands into subregs if appropriate to prevent
3243 if (GET_MODE (new_val
) != GET_MODE (temp
))
3245 machine_mode src_mode
= GET_MODE (new_val
);
3246 machine_mode dst_mode
= GET_MODE (temp
);
3247 if (GET_MODE_SIZE (src_mode
) <= GET_MODE_SIZE (dst_mode
))
3252 new_val
= lowpart_subreg (dst_mode
, new_val
, src_mode
);
3254 if (GET_MODE (old_val
) != GET_MODE (temp
))
3256 machine_mode src_mode
= GET_MODE (old_val
);
3257 machine_mode dst_mode
= GET_MODE (temp
);
3258 if (GET_MODE_SIZE (src_mode
) <= GET_MODE_SIZE (dst_mode
))
3263 old_val
= lowpart_subreg (dst_mode
, old_val
, src_mode
);
3266 /* Actually emit the conditional move. */
3267 rtx temp_dest
= noce_emit_cmove (if_info
, temp
, cond_code
,
3268 x
, y
, new_val
, old_val
);
3270 /* If we failed to expand the conditional move, drop out and don't
3272 if (temp_dest
== NULL_RTX
)
3280 targets
.safe_push (target
);
3281 temporaries
.safe_push (temp_dest
);
3282 unmodified_insns
.safe_push (insn
);
3285 /* We must have seen some sort of insn to insert, otherwise we were
3286 given an empty BB to convert, and we can't handle that. */
3287 gcc_assert (!unmodified_insns
.is_empty ());
3289 /* Now fixup the assignments. */
3290 for (int i
= 0; i
< count
; i
++)
3291 noce_emit_move_insn (targets
[i
], temporaries
[i
]);
3293 /* Actually emit the sequence. */
3294 rtx_insn
*seq
= get_insns ();
3296 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3297 set_used_flags (insn
);
3299 /* Mark all our temporaries and targets as used. */
3300 for (int i
= 0; i
< count
; i
++)
3302 set_used_flags (temporaries
[i
]);
3303 set_used_flags (targets
[i
]);
3306 set_used_flags (cond
);
3310 unshare_all_rtl_in_chain (seq
);
3316 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
3318 || recog_memoized (insn
) == -1)
3321 emit_insn_before_setloc (seq
, if_info
->jump
,
3322 INSN_LOCATION (unmodified_insns
.last ()));
3324 /* Clean up THEN_BB and the edges in and out of it. */
3325 remove_edge (find_edge (test_bb
, join_bb
));
3326 remove_edge (find_edge (then_bb
, join_bb
));
3327 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3328 delete_basic_block (then_bb
);
3331 /* Maybe merge blocks now the jump is simple enough. */
3332 if (can_merge_blocks_p (test_bb
, join_bb
))
3334 merge_blocks (test_bb
, join_bb
);
3338 num_updated_if_blocks
++;
3339 if_info
->transform_name
= "noce_convert_multiple_sets";
3343 /* Return true iff basic block TEST_BB is comprised of only
3344 (SET (REG) (REG)) insns suitable for conversion to a series
3345 of conditional moves. FORNOW: Use II to find the expected cost of
3346 the branch into/over TEST_BB.
3348 TODO: This creates an implicit "magic number" for branch_cost.
3349 II->branch_cost now guides the maximum number of set instructions in
3350 a basic block which is considered profitable to completely
3354 bb_ok_for_noce_convert_multiple_sets (basic_block test_bb
,
3355 struct noce_if_info
*ii
)
3359 unsigned param
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3360 unsigned limit
= MIN (ii
->branch_cost
, param
);
3362 FOR_BB_INSNS (test_bb
, insn
)
3364 /* Skip over notes etc. */
3365 if (!active_insn_p (insn
))
3368 /* We only handle SET insns. */
3369 rtx set
= single_set (insn
);
3370 if (set
== NULL_RTX
)
3373 rtx dest
= SET_DEST (set
);
3374 rtx src
= SET_SRC (set
);
3376 /* We can possibly relax this, but for now only handle REG to REG
3377 (including subreg) moves. This avoids any issues that might come
3378 from introducing loads/stores that might violate data-race-freedom
3384 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3385 && subreg_lowpart_p (src
))))
3388 /* Destination must be appropriate for a conditional write. */
3389 if (!noce_operand_ok (dest
))
3392 /* We must be able to conditionally move in this mode. */
3393 if (!can_conditionally_move_p (GET_MODE (dest
)))
3396 /* FORNOW: Our cost model is a count of the number of instructions we
3397 would if-convert. This is suboptimal, and should be improved as part
3398 of a wider rework of branch_cost. */
3399 if (++count
> limit
)
3406 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3407 it without using conditional execution. Return TRUE if we were successful
3408 at converting the block. */
3411 noce_process_if_block (struct noce_if_info
*if_info
)
3413 basic_block test_bb
= if_info
->test_bb
; /* test block */
3414 basic_block then_bb
= if_info
->then_bb
; /* THEN */
3415 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
3416 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
3417 rtx_insn
*jump
= if_info
->jump
;
3418 rtx cond
= if_info
->cond
;
3419 rtx_insn
*insn_a
, *insn_b
;
3421 rtx orig_x
, x
, a
, b
;
3423 /* We're looking for patterns of the form
3425 (1) if (...) x = a; else x = b;
3426 (2) x = b; if (...) x = a;
3427 (3) if (...) x = a; // as if with an initial x = x.
3428 (4) if (...) { x = a; y = b; z = c; } // Like 3, for multiple SETS.
3429 The later patterns require jumps to be more expensive.
3430 For the if (...) x = a; else x = b; case we allow multiple insns
3431 inside the then and else blocks as long as their only effect is
3432 to calculate a value for x.
3433 ??? For future expansion, further expand the "multiple X" rules. */
3435 /* First look for multiple SETS. */
3437 && HAVE_conditional_move
3439 && bb_ok_for_noce_convert_multiple_sets (then_bb
, if_info
))
3441 if (noce_convert_multiple_sets (if_info
))
3443 if (dump_file
&& if_info
->transform_name
)
3444 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3445 if_info
->transform_name
);
3450 if (! bb_valid_for_noce_process_p (then_bb
, cond
, &if_info
->then_cost
,
3451 &if_info
->then_simple
))
3455 && ! bb_valid_for_noce_process_p (else_bb
, cond
, &if_info
->else_cost
,
3456 &if_info
->else_simple
))
3459 insn_a
= last_active_insn (then_bb
, FALSE
);
3460 set_a
= single_set (insn_a
);
3463 x
= SET_DEST (set_a
);
3464 a
= SET_SRC (set_a
);
3466 /* Look for the other potential set. Make sure we've got equivalent
3468 /* ??? This is overconservative. Storing to two different mems is
3469 as easy as conditionally computing the address. Storing to a
3470 single mem merely requires a scratch memory to use as one of the
3471 destination addresses; often the memory immediately below the
3472 stack pointer is available for this. */
3476 insn_b
= last_active_insn (else_bb
, FALSE
);
3477 set_b
= single_set (insn_b
);
3480 if (!rtx_interchangeable_p (x
, SET_DEST (set_b
)))
3485 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
3486 /* We're going to be moving the evaluation of B down from above
3487 COND_EARLIEST to JUMP. Make sure the relevant data is still
3490 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
3491 || !NONJUMP_INSN_P (insn_b
)
3492 || (set_b
= single_set (insn_b
)) == NULL_RTX
3493 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
3494 || ! noce_operand_ok (SET_SRC (set_b
))
3495 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
3496 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
3497 /* Avoid extending the lifetime of hard registers on small
3498 register class machines. */
3499 || (REG_P (SET_SRC (set_b
))
3500 && HARD_REGISTER_P (SET_SRC (set_b
))
3501 && targetm
.small_register_classes_for_mode_p
3502 (GET_MODE (SET_SRC (set_b
))))
3503 /* Likewise with X. In particular this can happen when
3504 noce_get_condition looks farther back in the instruction
3505 stream than one might expect. */
3506 || reg_overlap_mentioned_p (x
, cond
)
3507 || reg_overlap_mentioned_p (x
, a
)
3508 || modified_between_p (x
, insn_b
, jump
))
3515 /* If x has side effects then only the if-then-else form is safe to
3516 convert. But even in that case we would need to restore any notes
3517 (such as REG_INC) at then end. That can be tricky if
3518 noce_emit_move_insn expands to more than one insn, so disable the
3519 optimization entirely for now if there are side effects. */
3520 if (side_effects_p (x
))
3523 b
= (set_b
? SET_SRC (set_b
) : x
);
3525 /* Only operate on register destinations, and even then avoid extending
3526 the lifetime of hard registers on small register class machines. */
3528 if_info
->orig_x
= orig_x
;
3530 || (HARD_REGISTER_P (x
)
3531 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
3533 if (GET_MODE (x
) == BLKmode
)
3536 if (GET_CODE (x
) == ZERO_EXTRACT
3537 && (!CONST_INT_P (XEXP (x
, 1))
3538 || !CONST_INT_P (XEXP (x
, 2))))
3541 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
3542 ? XEXP (x
, 0) : x
));
3545 /* Don't operate on sources that may trap or are volatile. */
3546 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
3550 /* Set up the info block for our subroutines. */
3551 if_info
->insn_a
= insn_a
;
3552 if_info
->insn_b
= insn_b
;
3557 /* Try optimizations in some approximation of a useful order. */
3558 /* ??? Should first look to see if X is live incoming at all. If it
3559 isn't, we don't need anything but an unconditional set. */
3561 /* Look and see if A and B are really the same. Avoid creating silly
3562 cmove constructs that no one will fix up later. */
3563 if (noce_simple_bbs (if_info
)
3564 && rtx_interchangeable_p (a
, b
))
3566 /* If we have an INSN_B, we don't have to create any new rtl. Just
3567 move the instruction that we already have. If we don't have an
3568 INSN_B, that means that A == X, and we've got a noop move. In
3569 that case don't do anything and let the code below delete INSN_A. */
3570 if (insn_b
&& else_bb
)
3574 if (else_bb
&& insn_b
== BB_END (else_bb
))
3575 BB_END (else_bb
) = PREV_INSN (insn_b
);
3576 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
3578 /* If there was a REG_EQUAL note, delete it since it may have been
3579 true due to this insn being after a jump. */
3580 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
3581 remove_note (insn_b
, note
);
3585 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
3586 x must be executed twice. */
3587 else if (insn_b
&& side_effects_p (orig_x
))
3594 if (!set_b
&& MEM_P (orig_x
))
3595 /* We want to avoid store speculation to avoid cases like
3596 if (pthread_mutex_trylock(mutex))
3598 Rather than go to much effort here, we rely on the SSA optimizers,
3599 which do a good enough job these days. */
3602 if (noce_try_move (if_info
))
3604 if (noce_try_ifelse_collapse (if_info
))
3606 if (noce_try_store_flag (if_info
))
3608 if (noce_try_bitop (if_info
))
3610 if (noce_try_minmax (if_info
))
3612 if (noce_try_abs (if_info
))
3614 if (noce_try_inverse_constants (if_info
))
3616 if (!targetm
.have_conditional_execution ()
3617 && noce_try_store_flag_constants (if_info
))
3619 if (HAVE_conditional_move
3620 && noce_try_cmove (if_info
))
3622 if (! targetm
.have_conditional_execution ())
3624 if (noce_try_addcc (if_info
))
3626 if (noce_try_store_flag_mask (if_info
))
3628 if (HAVE_conditional_move
3629 && noce_try_cmove_arith (if_info
))
3631 if (noce_try_sign_mask (if_info
))
3635 if (!else_bb
&& set_b
)
3646 if (dump_file
&& if_info
->transform_name
)
3647 fprintf (dump_file
, "if-conversion succeeded through %s\n",
3648 if_info
->transform_name
);
3650 /* If we used a temporary, fix it up now. */
3656 noce_emit_move_insn (orig_x
, x
);
3658 set_used_flags (orig_x
);
3659 unshare_all_rtl_in_chain (seq
);
3662 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
3665 /* The original THEN and ELSE blocks may now be removed. The test block
3666 must now jump to the join block. If the test block and the join block
3667 can be merged, do so. */
3670 delete_basic_block (else_bb
);
3674 remove_edge (find_edge (test_bb
, join_bb
));
3676 remove_edge (find_edge (then_bb
, join_bb
));
3677 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3678 delete_basic_block (then_bb
);
3681 if (can_merge_blocks_p (test_bb
, join_bb
))
3683 merge_blocks (test_bb
, join_bb
);
3687 num_updated_if_blocks
++;
3691 /* Check whether a block is suitable for conditional move conversion.
3692 Every insn must be a simple set of a register to a constant or a
3693 register. For each assignment, store the value in the pointer map
3694 VALS, keyed indexed by register pointer, then store the register
3695 pointer in REGS. COND is the condition we will test. */
3698 check_cond_move_block (basic_block bb
,
3699 hash_map
<rtx
, rtx
> *vals
,
3704 rtx cc
= cc_in_cond (cond
);
3706 /* We can only handle simple jumps at the end of the basic block.
3707 It is almost impossible to update the CFG otherwise. */
3709 if (JUMP_P (insn
) && !onlyjump_p (insn
))
3712 FOR_BB_INSNS (bb
, insn
)
3716 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3718 set
= single_set (insn
);
3722 dest
= SET_DEST (set
);
3723 src
= SET_SRC (set
);
3725 || (HARD_REGISTER_P (dest
)
3726 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
3729 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
3732 if (side_effects_p (src
) || side_effects_p (dest
))
3735 if (may_trap_p (src
) || may_trap_p (dest
))
3738 /* Don't try to handle this if the source register was
3739 modified earlier in the block. */
3742 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
3743 && vals
->get (SUBREG_REG (src
))))
3746 /* Don't try to handle this if the destination register was
3747 modified earlier in the block. */
3748 if (vals
->get (dest
))
3751 /* Don't try to handle this if the condition uses the
3752 destination register. */
3753 if (reg_overlap_mentioned_p (dest
, cond
))
3756 /* Don't try to handle this if the source register is modified
3757 later in the block. */
3758 if (!CONSTANT_P (src
)
3759 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
3762 /* Skip it if the instruction to be moved might clobber CC. */
3763 if (cc
&& set_of (cc
, insn
))
3766 vals
->put (dest
, src
);
3768 regs
->safe_push (dest
);
3774 /* Given a basic block BB suitable for conditional move conversion,
3775 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
3776 the register values depending on COND, emit the insns in the block as
3777 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
3778 processed. The caller has started a sequence for the conversion.
3779 Return true if successful, false if something goes wrong. */
3782 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
3783 basic_block bb
, rtx cond
,
3784 hash_map
<rtx
, rtx
> *then_vals
,
3785 hash_map
<rtx
, rtx
> *else_vals
,
3790 rtx cond_arg0
, cond_arg1
;
3792 code
= GET_CODE (cond
);
3793 cond_arg0
= XEXP (cond
, 0);
3794 cond_arg1
= XEXP (cond
, 1);
3796 FOR_BB_INSNS (bb
, insn
)
3798 rtx set
, target
, dest
, t
, e
;
3800 /* ??? Maybe emit conditional debug insn? */
3801 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
3803 set
= single_set (insn
);
3804 gcc_assert (set
&& REG_P (SET_DEST (set
)));
3806 dest
= SET_DEST (set
);
3808 rtx
*then_slot
= then_vals
->get (dest
);
3809 rtx
*else_slot
= else_vals
->get (dest
);
3810 t
= then_slot
? *then_slot
: NULL_RTX
;
3811 e
= else_slot
? *else_slot
: NULL_RTX
;
3815 /* If this register was set in the then block, we already
3816 handled this case there. */
3829 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
3835 noce_emit_move_insn (dest
, target
);
3841 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
3842 it using only conditional moves. Return TRUE if we were successful at
3843 converting the block. */
3846 cond_move_process_if_block (struct noce_if_info
*if_info
)
3848 basic_block test_bb
= if_info
->test_bb
;
3849 basic_block then_bb
= if_info
->then_bb
;
3850 basic_block else_bb
= if_info
->else_bb
;
3851 basic_block join_bb
= if_info
->join_bb
;
3852 rtx_insn
*jump
= if_info
->jump
;
3853 rtx cond
= if_info
->cond
;
3854 rtx_insn
*seq
, *loc_insn
;
3857 vec
<rtx
> then_regs
= vNULL
;
3858 vec
<rtx
> else_regs
= vNULL
;
3860 int success_p
= FALSE
;
3861 int limit
= PARAM_VALUE (PARAM_MAX_RTL_IF_CONVERSION_INSNS
);
3863 /* Build a mapping for each block to the value used for each
3865 hash_map
<rtx
, rtx
> then_vals
;
3866 hash_map
<rtx
, rtx
> else_vals
;
3868 /* Make sure the blocks are suitable. */
3869 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
3871 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
3874 /* Make sure the blocks can be used together. If the same register
3875 is set in both blocks, and is not set to a constant in both
3876 cases, then both blocks must set it to the same register. We
3877 have already verified that if it is set to a register, that the
3878 source register does not change after the assignment. Also count
3879 the number of registers set in only one of the blocks. */
3881 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
3883 rtx
*then_slot
= then_vals
.get (reg
);
3884 rtx
*else_slot
= else_vals
.get (reg
);
3886 gcc_checking_assert (then_slot
);
3891 rtx then_val
= *then_slot
;
3892 rtx else_val
= *else_slot
;
3893 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
3894 && !rtx_equal_p (then_val
, else_val
))
3899 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
3900 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
3902 gcc_checking_assert (else_vals
.get (reg
));
3903 if (!then_vals
.get (reg
))
3907 /* Make sure it is reasonable to convert this block. What matters
3908 is the number of assignments currently made in only one of the
3909 branches, since if we convert we are going to always execute
3911 if (c
> MAX_CONDITIONAL_EXECUTE
3915 /* Try to emit the conditional moves. First do the then block,
3916 then do anything left in the else blocks. */
3918 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3919 &then_vals
, &else_vals
, false)
3921 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3922 &then_vals
, &else_vals
, true)))
3927 seq
= end_ifcvt_sequence (if_info
);
3931 loc_insn
= first_active_insn (then_bb
);
3934 loc_insn
= first_active_insn (else_bb
);
3935 gcc_assert (loc_insn
);
3937 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3941 delete_basic_block (else_bb
);
3945 remove_edge (find_edge (test_bb
, join_bb
));
3947 remove_edge (find_edge (then_bb
, join_bb
));
3948 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3949 delete_basic_block (then_bb
);
3952 if (can_merge_blocks_p (test_bb
, join_bb
))
3954 merge_blocks (test_bb
, join_bb
);
3958 num_updated_if_blocks
++;
3962 then_regs
.release ();
3963 else_regs
.release ();
3968 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3969 IF-THEN-ELSE-JOIN block.
3971 If so, we'll try to convert the insns to not require the branch,
3972 using only transformations that do not require conditional execution.
3974 Return TRUE if we were successful at converting the block. */
3977 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3980 basic_block then_bb
, else_bb
, join_bb
;
3981 bool then_else_reversed
= false;
3984 rtx_insn
*cond_earliest
;
3985 struct noce_if_info if_info
;
3987 /* We only ever should get here before reload. */
3988 gcc_assert (!reload_completed
);
3990 /* Recognize an IF-THEN-ELSE-JOIN block. */
3991 if (single_pred_p (then_edge
->dest
)
3992 && single_succ_p (then_edge
->dest
)
3993 && single_pred_p (else_edge
->dest
)
3994 && single_succ_p (else_edge
->dest
)
3995 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3997 then_bb
= then_edge
->dest
;
3998 else_bb
= else_edge
->dest
;
3999 join_bb
= single_succ (then_bb
);
4001 /* Recognize an IF-THEN-JOIN block. */
4002 else if (single_pred_p (then_edge
->dest
)
4003 && single_succ_p (then_edge
->dest
)
4004 && single_succ (then_edge
->dest
) == else_edge
->dest
)
4006 then_bb
= then_edge
->dest
;
4007 else_bb
= NULL_BLOCK
;
4008 join_bb
= else_edge
->dest
;
4010 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
4011 of basic blocks in cfglayout mode does not matter, so the fallthrough
4012 edge can go to any basic block (and not just to bb->next_bb, like in
4014 else if (single_pred_p (else_edge
->dest
)
4015 && single_succ_p (else_edge
->dest
)
4016 && single_succ (else_edge
->dest
) == then_edge
->dest
)
4018 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
4019 To make this work, we have to invert the THEN and ELSE blocks
4020 and reverse the jump condition. */
4021 then_bb
= else_edge
->dest
;
4022 else_bb
= NULL_BLOCK
;
4023 join_bb
= single_succ (then_bb
);
4024 then_else_reversed
= true;
4027 /* Not a form we can handle. */
4030 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4031 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4034 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4037 num_possible_if_blocks
++;
4042 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
4043 (else_bb
) ? "-ELSE" : "",
4044 pass
, test_bb
->index
, then_bb
->index
);
4047 fprintf (dump_file
, ", else %d", else_bb
->index
);
4049 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
4052 /* If the conditional jump is more than just a conditional
4053 jump, then we can not do if-conversion on this block. */
4054 jump
= BB_END (test_bb
);
4055 if (! onlyjump_p (jump
))
4058 /* If this is not a standard conditional jump, we can't parse it. */
4059 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
4063 /* We must be comparing objects whose modes imply the size. */
4064 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4067 /* Initialize an IF_INFO struct to pass around. */
4068 memset (&if_info
, 0, sizeof if_info
);
4069 if_info
.test_bb
= test_bb
;
4070 if_info
.then_bb
= then_bb
;
4071 if_info
.else_bb
= else_bb
;
4072 if_info
.join_bb
= join_bb
;
4073 if_info
.cond
= cond
;
4074 if_info
.cond_earliest
= cond_earliest
;
4075 if_info
.jump
= jump
;
4076 if_info
.then_else_reversed
= then_else_reversed
;
4077 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
4078 predictable_edge_p (then_edge
));
4080 /* Do the real work. */
4082 if (noce_process_if_block (&if_info
))
4085 if (HAVE_conditional_move
4086 && cond_move_process_if_block (&if_info
))
4093 /* Merge the blocks and mark for local life update. */
4096 merge_if_block (struct ce_if_block
* ce_info
)
4098 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
4099 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
4100 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
4101 basic_block join_bb
= ce_info
->join_bb
; /* join block */
4102 basic_block combo_bb
;
4104 /* All block merging is done into the lower block numbers. */
4107 df_set_bb_dirty (test_bb
);
4109 /* Merge any basic blocks to handle && and || subtests. Each of
4110 the blocks are on the fallthru path from the predecessor block. */
4111 if (ce_info
->num_multiple_test_blocks
> 0)
4113 basic_block bb
= test_bb
;
4114 basic_block last_test_bb
= ce_info
->last_test_bb
;
4115 basic_block fallthru
= block_fallthru (bb
);
4120 fallthru
= block_fallthru (bb
);
4121 merge_blocks (combo_bb
, bb
);
4124 while (bb
!= last_test_bb
);
4127 /* Merge TEST block into THEN block. Normally the THEN block won't have a
4128 label, but it might if there were || tests. That label's count should be
4129 zero, and it normally should be removed. */
4133 /* If THEN_BB has no successors, then there's a BARRIER after it.
4134 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
4135 is no longer needed, and in fact it is incorrect to leave it in
4137 if (EDGE_COUNT (then_bb
->succs
) == 0
4138 && EDGE_COUNT (combo_bb
->succs
) > 1)
4140 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
4141 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4142 end
= NEXT_INSN (end
);
4144 if (end
&& BARRIER_P (end
))
4147 merge_blocks (combo_bb
, then_bb
);
4151 /* The ELSE block, if it existed, had a label. That label count
4152 will almost always be zero, but odd things can happen when labels
4153 get their addresses taken. */
4156 /* If ELSE_BB has no successors, then there's a BARRIER after it.
4157 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
4158 is no longer needed, and in fact it is incorrect to leave it in
4160 if (EDGE_COUNT (else_bb
->succs
) == 0
4161 && EDGE_COUNT (combo_bb
->succs
) > 1)
4163 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
4164 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
4165 end
= NEXT_INSN (end
);
4167 if (end
&& BARRIER_P (end
))
4170 merge_blocks (combo_bb
, else_bb
);
4174 /* If there was no join block reported, that means it was not adjacent
4175 to the others, and so we cannot merge them. */
4179 rtx_insn
*last
= BB_END (combo_bb
);
4181 /* The outgoing edge for the current COMBO block should already
4182 be correct. Verify this. */
4183 if (EDGE_COUNT (combo_bb
->succs
) == 0)
4184 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
4185 || (NONJUMP_INSN_P (last
)
4186 && GET_CODE (PATTERN (last
)) == TRAP_IF
4187 && (TRAP_CONDITION (PATTERN (last
))
4188 == const_true_rtx
)));
4191 /* There should still be something at the end of the THEN or ELSE
4192 blocks taking us to our final destination. */
4193 gcc_assert (JUMP_P (last
)
4194 || (EDGE_SUCC (combo_bb
, 0)->dest
4195 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4197 && SIBLING_CALL_P (last
))
4198 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
4199 && can_throw_internal (last
)));
4202 /* The JOIN block may have had quite a number of other predecessors too.
4203 Since we've already merged the TEST, THEN and ELSE blocks, we should
4204 have only one remaining edge from our if-then-else diamond. If there
4205 is more than one remaining edge, it must come from elsewhere. There
4206 may be zero incoming edges if the THEN block didn't actually join
4207 back up (as with a call to a non-return function). */
4208 else if (EDGE_COUNT (join_bb
->preds
) < 2
4209 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4211 /* We can merge the JOIN cleanly and update the dataflow try
4212 again on this pass.*/
4213 merge_blocks (combo_bb
, join_bb
);
4218 /* We cannot merge the JOIN. */
4220 /* The outgoing edge for the current COMBO block should already
4221 be correct. Verify this. */
4222 gcc_assert (single_succ_p (combo_bb
)
4223 && single_succ (combo_bb
) == join_bb
);
4225 /* Remove the jump and cruft from the end of the COMBO block. */
4226 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4227 tidy_fallthru_edge (single_succ_edge (combo_bb
));
4230 num_updated_if_blocks
++;
4233 /* Find a block ending in a simple IF condition and try to transform it
4234 in some way. When converting a multi-block condition, put the new code
4235 in the first such block and delete the rest. Return a pointer to this
4236 first block if some transformation was done. Return NULL otherwise. */
4239 find_if_header (basic_block test_bb
, int pass
)
4241 ce_if_block ce_info
;
4245 /* The kind of block we're looking for has exactly two successors. */
4246 if (EDGE_COUNT (test_bb
->succs
) != 2)
4249 then_edge
= EDGE_SUCC (test_bb
, 0);
4250 else_edge
= EDGE_SUCC (test_bb
, 1);
4252 if (df_get_bb_dirty (then_edge
->dest
))
4254 if (df_get_bb_dirty (else_edge
->dest
))
4257 /* Neither edge should be abnormal. */
4258 if ((then_edge
->flags
& EDGE_COMPLEX
)
4259 || (else_edge
->flags
& EDGE_COMPLEX
))
4262 /* Nor exit the loop. */
4263 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
4264 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
4267 /* The THEN edge is canonically the one that falls through. */
4268 if (then_edge
->flags
& EDGE_FALLTHRU
)
4270 else if (else_edge
->flags
& EDGE_FALLTHRU
)
4271 std::swap (then_edge
, else_edge
);
4273 /* Otherwise this must be a multiway branch of some sort. */
4276 memset (&ce_info
, 0, sizeof (ce_info
));
4277 ce_info
.test_bb
= test_bb
;
4278 ce_info
.then_bb
= then_edge
->dest
;
4279 ce_info
.else_bb
= else_edge
->dest
;
4280 ce_info
.pass
= pass
;
4282 #ifdef IFCVT_MACHDEP_INIT
4283 IFCVT_MACHDEP_INIT (&ce_info
);
4286 if (!reload_completed
4287 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
4290 if (reload_completed
4291 && targetm
.have_conditional_execution ()
4292 && cond_exec_find_if_block (&ce_info
))
4295 if (targetm
.have_trap ()
4296 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
4297 && find_cond_trap (test_bb
, then_edge
, else_edge
))
4300 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
4301 && (reload_completed
|| !targetm
.have_conditional_execution ()))
4303 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
4305 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
4313 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
4314 /* Set this so we continue looking. */
4315 cond_exec_changed_p
= TRUE
;
4316 return ce_info
.test_bb
;
4319 /* Return true if a block has two edges, one of which falls through to the next
4320 block, and the other jumps to a specific block, so that we can tell if the
4321 block is part of an && test or an || test. Returns either -1 or the number
4322 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
4325 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
4328 int fallthru_p
= FALSE
;
4335 if (!cur_bb
|| !target_bb
)
4338 /* If no edges, obviously it doesn't jump or fallthru. */
4339 if (EDGE_COUNT (cur_bb
->succs
) == 0)
4342 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
4344 if (cur_edge
->flags
& EDGE_COMPLEX
)
4345 /* Anything complex isn't what we want. */
4348 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
4351 else if (cur_edge
->dest
== target_bb
)
4358 if ((jump_p
& fallthru_p
) == 0)
4361 /* Don't allow calls in the block, since this is used to group && and ||
4362 together for conditional execution support. ??? we should support
4363 conditional execution support across calls for IA-64 some day, but
4364 for now it makes the code simpler. */
4365 end
= BB_END (cur_bb
);
4366 insn
= BB_HEAD (cur_bb
);
4368 while (insn
!= NULL_RTX
)
4375 && !DEBUG_INSN_P (insn
)
4376 && GET_CODE (PATTERN (insn
)) != USE
4377 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
4383 insn
= NEXT_INSN (insn
);
4389 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
4390 block. If so, we'll try to convert the insns to not require the branch.
4391 Return TRUE if we were successful at converting the block. */
4394 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
4396 basic_block test_bb
= ce_info
->test_bb
;
4397 basic_block then_bb
= ce_info
->then_bb
;
4398 basic_block else_bb
= ce_info
->else_bb
;
4399 basic_block join_bb
= NULL_BLOCK
;
4404 ce_info
->last_test_bb
= test_bb
;
4406 /* We only ever should get here after reload,
4407 and if we have conditional execution. */
4408 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
4410 /* Discover if any fall through predecessors of the current test basic block
4411 were && tests (which jump to the else block) or || tests (which jump to
4413 if (single_pred_p (test_bb
)
4414 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
4416 basic_block bb
= single_pred (test_bb
);
4417 basic_block target_bb
;
4418 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
4421 /* Determine if the preceding block is an && or || block. */
4422 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
4424 ce_info
->and_and_p
= TRUE
;
4425 target_bb
= else_bb
;
4427 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
4429 ce_info
->and_and_p
= FALSE
;
4430 target_bb
= then_bb
;
4433 target_bb
= NULL_BLOCK
;
4435 if (target_bb
&& n_insns
<= max_insns
)
4437 int total_insns
= 0;
4440 ce_info
->last_test_bb
= test_bb
;
4442 /* Found at least one && or || block, look for more. */
4445 ce_info
->test_bb
= test_bb
= bb
;
4446 total_insns
+= n_insns
;
4449 if (!single_pred_p (bb
))
4452 bb
= single_pred (bb
);
4453 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
4455 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
4457 ce_info
->num_multiple_test_blocks
= blocks
;
4458 ce_info
->num_multiple_test_insns
= total_insns
;
4460 if (ce_info
->and_and_p
)
4461 ce_info
->num_and_and_blocks
= blocks
;
4463 ce_info
->num_or_or_blocks
= blocks
;
4467 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
4468 other than any || blocks which jump to the THEN block. */
4469 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
4472 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
4473 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
4475 if (cur_edge
->flags
& EDGE_COMPLEX
)
4479 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
4481 if (cur_edge
->flags
& EDGE_COMPLEX
)
4485 /* The THEN block of an IF-THEN combo must have zero or one successors. */
4486 if (EDGE_COUNT (then_bb
->succs
) > 0
4487 && (!single_succ_p (then_bb
)
4488 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
4489 || (epilogue_completed
4490 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
4493 /* If the THEN block has no successors, conditional execution can still
4494 make a conditional call. Don't do this unless the ELSE block has
4495 only one incoming edge -- the CFG manipulation is too ugly otherwise.
4496 Check for the last insn of the THEN block being an indirect jump, which
4497 is listed as not having any successors, but confuses the rest of the CE
4498 code processing. ??? we should fix this in the future. */
4499 if (EDGE_COUNT (then_bb
->succs
) == 0)
4501 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4503 rtx_insn
*last_insn
= BB_END (then_bb
);
4506 && NOTE_P (last_insn
)
4507 && last_insn
!= BB_HEAD (then_bb
))
4508 last_insn
= PREV_INSN (last_insn
);
4511 && JUMP_P (last_insn
)
4512 && ! simplejump_p (last_insn
))
4516 else_bb
= NULL_BLOCK
;
4522 /* If the THEN block's successor is the other edge out of the TEST block,
4523 then we have an IF-THEN combo without an ELSE. */
4524 else if (single_succ (then_bb
) == else_bb
)
4527 else_bb
= NULL_BLOCK
;
4530 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
4531 has exactly one predecessor and one successor, and the outgoing edge
4532 is not complex, then we have an IF-THEN-ELSE combo. */
4533 else if (single_succ_p (else_bb
)
4534 && single_succ (then_bb
) == single_succ (else_bb
)
4535 && single_pred_p (else_bb
)
4536 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
4537 && !(epilogue_completed
4538 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
4539 join_bb
= single_succ (else_bb
);
4541 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
4545 num_possible_if_blocks
++;
4550 "\nIF-THEN%s block found, pass %d, start block %d "
4551 "[insn %d], then %d [%d]",
4552 (else_bb
) ? "-ELSE" : "",
4555 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
4557 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
4560 fprintf (dump_file
, ", else %d [%d]",
4562 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
4564 fprintf (dump_file
, ", join %d [%d]",
4566 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
4568 if (ce_info
->num_multiple_test_blocks
> 0)
4569 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
4570 ce_info
->num_multiple_test_blocks
,
4571 (ce_info
->and_and_p
) ? "&&" : "||",
4572 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
4573 ce_info
->last_test_bb
->index
,
4574 ((BB_HEAD (ce_info
->last_test_bb
))
4575 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
4578 fputc ('\n', dump_file
);
4581 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
4582 first condition for free, since we've already asserted that there's a
4583 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
4584 we checked the FALLTHRU flag, those are already adjacent to the last IF
4586 /* ??? As an enhancement, move the ELSE block. Have to deal with
4587 BLOCK notes, if by no other means than backing out the merge if they
4588 exist. Sticky enough I don't want to think about it now. */
4590 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
4592 if ((next
= next
->next_bb
) != join_bb
4593 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4601 /* Do the real work. */
4603 ce_info
->else_bb
= else_bb
;
4604 ce_info
->join_bb
= join_bb
;
4606 /* If we have && and || tests, try to first handle combining the && and ||
4607 tests into the conditional code, and if that fails, go back and handle
4608 it without the && and ||, which at present handles the && case if there
4609 was no ELSE block. */
4610 if (cond_exec_process_if_block (ce_info
, TRUE
))
4613 if (ce_info
->num_multiple_test_blocks
)
4617 if (cond_exec_process_if_block (ce_info
, FALSE
))
4624 /* Convert a branch over a trap, or a branch
4625 to a trap, into a conditional trap. */
4628 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
4630 basic_block then_bb
= then_edge
->dest
;
4631 basic_block else_bb
= else_edge
->dest
;
4632 basic_block other_bb
, trap_bb
;
4633 rtx_insn
*trap
, *jump
;
4635 rtx_insn
*cond_earliest
;
4638 /* Locate the block with the trap instruction. */
4639 /* ??? While we look for no successors, we really ought to allow
4640 EH successors. Need to fix merge_if_block for that to work. */
4641 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
4642 trap_bb
= then_bb
, other_bb
= else_bb
;
4643 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
4644 trap_bb
= else_bb
, other_bb
= then_bb
;
4650 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
4651 test_bb
->index
, trap_bb
->index
);
4654 /* If this is not a standard conditional jump, we can't parse it. */
4655 jump
= BB_END (test_bb
);
4656 cond
= noce_get_condition (jump
, &cond_earliest
, false);
4660 /* If the conditional jump is more than just a conditional jump, then
4661 we can not do if-conversion on this block. Give up for returnjump_p,
4662 changing a conditional return followed by unconditional trap for
4663 conditional trap followed by unconditional return is likely not
4664 beneficial and harder to handle. */
4665 if (! onlyjump_p (jump
) || returnjump_p (jump
))
4668 /* We must be comparing objects whose modes imply the size. */
4669 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
4672 /* Reverse the comparison code, if necessary. */
4673 code
= GET_CODE (cond
);
4674 if (then_bb
== trap_bb
)
4676 code
= reversed_comparison_code (cond
, jump
);
4677 if (code
== UNKNOWN
)
4681 /* Attempt to generate the conditional trap. */
4682 rtx_insn
*seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
4683 copy_rtx (XEXP (cond
, 1)),
4684 TRAP_CODE (PATTERN (trap
)));
4688 /* Emit the new insns before cond_earliest. */
4689 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
4691 /* Delete the trap block if possible. */
4692 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
4693 df_set_bb_dirty (test_bb
);
4694 df_set_bb_dirty (then_bb
);
4695 df_set_bb_dirty (else_bb
);
4697 if (EDGE_COUNT (trap_bb
->preds
) == 0)
4699 delete_basic_block (trap_bb
);
4703 /* Wire together the blocks again. */
4704 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
4705 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
4706 else if (trap_bb
== then_bb
)
4708 rtx lab
= JUMP_LABEL (jump
);
4709 rtx_insn
*seq
= targetm
.gen_jump (lab
);
4710 rtx_jump_insn
*newjump
= emit_jump_insn_after (seq
, jump
);
4711 LABEL_NUSES (lab
) += 1;
4712 JUMP_LABEL (newjump
) = lab
;
4713 emit_barrier_after (newjump
);
4717 if (can_merge_blocks_p (test_bb
, other_bb
))
4719 merge_blocks (test_bb
, other_bb
);
4723 num_updated_if_blocks
++;
4727 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
4731 block_has_only_trap (basic_block bb
)
4735 /* We're not the exit block. */
4736 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4739 /* The block must have no successors. */
4740 if (EDGE_COUNT (bb
->succs
) > 0)
4743 /* The only instruction in the THEN block must be the trap. */
4744 trap
= first_active_insn (bb
);
4745 if (! (trap
== BB_END (bb
)
4746 && GET_CODE (PATTERN (trap
)) == TRAP_IF
4747 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
4753 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
4754 transformable, but not necessarily the other. There need be no
4757 Return TRUE if we were successful at converting the block.
4759 Cases we'd like to look at:
4762 if (test) goto over; // x not live
4770 if (! test) goto label;
4773 if (test) goto E; // x not live
4787 (3) // This one's really only interesting for targets that can do
4788 // multiway branching, e.g. IA-64 BBB bundles. For other targets
4789 // it results in multiple branches on a cache line, which often
4790 // does not sit well with predictors.
4792 if (test1) goto E; // predicted not taken
4808 (A) Don't do (2) if the branch is predicted against the block we're
4809 eliminating. Do it anyway if we can eliminate a branch; this requires
4810 that the sole successor of the eliminated block postdominate the other
4813 (B) With CE, on (3) we can steal from both sides of the if, creating
4822 Again, this is most useful if J postdominates.
4824 (C) CE substitutes for helpful life information.
4826 (D) These heuristics need a lot of work. */
4828 /* Tests for case 1 above. */
4831 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4833 basic_block then_bb
= then_edge
->dest
;
4834 basic_block else_bb
= else_edge
->dest
;
4836 int then_bb_index
, then_prob
;
4837 rtx else_target
= NULL_RTX
;
4839 /* If we are partitioning hot/cold basic blocks, we don't want to
4840 mess up unconditional or indirect jumps that cross between hot
4843 Basic block partitioning may result in some jumps that appear to
4844 be optimizable (or blocks that appear to be mergeable), but which really
4845 must be left untouched (they are required to make it safely across
4846 partition boundaries). See the comments at the top of
4847 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4849 if ((BB_END (then_bb
)
4850 && JUMP_P (BB_END (then_bb
))
4851 && CROSSING_JUMP_P (BB_END (then_bb
)))
4852 || (BB_END (test_bb
)
4853 && JUMP_P (BB_END (test_bb
))
4854 && CROSSING_JUMP_P (BB_END (test_bb
)))
4855 || (BB_END (else_bb
)
4856 && JUMP_P (BB_END (else_bb
))
4857 && CROSSING_JUMP_P (BB_END (else_bb
))))
4860 /* THEN has one successor. */
4861 if (!single_succ_p (then_bb
))
4864 /* THEN does not fall through, but is not strange either. */
4865 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
4868 /* THEN has one predecessor. */
4869 if (!single_pred_p (then_bb
))
4872 /* THEN must do something. */
4873 if (forwarder_block_p (then_bb
))
4876 num_possible_if_blocks
++;
4879 "\nIF-CASE-1 found, start %d, then %d\n",
4880 test_bb
->index
, then_bb
->index
);
4882 if (then_edge
->probability
)
4883 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
4885 then_prob
= REG_BR_PROB_BASE
/ 2;
4887 /* We're speculating from the THEN path, we want to make sure the cost
4888 of speculation is within reason. */
4889 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
4890 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
4891 predictable_edge_p (then_edge
)))))
4894 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4896 rtx_insn
*jump
= BB_END (else_edge
->src
);
4897 gcc_assert (JUMP_P (jump
));
4898 else_target
= JUMP_LABEL (jump
);
4901 /* Registers set are dead, or are predicable. */
4902 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4903 single_succ_edge (then_bb
), 1))
4906 /* Conversion went ok, including moving the insns and fixing up the
4907 jump. Adjust the CFG to match. */
4909 /* We can avoid creating a new basic block if then_bb is immediately
4910 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4911 through to else_bb. */
4913 if (then_bb
->next_bb
== else_bb
4914 && then_bb
->prev_bb
== test_bb
4915 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4917 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4920 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4921 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4922 else_bb
, else_target
);
4924 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4927 df_set_bb_dirty (test_bb
);
4928 df_set_bb_dirty (else_bb
);
4930 then_bb_index
= then_bb
->index
;
4931 delete_basic_block (then_bb
);
4933 /* Make rest of code believe that the newly created block is the THEN_BB
4934 block we removed. */
4937 df_bb_replace (then_bb_index
, new_bb
);
4938 /* This should have been done above via force_nonfallthru_and_redirect
4939 (possibly called from redirect_edge_and_branch_force). */
4940 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4944 num_updated_if_blocks
++;
4948 /* Test for case 2 above. */
4951 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4953 basic_block then_bb
= then_edge
->dest
;
4954 basic_block else_bb
= else_edge
->dest
;
4956 int then_prob
, else_prob
;
4958 /* We do not want to speculate (empty) loop latches. */
4960 && else_bb
->loop_father
->latch
== else_bb
)
4963 /* If we are partitioning hot/cold basic blocks, we don't want to
4964 mess up unconditional or indirect jumps that cross between hot
4967 Basic block partitioning may result in some jumps that appear to
4968 be optimizable (or blocks that appear to be mergeable), but which really
4969 must be left untouched (they are required to make it safely across
4970 partition boundaries). See the comments at the top of
4971 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4973 if ((BB_END (then_bb
)
4974 && JUMP_P (BB_END (then_bb
))
4975 && CROSSING_JUMP_P (BB_END (then_bb
)))
4976 || (BB_END (test_bb
)
4977 && JUMP_P (BB_END (test_bb
))
4978 && CROSSING_JUMP_P (BB_END (test_bb
)))
4979 || (BB_END (else_bb
)
4980 && JUMP_P (BB_END (else_bb
))
4981 && CROSSING_JUMP_P (BB_END (else_bb
))))
4984 /* ELSE has one successor. */
4985 if (!single_succ_p (else_bb
))
4988 else_succ
= single_succ_edge (else_bb
);
4990 /* ELSE outgoing edge is not complex. */
4991 if (else_succ
->flags
& EDGE_COMPLEX
)
4994 /* ELSE has one predecessor. */
4995 if (!single_pred_p (else_bb
))
4998 /* THEN is not EXIT. */
4999 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
5002 if (else_edge
->probability
)
5004 else_prob
= else_edge
->probability
;
5005 then_prob
= REG_BR_PROB_BASE
- else_prob
;
5009 else_prob
= REG_BR_PROB_BASE
/ 2;
5010 then_prob
= REG_BR_PROB_BASE
/ 2;
5013 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
5014 if (else_prob
> then_prob
)
5016 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
5017 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
5023 num_possible_if_blocks
++;
5026 "\nIF-CASE-2 found, start %d, else %d\n",
5027 test_bb
->index
, else_bb
->index
);
5029 /* We're speculating from the ELSE path, we want to make sure the cost
5030 of speculation is within reason. */
5031 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
5032 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
5033 predictable_edge_p (else_edge
)))))
5036 /* Registers set are dead, or are predicable. */
5037 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
5040 /* Conversion went ok, including moving the insns and fixing up the
5041 jump. Adjust the CFG to match. */
5043 df_set_bb_dirty (test_bb
);
5044 df_set_bb_dirty (then_bb
);
5045 delete_basic_block (else_bb
);
5048 num_updated_if_blocks
++;
5050 /* ??? We may now fallthru from one of THEN's successors into a join
5051 block. Rerun cleanup_cfg? Examine things manually? Wait? */
5056 /* Used by the code above to perform the actual rtl transformations.
5057 Return TRUE if successful.
5059 TEST_BB is the block containing the conditional branch. MERGE_BB
5060 is the block containing the code to manipulate. DEST_EDGE is an
5061 edge representing a jump to the join block; after the conversion,
5062 TEST_BB should be branching to its destination.
5063 REVERSEP is true if the sense of the branch should be reversed. */
5066 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
5067 basic_block other_bb
, edge dest_edge
, int reversep
)
5069 basic_block new_dest
= dest_edge
->dest
;
5070 rtx_insn
*head
, *end
, *jump
;
5071 rtx_insn
*earliest
= NULL
;
5073 bitmap merge_set
= NULL
;
5074 /* Number of pending changes. */
5075 int n_validated_changes
= 0;
5076 rtx new_dest_label
= NULL_RTX
;
5078 jump
= BB_END (test_bb
);
5080 /* Find the extent of the real code in the merge block. */
5081 head
= BB_HEAD (merge_bb
);
5082 end
= BB_END (merge_bb
);
5084 while (DEBUG_INSN_P (end
) && end
!= head
)
5085 end
= PREV_INSN (end
);
5087 /* If merge_bb ends with a tablejump, predicating/moving insn's
5088 into test_bb and then deleting merge_bb will result in the jumptable
5089 that follows merge_bb being removed along with merge_bb and then we
5090 get an unresolved reference to the jumptable. */
5091 if (tablejump_p (end
, NULL
, NULL
))
5095 head
= NEXT_INSN (head
);
5096 while (DEBUG_INSN_P (head
) && head
!= end
)
5097 head
= NEXT_INSN (head
);
5105 head
= NEXT_INSN (head
);
5106 while (DEBUG_INSN_P (head
) && head
!= end
)
5107 head
= NEXT_INSN (head
);
5112 if (!onlyjump_p (end
))
5119 end
= PREV_INSN (end
);
5120 while (DEBUG_INSN_P (end
) && end
!= head
)
5121 end
= PREV_INSN (end
);
5124 /* Don't move frame-related insn across the conditional branch. This
5125 can lead to one of the paths of the branch having wrong unwind info. */
5126 if (epilogue_completed
)
5128 rtx_insn
*insn
= head
;
5131 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
5135 insn
= NEXT_INSN (insn
);
5139 /* Disable handling dead code by conditional execution if the machine needs
5140 to do anything funny with the tests, etc. */
5141 #ifndef IFCVT_MODIFY_TESTS
5142 if (targetm
.have_conditional_execution ())
5144 /* In the conditional execution case, we have things easy. We know
5145 the condition is reversible. We don't have to check life info
5146 because we're going to conditionally execute the code anyway.
5147 All that's left is making sure the insns involved can actually
5152 cond
= cond_exec_get_condition (jump
);
5156 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
5157 int prob_val
= (note
? XINT (note
, 0) : -1);
5161 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
5164 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
5167 prob_val
= REG_BR_PROB_BASE
- prob_val
;
5170 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
5171 && verify_changes (0))
5172 n_validated_changes
= num_validated_changes ();
5180 /* If we allocated new pseudos (e.g. in the conditional move
5181 expander called from noce_emit_cmove), we must resize the
5183 if (max_regno
< max_reg_num ())
5184 max_regno
= max_reg_num ();
5186 /* Try the NCE path if the CE path did not result in any changes. */
5187 if (n_validated_changes
== 0)
5194 /* In the non-conditional execution case, we have to verify that there
5195 are no trapping operations, no calls, no references to memory, and
5196 that any registers modified are dead at the branch site. */
5198 if (!any_condjump_p (jump
))
5201 /* Find the extent of the conditional. */
5202 cond
= noce_get_condition (jump
, &earliest
, false);
5206 live
= BITMAP_ALLOC (®_obstack
);
5207 simulate_backwards_to_point (merge_bb
, live
, end
);
5208 success
= can_move_insns_across (head
, end
, earliest
, jump
,
5210 df_get_live_in (other_bb
), NULL
);
5215 /* Collect the set of registers set in MERGE_BB. */
5216 merge_set
= BITMAP_ALLOC (®_obstack
);
5218 FOR_BB_INSNS (merge_bb
, insn
)
5219 if (NONDEBUG_INSN_P (insn
))
5220 df_simulate_find_defs (insn
, merge_set
);
5222 /* If shrink-wrapping, disable this optimization when test_bb is
5223 the first basic block and merge_bb exits. The idea is to not
5224 move code setting up a return register as that may clobber a
5225 register used to pass function parameters, which then must be
5226 saved in caller-saved regs. A caller-saved reg requires the
5227 prologue, killing a shrink-wrap opportunity. */
5228 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
5229 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
5230 && single_succ_p (new_dest
)
5231 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
5232 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
5237 return_regs
= BITMAP_ALLOC (®_obstack
);
5239 /* Start off with the intersection of regs used to pass
5240 params and regs used to return values. */
5241 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5242 if (FUNCTION_ARG_REGNO_P (i
)
5243 && targetm
.calls
.function_value_regno_p (i
))
5244 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
5246 bitmap_and_into (return_regs
,
5247 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
5248 bitmap_and_into (return_regs
,
5249 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
5250 if (!bitmap_empty_p (return_regs
))
5252 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
5253 if (NONDEBUG_INSN_P (insn
))
5257 /* If this insn sets any reg in return_regs, add all
5258 reg uses to the set of regs we're interested in. */
5259 FOR_EACH_INSN_DEF (def
, insn
)
5260 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
5262 df_simulate_uses (insn
, return_regs
);
5266 if (bitmap_intersect_p (merge_set
, return_regs
))
5268 BITMAP_FREE (return_regs
);
5269 BITMAP_FREE (merge_set
);
5273 BITMAP_FREE (return_regs
);
5278 /* We don't want to use normal invert_jump or redirect_jump because
5279 we don't want to delete_insn called. Also, we want to do our own
5280 change group management. */
5282 old_dest
= JUMP_LABEL (jump
);
5283 if (other_bb
!= new_dest
)
5285 if (!any_condjump_p (jump
))
5288 if (JUMP_P (BB_END (dest_edge
->src
)))
5289 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
5290 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
5291 new_dest_label
= ret_rtx
;
5293 new_dest_label
= block_label (new_dest
);
5295 rtx_jump_insn
*jump_insn
= as_a
<rtx_jump_insn
*> (jump
);
5297 ? ! invert_jump_1 (jump_insn
, new_dest_label
)
5298 : ! redirect_jump_1 (jump_insn
, new_dest_label
))
5302 if (verify_changes (n_validated_changes
))
5303 confirm_change_group ();
5307 if (other_bb
!= new_dest
)
5309 redirect_jump_2 (as_a
<rtx_jump_insn
*> (jump
), old_dest
, new_dest_label
,
5312 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
5315 std::swap (BRANCH_EDGE (test_bb
)->count
,
5316 FALLTHRU_EDGE (test_bb
)->count
);
5317 std::swap (BRANCH_EDGE (test_bb
)->probability
,
5318 FALLTHRU_EDGE (test_bb
)->probability
);
5319 update_br_prob_note (test_bb
);
5323 /* Move the insns out of MERGE_BB to before the branch. */
5328 if (end
== BB_END (merge_bb
))
5329 BB_END (merge_bb
) = PREV_INSN (head
);
5331 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
5332 notes being moved might become invalid. */
5338 if (! INSN_P (insn
))
5340 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5343 remove_note (insn
, note
);
5344 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
5346 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
5347 notes referring to the registers being set might become invalid. */
5353 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
5354 remove_reg_equal_equiv_notes_for_regno (i
);
5356 BITMAP_FREE (merge_set
);
5359 reorder_insns (head
, end
, PREV_INSN (earliest
));
5362 /* Remove the jump and edge if we can. */
5363 if (other_bb
== new_dest
)
5366 remove_edge (BRANCH_EDGE (test_bb
));
5367 /* ??? Can't merge blocks here, as then_bb is still in use.
5368 At minimum, the merge will get done just before bb-reorder. */
5377 BITMAP_FREE (merge_set
);
5382 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
5383 we are after combine pass. */
5386 if_convert (bool after_combine
)
5393 df_live_add_problem ();
5394 df_live_set_all_dirty ();
5397 /* Record whether we are after combine pass. */
5398 ifcvt_after_combine
= after_combine
;
5399 have_cbranchcc4
= (direct_optab_handler (cbranch_optab
, CCmode
)
5400 != CODE_FOR_nothing
);
5401 num_possible_if_blocks
= 0;
5402 num_updated_if_blocks
= 0;
5403 num_true_changes
= 0;
5405 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
5406 mark_loop_exit_edges ();
5407 loop_optimizer_finalize ();
5408 free_dominance_info (CDI_DOMINATORS
);
5410 /* Compute postdominators. */
5411 calculate_dominance_info (CDI_POST_DOMINATORS
);
5413 df_set_flags (DF_LR_RUN_DCE
);
5415 /* Go through each of the basic blocks looking for things to convert. If we
5416 have conditional execution, we make multiple passes to allow us to handle
5417 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
5422 /* Only need to do dce on the first pass. */
5423 df_clear_flags (DF_LR_RUN_DCE
);
5424 cond_exec_changed_p
= FALSE
;
5427 #ifdef IFCVT_MULTIPLE_DUMPS
5428 if (dump_file
&& pass
> 1)
5429 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
5432 FOR_EACH_BB_FN (bb
, cfun
)
5435 while (!df_get_bb_dirty (bb
)
5436 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
5440 #ifdef IFCVT_MULTIPLE_DUMPS
5441 if (dump_file
&& cond_exec_changed_p
)
5442 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
5445 while (cond_exec_changed_p
);
5447 #ifdef IFCVT_MULTIPLE_DUMPS
5449 fprintf (dump_file
, "\n\n========== no more changes\n");
5452 free_dominance_info (CDI_POST_DOMINATORS
);
5457 clear_aux_for_blocks ();
5459 /* If we allocated new pseudos, we must resize the array for sched1. */
5460 if (max_regno
< max_reg_num ())
5461 max_regno
= max_reg_num ();
5463 /* Write the final stats. */
5464 if (dump_file
&& num_possible_if_blocks
> 0)
5467 "\n%d possible IF blocks searched.\n",
5468 num_possible_if_blocks
);
5470 "%d IF blocks converted.\n",
5471 num_updated_if_blocks
);
5473 "%d true changes made.\n\n\n",
5478 df_remove_problem (df_live
);
5480 checking_verify_flow_info ();
5483 /* If-conversion and CFG cleanup. */
5485 rest_of_handle_if_conversion (void)
5487 if (flag_if_conversion
)
5491 dump_reg_info (dump_file
);
5492 dump_flow_info (dump_file
, dump_flags
);
5494 cleanup_cfg (CLEANUP_EXPENSIVE
);
5504 const pass_data pass_data_rtl_ifcvt
=
5506 RTL_PASS
, /* type */
5508 OPTGROUP_NONE
, /* optinfo_flags */
5509 TV_IFCVT
, /* tv_id */
5510 0, /* properties_required */
5511 0, /* properties_provided */
5512 0, /* properties_destroyed */
5513 0, /* todo_flags_start */
5514 TODO_df_finish
, /* todo_flags_finish */
5517 class pass_rtl_ifcvt
: public rtl_opt_pass
5520 pass_rtl_ifcvt (gcc::context
*ctxt
)
5521 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
5524 /* opt_pass methods: */
5525 virtual bool gate (function
*)
5527 return (optimize
> 0) && dbg_cnt (if_conversion
);
5530 virtual unsigned int execute (function
*)
5532 return rest_of_handle_if_conversion ();
5535 }; // class pass_rtl_ifcvt
5540 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
5542 return new pass_rtl_ifcvt (ctxt
);
5546 /* Rerun if-conversion, as combine may have simplified things enough
5547 to now meet sequence length restrictions. */
5551 const pass_data pass_data_if_after_combine
=
5553 RTL_PASS
, /* type */
5555 OPTGROUP_NONE
, /* optinfo_flags */
5556 TV_IFCVT
, /* tv_id */
5557 0, /* properties_required */
5558 0, /* properties_provided */
5559 0, /* properties_destroyed */
5560 0, /* todo_flags_start */
5561 TODO_df_finish
, /* todo_flags_finish */
5564 class pass_if_after_combine
: public rtl_opt_pass
5567 pass_if_after_combine (gcc::context
*ctxt
)
5568 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
5571 /* opt_pass methods: */
5572 virtual bool gate (function
*)
5574 return optimize
> 0 && flag_if_conversion
5575 && dbg_cnt (if_after_combine
);
5578 virtual unsigned int execute (function
*)
5584 }; // class pass_if_after_combine
5589 make_pass_if_after_combine (gcc::context
*ctxt
)
5591 return new pass_if_after_combine (ctxt
);
5597 const pass_data pass_data_if_after_reload
=
5599 RTL_PASS
, /* type */
5601 OPTGROUP_NONE
, /* optinfo_flags */
5602 TV_IFCVT2
, /* tv_id */
5603 0, /* properties_required */
5604 0, /* properties_provided */
5605 0, /* properties_destroyed */
5606 0, /* todo_flags_start */
5607 TODO_df_finish
, /* todo_flags_finish */
5610 class pass_if_after_reload
: public rtl_opt_pass
5613 pass_if_after_reload (gcc::context
*ctxt
)
5614 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
5617 /* opt_pass methods: */
5618 virtual bool gate (function
*)
5620 return optimize
> 0 && flag_if_conversion2
5621 && dbg_cnt (if_after_reload
);
5624 virtual unsigned int execute (function
*)
5630 }; // class pass_if_after_reload
5635 make_pass_if_after_reload (gcc::context
*ctxt
)
5637 return new pass_if_after_reload (ctxt
);