1 2020-08-01 Jan Hubicka <jh@suse.cz>
3 * symtab.c (symtab_node::verify_base): Verify order.
4 (symtab_node::verify_symtab_nodes): Verify order.
6 2020-08-01 Jan Hubicka <jh@suse.cz>
8 * predict.c (estimate_bb_frequencies): Cap recursive calls by 90%.
10 2020-08-01 Jojo R <jiejie_rong@c-sky.com>
12 * config/csky/csky_opts.h (float_abi_type): New.
13 * config/csky/csky.h (TARGET_SOFT_FLOAT): New.
14 (TARGET_HARD_FLOAT): New.
15 (TARGET_HARD_FLOAT_ABI): New.
16 (OPTION_DEFAULT_SPECS): Use mfloat-abi.
17 * config/csky/csky.opt (mfloat-abi): New.
18 * doc/invoke.texi (C-SKY Options): Document -mfloat-abi=.
20 2020-08-01 Cooper Qu <cooper.qu@linux.alibaba.com>
22 * config/csky/t-csky-linux: Delete big endian CPUs' multilib.
24 2020-07-31 Roger Sayle <roger@nextmovesoftware.com>
25 Tom de Vries <tdevries@suse.de>
28 * config/nvptx/nvptx.c (nvptx_truly_noop_truncation): Implement.
29 (TARGET_TRULY_NOOP_TRUNCATION): Define.
31 2020-07-31 Richard Biener <rguenther@suse.de>
34 * langhooks-def.h (lhd_finalize_early_debug): Declare.
35 (LANG_HOOKS_FINALIZE_EARLY_DEBUG): Define.
36 (LANG_HOOKS_INITIALIZER): Amend.
37 * langhooks.c: Include cgraph.h and debug.h.
38 (lhd_finalize_early_debug): Default implementation from
39 former code in finalize_compilation_unit.
40 * langhooks.h (lang_hooks::finalize_early_debug): Add.
41 * cgraphunit.c (symbol_table::finalize_compilation_unit):
42 Call the finalize_early_debug langhook.
44 2020-07-31 Richard Biener <rguenther@suse.de>
46 * genmatch.c (expr::force_leaf): Add and initialize.
47 (expr::gen_transform): Honor force_leaf by passing
48 NULL as sequence argument to maybe_push_res_to_seq.
49 (parser::parse_expr): Allow ! marker on result expression
51 * doc/match-and-simplify.texi: Amend.
53 2020-07-31 Kewen Lin <linkw@linux.ibm.com>
55 * tree-vect-loop.c (vect_get_known_peeling_cost): Don't consider branch
56 taken costs for prologue and epilogue if they don't exist.
57 (vect_estimate_min_profitable_iters): Likewise.
59 2020-07-31 Martin Liska <mliska@suse.cz>
61 * cgraph.h: Remove leading empty lines.
62 * cgraphunit.c (enum cgraph_order_sort_kind): Remove
64 (struct cgraph_order_sort): Add constructors.
65 (cgraph_order_sort::process): New.
66 (cgraph_order_cmp): New.
67 (output_in_order): Simplify and push nodes to vector.
69 2020-07-31 Richard Biener <rguenther@suse.de>
72 * fold-const.c (fold_range_test): Special-case constant
73 LHS for short-circuiting operations.
75 2020-07-31 Martin Liska <mliska@suse.cz>
77 * gcov-io.h (GCOV_PREALLOCATED_KVP): New.
79 2020-07-31 Zhiheng Xie <xiezhiheng@huawei.com>
81 * config/aarch64/aarch64-builtins.c (aarch64_general_add_builtin):
82 Add new argument ATTRS.
83 (aarch64_call_properties): New function.
84 (aarch64_modifies_global_state_p): Likewise.
85 (aarch64_reads_global_state_p): Likewise.
86 (aarch64_could_trap_p): Likewise.
87 (aarch64_add_attribute): Likewise.
88 (aarch64_get_attributes): Likewise.
89 (aarch64_init_simd_builtins): Add attributes for each built-in function.
91 2020-07-31 Richard Biener <rguenther@suse.de>
94 * var-tracking.c (vt_find_locations): Use
95 rev_post_order_and_mark_dfs_back_seme and separately iterate
98 2020-07-31 Richard Biener <rguenther@suse.de>
100 * cfganal.h (rev_post_order_and_mark_dfs_back_seme): Adjust
102 * cfganal.c (rpoamdbs_bb_data): New struct with pre BB data.
103 (tag_header): New helper.
104 (cmp_edge_dest_pre): Likewise.
105 (rev_post_order_and_mark_dfs_back_seme): Compute SCCs,
106 find SCC exits and perform a DFS walk with extra edges to
107 compute a RPO with adjacent SCC members when requesting an
108 iteration optimized order and populate the toplevel SCC array.
109 * tree-ssa-sccvn.c (do_rpo_vn): Remove ad-hoc computation
110 of max_rpo and fill it in from SCC extent info instead.
112 2020-07-30 Will Schmidt <will_schmidt@vnet.ibm.com>
114 * config/rs6000/altivec.h (vec_test_lsbb_all_ones): New define.
115 (vec_test_lsbb_all_zeros): New define.
116 * config/rs6000/rs6000-builtin.def (BU_P10_VSX_1): New built-in
118 (XVTLSBB_ZEROS, XVTLSBB_ONES): New builtin defines.
119 (xvtlsbb_all_zeros, xvtlsbb_all_ones): New builtin overloads.
120 * config/rs6000/rs6000-call.c (P10_BUILTIN_VEC_XVTLSBB_ZEROS,
121 P10_BUILTIN_VEC_XVTLSBB_ONES): New altivec_builtin_types entries.
122 * config/rs6000/rs6000.md (UNSPEC_XVTLSBB): New unspec.
123 * config/rs6000/vsx.md (*xvtlsbb_internal): New instruction define.
124 (xvtlsbbo, xvtlsbbz): New instruction expands.
126 2020-07-30 Cooper Qu <cooper.qu@linux.alibaba.com>
128 * config/riscv/riscv-opts.h (stack_protector_guard): New enum.
129 * config/riscv/riscv.c (riscv_option_override): Handle
131 * config/riscv/riscv.md (stack_protect_set): New pattern to handle
132 flexible stack protector guard settings.
133 (stack_protect_set_<mode>): Ditto.
134 (stack_protect_test): Ditto.
135 (stack_protect_test_<mode>): Ditto.
136 * config/riscv/riscv.opt (mstack-protector-guard=,
137 mstack-protector-guard-reg=, mstack-protector-guard-offset=): New
139 * doc/invoke.texi (Option Summary) [RISC-V Options]:
140 Add -mstack-protector-guard=, -mstack-protector-guard-reg=, and
141 -mstack-protector-guard-offset=.
142 (RISC-V Options): Ditto.
144 2020-07-30 H.J. Lu <hjl.tools@gmail.com>
147 * configure: Regenerated.
149 2020-07-30 Richard Biener <rguenther@suse.de>
151 PR tree-optimization/96370
152 * tree-ssa-reassoc.c (rewrite_expr_tree): Add operation
153 code parameter and use it instead of picking it up from
154 the stmt that is being rewritten.
155 (reassociate_bb): Pass down the operation code.
157 2020-07-30 Roger Sayle <roger@nextmovesoftware.com>
158 Tom de Vries <tdevries@suse.de>
160 * config/nvptx/nvptx.md (nvptx_vector_index_operand): New predicate.
161 (VECELEM): New mode attribute for a vector's uppercase element mode.
162 (Vecelem): New mode attribute for a vector's lowercase element mode.
163 (*vec_set<mode>_0, *vec_set<mode>_1, *vec_set<mode>_2)
164 (*vec_set<mode>_3): New instructions.
165 (vec_set<mode>): New expander to generate one of the above insns.
166 (vec_extract<mode><Vecelem>): New instruction.
168 2020-07-30 Martin Liska <mliska@suse.cz>
171 * config/i386/x86-tune-costs.h: Use libcall for large sizes for
172 -m32. Start using libcall from 128+ bytes.
174 2020-07-30 Martin Liska <mliska@suse.cz>
176 * config/i386/x86-tune-costs.h: Change code formatting.
178 2020-07-29 Roger Sayle <roger@nextmovesoftware.com>
180 * config/nvptx/nvptx.md (recip<mode>2): New instruction.
182 2020-07-29 Fangrui Song <maskray@google.com>
185 * opts.c (common_handle_option): Don't make -gsplit-dwarf imply -g.
186 * doc/invoke.texi (-gsplit-dwarf): Update documentation.
188 2020-07-29 Joe Ramsay <joe.ramsay@arm.com>
190 * config/arm/arm-protos.h (arm_coproc_mem_operand_no_writeback):
192 (arm_mve_mode_and_operands_type_check): Declare prototype.
193 * config/arm/arm.c (arm_coproc_mem_operand): Refactor to use
194 _arm_coproc_mem_operand.
195 (arm_coproc_mem_operand_wb): New function to cover full, limited
197 (arm_coproc_mem_operand_no_writeback): New constraint for memory
198 operand with no writeback.
199 (arm_print_operand): Extend 'E' specifier for memory operand
200 that does not support writeback.
201 (arm_mve_mode_and_operands_type_check): New constraint check for
203 * config/arm/constraints.md: Add Uj constraint for VFP vldr.16
205 * config/arm/vfp.md (*mov_load_vfp_hf16): New pattern for
207 (*mov_store_vfp_hf16): New pattern for vstr.16.
208 (*mov<mode>_vfp_<mode>16): Remove MVE moves.
210 2020-07-29 Richard Biener <rguenther@suse.de>
212 PR tree-optimization/96349
213 * tree-ssa-loop-split.c (stmt_semi_invariant_p_1): When the
214 condition runs into a loop PHI with an abnormal entry value give up.
216 2020-07-29 Richard Biener <rguenther@suse.de>
218 * tree-vectorizer.c (vectorize_loops): Reset the SCEV
219 cache if we removed any SIMD UID SSA defs.
220 * gimple-loop-interchange.cc (pass_linterchange::execute):
221 Reset the scev cache if we interchanged a loop.
223 2020-07-29 Richard Biener <rguenther@suse.de>
225 PR tree-optimization/95679
226 * tree-ssa-propagate.h
227 (substitute_and_fold_engine::propagate_into_phi_args): Return
228 whether anything changed.
229 * tree-ssa-propagate.c
230 (substitute_and_fold_engine::propagate_into_phi_args): Likewise.
231 (substitute_and_fold_dom_walker::before_dom_children): Update
234 2020-07-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
236 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment):
237 Ensure that loop variable npeel_tmp advances in each iteration.
239 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
241 * config/mmix/mmix.h (NO_FUNCTION_CSE): Define to 1.
243 2020-07-29 Hans-Peter Nilsson <hp@bitrange.com>
245 * config/mmix/mmix.h (ASM_OUTPUT_EXTERNAL): Define to
246 default_elf_asm_output_external.
248 2020-07-28 Sergei Trofimovich <siarheit@google.com>
251 * ipa-cp.c (has_undead_caller_from_outside_scc_p): Consider
252 unoptimized callers as undead.
254 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
255 Richard Biener <rguenther@suse.de>
257 * match.pd (popcount(x)&1 -> parity(x)): New simplification.
258 (parity(~x) -> parity(x)): New simplification.
259 (parity(x)^parity(y) -> parity(x^y)): New simplification.
260 (parity(x&1) -> x&1): New simplification.
261 (popcount(x) -> x>>C): New simplification.
263 2020-07-28 Roger Sayle <roger@nextmovesoftware.com>
264 Tom de Vries <tdevries@suse.de>
266 * config/nvptx/nvptx.md (extendqihi2): New instruction.
267 (ashl<mode>3, ashr<mode>3, lshr<mode>3): Support HImode.
269 2020-07-28 Jakub Jelinek <jakub@redhat.com>
272 * calls.c (maybe_warn_rdwr_sizes): Add FNDECL and FNTYPE arguments,
273 instead of trying to rediscover them in the body.
274 (initialize_argument_information): Adjust caller.
276 2020-07-28 Kewen Lin <linkw@linux.ibm.com>
278 * tree-vect-loop.c (vect_get_known_peeling_cost): Factor out some code
279 to determine peel_iters_epilogue to...
280 (vect_get_peel_iters_epilogue): ...this new function.
281 (vect_estimate_min_profitable_iters): Refactor cost calculation on
282 peel_iters_prologue and peel_iters_epilogue.
284 2020-07-27 Martin Sebor <msebor@redhat.com>
286 PR tree-optimization/84079
287 * gimple-array-bounds.cc (array_bounds_checker::check_addr_expr):
288 Only allow just-past-the-end references for the most significant
291 2020-07-27 Hu Jiangping <hujiangping@cn.fujitsu.com>
294 * opts.c (check_alignment_argument): Set the -falign-Name
295 on/off flag on and set the -falign-Name string value null,
296 when the command-line specified argument is zero.
298 2020-07-27 Martin Liska <mliska@suse.cz>
300 PR tree-optimization/96058
301 * expr.c (string_constant): Build string_constant only
302 for a type that has same precision as char_type_node
303 and is an integral type.
305 2020-07-27 Richard Biener <rguenther@suse.de>
307 * var-tracking.c (variable_tracking_main_1): Remove call
308 to mark_dfs_back_edges.
310 2020-07-27 Martin Liska <mliska@suse.cz>
312 PR tree-optimization/96128
313 * tree-vect-generic.c (expand_vector_comparison): Do not expand
314 vector comparison with VEC_COND_EXPR.
316 2020-07-27 H.J. Lu <hjl.tools@gmail.com>
319 * common.opt: Add -fcf-protection=check.
320 * flag-types.h (cf_protection_level): Add CF_CHECK.
321 * lto-wrapper.c (merge_and_complain): Issue an error for
322 mismatching -fcf-protection values with -fcf-protection=check.
323 Otherwise, merge -fcf-protection values.
324 * doc/invoke.texi: Document -fcf-protection=check.
326 2020-07-27 Martin Liska <mliska@suse.cz>
329 * symbol-summary.h: Call vec_safe_reserve before grow is called
330 in order to grow to a reasonable size.
331 * vec.h (vec_safe_reserve): Add missing function for vl_ptr
334 2020-07-26 Hans-Peter Nilsson <hp@bitrange.com>
336 * configure.ac (out-of-tree linker .hidden support): Don't turn off
337 for mmix-knuth-mmixware.
338 * configure: Regenerate.
340 2020-07-26 Aaron Sawdey <acsawdey@linux.ibm.com>
342 * config/rs6000/rs6000.c (rs6000_option_override_internal):
343 Set the default value for -mblock-ops-unaligned-vsx.
344 * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx.
345 * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
347 2020-07-25 Hans-Peter Nilsson <hp@bitrange.com>
349 * config/mmix/mmix.c (TARGET_ASM_OUTPUT_IDENT): Override the default
350 with default_asm_output_ident_directive.
352 2020-07-25 Andrew Stubbs <ams@codesourcery.com>
354 * config/gcn/gcn.c (gcn_scalar_mode_supported_p): New function.
355 (TARGET_SCALAR_MODE_SUPPORTED_P): New define.
357 2020-07-24 David Edelsohn <dje.gcc@gmail.com>
358 Clement Chigot <clement.chigot@atos.net>
360 * config.gcc (powerpc-ibm-aix7.1): Use t-aix64 and biarch64 for
362 * config/rs6000/aix71.h (ASM_SPEC): Remove aix64 option.
365 (ASM_CPU_SPEC): Remove vsx and altivec options.
366 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
369 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
370 (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
371 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
374 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
377 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
378 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
380 (CPLUSPLUS_CPP_SPEC): Same.
383 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
384 * config/rs6000/aix72.h (TARGET_DEFAULT): Use 64 bit mask if BIARCH.
385 * config/rs6000/defaultaix64.h: Delete.
387 2020-07-24 Segher Boessenkool <segher@kernel.crashing.org>
389 * config/rs6000/rs6000.opt: Delete -mpower10.
391 2020-07-24 Alexandre Oliva <oliva@adacore.com>
393 * config/i386/intelmic-mkoffload.c
394 (generate_target_descr_file): Use dumppfx for save_temps
395 files. Pass -dumpbase et al down to the compiler.
396 (generate_target_offloadend_file): Likewise.
397 (generate_host_descr_file): Likewise.
398 (prepare_target_image): Likewise. Move out_obj_filename
400 (main): ... here. Detect -dumpbase, set dumppfx too.
402 2020-07-24 Alexandre Oliva <oliva@adacore.com>
405 * gcc.c (process_command): Adjust and document conditions to
408 2020-07-24 Matthias Klose <doko@ubuntu.com>
410 * config/aarch64/aarch64.c (+aarch64_offload_options,
411 TARGET_OFFLOAD_OPTIONS): New.
413 2020-07-24 Uroš Bizjak <ubizjak@gmail.com>
416 * config/i386/sync.md (mmem_thread_fence): Emit mfence_sse2 for -Os.
418 2020-07-23 Roger Sayle <roger@nextmovesoftware.com>
420 PR rtl-optimization/96298
421 * simplify-rtx.c (simplify_binary_operation_1) [XOR]: Xor doesn't
422 distribute over xor, so (a^b)^(c^b) is not the same as (a^c)^b.
424 2020-07-23 Dong JianQiang <dongjianqiang2@huawei.com>
426 PR gcov-profile/96267
427 * gcov-io.c (gcov_open): enable if IN_GCOV_TOOL.
429 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
431 * config/rs6000/rs6000.c (adjust_vectorization_cost): Renamed to ...
432 (rs6000_adjust_vect_cost_per_stmt): ... here.
433 (rs6000_add_stmt_cost): Rename adjust_vectorization_cost to
434 rs6000_adjust_vect_cost_per_stmt.
436 2020-07-23 Kewen Lin <linkw@linux.ibm.com>
438 * tree-ssa-loop-ivopts.c (get_mem_type_for_internal_fn): Handle
439 IFN_LEN_LOAD and IFN_LEN_STORE.
440 (get_alias_ptr_type_for_ptr_address): Likewise.
442 2020-07-23 Kito Cheng <kito.cheng@sifive.com>
445 * asan.c (asan_shadow_offset_set_p): New.
446 * asan.h (asan_shadow_offset_set_p): Ditto.
447 * toplev.c (process_options): Allow -fsanitize=kernel-address
448 even TARGET_ASAN_SHADOW_OFFSET not implemented, only check when
449 asan stack protection is enabled.
451 2020-07-22 Peter Bergner <bergner@linux.ibm.com>
454 * config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Handle
455 little-endian memory ordering.
457 2020-07-22 Nathan Sidwell <nathan@acm.org>
459 * dumpfile.c (parse_dump_option): Deal with filenames
462 2020-07-22 Nathan Sidwell <nathan@acm.org>
464 * incpath.c (add_path): Avoid multiple strlen calls.
466 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
468 * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag
469 is not NULL_RTX before use.
471 2020-07-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
473 * expr.c (convert_modes): Allow a constant integer to be converted to
476 2020-07-22 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
478 * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector
479 V2SI, V2SF, V2DI, V2DF load pair and store pair modes.
480 * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp):
481 Change mode parameter to machine_mode.
482 (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to
484 * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
485 Change mode parameter to machine_mode.
486 (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode.
487 * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors.
489 2020-07-22 Wei Wentao <weiwt.fnst@cn.fujitsu.com>
491 * doc/languages.texi: Fix “then”/“than” typo.
493 2020-07-21 Sunil K Pandey <skpgkp2@gmail.com>
496 * config/i386/i386-protos.h (ix86_local_alignment): Add
497 another function parameter may_lower alignment. Default is
499 * config/i386/i386.c (ix86_lower_local_decl_alignment): New
501 (ix86_local_alignment): Amend ix86_local_alignment to accept
502 another parameter may_lower. If may_lower is true, new align
503 may be lower than incoming alignment. If may_lower is false,
504 new align will be greater or equal to incoming alignment.
505 (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define.
506 * doc/tm.texi: Regenerate.
507 * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New
509 * target.def (lower_local_decl_alignment): New hook.
511 2020-07-21 Uroš Bizjak <ubizjak@gmail.com>
514 * config/i386/sync.md (mfence_sse2): Enable for
515 TARGET_64BIT and TARGET_SSE2.
516 (mfence_nosse): Always enable.
518 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
520 * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps):
522 * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise.
523 * config/msp430/msp430.md (cbranchhi4_real): Remove special case for
524 msp430_do_not_relax_short_jumps.
526 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
528 * config/msp430/msp430.md: New "extendqipsi2" define_insn.
530 2020-07-21 Jozef Lawrynowicz <jozef.l@mittosystems.com>
532 * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and
535 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com>
537 PR rtl-optimization/89310
538 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split.
540 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
542 * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total
543 allocated size and set current_function_static_stack_size, if
544 flag_stack_usage_info.
546 2020-07-20 Sergei Trofimovich <siarheit@google.com>
549 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC
550 to get crtendS.o for !no-pie mode.
551 * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
553 2020-07-20 Yang Yang <yangyang305@huawei.com>
555 * tree-vect-stmts.c (vectorizable_simd_clone_call): Add
556 VIEW_CONVERT_EXPRs if the arguments types and return type
557 of simd clone function are distinct with the vectype of stmt.
559 2020-07-20 Uroš Bizjak <ubizjak@gmail.com>
562 * config/i386/i386.h (TARGET_AVOID_MFENCE):
563 Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE.
564 * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE.
565 (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack
566 referred memory in word_mode.
567 (mem_thread_fence): Do not generate mfence_sse2 pattern when
568 TARGET_AVOID_MFENCE is true.
569 (atomic_store<mode>): Update for rename.
570 * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE):
571 Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE.
573 2020-07-20 Martin Sebor <msebor@redhat.com>
577 * builtins.c (inline_expand_builtin_string_cmp): Rename...
578 (inline_expand_builtin_bytecmp): ...to this.
579 (builtin_memcpy_read_str): Don't expect data to be nul-terminated.
580 (expand_builtin_memory_copy_args): Handle object representations
581 with embedded nul bytes.
582 (expand_builtin_memcmp): Same.
583 (expand_builtin_strcmp): Adjust call to naming change.
584 (expand_builtin_strncmp): Same.
585 * expr.c (string_constant): Create empty strings with nonzero size.
586 * fold-const.c (c_getstr): Rename locals and update comments.
587 * tree.c (build_string): Accept null pointer argument.
588 (build_string_literal): Same.
589 * tree.h (build_string): Provide a default.
590 (build_string_literal): Same.
592 2020-07-20 Richard Biener <rguenther@suse.de>
594 * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove
595 write-only post array.
597 2020-07-20 Jakub Jelinek <jakub@redhat.com>
600 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF
601 of a bitfield not aligned on byte boundaries try to
602 fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and
603 adjust it depending on endianity.
605 2020-07-20 Jakub Jelinek <jakub@redhat.com>
608 * fold-const.c (native_encode_initializer): Handle bit-fields.
610 2020-07-20 Kewen Lin <linkw@linux.ibm.com>
612 * config/rs6000/rs6000.c (rs6000_option_override_internal):
613 Set param_vect_partial_vector_usage to 0 explicitly.
614 * doc/invoke.texi (vect-partial-vector-usage): Document new option.
615 * optabs-query.c (get_len_load_store_mode): New function.
616 * optabs-query.h (get_len_load_store_mode): New declare.
617 * params.opt (vect-partial-vector-usage): New.
618 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the
619 handlings for vectorization using length-based partial vectors, call
620 vect_gen_len for length generation, and rename some variables with
621 items instead of scalars.
622 (vect_set_loop_condition_partial_vectors): Add the handlings for
623 vectorization using length-based partial vectors.
624 (vect_do_peeling): Allow remaining eiters less than epilogue vf for
625 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
626 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init
627 epil_using_partial_vectors_p.
628 (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls
629 for lengths destruction.
630 (vect_verify_loop_lens): New function.
631 (vect_analyze_loop): Add handlings for epilogue of loop when it's
632 marked to use vectorization using partial vectors.
633 (vect_analyze_loop_2): Add the check to allow only one vectorization
634 approach using partial vectorization at the same time. Check param
635 vect-partial-vector-usage for partial vectors decision. Mark
636 LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is
637 considerable to use partial vectors. Call release_vec_loop_controls
638 for lengths destruction.
639 (vect_estimate_min_profitable_iters): Adjust for loop vectorization
640 using length-based partial vectors.
641 (vect_record_loop_mask): Init factor to 1 for vectorization using
642 mask-based partial vectors.
643 (vect_record_loop_len): New function.
644 (vect_get_loop_len): Likewise.
645 * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add
646 checks for vectorization using length-based partial vectors. Factor
647 some code to lambda function get_valid_nvectors.
648 (vectorizable_store): Add handlings when using length-based partial
650 (vectorizable_load): Likewise.
651 (vect_gen_len): New function.
652 * tree-vectorizer.h (struct rgroup_controls): Add field factor
653 mainly for length-based partial vectors.
654 (vec_loop_lens): New typedef.
655 (_loop_vec_info): Add lens and epil_using_partial_vectors_p.
656 (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro.
657 (LOOP_VINFO_LENS): Likewise.
658 (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise.
659 (vect_record_loop_len): New declare.
660 (vect_get_loop_len): Likewise.
661 (vect_gen_len): Likewise.
663 2020-07-20 Hans-Peter Nilsson <hp@bitrange.com>
665 * config/mmix/mmix.c (mmix_option_override): Reinstate default
666 integer-emitting targetm.asm_out pseudos when dumping detailed
668 (mmix_assemble_integer): Update comment.
670 2020-07-19 H.J. Lu <hjl.tools@gmail.com>
674 * config/i386/cpuid.h: Add include guard.
677 2020-07-18 H.J. Lu <hjl.tools@gmail.com>
680 * config/i386/x86-64.h (ASM_OUTPUT_ALIGNED_DECL_LOCAL): New.
682 2020-07-18 Peter Bergner <bergner@linux.ibm.com>
685 * config/rs6000/dfp.md (trunctdsd2): New define_insn.
686 * config/rs6000/rs6000.md (define_attr "isa"): Add p9.
687 (define_attr "enabled"): Handle p9.
689 2020-07-17 Roger Sayle <roger@nextmovesoftware.com>
691 * function.c (assign_parm_setup_block): Use the macro
692 TRULY_NOOP_TRUNCATION_MODES_P instead of calling
693 targetm.truly_noop_truncation directly.
695 2020-07-17 H.J. Lu <hjl.tools@gmail.com>
699 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
700 (VF1_AVX512ER_128_256): This. Drop DF vector modes.
701 (rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
702 VF1_AVX512ER_128_256.
704 2020-07-17 Tamar Christina <tamar.christina@arm.com>
706 * doc/sourcebuild.texi (dg-set-compiler-env-var,
707 dg-set-target-env-var): Document.
709 2020-07-17 Tamar Christina <tamar.christina@arm.com>
711 * config/arm/driver-arm.c (host_detect_local_cpu): Add GCC_CPUINFO.
713 2020-07-17 Tamar Christina <tamar.christina@arm.com>
715 * config/aarch64/driver-aarch64.c (host_detect_local_cpu):
718 2020-07-17 Tamar Christina <tamar.christina@arm.com>
720 * config/aarch64/driver-aarch64.c (INCLUDE_SET): New.
721 (parse_field): Use std::string.
722 (split_words, readline, find_field): New.
723 (host_detect_local_cpu): Fix truncation issues.
725 2020-07-17 Andrew Stubbs <ams@codesourcery.com>
727 * config/gcn/mkoffload.c (EM_AMDGPU): Undefine before defining.
728 (ELFOSABI_AMDGPU_HSA): Likewise.
729 (ELFABIVERSION_AMDGPU_HSA): Likewise.
730 (EF_AMDGPU_MACH_AMDGCN_GFX803): Likewise.
731 (EF_AMDGPU_MACH_AMDGCN_GFX900): Likewise.
732 (EF_AMDGPU_MACH_AMDGCN_GFX906): Likewise.
735 2020-07-17 Andrew Pinski <apinksi@marvell.com>
736 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
739 * config/aarch64/aarch64.c (aarch64_evpc_ins): New function.
740 (aarch64_expand_vec_perm_const_1): Call it.
741 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_copy_lane): Make
742 public, and add a "@" prefix.
744 2020-07-17 Andrew Pinski <apinksi@marvell.com>
745 Dmitrij Pochepko <dmitrij.pochepko@bell-sw.com>
748 * config/aarch64/aarch64.c (aarch64_evpc_reencode): New function.
749 (aarch64_expand_vec_perm_const_1): Call it.
751 2020-07-17 Zhiheng Xie <xiezhiheng@huawei.com>
753 * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
755 (VAR1): Add new field FLAG in macro.
771 (aarch64_general_fold_builtin): Likewise.
772 (aarch64_general_gimple_fold_builtin): Likewise.
773 * config/aarch64/aarch64-simd-builtins.def: Add default flag for
774 each built-in function.
775 * config/aarch64/geniterators.sh: Add new field in BUILTIN macro.
777 2020-07-17 Andreas Krebbel <krebbel@linux.ibm.com>
780 * config/s390/s390.c (s390_expand_insv): Invoke the movstrict
781 expanders to generate the pattern.
782 * config/s390/s390.md ("*movstricthi", "*movstrictqi"): Remove the
783 '*' to have callable expanders.
785 2020-07-16 Hans-Peter Nilsson <hp@axis.com>
786 Segher Boessenkool <segher@kernel.crashing.org>
789 * combine.c (is_just_move): Take an rtx_insn* as argument. Use
792 2020-07-16 Uroš Bizjak <ubizjak@gmail.com>
795 * config/i386/sync.md
796 (peephole2 to remove unneded compare after CMPXCHG):
797 New pattern, also handle XOR zeroing and load of -1 by OR.
799 2020-07-16 Eric Botcazou <ebotcazou@gcc.gnu.org>
801 * config/i386/i386.c (ix86_compute_frame_layout): Minor tweak.
802 (ix86_adjust_stack_and_probe): Delete.
803 (ix86_adjust_stack_and_probe_stack_clash): Rename to above and add
804 PROTECTION_AREA parameter. If it is true, probe PROBE_INTERVAL plus
805 a small dope beyond SIZE bytes.
806 (ix86_emit_probe_stack_range): Use local variable.
807 (ix86_expand_prologue): Adjust calls to ix86_adjust_stack_and_probe
808 and tidy up the stack checking code.
809 * explow.c (get_stack_check_protect): Fix head comment.
810 (anti_adjust_stack_and_probe_stack_clash): Likewise.
811 (allocate_dynamic_stack_space): Add comment.
812 * tree-nested.c (lookup_field_for_decl): Set the DECL_IGNORED_P and
813 TREE_NO_WARNING but not TREE_ADDRESSABLE flags on the field.
815 2020-07-16 Andrew Stubbs <ams@codesourcery.com>
817 * config/gcn/mkoffload.c: Include simple-object.h and elf.h.
818 (EM_AMDGPU): New macro.
819 (ELFOSABI_AMDGPU_HSA): New macro.
820 (ELFABIVERSION_AMDGPU_HSA): New macro.
821 (EF_AMDGPU_MACH_AMDGCN_GFX803): New macro.
822 (EF_AMDGPU_MACH_AMDGCN_GFX900): New macro.
823 (EF_AMDGPU_MACH_AMDGCN_GFX906): New macro.
824 (R_AMDGPU_NONE): New macro.
825 (R_AMDGPU_ABS32_LO): New macro.
826 (R_AMDGPU_ABS32_HI): New macro.
827 (R_AMDGPU_ABS64): New macro.
828 (R_AMDGPU_REL32): New macro.
829 (R_AMDGPU_REL64): New macro.
830 (R_AMDGPU_ABS32): New macro.
831 (R_AMDGPU_GOTPCREL): New macro.
832 (R_AMDGPU_GOTPCREL32_LO): New macro.
833 (R_AMDGPU_GOTPCREL32_HI): New macro.
834 (R_AMDGPU_REL32_LO): New macro.
835 (R_AMDGPU_REL32_HI): New macro.
836 (reserved): New macro.
837 (R_AMDGPU_RELATIVE64): New macro.
838 (gcn_s1_name): Delete global variable.
839 (gcn_s2_name): Delete global variable.
840 (gcn_o_name): Delete global variable.
841 (gcn_cfile_name): Delete global variable.
842 (files_to_cleanup): New global variable.
843 (offload_abi): New global variable.
844 (tool_cleanup): Use files_to_cleanup, not explicit list.
845 (copy_early_debug_info): New function.
846 (main): New local variables gcn_s1_name, gcn_s2_name, gcn_o_name,
848 Create files_to_cleanup obstack.
849 Recognize -march options.
850 Copy early debug info from input .o files.
852 2020-07-16 Andrea Corallo <andrea.corallo@arm.com>
854 * Makefile.in (TAGS): Remove 'params.def'.
856 2020-07-16 Roger Sayle <roger@nextmovesoftware.com>
858 * target.def (TARGET_TRULY_NOOP_TRUNCATION): Clarify that
859 targets that return false, indicating SUBREGs shouldn't be
860 used, also need to provide a trunc?i?i2 optab that performs this
862 * doc/tm.texi: Regenerate.
864 2020-07-15 Uroš Bizjak <ubizjak@gmail.com>
867 * config/i386/sync.md
868 (peephole2 to remove unneded compare after CMPXCHG): New pattern.
870 2020-07-15 Jakub Jelinek <jakub@redhat.com>
873 * omp-general.h (struct omp_for_data): Rename min_inner_iterations
874 member to first_inner_iterations, adjust comment.
875 * omp-general.c (omp_extract_for_data): Adjust for the above change.
876 Always use n1first and n2first to compute it, rather than depending
877 on single_nonrect_cond_code. Similarly, always compute factor
878 as (m2 - m1) * outer_step / inner_step rather than sometimes m1 - m2
879 depending on single_nonrect_cond_code.
880 * omp-expand.c (expand_omp_for_init_vars): Rename min_inner_iterations
881 to first_inner_iterations and min_inner_iterationsd to
882 first_inner_iterationsd.
884 2020-07-15 Jakub Jelinek <jakub@redhat.com>
887 * config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
888 _mm512_mask_cmpeq_pd_mask, _mm512_cmplt_pd_mask,
889 _mm512_mask_cmplt_pd_mask, _mm512_cmple_pd_mask,
890 _mm512_mask_cmple_pd_mask, _mm512_cmpunord_pd_mask,
891 _mm512_mask_cmpunord_pd_mask, _mm512_cmpneq_pd_mask,
892 _mm512_mask_cmpneq_pd_mask, _mm512_cmpnlt_pd_mask,
893 _mm512_mask_cmpnlt_pd_mask, _mm512_cmpnle_pd_mask,
894 _mm512_mask_cmpnle_pd_mask, _mm512_cmpord_pd_mask,
895 _mm512_mask_cmpord_pd_mask, _mm512_cmpeq_ps_mask,
896 _mm512_mask_cmpeq_ps_mask, _mm512_cmplt_ps_mask,
897 _mm512_mask_cmplt_ps_mask, _mm512_cmple_ps_mask,
898 _mm512_mask_cmple_ps_mask, _mm512_cmpunord_ps_mask,
899 _mm512_mask_cmpunord_ps_mask, _mm512_cmpneq_ps_mask,
900 _mm512_mask_cmpneq_ps_mask, _mm512_cmpnlt_ps_mask,
901 _mm512_mask_cmpnlt_ps_mask, _mm512_cmpnle_ps_mask,
902 _mm512_mask_cmpnle_ps_mask, _mm512_cmpord_ps_mask,
903 _mm512_mask_cmpord_ps_mask): Move outside of __OPTIMIZE__ guarded
906 2020-07-15 Jakub Jelinek <jakub@redhat.com>
909 * builtins.c: Include gimple-ssa.h, tree-ssa-live.h and
911 (expand_expr_force_mode): If exp is a SSA_NAME with different mode
912 from MODE and get_gimple_for_ssa_name is a cast from MODE, use the
915 2020-07-15 Jiufu Guo <guojiufu@cn.ibm.com>
917 * config/rs6000/rs6000.c (rs6000_loop_unroll_adjust): Refine hook.
919 2020-07-14 David Edelsohn <dje.gcc@gmail.com>
921 * config/rs6000/rs6000.md (rotldi3_insert_sf): Add TARGET_POWERPC64
923 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add
924 TARGET_POWERPC64 requirement to TARGET_P8_VECTOR case.
926 2020-07-14 Lewis Hyatt <lhyatt@gmail.com>
928 PR preprocessor/49973
930 * common.opt: Handle -ftabstop here instead of in c-family
931 options. Add -fdiagnostics-column-unit= and
932 -fdiagnostics-column-origin= options.
933 * opts.c (common_handle_option): Handle the new options.
934 * diagnostic-format-json.cc (json_from_expanded_location): Add
935 diagnostic_context argument. Use it to convert column numbers as per
937 (json_from_location_range): Likewise.
938 (json_from_fixit_hint): Likewise.
939 (json_end_diagnostic): Pass the new context argument to helper
940 functions above. Add "column-origin" field to the output.
941 (test_unknown_location): Add the new context argument to calls to
943 (test_bad_endpoints): Likewise.
944 * diagnostic-show-locus.c
945 (exploc_with_display_col::exploc_with_display_col): Support
947 (layout_point::layout_point): Make use of class
948 exploc_with_display_col.
949 (layout_range::layout_range): Likewise.
950 (struct line_bounds): Clarify that the units are now always
951 display columns. Rename members accordingly. Add constructor.
952 (layout::print_source_line): Add support for tab expansion.
953 (make_range): Adapt to class layout_range changes.
954 (layout::maybe_add_location_range): Likewise.
955 (layout::layout): Adapt to class exploc_with_display_col changes.
956 (layout::calculate_x_offset_display): Support tabstop parameter.
957 (layout::print_annotation_line): Adapt to struct line_bounds changes.
958 (layout::print_line): Likewise.
959 (line_label::line_label): Add diagnostic_context argument.
960 (get_affected_range): Likewise.
961 (get_printed_columns): Likewise.
962 (layout::print_any_labels): Adapt to struct line_label changes.
963 (class correction): Add m_tabstop member.
964 (correction::correction): Add tabstop argument.
965 (correction::compute_display_cols): Use m_tabstop.
966 (class line_corrections): Add m_context member.
967 (line_corrections::line_corrections): Add diagnostic_context argument.
968 (line_corrections::add_hint): Use m_context to handle tabstops.
969 (layout::print_trailing_fixits): Adapt to class line_corrections
971 (test_layout_x_offset_display_utf8): Support tabstop parameter.
972 (test_layout_x_offset_display_tab): New selftest.
973 (test_one_liner_colorized_utf8): Likewise.
974 (test_tab_expansion): Likewise.
975 (test_diagnostic_show_locus_one_liner_utf8): Call the new tests.
976 (diagnostic_show_locus_c_tests): Likewise.
977 (test_overlapped_fixit_printing): Adapt to helper class and
979 (test_overlapped_fixit_printing_utf8): Likewise.
980 (test_overlapped_fixit_printing_2): Likewise.
981 * diagnostic.h (enum diagnostics_column_unit): New enum.
982 (struct diagnostic_context): Add members for the new options.
983 (diagnostic_converted_column): Declare.
984 (json_from_expanded_location): Add new context argument.
985 * diagnostic.c (diagnostic_initialize): Initialize new members.
986 (diagnostic_converted_column): New function.
987 (maybe_line_and_column): Be willing to output a column of 0.
988 (diagnostic_get_location_text): Convert column number as per the new
990 (diagnostic_report_current_module): Likewise.
991 (assert_location_text): Add origin and column_unit arguments for
992 testing the new functionality.
993 (test_diagnostic_get_location_text): Test the new functionality.
994 * doc/invoke.texi: Document the new options and behavior.
995 * input.h (location_compute_display_column): Add tabstop argument.
996 * input.c (location_compute_display_column): Likewise.
997 (test_cpp_utf8): Add selftests for tab expansion.
998 * tree-diagnostic-path.cc (default_tree_make_json_for_path): Pass the
999 new context argument to json_from_expanded_location().
1001 2020-07-14 Jakub Jelinek <jakub@redhat.com>
1004 * expr.c (expand_constructor): Don't create temporary for store to
1005 volatile MEM if exp has an addressable type.
1007 2020-07-14 Nathan Sidwell <nathan@acm.org>
1009 * hash-map.h (hash_map::get): Note it is a pointer to value.
1010 * incpath.h (incpath_kind): Align comments.
1012 2020-07-14 Nathan Sidwell <nathan@acm.org>
1014 * tree-core.h (tree_decl_with_vis, tree_function_decl):
1015 Note additional padding on 64-bits
1016 * tree.c (cache_integer_cst): Note why no caching of enum literals.
1017 (get_tree_code_name): Robustify error case.
1019 2020-07-14 Nathan Sidwell <nathan@acm.org>
1021 * doc/gty.texi: Fic gt_cleare_cache name.
1022 * doc/invoke.texi: Remove duplicate opindex Wabi-tag.
1024 2020-07-14 Jakub Jelinek <jakub@redhat.com>
1026 * omp-general.h (struct omp_for_data): Add adjn1 member.
1027 * omp-general.c (omp_extract_for_data): For non-rect loop, punt on
1028 count computing if n1, n2 or step are not INTEGER_CST earlier.
1029 Narrow the outer iterator range if needed so that non-rect loop
1030 has at least one iteration for each outer range iteration. Compute
1032 * omp-expand.c (expand_omp_for_init_vars): Use adjn1 if non-NULL
1033 instead of the outer loop's n1.
1035 2020-07-14 Matthias Klose <doko@ubuntu.com>
1038 * lto-wrapper.c (merge_and_complain): Add decoded options as parameter,
1039 error on different values for -fcf-protection.
1040 (append_compiler_options): Pass -fcf-protection option.
1041 (find_and_merge_options): Add decoded options as parameter,
1042 pass decoded_options to merge_and_complain.
1043 (run_gcc): Pass decoded options to find_and_merge_options.
1044 * lto-opts.c (lto_write_options): Pass -fcf-protection option.
1046 2020-07-13 Alan Modra <amodra@gmail.com>
1048 * config/rs6000/rs6000.md (sibcall_local): Merge sibcall_local32
1049 and sibcall_local64.
1050 (sibcall_value_local): Similarly.
1052 2020-07-13 Nathan Sidwell <nathan@acm.org>
1054 * Makefile.in (distclean): Remove long gone cxxmain.c
1056 2020-07-13 H.J. Lu <hjl.tools@gmail.com>
1059 * config/i386/i386.md (cmpstrnsi): Pass a copy of the string
1060 length to cmpstrnqi patterns.
1062 2020-07-13 Jakub Jelinek <jakub@redhat.com>
1065 * ipa-fnsummary.c (analyze_function_body): Treat NULL bb->aux
1068 2020-07-13 Richard Biener <rguenther@suse.de>
1070 PR tree-optimization/96163
1071 * tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
1072 at least after region begin.
1074 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
1076 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
1077 __ARM_FEATURE_PAC_DEFAULT support.
1079 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
1082 * doc/extend.texi: Update the text for __builtin_return_address.
1084 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
1087 * config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
1088 Disable return address signing if __builtin_eh_return is used.
1090 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com>
1094 * config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
1095 * config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
1096 (aarch64_return_addr): Use aarch64_return_addr_rtx.
1097 * config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
1099 2020-07-13 Richard Sandiford <richard.sandiford@arm.com>
1102 * tree.h (virtual_method_call_p): Add a default-false parameter
1103 that indicates whether the function is being called from dump
1105 (obj_type_ref_class): Likewise.
1106 * tree.c (virtual_method_call_p): Likewise.
1107 * ipa-devirt.c (obj_type_ref_class): Likewise. Lazily add ODR
1108 type information for the type when the parameter is false.
1109 * tree-pretty-print.c (dump_generic_node): Update calls to
1110 virtual_method_call_p and obj_type_ref_class accordingly.
1112 2020-07-13 Julian Brown <julian@codesourcery.com>
1113 Thomas Schwinge <thomas@codesourcery.com>
1115 * gimplify.c (gimplify_scan_omp_clauses): Do not strip
1116 GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
1117 directives (see also PR92929).
1119 2020-07-13 Roger Sayle <roger@nextmovesoftware.com>
1121 * convert.c (convert_to_integer_1): Narrow integer operations
1122 even on targets that require explicit truncation instructions.
1124 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
1127 * config/cris/cris-passes.def: New file.
1128 * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
1129 * config/cris/cris.c: Add infrastructure bits and pass execute
1130 function cris_postdbr_cmpelim.
1131 * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.
1133 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
1135 * config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
1137 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
1140 * config/cris/cris.md ("*add<mode>3_addi"): New splitter.
1141 ("*addi_b_<mode>"): New pattern.
1142 ("*addsi3<setnz>"): Remove stale %-related comment.
1144 2020-07-13 Hans-Peter Nilsson <hp@axis.com>
1146 * config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
1147 Use match_dup in output template, not match_operand.
1149 2020-07-13 Richard Biener <rguenther@suse.de>
1151 * var-tracking.c (bb_heap_node_t): Remove unused typedef.
1152 (vt_find_locations): Eliminate visited bitmap in favor of
1153 RPO order check. Dump statistics about the number of
1154 local BB dataflow computes.
1156 2020-07-13 Richard Biener <rguenther@suse.de>
1159 * expr.c (expand_constructor): Make a temporary also if we're
1160 storing to volatile memory.
1162 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
1164 * config/rs6000/rs6000.md (rotl_unspec): New
1165 define_insn_and_split.
1167 2020-07-13 Xionghu Luo <luoxhu@linux.ibm.com>
1169 * config/rs6000/rs6000.c (rs6000_expand_vector_init):
1170 Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
1172 2020-07-11 Roger Sayle <roger@nextmovesoftware.com>
1174 * internal-fn.c (expand_mul_overflow): When checking for signed
1175 overflow from a widening multiplication, we access the truncated
1176 lowpart RES twice, so keep this value in a pseudo register.
1178 2020-07-11 Richard Sandiford <richard.sandiford@arm.com>
1180 PR tree-optimization/96146
1181 * value-range.cc (value_range::set): Only decompose POLY_INT_CST
1182 bounds to integers for VR_RANGE. Decay to VR_VARYING for anti-ranges
1183 involving POLY_INT_CSTs.
1185 2020-07-10 David Edelsohn <dje.gcc@gmail.com>
1188 * config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
1189 create named section for VAR_DECL or FUNCTION_DECL.
1191 2020-07-10 Joseph Myers <joseph@codesourcery.com>
1193 * glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
1196 2020-07-10 Alexander Popov <alex.popov@linux.com>
1198 * shrink-wrap.c (try_shrink_wrapping): Improve debug output.
1200 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
1203 * expr.c (expand_expr_real_2): When reducing bit fields,
1204 clear the target if it has a different mode from the expression.
1205 (reduce_to_bit_field_precision): Don't do that here. Instead
1206 assert that the target already has the correct mode.
1208 2020-07-10 Richard Sandiford <richard.sandiford@arm.com>
1212 * config/arm/arm.c (arm_attribute_table): Add
1213 "Advanced SIMD type".
1214 (arm_comp_type_attributes): Check that the "Advanced SIMD type"
1215 attributes are equal.
1216 * config/arm/arm-builtins.c: Include stringpool.h and
1218 (arm_mangle_builtin_vector_type): Use the mangling recorded
1219 in the "Advanced SIMD type" attribute.
1220 (arm_init_simd_builtin_types): Add an "Advanced SIMD type"
1221 attribute to each Advanced SIMD type, using the mangled type
1222 as the attribute's single argument.
1224 2020-07-10 Carl Love <cel@us.ibm.com>
1226 * config/rs6000/vsx.md (VSX_MM): New define_mode_iterator.
1227 (VSX_MM4): New define_mode_iterator.
1228 (vec_mtvsrbmi): New define_insn.
1229 (vec_mtvsr_<mode>): New define_insn.
1230 (vec_cntmb_<mode>): New define_insn.
1231 (vec_extract_<mode>): New define_insn.
1232 (vec_expand_<mode>): New define_insn.
1233 (define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
1234 UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
1235 * config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
1236 vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
1238 * config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
1239 (BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
1240 mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
1241 vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
1242 (BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
1243 (BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
1244 mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
1245 (BU_P10_OVERLOAD_2): Add defition for cntm.
1246 * config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
1247 checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
1248 CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
1249 (altivec_overloaded_builtins): Add overloaded argument entries for
1250 P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
1251 P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
1252 P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
1253 P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
1254 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
1255 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
1256 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
1257 P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
1258 P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
1259 P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
1260 (builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
1261 P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
1262 P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
1263 P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
1264 P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
1265 P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
1266 P10_BUILTIN_VEXPANDMQ.
1267 * config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
1268 entries for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
1269 VEXPANDM, VEXTRACTM.
1271 2020-07-10 Bill Seurer, 507-253-3502, seurer@us.ibm.com <(no_default)>
1274 * config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
1275 (altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
1276 v16qi_ftype_pcvoid with correct number of parameters.
1278 2020-07-10 H.J. Lu <hjl.tools@gmail.com>
1281 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
1282 TARGET_AVX512VL when enabling FMA.
1284 2020-07-10 Andrea Corallo <andrea.corallo@arm.com>
1285 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
1286 Iain Apreotesei <iain.apreotesei@arm.com>
1288 * config/arm/arm-protos.h (arm_target_insn_ok_for_lob): New
1290 * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP): Define.
1291 (arm_invalid_within_doloop): Implement invalid_within_doloop hook.
1292 (arm_target_insn_ok_for_lob): New function.
1293 * config/arm/arm.h (TARGET_HAVE_LOB): Define macro.
1294 * config/arm/thumb2.md (*doloop_end_internal, doloop_begin)
1295 (dls_insn): Add new patterns.
1296 (doloop_end): Modify to select LR when LOB is available.
1297 * config/arm/unspecs.md: Add new unspec.
1298 * doc/sourcebuild.texi (arm_v8_1_lob_ok)
1299 (arm_thumb2_ok_no_arm_v8_1_lob): Document new target supports
1302 2020-07-10 Richard Biener <rguenther@suse.de>
1304 PR tree-optimization/96133
1305 * gimple-fold.c (fold_array_ctor_reference): Do not
1306 recurse to folding a CTOR that does not fully cover the
1309 2020-07-10 Cui,Lili <lili.cui@intel.com>
1311 * common/config/i386/cpuinfo.h
1312 (get_intel_cpu): Handle sapphirerapids.
1313 * common/config/i386/i386-common.c
1314 (processor_names): Add sapphirerapids and alderlake.
1315 (processor_alias_table): Add sapphirerapids and alderlake.
1316 * common/config/i386/i386-cpuinfo.h
1317 (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and
1318 INTEL_COREI7_ALDERLAKE.
1319 * config.gcc: Add -march=sapphirerapids and alderlake.
1320 * config/i386/driver-i386.c
1321 (host_detect_local_cpu) Handle sapphirerapids and alderlake.
1322 * config/i386/i386-c.c
1323 (ix86_target_macros_internal): Handle sapphirerapids and alderlake.
1324 * config/i386/i386-options.c
1325 (m_SAPPHIRERAPIDS) : Define.
1326 (m_ALDERLAKE): Ditto.
1327 (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS.
1328 (processor_cost_table): Add sapphirerapids and alderlake.
1329 (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD,
1330 PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK.
1331 * config/i386/i386.h
1332 (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE.
1333 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
1334 PROCESSOR_ALDERLAKE.
1336 (PTA_CLDEMOTE): Ditto.
1337 (PTA_SERIALIZE): Ditto.
1338 (PTA_TSXLDTRK): New.
1339 (PTA_SAPPHIRERAPIDS): Ditto.
1340 (PTA_ALDERLAKE): Ditto.
1341 (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and
1342 PROCESSOR_ALDERLAKE.
1343 * doc/extend.texi: Add sapphirerapids and alderlake.
1344 * doc/invoke.texi: Add sapphirerapids and alderlake.
1346 2020-07-10 Martin Liska <mliska@suse.cz>
1348 * dumpfile.c [profile-report]: Add new profile dump.
1349 * dumpfile.h (enum tree_dump_index): Ad TDI_profile_report.
1350 * passes.c (pass_manager::dump_profile_report): Change stderr
1353 2020-07-10 Kewen Lin <linkw@linux.ibm.com>
1355 * tree-vect-loop.c (vect_transform_loop): Use LOOP_VINFO_NITERS which
1356 is adjusted by considering peeled prologue for non
1357 vect_use_loop_mask_for_alignment_p cases.
1359 2020-07-09 Peter Bergner <bergner@linux.ibm.com>
1362 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Define the MMA
1363 specific types __vector_quad and __vector_pair, and initialize the
1364 MMA built-ins if TARGET_EXTRA_BUILTINS is set.
1365 (mma_init_builtins): Don't test for mask set in rs6000_builtin_mask.
1366 Remove now unneeded mask variable.
1367 * config/rs6000/rs6000.c (rs6000_option_override_internal): Add the
1368 OPTION_MASK_MMA flag for power10 if not already set.
1370 2020-07-09 Richard Biener <rguenther@suse.de>
1372 PR tree-optimization/96133
1373 * tree-vect-slp.c (vect_build_slp_tree_1): Compare load_p
1374 status between stmts.
1376 2020-07-09 H.J. Lu <hjl.tools@gmail.com>
1379 * config/i386/i386-expand.c (ix86_emit_swsqrtsf): Enable FMA.
1380 * config/i386/sse.md (VF_AVX512VL_VF1_128_256): New.
1381 (rsqrt<mode>2): Replace VF1_128_256 with VF_AVX512VL_VF1_128_256.
1382 (rsqrtv16sf2): Removed.
1384 2020-07-09 Richard Biener <rguenther@suse.de>
1386 * tree-vectorizer.h (vect_verify_datarefs_alignment): Remove.
1387 (vect_slp_analyze_and_verify_instance_alignment): Rename to ...
1388 (vect_slp_analyze_instance_alignment): ... this.
1389 * tree-vect-data-refs.c (verify_data_ref_alignment): Remove.
1390 (vect_verify_datarefs_alignment): Likewise.
1391 (vect_enhance_data_refs_alignment): Do not call
1392 vect_verify_datarefs_alignment.
1393 (vect_slp_analyze_node_alignment): Rename from
1394 vect_slp_analyze_and_verify_node_alignment and do not
1395 call verify_data_ref_alignment.
1396 (vect_slp_analyze_instance_alignment): Rename from
1397 vect_slp_analyze_and_verify_instance_alignment.
1398 * tree-vect-stmts.c (vectorizable_store): Dump when
1399 we vectorize an unaligned access.
1400 (vectorizable_load): Likewise.
1401 * tree-vect-loop.c (vect_analyze_loop_2): Do not call
1402 vect_verify_datarefs_alignment.
1403 * tree-vect-slp.c (vect_slp_analyze_bb_1): Adjust.
1405 2020-07-09 Bin Cheng <bin.cheng@linux.alibaba.com>
1407 PR tree-optimization/95804
1408 * tree-loop-distribution.c (break_alias_scc_partitions): Force
1409 negative post order to reduction partition.
1411 2020-07-09 Jakub Jelinek <jakub@redhat.com>
1413 * omp-general.h (struct omp_for_data): Add min_inner_iterations
1415 * omp-general.c (omp_extract_for_data): Initialize them and remember
1416 them in OMP_CLAUSE_COLLAPSE_COUNT if needed and restore from there.
1417 * omp-expand.c (expand_omp_for_init_counts): Fix up computation of
1418 counts[fd->last_nonrect] if fd->loop.n2 is INTEGER_CST.
1419 (expand_omp_for_init_vars): For
1420 fd->first_nonrect + 1 == fd->last_nonrect loops with for now
1421 INTEGER_CST fd->loop.n2 find quadratic equation roots instead of
1422 using fallback method when possible.
1424 2020-07-09 Omar Tahir <omar.tahir@arm.com>
1426 * ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
1427 last_moveable_pseudo before returning.
1429 2020-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com>
1431 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
1432 __ARM_FEATURE_BTI_DEFAULT support.
1434 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
1436 * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm):
1438 * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new
1439 stub registers class.
1440 (aarch64_class_max_nregs): Likewise.
1441 (aarch64_register_move_cost): Likewise.
1442 (aarch64_sls_shared_thunks): Global array to store stub labels.
1443 (aarch64_sls_emit_function_stub): New.
1444 (aarch64_create_blr_label): New.
1445 (aarch64_sls_emit_blr_function_thunks): New.
1446 (aarch64_sls_emit_shared_blr_thunks): New.
1447 (aarch64_asm_file_end): New.
1448 (aarch64_indirect_call_asm): New.
1449 (TARGET_ASM_FILE_END): Use aarch64_asm_file_end.
1450 (TARGET_ASM_FUNCTION_EPILOGUE): Use
1451 aarch64_sls_emit_blr_function_thunks.
1452 * config/aarch64/aarch64.h (STB_REGNUM_P): New.
1453 (enum reg_class): Add STUB_REGS class.
1454 (machine_function): Introduce `call_via` array for
1455 function-local stub labels.
1456 * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use
1457 aarch64_indirect_call_asm to emit code when hardening BLR
1459 * config/aarch64/constraints.md (Ucr): New constraint
1460 representing registers for indirect calls. Is GENERAL_REGS
1461 usually, and STUB_REGS when hardening BLR instruction against
1463 * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class
1464 is also a general register.
1466 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
1468 * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New.
1469 * config/aarch64/aarch64.c (aarch64_output_casesi): Emit
1470 speculation barrier after BR instruction if needs be.
1471 (aarch64_trampoline_init): Handle ptr_mode value & adjust size
1473 (aarch64_sls_barrier): New.
1474 (aarch64_asm_trampoline_template): Add needed barriers.
1475 * config/aarch64/aarch64.h (AARCH64_ISA_SB): New.
1477 (TRAMPOLINE_SIZE): Account for barrier.
1478 * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch,
1479 simple_return, *do_return, *sibcall_insn, *sibcall_value_insn):
1480 Emit barrier if needs be, also account for possible barrier using
1481 "sls_length" attribute.
1482 (sls_length): New attribute.
1483 (length): Determine default using any non-default sls_length
1486 2020-07-09 Matthew Malcomson <matthew.malcomson@arm.com>
1488 * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p):
1490 (aarch64_harden_sls_blr_p): New.
1491 * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type):
1493 (aarch64_harden_sls_retbr_p): New.
1494 (aarch64_harden_sls_blr_p): New.
1495 (aarch64_validate_sls_mitigation): New.
1496 (aarch64_override_options): Parse options for SLS mitigation.
1497 * config/aarch64/aarch64.opt (-mharden-sls): New option.
1498 * doc/invoke.texi: Document new option.
1500 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
1502 * tree-vect-stmts.c (vectorizable_condition): Prohibit vectorization
1503 with partial vectors explicitly excepting for EXTRACT_LAST_REDUCTION
1504 or nested-cycle reduction.
1506 2020-07-09 Kewen Lin <linkw@linux.ibm.com>
1508 * tree-vect-loop.c (vect_analyze_loop_2): Update dumping string
1509 for fully masking to be more common.
1511 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
1513 * config/riscv/riscv.md (get_thread_pointer<mode>): New.
1515 * doc/extend.texi (Target Builtins): Add RISC-V built-in section.
1516 Document __builtin_thread_pointer.
1518 2020-07-09 Kito Cheng <kito.cheng@sifive.com>
1520 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
1521 Abort if any arguments on stack.
1523 2020-07-08 Eric Botcazou <ebotcazou@gcc.gnu.org>
1525 * gimple-fold.c (gimple_fold_builtin_memory_op): Do not fold if
1526 either type has reverse scalar storage order.
1527 * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not propagate through
1528 a memory copy if either type has reverse scalar storage order.
1530 2020-07-08 Tobias Burnus <tobias@codesourcery.com>
1532 * config/gcn/mkoffload.c (compile_native, main): Pass -fPIC/-fpic
1533 on to the native compiler, if used.
1534 * config/nvptx/mkoffload.c (compile_native, main): Likewise.
1536 2020-07-08 Will Schmidt <will_schmidt@vnet.ibm.com>
1538 * config/rs6000/altivec.h (vec_vmsumudm): New define.
1539 * config/rs6000/altivec.md (UNSPEC_VMSUMUDM): New unspec.
1540 (altivec_vmsumudm): New define_insn.
1541 * config/rs6000/rs6000-builtin.def (altivec_vmsumudm): New BU_ALTIVEC_3
1542 entry. (vmsumudm): New BU_ALTIVEC_OVERLOAD_3 entry.
1543 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add entries for
1544 ALTIVEC_BUILTIN_VMSUMUDM variants of vec_msum.
1545 * doc/extend.texi: Add document for vmsumudm behind vmsum.
1547 2020-07-08 Richard Biener <rguenther@suse.de>
1549 * tree-vect-stmts.c (get_group_load_store_type): Pass
1550 in the SLP node and the alignment support scheme output.
1552 (get_load_store_type): Likewise.
1553 (vectorizable_store): Adjust.
1554 (vectorizable_load): Likewise.
1556 2020-07-08 Richard Sandiford <richard.sandiford@arm.com>
1559 * expr.c (expand_expr_real_2): Get the mode from the type rather
1560 than the rtx, and assert that it is consistent with the mode of
1561 the rtx (where known). Optimize all constant integers, not just
1562 those that can be represented in poly_int64.
1564 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
1566 * config/rs6000/vsx.md (len_load_v16qi): New define_expand.
1567 (len_store_v16qi): Likewise.
1569 2020-07-08 Kewen Lin <linkw@linux.ibm.com>
1571 * doc/md.texi (len_load_@var{m}): Document.
1572 (len_store_@var{m}): Likewise.
1573 * internal-fn.c (len_load_direct): New macro.
1574 (len_store_direct): Likewise.
1575 (expand_len_load_optab_fn): Likewise.
1576 (expand_len_store_optab_fn): Likewise.
1577 (direct_len_load_optab_supported_p): Likewise.
1578 (direct_len_store_optab_supported_p): Likewise.
1579 (expand_mask_load_optab_fn): New macro. Original renamed to ...
1580 (expand_partial_load_optab_fn): ... here. Add handlings for
1582 (expand_mask_store_optab_fn): New macro. Original renamed to ...
1583 (expand_partial_store_optab_fn): ... here. Add handlings for
1585 (internal_load_fn_p): Handle IFN_LEN_LOAD.
1586 (internal_store_fn_p): Handle IFN_LEN_STORE.
1587 (internal_fn_stored_value_index): Handle IFN_LEN_STORE.
1588 * internal-fn.def (LEN_LOAD): New internal function.
1589 (LEN_STORE): Likewise.
1590 * optabs.def (len_load_optab, len_store_optab): New optab.
1592 2020-07-07 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
1594 * config/aarch64/aarch64.c (thunderx2t99_regmove_cost,
1595 thunderx2t99_vector_cost): Likewise.
1597 2020-07-07 Richard Biener <rguenther@suse.de>
1599 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Fix
1600 group overlap condition to allow negative step DR groups.
1601 * tree-vect-stmts.c (get_group_load_store_type): For
1602 multi element SLP groups force VMAT_STRIDED_SLP when the step
1605 2020-07-07 Qian Jianhua <qianjh@cn.fujitsu.com>
1607 * doc/generic.texi: Fix typo.
1609 2020-07-07 Richard Biener <rguenther@suse.de>
1611 * lto-streamer-out.c (cmp_symbol_files): Use the computed
1612 order map to sort symbols from the same sub-file together.
1613 (lto_output): Compute a map of sub-file to an order number
1614 it appears in the symbol output array.
1616 2020-07-06 Richard Biener <rguenther@suse.de>
1618 PR tree-optimization/96075
1619 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Use
1620 TYPE_SIZE_UNIT of the vector component type instead of DR_STEP
1621 for the misalignment calculation for negative step.
1623 2020-07-06 Roger Sayle <roger@nextmovesoftware.com>
1625 * config/nvptx/nvptx.md (*vadd_addsi4): New instruction.
1626 (*vsub_addsi4): New instruction.
1628 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
1630 * config/cris/cris.md (movulsr): New peephole2.
1632 2020-07-06 Hans-Peter Nilsson <hp@axis.com>
1634 * config/cris/sync.md ("cris_atomic_fetch_<atomic_op_name><mode>_1"):
1635 Correct gcc_assert of overlapping operands.
1637 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
1639 * config/cris/cris.c (cris_select_cc_mode): Always return
1640 CC_NZmode for matching comparisons. Clarify comments.
1641 * config/cris/cris-modes.def: Clarify mode comment.
1642 * config/cris/cris.md (plusminus, plusminusumin, plusumin): New
1644 (addsub, addsubbo, nd): New code iterator attributes.
1645 ("*<addsub><su>qihi"): Rename from "*extopqihi". Use code
1646 iterator constructs instead of match_operator constructs.
1647 ("*<addsubbo><su><nd><mode>si<setnz>"): Similar from
1648 "*extop<mode>si<setnz>".
1649 ("*add<su>qihi_swap"): Similar from "*addxqihi_swap".
1650 ("*<addsubbo><su><nd><mode>si<setnz>_swap"): Similar from
1651 "*extop<mode>si<setnz>_swap".
1653 2020-07-05 Hans-Peter Nilsson <hp@axis.com>
1655 * config/cris/cris.md ("*extopqihi", "*extop<mode>si<setnz>_swap")
1656 ("*extop<mode>si<setnz>", "*addxqihi_swap"): Reinstate.
1658 2020-07-03 Eric Botcazou <ebotcazou@gcc.gnu.org>
1660 * gimple-fold.c (gimple_fold_builtin_memory_op): Fold calls that
1661 were initially created for the assignment of a variable-sized
1662 object and whose source is now a string constant.
1663 * gimple-ssa-store-merging.c (struct merged_store_group): Document
1664 STRING_CST for rhs_code field.
1665 Add string_concatenation boolean field.
1666 (merged_store_group::merged_store_group): Initialize it as well as
1668 (merged_store_group::do_merge): Set it upon seeing a STRING_CST.
1669 Also set bit_insertion here upon seeing a BIT_INSERT_EXPR.
1670 (merged_store_group::apply_stores): Clear it for small regions.
1671 Do not create a power-of-2-sized buffer if it is still true.
1672 And do not set bit_insertion here again.
1673 (encode_tree_to_bitpos): Deal with BLKmode for the expression.
1674 (merged_store_group::can_be_merged_into): Deal with STRING_CST.
1675 (imm_store_chain_info::coalesce_immediate_stores): Set bit_insertion
1676 to true after changing MEM_REF stores into BIT_INSERT_EXPR stores.
1677 (count_multiple_uses): Return 0 for STRING_CST.
1678 (split_group): Do not split the group for a string concatenation.
1679 (imm_store_chain_info::output_merged_store): Constify and rename
1680 some local variables. Build an array type as destination type
1681 for a string concatenation, as well as a zero mask, and call
1682 build_string to build the source.
1683 (lhs_valid_for_store_merging_p): Return true for VIEW_CONVERT_EXPR.
1684 (pass_store_merging::process_store): Accept STRING_CST on the RHS.
1685 * gimple.h (gimple_call_alloca_for_var_p): New accessor function.
1686 * gimplify.c (gimplify_modify_expr_to_memcpy): Set alloca_for_var.
1687 * tree.h (CALL_ALLOCA_FOR_VAR_P): Document it for BUILT_IN_MEMCPY.
1689 2020-07-03 Martin Jambor <mjambor@suse.cz>
1692 * ipa-sra.c (all_callee_accesses_present_p): Do not accept type
1693 mismatched accesses.
1695 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
1697 * config/nvptx/nvptx.md (popcount<mode>2): New instructions.
1698 (mulhishi3, mulsidi3, umulhisi3, umulsidi3): New instructions.
1700 2020-07-03 Martin Liska <mliska@suse.cz>
1701 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1704 * gcov-dump.c (tag_function): Use gcov_position_t
1707 2020-07-03 Richard Biener <rguenther@suse.de>
1709 PR tree-optimization/96037
1710 * tree-vect-stmts.c (vect_is_simple_use): Initialize *slp_def.
1712 2020-07-03 Richard Biener <rguenther@suse.de>
1714 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Cost the
1715 original non-pattern stmts, look at the pattern stmt
1716 vectorization status.
1718 2020-07-03 Andrew Stubbs <ams@codesourcery.com>
1720 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): New.
1722 2020-07-03 Richard Biener <rguenther@suse.de>
1724 * tree-vectorizer.h (vec_info::insert_on_entry): New.
1725 (vec_info::insert_seq_on_entry): Likewise.
1726 * tree-vectorizer.c (vec_info::insert_on_entry): Implement.
1727 (vec_info::insert_seq_on_entry): Likewise.
1728 * tree-vect-stmts.c (vect_init_vector_1): Use
1729 vec_info::insert_on_entry.
1730 (vect_finish_stmt_generation): Set modified bit after
1732 * tree-vect-slp.c (vect_create_constant_vectors): Simplify
1733 by using vec_info::insert_seq_on_entry and bypassing
1735 (vect_schedule_slp_instance): Deal with all-constant
1738 2020-07-03 Roger Sayle <roger@nextmovesoftware.com>
1739 Tom de Vries <tdevries@suse.de>
1742 * config/nvptx/nvptx.c (nvptx_vector_alignment): Use tree_to_uhwi
1743 to access TYPE_SIZE (type). Return at least the mode's alignment.
1745 2020-07-02 Richard Biener <rguenther@suse.de>
1747 PR tree-optimization/96028
1748 * tree-vect-slp.c (vect_slp_convert_to_external): Make sure
1749 we have scalar stmts to use.
1750 (vect_slp_analyze_node_operations): When analyzing a child
1751 failed try externalizing the parent node.
1753 2020-07-02 Martin Jambor <mjambor@suse.cz>
1756 * ipa-param-manipulation.c (ipa_param_adjustments::modify_call): Adjust
1757 argument index if necessary.
1759 2020-07-02 Martin Liska <mliska@suse.cz>
1762 * tree-vect-generic.c (expand_vector_condition): Forward declaration.
1763 (expand_vector_comparison): Do not expand a comparison if all
1764 uses are consumed by a VEC_COND_EXPR.
1765 (expand_vector_operation): Change void return type to bool.
1766 (expand_vector_operations_1): Pass dce_ssa_names.
1768 2020-07-02 Ilya Leoshkevich <iii@linux.ibm.com>
1771 * system.h (NULL): Redefine to nullptr.
1773 2020-07-02 Jakub Jelinek <jakub@redhat.com>
1775 PR tree-optimization/95857
1776 * tree-cfg.c (group_case_labels_stmt): When removing an unreachable
1777 base_bb, remember all forced and non-local labels on it and later
1778 treat those as if they have NULL label_to_block. Formatting fix.
1781 2020-07-02 Richard Biener <rguenther@suse.de>
1783 PR tree-optimization/96022
1784 * tree-vect-stmts.c (vectorizable_shift): Only use the
1785 first vector stmt when extracting the scalar shift amount.
1786 * tree-vect-slp.c (vect_build_slp_tree_2): Also build unary
1787 nodes with all-scalar children from scalars but not stores.
1788 (vect_analyze_slp_instance): Mark the node not failed.
1790 2020-07-02 Felix Yang <felix.yang@huawei.com>
1792 PR tree-optimization/95961
1793 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Use the
1794 number of scalars instead of the number of vectors as an upper bound
1795 for the loop saving info about DR in the hash table. Remove unused
1798 2020-07-02 Jakub Jelinek <jakub@redhat.com>
1800 * omp-expand.c (expand_omp_for): Diagnose non-rectangular loops with
1801 invalid steps - ((m2 - m1) * incr_outer) % incr must be 0 in valid
1802 OpenMP non-rectangular loops. Use XALLOCAVEC.
1804 2020-07-02 Martin Liska <mliska@suse.cz>
1806 PR gcov-profile/95348
1807 * coverage.c (read_counts_file): Read only COUNTERS that are
1809 * gcov-dump.c (tag_function): Change signature from unsigned to
1811 (tag_blocks): Likewise.
1812 (tag_arcs): Likewise.
1813 (tag_lines): Likewise.
1814 (tag_counters): Likewise.
1815 (tag_summary): Likewise.
1816 * gcov.c (read_count_file): Read all non-zero counters
1819 2020-07-02 Kito Cheng <kito.cheng@sifive.com>
1821 * config/riscv/multilib-generator (arch_canonicalize): Handle
1822 multi-letter extension.
1823 Using underline as separator between different extensions.
1825 2020-07-01 Pip Cet <pipcet@gmail.com>
1827 * spellcheck.c (test_data): Add problematic strings.
1828 (test_metric_conditions): Don't test the triangle inequality
1829 condition, which our distance function does not satisfy.
1831 2020-07-01 Omar Tahir <omar.tahir@arm.com>
1833 * config/aarch64/aarch64.c (aarch64_asm_trampoline_template): Always
1834 generate a BTI instruction.
1836 2020-07-01 Jeff Law <law@redhat.com>
1838 PR tree-optimization/94882
1839 * match.pd (x & y) - (x | y) - 1 -> ~(x ^ y): New simplification.
1841 2020-07-01 Jeff Law <law@redhat.com>
1843 * config/m68k/m68k.c (m68k_output_btst): Drop "register" keyword.
1844 (emit_move_sequence, output_iorsi3, output_xorsi3): Likewise.
1846 2020-07-01 Andrea Corallo <andrea.corallo@arm.com>
1848 * config/aarch64/aarch64-builtins.c (aarch64_builtins): Add enums
1849 for 64bits fpsr/fpcr getter setters builtin variants.
1850 (aarch64_init_fpsr_fpcr_builtins): New function.
1851 (aarch64_general_init_builtins): Modify to make use of the later.
1852 (aarch64_expand_fpsr_fpcr_setter): New function.
1853 (aarch64_general_expand_builtin): Modify to make use of the later.
1854 * config/aarch64/aarch64.md (@aarch64_set_<fpscr_name><GPI:mode>)
1855 (@aarch64_get_<fpscr_name><GPI:mode>): New patterns replacing and
1856 generalizing 'get_fpcr', 'set_fpsr'.
1857 * config/aarch64/iterators.md (GET_FPSCR, SET_FPSCR): New int
1859 (fpscr_name): New int attribute.
1860 * doc/extend.texi (__builtin_aarch64_get_fpcr64)
1861 (__builtin_aarch64_set_fpcr64, __builtin_aarch64_get_fpsr64)
1862 (__builtin_aarch64_set_fpsr64): Add into AArch64 Built-in
1865 2020-07-01 Martin Liska <mliska@suse.cz>
1867 * gcov.c (print_usage): Avoid trailing space for -j option.
1869 2020-07-01 Richard Biener <rguenther@suse.de>
1871 PR tree-optimization/95839
1872 * tree-vect-slp.c (vect_slp_tree_uniform_p): Pre-existing
1873 vectors are not uniform.
1874 (vect_build_slp_tree_1): Handle BIT_FIELD_REFs of
1876 (vect_build_slp_tree_2): For groups of lane extracts
1877 from a vector register generate a permute node
1878 with a special child representing the pre-existing vector.
1879 (vect_prologue_cost_for_slp): Pre-existing vectors cost nothing.
1880 (vect_slp_analyze_node_operations): Use SLP_TREE_LANES.
1881 (vectorizable_slp_permutation): Do not generate or cost identity
1883 (vect_schedule_slp_instance): Handle pre-existing vector
1884 that are function arguments.
1886 2020-07-01 Richard Biener <rguenther@suse.de>
1888 * system.h (INCLUDE_ISL): New guarded include.
1889 * graphite-dependences.c: Use it.
1890 * graphite-isl-ast-to-gimple.c: Likewise.
1891 * graphite-optimize-isl.c: Likewise.
1892 * graphite-poly.c: Likewise.
1893 * graphite-scop-detection.c: Likewise.
1894 * graphite-sese-to-poly.c: Likewise.
1895 * graphite.c: Likewise.
1896 * graphite.h: Drop the includes here.
1898 2020-07-01 Martin Liska <mliska@suse.cz>
1900 * gcov.c (print_usage): Shorted option description for -j
1903 2020-07-01 Martin Liska <mliska@suse.cz>
1905 * doc/gcov.texi: Rename 2 options.
1906 * gcov.c (print_usage): Rename -i,--json-format to
1907 -j,--json-format and -j,--human-readable to -H,--human-readable.
1908 (process_args): Fix up parsing. Document obsolete options and
1909 how are they changed.
1911 2020-07-01 Jeff Law <law@redhat.com>
1913 * config/pa/pa.c (pa_emit_move_sequence): Drop register keyword.
1914 (pa_output_ascii): Likewise.
1916 2020-07-01 Kito Cheng <kito.cheng@sifive.com>
1918 * common/config/riscv/riscv-common.c (riscv_subset_t): New field
1920 (riscv_subset_list::parsing_subset_version): Add parameter for
1921 indicate explicitly version, and handle explicitly version.
1922 (riscv_subset_list::handle_implied_ext): Ditto.
1923 (riscv_subset_list::add): Ditto.
1924 (riscv_subset_t::riscv_subset_t): Init new field.
1925 (riscv_subset_list::to_string): Always output version info if version
1926 explicitly specified.
1927 (riscv_subset_list::parsing_subset_version): Handle explicitly
1929 (riscv_subset_list::parse_std_ext): Ditto.
1930 (riscv_subset_list::parse_multiletter_ext): Ditto.
1932 2020-06-30 Richard Sandiford <richard.sandiford@arm.com>
1936 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
1937 "Advanced SIMD type".
1938 (aarch64_comp_type_attributes): Check that the "Advanced SIMD type"
1939 attributes are equal.
1940 * config/aarch64/aarch64-builtins.c: Include stringpool.h and
1942 (aarch64_mangle_builtin_vector_type): Use the mangling recorded
1943 in the "Advanced SIMD type" attribute.
1944 (aarch64_init_simd_builtin_types): Add an "Advanced SIMD type"
1945 attribute to each Advanced SIMD type, using the mangled type
1946 as the attribute's single argument.
1948 2020-06-30 Christophe Lyon <christophe.lyon@linaro.org>
1951 * config/arm/arm.c (arm_handle_isr_attribute): Warn if
1952 -mgeneral-regs-only is not used.
1954 2020-06-30 Yang Yang <yangyang305@huawei.com>
1956 PR tree-optimization/95855
1957 * gimple-ssa-split-paths.c (is_feasible_trace): Add extra
1958 checks to recognize a missed if-conversion opportunity when
1959 judging whether to duplicate a block.
1961 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
1963 * doc/extend.texi: Change references to "future architecture" to
1964 "ISA 3.1", "-mcpu=future" to "-mcpu=power10", and remove vaguer
1965 references to "future" (because the future is now).
1967 2020-06-29 Segher Boessenkool <segher@kernel.crashing.org>
1969 * config/rs6000/rs6000.md (isa): Rename "fut" to "p10".
1971 2020-06-29 Roger Sayle <roger@nextmovesoftware.com>
1973 * simplify-rtx.c (simplify_distributive_operation): New function
1974 to un-distribute a binary operation of two binary operations.
1975 (X & C) ^ (Y & C) to (X ^ Y) & C, when C is simple (i.e. a constant).
1976 (simplify_binary_operation_1) <IOR, XOR, AND>: Call it from here
1978 (test_scalar_int_ops): New function for unit self-testing
1979 scalar integer transformations in simplify-rtx.c.
1980 (test_scalar_ops): Call test_scalar_int_ops for each integer mode.
1981 (simplify_rtx_c_tests): Call test_scalar_ops.
1983 2020-06-29 Richard Biener <rguenther@suse.de>
1985 PR tree-optimization/95916
1986 * tree-vect-slp.c (vect_schedule_slp_instance): Explicitely handle
1987 the case of not vectorized externals.
1989 2020-06-29 Richard Biener <rguenther@suse.de>
1991 * tree-vectorizer.h: Do not include <utility>.
1993 2020-06-29 Martin Liska <mliska@suse.cz>
1995 * tree-ssa-ccp.c (gsi_prev_dom_bb_nondebug): Use gsi_bb
1996 instead of gimple_stmt_iterator::bb.
1997 * tree-ssa-math-opts.c (insert_reciprocals): Likewise.
1998 * tree-vectorizer.h: Likewise.
2000 2020-06-29 Andrew Stubbs <ams@codesourcery.com>
2002 * config/gcn/gcn-hsa.h (DBX_REGISTER_NUMBER): New macro.
2003 * config/gcn/gcn-protos.h (gcn_dwarf_register_number): New prototype.
2004 * config/gcn/gcn.c (gcn_expand_prologue): Add RTX_FRAME_RELATED_P
2005 and REG_FRAME_RELATED_EXPR to stack and frame pointer adjustments.
2006 (gcn_dwarf_register_number): New function.
2007 (gcn_dwarf_register_span): New function.
2008 (TARGET_DWARF_REGISTER_SPAN): New hook macro.
2010 2020-06-29 Kaipeng Zhou <zhoukaipeng3@huawei.com>
2012 PR tree-optimization/95854
2013 * gimple-ssa-store-merging.c (find_bswap_or_nop_1): Return NULL
2014 if operand 1 or 2 of a BIT_FIELD_REF cannot be converted to
2015 unsigned HOST_WIDE_INT.
2017 2020-06-29 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2019 * config/sparc/sparc.c (epilogue_renumber): Remove register.
2020 (sparc_print_operand_address): Likewise.
2021 (sparc_type_code): Likewise.
2022 (set_extends): Likewise.
2024 2020-06-29 Martin Liska <mliska@suse.cz>
2026 PR tree-optimization/92860
2027 * optc-save-gen.awk: Add exceptions for arc target.
2029 2020-06-29 Frederik Harwath <frederik@codesourcery.com>
2031 * doc/sourcebuild.texi: Describe globbing of the
2032 dump file scanning commands "suffix" argument.
2034 2020-06-28 Martin Sebor <msebor@redhat.com>
2037 * calls.c (maybe_warn_rdwr_sizes): Use location of argument if
2039 * tree-ssa-ccp.c (pass_post_ipa_warn::execute): Same. Adjust
2041 * tree.c (get_nonnull_args): Consider the this pointer implicitly
2043 * var-tracking.c (deps_vec): New type.
2044 (var_loc_dep_vec): New function.
2045 (VAR_LOC_DEP_VEC): Use it.
2047 2020-06-28 Kewen Lin <linkw@linux.ibm.com>
2049 * internal-fn.c (direct_mask_load_optab_supported_p): Use
2050 convert_optab_supported_p instead of direct_optab_supported_p.
2051 (direct_mask_store_optab_supported_p): Likewise.
2053 2020-06-27 Aldy Hernandez <aldyh@redhat.com>
2055 * gimple-ssa-evrp-analyze.h (vrp_visit_cond_stmt): Use
2056 simplify_using_ranges class.
2057 * gimple-ssa-evrp.c (class evrp_folder): New simplify_using_ranges
2058 field. Adjust all methods to use new field.
2059 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Use
2060 simplify_using_ranges class.
2061 * tree-vrp.c (class vrp_folder): New simplify_using_ranges
2062 field. Adjust all methods to use new field.
2063 (simplify_stmt_for_jump_threading): Use simplify_using_ranges class.
2064 (vrp_prop::vrp_finalize): New vrp_folder argument.
2065 (execute_vrp): Pass folder to vrp_finalize. Use
2066 simplify_using_ranges class.
2067 Remove cleanup_edges_and_switches call.
2068 * vr-values.c (vr_values::op_with_boolean_value_range_p): Change
2069 value_range_equiv uses to value_range.
2070 (simplify_using_ranges::op_with_boolean_value_range_p): Use
2071 simplify_using_ranges class.
2072 (check_for_binary_op_overflow): Make static.
2073 (vr_values::extract_range_basic): Pass this to
2074 check_for_binary_op_overflow.
2075 (compare_range_with_value): Change value_range_equiv uses to
2077 (vr_values::vr_values): Initialize simplifier field.
2078 Remove uses of to_remove_edges and to_update_switch_stmts.
2079 (vr_values::~vr_values): Remove uses of to_remove_edges and
2080 to_update_switch_stmts.
2081 (vr_values::get_vr_for_comparison): Move to simplify_using_ranges
2083 (vr_values::compare_name_with_value): Same.
2084 (vr_values::compare_names): Same.
2085 (vr_values::vrp_evaluate_conditional_warnv_with_ops): Same.
2086 (vr_values::vrp_evaluate_conditional): Same.
2087 (vr_values::vrp_visit_cond_stmt): Same.
2088 (find_case_label_ranges): Change value_range_equiv uses to
2090 (vr_values::extract_range_from_stmt): Use simplify_using_ranges class.
2091 (vr_values::simplify_truth_ops_using_ranges): Move to
2092 simplify_using_ranges class.
2093 (vr_values::simplify_div_or_mod_using_ranges): Same.
2094 (vr_values::simplify_min_or_max_using_ranges): Same.
2095 (vr_values::simplify_abs_using_ranges): Same.
2096 (vr_values::simplify_bit_ops_using_ranges): Same.
2097 (test_for_singularity): Change value_range_equiv uses to
2099 (range_fits_type_p): Same.
2100 (vr_values::simplify_cond_using_ranges_1): Same.
2101 (vr_values::simplify_cond_using_ranges_2): Make extern.
2102 (vr_values::fold_cond): Move to simplify_using_ranges class.
2103 (vr_values::simplify_switch_using_ranges): Same.
2104 (vr_values::cleanup_edges_and_switches): Same.
2105 (vr_values::simplify_float_conversion_using_ranges): Same.
2106 (vr_values::simplify_internal_call_using_ranges): Same.
2107 (vr_values::two_valued_val_range_p): Same.
2108 (vr_values::simplify_stmt_using_ranges): Move to...
2109 (simplify_using_ranges::simplify): ...here.
2110 * vr-values.h (class vr_values): Move all the simplification of
2111 statements using ranges methods and code from here...
2112 (class simplify_using_ranges): ...to here.
2113 (simplify_cond_using_ranges_2): New extern prototype.
2115 2020-06-27 Jakub Jelinek <jakub@redhat.com>
2117 * omp-general.h (struct omp_for_data_loop): Add non_rect_referenced
2118 member, move outer member.
2119 (struct omp_for_data): Add first_nonrect and last_nonrect members.
2120 * omp-general.c (omp_extract_for_data): Initialize first_nonrect,
2121 last_nonrect and non_rect_referenced members.
2122 * omp-expand.c (expand_omp_for_init_counts): Handle non-rectangular
2124 (expand_omp_for_init_vars): Add nonrect_bounds parameter. Handle
2125 non-rectangular loops.
2126 (extract_omp_for_update_vars): Likewise.
2127 (expand_omp_for_generic, expand_omp_for_static_nochunk,
2128 expand_omp_for_static_chunk, expand_omp_simd,
2129 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Adjust
2130 expand_omp_for_init_vars and extract_omp_for_update_vars callers.
2131 (expand_omp_for): Don't sorry on non-composite worksharing-loop or
2134 2020-06-26 H.J. Lu <hjl.tools@gmail.com>
2137 * config/i386/gnu-user.h (SUBTARGET_FRAME_POINTER_REQUIRED):
2139 * config/i386/i386.c (ix86_frame_pointer_required): Update
2142 2020-06-26 Yichao Yu <yyc1992@gmail.com>
2144 * multiple_target.c (redirect_to_specific_clone): Fix tests
2145 to check individual attribute rather than an attribute list.
2147 2020-06-26 Peter Bergner <bergner@linux.ibm.com>
2149 * config/rs6000/rs6000-call.c (cpu_is_info) <power10>: New.
2150 * doc/extend.texi (PowerPC Built-in Functions): Document power10,
2153 2020-06-26 Marek Polacek <polacek@redhat.com>
2155 * doc/invoke.texi (C Dialect Options): Adjust -std default for C++.
2156 * doc/standards.texi (C Language): Correct the default dialect.
2157 (C++ Language): Update the default for C++ to gnu++17.
2159 2020-06-26 Eric Botcazou <ebotcazou@gcc.gnu.org>
2161 * tree-ssa-reassoc.c (dump_range_entry): New function.
2162 (debug_range_entry): New debug function.
2163 (update_range_test): Invoke dump_range_entry for dumping.
2164 (optimize_range_tests_to_bit_test): Merge the entry test in the
2165 bit test when possible and lower the profitability threshold.
2167 2020-06-26 Richard Biener <rguenther@suse.de>
2169 PR tree-optimization/95897
2170 * tree-vectorizer.h (vectorizable_induction): Remove
2171 unused gimple_stmt_iterator * parameter.
2172 * tree-vect-loop.c (vectorizable_induction): Likewise.
2173 (vect_analyze_loop_operations): Adjust.
2174 * tree-vect-stmts.c (vect_analyze_stmt): Likewise.
2175 (vect_transform_stmt): Likewise.
2176 * tree-vect-slp.c (vect_schedule_slp_instance): Adjust
2177 for fold-left reductions, clarify existing reduction case.
2179 2020-06-25 Nick Clifton <nickc@redhat.com>
2181 * config/m32r/m32r.md (movsicc): Disable pattern.
2183 2020-06-25 Richard Biener <rguenther@suse.de>
2185 PR tree-optimization/95839
2186 * tree-vect-slp.c (vect_slp_analyze_bb_1): Remove premature
2187 check on the number of datarefs.
2189 2020-06-25 Iain Sandoe <iain@sandoe.co.uk>
2191 * config/rs6000/rs6000-call.c (mma_init_builtins): Cast
2192 the insn_data n_operands value to unsigned.
2194 2020-06-25 Richard Biener <rguenther@suse.de>
2196 * tree-vect-slp.c (vect_schedule_slp_instance): Always use
2197 vector defs to determine insertion place.
2199 2020-06-25 H.J. Lu <hjl.tools@gmail.com>
2202 * config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
2203 (PTA_ICELAKE_SERVER): Add PTA_CLWB.
2204 (PTA_TIGERLAKE): Add PTA_CLWB.
2206 2020-06-25 Richard Biener <rguenther@suse.de>
2208 PR tree-optimization/95866
2209 * tree-vect-stmts.c (vectorizable_shift): Reject incompatible
2210 vectorized shift operands. For scalar shifts use lane zero
2211 of a vectorized shift operand.
2213 2020-06-25 Martin Liska <mliska@suse.cz>
2215 PR tree-optimization/95745
2217 * gimple-isel.cc (gimple_expand_vec_cond_exprs): Delete dead
2218 SSA_NAMEs used as the first argument of a VEC_COND_EXPR. Always
2220 * tree-vect-generic.c (expand_vector_condition): Remove dead
2221 SSA_NAMEs used as the first argument of a VEC_COND_EXPR.
2223 2020-06-24 Will Schmidt <will_schmidt@vnet.ibm.com>
2226 * config/rs6000/altivec.h (vec_pack_to_short_fp32): Update.
2227 * config/rs6000/altivec.md (UNSPEC_CONVERT_4F32_8F16): New unspec.
2228 (convert_4f32_8f16): New define_expand
2229 * config/rs6000/rs6000-builtin.def (convert_4f32_8f16): New builtin define
2231 * config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_CONVERT_4F32_8F16): New
2232 overloaded builtin entry.
2233 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVSPHP): New unspec.
2234 (vsx_xvcvsphp): New define_insn.
2236 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
2237 Segher Boessenkool <segher@kernel.crashing.org>
2239 * simplify-rtx.c (simplify_unary_operation_1): Simplify rotates by 0.
2241 2020-06-24 Roger Sayle <roger@nextmovesoftware.com>
2243 * simplify-rtx.c (simplify_unary_operation_1): Simplify
2244 (parity (parity x)) as (parity x), i.e. PARITY is idempotent.
2246 2020-06-24 Richard Biener <rguenther@suse.de>
2248 PR tree-optimization/95866
2249 * tree-vect-slp.c (vect_slp_tree_uniform_p): New.
2250 (vect_build_slp_tree_2): Properly reset matches[0],
2251 ignore uniform constants.
2253 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
2256 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove brand_id.
2257 (cpu_indicator_init): Likewise.
2258 * config/i386/driver-i386.c (host_detect_local_cpu): Updated.
2260 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
2263 * common/config/i386/cpuinfo.h (get_intel_cpu): Add Cooper Lake
2264 detection with AVX512BF16.
2266 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
2269 * common/config/i386/i386-isas.h: New file. Extracted from
2270 gcc/config/i386/i386-builtins.c.
2271 (_isa_names_table): Add option.
2272 (ISA_NAMES_TABLE_START): New.
2273 (ISA_NAMES_TABLE_END): Likewise.
2274 (ISA_NAMES_TABLE_ENTRY): Likewise.
2275 (isa_names_table): Defined with ISA_NAMES_TABLE_START,
2276 ISA_NAMES_TABLE_END and ISA_NAMES_TABLE_ENTRY. Add more ISAs
2277 from enum processor_features.
2278 * config/i386/driver-i386.c: Include
2279 "common/config/i386/cpuinfo.h" and
2280 "common/config/i386/i386-isas.h".
2281 (has_feature): New macro.
2282 (host_detect_local_cpu): Call cpu_indicator_init to get CPU
2283 features. Use has_feature to detect processor features. Call
2284 Call get_intel_cpu to get the newer Intel CPU name. Use
2285 isa_names_table to generate command-line options.
2286 * config/i386/i386-builtins.c: Include
2287 "common/config/i386/i386-isas.h".
2288 (_arch_names_table): Removed.
2289 (isa_names_table): Likewise.
2291 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
2294 * common/config/i386/cpuinfo.h: New file.
2295 (__processor_model): Moved from libgcc/config/i386/cpuinfo.h.
2296 (__processor_model2): New.
2297 (CHECK___builtin_cpu_is): New. Defined as empty if not defined.
2298 (has_cpu_feature): New function.
2299 (set_cpu_feature): Likewise.
2300 (get_amd_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
2301 CHECK___builtin_cpu_is. Return AMD CPU name.
2302 (get_intel_cpu): Moved from libgcc/config/i386/cpuinfo.c. Use
2303 Use CHECK___builtin_cpu_is. Return Intel CPU name.
2304 (get_available_features): Moved from libgcc/config/i386/cpuinfo.c.
2305 Also check FEATURE_3DNOW, FEATURE_3DNOWP, FEATURE_ADX,
2306 FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT, FEATURE_CLWB,
2307 FEATURE_CLZERO, FEATURE_CMPXCHG16B, FEATURE_CMPXCHG8B,
2308 FEATURE_ENQCMD, FEATURE_F16C, FEATURE_FSGSBASE, FEATURE_FXSAVE,
2309 FEATURE_HLE, FEATURE_IBT, FEATURE_LAHF_LM, FEATURE_LM,
2310 FEATURE_LWP, FEATURE_LZCNT, FEATURE_MOVBE, FEATURE_MOVDIR64B,
2311 FEATURE_MOVDIRI, FEATURE_MWAITX, FEATURE_OSXSAVE,
2312 FEATURE_PCONFIG, FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
2313 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
2314 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
2315 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
2316 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
2317 FEATURE_XSAVEOPT and FEATURE_XSAVES
2318 (cpu_indicator_init): Moved from libgcc/config/i386/cpuinfo.c.
2319 Also update cpu_model2.
2320 * common/config/i386/i386-cpuinfo.h (processor_vendor): Add
2321 Add VENDOR_CENTAUR, VENDOR_CYRIX and VENDOR_NSC.
2322 (processor_features): Moved from gcc/config/i386/i386-builtins.c.
2323 Renamed F_XXX to FEATURE_XXX. Add FEATURE_3DNOW, FEATURE_3DNOWP,
2324 FEATURE_ADX, FEATURE_ABM, FEATURE_CLDEMOTE, FEATURE_CLFLUSHOPT,
2325 FEATURE_CLWB, FEATURE_CLZERO, FEATURE_CMPXCHG16B,
2326 FEATURE_CMPXCHG8B, FEATURE_ENQCMD, FEATURE_F16C,
2327 FEATURE_FSGSBASE, FEATURE_FXSAVE, FEATURE_HLE, FEATURE_IBT,
2328 FEATURE_LAHF_LM, FEATURE_LM, FEATURE_LWP, FEATURE_LZCNT,
2329 FEATURE_MOVBE, FEATURE_MOVDIR64B, FEATURE_MOVDIRI,
2330 FEATURE_MWAITX, FEATURE_OSXSAVE, FEATURE_PCONFIG,
2331 FEATURE_PKU, FEATURE_PREFETCHWT1, FEATURE_PRFCHW,
2332 FEATURE_PTWRITE, FEATURE_RDPID, FEATURE_RDRND, FEATURE_RDSEED,
2333 FEATURE_RTM, FEATURE_SERIALIZE, FEATURE_SGX, FEATURE_SHA,
2334 FEATURE_SHSTK, FEATURE_TBM, FEATURE_TSXLDTRK, FEATURE_VAES,
2335 FEATURE_WAITPKG, FEATURE_WBNOINVD, FEATURE_XSAVE, FEATURE_XSAVEC,
2336 FEATURE_XSAVEOPT, FEATURE_XSAVES and CPU_FEATURE_MAX.
2337 (SIZE_OF_CPU_FEATURES): New.
2338 * config/i386/i386-builtins.c (processor_features): Removed.
2339 (isa_names_table): Replace F_XXX with FEATURE_XXX.
2340 (fold_builtin_cpu): Change __cpu_features2 to an array.
2342 2020-06-24 H.J. Lu <hjl.tools@gmail.com>
2345 * common/config/i386/i386-common.c (processor_alias_table): Add
2346 processor model and priority to each entry.
2347 (pta_size): Updated with -6.
2348 (num_arch_names): New.
2349 * common/config/i386/i386-cpuinfo.h: New file.
2350 * config/i386/i386-builtins.c (feature_priority): Removed.
2351 (processor_model): Likewise.
2352 (_arch_names_table): Likewise.
2353 (arch_names_table): Likewise.
2354 (_isa_names_table): Replace P_ZERO with P_NONE.
2355 (get_builtin_code_for_version): Replace P_ZERO with P_NONE. Use
2356 processor_alias_table.
2357 (fold_builtin_cpu): Replace arch_names_table with
2358 processor_alias_table.
2359 * config/i386/i386.h: Include "common/config/i386/i386-cpuinfo.h".
2360 (pta): Add model and priority.
2361 (num_arch_names): New.
2363 2020-06-24 Richard Biener <rguenther@suse.de>
2365 * tree-vectorizer.h (vect_find_first_scalar_stmt_in_slp):
2367 * tree-vect-data-refs.c (vect_preserves_scalar_order_p):
2368 Simplify for new position of vectorized SLP loads.
2369 (vect_slp_analyze_node_dependences): Adjust for it.
2370 (vect_slp_analyze_and_verify_node_alignment): Compute alignment
2371 for the first stmts dataref.
2372 * tree-vect-slp.c (vect_find_first_scalar_stmt_in_slp): New.
2373 (vect_schedule_slp_instance): Emit loads before the
2375 * tree-vect-stmts.c (vectorizable_load): Do what the comment
2376 says and use vect_find_first_scalar_stmt_in_slp.
2378 2020-06-24 Richard Biener <rguenther@suse.de>
2380 PR tree-optimization/95856
2381 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): Honor
2384 2020-06-24 Jakub Jelinek <jakub@redhat.com>
2387 * fold-const.c (fold_cond_expr_with_comparison): Optimize
2388 A <= 0 ? A : -A into (type)-absu(A) rather than -abs(A).
2390 2020-06-24 Jakub Jelinek <jakub@redhat.com>
2392 * omp-low.c (lower_omp_for): Fix two pastos.
2394 2020-06-24 Martin Liska <mliska@suse.cz>
2396 * optc-save-gen.awk: Compare string options in cl_optimization_compare
2399 2020-06-23 Aaron Sawdey <acsawdey@linux.ibm.com>
2401 * config.gcc: Identify power10 as a 64-bit processor and as valid
2402 for --with-cpu and --with-tune.
2404 2020-06-23 David Edelsohn <dje.gcc@gmail.com>
2406 * Makefile.in (LANG_MAKEFRAGS): Same.
2407 (tmake_file): Use -include.
2410 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
2412 * REVISION: Delete file meant for a private branch.
2414 2020-06-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
2417 * config/arm/arm.c: (cmse_nonsecure_entry_clear_before_return): Use
2418 'callee_saved_reg_p' instead of 'calL_used_or_fixed_reg_p'.
2420 2020-06-23 Alexandre Oliva <oliva@adacore.com>
2422 * collect-utils.h (dumppfx): New.
2423 * collect-utils.c (dumppfx): Likewise.
2424 * lto-wrapper.c (run_gcc): Set global dumppfx.
2425 (compile_offload_image): Pass a -dumpbase on to mkoffload.
2426 * config/nvptx/mkoffload.c (ptx_dumpbase): New.
2427 (main): Handle incoming -dumpbase. Set ptx_dumpbase. Obey
2429 (compile_native): Pass -dumpbase et al to compiler.
2430 * config/gcn/mkoffload.c (gcn_dumpbase): New.
2431 (main): Handle incoming -dumpbase. Set gcn_dumpbase. Obey
2432 save_temps. Pass -dumpbase et al to offload target compiler.
2433 (compile_native): Pass -dumpbase et al to compiler.
2435 2020-06-23 Michael Meissner <meissner@linux.ibm.com>
2437 * REVISION: New file.
2439 2020-06-22 Segher Boessenkool <segher@kernel.crashing.org>
2441 * config/rs6000/altivec.h: Use _ARCH_PWR10, not _ARCH_PWR_FUTURE.
2442 Update comment for ISA 3.1.
2443 * config/rs6000/altivec.md: Use TARGET_POWER10, not TARGET_FUTURE.
2444 * config/rs6000/driver-rs6000.c (asm_names): Use -mpwr10 for power10
2445 on AIX, and -mpower10 elsewhere.
2446 * config/rs6000/future.md: Delete.
2447 * config/rs6000/linux64.h: Update comments. Use TARGET_POWER10, not
2449 * config/rs6000/power10.md: New file.
2450 * config/rs6000/ppc-auxv.h: Use PPC_PLATFORM_POWER10, not
2451 PPC_PLATFORM_FUTURE.
2452 * config/rs6000/rs6000-builtin.def: Update comments. Use BU_P10V_*
2453 names instead of BU_FUTURE_V_* names. Use RS6000_BTM_P10 instead of
2454 RS6000_BTM_FUTURE. Use P10_BUILTIN_* instead of FUTURE_BUILTIN_*.
2455 Use BU_P10_* instead of BU_FUTURE_*.
2456 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
2457 _ARCH_PWR10 instead of _ARCH_PWR_FUTURE.
2458 (altivec_resolve_overloaded_builtin): Use P10_BUILTIN_VEC_XXEVAL, not
2459 FUTURE_BUILTIN_VEC_XXEVAL.
2460 * config/rs6000/rs6000-call.c: Use P10_BUILTIN_*, not FUTURE_BUILTIN_*.
2461 Update compiler messages.
2462 * config/rs6000/rs6000-cpus.def: Update comments. Use ISA_3_1_*, not
2463 ISA_FUTURE_*. Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE.
2464 * config/rs6000/rs6000-opts.h: Use PROCESSOR_POWER10, not
2466 * config/rs6000/rs6000-string.c: Ditto.
2467 * config/rs6000/rs6000-tables.opt (rs6000_cpu_opt_value): Use "power10"
2468 instead of "future", reorder it to right after "power9".
2469 * config/rs6000/rs6000.c: Update comments. Use OPTION_MASK_POWER10,
2470 not OPTION_MASK_FUTURE. Use TARGET_POWER10, not TARGET_FUTURE. Use
2471 RS6000_BTM_P10, not RS6000_BTM_FUTURE. Update compiler messages.
2472 Use PROCESSOR_POWER10, not PROCESSOR_FUTURE. Use ISA_3_1_MASKS_SERVER,
2473 not ISA_FUTURE_MASKS_SERVER.
2474 (rs6000_opt_masks): Use "power10" instead of "future".
2475 (rs6000_builtin_mask_names): Ditto.
2476 (rs6000_disable_incompatible_switches): Ditto.
2477 * config/rs6000/rs6000.h: Use -mpower10, not -mfuture. Use
2478 -mcpu=power10, not -mcpu=future. Use MASK_POWER10, not MASK_FUTURE.
2479 Use OPTION_MASK_POWER10, not OPTION_MASK_FUTURE. Use RS6000_BTM_P10,
2480 not RS6000_BTM_FUTURE.
2481 * config/rs6000/rs6000.md: Use "power10", not "future". Use
2482 TARGET_POWER10, not TARGET_FUTURE. Include "power10.md", not
2484 * config/rs6000/rs6000.opt (mfuture): Delete.
2486 * config/rs6000/t-rs6000: Use "power10.md", not "future.md".
2487 * config/rs6000/vsx.md: Use TARGET_POWER10, not TARGET_FUTURE.
2489 2020-06-22 Richard Sandiford <richard.sandiford@arm.com>
2491 * coretypes.h (first_type): Delete.
2492 * recog.h (insn_gen_fn::operator()): Go back to using a decltype.
2494 2020-06-22 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2496 * doc/sourcebuild.texi (arm_v8_1m_mve_fp_ok): Add item.
2497 (arm_mve_hw): Likewise.
2499 2020-06-22 H.J. Lu <hjl.tools@gmail.com>
2502 * config/i386/i386.c (ix86_dirflag_mode_needed): Skip
2505 2020-06-22 Richard Biener <rguenther@suse.de>
2507 PR tree-optimization/95770
2508 * tree-vect-slp.c (vect_schedule_slp_instance): Also consider
2511 2020-06-22 Andrew Stubbs <ams@codesourcery.com>
2513 * config/gcn/gcn.c (gcn_function_arg): Disallow vector arguments.
2514 (gcn_return_in_memory): Return vectors in memory.
2516 2020-06-22 Jakub Jelinek <jakub@redhat.com>
2518 * omp-general.c (omp_extract_for_data): For triangular loops with
2519 all loop invariant expressions constant where the innermost loop is
2520 executed at least once compute number of iterations at compile time.
2522 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
2524 * config/riscv/riscv.h (ASM_SPEC): Remove riscv_expand_arch call.
2525 (DRIVER_SELF_SPECS): New.
2527 2020-06-22 Kito Cheng <kito.cheng@sifive.com>
2529 * config/riscv/riscv-builtins.c (RISCV_FTYPE_NAME0): New.
2530 (RISCV_FTYPE_ATYPES0): New.
2531 (riscv_builtins): Using RISCV_USI_FTYPE for frflags.
2532 * config/riscv/riscv-ftypes.def: Remove VOID argument.
2534 2020-06-21 David Edelsohn <dje.gcc@gmail.com>
2536 * config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
2537 * config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
2540 (ASM_CPU_SPEC): Remove vsx and altivec options.
2541 (CPP_SPEC_COMMON): Rename from CPP_SPEC.
2544 (CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
2545 (TARGET_DEFAULT): Only define if not BIARCH.
2546 (LIB_SPEC_COMMON): Rename from LIB_SPEC.
2549 (LINK_SPEC_COMMON): Rename from LINK_SPEC.
2552 (STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
2553 (ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
2555 (CPLUSPLUS_CPP_SPEC): Same.
2558 (SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
2559 * config/rs6000/defaultaix64.h: New file.
2560 * config/rs6000/t-aix64: New file.
2562 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
2564 * config/rs6000/predicates.md (mma_assemble_input_operand): New.
2565 * config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
2566 BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
2568 (ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
2569 PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
2570 PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
2571 PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
2572 PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
2573 PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
2574 PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
2575 PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
2576 XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
2577 XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
2578 XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
2579 XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
2580 XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
2581 XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
2582 * config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
2583 Allow zero constants.
2584 (print_operand) <case 'A'>: New output modifier.
2585 (rs6000_split_multireg_move): Add support for inserting accumulator
2586 priming and depriming instructions. Add support for splitting an
2587 assemble accumulator pattern.
2588 * config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
2589 rs6000_gimple_fold_mma_builtin): New functions.
2590 (RS6000_BUILTIN_M): New macro.
2591 (def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
2592 (bdesc_mma): Add new MMA built-in support.
2593 (htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
2594 (rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
2596 (rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
2597 (rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
2598 and rs6000_gimple_fold_mma_builtin.
2599 (rs6000_expand_builtin): Call mma_expand_builtin.
2600 Use RS6000_BTC_OPND_MASK.
2601 (rs6000_init_builtins): Adjust comment. Call mma_init_builtins.
2602 (htm_init_builtins): Use RS6000_BTC_OPND_MASK.
2603 (builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
2604 VSX_BUILTIN_XVCVBF16SP.
2605 * config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
2606 RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
2607 RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
2608 (RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
2609 RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
2610 * config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
2611 (UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
2612 UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
2613 UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
2614 UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
2615 UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
2616 UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
2617 UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
2618 UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
2619 UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
2620 UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
2621 UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
2622 UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
2623 UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
2624 UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
2625 UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
2626 UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
2627 UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
2628 UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
2629 UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
2630 UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
2631 UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
2632 UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
2633 UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
2634 UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
2635 UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
2636 UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
2637 (MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
2638 MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
2639 MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
2640 MMA_AVVI4I4I4): New define_int_iterator.
2641 (acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
2642 avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
2643 avvi4i4i4): New define_int_attr.
2644 (*movpxi): Add zero constant alternative.
2645 (mma_assemble_pair, mma_assemble_acc): New define_expand.
2646 (*mma_assemble_acc): New define_insn_and_split.
2647 (mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
2648 mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
2649 mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
2650 mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
2651 * config/rs6000/rs6000.md (define_attr "type"): New type mma.
2652 * config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
2653 (UNSPEC_VSX_XVCVSPBF16): Likewise.
2654 (XVCVBF16): New define_int_iterator.
2655 (xvcvbf16): New define_int_attr.
2656 (vsx_<xvcvbf16>): New define_insn.
2657 * doc/extend.texi: Document the mma built-ins.
2659 2020-06-21 Peter Bergner <bergner@linux.ibm.com>
2660 Michael Meissner <meissner@linux.ibm.com>
2662 * config/rs6000/mma.md: New file.
2663 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
2665 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
2666 for __vector_pair and __vector_quad types.
2667 * config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
2669 (POWERPC_MASKS): Likewise.
2670 * config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
2671 (POI, PXI): New partial integer modes.
2672 * config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
2673 (rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
2674 (rs6000_hard_regno_mode_ok_uncached): Likewise.
2675 Add support for POImode being allowed in VSX registers and PXImode
2676 being allowed in FP registers.
2677 (rs6000_modes_tieable_p): Adjust comment.
2678 Add support for POImode and PXImode.
2679 (rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
2680 XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
2681 (rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
2682 Set up appropriate addr_masks for vector pair and vector quad addresses.
2683 (rs6000_init_hard_regno_mode_ok): Add support for vector pair and
2684 vector quad registers. Setup reload handlers for POImode and PXImode.
2685 (rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
2686 (rs6000_option_override_internal): Error if -mmma is specified
2687 without -mcpu=future.
2688 (rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
2689 (quad_address_p): Change size test to less than 16 bytes.
2690 (reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
2691 and vector quad instructions.
2692 (avoiding_indexed_address_p): Likewise.
2693 (rs6000_emit_move): Disallow POImode and PXImode moves involving
2695 (rs6000_preferred_reload_class): Prefer VSX registers for POImode
2696 and FP registers for PXImode.
2697 (rs6000_split_multireg_move): Support splitting POImode and PXImode
2699 (rs6000_mangle_type): Adjust comment. Add support for mangling
2700 __vector_pair and __vector_quad types.
2701 (rs6000_opt_masks): Add entry for mma.
2702 (rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
2703 (rs6000_function_value): Use VECTOR_ALIGNMENT_P.
2704 (address_to_insn_form): Likewise.
2705 (reg_to_non_prefixed): Likewise.
2706 (rs6000_invalid_conversion): New function.
2707 * config/rs6000/rs6000.h (MASK_MMA): Define.
2708 (BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
2709 (VECTOR_ALIGNMENT_P): New helper macro.
2710 (ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
2711 (RS6000_BTM_MMA): Define.
2712 (RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
2713 (rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
2714 RS6000_BTI_vector_quad.
2715 (vector_pair_type_node): New.
2716 (vector_quad_type_node): New.
2717 * config/rs6000/rs6000.md: Include mma.md.
2718 (define_mode_iterator RELOAD): Add POI and PXI.
2719 * config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
2720 * config/rs6000/rs6000.opt (-mmma): New.
2721 * doc/invoke.texi: Document -mmma.
2723 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
2725 PR tree-optimization/95638
2726 * tree-loop-distribution.c (pg_edge_callback_data): New field.
2727 (loop_distribution::break_alias_scc_partitions): Record and restore
2728 postorder information. Fix memory leak.
2730 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
2732 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
2733 (output_file_start): Use const 'char *'.
2735 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
2737 PR tree-optimization/94880
2738 * match.pd (A | B) - B -> (A & ~B): New simplification.
2740 2020-06-19 Richard Biener <rguenther@suse.de>
2742 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
2743 for lane permutations.
2745 2020-06-19 Richard Biener <rguenther@suse.de>
2747 PR tree-optimization/95761
2748 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
2749 vectorized stmts for finding the last one.
2751 2020-06-18 Felix Yang <felix.yang@huawei.com>
2753 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
2754 vect_relevant_for_alignment_p to filter out data references in
2755 the loop whose alignment is irrelevant when trying loop peeling
2758 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
2760 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
2761 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
2762 mode iterator for the first operand of ZERO_EXTRACT RTX.
2763 Change ext_register_operand predicate to register_operand.
2764 Rename from *cmpqi_ext_1.
2765 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
2766 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
2767 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
2768 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
2769 (*extv<mode>): Use SWI24 mode iterator for the first operand
2770 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2771 to register_operand.
2772 (*extzv<mode>): Use SWI248 mode iterator for the first operand
2773 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2774 to register_operand.
2775 (*extzvqi): Use SWI248 mode iterator instead of SImode for
2776 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
2777 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
2779 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
2780 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
2781 mode iterator for the first operand of ZERO_EXTRACT RTX.
2782 Change ext_register_operand predicate to register_operand.
2783 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
2784 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
2786 (*insvqi_1): Use SWI248 mode iterator instead of SImode
2787 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
2788 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
2789 predicate to register_operand.
2792 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
2793 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
2794 mode iterator for the first operand of ZERO_EXTRACT RTX.
2795 Change ext_register_operand predicate to register_operand.
2796 (addqi_ext_1): New expander.
2797 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
2798 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
2799 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2800 to register_operand. Rename from *addqi_ext_1.
2801 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
2802 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
2803 (udivmodqi4): Ditto.
2804 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
2805 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
2806 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
2807 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2808 to register_operand. Rename from *testqi_ext_1.
2809 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
2810 (andqi_ext_1): New expander.
2811 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
2812 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
2813 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2814 to register_operand. Rename from andqi_ext_1.
2815 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
2816 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
2817 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
2818 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
2819 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
2820 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
2821 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
2822 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
2823 to register_operand. Rename from *xorqi_ext_1_cc.
2824 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
2825 in mode, matching its first operand.
2826 (promote_duplicated_reg): Update for renamed insv<mode>_1.
2827 * config/i386/predicates.md (ext_register_operand): Remove predicate.
2829 2020-06-18 Martin Sebor <msebor@redhat.com>
2833 * builtins.c (compute_objsize): Remove call to
2834 compute_builtin_object_size and instead compute conservative sizes
2837 2020-06-18 Martin Liska <mliska@suse.cz>
2839 * coretypes.h (struct iterator_range): New type.
2840 * tree-vect-patterns.c (vect_determine_precisions): Use
2841 range-based iterator.
2842 (vect_pattern_recog): Likewise.
2843 * tree-vect-slp.c (_bb_vec_info): Likewise.
2844 (_bb_vec_info::~_bb_vec_info): Likewise.
2845 (vect_slp_check_for_constructors): Likewise.
2846 * tree-vectorizer.h:Add new iterators
2847 and functions that use it.
2849 2020-06-18 Martin Liska <mliska@suse.cz>
2851 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
2852 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
2853 of a VEC_COND_EXPR cannot be tcc_comparison and so that
2854 a SSA_NAME needs to be created before we use it for the first
2855 argument of the VEC_COND_EXPR.
2856 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
2858 2020-06-18 Richard Biener <rguenther@suse.de>
2861 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
2862 to the target if necessary.
2863 (expand_vect_cond_mask_optab_fn): Likewise.
2865 2020-06-18 Martin Liska <mliska@suse.cz>
2867 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
2868 vcond as we check for NULL pointer.
2870 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
2872 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
2873 silence empty-body warning with gcc_fallthrough.
2875 2020-06-18 Jakub Jelinek <jakub@redhat.com>
2877 PR tree-optimization/95699
2878 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
2879 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
2880 declarations to the statements that set them where possible.
2882 2020-06-18 Jakub Jelinek <jakub@redhat.com>
2885 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
2886 scalar mode halfvectype other than vector boolean for
2887 VEC_PACK_TRUNC_EXPR.
2889 2020-06-18 Richard Biener <rguenther@suse.de>
2891 * varasm.c (assemble_variable): Make sure to not
2892 defer output when outputting addressed constants.
2893 (output_constant_def_contents): Likewise.
2894 (add_constant_to_table): Take and pass on whether to
2896 (output_addressed_constants): Likewise.
2897 (output_constant_def): Pass on whether to defer output
2898 to add_constant_to_table.
2899 (tree_output_constant_def): Defer output of constants.
2901 2020-06-18 Richard Biener <rguenther@suse.de>
2903 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
2904 (_slp_tree::lane_permutation): New member.
2905 (_slp_tree::code): Likewise.
2906 (SLP_TREE_TWO_OPERATORS): Remove.
2907 (SLP_TREE_LANE_PERMUTATION): New.
2908 (SLP_TREE_CODE): Likewise.
2909 (vect_stmt_dominates_stmt_p): Declare.
2910 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
2911 * tree-vect-stmts.c (vect_model_simple_cost): Remove
2912 SLP_TREE_TWO_OPERATORS handling.
2913 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
2914 (_slp_tree::~_slp_tree): Likewise.
2915 (vect_two_operations_perm_ok_p): Remove.
2916 (vect_build_slp_tree_1): Remove verification of two-operator
2918 (vect_build_slp_tree_2): When we have two different operators
2919 build two computation SLP nodes and a blend.
2920 (vect_print_slp_tree): Print the lane permutation if it exists.
2921 (slp_copy_subtree): Copy it.
2922 (vect_slp_rearrange_stmts): Re-arrange it.
2923 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
2924 VEC_PERM_EXPR explicitely.
2925 (vect_schedule_slp_instance): Likewise. Remove old
2926 SLP_TREE_TWO_OPERATORS code.
2927 (vectorizable_slp_permutation): New function.
2929 2020-06-18 Martin Liska <mliska@suse.cz>
2931 * tree-vect-generic.c (expand_vector_condition): Check
2932 for gassign before inspecting RHS.
2934 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
2936 * gimplify.c (omp_notice_threadprivate_variable)
2937 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
2938 diagnostic. Adjust all users.
2940 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
2942 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
2943 NULL_TREE' check earlier.
2945 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
2947 * doc/extend.texi (attribute access): Fix a typo.
2949 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
2950 Kaipeng Zhou <zhoukaipeng3@huawei.com>
2952 PR tree-optimization/95199
2953 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
2954 strided load/store operations and remove redundant code.
2956 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
2958 * coretypes.h (first_type): New alias template.
2959 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
2960 Remove spurious “...” and split the function type out into a typedef.
2962 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
2964 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
2967 2020-06-17 Richard Biener <rguenther@suse.de>
2969 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
2970 in *vectype parameter.
2971 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
2972 vect_build_slp_tree_1 computed.
2973 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
2974 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
2975 (vect_schedule_slp_instance): Likewise.
2976 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
2977 from SLP_TREE_VECTYPE.
2979 2020-06-17 Richard Biener <rguenther@suse.de>
2981 PR tree-optimization/95717
2982 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
2983 Move BB SSA updating before exit/latch PHI current def copying.
2985 2020-06-17 Martin Liska <mliska@suse.cz>
2987 * Makefile.in: Add new file.
2988 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
2989 not meet this condition.
2990 (do_store_flag): Likewise.
2991 * gimplify.c (gimplify_expr): Gimplify first argument of
2992 VEC_COND_EXPR to be a SSA name.
2993 * internal-fn.c (vec_cond_mask_direct): New.
2994 (vec_cond_direct): Likewise.
2995 (vec_condu_direct): Likewise.
2996 (vec_condeq_direct): Likewise.
2997 (expand_vect_cond_optab_fn): New.
2998 (expand_vec_cond_optab_fn): Likewise.
2999 (expand_vec_condu_optab_fn): Likewise.
3000 (expand_vec_condeq_optab_fn): Likewise.
3001 (expand_vect_cond_mask_optab_fn): Likewise.
3002 (expand_vec_cond_mask_optab_fn): Likewise.
3003 (direct_vec_cond_mask_optab_supported_p): Likewise.
3004 (direct_vec_cond_optab_supported_p): Likewise.
3005 (direct_vec_condu_optab_supported_p): Likewise.
3006 (direct_vec_condeq_optab_supported_p): Likewise.
3007 * internal-fn.def (VCOND): New OPTAB.
3009 (VCONDEQ): Likewise.
3010 (VCOND_MASK): Likewise.
3011 * optabs.c (get_rtx_code): Make it global.
3012 (expand_vec_cond_mask_expr): Removed.
3013 (expand_vec_cond_expr): Removed.
3014 * optabs.h (expand_vec_cond_expr): Likewise.
3015 (vector_compare_rtx): Make it global.
3016 * passes.def: Add new pass_gimple_isel pass.
3017 * tree-cfg.c (verify_gimple_assign_ternary): Add check
3018 for VEC_COND_EXPR about first argument.
3019 * tree-pass.h (make_pass_gimple_isel): New.
3020 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
3021 propagation of the first argument of a VEC_COND_EXPR.
3022 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
3023 first argument of a VEC_COND_EXPR.
3024 (optimize_vec_cond_expr): Likewise.
3025 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
3026 for a first argument of created VEC_COND_EXPR.
3027 (expand_vector_condition): Fix coding style.
3028 * tree-vect-stmts.c (vectorizable_condition): Gimplify
3030 * gimple-isel.cc: New file.
3032 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
3034 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
3035 (BSS_SECTION_ASM_OP): Use ".bss".
3036 (ASM_SPEC): Remove "-mattr=-code-object-v3".
3037 (LINK_SPEC): Add "--export-dynamic".
3038 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
3039 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
3040 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
3041 (load_image): Remove obsolete relocation handling.
3042 Add ".kd" suffix to the symbol names.
3043 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
3044 (gcn_option_override): Update gcn_isa test.
3045 (gcn_kernel_arg_types): Update all the assembler directives.
3046 Remove the obsolete options.
3047 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
3048 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
3050 (output_file_start): Rework assembler file header.
3051 (gcn_hsa_declare_function_name): Rework kernel metadata.
3052 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
3053 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
3054 (PROCESSOR_VEGA10): New enum value.
3055 (PROCESSOR_VEGA20): New enum value.
3057 2020-06-17 Martin Liska <mliska@suse.cz>
3059 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
3061 * gcov-tool.c (print_version): Likewise.
3062 * gcov.c (print_version): Likewise.
3064 2020-06-17 liuhongt <hongtao.liu@intel.com>
3067 * config/i386/i386-expand.c
3068 (ix86_expand_vec_shift_qihi_constant): New function.
3069 * config/i386/i386-protos.h
3070 (ix86_expand_vec_shift_qihi_constant): Declare.
3071 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
3072 V*QImode by constant.
3074 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
3076 PR tree-optimization/95649
3077 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
3078 value is a constant.
3080 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
3082 * config.in: Regenerate.
3083 * config/s390/s390.c (print_operand): Emit vector alignment hints
3084 for target z13, if AS accepts them. For other targets the logic
3086 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
3088 * configure: Regenerate.
3089 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
3091 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3093 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
3095 (__arm_vaddq_m_n_s32): Likewise.
3096 (__arm_vaddq_m_n_s16): Likewise.
3097 (__arm_vaddq_m_n_u8): Likewise.
3098 (__arm_vaddq_m_n_u32): Likewise.
3099 (__arm_vaddq_m_n_u16): Likewise.
3100 (__arm_vaddq_m): Modify polymorphic variant.
3102 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3104 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
3105 and constraint of all the operands.
3106 (mve_sqrshrl_sat<supf>_di): Likewise.
3107 (mve_uqrshl_si): Likewise.
3108 (mve_sqrshr_si): Likewise.
3109 (mve_uqshll_di): Likewise.
3110 (mve_urshrl_di): Likewise.
3111 (mve_uqshl_si): Likewise.
3112 (mve_urshr_si): Likewise.
3113 (mve_sqshl_si): Likewise.
3114 (mve_srshr_si): Likewise.
3115 (mve_srshrl_di): Likewise.
3116 (mve_sqshll_di): Likewise.
3117 * config/arm/predicates.md (arm_low_register_operand): Define.
3119 2020-06-16 Jakub Jelinek <jakub@redhat.com>
3121 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
3122 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
3123 or dist_schedule clause on non-rectangular loops. Handle
3124 gimplification of non-rectangular lb/b expressions. When changing
3125 iteration variable, adjust also non-rectangular lb/b expressions
3127 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
3129 (struct omp_for_data): Add non_rect member.
3130 * omp-general.c (omp_extract_for_data): Handle non-rectangular
3131 loops. Fill in non_rect, m1, m2 and outer.
3132 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
3133 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
3134 non-rectangular loop cases and assert for cases that can't be
3136 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
3137 (dump_omp_loop_non_rect_expr): New function.
3138 (dump_generic_node): Handle non-rectangular OpenMP loops.
3139 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
3140 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
3143 2020-06-16 Richard Biener <rguenther@suse.de>
3146 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
3148 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
3151 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
3152 assertion and turn it into a early exit check.
3154 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
3156 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
3157 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
3158 true and all elements are zero, then always clear. Return GS_ERROR
3159 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
3160 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
3161 the type is aggregate non-addressable, ask gimplify_init_constructor
3162 whether it can generate a single access to the target.
3164 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
3166 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
3167 access on the LHS is replaced with a scalar access, propagate the
3168 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
3170 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
3172 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
3173 TARGET_THREADPTR reference.
3174 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
3175 targetm.have_tls instead of TARGET_HAVE_TLS.
3176 (xtensa_option_override): Set targetm.have_tls to false in
3177 configurations without THREADPTR.
3179 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
3181 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
3183 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
3184 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
3185 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
3186 xtensa_windowed_abi if needed.
3187 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
3189 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
3190 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
3192 (mabi=call0, mabi=windowed): New options.
3193 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
3195 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
3197 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
3198 (TARGET_CAN_ELIMINATE): New macro.
3199 * config/xtensa/xtensa.h
3200 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
3201 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
3202 (HARD_FRAME_POINTER_REGNUM): Define using
3203 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
3204 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
3205 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
3206 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
3208 2020-06-15 Felix Yang <felix.yang@huawei.com>
3210 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
3211 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
3213 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
3215 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
3216 LOOP_VINFO_DATAREFS when possible.
3217 (update_epilogue_loop_vinfo): Likewise.
3219 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
3221 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
3223 (riscv_gpr_save_operation_p): Change type to unsigned for i and
3226 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
3229 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
3231 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
3232 * config/i386/sse.md (mul<mode>3): Drop mask_name since
3233 there's no real simd int8 multiplication instruction with
3234 mask. Also optimize it under TARGET_AVX512BW.
3235 (mulv8qi3): New expander.
3237 2020-06-12 Marco Elver <elver@google.com>
3239 * gimplify.c (gimplify_function_tree): Optimize and do not emit
3240 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
3241 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
3242 * tsan.c (instrument_memory_accesses): Make
3243 fentry_exit_instrument bool depend on new param.
3245 2020-06-12 Felix Yang <felix.yang@huawei.com>
3247 PR tree-optimization/95570
3248 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
3249 (vect_verify_datarefs_alignment): Call it to filter out data references
3250 in the loop whose alignment is irrelevant.
3251 (vect_get_peeling_costs_all_drs): Likewise.
3252 (vect_peeling_supportable): Likewise.
3253 (vect_enhance_data_refs_alignment): Likewise.
3255 2020-06-12 Richard Biener <rguenther@suse.de>
3257 PR tree-optimization/95633
3258 * tree-vect-stmts.c (vectorizable_condition): Properly
3259 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
3261 2020-06-12 Martin Liška <mliska@suse.cz>
3263 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
3264 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
3266 * lto-wrapper.c (merge_and_complain): Wrap option names.
3268 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
3270 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
3271 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
3272 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
3273 (vect_set_loop_condition_masked): Renamed to ...
3274 (vect_set_loop_condition_partial_vectors): ... this. Rename
3275 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
3276 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
3277 (vect_set_loop_condition_unmasked): Renamed to ...
3278 (vect_set_loop_condition_normal): ... this.
3279 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
3280 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
3281 to vect_set_loop_condition_partial_vectors.
3282 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
3283 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
3284 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
3286 (vect_analyze_loop_costing): ... this.
3287 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
3289 (vect_min_prec_for_max_niters): New, factored out from ...
3290 (vect_verify_full_masking): ... this. Rename
3291 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
3292 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
3293 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
3294 (vectorizable_reduction): Update some dumpings with partial
3295 vectors instead of fully-masked.
3296 (vectorizable_live_operation): Likewise.
3297 (vect_iv_limit_for_full_masking): Renamed to ...
3298 (vect_iv_limit_for_partial_vectors): ... this.
3299 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
3300 (check_load_store_for_partial_vectors): ... this. Update some
3301 dumpings with partial vectors instead of fully-masked.
3302 (vectorizable_store): Rename check_load_store_masking to
3303 check_load_store_for_partial_vectors.
3304 (vectorizable_load): Likewise.
3305 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
3306 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
3307 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
3308 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
3309 (vect_iv_limit_for_full_masking): Renamed to ...
3310 (vect_iv_limit_for_partial_vectors): this.
3311 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
3312 Rename iv_type to rgroup_iv_type.
3314 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
3316 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
3317 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
3318 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
3319 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
3320 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
3321 (insn_gen_fn::operator()): Replace overloaded definitions with
3322 a parameter-pack version.
3324 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
3327 * config/i386/i386-features.c (rest_of_insert_endbranch):
3329 (rest_of_insert_endbr_and_patchable_area): Change return type
3330 to void. Add need_endbr and patchable_area_size arguments.
3331 Don't call timevar_push nor timevar_pop. Replace
3332 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
3333 UNSPECV_PATCHABLE_AREA for patchable area.
3334 (pass_data_insert_endbranch): Renamed to ...
3335 (pass_data_insert_endbr_and_patchable_area): This. Change
3336 pass name to endbr_and_patchable_area.
3337 (pass_insert_endbranch): Renamed to ...
3338 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
3339 and patchable_area_size;.
3340 (pass_insert_endbr_and_patchable_area::gate): Set and check
3341 need_endbr and patchable_area_size.
3342 (pass_insert_endbr_and_patchable_area::execute): Call
3343 timevar_push and timevar_pop. Pass need_endbr and
3344 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
3345 (make_pass_insert_endbranch): Renamed to ...
3346 (make_pass_insert_endbr_and_patchable_area): This.
3347 * config/i386/i386-passes.def: Replace pass_insert_endbranch
3348 with pass_insert_endbr_and_patchable_area.
3349 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
3350 (make_pass_insert_endbranch): Renamed to ...
3351 (make_pass_insert_endbr_and_patchable_area): This.
3352 * config/i386/i386.c (ix86_asm_output_function_label): Set
3353 function_label_emitted to true.
3354 (ix86_print_patchable_function_entry): New function.
3355 (ix86_output_patchable_area): Likewise.
3356 (x86_function_profiler): Replace endbr_queued_at_entrance with
3357 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
3358 Call ix86_output_patchable_area to generate patchable area if
3360 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
3361 * config/i386/i386.h (queued_insn_type): New.
3362 (machine_function): Add function_label_emitted. Replace
3363 endbr_queued_at_entrance with insn_queued_at_entrance.
3364 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
3365 (patchable_area): New.
3367 2020-06-11 Martin Liska <mliska@suse.cz>
3369 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
3372 2020-06-11 Martin Liska <mliska@suse.cz>
3375 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
3378 2020-06-11 Martin Liska <mliska@suse.cz>
3379 Jakub Jelinek <jakub@redhat.com>
3382 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
3383 by using Pmode instead of ptr_mode.
3385 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
3387 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
3388 (vect_set_loop_control): ... this.
3389 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
3390 (vect_set_loop_masks_directly): Renamed to ...
3391 (vect_set_loop_controls_directly): ... this. Also rename some
3392 variables with ctrl instead of mask. Rename vect_set_loop_mask to
3393 vect_set_loop_control.
3394 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
3395 Also rename some variables with ctrl instead of mask.
3396 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
3397 (release_vec_loop_controls): ... this. Rename rgroup_masks related
3399 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
3400 release_vec_loop_controls.
3401 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
3402 (vect_get_max_nscalars_per_iter): Likewise.
3403 (vect_estimate_min_profitable_iters): Likewise.
3404 (vect_record_loop_mask): Likewise.
3405 (vect_get_loop_mask): Likewise.
3406 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
3407 (struct rgroup_controls): ... this. Also rename mask_type
3408 to type and rename masks to controls.
3410 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
3412 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
3413 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
3414 (vect_gen_vector_loop_niters): Likewise.
3415 (vect_do_peeling): Likewise.
3416 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
3417 fully_masked_p to using_partial_vectors_p.
3418 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
3419 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
3420 (determine_peel_for_niter): Likewise.
3421 (vect_estimate_min_profitable_iters): Likewise.
3422 (vect_transform_loop): Likewise.
3423 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
3424 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
3426 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
3428 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
3429 can_fully_mask_p to can_use_partial_vectors_p.
3430 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
3431 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
3432 to saved_can_use_partial_vectors_p.
3433 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
3434 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
3435 (vectorizable_live_operation): Likewise.
3436 * tree-vect-stmts.c (permute_vec_elements): Likewise.
3437 (check_load_store_masking): Likewise.
3438 (vectorizable_operation): Likewise.
3439 (vectorizable_store): Likewise.
3440 (vectorizable_load): Likewise.
3441 (vectorizable_condition): Likewise.
3442 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
3443 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
3444 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
3446 2020-06-11 Martin Liska <mliska@suse.cz>
3448 * optc-save-gen.awk: Quote error string.
3450 2020-06-11 Alexandre Oliva <oliva@adacore.com>
3452 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
3454 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
3456 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
3457 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
3459 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
3460 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
3462 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
3464 * config/riscv/predicates.md (gpr_save_operation): New.
3465 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
3466 (riscv_gpr_save_operation_p): Ditto.
3467 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
3468 Ignore USEs for gpr_save patter.
3469 * config/riscv/riscv.c (gpr_save_reg_order): New.
3470 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
3471 (riscv_gen_gpr_save_insn): New.
3472 (riscv_gpr_save_operation_p): Ditto.
3473 * config/riscv/riscv.md (S3_REGNUM): New.
3480 (S10_REGNUM): Ditto.
3481 (S11_REGNUM): Ditto.
3482 (gpr_save): Model USEs correctly.
3484 2020-06-10 Martin Sebor <msebor@redhat.com>
3488 * builtins.c (inform_access): New function.
3489 (check_access): Call it. Add argument.
3490 (addr_decl_size): Remove.
3491 (get_range): New function.
3492 (compute_objsize): New overload. Only use compute_builtin_object_size
3493 with raw memory function.
3494 (check_memop_access): Pass new argument to compute_objsize and
3496 (expand_builtin_memchr, expand_builtin_strcat): Same.
3497 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
3498 (expand_builtin_stpncpy, check_strncat_sizes): Same.
3499 (expand_builtin_strncat, expand_builtin_strncpy): Same.
3500 (expand_builtin_memcmp): Same.
3501 * builtins.h (check_nul_terminated_array): Declare extern.
3502 (check_access): Add argument.
3503 (struct access_ref, struct access_data): New structs.
3504 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
3505 (builtin_access::overlap): Call it.
3506 * tree-object-size.c (decl_init_size): Declare extern.
3507 (addr_object_size): Correct offset computation.
3508 * tree-object-size.h (decl_init_size): Declare.
3509 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
3510 to maybe_warn_overflow when assigning to an SSA_NAME.
3512 2020-06-10 Richard Biener <rguenther@suse.de>
3514 * tree-vect-loop.c (vect_determine_vectorization_factor):
3516 (_loop_vec_info::_loop_vec_info): Likewise.
3517 (vect_update_vf_for_slp): Likewise.
3518 (vect_analyze_loop_operations): Likewise.
3519 (update_epilogue_loop_vinfo): Likewise.
3520 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
3521 (vect_pattern_recog): Likewise.
3522 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
3523 (_bb_vec_info::_bb_vec_info): Likewise.
3524 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
3527 2020-06-10 Richard Biener <rguenther@suse.de>
3529 PR tree-optimization/95576
3530 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
3532 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
3535 * config/aarch64/aarch64-sve-builtins.h
3536 (sve_switcher::m_old_maximum_field_alignment): New member.
3537 * config/aarch64/aarch64-sve-builtins.cc
3538 (sve_switcher::sve_switcher): Save maximum_field_alignment in
3539 m_old_maximum_field_alignment and clear maximum_field_alignment.
3540 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
3542 2020-06-10 Richard Biener <rguenther@suse.de>
3544 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
3546 (_stmt_vec_info::vec_stmts): Likewise.
3547 (vec_info::stmt_vec_info_ro): New flag.
3548 (vect_finish_replace_stmt): Adjust declaration.
3549 (vect_finish_stmt_generation): Likewise.
3550 (vectorizable_induction): Likewise.
3551 (vect_transform_reduction): Likewise.
3552 (vectorizable_lc_phi): Likewise.
3553 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
3554 allocate stmt infos for increments.
3555 (vect_record_grouped_load_vectors): Adjust.
3556 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
3557 (vectorize_fold_left_reduction): Likewise.
3558 (vect_transform_reduction): Likewise.
3559 (vect_transform_cycle_phi): Likewise.
3560 (vectorizable_lc_phi): Likewise.
3561 (vectorizable_induction): Likewise.
3562 (vectorizable_live_operation): Likewise.
3563 (vect_transform_loop): Likewise.
3564 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
3565 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
3566 (vect_get_slp_defs): Likewise.
3567 (vect_transform_slp_perm_load): Likewise.
3568 (vect_schedule_slp_instance): Likewise.
3569 (vectorize_slp_instance_root_stmt): Likewise.
3570 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
3571 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
3572 (vect_finish_replace_stmt): Do not return anything.
3573 (vect_finish_stmt_generation): Likewise.
3574 (vect_build_gather_load_calls): Adjust.
3575 (vectorizable_bswap): Likewise.
3576 (vectorizable_call): Likewise.
3577 (vectorizable_simd_clone_call): Likewise.
3578 (vect_create_vectorized_demotion_stmts): Likewise.
3579 (vectorizable_conversion): Likewise.
3580 (vectorizable_assignment): Likewise.
3581 (vectorizable_shift): Likewise.
3582 (vectorizable_operation): Likewise.
3583 (vectorizable_scan_store): Likewise.
3584 (vectorizable_store): Likewise.
3585 (vectorizable_load): Likewise.
3586 (vectorizable_condition): Likewise.
3587 (vectorizable_comparison): Likewise.
3588 (vect_transform_stmt): Likewise.
3589 * tree-vectorizer.c (vec_info::vec_info): Initialize
3591 (vec_info::replace_stmt): Copy over stmt UID rather than
3592 unsetting/setting a stmt info allocating a new UID.
3593 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
3595 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
3597 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
3599 * gimple-ssa-evrp.c (class evrp_folder): New.
3600 (class evrp_dom_walker): Remove.
3601 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
3602 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
3603 * tree-ssa-copy.c (copy_folder::get_value): Same.
3604 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
3605 Pass stmt to get_value.
3606 (substitute_and_fold_engine::replace_phi_args_in): Same.
3607 (substitute_and_fold_dom_walker::after_dom_children): Call
3609 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
3610 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
3611 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
3612 call virtual functions for folding, pre_folding, and post folding.
3613 Call get_value with PHI. Tweak dump.
3614 * tree-ssa-propagate.h (class substitute_and_fold_engine):
3615 New argument to get_value.
3616 New virtual function pre_fold_bb.
3617 New virtual function post_fold_bb.
3618 New virtual function pre_fold_stmt.
3619 New virtual function post_new_stmt.
3620 New function propagate_into_phi_args.
3621 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
3622 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
3624 (vr_values::fold_cond): New.
3625 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
3626 * vr-values.h (class vr_values): Add
3627 simplify_cond_using_ranges_when_edge_is_known.
3629 2020-06-10 Martin Liska <mliska@suse.cz>
3632 * asan.c (asan_emit_stack_protection): Emit
3633 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
3636 2020-06-10 Tamar Christina <tamar.christina@arm.com>
3638 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
3640 2020-06-10 Richard Biener <rguenther@suse.de>
3642 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
3643 (vect_record_grouped_load_vectors): Likewise.
3644 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
3645 (vectorize_fold_left_reduction): Likewise.
3646 (vect_transform_reduction): Likewise.
3647 (vect_transform_cycle_phi): Likewise.
3648 (vectorizable_lc_phi): Likewise.
3649 (vectorizable_induction): Likewise.
3650 (vectorizable_live_operation): Likewise.
3651 (vect_transform_loop): Likewise.
3652 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
3654 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
3655 (vect_get_vec_def_for_operand): Likewise.
3656 (vect_get_vec_def_for_stmt_copy): Likewise.
3657 (vect_get_vec_defs_for_stmt_copy): Likewise.
3658 (vect_get_vec_defs_for_operand): New function.
3659 (vect_get_vec_defs): Likewise.
3660 (vect_build_gather_load_calls): Adjust.
3661 (vect_get_gather_scatter_ops): Likewise.
3662 (vectorizable_bswap): Likewise.
3663 (vectorizable_call): Likewise.
3664 (vectorizable_simd_clone_call): Likewise.
3665 (vect_get_loop_based_defs): Remove.
3666 (vect_create_vectorized_demotion_stmts): Adjust.
3667 (vectorizable_conversion): Likewise.
3668 (vectorizable_assignment): Likewise.
3669 (vectorizable_shift): Likewise.
3670 (vectorizable_operation): Likewise.
3671 (vectorizable_scan_store): Likewise.
3672 (vectorizable_store): Likewise.
3673 (vectorizable_load): Likewise.
3674 (vectorizable_condition): Likewise.
3675 (vectorizable_comparison): Likewise.
3676 (vect_transform_stmt): Adjust and remove no longer applicable
3678 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
3679 STMT_VINFO_VEC_STMTS.
3680 (vec_info::free_stmt_vec_info): Relase it.
3681 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
3682 (_stmt_vec_info::vec_stmts): Add.
3683 (STMT_VINFO_VEC_STMT): Remove.
3684 (STMT_VINFO_VEC_STMTS): New.
3685 (vect_get_vec_def_for_operand_1): Remove.
3686 (vect_get_vec_def_for_operand): Likewise.
3687 (vect_get_vec_defs_for_stmt_copy): Likewise.
3688 (vect_get_vec_def_for_stmt_copy): Likewise.
3689 (vect_get_vec_defs): New overloads.
3690 (vect_get_vec_defs_for_operand): New.
3691 (vect_get_slp_defs): Declare.
3693 2020-06-10 Qian Chao <qianchao9@huawei.com>
3695 PR tree-optimization/95569
3696 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
3698 2020-06-10 Martin Liska <mliska@suse.cz>
3700 PR tree-optimization/92860
3701 * optc-save-gen.awk: Generate new function cl_optimization_compare.
3702 * opth-gen.awk: Generate declaration of the function.
3704 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
3706 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
3707 'future' PowerPC platform.
3708 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
3709 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
3710 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
3712 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
3713 (rs6000_clone_map): Add 'future' system target_clones support.
3715 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
3717 * Makefile.in (ZSTD_INC): Define.
3718 (ZSTD_LIB): Include ZSTD_LDFLAGS.
3719 (CFLAGS-lto-compress.o): Add ZSTD_INC.
3720 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
3722 * configure: Rebuilt.
3724 2020-06-09 Jason Merrill <jason@redhat.com>
3727 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
3729 2020-06-09 Marco Elver <elver@google.com>
3731 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
3732 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
3733 builtin for volatile instrumentation of reads/writes.
3734 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
3735 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
3736 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
3737 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
3738 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
3739 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
3740 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
3741 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
3742 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
3743 * tsan.c (get_memory_access_decl): Argument if access is
3744 volatile. If param tsan-distinguish-volatile is non-zero, and
3745 access if volatile, return volatile instrumentation decl.
3746 (instrument_expr): Check if access is volatile.
3748 2020-06-09 Richard Biener <rguenther@suse.de>
3750 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
3752 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
3754 * omp-offload.c (add_decls_addresses_to_decl_constructor,
3755 omp_finish_file): With in_lto_p, stream out all offload-table
3756 items even if the symtab_node does not exist.
3758 2020-06-09 Richard Biener <rguenther@suse.de>
3760 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
3762 2020-06-09 Martin Liska <mliska@suse.cz>
3764 * gcov-dump.c (print_usage): Fix spacing for --raw option
3767 2020-06-09 Martin Liska <mliska@suse.cz>
3769 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
3770 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
3771 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
3772 Handle all sanitizer options.
3773 (can_inline_edge_p): Use renamed CIF_* enum value.
3775 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
3777 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
3779 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
3780 (@aarch64_bic<mode>): Enable unpacked BIC.
3781 (*bic<mode>3): Enable unpacked BIC.
3783 2020-06-09 Martin Liska <mliska@suse.cz>
3785 PR gcov-profile/95365
3786 * doc/gcov.texi: Compile and link one example in 2 steps.
3788 2020-06-09 Jakub Jelinek <jakub@redhat.com>
3790 PR tree-optimization/95527
3791 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
3793 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
3795 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
3796 'future' PowerPC platform.
3797 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
3798 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
3799 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
3801 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
3802 (rs6000_clone_map): Add 'future' system target_clones support.
3804 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
3808 * omp-offload.c (add_decls_addresses_to_decl_constructor,
3809 omp_finish_file): Skip removed items.
3810 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
3811 to this node for variables and functions.
3813 2020-06-08 Jason Merrill <jason@redhat.com>
3815 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
3816 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
3817 * configure: Regenerate.
3819 2020-06-08 Martin Sebor <msebor@redhat.com>
3821 * postreload.c (reload_cse_simplify_operands): Clear first array element
3822 before using it. Assert a precondition.
3824 2020-06-08 Jakub Jelinek <jakub@redhat.com>
3827 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
3828 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
3829 type is vector boolean.
3831 2020-06-08 Tamar Christina <tamar.christina@arm.com>
3833 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
3835 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
3837 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
3838 instead of VFP_REGS.
3840 2020-06-08 Martin Liska <mliska@suse.cz>
3842 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
3843 in all vcond* patterns.
3845 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
3847 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
3848 Define. No longer include <algorithm>.
3850 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
3852 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
3853 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
3854 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
3855 (parityhi2, parityqi2): New expanders.
3856 (parityhi2_cmp): Implement set parity flag with xorb insn.
3857 (parityqi2_cmp): Implement set parity flag with testb insn.
3858 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
3860 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
3863 * config/rs6000/rs6000.c (rs6000_option_override_internal):
3864 Override flag_cunroll_grow_size.
3866 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
3868 * common.opt (flag_cunroll_grow_size): New flag.
3869 * toplev.c (process_options): Set flag_cunroll_grow_size.
3870 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
3871 Use flag_cunroll_grow_size.
3873 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
3876 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
3877 (ipa_odr_summary_write): Update streaming.
3878 (ipa_odr_read_section): Update streaming.
3880 2020-06-06 Alexandre Oliva <oliva@adacore.com>
3883 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
3885 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
3886 Julian Brown <julian@codesourcery.com>
3888 * gimplify.c (gimplify_adjust_omp_clauses): Remove
3889 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
3891 2020-06-05 Richard Biener <rguenther@suse.de>
3893 PR tree-optimization/95539
3894 * tree-vect-data-refs.c
3895 (vect_slp_analyze_and_verify_instance_alignment): Use
3896 SLP_TREE_REPRESENTATIVE for the data-ref check.
3897 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
3898 back to the first scalar stmt rather than the
3899 SLP_TREE_REPRESENTATIVE to match previous behavior.
3901 2020-06-05 Felix Yang <felix.yang@huawei.com>
3904 * expr.c (emit_move_insn): Check src and dest of the copy to see
3905 if one or both of them are subregs, try to remove the subregs when
3906 innermode and outermode are equal in size and the mode change involves
3907 an implicit round trip through memory.
3909 2020-06-05 Jakub Jelinek <jakub@redhat.com>
3912 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
3913 define_insn_and_split patterns.
3914 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
3915 define_insn patterns.
3917 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
3919 * alloc-pool.h (object_allocator::remove_raw): New.
3920 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
3921 (occurrence::occurrence): Add.
3922 (occurrence::~occurrence): Likewise.
3923 (occurrence::new): Likewise.
3924 (occurrence::delete): Likewise.
3926 (insert_bb): Use new occurence (...) instead of occ_new.
3927 (register_division_in): Likewise.
3928 (free_bb): Use delete occ instead of manually removing
3931 2020-06-05 Richard Biener <rguenther@suse.de>
3934 * cfgexpand.c (expand_debug_expr): Avoid calling
3935 set_mem_attributes_minus_bitpos when we were expanding
3937 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
3938 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
3939 special-cases we do not want MEM_EXPRs for. Assert
3940 we end up with reasonable MEM_EXPRs.
3942 2020-06-05 Lili Cui <lili.cui@intel.com>
3945 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
3947 2020-06-04 Martin Sebor <msebor@redhat.com>
3951 * attribs.c (init_attr_rdwr_indices): Move function here.
3952 * attribs.h (rdwr_access_hash, rdwr_map): Define.
3953 (attr_access): Add 'none'.
3954 (init_attr_rdwr_indices): Declared function.
3955 * builtins.c (warn_for_access)): New function.
3956 (check_access): Call it.
3957 * builtins.h (checK-access): Add an optional argument.
3958 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
3959 (init_attr_rdwr_indices): Declare extern.
3960 (append_attrname): Handle attr_access::none.
3961 (maybe_warn_rdwr_sizes): Same.
3962 (initialize_argument_information): Update comments.
3963 * doc/extend.texi (attribute access): Document 'none'.
3964 * tree-ssa-uninit.c (struct wlimits): New.
3965 (maybe_warn_operand): New function.
3966 (maybe_warn_pass_by_reference): Same.
3967 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
3968 Also call for function calls.
3969 (pass_late_warn_uninitialized::execute): Adjust comments.
3970 (execute_early_warn_uninitialized): Same.
3972 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
3975 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
3976 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
3977 reload if the original insn has it too.
3979 2020-06-04 Richard Biener <rguenther@suse.de>
3981 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
3982 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
3984 2020-06-04 Martin Jambor <mjambor@suse.cz>
3987 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
3988 exceptions check to...
3989 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
3991 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
3992 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
3995 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3998 * config/arm/predicates.md (mve_scatter_memory): Define to
3999 match (mem (reg)) for scatter store memory.
4000 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
4001 define_insn to define_expand.
4002 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
4003 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
4004 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
4005 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
4006 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
4007 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
4008 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
4009 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
4010 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
4011 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
4012 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
4013 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
4014 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
4015 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
4016 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
4017 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
4018 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
4019 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
4020 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
4021 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
4022 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
4024 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
4025 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
4026 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
4027 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
4028 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
4029 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
4030 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
4031 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
4032 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
4033 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
4034 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
4035 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
4036 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
4037 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
4038 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
4039 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
4040 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
4041 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
4042 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
4043 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
4045 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4047 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
4049 (__arm_vbicq_n_s16): Likewise.
4050 (__arm_vbicq_n_u32): Likewise.
4051 (__arm_vbicq_n_s32): Likewise.
4052 (__arm_vbicq): Modify polymorphic variant.
4054 2020-06-04 Richard Biener <rguenther@suse.de>
4056 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
4057 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
4058 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
4059 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
4060 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
4062 (vect_get_slp_defs): ... here.
4063 (vect_get_slp_vect_def): New function.
4065 2020-06-04 Richard Biener <rguenther@suse.de>
4067 * tree-vectorizer.h (_slp_tree::lanes): New.
4068 (SLP_TREE_LANES): Likewise.
4069 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
4070 (vectorizable_reduction): Likewise.
4071 (vect_transform_cycle_phi): Likewise.
4072 (vectorizable_induction): Likewise.
4073 (vectorizable_live_operation): Likewise.
4074 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
4075 (vect_create_new_slp_node): Likewise.
4076 (slp_copy_subtree): Copy it.
4077 (vect_optimize_slp): Use it.
4078 (vect_slp_analyze_node_operations_1): Likewise.
4079 (vect_slp_convert_to_external): Likewise.
4080 (vect_bb_vectorization_profitable_p): Likewise.
4081 * tree-vect-stmts.c (vectorizable_load): Likewise.
4082 (get_vectype_for_scalar_type): Likewise.
4084 2020-06-04 Richard Biener <rguenther@suse.de>
4086 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
4087 (vect_build_slp_tree_2): Simplify building all external op
4089 (vect_slp_analyze_node_operations): Remove push/pop of
4090 STMT_VINFO_DEF_TYPE.
4091 (vect_schedule_slp_instance): Likewise.
4092 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
4093 stmt_info, use the vect_is_simple_use overload combining
4094 SLP and stmt_info analysis.
4095 (vect_is_simple_cond): Likewise.
4096 (vectorizable_store): Adjust.
4097 (vectorizable_condition): Likewise.
4098 (vect_is_simple_use): Fully handle invariant SLP nodes
4099 here. Amend stmt_info operand extraction with COND_EXPR
4101 * tree-vect-loop.c (vectorizable_reduction): Deal with
4102 COND_EXPR representation ugliness.
4104 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
4107 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
4108 Refine from *vcvtps2ph_store<mask_name>.
4109 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
4110 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
4111 (*vcvtps2ph256<merge_mask_name>): New define_insn.
4112 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
4113 * config/i386/subst.md (merge_mask): New define_subst.
4114 (merge_mask_name): New define_subst_attr.
4115 (merge_mask_operand3): Ditto.
4117 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
4119 PR tree-optimization/89430
4121 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
4122 remove ssa_name_ver, store, offset fields.
4123 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
4124 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
4125 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
4128 2020-06-04 Andreas Schwab <schwab@suse.de>
4131 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
4133 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
4135 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
4136 (trunc<mode><pmov_dst_3_lower>2): Refine from
4137 trunc<mode><pmov_dst_3>2.
4139 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
4141 * match.pd (tanh/sinh -> 1/cosh): New simplification.
4143 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
4146 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
4147 is_lfs_stfs_insn and make it recognize lfs as well.
4148 (prefixed_store_p): Use is_lfs_stfs_insn().
4149 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
4151 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
4153 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
4155 (odr_enums): New static var.
4156 (struct odr_enum_val): New struct.
4157 (class odr_enum): New struct.
4158 (odr_enum_map): New hashtable.
4159 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
4160 (add_type_duplicate): Likewise.
4161 (free_odr_warning_data): Do not free TYPE_VALUES.
4162 (register_odr_enum): New function.
4163 (ipa_odr_summary_write): New function.
4164 (ipa_odr_read_section): New function.
4165 (ipa_odr_summary_read): New function.
4166 (class pass_ipa_odr): New pass.
4167 (make_pass_ipa_odr): New function.
4168 * ipa-utils.h (register_odr_enum): Declare.
4169 * lto-section-in.c: (lto_section_name): Add odr_types section.
4170 * lto-streamer.h (enum lto_section_type): Add odr_types section.
4171 * passes.def: Add odr_types pass.
4172 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
4174 (hash_tree): Likewise.
4175 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
4177 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
4179 * timevar.def (TV_IPA_ODR): New timervar.
4180 * tree-pass.h (make_pass_ipa_odr): Declare.
4181 * tree.c (free_lang_data_in_type): Regiser ODR types.
4183 2020-06-03 Romain Naour <romain.naour@gmail.com>
4185 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
4188 2020-06-03 Richard Biener <rguenther@suse.de>
4190 PR tree-optimization/95487
4191 * tree-vect-stmts.c (vectorizable_store): Use a truth type
4192 for the scatter mask.
4194 2020-06-03 Richard Biener <rguenther@suse.de>
4196 PR tree-optimization/95495
4197 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
4198 SLP_TREE_REPRESENTATIVE in the shift assertion.
4200 2020-06-03 Tom Tromey <tromey@adacore.com>
4202 * spellcheck.c (CASE_COST): New define.
4203 (BASE_COST): New define.
4204 (get_edit_distance): Recognize case changes.
4205 (get_edit_distance_cutoff): Update.
4206 (test_edit_distances): Update.
4207 (get_old_cutoff): Update.
4208 (test_find_closest_string): Add case sensitivity test.
4210 2020-06-03 Richard Biener <rguenther@suse.de>
4212 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
4213 the cost vector to unset the visited flag on stmts.
4215 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
4217 * gimplify.c (omp_notice_variable): Use new hook.
4218 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
4219 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
4220 (LANG_HOOKS_DECLS): Add it.
4221 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
4222 (lhd_omp_predetermined_mapping): New.
4223 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
4225 2020-06-03 Jan Hubicka <jh@suse.cz>
4227 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
4228 add LTO_first_tree_tag and LTO_first_gimple_tag.
4229 (lto_tag_is_tree_code_p): Update.
4230 (lto_tag_is_gimple_code_p): Update.
4231 (lto_gimple_code_to_tag): Update.
4232 (lto_tag_to_gimple_code): Update.
4233 (lto_tree_code_to_tag): Update.
4234 (lto_tag_to_tree_code): Update.
4236 2020-06-02 Felix Yang <felix.yang@huawei.com>
4239 * config/aarch64/aarch64.c (aarch64_short_vector_p):
4240 Leave later code to report an error if SVE is disabled.
4242 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
4244 * config/aarch64/aarch64-cores.def (zeus): Define.
4245 * config/aarch64/aarch64-tune.md: Regenerate.
4246 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
4248 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
4251 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
4253 (is_stfs_insn): New helper function.
4255 2020-06-02 Jan Hubicka <jh@suse.cz>
4257 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
4259 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
4261 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
4263 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
4264 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
4265 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
4267 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
4270 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
4271 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
4273 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4275 * config/s390/s390.c (print_operand): Emit vector alignment
4278 2020-06-02 Martin Liska <mliska@suse.cz>
4280 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
4281 as they have variable number of counters.
4282 * gcov-dump.c (main): Add new option -r.
4283 (print_usage): Likewise.
4284 (tag_counters): All new raw format.
4285 * gcov-io.h (struct gcov_kvp): New.
4286 (GCOV_TOPN_VALUES): Remove.
4287 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
4288 (GCOV_TOPN_MEM_COUNTERS): New.
4289 (GCOV_TOPN_DISK_COUNTERS): Likewise.
4290 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
4291 * ipa-profile.c (ipa_profile_generate_summary): Use
4292 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
4293 (ipa_profile_write_edge_summary): Likewise.
4294 (ipa_profile_read_edge_summary): Likewise.
4295 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
4296 * profile.c (sort_hist_values): Sort variable number
4298 (compute_value_histograms): Special case for TOP N counters
4299 that have dynamic number of key-value pairs.
4300 * value-prof.c (dump_histogram_value): Dump variable number
4302 (stream_in_histogram_value): Stream in variable number
4303 of key-value pairs for TOP N counter.
4304 (get_nth_most_common_value): Deal with variable number
4306 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
4308 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
4310 * doc/gcov-dump.texi: Document new -r option.
4312 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
4315 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
4317 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
4319 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
4320 returns (const_int 0) for the destination, then emit nothing.
4322 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
4324 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
4325 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
4326 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
4327 LTO_const_decl_ref, LTO_imported_decl_ref,
4328 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
4329 LTO_namelist_decl_ref; add LTO_global_stream_ref.
4330 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
4331 (lto_input_scc): Update.
4332 (lto_input_tree_1): Update.
4333 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
4334 * lto-streamer.c (lto_tag_name): Update.
4336 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
4338 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
4339 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
4340 * lto-cgraph.c (lto_output_node): Likewise.
4341 (lto_output_varpool_node): Likewise.
4342 (output_offload_tables): Likewise.
4343 (input_node): Likewise.
4344 (input_varpool_node): Likewise.
4345 (input_offload_tables): Likewise.
4346 * lto-streamer-in.c (lto_input_tree_ref): Declare.
4347 (lto_input_var_decl_ref): Declare.
4348 (lto_input_fn_decl_ref): Declare.
4349 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
4350 (lto_output_var_decl_index): Rename to ..
4351 (lto_output_var_decl_ref): ... this.
4352 (lto_output_fn_decl_index): Rename to ...
4353 (lto_output_fn_decl_ref): ... this.
4354 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
4355 (DEFINE_DECL_STREAM_FUNCS): Remove.
4356 (lto_output_var_decl_index): Remove.
4357 (lto_output_fn_decl_index): Remove.
4358 (lto_output_var_decl_ref): Declare.
4359 (lto_output_fn_decl_ref): Declare.
4360 (lto_input_var_decl_ref): Declare.
4361 (lto_input_fn_decl_ref): Declare.
4363 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
4365 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
4366 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
4367 dump infomation if there is no adjusted parameter.
4368 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
4370 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
4372 * Makefile.in (gimple-array-bounds.o): New.
4373 * tree-vrp.c: Move array bounds code...
4374 * gimple-array-bounds.cc: ...here...
4375 * gimple-array-bounds.h: ...and here.
4377 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
4379 * Makefile.in (OBJS): Add value-range-equiv.o.
4380 * tree-vrp.c (*value_range_equiv*): Move to...
4381 * value-range-equiv.cc: ...here.
4382 * tree-vrp.h (class value_range_equiv): Move to...
4383 * value-range-equiv.h: ...here.
4384 * vr-values.h: Include value-range-equiv.h.
4386 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
4389 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
4390 lattice for simple pass-through by-ref argument.
4392 2020-05-31 Jeff Law <law@redhat.com>
4394 * lra.c (add_auto_inc_notes): Remove function.
4395 * reload1.c (add_auto_inc_notes): Similarly. Move into...
4396 * rtlanal.c (add_auto_inc_notes): New function.
4397 * rtl.h (add_auto_inc_notes): Add prototype.
4398 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
4401 2020-05-31 Jan Hubicka <jh@suse.cz>
4403 * lto-section-out.c (lto_output_decl_index): Remove.
4404 (lto_output_field_decl_index): Move to lto-streamer-out.c
4405 (lto_output_fn_decl_index): Move to lto-streamer-out.c
4406 (lto_output_namespace_decl_index): Remove.
4407 (lto_output_var_decl_index): Remove.
4408 (lto_output_type_decl_index): Remove.
4409 (lto_output_type_ref_index): Remove.
4410 * lto-streamer-out.c (output_type_ref): Remove.
4411 (lto_get_index): New function.
4412 (lto_output_tree_ref): Remove.
4413 (lto_indexable_tree_ref): New function.
4414 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
4415 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
4416 (stream_write_tree_ref): Update.
4417 (lto_output_tree): Update.
4418 * lto-streamer.h (lto_output_decl_index): Remove prototype.
4419 (lto_output_field_decl_index): Remove prototype.
4420 (lto_output_namespace_decl_index): Remove prototype.
4421 (lto_output_type_decl_index): Remove prototype.
4422 (lto_output_type_ref_index): Remove prototype.
4423 (lto_output_var_decl_index): Move.
4424 (lto_output_fn_decl_index): Move
4426 2020-05-31 Jakub Jelinek <jakub@redhat.com>
4429 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
4432 2020-05-31 Jeff Law <law@redhat.com>
4434 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
4436 2020-05-31 Jim Wilson <jimw@sifive.com>
4438 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
4440 2020-05-30 Jonathan Yong <10walls@gmail.com>
4442 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
4443 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
4444 import library, but also contains some functions that invoke
4445 others in KERNEL32.DLL.
4447 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
4449 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
4450 (altivec_vmrglw_direct): Ditto.
4451 (altivec_vperm_<mode>_direct): Ditto.
4452 (altivec_vperm_v8hiv16qi): Ditto.
4453 (*altivec_vperm_<mode>_uns_internal): Ditto.
4454 (*altivec_vpermr_<mode>_internal): Ditto.
4455 (vperm_v8hiv4si): Ditto.
4456 (vperm_v16qiv8hi): Ditto.
4458 2020-05-29 Jan Hubicka <jh@suse.cz>
4460 * lto-streamer-in.c (streamer_read_chain): Move here from
4462 (stream_read_tree_ref): New.
4463 (lto_input_tree_1): Simplify.
4464 * lto-streamer-out.c (stream_write_tree_ref): New.
4465 (lto_write_tree_1): Simplify.
4466 (lto_output_tree_1): Simplify.
4467 (DFS::DFS_write_tree): Simplify.
4468 (streamer_write_chain): Move here from tree-stremaer-out.c.
4469 * lto-streamer.h (lto_output_tree_ref): Update prototype.
4470 (stream_read_tree_ref): Declare
4471 (stream_write_tree_ref): Declare
4472 * tree-streamer-in.c (streamer_read_chain): Update to use
4473 stream_read_tree_ref.
4474 (lto_input_ts_common_tree_pointers): Likewise.
4475 (lto_input_ts_vector_tree_pointers): Likewise.
4476 (lto_input_ts_poly_tree_pointers): Likewise.
4477 (lto_input_ts_complex_tree_pointers): Likewise.
4478 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
4479 (lto_input_ts_decl_common_tree_pointers): Likewise.
4480 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
4481 (lto_input_ts_field_decl_tree_pointers): Likewise.
4482 (lto_input_ts_function_decl_tree_pointers): Likewise.
4483 (lto_input_ts_type_common_tree_pointers): Likewise.
4484 (lto_input_ts_type_non_common_tree_pointers): Likewise.
4485 (lto_input_ts_list_tree_pointers): Likewise.
4486 (lto_input_ts_vec_tree_pointers): Likewise.
4487 (lto_input_ts_exp_tree_pointers): Likewise.
4488 (lto_input_ts_block_tree_pointers): Likewise.
4489 (lto_input_ts_binfo_tree_pointers): Likewise.
4490 (lto_input_ts_constructor_tree_pointers): Likewise.
4491 (lto_input_ts_omp_clause_tree_pointers): Likewise.
4492 * tree-streamer-out.c (streamer_write_chain): Update to use
4493 stream_write_tree_ref.
4494 (write_ts_common_tree_pointers): Likewise.
4495 (write_ts_vector_tree_pointers): Likewise.
4496 (write_ts_poly_tree_pointers): Likewise.
4497 (write_ts_complex_tree_pointers): Likewise.
4498 (write_ts_decl_minimal_tree_pointers): Likewise.
4499 (write_ts_decl_common_tree_pointers): Likewise.
4500 (write_ts_decl_non_common_tree_pointers): Likewise.
4501 (write_ts_decl_with_vis_tree_pointers): Likewise.
4502 (write_ts_field_decl_tree_pointers): Likewise.
4503 (write_ts_function_decl_tree_pointers): Likewise.
4504 (write_ts_type_common_tree_pointers): Likewise.
4505 (write_ts_type_non_common_tree_pointers): Likewise.
4506 (write_ts_list_tree_pointers): Likewise.
4507 (write_ts_vec_tree_pointers): Likewise.
4508 (write_ts_exp_tree_pointers): Likewise.
4509 (write_ts_block_tree_pointers): Likewise.
4510 (write_ts_binfo_tree_pointers): Likewise.
4511 (write_ts_constructor_tree_pointers): Likewise.
4512 (write_ts_omp_clause_tree_pointers): Likewise.
4513 (streamer_write_tree_body): Likewise.
4514 (streamer_write_integer_cst): Likewise.
4515 * tree-streamer.h (streamer_read_chain):Declare.
4516 (streamer_write_chain):Declare.
4517 (streamer_write_tree_body): Update prototype.
4518 (streamer_write_integer_cst): Update prototype.
4520 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
4523 * configure: Regenerated.
4525 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
4527 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
4528 (add<mode>3_vcc_zext_dup_exec): Likewise.
4529 (add<mode>3_vcc_zext_dup2): Likewise.
4530 (add<mode>3_vcc_zext_dup2_exec): Likewise.
4532 2020-05-29 Richard Biener <rguenther@suse.de>
4534 PR tree-optimization/95272
4535 * tree-vectorizer.h (_slp_tree::representative): Add.
4536 (SLP_TREE_REPRESENTATIVE): Likewise.
4537 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
4539 (vectorizable_live_operation): Use the representative to
4540 attach the reduction info to.
4541 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
4542 SLP_TREE_REPRESENTATIVE.
4543 (vect_create_new_slp_node): Likewise.
4544 (slp_copy_subtree): Copy it.
4545 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
4546 (vect_slp_analyze_node_operations_1): Pass the representative
4547 to vect_analyze_stmt.
4548 (vect_schedule_slp_instance): Pass the representative to
4549 vect_transform_stmt.
4551 2020-05-29 Richard Biener <rguenther@suse.de>
4553 PR tree-optimization/95356
4554 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
4555 node hacking during analysis.
4557 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
4560 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
4562 2020-05-29 Richard Biener <rguenther@suse.de>
4564 PR tree-optimization/95403
4565 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
4568 2020-05-29 Jakub Jelinek <jakub@redhat.com>
4571 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
4572 declare variant cgraph node removal callback.
4574 2020-05-29 Jakub Jelinek <jakub@redhat.com>
4577 * expr.c (store_expr): If expr_size is constant and significantly
4578 larger than TREE_STRING_LENGTH, set temp to just the
4579 TREE_STRING_LENGTH portion of the STRING_CST.
4581 2020-05-29 Richard Biener <rguenther@suse.de>
4583 PR tree-optimization/95393
4584 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
4585 to build the min/max expression so we simplify cases like
4586 MAX(0, s) immediately.
4588 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
4590 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
4591 for unpacked EOR, ORR, AND.
4593 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
4595 * Makefile.in: don't look for libiberty in the "pic" subdirectory
4596 when building for Mingw. Add dependency on xgcc with the proper
4599 2020-05-28 Jeff Law <law@redhat.com>
4601 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
4603 2020-05-28 Jeff Law <law@redhat.com>
4605 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
4606 make a nonzero adjustment to the memory offset.
4607 (b<ior,xor>hi_msx): Turn into a splitter.
4609 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
4611 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
4612 Fix off-by-one error.
4614 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
4616 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
4617 wb_candidate1 and wb_candidate2.
4618 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
4619 wb_candidate1 and wb_candidate2 if we decided not to use them.
4621 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
4624 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
4625 we have at least some CFI operations when using a frame pointer.
4626 Only redefine the CFA if we have CFI operations.
4628 2020-05-28 Richard Biener <rguenther@suse.de>
4630 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
4631 case for !SLP_TREE_VECTYPE.
4632 (vect_slp_analyze_node_operations): Adjust.
4634 2020-05-28 Richard Biener <rguenther@suse.de>
4636 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
4637 (SLP_TREE_VEC_DEFS): Likewise.
4638 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
4639 (_slp_tree::~_slp_tree): Likewise.
4640 (vect_mask_constant_operand_p): Remove unused function.
4641 (vect_get_constant_vectors): Rename to...
4642 (vect_create_constant_vectors): ... this. Take the
4643 invariant node as argument and code generate it. Remove
4644 dead code, remove temporary asserts. Pass a NULL stmt_info
4645 to vect_init_vector.
4646 (vect_get_slp_defs): Simplify.
4647 (vect_schedule_slp_instance): Code-generate externals and
4648 invariants using vect_create_constant_vectors.
4650 2020-05-28 Richard Biener <rguenther@suse.de>
4652 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
4653 Conditionalize stmt_info use, assert the new stmt cannot throw
4655 (vect_finish_stmt_generation): Adjust assert.
4657 2020-05-28 Richard Biener <rguenther@suse.de>
4659 PR tree-optimization/95273
4660 PR tree-optimization/95356
4661 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
4662 what we set the vector type of the shift operand SLP node
4665 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
4667 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
4670 2020-05-28 Martin Liska <mliska@suse.cz>
4673 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
4674 rename ipcp-unit-growth to ipa-cp-unit-growth.
4676 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
4678 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
4679 from *avx512vl_<code>v2div2qi_store and refine memory size of
4681 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
4682 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
4683 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
4684 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
4685 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
4686 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
4687 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
4688 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
4689 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
4690 (*avx512vl_<code>v2div2si2_store_1): Ditto.
4691 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
4692 (*avx512f_<code>v8div16qi2_store_1): Ditto.
4693 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
4694 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
4695 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
4696 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
4697 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
4698 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
4699 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
4700 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
4701 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
4702 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
4703 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
4704 (*avx512vl_<code>v2div2si2_store_2): Ditto.
4705 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
4706 (*avx512f_<code>v8div16qi2_store_2): Ditto.
4707 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
4708 * config/i386/i386-builtin-types.def: Adjust builtin type.
4709 * config/i386/i386-expand.c: Ditto.
4710 * config/i386/i386-builtin.def: Adjust builtin.
4711 * config/i386/avx512fintrin.h: Ditto.
4712 * config/i386/avx512vlbwintrin.h: Ditto.
4713 * config/i386/avx512vlintrin.h: Ditto.
4715 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
4717 PR gcov-profile/95332
4718 * gcov-io.c (gcov_var::endian): Move field.
4719 (from_file): Add IN_GCOV_TOOL check.
4720 * gcov-io.h (gcov_magic): Ditto.
4722 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
4724 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
4726 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
4728 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
4730 * builtin-types.def (BT_UINT128): New primitive type.
4731 (BT_FN_UINT128_UINT128): New function type.
4732 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
4733 * doc/extend.texi (__builtin_bswap128): Document it.
4734 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
4735 (is_inexpensive_builtin): Likewise.
4736 * fold-const-call.c (fold_const_call_ss): Likewise.
4737 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
4738 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
4739 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
4740 (vectorizable_call): Likewise.
4741 * optabs.c (expand_unop): Always use the double word path for it.
4742 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
4743 * tree.h (uint128_type_node): New global type.
4744 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
4746 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
4748 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
4749 (mmx_hsubv2sf3): Ditto.
4750 (mmx_haddsubv2sf3): New expander.
4751 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
4752 RTL template to model horizontal subtraction and addition.
4753 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
4756 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
4759 * config/i386/sse.md
4760 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
4761 Remove %q operand modifier from insn template.
4762 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
4764 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
4766 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
4767 Enable insn pattern for TARGET_MMX_WITH_SSE.
4768 (*mmx_movshdup): New insn pattern.
4769 (*mmx_movsldup): Ditto.
4770 (*mmx_movss): Ditto.
4771 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
4773 (expand_vec_perm_movs): Handle E_V2SFmode.
4774 (expand_vec_perm_even_odd): Ditto.
4775 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
4776 is already handled by standard shuffle patterns.
4778 2020-05-27 Richard Biener <rguenther@suse.de>
4780 PR tree-optimization/95295
4781 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
4782 merging stores from paths.
4784 2020-05-27 Richard Biener <rguenther@suse.de>
4786 PR tree-optimization/95356
4787 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
4788 type for the shift operand.
4790 2020-05-27 Richard Biener <rguenther@suse.de>
4792 PR tree-optimization/95335
4793 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
4794 lvisited for nodes made external.
4796 2020-05-27 Richard Biener <rguenther@suse.de>
4798 * dump-context.h (debug_dump_context): New class.
4799 (dump_context): Make it friend.
4800 * dumpfile.c (debug_dump_context::debug_dump_context):
4802 (debug_dump_context::~debug_dump_context): Likewise.
4803 * tree-vect-slp.c: Include dump-context.h.
4804 (vect_print_slp_tree): Dump a single SLP node.
4805 (debug): New overload for slp_tree.
4806 (vect_print_slp_graph): Rename from vect_print_slp_tree and
4808 (vect_analyze_slp_instance): Adjust.
4810 2020-05-27 Jakub Jelinek <jakub@redhat.com>
4813 * omp-general.c (omp_declare_variant_remove_hook): New function.
4814 (omp_resolve_declare_variant): Always return base if it is already
4815 declare_variant_alt magic decl itself. Register
4816 omp_declare_variant_remove_hook as cgraph node removal hook.
4818 2020-05-27 Jeff Law <law@redhat.com>
4820 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
4821 for the primary input operand.
4822 (tstsi_variable_bit_qi): Similarly.
4824 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
4826 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
4828 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
4831 * ipa-utils.h (odr_type_p): Also permit calls with
4832 only flag_generate_offload set.
4834 2020-05-26 Alexandre Oliva <oliva@adacore.com>
4836 * gcc.c (validate_switches): Add braced parameter. Adjust all
4837 callers. Expected and skip trailing brace only if braced.
4838 Return after handling one atom otherwise.
4839 (DUMPS_OPTIONS): New.
4840 (cpp_debug_options): Define in terms of it.
4842 2020-05-26 Richard Biener <rguenther@suse.de>
4844 PR tree-optimization/95327
4845 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
4846 when we are not using a scalar shift.
4848 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
4850 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
4851 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
4852 Handle E_V2SImode and E_V4HImode.
4853 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
4854 Assert that E_V2SImode is already handled.
4855 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
4856 is already handled by standard shuffle patterns.
4858 2020-05-26 Jan Hubicka <jh@suse.cz>
4860 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
4863 2020-05-26 Jakub Jelinek <jakub@redhat.com>
4866 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
4867 * omp-general.h (find_combined_omp_for): Declare.
4868 * omp-general.c: Include tree-iterator.h.
4869 (find_combined_omp_for): New function, moved from gimplify.c.
4871 2020-05-26 Alexandre Oliva <oliva@adacore.com>
4873 * common.opt (aux_base_name): Define.
4874 (dumpbase, dumpdir): Mark as Driver options.
4875 (-dumpbase, -dumpdir): Likewise.
4876 (dumpbase-ext, -dumpbase-ext): New.
4877 (auxbase, auxbase-strip): Drop.
4878 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
4880 (-o): Introduce the notion of primary output, mention it
4881 influences auxiliary and dump output names as well, add
4883 (-save-temps): Adjust, move examples into -dump*.
4884 (-save-temps=cwd, -save-temps=obj): Likewise.
4885 (-fdump-final-insns): Adjust.
4886 * dwarf2out.c (gen_producer_string): Drop auxbase and
4887 auxbase_strip; add dumpbase_ext.
4888 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
4889 (save_temps_prefix, save_temps_length): Drop.
4890 (save_temps_overrides_dumpdir): New.
4891 (dumpdir, dumpbase, dumpbase_ext): New.
4892 (dumpdir_length, dumpdir_trailing_dash_added): New.
4893 (outbase, outbase_length): New.
4894 (The Specs Language): Introduce %". Adjust %b and %B.
4895 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
4896 Precede object file with %w when it's the primary output.
4897 (cpp_debug_options): Do not pass on incoming -dumpdir,
4898 -dumpbase and -dumpbase-ext options; recompute them with
4900 (cc1_options): Drop auxbase with and without compare-debug;
4901 use cpp_debug_options instead of dumpbase. Mark asm output
4902 with %w when it's the primary output.
4903 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
4904 %:replace-exception. Add %:dumps.
4905 (driver_handle_option): Implement -save-temps=*/-dumpdir
4906 mutual overriding logic. Save dumpdir, dumpbase and
4907 dumpbase-ext options. Do not save output_file in
4909 (adds_single_suffix_p): New.
4910 (single_input_file_index): New.
4911 (process_command): Combine output dir, output base name, and
4912 dumpbase into dumpdir and outbase.
4913 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
4914 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
4915 and outbase instead of input_basename in %b, %B and in
4916 -save-temps aux files. Handle empty argument %".
4917 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
4918 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
4919 naming. Spec-quote the computed -fdump-final-insns file name.
4920 (debug_auxbase_opt): Drop.
4921 (compare_debug_self_opt_spec_function): Drop auxbase-strip
4923 (compare_debug_auxbase_opt_spec_function): Drop.
4924 (not_actual_file_p): New.
4925 (replace_extension_spec_func): Drop.
4926 (dumps_spec_func): New.
4927 (convert_white_space): Split-out parts into...
4928 (quote_string, whitespace_to_convert_p): ... these. New.
4929 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
4930 (driver::finalize): Release and reset new variables; drop
4932 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
4933 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
4934 empty string otherwise.
4935 (DUMPBASE_SUFFIX): Drop leading period.
4936 (debug_objcopy): Use concat.
4937 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
4938 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
4939 component. Simplify temp file names.
4940 * opts.c (finish_options): Drop aux base name handling.
4941 (common_handle_option): Drop auxbase-strip handling.
4942 * toplev.c (print_switch_values): Drop auxbase, add
4944 (process_options): Derive aux_base_name from dump_base_name
4946 (lang_dependent_init): Compute dump_base_ext along with
4947 dump_base_name. Disable stack usage and callgraph-info during
4948 lto generation and compare-debug recompilation.
4950 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
4951 Uroš Bizjak <ubizjak@gmail.com>
4955 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
4956 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
4957 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
4958 float<floatunssuffix>v2div2sf2.
4959 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
4960 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
4961 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
4962 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
4963 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
4964 * config/i386/i386-builtin.def: Ditto.
4965 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
4966 subregs when both omode and imode are vector mode and
4967 have the same inner mode.
4969 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
4971 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
4972 Only turn MEM_REFs into bit-field stores for small bit-field regions.
4973 (imm_store_chain_info::output_merged_store): Be prepared for sources
4974 with non-integral type in the bit-field insertion case.
4975 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
4976 the largest size for the bit-field case.
4978 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
4980 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
4981 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
4982 (*vec_dupv4hi): Redefine as define_insn.
4983 Remove alternative with general register input.
4984 (*vec_dupv2si): Ditto.
4986 2020-05-25 Richard Biener <rguenther@suse.de>
4988 PR tree-optimization/95309
4989 * tree-vect-slp.c (vect_get_constant_vectors): Move number
4990 of vector computation ...
4991 (vect_slp_analyze_node_operations): ... to analysis phase.
4993 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
4995 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
4996 * lto-streamer.h (streamer_debugging): New constant
4997 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
4998 streamer_debugging check.
4999 (streamer_get_pickled_tree): Likewise.
5000 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
5002 2020-05-25 Richard Biener <rguenther@suse.de>
5004 PR tree-optimization/95308
5005 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
5006 test for TARGET_MEM_REFs.
5008 2020-05-25 Richard Biener <rguenther@suse.de>
5010 PR tree-optimization/95295
5011 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
5012 RHSes and drop to full sm_other if they are not equal.
5014 2020-05-25 Richard Biener <rguenther@suse.de>
5016 PR tree-optimization/95271
5017 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
5018 children vector type.
5019 (vectorizable_call): Pass down slp ops.
5021 2020-05-25 Richard Biener <rguenther@suse.de>
5023 PR tree-optimization/95297
5024 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
5025 skip updating operand 1 vector type.
5027 2020-05-25 Richard Biener <rguenther@suse.de>
5029 PR tree-optimization/95284
5030 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
5033 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
5036 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
5037 (trunc<mode><sf2dfmode_lower>2) New expander.
5038 (extend<sf2dfmode_lower><mode>2): Ditto.
5040 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
5042 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
5043 ubsan_{data,type},ASAN symbols linker-visible.
5045 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
5047 * lto-streamer-out.c (DFS::DFS): Silence warning.
5049 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
5052 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
5053 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
5055 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
5057 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
5060 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
5062 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
5063 * lto-streamer-out.c (create_output_block): Fix whitespace
5064 (lto_write_tree_1): Add (debug) dump.
5065 (DFS::DFS): Add dump.
5066 (DFS::DFS_write_tree_body): Do not dump here.
5067 (lto_output_tree): Improve dumping; do not stream ref when not needed.
5068 (produce_asm_for_decls): Fix whitespace.
5069 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
5070 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
5072 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
5075 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
5076 (truncv32hiv32qi2): Ditto.
5077 (trunc<ssedoublemodelower><mode>2): Ditto.
5078 (trunc<mode><pmov_dst_3>2): Ditto.
5079 (trunc<mode><pmov_dst_mode_4>2): Ditto.
5080 (truncv2div2si2): Ditto.
5081 (truncv8div8qi2): Ditto.
5082 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
5083 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
5084 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
5085 *avx512vl_<code><mode>v<ssescalarnum>qi2.
5087 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
5090 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
5093 2020-05-22 Richard Biener <rguenther@suse.de>
5095 PR tree-optimization/95268
5096 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
5099 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
5101 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
5104 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
5106 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
5107 (lto_input_scc): Optimize streaming of entry lengths.
5108 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
5109 (DFS::DFS): Optimize stremaing of entry lengths
5111 2020-05-22 Richard Biener <rguenther@suse.de>
5114 * doc/invoke.texi (flto): Document behavior of diagnostic
5117 2020-05-22 Richard Biener <rguenther@suse.de>
5119 * tree-vectorizer.h (vect_is_simple_use): New overload.
5120 (vect_maybe_update_slp_op_vectype): New.
5121 * tree-vect-stmts.c (vect_is_simple_use): New overload
5122 accessing operands of SLP vs. non-SLP operation transparently.
5123 (vect_maybe_update_slp_op_vectype): New function updating
5124 the possibly shared SLP operands vector type.
5125 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
5126 using the new vect_is_simple_use overload; update SLP invariant
5127 operand nodes vector type.
5128 (vectorizable_comparison): Likewise.
5129 (vectorizable_call): Likewise.
5130 (vectorizable_conversion): Likewise.
5131 (vectorizable_shift): Likewise.
5132 (vectorizable_store): Likewise.
5133 (vectorizable_condition): Likewise.
5134 (vectorizable_assignment): Likewise.
5135 * tree-vect-loop.c (vectorizable_reduction): Likewise.
5136 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
5137 present SLP_TREE_VECTYPE and check it matches previous
5140 2020-05-22 Richard Biener <rguenther@suse.de>
5142 PR tree-optimization/95248
5143 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
5145 2020-05-22 Richard Biener <rguenther@suse.de>
5147 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
5148 (_slp_tree::~_slp_tree): Likewise.
5149 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
5151 (_slp_tree::~_slp_tree): Implement.
5152 (vect_free_slp_tree): Simplify.
5153 (vect_create_new_slp_node): Likewise. Add nops parameter.
5154 (vect_build_slp_tree_2): Adjust.
5155 (vect_analyze_slp_instance): Likewise.
5157 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5159 * adjust-alignment.c: Include memmodel.h.
5161 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
5164 * config/i386/cpuid.h: Use hexadecimal in comments.
5166 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
5169 * config/i386/i386-builtins.c (processor_features): Move
5170 F_AVX512VP2INTERSECT after F_AVX512BF16.
5171 (isa_names_table): Likewise.
5173 2020-05-21 Martin Liska <mliska@suse.cz>
5175 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
5176 Handle OPT_moutline_atomics.
5177 * config/aarch64/aarch64.c: Add outline-atomics to
5179 * doc/extend.texi: Document the newly added target attribute.
5181 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
5185 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
5186 operands 1 and 2 commutative. Manually swap operands.
5187 (*mmx_nabsv2sf2): Ditto.
5190 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
5192 * config/i386/i386.md (*<code>tf2_1):
5193 Mark operands 1 and 2 commutative.
5194 (*nabstf2_1): Ditto.
5195 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
5196 commutative. Do not swap operands.
5197 (*nabs<mode>2): Ditto.
5199 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
5202 * config/i386/sse.md (<code>v8qiv8hi2): Use
5203 simplify_gen_subreg instead of simplify_subreg.
5204 (<code>v8qiv8si2): Ditto.
5205 (<code>v4qiv4si2): Ditto.
5206 (<code>v4hiv4si2): Ditto.
5207 (<code>v8qiv8di2): Ditto.
5208 (<code>v4qiv4di2): Ditto.
5209 (<code>v2qiv2di2): Ditto.
5210 (<code>v4hiv4di2): Ditto.
5211 (<code>v2hiv2di2): Ditto.
5212 (<code>v2siv2di2): Ditto.
5214 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
5217 * config/i386/i386.md (*pushsi2_rex64):
5218 Use "e" constraint instead of "i".
5220 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
5222 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
5223 (lto_input_tree_1): Strenghten sanity check.
5224 (lto_input_tree): Update call of lto_input_scc.
5225 * lto-streamer-out.c: Include ipa-utils.h
5226 (create_output_block): Initialize local_trees if merigng is going
5228 (destroy_output_block): Destroy local_trees.
5229 (DFS): Add max_local_entry.
5230 (local_tree_p): New function.
5231 (DFS::DFS): Initialize and maintain it.
5232 (DFS::DFS_write_tree): Decide on streaming format.
5233 (lto_output_tree): Stream inline singleton SCCs
5234 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
5235 (struct output_block): Add local_trees.
5236 (lto_input_scc): Update prototype.
5238 2020-05-20 Patrick Palka <ppalka@redhat.com>
5241 * hash-table.h (hash_table::find_with_hash): Move up the call to
5244 2020-05-20 Martin Liska <mliska@suse.cz>
5246 * lto-compress.c (lto_compression_zstd): Fill up
5247 num_compressed_il_bytes.
5248 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
5250 2020-05-20 Richard Biener <rguenther@suse.de>
5252 PR tree-optimization/95219
5253 * tree-vect-loop.c (vectorizable_induction): Reduce
5254 group_size before computing the number of required IVs.
5256 2020-05-20 Richard Biener <rguenther@suse.de>
5259 * tree-inline.c (remap_gimple_stmt): Revert adjusting
5260 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
5262 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5263 Andre Vieira <andre.simoesdiasvieira@arm.com>
5266 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
5268 (mve_vector_mem_operand): Likewise.
5269 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
5270 the load from memory to a core register is legitimate for give mode.
5271 (mve_vector_mem_operand): Define function.
5272 (arm_print_operand): Modify comment.
5273 (arm_mode_base_reg_class): Define.
5274 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
5275 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
5276 * config/arm/constraints.md (Ux): Likewise.
5278 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
5279 add support for missing Vector Store Register and Vector Load Register.
5280 Add a new alternative to support load from memory to PC (or label) in
5282 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
5283 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
5284 mve_memory_operand and also modify the MVE instructions to emit.
5285 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
5286 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
5287 mve_memory_operand and also modify the MVE instructions to emit.
5288 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
5289 mve_memory_operand and also modify the MVE instructions to emit.
5290 (mve_vldrhq_z_fv8hf): Likewise.
5291 (mve_vldrhq_z_<supf><mode>): Likewise.
5292 (mve_vldrwq_fv4sf): Likewise.
5293 (mve_vldrwq_<supf>v4si): Likewise.
5294 (mve_vldrwq_z_fv4sf): Likewise.
5295 (mve_vldrwq_z_<supf>v4si): Likewise.
5296 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
5297 (mve_vld1q_<supf><mode>): Likewise.
5298 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
5300 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
5301 mve_memory_operand and also modify the MVE instructions to emit.
5302 (mve_vstrhq_p_<supf><mode>): Likewise.
5303 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
5305 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
5306 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
5307 instructions to emit.
5308 (mve_vstrwq_p_<supf>v4si): Likewise.
5309 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
5310 * config/arm/predicates.md (mve_memory_operand): Define.
5312 2020-05-30 Richard Biener <rguenther@suse.de>
5315 * c-fold.c (c_fully_fold_internal): Enhance guard on
5318 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
5321 * Makefile.in (OBJS): Add adjust-alignment.o.
5322 * adjust-alignment.c (pass_data_adjust_alignment): New.
5323 (pass_adjust_alignment): New.
5324 (pass_adjust_alignment::execute): New.
5325 (make_pass_adjust_alignment): New.
5326 * tree-pass.h (make_pass_adjust_alignment): New.
5327 * passes.def: Add pass_adjust_alignment.
5329 2020-05-19 Alex Coplan <alex.coplan@arm.com>
5332 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
5333 identity permutation.
5335 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
5337 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
5338 msp430_small, msp430_large and size24plus DejaGNU effective
5340 Improve grammar in descriptions for size20plus and size32plus effective
5343 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
5345 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
5346 callee saved registers only in xBPF.
5347 (bpf_expand_prologue): Save callee saved registers only in xBPF.
5348 (bpf_expand_epilogue): Likewise for restoring.
5349 * doc/invoke.texi (eBPF Options): Document this is activated by
5352 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
5354 * config/bpf/bpf.opt (mxbpf): New option.
5355 * doc/invoke.texi (Option Summary): Add -mxbpf.
5356 (eBPF Options): Document -mxbbpf.
5358 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
5361 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
5362 (<code>v32qiv32hi2): Ditto.
5363 (<code>v8qiv8hi2): Ditto.
5364 (<code>v16qiv16si2): Ditto.
5365 (<code>v8qiv8si2): Ditto.
5366 (<code>v4qiv4si2): Ditto.
5367 (<code>v16hiv16si2): Ditto.
5368 (<code>v8hiv8si2): Ditto.
5369 (<code>v4hiv4si2): Ditto.
5370 (<code>v8qiv8di2): Ditto.
5371 (<code>v4qiv4di2): Ditto.
5372 (<code>v2qiv2di2): Ditto.
5373 (<code>v8hiv8di2): Ditto.
5374 (<code>v4hiv4di2): Ditto.
5375 (<code>v2hiv2di2): Ditto.
5376 (<code>v8siv8di2): Ditto.
5377 (<code>v4siv4di2): Ditto.
5378 (<code>v2siv2di2): Ditto.
5380 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
5382 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
5383 (riscv_implied_info): New.
5384 (riscv_subset_list): Add handle_implied_ext.
5385 (riscv_subset_list::to_string): New parameter version_p to
5386 control output format.
5387 (riscv_subset_list::handle_implied_ext): New.
5388 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
5389 (riscv_arch_str): New parameter version_p to control output format.
5390 (riscv_expand_arch): New.
5391 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
5393 * config/riscv/riscv.h (riscv_expand_arch): New,
5394 (EXTRA_SPEC_FUNCTIONS): Define.
5395 (ASM_SPEC): Transform -march= via riscv_expand_arch.
5397 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
5399 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
5400 parse_multiletter_ext.
5401 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
5402 adjust parsing order for 's' and 'x'.
5404 2020-05-19 Richard Biener <rguenther@suse.de>
5406 * tree-vectorizer.h (_slp_tree::vectype): Add field.
5407 (SLP_TREE_VECTYPE): New.
5408 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
5410 (vect_create_new_slp_node): Likewise.
5411 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
5413 (vect_slp_analyze_node_operations): Walk nodes children for
5415 (vect_get_constant_vectors): Use local scope op variable.
5416 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
5417 (vect_model_simple_cost): Adjust.
5418 (vect_model_store_cost): Likewise.
5419 (vectorizable_store): Likewise.
5421 2020-05-18 Martin Sebor <msebor@redhat.com>
5424 * tree-object-size.c (decl_init_size): New function.
5425 (addr_object_size): Call it.
5426 * tree.h (last_field): Declare.
5427 (first_field): Add attribute nonnull.
5429 2020-05-18 Martin Sebor <msebor@redhat.com>
5432 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
5433 * tree.c (component_ref_size): Correct the handling or array members
5435 Drop a pointless test.
5436 Rename a local variable.
5438 2020-05-18 Jason Merrill <jason@redhat.com>
5440 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
5441 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
5443 2020-05-14 Jason Merrill <jason@redhat.com>
5445 * doc/install.texi (Prerequisites): Update boostrap compiler
5446 requirement to C++11/GCC 4.8.
5448 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5450 PR tree-optimization/94952
5451 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
5452 Initialize variables bitpos, bitregion_start, and bitregion_end in
5453 order to silence warnings about use of uninitialized variables.
5455 2020-05-18 Carl Love <cel@us.ibm.com>
5458 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
5459 first_match_index_<mode>.
5460 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
5461 additional test cases with zero vector elements.
5463 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
5466 * config/i386/i386-expand.c (ix86_expand_int_movcc):
5467 Avoid reversing a non-trapping comparison to a trapping one.
5469 2020-05-18 Alex Coplan <alex.coplan@arm.com>
5471 * config/arm/arm.c (output_move_double): Fix codegen when loading into
5472 a register pair with an odd base register.
5474 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
5476 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
5477 Do not emit FLAGS_REG clobber for TFmode.
5478 * config/i386/i386.md (*<code>tf2_1): Rewrite as
5479 define_insn_and_split. Mark operands 1 and 2 commutative.
5480 (*nabstf2_1): Ditto.
5481 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
5482 Do not swap memory operands. Simplify RTX generation.
5483 (neg abs SSE splitter): Ditto.
5484 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
5485 commutative. Do not swap operands. Simplify RTX generation.
5486 (*nabs<mode>2): Ditto.
5488 2020-05-18 Richard Biener <rguenther@suse.de>
5490 * tree-vect-slp.c (vect_slp_bb): Start after labels.
5491 (vect_get_constant_vectors): Really place init stmt after scalar defs.
5492 * tree-vect-stmts.c (vect_init_vector_1): Insert before
5495 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
5497 * config/i386/driver-i386.c (host_detect_local_cpu): Support
5498 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
5501 2020-05-18 Richard Biener <rguenther@suse.de>
5504 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
5505 when inlining into a non-call EH function.
5507 2020-05-18 Richard Biener <rguenther@suse.de>
5509 PR tree-optimization/95172
5510 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
5511 eventually need the conditional processing.
5512 (execute_sm_exit): When processing an orderd sequence
5513 avoid doing any conditional processing.
5514 (hoist_memory_references): Pass down whether all edges
5515 have ordered processing for a ref to execute_sm.
5517 2020-05-17 Jeff Law <law@redhat.com>
5519 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
5520 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
5521 into a single pattern using pc_or_label_operand.
5522 * config/h8300/combiner.md (bit branch patterns): Likewise.
5523 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
5525 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
5528 * config/i386/i386-features.c (has_non_address_hard_reg):
5530 (pseudo_reg_set): This. Return the SET expression. Ignore
5531 pseudo register push.
5532 (general_scalar_to_vector_candidate_p): Combine single_set and
5533 has_non_address_hard_reg calls to pseudo_reg_set.
5534 (timode_scalar_to_vector_candidate_p): Likewise.
5535 * config/i386/i386.md (*pushv1ti2): New pattern.
5537 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5540 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5542 * tree-vrp.c (operand_less_p): Move to...
5543 * vr-values.c (operand_less_p): ...here.
5544 * tree-vrp.h (operand_less_p): Remove.
5546 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5548 * tree-vrp.c (operand_less_p): Move to...
5549 * vr-values.c (operand_less_p): ...here.
5550 * tree-vrp.h (operand_less_p): Remove.
5552 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5554 * tree-vrp.c (class vrp_insert): Remove prototype for
5557 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5559 * tree-vrp.c (class live_names): New.
5560 (live_on_edge): Move into live_names.
5561 (build_assert_expr_for): Move into vrp_insert.
5562 (find_assert_locations_in_bb): Rename from
5563 find_assert_locations_1.
5564 (process_assert_insertions_for): Move into vrp_insert.
5565 (compare_assert_loc): Same.
5566 (remove_range_assertions): Same.
5567 (dump_asserts_for): Rename to vrp_insert::dump.
5568 (debug_asserts_for): Rename to vrp_insert::debug.
5569 (dump_all_asserts): Rename to vrp_insert::dump.
5570 (debug_all_asserts): Rename to vrp_insert::debug.
5572 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
5574 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
5575 check_array_ref, check_mem_ref, and search_for_addr_array
5577 (class array_bounds_checker): ...here.
5578 (class check_array_bounds_dom_walker): Adjust to use
5579 array_bounds_checker.
5580 (check_all_array_refs): Move into array_bounds_checker and rename
5582 (class vrp_folder): Make fold_predicate_in private.
5584 2020-05-15 Jeff Law <law@redhat.com>
5586 * config/h8300/h8300.md (SFI iterator): New iterator for
5588 * config/h8300/peepholes.md (memory comparison): Use mode
5589 iterator to consolidate 3 patterns into one.
5590 (stack allocation and stack store): Handle SFmode. Handle
5593 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
5595 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
5596 RS6000_BTM_POWERPC64.
5598 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
5600 * config/i386/i386.md (SWI48DWI): New mode iterator.
5601 (*push<mode>2): Allow XMM registers.
5602 (*pushdi2_rex64): Ditto.
5603 (*pushsi2_rex64): Ditto.
5605 (push XMM reg splitter): New splitter
5607 (*pushdf) Change "x" operand constraint to "v".
5608 (*pushsf_rex64): Ditto.
5611 2020-05-15 Richard Biener <rguenther@suse.de>
5613 PR tree-optimization/92260
5614 * tree-vect-slp.c (vect_get_constant_vectors): Compute
5615 the number of vector stmts in a canonical way.
5617 2020-05-15 Martin Liska <mliska@suse.cz>
5619 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
5622 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
5624 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
5626 2020-05-15 Richard Biener <rguenther@suse.de>
5628 PR tree-optimization/95133
5629 * gimple-ssa-split-paths.c
5630 (find_block_to_duplicate_for_splitting_paths): Check for
5633 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
5635 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
5637 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
5639 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
5642 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
5643 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
5646 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
5649 * config/i386/i386.md (isa): Add sse3_noavx.
5650 (enabled): Handle sse3_noavx.
5652 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
5653 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
5654 alternatives. Match commutative vec_select selector operands.
5655 (*mmx_haddv2sf3_low): New insn pattern.
5657 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
5658 (*mmx_hsubv2sf3_low): New insn pattern.
5660 2020-05-15 Richard Biener <rguenther@suse.de>
5662 PR tree-optimization/33315
5663 * tree-ssa-sink.c: Include tree-eh.h.
5664 (sink_stats): Add commoned member.
5665 (sink_common_stores_to_bb): New function implementing store
5666 commoning by sinking to the successor.
5667 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
5668 (pass_sink_code::execute): Likewise. Record commoned stores
5671 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
5673 PR rtl-optimization/37451, part of PR target/61837
5674 * loop-doloop.c (doloop_simplify_count): New function. Simplify
5675 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
5676 (doloop_modify): Call doloop_simplify_count.
5678 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
5681 * doc/sourcebuild.texi: Document effective target lgccjit.
5683 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
5685 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
5686 define_expand, and rename the original to ...
5687 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
5688 (add<mode>3_zext_dup_exec): Likewise, with ...
5689 (add<mode>3_vcc_zext_dup_exec): ... this.
5690 (add<mode>3_zext_dup2): Likewise, with ...
5691 (add<mode>3_zext_dup_exec): ... this.
5692 (add<mode>3_zext_dup2_exec): Likewise, with ...
5693 (add<mode>3_zext_dup2): ... this.
5694 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
5695 addv64di3_zext* calls to use addv64di3_vcc_zext*.
5697 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
5700 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
5701 (extendv2sfv2df2): Ditto.
5703 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
5705 * configure: Regenerated.
5707 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
5709 * config/arm/arm.c (reg_needs_saving_p): New function.
5710 (use_return_insn): Use reg_needs_saving_p.
5711 (arm_get_vfp_saved_size): Likewise.
5712 (arm_compute_frame_layout): Likewise.
5713 (arm_save_coproc_regs): Likewise.
5714 (thumb1_expand_epilogue): Likewise.
5715 (arm_expand_epilogue_apcs_frame): Likewise.
5716 (arm_expand_epilogue): Likewise.
5718 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
5720 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
5722 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
5725 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
5727 (floatv2siv2df2): New expander.
5728 (floatunsv2siv2df2): New insn pattern.
5730 (fix_truncv2dfv2si2): New expander.
5731 (fixuns_truncv2dfv2si2): New insn pattern.
5733 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
5736 * config/aarch64/aarch64-sve-builtins.cc
5737 (handle_arm_sve_vector_bits_attribute): Create a copy of the
5738 original type's TYPE_MAIN_VARIANT, then reapply all the differences
5739 between the original type and its main variant.
5741 2020-05-14 Richard Biener <rguenther@suse.de>
5744 * real.c (real_to_decimal_for_mode): Make sure we handle
5745 a zero with nonzero exponent.
5747 2020-05-14 Jakub Jelinek <jakub@redhat.com>
5749 * Makefile.in (GTFILES): Add omp-general.c.
5750 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
5751 calls_declare_variant_alt members and initialize them in the
5753 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
5754 calls to declare_variant_alt nodes.
5755 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
5756 and calls_declare_variant_alt.
5757 (input_overwrite_node): Read them back.
5758 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
5760 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
5762 (tree_function_versioning): Copy calls_declare_variant_alt bit.
5763 * omp-offload.c (execute_omp_device_lower): Call
5764 omp_resolve_declare_variant on direct function calls.
5765 (pass_omp_device_lower::gate): Also enable for
5766 calls_declare_variant_alt functions.
5767 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
5768 (omp_context_selector_matches): Handle the case when
5769 cfun->curr_properties has PROP_gimple_any bit set.
5770 (struct omp_declare_variant_entry): New type.
5771 (struct omp_declare_variant_base_entry): New type.
5772 (struct omp_declare_variant_hasher): New type.
5773 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
5775 (omp_declare_variants): New variable.
5776 (struct omp_declare_variant_alt_hasher): New type.
5777 (omp_declare_variant_alt_hasher::hash,
5778 omp_declare_variant_alt_hasher::equal): New methods.
5779 (omp_declare_variant_alt): New variables.
5780 (omp_resolve_late_declare_variant): New function.
5781 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
5782 when called late. Create a magic declare_variant_alt fndecl and
5783 cgraph node and return that if decision needs to be deferred until
5784 after gimplification.
5785 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
5789 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
5790 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
5791 entry block if info->after_stmt is NULL, otherwise add after that stmt
5792 and update it after adding each stmt.
5793 (ipa_simd_modify_function_body): Initialize info.after_stmt.
5795 * function.h (struct function): Add has_omp_target bit.
5796 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
5798 (omp_discover_declare_target_tgt_fn_r): ... this.
5799 (omp_discover_declare_target_var_r): Call
5800 omp_discover_declare_target_tgt_fn_r instead of
5801 omp_discover_declare_target_fn_r.
5802 (omp_discover_implicit_declare_target): Also queue functions with
5803 has_omp_target bit set, for those walk with
5804 omp_discover_declare_target_fn_r, for declare target to functions
5805 walk with omp_discover_declare_target_tgt_fn_r.
5807 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
5810 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
5811 Add SSE/AVX alternative. Change operand predicates from
5812 nonimmediate_operand to register_mmxmem_operand.
5813 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5814 (fix_truncv2sfv2si2): New expander.
5815 (fixuns_truncv2sfv2si2): New insn pattern.
5817 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
5818 Add SSE/AVX alternative. Change operand predicates from
5819 nonimmediate_operand to register_mmxmem_operand.
5820 Enable instruction pattern for TARGET_MMX_WITH_SSE.
5821 (floatv2siv2sf2): New expander.
5822 (floatunsv2siv2sf2): New insn pattern.
5824 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
5826 (IX86_BUILTIN_PI2FD): Ditto.
5828 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
5830 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
5832 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
5835 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
5837 * config/s390/s390.c (allocate_stack_space): Add missing updates
5838 of last_probe_offset.
5840 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
5842 * config/s390/s390.md ("allocate_stack"): Call
5843 anti_adjust_stack_and_probe_stack_clash when stack clash
5844 protection is enabled.
5845 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
5846 prototype. Remove static.
5847 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
5850 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
5852 * config/rs6000/altivec.h (vec_extractl): New #define.
5853 (vec_extracth): Likewise.
5854 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
5855 (UNSPEC_EXTRACTR): Likewise.
5856 (vextractl<mode>): New expansion.
5857 (vextractl<mode>_internal): New insn.
5858 (vextractr<mode>): New expansion.
5859 (vextractr<mode>_internal): New insn.
5860 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
5861 New built-in function.
5862 (__builtin_altivec_vextduhvlx): Likewise.
5863 (__builtin_altivec_vextduwvlx): Likewise.
5864 (__builtin_altivec_vextddvlx): Likewise.
5865 (__builtin_altivec_vextdubvhx): Likewise.
5866 (__builtin_altivec_vextduhvhx): Likewise.
5867 (__builtin_altivec_vextduwvhx): Likewise.
5868 (__builtin_altivec_vextddvhx): Likewise.
5869 (__builtin_vec_extractl): New overloaded built-in function.
5870 (__builtin_vec_extracth): Likewise.
5871 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
5872 Define overloaded forms of __builtin_vec_extractl and
5873 __builtin_vec_extracth.
5874 (builtin_function_type): Add cases to mark arguments of new
5875 built-in functions as unsigned.
5876 (rs6000_common_init_builtins): Add
5877 opaque_ftype_opaque_opaque_opaque_opaque.
5878 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
5879 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
5880 for a Future Architecture): Add description of vec_extractl and
5881 vec_extractr built-in functions.
5883 2020-05-13 Richard Biener <rguenther@suse.de>
5885 * target.def (add_stmt_cost): Add new vectype parameter.
5886 * targhooks.c (default_add_stmt_cost): Adjust.
5887 * targhooks.h (default_add_stmt_cost): Likewise.
5888 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
5890 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
5891 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
5892 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
5894 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
5895 (dump_stmt_cost): Add new vectype parameter.
5896 (add_stmt_cost): Likewise.
5897 (record_stmt_cost): Likewise.
5898 (record_stmt_cost): Add overload with old signature.
5899 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
5901 (vect_get_known_peeling_cost): Likewise.
5902 (vect_estimate_min_profitable_iters): Likewise.
5903 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
5904 * tree-vect-stmts.c (record_stmt_cost): Likewise.
5905 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
5906 and pass down correct vectype and NULL stmt_info.
5907 (vect_model_simple_cost): Adjust.
5908 (vect_model_store_cost): Likewise.
5910 2020-05-13 Richard Biener <rguenther@suse.de>
5912 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
5913 (_slp_instance::group_size): Likewise.
5914 * tree-vect-loop.c (vectorizable_reduction): The group size
5915 is the number of lanes in the node.
5916 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
5917 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
5918 verify it matches the instance trees number of lanes.
5919 (vect_slp_analyze_node_operations_1): Use the numer of lanes
5920 in the node as group size.
5921 (vect_bb_vectorization_profitable_p): Use the instance root
5922 number of lanes for the size of life.
5923 (vect_schedule_slp_instance): Use the number of lanes as
5925 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
5926 parameter. Use the number of lanes of the load for the group
5927 size in the gap adjustment code.
5928 (vect_analyze_stmt): Adjust.
5929 (vect_transform_stmt): Likewise.
5931 2020-05-13 Jakub Jelinek <jakub@redhat.com>
5934 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
5935 if the last insn is a note.
5937 PR tree-optimization/95060
5938 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
5939 if it is the single use of the FMA internal builtin.
5941 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
5943 PR tree-optimization/94969
5944 * tree-data-dependence.c (constant_access_functions): Rename to...
5945 (invariant_access_functions): ...this. Add parameter. Check for
5946 invariant access function, rather than constant.
5947 (build_classic_dist_vector): Call above function.
5948 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
5950 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
5953 * doc/extend.texi (x86Operandmodifiers): Document more x86
5955 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
5957 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
5959 * tree-vrp.c (class vrp_insert): New.
5960 (insert_range_assertions): Move to class vrp_insert.
5961 (dump_all_asserts): Same as above.
5962 (dump_asserts_for): Same as above.
5963 (live): Same as above.
5964 (need_assert_for): Same as above.
5965 (live_on_edge): Same as above.
5966 (finish_register_edge_assert_for): Same as above.
5967 (find_switch_asserts): Same as above.
5968 (find_assert_locations): Same as above.
5969 (find_assert_locations_1): Same as above.
5970 (find_conditional_asserts): Same as above.
5971 (process_assert_insertions): Same as above.
5972 (register_new_assert_for): Same as above.
5973 (vrp_prop): New variable fun.
5974 (vrp_initialize): New parameter.
5975 (identify_jump_threads): Same as above.
5976 (execute_vrp): Same as above.
5979 2020-05-12 Keith Packard <keith.packard@sifive.com>
5981 * config/riscv/riscv.c (riscv_unique_section): New.
5982 (TARGET_ASM_UNIQUE_SECTION): New.
5984 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
5986 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
5987 * config/riscv/riscv-passes.def: New file.
5988 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
5989 * config/riscv/riscv-shorten-memrefs.c: New file.
5990 * config/riscv/riscv.c (tree-pass.h): New include.
5991 (riscv_compressed_reg_p): New Function
5992 (riscv_compressed_lw_offset_p): Likewise.
5993 (riscv_compressed_lw_address_p): Likewise.
5994 (riscv_shorten_lw_offset): Likewise.
5995 (riscv_legitimize_address): Attempt to convert base + large_offset
5996 to compressible new_base + small_offset.
5997 (riscv_address_cost): Make anticipated compressed load/stores
5998 cheaper for code size than uncompressed load/stores.
5999 (riscv_register_priority): Move compressed register check to
6000 riscv_compressed_reg_p.
6001 * config/riscv/riscv.h (C_S_BITS): Define.
6002 (CSW_MAX_OFFSET): Define.
6003 * config/riscv/riscv.opt (mshorten-memefs): New option.
6004 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
6005 (PASSES_EXTRA): Add riscv-passes.def.
6006 * doc/invoke.texi: Document -mshorten-memrefs.
6008 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
6009 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
6010 * doc/tm.texi: Regenerate.
6011 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
6012 * sched-deps.c (attempt_change): Use old address if it is cheaper than
6014 * target.def (new_address_profitable_p): New hook.
6015 * targhooks.c (default_new_address_profitable_p): New function.
6016 * targhooks.h (default_new_address_profitable_p): Declare.
6018 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
6021 * config/i386/mmx.md (copysignv2sf3): New expander.
6022 (xorsignv2sf3): Ditto.
6023 (signbitv2sf3): Ditto.
6025 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
6028 * config/i386/mmx.md (fmav2sf4): New insn pattern.
6033 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
6035 * Makefile.in (CET_HOST_FLAGS): New.
6036 (COMPILER): Add $(CET_HOST_FLAGS).
6037 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
6038 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
6040 * aclocal.m4: Regenerated.
6041 * configure: Likewise.
6043 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
6046 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
6047 (*mmx_<code>v2sf2): New insn_and_split pattern.
6048 (*mmx_nabsv2sf2): Ditto.
6049 (*mmx_andnotv2sf3): New insn pattern.
6050 (*mmx_<code>v2sf3): Ditto.
6051 * config/i386/i386.md (absneg_op): New code attribute.
6052 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
6053 (ix86_build_signbit_mask): Ditto.
6055 2020-05-12 Richard Biener <rguenther@suse.de>
6057 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
6060 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6062 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
6063 Update prototype to include "local" argument.
6064 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
6065 "local" argument. Handle local common decls.
6066 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
6067 msp430_output_aligned_decl_common call with 0 for "local" argument.
6068 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
6070 2020-05-12 Richard Biener <rguenther@suse.de>
6072 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
6074 2020-05-12 Martin Liska <mliska@suse.cz>
6078 * sanopt.c (sanitize_rewrite_addressable_params):
6079 Clear DECL_NOT_GIMPLE_REG_P for argument.
6081 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
6083 PR tree-optimization/94980
6084 * tree-vect-generic.c (expand_vector_comparison): Use
6085 vector_element_bits_tree to get the element size in bits,
6086 rather than using TYPE_SIZE.
6087 (expand_vector_condition, vector_element): Likewise.
6089 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
6091 PR tree-optimization/94980
6092 * tree-vect-generic.c (build_replicated_const): Take the number
6093 of bits as a parameter, instead of the type of the elements.
6094 (do_plus_minus): Update accordingly, using vector_element_bits
6095 to calculate the correct number of bits.
6096 (do_negate): Likewise.
6098 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
6100 PR tree-optimization/94980
6101 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
6102 * tree.c (vector_element_bits, vector_element_bits_tree): New.
6103 * match.pd: Use the new functions instead of determining the
6104 vector element size directly from TYPE_SIZE(_UNIT).
6105 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
6106 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
6107 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
6108 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
6109 (expand_vector_conversion): Likewise.
6110 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
6111 a divisor. Convert the dividend to bits to compensate.
6112 * tree-vect-loop.c (vectorizable_live_operation): Call
6113 vector_element_bits instead of open-coding it.
6115 2020-05-12 Jakub Jelinek <jakub@redhat.com>
6117 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
6118 * omp-offload.c: Include context.h.
6119 (omp_declare_target_fn_p, omp_declare_target_var_p,
6120 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
6121 omp_discover_implicit_declare_target): New functions.
6122 * cgraphunit.c (analyze_functions): Call
6123 omp_discover_implicit_declare_target.
6125 2020-05-12 Richard Biener <rguenther@suse.de>
6127 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
6128 literal constant &MEM[..] to a constant literal.
6130 2020-05-12 Richard Biener <rguenther@suse.de>
6132 PR tree-optimization/95045
6133 * dbgcnt.def (lim): Add debug-counter.
6134 * tree-ssa-loop-im.c: Include dbgcnt.h.
6135 (find_refs_for_sm): Use lim debug counter for store motion
6137 (do_store_motion): Rename form store_motion. Commit edge
6139 (store_motion_loop): ... here.
6140 (tree_ssa_lim): Adjust.
6142 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6144 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
6145 (vec_ctzm): Rename to vec_cnttzm.
6146 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
6147 Change fourth operand for vec_ternarylogic to require
6148 compatibility with unsigned SImode rather than unsigned QImode.
6149 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
6150 Remove overloaded forms of vec_gnb that are no longer needed.
6151 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
6152 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
6153 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
6154 vec_gnb; move vec_ternarylogic documentation into this section
6155 and replace const unsigned char with const unsigned int as its
6158 2020-05-11 Carl Love <cel@us.ibm.com>
6160 * config/rs6000/altivec.h (vec_genpcvm): New #define.
6161 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
6163 (XXGENPCVM_V8HI): Likewise.
6164 (XXGENPCVM_V4SI): Likewise.
6165 (XXGENPCVM_V2DI): Likewise.
6166 (XXGENPCVM): New overloaded built-in instantiation.
6167 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
6168 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
6169 (altivec_expand_builtin): Add special handling for
6170 FUTURE_BUILTIN_VEC_XXGENPCVM.
6171 (builtin_function_type): Add handling for
6172 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
6173 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
6174 (UNSPEC_XXGENPCV): New constant.
6175 (xxgenpcvm_<mode>_internal): New insn.
6176 (xxgenpcvm_<mode>): New expansion.
6177 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
6179 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6181 * config/rs6000/altivec.h (vec_strir): New #define.
6182 (vec_stril): Likewise.
6183 (vec_strir_p): Likewise.
6184 (vec_stril_p): Likewise.
6185 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
6186 (UNSPEC_VSTRIL): Likewise.
6187 (vstrir_<mode>): New expansion.
6188 (vstrir_code_<mode>): New insn.
6189 (vstrir_p_<mode>): New expansion.
6190 (vstrir_p_code_<mode>): New insn.
6191 (vstril_<mode>): New expansion.
6192 (vstril_code_<mode>): New insn.
6193 (vstril_p_<mode>): New expansion.
6194 (vstril_p_code_<mode>): New insn.
6195 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
6196 New built-in function.
6197 (__builtin_altivec_vstrihr): Likewise.
6198 (__builtin_altivec_vstribl): Likewise.
6199 (__builtin_altivec_vstrihl): Likewise.
6200 (__builtin_altivec_vstribr_p): Likewise.
6201 (__builtin_altivec_vstrihr_p): Likewise.
6202 (__builtin_altivec_vstribl_p): Likewise.
6203 (__builtin_altivec_vstrihl_p): Likewise.
6204 (__builtin_vec_strir): New overloaded built-in function.
6205 (__builtin_vec_stril): Likewise.
6206 (__builtin_vec_strir_p): Likewise.
6207 (__builtin_vec_stril_p): Likewise.
6208 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
6209 Define overloaded forms of __builtin_vec_strir,
6210 __builtin_vec_stril, __builtin_vec_strir_p, and
6211 __builtin_vec_stril_p.
6212 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
6213 for a Future Architecture): Add description of vec_stril,
6214 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
6216 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
6218 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
6219 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
6221 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
6222 * config/rs6000/rs6000-builtin.def: Add handling of new macro
6224 (BU_FUTURE_V_4): New macro. Use it.
6225 (BU_FUTURE_OVERLOAD_4): Likewise.
6226 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
6227 handling for quaternary built-in functions.
6228 (altivec_resolve_overloaded_builtin): Add special-case handling
6229 for __builtin_vec_xxeval.
6230 * config/rs6000/rs6000-call.c: Add handling of new macro
6231 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
6232 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
6233 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
6234 (altivec_overloaded_builtins): Add definitions for
6235 FUTURE_BUILTIN_VEC_XXEVAL.
6236 (bdesc_4arg): New array.
6237 (htm_expand_builtin): Add handling for quaternary built-in
6239 (rs6000_expand_quaternop_builtin): New function.
6240 (rs6000_expand_builtin): Add handling for quaternary built-in
6242 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
6243 for unsigned QImode and unsigned HImode.
6244 (builtin_quaternary_function_type): New function.
6245 (rs6000_common_init_builtins): Add handling of quaternary
6247 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
6249 (RS6000_BTC_PREDICATE): Change value of constant.
6250 (RS6000_BTC_ABS): Likewise.
6251 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
6252 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
6253 for a Future Architecture): Add description of vec_ternarylogic
6256 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6258 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
6260 (__builtin_pextd): Likewise.
6261 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
6262 (UNSPEC_PEXTD): Likewise.
6265 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
6266 a Future Architecture): Add descriptions of __builtin_pdepd and
6267 __builtin_pextd functions.
6269 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6271 * config/rs6000/altivec.h (vec_clrl): New #define.
6272 (vec_clrr): Likewise.
6273 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
6274 (UNSPEC_VCLRRB): Likewise.
6277 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
6279 (__builtin_altivec_vclrrb): Likewise.
6280 (__builtin_vec_clrl): New overloaded built-in function.
6281 (__builtin_vec_clrr): Likewise.
6282 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
6283 Define overloaded forms of __builtin_vec_clrl and
6285 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
6286 for a Future Architecture): Add descriptions of vec_clrl and
6289 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6291 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
6292 built-in function definition.
6293 (__builtin_cnttzdm): Likewise.
6294 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
6295 (UNSPEC_CNTTZDM): Likewise.
6296 (cntlzdm): New insn.
6297 (cnttzdm): Likewise.
6298 * doc/extend.texi (Basic PowerPC Built-in Functions available for
6299 a Future Architecture): Add descriptions of __builtin_cntlzdm and
6300 __builtin_cnttzdm functions.
6302 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
6305 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
6307 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6309 * config/rs6000/altivec.h (vec_cfuge): New #define.
6310 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
6311 (vcfuged): New insn.
6312 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
6313 New built-in function.
6314 * config/rs6000/rs6000-call.c (builtin_function_type): Add
6315 handling for FUTURE_BUILTIN_VCFUGED case.
6316 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
6317 for a Future Architecture): Add description of vec_cfuge built-in
6320 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6322 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
6324 (BU_FUTURE_MISC_1): Likewise.
6325 (BU_FUTURE_MISC_2): Likewise.
6326 (BU_FUTURE_MISC_3): Likewise.
6327 (__builtin_cfuged): New built-in function definition.
6328 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
6330 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
6331 a Future Architecture): New subsubsection.
6333 2020-05-11 Richard Biener <rguenther@suse.de>
6335 PR tree-optimization/95049
6336 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
6337 between different constants.
6339 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
6341 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
6343 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6344 Bill Schmidt <wschmidt@linux.ibm.com>
6346 * config/rs6000/altivec.h (vec_gnb): New #define.
6347 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
6349 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
6351 (BU_FUTURE_OVERLOAD_2): Likewise.
6352 (BU_FUTURE_OVERLOAD_3): Likewise.
6353 (__builtin_altivec_gnb): New built-in function.
6354 (__buiiltin_vec_gnb): New overloaded built-in function.
6355 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
6356 Define overloaded forms of __builtin_vec_gnb.
6357 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
6358 of __builtin_vec_gnb.
6359 (builtin_function_type): Mark return value and arguments unsigned
6360 for FUTURE_BUILTIN_VGNB.
6361 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
6362 for a Future Architecture): Add description of vec_gnb built-in
6365 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6366 Bill Schmidt <wschmidt@linux.ibm.com>
6368 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
6370 (vec_pext): Likewise.
6371 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
6372 (UNSPEC_VPEXTD): Likewise.
6375 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
6377 (__builtin_altivec_vpextd): Likewise.
6378 * config/rs6000/rs6000-call.c (builtin_function_type): Add
6379 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
6381 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
6382 for a Future Architecture): Add description of vec_pdep and
6383 vec_pext built-in functions.
6385 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
6386 Bill Schmidt <wschmidt@linux.ibm.com>
6388 * config/rs6000/altivec.h (vec_clzm): New macro.
6389 (vec_ctzm): Likewise.
6390 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
6391 (UNSPEC_VCTZDM): Likewise.
6394 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
6395 (BU_FUTURE_V_1): Likewise.
6396 (BU_FUTURE_V_2): Likewise.
6397 (BU_FUTURE_V_3): Likewise.
6398 (__builtin_altivec_vclzdm): New builtin definition.
6399 (__builtin_altivec_vctzdm): Likewise.
6400 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
6401 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
6403 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
6404 value and parameter types to be unsigned for VCLZDM and VCTZDM.
6405 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
6406 support for TARGET_FUTURE flag.
6407 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
6408 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
6409 for a Future Architecture): New subsubsection.
6411 2020-05-11 Richard Biener <rguenther@suse.de>
6413 PR tree-optimization/94988
6414 PR tree-optimization/95025
6415 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
6416 (sm_seq_push_down): Take extra parameter denoting where we
6418 (execute_sm_exit): Re-issue sm_other stores in the correct
6420 (sm_seq_valid_bb): When always executed, allow sm_other to
6421 prevail inbetween sm_ord and record their stored value.
6422 (hoist_memory_references): Adjust refs_not_supported propagation
6423 and prune sm_other from the end of the ordered sequences.
6425 2020-05-11 Felix Yang <felix.yang@huawei.com>
6428 * config/aarch64/aarch64.md (mov<mode>):
6429 Bitcasts to the equivalent integer mode using gen_lowpart
6430 instead of doing FAIL for scalar floating point move.
6432 2020-05-11 Alex Coplan <alex.coplan@arm.com>
6434 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
6435 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
6436 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
6437 (*csinv3_uxtw_insn2): New.
6438 (*csinv3_uxtw_insn3): New.
6439 * config/aarch64/iterators.md (neg_not_cs): New.
6441 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
6444 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
6445 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
6446 (*mmx_addv2sf3): Ditto.
6447 (*mmx_subv2sf3): Ditto.
6448 (*mmx_mulv2sf3): Ditto.
6449 (*mmx_<code>v2sf3): Ditto.
6450 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
6452 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
6455 * config/i386/i386.c (ix86_vector_mode_supported_p):
6456 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
6457 * config/i386/mmx.md (*mov<mode>_internal): Do not set
6458 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
6460 (mmx_addv2sf3): Change operand predicates from
6461 nonimmediate_operand to register_mmxmem_operand.
6462 (addv2sf3): New expander.
6463 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
6464 predicates from nonimmediate_operand to register_mmxmem_operand.
6465 Enable instruction pattern for TARGET_MMX_WITH_SSE.
6467 (mmx_subv2sf3): Change operand predicate from
6468 nonimmediate_operand to register_mmxmem_operand.
6469 (mmx_subrv2sf3): Ditto.
6470 (subv2sf3): New expander.
6471 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
6472 predicates from nonimmediate_operand to register_mmxmem_operand.
6473 Enable instruction pattern for TARGET_MMX_WITH_SSE.
6475 (mmx_mulv2sf3): Change operand predicates from
6476 nonimmediate_operand to register_mmxmem_operand.
6477 (mulv2sf3): New expander.
6478 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
6479 predicates from nonimmediate_operand to register_mmxmem_operand.
6480 Enable instruction pattern for TARGET_MMX_WITH_SSE.
6482 (mmx_<code>v2sf3): Change operand predicates from
6483 nonimmediate_operand to register_mmxmem_operand.
6484 (<code>v2sf3): New expander.
6485 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
6486 predicates from nonimmediate_operand to register_mmxmem_operand.
6487 Enable instruction pattern for TARGET_MMX_WITH_SSE.
6488 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
6490 2020-05-11 Martin Liska <mliska@suse.cz>
6493 * common.opt: Fix typo in option description.
6495 2020-05-11 Martin Liska <mliska@suse.cz>
6497 PR gcov-profile/94928
6498 * gcov-io.h: Add caveat about coverage format parsing and
6499 possible outdated documentation.
6501 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
6503 PR tree-optimization/83403
6504 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
6505 determine_value_range, Add fold conversion of MULT_EXPR, fix the
6508 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
6510 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
6511 __ILP32__ for 32-bit targets.
6513 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
6515 * tree.h (expr_align): Delete.
6516 * tree.c (expr_align): Likewise.
6518 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
6520 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
6521 from end_of_function_needs.
6523 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
6524 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
6526 * config/cris/t-elfmulti: Remove crisv32 multilib.
6527 * config/cris: Remove shared-library and CRIS v32 support.
6529 Move trivially from cc0 to reg:CC model, removing most optimizations.
6530 * config/cris/cris.md: Remove all side-effect patterns and their
6531 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
6532 to all but post-reload control-flow and movem insns. Remove
6533 constraints on all modified expanders. Remove obsoleted cc0-related
6535 (attr "cc"): Remove alternative "rev".
6536 (mode_iterator BWDD, DI_, SI_): New.
6537 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
6538 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
6539 ("mstep_shift", "mstep_mul"): Remove patterns.
6540 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
6541 * config/cris/cris.c: Change all non-condition-code,
6542 non-control-flow emitted insns to add a parallel with clobber of
6543 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
6544 emit_insn to use of emit_move_insn, gen_add2_insn or
6545 cris_emit_insn, as convenient.
6546 (cris_reg_overlap_mentioned_p)
6547 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
6548 (cris_movem_load_rest_p): Don't assume all elements in a
6550 (cris_store_multiple_op_p): Ditto.
6551 (cris_emit_insn): New function.
6552 * cris/cris-protos.h (cris_emit_insn): Declare.
6555 * config/cris/cris.md (zcond): New code_iterator.
6556 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
6558 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
6560 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
6562 * config/cris/cris.md ("movsi"): For memory destination
6563 post-reload, generate clobberless variant. Similarly for a
6564 zero-source post-reload.
6565 ("*mov_tomem<mode>_split"): New split.
6566 ("*mov_tomem<mode>"): New insn.
6567 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
6568 "Q>m" for less-than-SImode.
6569 ("*mov_fromzero<mode>_split"): New split.
6570 ("*mov_fromzero<mode>"): New insn.
6572 Prepare for cmpelim pass to eliminate redundant compare insns.
6573 * config/cris/cris-modes.def: New file.
6574 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
6575 (cris_notice_update_cc): Remove left-over declaration.
6576 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
6577 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
6578 * config/cris/cris.h (SELECT_CC_MODE): Define.
6579 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
6581 (cond): New code_iterator.
6582 (nzcond): Replacement for incorrect ncond. All callers changed.
6583 (nzvccond): Replacement for ocond. All callers changed.
6584 (rnzcond): Replacement for rcond. All callers changed.
6585 (xCC): New code_attr.
6586 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
6588 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
6589 CCmode with iteration over NZVCSET.
6590 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
6592 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
6593 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
6594 ("*btst<mode>"): Similarly, from "*btst".
6595 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
6596 iterating over cond instead of matching the comparison with
6597 ordered_comparison_operator.
6598 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
6599 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
6601 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
6602 NZVCUSE. Remove FIXME.
6603 ("*b<nzcond:code>_reversed<mode>"): Similarly from
6604 "*b<ncond:code>_reversed", over NZUSE.
6605 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
6606 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
6607 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
6608 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
6609 depending on CC_NZmode vs. CCmode. Remove FIXME.
6610 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
6611 "*b<rcond:code>_reversed", over NZUSE.
6612 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
6613 iterating over cond instead of matching the comparison with
6614 ordered_comparison_operator.
6615 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
6616 iterating over NZUSE.
6617 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
6618 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
6619 depending on CC_NZmode vs. CCmode.
6620 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
6621 NZVCUSE. Remove FIXME.
6622 ("cc"): Comment on new use.
6623 ("cc_enabled"): New attribute.
6624 ("enabled"): Make default fall back to cc_enabled.
6625 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
6626 default_subst_attrs.
6627 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
6628 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
6629 "*movsi_internal". Correct contents of, and rename attribute
6630 "cc" to "cc<cccc><ccnz><ccnzvc>".
6631 ("anz", "anzvc", "acc"): New define_subst_attrs.
6632 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
6633 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
6634 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
6635 "movqi". Correct contents of, and rename "cc" attribute to
6636 "cc<cccc><ccnz><ccnzvc>".
6637 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
6638 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
6639 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
6640 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
6641 Rename from "extend<mode>si2".
6642 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
6643 Similar, from "zero_extend<mode>si2".
6644 ("*adddi3<setnz>"): Rename from "*adddi3".
6645 ("*subdi3<setnz>"): Similarly from "*subdi3".
6646 ("*addsi3<setnz>"): Similarly from "*addsi3".
6647 ("*subsi3<setnz>"): Similarly from "*subsi3".
6648 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
6649 "cc" attribute to "cc<ccnz>".
6650 ("*addqi3<setnz>"): Similarly from "*addqi3".
6651 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
6652 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
6654 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
6655 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
6656 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
6657 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
6658 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
6659 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
6660 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
6661 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
6663 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
6665 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
6667 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
6669 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
6671 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
6673 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
6674 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
6675 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
6676 (znnCC, rznnCC): New code_attrs.
6677 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
6678 obseolete comment. Add belt-and-suspenders mode-test to condition.
6679 Add fixme regarding remaining matched-but-not-generated case.
6680 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
6681 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
6682 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
6683 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
6684 Handle output of CC_ZnNmode.
6685 ("*b<nzcond:code>_reversed<mode>"): Ditto.
6687 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
6688 NEG too. Correct comment.
6689 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
6692 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
6694 * ira-color.c (update_costs_from_allocno): Remove
6695 conflict_cost_update_p argument. Propagate costs only along
6696 threads. Always do conflict cost update. Add printing debugging
6698 (update_costs_from_copies): Add printing debugging info.
6699 (restore_costs_from_copies): Ditto.
6700 (assign_hard_reg): Improve debug info.
6701 (push_only_colorable): Ditto. Call update_costs_from_prefs.
6702 (color_allocnos): Remove update_costs_from_prefs.
6704 2020-05-08 Richard Biener <rguenther@suse.de>
6706 * tree-vectorizer.h (vec_info::slp_loads): New.
6707 (vect_optimize_slp): Declare.
6708 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
6709 nothing when there are no loads.
6710 (vect_gather_slp_loads): Gather loads into a vector.
6711 (vect_supported_load_permutation_p): Remove.
6712 (vect_analyze_slp_instance): Do not verify permutation
6714 (vect_analyze_slp): Optimize permutations of reductions
6715 after all SLP instances have been gathered and gather
6717 (vect_optimize_slp): New function split out from
6718 vect_supported_load_permutation_p. Elide some permutations.
6719 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
6720 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
6721 * tree-vect-stmts.c (vectorizable_load): Check whether
6722 the load can be permuted. When generating code assert we can.
6724 2020-05-08 Richard Biener <rguenther@suse.de>
6726 * tree-ssa-sccvn.c (rpo_avail): Change type to
6727 eliminate_dom_walker *.
6728 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
6729 use the DOM walker availability.
6730 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
6731 with vn_valueize as valueization callback.
6732 (vn_reference_maybe_forwprop_address): Likewise.
6733 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
6734 array_ref_low_bound.
6736 2020-05-08 Jakub Jelinek <jakub@redhat.com>
6738 PR tree-optimization/94786
6739 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
6743 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
6747 * tree.c (get_narrower): Reuse the op temporary instead of
6750 PR tree-optimization/94783
6751 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
6754 PR tree-optimization/94956
6755 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
6756 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
6758 PR tree-optimization/94913
6759 * match.pd (A - B + -1 >= A to B >= A): New simplification.
6760 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
6761 true for TYPE_UNSIGNED integral types.
6764 PR rtl-optimization/94516
6765 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
6767 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
6768 Call df_notes_rescan if that argument is not true and returning true.
6769 * combine.c (adjust_for_new_dest): Pass true as second argument to
6770 remove_reg_equal_equiv_notes.
6771 * postreload.c (reload_combine_recognize_pattern): Don't call
6774 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
6776 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
6778 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
6779 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
6780 (*neg_ne_<mode>): Likewise.
6782 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
6784 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
6786 (*setbcr_<un>signed_<GPR:mode>): Likewise.
6787 (cstore<mode>4): Use setbc[r] if available.
6788 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
6789 (eq<mode>3): Use setbc for TARGET_FUTURE.
6790 (*eq<mode>3): Avoid for TARGET_FUTURE.
6791 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
6792 else for non-Pmode, use gen_eq and gen_xor.
6793 (*ne<mode>3): Avoid for TARGET_FUTURE.
6794 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
6796 2020-05-07 Jeff Law <law@redhat.com>
6798 * config/h8300/h8300.md: Move expanders and patterns into
6799 files based on functionality.
6800 * config/h8300/addsub.md: New file.
6801 * config/h8300/bitfield.md: New file
6802 * config/h8300/combiner.md: New file
6803 * config/h8300/divmod.md: New file
6804 * config/h8300/extensions.md: New file
6805 * config/h8300/jumpcall.md: New file
6806 * config/h8300/logical.md: New file
6807 * config/h8300/movepush.md: New file
6808 * config/h8300/multiply.md: New file
6809 * config/h8300/other.md: New file
6810 * config/h8300/proepi.md: New file
6811 * config/h8300/shiftrotate.md: New file
6812 * config/h8300/testcompare.md: New file
6814 * config/h8300/h8300.md (adds/subs splitters): Merge into single
6816 (negation expanders and patterns): Simplify and combine using
6818 (one_cmpl expanders and patterns): Likewise.
6819 (tablejump, indirect_jump patterns ): Likewise.
6820 (shift and rotate expanders and patterns): Likewise.
6821 (absolute value expander and pattern): Drop expander, rename pattern
6823 (peephole2 patterns): Move into...
6824 * config/h8300/peepholes.md: New file.
6826 * config/h8300/constraints.md (L and N): Simplify now that we're not
6827 longer supporting the original H8/300 chip.
6828 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
6829 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
6830 (shift_alg_hi, shift_alg_si): Similarly.
6831 (h8300_option_overrides): Similarly. Default to H8/300H. If
6832 compiling for H8/S, then turn off H8/300H. Do not update the
6833 shift_alg tables for H8/300 port.
6834 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
6836 (push, split_adds_subs, h8300_rtx_costs): Likewise.
6837 (h8300_print_operand, compute_mov_length): Likewise.
6838 (output_plussi, compute_plussi_length): Likewise.
6839 (compute_plussi_cc, output_logical_op): Likewise.
6840 (compute_logical_op_length, compute_logical_op_cc): Likewise.
6841 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
6842 (output_a_shift, compute_a_shift_length): Likewise.
6843 (output_a_rotate, compute_a_rotate_length): Likewise.
6844 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
6845 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
6846 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
6847 (attr_cpu, TARGET_H8300): Remove.
6848 (TARGET_DEFAULT): Update.
6849 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
6850 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
6851 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
6852 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
6853 * config/h8300/h8300.md: Simplify patterns throughout.
6854 * config/h8300/t-h8300: Update multilib configuration.
6856 * config/h8300/h8300.h (LINK_SPEC): Remove.
6857 (USER_LABEL_PREFIX): Likewise.
6859 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
6860 (h8300_option_override): Remove remnants of COFF support.
6862 2020-05-07 Alan Modra <amodra@gmail.com>
6864 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
6865 set_rtx_cost with set_src_cost.
6866 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
6868 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
6870 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
6871 redundant half vector handlings for no peeling gaps.
6873 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
6875 * tree-ssa-operands.c (operands_scanner): New class.
6876 (operands_bitmap_obstack): Remove.
6877 (n_initialized): Remove.
6878 (build_uses): Move to operands_scanner class.
6879 (build_vuse): Same as above.
6880 (build_vdef): Same as above.
6881 (verify_ssa_operands): Same as above.
6882 (finalize_ssa_uses): Same as above.
6883 (cleanup_build_arrays): Same as above.
6884 (finalize_ssa_stmt_operands): Same as above.
6885 (start_ssa_stmt_operands): Same as above.
6886 (append_use): Same as above.
6887 (append_vdef): Same as above.
6888 (add_virtual_operand): Same as above.
6889 (add_stmt_operand): Same as above.
6890 (get_mem_ref_operands): Same as above.
6891 (get_tmr_operands): Same as above.
6892 (maybe_add_call_vops): Same as above.
6893 (get_asm_stmt_operands): Same as above.
6894 (get_expr_operands): Same as above.
6895 (parse_ssa_operands): Same as above.
6896 (finalize_ssa_defs): Same as above.
6897 (build_ssa_operands): Same as above, plus create a C-like wrapper.
6898 (update_stmt_operands): Create an instance of operands_scanner.
6900 2020-05-07 Richard Biener <rguenther@suse.de>
6903 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
6904 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
6905 (refered_from_nonlocal_var): Likewise.
6906 (ipa_pta_execute): Likewise.
6908 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
6910 * gcc/tree-ssa-struct-alias.c: Fix comments
6912 2020-05-07 Martin Liska <mliska@suse.cz>
6914 * doc/invoke.texi: Fix 2 optindex entries.
6916 2020-05-07 Richard Biener <rguenther@suse.de>
6919 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
6920 (tree_decl_common::not_gimple_reg_flag): ... to this.
6921 * tree.h (DECL_GIMPLE_REG_P): Rename ...
6922 (DECL_NOT_GIMPLE_REG_P): ... to this.
6923 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
6924 (create_tmp_reg): Simplify.
6925 (create_tmp_reg_fn): Likewise.
6926 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
6927 * gimplify.c (create_tmp_from_val): Simplify.
6928 (gimplify_bind_expr): Likewise.
6929 (gimplify_compound_literal_expr): Likewise.
6930 (gimplify_function_tree): Likewise.
6931 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
6932 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
6933 (asan_add_global): Copy it.
6934 * cgraphunit.c (cgraph_node::expand_thunk): Force args
6936 * function.c (gimplify_parameters): Copy
6937 DECL_NOT_GIMPLE_REG_P.
6938 * ipa-param-manipulation.c
6939 (ipa_param_body_adjustments::common_initialization): Simplify.
6940 (ipa_param_body_adjustments::reset_debug_stmts): Copy
6941 DECL_NOT_GIMPLE_REG_P.
6942 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
6943 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
6944 * tree-cfg.c (make_blocks_1): Simplify.
6945 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
6946 * tree-eh.c (lower_eh_constructs_2): Simplify.
6947 * tree-inline.c (declare_return_variable): Adjust and
6949 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
6950 (copy_result_decl_to_var): Likewise.
6951 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
6952 * tree-nested.c (create_tmp_var_for): Simplify.
6953 * tree-parloops.c (separate_decls_in_region_name): Copy
6954 DECL_NOT_GIMPLE_REG_P.
6955 * tree-sra.c (create_access_replacement): Adjust and
6956 generalize partial def support.
6957 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
6958 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
6959 * tree-ssa.c (maybe_optimize_var): Handle clearing of
6960 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
6962 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
6963 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
6964 DECL_NOT_GIMPLE_REG_P.
6965 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
6966 * cfgexpand.c (avoid_type_punning_on_regs): New.
6967 (discover_nonconstant_array_refs): Call
6968 avoid_type_punning_on_regs to avoid unsupported mode punning.
6970 2020-05-07 Alex Coplan <alex.coplan@arm.com>
6972 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
6975 2020-05-07 Richard Biener <rguenther@suse.de>
6977 PR tree-optimization/57359
6978 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
6979 (in_mem_ref::dep_loop): Repurpose.
6980 (LOOP_DEP_BIT): Remove.
6981 (enum dep_kind): New.
6982 (enum dep_state): Likewise.
6983 (record_loop_dependence): New function to populate the
6985 (query_loop_dependence): New function to query the dependence
6987 (memory_accesses::refs_in_loop): Rename to ...
6988 (memory_accesses::refs_loaded_in_loop): ... this and change to
6990 (outermost_indep_loop): Adjust.
6991 (mem_ref_alloc): Likewise.
6992 (gather_mem_refs_stmt): Likewise.
6993 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
6994 (struct sm_aux): New.
6995 (execute_sm): Split code generation on exits, record state
6997 (enum sm_kind): New.
6998 (execute_sm_exit): Exit code generation part.
6999 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
7000 dependence checking on stores reached from exits.
7001 (sm_seq_valid_bb): New function gathering SM stores on exits.
7002 (hoist_memory_references): Re-implement.
7003 (refs_independent_p): Add tbaa_p parameter and pass it down.
7004 (record_dep_loop): Remove.
7005 (ref_indep_loop_p_1): Fold into ...
7006 (ref_indep_loop_p): ... this and generalize for three kinds
7007 of dependence queries.
7008 (can_sm_ref_p): Adjust according to hoist_memory_references
7010 (store_motion_loop): Don't do anything if the set of SM
7011 candidates is empty.
7012 (tree_ssa_lim_initialize): Adjust.
7013 (tree_ssa_lim_finalize): Likewise.
7015 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
7016 Pierre-Marie de Rodat <derodat@adacore.com>
7018 * dwarf2out.c (add_data_member_location_attribute): Take into account
7019 the variant part offset in the computation of the data bit offset.
7020 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
7021 in the call to field_byte_offset.
7022 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
7023 confusing assertion.
7024 (analyze_variant_discr): Deal with boolean subtypes.
7026 2020-05-07 Martin Liska <mliska@suse.cz>
7028 * lto-wrapper.c: Split arguments of MAKE environment
7031 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
7033 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
7034 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
7035 fenv_var and new_fenv_var.
7037 2020-05-06 Jakub Jelinek <jakub@redhat.com>
7040 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
7042 (avx512dq_vextract<shuffletype>64x2_1_maskm,
7043 avx512f_vextract<shuffletype>32x4_1_maskm,
7044 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
7045 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
7047 (*avx512dq_vextract<shuffletype>64x2_1,
7048 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
7049 define_insns. Even in the masked variant allow memory output but in
7050 that case use 0 rather than 0C constraint on the source of masked-out
7052 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
7054 (*avx512f_vextract<shuffletype>32x4_1,
7055 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
7056 Even in the masked variant allow memory output but in that case use
7057 0 rather than 0C constraint on the source of masked-out elts.
7058 (vec_extract_lo_<mode><mask_name>): Split into ...
7059 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
7060 define_insns. Even in the masked variant allow memory output but in
7061 that case use 0 rather than 0C constraint on the source of masked-out
7063 (vec_extract_hi_<mode><mask_name>): Split into ...
7064 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
7065 define_insns. Even in the masked variant allow memory output but in
7066 that case use 0 rather than 0C constraint on the source of masked-out
7069 2020-05-06 qing zhao <qing.zhao@oracle.com>
7072 * common.opt: Add -flarge-source-files.
7073 * doc/invoke.texi: Document it.
7074 * toplev.c (process_options): set line_table->default_range_bits
7075 to 0 when flag_large_source_files is true.
7077 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
7080 * config/i386/predicates.md (add_comparison_operator): New predicate.
7081 * config/i386/i386.md (compare->add splitter): New splitters.
7083 2020-05-06 Richard Biener <rguenther@suse.de>
7085 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
7086 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
7087 Remove slp_instance parameter, just iterate over all scalar stmts.
7088 (vect_slp_analyze_instance_dependence): Adjust and likewise.
7089 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
7091 (vect_schedule_slp): Just iterate over all scalar stmts.
7092 (vect_supported_load_permutation_p): Adjust.
7093 (vect_transform_slp_perm_load): Remove slp_instance parameter,
7094 instead use the number of lanes in the node as group size.
7095 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
7096 factor instead of slp_instance as parameter.
7097 (vectorizable_load): Adjust.
7099 2020-05-06 Andreas Schwab <schwab@suse.de>
7101 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
7102 (aarch64_get_extension_string_for_isa_flags): Don't declare.
7104 2020-05-06 Richard Biener <rguenther@suse.de>
7107 * cfgloopmanip.c (create_preheader): Require non-complex
7108 preheader edge for CP_SIMPLE_PREHEADERS.
7110 2020-05-06 Richard Biener <rguenther@suse.de>
7112 PR tree-optimization/94963
7113 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
7114 no-warning marking of the conditional store.
7115 (execute_sm): Instead mark the uninitialized state
7116 on loop entry to be not warned about.
7118 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
7120 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
7121 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
7122 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
7123 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
7125 * config/i386/i386-builtin.def: Add new builtins.
7126 * config/i386/i386-c.c (ix86_target_macros_internal): Define
7128 * config/i386/i386-options.c (ix86_target_string): Add
7130 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
7131 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
7133 * config/i386/i386.md (define_c_enum "unspec"): Add
7134 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
7135 (TSXLDTRK): New define_int_iterator.
7136 ("<tsxldtrk>"): New define_insn.
7137 * config/i386/i386.opt: Add -mtsxldtrk.
7138 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
7139 * config/i386/tsxldtrkintrin.h: New.
7140 * doc/invoke.texi: Document -mtsxldtrk.
7142 2020-05-06 Jakub Jelinek <jakub@redhat.com>
7144 PR tree-optimization/94921
7145 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
7148 2020-05-06 Richard Biener <rguenther@suse.de>
7150 PR tree-optimization/94965
7151 * tree-vect-stmts.c (vectorizable_load): Fix typo.
7153 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
7155 * doc/install.texi: Replace Sun with Solaris as appropriate.
7156 (Tools/packages necessary for building GCC, Perl version between
7157 5.6.1 and 5.6.24): Remove Solaris 8 reference.
7158 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
7160 (Specific, i?86-*-solaris2*): Update version references for
7161 Solaris 11.3 and later. Remove gas 2.26 caveat.
7162 (Specific, *-*-solaris2*): Update version references for
7163 Solaris 11.3 and later. Remove boehm-gc reference.
7164 Document GMP, MPFR caveats on Solaris 11.3.
7165 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
7166 (Specific, sparc64-*-solaris2*): Likewise.
7167 Document --build requirement.
7169 2020-05-06 Jakub Jelinek <jakub@redhat.com>
7172 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
7173 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
7175 PR rtl-optimization/94873
7176 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
7177 note if SET_SRC (set) has side-effects.
7179 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
7180 Wei Xiao <wei3.xiao@intel.com>
7182 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
7183 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
7184 (ix86_handle_option): Handle -mserialize.
7185 * config.gcc (serializeintrin.h): New header file.
7186 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
7187 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
7189 * config/i386/i386-builtin.def: Add new builtin.
7190 * config/i386/i386-c.c (__SERIALIZE__): New macro.
7191 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
7193 * (ix86_valid_target_attribute_inner_p): Add target attribute
7195 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
7197 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
7198 (serialize): New define_insn.
7199 * config/i386/i386.opt (mserialize): New option
7200 * config/i386/immintrin.h: Include serailizeintrin.h.
7201 * config/i386/serializeintrin.h: New header file.
7202 * doc/invoke.texi: Add documents for -mserialize.
7204 2020-05-06 Richard Biener <rguenther@suse.de>
7206 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
7207 to/from pointer conversion checking.
7209 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
7211 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
7213 * config/rs6000/rs6000-c.c: Likewise.
7214 * config/rs6000/rs6000-call.c: Likewise.
7215 * config/rs6000/rs6000.c: Likewise.
7217 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
7219 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
7220 (RTEMS_ENDFILE_SPEC): Likewise.
7221 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
7222 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
7223 (LIB_SPECS): Support -nodefaultlibs option.
7224 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
7225 (RTEMS_ENDFILE_SPEC): Likewise.
7226 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
7227 (RTEMS_ENDFILE_SPEC): Likewise.
7228 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
7229 (RTEMS_ENDFILE_SPEC): Likewise.
7231 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
7233 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
7234 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
7236 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
7238 * config/pru/pru.h: Mark R3.w0 as caller saved.
7240 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
7242 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
7243 and gen_doloop_begin_internal.
7244 (pru_reorg_loop): Use gen_pruloop with mode.
7245 * config/pru/pru.md: Use new @insn syntax.
7247 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
7249 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
7251 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
7253 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
7254 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
7255 (addqi3_cconly_overflow): Ditto.
7256 (umulv<mode>4): Ditto.
7257 (<s>mul<mode>3_highpart): Ditto.
7258 (tls_global_dynamic_32): Ditto.
7259 (tls_local_dynamic_base_32): Ditto.
7266 (*adddi_4): Remove "m" constraint from scratch operand.
7267 (*add<mode>_4): Ditto.
7269 2020-05-05 Jakub Jelinek <jakub@redhat.com>
7271 PR rtl-optimization/94516
7272 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
7273 with sp = reg, add REG_EQUAL note with sp + const.
7274 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
7275 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
7276 postreload sp = sp + const to sp = reg optimization if needed and
7278 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
7279 reg = sp insn with sp + const REG_EQUAL note. Adjust
7280 try_apply_stack_adjustment caller, call
7281 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
7282 (combine_stack_adjustments): Allocate and free LIVE bitmap,
7283 adjust combine_stack_adjustments_for_block caller.
7285 2020-05-05 Martin Liska <mliska@suse.cz>
7287 PR gcov-profile/93623
7288 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
7291 2020-05-05 Martin Liska <mliska@suse.cz>
7293 * opt-functions.awk (opt_args_non_empty): New function.
7294 * opt-read.awk: Use the function for various option arguments.
7296 2020-05-05 Martin Liska <mliska@suse.cz>
7299 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
7300 report warning when the jobserver is not detected.
7302 2020-05-05 Martin Liska <mliska@suse.cz>
7304 PR gcov-profile/94636
7305 * gcov.c (main): Print total lines summary at the end.
7306 (generate_results): Expect file_name always being non-null.
7307 Print newline after intermediate file is printed in order to align with
7308 what we do for normal files.
7310 2020-05-05 Martin Liska <mliska@suse.cz>
7312 * dumpfile.c (dump_switch_p): Change return type
7313 and print option suggestion.
7314 * dumpfile.h: Change return type.
7315 * opts-global.c (handle_common_deferred_options):
7316 Move error into dump_switch_p function.
7318 2020-05-05 Martin Liska <mliska@suse.cz>
7321 * alloc-pool.h: Use const for some arguments.
7322 * bitmap.h: Likewise.
7323 * mem-stats.h: Likewise.
7324 * sese.h (get_entry_bb): Likewise.
7325 (get_exit_bb): Likewise.
7327 2020-05-05 Richard Biener <rguenther@suse.de>
7329 * tree-vect-slp.c (struct vdhs_data): New.
7330 (vect_detect_hybrid_slp): New walker.
7331 (vect_detect_hybrid_slp): Rewrite.
7333 2020-05-05 Richard Biener <rguenther@suse.de>
7336 * tree-ssa-structalias.c (ipa_pta_execute): Use
7337 varpool_node::externally_visible_p ().
7338 (refered_from_nonlocal_var): Likewise.
7340 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
7342 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
7343 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
7344 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
7346 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
7348 * gimplify.c (gimplify_init_constructor): Do not put the constructor
7349 into static memory if it is not complete.
7351 2020-05-05 Richard Biener <rguenther@suse.de>
7353 PR tree-optimization/94949
7354 * tree-ssa-loop-im.c (execute_sm): Check whether we use
7355 the multithreaded model or always compute the stored value
7356 before eliding a load.
7358 2020-05-05 Alex Coplan <alex.coplan@arm.com>
7360 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
7362 2020-05-05 Jakub Jelinek <jakub@redhat.com>
7364 PR tree-optimization/94800
7365 * match.pd (X + (X << C) to X * (1 + (1 << C)),
7366 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
7370 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
7372 PR tree-optimization/94914
7373 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
7376 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
7378 * config/i386/i386.md (*testqi_ext_3): Use
7379 int_nonimmediate_operand instead of manual mode checks.
7380 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
7381 Use int_nonimmediate_operand predicate. Rewrite
7382 define_insn_and_split pattern to a combine pass splitter.
7384 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
7386 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
7387 * configure: Regenerate.
7389 2020-05-05 Jakub Jelinek <jakub@redhat.com>
7392 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
7393 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
7394 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
7395 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
7397 2020-05-04 Clement Chigot <clement.chigot@atos.net>
7398 David Edelsohn <dje.gcc@gmail.com>
7400 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
7401 for fmodl, frexpl, ldexpl and modfl builtins.
7403 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
7406 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
7407 chosen lhs is different from the gcall lhs.
7408 (expand_mask_load_optab_fn): Likewise.
7409 (expand_gather_load_optab_fn): Likewise.
7411 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
7414 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
7415 (EQ compare->LTU compare splitter): New splitter.
7416 (NE compare->NEG splitter): Ditto.
7418 2020-05-04 Marek Polacek <polacek@redhat.com>
7421 2020-04-30 Marek Polacek <polacek@redhat.com>
7424 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
7425 (check_aligned_type): Check if TYPE_USER_ALIGN match.
7427 2020-05-04 Richard Biener <rguenther@suse.de>
7429 PR tree-optimization/93891
7430 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
7431 the original reference tree for assessing access alignment.
7433 2020-05-04 Richard Biener <rguenther@suse.de>
7435 PR tree-optimization/39612
7436 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
7437 (set_ref_loaded_in_loop): New.
7438 (mark_ref_loaded): Likewise.
7439 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
7440 (execute_sm): Avoid issueing a load when it was not there.
7441 (execute_sm_if_changed): Avoid issueing warnings for the
7444 2020-05-04 Martin Jambor <mjambor@suse.cz>
7447 * tree-inline.c (tree_function_versioning): Leave any type conversion
7448 of replacements to setup_one_parameter and its friend
7449 force_value_to_type.
7451 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
7454 * config/i386/predicates.md (shr_comparison_operator): New predicate.
7455 * config/i386/i386.md (compare->shr splitter): New splitters.
7457 2020-05-04 Jakub Jelinek <jakub@redhat.com>
7459 PR tree-optimization/94718
7460 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
7462 PR tree-optimization/94718
7463 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
7464 replace two nop conversions on bit_{and,ior,xor} argument
7465 and result with just one conversion on the result or another argument.
7467 PR tree-optimization/94718
7468 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
7469 -> (X ^ Y) & C eqne 0 optimization to ...
7470 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
7472 * opts.c (get_option_html_page): Instead of hardcoding a list of
7473 options common between C/C++ and Fortran only use gfortran/
7474 documentation for warnings that have CL_Fortran set but not
7477 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
7479 * config/i386/i386-expand.c (ix86_expand_int_movcc):
7480 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
7481 (emit_memmov): Ditto.
7482 (emit_memset): Ditto.
7483 (ix86_expand_strlensi_unroll_1): Ditto.
7484 (release_scratch_register_on_entry): Ditto.
7485 (gen_frame_set): Ditto.
7486 (ix86_emit_restore_reg_using_pop): Ditto.
7487 (ix86_emit_outlined_ms2sysv_restore): Ditto.
7488 (ix86_expand_epilogue): Ditto.
7489 (ix86_expand_split_stack_prologue): Ditto.
7490 * config/i386/i386.md (push immediate splitter): Ditto.
7494 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
7496 PR translation/93861
7497 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
7500 2020-05-02 Jakub Jelinek <jakub@redhat.com>
7502 * config/tilegx/tilegx.md
7503 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
7504 rather than just <n>.
7506 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
7509 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
7510 and crtl->patch_area_entry.
7511 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
7512 * opts.c (common_handle_option): Limit
7513 function_entry_patch_area_size and function_entry_patch_area_start
7514 to USHRT_MAX. Fix a typo in error message.
7515 * varasm.c (assemble_start_function): Use crtl->patch_area_size
7516 and crtl->patch_area_entry.
7517 * doc/invoke.texi: Document the maximum value for
7518 -fpatchable-function-entry.
7520 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
7522 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
7523 Override SUBTARGET_SHADOW_OFFSET macro.
7525 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
7527 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
7528 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
7529 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
7530 * config/i386/freebsd.h: Likewise.
7531 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
7532 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
7534 2020-04-30 Alexandre Oliva <oliva@adacore.com>
7536 * doc/sourcebuild.texi (Effective-Target Keywords): Document
7537 the newly-introduced fileio effective target.
7539 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
7541 PR rtl-optimization/94740
7542 * cse.c (cse_process_notes_1): Replace with...
7543 (cse_process_note_1): ...this new function, acting as a
7544 simplify_replace_fn_rtx callback to process_note. Handle only
7545 REGs and MEMs directly. Validate the MEM if cse_process_note
7546 changes its address.
7547 (cse_process_notes): Replace with...
7548 (cse_process_note): ...this new function.
7549 (cse_extended_basic_block): Update accordingly, iterating over
7550 the register notes and passing individual notes to cse_process_note.
7552 2020-04-30 Carl Love <cel@us.ibm.com>
7554 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
7556 2020-04-30 Martin Jambor <mjambor@suse.cz>
7559 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
7560 saved by the inliner and thunks which had their call inlined.
7561 * ipa-inline-transform.c (save_inline_function_body): Fill in
7562 former_clone_of of new body holders.
7564 2020-04-30 Jakub Jelinek <jakub@redhat.com>
7566 * BASE-VER: Set to 11.0.0.
7568 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
7570 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
7572 2020-04-30 Marek Polacek <polacek@redhat.com>
7575 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
7576 (check_aligned_type): Check if TYPE_USER_ALIGN match.
7578 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7580 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
7581 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
7582 * doc/invoke.texi (moutline-atomics): Document as on by default.
7584 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
7587 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
7588 the check for NOTE_INSN_DELETED_LABEL.
7590 2020-04-30 Jakub Jelinek <jakub@redhat.com>
7592 * configure.ac (--with-documentation-root-url,
7593 --with-changes-root-url): Diagnose URL not ending with /,
7594 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
7595 * opts.h (get_changes_url): Remove.
7596 * opts.c (get_changes_url): Remove.
7597 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
7598 or -DCHANGES_ROOT_URL.
7599 * doc/install.texi (--with-documentation-root-url,
7600 --with-changes-root-url): Document.
7601 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
7602 get_changes_url and free, change url variable type to const char * and
7603 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
7604 * config/s390/s390.c (s390_function_arg_vector,
7605 s390_function_arg_float): Likewise.
7606 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
7608 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
7610 * config.in: Regenerate.
7611 * configure: Regenerate.
7613 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
7616 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
7618 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
7620 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
7621 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
7623 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
7625 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
7626 Change constraint for vlrl/vstrl to jb4.
7628 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7630 * var-tracking.c (vt_initialize): Move variables pre and post
7631 into inner block and initialize both in order to fix warning
7632 about uninitialized use. Remove unnecessary checks for
7633 frame_pointer_needed.
7635 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7637 * toplev.c (output_stack_usage_1): Ensure that first
7638 argument to fprintf is not null.
7640 2020-04-29 Jakub Jelinek <jakub@redhat.com>
7642 * configure.ac (-with-changes-root-url): New configure option,
7643 defaulting to https://gcc.gnu.org/.
7644 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
7646 * pretty-print.c (get_end_url_string): New function.
7647 (pp_format): Handle %{ and %} for URLs.
7648 (pp_begin_url): Use pp_string instead of pp_printf.
7649 (pp_end_url): Use get_end_url_string.
7650 * opts.h (get_changes_url): Declare.
7651 * opts.c (get_changes_url): New function.
7652 * config/rs6000/rs6000-call.c: Include opts.h.
7653 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
7654 of just in GCC 10.1 in diagnostics and add URL.
7655 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
7656 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
7658 * config/s390/s390.c (s390_function_arg_vector,
7659 s390_function_arg_float): Likewise.
7660 * configure: Regenerated.
7663 * config/s390/s390.c (s390_function_arg_vector,
7664 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
7665 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
7666 passed to the function rather than the type of the single element.
7667 Rename cxx17_empty_base_seen variable to empty_base_seen, change
7668 type to int, and adjust diagnostics depending on if the field
7669 has [[no_unique_attribute]] or not.
7672 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
7673 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
7674 used in casts into parens.
7675 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
7676 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
7677 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
7678 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
7679 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
7680 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
7681 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
7682 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
7683 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
7684 _mm256_mask_cmp_epu8_mask): Likewise.
7685 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
7686 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
7687 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
7688 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
7691 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
7692 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
7693 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
7694 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
7695 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
7696 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
7697 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
7698 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
7699 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
7700 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
7701 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
7702 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
7703 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
7705 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
7706 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
7707 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
7708 as mask vector containing -1.0 or -1.0f elts, but instead vector
7709 with all bits set using _mm*_cmpeq_p? with zero operands.
7710 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
7711 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
7712 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
7713 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
7714 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
7715 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
7716 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
7717 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
7718 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
7719 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
7720 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
7721 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
7722 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
7723 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
7724 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
7725 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
7726 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
7728 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
7729 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
7730 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
7731 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
7732 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
7733 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
7734 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
7735 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
7736 _mm512_mask_prefetch_i64scatter_ps): Likewise.
7737 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
7738 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
7739 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
7740 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
7741 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
7742 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
7743 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
7744 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
7745 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
7746 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
7747 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
7748 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
7749 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
7750 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
7751 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
7752 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
7753 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
7754 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
7755 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
7756 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
7757 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
7758 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
7759 _mm_mask_i64scatter_epi64): Likewise.
7761 2020-04-29 Jeff Law <law@redhat.com>
7763 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
7764 division instructions are 4 bytes long.
7766 2020-04-29 Jakub Jelinek <jakub@redhat.com>
7769 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
7770 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
7771 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
7772 take address of TARGET_EXPR of fenv_var with void_node initializer.
7775 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7777 PR tree-optimization/94774
7778 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
7781 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7783 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
7784 * calls.c (cxx17_empty_base_field_p): New function. Check
7785 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
7788 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
7791 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
7792 Allow -fcf-protection with -mindirect-branch=thunk-extern and
7793 -mfunction-return=thunk-extern.
7794 * doc/invoke.texi: Update notes for -fcf-protection=branch with
7795 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
7797 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7799 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
7801 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7803 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
7804 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
7805 fenv_var and new_fenv_var.
7807 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7809 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
7810 effective-target keyword.
7811 (arm_arch_v8a_hard_multilib): Likewise.
7812 (arm_arch_v8a_hard): Document new dg-add-options keyword.
7813 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
7814 code is deprecated and has not been updated to handle
7815 DECL_FIELD_ABI_IGNORED.
7816 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
7817 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
7818 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
7819 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
7820 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
7821 something actually is a HFA or HVA. Record whether we see a
7822 [[no_unique_address]] field that previous GCCs would not have
7823 ignored in this way.
7824 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
7825 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
7826 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
7827 diagnostic messages.
7828 (arm_needs_doubleword_align): Add a comment explaining why we
7829 consider even zero-sized fields.
7831 2020-04-29 Richard Biener <rguenther@suse.de>
7832 Li Zekun <lizekun1@huawei.com>
7835 * tree.c (component_ref_size): Guard against error_mark_node
7836 DECL_INITIAL as it happens with LTO.
7838 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
7840 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
7841 comment explaining why we consider even zero-sized fields.
7842 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
7843 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
7844 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
7845 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
7846 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
7847 something actually is a HFA or HVA. Record whether we see a
7848 [[no_unique_address]] field that previous GCCs would not have
7849 ignored in this way.
7850 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
7851 whether diagnostics should be suppressed. Update the calls to
7852 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
7853 [[no_unique_address]] case.
7854 (aarch64_return_in_msb): Update call accordingly, never silencing
7856 (aarch64_function_value): Likewise.
7857 (aarch64_return_in_memory_1): Likewise.
7858 (aarch64_init_cumulative_args): Likewise.
7859 (aarch64_gimplify_va_arg_expr): Likewise.
7860 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
7861 use it to decide whether arch64_vfp_is_call_or_return_candidate
7863 (aarch64_pass_by_reference): Update calls accordingly.
7864 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
7865 to decide whether arch64_vfp_is_call_or_return_candidate should be
7868 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
7871 * config/aarch64/aarch64-builtins.c
7872 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
7873 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
7876 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
7878 * configure.ac <$enable_offload_targets>: Do parsing as done
7880 * configure: Regenerate.
7882 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
7883 * configure: Regenerate.
7886 * rtlanal.c (set_noop_p): Handle non-constant selectors.
7889 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
7891 (TARGET_EXCEPT_UNWIND_INFO): Define.
7893 2020-04-29 Jakub Jelinek <jakub@redhat.com>
7896 * config/gcn/gcn.md (*mov<mode>_insn): Use
7897 'reg_overlap_mentioned_p' to check for overlap.
7900 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
7901 instead of cxx17_empty_base_field_p.
7904 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
7905 DECL_FIELD_ABI_IGNORED.
7906 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
7907 * calls.h (cxx17_empty_base_field_p): Change into a temporary
7908 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
7910 * calls.c (cxx17_empty_base_field_p): Remove.
7911 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
7912 DECL_FIELD_ABI_IGNORED.
7913 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
7914 * lto-streamer-out.c (hash_tree): Likewise.
7915 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
7916 cxx17_empty_base_seen to empty_base_seen, change type to int *,
7917 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
7918 cxx17_empty_base_field_p, if "no_unique_address" attribute is
7919 present, propagate that to the caller too.
7920 (rs6000_discover_homogeneous_aggregate): Adjust
7921 rs6000_aggregate_candidate caller, emit different diagnostics
7922 when c++17 empty base fields are present and when empty
7923 [[no_unique_address]] fields are present.
7924 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
7925 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
7928 2020-04-29 Richard Biener <rguenther@suse.de>
7930 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
7931 Just check whether the stmt stores.
7933 2020-04-28 Alexandre Oliva <oliva@adacore.com>
7936 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
7937 output operand in emulation. Don't overwrite pseudos.
7939 2020-04-28 Jeff Law <law@redhat.com>
7941 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
7942 multiply patterns are 4 bytes long.
7944 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
7946 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
7947 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
7949 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
7950 Jakub Jelinek <jakub@redhat.com>
7953 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
7954 base class artificial fields.
7955 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
7956 decision is different after this fix.
7958 2020-04-28 David Malcolm <dmalcolm@redhat.com>
7964 * doc/invoke.texi (Static Analyzer Options): Remove
7965 -Wanalyzer-use-of-uninitialized-value.
7966 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
7968 2020-04-28 Jakub Jelinek <jakub@redhat.com>
7970 PR tree-optimization/94809
7971 * tree.c (build_call_expr_internal_loc_array): Call
7972 process_call_operands.
7974 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
7976 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
7977 * config/aarch64/aarch64-tune.md: Regenerate.
7978 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
7979 (thunderx3t110_regmove_cost): Likewise.
7980 (thunderx3t110_vector_cost): Likewise.
7981 (thunderx3t110_prefetch_tune): Likewise.
7982 (thunderx3t110_tunings): Likewise.
7983 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
7985 * config/aarch64/thunderx3t110.md: New file.
7986 * config/aarch64/aarch64.md: Include thunderx3t110.md.
7987 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
7989 2020-04-28 Jakub Jelinek <jakub@redhat.com>
7992 * config/s390/s390.c (s390_function_arg_vector,
7993 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
7995 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
7997 PR tree-optimization/94727
7998 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
7999 operands are invariant booleans, use the mask type associated with the
8000 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
8001 (vectorizable_condition): Pass vectype unconditionally to
8002 vect_is_simple_cond.
8004 2020-04-27 Jakub Jelinek <jakub@redhat.com>
8007 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
8008 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
8009 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
8011 2020-04-27 David Malcolm <dmalcolm@redhat.com>
8014 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
8015 default value, so that it can by supplied by get_option_html_page.
8016 * configure: Regenerate.
8017 * opts.c: Include "selftest.h".
8018 (get_option_html_page): New function.
8019 (get_option_url): Use it. Reformat to place comments next to the
8020 expressions they refer to.
8021 (selftest::test_get_option_html_page): New.
8022 (selftest::opts_c_tests): New.
8023 * selftest-run-tests.c (selftest::run_tests): Call
8024 selftest::opts_c_tests.
8025 * selftest.h (selftest::opts_c_tests): New decl.
8027 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
8029 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
8030 UINTVAL to CONST_INTs.
8032 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8034 * config/arm/constraints.md (e): Remove constraint.
8035 (Te): Define constraint.
8036 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
8037 operand 0 from "e" to "Te".
8038 (vaddvaq_<supf><mode>): Likewise.
8039 (vaddvq_p_<supf><mode>): Likewise.
8040 (vmladavq_<supf><mode>): Likewise.
8041 (vmladavxq_s<mode>): Likewise.
8042 (vmlsdavq_s<mode>): Likewise.
8043 (vmlsdavxq_s<mode>): Likewise.
8044 (vaddvaq_p_<supf><mode>): Likewise.
8045 (vmladavaq_<supf><mode>): Likewise.
8046 (vmladavq_p_<supf><mode>): Likewise.
8047 (vmladavxq_p_s<mode>): Likewise.
8048 (vmlsdavq_p_s<mode>): Likewise.
8049 (vmlsdavxq_p_s<mode>): Likewise.
8050 (vmlsdavaxq_s<mode>): Likewise.
8051 (vmlsdavaq_s<mode>): Likewise.
8052 (vmladavaxq_s<mode>): Likewise.
8053 (vmladavaq_p_<supf><mode>): Likewise.
8054 (vmladavaxq_p_s<mode>): Likewise.
8055 (vmlsdavaq_p_s<mode>): Likewise.
8056 (vmlsdavaxq_p_s<mode>): Likewise.
8058 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
8060 * config/arm/arm.c (output_move_neon): Only get the first operand if
8063 2020-04-27 Felix Yang <felix.yang@huawei.com>
8065 PR tree-optimization/94784
8066 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
8067 assert around so that it checks that the two vectors have equal
8068 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
8069 types is a useless_type_conversion_p.
8071 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
8074 * dwarf2cfi.c (struct GTY): Add ra_mangled.
8075 (cfi_row_equal_p): Check ra_mangled.
8076 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
8077 this only handles the sparc logic now.
8078 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
8079 the aarch64 specific logic.
8080 (dwarf2out_frame_debug): Update to use the new subroutines.
8081 (change_cfi_row): Check ra_mangled.
8083 2020-04-27 Jakub Jelinek <jakub@redhat.com>
8086 * config/s390/s390.c (s390_function_arg_vector,
8087 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
8089 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
8091 * common/config/rs6000/rs6000-common.c
8092 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
8094 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
8097 2020-04-27 Martin Liska <mliska@suse.cz>
8100 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
8101 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
8103 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
8106 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
8108 (rs6000_emit_prologue_components):
8109 Check with frame_pointer_needed_indeed.
8110 (rs6000_emit_epilogue_components): Likewise.
8111 (rs6000_emit_prologue): Likewise.
8112 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
8114 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
8116 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
8117 stack frame when debugging and flag_compare_debug is enabled.
8119 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
8121 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
8122 enable PC-relative addressing for -mcpu=future.
8123 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
8124 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
8125 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
8126 suppress PC-relative addressing.
8127 (rs6000_option_override_internal): Split up error messages
8128 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
8131 2020-04-25 Jakub Jelinek <jakub@redhat.com>
8132 Richard Biener <rguenther@suse.de>
8134 PR tree-optimization/94734
8135 PR tree-optimization/89430
8136 * tree-ssa-phiopt.c: Include tree-eh.h.
8137 (cond_store_replacement): Return false if an automatic variable
8138 access could trap. If -fstore-data-races, don't return false
8139 just because an automatic variable is addressable.
8141 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
8143 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
8145 (add<mode>_sext_dup2_exec): Likewise.
8147 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
8150 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
8151 endian byteshift_val calculation.
8153 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
8155 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
8157 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
8159 * config/aarch64/arm_sve.h: Add a comment.
8161 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
8163 PR rtl-optimization/94708
8164 * combine.c (simplify_if_then_else): Add check for
8165 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
8167 2020-04-23 Martin Sebor <msebor@redhat.com>
8170 * common.opt (-Wno-frame-larger-than): New option.
8171 (-Wno-larger-than, -Wno-stack-usage): Same.
8173 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
8175 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
8177 (mov<mode>_exec): Likewise.
8178 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
8179 (<convop><mode><vndi>2_exec): Likewise.
8181 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
8183 PR tree-optimization/94717
8184 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
8185 of the stores doesn't have the same landing pad number as the first.
8186 (coalesce_immediate_stores): Do not try to coalesce the store using
8187 bswap if it doesn't have the same landing pad number as the first.
8189 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
8191 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
8192 Replace outdated link to ELFv2 ABI.
8194 2020-04-23 Jakub Jelinek <jakub@redhat.com>
8197 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
8201 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
8202 temporarily with non-final second operand and updating it later,
8203 push COMPOUND_EXPRs into a vector and process it in reverse,
8204 creating COMPOUND_EXPRs with the final operands.
8206 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
8209 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
8210 bti c and bti j handling.
8212 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
8213 Thomas Schwinge <thomas@codesourcery.com>
8217 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
8218 t_async and the wait arguments.
8220 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
8222 PR tree-optimization/94727
8223 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
8224 comparing invariant scalar booleans.
8226 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
8227 Jakub Jelinek <jakub@redhat.com>
8230 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
8231 empty base class artificial fields.
8232 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
8233 different after this fix.
8235 2020-04-23 Jakub Jelinek <jakub@redhat.com>
8238 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
8239 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
8240 if the same type has been diagnosed most recently already.
8242 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8244 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
8246 (__arm_vbicq_n_s16): Likewise.
8247 (__arm_vbicq_n_u32): Likewise.
8248 (__arm_vbicq_n_s32): Likewise.
8249 (__arm_vbicq): Likewise.
8250 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
8251 (__arm_vbicq_n_s32): Likewise.
8252 (__arm_vbicq_n_u16): Likewise.
8253 (__arm_vbicq_n_u32): Likewise.
8254 (__arm_vdupq_m_n_s8): Likewise.
8255 (__arm_vdupq_m_n_s16): Likewise.
8256 (__arm_vdupq_m_n_s32): Likewise.
8257 (__arm_vdupq_m_n_u8): Likewise.
8258 (__arm_vdupq_m_n_u16): Likewise.
8259 (__arm_vdupq_m_n_u32): Likewise.
8260 (__arm_vdupq_m_n_f16): Likewise.
8261 (__arm_vdupq_m_n_f32): Likewise.
8262 (__arm_vldrhq_gather_offset_s16): Likewise.
8263 (__arm_vldrhq_gather_offset_s32): Likewise.
8264 (__arm_vldrhq_gather_offset_u16): Likewise.
8265 (__arm_vldrhq_gather_offset_u32): Likewise.
8266 (__arm_vldrhq_gather_offset_f16): Likewise.
8267 (__arm_vldrhq_gather_offset_z_s16): Likewise.
8268 (__arm_vldrhq_gather_offset_z_s32): Likewise.
8269 (__arm_vldrhq_gather_offset_z_u16): Likewise.
8270 (__arm_vldrhq_gather_offset_z_u32): Likewise.
8271 (__arm_vldrhq_gather_offset_z_f16): Likewise.
8272 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
8273 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
8274 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
8275 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
8276 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
8277 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
8278 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
8279 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
8280 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
8281 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
8282 (__arm_vldrwq_gather_offset_s32): Likewise.
8283 (__arm_vldrwq_gather_offset_u32): Likewise.
8284 (__arm_vldrwq_gather_offset_f32): Likewise.
8285 (__arm_vldrwq_gather_offset_z_s32): Likewise.
8286 (__arm_vldrwq_gather_offset_z_u32): Likewise.
8287 (__arm_vldrwq_gather_offset_z_f32): Likewise.
8288 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
8289 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
8290 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
8291 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
8292 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
8293 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
8294 (__arm_vdwdupq_x_n_u8): Likewise.
8295 (__arm_vdwdupq_x_n_u16): Likewise.
8296 (__arm_vdwdupq_x_n_u32): Likewise.
8297 (__arm_viwdupq_x_n_u8): Likewise.
8298 (__arm_viwdupq_x_n_u16): Likewise.
8299 (__arm_viwdupq_x_n_u32): Likewise.
8300 (__arm_vidupq_x_n_u8): Likewise.
8301 (__arm_vddupq_x_n_u8): Likewise.
8302 (__arm_vidupq_x_n_u16): Likewise.
8303 (__arm_vddupq_x_n_u16): Likewise.
8304 (__arm_vidupq_x_n_u32): Likewise.
8305 (__arm_vddupq_x_n_u32): Likewise.
8306 (__arm_vldrdq_gather_offset_s64): Likewise.
8307 (__arm_vldrdq_gather_offset_u64): Likewise.
8308 (__arm_vldrdq_gather_offset_z_s64): Likewise.
8309 (__arm_vldrdq_gather_offset_z_u64): Likewise.
8310 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
8311 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
8312 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
8313 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
8314 (__arm_vidupq_m_n_u8): Likewise.
8315 (__arm_vidupq_m_n_u16): Likewise.
8316 (__arm_vidupq_m_n_u32): Likewise.
8317 (__arm_vddupq_m_n_u8): Likewise.
8318 (__arm_vddupq_m_n_u16): Likewise.
8319 (__arm_vddupq_m_n_u32): Likewise.
8320 (__arm_vidupq_n_u16): Likewise.
8321 (__arm_vidupq_n_u32): Likewise.
8322 (__arm_vidupq_n_u8): Likewise.
8323 (__arm_vddupq_n_u16): Likewise.
8324 (__arm_vddupq_n_u32): Likewise.
8325 (__arm_vddupq_n_u8): Likewise.
8327 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
8329 * doc/install.texi (D-Specific Options): Document
8330 --enable-libphobos-checking and --with-libphobos-druntime-only.
8332 2020-04-23 Jakub Jelinek <jakub@redhat.com>
8335 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
8336 cxx17_empty_base_seen argument. Pass it to recursive calls.
8337 Ignore cxx17_empty_base_field_p fields after setting
8338 *cxx17_empty_base_seen to true.
8339 (rs6000_discover_homogeneous_aggregate): Adjust
8340 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
8341 aggregates with C++17 empty base fields.
8344 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
8345 if last_decl is error_mark_node or has such a TREE_TYPE.
8348 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
8349 if last_decl is error_mark_node or has such a TREE_TYPE.
8351 2020-04-22 Felix Yang <felix.yang@huawei.com>
8354 * config/aarch64/aarch64.h (TARGET_SVE):
8355 Add && !TARGET_GENERAL_REGS_ONLY.
8356 (TARGET_SVE2): Add && TARGET_SVE.
8357 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
8358 TARGET_SVE2_SM4): Add && TARGET_SVE2.
8359 * config/aarch64/aarch64-sve-builtins.h
8360 (sve_switcher::m_old_general_regs_only): New member.
8361 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
8363 (reported_missing_registers_p): New variable.
8364 (check_required_extensions): Call check_required_registers before
8365 return if all required extenstions are present.
8366 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
8367 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
8368 global_options.x_target_flags.
8369 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
8370 global_options.x_target_flags if m_old_general_regs_only is true.
8372 2020-04-22 Zackery Spytz <zspytz@gmail.com>
8374 * doc/extend.exi: Add "free" to list of other builtin functions
8377 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
8380 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
8382 (store_quadpti): Ditto.
8383 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
8384 plq will be used and doesn't need it.
8385 (atomic_store<mode>): Ditto, for pstq.
8387 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
8389 * doc/invoke.texi: Update flags turned on by -O3.
8391 2020-04-22 Jakub Jelinek <jakub@redhat.com>
8394 * config/ia64/ia64.c (hfa_element_mode): Ignore
8395 cxx17_empty_base_field_p fields.
8398 * calls.h (cxx17_empty_base_field_p): Declare.
8399 * calls.c (cxx17_empty_base_field_p): Define.
8401 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
8403 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
8405 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
8406 Andre Vieira <andre.simoesdiasvieira@arm.com>
8407 Mihail Ionescu <mihail.ionescu@arm.com>
8409 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
8410 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
8411 (ALL_QUIRKS): Add quirk_no_asmcpu.
8412 (cortex-m55): Define new cpu.
8413 * config/arm/arm-tables.opt: Regenerate.
8414 * config/arm/arm-tune.md: Likewise.
8415 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
8417 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
8419 PR tree-optimization/94700
8420 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
8421 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
8422 of similarly-structured but distinct vector types.
8424 2020-04-21 Martin Sebor <msebor@redhat.com>
8427 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
8428 the computation of the lower bound of the source access size.
8429 (builtin_access::generic_overlap): Remove a hack for setting ranges
8432 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
8434 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
8435 (ASM_WEAKEN_DECL): New define.
8436 (HAVE_GAS_WEAKREF): Undefine.
8438 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
8440 PR tree-optimization/94683
8441 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
8442 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
8443 but distinct vector types.
8445 2020-04-21 Jakub Jelinek <jakub@redhat.com>
8448 * stor-layout.c (place_field, finalize_record_size): Don't emit
8449 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
8450 * ubsan.c (ubsan_get_type_descriptor_type,
8451 ubsan_get_source_location_type, ubsan_create_data): Set
8453 * asan.c (asan_global_struct): Likewise.
8455 2020-04-21 Duan bo <duanbo3@huawei.com>
8458 * config/aarch64/aarch64.c: Add an error message for option conflict.
8459 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
8460 incompatible with -fpic, -fPIC and -mabi=ilp32.
8462 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
8465 * omp-low.c (new_omp_context): Remove assignments to
8466 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
8468 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
8470 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
8471 ("popcountv2di2_vx"): Use simplify_gen_subreg.
8473 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
8476 * config/s390/s390-builtin-types.def: Add 3 new function modes.
8477 * config/s390/s390-builtins.def: Add mode dependent low-level
8478 builtin and map the overloaded builtins to these.
8479 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
8480 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
8482 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
8484 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
8485 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
8486 estimated VF and is no worse at double the estimated VF.
8488 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
8491 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
8492 order of arguments to rtx_vector_builder.
8493 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
8494 When extending the trailing constants to a full vector, replace any
8495 variables with zeros.
8497 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
8500 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
8503 2020-04-20 Martin Liska <mliska@suse.cz>
8505 * symtab.c (symtab_node::dump_references): Add space after
8507 (symtab_node::dump_referring): Likewise.
8509 2020-04-18 Jeff Law <law@redhat.com>
8512 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
8515 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
8517 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
8518 attributes): Document d_runtime_has_std_library.
8520 2020-04-17 Jeff Law <law@redhat.com>
8522 PR rtl-optimization/90275
8523 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
8524 when the destination has a REG_UNUSED note.
8526 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
8529 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
8532 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
8534 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
8535 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
8536 cost of load and store insns if one loop iteration has enough scalar
8537 elements to use an Advanced SIMD LDP or STP.
8538 (aarch64_add_stmt_cost): Update call accordingly.
8540 2020-04-17 Jakub Jelinek <jakub@redhat.com>
8541 Jeff Law <law@redhat.com>
8544 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
8545 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
8546 or pos + len >= 32, or pos + len is equal to operands[2] precision
8547 and operands[2] is not a register operand. During splitting perform
8548 SImode AND if operands[0] doesn't have CCZmode and pos + len is
8549 equal to mode precision.
8551 2020-04-17 Richard Biener <rguenther@suse.de>
8554 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
8556 * dwarf2out.c (dw_val_equal_p): Fix pasto in
8557 dw_val_class_vms_delta comparison.
8558 * optabs.c (expand_binop_directly): Fix pasto in commutation
8560 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
8563 2020-04-17 Jakub Jelinek <jakub@redhat.com>
8565 PR rtl-optimization/94618
8566 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
8567 insn is the BB_END of its block, but also when it is only followed
8568 by DEBUG_INSNs in its block.
8570 PR tree-optimization/94621
8571 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
8572 Move id->adjust_array_error_bounds check first in the condition.
8574 2020-04-17 Martin Liska <mliska@suse.cz>
8575 Jonathan Yong <10walls@gmail.com>
8577 PR gcov-profile/94570
8578 * coverage.c (coverage_init): Use separator properly.
8580 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
8582 PR rtl-optimization/93974
8583 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
8584 (rs6000_cannot_substitute_mem_equiv_p): New function.
8586 2020-04-16 Martin Jambor <mjambor@suse.cz>
8589 * ipa-inline.h (ipa_saved_clone_sources): Declare.
8590 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
8591 (save_inline_function_body): Link the new body holder with the
8593 * cgraph.c: Include ipa-inline.h.
8594 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
8595 the statement in ipa_saved_clone_sources.
8596 * cgraphunit.c: Include ipa-inline.h.
8597 (expand_all_functions): Free ipa_saved_clone_sources.
8599 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
8602 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
8603 the VNx16BI lowpart of the recursively-generated constant.
8605 2020-04-16 Martin Liska <mliska@suse.cz>
8606 Jakub Jelinek <jakub@redhat.com>
8609 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
8610 DECL_IS_REPLACEABLE_OPERATOR during cloning.
8611 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
8612 (propagate_necessity): Check operator names.
8614 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
8616 PR rtl-optimization/94605
8617 * early-remat.c (early_remat::process_block): Handle insns that
8618 set multiple candidate registers.
8619 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
8621 PR gcov-profile/93401
8622 * common.opt (profile-prefix-path): New option.
8623 * coverae.c: Include diagnostics.h.
8624 (coverage_init): Strip profile prefix path.
8625 * doc/invoke.texi (-fprofile-prefix-path): Document.
8627 2020-04-16 Richard Biener <rguenther@suse.de>
8630 * expr.c (emit_move_multi_word): Do not generate code when
8631 the destination part is undefined_operand_subword_p.
8632 * lower-subreg.c (resolve_clobber): Look through a paradoxica
8635 2020-04-16 Martin Jambor <mjambor@suse.cz>
8637 PR tree-optimization/94598
8638 * tree-sra.c (verify_sra_access_forest): Fix verification of total
8639 scalarization accesses under access to one-element arrays.
8641 2020-04-16 Jakub Jelinek <jakub@redhat.com>
8644 * function.c (assign_parm_find_data_types): Add workaround for
8645 BROKEN_VALUE_INITIALIZATION compilers.
8647 2020-04-16 Richard Biener <rguenther@suse.de>
8649 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
8652 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
8655 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
8656 Require OPTION_MASK_ISA_SSE2.
8658 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
8661 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
8662 Don't construct a dump_context temporary to call static method.
8664 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
8666 * config/aarch64/falkor-tag-collision-avoidance.c
8667 (valid_src_p): Check for aarch64_address_info type before
8668 accessing base field.
8670 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
8672 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
8673 (V_sz_elem2): Remove unused mode attribute.
8675 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
8677 * config/arm/arm.md (arm_movdi): Disallow for MVE.
8679 2020-04-15 Richard Biener <rguenther@suse.de>
8682 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
8683 alias_sets_conflict_p for pointers.
8685 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
8688 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
8689 (extendhisi2_internal): Add %v1 before the load instructions.
8691 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
8694 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
8695 use PC-relative addressing for TLS references.
8697 2020-04-14 Martin Jambor <mjambor@suse.cz>
8700 * ipa-sra.c: Include internal-fn.h.
8701 (enum isra_scan_context): Update comment.
8702 (scan_function): Treat calls to internal_functions like loads or stores.
8704 2020-04-14 Yang Yang <yangyang305@huawei.com>
8706 PR tree-optimization/94574
8707 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
8708 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
8710 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
8713 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
8715 2020-04-13 Martin Sebor <msebor@redhat.com>
8717 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
8718 -Wformat-truncation. Move -Wzero-length-bounds last.
8719 (-Wrestrict): Document positive form of option enabled by -Wall.
8721 2020-04-13 Zachary Spytz <zspytz@gmail.com>
8723 * doc/extend.texi: Add realloc to list of built-in functions
8724 are recognized by the compiler.
8726 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
8729 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
8730 pointer in word_mode for eh_return epilogues.
8732 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8734 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
8735 memory references in %B, %C and %D operand selectors when the inner
8736 operand is a post increment address.
8738 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8740 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
8741 reference by 4 bytes, and %D memory reference by 6 bytes.
8743 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
8746 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
8747 condition for V4SI, V8HI and V16QI modes.
8749 2020-04-11 Jakub Jelinek <jakub@redhat.com>
8753 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
8756 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
8760 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
8761 "#pragma omp declare target" has also been applied.
8763 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
8765 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
8766 when to emit the epilogue_helper insn.
8767 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
8770 2020-04-09 Jakub Jelinek <jakub@redhat.com>
8773 * cselib.h (cselib_record_sp_cfa_base_equiv,
8774 cselib_sp_derived_value_p): Declare.
8775 * cselib.c (cselib_record_sp_cfa_base_equiv,
8776 cselib_sp_derived_value_p): New functions.
8777 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
8778 cselib_sp_derived_value_p values.
8779 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
8780 start of extended basic blocks other than the first one
8781 for !frame_pointer_needed functions.
8783 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
8785 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
8786 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
8787 (aarch64_sve2048_hw): Document.
8788 * config/aarch64/aarch64-protos.h
8789 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
8790 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
8791 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
8792 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
8794 (find_type_suffix_for_scalar_type): Use it instead of comparing
8796 (function_resolver::infer_vector_or_tuple_type): Likewise.
8797 (function_resolver::require_vector_type): Likewise.
8798 (handle_arm_sve_vector_bits_attribute): New function.
8799 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
8800 (aarch64_attribute_table): Add arm_sve_vector_bits.
8801 (aarch64_return_in_memory_1):
8802 (pure_scalable_type_info::piece::get_rtx): New function.
8803 (pure_scalable_type_info::num_zr): Likewise.
8804 (pure_scalable_type_info::num_pr): Likewise.
8805 (pure_scalable_type_info::get_rtx): Likewise.
8806 (pure_scalable_type_info::analyze): Likewise.
8807 (pure_scalable_type_info::analyze_registers): Likewise.
8808 (pure_scalable_type_info::analyze_array): Likewise.
8809 (pure_scalable_type_info::analyze_record): Likewise.
8810 (pure_scalable_type_info::add_piece): Likewise.
8811 (aarch64_some_values_include_pst_objects_p): Likewise.
8812 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
8813 to analyze whether the type is returned in SVE registers.
8814 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
8815 is passed in SVE registers.
8816 (aarch64_pass_by_reference_1): New function, extracted from...
8817 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
8818 to analyze whether the type is a pure scalable type and, if so,
8819 whether it should be passed by reference.
8820 (aarch64_return_in_msb): Return false for pure scalable types.
8821 (aarch64_function_value_1): Fold back into...
8822 (aarch64_function_value): ...this function. Use
8823 pure_scalable_type_info to analyze whether the type is a pure
8824 scalable type and, if so, which registers it should use. Handle
8825 types that include pure scalable types but are not themselves
8826 pure scalable types.
8827 (aarch64_return_in_memory_1): New function, split out from...
8828 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
8829 to analyze whether the type is a pure scalable type and, if so,
8830 whether it should be returned by reference.
8831 (aarch64_layout_arg): Remove orig_mode argument. Use
8832 pure_scalable_type_info to analyze whether the type is a pure
8833 scalable type and, if so, which registers it should use. Handle
8834 types that include pure scalable types but are not themselves
8835 pure scalable types.
8836 (aarch64_function_arg): Update call accordingly.
8837 (aarch64_function_arg_advance): Likewise.
8838 (aarch64_pad_reg_upward): On big-endian targets, return false for
8839 pure scalable types that are smaller than 16 bytes.
8840 (aarch64_member_type_forces_blk): New function.
8841 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
8842 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
8843 correspond to built-in SVE types. Do not rely on a vector mode
8844 if the type includes an pure scalable type. When returning true,
8845 assert that the mode is not an SVE mode.
8846 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
8847 built-in types here. When returning true, assert that the type
8848 does not have an SVE mode.
8849 (aarch64_can_change_mode_class): Don't allow anything to change
8850 between a predicate mode and a non-predicate mode. Also don't
8851 allow changes between SVE vector modes and other modes that
8852 might be bigger than 128 bits.
8853 (aarch64_invalid_binary_op): Reject binary operations that mix
8854 SVE and GNU vector types.
8855 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
8857 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
8859 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
8860 "SVE sizeless type".
8861 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
8862 (sizeless_type_p): New functions.
8863 (register_builtin_types): Apply make_type_sizeless to the type.
8864 (register_tuple_type): Likewise.
8865 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
8867 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
8869 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
8872 2020-04-09 Martin Jambor <mjambor@suse.cz>
8873 Richard Biener <rguenther@suse.de>
8875 PR tree-optimization/94482
8876 * tree-sra.c (create_access_replacement): Dump new replacement with
8878 (sra_modify_expr): Fix handling of cases when the original EXPR writes
8879 to only part of the replacement.
8880 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
8881 the first operand of combinations into REAL/IMAGPART_EXPR and
8884 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
8886 * doc/sourcebuild.texi (check-function-bodies): Treat the third
8887 parameter as a list of option regexps and require each regexp
8890 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
8893 * config/aarch64/falkor-tag-collision-avoidance.c
8894 (valid_src_p): Fix missing rtx type check.
8896 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
8897 Richard Biener <rguenther@suse.de>
8899 PR tree-optimization/93674
8900 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
8901 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
8902 or non-mode precision type, add candidate in unsigned type with the
8905 2020-04-08 Clement Chigot <clement.chigot@atos.net>
8907 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
8908 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
8909 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
8911 2020-04-08 Jakub Jelinek <jakub@redhat.com>
8914 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
8916 * reload1.c (eliminate_regs_1): Avoid creating
8917 (plus (reg) (const_int 0)) in DEBUG_INSNs.
8919 PR tree-optimization/94524
8920 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
8921 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
8922 op1 rather than op1 itself at the end. Punt for signed modulo by
8923 most negative constant.
8924 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
8925 modulo by most negative constant.
8927 2020-04-08 Richard Biener <rguenther@suse.de>
8929 PR rtl-optimization/93946
8930 * cse.c (cse_insn): Record the tabled expression in
8931 src_related. Verify a redundant store removal is valid.
8933 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
8936 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
8937 ENDBR at function entry if function will be called indirectly.
8939 2020-04-08 Jakub Jelinek <jakub@redhat.com>
8942 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
8945 2020-04-08 Martin Liska <mliska@suse.cz>
8948 * gimple.c (gimple_call_operator_delete_p): Rename to...
8949 (gimple_call_replaceable_operator_delete_p): ... this.
8950 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
8951 * gimple.h (gimple_call_operator_delete_p): Rename to ...
8952 (gimple_call_replaceable_operator_delete_p): ... this.
8953 * tree-core.h (tree_function_decl): Add replaceable_operator
8955 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
8956 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
8957 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
8958 (eliminate_unnecessary_stmts): Likewise.
8959 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
8960 Pack DECL_IS_REPLACEABLE_OPERATOR.
8961 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
8962 Unpack the field here.
8963 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
8964 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
8965 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
8966 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
8967 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
8968 replaceable operator flags.
8970 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
8971 Matthew Malcomson <matthew.malcomson@arm.com>
8973 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
8974 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
8975 (CX_TERNARY_QUALIFIERS): Likewise.
8976 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
8977 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
8978 (arm_init_acle_builtins): Initialize CDE builtins.
8979 (arm_expand_acle_builtin): Check CDE constant operands.
8980 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
8981 of CDE constant operand.
8982 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
8984 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
8985 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
8986 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
8987 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
8988 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
8989 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
8990 * config/arm/arm_cde_builtins.def: New file.
8991 * config/arm/iterators.md (V_reg): New attribute of SI.
8992 * config/arm/predicates.md (const_int_coproc_operand): New.
8993 (const_int_vcde1_operand, const_int_vcde2_operand): New.
8994 (const_int_vcde3_operand): New.
8995 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
8996 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
8997 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
8998 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
9000 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
9002 * config.gcc: Add arm_cde.h.
9003 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
9004 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
9005 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
9006 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
9007 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
9008 * config/arm/arm.h (TARGET_CDE): New macro.
9009 * config/arm/arm_cde.h: New file.
9010 * doc/invoke.texi: Document CDE options +cdecp[0-7].
9011 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
9013 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
9015 2020-04-08 Jakub Jelinek <jakub@redhat.com>
9017 PR rtl-optimization/94516
9018 * postreload.c: Include rtl-iter.h.
9019 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
9020 looking for all MEMs with RTX_AUTOINC operand.
9021 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
9023 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
9025 * omp-grid.c (grid_eliminate_combined_simd_part): Use
9026 OMP_CLAUSE_CODE to access the omp clause code.
9028 2020-04-07 Jeff Law <law@redhat.com>
9030 PR rtl-optimization/92264
9031 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
9032 the destination is the stack pointer.
9034 2020-04-07 Jakub Jelinek <jakub@redhat.com>
9036 PR rtl-optimization/94291
9037 PR rtl-optimization/84169
9038 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
9039 must be a REG or SUBREG of REG; if it is not one of these, don't
9042 2020-04-07 Richard Biener <rguenther@suse.de>
9045 * gimplify.c (gimplify_addr_expr): Also consider generated
9048 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9050 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
9052 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9054 * config/arm/arm_mve.h: Cast some pointers to expected types.
9056 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9058 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
9059 same with '__arm_' prefix.
9061 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9063 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
9065 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9067 * config/arm/arm.c (arm_mve_immediate_check): Removed.
9068 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
9069 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
9070 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
9071 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
9072 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
9073 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
9075 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9077 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
9079 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9081 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
9082 * config/arm/mve/md: Fix v[id]wdup patterns.
9084 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9086 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
9087 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
9089 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9091 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
9092 and remove const_ptr enums.
9094 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
9096 * config/arm/arm_mve.h (vsubq_n): Merge with...
9098 (vmulq_n): Merge with...
9100 (__ARM_mve_typeid): Simplify scalar and constant detection.
9102 2020-04-07 Jakub Jelinek <jakub@redhat.com>
9105 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
9106 for inter-lane permutation for 64-byte modes.
9109 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
9110 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
9111 Assume it is a REG after that instead of testing it and doing FAIL
9112 otherwise. Formatting fix.
9114 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
9116 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
9118 2020-04-07 Jakub Jelinek <jakub@redhat.com>
9121 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
9122 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
9124 2020-04-06 Jakub Jelinek <jakub@redhat.com>
9126 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
9127 + const0_rtx return the SP_DERIVED_VALUE_P.
9129 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
9131 PR rtl-optimization/92989
9132 * lra-lives.c (process_bb_lives): Do not treat eh_return data
9133 registers as being live at the beginning of the EH receiver.
9135 2020-04-05 Zachary Spytz <zspytz@gmail.com>
9137 * extend.texi: Add free to list of ISO C90 functions that
9138 are recognized by the compiler.
9140 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
9142 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
9145 * config/microblaze/microblaze.md (trap): Update output pattern.
9147 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
9148 Jakub Jelinek <jakub@redhat.com>
9151 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
9152 arrays, pointer-to-members, function types and qualifiers when
9153 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
9154 to emit type again on definition.
9156 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
9159 * ipa-fnsummary.c (vrp_will_run_p): New function.
9160 (fre_will_run_p): New function.
9161 (evaluate_properties_for_edge): Use it.
9162 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
9163 !optimize_debug to optimize_debug.
9165 2020-04-04 Jakub Jelinek <jakub@redhat.com>
9167 PR rtl-optimization/94468
9168 * cselib.c (references_value_p): Formatting fix.
9169 (cselib_useless_value_p): New function.
9170 (discard_useless_locs, discard_useless_values,
9171 cselib_invalidate_regno_val, cselib_invalidate_mem,
9172 cselib_record_set): Use it instead of
9173 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
9176 * tree-iterator.h (expr_single): Declare.
9177 * tree-iterator.c (expr_single): New function.
9178 * tree.h (protected_set_expr_location_if_unset): Declare.
9179 * tree.c (protected_set_expr_location): Use expr_single.
9180 (protected_set_expr_location_if_unset): New function.
9182 2020-04-03 Jeff Law <law@redhat.com>
9184 PR rtl-optimization/92264
9185 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
9186 reloading of auto-increment addressing modes.
9188 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
9191 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
9194 2020-04-03 Jeff Law <law@redhat.com>
9196 PR rtl-optimization/92264
9197 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
9198 post-increment addressing of source operands as well as residuals
9199 when computing any adjustments to the input pointer.
9201 2020-04-03 Jakub Jelinek <jakub@redhat.com>
9204 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
9205 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
9206 second half of first lane from first lane of second operand and
9207 first half of second lane from second lane of first operand.
9209 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
9211 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
9213 2020-04-03 Tamar Christina <tamar.christina@arm.com>
9216 * common/config/aarch64/aarch64-common.c
9217 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
9219 2020-04-03 Richard Biener <rguenther@suse.de>
9222 * tree.c (array_ref_low_bound): Deal with released SSA names
9225 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
9227 * config/gcn/gcn.c (print_operand): Handle unordered comparison
9229 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
9230 comparison operators.
9232 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
9234 PR tree-optimization/94443
9235 * tree-vect-loop.c (vectorizable_live_operation): Use
9236 gsi_insert_seq_before to replace gsi_insert_before.
9238 2020-04-03 Martin Liska <mliska@suse.cz>
9241 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
9242 Compare type attributes for gimple_call_fntypes.
9244 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
9246 * alias.c (get_alias_set): Fix comment typos.
9248 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
9251 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
9252 attribute checking used by TYPE.
9254 2020-04-02 Martin Jambor <mjambor@suse.cz>
9257 * ipa-sra.c (struct caller_issues): New fields candidate and
9258 call_from_outside_comdat.
9259 (check_for_caller_issues): Check for calls from outsied of
9260 candidate's same_comdat_group.
9261 (check_all_callers_for_issues): Set up issues.candidate, check result
9263 (mark_callers_calls_comdat_local): New function.
9264 (process_isra_node_results): Set calls_comdat_local of callers if
9267 2020-04-02 Richard Biener <rguenther@suse.de>
9270 * common.opt (ffinite-loops): Initialize to zero.
9271 * opts.c (default_options_table): Remove OPT_ffinite_loops
9273 * cfgloop.h (loop::finite_p): New member.
9274 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
9275 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
9277 * lto-streamer-in.c (input_cfg): Stream finite_p.
9278 * lto-streamer-out.c (output_cfg): Likewise.
9279 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
9280 from flag_finite_loops at CFG build time.
9281 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
9282 finite_p flag instead of flag_finite_loops.
9283 * doc/invoke.texi (ffinite-loops): Adjust documentation of
9286 2020-04-02 Richard Biener <rguenther@suse.de>
9289 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
9290 DW_TAG_imported_unit.
9292 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
9294 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
9295 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
9298 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
9300 PR tree-optimization/94401
9301 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
9302 access type when loading halves of vector to avoid peeling for gaps.
9304 2020-04-02 Jakub Jelinek <jakub@redhat.com>
9306 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
9307 between a string literal and MIPS_SYSVERSION_SPEC macro.
9309 2020-04-02 Martin Jambor <mjambor@suse.cz>
9311 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
9313 2020-04-02 Jakub Jelinek <jakub@redhat.com>
9315 PR rtl-optimization/92264
9316 * params.opt (-param=max-find-base-term-values=): Decrease default
9319 PR rtl-optimization/92264
9320 * rtl.h (struct rtx_def): Mention that call bit is used as
9321 SP_DERIVED_VALUE_P in cselib.c.
9322 * cselib.c (SP_DERIVED_VALUE_P): Define.
9323 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
9324 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
9325 val_rtx and sp based expression where offsets cancel each other.
9326 (preserve_constants_and_equivs): Formatting fix.
9327 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
9328 locs list for cfa_base_preserved_val if needed. Formatting fix.
9329 (autoinc_split): If the to be returned value is a REG, MEM or
9330 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
9331 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
9332 (rtx_equal_for_cselib_1): Call autoinc_split even if both
9333 expressions are PLUS in Pmode with CONST_INT second operands.
9334 Handle SP_DERIVED_VALUE_P cases.
9335 (cselib_hash_plus_const_int): New function.
9336 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
9337 second operand, as well as for PRE_DEC etc. that ought to be
9338 hashed the same way.
9339 (cselib_subst_to_values): Substitute PLUS with Pmode and
9340 CONST_INT operand if the first operand is a VALUE which has
9341 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
9342 SP_DERIVED_VALUE_P + adjusted offset.
9343 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
9344 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
9345 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
9346 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
9347 on the sp value before calling cselib_add_permanent_equiv on the
9349 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
9350 in the insn without REG_INC note.
9351 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
9352 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
9355 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
9356 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
9358 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9361 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
9362 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
9363 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
9364 intrinsic defintion by adding a new builtin call to writeback into base
9366 (__arm_vldrdq_gather_base_wb_u64): Likewise.
9367 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
9368 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
9369 (__arm_vldrwq_gather_base_wb_s32): Likewise.
9370 (__arm_vldrwq_gather_base_wb_u32): Likewise.
9371 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
9372 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
9373 (__arm_vldrwq_gather_base_wb_f32): Likewise.
9374 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
9375 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
9376 builtin's qualifier.
9377 (vldrdq_gather_base_wb_z_u): Likewise.
9378 (vldrwq_gather_base_wb_u): Likewise.
9379 (vldrdq_gather_base_wb_u): Likewise.
9380 (vldrwq_gather_base_wb_z_s): Likewise.
9381 (vldrwq_gather_base_wb_z_f): Likewise.
9382 (vldrdq_gather_base_wb_z_s): Likewise.
9383 (vldrwq_gather_base_wb_s): Likewise.
9384 (vldrwq_gather_base_wb_f): Likewise.
9385 (vldrdq_gather_base_wb_s): Likewise.
9386 (vldrwq_gather_base_nowb_z_u): Define builtin.
9387 (vldrdq_gather_base_nowb_z_u): Likewise.
9388 (vldrwq_gather_base_nowb_u): Likewise.
9389 (vldrdq_gather_base_nowb_u): Likewise.
9390 (vldrwq_gather_base_nowb_z_s): Likewise.
9391 (vldrwq_gather_base_nowb_z_f): Likewise.
9392 (vldrdq_gather_base_nowb_z_s): Likewise.
9393 (vldrwq_gather_base_nowb_s): Likewise.
9394 (vldrwq_gather_base_nowb_f): Likewise.
9395 (vldrdq_gather_base_nowb_s): Likewise.
9396 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
9398 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
9399 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
9400 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
9401 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
9402 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
9403 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
9404 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
9405 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
9406 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
9407 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
9408 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
9410 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
9412 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
9413 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
9414 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
9415 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
9416 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
9417 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
9418 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
9419 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
9420 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
9422 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
9423 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
9424 Remove constraints from expander.
9425 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
9426 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
9427 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
9428 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
9429 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
9430 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
9432 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
9434 PR rtl-optimization/94123
9435 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
9436 flag_split_wide_types_early.
9438 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
9440 * doc/extend.texi (Common Function Attributes): Fix typo.
9442 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
9445 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
9448 2020-04-01 Zackery Spytz <zspytz@gmail.com>
9450 * doc/extend.texi: Fix a typo in the documentation of the
9451 copy function attribute.
9453 2020-04-01 Jakub Jelinek <jakub@redhat.com>
9456 * tree-object-size.c (pass_object_sizes::execute): Don't call
9457 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
9458 call replace_call_with_value.
9460 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
9462 PR tree-optimization/94043
9463 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
9464 phi for vec_lhs and use it for lane extraction.
9466 2020-03-31 Felix Yang <felix.yang@huawei.com>
9468 PR tree-optimization/94398
9469 * tree-vect-stmts.c (vectorizable_store): Instead of calling
9470 vect_supportable_dr_alignment, set alignment_support_scheme to
9471 dr_unaligned_supported for gather-scatter accesses.
9472 (vectorizable_load): Likewise.
9474 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
9476 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
9478 (vnsi, VnSI, vndi, VnDI): New mode attributes.
9479 (mov<mode>): Use <VnDI> in place of V64DI.
9480 (mov<mode>_exec): Likewise.
9481 (mov<mode>_sgprbase): Likewise.
9482 (reload_out<mode>): Likewise.
9483 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
9484 (gather_load<mode>v64si): Rename to ...
9485 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
9486 and <VnDI> in place of V64DI.
9487 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
9488 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
9489 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
9490 (scatter_store<mode>v64si): Rename to ...
9491 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
9492 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
9493 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
9494 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
9495 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
9496 (ds_bpermute<mode>): Use <VnSI>.
9497 (addv64si3_vcc<exec_vcc>): Rename to ...
9498 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
9499 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
9500 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
9501 (addcv64si3<exec_vcc>): Rename to ...
9502 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
9503 (subv64si3_vcc<exec_vcc>): Rename to ...
9504 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
9505 (subcv64si3<exec_vcc>): Rename to ...
9506 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
9507 (addv64di3): Rename to ...
9508 (add<mode>3): ... this, and use V_DI.
9509 (addv64di3_exec): Rename to ...
9510 (add<mode>3_exec): ... this, and use V_DI.
9511 (subv64di3): Rename to ...
9512 (sub<mode>3): ... this, and use V_DI.
9513 (subv64di3_exec): Rename to ...
9514 (sub<mode>3_exec): ... this, and use V_DI.
9515 (addv64di3_zext): Rename to ...
9516 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
9517 (addv64di3_zext_exec): Rename to ...
9518 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
9519 (addv64di3_zext_dup): Rename to ...
9520 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
9521 (addv64di3_zext_dup_exec): Rename to ...
9522 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
9523 (addv64di3_zext_dup2): Rename to ...
9524 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
9525 (addv64di3_zext_dup2_exec): Rename to ...
9526 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
9527 (addv64di3_sext_dup2): Rename to ...
9528 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
9529 (addv64di3_sext_dup2_exec): Rename to ...
9530 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
9531 (<su>mulv64si3_highpart<exec>): Rename to ...
9532 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
9533 (mulv64di3): Rename to ...
9534 (mul<mode>3): ... this, and use V_DI and <VnSI>.
9535 (mulv64di3_exec): Rename to ...
9536 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
9537 (mulv64di3_zext): Rename to ...
9538 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
9539 (mulv64di3_zext_exec): Rename to ...
9540 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
9541 (mulv64di3_zext_dup2): Rename to ...
9542 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
9543 (mulv64di3_zext_dup2_exec): Rename to ...
9544 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
9545 (<expander>v64di3): Rename to ...
9546 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
9547 (<expander>v64di3_exec): Rename to ...
9548 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
9549 (<expander>v64si3<exec>): Rename to ...
9550 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
9551 (v<expander>v64si3<exec>): Rename to ...
9552 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
9553 (<expander>v64si3<exec>): Rename to ...
9554 (<expander><vnsi>3<exec>): ... this, and use V_SI.
9555 (subv64df3<exec>): Rename to ...
9556 (sub<mode>3<exec>): ... this, and use V_DF.
9557 (truncv64di<mode>2): Rename to ...
9558 (trunc<vndi><mode>2): ... this, and use <VnDI>.
9559 (truncv64di<mode>2_exec): Rename to ...
9560 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
9561 (<convop><mode>v64di2): Rename to ...
9562 (<convop><mode><vndi>2): ... this, and use <VnDI>.
9563 (<convop><mode>v64di2_exec): Rename to ...
9564 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
9565 (vec_cmp<u>v64qidi): Rename to ...
9566 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
9567 (vec_cmp<u>v64qidi_exec): Rename to ...
9568 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
9569 (vcond_mask_<mode>di): Use <VnDI>.
9570 (maskload<mode>di): Likewise.
9571 (maskstore<mode>di): Likewise.
9572 (mask_gather_load<mode>v64si): Rename to ...
9573 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
9574 (mask_scatter_store<mode>v64si): Rename to ...
9575 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
9576 (*<reduc_op>_dpp_shr_v64di): Rename to ...
9577 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
9578 (*plus_carry_in_dpp_shr_v64si): Rename to ...
9579 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
9580 (*plus_carry_dpp_shr_v64di): Rename to ...
9581 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
9582 (vec_seriesv64si): Rename to ...
9583 (vec_series<mode>): ... this, and use V_SI.
9584 (vec_seriesv64di): Rename to ...
9585 (vec_series<mode>): ... this, and use V_DI.
9587 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
9589 * config/arc/arc.c (arc_print_operand): Use
9590 HOST_WIDE_INT_PRINT_DEC macro.
9592 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
9594 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
9596 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9598 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
9600 (__arm_vbicq): Likewise.
9602 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
9604 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
9606 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9608 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
9609 common section of both MVE Integer and MVE Floating Point.
9611 (vaddlvq_p): Likewise.
9612 (vaddvaq): Likewise.
9613 (vaddvq_p): Likewise.
9614 (vcmpcsq): Likewise.
9615 (vmlsdavxq): Likewise.
9616 (vmlsdavq): Likewise.
9617 (vmladavxq): Likewise.
9618 (vmladavq): Likewise.
9620 (vminavq): Likewise.
9622 (vmaxavq): Likewise.
9623 (vmlaldavq): Likewise.
9624 (vcmphiq): Likewise.
9625 (vaddlvaq): Likewise.
9626 (vrmlaldavhq): Likewise.
9627 (vrmlaldavhxq): Likewise.
9628 (vrmlsldavhq): Likewise.
9629 (vrmlsldavhxq): Likewise.
9630 (vmlsldavxq): Likewise.
9631 (vmlsldavq): Likewise.
9633 (vrmlaldavhaq): Likewise.
9634 (vcmpgeq_m_n): Likewise.
9635 (vmlsdavxq_p): Likewise.
9636 (vmlsdavq_p): Likewise.
9637 (vmlsdavaxq): Likewise.
9638 (vmlsdavaq): Likewise.
9639 (vaddvaq_p): Likewise.
9640 (vcmpcsq_m_n): Likewise.
9641 (vcmpcsq_m): Likewise.
9642 (vmladavxq_p): Likewise.
9643 (vmladavq_p): Likewise.
9644 (vmladavaxq): Likewise.
9645 (vmladavaq): Likewise.
9646 (vminvq_p): Likewise.
9647 (vminavq_p): Likewise.
9648 (vmaxvq_p): Likewise.
9649 (vmaxavq_p): Likewise.
9650 (vcmphiq_m): Likewise.
9651 (vaddlvaq_p): Likewise.
9652 (vmlaldavaq): Likewise.
9653 (vmlaldavaxq): Likewise.
9654 (vmlaldavq_p): Likewise.
9655 (vmlaldavxq_p): Likewise.
9656 (vmlsldavaq): Likewise.
9657 (vmlsldavaxq): Likewise.
9658 (vmlsldavq_p): Likewise.
9659 (vmlsldavxq_p): Likewise.
9660 (vrmlaldavhaxq): Likewise.
9661 (vrmlaldavhq_p): Likewise.
9662 (vrmlaldavhxq_p): Likewise.
9663 (vrmlsldavhaq): Likewise.
9664 (vrmlsldavhaxq): Likewise.
9665 (vrmlsldavhq_p): Likewise.
9666 (vrmlsldavhxq_p): Likewise.
9667 (vabavq_p): Likewise.
9668 (vmladavaq_p): Likewise.
9669 (vstrbq_scatter_offset): Likewise.
9670 (vstrbq_p): Likewise.
9671 (vstrbq_scatter_offset_p): Likewise.
9672 (vstrdq_scatter_base_p): Likewise.
9673 (vstrdq_scatter_base): Likewise.
9674 (vstrdq_scatter_offset_p): Likewise.
9675 (vstrdq_scatter_offset): Likewise.
9676 (vstrdq_scatter_shifted_offset_p): Likewise.
9677 (vstrdq_scatter_shifted_offset): Likewise.
9678 (vmaxq_x): Likewise.
9679 (vminq_x): Likewise.
9680 (vmovlbq_x): Likewise.
9681 (vmovltq_x): Likewise.
9682 (vmulhq_x): Likewise.
9683 (vmullbq_int_x): Likewise.
9684 (vmullbq_poly_x): Likewise.
9685 (vmulltq_int_x): Likewise.
9686 (vmulltq_poly_x): Likewise.
9689 2020-03-31 Jakub Jelinek <jakub@redhat.com>
9692 * config/aarch64/constraints.md (Uph): New constraint.
9693 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
9694 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
9697 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
9698 Jakub Jelinek <jakub@redhat.com>
9701 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
9702 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
9704 2020-03-31 Jakub Jelinek <jakub@redhat.com>
9706 PR tree-optimization/94403
9707 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
9708 ENUMERAL_TYPE lhs_type.
9710 PR rtl-optimization/94344
9711 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
9712 conversions, either on both operands of |^+ or just one. Handle
9713 also extra same precision conversion on RSHIFT_EXPR first operand
9714 provided RSHIFT_EXPR is performed in unsigned type.
9716 2020-03-30 David Malcolm <dmalcolm@redhat.com>
9718 * lra.c (finish_insn_code_data_once): Set the array elements
9719 to NULL after freeing them.
9721 2020-03-30 Andreas Schwab <schwab@suse.de>
9723 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
9726 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
9728 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
9729 to skip defining builtins based on builtin_mask.
9731 2020-03-30 Jakub Jelinek <jakub@redhat.com>
9734 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
9735 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
9736 operand is a register. Don't enable masked variants for V*[QH]Imode.
9739 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
9740 <store_mask_constraint> instead of m in output operand constraint.
9741 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
9744 2020-03-30 Alan Modra <amodra@gmail.com>
9746 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
9747 (rs6000_indirect_call_template_1): Adjust to suit.
9748 * config/rs6000/rs6000.md (call_local): Merge call_local32,
9749 call_local64, and call_local_aix.
9750 (call_value_local): Simlarly.
9751 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
9752 and disable pattern when CALL_LONG.
9753 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
9754 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
9755 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
9757 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
9760 * doc/invoke.texi: Update -falign-functions, -falign-loops and
9761 -falign-jumps documentation.
9763 2020-03-29 Martin Liska <mliska@suse.cz>
9766 * cgraphunit.c (process_function_and_variable_attributes): Remove
9767 double 'attribute' words.
9769 2020-03-29 John David Anglin <dave.anglin@bell.net>
9771 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
9774 2020-03-28 Jakub Jelinek <jakub@redhat.com>
9777 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
9778 to true after setting size to integer_one_node.
9780 PR tree-optimization/94329
9781 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
9782 on the last stmt in a bb, make sure gsi_prev isn't done immediately
9785 2020-03-27 Alan Modra <amodra@gmail.com>
9788 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
9789 for PLT16_LO and PLT_PCREL.
9790 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
9791 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
9792 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
9794 2020-03-27 Martin Sebor <msebor@redhat.com>
9797 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
9799 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
9801 * config/gcn/gcn-valu.md:
9802 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
9803 (VEC_1REG_MODE): Delete.
9804 (VEC_1REG_ALT): Delete.
9805 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
9806 (VEC_1REG_INT_MODE): Delete.
9807 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
9808 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
9809 (VEC_2REG_MODE): Rename to V_2REG throughout.
9810 (VEC_REG_MODE): Rename to V_noHI throughout.
9811 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
9812 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
9813 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
9814 (VEC_INT_MODE): Delete.
9815 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
9816 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
9817 (FP_MODE): Delete and replace with FP throughout.
9818 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
9819 (VCMP_MODE): Rename to V_noQI throughout and move to top.
9820 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
9821 * config/gcn/gcn.md (FP): New mode iterator.
9822 (FP_1REG): New mode iterator.
9824 2020-03-27 David Malcolm <dmalcolm@redhat.com>
9826 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
9827 now emits two .dot files.
9828 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
9829 (graphviz_out::end_tr): Only close a TR, not a TD.
9830 (graphviz_out::begin_td): New.
9831 (graphviz_out::end_td): New.
9832 (graphviz_out::begin_trtd): New, replacing the old implementation
9833 of graphviz_out::begin_tr.
9834 (graphviz_out::end_tdtr): New, replacing the old implementation
9835 of graphviz_out::end_tr.
9836 * graphviz.h (graphviz_out::begin_td): New decl.
9837 (graphviz_out::end_td): New decl.
9838 (graphviz_out::begin_trtd): New decl.
9839 (graphviz_out::end_tdtr): New decl.
9841 2020-03-27 Richard Biener <rguenther@suse.de>
9844 * dwarf2out.c (should_emit_struct_debug): Return false for
9847 2020-03-27 Richard Biener <rguenther@suse.de>
9849 PR tree-optimization/94352
9850 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
9852 (ssa_propagation_engine::ssa_propagate): ... here after
9853 initializing curr_order.
9855 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
9857 PR tree-optimization/90332
9858 * tree-vect-stmts.c (vector_vector_composition_type): New function.
9859 (get_group_load_store_type): Adjust to call
9860 vector_vector_composition_type, extend it to construct with scalar
9862 (vectorizable_load): Likewise.
9864 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
9866 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
9867 (create_ddg_dep_no_link): Likewise.
9868 (add_cross_iteration_register_deps): Move debug instruction check.
9869 Other minor refactoring.
9870 (add_intra_loop_mem_dep): Do not check for debug instructions.
9871 (add_inter_loop_mem_dep): Likewise.
9872 (build_intra_loop_deps): Likewise.
9873 (create_ddg): Do not include debug insns into the graph.
9874 * ddg.h (struct ddg): Remove num_debug field.
9875 * modulo-sched.c (doloop_register_get): Adjust condition.
9876 (res_MII): Remove DDG num_debug field usage.
9877 (sms_schedule_by_order): Use assertion against debug insns.
9878 (ps_has_conflicts): Drop debug insn check.
9880 2020-03-26 Jakub Jelinek <jakub@redhat.com>
9883 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
9884 that contains exactly one non-DEBUG_BEGIN_STMT statement.
9887 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
9888 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
9889 a single non-debug stmt followed by one or more debug stmts.
9890 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
9891 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
9892 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
9893 gimple_seq_last to check if outer_stmt gbind could be reused and
9894 if yes and it is surrounded by any debug stmts, move them into the
9897 PR rtl-optimization/92264
9898 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
9899 for sp based values in !frame_pointer_needed
9900 && !ACCUMULATE_OUTGOING_ARGS functions.
9902 2020-03-26 Felix Yang <felix.yang@huawei.com>
9904 PR tree-optimization/94269
9905 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
9907 operation to single basic block.
9909 2020-03-25 Jeff Law <law@redhat.com>
9911 PR rtl-optimization/90275
9912 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
9915 2020-03-25 Jakub Jelinek <jakub@redhat.com>
9918 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
9919 mode rather than VOIDmode.
9921 2020-03-25 Martin Sebor <msebor@redhat.com>
9924 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
9925 even for alloca calls resulting from system macro expansion.
9926 Include inlining context in all warnings.
9928 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
9931 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
9932 FPRs to change between SDmode and DDmode.
9934 2020-03-25 Martin Sebor <msebor@redhat.com>
9936 PR tree-optimization/94131
9937 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
9939 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
9940 types have constant sizes.
9942 2020-03-25 Martin Liska <mliska@suse.cz>
9945 * configure.ac: Report error only when --with-zstd
9947 * configure: Regenerate.
9949 2020-03-25 Jakub Jelinek <jakub@redhat.com>
9952 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
9953 INSN_CODE (insn) to -1 when changing the pattern.
9955 2020-03-25 Martin Liska <mliska@suse.cz>
9959 * config/i386/i386-features.c (make_resolver_func): Drop
9960 public flag for resolver.
9961 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
9962 group for resolver and drop public flag if possible.
9963 * multiple_target.c (create_dispatcher_calls): Drop unique_name
9964 and resolution as we want to enable LTO privatization of the default
9967 2020-03-25 Martin Liska <mliska@suse.cz>
9970 * configure.ac: Respect --without-zstd and report
9971 error when we can't find header file with --with-zstd.
9972 * configure: Regenerate.
9974 2020-03-25 Jakub Jelinek <jakub@redhat.com>
9977 * varasm.c (output_constructor_array_range): If local->index
9978 RANGE_EXPR doesn't start at the current location in the constructor,
9979 skip needed number of bytes using assemble_zeros or assert we don't
9983 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
9984 counter instead of DECL_UID.
9986 PR tree-optimization/94300
9987 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
9988 is positive, make sure that off + size isn't larger than needed_len.
9990 2020-03-25 Richard Biener <rguenther@suse.de>
9991 Jakub Jelinek <jakub@redhat.com>
9994 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
9996 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
9998 * doc/sourcebuild.texi (ARM-specific attributes): Add
10000 (Features for dg-add-options): Add arm_fp_dp.
10002 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
10005 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
10007 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
10010 * omp-offload.c (omp_finish_file): Fix target-link handling if
10011 targetm_common.have_named_sections is false.
10013 2020-03-24 Jakub Jelinek <jakub@redhat.com>
10016 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
10017 instead of GEN_INT.
10020 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
10021 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
10022 If not after and at *incr_pos is a debug stmt, set stmt location to
10023 location of next non-debug stmt after it if any.
10026 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
10027 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
10028 worklist or set GF_PLF_2 just because it is used in a debug stmt in
10029 another bb. Formatting improvements.
10032 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
10033 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
10034 regardless of whether TREE_NO_WARNING is set on it or whether
10035 warn_unused_function is true or not.
10037 2020-03-23 Jeff Law <law@redhat.com>
10039 PR rtl-optimization/90275
10042 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
10043 (simplify_logical_relational_operation): Use it.
10045 2020-03-23 Jakub Jelinek <jakub@redhat.com>
10048 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
10049 ultimate rhs and if returned something different, reconstructing
10050 the COMPOUND_EXPRs.
10052 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
10054 * opts.c (print_filtered_help): Improve the help text for alias options.
10056 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10057 Andre Vieira <andre.simoesdiasvieira@arm.com>
10058 Mihail Ionescu <mihail.ionescu@arm.com>
10060 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
10061 (vshlcq_m_u8): Likewise.
10062 (vshlcq_m_s16): Likewise.
10063 (vshlcq_m_u16): Likewise.
10064 (vshlcq_m_s32): Likewise.
10065 (vshlcq_m_u32): Likewise.
10066 (__arm_vshlcq_m_s8): Define intrinsic.
10067 (__arm_vshlcq_m_u8): Likewise.
10068 (__arm_vshlcq_m_s16): Likewise.
10069 (__arm_vshlcq_m_u16): Likewise.
10070 (__arm_vshlcq_m_s32): Likewise.
10071 (__arm_vshlcq_m_u32): Likewise.
10072 (vshlcq_m): Define polymorphic variant.
10073 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
10074 Use builtin qualifier.
10075 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
10076 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
10077 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
10078 (mve_vshlcq_m_<supf><mode>): Likewise.
10080 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10082 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
10083 (UQSHL_QUALIFIERS): Likewise.
10084 (ASRL_QUALIFIERS): Likewise.
10085 (SQSHL_QUALIFIERS): Likewise.
10086 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
10088 (sqrshr): Define macro.
10089 (sqrshrl): Likewise.
10090 (sqrshrl_sat48): Likewise.
10092 (sqshll): Likewise.
10094 (srshrl): Likewise.
10095 (uqrshl): Likewise.
10096 (uqrshll): Likewise.
10097 (uqrshll_sat48): Likewise.
10099 (uqshll): Likewise.
10101 (urshrl): Likewise.
10104 (__arm_lsll): Define intrinsic.
10105 (__arm_asrl): Likewise.
10106 (__arm_uqrshll): Likewise.
10107 (__arm_uqrshll_sat48): Likewise.
10108 (__arm_sqrshrl): Likewise.
10109 (__arm_sqrshrl_sat48): Likewise.
10110 (__arm_uqshll): Likewise.
10111 (__arm_urshrl): Likewise.
10112 (__arm_srshrl): Likewise.
10113 (__arm_sqshll): Likewise.
10114 (__arm_uqrshl): Likewise.
10115 (__arm_sqrshr): Likewise.
10116 (__arm_uqshl): Likewise.
10117 (__arm_urshr): Likewise.
10118 (__arm_sqshl): Likewise.
10119 (__arm_srshr): Likewise.
10120 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
10122 (UQSHL_QUALIFIERS): Likewise.
10123 (ASRL_QUALIFIERS): Likewise.
10124 (SQSHL_QUALIFIERS): Likewise.
10125 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
10126 (mve_sqrshrl_sat<supf>_di): Likewise.
10127 (mve_uqrshl_si): Likewise.
10128 (mve_sqrshr_si): Likewise.
10129 (mve_uqshll_di): Likewise.
10130 (mve_urshrl_di): Likewise.
10131 (mve_uqshl_si): Likewise.
10132 (mve_urshr_si): Likewise.
10133 (mve_sqshl_si): Likewise.
10134 (mve_srshr_si): Likewise.
10135 (mve_srshrl_di): Likewise.
10136 (mve_sqshll_di): Likewise.
10138 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10139 Andre Vieira <andre.simoesdiasvieira@arm.com>
10140 Mihail Ionescu <mihail.ionescu@arm.com>
10142 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
10143 (vsetq_lane_f32): Likewise.
10144 (vsetq_lane_s16): Likewise.
10145 (vsetq_lane_s32): Likewise.
10146 (vsetq_lane_s8): Likewise.
10147 (vsetq_lane_s64): Likewise.
10148 (vsetq_lane_u8): Likewise.
10149 (vsetq_lane_u16): Likewise.
10150 (vsetq_lane_u32): Likewise.
10151 (vsetq_lane_u64): Likewise.
10152 (vgetq_lane_f16): Likewise.
10153 (vgetq_lane_f32): Likewise.
10154 (vgetq_lane_s16): Likewise.
10155 (vgetq_lane_s32): Likewise.
10156 (vgetq_lane_s8): Likewise.
10157 (vgetq_lane_s64): Likewise.
10158 (vgetq_lane_u8): Likewise.
10159 (vgetq_lane_u16): Likewise.
10160 (vgetq_lane_u32): Likewise.
10161 (vgetq_lane_u64): Likewise.
10162 (__ARM_NUM_LANES): Likewise.
10163 (__ARM_LANEQ): Likewise.
10164 (__ARM_CHECK_LANEQ): Likewise.
10165 (__arm_vsetq_lane_s16): Define intrinsic.
10166 (__arm_vsetq_lane_s32): Likewise.
10167 (__arm_vsetq_lane_s8): Likewise.
10168 (__arm_vsetq_lane_s64): Likewise.
10169 (__arm_vsetq_lane_u8): Likewise.
10170 (__arm_vsetq_lane_u16): Likewise.
10171 (__arm_vsetq_lane_u32): Likewise.
10172 (__arm_vsetq_lane_u64): Likewise.
10173 (__arm_vgetq_lane_s16): Likewise.
10174 (__arm_vgetq_lane_s32): Likewise.
10175 (__arm_vgetq_lane_s8): Likewise.
10176 (__arm_vgetq_lane_s64): Likewise.
10177 (__arm_vgetq_lane_u8): Likewise.
10178 (__arm_vgetq_lane_u16): Likewise.
10179 (__arm_vgetq_lane_u32): Likewise.
10180 (__arm_vgetq_lane_u64): Likewise.
10181 (__arm_vsetq_lane_f16): Likewise.
10182 (__arm_vsetq_lane_f32): Likewise.
10183 (__arm_vgetq_lane_f16): Likewise.
10184 (__arm_vgetq_lane_f32): Likewise.
10185 (vgetq_lane): Define polymorphic variant.
10186 (vsetq_lane): Likewise.
10187 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
10189 (mve_vec_extractv2didi): Likewise.
10190 (mve_vec_extract_sext_internal<mode>): Likewise.
10191 (mve_vec_extract_zext_internal<mode>): Likewise.
10192 (mve_vec_set<mode>_internal): Likewise.
10193 (mve_vec_setv2di_internal): Likewise.
10194 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
10196 (vec_extract<mode><V_elem_l>): Rename to
10197 "neon_vec_extract<mode><V_elem_l>".
10198 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
10199 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
10200 pattern common for MVE and NEON.
10201 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
10204 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
10206 * config/arm/mve.md (earlyclobber_32): New mode attribute.
10207 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
10208 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
10210 2020-03-23 Richard Biener <rguenther@suse.de>
10212 PR tree-optimization/94261
10213 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
10214 IL operand swapping code.
10215 (vect_slp_rearrange_stmts): Do not arrange isomorphic
10216 nodes that would need operation code adjustments.
10218 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
10220 * doc/install.texi (amdgcn-*-amdhsa): Renamed
10221 from amdgcn-unknown-amdhsa; change
10222 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
10224 2020-03-23 Richard Biener <rguenther@suse.de>
10227 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
10228 directly rather than also folding it via build_fold_addr_expr.
10230 2020-03-23 Richard Biener <rguenther@suse.de>
10232 PR tree-optimization/94266
10233 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
10234 addresses of TARGET_MEM_REFs.
10236 2020-03-23 Martin Liska <mliska@suse.cz>
10239 * symtab.c (symtab_node::clone_references): Save speculative_id
10240 as ref may be overwritten by create_reference.
10241 (symtab_node::clone_referring): Likewise.
10242 (symtab_node::clone_reference): Likewise.
10244 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
10246 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
10247 references to Darwin.
10248 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
10249 unconditionally and comment on why.
10251 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
10253 * config/darwin.c (darwin_mergeable_constant_section): Collect
10254 section anchor checks into the caller.
10255 (machopic_select_section): Collect section anchor checks into
10256 the determination of 'effective zero-size' objects. When the
10257 size is unknown, assume it is non-zero, and thus return the
10258 'generic' section for the DECL.
10260 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
10263 * config/darwin.opt: Amend options descriptions.
10265 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
10267 PR rtl-optimization/94052
10268 * lra-constraints.c (simplify_operand_subreg): Reload the inner
10269 register of a paradoxical subreg if simplify_subreg_regno fails
10270 to give a valid hard register for the outer mode.
10272 2020-03-20 Martin Jambor <mjambor@suse.cz>
10274 PR tree-optimization/93435
10275 * params.opt (sra-max-propagations): New parameter.
10276 * tree-sra.c (propagation_budget): New variable.
10277 (budget_for_propagation_access): New function.
10278 (propagate_subaccesses_from_rhs): Use it.
10279 (propagate_subaccesses_from_lhs): Likewise.
10280 (propagate_all_subaccesses): Set up and destroy propagation_budget.
10282 2020-03-20 Carl Love <cel@us.ibm.com>
10285 * config/rs6000/rs6000.c (rs6000_option_override_internal):
10286 Add check for TARGET_FPRND for Power 7 or newer.
10288 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
10291 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
10292 (cgraph_edge::redirect_callee): Move here; likewise.
10293 (cgraph_node::remove_callees): Update calls_comdat_local flag.
10294 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
10296 (cgraph_node::check_calls_comdat_local_p): New member function.
10297 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
10298 (cgraph_edge::redirect_callee): Move offline.
10299 * ipa-fnsummary.c (compute_fn_summary): Do not compute
10300 calls_comdat_local flag here.
10301 * ipa-inline-transform.c (inline_call): Fix updating of
10302 calls_comdat_local flag.
10303 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
10304 * symtab.c (symtab_node::add_to_same_comdat_group): Update
10305 calls_comdat_local flag.
10307 2020-03-20 Richard Biener <rguenther@suse.de>
10309 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
10310 from the possibly modified root.
10312 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10313 Andre Vieira <andre.simoesdiasvieira@arm.com>
10314 Mihail Ionescu <mihail.ionescu@arm.com>
10316 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
10317 (vst1q_p_s8): Likewise.
10318 (vst2q_s8): Likewise.
10319 (vst2q_u8): Likewise.
10320 (vld1q_z_u8): Likewise.
10321 (vld1q_z_s8): Likewise.
10322 (vld2q_s8): Likewise.
10323 (vld2q_u8): Likewise.
10324 (vld4q_s8): Likewise.
10325 (vld4q_u8): Likewise.
10326 (vst1q_p_u16): Likewise.
10327 (vst1q_p_s16): Likewise.
10328 (vst2q_s16): Likewise.
10329 (vst2q_u16): Likewise.
10330 (vld1q_z_u16): Likewise.
10331 (vld1q_z_s16): Likewise.
10332 (vld2q_s16): Likewise.
10333 (vld2q_u16): Likewise.
10334 (vld4q_s16): Likewise.
10335 (vld4q_u16): Likewise.
10336 (vst1q_p_u32): Likewise.
10337 (vst1q_p_s32): Likewise.
10338 (vst2q_s32): Likewise.
10339 (vst2q_u32): Likewise.
10340 (vld1q_z_u32): Likewise.
10341 (vld1q_z_s32): Likewise.
10342 (vld2q_s32): Likewise.
10343 (vld2q_u32): Likewise.
10344 (vld4q_s32): Likewise.
10345 (vld4q_u32): Likewise.
10346 (vld4q_f16): Likewise.
10347 (vld2q_f16): Likewise.
10348 (vld1q_z_f16): Likewise.
10349 (vst2q_f16): Likewise.
10350 (vst1q_p_f16): Likewise.
10351 (vld4q_f32): Likewise.
10352 (vld2q_f32): Likewise.
10353 (vld1q_z_f32): Likewise.
10354 (vst2q_f32): Likewise.
10355 (vst1q_p_f32): Likewise.
10356 (__arm_vst1q_p_u8): Define intrinsic.
10357 (__arm_vst1q_p_s8): Likewise.
10358 (__arm_vst2q_s8): Likewise.
10359 (__arm_vst2q_u8): Likewise.
10360 (__arm_vld1q_z_u8): Likewise.
10361 (__arm_vld1q_z_s8): Likewise.
10362 (__arm_vld2q_s8): Likewise.
10363 (__arm_vld2q_u8): Likewise.
10364 (__arm_vld4q_s8): Likewise.
10365 (__arm_vld4q_u8): Likewise.
10366 (__arm_vst1q_p_u16): Likewise.
10367 (__arm_vst1q_p_s16): Likewise.
10368 (__arm_vst2q_s16): Likewise.
10369 (__arm_vst2q_u16): Likewise.
10370 (__arm_vld1q_z_u16): Likewise.
10371 (__arm_vld1q_z_s16): Likewise.
10372 (__arm_vld2q_s16): Likewise.
10373 (__arm_vld2q_u16): Likewise.
10374 (__arm_vld4q_s16): Likewise.
10375 (__arm_vld4q_u16): Likewise.
10376 (__arm_vst1q_p_u32): Likewise.
10377 (__arm_vst1q_p_s32): Likewise.
10378 (__arm_vst2q_s32): Likewise.
10379 (__arm_vst2q_u32): Likewise.
10380 (__arm_vld1q_z_u32): Likewise.
10381 (__arm_vld1q_z_s32): Likewise.
10382 (__arm_vld2q_s32): Likewise.
10383 (__arm_vld2q_u32): Likewise.
10384 (__arm_vld4q_s32): Likewise.
10385 (__arm_vld4q_u32): Likewise.
10386 (__arm_vld4q_f16): Likewise.
10387 (__arm_vld2q_f16): Likewise.
10388 (__arm_vld1q_z_f16): Likewise.
10389 (__arm_vst2q_f16): Likewise.
10390 (__arm_vst1q_p_f16): Likewise.
10391 (__arm_vld4q_f32): Likewise.
10392 (__arm_vld2q_f32): Likewise.
10393 (__arm_vld1q_z_f32): Likewise.
10394 (__arm_vst2q_f32): Likewise.
10395 (__arm_vst1q_p_f32): Likewise.
10396 (vld1q_z): Define polymorphic variant.
10399 (vst1q_p): Likewise.
10401 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
10403 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
10404 (mve_vld2q<mode>): Likewise.
10405 (mve_vld4q<mode>): Likewise.
10407 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10408 Andre Vieira <andre.simoesdiasvieira@arm.com>
10409 Mihail Ionescu <mihail.ionescu@arm.com>
10411 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
10412 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
10413 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
10414 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
10415 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
10416 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
10417 * config/arm/arm_mve.h (vadciq_s32): Define macro.
10418 (vadciq_u32): Likewise.
10419 (vadciq_m_s32): Likewise.
10420 (vadciq_m_u32): Likewise.
10421 (vadcq_s32): Likewise.
10422 (vadcq_u32): Likewise.
10423 (vadcq_m_s32): Likewise.
10424 (vadcq_m_u32): Likewise.
10425 (vsbciq_s32): Likewise.
10426 (vsbciq_u32): Likewise.
10427 (vsbciq_m_s32): Likewise.
10428 (vsbciq_m_u32): Likewise.
10429 (vsbcq_s32): Likewise.
10430 (vsbcq_u32): Likewise.
10431 (vsbcq_m_s32): Likewise.
10432 (vsbcq_m_u32): Likewise.
10433 (__arm_vadciq_s32): Define intrinsic.
10434 (__arm_vadciq_u32): Likewise.
10435 (__arm_vadciq_m_s32): Likewise.
10436 (__arm_vadciq_m_u32): Likewise.
10437 (__arm_vadcq_s32): Likewise.
10438 (__arm_vadcq_u32): Likewise.
10439 (__arm_vadcq_m_s32): Likewise.
10440 (__arm_vadcq_m_u32): Likewise.
10441 (__arm_vsbciq_s32): Likewise.
10442 (__arm_vsbciq_u32): Likewise.
10443 (__arm_vsbciq_m_s32): Likewise.
10444 (__arm_vsbciq_m_u32): Likewise.
10445 (__arm_vsbcq_s32): Likewise.
10446 (__arm_vsbcq_u32): Likewise.
10447 (__arm_vsbcq_m_s32): Likewise.
10448 (__arm_vsbcq_m_u32): Likewise.
10449 (vadciq_m): Define polymorphic variant.
10450 (vadciq): Likewise.
10451 (vadcq_m): Likewise.
10453 (vsbciq_m): Likewise.
10454 (vsbciq): Likewise.
10455 (vsbcq_m): Likewise.
10457 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
10459 (BINOP_UNONE_UNONE_UNONE): Likewise.
10460 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
10461 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
10462 * config/arm/mve.md (VADCIQ): Define iterator.
10463 (VADCIQ_M): Likewise.
10465 (VSBCQ_M): Likewise.
10466 (VSBCIQ): Likewise.
10467 (VSBCIQ_M): Likewise.
10469 (VADCQ_M): Likewise.
10470 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
10471 (mve_vadciq_<supf>v4si): Likewise.
10472 (mve_vadcq_m_<supf>v4si): Likewise.
10473 (mve_vadcq_<supf>v4si): Likewise.
10474 (mve_vsbciq_m_<supf>v4si): Likewise.
10475 (mve_vsbciq_<supf>v4si): Likewise.
10476 (mve_vsbcq_m_<supf>v4si): Likewise.
10477 (mve_vsbcq_<supf>v4si): Likewise.
10478 (get_fpscr_nzcvqc): Define isns.
10479 (set_fpscr_nzcvqc): Define isns.
10480 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
10481 (UNSPEC_SET_FPSCR_NZCVQC): Define.
10483 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10485 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
10486 (vddupq_x_n_u16): Likewise.
10487 (vddupq_x_n_u32): Likewise.
10488 (vddupq_x_wb_u8): Likewise.
10489 (vddupq_x_wb_u16): Likewise.
10490 (vddupq_x_wb_u32): Likewise.
10491 (vdwdupq_x_n_u8): Likewise.
10492 (vdwdupq_x_n_u16): Likewise.
10493 (vdwdupq_x_n_u32): Likewise.
10494 (vdwdupq_x_wb_u8): Likewise.
10495 (vdwdupq_x_wb_u16): Likewise.
10496 (vdwdupq_x_wb_u32): Likewise.
10497 (vidupq_x_n_u8): Likewise.
10498 (vidupq_x_n_u16): Likewise.
10499 (vidupq_x_n_u32): Likewise.
10500 (vidupq_x_wb_u8): Likewise.
10501 (vidupq_x_wb_u16): Likewise.
10502 (vidupq_x_wb_u32): Likewise.
10503 (viwdupq_x_n_u8): Likewise.
10504 (viwdupq_x_n_u16): Likewise.
10505 (viwdupq_x_n_u32): Likewise.
10506 (viwdupq_x_wb_u8): Likewise.
10507 (viwdupq_x_wb_u16): Likewise.
10508 (viwdupq_x_wb_u32): Likewise.
10509 (vdupq_x_n_s8): Likewise.
10510 (vdupq_x_n_s16): Likewise.
10511 (vdupq_x_n_s32): Likewise.
10512 (vdupq_x_n_u8): Likewise.
10513 (vdupq_x_n_u16): Likewise.
10514 (vdupq_x_n_u32): Likewise.
10515 (vminq_x_s8): Likewise.
10516 (vminq_x_s16): Likewise.
10517 (vminq_x_s32): Likewise.
10518 (vminq_x_u8): Likewise.
10519 (vminq_x_u16): Likewise.
10520 (vminq_x_u32): Likewise.
10521 (vmaxq_x_s8): Likewise.
10522 (vmaxq_x_s16): Likewise.
10523 (vmaxq_x_s32): Likewise.
10524 (vmaxq_x_u8): Likewise.
10525 (vmaxq_x_u16): Likewise.
10526 (vmaxq_x_u32): Likewise.
10527 (vabdq_x_s8): Likewise.
10528 (vabdq_x_s16): Likewise.
10529 (vabdq_x_s32): Likewise.
10530 (vabdq_x_u8): Likewise.
10531 (vabdq_x_u16): Likewise.
10532 (vabdq_x_u32): Likewise.
10533 (vabsq_x_s8): Likewise.
10534 (vabsq_x_s16): Likewise.
10535 (vabsq_x_s32): Likewise.
10536 (vaddq_x_s8): Likewise.
10537 (vaddq_x_s16): Likewise.
10538 (vaddq_x_s32): Likewise.
10539 (vaddq_x_n_s8): Likewise.
10540 (vaddq_x_n_s16): Likewise.
10541 (vaddq_x_n_s32): Likewise.
10542 (vaddq_x_u8): Likewise.
10543 (vaddq_x_u16): Likewise.
10544 (vaddq_x_u32): Likewise.
10545 (vaddq_x_n_u8): Likewise.
10546 (vaddq_x_n_u16): Likewise.
10547 (vaddq_x_n_u32): Likewise.
10548 (vclsq_x_s8): Likewise.
10549 (vclsq_x_s16): Likewise.
10550 (vclsq_x_s32): Likewise.
10551 (vclzq_x_s8): Likewise.
10552 (vclzq_x_s16): Likewise.
10553 (vclzq_x_s32): Likewise.
10554 (vclzq_x_u8): Likewise.
10555 (vclzq_x_u16): Likewise.
10556 (vclzq_x_u32): Likewise.
10557 (vnegq_x_s8): Likewise.
10558 (vnegq_x_s16): Likewise.
10559 (vnegq_x_s32): Likewise.
10560 (vmulhq_x_s8): Likewise.
10561 (vmulhq_x_s16): Likewise.
10562 (vmulhq_x_s32): Likewise.
10563 (vmulhq_x_u8): Likewise.
10564 (vmulhq_x_u16): Likewise.
10565 (vmulhq_x_u32): Likewise.
10566 (vmullbq_poly_x_p8): Likewise.
10567 (vmullbq_poly_x_p16): Likewise.
10568 (vmullbq_int_x_s8): Likewise.
10569 (vmullbq_int_x_s16): Likewise.
10570 (vmullbq_int_x_s32): Likewise.
10571 (vmullbq_int_x_u8): Likewise.
10572 (vmullbq_int_x_u16): Likewise.
10573 (vmullbq_int_x_u32): Likewise.
10574 (vmulltq_poly_x_p8): Likewise.
10575 (vmulltq_poly_x_p16): Likewise.
10576 (vmulltq_int_x_s8): Likewise.
10577 (vmulltq_int_x_s16): Likewise.
10578 (vmulltq_int_x_s32): Likewise.
10579 (vmulltq_int_x_u8): Likewise.
10580 (vmulltq_int_x_u16): Likewise.
10581 (vmulltq_int_x_u32): Likewise.
10582 (vmulq_x_s8): Likewise.
10583 (vmulq_x_s16): Likewise.
10584 (vmulq_x_s32): Likewise.
10585 (vmulq_x_n_s8): Likewise.
10586 (vmulq_x_n_s16): Likewise.
10587 (vmulq_x_n_s32): Likewise.
10588 (vmulq_x_u8): Likewise.
10589 (vmulq_x_u16): Likewise.
10590 (vmulq_x_u32): Likewise.
10591 (vmulq_x_n_u8): Likewise.
10592 (vmulq_x_n_u16): Likewise.
10593 (vmulq_x_n_u32): Likewise.
10594 (vsubq_x_s8): Likewise.
10595 (vsubq_x_s16): Likewise.
10596 (vsubq_x_s32): Likewise.
10597 (vsubq_x_n_s8): Likewise.
10598 (vsubq_x_n_s16): Likewise.
10599 (vsubq_x_n_s32): Likewise.
10600 (vsubq_x_u8): Likewise.
10601 (vsubq_x_u16): Likewise.
10602 (vsubq_x_u32): Likewise.
10603 (vsubq_x_n_u8): Likewise.
10604 (vsubq_x_n_u16): Likewise.
10605 (vsubq_x_n_u32): Likewise.
10606 (vcaddq_rot90_x_s8): Likewise.
10607 (vcaddq_rot90_x_s16): Likewise.
10608 (vcaddq_rot90_x_s32): Likewise.
10609 (vcaddq_rot90_x_u8): Likewise.
10610 (vcaddq_rot90_x_u16): Likewise.
10611 (vcaddq_rot90_x_u32): Likewise.
10612 (vcaddq_rot270_x_s8): Likewise.
10613 (vcaddq_rot270_x_s16): Likewise.
10614 (vcaddq_rot270_x_s32): Likewise.
10615 (vcaddq_rot270_x_u8): Likewise.
10616 (vcaddq_rot270_x_u16): Likewise.
10617 (vcaddq_rot270_x_u32): Likewise.
10618 (vhaddq_x_n_s8): Likewise.
10619 (vhaddq_x_n_s16): Likewise.
10620 (vhaddq_x_n_s32): Likewise.
10621 (vhaddq_x_n_u8): Likewise.
10622 (vhaddq_x_n_u16): Likewise.
10623 (vhaddq_x_n_u32): Likewise.
10624 (vhaddq_x_s8): Likewise.
10625 (vhaddq_x_s16): Likewise.
10626 (vhaddq_x_s32): Likewise.
10627 (vhaddq_x_u8): Likewise.
10628 (vhaddq_x_u16): Likewise.
10629 (vhaddq_x_u32): Likewise.
10630 (vhcaddq_rot90_x_s8): Likewise.
10631 (vhcaddq_rot90_x_s16): Likewise.
10632 (vhcaddq_rot90_x_s32): Likewise.
10633 (vhcaddq_rot270_x_s8): Likewise.
10634 (vhcaddq_rot270_x_s16): Likewise.
10635 (vhcaddq_rot270_x_s32): Likewise.
10636 (vhsubq_x_n_s8): Likewise.
10637 (vhsubq_x_n_s16): Likewise.
10638 (vhsubq_x_n_s32): Likewise.
10639 (vhsubq_x_n_u8): Likewise.
10640 (vhsubq_x_n_u16): Likewise.
10641 (vhsubq_x_n_u32): Likewise.
10642 (vhsubq_x_s8): Likewise.
10643 (vhsubq_x_s16): Likewise.
10644 (vhsubq_x_s32): Likewise.
10645 (vhsubq_x_u8): Likewise.
10646 (vhsubq_x_u16): Likewise.
10647 (vhsubq_x_u32): Likewise.
10648 (vrhaddq_x_s8): Likewise.
10649 (vrhaddq_x_s16): Likewise.
10650 (vrhaddq_x_s32): Likewise.
10651 (vrhaddq_x_u8): Likewise.
10652 (vrhaddq_x_u16): Likewise.
10653 (vrhaddq_x_u32): Likewise.
10654 (vrmulhq_x_s8): Likewise.
10655 (vrmulhq_x_s16): Likewise.
10656 (vrmulhq_x_s32): Likewise.
10657 (vrmulhq_x_u8): Likewise.
10658 (vrmulhq_x_u16): Likewise.
10659 (vrmulhq_x_u32): Likewise.
10660 (vandq_x_s8): Likewise.
10661 (vandq_x_s16): Likewise.
10662 (vandq_x_s32): Likewise.
10663 (vandq_x_u8): Likewise.
10664 (vandq_x_u16): Likewise.
10665 (vandq_x_u32): Likewise.
10666 (vbicq_x_s8): Likewise.
10667 (vbicq_x_s16): Likewise.
10668 (vbicq_x_s32): Likewise.
10669 (vbicq_x_u8): Likewise.
10670 (vbicq_x_u16): Likewise.
10671 (vbicq_x_u32): Likewise.
10672 (vbrsrq_x_n_s8): Likewise.
10673 (vbrsrq_x_n_s16): Likewise.
10674 (vbrsrq_x_n_s32): Likewise.
10675 (vbrsrq_x_n_u8): Likewise.
10676 (vbrsrq_x_n_u16): Likewise.
10677 (vbrsrq_x_n_u32): Likewise.
10678 (veorq_x_s8): Likewise.
10679 (veorq_x_s16): Likewise.
10680 (veorq_x_s32): Likewise.
10681 (veorq_x_u8): Likewise.
10682 (veorq_x_u16): Likewise.
10683 (veorq_x_u32): Likewise.
10684 (vmovlbq_x_s8): Likewise.
10685 (vmovlbq_x_s16): Likewise.
10686 (vmovlbq_x_u8): Likewise.
10687 (vmovlbq_x_u16): Likewise.
10688 (vmovltq_x_s8): Likewise.
10689 (vmovltq_x_s16): Likewise.
10690 (vmovltq_x_u8): Likewise.
10691 (vmovltq_x_u16): Likewise.
10692 (vmvnq_x_s8): Likewise.
10693 (vmvnq_x_s16): Likewise.
10694 (vmvnq_x_s32): Likewise.
10695 (vmvnq_x_u8): Likewise.
10696 (vmvnq_x_u16): Likewise.
10697 (vmvnq_x_u32): Likewise.
10698 (vmvnq_x_n_s16): Likewise.
10699 (vmvnq_x_n_s32): Likewise.
10700 (vmvnq_x_n_u16): Likewise.
10701 (vmvnq_x_n_u32): Likewise.
10702 (vornq_x_s8): Likewise.
10703 (vornq_x_s16): Likewise.
10704 (vornq_x_s32): Likewise.
10705 (vornq_x_u8): Likewise.
10706 (vornq_x_u16): Likewise.
10707 (vornq_x_u32): Likewise.
10708 (vorrq_x_s8): Likewise.
10709 (vorrq_x_s16): Likewise.
10710 (vorrq_x_s32): Likewise.
10711 (vorrq_x_u8): Likewise.
10712 (vorrq_x_u16): Likewise.
10713 (vorrq_x_u32): Likewise.
10714 (vrev16q_x_s8): Likewise.
10715 (vrev16q_x_u8): Likewise.
10716 (vrev32q_x_s8): Likewise.
10717 (vrev32q_x_s16): Likewise.
10718 (vrev32q_x_u8): Likewise.
10719 (vrev32q_x_u16): Likewise.
10720 (vrev64q_x_s8): Likewise.
10721 (vrev64q_x_s16): Likewise.
10722 (vrev64q_x_s32): Likewise.
10723 (vrev64q_x_u8): Likewise.
10724 (vrev64q_x_u16): Likewise.
10725 (vrev64q_x_u32): Likewise.
10726 (vrshlq_x_s8): Likewise.
10727 (vrshlq_x_s16): Likewise.
10728 (vrshlq_x_s32): Likewise.
10729 (vrshlq_x_u8): Likewise.
10730 (vrshlq_x_u16): Likewise.
10731 (vrshlq_x_u32): Likewise.
10732 (vshllbq_x_n_s8): Likewise.
10733 (vshllbq_x_n_s16): Likewise.
10734 (vshllbq_x_n_u8): Likewise.
10735 (vshllbq_x_n_u16): Likewise.
10736 (vshlltq_x_n_s8): Likewise.
10737 (vshlltq_x_n_s16): Likewise.
10738 (vshlltq_x_n_u8): Likewise.
10739 (vshlltq_x_n_u16): Likewise.
10740 (vshlq_x_s8): Likewise.
10741 (vshlq_x_s16): Likewise.
10742 (vshlq_x_s32): Likewise.
10743 (vshlq_x_u8): Likewise.
10744 (vshlq_x_u16): Likewise.
10745 (vshlq_x_u32): Likewise.
10746 (vshlq_x_n_s8): Likewise.
10747 (vshlq_x_n_s16): Likewise.
10748 (vshlq_x_n_s32): Likewise.
10749 (vshlq_x_n_u8): Likewise.
10750 (vshlq_x_n_u16): Likewise.
10751 (vshlq_x_n_u32): Likewise.
10752 (vrshrq_x_n_s8): Likewise.
10753 (vrshrq_x_n_s16): Likewise.
10754 (vrshrq_x_n_s32): Likewise.
10755 (vrshrq_x_n_u8): Likewise.
10756 (vrshrq_x_n_u16): Likewise.
10757 (vrshrq_x_n_u32): Likewise.
10758 (vshrq_x_n_s8): Likewise.
10759 (vshrq_x_n_s16): Likewise.
10760 (vshrq_x_n_s32): Likewise.
10761 (vshrq_x_n_u8): Likewise.
10762 (vshrq_x_n_u16): Likewise.
10763 (vshrq_x_n_u32): Likewise.
10764 (vdupq_x_n_f16): Likewise.
10765 (vdupq_x_n_f32): Likewise.
10766 (vminnmq_x_f16): Likewise.
10767 (vminnmq_x_f32): Likewise.
10768 (vmaxnmq_x_f16): Likewise.
10769 (vmaxnmq_x_f32): Likewise.
10770 (vabdq_x_f16): Likewise.
10771 (vabdq_x_f32): Likewise.
10772 (vabsq_x_f16): Likewise.
10773 (vabsq_x_f32): Likewise.
10774 (vaddq_x_f16): Likewise.
10775 (vaddq_x_f32): Likewise.
10776 (vaddq_x_n_f16): Likewise.
10777 (vaddq_x_n_f32): Likewise.
10778 (vnegq_x_f16): Likewise.
10779 (vnegq_x_f32): Likewise.
10780 (vmulq_x_f16): Likewise.
10781 (vmulq_x_f32): Likewise.
10782 (vmulq_x_n_f16): Likewise.
10783 (vmulq_x_n_f32): Likewise.
10784 (vsubq_x_f16): Likewise.
10785 (vsubq_x_f32): Likewise.
10786 (vsubq_x_n_f16): Likewise.
10787 (vsubq_x_n_f32): Likewise.
10788 (vcaddq_rot90_x_f16): Likewise.
10789 (vcaddq_rot90_x_f32): Likewise.
10790 (vcaddq_rot270_x_f16): Likewise.
10791 (vcaddq_rot270_x_f32): Likewise.
10792 (vcmulq_x_f16): Likewise.
10793 (vcmulq_x_f32): Likewise.
10794 (vcmulq_rot90_x_f16): Likewise.
10795 (vcmulq_rot90_x_f32): Likewise.
10796 (vcmulq_rot180_x_f16): Likewise.
10797 (vcmulq_rot180_x_f32): Likewise.
10798 (vcmulq_rot270_x_f16): Likewise.
10799 (vcmulq_rot270_x_f32): Likewise.
10800 (vcvtaq_x_s16_f16): Likewise.
10801 (vcvtaq_x_s32_f32): Likewise.
10802 (vcvtaq_x_u16_f16): Likewise.
10803 (vcvtaq_x_u32_f32): Likewise.
10804 (vcvtnq_x_s16_f16): Likewise.
10805 (vcvtnq_x_s32_f32): Likewise.
10806 (vcvtnq_x_u16_f16): Likewise.
10807 (vcvtnq_x_u32_f32): Likewise.
10808 (vcvtpq_x_s16_f16): Likewise.
10809 (vcvtpq_x_s32_f32): Likewise.
10810 (vcvtpq_x_u16_f16): Likewise.
10811 (vcvtpq_x_u32_f32): Likewise.
10812 (vcvtmq_x_s16_f16): Likewise.
10813 (vcvtmq_x_s32_f32): Likewise.
10814 (vcvtmq_x_u16_f16): Likewise.
10815 (vcvtmq_x_u32_f32): Likewise.
10816 (vcvtbq_x_f32_f16): Likewise.
10817 (vcvttq_x_f32_f16): Likewise.
10818 (vcvtq_x_f16_u16): Likewise.
10819 (vcvtq_x_f16_s16): Likewise.
10820 (vcvtq_x_f32_s32): Likewise.
10821 (vcvtq_x_f32_u32): Likewise.
10822 (vcvtq_x_n_f16_s16): Likewise.
10823 (vcvtq_x_n_f16_u16): Likewise.
10824 (vcvtq_x_n_f32_s32): Likewise.
10825 (vcvtq_x_n_f32_u32): Likewise.
10826 (vcvtq_x_s16_f16): Likewise.
10827 (vcvtq_x_s32_f32): Likewise.
10828 (vcvtq_x_u16_f16): Likewise.
10829 (vcvtq_x_u32_f32): Likewise.
10830 (vcvtq_x_n_s16_f16): Likewise.
10831 (vcvtq_x_n_s32_f32): Likewise.
10832 (vcvtq_x_n_u16_f16): Likewise.
10833 (vcvtq_x_n_u32_f32): Likewise.
10834 (vrndq_x_f16): Likewise.
10835 (vrndq_x_f32): Likewise.
10836 (vrndnq_x_f16): Likewise.
10837 (vrndnq_x_f32): Likewise.
10838 (vrndmq_x_f16): Likewise.
10839 (vrndmq_x_f32): Likewise.
10840 (vrndpq_x_f16): Likewise.
10841 (vrndpq_x_f32): Likewise.
10842 (vrndaq_x_f16): Likewise.
10843 (vrndaq_x_f32): Likewise.
10844 (vrndxq_x_f16): Likewise.
10845 (vrndxq_x_f32): Likewise.
10846 (vandq_x_f16): Likewise.
10847 (vandq_x_f32): Likewise.
10848 (vbicq_x_f16): Likewise.
10849 (vbicq_x_f32): Likewise.
10850 (vbrsrq_x_n_f16): Likewise.
10851 (vbrsrq_x_n_f32): Likewise.
10852 (veorq_x_f16): Likewise.
10853 (veorq_x_f32): Likewise.
10854 (vornq_x_f16): Likewise.
10855 (vornq_x_f32): Likewise.
10856 (vorrq_x_f16): Likewise.
10857 (vorrq_x_f32): Likewise.
10858 (vrev32q_x_f16): Likewise.
10859 (vrev64q_x_f16): Likewise.
10860 (vrev64q_x_f32): Likewise.
10861 (__arm_vddupq_x_n_u8): Define intrinsic.
10862 (__arm_vddupq_x_n_u16): Likewise.
10863 (__arm_vddupq_x_n_u32): Likewise.
10864 (__arm_vddupq_x_wb_u8): Likewise.
10865 (__arm_vddupq_x_wb_u16): Likewise.
10866 (__arm_vddupq_x_wb_u32): Likewise.
10867 (__arm_vdwdupq_x_n_u8): Likewise.
10868 (__arm_vdwdupq_x_n_u16): Likewise.
10869 (__arm_vdwdupq_x_n_u32): Likewise.
10870 (__arm_vdwdupq_x_wb_u8): Likewise.
10871 (__arm_vdwdupq_x_wb_u16): Likewise.
10872 (__arm_vdwdupq_x_wb_u32): Likewise.
10873 (__arm_vidupq_x_n_u8): Likewise.
10874 (__arm_vidupq_x_n_u16): Likewise.
10875 (__arm_vidupq_x_n_u32): Likewise.
10876 (__arm_vidupq_x_wb_u8): Likewise.
10877 (__arm_vidupq_x_wb_u16): Likewise.
10878 (__arm_vidupq_x_wb_u32): Likewise.
10879 (__arm_viwdupq_x_n_u8): Likewise.
10880 (__arm_viwdupq_x_n_u16): Likewise.
10881 (__arm_viwdupq_x_n_u32): Likewise.
10882 (__arm_viwdupq_x_wb_u8): Likewise.
10883 (__arm_viwdupq_x_wb_u16): Likewise.
10884 (__arm_viwdupq_x_wb_u32): Likewise.
10885 (__arm_vdupq_x_n_s8): Likewise.
10886 (__arm_vdupq_x_n_s16): Likewise.
10887 (__arm_vdupq_x_n_s32): Likewise.
10888 (__arm_vdupq_x_n_u8): Likewise.
10889 (__arm_vdupq_x_n_u16): Likewise.
10890 (__arm_vdupq_x_n_u32): Likewise.
10891 (__arm_vminq_x_s8): Likewise.
10892 (__arm_vminq_x_s16): Likewise.
10893 (__arm_vminq_x_s32): Likewise.
10894 (__arm_vminq_x_u8): Likewise.
10895 (__arm_vminq_x_u16): Likewise.
10896 (__arm_vminq_x_u32): Likewise.
10897 (__arm_vmaxq_x_s8): Likewise.
10898 (__arm_vmaxq_x_s16): Likewise.
10899 (__arm_vmaxq_x_s32): Likewise.
10900 (__arm_vmaxq_x_u8): Likewise.
10901 (__arm_vmaxq_x_u16): Likewise.
10902 (__arm_vmaxq_x_u32): Likewise.
10903 (__arm_vabdq_x_s8): Likewise.
10904 (__arm_vabdq_x_s16): Likewise.
10905 (__arm_vabdq_x_s32): Likewise.
10906 (__arm_vabdq_x_u8): Likewise.
10907 (__arm_vabdq_x_u16): Likewise.
10908 (__arm_vabdq_x_u32): Likewise.
10909 (__arm_vabsq_x_s8): Likewise.
10910 (__arm_vabsq_x_s16): Likewise.
10911 (__arm_vabsq_x_s32): Likewise.
10912 (__arm_vaddq_x_s8): Likewise.
10913 (__arm_vaddq_x_s16): Likewise.
10914 (__arm_vaddq_x_s32): Likewise.
10915 (__arm_vaddq_x_n_s8): Likewise.
10916 (__arm_vaddq_x_n_s16): Likewise.
10917 (__arm_vaddq_x_n_s32): Likewise.
10918 (__arm_vaddq_x_u8): Likewise.
10919 (__arm_vaddq_x_u16): Likewise.
10920 (__arm_vaddq_x_u32): Likewise.
10921 (__arm_vaddq_x_n_u8): Likewise.
10922 (__arm_vaddq_x_n_u16): Likewise.
10923 (__arm_vaddq_x_n_u32): Likewise.
10924 (__arm_vclsq_x_s8): Likewise.
10925 (__arm_vclsq_x_s16): Likewise.
10926 (__arm_vclsq_x_s32): Likewise.
10927 (__arm_vclzq_x_s8): Likewise.
10928 (__arm_vclzq_x_s16): Likewise.
10929 (__arm_vclzq_x_s32): Likewise.
10930 (__arm_vclzq_x_u8): Likewise.
10931 (__arm_vclzq_x_u16): Likewise.
10932 (__arm_vclzq_x_u32): Likewise.
10933 (__arm_vnegq_x_s8): Likewise.
10934 (__arm_vnegq_x_s16): Likewise.
10935 (__arm_vnegq_x_s32): Likewise.
10936 (__arm_vmulhq_x_s8): Likewise.
10937 (__arm_vmulhq_x_s16): Likewise.
10938 (__arm_vmulhq_x_s32): Likewise.
10939 (__arm_vmulhq_x_u8): Likewise.
10940 (__arm_vmulhq_x_u16): Likewise.
10941 (__arm_vmulhq_x_u32): Likewise.
10942 (__arm_vmullbq_poly_x_p8): Likewise.
10943 (__arm_vmullbq_poly_x_p16): Likewise.
10944 (__arm_vmullbq_int_x_s8): Likewise.
10945 (__arm_vmullbq_int_x_s16): Likewise.
10946 (__arm_vmullbq_int_x_s32): Likewise.
10947 (__arm_vmullbq_int_x_u8): Likewise.
10948 (__arm_vmullbq_int_x_u16): Likewise.
10949 (__arm_vmullbq_int_x_u32): Likewise.
10950 (__arm_vmulltq_poly_x_p8): Likewise.
10951 (__arm_vmulltq_poly_x_p16): Likewise.
10952 (__arm_vmulltq_int_x_s8): Likewise.
10953 (__arm_vmulltq_int_x_s16): Likewise.
10954 (__arm_vmulltq_int_x_s32): Likewise.
10955 (__arm_vmulltq_int_x_u8): Likewise.
10956 (__arm_vmulltq_int_x_u16): Likewise.
10957 (__arm_vmulltq_int_x_u32): Likewise.
10958 (__arm_vmulq_x_s8): Likewise.
10959 (__arm_vmulq_x_s16): Likewise.
10960 (__arm_vmulq_x_s32): Likewise.
10961 (__arm_vmulq_x_n_s8): Likewise.
10962 (__arm_vmulq_x_n_s16): Likewise.
10963 (__arm_vmulq_x_n_s32): Likewise.
10964 (__arm_vmulq_x_u8): Likewise.
10965 (__arm_vmulq_x_u16): Likewise.
10966 (__arm_vmulq_x_u32): Likewise.
10967 (__arm_vmulq_x_n_u8): Likewise.
10968 (__arm_vmulq_x_n_u16): Likewise.
10969 (__arm_vmulq_x_n_u32): Likewise.
10970 (__arm_vsubq_x_s8): Likewise.
10971 (__arm_vsubq_x_s16): Likewise.
10972 (__arm_vsubq_x_s32): Likewise.
10973 (__arm_vsubq_x_n_s8): Likewise.
10974 (__arm_vsubq_x_n_s16): Likewise.
10975 (__arm_vsubq_x_n_s32): Likewise.
10976 (__arm_vsubq_x_u8): Likewise.
10977 (__arm_vsubq_x_u16): Likewise.
10978 (__arm_vsubq_x_u32): Likewise.
10979 (__arm_vsubq_x_n_u8): Likewise.
10980 (__arm_vsubq_x_n_u16): Likewise.
10981 (__arm_vsubq_x_n_u32): Likewise.
10982 (__arm_vcaddq_rot90_x_s8): Likewise.
10983 (__arm_vcaddq_rot90_x_s16): Likewise.
10984 (__arm_vcaddq_rot90_x_s32): Likewise.
10985 (__arm_vcaddq_rot90_x_u8): Likewise.
10986 (__arm_vcaddq_rot90_x_u16): Likewise.
10987 (__arm_vcaddq_rot90_x_u32): Likewise.
10988 (__arm_vcaddq_rot270_x_s8): Likewise.
10989 (__arm_vcaddq_rot270_x_s16): Likewise.
10990 (__arm_vcaddq_rot270_x_s32): Likewise.
10991 (__arm_vcaddq_rot270_x_u8): Likewise.
10992 (__arm_vcaddq_rot270_x_u16): Likewise.
10993 (__arm_vcaddq_rot270_x_u32): Likewise.
10994 (__arm_vhaddq_x_n_s8): Likewise.
10995 (__arm_vhaddq_x_n_s16): Likewise.
10996 (__arm_vhaddq_x_n_s32): Likewise.
10997 (__arm_vhaddq_x_n_u8): Likewise.
10998 (__arm_vhaddq_x_n_u16): Likewise.
10999 (__arm_vhaddq_x_n_u32): Likewise.
11000 (__arm_vhaddq_x_s8): Likewise.
11001 (__arm_vhaddq_x_s16): Likewise.
11002 (__arm_vhaddq_x_s32): Likewise.
11003 (__arm_vhaddq_x_u8): Likewise.
11004 (__arm_vhaddq_x_u16): Likewise.
11005 (__arm_vhaddq_x_u32): Likewise.
11006 (__arm_vhcaddq_rot90_x_s8): Likewise.
11007 (__arm_vhcaddq_rot90_x_s16): Likewise.
11008 (__arm_vhcaddq_rot90_x_s32): Likewise.
11009 (__arm_vhcaddq_rot270_x_s8): Likewise.
11010 (__arm_vhcaddq_rot270_x_s16): Likewise.
11011 (__arm_vhcaddq_rot270_x_s32): Likewise.
11012 (__arm_vhsubq_x_n_s8): Likewise.
11013 (__arm_vhsubq_x_n_s16): Likewise.
11014 (__arm_vhsubq_x_n_s32): Likewise.
11015 (__arm_vhsubq_x_n_u8): Likewise.
11016 (__arm_vhsubq_x_n_u16): Likewise.
11017 (__arm_vhsubq_x_n_u32): Likewise.
11018 (__arm_vhsubq_x_s8): Likewise.
11019 (__arm_vhsubq_x_s16): Likewise.
11020 (__arm_vhsubq_x_s32): Likewise.
11021 (__arm_vhsubq_x_u8): Likewise.
11022 (__arm_vhsubq_x_u16): Likewise.
11023 (__arm_vhsubq_x_u32): Likewise.
11024 (__arm_vrhaddq_x_s8): Likewise.
11025 (__arm_vrhaddq_x_s16): Likewise.
11026 (__arm_vrhaddq_x_s32): Likewise.
11027 (__arm_vrhaddq_x_u8): Likewise.
11028 (__arm_vrhaddq_x_u16): Likewise.
11029 (__arm_vrhaddq_x_u32): Likewise.
11030 (__arm_vrmulhq_x_s8): Likewise.
11031 (__arm_vrmulhq_x_s16): Likewise.
11032 (__arm_vrmulhq_x_s32): Likewise.
11033 (__arm_vrmulhq_x_u8): Likewise.
11034 (__arm_vrmulhq_x_u16): Likewise.
11035 (__arm_vrmulhq_x_u32): Likewise.
11036 (__arm_vandq_x_s8): Likewise.
11037 (__arm_vandq_x_s16): Likewise.
11038 (__arm_vandq_x_s32): Likewise.
11039 (__arm_vandq_x_u8): Likewise.
11040 (__arm_vandq_x_u16): Likewise.
11041 (__arm_vandq_x_u32): Likewise.
11042 (__arm_vbicq_x_s8): Likewise.
11043 (__arm_vbicq_x_s16): Likewise.
11044 (__arm_vbicq_x_s32): Likewise.
11045 (__arm_vbicq_x_u8): Likewise.
11046 (__arm_vbicq_x_u16): Likewise.
11047 (__arm_vbicq_x_u32): Likewise.
11048 (__arm_vbrsrq_x_n_s8): Likewise.
11049 (__arm_vbrsrq_x_n_s16): Likewise.
11050 (__arm_vbrsrq_x_n_s32): Likewise.
11051 (__arm_vbrsrq_x_n_u8): Likewise.
11052 (__arm_vbrsrq_x_n_u16): Likewise.
11053 (__arm_vbrsrq_x_n_u32): Likewise.
11054 (__arm_veorq_x_s8): Likewise.
11055 (__arm_veorq_x_s16): Likewise.
11056 (__arm_veorq_x_s32): Likewise.
11057 (__arm_veorq_x_u8): Likewise.
11058 (__arm_veorq_x_u16): Likewise.
11059 (__arm_veorq_x_u32): Likewise.
11060 (__arm_vmovlbq_x_s8): Likewise.
11061 (__arm_vmovlbq_x_s16): Likewise.
11062 (__arm_vmovlbq_x_u8): Likewise.
11063 (__arm_vmovlbq_x_u16): Likewise.
11064 (__arm_vmovltq_x_s8): Likewise.
11065 (__arm_vmovltq_x_s16): Likewise.
11066 (__arm_vmovltq_x_u8): Likewise.
11067 (__arm_vmovltq_x_u16): Likewise.
11068 (__arm_vmvnq_x_s8): Likewise.
11069 (__arm_vmvnq_x_s16): Likewise.
11070 (__arm_vmvnq_x_s32): Likewise.
11071 (__arm_vmvnq_x_u8): Likewise.
11072 (__arm_vmvnq_x_u16): Likewise.
11073 (__arm_vmvnq_x_u32): Likewise.
11074 (__arm_vmvnq_x_n_s16): Likewise.
11075 (__arm_vmvnq_x_n_s32): Likewise.
11076 (__arm_vmvnq_x_n_u16): Likewise.
11077 (__arm_vmvnq_x_n_u32): Likewise.
11078 (__arm_vornq_x_s8): Likewise.
11079 (__arm_vornq_x_s16): Likewise.
11080 (__arm_vornq_x_s32): Likewise.
11081 (__arm_vornq_x_u8): Likewise.
11082 (__arm_vornq_x_u16): Likewise.
11083 (__arm_vornq_x_u32): Likewise.
11084 (__arm_vorrq_x_s8): Likewise.
11085 (__arm_vorrq_x_s16): Likewise.
11086 (__arm_vorrq_x_s32): Likewise.
11087 (__arm_vorrq_x_u8): Likewise.
11088 (__arm_vorrq_x_u16): Likewise.
11089 (__arm_vorrq_x_u32): Likewise.
11090 (__arm_vrev16q_x_s8): Likewise.
11091 (__arm_vrev16q_x_u8): Likewise.
11092 (__arm_vrev32q_x_s8): Likewise.
11093 (__arm_vrev32q_x_s16): Likewise.
11094 (__arm_vrev32q_x_u8): Likewise.
11095 (__arm_vrev32q_x_u16): Likewise.
11096 (__arm_vrev64q_x_s8): Likewise.
11097 (__arm_vrev64q_x_s16): Likewise.
11098 (__arm_vrev64q_x_s32): Likewise.
11099 (__arm_vrev64q_x_u8): Likewise.
11100 (__arm_vrev64q_x_u16): Likewise.
11101 (__arm_vrev64q_x_u32): Likewise.
11102 (__arm_vrshlq_x_s8): Likewise.
11103 (__arm_vrshlq_x_s16): Likewise.
11104 (__arm_vrshlq_x_s32): Likewise.
11105 (__arm_vrshlq_x_u8): Likewise.
11106 (__arm_vrshlq_x_u16): Likewise.
11107 (__arm_vrshlq_x_u32): Likewise.
11108 (__arm_vshllbq_x_n_s8): Likewise.
11109 (__arm_vshllbq_x_n_s16): Likewise.
11110 (__arm_vshllbq_x_n_u8): Likewise.
11111 (__arm_vshllbq_x_n_u16): Likewise.
11112 (__arm_vshlltq_x_n_s8): Likewise.
11113 (__arm_vshlltq_x_n_s16): Likewise.
11114 (__arm_vshlltq_x_n_u8): Likewise.
11115 (__arm_vshlltq_x_n_u16): Likewise.
11116 (__arm_vshlq_x_s8): Likewise.
11117 (__arm_vshlq_x_s16): Likewise.
11118 (__arm_vshlq_x_s32): Likewise.
11119 (__arm_vshlq_x_u8): Likewise.
11120 (__arm_vshlq_x_u16): Likewise.
11121 (__arm_vshlq_x_u32): Likewise.
11122 (__arm_vshlq_x_n_s8): Likewise.
11123 (__arm_vshlq_x_n_s16): Likewise.
11124 (__arm_vshlq_x_n_s32): Likewise.
11125 (__arm_vshlq_x_n_u8): Likewise.
11126 (__arm_vshlq_x_n_u16): Likewise.
11127 (__arm_vshlq_x_n_u32): Likewise.
11128 (__arm_vrshrq_x_n_s8): Likewise.
11129 (__arm_vrshrq_x_n_s16): Likewise.
11130 (__arm_vrshrq_x_n_s32): Likewise.
11131 (__arm_vrshrq_x_n_u8): Likewise.
11132 (__arm_vrshrq_x_n_u16): Likewise.
11133 (__arm_vrshrq_x_n_u32): Likewise.
11134 (__arm_vshrq_x_n_s8): Likewise.
11135 (__arm_vshrq_x_n_s16): Likewise.
11136 (__arm_vshrq_x_n_s32): Likewise.
11137 (__arm_vshrq_x_n_u8): Likewise.
11138 (__arm_vshrq_x_n_u16): Likewise.
11139 (__arm_vshrq_x_n_u32): Likewise.
11140 (__arm_vdupq_x_n_f16): Likewise.
11141 (__arm_vdupq_x_n_f32): Likewise.
11142 (__arm_vminnmq_x_f16): Likewise.
11143 (__arm_vminnmq_x_f32): Likewise.
11144 (__arm_vmaxnmq_x_f16): Likewise.
11145 (__arm_vmaxnmq_x_f32): Likewise.
11146 (__arm_vabdq_x_f16): Likewise.
11147 (__arm_vabdq_x_f32): Likewise.
11148 (__arm_vabsq_x_f16): Likewise.
11149 (__arm_vabsq_x_f32): Likewise.
11150 (__arm_vaddq_x_f16): Likewise.
11151 (__arm_vaddq_x_f32): Likewise.
11152 (__arm_vaddq_x_n_f16): Likewise.
11153 (__arm_vaddq_x_n_f32): Likewise.
11154 (__arm_vnegq_x_f16): Likewise.
11155 (__arm_vnegq_x_f32): Likewise.
11156 (__arm_vmulq_x_f16): Likewise.
11157 (__arm_vmulq_x_f32): Likewise.
11158 (__arm_vmulq_x_n_f16): Likewise.
11159 (__arm_vmulq_x_n_f32): Likewise.
11160 (__arm_vsubq_x_f16): Likewise.
11161 (__arm_vsubq_x_f32): Likewise.
11162 (__arm_vsubq_x_n_f16): Likewise.
11163 (__arm_vsubq_x_n_f32): Likewise.
11164 (__arm_vcaddq_rot90_x_f16): Likewise.
11165 (__arm_vcaddq_rot90_x_f32): Likewise.
11166 (__arm_vcaddq_rot270_x_f16): Likewise.
11167 (__arm_vcaddq_rot270_x_f32): Likewise.
11168 (__arm_vcmulq_x_f16): Likewise.
11169 (__arm_vcmulq_x_f32): Likewise.
11170 (__arm_vcmulq_rot90_x_f16): Likewise.
11171 (__arm_vcmulq_rot90_x_f32): Likewise.
11172 (__arm_vcmulq_rot180_x_f16): Likewise.
11173 (__arm_vcmulq_rot180_x_f32): Likewise.
11174 (__arm_vcmulq_rot270_x_f16): Likewise.
11175 (__arm_vcmulq_rot270_x_f32): Likewise.
11176 (__arm_vcvtaq_x_s16_f16): Likewise.
11177 (__arm_vcvtaq_x_s32_f32): Likewise.
11178 (__arm_vcvtaq_x_u16_f16): Likewise.
11179 (__arm_vcvtaq_x_u32_f32): Likewise.
11180 (__arm_vcvtnq_x_s16_f16): Likewise.
11181 (__arm_vcvtnq_x_s32_f32): Likewise.
11182 (__arm_vcvtnq_x_u16_f16): Likewise.
11183 (__arm_vcvtnq_x_u32_f32): Likewise.
11184 (__arm_vcvtpq_x_s16_f16): Likewise.
11185 (__arm_vcvtpq_x_s32_f32): Likewise.
11186 (__arm_vcvtpq_x_u16_f16): Likewise.
11187 (__arm_vcvtpq_x_u32_f32): Likewise.
11188 (__arm_vcvtmq_x_s16_f16): Likewise.
11189 (__arm_vcvtmq_x_s32_f32): Likewise.
11190 (__arm_vcvtmq_x_u16_f16): Likewise.
11191 (__arm_vcvtmq_x_u32_f32): Likewise.
11192 (__arm_vcvtbq_x_f32_f16): Likewise.
11193 (__arm_vcvttq_x_f32_f16): Likewise.
11194 (__arm_vcvtq_x_f16_u16): Likewise.
11195 (__arm_vcvtq_x_f16_s16): Likewise.
11196 (__arm_vcvtq_x_f32_s32): Likewise.
11197 (__arm_vcvtq_x_f32_u32): Likewise.
11198 (__arm_vcvtq_x_n_f16_s16): Likewise.
11199 (__arm_vcvtq_x_n_f16_u16): Likewise.
11200 (__arm_vcvtq_x_n_f32_s32): Likewise.
11201 (__arm_vcvtq_x_n_f32_u32): Likewise.
11202 (__arm_vcvtq_x_s16_f16): Likewise.
11203 (__arm_vcvtq_x_s32_f32): Likewise.
11204 (__arm_vcvtq_x_u16_f16): Likewise.
11205 (__arm_vcvtq_x_u32_f32): Likewise.
11206 (__arm_vcvtq_x_n_s16_f16): Likewise.
11207 (__arm_vcvtq_x_n_s32_f32): Likewise.
11208 (__arm_vcvtq_x_n_u16_f16): Likewise.
11209 (__arm_vcvtq_x_n_u32_f32): Likewise.
11210 (__arm_vrndq_x_f16): Likewise.
11211 (__arm_vrndq_x_f32): Likewise.
11212 (__arm_vrndnq_x_f16): Likewise.
11213 (__arm_vrndnq_x_f32): Likewise.
11214 (__arm_vrndmq_x_f16): Likewise.
11215 (__arm_vrndmq_x_f32): Likewise.
11216 (__arm_vrndpq_x_f16): Likewise.
11217 (__arm_vrndpq_x_f32): Likewise.
11218 (__arm_vrndaq_x_f16): Likewise.
11219 (__arm_vrndaq_x_f32): Likewise.
11220 (__arm_vrndxq_x_f16): Likewise.
11221 (__arm_vrndxq_x_f32): Likewise.
11222 (__arm_vandq_x_f16): Likewise.
11223 (__arm_vandq_x_f32): Likewise.
11224 (__arm_vbicq_x_f16): Likewise.
11225 (__arm_vbicq_x_f32): Likewise.
11226 (__arm_vbrsrq_x_n_f16): Likewise.
11227 (__arm_vbrsrq_x_n_f32): Likewise.
11228 (__arm_veorq_x_f16): Likewise.
11229 (__arm_veorq_x_f32): Likewise.
11230 (__arm_vornq_x_f16): Likewise.
11231 (__arm_vornq_x_f32): Likewise.
11232 (__arm_vorrq_x_f16): Likewise.
11233 (__arm_vorrq_x_f32): Likewise.
11234 (__arm_vrev32q_x_f16): Likewise.
11235 (__arm_vrev64q_x_f16): Likewise.
11236 (__arm_vrev64q_x_f32): Likewise.
11237 (vabdq_x): Define polymorphic variant.
11238 (vabsq_x): Likewise.
11239 (vaddq_x): Likewise.
11240 (vandq_x): Likewise.
11241 (vbicq_x): Likewise.
11242 (vbrsrq_x): Likewise.
11243 (vcaddq_rot270_x): Likewise.
11244 (vcaddq_rot90_x): Likewise.
11245 (vcmulq_rot180_x): Likewise.
11246 (vcmulq_rot270_x): Likewise.
11247 (vcmulq_x): Likewise.
11248 (vcvtq_x): Likewise.
11249 (vcvtq_x_n): Likewise.
11250 (vcvtnq_m): Likewise.
11251 (veorq_x): Likewise.
11252 (vmaxnmq_x): Likewise.
11253 (vminnmq_x): Likewise.
11254 (vmulq_x): Likewise.
11255 (vnegq_x): Likewise.
11256 (vornq_x): Likewise.
11257 (vorrq_x): Likewise.
11258 (vrev32q_x): Likewise.
11259 (vrev64q_x): Likewise.
11260 (vrndaq_x): Likewise.
11261 (vrndmq_x): Likewise.
11262 (vrndnq_x): Likewise.
11263 (vrndpq_x): Likewise.
11264 (vrndq_x): Likewise.
11265 (vrndxq_x): Likewise.
11266 (vsubq_x): Likewise.
11267 (vcmulq_rot90_x): Likewise.
11268 (vadciq): Likewise.
11269 (vclsq_x): Likewise.
11270 (vclzq_x): Likewise.
11271 (vhaddq_x): Likewise.
11272 (vhcaddq_rot270_x): Likewise.
11273 (vhcaddq_rot90_x): Likewise.
11274 (vhsubq_x): Likewise.
11275 (vmaxq_x): Likewise.
11276 (vminq_x): Likewise.
11277 (vmovlbq_x): Likewise.
11278 (vmovltq_x): Likewise.
11279 (vmulhq_x): Likewise.
11280 (vmullbq_int_x): Likewise.
11281 (vmullbq_poly_x): Likewise.
11282 (vmulltq_int_x): Likewise.
11283 (vmulltq_poly_x): Likewise.
11284 (vmvnq_x): Likewise.
11285 (vrev16q_x): Likewise.
11286 (vrhaddq_x): Likewise.
11287 (vrmulhq_x): Likewise.
11288 (vrshlq_x): Likewise.
11289 (vrshrq_x): Likewise.
11290 (vshllbq_x): Likewise.
11291 (vshlltq_x): Likewise.
11292 (vshlq_x_n): Likewise.
11293 (vshlq_x): Likewise.
11294 (vdwdupq_x_u8): Likewise.
11295 (vdwdupq_x_u16): Likewise.
11296 (vdwdupq_x_u32): Likewise.
11297 (viwdupq_x_u8): Likewise.
11298 (viwdupq_x_u16): Likewise.
11299 (viwdupq_x_u32): Likewise.
11300 (vidupq_x_u8): Likewise.
11301 (vddupq_x_u8): Likewise.
11302 (vidupq_x_u16): Likewise.
11303 (vddupq_x_u16): Likewise.
11304 (vidupq_x_u32): Likewise.
11305 (vddupq_x_u32): Likewise.
11306 (vshrq_x): Likewise.
11308 2020-03-20 Richard Biener <rguenther@suse.de>
11310 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
11311 to vectorize for CTOR defs.
11313 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11314 Andre Vieira <andre.simoesdiasvieira@arm.com>
11315 Mihail Ionescu <mihail.ionescu@arm.com>
11317 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
11319 (LDRGBWBU_QUALIFIERS): Likewise.
11320 (LDRGBWBS_Z_QUALIFIERS): Likewise.
11321 (LDRGBWBU_Z_QUALIFIERS): Likewise.
11322 (STRSBWBS_QUALIFIERS): Likewise.
11323 (STRSBWBU_QUALIFIERS): Likewise.
11324 (STRSBWBS_P_QUALIFIERS): Likewise.
11325 (STRSBWBU_P_QUALIFIERS): Likewise.
11326 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
11327 (vldrdq_gather_base_wb_u64): Likewise.
11328 (vldrdq_gather_base_wb_z_s64): Likewise.
11329 (vldrdq_gather_base_wb_z_u64): Likewise.
11330 (vldrwq_gather_base_wb_f32): Likewise.
11331 (vldrwq_gather_base_wb_s32): Likewise.
11332 (vldrwq_gather_base_wb_u32): Likewise.
11333 (vldrwq_gather_base_wb_z_f32): Likewise.
11334 (vldrwq_gather_base_wb_z_s32): Likewise.
11335 (vldrwq_gather_base_wb_z_u32): Likewise.
11336 (vstrdq_scatter_base_wb_p_s64): Likewise.
11337 (vstrdq_scatter_base_wb_p_u64): Likewise.
11338 (vstrdq_scatter_base_wb_s64): Likewise.
11339 (vstrdq_scatter_base_wb_u64): Likewise.
11340 (vstrwq_scatter_base_wb_p_s32): Likewise.
11341 (vstrwq_scatter_base_wb_p_f32): Likewise.
11342 (vstrwq_scatter_base_wb_p_u32): Likewise.
11343 (vstrwq_scatter_base_wb_s32): Likewise.
11344 (vstrwq_scatter_base_wb_u32): Likewise.
11345 (vstrwq_scatter_base_wb_f32): Likewise.
11346 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
11347 (__arm_vldrdq_gather_base_wb_u64): Likewise.
11348 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
11349 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
11350 (__arm_vldrwq_gather_base_wb_s32): Likewise.
11351 (__arm_vldrwq_gather_base_wb_u32): Likewise.
11352 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
11353 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
11354 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
11355 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
11356 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
11357 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
11358 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
11359 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
11360 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
11361 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
11362 (__arm_vldrwq_gather_base_wb_f32): Likewise.
11363 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
11364 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
11365 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
11366 (vstrwq_scatter_base_wb): Define polymorphic variant.
11367 (vstrwq_scatter_base_wb_p): Likewise.
11368 (vstrdq_scatter_base_wb_p): Likewise.
11369 (vstrdq_scatter_base_wb): Likewise.
11370 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
11372 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
11374 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
11375 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
11376 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
11377 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
11378 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
11379 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
11380 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
11381 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
11382 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
11383 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
11384 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
11385 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
11386 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
11387 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
11388 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
11389 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
11390 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
11391 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
11392 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
11393 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
11394 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
11395 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
11396 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
11397 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
11398 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
11399 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
11400 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
11401 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
11402 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
11404 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11405 Andre Vieira <andre.simoesdiasvieira@arm.com>
11406 Mihail Ionescu <mihail.ionescu@arm.com>
11408 * config/arm/arm-builtins.c
11409 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
11411 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
11412 (vddupq_m_n_u32): Likewise.
11413 (vddupq_m_n_u16): Likewise.
11414 (vddupq_m_wb_u8): Likewise.
11415 (vddupq_m_wb_u16): Likewise.
11416 (vddupq_m_wb_u32): Likewise.
11417 (vddupq_n_u8): Likewise.
11418 (vddupq_n_u32): Likewise.
11419 (vddupq_n_u16): Likewise.
11420 (vddupq_wb_u8): Likewise.
11421 (vddupq_wb_u16): Likewise.
11422 (vddupq_wb_u32): Likewise.
11423 (vdwdupq_m_n_u8): Likewise.
11424 (vdwdupq_m_n_u32): Likewise.
11425 (vdwdupq_m_n_u16): Likewise.
11426 (vdwdupq_m_wb_u8): Likewise.
11427 (vdwdupq_m_wb_u32): Likewise.
11428 (vdwdupq_m_wb_u16): Likewise.
11429 (vdwdupq_n_u8): Likewise.
11430 (vdwdupq_n_u32): Likewise.
11431 (vdwdupq_n_u16): Likewise.
11432 (vdwdupq_wb_u8): Likewise.
11433 (vdwdupq_wb_u32): Likewise.
11434 (vdwdupq_wb_u16): Likewise.
11435 (vidupq_m_n_u8): Likewise.
11436 (vidupq_m_n_u32): Likewise.
11437 (vidupq_m_n_u16): Likewise.
11438 (vidupq_m_wb_u8): Likewise.
11439 (vidupq_m_wb_u16): Likewise.
11440 (vidupq_m_wb_u32): Likewise.
11441 (vidupq_n_u8): Likewise.
11442 (vidupq_n_u32): Likewise.
11443 (vidupq_n_u16): Likewise.
11444 (vidupq_wb_u8): Likewise.
11445 (vidupq_wb_u16): Likewise.
11446 (vidupq_wb_u32): Likewise.
11447 (viwdupq_m_n_u8): Likewise.
11448 (viwdupq_m_n_u32): Likewise.
11449 (viwdupq_m_n_u16): Likewise.
11450 (viwdupq_m_wb_u8): Likewise.
11451 (viwdupq_m_wb_u32): Likewise.
11452 (viwdupq_m_wb_u16): Likewise.
11453 (viwdupq_n_u8): Likewise.
11454 (viwdupq_n_u32): Likewise.
11455 (viwdupq_n_u16): Likewise.
11456 (viwdupq_wb_u8): Likewise.
11457 (viwdupq_wb_u32): Likewise.
11458 (viwdupq_wb_u16): Likewise.
11459 (__arm_vddupq_m_n_u8): Define intrinsic.
11460 (__arm_vddupq_m_n_u32): Likewise.
11461 (__arm_vddupq_m_n_u16): Likewise.
11462 (__arm_vddupq_m_wb_u8): Likewise.
11463 (__arm_vddupq_m_wb_u16): Likewise.
11464 (__arm_vddupq_m_wb_u32): Likewise.
11465 (__arm_vddupq_n_u8): Likewise.
11466 (__arm_vddupq_n_u32): Likewise.
11467 (__arm_vddupq_n_u16): Likewise.
11468 (__arm_vdwdupq_m_n_u8): Likewise.
11469 (__arm_vdwdupq_m_n_u32): Likewise.
11470 (__arm_vdwdupq_m_n_u16): Likewise.
11471 (__arm_vdwdupq_m_wb_u8): Likewise.
11472 (__arm_vdwdupq_m_wb_u32): Likewise.
11473 (__arm_vdwdupq_m_wb_u16): Likewise.
11474 (__arm_vdwdupq_n_u8): Likewise.
11475 (__arm_vdwdupq_n_u32): Likewise.
11476 (__arm_vdwdupq_n_u16): Likewise.
11477 (__arm_vdwdupq_wb_u8): Likewise.
11478 (__arm_vdwdupq_wb_u32): Likewise.
11479 (__arm_vdwdupq_wb_u16): Likewise.
11480 (__arm_vidupq_m_n_u8): Likewise.
11481 (__arm_vidupq_m_n_u32): Likewise.
11482 (__arm_vidupq_m_n_u16): Likewise.
11483 (__arm_vidupq_n_u8): Likewise.
11484 (__arm_vidupq_m_wb_u8): Likewise.
11485 (__arm_vidupq_m_wb_u16): Likewise.
11486 (__arm_vidupq_m_wb_u32): Likewise.
11487 (__arm_vidupq_n_u32): Likewise.
11488 (__arm_vidupq_n_u16): Likewise.
11489 (__arm_vidupq_wb_u8): Likewise.
11490 (__arm_vidupq_wb_u16): Likewise.
11491 (__arm_vidupq_wb_u32): Likewise.
11492 (__arm_vddupq_wb_u8): Likewise.
11493 (__arm_vddupq_wb_u16): Likewise.
11494 (__arm_vddupq_wb_u32): Likewise.
11495 (__arm_viwdupq_m_n_u8): Likewise.
11496 (__arm_viwdupq_m_n_u32): Likewise.
11497 (__arm_viwdupq_m_n_u16): Likewise.
11498 (__arm_viwdupq_m_wb_u8): Likewise.
11499 (__arm_viwdupq_m_wb_u32): Likewise.
11500 (__arm_viwdupq_m_wb_u16): Likewise.
11501 (__arm_viwdupq_n_u8): Likewise.
11502 (__arm_viwdupq_n_u32): Likewise.
11503 (__arm_viwdupq_n_u16): Likewise.
11504 (__arm_viwdupq_wb_u8): Likewise.
11505 (__arm_viwdupq_wb_u32): Likewise.
11506 (__arm_viwdupq_wb_u16): Likewise.
11507 (vidupq_m): Define polymorphic variant.
11508 (vddupq_m): Likewise.
11509 (vidupq_u16): Likewise.
11510 (vidupq_u32): Likewise.
11511 (vidupq_u8): Likewise.
11512 (vddupq_u16): Likewise.
11513 (vddupq_u32): Likewise.
11514 (vddupq_u8): Likewise.
11515 (viwdupq_m): Likewise.
11516 (viwdupq_u16): Likewise.
11517 (viwdupq_u32): Likewise.
11518 (viwdupq_u8): Likewise.
11519 (vdwdupq_m): Likewise.
11520 (vdwdupq_u16): Likewise.
11521 (vdwdupq_u32): Likewise.
11522 (vdwdupq_u8): Likewise.
11523 * config/arm/arm_mve_builtins.def
11524 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
11526 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
11527 (mve_vidupq_u<mode>_insn): Likewise.
11528 (mve_vidupq_m_n_u<mode>): Likewise.
11529 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
11530 (mve_vddupq_n_u<mode>): Likewise.
11531 (mve_vddupq_u<mode>_insn): Likewise.
11532 (mve_vddupq_m_n_u<mode>): Likewise.
11533 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
11534 (mve_vdwdupq_n_u<mode>): Likewise.
11535 (mve_vdwdupq_wb_u<mode>): Likewise.
11536 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
11537 (mve_vdwdupq_m_n_u<mode>): Likewise.
11538 (mve_vdwdupq_m_wb_u<mode>): Likewise.
11539 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
11540 (mve_viwdupq_n_u<mode>): Likewise.
11541 (mve_viwdupq_wb_u<mode>): Likewise.
11542 (mve_viwdupq_wb_u<mode>_insn): Likewise.
11543 (mve_viwdupq_m_n_u<mode>): Likewise.
11544 (mve_viwdupq_m_wb_u<mode>): Likewise.
11545 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
11547 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11549 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
11550 (vreinterpretq_s16_s64): Likewise.
11551 (vreinterpretq_s16_s8): Likewise.
11552 (vreinterpretq_s16_u16): Likewise.
11553 (vreinterpretq_s16_u32): Likewise.
11554 (vreinterpretq_s16_u64): Likewise.
11555 (vreinterpretq_s16_u8): Likewise.
11556 (vreinterpretq_s32_s16): Likewise.
11557 (vreinterpretq_s32_s64): Likewise.
11558 (vreinterpretq_s32_s8): Likewise.
11559 (vreinterpretq_s32_u16): Likewise.
11560 (vreinterpretq_s32_u32): Likewise.
11561 (vreinterpretq_s32_u64): Likewise.
11562 (vreinterpretq_s32_u8): Likewise.
11563 (vreinterpretq_s64_s16): Likewise.
11564 (vreinterpretq_s64_s32): Likewise.
11565 (vreinterpretq_s64_s8): Likewise.
11566 (vreinterpretq_s64_u16): Likewise.
11567 (vreinterpretq_s64_u32): Likewise.
11568 (vreinterpretq_s64_u64): Likewise.
11569 (vreinterpretq_s64_u8): Likewise.
11570 (vreinterpretq_s8_s16): Likewise.
11571 (vreinterpretq_s8_s32): Likewise.
11572 (vreinterpretq_s8_s64): Likewise.
11573 (vreinterpretq_s8_u16): Likewise.
11574 (vreinterpretq_s8_u32): Likewise.
11575 (vreinterpretq_s8_u64): Likewise.
11576 (vreinterpretq_s8_u8): Likewise.
11577 (vreinterpretq_u16_s16): Likewise.
11578 (vreinterpretq_u16_s32): Likewise.
11579 (vreinterpretq_u16_s64): Likewise.
11580 (vreinterpretq_u16_s8): Likewise.
11581 (vreinterpretq_u16_u32): Likewise.
11582 (vreinterpretq_u16_u64): Likewise.
11583 (vreinterpretq_u16_u8): Likewise.
11584 (vreinterpretq_u32_s16): Likewise.
11585 (vreinterpretq_u32_s32): Likewise.
11586 (vreinterpretq_u32_s64): Likewise.
11587 (vreinterpretq_u32_s8): Likewise.
11588 (vreinterpretq_u32_u16): Likewise.
11589 (vreinterpretq_u32_u64): Likewise.
11590 (vreinterpretq_u32_u8): Likewise.
11591 (vreinterpretq_u64_s16): Likewise.
11592 (vreinterpretq_u64_s32): Likewise.
11593 (vreinterpretq_u64_s64): Likewise.
11594 (vreinterpretq_u64_s8): Likewise.
11595 (vreinterpretq_u64_u16): Likewise.
11596 (vreinterpretq_u64_u32): Likewise.
11597 (vreinterpretq_u64_u8): Likewise.
11598 (vreinterpretq_u8_s16): Likewise.
11599 (vreinterpretq_u8_s32): Likewise.
11600 (vreinterpretq_u8_s64): Likewise.
11601 (vreinterpretq_u8_s8): Likewise.
11602 (vreinterpretq_u8_u16): Likewise.
11603 (vreinterpretq_u8_u32): Likewise.
11604 (vreinterpretq_u8_u64): Likewise.
11605 (vreinterpretq_s32_f16): Likewise.
11606 (vreinterpretq_s32_f32): Likewise.
11607 (vreinterpretq_u16_f16): Likewise.
11608 (vreinterpretq_u16_f32): Likewise.
11609 (vreinterpretq_u32_f16): Likewise.
11610 (vreinterpretq_u32_f32): Likewise.
11611 (vreinterpretq_u64_f16): Likewise.
11612 (vreinterpretq_u64_f32): Likewise.
11613 (vreinterpretq_u8_f16): Likewise.
11614 (vreinterpretq_u8_f32): Likewise.
11615 (vreinterpretq_f16_f32): Likewise.
11616 (vreinterpretq_f16_s16): Likewise.
11617 (vreinterpretq_f16_s32): Likewise.
11618 (vreinterpretq_f16_s64): Likewise.
11619 (vreinterpretq_f16_s8): Likewise.
11620 (vreinterpretq_f16_u16): Likewise.
11621 (vreinterpretq_f16_u32): Likewise.
11622 (vreinterpretq_f16_u64): Likewise.
11623 (vreinterpretq_f16_u8): Likewise.
11624 (vreinterpretq_f32_f16): Likewise.
11625 (vreinterpretq_f32_s16): Likewise.
11626 (vreinterpretq_f32_s32): Likewise.
11627 (vreinterpretq_f32_s64): Likewise.
11628 (vreinterpretq_f32_s8): Likewise.
11629 (vreinterpretq_f32_u16): Likewise.
11630 (vreinterpretq_f32_u32): Likewise.
11631 (vreinterpretq_f32_u64): Likewise.
11632 (vreinterpretq_f32_u8): Likewise.
11633 (vreinterpretq_s16_f16): Likewise.
11634 (vreinterpretq_s16_f32): Likewise.
11635 (vreinterpretq_s64_f16): Likewise.
11636 (vreinterpretq_s64_f32): Likewise.
11637 (vreinterpretq_s8_f16): Likewise.
11638 (vreinterpretq_s8_f32): Likewise.
11639 (vuninitializedq_u8): Likewise.
11640 (vuninitializedq_u16): Likewise.
11641 (vuninitializedq_u32): Likewise.
11642 (vuninitializedq_u64): Likewise.
11643 (vuninitializedq_s8): Likewise.
11644 (vuninitializedq_s16): Likewise.
11645 (vuninitializedq_s32): Likewise.
11646 (vuninitializedq_s64): Likewise.
11647 (vuninitializedq_f16): Likewise.
11648 (vuninitializedq_f32): Likewise.
11649 (__arm_vuninitializedq_u8): Define intrinsic.
11650 (__arm_vuninitializedq_u16): Likewise.
11651 (__arm_vuninitializedq_u32): Likewise.
11652 (__arm_vuninitializedq_u64): Likewise.
11653 (__arm_vuninitializedq_s8): Likewise.
11654 (__arm_vuninitializedq_s16): Likewise.
11655 (__arm_vuninitializedq_s32): Likewise.
11656 (__arm_vuninitializedq_s64): Likewise.
11657 (__arm_vreinterpretq_s16_s32): Likewise.
11658 (__arm_vreinterpretq_s16_s64): Likewise.
11659 (__arm_vreinterpretq_s16_s8): Likewise.
11660 (__arm_vreinterpretq_s16_u16): Likewise.
11661 (__arm_vreinterpretq_s16_u32): Likewise.
11662 (__arm_vreinterpretq_s16_u64): Likewise.
11663 (__arm_vreinterpretq_s16_u8): Likewise.
11664 (__arm_vreinterpretq_s32_s16): Likewise.
11665 (__arm_vreinterpretq_s32_s64): Likewise.
11666 (__arm_vreinterpretq_s32_s8): Likewise.
11667 (__arm_vreinterpretq_s32_u16): Likewise.
11668 (__arm_vreinterpretq_s32_u32): Likewise.
11669 (__arm_vreinterpretq_s32_u64): Likewise.
11670 (__arm_vreinterpretq_s32_u8): Likewise.
11671 (__arm_vreinterpretq_s64_s16): Likewise.
11672 (__arm_vreinterpretq_s64_s32): Likewise.
11673 (__arm_vreinterpretq_s64_s8): Likewise.
11674 (__arm_vreinterpretq_s64_u16): Likewise.
11675 (__arm_vreinterpretq_s64_u32): Likewise.
11676 (__arm_vreinterpretq_s64_u64): Likewise.
11677 (__arm_vreinterpretq_s64_u8): Likewise.
11678 (__arm_vreinterpretq_s8_s16): Likewise.
11679 (__arm_vreinterpretq_s8_s32): Likewise.
11680 (__arm_vreinterpretq_s8_s64): Likewise.
11681 (__arm_vreinterpretq_s8_u16): Likewise.
11682 (__arm_vreinterpretq_s8_u32): Likewise.
11683 (__arm_vreinterpretq_s8_u64): Likewise.
11684 (__arm_vreinterpretq_s8_u8): Likewise.
11685 (__arm_vreinterpretq_u16_s16): Likewise.
11686 (__arm_vreinterpretq_u16_s32): Likewise.
11687 (__arm_vreinterpretq_u16_s64): Likewise.
11688 (__arm_vreinterpretq_u16_s8): Likewise.
11689 (__arm_vreinterpretq_u16_u32): Likewise.
11690 (__arm_vreinterpretq_u16_u64): Likewise.
11691 (__arm_vreinterpretq_u16_u8): Likewise.
11692 (__arm_vreinterpretq_u32_s16): Likewise.
11693 (__arm_vreinterpretq_u32_s32): Likewise.
11694 (__arm_vreinterpretq_u32_s64): Likewise.
11695 (__arm_vreinterpretq_u32_s8): Likewise.
11696 (__arm_vreinterpretq_u32_u16): Likewise.
11697 (__arm_vreinterpretq_u32_u64): Likewise.
11698 (__arm_vreinterpretq_u32_u8): Likewise.
11699 (__arm_vreinterpretq_u64_s16): Likewise.
11700 (__arm_vreinterpretq_u64_s32): Likewise.
11701 (__arm_vreinterpretq_u64_s64): Likewise.
11702 (__arm_vreinterpretq_u64_s8): Likewise.
11703 (__arm_vreinterpretq_u64_u16): Likewise.
11704 (__arm_vreinterpretq_u64_u32): Likewise.
11705 (__arm_vreinterpretq_u64_u8): Likewise.
11706 (__arm_vreinterpretq_u8_s16): Likewise.
11707 (__arm_vreinterpretq_u8_s32): Likewise.
11708 (__arm_vreinterpretq_u8_s64): Likewise.
11709 (__arm_vreinterpretq_u8_s8): Likewise.
11710 (__arm_vreinterpretq_u8_u16): Likewise.
11711 (__arm_vreinterpretq_u8_u32): Likewise.
11712 (__arm_vreinterpretq_u8_u64): Likewise.
11713 (__arm_vuninitializedq_f16): Likewise.
11714 (__arm_vuninitializedq_f32): Likewise.
11715 (__arm_vreinterpretq_s32_f16): Likewise.
11716 (__arm_vreinterpretq_s32_f32): Likewise.
11717 (__arm_vreinterpretq_s16_f16): Likewise.
11718 (__arm_vreinterpretq_s16_f32): Likewise.
11719 (__arm_vreinterpretq_s64_f16): Likewise.
11720 (__arm_vreinterpretq_s64_f32): Likewise.
11721 (__arm_vreinterpretq_s8_f16): Likewise.
11722 (__arm_vreinterpretq_s8_f32): Likewise.
11723 (__arm_vreinterpretq_u16_f16): Likewise.
11724 (__arm_vreinterpretq_u16_f32): Likewise.
11725 (__arm_vreinterpretq_u32_f16): Likewise.
11726 (__arm_vreinterpretq_u32_f32): Likewise.
11727 (__arm_vreinterpretq_u64_f16): Likewise.
11728 (__arm_vreinterpretq_u64_f32): Likewise.
11729 (__arm_vreinterpretq_u8_f16): Likewise.
11730 (__arm_vreinterpretq_u8_f32): Likewise.
11731 (__arm_vreinterpretq_f16_f32): Likewise.
11732 (__arm_vreinterpretq_f16_s16): Likewise.
11733 (__arm_vreinterpretq_f16_s32): Likewise.
11734 (__arm_vreinterpretq_f16_s64): Likewise.
11735 (__arm_vreinterpretq_f16_s8): Likewise.
11736 (__arm_vreinterpretq_f16_u16): Likewise.
11737 (__arm_vreinterpretq_f16_u32): Likewise.
11738 (__arm_vreinterpretq_f16_u64): Likewise.
11739 (__arm_vreinterpretq_f16_u8): Likewise.
11740 (__arm_vreinterpretq_f32_f16): Likewise.
11741 (__arm_vreinterpretq_f32_s16): Likewise.
11742 (__arm_vreinterpretq_f32_s32): Likewise.
11743 (__arm_vreinterpretq_f32_s64): Likewise.
11744 (__arm_vreinterpretq_f32_s8): Likewise.
11745 (__arm_vreinterpretq_f32_u16): Likewise.
11746 (__arm_vreinterpretq_f32_u32): Likewise.
11747 (__arm_vreinterpretq_f32_u64): Likewise.
11748 (__arm_vreinterpretq_f32_u8): Likewise.
11749 (vuninitializedq): Define polymorphic variant.
11750 (vreinterpretq_f16): Likewise.
11751 (vreinterpretq_f32): Likewise.
11752 (vreinterpretq_s16): Likewise.
11753 (vreinterpretq_s32): Likewise.
11754 (vreinterpretq_s64): Likewise.
11755 (vreinterpretq_s8): Likewise.
11756 (vreinterpretq_u16): Likewise.
11757 (vreinterpretq_u32): Likewise.
11758 (vreinterpretq_u64): Likewise.
11759 (vreinterpretq_u8): Likewise.
11761 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11762 Andre Vieira <andre.simoesdiasvieira@arm.com>
11763 Mihail Ionescu <mihail.ionescu@arm.com>
11765 * config/arm/arm_mve.h (vaddq_s8): Define macro.
11766 (vaddq_s16): Likewise.
11767 (vaddq_s32): Likewise.
11768 (vaddq_u8): Likewise.
11769 (vaddq_u16): Likewise.
11770 (vaddq_u32): Likewise.
11771 (vaddq_f16): Likewise.
11772 (vaddq_f32): Likewise.
11773 (__arm_vaddq_s8): Define intrinsic.
11774 (__arm_vaddq_s16): Likewise.
11775 (__arm_vaddq_s32): Likewise.
11776 (__arm_vaddq_u8): Likewise.
11777 (__arm_vaddq_u16): Likewise.
11778 (__arm_vaddq_u32): Likewise.
11779 (__arm_vaddq_f16): Likewise.
11780 (__arm_vaddq_f32): Likewise.
11781 (vaddq): Define polymorphic variant.
11782 * config/arm/iterators.md (VNIM): Define mode iterator for common types
11783 Neon, IWMMXT and MVE.
11784 (VNINOTM): Likewise.
11785 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
11786 (mve_vaddq_f<mode>): Define RTL pattern.
11787 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
11788 (addv8hf3_neon): Define RTL pattern.
11789 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
11791 (addv8hf3): Define standard RTL pattern for MVE and Neon.
11792 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
11794 2020-03-20 Martin Liska <mliska@suse.cz>
11797 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
11798 build_ref_for_offset function was used and it transforms off to bytes
11801 2020-03-20 Richard Biener <rguenther@suse.de>
11803 PR tree-optimization/94266
11804 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
11805 type of the underlying object to adjust for the containing
11806 field if available.
11808 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
11810 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
11811 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
11812 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
11814 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
11816 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
11818 2020-03-20 Jakub Jelinek <jakub@redhat.com>
11820 PR tree-optimization/94224
11821 * gimple-ssa-store-merging.c
11822 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
11823 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
11826 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
11828 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
11830 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
11833 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
11834 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
11836 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
11839 * cgraphunit.c (process_function_and_variable_attributes): warn
11840 for flatten attribute on alias.
11841 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
11843 2020-03-19 Martin Liska <mliska@suse.cz>
11845 * lto-section-in.c: Add ext_symtab.
11846 * lto-streamer-out.c (write_symbol_extension_info): New.
11847 (produce_symtab_extension): New.
11848 (produce_asm_for_decls): Stream also produce_symtab_extension.
11849 * lto-streamer.h (enum lto_section_type): New section.
11851 2020-03-19 Jakub Jelinek <jakub@redhat.com>
11853 PR tree-optimization/94211
11854 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
11855 instead of estimate_num_insns for bb_seq (middle_bb). Rename
11856 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
11859 2020-03-19 Richard Biener <rguenther@suse.de>
11862 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
11863 and build_ref_for_offset.
11865 2020-03-19 Richard Biener <rguenther@suse.de>
11867 PR middle-end/94216
11868 * fold-const.c (fold_binary_loc): Avoid using
11869 build_fold_addr_expr when we really want an ADDR_EXPR.
11871 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
11873 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
11876 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
11878 PR rtl-optimization/90275
11879 * cse.c (cse_insn): Delete no-op register moves too.
11881 2020-03-18 Martin Sebor <msebor@redhat.com>
11884 * cgraphunit.c (process_function_and_variable_attributes): Also
11885 complain about weakref function definitions and drop all effects
11888 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11889 Mihail Ionescu <mihail.ionescu@arm.com>
11890 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11892 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
11893 (vstrdq_scatter_base_p_u64): Likewise.
11894 (vstrdq_scatter_base_s64): Likewise.
11895 (vstrdq_scatter_base_u64): Likewise.
11896 (vstrdq_scatter_offset_p_s64): Likewise.
11897 (vstrdq_scatter_offset_p_u64): Likewise.
11898 (vstrdq_scatter_offset_s64): Likewise.
11899 (vstrdq_scatter_offset_u64): Likewise.
11900 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
11901 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
11902 (vstrdq_scatter_shifted_offset_s64): Likewise.
11903 (vstrdq_scatter_shifted_offset_u64): Likewise.
11904 (vstrhq_scatter_offset_f16): Likewise.
11905 (vstrhq_scatter_offset_p_f16): Likewise.
11906 (vstrhq_scatter_shifted_offset_f16): Likewise.
11907 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
11908 (vstrwq_scatter_base_f32): Likewise.
11909 (vstrwq_scatter_base_p_f32): Likewise.
11910 (vstrwq_scatter_offset_f32): Likewise.
11911 (vstrwq_scatter_offset_p_f32): Likewise.
11912 (vstrwq_scatter_offset_p_s32): Likewise.
11913 (vstrwq_scatter_offset_p_u32): Likewise.
11914 (vstrwq_scatter_offset_s32): Likewise.
11915 (vstrwq_scatter_offset_u32): Likewise.
11916 (vstrwq_scatter_shifted_offset_f32): Likewise.
11917 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
11918 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
11919 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
11920 (vstrwq_scatter_shifted_offset_s32): Likewise.
11921 (vstrwq_scatter_shifted_offset_u32): Likewise.
11922 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
11923 (__arm_vstrdq_scatter_base_p_u64): Likewise.
11924 (__arm_vstrdq_scatter_base_s64): Likewise.
11925 (__arm_vstrdq_scatter_base_u64): Likewise.
11926 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
11927 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
11928 (__arm_vstrdq_scatter_offset_s64): Likewise.
11929 (__arm_vstrdq_scatter_offset_u64): Likewise.
11930 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
11931 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
11932 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
11933 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
11934 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
11935 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
11936 (__arm_vstrwq_scatter_offset_s32): Likewise.
11937 (__arm_vstrwq_scatter_offset_u32): Likewise.
11938 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
11939 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
11940 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
11941 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
11942 (__arm_vstrhq_scatter_offset_f16): Likewise.
11943 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
11944 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
11945 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
11946 (__arm_vstrwq_scatter_base_f32): Likewise.
11947 (__arm_vstrwq_scatter_base_p_f32): Likewise.
11948 (__arm_vstrwq_scatter_offset_f32): Likewise.
11949 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
11950 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
11951 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
11952 (vstrhq_scatter_offset): Define polymorphic variant.
11953 (vstrhq_scatter_offset_p): Likewise.
11954 (vstrhq_scatter_shifted_offset): Likewise.
11955 (vstrhq_scatter_shifted_offset_p): Likewise.
11956 (vstrwq_scatter_base): Likewise.
11957 (vstrwq_scatter_base_p): Likewise.
11958 (vstrwq_scatter_offset): Likewise.
11959 (vstrwq_scatter_offset_p): Likewise.
11960 (vstrwq_scatter_shifted_offset): Likewise.
11961 (vstrwq_scatter_shifted_offset_p): Likewise.
11962 (vstrdq_scatter_base_p): Likewise.
11963 (vstrdq_scatter_base): Likewise.
11964 (vstrdq_scatter_offset_p): Likewise.
11965 (vstrdq_scatter_offset): Likewise.
11966 (vstrdq_scatter_shifted_offset_p): Likewise.
11967 (vstrdq_scatter_shifted_offset): Likewise.
11968 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
11969 (STRSBS_P): Likewise.
11970 (STRSBU): Likewise.
11971 (STRSBU_P): Likewise.
11973 (STRSS_P): Likewise.
11975 (STRSU_P): Likewise.
11976 * config/arm/constraints.md (Ri): Define.
11977 * config/arm/mve.md (VSTRDSBQ): Define iterator.
11978 (VSTRDSOQ): Likewise.
11979 (VSTRDSSOQ): Likewise.
11980 (VSTRWSOQ): Likewise.
11981 (VSTRWSSOQ): Likewise.
11982 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
11983 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
11984 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
11985 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
11986 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
11987 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
11988 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
11989 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
11990 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
11991 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
11992 (mve_vstrwq_scatter_base_fv4sf): Likewise.
11993 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
11994 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
11995 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
11996 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
11997 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
11998 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
11999 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
12000 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
12001 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
12002 * config/arm/predicates.md (Ri): Define predicate to check immediate
12003 is the range +/-1016 and multiple of 8.
12005 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12006 Mihail Ionescu <mihail.ionescu@arm.com>
12007 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12009 * config/arm/arm_mve.h (vst1q_f32): Define macro.
12010 (vst1q_f16): Likewise.
12011 (vst1q_s8): Likewise.
12012 (vst1q_s32): Likewise.
12013 (vst1q_s16): Likewise.
12014 (vst1q_u8): Likewise.
12015 (vst1q_u32): Likewise.
12016 (vst1q_u16): Likewise.
12017 (vstrhq_f16): Likewise.
12018 (vstrhq_scatter_offset_s32): Likewise.
12019 (vstrhq_scatter_offset_s16): Likewise.
12020 (vstrhq_scatter_offset_u32): Likewise.
12021 (vstrhq_scatter_offset_u16): Likewise.
12022 (vstrhq_scatter_offset_p_s32): Likewise.
12023 (vstrhq_scatter_offset_p_s16): Likewise.
12024 (vstrhq_scatter_offset_p_u32): Likewise.
12025 (vstrhq_scatter_offset_p_u16): Likewise.
12026 (vstrhq_scatter_shifted_offset_s32): Likewise.
12027 (vstrhq_scatter_shifted_offset_s16): Likewise.
12028 (vstrhq_scatter_shifted_offset_u32): Likewise.
12029 (vstrhq_scatter_shifted_offset_u16): Likewise.
12030 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
12031 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
12032 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
12033 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
12034 (vstrhq_s32): Likewise.
12035 (vstrhq_s16): Likewise.
12036 (vstrhq_u32): Likewise.
12037 (vstrhq_u16): Likewise.
12038 (vstrhq_p_f16): Likewise.
12039 (vstrhq_p_s32): Likewise.
12040 (vstrhq_p_s16): Likewise.
12041 (vstrhq_p_u32): Likewise.
12042 (vstrhq_p_u16): Likewise.
12043 (vstrwq_f32): Likewise.
12044 (vstrwq_s32): Likewise.
12045 (vstrwq_u32): Likewise.
12046 (vstrwq_p_f32): Likewise.
12047 (vstrwq_p_s32): Likewise.
12048 (vstrwq_p_u32): Likewise.
12049 (__arm_vst1q_s8): Define intrinsic.
12050 (__arm_vst1q_s32): Likewise.
12051 (__arm_vst1q_s16): Likewise.
12052 (__arm_vst1q_u8): Likewise.
12053 (__arm_vst1q_u32): Likewise.
12054 (__arm_vst1q_u16): Likewise.
12055 (__arm_vstrhq_scatter_offset_s32): Likewise.
12056 (__arm_vstrhq_scatter_offset_s16): Likewise.
12057 (__arm_vstrhq_scatter_offset_u32): Likewise.
12058 (__arm_vstrhq_scatter_offset_u16): Likewise.
12059 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
12060 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
12061 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
12062 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
12063 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
12064 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
12065 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
12066 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
12067 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
12068 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
12069 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
12070 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
12071 (__arm_vstrhq_s32): Likewise.
12072 (__arm_vstrhq_s16): Likewise.
12073 (__arm_vstrhq_u32): Likewise.
12074 (__arm_vstrhq_u16): Likewise.
12075 (__arm_vstrhq_p_s32): Likewise.
12076 (__arm_vstrhq_p_s16): Likewise.
12077 (__arm_vstrhq_p_u32): Likewise.
12078 (__arm_vstrhq_p_u16): Likewise.
12079 (__arm_vstrwq_s32): Likewise.
12080 (__arm_vstrwq_u32): Likewise.
12081 (__arm_vstrwq_p_s32): Likewise.
12082 (__arm_vstrwq_p_u32): Likewise.
12083 (__arm_vstrwq_p_f32): Likewise.
12084 (__arm_vstrwq_f32): Likewise.
12085 (__arm_vst1q_f32): Likewise.
12086 (__arm_vst1q_f16): Likewise.
12087 (__arm_vstrhq_f16): Likewise.
12088 (__arm_vstrhq_p_f16): Likewise.
12089 (vst1q): Define polymorphic variant.
12090 (vstrhq): Likewise.
12091 (vstrhq_p): Likewise.
12092 (vstrhq_scatter_offset_p): Likewise.
12093 (vstrhq_scatter_offset): Likewise.
12094 (vstrhq_scatter_shifted_offset_p): Likewise.
12095 (vstrhq_scatter_shifted_offset): Likewise.
12096 (vstrwq_p): Likewise.
12097 (vstrwq): Likewise.
12098 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
12099 (STRS_P): Likewise.
12101 (STRSS_P): Likewise.
12103 (STRSU_P): Likewise.
12105 (STRU_P): Likewise.
12106 * config/arm/mve.md (VST1Q): Define iterator.
12107 (VSTRHSOQ): Likewise.
12108 (VSTRHSSOQ): Likewise.
12109 (VSTRHQ): Likewise.
12110 (VSTRWQ): Likewise.
12111 (mve_vstrhq_fv8hf): Define RTL pattern.
12112 (mve_vstrhq_p_fv8hf): Likewise.
12113 (mve_vstrhq_p_<supf><mode>): Likewise.
12114 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
12115 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
12116 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
12117 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
12118 (mve_vstrhq_<supf><mode>): Likewise.
12119 (mve_vstrwq_fv4sf): Likewise.
12120 (mve_vstrwq_p_fv4sf): Likewise.
12121 (mve_vstrwq_p_<supf>v4si): Likewise.
12122 (mve_vstrwq_<supf>v4si): Likewise.
12123 (mve_vst1q_f<mode>): Define expand.
12124 (mve_vst1q_<supf><mode>): Likewise.
12126 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12127 Mihail Ionescu <mihail.ionescu@arm.com>
12128 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12130 * config/arm/arm_mve.h (vld1q_s8): Define macro.
12131 (vld1q_s32): Likewise.
12132 (vld1q_s16): Likewise.
12133 (vld1q_u8): Likewise.
12134 (vld1q_u32): Likewise.
12135 (vld1q_u16): Likewise.
12136 (vldrhq_gather_offset_s32): Likewise.
12137 (vldrhq_gather_offset_s16): Likewise.
12138 (vldrhq_gather_offset_u32): Likewise.
12139 (vldrhq_gather_offset_u16): Likewise.
12140 (vldrhq_gather_offset_z_s32): Likewise.
12141 (vldrhq_gather_offset_z_s16): Likewise.
12142 (vldrhq_gather_offset_z_u32): Likewise.
12143 (vldrhq_gather_offset_z_u16): Likewise.
12144 (vldrhq_gather_shifted_offset_s32): Likewise.
12145 (vldrhq_gather_shifted_offset_s16): Likewise.
12146 (vldrhq_gather_shifted_offset_u32): Likewise.
12147 (vldrhq_gather_shifted_offset_u16): Likewise.
12148 (vldrhq_gather_shifted_offset_z_s32): Likewise.
12149 (vldrhq_gather_shifted_offset_z_s16): Likewise.
12150 (vldrhq_gather_shifted_offset_z_u32): Likewise.
12151 (vldrhq_gather_shifted_offset_z_u16): Likewise.
12152 (vldrhq_s32): Likewise.
12153 (vldrhq_s16): Likewise.
12154 (vldrhq_u32): Likewise.
12155 (vldrhq_u16): Likewise.
12156 (vldrhq_z_s32): Likewise.
12157 (vldrhq_z_s16): Likewise.
12158 (vldrhq_z_u32): Likewise.
12159 (vldrhq_z_u16): Likewise.
12160 (vldrwq_s32): Likewise.
12161 (vldrwq_u32): Likewise.
12162 (vldrwq_z_s32): Likewise.
12163 (vldrwq_z_u32): Likewise.
12164 (vld1q_f32): Likewise.
12165 (vld1q_f16): Likewise.
12166 (vldrhq_f16): Likewise.
12167 (vldrhq_z_f16): Likewise.
12168 (vldrwq_f32): Likewise.
12169 (vldrwq_z_f32): Likewise.
12170 (__arm_vld1q_s8): Define intrinsic.
12171 (__arm_vld1q_s32): Likewise.
12172 (__arm_vld1q_s16): Likewise.
12173 (__arm_vld1q_u8): Likewise.
12174 (__arm_vld1q_u32): Likewise.
12175 (__arm_vld1q_u16): Likewise.
12176 (__arm_vldrhq_gather_offset_s32): Likewise.
12177 (__arm_vldrhq_gather_offset_s16): Likewise.
12178 (__arm_vldrhq_gather_offset_u32): Likewise.
12179 (__arm_vldrhq_gather_offset_u16): Likewise.
12180 (__arm_vldrhq_gather_offset_z_s32): Likewise.
12181 (__arm_vldrhq_gather_offset_z_s16): Likewise.
12182 (__arm_vldrhq_gather_offset_z_u32): Likewise.
12183 (__arm_vldrhq_gather_offset_z_u16): Likewise.
12184 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
12185 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
12186 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
12187 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
12188 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
12189 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
12190 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
12191 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
12192 (__arm_vldrhq_s32): Likewise.
12193 (__arm_vldrhq_s16): Likewise.
12194 (__arm_vldrhq_u32): Likewise.
12195 (__arm_vldrhq_u16): Likewise.
12196 (__arm_vldrhq_z_s32): Likewise.
12197 (__arm_vldrhq_z_s16): Likewise.
12198 (__arm_vldrhq_z_u32): Likewise.
12199 (__arm_vldrhq_z_u16): Likewise.
12200 (__arm_vldrwq_s32): Likewise.
12201 (__arm_vldrwq_u32): Likewise.
12202 (__arm_vldrwq_z_s32): Likewise.
12203 (__arm_vldrwq_z_u32): Likewise.
12204 (__arm_vld1q_f32): Likewise.
12205 (__arm_vld1q_f16): Likewise.
12206 (__arm_vldrwq_f32): Likewise.
12207 (__arm_vldrwq_z_f32): Likewise.
12208 (__arm_vldrhq_z_f16): Likewise.
12209 (__arm_vldrhq_f16): Likewise.
12210 (vld1q): Define polymorphic variant.
12211 (vldrhq_gather_offset): Likewise.
12212 (vldrhq_gather_offset_z): Likewise.
12213 (vldrhq_gather_shifted_offset): Likewise.
12214 (vldrhq_gather_shifted_offset_z): Likewise.
12215 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
12217 (LDRU_Z): Likewise.
12218 (LDRS_Z): Likewise.
12219 (LDRGU_Z): Likewise.
12221 (LDRGS_Z): Likewise.
12223 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
12224 (V_sz_elem1): Likewise.
12225 (VLD1Q): Define iterator.
12226 (VLDRHGOQ): Likewise.
12227 (VLDRHGSOQ): Likewise.
12228 (VLDRHQ): Likewise.
12229 (VLDRWQ): Likewise.
12230 (mve_vldrhq_fv8hf): Define RTL pattern.
12231 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
12232 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
12233 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
12234 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
12235 (mve_vldrhq_<supf><mode>): Likewise.
12236 (mve_vldrhq_z_fv8hf): Likewise.
12237 (mve_vldrhq_z_<supf><mode>): Likewise.
12238 (mve_vldrwq_fv4sf): Likewise.
12239 (mve_vldrwq_<supf>v4si): Likewise.
12240 (mve_vldrwq_z_fv4sf): Likewise.
12241 (mve_vldrwq_z_<supf>v4si): Likewise.
12242 (mve_vld1q_f<mode>): Define RTL expand pattern.
12243 (mve_vld1q_<supf><mode>): Likewise.
12245 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12246 Mihail Ionescu <mihail.ionescu@arm.com>
12247 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12249 * config/arm/arm_mve.h (vld1q_s8): Define macro.
12250 (vld1q_s32): Likewise.
12251 (vld1q_s16): Likewise.
12252 (vld1q_u8): Likewise.
12253 (vld1q_u32): Likewise.
12254 (vld1q_u16): Likewise.
12255 (vldrhq_gather_offset_s32): Likewise.
12256 (vldrhq_gather_offset_s16): Likewise.
12257 (vldrhq_gather_offset_u32): Likewise.
12258 (vldrhq_gather_offset_u16): Likewise.
12259 (vldrhq_gather_offset_z_s32): Likewise.
12260 (vldrhq_gather_offset_z_s16): Likewise.
12261 (vldrhq_gather_offset_z_u32): Likewise.
12262 (vldrhq_gather_offset_z_u16): Likewise.
12263 (vldrhq_gather_shifted_offset_s32): Likewise.
12264 (vldrhq_gather_shifted_offset_s16): Likewise.
12265 (vldrhq_gather_shifted_offset_u32): Likewise.
12266 (vldrhq_gather_shifted_offset_u16): Likewise.
12267 (vldrhq_gather_shifted_offset_z_s32): Likewise.
12268 (vldrhq_gather_shifted_offset_z_s16): Likewise.
12269 (vldrhq_gather_shifted_offset_z_u32): Likewise.
12270 (vldrhq_gather_shifted_offset_z_u16): Likewise.
12271 (vldrhq_s32): Likewise.
12272 (vldrhq_s16): Likewise.
12273 (vldrhq_u32): Likewise.
12274 (vldrhq_u16): Likewise.
12275 (vldrhq_z_s32): Likewise.
12276 (vldrhq_z_s16): Likewise.
12277 (vldrhq_z_u32): Likewise.
12278 (vldrhq_z_u16): Likewise.
12279 (vldrwq_s32): Likewise.
12280 (vldrwq_u32): Likewise.
12281 (vldrwq_z_s32): Likewise.
12282 (vldrwq_z_u32): Likewise.
12283 (vld1q_f32): Likewise.
12284 (vld1q_f16): Likewise.
12285 (vldrhq_f16): Likewise.
12286 (vldrhq_z_f16): Likewise.
12287 (vldrwq_f32): Likewise.
12288 (vldrwq_z_f32): Likewise.
12289 (__arm_vld1q_s8): Define intrinsic.
12290 (__arm_vld1q_s32): Likewise.
12291 (__arm_vld1q_s16): Likewise.
12292 (__arm_vld1q_u8): Likewise.
12293 (__arm_vld1q_u32): Likewise.
12294 (__arm_vld1q_u16): Likewise.
12295 (__arm_vldrhq_gather_offset_s32): Likewise.
12296 (__arm_vldrhq_gather_offset_s16): Likewise.
12297 (__arm_vldrhq_gather_offset_u32): Likewise.
12298 (__arm_vldrhq_gather_offset_u16): Likewise.
12299 (__arm_vldrhq_gather_offset_z_s32): Likewise.
12300 (__arm_vldrhq_gather_offset_z_s16): Likewise.
12301 (__arm_vldrhq_gather_offset_z_u32): Likewise.
12302 (__arm_vldrhq_gather_offset_z_u16): Likewise.
12303 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
12304 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
12305 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
12306 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
12307 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
12308 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
12309 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
12310 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
12311 (__arm_vldrhq_s32): Likewise.
12312 (__arm_vldrhq_s16): Likewise.
12313 (__arm_vldrhq_u32): Likewise.
12314 (__arm_vldrhq_u16): Likewise.
12315 (__arm_vldrhq_z_s32): Likewise.
12316 (__arm_vldrhq_z_s16): Likewise.
12317 (__arm_vldrhq_z_u32): Likewise.
12318 (__arm_vldrhq_z_u16): Likewise.
12319 (__arm_vldrwq_s32): Likewise.
12320 (__arm_vldrwq_u32): Likewise.
12321 (__arm_vldrwq_z_s32): Likewise.
12322 (__arm_vldrwq_z_u32): Likewise.
12323 (__arm_vld1q_f32): Likewise.
12324 (__arm_vld1q_f16): Likewise.
12325 (__arm_vldrwq_f32): Likewise.
12326 (__arm_vldrwq_z_f32): Likewise.
12327 (__arm_vldrhq_z_f16): Likewise.
12328 (__arm_vldrhq_f16): Likewise.
12329 (vld1q): Define polymorphic variant.
12330 (vldrhq_gather_offset): Likewise.
12331 (vldrhq_gather_offset_z): Likewise.
12332 (vldrhq_gather_shifted_offset): Likewise.
12333 (vldrhq_gather_shifted_offset_z): Likewise.
12334 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
12336 (LDRU_Z): Likewise.
12337 (LDRS_Z): Likewise.
12338 (LDRGU_Z): Likewise.
12340 (LDRGS_Z): Likewise.
12342 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
12343 (V_sz_elem1): Likewise.
12344 (VLD1Q): Define iterator.
12345 (VLDRHGOQ): Likewise.
12346 (VLDRHGSOQ): Likewise.
12347 (VLDRHQ): Likewise.
12348 (VLDRWQ): Likewise.
12349 (mve_vldrhq_fv8hf): Define RTL pattern.
12350 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
12351 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
12352 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
12353 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
12354 (mve_vldrhq_<supf><mode>): Likewise.
12355 (mve_vldrhq_z_fv8hf): Likewise.
12356 (mve_vldrhq_z_<supf><mode>): Likewise.
12357 (mve_vldrwq_fv4sf): Likewise.
12358 (mve_vldrwq_<supf>v4si): Likewise.
12359 (mve_vldrwq_z_fv4sf): Likewise.
12360 (mve_vldrwq_z_<supf>v4si): Likewise.
12361 (mve_vld1q_f<mode>): Define RTL expand pattern.
12362 (mve_vld1q_<supf><mode>): Likewise.
12364 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12365 Mihail Ionescu <mihail.ionescu@arm.com>
12366 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12368 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
12370 (LDRGBU_Z_QUALIFIERS): Likewise.
12371 (LDRGS_Z_QUALIFIERS): Likewise.
12372 (LDRGU_Z_QUALIFIERS): Likewise.
12373 (LDRS_Z_QUALIFIERS): Likewise.
12374 (LDRU_Z_QUALIFIERS): Likewise.
12375 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
12376 (vldrbq_gather_offset_z_u8): Likewise.
12377 (vldrbq_gather_offset_z_s32): Likewise.
12378 (vldrbq_gather_offset_z_u16): Likewise.
12379 (vldrbq_gather_offset_z_u32): Likewise.
12380 (vldrbq_gather_offset_z_s8): Likewise.
12381 (vldrbq_z_s16): Likewise.
12382 (vldrbq_z_u8): Likewise.
12383 (vldrbq_z_s8): Likewise.
12384 (vldrbq_z_s32): Likewise.
12385 (vldrbq_z_u16): Likewise.
12386 (vldrbq_z_u32): Likewise.
12387 (vldrwq_gather_base_z_u32): Likewise.
12388 (vldrwq_gather_base_z_s32): Likewise.
12389 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
12390 (__arm_vldrbq_gather_offset_z_s32): Likewise.
12391 (__arm_vldrbq_gather_offset_z_s16): Likewise.
12392 (__arm_vldrbq_gather_offset_z_u8): Likewise.
12393 (__arm_vldrbq_gather_offset_z_u32): Likewise.
12394 (__arm_vldrbq_gather_offset_z_u16): Likewise.
12395 (__arm_vldrbq_z_s8): Likewise.
12396 (__arm_vldrbq_z_s32): Likewise.
12397 (__arm_vldrbq_z_s16): Likewise.
12398 (__arm_vldrbq_z_u8): Likewise.
12399 (__arm_vldrbq_z_u32): Likewise.
12400 (__arm_vldrbq_z_u16): Likewise.
12401 (__arm_vldrwq_gather_base_z_s32): Likewise.
12402 (__arm_vldrwq_gather_base_z_u32): Likewise.
12403 (vldrbq_gather_offset_z): Define polymorphic variant.
12404 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
12406 (LDRGBU_Z_QUALIFIERS): Likewise.
12407 (LDRGS_Z_QUALIFIERS): Likewise.
12408 (LDRGU_Z_QUALIFIERS): Likewise.
12409 (LDRS_Z_QUALIFIERS): Likewise.
12410 (LDRU_Z_QUALIFIERS): Likewise.
12411 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
12413 (mve_vldrbq_z_<supf><mode>): Likewise.
12414 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
12416 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12417 Mihail Ionescu <mihail.ionescu@arm.com>
12418 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12420 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
12422 (STRU_P_QUALIFIERS): Likewise.
12423 (STRSU_P_QUALIFIERS): Likewise.
12424 (STRSS_P_QUALIFIERS): Likewise.
12425 (STRSBS_P_QUALIFIERS): Likewise.
12426 (STRSBU_P_QUALIFIERS): Likewise.
12427 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
12428 (vstrbq_p_s32): Likewise.
12429 (vstrbq_p_s16): Likewise.
12430 (vstrbq_p_u8): Likewise.
12431 (vstrbq_p_u32): Likewise.
12432 (vstrbq_p_u16): Likewise.
12433 (vstrbq_scatter_offset_p_s8): Likewise.
12434 (vstrbq_scatter_offset_p_s32): Likewise.
12435 (vstrbq_scatter_offset_p_s16): Likewise.
12436 (vstrbq_scatter_offset_p_u8): Likewise.
12437 (vstrbq_scatter_offset_p_u32): Likewise.
12438 (vstrbq_scatter_offset_p_u16): Likewise.
12439 (vstrwq_scatter_base_p_s32): Likewise.
12440 (vstrwq_scatter_base_p_u32): Likewise.
12441 (__arm_vstrbq_p_s8): Define intrinsic.
12442 (__arm_vstrbq_p_s32): Likewise.
12443 (__arm_vstrbq_p_s16): Likewise.
12444 (__arm_vstrbq_p_u8): Likewise.
12445 (__arm_vstrbq_p_u32): Likewise.
12446 (__arm_vstrbq_p_u16): Likewise.
12447 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
12448 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
12449 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
12450 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
12451 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
12452 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
12453 (__arm_vstrwq_scatter_base_p_s32): Likewise.
12454 (__arm_vstrwq_scatter_base_p_u32): Likewise.
12455 (vstrbq_p): Define polymorphic variant.
12456 (vstrbq_scatter_offset_p): Likewise.
12457 (vstrwq_scatter_base_p): Likewise.
12458 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
12460 (STRU_P_QUALIFIERS): Likewise.
12461 (STRSU_P_QUALIFIERS): Likewise.
12462 (STRSS_P_QUALIFIERS): Likewise.
12463 (STRSBS_P_QUALIFIERS): Likewise.
12464 (STRSBU_P_QUALIFIERS): Likewise.
12465 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
12467 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
12468 (mve_vstrbq_p_<supf><mode>): Likewise.
12470 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12471 Mihail Ionescu <mihail.ionescu@arm.com>
12472 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12474 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
12476 (LDRGS_QUALIFIERS): Likewise.
12477 (LDRS_QUALIFIERS): Likewise.
12478 (LDRU_QUALIFIERS): Likewise.
12479 (LDRGBS_QUALIFIERS): Likewise.
12480 (LDRGBU_QUALIFIERS): Likewise.
12481 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
12482 (vldrbq_gather_offset_s8): Likewise.
12483 (vldrbq_s8): Likewise.
12484 (vldrbq_u8): Likewise.
12485 (vldrbq_gather_offset_u16): Likewise.
12486 (vldrbq_gather_offset_s16): Likewise.
12487 (vldrbq_s16): Likewise.
12488 (vldrbq_u16): Likewise.
12489 (vldrbq_gather_offset_u32): Likewise.
12490 (vldrbq_gather_offset_s32): Likewise.
12491 (vldrbq_s32): Likewise.
12492 (vldrbq_u32): Likewise.
12493 (vldrwq_gather_base_s32): Likewise.
12494 (vldrwq_gather_base_u32): Likewise.
12495 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
12496 (__arm_vldrbq_gather_offset_s8): Likewise.
12497 (__arm_vldrbq_s8): Likewise.
12498 (__arm_vldrbq_u8): Likewise.
12499 (__arm_vldrbq_gather_offset_u16): Likewise.
12500 (__arm_vldrbq_gather_offset_s16): Likewise.
12501 (__arm_vldrbq_s16): Likewise.
12502 (__arm_vldrbq_u16): Likewise.
12503 (__arm_vldrbq_gather_offset_u32): Likewise.
12504 (__arm_vldrbq_gather_offset_s32): Likewise.
12505 (__arm_vldrbq_s32): Likewise.
12506 (__arm_vldrbq_u32): Likewise.
12507 (__arm_vldrwq_gather_base_s32): Likewise.
12508 (__arm_vldrwq_gather_base_u32): Likewise.
12509 (vldrbq_gather_offset): Define polymorphic variant.
12510 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
12512 (LDRGS_QUALIFIERS): Likewise.
12513 (LDRS_QUALIFIERS): Likewise.
12514 (LDRU_QUALIFIERS): Likewise.
12515 (LDRGBS_QUALIFIERS): Likewise.
12516 (LDRGBU_QUALIFIERS): Likewise.
12517 * config/arm/mve.md (VLDRBGOQ): Define iterator.
12518 (VLDRBQ): Likewise.
12519 (VLDRWGBQ): Likewise.
12520 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
12521 (mve_vldrbq_<supf><mode>): Likewise.
12522 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
12524 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12525 Mihail Ionescu <mihail.ionescu@arm.com>
12526 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12528 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
12529 (STRU_QUALIFIERS): Likewise.
12530 (STRSS_QUALIFIERS): Likewise.
12531 (STRSU_QUALIFIERS): Likewise.
12532 (STRSBS_QUALIFIERS): Likewise.
12533 (STRSBU_QUALIFIERS): Likewise.
12534 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
12535 (vstrbq_u8): Likewise.
12536 (vstrbq_u16): Likewise.
12537 (vstrbq_scatter_offset_s8): Likewise.
12538 (vstrbq_scatter_offset_u8): Likewise.
12539 (vstrbq_scatter_offset_u16): Likewise.
12540 (vstrbq_s16): Likewise.
12541 (vstrbq_u32): Likewise.
12542 (vstrbq_scatter_offset_s16): Likewise.
12543 (vstrbq_scatter_offset_u32): Likewise.
12544 (vstrbq_s32): Likewise.
12545 (vstrbq_scatter_offset_s32): Likewise.
12546 (vstrwq_scatter_base_s32): Likewise.
12547 (vstrwq_scatter_base_u32): Likewise.
12548 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
12549 (__arm_vstrbq_scatter_offset_s32): Likewise.
12550 (__arm_vstrbq_scatter_offset_s16): Likewise.
12551 (__arm_vstrbq_scatter_offset_u8): Likewise.
12552 (__arm_vstrbq_scatter_offset_u32): Likewise.
12553 (__arm_vstrbq_scatter_offset_u16): Likewise.
12554 (__arm_vstrbq_s8): Likewise.
12555 (__arm_vstrbq_s32): Likewise.
12556 (__arm_vstrbq_s16): Likewise.
12557 (__arm_vstrbq_u8): Likewise.
12558 (__arm_vstrbq_u32): Likewise.
12559 (__arm_vstrbq_u16): Likewise.
12560 (__arm_vstrwq_scatter_base_s32): Likewise.
12561 (__arm_vstrwq_scatter_base_u32): Likewise.
12562 (vstrbq): Define polymorphic variant.
12563 (vstrbq_scatter_offset): Likewise.
12564 (vstrwq_scatter_base): Likewise.
12565 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
12567 (STRU_QUALIFIERS): Likewise.
12568 (STRSS_QUALIFIERS): Likewise.
12569 (STRSU_QUALIFIERS): Likewise.
12570 (STRSBS_QUALIFIERS): Likewise.
12571 (STRSBU_QUALIFIERS): Likewise.
12572 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
12573 (VSTRWSBQ): Define iterators.
12574 (VSTRBSOQ): Likewise.
12575 (VSTRBQ): Likewise.
12576 (mve_vstrbq_<supf><mode>): Define RTL pattern.
12577 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
12578 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
12580 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12581 Mihail Ionescu <mihail.ionescu@arm.com>
12582 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12584 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
12585 (vabdq_m_f16): Likewise.
12586 (vaddq_m_f32): Likewise.
12587 (vaddq_m_f16): Likewise.
12588 (vaddq_m_n_f32): Likewise.
12589 (vaddq_m_n_f16): Likewise.
12590 (vandq_m_f32): Likewise.
12591 (vandq_m_f16): Likewise.
12592 (vbicq_m_f32): Likewise.
12593 (vbicq_m_f16): Likewise.
12594 (vbrsrq_m_n_f32): Likewise.
12595 (vbrsrq_m_n_f16): Likewise.
12596 (vcaddq_rot270_m_f32): Likewise.
12597 (vcaddq_rot270_m_f16): Likewise.
12598 (vcaddq_rot90_m_f32): Likewise.
12599 (vcaddq_rot90_m_f16): Likewise.
12600 (vcmlaq_m_f32): Likewise.
12601 (vcmlaq_m_f16): Likewise.
12602 (vcmlaq_rot180_m_f32): Likewise.
12603 (vcmlaq_rot180_m_f16): Likewise.
12604 (vcmlaq_rot270_m_f32): Likewise.
12605 (vcmlaq_rot270_m_f16): Likewise.
12606 (vcmlaq_rot90_m_f32): Likewise.
12607 (vcmlaq_rot90_m_f16): Likewise.
12608 (vcmulq_m_f32): Likewise.
12609 (vcmulq_m_f16): Likewise.
12610 (vcmulq_rot180_m_f32): Likewise.
12611 (vcmulq_rot180_m_f16): Likewise.
12612 (vcmulq_rot270_m_f32): Likewise.
12613 (vcmulq_rot270_m_f16): Likewise.
12614 (vcmulq_rot90_m_f32): Likewise.
12615 (vcmulq_rot90_m_f16): Likewise.
12616 (vcvtq_m_n_s32_f32): Likewise.
12617 (vcvtq_m_n_s16_f16): Likewise.
12618 (vcvtq_m_n_u32_f32): Likewise.
12619 (vcvtq_m_n_u16_f16): Likewise.
12620 (veorq_m_f32): Likewise.
12621 (veorq_m_f16): Likewise.
12622 (vfmaq_m_f32): Likewise.
12623 (vfmaq_m_f16): Likewise.
12624 (vfmaq_m_n_f32): Likewise.
12625 (vfmaq_m_n_f16): Likewise.
12626 (vfmasq_m_n_f32): Likewise.
12627 (vfmasq_m_n_f16): Likewise.
12628 (vfmsq_m_f32): Likewise.
12629 (vfmsq_m_f16): Likewise.
12630 (vmaxnmq_m_f32): Likewise.
12631 (vmaxnmq_m_f16): Likewise.
12632 (vminnmq_m_f32): Likewise.
12633 (vminnmq_m_f16): Likewise.
12634 (vmulq_m_f32): Likewise.
12635 (vmulq_m_f16): Likewise.
12636 (vmulq_m_n_f32): Likewise.
12637 (vmulq_m_n_f16): Likewise.
12638 (vornq_m_f32): Likewise.
12639 (vornq_m_f16): Likewise.
12640 (vorrq_m_f32): Likewise.
12641 (vorrq_m_f16): Likewise.
12642 (vsubq_m_f32): Likewise.
12643 (vsubq_m_f16): Likewise.
12644 (vsubq_m_n_f32): Likewise.
12645 (vsubq_m_n_f16): Likewise.
12646 (__attribute__): Likewise.
12647 (__arm_vabdq_m_f32): Likewise.
12648 (__arm_vabdq_m_f16): Likewise.
12649 (__arm_vaddq_m_f32): Likewise.
12650 (__arm_vaddq_m_f16): Likewise.
12651 (__arm_vaddq_m_n_f32): Likewise.
12652 (__arm_vaddq_m_n_f16): Likewise.
12653 (__arm_vandq_m_f32): Likewise.
12654 (__arm_vandq_m_f16): Likewise.
12655 (__arm_vbicq_m_f32): Likewise.
12656 (__arm_vbicq_m_f16): Likewise.
12657 (__arm_vbrsrq_m_n_f32): Likewise.
12658 (__arm_vbrsrq_m_n_f16): Likewise.
12659 (__arm_vcaddq_rot270_m_f32): Likewise.
12660 (__arm_vcaddq_rot270_m_f16): Likewise.
12661 (__arm_vcaddq_rot90_m_f32): Likewise.
12662 (__arm_vcaddq_rot90_m_f16): Likewise.
12663 (__arm_vcmlaq_m_f32): Likewise.
12664 (__arm_vcmlaq_m_f16): Likewise.
12665 (__arm_vcmlaq_rot180_m_f32): Likewise.
12666 (__arm_vcmlaq_rot180_m_f16): Likewise.
12667 (__arm_vcmlaq_rot270_m_f32): Likewise.
12668 (__arm_vcmlaq_rot270_m_f16): Likewise.
12669 (__arm_vcmlaq_rot90_m_f32): Likewise.
12670 (__arm_vcmlaq_rot90_m_f16): Likewise.
12671 (__arm_vcmulq_m_f32): Likewise.
12672 (__arm_vcmulq_m_f16): Likewise.
12673 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
12674 (__arm_vcmulq_rot180_m_f16): Likewise.
12675 (__arm_vcmulq_rot270_m_f32): Likewise.
12676 (__arm_vcmulq_rot270_m_f16): Likewise.
12677 (__arm_vcmulq_rot90_m_f32): Likewise.
12678 (__arm_vcmulq_rot90_m_f16): Likewise.
12679 (__arm_vcvtq_m_n_s32_f32): Likewise.
12680 (__arm_vcvtq_m_n_s16_f16): Likewise.
12681 (__arm_vcvtq_m_n_u32_f32): Likewise.
12682 (__arm_vcvtq_m_n_u16_f16): Likewise.
12683 (__arm_veorq_m_f32): Likewise.
12684 (__arm_veorq_m_f16): Likewise.
12685 (__arm_vfmaq_m_f32): Likewise.
12686 (__arm_vfmaq_m_f16): Likewise.
12687 (__arm_vfmaq_m_n_f32): Likewise.
12688 (__arm_vfmaq_m_n_f16): Likewise.
12689 (__arm_vfmasq_m_n_f32): Likewise.
12690 (__arm_vfmasq_m_n_f16): Likewise.
12691 (__arm_vfmsq_m_f32): Likewise.
12692 (__arm_vfmsq_m_f16): Likewise.
12693 (__arm_vmaxnmq_m_f32): Likewise.
12694 (__arm_vmaxnmq_m_f16): Likewise.
12695 (__arm_vminnmq_m_f32): Likewise.
12696 (__arm_vminnmq_m_f16): Likewise.
12697 (__arm_vmulq_m_f32): Likewise.
12698 (__arm_vmulq_m_f16): Likewise.
12699 (__arm_vmulq_m_n_f32): Likewise.
12700 (__arm_vmulq_m_n_f16): Likewise.
12701 (__arm_vornq_m_f32): Likewise.
12702 (__arm_vornq_m_f16): Likewise.
12703 (__arm_vorrq_m_f32): Likewise.
12704 (__arm_vorrq_m_f16): Likewise.
12705 (__arm_vsubq_m_f32): Likewise.
12706 (__arm_vsubq_m_f16): Likewise.
12707 (__arm_vsubq_m_n_f32): Likewise.
12708 (__arm_vsubq_m_n_f16): Likewise.
12709 (vabdq_m): Define polymorphic variant.
12710 (vaddq_m): Likewise.
12711 (vaddq_m_n): Likewise.
12712 (vandq_m): Likewise.
12713 (vbicq_m): Likewise.
12714 (vbrsrq_m_n): Likewise.
12715 (vcaddq_rot270_m): Likewise.
12716 (vcaddq_rot90_m): Likewise.
12717 (vcmlaq_m): Likewise.
12718 (vcmlaq_rot180_m): Likewise.
12719 (vcmlaq_rot270_m): Likewise.
12720 (vcmlaq_rot90_m): Likewise.
12721 (vcmulq_m): Likewise.
12722 (vcmulq_rot180_m): Likewise.
12723 (vcmulq_rot270_m): Likewise.
12724 (vcmulq_rot90_m): Likewise.
12725 (veorq_m): Likewise.
12726 (vfmaq_m): Likewise.
12727 (vfmaq_m_n): Likewise.
12728 (vfmasq_m_n): Likewise.
12729 (vfmsq_m): Likewise.
12730 (vmaxnmq_m): Likewise.
12731 (vminnmq_m): Likewise.
12732 (vmulq_m): Likewise.
12733 (vmulq_m_n): Likewise.
12734 (vornq_m): Likewise.
12735 (vsubq_m): Likewise.
12736 (vsubq_m_n): Likewise.
12737 (vorrq_m): Likewise.
12738 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
12740 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
12741 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
12742 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
12743 (mve_vaddq_m_f<mode>): Likewise.
12744 (mve_vaddq_m_n_f<mode>): Likewise.
12745 (mve_vandq_m_f<mode>): Likewise.
12746 (mve_vbicq_m_f<mode>): Likewise.
12747 (mve_vbrsrq_m_n_f<mode>): Likewise.
12748 (mve_vcaddq_rot270_m_f<mode>): Likewise.
12749 (mve_vcaddq_rot90_m_f<mode>): Likewise.
12750 (mve_vcmlaq_m_f<mode>): Likewise.
12751 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
12752 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
12753 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
12754 (mve_vcmulq_m_f<mode>): Likewise.
12755 (mve_vcmulq_rot180_m_f<mode>): Likewise.
12756 (mve_vcmulq_rot270_m_f<mode>): Likewise.
12757 (mve_vcmulq_rot90_m_f<mode>): Likewise.
12758 (mve_veorq_m_f<mode>): Likewise.
12759 (mve_vfmaq_m_f<mode>): Likewise.
12760 (mve_vfmaq_m_n_f<mode>): Likewise.
12761 (mve_vfmasq_m_n_f<mode>): Likewise.
12762 (mve_vfmsq_m_f<mode>): Likewise.
12763 (mve_vmaxnmq_m_f<mode>): Likewise.
12764 (mve_vminnmq_m_f<mode>): Likewise.
12765 (mve_vmulq_m_f<mode>): Likewise.
12766 (mve_vmulq_m_n_f<mode>): Likewise.
12767 (mve_vornq_m_f<mode>): Likewise.
12768 (mve_vorrq_m_f<mode>): Likewise.
12769 (mve_vsubq_m_f<mode>): Likewise.
12770 (mve_vsubq_m_n_f<mode>): Likewise.
12772 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
12773 Mihail Ionescu <mihail.ionescu@arm.com>
12774 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12776 * config/arm/arm-protos.h (arm_mve_immediate_check):
12777 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
12778 mode and interger value.
12779 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
12780 (vmlaldavaq_p_s16): Likewise.
12781 (vmlaldavaq_p_u32): Likewise.
12782 (vmlaldavaq_p_u16): Likewise.
12783 (vmlaldavaxq_p_s32): Likewise.
12784 (vmlaldavaxq_p_s16): Likewise.
12785 (vmlaldavaxq_p_u32): Likewise.
12786 (vmlaldavaxq_p_u16): Likewise.
12787 (vmlsldavaq_p_s32): Likewise.
12788 (vmlsldavaq_p_s16): Likewise.
12789 (vmlsldavaxq_p_s32): Likewise.
12790 (vmlsldavaxq_p_s16): Likewise.
12791 (vmullbq_poly_m_p8): Likewise.
12792 (vmullbq_poly_m_p16): Likewise.
12793 (vmulltq_poly_m_p8): Likewise.
12794 (vmulltq_poly_m_p16): Likewise.
12795 (vqdmullbq_m_n_s32): Likewise.
12796 (vqdmullbq_m_n_s16): Likewise.
12797 (vqdmullbq_m_s32): Likewise.
12798 (vqdmullbq_m_s16): Likewise.
12799 (vqdmulltq_m_n_s32): Likewise.
12800 (vqdmulltq_m_n_s16): Likewise.
12801 (vqdmulltq_m_s32): Likewise.
12802 (vqdmulltq_m_s16): Likewise.
12803 (vqrshrnbq_m_n_s32): Likewise.
12804 (vqrshrnbq_m_n_s16): Likewise.
12805 (vqrshrnbq_m_n_u32): Likewise.
12806 (vqrshrnbq_m_n_u16): Likewise.
12807 (vqrshrntq_m_n_s32): Likewise.
12808 (vqrshrntq_m_n_s16): Likewise.
12809 (vqrshrntq_m_n_u32): Likewise.
12810 (vqrshrntq_m_n_u16): Likewise.
12811 (vqrshrunbq_m_n_s32): Likewise.
12812 (vqrshrunbq_m_n_s16): Likewise.
12813 (vqrshruntq_m_n_s32): Likewise.
12814 (vqrshruntq_m_n_s16): Likewise.
12815 (vqshrnbq_m_n_s32): Likewise.
12816 (vqshrnbq_m_n_s16): Likewise.
12817 (vqshrnbq_m_n_u32): Likewise.
12818 (vqshrnbq_m_n_u16): Likewise.
12819 (vqshrntq_m_n_s32): Likewise.
12820 (vqshrntq_m_n_s16): Likewise.
12821 (vqshrntq_m_n_u32): Likewise.
12822 (vqshrntq_m_n_u16): Likewise.
12823 (vqshrunbq_m_n_s32): Likewise.
12824 (vqshrunbq_m_n_s16): Likewise.
12825 (vqshruntq_m_n_s32): Likewise.
12826 (vqshruntq_m_n_s16): Likewise.
12827 (vrmlaldavhaq_p_s32): Likewise.
12828 (vrmlaldavhaq_p_u32): Likewise.
12829 (vrmlaldavhaxq_p_s32): Likewise.
12830 (vrmlsldavhaq_p_s32): Likewise.
12831 (vrmlsldavhaxq_p_s32): Likewise.
12832 (vrshrnbq_m_n_s32): Likewise.
12833 (vrshrnbq_m_n_s16): Likewise.
12834 (vrshrnbq_m_n_u32): Likewise.
12835 (vrshrnbq_m_n_u16): Likewise.
12836 (vrshrntq_m_n_s32): Likewise.
12837 (vrshrntq_m_n_s16): Likewise.
12838 (vrshrntq_m_n_u32): Likewise.
12839 (vrshrntq_m_n_u16): Likewise.
12840 (vshllbq_m_n_s8): Likewise.
12841 (vshllbq_m_n_s16): Likewise.
12842 (vshllbq_m_n_u8): Likewise.
12843 (vshllbq_m_n_u16): Likewise.
12844 (vshlltq_m_n_s8): Likewise.
12845 (vshlltq_m_n_s16): Likewise.
12846 (vshlltq_m_n_u8): Likewise.
12847 (vshlltq_m_n_u16): Likewise.
12848 (vshrnbq_m_n_s32): Likewise.
12849 (vshrnbq_m_n_s16): Likewise.
12850 (vshrnbq_m_n_u32): Likewise.
12851 (vshrnbq_m_n_u16): Likewise.
12852 (vshrntq_m_n_s32): Likewise.
12853 (vshrntq_m_n_s16): Likewise.
12854 (vshrntq_m_n_u32): Likewise.
12855 (vshrntq_m_n_u16): Likewise.
12856 (__arm_vmlaldavaq_p_s32): Define intrinsic.
12857 (__arm_vmlaldavaq_p_s16): Likewise.
12858 (__arm_vmlaldavaq_p_u32): Likewise.
12859 (__arm_vmlaldavaq_p_u16): Likewise.
12860 (__arm_vmlaldavaxq_p_s32): Likewise.
12861 (__arm_vmlaldavaxq_p_s16): Likewise.
12862 (__arm_vmlaldavaxq_p_u32): Likewise.
12863 (__arm_vmlaldavaxq_p_u16): Likewise.
12864 (__arm_vmlsldavaq_p_s32): Likewise.
12865 (__arm_vmlsldavaq_p_s16): Likewise.
12866 (__arm_vmlsldavaxq_p_s32): Likewise.
12867 (__arm_vmlsldavaxq_p_s16): Likewise.
12868 (__arm_vmullbq_poly_m_p8): Likewise.
12869 (__arm_vmullbq_poly_m_p16): Likewise.
12870 (__arm_vmulltq_poly_m_p8): Likewise.
12871 (__arm_vmulltq_poly_m_p16): Likewise.
12872 (__arm_vqdmullbq_m_n_s32): Likewise.
12873 (__arm_vqdmullbq_m_n_s16): Likewise.
12874 (__arm_vqdmullbq_m_s32): Likewise.
12875 (__arm_vqdmullbq_m_s16): Likewise.
12876 (__arm_vqdmulltq_m_n_s32): Likewise.
12877 (__arm_vqdmulltq_m_n_s16): Likewise.
12878 (__arm_vqdmulltq_m_s32): Likewise.
12879 (__arm_vqdmulltq_m_s16): Likewise.
12880 (__arm_vqrshrnbq_m_n_s32): Likewise.
12881 (__arm_vqrshrnbq_m_n_s16): Likewise.
12882 (__arm_vqrshrnbq_m_n_u32): Likewise.
12883 (__arm_vqrshrnbq_m_n_u16): Likewise.
12884 (__arm_vqrshrntq_m_n_s32): Likewise.
12885 (__arm_vqrshrntq_m_n_s16): Likewise.
12886 (__arm_vqrshrntq_m_n_u32): Likewise.
12887 (__arm_vqrshrntq_m_n_u16): Likewise.
12888 (__arm_vqrshrunbq_m_n_s32): Likewise.
12889 (__arm_vqrshrunbq_m_n_s16): Likewise.
12890 (__arm_vqrshruntq_m_n_s32): Likewise.
12891 (__arm_vqrshruntq_m_n_s16): Likewise.
12892 (__arm_vqshrnbq_m_n_s32): Likewise.
12893 (__arm_vqshrnbq_m_n_s16): Likewise.
12894 (__arm_vqshrnbq_m_n_u32): Likewise.
12895 (__arm_vqshrnbq_m_n_u16): Likewise.
12896 (__arm_vqshrntq_m_n_s32): Likewise.
12897 (__arm_vqshrntq_m_n_s16): Likewise.
12898 (__arm_vqshrntq_m_n_u32): Likewise.
12899 (__arm_vqshrntq_m_n_u16): Likewise.
12900 (__arm_vqshrunbq_m_n_s32): Likewise.
12901 (__arm_vqshrunbq_m_n_s16): Likewise.
12902 (__arm_vqshruntq_m_n_s32): Likewise.
12903 (__arm_vqshruntq_m_n_s16): Likewise.
12904 (__arm_vrmlaldavhaq_p_s32): Likewise.
12905 (__arm_vrmlaldavhaq_p_u32): Likewise.
12906 (__arm_vrmlaldavhaxq_p_s32): Likewise.
12907 (__arm_vrmlsldavhaq_p_s32): Likewise.
12908 (__arm_vrmlsldavhaxq_p_s32): Likewise.
12909 (__arm_vrshrnbq_m_n_s32): Likewise.
12910 (__arm_vrshrnbq_m_n_s16): Likewise.
12911 (__arm_vrshrnbq_m_n_u32): Likewise.
12912 (__arm_vrshrnbq_m_n_u16): Likewise.
12913 (__arm_vrshrntq_m_n_s32): Likewise.
12914 (__arm_vrshrntq_m_n_s16): Likewise.
12915 (__arm_vrshrntq_m_n_u32): Likewise.
12916 (__arm_vrshrntq_m_n_u16): Likewise.
12917 (__arm_vshllbq_m_n_s8): Likewise.
12918 (__arm_vshllbq_m_n_s16): Likewise.
12919 (__arm_vshllbq_m_n_u8): Likewise.
12920 (__arm_vshllbq_m_n_u16): Likewise.
12921 (__arm_vshlltq_m_n_s8): Likewise.
12922 (__arm_vshlltq_m_n_s16): Likewise.
12923 (__arm_vshlltq_m_n_u8): Likewise.
12924 (__arm_vshlltq_m_n_u16): Likewise.
12925 (__arm_vshrnbq_m_n_s32): Likewise.
12926 (__arm_vshrnbq_m_n_s16): Likewise.
12927 (__arm_vshrnbq_m_n_u32): Likewise.
12928 (__arm_vshrnbq_m_n_u16): Likewise.
12929 (__arm_vshrntq_m_n_s32): Likewise.
12930 (__arm_vshrntq_m_n_s16): Likewise.
12931 (__arm_vshrntq_m_n_u32): Likewise.
12932 (__arm_vshrntq_m_n_u16): Likewise.
12933 (vmullbq_poly_m): Define polymorphic variant.
12934 (vmulltq_poly_m): Likewise.
12935 (vshllbq_m): Likewise.
12936 (vshrntq_m_n): Likewise.
12937 (vshrnbq_m_n): Likewise.
12938 (vshlltq_m_n): Likewise.
12939 (vshllbq_m_n): Likewise.
12940 (vrshrntq_m_n): Likewise.
12941 (vrshrnbq_m_n): Likewise.
12942 (vqshruntq_m_n): Likewise.
12943 (vqshrunbq_m_n): Likewise.
12944 (vqdmullbq_m_n): Likewise.
12945 (vqdmullbq_m): Likewise.
12946 (vqdmulltq_m_n): Likewise.
12947 (vqdmulltq_m): Likewise.
12948 (vqrshrnbq_m_n): Likewise.
12949 (vqrshrntq_m_n): Likewise.
12950 (vqrshrunbq_m_n): Likewise.
12951 (vqrshruntq_m_n): Likewise.
12952 (vqshrnbq_m_n): Likewise.
12953 (vqshrntq_m_n): Likewise.
12954 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
12955 builtin qualifiers.
12956 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
12957 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
12958 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
12959 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
12960 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
12961 (VMLALDAVAXQ_P): Likewise.
12962 (VQRSHRNBQ_M_N): Likewise.
12963 (VQRSHRNTQ_M_N): Likewise.
12964 (VQSHRNBQ_M_N): Likewise.
12965 (VQSHRNTQ_M_N): Likewise.
12966 (VRSHRNBQ_M_N): Likewise.
12967 (VRSHRNTQ_M_N): Likewise.
12968 (VSHLLBQ_M_N): Likewise.
12969 (VSHLLTQ_M_N): Likewise.
12970 (VSHRNBQ_M_N): Likewise.
12971 (VSHRNTQ_M_N): Likewise.
12972 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
12973 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
12974 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
12975 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
12976 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
12977 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
12978 (mve_vrmlaldavhaq_p_sv4si): Likewise.
12979 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
12980 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
12981 (mve_vshllbq_m_n_<supf><mode>): Likewise.
12982 (mve_vshlltq_m_n_<supf><mode>): Likewise.
12983 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
12984 (mve_vshrntq_m_n_<supf><mode>): Likewise.
12985 (mve_vmlsldavaq_p_s<mode>): Likewise.
12986 (mve_vmlsldavaxq_p_s<mode>): Likewise.
12987 (mve_vmullbq_poly_m_p<mode>): Likewise.
12988 (mve_vmulltq_poly_m_p<mode>): Likewise.
12989 (mve_vqdmullbq_m_n_s<mode>): Likewise.
12990 (mve_vqdmullbq_m_s<mode>): Likewise.
12991 (mve_vqdmulltq_m_n_s<mode>): Likewise.
12992 (mve_vqdmulltq_m_s<mode>): Likewise.
12993 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
12994 (mve_vqrshruntq_m_n_s<mode>): Likewise.
12995 (mve_vqshrunbq_m_n_s<mode>): Likewise.
12996 (mve_vqshruntq_m_n_s<mode>): Likewise.
12997 (mve_vrmlaldavhaq_p_uv4si): Likewise.
12998 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
12999 (mve_vrmlsldavhaq_p_sv4si): Likewise.
13000 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
13002 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13003 Mihail Ionescu <mihail.ionescu@arm.com>
13004 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13006 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
13007 (vabdq_m_s32): Likewise.
13008 (vabdq_m_s16): Likewise.
13009 (vabdq_m_u8): Likewise.
13010 (vabdq_m_u32): Likewise.
13011 (vabdq_m_u16): Likewise.
13012 (vaddq_m_n_s8): Likewise.
13013 (vaddq_m_n_s32): Likewise.
13014 (vaddq_m_n_s16): Likewise.
13015 (vaddq_m_n_u8): Likewise.
13016 (vaddq_m_n_u32): Likewise.
13017 (vaddq_m_n_u16): Likewise.
13018 (vaddq_m_s8): Likewise.
13019 (vaddq_m_s32): Likewise.
13020 (vaddq_m_s16): Likewise.
13021 (vaddq_m_u8): Likewise.
13022 (vaddq_m_u32): Likewise.
13023 (vaddq_m_u16): Likewise.
13024 (vandq_m_s8): Likewise.
13025 (vandq_m_s32): Likewise.
13026 (vandq_m_s16): Likewise.
13027 (vandq_m_u8): Likewise.
13028 (vandq_m_u32): Likewise.
13029 (vandq_m_u16): Likewise.
13030 (vbicq_m_s8): Likewise.
13031 (vbicq_m_s32): Likewise.
13032 (vbicq_m_s16): Likewise.
13033 (vbicq_m_u8): Likewise.
13034 (vbicq_m_u32): Likewise.
13035 (vbicq_m_u16): Likewise.
13036 (vbrsrq_m_n_s8): Likewise.
13037 (vbrsrq_m_n_s32): Likewise.
13038 (vbrsrq_m_n_s16): Likewise.
13039 (vbrsrq_m_n_u8): Likewise.
13040 (vbrsrq_m_n_u32): Likewise.
13041 (vbrsrq_m_n_u16): Likewise.
13042 (vcaddq_rot270_m_s8): Likewise.
13043 (vcaddq_rot270_m_s32): Likewise.
13044 (vcaddq_rot270_m_s16): Likewise.
13045 (vcaddq_rot270_m_u8): Likewise.
13046 (vcaddq_rot270_m_u32): Likewise.
13047 (vcaddq_rot270_m_u16): Likewise.
13048 (vcaddq_rot90_m_s8): Likewise.
13049 (vcaddq_rot90_m_s32): Likewise.
13050 (vcaddq_rot90_m_s16): Likewise.
13051 (vcaddq_rot90_m_u8): Likewise.
13052 (vcaddq_rot90_m_u32): Likewise.
13053 (vcaddq_rot90_m_u16): Likewise.
13054 (veorq_m_s8): Likewise.
13055 (veorq_m_s32): Likewise.
13056 (veorq_m_s16): Likewise.
13057 (veorq_m_u8): Likewise.
13058 (veorq_m_u32): Likewise.
13059 (veorq_m_u16): Likewise.
13060 (vhaddq_m_n_s8): Likewise.
13061 (vhaddq_m_n_s32): Likewise.
13062 (vhaddq_m_n_s16): Likewise.
13063 (vhaddq_m_n_u8): Likewise.
13064 (vhaddq_m_n_u32): Likewise.
13065 (vhaddq_m_n_u16): Likewise.
13066 (vhaddq_m_s8): Likewise.
13067 (vhaddq_m_s32): Likewise.
13068 (vhaddq_m_s16): Likewise.
13069 (vhaddq_m_u8): Likewise.
13070 (vhaddq_m_u32): Likewise.
13071 (vhaddq_m_u16): Likewise.
13072 (vhcaddq_rot270_m_s8): Likewise.
13073 (vhcaddq_rot270_m_s32): Likewise.
13074 (vhcaddq_rot270_m_s16): Likewise.
13075 (vhcaddq_rot90_m_s8): Likewise.
13076 (vhcaddq_rot90_m_s32): Likewise.
13077 (vhcaddq_rot90_m_s16): Likewise.
13078 (vhsubq_m_n_s8): Likewise.
13079 (vhsubq_m_n_s32): Likewise.
13080 (vhsubq_m_n_s16): Likewise.
13081 (vhsubq_m_n_u8): Likewise.
13082 (vhsubq_m_n_u32): Likewise.
13083 (vhsubq_m_n_u16): Likewise.
13084 (vhsubq_m_s8): Likewise.
13085 (vhsubq_m_s32): Likewise.
13086 (vhsubq_m_s16): Likewise.
13087 (vhsubq_m_u8): Likewise.
13088 (vhsubq_m_u32): Likewise.
13089 (vhsubq_m_u16): Likewise.
13090 (vmaxq_m_s8): Likewise.
13091 (vmaxq_m_s32): Likewise.
13092 (vmaxq_m_s16): Likewise.
13093 (vmaxq_m_u8): Likewise.
13094 (vmaxq_m_u32): Likewise.
13095 (vmaxq_m_u16): Likewise.
13096 (vminq_m_s8): Likewise.
13097 (vminq_m_s32): Likewise.
13098 (vminq_m_s16): Likewise.
13099 (vminq_m_u8): Likewise.
13100 (vminq_m_u32): Likewise.
13101 (vminq_m_u16): Likewise.
13102 (vmladavaq_p_s8): Likewise.
13103 (vmladavaq_p_s32): Likewise.
13104 (vmladavaq_p_s16): Likewise.
13105 (vmladavaq_p_u8): Likewise.
13106 (vmladavaq_p_u32): Likewise.
13107 (vmladavaq_p_u16): Likewise.
13108 (vmladavaxq_p_s8): Likewise.
13109 (vmladavaxq_p_s32): Likewise.
13110 (vmladavaxq_p_s16): Likewise.
13111 (vmlaq_m_n_s8): Likewise.
13112 (vmlaq_m_n_s32): Likewise.
13113 (vmlaq_m_n_s16): Likewise.
13114 (vmlaq_m_n_u8): Likewise.
13115 (vmlaq_m_n_u32): Likewise.
13116 (vmlaq_m_n_u16): Likewise.
13117 (vmlasq_m_n_s8): Likewise.
13118 (vmlasq_m_n_s32): Likewise.
13119 (vmlasq_m_n_s16): Likewise.
13120 (vmlasq_m_n_u8): Likewise.
13121 (vmlasq_m_n_u32): Likewise.
13122 (vmlasq_m_n_u16): Likewise.
13123 (vmlsdavaq_p_s8): Likewise.
13124 (vmlsdavaq_p_s32): Likewise.
13125 (vmlsdavaq_p_s16): Likewise.
13126 (vmlsdavaxq_p_s8): Likewise.
13127 (vmlsdavaxq_p_s32): Likewise.
13128 (vmlsdavaxq_p_s16): Likewise.
13129 (vmulhq_m_s8): Likewise.
13130 (vmulhq_m_s32): Likewise.
13131 (vmulhq_m_s16): Likewise.
13132 (vmulhq_m_u8): Likewise.
13133 (vmulhq_m_u32): Likewise.
13134 (vmulhq_m_u16): Likewise.
13135 (vmullbq_int_m_s8): Likewise.
13136 (vmullbq_int_m_s32): Likewise.
13137 (vmullbq_int_m_s16): Likewise.
13138 (vmullbq_int_m_u8): Likewise.
13139 (vmullbq_int_m_u32): Likewise.
13140 (vmullbq_int_m_u16): Likewise.
13141 (vmulltq_int_m_s8): Likewise.
13142 (vmulltq_int_m_s32): Likewise.
13143 (vmulltq_int_m_s16): Likewise.
13144 (vmulltq_int_m_u8): Likewise.
13145 (vmulltq_int_m_u32): Likewise.
13146 (vmulltq_int_m_u16): Likewise.
13147 (vmulq_m_n_s8): Likewise.
13148 (vmulq_m_n_s32): Likewise.
13149 (vmulq_m_n_s16): Likewise.
13150 (vmulq_m_n_u8): Likewise.
13151 (vmulq_m_n_u32): Likewise.
13152 (vmulq_m_n_u16): Likewise.
13153 (vmulq_m_s8): Likewise.
13154 (vmulq_m_s32): Likewise.
13155 (vmulq_m_s16): Likewise.
13156 (vmulq_m_u8): Likewise.
13157 (vmulq_m_u32): Likewise.
13158 (vmulq_m_u16): Likewise.
13159 (vornq_m_s8): Likewise.
13160 (vornq_m_s32): Likewise.
13161 (vornq_m_s16): Likewise.
13162 (vornq_m_u8): Likewise.
13163 (vornq_m_u32): Likewise.
13164 (vornq_m_u16): Likewise.
13165 (vorrq_m_s8): Likewise.
13166 (vorrq_m_s32): Likewise.
13167 (vorrq_m_s16): Likewise.
13168 (vorrq_m_u8): Likewise.
13169 (vorrq_m_u32): Likewise.
13170 (vorrq_m_u16): Likewise.
13171 (vqaddq_m_n_s8): Likewise.
13172 (vqaddq_m_n_s32): Likewise.
13173 (vqaddq_m_n_s16): Likewise.
13174 (vqaddq_m_n_u8): Likewise.
13175 (vqaddq_m_n_u32): Likewise.
13176 (vqaddq_m_n_u16): Likewise.
13177 (vqaddq_m_s8): Likewise.
13178 (vqaddq_m_s32): Likewise.
13179 (vqaddq_m_s16): Likewise.
13180 (vqaddq_m_u8): Likewise.
13181 (vqaddq_m_u32): Likewise.
13182 (vqaddq_m_u16): Likewise.
13183 (vqdmladhq_m_s8): Likewise.
13184 (vqdmladhq_m_s32): Likewise.
13185 (vqdmladhq_m_s16): Likewise.
13186 (vqdmladhxq_m_s8): Likewise.
13187 (vqdmladhxq_m_s32): Likewise.
13188 (vqdmladhxq_m_s16): Likewise.
13189 (vqdmlahq_m_n_s8): Likewise.
13190 (vqdmlahq_m_n_s32): Likewise.
13191 (vqdmlahq_m_n_s16): Likewise.
13192 (vqdmlahq_m_n_u8): Likewise.
13193 (vqdmlahq_m_n_u32): Likewise.
13194 (vqdmlahq_m_n_u16): Likewise.
13195 (vqdmlsdhq_m_s8): Likewise.
13196 (vqdmlsdhq_m_s32): Likewise.
13197 (vqdmlsdhq_m_s16): Likewise.
13198 (vqdmlsdhxq_m_s8): Likewise.
13199 (vqdmlsdhxq_m_s32): Likewise.
13200 (vqdmlsdhxq_m_s16): Likewise.
13201 (vqdmulhq_m_n_s8): Likewise.
13202 (vqdmulhq_m_n_s32): Likewise.
13203 (vqdmulhq_m_n_s16): Likewise.
13204 (vqdmulhq_m_s8): Likewise.
13205 (vqdmulhq_m_s32): Likewise.
13206 (vqdmulhq_m_s16): Likewise.
13207 (vqrdmladhq_m_s8): Likewise.
13208 (vqrdmladhq_m_s32): Likewise.
13209 (vqrdmladhq_m_s16): Likewise.
13210 (vqrdmladhxq_m_s8): Likewise.
13211 (vqrdmladhxq_m_s32): Likewise.
13212 (vqrdmladhxq_m_s16): Likewise.
13213 (vqrdmlahq_m_n_s8): Likewise.
13214 (vqrdmlahq_m_n_s32): Likewise.
13215 (vqrdmlahq_m_n_s16): Likewise.
13216 (vqrdmlahq_m_n_u8): Likewise.
13217 (vqrdmlahq_m_n_u32): Likewise.
13218 (vqrdmlahq_m_n_u16): Likewise.
13219 (vqrdmlashq_m_n_s8): Likewise.
13220 (vqrdmlashq_m_n_s32): Likewise.
13221 (vqrdmlashq_m_n_s16): Likewise.
13222 (vqrdmlashq_m_n_u8): Likewise.
13223 (vqrdmlashq_m_n_u32): Likewise.
13224 (vqrdmlashq_m_n_u16): Likewise.
13225 (vqrdmlsdhq_m_s8): Likewise.
13226 (vqrdmlsdhq_m_s32): Likewise.
13227 (vqrdmlsdhq_m_s16): Likewise.
13228 (vqrdmlsdhxq_m_s8): Likewise.
13229 (vqrdmlsdhxq_m_s32): Likewise.
13230 (vqrdmlsdhxq_m_s16): Likewise.
13231 (vqrdmulhq_m_n_s8): Likewise.
13232 (vqrdmulhq_m_n_s32): Likewise.
13233 (vqrdmulhq_m_n_s16): Likewise.
13234 (vqrdmulhq_m_s8): Likewise.
13235 (vqrdmulhq_m_s32): Likewise.
13236 (vqrdmulhq_m_s16): Likewise.
13237 (vqrshlq_m_s8): Likewise.
13238 (vqrshlq_m_s32): Likewise.
13239 (vqrshlq_m_s16): Likewise.
13240 (vqrshlq_m_u8): Likewise.
13241 (vqrshlq_m_u32): Likewise.
13242 (vqrshlq_m_u16): Likewise.
13243 (vqshlq_m_n_s8): Likewise.
13244 (vqshlq_m_n_s32): Likewise.
13245 (vqshlq_m_n_s16): Likewise.
13246 (vqshlq_m_n_u8): Likewise.
13247 (vqshlq_m_n_u32): Likewise.
13248 (vqshlq_m_n_u16): Likewise.
13249 (vqshlq_m_s8): Likewise.
13250 (vqshlq_m_s32): Likewise.
13251 (vqshlq_m_s16): Likewise.
13252 (vqshlq_m_u8): Likewise.
13253 (vqshlq_m_u32): Likewise.
13254 (vqshlq_m_u16): Likewise.
13255 (vqsubq_m_n_s8): Likewise.
13256 (vqsubq_m_n_s32): Likewise.
13257 (vqsubq_m_n_s16): Likewise.
13258 (vqsubq_m_n_u8): Likewise.
13259 (vqsubq_m_n_u32): Likewise.
13260 (vqsubq_m_n_u16): Likewise.
13261 (vqsubq_m_s8): Likewise.
13262 (vqsubq_m_s32): Likewise.
13263 (vqsubq_m_s16): Likewise.
13264 (vqsubq_m_u8): Likewise.
13265 (vqsubq_m_u32): Likewise.
13266 (vqsubq_m_u16): Likewise.
13267 (vrhaddq_m_s8): Likewise.
13268 (vrhaddq_m_s32): Likewise.
13269 (vrhaddq_m_s16): Likewise.
13270 (vrhaddq_m_u8): Likewise.
13271 (vrhaddq_m_u32): Likewise.
13272 (vrhaddq_m_u16): Likewise.
13273 (vrmulhq_m_s8): Likewise.
13274 (vrmulhq_m_s32): Likewise.
13275 (vrmulhq_m_s16): Likewise.
13276 (vrmulhq_m_u8): Likewise.
13277 (vrmulhq_m_u32): Likewise.
13278 (vrmulhq_m_u16): Likewise.
13279 (vrshlq_m_s8): Likewise.
13280 (vrshlq_m_s32): Likewise.
13281 (vrshlq_m_s16): Likewise.
13282 (vrshlq_m_u8): Likewise.
13283 (vrshlq_m_u32): Likewise.
13284 (vrshlq_m_u16): Likewise.
13285 (vrshrq_m_n_s8): Likewise.
13286 (vrshrq_m_n_s32): Likewise.
13287 (vrshrq_m_n_s16): Likewise.
13288 (vrshrq_m_n_u8): Likewise.
13289 (vrshrq_m_n_u32): Likewise.
13290 (vrshrq_m_n_u16): Likewise.
13291 (vshlq_m_n_s8): Likewise.
13292 (vshlq_m_n_s32): Likewise.
13293 (vshlq_m_n_s16): Likewise.
13294 (vshlq_m_n_u8): Likewise.
13295 (vshlq_m_n_u32): Likewise.
13296 (vshlq_m_n_u16): Likewise.
13297 (vshrq_m_n_s8): Likewise.
13298 (vshrq_m_n_s32): Likewise.
13299 (vshrq_m_n_s16): Likewise.
13300 (vshrq_m_n_u8): Likewise.
13301 (vshrq_m_n_u32): Likewise.
13302 (vshrq_m_n_u16): Likewise.
13303 (vsliq_m_n_s8): Likewise.
13304 (vsliq_m_n_s32): Likewise.
13305 (vsliq_m_n_s16): Likewise.
13306 (vsliq_m_n_u8): Likewise.
13307 (vsliq_m_n_u32): Likewise.
13308 (vsliq_m_n_u16): Likewise.
13309 (vsubq_m_n_s8): Likewise.
13310 (vsubq_m_n_s32): Likewise.
13311 (vsubq_m_n_s16): Likewise.
13312 (vsubq_m_n_u8): Likewise.
13313 (vsubq_m_n_u32): Likewise.
13314 (vsubq_m_n_u16): Likewise.
13315 (__arm_vabdq_m_s8): Define intrinsic.
13316 (__arm_vabdq_m_s32): Likewise.
13317 (__arm_vabdq_m_s16): Likewise.
13318 (__arm_vabdq_m_u8): Likewise.
13319 (__arm_vabdq_m_u32): Likewise.
13320 (__arm_vabdq_m_u16): Likewise.
13321 (__arm_vaddq_m_n_s8): Likewise.
13322 (__arm_vaddq_m_n_s32): Likewise.
13323 (__arm_vaddq_m_n_s16): Likewise.
13324 (__arm_vaddq_m_n_u8): Likewise.
13325 (__arm_vaddq_m_n_u32): Likewise.
13326 (__arm_vaddq_m_n_u16): Likewise.
13327 (__arm_vaddq_m_s8): Likewise.
13328 (__arm_vaddq_m_s32): Likewise.
13329 (__arm_vaddq_m_s16): Likewise.
13330 (__arm_vaddq_m_u8): Likewise.
13331 (__arm_vaddq_m_u32): Likewise.
13332 (__arm_vaddq_m_u16): Likewise.
13333 (__arm_vandq_m_s8): Likewise.
13334 (__arm_vandq_m_s32): Likewise.
13335 (__arm_vandq_m_s16): Likewise.
13336 (__arm_vandq_m_u8): Likewise.
13337 (__arm_vandq_m_u32): Likewise.
13338 (__arm_vandq_m_u16): Likewise.
13339 (__arm_vbicq_m_s8): Likewise.
13340 (__arm_vbicq_m_s32): Likewise.
13341 (__arm_vbicq_m_s16): Likewise.
13342 (__arm_vbicq_m_u8): Likewise.
13343 (__arm_vbicq_m_u32): Likewise.
13344 (__arm_vbicq_m_u16): Likewise.
13345 (__arm_vbrsrq_m_n_s8): Likewise.
13346 (__arm_vbrsrq_m_n_s32): Likewise.
13347 (__arm_vbrsrq_m_n_s16): Likewise.
13348 (__arm_vbrsrq_m_n_u8): Likewise.
13349 (__arm_vbrsrq_m_n_u32): Likewise.
13350 (__arm_vbrsrq_m_n_u16): Likewise.
13351 (__arm_vcaddq_rot270_m_s8): Likewise.
13352 (__arm_vcaddq_rot270_m_s32): Likewise.
13353 (__arm_vcaddq_rot270_m_s16): Likewise.
13354 (__arm_vcaddq_rot270_m_u8): Likewise.
13355 (__arm_vcaddq_rot270_m_u32): Likewise.
13356 (__arm_vcaddq_rot270_m_u16): Likewise.
13357 (__arm_vcaddq_rot90_m_s8): Likewise.
13358 (__arm_vcaddq_rot90_m_s32): Likewise.
13359 (__arm_vcaddq_rot90_m_s16): Likewise.
13360 (__arm_vcaddq_rot90_m_u8): Likewise.
13361 (__arm_vcaddq_rot90_m_u32): Likewise.
13362 (__arm_vcaddq_rot90_m_u16): Likewise.
13363 (__arm_veorq_m_s8): Likewise.
13364 (__arm_veorq_m_s32): Likewise.
13365 (__arm_veorq_m_s16): Likewise.
13366 (__arm_veorq_m_u8): Likewise.
13367 (__arm_veorq_m_u32): Likewise.
13368 (__arm_veorq_m_u16): Likewise.
13369 (__arm_vhaddq_m_n_s8): Likewise.
13370 (__arm_vhaddq_m_n_s32): Likewise.
13371 (__arm_vhaddq_m_n_s16): Likewise.
13372 (__arm_vhaddq_m_n_u8): Likewise.
13373 (__arm_vhaddq_m_n_u32): Likewise.
13374 (__arm_vhaddq_m_n_u16): Likewise.
13375 (__arm_vhaddq_m_s8): Likewise.
13376 (__arm_vhaddq_m_s32): Likewise.
13377 (__arm_vhaddq_m_s16): Likewise.
13378 (__arm_vhaddq_m_u8): Likewise.
13379 (__arm_vhaddq_m_u32): Likewise.
13380 (__arm_vhaddq_m_u16): Likewise.
13381 (__arm_vhcaddq_rot270_m_s8): Likewise.
13382 (__arm_vhcaddq_rot270_m_s32): Likewise.
13383 (__arm_vhcaddq_rot270_m_s16): Likewise.
13384 (__arm_vhcaddq_rot90_m_s8): Likewise.
13385 (__arm_vhcaddq_rot90_m_s32): Likewise.
13386 (__arm_vhcaddq_rot90_m_s16): Likewise.
13387 (__arm_vhsubq_m_n_s8): Likewise.
13388 (__arm_vhsubq_m_n_s32): Likewise.
13389 (__arm_vhsubq_m_n_s16): Likewise.
13390 (__arm_vhsubq_m_n_u8): Likewise.
13391 (__arm_vhsubq_m_n_u32): Likewise.
13392 (__arm_vhsubq_m_n_u16): Likewise.
13393 (__arm_vhsubq_m_s8): Likewise.
13394 (__arm_vhsubq_m_s32): Likewise.
13395 (__arm_vhsubq_m_s16): Likewise.
13396 (__arm_vhsubq_m_u8): Likewise.
13397 (__arm_vhsubq_m_u32): Likewise.
13398 (__arm_vhsubq_m_u16): Likewise.
13399 (__arm_vmaxq_m_s8): Likewise.
13400 (__arm_vmaxq_m_s32): Likewise.
13401 (__arm_vmaxq_m_s16): Likewise.
13402 (__arm_vmaxq_m_u8): Likewise.
13403 (__arm_vmaxq_m_u32): Likewise.
13404 (__arm_vmaxq_m_u16): Likewise.
13405 (__arm_vminq_m_s8): Likewise.
13406 (__arm_vminq_m_s32): Likewise.
13407 (__arm_vminq_m_s16): Likewise.
13408 (__arm_vminq_m_u8): Likewise.
13409 (__arm_vminq_m_u32): Likewise.
13410 (__arm_vminq_m_u16): Likewise.
13411 (__arm_vmladavaq_p_s8): Likewise.
13412 (__arm_vmladavaq_p_s32): Likewise.
13413 (__arm_vmladavaq_p_s16): Likewise.
13414 (__arm_vmladavaq_p_u8): Likewise.
13415 (__arm_vmladavaq_p_u32): Likewise.
13416 (__arm_vmladavaq_p_u16): Likewise.
13417 (__arm_vmladavaxq_p_s8): Likewise.
13418 (__arm_vmladavaxq_p_s32): Likewise.
13419 (__arm_vmladavaxq_p_s16): Likewise.
13420 (__arm_vmlaq_m_n_s8): Likewise.
13421 (__arm_vmlaq_m_n_s32): Likewise.
13422 (__arm_vmlaq_m_n_s16): Likewise.
13423 (__arm_vmlaq_m_n_u8): Likewise.
13424 (__arm_vmlaq_m_n_u32): Likewise.
13425 (__arm_vmlaq_m_n_u16): Likewise.
13426 (__arm_vmlasq_m_n_s8): Likewise.
13427 (__arm_vmlasq_m_n_s32): Likewise.
13428 (__arm_vmlasq_m_n_s16): Likewise.
13429 (__arm_vmlasq_m_n_u8): Likewise.
13430 (__arm_vmlasq_m_n_u32): Likewise.
13431 (__arm_vmlasq_m_n_u16): Likewise.
13432 (__arm_vmlsdavaq_p_s8): Likewise.
13433 (__arm_vmlsdavaq_p_s32): Likewise.
13434 (__arm_vmlsdavaq_p_s16): Likewise.
13435 (__arm_vmlsdavaxq_p_s8): Likewise.
13436 (__arm_vmlsdavaxq_p_s32): Likewise.
13437 (__arm_vmlsdavaxq_p_s16): Likewise.
13438 (__arm_vmulhq_m_s8): Likewise.
13439 (__arm_vmulhq_m_s32): Likewise.
13440 (__arm_vmulhq_m_s16): Likewise.
13441 (__arm_vmulhq_m_u8): Likewise.
13442 (__arm_vmulhq_m_u32): Likewise.
13443 (__arm_vmulhq_m_u16): Likewise.
13444 (__arm_vmullbq_int_m_s8): Likewise.
13445 (__arm_vmullbq_int_m_s32): Likewise.
13446 (__arm_vmullbq_int_m_s16): Likewise.
13447 (__arm_vmullbq_int_m_u8): Likewise.
13448 (__arm_vmullbq_int_m_u32): Likewise.
13449 (__arm_vmullbq_int_m_u16): Likewise.
13450 (__arm_vmulltq_int_m_s8): Likewise.
13451 (__arm_vmulltq_int_m_s32): Likewise.
13452 (__arm_vmulltq_int_m_s16): Likewise.
13453 (__arm_vmulltq_int_m_u8): Likewise.
13454 (__arm_vmulltq_int_m_u32): Likewise.
13455 (__arm_vmulltq_int_m_u16): Likewise.
13456 (__arm_vmulq_m_n_s8): Likewise.
13457 (__arm_vmulq_m_n_s32): Likewise.
13458 (__arm_vmulq_m_n_s16): Likewise.
13459 (__arm_vmulq_m_n_u8): Likewise.
13460 (__arm_vmulq_m_n_u32): Likewise.
13461 (__arm_vmulq_m_n_u16): Likewise.
13462 (__arm_vmulq_m_s8): Likewise.
13463 (__arm_vmulq_m_s32): Likewise.
13464 (__arm_vmulq_m_s16): Likewise.
13465 (__arm_vmulq_m_u8): Likewise.
13466 (__arm_vmulq_m_u32): Likewise.
13467 (__arm_vmulq_m_u16): Likewise.
13468 (__arm_vornq_m_s8): Likewise.
13469 (__arm_vornq_m_s32): Likewise.
13470 (__arm_vornq_m_s16): Likewise.
13471 (__arm_vornq_m_u8): Likewise.
13472 (__arm_vornq_m_u32): Likewise.
13473 (__arm_vornq_m_u16): Likewise.
13474 (__arm_vorrq_m_s8): Likewise.
13475 (__arm_vorrq_m_s32): Likewise.
13476 (__arm_vorrq_m_s16): Likewise.
13477 (__arm_vorrq_m_u8): Likewise.
13478 (__arm_vorrq_m_u32): Likewise.
13479 (__arm_vorrq_m_u16): Likewise.
13480 (__arm_vqaddq_m_n_s8): Likewise.
13481 (__arm_vqaddq_m_n_s32): Likewise.
13482 (__arm_vqaddq_m_n_s16): Likewise.
13483 (__arm_vqaddq_m_n_u8): Likewise.
13484 (__arm_vqaddq_m_n_u32): Likewise.
13485 (__arm_vqaddq_m_n_u16): Likewise.
13486 (__arm_vqaddq_m_s8): Likewise.
13487 (__arm_vqaddq_m_s32): Likewise.
13488 (__arm_vqaddq_m_s16): Likewise.
13489 (__arm_vqaddq_m_u8): Likewise.
13490 (__arm_vqaddq_m_u32): Likewise.
13491 (__arm_vqaddq_m_u16): Likewise.
13492 (__arm_vqdmladhq_m_s8): Likewise.
13493 (__arm_vqdmladhq_m_s32): Likewise.
13494 (__arm_vqdmladhq_m_s16): Likewise.
13495 (__arm_vqdmladhxq_m_s8): Likewise.
13496 (__arm_vqdmladhxq_m_s32): Likewise.
13497 (__arm_vqdmladhxq_m_s16): Likewise.
13498 (__arm_vqdmlahq_m_n_s8): Likewise.
13499 (__arm_vqdmlahq_m_n_s32): Likewise.
13500 (__arm_vqdmlahq_m_n_s16): Likewise.
13501 (__arm_vqdmlahq_m_n_u8): Likewise.
13502 (__arm_vqdmlahq_m_n_u32): Likewise.
13503 (__arm_vqdmlahq_m_n_u16): Likewise.
13504 (__arm_vqdmlsdhq_m_s8): Likewise.
13505 (__arm_vqdmlsdhq_m_s32): Likewise.
13506 (__arm_vqdmlsdhq_m_s16): Likewise.
13507 (__arm_vqdmlsdhxq_m_s8): Likewise.
13508 (__arm_vqdmlsdhxq_m_s32): Likewise.
13509 (__arm_vqdmlsdhxq_m_s16): Likewise.
13510 (__arm_vqdmulhq_m_n_s8): Likewise.
13511 (__arm_vqdmulhq_m_n_s32): Likewise.
13512 (__arm_vqdmulhq_m_n_s16): Likewise.
13513 (__arm_vqdmulhq_m_s8): Likewise.
13514 (__arm_vqdmulhq_m_s32): Likewise.
13515 (__arm_vqdmulhq_m_s16): Likewise.
13516 (__arm_vqrdmladhq_m_s8): Likewise.
13517 (__arm_vqrdmladhq_m_s32): Likewise.
13518 (__arm_vqrdmladhq_m_s16): Likewise.
13519 (__arm_vqrdmladhxq_m_s8): Likewise.
13520 (__arm_vqrdmladhxq_m_s32): Likewise.
13521 (__arm_vqrdmladhxq_m_s16): Likewise.
13522 (__arm_vqrdmlahq_m_n_s8): Likewise.
13523 (__arm_vqrdmlahq_m_n_s32): Likewise.
13524 (__arm_vqrdmlahq_m_n_s16): Likewise.
13525 (__arm_vqrdmlahq_m_n_u8): Likewise.
13526 (__arm_vqrdmlahq_m_n_u32): Likewise.
13527 (__arm_vqrdmlahq_m_n_u16): Likewise.
13528 (__arm_vqrdmlashq_m_n_s8): Likewise.
13529 (__arm_vqrdmlashq_m_n_s32): Likewise.
13530 (__arm_vqrdmlashq_m_n_s16): Likewise.
13531 (__arm_vqrdmlashq_m_n_u8): Likewise.
13532 (__arm_vqrdmlashq_m_n_u32): Likewise.
13533 (__arm_vqrdmlashq_m_n_u16): Likewise.
13534 (__arm_vqrdmlsdhq_m_s8): Likewise.
13535 (__arm_vqrdmlsdhq_m_s32): Likewise.
13536 (__arm_vqrdmlsdhq_m_s16): Likewise.
13537 (__arm_vqrdmlsdhxq_m_s8): Likewise.
13538 (__arm_vqrdmlsdhxq_m_s32): Likewise.
13539 (__arm_vqrdmlsdhxq_m_s16): Likewise.
13540 (__arm_vqrdmulhq_m_n_s8): Likewise.
13541 (__arm_vqrdmulhq_m_n_s32): Likewise.
13542 (__arm_vqrdmulhq_m_n_s16): Likewise.
13543 (__arm_vqrdmulhq_m_s8): Likewise.
13544 (__arm_vqrdmulhq_m_s32): Likewise.
13545 (__arm_vqrdmulhq_m_s16): Likewise.
13546 (__arm_vqrshlq_m_s8): Likewise.
13547 (__arm_vqrshlq_m_s32): Likewise.
13548 (__arm_vqrshlq_m_s16): Likewise.
13549 (__arm_vqrshlq_m_u8): Likewise.
13550 (__arm_vqrshlq_m_u32): Likewise.
13551 (__arm_vqrshlq_m_u16): Likewise.
13552 (__arm_vqshlq_m_n_s8): Likewise.
13553 (__arm_vqshlq_m_n_s32): Likewise.
13554 (__arm_vqshlq_m_n_s16): Likewise.
13555 (__arm_vqshlq_m_n_u8): Likewise.
13556 (__arm_vqshlq_m_n_u32): Likewise.
13557 (__arm_vqshlq_m_n_u16): Likewise.
13558 (__arm_vqshlq_m_s8): Likewise.
13559 (__arm_vqshlq_m_s32): Likewise.
13560 (__arm_vqshlq_m_s16): Likewise.
13561 (__arm_vqshlq_m_u8): Likewise.
13562 (__arm_vqshlq_m_u32): Likewise.
13563 (__arm_vqshlq_m_u16): Likewise.
13564 (__arm_vqsubq_m_n_s8): Likewise.
13565 (__arm_vqsubq_m_n_s32): Likewise.
13566 (__arm_vqsubq_m_n_s16): Likewise.
13567 (__arm_vqsubq_m_n_u8): Likewise.
13568 (__arm_vqsubq_m_n_u32): Likewise.
13569 (__arm_vqsubq_m_n_u16): Likewise.
13570 (__arm_vqsubq_m_s8): Likewise.
13571 (__arm_vqsubq_m_s32): Likewise.
13572 (__arm_vqsubq_m_s16): Likewise.
13573 (__arm_vqsubq_m_u8): Likewise.
13574 (__arm_vqsubq_m_u32): Likewise.
13575 (__arm_vqsubq_m_u16): Likewise.
13576 (__arm_vrhaddq_m_s8): Likewise.
13577 (__arm_vrhaddq_m_s32): Likewise.
13578 (__arm_vrhaddq_m_s16): Likewise.
13579 (__arm_vrhaddq_m_u8): Likewise.
13580 (__arm_vrhaddq_m_u32): Likewise.
13581 (__arm_vrhaddq_m_u16): Likewise.
13582 (__arm_vrmulhq_m_s8): Likewise.
13583 (__arm_vrmulhq_m_s32): Likewise.
13584 (__arm_vrmulhq_m_s16): Likewise.
13585 (__arm_vrmulhq_m_u8): Likewise.
13586 (__arm_vrmulhq_m_u32): Likewise.
13587 (__arm_vrmulhq_m_u16): Likewise.
13588 (__arm_vrshlq_m_s8): Likewise.
13589 (__arm_vrshlq_m_s32): Likewise.
13590 (__arm_vrshlq_m_s16): Likewise.
13591 (__arm_vrshlq_m_u8): Likewise.
13592 (__arm_vrshlq_m_u32): Likewise.
13593 (__arm_vrshlq_m_u16): Likewise.
13594 (__arm_vrshrq_m_n_s8): Likewise.
13595 (__arm_vrshrq_m_n_s32): Likewise.
13596 (__arm_vrshrq_m_n_s16): Likewise.
13597 (__arm_vrshrq_m_n_u8): Likewise.
13598 (__arm_vrshrq_m_n_u32): Likewise.
13599 (__arm_vrshrq_m_n_u16): Likewise.
13600 (__arm_vshlq_m_n_s8): Likewise.
13601 (__arm_vshlq_m_n_s32): Likewise.
13602 (__arm_vshlq_m_n_s16): Likewise.
13603 (__arm_vshlq_m_n_u8): Likewise.
13604 (__arm_vshlq_m_n_u32): Likewise.
13605 (__arm_vshlq_m_n_u16): Likewise.
13606 (__arm_vshrq_m_n_s8): Likewise.
13607 (__arm_vshrq_m_n_s32): Likewise.
13608 (__arm_vshrq_m_n_s16): Likewise.
13609 (__arm_vshrq_m_n_u8): Likewise.
13610 (__arm_vshrq_m_n_u32): Likewise.
13611 (__arm_vshrq_m_n_u16): Likewise.
13612 (__arm_vsliq_m_n_s8): Likewise.
13613 (__arm_vsliq_m_n_s32): Likewise.
13614 (__arm_vsliq_m_n_s16): Likewise.
13615 (__arm_vsliq_m_n_u8): Likewise.
13616 (__arm_vsliq_m_n_u32): Likewise.
13617 (__arm_vsliq_m_n_u16): Likewise.
13618 (__arm_vsubq_m_n_s8): Likewise.
13619 (__arm_vsubq_m_n_s32): Likewise.
13620 (__arm_vsubq_m_n_s16): Likewise.
13621 (__arm_vsubq_m_n_u8): Likewise.
13622 (__arm_vsubq_m_n_u32): Likewise.
13623 (__arm_vsubq_m_n_u16): Likewise.
13624 (vqdmladhq_m): Define polymorphic variant.
13625 (vqdmladhxq_m): Likewise.
13626 (vqdmlsdhq_m): Likewise.
13627 (vqdmlsdhxq_m): Likewise.
13628 (vabdq_m): Likewise.
13629 (vandq_m): Likewise.
13630 (vbicq_m): Likewise.
13631 (vbrsrq_m_n): Likewise.
13632 (vcaddq_rot270_m): Likewise.
13633 (vcaddq_rot90_m): Likewise.
13634 (veorq_m): Likewise.
13635 (vmaxq_m): Likewise.
13636 (vminq_m): Likewise.
13637 (vmladavaq_p): Likewise.
13638 (vmlaq_m_n): Likewise.
13639 (vmlasq_m_n): Likewise.
13640 (vmulhq_m): Likewise.
13641 (vmullbq_int_m): Likewise.
13642 (vmulltq_int_m): Likewise.
13643 (vornq_m): Likewise.
13644 (vorrq_m): Likewise.
13645 (vqdmlahq_m_n): Likewise.
13646 (vqrdmlahq_m_n): Likewise.
13647 (vqrdmlashq_m_n): Likewise.
13648 (vqrshlq_m): Likewise.
13649 (vqshlq_m_n): Likewise.
13650 (vqshlq_m): Likewise.
13651 (vrhaddq_m): Likewise.
13652 (vrmulhq_m): Likewise.
13653 (vrshlq_m): Likewise.
13654 (vrshrq_m_n): Likewise.
13655 (vshlq_m_n): Likewise.
13656 (vshrq_m_n): Likewise.
13657 (vsliq_m): Likewise.
13658 (vaddq_m_n): Likewise.
13659 (vaddq_m): Likewise.
13660 (vhaddq_m_n): Likewise.
13661 (vhaddq_m): Likewise.
13662 (vhcaddq_rot270_m): Likewise.
13663 (vhcaddq_rot90_m): Likewise.
13664 (vhsubq_m): Likewise.
13665 (vhsubq_m_n): Likewise.
13666 (vmulq_m_n): Likewise.
13667 (vmulq_m): Likewise.
13668 (vqaddq_m_n): Likewise.
13669 (vqaddq_m): Likewise.
13670 (vqdmulhq_m_n): Likewise.
13671 (vqdmulhq_m): Likewise.
13672 (vsubq_m_n): Likewise.
13673 (vsliq_m_n): Likewise.
13674 (vqsubq_m_n): Likewise.
13675 (vqsubq_m): Likewise.
13676 (vqrdmulhq_m): Likewise.
13677 (vqrdmulhq_m_n): Likewise.
13678 (vqrdmlsdhxq_m): Likewise.
13679 (vqrdmlsdhq_m): Likewise.
13680 (vqrdmladhq_m): Likewise.
13681 (vqrdmladhxq_m): Likewise.
13682 (vmlsdavaxq_p): Likewise.
13683 (vmlsdavaq_p): Likewise.
13684 (vmladavaxq_p): Likewise.
13685 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
13687 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
13688 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
13689 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
13690 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
13691 * config/arm/mve.md (VHSUBQ_M): Define iterators.
13692 (VSLIQ_M_N): Likewise.
13693 (VQRDMLAHQ_M_N): Likewise.
13694 (VRSHLQ_M): Likewise.
13695 (VMINQ_M): Likewise.
13696 (VMULLBQ_INT_M): Likewise.
13697 (VMULHQ_M): Likewise.
13698 (VMULQ_M): Likewise.
13699 (VHSUBQ_M_N): Likewise.
13700 (VHADDQ_M_N): Likewise.
13701 (VORRQ_M): Likewise.
13702 (VRMULHQ_M): Likewise.
13703 (VQADDQ_M): Likewise.
13704 (VRSHRQ_M_N): Likewise.
13705 (VQSUBQ_M_N): Likewise.
13706 (VADDQ_M): Likewise.
13707 (VORNQ_M): Likewise.
13708 (VQDMLAHQ_M_N): Likewise.
13709 (VRHADDQ_M): Likewise.
13710 (VQSHLQ_M): Likewise.
13711 (VANDQ_M): Likewise.
13712 (VBICQ_M): Likewise.
13713 (VSHLQ_M_N): Likewise.
13714 (VCADDQ_ROT270_M): Likewise.
13715 (VQRSHLQ_M): Likewise.
13716 (VQADDQ_M_N): Likewise.
13717 (VADDQ_M_N): Likewise.
13718 (VMAXQ_M): Likewise.
13719 (VQSUBQ_M): Likewise.
13720 (VMLASQ_M_N): Likewise.
13721 (VMLADAVAQ_P): Likewise.
13722 (VBRSRQ_M_N): Likewise.
13723 (VMULQ_M_N): Likewise.
13724 (VCADDQ_ROT90_M): Likewise.
13725 (VMULLTQ_INT_M): Likewise.
13726 (VEORQ_M): Likewise.
13727 (VSHRQ_M_N): Likewise.
13728 (VSUBQ_M_N): Likewise.
13729 (VHADDQ_M): Likewise.
13730 (VABDQ_M): Likewise.
13731 (VQRDMLASHQ_M_N): Likewise.
13732 (VMLAQ_M_N): Likewise.
13733 (VQSHLQ_M_N): Likewise.
13734 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
13735 (mve_vaddq_m_n_<supf><mode>): Likewise.
13736 (mve_vaddq_m_<supf><mode>): Likewise.
13737 (mve_vandq_m_<supf><mode>): Likewise.
13738 (mve_vbicq_m_<supf><mode>): Likewise.
13739 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
13740 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
13741 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
13742 (mve_veorq_m_<supf><mode>): Likewise.
13743 (mve_vhaddq_m_n_<supf><mode>): Likewise.
13744 (mve_vhaddq_m_<supf><mode>): Likewise.
13745 (mve_vhsubq_m_n_<supf><mode>): Likewise.
13746 (mve_vhsubq_m_<supf><mode>): Likewise.
13747 (mve_vmaxq_m_<supf><mode>): Likewise.
13748 (mve_vminq_m_<supf><mode>): Likewise.
13749 (mve_vmladavaq_p_<supf><mode>): Likewise.
13750 (mve_vmlaq_m_n_<supf><mode>): Likewise.
13751 (mve_vmlasq_m_n_<supf><mode>): Likewise.
13752 (mve_vmulhq_m_<supf><mode>): Likewise.
13753 (mve_vmullbq_int_m_<supf><mode>): Likewise.
13754 (mve_vmulltq_int_m_<supf><mode>): Likewise.
13755 (mve_vmulq_m_n_<supf><mode>): Likewise.
13756 (mve_vmulq_m_<supf><mode>): Likewise.
13757 (mve_vornq_m_<supf><mode>): Likewise.
13758 (mve_vorrq_m_<supf><mode>): Likewise.
13759 (mve_vqaddq_m_n_<supf><mode>): Likewise.
13760 (mve_vqaddq_m_<supf><mode>): Likewise.
13761 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
13762 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
13763 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
13764 (mve_vqrshlq_m_<supf><mode>): Likewise.
13765 (mve_vqshlq_m_n_<supf><mode>): Likewise.
13766 (mve_vqshlq_m_<supf><mode>): Likewise.
13767 (mve_vqsubq_m_n_<supf><mode>): Likewise.
13768 (mve_vqsubq_m_<supf><mode>): Likewise.
13769 (mve_vrhaddq_m_<supf><mode>): Likewise.
13770 (mve_vrmulhq_m_<supf><mode>): Likewise.
13771 (mve_vrshlq_m_<supf><mode>): Likewise.
13772 (mve_vrshrq_m_n_<supf><mode>): Likewise.
13773 (mve_vshlq_m_n_<supf><mode>): Likewise.
13774 (mve_vshrq_m_n_<supf><mode>): Likewise.
13775 (mve_vsliq_m_n_<supf><mode>): Likewise.
13776 (mve_vsubq_m_n_<supf><mode>): Likewise.
13777 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
13778 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
13779 (mve_vmladavaxq_p_s<mode>): Likewise.
13780 (mve_vmlsdavaq_p_s<mode>): Likewise.
13781 (mve_vmlsdavaxq_p_s<mode>): Likewise.
13782 (mve_vqdmladhq_m_s<mode>): Likewise.
13783 (mve_vqdmladhxq_m_s<mode>): Likewise.
13784 (mve_vqdmlsdhq_m_s<mode>): Likewise.
13785 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
13786 (mve_vqdmulhq_m_n_s<mode>): Likewise.
13787 (mve_vqdmulhq_m_s<mode>): Likewise.
13788 (mve_vqrdmladhq_m_s<mode>): Likewise.
13789 (mve_vqrdmladhxq_m_s<mode>): Likewise.
13790 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
13791 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
13792 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
13793 (mve_vqrdmulhq_m_s<mode>): Likewise.
13795 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13796 Mihail Ionescu <mihail.ionescu@arm.com>
13797 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13799 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
13800 Define builtin qualifier.
13801 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13802 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13803 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13804 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13805 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13806 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13807 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
13808 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
13809 (vsubq_m_s8): Likewise.
13810 (vcvtq_m_n_f16_u16): Likewise.
13811 (vqshluq_m_n_s8): Likewise.
13812 (vabavq_p_s8): Likewise.
13813 (vsriq_m_n_u8): Likewise.
13814 (vshlq_m_u8): Likewise.
13815 (vsubq_m_u8): Likewise.
13816 (vabavq_p_u8): Likewise.
13817 (vshlq_m_s8): Likewise.
13818 (vcvtq_m_n_f16_s16): Likewise.
13819 (vsriq_m_n_s16): Likewise.
13820 (vsubq_m_s16): Likewise.
13821 (vcvtq_m_n_f32_u32): Likewise.
13822 (vqshluq_m_n_s16): Likewise.
13823 (vabavq_p_s16): Likewise.
13824 (vsriq_m_n_u16): Likewise.
13825 (vshlq_m_u16): Likewise.
13826 (vsubq_m_u16): Likewise.
13827 (vabavq_p_u16): Likewise.
13828 (vshlq_m_s16): Likewise.
13829 (vcvtq_m_n_f32_s32): Likewise.
13830 (vsriq_m_n_s32): Likewise.
13831 (vsubq_m_s32): Likewise.
13832 (vqshluq_m_n_s32): Likewise.
13833 (vabavq_p_s32): Likewise.
13834 (vsriq_m_n_u32): Likewise.
13835 (vshlq_m_u32): Likewise.
13836 (vsubq_m_u32): Likewise.
13837 (vabavq_p_u32): Likewise.
13838 (vshlq_m_s32): Likewise.
13839 (__arm_vsriq_m_n_s8): Define intrinsic.
13840 (__arm_vsubq_m_s8): Likewise.
13841 (__arm_vqshluq_m_n_s8): Likewise.
13842 (__arm_vabavq_p_s8): Likewise.
13843 (__arm_vsriq_m_n_u8): Likewise.
13844 (__arm_vshlq_m_u8): Likewise.
13845 (__arm_vsubq_m_u8): Likewise.
13846 (__arm_vabavq_p_u8): Likewise.
13847 (__arm_vshlq_m_s8): Likewise.
13848 (__arm_vsriq_m_n_s16): Likewise.
13849 (__arm_vsubq_m_s16): Likewise.
13850 (__arm_vqshluq_m_n_s16): Likewise.
13851 (__arm_vabavq_p_s16): Likewise.
13852 (__arm_vsriq_m_n_u16): Likewise.
13853 (__arm_vshlq_m_u16): Likewise.
13854 (__arm_vsubq_m_u16): Likewise.
13855 (__arm_vabavq_p_u16): Likewise.
13856 (__arm_vshlq_m_s16): Likewise.
13857 (__arm_vsriq_m_n_s32): Likewise.
13858 (__arm_vsubq_m_s32): Likewise.
13859 (__arm_vqshluq_m_n_s32): Likewise.
13860 (__arm_vabavq_p_s32): Likewise.
13861 (__arm_vsriq_m_n_u32): Likewise.
13862 (__arm_vshlq_m_u32): Likewise.
13863 (__arm_vsubq_m_u32): Likewise.
13864 (__arm_vabavq_p_u32): Likewise.
13865 (__arm_vshlq_m_s32): Likewise.
13866 (__arm_vcvtq_m_n_f16_u16): Likewise.
13867 (__arm_vcvtq_m_n_f16_s16): Likewise.
13868 (__arm_vcvtq_m_n_f32_u32): Likewise.
13869 (__arm_vcvtq_m_n_f32_s32): Likewise.
13870 (vcvtq_m_n): Define polymorphic variant.
13871 (vqshluq_m_n): Likewise.
13872 (vshlq_m): Likewise.
13873 (vsriq_m_n): Likewise.
13874 (vsubq_m): Likewise.
13875 (vabavq_p): Likewise.
13876 * config/arm/arm_mve_builtins.def
13877 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
13878 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
13879 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13880 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13881 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
13882 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13883 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
13884 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
13885 * config/arm/mve.md (VABAVQ_P): Define iterator.
13886 (VSHLQ_M): Likewise.
13887 (VSRIQ_M_N): Likewise.
13888 (VSUBQ_M): Likewise.
13889 (VCVTQ_M_N_TO_F): Likewise.
13890 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
13891 (mve_vqshluq_m_n_s<mode>): Likewise.
13892 (mve_vshlq_m_<supf><mode>): Likewise.
13893 (mve_vsriq_m_n_<supf><mode>): Likewise.
13894 (mve_vsubq_m_<supf><mode>): Likewise.
13895 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
13897 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
13898 Mihail Ionescu <mihail.ionescu@arm.com>
13899 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13901 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
13902 (vrmlsldavhaq_s32): Likewise.
13903 (vrmlsldavhaxq_s32): Likewise.
13904 (vaddlvaq_p_s32): Likewise.
13905 (vcvtbq_m_f16_f32): Likewise.
13906 (vcvtbq_m_f32_f16): Likewise.
13907 (vcvttq_m_f16_f32): Likewise.
13908 (vcvttq_m_f32_f16): Likewise.
13909 (vrev16q_m_s8): Likewise.
13910 (vrev32q_m_f16): Likewise.
13911 (vrmlaldavhq_p_s32): Likewise.
13912 (vrmlaldavhxq_p_s32): Likewise.
13913 (vrmlsldavhq_p_s32): Likewise.
13914 (vrmlsldavhxq_p_s32): Likewise.
13915 (vaddlvaq_p_u32): Likewise.
13916 (vrev16q_m_u8): Likewise.
13917 (vrmlaldavhq_p_u32): Likewise.
13918 (vmvnq_m_n_s16): Likewise.
13919 (vorrq_m_n_s16): Likewise.
13920 (vqrshrntq_n_s16): Likewise.
13921 (vqshrnbq_n_s16): Likewise.
13922 (vqshrntq_n_s16): Likewise.
13923 (vrshrnbq_n_s16): Likewise.
13924 (vrshrntq_n_s16): Likewise.
13925 (vshrnbq_n_s16): Likewise.
13926 (vshrntq_n_s16): Likewise.
13927 (vcmlaq_f16): Likewise.
13928 (vcmlaq_rot180_f16): Likewise.
13929 (vcmlaq_rot270_f16): Likewise.
13930 (vcmlaq_rot90_f16): Likewise.
13931 (vfmaq_f16): Likewise.
13932 (vfmaq_n_f16): Likewise.
13933 (vfmasq_n_f16): Likewise.
13934 (vfmsq_f16): Likewise.
13935 (vmlaldavaq_s16): Likewise.
13936 (vmlaldavaxq_s16): Likewise.
13937 (vmlsldavaq_s16): Likewise.
13938 (vmlsldavaxq_s16): Likewise.
13939 (vabsq_m_f16): Likewise.
13940 (vcvtmq_m_s16_f16): Likewise.
13941 (vcvtnq_m_s16_f16): Likewise.
13942 (vcvtpq_m_s16_f16): Likewise.
13943 (vcvtq_m_s16_f16): Likewise.
13944 (vdupq_m_n_f16): Likewise.
13945 (vmaxnmaq_m_f16): Likewise.
13946 (vmaxnmavq_p_f16): Likewise.
13947 (vmaxnmvq_p_f16): Likewise.
13948 (vminnmaq_m_f16): Likewise.
13949 (vminnmavq_p_f16): Likewise.
13950 (vminnmvq_p_f16): Likewise.
13951 (vmlaldavq_p_s16): Likewise.
13952 (vmlaldavxq_p_s16): Likewise.
13953 (vmlsldavq_p_s16): Likewise.
13954 (vmlsldavxq_p_s16): Likewise.
13955 (vmovlbq_m_s8): Likewise.
13956 (vmovltq_m_s8): Likewise.
13957 (vmovnbq_m_s16): Likewise.
13958 (vmovntq_m_s16): Likewise.
13959 (vnegq_m_f16): Likewise.
13960 (vpselq_f16): Likewise.
13961 (vqmovnbq_m_s16): Likewise.
13962 (vqmovntq_m_s16): Likewise.
13963 (vrev32q_m_s8): Likewise.
13964 (vrev64q_m_f16): Likewise.
13965 (vrndaq_m_f16): Likewise.
13966 (vrndmq_m_f16): Likewise.
13967 (vrndnq_m_f16): Likewise.
13968 (vrndpq_m_f16): Likewise.
13969 (vrndq_m_f16): Likewise.
13970 (vrndxq_m_f16): Likewise.
13971 (vcmpeqq_m_n_f16): Likewise.
13972 (vcmpgeq_m_f16): Likewise.
13973 (vcmpgeq_m_n_f16): Likewise.
13974 (vcmpgtq_m_f16): Likewise.
13975 (vcmpgtq_m_n_f16): Likewise.
13976 (vcmpleq_m_f16): Likewise.
13977 (vcmpleq_m_n_f16): Likewise.
13978 (vcmpltq_m_f16): Likewise.
13979 (vcmpltq_m_n_f16): Likewise.
13980 (vcmpneq_m_f16): Likewise.
13981 (vcmpneq_m_n_f16): Likewise.
13982 (vmvnq_m_n_u16): Likewise.
13983 (vorrq_m_n_u16): Likewise.
13984 (vqrshruntq_n_s16): Likewise.
13985 (vqshrunbq_n_s16): Likewise.
13986 (vqshruntq_n_s16): Likewise.
13987 (vcvtmq_m_u16_f16): Likewise.
13988 (vcvtnq_m_u16_f16): Likewise.
13989 (vcvtpq_m_u16_f16): Likewise.
13990 (vcvtq_m_u16_f16): Likewise.
13991 (vqmovunbq_m_s16): Likewise.
13992 (vqmovuntq_m_s16): Likewise.
13993 (vqrshrntq_n_u16): Likewise.
13994 (vqshrnbq_n_u16): Likewise.
13995 (vqshrntq_n_u16): Likewise.
13996 (vrshrnbq_n_u16): Likewise.
13997 (vrshrntq_n_u16): Likewise.
13998 (vshrnbq_n_u16): Likewise.
13999 (vshrntq_n_u16): Likewise.
14000 (vmlaldavaq_u16): Likewise.
14001 (vmlaldavaxq_u16): Likewise.
14002 (vmlaldavq_p_u16): Likewise.
14003 (vmlaldavxq_p_u16): Likewise.
14004 (vmovlbq_m_u8): Likewise.
14005 (vmovltq_m_u8): Likewise.
14006 (vmovnbq_m_u16): Likewise.
14007 (vmovntq_m_u16): Likewise.
14008 (vqmovnbq_m_u16): Likewise.
14009 (vqmovntq_m_u16): Likewise.
14010 (vrev32q_m_u8): Likewise.
14011 (vmvnq_m_n_s32): Likewise.
14012 (vorrq_m_n_s32): Likewise.
14013 (vqrshrntq_n_s32): Likewise.
14014 (vqshrnbq_n_s32): Likewise.
14015 (vqshrntq_n_s32): Likewise.
14016 (vrshrnbq_n_s32): Likewise.
14017 (vrshrntq_n_s32): Likewise.
14018 (vshrnbq_n_s32): Likewise.
14019 (vshrntq_n_s32): Likewise.
14020 (vcmlaq_f32): Likewise.
14021 (vcmlaq_rot180_f32): Likewise.
14022 (vcmlaq_rot270_f32): Likewise.
14023 (vcmlaq_rot90_f32): Likewise.
14024 (vfmaq_f32): Likewise.
14025 (vfmaq_n_f32): Likewise.
14026 (vfmasq_n_f32): Likewise.
14027 (vfmsq_f32): Likewise.
14028 (vmlaldavaq_s32): Likewise.
14029 (vmlaldavaxq_s32): Likewise.
14030 (vmlsldavaq_s32): Likewise.
14031 (vmlsldavaxq_s32): Likewise.
14032 (vabsq_m_f32): Likewise.
14033 (vcvtmq_m_s32_f32): Likewise.
14034 (vcvtnq_m_s32_f32): Likewise.
14035 (vcvtpq_m_s32_f32): Likewise.
14036 (vcvtq_m_s32_f32): Likewise.
14037 (vdupq_m_n_f32): Likewise.
14038 (vmaxnmaq_m_f32): Likewise.
14039 (vmaxnmavq_p_f32): Likewise.
14040 (vmaxnmvq_p_f32): Likewise.
14041 (vminnmaq_m_f32): Likewise.
14042 (vminnmavq_p_f32): Likewise.
14043 (vminnmvq_p_f32): Likewise.
14044 (vmlaldavq_p_s32): Likewise.
14045 (vmlaldavxq_p_s32): Likewise.
14046 (vmlsldavq_p_s32): Likewise.
14047 (vmlsldavxq_p_s32): Likewise.
14048 (vmovlbq_m_s16): Likewise.
14049 (vmovltq_m_s16): Likewise.
14050 (vmovnbq_m_s32): Likewise.
14051 (vmovntq_m_s32): Likewise.
14052 (vnegq_m_f32): Likewise.
14053 (vpselq_f32): Likewise.
14054 (vqmovnbq_m_s32): Likewise.
14055 (vqmovntq_m_s32): Likewise.
14056 (vrev32q_m_s16): Likewise.
14057 (vrev64q_m_f32): Likewise.
14058 (vrndaq_m_f32): Likewise.
14059 (vrndmq_m_f32): Likewise.
14060 (vrndnq_m_f32): Likewise.
14061 (vrndpq_m_f32): Likewise.
14062 (vrndq_m_f32): Likewise.
14063 (vrndxq_m_f32): Likewise.
14064 (vcmpeqq_m_n_f32): Likewise.
14065 (vcmpgeq_m_f32): Likewise.
14066 (vcmpgeq_m_n_f32): Likewise.
14067 (vcmpgtq_m_f32): Likewise.
14068 (vcmpgtq_m_n_f32): Likewise.
14069 (vcmpleq_m_f32): Likewise.
14070 (vcmpleq_m_n_f32): Likewise.
14071 (vcmpltq_m_f32): Likewise.
14072 (vcmpltq_m_n_f32): Likewise.
14073 (vcmpneq_m_f32): Likewise.
14074 (vcmpneq_m_n_f32): Likewise.
14075 (vmvnq_m_n_u32): Likewise.
14076 (vorrq_m_n_u32): Likewise.
14077 (vqrshruntq_n_s32): Likewise.
14078 (vqshrunbq_n_s32): Likewise.
14079 (vqshruntq_n_s32): Likewise.
14080 (vcvtmq_m_u32_f32): Likewise.
14081 (vcvtnq_m_u32_f32): Likewise.
14082 (vcvtpq_m_u32_f32): Likewise.
14083 (vcvtq_m_u32_f32): Likewise.
14084 (vqmovunbq_m_s32): Likewise.
14085 (vqmovuntq_m_s32): Likewise.
14086 (vqrshrntq_n_u32): Likewise.
14087 (vqshrnbq_n_u32): Likewise.
14088 (vqshrntq_n_u32): Likewise.
14089 (vrshrnbq_n_u32): Likewise.
14090 (vrshrntq_n_u32): Likewise.
14091 (vshrnbq_n_u32): Likewise.
14092 (vshrntq_n_u32): Likewise.
14093 (vmlaldavaq_u32): Likewise.
14094 (vmlaldavaxq_u32): Likewise.
14095 (vmlaldavq_p_u32): Likewise.
14096 (vmlaldavxq_p_u32): Likewise.
14097 (vmovlbq_m_u16): Likewise.
14098 (vmovltq_m_u16): Likewise.
14099 (vmovnbq_m_u32): Likewise.
14100 (vmovntq_m_u32): Likewise.
14101 (vqmovnbq_m_u32): Likewise.
14102 (vqmovntq_m_u32): Likewise.
14103 (vrev32q_m_u16): Likewise.
14104 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
14105 (__arm_vrmlsldavhaq_s32): Likewise.
14106 (__arm_vrmlsldavhaxq_s32): Likewise.
14107 (__arm_vaddlvaq_p_s32): Likewise.
14108 (__arm_vrev16q_m_s8): Likewise.
14109 (__arm_vrmlaldavhq_p_s32): Likewise.
14110 (__arm_vrmlaldavhxq_p_s32): Likewise.
14111 (__arm_vrmlsldavhq_p_s32): Likewise.
14112 (__arm_vrmlsldavhxq_p_s32): Likewise.
14113 (__arm_vaddlvaq_p_u32): Likewise.
14114 (__arm_vrev16q_m_u8): Likewise.
14115 (__arm_vrmlaldavhq_p_u32): Likewise.
14116 (__arm_vmvnq_m_n_s16): Likewise.
14117 (__arm_vorrq_m_n_s16): Likewise.
14118 (__arm_vqrshrntq_n_s16): Likewise.
14119 (__arm_vqshrnbq_n_s16): Likewise.
14120 (__arm_vqshrntq_n_s16): Likewise.
14121 (__arm_vrshrnbq_n_s16): Likewise.
14122 (__arm_vrshrntq_n_s16): Likewise.
14123 (__arm_vshrnbq_n_s16): Likewise.
14124 (__arm_vshrntq_n_s16): Likewise.
14125 (__arm_vmlaldavaq_s16): Likewise.
14126 (__arm_vmlaldavaxq_s16): Likewise.
14127 (__arm_vmlsldavaq_s16): Likewise.
14128 (__arm_vmlsldavaxq_s16): Likewise.
14129 (__arm_vmlaldavq_p_s16): Likewise.
14130 (__arm_vmlaldavxq_p_s16): Likewise.
14131 (__arm_vmlsldavq_p_s16): Likewise.
14132 (__arm_vmlsldavxq_p_s16): Likewise.
14133 (__arm_vmovlbq_m_s8): Likewise.
14134 (__arm_vmovltq_m_s8): Likewise.
14135 (__arm_vmovnbq_m_s16): Likewise.
14136 (__arm_vmovntq_m_s16): Likewise.
14137 (__arm_vqmovnbq_m_s16): Likewise.
14138 (__arm_vqmovntq_m_s16): Likewise.
14139 (__arm_vrev32q_m_s8): Likewise.
14140 (__arm_vmvnq_m_n_u16): Likewise.
14141 (__arm_vorrq_m_n_u16): Likewise.
14142 (__arm_vqrshruntq_n_s16): Likewise.
14143 (__arm_vqshrunbq_n_s16): Likewise.
14144 (__arm_vqshruntq_n_s16): Likewise.
14145 (__arm_vqmovunbq_m_s16): Likewise.
14146 (__arm_vqmovuntq_m_s16): Likewise.
14147 (__arm_vqrshrntq_n_u16): Likewise.
14148 (__arm_vqshrnbq_n_u16): Likewise.
14149 (__arm_vqshrntq_n_u16): Likewise.
14150 (__arm_vrshrnbq_n_u16): Likewise.
14151 (__arm_vrshrntq_n_u16): Likewise.
14152 (__arm_vshrnbq_n_u16): Likewise.
14153 (__arm_vshrntq_n_u16): Likewise.
14154 (__arm_vmlaldavaq_u16): Likewise.
14155 (__arm_vmlaldavaxq_u16): Likewise.
14156 (__arm_vmlaldavq_p_u16): Likewise.
14157 (__arm_vmlaldavxq_p_u16): Likewise.
14158 (__arm_vmovlbq_m_u8): Likewise.
14159 (__arm_vmovltq_m_u8): Likewise.
14160 (__arm_vmovnbq_m_u16): Likewise.
14161 (__arm_vmovntq_m_u16): Likewise.
14162 (__arm_vqmovnbq_m_u16): Likewise.
14163 (__arm_vqmovntq_m_u16): Likewise.
14164 (__arm_vrev32q_m_u8): Likewise.
14165 (__arm_vmvnq_m_n_s32): Likewise.
14166 (__arm_vorrq_m_n_s32): Likewise.
14167 (__arm_vqrshrntq_n_s32): Likewise.
14168 (__arm_vqshrnbq_n_s32): Likewise.
14169 (__arm_vqshrntq_n_s32): Likewise.
14170 (__arm_vrshrnbq_n_s32): Likewise.
14171 (__arm_vrshrntq_n_s32): Likewise.
14172 (__arm_vshrnbq_n_s32): Likewise.
14173 (__arm_vshrntq_n_s32): Likewise.
14174 (__arm_vmlaldavaq_s32): Likewise.
14175 (__arm_vmlaldavaxq_s32): Likewise.
14176 (__arm_vmlsldavaq_s32): Likewise.
14177 (__arm_vmlsldavaxq_s32): Likewise.
14178 (__arm_vmlaldavq_p_s32): Likewise.
14179 (__arm_vmlaldavxq_p_s32): Likewise.
14180 (__arm_vmlsldavq_p_s32): Likewise.
14181 (__arm_vmlsldavxq_p_s32): Likewise.
14182 (__arm_vmovlbq_m_s16): Likewise.
14183 (__arm_vmovltq_m_s16): Likewise.
14184 (__arm_vmovnbq_m_s32): Likewise.
14185 (__arm_vmovntq_m_s32): Likewise.
14186 (__arm_vqmovnbq_m_s32): Likewise.
14187 (__arm_vqmovntq_m_s32): Likewise.
14188 (__arm_vrev32q_m_s16): Likewise.
14189 (__arm_vmvnq_m_n_u32): Likewise.
14190 (__arm_vorrq_m_n_u32): Likewise.
14191 (__arm_vqrshruntq_n_s32): Likewise.
14192 (__arm_vqshrunbq_n_s32): Likewise.
14193 (__arm_vqshruntq_n_s32): Likewise.
14194 (__arm_vqmovunbq_m_s32): Likewise.
14195 (__arm_vqmovuntq_m_s32): Likewise.
14196 (__arm_vqrshrntq_n_u32): Likewise.
14197 (__arm_vqshrnbq_n_u32): Likewise.
14198 (__arm_vqshrntq_n_u32): Likewise.
14199 (__arm_vrshrnbq_n_u32): Likewise.
14200 (__arm_vrshrntq_n_u32): Likewise.
14201 (__arm_vshrnbq_n_u32): Likewise.
14202 (__arm_vshrntq_n_u32): Likewise.
14203 (__arm_vmlaldavaq_u32): Likewise.
14204 (__arm_vmlaldavaxq_u32): Likewise.
14205 (__arm_vmlaldavq_p_u32): Likewise.
14206 (__arm_vmlaldavxq_p_u32): Likewise.
14207 (__arm_vmovlbq_m_u16): Likewise.
14208 (__arm_vmovltq_m_u16): Likewise.
14209 (__arm_vmovnbq_m_u32): Likewise.
14210 (__arm_vmovntq_m_u32): Likewise.
14211 (__arm_vqmovnbq_m_u32): Likewise.
14212 (__arm_vqmovntq_m_u32): Likewise.
14213 (__arm_vrev32q_m_u16): Likewise.
14214 (__arm_vcvtbq_m_f16_f32): Likewise.
14215 (__arm_vcvtbq_m_f32_f16): Likewise.
14216 (__arm_vcvttq_m_f16_f32): Likewise.
14217 (__arm_vcvttq_m_f32_f16): Likewise.
14218 (__arm_vrev32q_m_f16): Likewise.
14219 (__arm_vcmlaq_f16): Likewise.
14220 (__arm_vcmlaq_rot180_f16): Likewise.
14221 (__arm_vcmlaq_rot270_f16): Likewise.
14222 (__arm_vcmlaq_rot90_f16): Likewise.
14223 (__arm_vfmaq_f16): Likewise.
14224 (__arm_vfmaq_n_f16): Likewise.
14225 (__arm_vfmasq_n_f16): Likewise.
14226 (__arm_vfmsq_f16): Likewise.
14227 (__arm_vabsq_m_f16): Likewise.
14228 (__arm_vcvtmq_m_s16_f16): Likewise.
14229 (__arm_vcvtnq_m_s16_f16): Likewise.
14230 (__arm_vcvtpq_m_s16_f16): Likewise.
14231 (__arm_vcvtq_m_s16_f16): Likewise.
14232 (__arm_vdupq_m_n_f16): Likewise.
14233 (__arm_vmaxnmaq_m_f16): Likewise.
14234 (__arm_vmaxnmavq_p_f16): Likewise.
14235 (__arm_vmaxnmvq_p_f16): Likewise.
14236 (__arm_vminnmaq_m_f16): Likewise.
14237 (__arm_vminnmavq_p_f16): Likewise.
14238 (__arm_vminnmvq_p_f16): Likewise.
14239 (__arm_vnegq_m_f16): Likewise.
14240 (__arm_vpselq_f16): Likewise.
14241 (__arm_vrev64q_m_f16): Likewise.
14242 (__arm_vrndaq_m_f16): Likewise.
14243 (__arm_vrndmq_m_f16): Likewise.
14244 (__arm_vrndnq_m_f16): Likewise.
14245 (__arm_vrndpq_m_f16): Likewise.
14246 (__arm_vrndq_m_f16): Likewise.
14247 (__arm_vrndxq_m_f16): Likewise.
14248 (__arm_vcmpeqq_m_n_f16): Likewise.
14249 (__arm_vcmpgeq_m_f16): Likewise.
14250 (__arm_vcmpgeq_m_n_f16): Likewise.
14251 (__arm_vcmpgtq_m_f16): Likewise.
14252 (__arm_vcmpgtq_m_n_f16): Likewise.
14253 (__arm_vcmpleq_m_f16): Likewise.
14254 (__arm_vcmpleq_m_n_f16): Likewise.
14255 (__arm_vcmpltq_m_f16): Likewise.
14256 (__arm_vcmpltq_m_n_f16): Likewise.
14257 (__arm_vcmpneq_m_f16): Likewise.
14258 (__arm_vcmpneq_m_n_f16): Likewise.
14259 (__arm_vcvtmq_m_u16_f16): Likewise.
14260 (__arm_vcvtnq_m_u16_f16): Likewise.
14261 (__arm_vcvtpq_m_u16_f16): Likewise.
14262 (__arm_vcvtq_m_u16_f16): Likewise.
14263 (__arm_vcmlaq_f32): Likewise.
14264 (__arm_vcmlaq_rot180_f32): Likewise.
14265 (__arm_vcmlaq_rot270_f32): Likewise.
14266 (__arm_vcmlaq_rot90_f32): Likewise.
14267 (__arm_vfmaq_f32): Likewise.
14268 (__arm_vfmaq_n_f32): Likewise.
14269 (__arm_vfmasq_n_f32): Likewise.
14270 (__arm_vfmsq_f32): Likewise.
14271 (__arm_vabsq_m_f32): Likewise.
14272 (__arm_vcvtmq_m_s32_f32): Likewise.
14273 (__arm_vcvtnq_m_s32_f32): Likewise.
14274 (__arm_vcvtpq_m_s32_f32): Likewise.
14275 (__arm_vcvtq_m_s32_f32): Likewise.
14276 (__arm_vdupq_m_n_f32): Likewise.
14277 (__arm_vmaxnmaq_m_f32): Likewise.
14278 (__arm_vmaxnmavq_p_f32): Likewise.
14279 (__arm_vmaxnmvq_p_f32): Likewise.
14280 (__arm_vminnmaq_m_f32): Likewise.
14281 (__arm_vminnmavq_p_f32): Likewise.
14282 (__arm_vminnmvq_p_f32): Likewise.
14283 (__arm_vnegq_m_f32): Likewise.
14284 (__arm_vpselq_f32): Likewise.
14285 (__arm_vrev64q_m_f32): Likewise.
14286 (__arm_vrndaq_m_f32): Likewise.
14287 (__arm_vrndmq_m_f32): Likewise.
14288 (__arm_vrndnq_m_f32): Likewise.
14289 (__arm_vrndpq_m_f32): Likewise.
14290 (__arm_vrndq_m_f32): Likewise.
14291 (__arm_vrndxq_m_f32): Likewise.
14292 (__arm_vcmpeqq_m_n_f32): Likewise.
14293 (__arm_vcmpgeq_m_f32): Likewise.
14294 (__arm_vcmpgeq_m_n_f32): Likewise.
14295 (__arm_vcmpgtq_m_f32): Likewise.
14296 (__arm_vcmpgtq_m_n_f32): Likewise.
14297 (__arm_vcmpleq_m_f32): Likewise.
14298 (__arm_vcmpleq_m_n_f32): Likewise.
14299 (__arm_vcmpltq_m_f32): Likewise.
14300 (__arm_vcmpltq_m_n_f32): Likewise.
14301 (__arm_vcmpneq_m_f32): Likewise.
14302 (__arm_vcmpneq_m_n_f32): Likewise.
14303 (__arm_vcvtmq_m_u32_f32): Likewise.
14304 (__arm_vcvtnq_m_u32_f32): Likewise.
14305 (__arm_vcvtpq_m_u32_f32): Likewise.
14306 (__arm_vcvtq_m_u32_f32): Likewise.
14307 (vcvtq_m): Define polymorphic variant.
14308 (vabsq_m): Likewise.
14309 (vcmlaq): Likewise.
14310 (vcmlaq_rot180): Likewise.
14311 (vcmlaq_rot270): Likewise.
14312 (vcmlaq_rot90): Likewise.
14313 (vcmpeqq_m_n): Likewise.
14314 (vcmpgeq_m_n): Likewise.
14315 (vrndxq_m): Likewise.
14316 (vrndq_m): Likewise.
14317 (vrndpq_m): Likewise.
14318 (vcmpgtq_m_n): Likewise.
14319 (vcmpgtq_m): Likewise.
14320 (vcmpleq_m): Likewise.
14321 (vcmpleq_m_n): Likewise.
14322 (vcmpltq_m_n): Likewise.
14323 (vcmpltq_m): Likewise.
14324 (vcmpneq_m): Likewise.
14325 (vcmpneq_m_n): Likewise.
14326 (vcvtbq_m): Likewise.
14327 (vcvttq_m): Likewise.
14328 (vcvtmq_m): Likewise.
14329 (vcvtnq_m): Likewise.
14330 (vcvtpq_m): Likewise.
14331 (vdupq_m_n): Likewise.
14332 (vfmaq_n): Likewise.
14334 (vfmasq_n): Likewise.
14336 (vmaxnmaq_m): Likewise.
14337 (vmaxnmavq_m): Likewise.
14338 (vmaxnmvq_m): Likewise.
14339 (vmaxnmavq_p): Likewise.
14340 (vmaxnmvq_p): Likewise.
14341 (vminnmaq_m): Likewise.
14342 (vminnmavq_p): Likewise.
14343 (vminnmvq_p): Likewise.
14344 (vrndnq_m): Likewise.
14345 (vrndaq_m): Likewise.
14346 (vrndmq_m): Likewise.
14347 (vrev64q_m): Likewise.
14348 (vrev32q_m): Likewise.
14349 (vpselq): Likewise.
14350 (vnegq_m): Likewise.
14351 (vcmpgeq_m): Likewise.
14352 (vshrntq_n): Likewise.
14353 (vrshrntq_n): Likewise.
14354 (vmovlbq_m): Likewise.
14355 (vmovnbq_m): Likewise.
14356 (vmovntq_m): Likewise.
14357 (vmvnq_m_n): Likewise.
14358 (vmvnq_m): Likewise.
14359 (vshrnbq_n): Likewise.
14360 (vrshrnbq_n): Likewise.
14361 (vqshruntq_n): Likewise.
14362 (vrev16q_m): Likewise.
14363 (vqshrunbq_n): Likewise.
14364 (vqshrntq_n): Likewise.
14365 (vqrshruntq_n): Likewise.
14366 (vqrshrntq_n): Likewise.
14367 (vqshrnbq_n): Likewise.
14368 (vqmovuntq_m): Likewise.
14369 (vqmovntq_m): Likewise.
14370 (vqmovnbq_m): Likewise.
14371 (vorrq_m_n): Likewise.
14372 (vmovltq_m): Likewise.
14373 (vqmovunbq_m): Likewise.
14374 (vaddlvaq_p): Likewise.
14375 (vmlaldavaq): Likewise.
14376 (vmlaldavaxq): Likewise.
14377 (vmlaldavq_p): Likewise.
14378 (vmlaldavxq_p): Likewise.
14379 (vmlsldavaq): Likewise.
14380 (vmlsldavaxq): Likewise.
14381 (vmlsldavq_p): Likewise.
14382 (vmlsldavxq_p): Likewise.
14383 (vrmlaldavhaxq): Likewise.
14384 (vrmlaldavhq_p): Likewise.
14385 (vrmlaldavhxq_p): Likewise.
14386 (vrmlsldavhaq): Likewise.
14387 (vrmlsldavhaxq): Likewise.
14388 (vrmlsldavhq_p): Likewise.
14389 (vrmlsldavhxq_p): Likewise.
14390 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
14392 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
14393 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
14394 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
14395 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
14396 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
14397 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
14398 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
14399 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
14400 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
14401 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
14402 (MVE_pred3): Likewise.
14403 (MVE_constraint1): Likewise.
14404 (MVE_pred1): Likewise.
14405 (VMLALDAVQ_P): Define iterator.
14406 (VQMOVNBQ_M): Likewise.
14407 (VMOVLTQ_M): Likewise.
14408 (VMOVNBQ_M): Likewise.
14409 (VRSHRNTQ_N): Likewise.
14410 (VORRQ_M_N): Likewise.
14411 (VREV32Q_M): Likewise.
14412 (VREV16Q_M): Likewise.
14413 (VQRSHRNTQ_N): Likewise.
14414 (VMOVNTQ_M): Likewise.
14415 (VMOVLBQ_M): Likewise.
14416 (VMLALDAVAQ): Likewise.
14417 (VQSHRNBQ_N): Likewise.
14418 (VSHRNBQ_N): Likewise.
14419 (VRSHRNBQ_N): Likewise.
14420 (VMLALDAVXQ_P): Likewise.
14421 (VQMOVNTQ_M): Likewise.
14422 (VMVNQ_M_N): Likewise.
14423 (VQSHRNTQ_N): Likewise.
14424 (VMLALDAVAXQ): Likewise.
14425 (VSHRNTQ_N): Likewise.
14426 (VCVTMQ_M): Likewise.
14427 (VCVTNQ_M): Likewise.
14428 (VCVTPQ_M): Likewise.
14429 (VCVTQ_M_N_FROM_F): Likewise.
14430 (VCVTQ_M_FROM_F): Likewise.
14431 (VRMLALDAVHQ_P): Likewise.
14432 (VADDLVAQ_P): Likewise.
14433 (mve_vrndq_m_f<mode>): Define RTL pattern.
14434 (mve_vabsq_m_f<mode>): Likewise.
14435 (mve_vaddlvaq_p_<supf>v4si): Likewise.
14436 (mve_vcmlaq_f<mode>): Likewise.
14437 (mve_vcmlaq_rot180_f<mode>): Likewise.
14438 (mve_vcmlaq_rot270_f<mode>): Likewise.
14439 (mve_vcmlaq_rot90_f<mode>): Likewise.
14440 (mve_vcmpeqq_m_n_f<mode>): Likewise.
14441 (mve_vcmpgeq_m_f<mode>): Likewise.
14442 (mve_vcmpgeq_m_n_f<mode>): Likewise.
14443 (mve_vcmpgtq_m_f<mode>): Likewise.
14444 (mve_vcmpgtq_m_n_f<mode>): Likewise.
14445 (mve_vcmpleq_m_f<mode>): Likewise.
14446 (mve_vcmpleq_m_n_f<mode>): Likewise.
14447 (mve_vcmpltq_m_f<mode>): Likewise.
14448 (mve_vcmpltq_m_n_f<mode>): Likewise.
14449 (mve_vcmpneq_m_f<mode>): Likewise.
14450 (mve_vcmpneq_m_n_f<mode>): Likewise.
14451 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
14452 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
14453 (mve_vcvttq_m_f16_f32v8hf): Likewise.
14454 (mve_vcvttq_m_f32_f16v4sf): Likewise.
14455 (mve_vdupq_m_n_f<mode>): Likewise.
14456 (mve_vfmaq_f<mode>): Likewise.
14457 (mve_vfmaq_n_f<mode>): Likewise.
14458 (mve_vfmasq_n_f<mode>): Likewise.
14459 (mve_vfmsq_f<mode>): Likewise.
14460 (mve_vmaxnmaq_m_f<mode>): Likewise.
14461 (mve_vmaxnmavq_p_f<mode>): Likewise.
14462 (mve_vmaxnmvq_p_f<mode>): Likewise.
14463 (mve_vminnmaq_m_f<mode>): Likewise.
14464 (mve_vminnmavq_p_f<mode>): Likewise.
14465 (mve_vminnmvq_p_f<mode>): Likewise.
14466 (mve_vmlaldavaq_<supf><mode>): Likewise.
14467 (mve_vmlaldavaxq_<supf><mode>): Likewise.
14468 (mve_vmlaldavq_p_<supf><mode>): Likewise.
14469 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
14470 (mve_vmlsldavaq_s<mode>): Likewise.
14471 (mve_vmlsldavaxq_s<mode>): Likewise.
14472 (mve_vmlsldavq_p_s<mode>): Likewise.
14473 (mve_vmlsldavxq_p_s<mode>): Likewise.
14474 (mve_vmovlbq_m_<supf><mode>): Likewise.
14475 (mve_vmovltq_m_<supf><mode>): Likewise.
14476 (mve_vmovnbq_m_<supf><mode>): Likewise.
14477 (mve_vmovntq_m_<supf><mode>): Likewise.
14478 (mve_vmvnq_m_n_<supf><mode>): Likewise.
14479 (mve_vnegq_m_f<mode>): Likewise.
14480 (mve_vorrq_m_n_<supf><mode>): Likewise.
14481 (mve_vpselq_f<mode>): Likewise.
14482 (mve_vqmovnbq_m_<supf><mode>): Likewise.
14483 (mve_vqmovntq_m_<supf><mode>): Likewise.
14484 (mve_vqmovunbq_m_s<mode>): Likewise.
14485 (mve_vqmovuntq_m_s<mode>): Likewise.
14486 (mve_vqrshrntq_n_<supf><mode>): Likewise.
14487 (mve_vqrshruntq_n_s<mode>): Likewise.
14488 (mve_vqshrnbq_n_<supf><mode>): Likewise.
14489 (mve_vqshrntq_n_<supf><mode>): Likewise.
14490 (mve_vqshrunbq_n_s<mode>): Likewise.
14491 (mve_vqshruntq_n_s<mode>): Likewise.
14492 (mve_vrev32q_m_fv8hf): Likewise.
14493 (mve_vrev32q_m_<supf><mode>): Likewise.
14494 (mve_vrev64q_m_f<mode>): Likewise.
14495 (mve_vrmlaldavhaxq_sv4si): Likewise.
14496 (mve_vrmlaldavhxq_p_sv4si): Likewise.
14497 (mve_vrmlsldavhaxq_sv4si): Likewise.
14498 (mve_vrmlsldavhq_p_sv4si): Likewise.
14499 (mve_vrmlsldavhxq_p_sv4si): Likewise.
14500 (mve_vrndaq_m_f<mode>): Likewise.
14501 (mve_vrndmq_m_f<mode>): Likewise.
14502 (mve_vrndnq_m_f<mode>): Likewise.
14503 (mve_vrndpq_m_f<mode>): Likewise.
14504 (mve_vrndxq_m_f<mode>): Likewise.
14505 (mve_vrshrnbq_n_<supf><mode>): Likewise.
14506 (mve_vrshrntq_n_<supf><mode>): Likewise.
14507 (mve_vshrnbq_n_<supf><mode>): Likewise.
14508 (mve_vshrntq_n_<supf><mode>): Likewise.
14509 (mve_vcvtmq_m_<supf><mode>): Likewise.
14510 (mve_vcvtpq_m_<supf><mode>): Likewise.
14511 (mve_vcvtnq_m_<supf><mode>): Likewise.
14512 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
14513 (mve_vrev16q_m_<supf>v16qi): Likewise.
14514 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
14515 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
14516 (mve_vrmlsldavhaq_sv4si): Likewise.
14518 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
14519 Mihail Ionescu <mihail.ionescu@arm.com>
14520 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14522 * config/arm/arm_mve.h (vpselq_u8): Define macro.
14523 (vpselq_s8): Likewise.
14524 (vrev64q_m_u8): Likewise.
14525 (vqrdmlashq_n_u8): Likewise.
14526 (vqrdmlahq_n_u8): Likewise.
14527 (vqdmlahq_n_u8): Likewise.
14528 (vmvnq_m_u8): Likewise.
14529 (vmlasq_n_u8): Likewise.
14530 (vmlaq_n_u8): Likewise.
14531 (vmladavq_p_u8): Likewise.
14532 (vmladavaq_u8): Likewise.
14533 (vminvq_p_u8): Likewise.
14534 (vmaxvq_p_u8): Likewise.
14535 (vdupq_m_n_u8): Likewise.
14536 (vcmpneq_m_u8): Likewise.
14537 (vcmpneq_m_n_u8): Likewise.
14538 (vcmphiq_m_u8): Likewise.
14539 (vcmphiq_m_n_u8): Likewise.
14540 (vcmpeqq_m_u8): Likewise.
14541 (vcmpeqq_m_n_u8): Likewise.
14542 (vcmpcsq_m_u8): Likewise.
14543 (vcmpcsq_m_n_u8): Likewise.
14544 (vclzq_m_u8): Likewise.
14545 (vaddvaq_p_u8): Likewise.
14546 (vsriq_n_u8): Likewise.
14547 (vsliq_n_u8): Likewise.
14548 (vshlq_m_r_u8): Likewise.
14549 (vrshlq_m_n_u8): Likewise.
14550 (vqshlq_m_r_u8): Likewise.
14551 (vqrshlq_m_n_u8): Likewise.
14552 (vminavq_p_s8): Likewise.
14553 (vminaq_m_s8): Likewise.
14554 (vmaxavq_p_s8): Likewise.
14555 (vmaxaq_m_s8): Likewise.
14556 (vcmpneq_m_s8): Likewise.
14557 (vcmpneq_m_n_s8): Likewise.
14558 (vcmpltq_m_s8): Likewise.
14559 (vcmpltq_m_n_s8): Likewise.
14560 (vcmpleq_m_s8): Likewise.
14561 (vcmpleq_m_n_s8): Likewise.
14562 (vcmpgtq_m_s8): Likewise.
14563 (vcmpgtq_m_n_s8): Likewise.
14564 (vcmpgeq_m_s8): Likewise.
14565 (vcmpgeq_m_n_s8): Likewise.
14566 (vcmpeqq_m_s8): Likewise.
14567 (vcmpeqq_m_n_s8): Likewise.
14568 (vshlq_m_r_s8): Likewise.
14569 (vrshlq_m_n_s8): Likewise.
14570 (vrev64q_m_s8): Likewise.
14571 (vqshlq_m_r_s8): Likewise.
14572 (vqrshlq_m_n_s8): Likewise.
14573 (vqnegq_m_s8): Likewise.
14574 (vqabsq_m_s8): Likewise.
14575 (vnegq_m_s8): Likewise.
14576 (vmvnq_m_s8): Likewise.
14577 (vmlsdavxq_p_s8): Likewise.
14578 (vmlsdavq_p_s8): Likewise.
14579 (vmladavxq_p_s8): Likewise.
14580 (vmladavq_p_s8): Likewise.
14581 (vminvq_p_s8): Likewise.
14582 (vmaxvq_p_s8): Likewise.
14583 (vdupq_m_n_s8): Likewise.
14584 (vclzq_m_s8): Likewise.
14585 (vclsq_m_s8): Likewise.
14586 (vaddvaq_p_s8): Likewise.
14587 (vabsq_m_s8): Likewise.
14588 (vqrdmlsdhxq_s8): Likewise.
14589 (vqrdmlsdhq_s8): Likewise.
14590 (vqrdmlashq_n_s8): Likewise.
14591 (vqrdmlahq_n_s8): Likewise.
14592 (vqrdmladhxq_s8): Likewise.
14593 (vqrdmladhq_s8): Likewise.
14594 (vqdmlsdhxq_s8): Likewise.
14595 (vqdmlsdhq_s8): Likewise.
14596 (vqdmlahq_n_s8): Likewise.
14597 (vqdmladhxq_s8): Likewise.
14598 (vqdmladhq_s8): Likewise.
14599 (vmlsdavaxq_s8): Likewise.
14600 (vmlsdavaq_s8): Likewise.
14601 (vmlasq_n_s8): Likewise.
14602 (vmlaq_n_s8): Likewise.
14603 (vmladavaxq_s8): Likewise.
14604 (vmladavaq_s8): Likewise.
14605 (vsriq_n_s8): Likewise.
14606 (vsliq_n_s8): Likewise.
14607 (vpselq_u16): Likewise.
14608 (vpselq_s16): Likewise.
14609 (vrev64q_m_u16): Likewise.
14610 (vqrdmlashq_n_u16): Likewise.
14611 (vqrdmlahq_n_u16): Likewise.
14612 (vqdmlahq_n_u16): Likewise.
14613 (vmvnq_m_u16): Likewise.
14614 (vmlasq_n_u16): Likewise.
14615 (vmlaq_n_u16): Likewise.
14616 (vmladavq_p_u16): Likewise.
14617 (vmladavaq_u16): Likewise.
14618 (vminvq_p_u16): Likewise.
14619 (vmaxvq_p_u16): Likewise.
14620 (vdupq_m_n_u16): Likewise.
14621 (vcmpneq_m_u16): Likewise.
14622 (vcmpneq_m_n_u16): Likewise.
14623 (vcmphiq_m_u16): Likewise.
14624 (vcmphiq_m_n_u16): Likewise.
14625 (vcmpeqq_m_u16): Likewise.
14626 (vcmpeqq_m_n_u16): Likewise.
14627 (vcmpcsq_m_u16): Likewise.
14628 (vcmpcsq_m_n_u16): Likewise.
14629 (vclzq_m_u16): Likewise.
14630 (vaddvaq_p_u16): Likewise.
14631 (vsriq_n_u16): Likewise.
14632 (vsliq_n_u16): Likewise.
14633 (vshlq_m_r_u16): Likewise.
14634 (vrshlq_m_n_u16): Likewise.
14635 (vqshlq_m_r_u16): Likewise.
14636 (vqrshlq_m_n_u16): Likewise.
14637 (vminavq_p_s16): Likewise.
14638 (vminaq_m_s16): Likewise.
14639 (vmaxavq_p_s16): Likewise.
14640 (vmaxaq_m_s16): Likewise.
14641 (vcmpneq_m_s16): Likewise.
14642 (vcmpneq_m_n_s16): Likewise.
14643 (vcmpltq_m_s16): Likewise.
14644 (vcmpltq_m_n_s16): Likewise.
14645 (vcmpleq_m_s16): Likewise.
14646 (vcmpleq_m_n_s16): Likewise.
14647 (vcmpgtq_m_s16): Likewise.
14648 (vcmpgtq_m_n_s16): Likewise.
14649 (vcmpgeq_m_s16): Likewise.
14650 (vcmpgeq_m_n_s16): Likewise.
14651 (vcmpeqq_m_s16): Likewise.
14652 (vcmpeqq_m_n_s16): Likewise.
14653 (vshlq_m_r_s16): Likewise.
14654 (vrshlq_m_n_s16): Likewise.
14655 (vrev64q_m_s16): Likewise.
14656 (vqshlq_m_r_s16): Likewise.
14657 (vqrshlq_m_n_s16): Likewise.
14658 (vqnegq_m_s16): Likewise.
14659 (vqabsq_m_s16): Likewise.
14660 (vnegq_m_s16): Likewise.
14661 (vmvnq_m_s16): Likewise.
14662 (vmlsdavxq_p_s16): Likewise.
14663 (vmlsdavq_p_s16): Likewise.
14664 (vmladavxq_p_s16): Likewise.
14665 (vmladavq_p_s16): Likewise.
14666 (vminvq_p_s16): Likewise.
14667 (vmaxvq_p_s16): Likewise.
14668 (vdupq_m_n_s16): Likewise.
14669 (vclzq_m_s16): Likewise.
14670 (vclsq_m_s16): Likewise.
14671 (vaddvaq_p_s16): Likewise.
14672 (vabsq_m_s16): Likewise.
14673 (vqrdmlsdhxq_s16): Likewise.
14674 (vqrdmlsdhq_s16): Likewise.
14675 (vqrdmlashq_n_s16): Likewise.
14676 (vqrdmlahq_n_s16): Likewise.
14677 (vqrdmladhxq_s16): Likewise.
14678 (vqrdmladhq_s16): Likewise.
14679 (vqdmlsdhxq_s16): Likewise.
14680 (vqdmlsdhq_s16): Likewise.
14681 (vqdmlahq_n_s16): Likewise.
14682 (vqdmladhxq_s16): Likewise.
14683 (vqdmladhq_s16): Likewise.
14684 (vmlsdavaxq_s16): Likewise.
14685 (vmlsdavaq_s16): Likewise.
14686 (vmlasq_n_s16): Likewise.
14687 (vmlaq_n_s16): Likewise.
14688 (vmladavaxq_s16): Likewise.
14689 (vmladavaq_s16): Likewise.
14690 (vsriq_n_s16): Likewise.
14691 (vsliq_n_s16): Likewise.
14692 (vpselq_u32): Likewise.
14693 (vpselq_s32): Likewise.
14694 (vrev64q_m_u32): Likewise.
14695 (vqrdmlashq_n_u32): Likewise.
14696 (vqrdmlahq_n_u32): Likewise.
14697 (vqdmlahq_n_u32): Likewise.
14698 (vmvnq_m_u32): Likewise.
14699 (vmlasq_n_u32): Likewise.
14700 (vmlaq_n_u32): Likewise.
14701 (vmladavq_p_u32): Likewise.
14702 (vmladavaq_u32): Likewise.
14703 (vminvq_p_u32): Likewise.
14704 (vmaxvq_p_u32): Likewise.
14705 (vdupq_m_n_u32): Likewise.
14706 (vcmpneq_m_u32): Likewise.
14707 (vcmpneq_m_n_u32): Likewise.
14708 (vcmphiq_m_u32): Likewise.
14709 (vcmphiq_m_n_u32): Likewise.
14710 (vcmpeqq_m_u32): Likewise.
14711 (vcmpeqq_m_n_u32): Likewise.
14712 (vcmpcsq_m_u32): Likewise.
14713 (vcmpcsq_m_n_u32): Likewise.
14714 (vclzq_m_u32): Likewise.
14715 (vaddvaq_p_u32): Likewise.
14716 (vsriq_n_u32): Likewise.
14717 (vsliq_n_u32): Likewise.
14718 (vshlq_m_r_u32): Likewise.
14719 (vrshlq_m_n_u32): Likewise.
14720 (vqshlq_m_r_u32): Likewise.
14721 (vqrshlq_m_n_u32): Likewise.
14722 (vminavq_p_s32): Likewise.
14723 (vminaq_m_s32): Likewise.
14724 (vmaxavq_p_s32): Likewise.
14725 (vmaxaq_m_s32): Likewise.
14726 (vcmpneq_m_s32): Likewise.
14727 (vcmpneq_m_n_s32): Likewise.
14728 (vcmpltq_m_s32): Likewise.
14729 (vcmpltq_m_n_s32): Likewise.
14730 (vcmpleq_m_s32): Likewise.
14731 (vcmpleq_m_n_s32): Likewise.
14732 (vcmpgtq_m_s32): Likewise.
14733 (vcmpgtq_m_n_s32): Likewise.
14734 (vcmpgeq_m_s32): Likewise.
14735 (vcmpgeq_m_n_s32): Likewise.
14736 (vcmpeqq_m_s32): Likewise.
14737 (vcmpeqq_m_n_s32): Likewise.
14738 (vshlq_m_r_s32): Likewise.
14739 (vrshlq_m_n_s32): Likewise.
14740 (vrev64q_m_s32): Likewise.
14741 (vqshlq_m_r_s32): Likewise.
14742 (vqrshlq_m_n_s32): Likewise.
14743 (vqnegq_m_s32): Likewise.
14744 (vqabsq_m_s32): Likewise.
14745 (vnegq_m_s32): Likewise.
14746 (vmvnq_m_s32): Likewise.
14747 (vmlsdavxq_p_s32): Likewise.
14748 (vmlsdavq_p_s32): Likewise.
14749 (vmladavxq_p_s32): Likewise.
14750 (vmladavq_p_s32): Likewise.
14751 (vminvq_p_s32): Likewise.
14752 (vmaxvq_p_s32): Likewise.
14753 (vdupq_m_n_s32): Likewise.
14754 (vclzq_m_s32): Likewise.
14755 (vclsq_m_s32): Likewise.
14756 (vaddvaq_p_s32): Likewise.
14757 (vabsq_m_s32): Likewise.
14758 (vqrdmlsdhxq_s32): Likewise.
14759 (vqrdmlsdhq_s32): Likewise.
14760 (vqrdmlashq_n_s32): Likewise.
14761 (vqrdmlahq_n_s32): Likewise.
14762 (vqrdmladhxq_s32): Likewise.
14763 (vqrdmladhq_s32): Likewise.
14764 (vqdmlsdhxq_s32): Likewise.
14765 (vqdmlsdhq_s32): Likewise.
14766 (vqdmlahq_n_s32): Likewise.
14767 (vqdmladhxq_s32): Likewise.
14768 (vqdmladhq_s32): Likewise.
14769 (vmlsdavaxq_s32): Likewise.
14770 (vmlsdavaq_s32): Likewise.
14771 (vmlasq_n_s32): Likewise.
14772 (vmlaq_n_s32): Likewise.
14773 (vmladavaxq_s32): Likewise.
14774 (vmladavaq_s32): Likewise.
14775 (vsriq_n_s32): Likewise.
14776 (vsliq_n_s32): Likewise.
14777 (vpselq_u64): Likewise.
14778 (vpselq_s64): Likewise.
14779 (__arm_vpselq_u8): Define intrinsic.
14780 (__arm_vpselq_s8): Likewise.
14781 (__arm_vrev64q_m_u8): Likewise.
14782 (__arm_vqrdmlashq_n_u8): Likewise.
14783 (__arm_vqrdmlahq_n_u8): Likewise.
14784 (__arm_vqdmlahq_n_u8): Likewise.
14785 (__arm_vmvnq_m_u8): Likewise.
14786 (__arm_vmlasq_n_u8): Likewise.
14787 (__arm_vmlaq_n_u8): Likewise.
14788 (__arm_vmladavq_p_u8): Likewise.
14789 (__arm_vmladavaq_u8): Likewise.
14790 (__arm_vminvq_p_u8): Likewise.
14791 (__arm_vmaxvq_p_u8): Likewise.
14792 (__arm_vdupq_m_n_u8): Likewise.
14793 (__arm_vcmpneq_m_u8): Likewise.
14794 (__arm_vcmpneq_m_n_u8): Likewise.
14795 (__arm_vcmphiq_m_u8): Likewise.
14796 (__arm_vcmphiq_m_n_u8): Likewise.
14797 (__arm_vcmpeqq_m_u8): Likewise.
14798 (__arm_vcmpeqq_m_n_u8): Likewise.
14799 (__arm_vcmpcsq_m_u8): Likewise.
14800 (__arm_vcmpcsq_m_n_u8): Likewise.
14801 (__arm_vclzq_m_u8): Likewise.
14802 (__arm_vaddvaq_p_u8): Likewise.
14803 (__arm_vsriq_n_u8): Likewise.
14804 (__arm_vsliq_n_u8): Likewise.
14805 (__arm_vshlq_m_r_u8): Likewise.
14806 (__arm_vrshlq_m_n_u8): Likewise.
14807 (__arm_vqshlq_m_r_u8): Likewise.
14808 (__arm_vqrshlq_m_n_u8): Likewise.
14809 (__arm_vminavq_p_s8): Likewise.
14810 (__arm_vminaq_m_s8): Likewise.
14811 (__arm_vmaxavq_p_s8): Likewise.
14812 (__arm_vmaxaq_m_s8): Likewise.
14813 (__arm_vcmpneq_m_s8): Likewise.
14814 (__arm_vcmpneq_m_n_s8): Likewise.
14815 (__arm_vcmpltq_m_s8): Likewise.
14816 (__arm_vcmpltq_m_n_s8): Likewise.
14817 (__arm_vcmpleq_m_s8): Likewise.
14818 (__arm_vcmpleq_m_n_s8): Likewise.
14819 (__arm_vcmpgtq_m_s8): Likewise.
14820 (__arm_vcmpgtq_m_n_s8): Likewise.
14821 (__arm_vcmpgeq_m_s8): Likewise.
14822 (__arm_vcmpgeq_m_n_s8): Likewise.
14823 (__arm_vcmpeqq_m_s8): Likewise.
14824 (__arm_vcmpeqq_m_n_s8): Likewise.
14825 (__arm_vshlq_m_r_s8): Likewise.
14826 (__arm_vrshlq_m_n_s8): Likewise.
14827 (__arm_vrev64q_m_s8): Likewise.
14828 (__arm_vqshlq_m_r_s8): Likewise.
14829 (__arm_vqrshlq_m_n_s8): Likewise.
14830 (__arm_vqnegq_m_s8): Likewise.
14831 (__arm_vqabsq_m_s8): Likewise.
14832 (__arm_vnegq_m_s8): Likewise.
14833 (__arm_vmvnq_m_s8): Likewise.
14834 (__arm_vmlsdavxq_p_s8): Likewise.
14835 (__arm_vmlsdavq_p_s8): Likewise.
14836 (__arm_vmladavxq_p_s8): Likewise.
14837 (__arm_vmladavq_p_s8): Likewise.
14838 (__arm_vminvq_p_s8): Likewise.
14839 (__arm_vmaxvq_p_s8): Likewise.
14840 (__arm_vdupq_m_n_s8): Likewise.
14841 (__arm_vclzq_m_s8): Likewise.
14842 (__arm_vclsq_m_s8): Likewise.
14843 (__arm_vaddvaq_p_s8): Likewise.
14844 (__arm_vabsq_m_s8): Likewise.
14845 (__arm_vqrdmlsdhxq_s8): Likewise.
14846 (__arm_vqrdmlsdhq_s8): Likewise.
14847 (__arm_vqrdmlashq_n_s8): Likewise.
14848 (__arm_vqrdmlahq_n_s8): Likewise.
14849 (__arm_vqrdmladhxq_s8): Likewise.
14850 (__arm_vqrdmladhq_s8): Likewise.
14851 (__arm_vqdmlsdhxq_s8): Likewise.
14852 (__arm_vqdmlsdhq_s8): Likewise.
14853 (__arm_vqdmlahq_n_s8): Likewise.
14854 (__arm_vqdmladhxq_s8): Likewise.
14855 (__arm_vqdmladhq_s8): Likewise.
14856 (__arm_vmlsdavaxq_s8): Likewise.
14857 (__arm_vmlsdavaq_s8): Likewise.
14858 (__arm_vmlasq_n_s8): Likewise.
14859 (__arm_vmlaq_n_s8): Likewise.
14860 (__arm_vmladavaxq_s8): Likewise.
14861 (__arm_vmladavaq_s8): Likewise.
14862 (__arm_vsriq_n_s8): Likewise.
14863 (__arm_vsliq_n_s8): Likewise.
14864 (__arm_vpselq_u16): Likewise.
14865 (__arm_vpselq_s16): Likewise.
14866 (__arm_vrev64q_m_u16): Likewise.
14867 (__arm_vqrdmlashq_n_u16): Likewise.
14868 (__arm_vqrdmlahq_n_u16): Likewise.
14869 (__arm_vqdmlahq_n_u16): Likewise.
14870 (__arm_vmvnq_m_u16): Likewise.
14871 (__arm_vmlasq_n_u16): Likewise.
14872 (__arm_vmlaq_n_u16): Likewise.
14873 (__arm_vmladavq_p_u16): Likewise.
14874 (__arm_vmladavaq_u16): Likewise.
14875 (__arm_vminvq_p_u16): Likewise.
14876 (__arm_vmaxvq_p_u16): Likewise.
14877 (__arm_vdupq_m_n_u16): Likewise.
14878 (__arm_vcmpneq_m_u16): Likewise.
14879 (__arm_vcmpneq_m_n_u16): Likewise.
14880 (__arm_vcmphiq_m_u16): Likewise.
14881 (__arm_vcmphiq_m_n_u16): Likewise.
14882 (__arm_vcmpeqq_m_u16): Likewise.
14883 (__arm_vcmpeqq_m_n_u16): Likewise.
14884 (__arm_vcmpcsq_m_u16): Likewise.
14885 (__arm_vcmpcsq_m_n_u16): Likewise.
14886 (__arm_vclzq_m_u16): Likewise.
14887 (__arm_vaddvaq_p_u16): Likewise.
14888 (__arm_vsriq_n_u16): Likewise.
14889 (__arm_vsliq_n_u16): Likewise.
14890 (__arm_vshlq_m_r_u16): Likewise.
14891 (__arm_vrshlq_m_n_u16): Likewise.
14892 (__arm_vqshlq_m_r_u16): Likewise.
14893 (__arm_vqrshlq_m_n_u16): Likewise.
14894 (__arm_vminavq_p_s16): Likewise.
14895 (__arm_vminaq_m_s16): Likewise.
14896 (__arm_vmaxavq_p_s16): Likewise.
14897 (__arm_vmaxaq_m_s16): Likewise.
14898 (__arm_vcmpneq_m_s16): Likewise.
14899 (__arm_vcmpneq_m_n_s16): Likewise.
14900 (__arm_vcmpltq_m_s16): Likewise.
14901 (__arm_vcmpltq_m_n_s16): Likewise.
14902 (__arm_vcmpleq_m_s16): Likewise.
14903 (__arm_vcmpleq_m_n_s16): Likewise.
14904 (__arm_vcmpgtq_m_s16): Likewise.
14905 (__arm_vcmpgtq_m_n_s16): Likewise.
14906 (__arm_vcmpgeq_m_s16): Likewise.
14907 (__arm_vcmpgeq_m_n_s16): Likewise.
14908 (__arm_vcmpeqq_m_s16): Likewise.
14909 (__arm_vcmpeqq_m_n_s16): Likewise.
14910 (__arm_vshlq_m_r_s16): Likewise.
14911 (__arm_vrshlq_m_n_s16): Likewise.
14912 (__arm_vrev64q_m_s16): Likewise.
14913 (__arm_vqshlq_m_r_s16): Likewise.
14914 (__arm_vqrshlq_m_n_s16): Likewise.
14915 (__arm_vqnegq_m_s16): Likewise.
14916 (__arm_vqabsq_m_s16): Likewise.
14917 (__arm_vnegq_m_s16): Likewise.
14918 (__arm_vmvnq_m_s16): Likewise.
14919 (__arm_vmlsdavxq_p_s16): Likewise.
14920 (__arm_vmlsdavq_p_s16): Likewise.
14921 (__arm_vmladavxq_p_s16): Likewise.
14922 (__arm_vmladavq_p_s16): Likewise.
14923 (__arm_vminvq_p_s16): Likewise.
14924 (__arm_vmaxvq_p_s16): Likewise.
14925 (__arm_vdupq_m_n_s16): Likewise.
14926 (__arm_vclzq_m_s16): Likewise.
14927 (__arm_vclsq_m_s16): Likewise.
14928 (__arm_vaddvaq_p_s16): Likewise.
14929 (__arm_vabsq_m_s16): Likewise.
14930 (__arm_vqrdmlsdhxq_s16): Likewise.
14931 (__arm_vqrdmlsdhq_s16): Likewise.
14932 (__arm_vqrdmlashq_n_s16): Likewise.
14933 (__arm_vqrdmlahq_n_s16): Likewise.
14934 (__arm_vqrdmladhxq_s16): Likewise.
14935 (__arm_vqrdmladhq_s16): Likewise.
14936 (__arm_vqdmlsdhxq_s16): Likewise.
14937 (__arm_vqdmlsdhq_s16): Likewise.
14938 (__arm_vqdmlahq_n_s16): Likewise.
14939 (__arm_vqdmladhxq_s16): Likewise.
14940 (__arm_vqdmladhq_s16): Likewise.
14941 (__arm_vmlsdavaxq_s16): Likewise.
14942 (__arm_vmlsdavaq_s16): Likewise.
14943 (__arm_vmlasq_n_s16): Likewise.
14944 (__arm_vmlaq_n_s16): Likewise.
14945 (__arm_vmladavaxq_s16): Likewise.
14946 (__arm_vmladavaq_s16): Likewise.
14947 (__arm_vsriq_n_s16): Likewise.
14948 (__arm_vsliq_n_s16): Likewise.
14949 (__arm_vpselq_u32): Likewise.
14950 (__arm_vpselq_s32): Likewise.
14951 (__arm_vrev64q_m_u32): Likewise.
14952 (__arm_vqrdmlashq_n_u32): Likewise.
14953 (__arm_vqrdmlahq_n_u32): Likewise.
14954 (__arm_vqdmlahq_n_u32): Likewise.
14955 (__arm_vmvnq_m_u32): Likewise.
14956 (__arm_vmlasq_n_u32): Likewise.
14957 (__arm_vmlaq_n_u32): Likewise.
14958 (__arm_vmladavq_p_u32): Likewise.
14959 (__arm_vmladavaq_u32): Likewise.
14960 (__arm_vminvq_p_u32): Likewise.
14961 (__arm_vmaxvq_p_u32): Likewise.
14962 (__arm_vdupq_m_n_u32): Likewise.
14963 (__arm_vcmpneq_m_u32): Likewise.
14964 (__arm_vcmpneq_m_n_u32): Likewise.
14965 (__arm_vcmphiq_m_u32): Likewise.
14966 (__arm_vcmphiq_m_n_u32): Likewise.
14967 (__arm_vcmpeqq_m_u32): Likewise.
14968 (__arm_vcmpeqq_m_n_u32): Likewise.
14969 (__arm_vcmpcsq_m_u32): Likewise.
14970 (__arm_vcmpcsq_m_n_u32): Likewise.
14971 (__arm_vclzq_m_u32): Likewise.
14972 (__arm_vaddvaq_p_u32): Likewise.
14973 (__arm_vsriq_n_u32): Likewise.
14974 (__arm_vsliq_n_u32): Likewise.
14975 (__arm_vshlq_m_r_u32): Likewise.
14976 (__arm_vrshlq_m_n_u32): Likewise.
14977 (__arm_vqshlq_m_r_u32): Likewise.
14978 (__arm_vqrshlq_m_n_u32): Likewise.
14979 (__arm_vminavq_p_s32): Likewise.
14980 (__arm_vminaq_m_s32): Likewise.
14981 (__arm_vmaxavq_p_s32): Likewise.
14982 (__arm_vmaxaq_m_s32): Likewise.
14983 (__arm_vcmpneq_m_s32): Likewise.
14984 (__arm_vcmpneq_m_n_s32): Likewise.
14985 (__arm_vcmpltq_m_s32): Likewise.
14986 (__arm_vcmpltq_m_n_s32): Likewise.
14987 (__arm_vcmpleq_m_s32): Likewise.
14988 (__arm_vcmpleq_m_n_s32): Likewise.
14989 (__arm_vcmpgtq_m_s32): Likewise.
14990 (__arm_vcmpgtq_m_n_s32): Likewise.
14991 (__arm_vcmpgeq_m_s32): Likewise.
14992 (__arm_vcmpgeq_m_n_s32): Likewise.
14993 (__arm_vcmpeqq_m_s32): Likewise.
14994 (__arm_vcmpeqq_m_n_s32): Likewise.
14995 (__arm_vshlq_m_r_s32): Likewise.
14996 (__arm_vrshlq_m_n_s32): Likewise.
14997 (__arm_vrev64q_m_s32): Likewise.
14998 (__arm_vqshlq_m_r_s32): Likewise.
14999 (__arm_vqrshlq_m_n_s32): Likewise.
15000 (__arm_vqnegq_m_s32): Likewise.
15001 (__arm_vqabsq_m_s32): Likewise.
15002 (__arm_vnegq_m_s32): Likewise.
15003 (__arm_vmvnq_m_s32): Likewise.
15004 (__arm_vmlsdavxq_p_s32): Likewise.
15005 (__arm_vmlsdavq_p_s32): Likewise.
15006 (__arm_vmladavxq_p_s32): Likewise.
15007 (__arm_vmladavq_p_s32): Likewise.
15008 (__arm_vminvq_p_s32): Likewise.
15009 (__arm_vmaxvq_p_s32): Likewise.
15010 (__arm_vdupq_m_n_s32): Likewise.
15011 (__arm_vclzq_m_s32): Likewise.
15012 (__arm_vclsq_m_s32): Likewise.
15013 (__arm_vaddvaq_p_s32): Likewise.
15014 (__arm_vabsq_m_s32): Likewise.
15015 (__arm_vqrdmlsdhxq_s32): Likewise.
15016 (__arm_vqrdmlsdhq_s32): Likewise.
15017 (__arm_vqrdmlashq_n_s32): Likewise.
15018 (__arm_vqrdmlahq_n_s32): Likewise.
15019 (__arm_vqrdmladhxq_s32): Likewise.
15020 (__arm_vqrdmladhq_s32): Likewise.
15021 (__arm_vqdmlsdhxq_s32): Likewise.
15022 (__arm_vqdmlsdhq_s32): Likewise.
15023 (__arm_vqdmlahq_n_s32): Likewise.
15024 (__arm_vqdmladhxq_s32): Likewise.
15025 (__arm_vqdmladhq_s32): Likewise.
15026 (__arm_vmlsdavaxq_s32): Likewise.
15027 (__arm_vmlsdavaq_s32): Likewise.
15028 (__arm_vmlasq_n_s32): Likewise.
15029 (__arm_vmlaq_n_s32): Likewise.
15030 (__arm_vmladavaxq_s32): Likewise.
15031 (__arm_vmladavaq_s32): Likewise.
15032 (__arm_vsriq_n_s32): Likewise.
15033 (__arm_vsliq_n_s32): Likewise.
15034 (__arm_vpselq_u64): Likewise.
15035 (__arm_vpselq_s64): Likewise.
15036 (vcmpneq_m_n): Define polymorphic variant.
15037 (vcmpneq_m): Likewise.
15038 (vqrdmlsdhq): Likewise.
15039 (vqrdmlsdhxq): Likewise.
15040 (vqrshlq_m_n): Likewise.
15041 (vqshlq_m_r): Likewise.
15042 (vrev64q_m): Likewise.
15043 (vrshlq_m_n): Likewise.
15044 (vshlq_m_r): Likewise.
15045 (vsliq_n): Likewise.
15046 (vsriq_n): Likewise.
15047 (vqrdmlashq_n): Likewise.
15048 (vqrdmlahq): Likewise.
15049 (vqrdmladhxq): Likewise.
15050 (vqrdmladhq): Likewise.
15051 (vqnegq_m): Likewise.
15052 (vqdmlsdhxq): Likewise.
15053 (vabsq_m): Likewise.
15054 (vclsq_m): Likewise.
15055 (vclzq_m): Likewise.
15056 (vcmpgeq_m): Likewise.
15057 (vcmpgeq_m_n): Likewise.
15058 (vdupq_m_n): Likewise.
15059 (vmaxaq_m): Likewise.
15060 (vmlaq_n): Likewise.
15061 (vmlasq_n): Likewise.
15062 (vmvnq_m): Likewise.
15063 (vnegq_m): Likewise.
15064 (vpselq): Likewise.
15065 (vqdmlahq_n): Likewise.
15066 (vqrdmlahq_n): Likewise.
15067 (vqdmlsdhq): Likewise.
15068 (vqdmladhq): Likewise.
15069 (vqabsq_m): Likewise.
15070 (vminaq_m): Likewise.
15071 (vrmlaldavhaq): Likewise.
15072 (vmlsdavxq_p): Likewise.
15073 (vmlsdavq_p): Likewise.
15074 (vmlsdavaxq): Likewise.
15075 (vmlsdavaq): Likewise.
15076 (vaddvaq_p): Likewise.
15077 (vcmpcsq_m_n): Likewise.
15078 (vcmpcsq_m): Likewise.
15079 (vcmpeqq_m_n): Likewise.
15080 (vcmpeqq_m): Likewise.
15081 (vmladavxq_p): Likewise.
15082 (vmladavq_p): Likewise.
15083 (vmladavaxq): Likewise.
15084 (vmladavaq): Likewise.
15085 (vminvq_p): Likewise.
15086 (vminavq_p): Likewise.
15087 (vmaxvq_p): Likewise.
15088 (vmaxavq_p): Likewise.
15089 (vcmpltq_m_n): Likewise.
15090 (vcmpltq_m): Likewise.
15091 (vcmpleq_m): Likewise.
15092 (vcmpleq_m_n): Likewise.
15093 (vcmphiq_m_n): Likewise.
15094 (vcmphiq_m): Likewise.
15095 (vcmpgtq_m_n): Likewise.
15096 (vcmpgtq_m): Likewise.
15097 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
15099 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
15100 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
15101 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
15102 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
15103 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
15104 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
15105 * config/arm/constraints.md (Rc): Define constraint to check constant is
15106 in the range of 0 to 15.
15107 (Re): Define constraint to check constant is in the range of 0 to 31.
15108 * config/arm/mve.md (VADDVAQ_P): Define iterator.
15109 (VCLZQ_M): Likewise.
15110 (VCMPEQQ_M_N): Likewise.
15111 (VCMPEQQ_M): Likewise.
15112 (VCMPNEQ_M_N): Likewise.
15113 (VCMPNEQ_M): Likewise.
15114 (VDUPQ_M_N): Likewise.
15115 (VMAXVQ_P): Likewise.
15116 (VMINVQ_P): Likewise.
15117 (VMLADAVAQ): Likewise.
15118 (VMLADAVQ_P): Likewise.
15119 (VMLAQ_N): Likewise.
15120 (VMLASQ_N): Likewise.
15121 (VMVNQ_M): Likewise.
15122 (VPSELQ): Likewise.
15123 (VQDMLAHQ_N): Likewise.
15124 (VQRDMLAHQ_N): Likewise.
15125 (VQRDMLASHQ_N): Likewise.
15126 (VQRSHLQ_M_N): Likewise.
15127 (VQSHLQ_M_R): Likewise.
15128 (VREV64Q_M): Likewise.
15129 (VRSHLQ_M_N): Likewise.
15130 (VSHLQ_M_R): Likewise.
15131 (VSLIQ_N): Likewise.
15132 (VSRIQ_N): Likewise.
15133 (mve_vabsq_m_s<mode>): Define RTL pattern.
15134 (mve_vaddvaq_p_<supf><mode>): Likewise.
15135 (mve_vclsq_m_s<mode>): Likewise.
15136 (mve_vclzq_m_<supf><mode>): Likewise.
15137 (mve_vcmpcsq_m_n_u<mode>): Likewise.
15138 (mve_vcmpcsq_m_u<mode>): Likewise.
15139 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
15140 (mve_vcmpeqq_m_<supf><mode>): Likewise.
15141 (mve_vcmpgeq_m_n_s<mode>): Likewise.
15142 (mve_vcmpgeq_m_s<mode>): Likewise.
15143 (mve_vcmpgtq_m_n_s<mode>): Likewise.
15144 (mve_vcmpgtq_m_s<mode>): Likewise.
15145 (mve_vcmphiq_m_n_u<mode>): Likewise.
15146 (mve_vcmphiq_m_u<mode>): Likewise.
15147 (mve_vcmpleq_m_n_s<mode>): Likewise.
15148 (mve_vcmpleq_m_s<mode>): Likewise.
15149 (mve_vcmpltq_m_n_s<mode>): Likewise.
15150 (mve_vcmpltq_m_s<mode>): Likewise.
15151 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
15152 (mve_vcmpneq_m_<supf><mode>): Likewise.
15153 (mve_vdupq_m_n_<supf><mode>): Likewise.
15154 (mve_vmaxaq_m_s<mode>): Likewise.
15155 (mve_vmaxavq_p_s<mode>): Likewise.
15156 (mve_vmaxvq_p_<supf><mode>): Likewise.
15157 (mve_vminaq_m_s<mode>): Likewise.
15158 (mve_vminavq_p_s<mode>): Likewise.
15159 (mve_vminvq_p_<supf><mode>): Likewise.
15160 (mve_vmladavaq_<supf><mode>): Likewise.
15161 (mve_vmladavq_p_<supf><mode>): Likewise.
15162 (mve_vmladavxq_p_s<mode>): Likewise.
15163 (mve_vmlaq_n_<supf><mode>): Likewise.
15164 (mve_vmlasq_n_<supf><mode>): Likewise.
15165 (mve_vmlsdavq_p_s<mode>): Likewise.
15166 (mve_vmlsdavxq_p_s<mode>): Likewise.
15167 (mve_vmvnq_m_<supf><mode>): Likewise.
15168 (mve_vnegq_m_s<mode>): Likewise.
15169 (mve_vpselq_<supf><mode>): Likewise.
15170 (mve_vqabsq_m_s<mode>): Likewise.
15171 (mve_vqdmlahq_n_<supf><mode>): Likewise.
15172 (mve_vqnegq_m_s<mode>): Likewise.
15173 (mve_vqrdmladhq_s<mode>): Likewise.
15174 (mve_vqrdmladhxq_s<mode>): Likewise.
15175 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
15176 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
15177 (mve_vqrdmlsdhq_s<mode>): Likewise.
15178 (mve_vqrdmlsdhxq_s<mode>): Likewise.
15179 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
15180 (mve_vqshlq_m_r_<supf><mode>): Likewise.
15181 (mve_vrev64q_m_<supf><mode>): Likewise.
15182 (mve_vrshlq_m_n_<supf><mode>): Likewise.
15183 (mve_vshlq_m_r_<supf><mode>): Likewise.
15184 (mve_vsliq_n_<supf><mode>): Likewise.
15185 (mve_vsriq_n_<supf><mode>): Likewise.
15186 (mve_vqdmlsdhxq_s<mode>): Likewise.
15187 (mve_vqdmlsdhq_s<mode>): Likewise.
15188 (mve_vqdmladhxq_s<mode>): Likewise.
15189 (mve_vqdmladhq_s<mode>): Likewise.
15190 (mve_vmlsdavaxq_s<mode>): Likewise.
15191 (mve_vmlsdavaq_s<mode>): Likewise.
15192 (mve_vmladavaxq_s<mode>): Likewise.
15193 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
15194 matching constraint Rc.
15195 (mve_imm_31): Define predicate to check the matching constraint Re.
15197 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
15199 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
15200 (vec_cmp<mode>di_dup): Likewise.
15201 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
15203 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
15205 * config/gcn/gcn-valu.md (COND_MODE): Delete.
15206 (COND_INT_MODE): Delete.
15207 (cond_op): Add "mult".
15208 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
15209 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
15211 2020-03-18 Richard Biener <rguenther@suse.de>
15213 PR middle-end/94206
15214 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
15215 partial int modes or not mode-precision integer types for
15218 2020-03-18 Jakub Jelinek <jakub@redhat.com>
15220 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
15222 * config/arc/arc.c (frame_stack_add): Likewise.
15223 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
15225 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
15226 * tree-ssa-strlen.h (handle_printf_call): Likewise.
15227 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
15228 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
15230 2020-03-18 Duan bo <duanbo3@huawei.com>
15233 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
15234 (@ldr_got_tiny_<mode>): New pattern.
15235 (ldr_got_tiny_sidi): Likewise.
15236 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
15237 them to handle SYMBOL_TINY_GOT for ILP32.
15239 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
15241 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
15242 call-preserved for SVE PCS functions.
15243 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
15244 Optimize the case in which there are no following vector save slots.
15246 2020-03-18 Richard Biener <rguenther@suse.de>
15248 PR middle-end/94188
15249 * fold-const.c (build_fold_addr_expr): Convert address to
15251 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
15252 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
15253 to build the ADDR_EXPR which we don't really want to simplify.
15254 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
15255 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
15256 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
15257 (simplify_builtin_call): Strip useless type conversions.
15258 * tree-ssa-strlen.c (new_strinfo): Likewise.
15260 2020-03-17 Alexey Neyman <stilor@att.net>
15263 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
15264 the debug level is terse and the declaration is public. Do not
15265 generate type info.
15266 (dwarf2out_decl): Same.
15267 (add_type_attribute): Return immediately if debug level is
15270 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
15272 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
15274 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15275 Mihail Ionescu <mihail.ionescu@arm.com>
15276 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15278 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
15279 Define qualifier for ternary operands.
15280 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
15281 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
15282 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
15283 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
15284 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
15285 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
15286 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
15287 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
15288 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
15289 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
15290 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
15291 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
15292 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
15293 * config/arm/arm_mve.h (vabavq_s8): Define macro.
15294 (vabavq_s16): Likewise.
15295 (vabavq_s32): Likewise.
15296 (vbicq_m_n_s16): Likewise.
15297 (vbicq_m_n_s32): Likewise.
15298 (vbicq_m_n_u16): Likewise.
15299 (vbicq_m_n_u32): Likewise.
15300 (vcmpeqq_m_f16): Likewise.
15301 (vcmpeqq_m_f32): Likewise.
15302 (vcvtaq_m_s16_f16): Likewise.
15303 (vcvtaq_m_u16_f16): Likewise.
15304 (vcvtaq_m_s32_f32): Likewise.
15305 (vcvtaq_m_u32_f32): Likewise.
15306 (vcvtq_m_f16_s16): Likewise.
15307 (vcvtq_m_f16_u16): Likewise.
15308 (vcvtq_m_f32_s32): Likewise.
15309 (vcvtq_m_f32_u32): Likewise.
15310 (vqrshrnbq_n_s16): Likewise.
15311 (vqrshrnbq_n_u16): Likewise.
15312 (vqrshrnbq_n_s32): Likewise.
15313 (vqrshrnbq_n_u32): Likewise.
15314 (vqrshrunbq_n_s16): Likewise.
15315 (vqrshrunbq_n_s32): Likewise.
15316 (vrmlaldavhaq_s32): Likewise.
15317 (vrmlaldavhaq_u32): Likewise.
15318 (vshlcq_s8): Likewise.
15319 (vshlcq_u8): Likewise.
15320 (vshlcq_s16): Likewise.
15321 (vshlcq_u16): Likewise.
15322 (vshlcq_s32): Likewise.
15323 (vshlcq_u32): Likewise.
15324 (vabavq_u8): Likewise.
15325 (vabavq_u16): Likewise.
15326 (vabavq_u32): Likewise.
15327 (__arm_vabavq_s8): Define intrinsic.
15328 (__arm_vabavq_s16): Likewise.
15329 (__arm_vabavq_s32): Likewise.
15330 (__arm_vabavq_u8): Likewise.
15331 (__arm_vabavq_u16): Likewise.
15332 (__arm_vabavq_u32): Likewise.
15333 (__arm_vbicq_m_n_s16): Likewise.
15334 (__arm_vbicq_m_n_s32): Likewise.
15335 (__arm_vbicq_m_n_u16): Likewise.
15336 (__arm_vbicq_m_n_u32): Likewise.
15337 (__arm_vqrshrnbq_n_s16): Likewise.
15338 (__arm_vqrshrnbq_n_u16): Likewise.
15339 (__arm_vqrshrnbq_n_s32): Likewise.
15340 (__arm_vqrshrnbq_n_u32): Likewise.
15341 (__arm_vqrshrunbq_n_s16): Likewise.
15342 (__arm_vqrshrunbq_n_s32): Likewise.
15343 (__arm_vrmlaldavhaq_s32): Likewise.
15344 (__arm_vrmlaldavhaq_u32): Likewise.
15345 (__arm_vshlcq_s8): Likewise.
15346 (__arm_vshlcq_u8): Likewise.
15347 (__arm_vshlcq_s16): Likewise.
15348 (__arm_vshlcq_u16): Likewise.
15349 (__arm_vshlcq_s32): Likewise.
15350 (__arm_vshlcq_u32): Likewise.
15351 (__arm_vcmpeqq_m_f16): Likewise.
15352 (__arm_vcmpeqq_m_f32): Likewise.
15353 (__arm_vcvtaq_m_s16_f16): Likewise.
15354 (__arm_vcvtaq_m_u16_f16): Likewise.
15355 (__arm_vcvtaq_m_s32_f32): Likewise.
15356 (__arm_vcvtaq_m_u32_f32): Likewise.
15357 (__arm_vcvtq_m_f16_s16): Likewise.
15358 (__arm_vcvtq_m_f16_u16): Likewise.
15359 (__arm_vcvtq_m_f32_s32): Likewise.
15360 (__arm_vcvtq_m_f32_u32): Likewise.
15361 (vcvtaq_m): Define polymorphic variant.
15362 (vcvtq_m): Likewise.
15363 (vabavq): Likewise.
15364 (vshlcq): Likewise.
15365 (vbicq_m_n): Likewise.
15366 (vqrshrnbq_n): Likewise.
15367 (vqrshrunbq_n): Likewise.
15368 * config/arm/arm_mve_builtins.def
15369 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
15370 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
15371 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
15372 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
15373 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
15374 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
15375 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
15376 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
15377 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
15378 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
15379 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
15380 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
15381 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
15382 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
15383 * config/arm/mve.md (VBICQ_M_N): Define iterator.
15384 (VCVTAQ_M): Likewise.
15385 (VCVTQ_M_TO_F): Likewise.
15386 (VQRSHRNBQ_N): Likewise.
15387 (VABAVQ): Likewise.
15388 (VSHLCQ): Likewise.
15389 (VRMLALDAVHAQ): Likewise.
15390 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
15391 (mve_vcmpeqq_m_f<mode>): Likewise.
15392 (mve_vcvtaq_m_<supf><mode>): Likewise.
15393 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
15394 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
15395 (mve_vqrshrunbq_n_s<mode>): Likewise.
15396 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
15397 (mve_vabavq_<supf><mode>): Likewise.
15398 (mve_vshlcq_<supf><mode>): Likewise.
15399 (mve_vshlcq_<supf><mode>): Likewise.
15400 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
15401 (mve_vshlcq_carry_<supf><mode>): Likewise.
15403 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15404 Mihail Ionescu <mihail.ionescu@arm.com>
15405 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15407 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
15408 (vqmovnbq_u16): Likewise.
15409 (vmulltq_poly_p8): Likewise.
15410 (vmullbq_poly_p8): Likewise.
15411 (vmovntq_u16): Likewise.
15412 (vmovnbq_u16): Likewise.
15413 (vmlaldavxq_u16): Likewise.
15414 (vmlaldavq_u16): Likewise.
15415 (vqmovuntq_s16): Likewise.
15416 (vqmovunbq_s16): Likewise.
15417 (vshlltq_n_u8): Likewise.
15418 (vshllbq_n_u8): Likewise.
15419 (vorrq_n_u16): Likewise.
15420 (vbicq_n_u16): Likewise.
15421 (vcmpneq_n_f16): Likewise.
15422 (vcmpneq_f16): Likewise.
15423 (vcmpltq_n_f16): Likewise.
15424 (vcmpltq_f16): Likewise.
15425 (vcmpleq_n_f16): Likewise.
15426 (vcmpleq_f16): Likewise.
15427 (vcmpgtq_n_f16): Likewise.
15428 (vcmpgtq_f16): Likewise.
15429 (vcmpgeq_n_f16): Likewise.
15430 (vcmpgeq_f16): Likewise.
15431 (vcmpeqq_n_f16): Likewise.
15432 (vcmpeqq_f16): Likewise.
15433 (vsubq_f16): Likewise.
15434 (vqmovntq_s16): Likewise.
15435 (vqmovnbq_s16): Likewise.
15436 (vqdmulltq_s16): Likewise.
15437 (vqdmulltq_n_s16): Likewise.
15438 (vqdmullbq_s16): Likewise.
15439 (vqdmullbq_n_s16): Likewise.
15440 (vorrq_f16): Likewise.
15441 (vornq_f16): Likewise.
15442 (vmulq_n_f16): Likewise.
15443 (vmulq_f16): Likewise.
15444 (vmovntq_s16): Likewise.
15445 (vmovnbq_s16): Likewise.
15446 (vmlsldavxq_s16): Likewise.
15447 (vmlsldavq_s16): Likewise.
15448 (vmlaldavxq_s16): Likewise.
15449 (vmlaldavq_s16): Likewise.
15450 (vminnmvq_f16): Likewise.
15451 (vminnmq_f16): Likewise.
15452 (vminnmavq_f16): Likewise.
15453 (vminnmaq_f16): Likewise.
15454 (vmaxnmvq_f16): Likewise.
15455 (vmaxnmq_f16): Likewise.
15456 (vmaxnmavq_f16): Likewise.
15457 (vmaxnmaq_f16): Likewise.
15458 (veorq_f16): Likewise.
15459 (vcmulq_rot90_f16): Likewise.
15460 (vcmulq_rot270_f16): Likewise.
15461 (vcmulq_rot180_f16): Likewise.
15462 (vcmulq_f16): Likewise.
15463 (vcaddq_rot90_f16): Likewise.
15464 (vcaddq_rot270_f16): Likewise.
15465 (vbicq_f16): Likewise.
15466 (vandq_f16): Likewise.
15467 (vaddq_n_f16): Likewise.
15468 (vabdq_f16): Likewise.
15469 (vshlltq_n_s8): Likewise.
15470 (vshllbq_n_s8): Likewise.
15471 (vorrq_n_s16): Likewise.
15472 (vbicq_n_s16): Likewise.
15473 (vqmovntq_u32): Likewise.
15474 (vqmovnbq_u32): Likewise.
15475 (vmulltq_poly_p16): Likewise.
15476 (vmullbq_poly_p16): Likewise.
15477 (vmovntq_u32): Likewise.
15478 (vmovnbq_u32): Likewise.
15479 (vmlaldavxq_u32): Likewise.
15480 (vmlaldavq_u32): Likewise.
15481 (vqmovuntq_s32): Likewise.
15482 (vqmovunbq_s32): Likewise.
15483 (vshlltq_n_u16): Likewise.
15484 (vshllbq_n_u16): Likewise.
15485 (vorrq_n_u32): Likewise.
15486 (vbicq_n_u32): Likewise.
15487 (vcmpneq_n_f32): Likewise.
15488 (vcmpneq_f32): Likewise.
15489 (vcmpltq_n_f32): Likewise.
15490 (vcmpltq_f32): Likewise.
15491 (vcmpleq_n_f32): Likewise.
15492 (vcmpleq_f32): Likewise.
15493 (vcmpgtq_n_f32): Likewise.
15494 (vcmpgtq_f32): Likewise.
15495 (vcmpgeq_n_f32): Likewise.
15496 (vcmpgeq_f32): Likewise.
15497 (vcmpeqq_n_f32): Likewise.
15498 (vcmpeqq_f32): Likewise.
15499 (vsubq_f32): Likewise.
15500 (vqmovntq_s32): Likewise.
15501 (vqmovnbq_s32): Likewise.
15502 (vqdmulltq_s32): Likewise.
15503 (vqdmulltq_n_s32): Likewise.
15504 (vqdmullbq_s32): Likewise.
15505 (vqdmullbq_n_s32): Likewise.
15506 (vorrq_f32): Likewise.
15507 (vornq_f32): Likewise.
15508 (vmulq_n_f32): Likewise.
15509 (vmulq_f32): Likewise.
15510 (vmovntq_s32): Likewise.
15511 (vmovnbq_s32): Likewise.
15512 (vmlsldavxq_s32): Likewise.
15513 (vmlsldavq_s32): Likewise.
15514 (vmlaldavxq_s32): Likewise.
15515 (vmlaldavq_s32): Likewise.
15516 (vminnmvq_f32): Likewise.
15517 (vminnmq_f32): Likewise.
15518 (vminnmavq_f32): Likewise.
15519 (vminnmaq_f32): Likewise.
15520 (vmaxnmvq_f32): Likewise.
15521 (vmaxnmq_f32): Likewise.
15522 (vmaxnmavq_f32): Likewise.
15523 (vmaxnmaq_f32): Likewise.
15524 (veorq_f32): Likewise.
15525 (vcmulq_rot90_f32): Likewise.
15526 (vcmulq_rot270_f32): Likewise.
15527 (vcmulq_rot180_f32): Likewise.
15528 (vcmulq_f32): Likewise.
15529 (vcaddq_rot90_f32): Likewise.
15530 (vcaddq_rot270_f32): Likewise.
15531 (vbicq_f32): Likewise.
15532 (vandq_f32): Likewise.
15533 (vaddq_n_f32): Likewise.
15534 (vabdq_f32): Likewise.
15535 (vshlltq_n_s16): Likewise.
15536 (vshllbq_n_s16): Likewise.
15537 (vorrq_n_s32): Likewise.
15538 (vbicq_n_s32): Likewise.
15539 (vrmlaldavhq_u32): Likewise.
15540 (vctp8q_m): Likewise.
15541 (vctp64q_m): Likewise.
15542 (vctp32q_m): Likewise.
15543 (vctp16q_m): Likewise.
15544 (vaddlvaq_u32): Likewise.
15545 (vrmlsldavhxq_s32): Likewise.
15546 (vrmlsldavhq_s32): Likewise.
15547 (vrmlaldavhxq_s32): Likewise.
15548 (vrmlaldavhq_s32): Likewise.
15549 (vcvttq_f16_f32): Likewise.
15550 (vcvtbq_f16_f32): Likewise.
15551 (vaddlvaq_s32): Likewise.
15552 (__arm_vqmovntq_u16): Define intrinsic.
15553 (__arm_vqmovnbq_u16): Likewise.
15554 (__arm_vmulltq_poly_p8): Likewise.
15555 (__arm_vmullbq_poly_p8): Likewise.
15556 (__arm_vmovntq_u16): Likewise.
15557 (__arm_vmovnbq_u16): Likewise.
15558 (__arm_vmlaldavxq_u16): Likewise.
15559 (__arm_vmlaldavq_u16): Likewise.
15560 (__arm_vqmovuntq_s16): Likewise.
15561 (__arm_vqmovunbq_s16): Likewise.
15562 (__arm_vshlltq_n_u8): Likewise.
15563 (__arm_vshllbq_n_u8): Likewise.
15564 (__arm_vorrq_n_u16): Likewise.
15565 (__arm_vbicq_n_u16): Likewise.
15566 (__arm_vcmpneq_n_f16): Likewise.
15567 (__arm_vcmpneq_f16): Likewise.
15568 (__arm_vcmpltq_n_f16): Likewise.
15569 (__arm_vcmpltq_f16): Likewise.
15570 (__arm_vcmpleq_n_f16): Likewise.
15571 (__arm_vcmpleq_f16): Likewise.
15572 (__arm_vcmpgtq_n_f16): Likewise.
15573 (__arm_vcmpgtq_f16): Likewise.
15574 (__arm_vcmpgeq_n_f16): Likewise.
15575 (__arm_vcmpgeq_f16): Likewise.
15576 (__arm_vcmpeqq_n_f16): Likewise.
15577 (__arm_vcmpeqq_f16): Likewise.
15578 (__arm_vsubq_f16): Likewise.
15579 (__arm_vqmovntq_s16): Likewise.
15580 (__arm_vqmovnbq_s16): Likewise.
15581 (__arm_vqdmulltq_s16): Likewise.
15582 (__arm_vqdmulltq_n_s16): Likewise.
15583 (__arm_vqdmullbq_s16): Likewise.
15584 (__arm_vqdmullbq_n_s16): Likewise.
15585 (__arm_vorrq_f16): Likewise.
15586 (__arm_vornq_f16): Likewise.
15587 (__arm_vmulq_n_f16): Likewise.
15588 (__arm_vmulq_f16): Likewise.
15589 (__arm_vmovntq_s16): Likewise.
15590 (__arm_vmovnbq_s16): Likewise.
15591 (__arm_vmlsldavxq_s16): Likewise.
15592 (__arm_vmlsldavq_s16): Likewise.
15593 (__arm_vmlaldavxq_s16): Likewise.
15594 (__arm_vmlaldavq_s16): Likewise.
15595 (__arm_vminnmvq_f16): Likewise.
15596 (__arm_vminnmq_f16): Likewise.
15597 (__arm_vminnmavq_f16): Likewise.
15598 (__arm_vminnmaq_f16): Likewise.
15599 (__arm_vmaxnmvq_f16): Likewise.
15600 (__arm_vmaxnmq_f16): Likewise.
15601 (__arm_vmaxnmavq_f16): Likewise.
15602 (__arm_vmaxnmaq_f16): Likewise.
15603 (__arm_veorq_f16): Likewise.
15604 (__arm_vcmulq_rot90_f16): Likewise.
15605 (__arm_vcmulq_rot270_f16): Likewise.
15606 (__arm_vcmulq_rot180_f16): Likewise.
15607 (__arm_vcmulq_f16): Likewise.
15608 (__arm_vcaddq_rot90_f16): Likewise.
15609 (__arm_vcaddq_rot270_f16): Likewise.
15610 (__arm_vbicq_f16): Likewise.
15611 (__arm_vandq_f16): Likewise.
15612 (__arm_vaddq_n_f16): Likewise.
15613 (__arm_vabdq_f16): Likewise.
15614 (__arm_vshlltq_n_s8): Likewise.
15615 (__arm_vshllbq_n_s8): Likewise.
15616 (__arm_vorrq_n_s16): Likewise.
15617 (__arm_vbicq_n_s16): Likewise.
15618 (__arm_vqmovntq_u32): Likewise.
15619 (__arm_vqmovnbq_u32): Likewise.
15620 (__arm_vmulltq_poly_p16): Likewise.
15621 (__arm_vmullbq_poly_p16): Likewise.
15622 (__arm_vmovntq_u32): Likewise.
15623 (__arm_vmovnbq_u32): Likewise.
15624 (__arm_vmlaldavxq_u32): Likewise.
15625 (__arm_vmlaldavq_u32): Likewise.
15626 (__arm_vqmovuntq_s32): Likewise.
15627 (__arm_vqmovunbq_s32): Likewise.
15628 (__arm_vshlltq_n_u16): Likewise.
15629 (__arm_vshllbq_n_u16): Likewise.
15630 (__arm_vorrq_n_u32): Likewise.
15631 (__arm_vbicq_n_u32): Likewise.
15632 (__arm_vcmpneq_n_f32): Likewise.
15633 (__arm_vcmpneq_f32): Likewise.
15634 (__arm_vcmpltq_n_f32): Likewise.
15635 (__arm_vcmpltq_f32): Likewise.
15636 (__arm_vcmpleq_n_f32): Likewise.
15637 (__arm_vcmpleq_f32): Likewise.
15638 (__arm_vcmpgtq_n_f32): Likewise.
15639 (__arm_vcmpgtq_f32): Likewise.
15640 (__arm_vcmpgeq_n_f32): Likewise.
15641 (__arm_vcmpgeq_f32): Likewise.
15642 (__arm_vcmpeqq_n_f32): Likewise.
15643 (__arm_vcmpeqq_f32): Likewise.
15644 (__arm_vsubq_f32): Likewise.
15645 (__arm_vqmovntq_s32): Likewise.
15646 (__arm_vqmovnbq_s32): Likewise.
15647 (__arm_vqdmulltq_s32): Likewise.
15648 (__arm_vqdmulltq_n_s32): Likewise.
15649 (__arm_vqdmullbq_s32): Likewise.
15650 (__arm_vqdmullbq_n_s32): Likewise.
15651 (__arm_vorrq_f32): Likewise.
15652 (__arm_vornq_f32): Likewise.
15653 (__arm_vmulq_n_f32): Likewise.
15654 (__arm_vmulq_f32): Likewise.
15655 (__arm_vmovntq_s32): Likewise.
15656 (__arm_vmovnbq_s32): Likewise.
15657 (__arm_vmlsldavxq_s32): Likewise.
15658 (__arm_vmlsldavq_s32): Likewise.
15659 (__arm_vmlaldavxq_s32): Likewise.
15660 (__arm_vmlaldavq_s32): Likewise.
15661 (__arm_vminnmvq_f32): Likewise.
15662 (__arm_vminnmq_f32): Likewise.
15663 (__arm_vminnmavq_f32): Likewise.
15664 (__arm_vminnmaq_f32): Likewise.
15665 (__arm_vmaxnmvq_f32): Likewise.
15666 (__arm_vmaxnmq_f32): Likewise.
15667 (__arm_vmaxnmavq_f32): Likewise.
15668 (__arm_vmaxnmaq_f32): Likewise.
15669 (__arm_veorq_f32): Likewise.
15670 (__arm_vcmulq_rot90_f32): Likewise.
15671 (__arm_vcmulq_rot270_f32): Likewise.
15672 (__arm_vcmulq_rot180_f32): Likewise.
15673 (__arm_vcmulq_f32): Likewise.
15674 (__arm_vcaddq_rot90_f32): Likewise.
15675 (__arm_vcaddq_rot270_f32): Likewise.
15676 (__arm_vbicq_f32): Likewise.
15677 (__arm_vandq_f32): Likewise.
15678 (__arm_vaddq_n_f32): Likewise.
15679 (__arm_vabdq_f32): Likewise.
15680 (__arm_vshlltq_n_s16): Likewise.
15681 (__arm_vshllbq_n_s16): Likewise.
15682 (__arm_vorrq_n_s32): Likewise.
15683 (__arm_vbicq_n_s32): Likewise.
15684 (__arm_vrmlaldavhq_u32): Likewise.
15685 (__arm_vctp8q_m): Likewise.
15686 (__arm_vctp64q_m): Likewise.
15687 (__arm_vctp32q_m): Likewise.
15688 (__arm_vctp16q_m): Likewise.
15689 (__arm_vaddlvaq_u32): Likewise.
15690 (__arm_vrmlsldavhxq_s32): Likewise.
15691 (__arm_vrmlsldavhq_s32): Likewise.
15692 (__arm_vrmlaldavhxq_s32): Likewise.
15693 (__arm_vrmlaldavhq_s32): Likewise.
15694 (__arm_vcvttq_f16_f32): Likewise.
15695 (__arm_vcvtbq_f16_f32): Likewise.
15696 (__arm_vaddlvaq_s32): Likewise.
15697 (vst4q): Define polymorphic variant.
15698 (vrndxq): Likewise.
15700 (vrndpq): Likewise.
15701 (vrndnq): Likewise.
15702 (vrndmq): Likewise.
15703 (vrndaq): Likewise.
15704 (vrev64q): Likewise.
15706 (vdupq_n): Likewise.
15708 (vrev32q): Likewise.
15709 (vcvtbq_f32): Likewise.
15710 (vcvttq_f32): Likewise.
15712 (vsubq_n): Likewise.
15713 (vbrsrq_n): Likewise.
15714 (vcvtq_n): Likewise.
15718 (vaddq_n): Likewise.
15722 (vmulq_n): Likewise.
15724 (vcaddq_rot270): Likewise.
15725 (vcmpeqq_n): Likewise.
15726 (vcmpeqq): Likewise.
15727 (vcaddq_rot90): Likewise.
15728 (vcmpgeq_n): Likewise.
15729 (vcmpgeq): Likewise.
15730 (vcmpgtq_n): Likewise.
15731 (vcmpgtq): Likewise.
15732 (vcmpgtq): Likewise.
15733 (vcmpleq_n): Likewise.
15734 (vcmpleq_n): Likewise.
15735 (vcmpleq): Likewise.
15736 (vcmpleq): Likewise.
15737 (vcmpltq_n): Likewise.
15738 (vcmpltq_n): Likewise.
15739 (vcmpltq): Likewise.
15740 (vcmpltq): Likewise.
15741 (vcmpneq_n): Likewise.
15742 (vcmpneq_n): Likewise.
15743 (vcmpneq): Likewise.
15744 (vcmpneq): Likewise.
15745 (vcmulq): Likewise.
15746 (vcmulq): Likewise.
15747 (vcmulq_rot180): Likewise.
15748 (vcmulq_rot180): Likewise.
15749 (vcmulq_rot270): Likewise.
15750 (vcmulq_rot270): Likewise.
15751 (vcmulq_rot90): Likewise.
15752 (vcmulq_rot90): Likewise.
15755 (vmaxnmaq): Likewise.
15756 (vmaxnmaq): Likewise.
15757 (vmaxnmavq): Likewise.
15758 (vmaxnmavq): Likewise.
15759 (vmaxnmq): Likewise.
15760 (vmaxnmq): Likewise.
15761 (vmaxnmvq): Likewise.
15762 (vmaxnmvq): Likewise.
15763 (vminnmaq): Likewise.
15764 (vminnmaq): Likewise.
15765 (vminnmavq): Likewise.
15766 (vminnmavq): Likewise.
15767 (vminnmq): Likewise.
15768 (vminnmq): Likewise.
15769 (vminnmvq): Likewise.
15770 (vminnmvq): Likewise.
15771 (vbicq_n): Likewise.
15772 (vqmovntq): Likewise.
15773 (vqmovntq): Likewise.
15774 (vqmovnbq): Likewise.
15775 (vqmovnbq): Likewise.
15776 (vmulltq_poly): Likewise.
15777 (vmulltq_poly): Likewise.
15778 (vmullbq_poly): Likewise.
15779 (vmullbq_poly): Likewise.
15780 (vmovntq): Likewise.
15781 (vmovntq): Likewise.
15782 (vmovnbq): Likewise.
15783 (vmovnbq): Likewise.
15784 (vmlaldavxq): Likewise.
15785 (vmlaldavxq): Likewise.
15786 (vqmovuntq): Likewise.
15787 (vqmovuntq): Likewise.
15788 (vshlltq_n): Likewise.
15789 (vshlltq_n): Likewise.
15790 (vshllbq_n): Likewise.
15791 (vshllbq_n): Likewise.
15792 (vorrq_n): Likewise.
15793 (vorrq_n): Likewise.
15794 (vmlaldavq): Likewise.
15795 (vmlaldavq): Likewise.
15796 (vqmovunbq): Likewise.
15797 (vqmovunbq): Likewise.
15798 (vqdmulltq_n): Likewise.
15799 (vqdmulltq_n): Likewise.
15800 (vqdmulltq): Likewise.
15801 (vqdmulltq): Likewise.
15802 (vqdmullbq_n): Likewise.
15803 (vqdmullbq_n): Likewise.
15804 (vqdmullbq): Likewise.
15805 (vqdmullbq): Likewise.
15806 (vaddlvaq): Likewise.
15807 (vaddlvaq): Likewise.
15808 (vrmlaldavhq): Likewise.
15809 (vrmlaldavhq): Likewise.
15810 (vrmlaldavhxq): Likewise.
15811 (vrmlaldavhxq): Likewise.
15812 (vrmlsldavhq): Likewise.
15813 (vrmlsldavhq): Likewise.
15814 (vrmlsldavhxq): Likewise.
15815 (vrmlsldavhxq): Likewise.
15816 (vmlsldavxq): Likewise.
15817 (vmlsldavxq): Likewise.
15818 (vmlsldavq): Likewise.
15819 (vmlsldavq): Likewise.
15820 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
15821 (BINOP_NONE_NONE_NONE): Likewise.
15822 (BINOP_UNONE_NONE_NONE): Likewise.
15823 (BINOP_UNONE_UNONE_IMM): Likewise.
15824 (BINOP_UNONE_UNONE_NONE): Likewise.
15825 (BINOP_UNONE_UNONE_UNONE): Likewise.
15826 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
15827 (mve_vaddlvaq_<supf>v4si): Likewise.
15828 (mve_vaddq_n_f<mode>): Likewise.
15829 (mve_vandq_f<mode>): Likewise.
15830 (mve_vbicq_f<mode>): Likewise.
15831 (mve_vbicq_n_<supf><mode>): Likewise.
15832 (mve_vcaddq_rot270_f<mode>): Likewise.
15833 (mve_vcaddq_rot90_f<mode>): Likewise.
15834 (mve_vcmpeqq_f<mode>): Likewise.
15835 (mve_vcmpeqq_n_f<mode>): Likewise.
15836 (mve_vcmpgeq_f<mode>): Likewise.
15837 (mve_vcmpgeq_n_f<mode>): Likewise.
15838 (mve_vcmpgtq_f<mode>): Likewise.
15839 (mve_vcmpgtq_n_f<mode>): Likewise.
15840 (mve_vcmpleq_f<mode>): Likewise.
15841 (mve_vcmpleq_n_f<mode>): Likewise.
15842 (mve_vcmpltq_f<mode>): Likewise.
15843 (mve_vcmpltq_n_f<mode>): Likewise.
15844 (mve_vcmpneq_f<mode>): Likewise.
15845 (mve_vcmpneq_n_f<mode>): Likewise.
15846 (mve_vcmulq_f<mode>): Likewise.
15847 (mve_vcmulq_rot180_f<mode>): Likewise.
15848 (mve_vcmulq_rot270_f<mode>): Likewise.
15849 (mve_vcmulq_rot90_f<mode>): Likewise.
15850 (mve_vctp<mode1>q_mhi): Likewise.
15851 (mve_vcvtbq_f16_f32v8hf): Likewise.
15852 (mve_vcvttq_f16_f32v8hf): Likewise.
15853 (mve_veorq_f<mode>): Likewise.
15854 (mve_vmaxnmaq_f<mode>): Likewise.
15855 (mve_vmaxnmavq_f<mode>): Likewise.
15856 (mve_vmaxnmq_f<mode>): Likewise.
15857 (mve_vmaxnmvq_f<mode>): Likewise.
15858 (mve_vminnmaq_f<mode>): Likewise.
15859 (mve_vminnmavq_f<mode>): Likewise.
15860 (mve_vminnmq_f<mode>): Likewise.
15861 (mve_vminnmvq_f<mode>): Likewise.
15862 (mve_vmlaldavq_<supf><mode>): Likewise.
15863 (mve_vmlaldavxq_<supf><mode>): Likewise.
15864 (mve_vmlsldavq_s<mode>): Likewise.
15865 (mve_vmlsldavxq_s<mode>): Likewise.
15866 (mve_vmovnbq_<supf><mode>): Likewise.
15867 (mve_vmovntq_<supf><mode>): Likewise.
15868 (mve_vmulq_f<mode>): Likewise.
15869 (mve_vmulq_n_f<mode>): Likewise.
15870 (mve_vornq_f<mode>): Likewise.
15871 (mve_vorrq_f<mode>): Likewise.
15872 (mve_vorrq_n_<supf><mode>): Likewise.
15873 (mve_vqdmullbq_n_s<mode>): Likewise.
15874 (mve_vqdmullbq_s<mode>): Likewise.
15875 (mve_vqdmulltq_n_s<mode>): Likewise.
15876 (mve_vqdmulltq_s<mode>): Likewise.
15877 (mve_vqmovnbq_<supf><mode>): Likewise.
15878 (mve_vqmovntq_<supf><mode>): Likewise.
15879 (mve_vqmovunbq_s<mode>): Likewise.
15880 (mve_vqmovuntq_s<mode>): Likewise.
15881 (mve_vrmlaldavhxq_sv4si): Likewise.
15882 (mve_vrmlsldavhq_sv4si): Likewise.
15883 (mve_vrmlsldavhxq_sv4si): Likewise.
15884 (mve_vshllbq_n_<supf><mode>): Likewise.
15885 (mve_vshlltq_n_<supf><mode>): Likewise.
15886 (mve_vsubq_f<mode>): Likewise.
15887 (mve_vmulltq_poly_p<mode>): Likewise.
15888 (mve_vmullbq_poly_p<mode>): Likewise.
15889 (mve_vrmlaldavhq_<supf>v4si): Likewise.
15891 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
15892 Mihail Ionescu <mihail.ionescu@arm.com>
15893 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
15895 * config/arm/arm_mve.h (vsubq_u8): Define macro.
15896 (vsubq_n_u8): Likewise.
15897 (vrmulhq_u8): Likewise.
15898 (vrhaddq_u8): Likewise.
15899 (vqsubq_u8): Likewise.
15900 (vqsubq_n_u8): Likewise.
15901 (vqaddq_u8): Likewise.
15902 (vqaddq_n_u8): Likewise.
15903 (vorrq_u8): Likewise.
15904 (vornq_u8): Likewise.
15905 (vmulq_u8): Likewise.
15906 (vmulq_n_u8): Likewise.
15907 (vmulltq_int_u8): Likewise.
15908 (vmullbq_int_u8): Likewise.
15909 (vmulhq_u8): Likewise.
15910 (vmladavq_u8): Likewise.
15911 (vminvq_u8): Likewise.
15912 (vminq_u8): Likewise.
15913 (vmaxvq_u8): Likewise.
15914 (vmaxq_u8): Likewise.
15915 (vhsubq_u8): Likewise.
15916 (vhsubq_n_u8): Likewise.
15917 (vhaddq_u8): Likewise.
15918 (vhaddq_n_u8): Likewise.
15919 (veorq_u8): Likewise.
15920 (vcmpneq_n_u8): Likewise.
15921 (vcmphiq_u8): Likewise.
15922 (vcmphiq_n_u8): Likewise.
15923 (vcmpeqq_u8): Likewise.
15924 (vcmpeqq_n_u8): Likewise.
15925 (vcmpcsq_u8): Likewise.
15926 (vcmpcsq_n_u8): Likewise.
15927 (vcaddq_rot90_u8): Likewise.
15928 (vcaddq_rot270_u8): Likewise.
15929 (vbicq_u8): Likewise.
15930 (vandq_u8): Likewise.
15931 (vaddvq_p_u8): Likewise.
15932 (vaddvaq_u8): Likewise.
15933 (vaddq_n_u8): Likewise.
15934 (vabdq_u8): Likewise.
15935 (vshlq_r_u8): Likewise.
15936 (vrshlq_u8): Likewise.
15937 (vrshlq_n_u8): Likewise.
15938 (vqshlq_u8): Likewise.
15939 (vqshlq_r_u8): Likewise.
15940 (vqrshlq_u8): Likewise.
15941 (vqrshlq_n_u8): Likewise.
15942 (vminavq_s8): Likewise.
15943 (vminaq_s8): Likewise.
15944 (vmaxavq_s8): Likewise.
15945 (vmaxaq_s8): Likewise.
15946 (vbrsrq_n_u8): Likewise.
15947 (vshlq_n_u8): Likewise.
15948 (vrshrq_n_u8): Likewise.
15949 (vqshlq_n_u8): Likewise.
15950 (vcmpneq_n_s8): Likewise.
15951 (vcmpltq_s8): Likewise.
15952 (vcmpltq_n_s8): Likewise.
15953 (vcmpleq_s8): Likewise.
15954 (vcmpleq_n_s8): Likewise.
15955 (vcmpgtq_s8): Likewise.
15956 (vcmpgtq_n_s8): Likewise.
15957 (vcmpgeq_s8): Likewise.
15958 (vcmpgeq_n_s8): Likewise.
15959 (vcmpeqq_s8): Likewise.
15960 (vcmpeqq_n_s8): Likewise.
15961 (vqshluq_n_s8): Likewise.
15962 (vaddvq_p_s8): Likewise.
15963 (vsubq_s8): Likewise.
15964 (vsubq_n_s8): Likewise.
15965 (vshlq_r_s8): Likewise.
15966 (vrshlq_s8): Likewise.
15967 (vrshlq_n_s8): Likewise.
15968 (vrmulhq_s8): Likewise.
15969 (vrhaddq_s8): Likewise.
15970 (vqsubq_s8): Likewise.
15971 (vqsubq_n_s8): Likewise.
15972 (vqshlq_s8): Likewise.
15973 (vqshlq_r_s8): Likewise.
15974 (vqrshlq_s8): Likewise.
15975 (vqrshlq_n_s8): Likewise.
15976 (vqrdmulhq_s8): Likewise.
15977 (vqrdmulhq_n_s8): Likewise.
15978 (vqdmulhq_s8): Likewise.
15979 (vqdmulhq_n_s8): Likewise.
15980 (vqaddq_s8): Likewise.
15981 (vqaddq_n_s8): Likewise.
15982 (vorrq_s8): Likewise.
15983 (vornq_s8): Likewise.
15984 (vmulq_s8): Likewise.
15985 (vmulq_n_s8): Likewise.
15986 (vmulltq_int_s8): Likewise.
15987 (vmullbq_int_s8): Likewise.
15988 (vmulhq_s8): Likewise.
15989 (vmlsdavxq_s8): Likewise.
15990 (vmlsdavq_s8): Likewise.
15991 (vmladavxq_s8): Likewise.
15992 (vmladavq_s8): Likewise.
15993 (vminvq_s8): Likewise.
15994 (vminq_s8): Likewise.
15995 (vmaxvq_s8): Likewise.
15996 (vmaxq_s8): Likewise.
15997 (vhsubq_s8): Likewise.
15998 (vhsubq_n_s8): Likewise.
15999 (vhcaddq_rot90_s8): Likewise.
16000 (vhcaddq_rot270_s8): Likewise.
16001 (vhaddq_s8): Likewise.
16002 (vhaddq_n_s8): Likewise.
16003 (veorq_s8): Likewise.
16004 (vcaddq_rot90_s8): Likewise.
16005 (vcaddq_rot270_s8): Likewise.
16006 (vbrsrq_n_s8): Likewise.
16007 (vbicq_s8): Likewise.
16008 (vandq_s8): Likewise.
16009 (vaddvaq_s8): Likewise.
16010 (vaddq_n_s8): Likewise.
16011 (vabdq_s8): Likewise.
16012 (vshlq_n_s8): Likewise.
16013 (vrshrq_n_s8): Likewise.
16014 (vqshlq_n_s8): Likewise.
16015 (vsubq_u16): Likewise.
16016 (vsubq_n_u16): Likewise.
16017 (vrmulhq_u16): Likewise.
16018 (vrhaddq_u16): Likewise.
16019 (vqsubq_u16): Likewise.
16020 (vqsubq_n_u16): Likewise.
16021 (vqaddq_u16): Likewise.
16022 (vqaddq_n_u16): Likewise.
16023 (vorrq_u16): Likewise.
16024 (vornq_u16): Likewise.
16025 (vmulq_u16): Likewise.
16026 (vmulq_n_u16): Likewise.
16027 (vmulltq_int_u16): Likewise.
16028 (vmullbq_int_u16): Likewise.
16029 (vmulhq_u16): Likewise.
16030 (vmladavq_u16): Likewise.
16031 (vminvq_u16): Likewise.
16032 (vminq_u16): Likewise.
16033 (vmaxvq_u16): Likewise.
16034 (vmaxq_u16): Likewise.
16035 (vhsubq_u16): Likewise.
16036 (vhsubq_n_u16): Likewise.
16037 (vhaddq_u16): Likewise.
16038 (vhaddq_n_u16): Likewise.
16039 (veorq_u16): Likewise.
16040 (vcmpneq_n_u16): Likewise.
16041 (vcmphiq_u16): Likewise.
16042 (vcmphiq_n_u16): Likewise.
16043 (vcmpeqq_u16): Likewise.
16044 (vcmpeqq_n_u16): Likewise.
16045 (vcmpcsq_u16): Likewise.
16046 (vcmpcsq_n_u16): Likewise.
16047 (vcaddq_rot90_u16): Likewise.
16048 (vcaddq_rot270_u16): Likewise.
16049 (vbicq_u16): Likewise.
16050 (vandq_u16): Likewise.
16051 (vaddvq_p_u16): Likewise.
16052 (vaddvaq_u16): Likewise.
16053 (vaddq_n_u16): Likewise.
16054 (vabdq_u16): Likewise.
16055 (vshlq_r_u16): Likewise.
16056 (vrshlq_u16): Likewise.
16057 (vrshlq_n_u16): Likewise.
16058 (vqshlq_u16): Likewise.
16059 (vqshlq_r_u16): Likewise.
16060 (vqrshlq_u16): Likewise.
16061 (vqrshlq_n_u16): Likewise.
16062 (vminavq_s16): Likewise.
16063 (vminaq_s16): Likewise.
16064 (vmaxavq_s16): Likewise.
16065 (vmaxaq_s16): Likewise.
16066 (vbrsrq_n_u16): Likewise.
16067 (vshlq_n_u16): Likewise.
16068 (vrshrq_n_u16): Likewise.
16069 (vqshlq_n_u16): Likewise.
16070 (vcmpneq_n_s16): Likewise.
16071 (vcmpltq_s16): Likewise.
16072 (vcmpltq_n_s16): Likewise.
16073 (vcmpleq_s16): Likewise.
16074 (vcmpleq_n_s16): Likewise.
16075 (vcmpgtq_s16): Likewise.
16076 (vcmpgtq_n_s16): Likewise.
16077 (vcmpgeq_s16): Likewise.
16078 (vcmpgeq_n_s16): Likewise.
16079 (vcmpeqq_s16): Likewise.
16080 (vcmpeqq_n_s16): Likewise.
16081 (vqshluq_n_s16): Likewise.
16082 (vaddvq_p_s16): Likewise.
16083 (vsubq_s16): Likewise.
16084 (vsubq_n_s16): Likewise.
16085 (vshlq_r_s16): Likewise.
16086 (vrshlq_s16): Likewise.
16087 (vrshlq_n_s16): Likewise.
16088 (vrmulhq_s16): Likewise.
16089 (vrhaddq_s16): Likewise.
16090 (vqsubq_s16): Likewise.
16091 (vqsubq_n_s16): Likewise.
16092 (vqshlq_s16): Likewise.
16093 (vqshlq_r_s16): Likewise.
16094 (vqrshlq_s16): Likewise.
16095 (vqrshlq_n_s16): Likewise.
16096 (vqrdmulhq_s16): Likewise.
16097 (vqrdmulhq_n_s16): Likewise.
16098 (vqdmulhq_s16): Likewise.
16099 (vqdmulhq_n_s16): Likewise.
16100 (vqaddq_s16): Likewise.
16101 (vqaddq_n_s16): Likewise.
16102 (vorrq_s16): Likewise.
16103 (vornq_s16): Likewise.
16104 (vmulq_s16): Likewise.
16105 (vmulq_n_s16): Likewise.
16106 (vmulltq_int_s16): Likewise.
16107 (vmullbq_int_s16): Likewise.
16108 (vmulhq_s16): Likewise.
16109 (vmlsdavxq_s16): Likewise.
16110 (vmlsdavq_s16): Likewise.
16111 (vmladavxq_s16): Likewise.
16112 (vmladavq_s16): Likewise.
16113 (vminvq_s16): Likewise.
16114 (vminq_s16): Likewise.
16115 (vmaxvq_s16): Likewise.
16116 (vmaxq_s16): Likewise.
16117 (vhsubq_s16): Likewise.
16118 (vhsubq_n_s16): Likewise.
16119 (vhcaddq_rot90_s16): Likewise.
16120 (vhcaddq_rot270_s16): Likewise.
16121 (vhaddq_s16): Likewise.
16122 (vhaddq_n_s16): Likewise.
16123 (veorq_s16): Likewise.
16124 (vcaddq_rot90_s16): Likewise.
16125 (vcaddq_rot270_s16): Likewise.
16126 (vbrsrq_n_s16): Likewise.
16127 (vbicq_s16): Likewise.
16128 (vandq_s16): Likewise.
16129 (vaddvaq_s16): Likewise.
16130 (vaddq_n_s16): Likewise.
16131 (vabdq_s16): Likewise.
16132 (vshlq_n_s16): Likewise.
16133 (vrshrq_n_s16): Likewise.
16134 (vqshlq_n_s16): Likewise.
16135 (vsubq_u32): Likewise.
16136 (vsubq_n_u32): Likewise.
16137 (vrmulhq_u32): Likewise.
16138 (vrhaddq_u32): Likewise.
16139 (vqsubq_u32): Likewise.
16140 (vqsubq_n_u32): Likewise.
16141 (vqaddq_u32): Likewise.
16142 (vqaddq_n_u32): Likewise.
16143 (vorrq_u32): Likewise.
16144 (vornq_u32): Likewise.
16145 (vmulq_u32): Likewise.
16146 (vmulq_n_u32): Likewise.
16147 (vmulltq_int_u32): Likewise.
16148 (vmullbq_int_u32): Likewise.
16149 (vmulhq_u32): Likewise.
16150 (vmladavq_u32): Likewise.
16151 (vminvq_u32): Likewise.
16152 (vminq_u32): Likewise.
16153 (vmaxvq_u32): Likewise.
16154 (vmaxq_u32): Likewise.
16155 (vhsubq_u32): Likewise.
16156 (vhsubq_n_u32): Likewise.
16157 (vhaddq_u32): Likewise.
16158 (vhaddq_n_u32): Likewise.
16159 (veorq_u32): Likewise.
16160 (vcmpneq_n_u32): Likewise.
16161 (vcmphiq_u32): Likewise.
16162 (vcmphiq_n_u32): Likewise.
16163 (vcmpeqq_u32): Likewise.
16164 (vcmpeqq_n_u32): Likewise.
16165 (vcmpcsq_u32): Likewise.
16166 (vcmpcsq_n_u32): Likewise.
16167 (vcaddq_rot90_u32): Likewise.
16168 (vcaddq_rot270_u32): Likewise.
16169 (vbicq_u32): Likewise.
16170 (vandq_u32): Likewise.
16171 (vaddvq_p_u32): Likewise.
16172 (vaddvaq_u32): Likewise.
16173 (vaddq_n_u32): Likewise.
16174 (vabdq_u32): Likewise.
16175 (vshlq_r_u32): Likewise.
16176 (vrshlq_u32): Likewise.
16177 (vrshlq_n_u32): Likewise.
16178 (vqshlq_u32): Likewise.
16179 (vqshlq_r_u32): Likewise.
16180 (vqrshlq_u32): Likewise.
16181 (vqrshlq_n_u32): Likewise.
16182 (vminavq_s32): Likewise.
16183 (vminaq_s32): Likewise.
16184 (vmaxavq_s32): Likewise.
16185 (vmaxaq_s32): Likewise.
16186 (vbrsrq_n_u32): Likewise.
16187 (vshlq_n_u32): Likewise.
16188 (vrshrq_n_u32): Likewise.
16189 (vqshlq_n_u32): Likewise.
16190 (vcmpneq_n_s32): Likewise.
16191 (vcmpltq_s32): Likewise.
16192 (vcmpltq_n_s32): Likewise.
16193 (vcmpleq_s32): Likewise.
16194 (vcmpleq_n_s32): Likewise.
16195 (vcmpgtq_s32): Likewise.
16196 (vcmpgtq_n_s32): Likewise.
16197 (vcmpgeq_s32): Likewise.
16198 (vcmpgeq_n_s32): Likewise.
16199 (vcmpeqq_s32): Likewise.
16200 (vcmpeqq_n_s32): Likewise.
16201 (vqshluq_n_s32): Likewise.
16202 (vaddvq_p_s32): Likewise.
16203 (vsubq_s32): Likewise.
16204 (vsubq_n_s32): Likewise.
16205 (vshlq_r_s32): Likewise.
16206 (vrshlq_s32): Likewise.
16207 (vrshlq_n_s32): Likewise.
16208 (vrmulhq_s32): Likewise.
16209 (vrhaddq_s32): Likewise.
16210 (vqsubq_s32): Likewise.
16211 (vqsubq_n_s32): Likewise.
16212 (vqshlq_s32): Likewise.
16213 (vqshlq_r_s32): Likewise.
16214 (vqrshlq_s32): Likewise.
16215 (vqrshlq_n_s32): Likewise.
16216 (vqrdmulhq_s32): Likewise.
16217 (vqrdmulhq_n_s32): Likewise.
16218 (vqdmulhq_s32): Likewise.
16219 (vqdmulhq_n_s32): Likewise.
16220 (vqaddq_s32): Likewise.
16221 (vqaddq_n_s32): Likewise.
16222 (vorrq_s32): Likewise.
16223 (vornq_s32): Likewise.
16224 (vmulq_s32): Likewise.
16225 (vmulq_n_s32): Likewise.
16226 (vmulltq_int_s32): Likewise.
16227 (vmullbq_int_s32): Likewise.
16228 (vmulhq_s32): Likewise.
16229 (vmlsdavxq_s32): Likewise.
16230 (vmlsdavq_s32): Likewise.
16231 (vmladavxq_s32): Likewise.
16232 (vmladavq_s32): Likewise.
16233 (vminvq_s32): Likewise.
16234 (vminq_s32): Likewise.
16235 (vmaxvq_s32): Likewise.
16236 (vmaxq_s32): Likewise.
16237 (vhsubq_s32): Likewise.
16238 (vhsubq_n_s32): Likewise.
16239 (vhcaddq_rot90_s32): Likewise.
16240 (vhcaddq_rot270_s32): Likewise.
16241 (vhaddq_s32): Likewise.
16242 (vhaddq_n_s32): Likewise.
16243 (veorq_s32): Likewise.
16244 (vcaddq_rot90_s32): Likewise.
16245 (vcaddq_rot270_s32): Likewise.
16246 (vbrsrq_n_s32): Likewise.
16247 (vbicq_s32): Likewise.
16248 (vandq_s32): Likewise.
16249 (vaddvaq_s32): Likewise.
16250 (vaddq_n_s32): Likewise.
16251 (vabdq_s32): Likewise.
16252 (vshlq_n_s32): Likewise.
16253 (vrshrq_n_s32): Likewise.
16254 (vqshlq_n_s32): Likewise.
16255 (__arm_vsubq_u8): Define intrinsic.
16256 (__arm_vsubq_n_u8): Likewise.
16257 (__arm_vrmulhq_u8): Likewise.
16258 (__arm_vrhaddq_u8): Likewise.
16259 (__arm_vqsubq_u8): Likewise.
16260 (__arm_vqsubq_n_u8): Likewise.
16261 (__arm_vqaddq_u8): Likewise.
16262 (__arm_vqaddq_n_u8): Likewise.
16263 (__arm_vorrq_u8): Likewise.
16264 (__arm_vornq_u8): Likewise.
16265 (__arm_vmulq_u8): Likewise.
16266 (__arm_vmulq_n_u8): Likewise.
16267 (__arm_vmulltq_int_u8): Likewise.
16268 (__arm_vmullbq_int_u8): Likewise.
16269 (__arm_vmulhq_u8): Likewise.
16270 (__arm_vmladavq_u8): Likewise.
16271 (__arm_vminvq_u8): Likewise.
16272 (__arm_vminq_u8): Likewise.
16273 (__arm_vmaxvq_u8): Likewise.
16274 (__arm_vmaxq_u8): Likewise.
16275 (__arm_vhsubq_u8): Likewise.
16276 (__arm_vhsubq_n_u8): Likewise.
16277 (__arm_vhaddq_u8): Likewise.
16278 (__arm_vhaddq_n_u8): Likewise.
16279 (__arm_veorq_u8): Likewise.
16280 (__arm_vcmpneq_n_u8): Likewise.
16281 (__arm_vcmphiq_u8): Likewise.
16282 (__arm_vcmphiq_n_u8): Likewise.
16283 (__arm_vcmpeqq_u8): Likewise.
16284 (__arm_vcmpeqq_n_u8): Likewise.
16285 (__arm_vcmpcsq_u8): Likewise.
16286 (__arm_vcmpcsq_n_u8): Likewise.
16287 (__arm_vcaddq_rot90_u8): Likewise.
16288 (__arm_vcaddq_rot270_u8): Likewise.
16289 (__arm_vbicq_u8): Likewise.
16290 (__arm_vandq_u8): Likewise.
16291 (__arm_vaddvq_p_u8): Likewise.
16292 (__arm_vaddvaq_u8): Likewise.
16293 (__arm_vaddq_n_u8): Likewise.
16294 (__arm_vabdq_u8): Likewise.
16295 (__arm_vshlq_r_u8): Likewise.
16296 (__arm_vrshlq_u8): Likewise.
16297 (__arm_vrshlq_n_u8): Likewise.
16298 (__arm_vqshlq_u8): Likewise.
16299 (__arm_vqshlq_r_u8): Likewise.
16300 (__arm_vqrshlq_u8): Likewise.
16301 (__arm_vqrshlq_n_u8): Likewise.
16302 (__arm_vminavq_s8): Likewise.
16303 (__arm_vminaq_s8): Likewise.
16304 (__arm_vmaxavq_s8): Likewise.
16305 (__arm_vmaxaq_s8): Likewise.
16306 (__arm_vbrsrq_n_u8): Likewise.
16307 (__arm_vshlq_n_u8): Likewise.
16308 (__arm_vrshrq_n_u8): Likewise.
16309 (__arm_vqshlq_n_u8): Likewise.
16310 (__arm_vcmpneq_n_s8): Likewise.
16311 (__arm_vcmpltq_s8): Likewise.
16312 (__arm_vcmpltq_n_s8): Likewise.
16313 (__arm_vcmpleq_s8): Likewise.
16314 (__arm_vcmpleq_n_s8): Likewise.
16315 (__arm_vcmpgtq_s8): Likewise.
16316 (__arm_vcmpgtq_n_s8): Likewise.
16317 (__arm_vcmpgeq_s8): Likewise.
16318 (__arm_vcmpgeq_n_s8): Likewise.
16319 (__arm_vcmpeqq_s8): Likewise.
16320 (__arm_vcmpeqq_n_s8): Likewise.
16321 (__arm_vqshluq_n_s8): Likewise.
16322 (__arm_vaddvq_p_s8): Likewise.
16323 (__arm_vsubq_s8): Likewise.
16324 (__arm_vsubq_n_s8): Likewise.
16325 (__arm_vshlq_r_s8): Likewise.
16326 (__arm_vrshlq_s8): Likewise.
16327 (__arm_vrshlq_n_s8): Likewise.
16328 (__arm_vrmulhq_s8): Likewise.
16329 (__arm_vrhaddq_s8): Likewise.
16330 (__arm_vqsubq_s8): Likewise.
16331 (__arm_vqsubq_n_s8): Likewise.
16332 (__arm_vqshlq_s8): Likewise.
16333 (__arm_vqshlq_r_s8): Likewise.
16334 (__arm_vqrshlq_s8): Likewise.
16335 (__arm_vqrshlq_n_s8): Likewise.
16336 (__arm_vqrdmulhq_s8): Likewise.
16337 (__arm_vqrdmulhq_n_s8): Likewise.
16338 (__arm_vqdmulhq_s8): Likewise.
16339 (__arm_vqdmulhq_n_s8): Likewise.
16340 (__arm_vqaddq_s8): Likewise.
16341 (__arm_vqaddq_n_s8): Likewise.
16342 (__arm_vorrq_s8): Likewise.
16343 (__arm_vornq_s8): Likewise.
16344 (__arm_vmulq_s8): Likewise.
16345 (__arm_vmulq_n_s8): Likewise.
16346 (__arm_vmulltq_int_s8): Likewise.
16347 (__arm_vmullbq_int_s8): Likewise.
16348 (__arm_vmulhq_s8): Likewise.
16349 (__arm_vmlsdavxq_s8): Likewise.
16350 (__arm_vmlsdavq_s8): Likewise.
16351 (__arm_vmladavxq_s8): Likewise.
16352 (__arm_vmladavq_s8): Likewise.
16353 (__arm_vminvq_s8): Likewise.
16354 (__arm_vminq_s8): Likewise.
16355 (__arm_vmaxvq_s8): Likewise.
16356 (__arm_vmaxq_s8): Likewise.
16357 (__arm_vhsubq_s8): Likewise.
16358 (__arm_vhsubq_n_s8): Likewise.
16359 (__arm_vhcaddq_rot90_s8): Likewise.
16360 (__arm_vhcaddq_rot270_s8): Likewise.
16361 (__arm_vhaddq_s8): Likewise.
16362 (__arm_vhaddq_n_s8): Likewise.
16363 (__arm_veorq_s8): Likewise.
16364 (__arm_vcaddq_rot90_s8): Likewise.
16365 (__arm_vcaddq_rot270_s8): Likewise.
16366 (__arm_vbrsrq_n_s8): Likewise.
16367 (__arm_vbicq_s8): Likewise.
16368 (__arm_vandq_s8): Likewise.
16369 (__arm_vaddvaq_s8): Likewise.
16370 (__arm_vaddq_n_s8): Likewise.
16371 (__arm_vabdq_s8): Likewise.
16372 (__arm_vshlq_n_s8): Likewise.
16373 (__arm_vrshrq_n_s8): Likewise.
16374 (__arm_vqshlq_n_s8): Likewise.
16375 (__arm_vsubq_u16): Likewise.
16376 (__arm_vsubq_n_u16): Likewise.
16377 (__arm_vrmulhq_u16): Likewise.
16378 (__arm_vrhaddq_u16): Likewise.
16379 (__arm_vqsubq_u16): Likewise.
16380 (__arm_vqsubq_n_u16): Likewise.
16381 (__arm_vqaddq_u16): Likewise.
16382 (__arm_vqaddq_n_u16): Likewise.
16383 (__arm_vorrq_u16): Likewise.
16384 (__arm_vornq_u16): Likewise.
16385 (__arm_vmulq_u16): Likewise.
16386 (__arm_vmulq_n_u16): Likewise.
16387 (__arm_vmulltq_int_u16): Likewise.
16388 (__arm_vmullbq_int_u16): Likewise.
16389 (__arm_vmulhq_u16): Likewise.
16390 (__arm_vmladavq_u16): Likewise.
16391 (__arm_vminvq_u16): Likewise.
16392 (__arm_vminq_u16): Likewise.
16393 (__arm_vmaxvq_u16): Likewise.
16394 (__arm_vmaxq_u16): Likewise.
16395 (__arm_vhsubq_u16): Likewise.
16396 (__arm_vhsubq_n_u16): Likewise.
16397 (__arm_vhaddq_u16): Likewise.
16398 (__arm_vhaddq_n_u16): Likewise.
16399 (__arm_veorq_u16): Likewise.
16400 (__arm_vcmpneq_n_u16): Likewise.
16401 (__arm_vcmphiq_u16): Likewise.
16402 (__arm_vcmphiq_n_u16): Likewise.
16403 (__arm_vcmpeqq_u16): Likewise.
16404 (__arm_vcmpeqq_n_u16): Likewise.
16405 (__arm_vcmpcsq_u16): Likewise.
16406 (__arm_vcmpcsq_n_u16): Likewise.
16407 (__arm_vcaddq_rot90_u16): Likewise.
16408 (__arm_vcaddq_rot270_u16): Likewise.
16409 (__arm_vbicq_u16): Likewise.
16410 (__arm_vandq_u16): Likewise.
16411 (__arm_vaddvq_p_u16): Likewise.
16412 (__arm_vaddvaq_u16): Likewise.
16413 (__arm_vaddq_n_u16): Likewise.
16414 (__arm_vabdq_u16): Likewise.
16415 (__arm_vshlq_r_u16): Likewise.
16416 (__arm_vrshlq_u16): Likewise.
16417 (__arm_vrshlq_n_u16): Likewise.
16418 (__arm_vqshlq_u16): Likewise.
16419 (__arm_vqshlq_r_u16): Likewise.
16420 (__arm_vqrshlq_u16): Likewise.
16421 (__arm_vqrshlq_n_u16): Likewise.
16422 (__arm_vminavq_s16): Likewise.
16423 (__arm_vminaq_s16): Likewise.
16424 (__arm_vmaxavq_s16): Likewise.
16425 (__arm_vmaxaq_s16): Likewise.
16426 (__arm_vbrsrq_n_u16): Likewise.
16427 (__arm_vshlq_n_u16): Likewise.
16428 (__arm_vrshrq_n_u16): Likewise.
16429 (__arm_vqshlq_n_u16): Likewise.
16430 (__arm_vcmpneq_n_s16): Likewise.
16431 (__arm_vcmpltq_s16): Likewise.
16432 (__arm_vcmpltq_n_s16): Likewise.
16433 (__arm_vcmpleq_s16): Likewise.
16434 (__arm_vcmpleq_n_s16): Likewise.
16435 (__arm_vcmpgtq_s16): Likewise.
16436 (__arm_vcmpgtq_n_s16): Likewise.
16437 (__arm_vcmpgeq_s16): Likewise.
16438 (__arm_vcmpgeq_n_s16): Likewise.
16439 (__arm_vcmpeqq_s16): Likewise.
16440 (__arm_vcmpeqq_n_s16): Likewise.
16441 (__arm_vqshluq_n_s16): Likewise.
16442 (__arm_vaddvq_p_s16): Likewise.
16443 (__arm_vsubq_s16): Likewise.
16444 (__arm_vsubq_n_s16): Likewise.
16445 (__arm_vshlq_r_s16): Likewise.
16446 (__arm_vrshlq_s16): Likewise.
16447 (__arm_vrshlq_n_s16): Likewise.
16448 (__arm_vrmulhq_s16): Likewise.
16449 (__arm_vrhaddq_s16): Likewise.
16450 (__arm_vqsubq_s16): Likewise.
16451 (__arm_vqsubq_n_s16): Likewise.
16452 (__arm_vqshlq_s16): Likewise.
16453 (__arm_vqshlq_r_s16): Likewise.
16454 (__arm_vqrshlq_s16): Likewise.
16455 (__arm_vqrshlq_n_s16): Likewise.
16456 (__arm_vqrdmulhq_s16): Likewise.
16457 (__arm_vqrdmulhq_n_s16): Likewise.
16458 (__arm_vqdmulhq_s16): Likewise.
16459 (__arm_vqdmulhq_n_s16): Likewise.
16460 (__arm_vqaddq_s16): Likewise.
16461 (__arm_vqaddq_n_s16): Likewise.
16462 (__arm_vorrq_s16): Likewise.
16463 (__arm_vornq_s16): Likewise.
16464 (__arm_vmulq_s16): Likewise.
16465 (__arm_vmulq_n_s16): Likewise.
16466 (__arm_vmulltq_int_s16): Likewise.
16467 (__arm_vmullbq_int_s16): Likewise.
16468 (__arm_vmulhq_s16): Likewise.
16469 (__arm_vmlsdavxq_s16): Likewise.
16470 (__arm_vmlsdavq_s16): Likewise.
16471 (__arm_vmladavxq_s16): Likewise.
16472 (__arm_vmladavq_s16): Likewise.
16473 (__arm_vminvq_s16): Likewise.
16474 (__arm_vminq_s16): Likewise.
16475 (__arm_vmaxvq_s16): Likewise.
16476 (__arm_vmaxq_s16): Likewise.
16477 (__arm_vhsubq_s16): Likewise.
16478 (__arm_vhsubq_n_s16): Likewise.
16479 (__arm_vhcaddq_rot90_s16): Likewise.
16480 (__arm_vhcaddq_rot270_s16): Likewise.
16481 (__arm_vhaddq_s16): Likewise.
16482 (__arm_vhaddq_n_s16): Likewise.
16483 (__arm_veorq_s16): Likewise.
16484 (__arm_vcaddq_rot90_s16): Likewise.
16485 (__arm_vcaddq_rot270_s16): Likewise.
16486 (__arm_vbrsrq_n_s16): Likewise.
16487 (__arm_vbicq_s16): Likewise.
16488 (__arm_vandq_s16): Likewise.
16489 (__arm_vaddvaq_s16): Likewise.
16490 (__arm_vaddq_n_s16): Likewise.
16491 (__arm_vabdq_s16): Likewise.
16492 (__arm_vshlq_n_s16): Likewise.
16493 (__arm_vrshrq_n_s16): Likewise.
16494 (__arm_vqshlq_n_s16): Likewise.
16495 (__arm_vsubq_u32): Likewise.
16496 (__arm_vsubq_n_u32): Likewise.
16497 (__arm_vrmulhq_u32): Likewise.
16498 (__arm_vrhaddq_u32): Likewise.
16499 (__arm_vqsubq_u32): Likewise.
16500 (__arm_vqsubq_n_u32): Likewise.
16501 (__arm_vqaddq_u32): Likewise.
16502 (__arm_vqaddq_n_u32): Likewise.
16503 (__arm_vorrq_u32): Likewise.
16504 (__arm_vornq_u32): Likewise.
16505 (__arm_vmulq_u32): Likewise.
16506 (__arm_vmulq_n_u32): Likewise.
16507 (__arm_vmulltq_int_u32): Likewise.
16508 (__arm_vmullbq_int_u32): Likewise.
16509 (__arm_vmulhq_u32): Likewise.
16510 (__arm_vmladavq_u32): Likewise.
16511 (__arm_vminvq_u32): Likewise.
16512 (__arm_vminq_u32): Likewise.
16513 (__arm_vmaxvq_u32): Likewise.
16514 (__arm_vmaxq_u32): Likewise.
16515 (__arm_vhsubq_u32): Likewise.
16516 (__arm_vhsubq_n_u32): Likewise.
16517 (__arm_vhaddq_u32): Likewise.
16518 (__arm_vhaddq_n_u32): Likewise.
16519 (__arm_veorq_u32): Likewise.
16520 (__arm_vcmpneq_n_u32): Likewise.
16521 (__arm_vcmphiq_u32): Likewise.
16522 (__arm_vcmphiq_n_u32): Likewise.
16523 (__arm_vcmpeqq_u32): Likewise.
16524 (__arm_vcmpeqq_n_u32): Likewise.
16525 (__arm_vcmpcsq_u32): Likewise.
16526 (__arm_vcmpcsq_n_u32): Likewise.
16527 (__arm_vcaddq_rot90_u32): Likewise.
16528 (__arm_vcaddq_rot270_u32): Likewise.
16529 (__arm_vbicq_u32): Likewise.
16530 (__arm_vandq_u32): Likewise.
16531 (__arm_vaddvq_p_u32): Likewise.
16532 (__arm_vaddvaq_u32): Likewise.
16533 (__arm_vaddq_n_u32): Likewise.
16534 (__arm_vabdq_u32): Likewise.
16535 (__arm_vshlq_r_u32): Likewise.
16536 (__arm_vrshlq_u32): Likewise.
16537 (__arm_vrshlq_n_u32): Likewise.
16538 (__arm_vqshlq_u32): Likewise.
16539 (__arm_vqshlq_r_u32): Likewise.
16540 (__arm_vqrshlq_u32): Likewise.
16541 (__arm_vqrshlq_n_u32): Likewise.
16542 (__arm_vminavq_s32): Likewise.
16543 (__arm_vminaq_s32): Likewise.
16544 (__arm_vmaxavq_s32): Likewise.
16545 (__arm_vmaxaq_s32): Likewise.
16546 (__arm_vbrsrq_n_u32): Likewise.
16547 (__arm_vshlq_n_u32): Likewise.
16548 (__arm_vrshrq_n_u32): Likewise.
16549 (__arm_vqshlq_n_u32): Likewise.
16550 (__arm_vcmpneq_n_s32): Likewise.
16551 (__arm_vcmpltq_s32): Likewise.
16552 (__arm_vcmpltq_n_s32): Likewise.
16553 (__arm_vcmpleq_s32): Likewise.
16554 (__arm_vcmpleq_n_s32): Likewise.
16555 (__arm_vcmpgtq_s32): Likewise.
16556 (__arm_vcmpgtq_n_s32): Likewise.
16557 (__arm_vcmpgeq_s32): Likewise.
16558 (__arm_vcmpgeq_n_s32): Likewise.
16559 (__arm_vcmpeqq_s32): Likewise.
16560 (__arm_vcmpeqq_n_s32): Likewise.
16561 (__arm_vqshluq_n_s32): Likewise.
16562 (__arm_vaddvq_p_s32): Likewise.
16563 (__arm_vsubq_s32): Likewise.
16564 (__arm_vsubq_n_s32): Likewise.
16565 (__arm_vshlq_r_s32): Likewise.
16566 (__arm_vrshlq_s32): Likewise.
16567 (__arm_vrshlq_n_s32): Likewise.
16568 (__arm_vrmulhq_s32): Likewise.
16569 (__arm_vrhaddq_s32): Likewise.
16570 (__arm_vqsubq_s32): Likewise.
16571 (__arm_vqsubq_n_s32): Likewise.
16572 (__arm_vqshlq_s32): Likewise.
16573 (__arm_vqshlq_r_s32): Likewise.
16574 (__arm_vqrshlq_s32): Likewise.
16575 (__arm_vqrshlq_n_s32): Likewise.
16576 (__arm_vqrdmulhq_s32): Likewise.
16577 (__arm_vqrdmulhq_n_s32): Likewise.
16578 (__arm_vqdmulhq_s32): Likewise.
16579 (__arm_vqdmulhq_n_s32): Likewise.
16580 (__arm_vqaddq_s32): Likewise.
16581 (__arm_vqaddq_n_s32): Likewise.
16582 (__arm_vorrq_s32): Likewise.
16583 (__arm_vornq_s32): Likewise.
16584 (__arm_vmulq_s32): Likewise.
16585 (__arm_vmulq_n_s32): Likewise.
16586 (__arm_vmulltq_int_s32): Likewise.
16587 (__arm_vmullbq_int_s32): Likewise.
16588 (__arm_vmulhq_s32): Likewise.
16589 (__arm_vmlsdavxq_s32): Likewise.
16590 (__arm_vmlsdavq_s32): Likewise.
16591 (__arm_vmladavxq_s32): Likewise.
16592 (__arm_vmladavq_s32): Likewise.
16593 (__arm_vminvq_s32): Likewise.
16594 (__arm_vminq_s32): Likewise.
16595 (__arm_vmaxvq_s32): Likewise.
16596 (__arm_vmaxq_s32): Likewise.
16597 (__arm_vhsubq_s32): Likewise.
16598 (__arm_vhsubq_n_s32): Likewise.
16599 (__arm_vhcaddq_rot90_s32): Likewise.
16600 (__arm_vhcaddq_rot270_s32): Likewise.
16601 (__arm_vhaddq_s32): Likewise.
16602 (__arm_vhaddq_n_s32): Likewise.
16603 (__arm_veorq_s32): Likewise.
16604 (__arm_vcaddq_rot90_s32): Likewise.
16605 (__arm_vcaddq_rot270_s32): Likewise.
16606 (__arm_vbrsrq_n_s32): Likewise.
16607 (__arm_vbicq_s32): Likewise.
16608 (__arm_vandq_s32): Likewise.
16609 (__arm_vaddvaq_s32): Likewise.
16610 (__arm_vaddq_n_s32): Likewise.
16611 (__arm_vabdq_s32): Likewise.
16612 (__arm_vshlq_n_s32): Likewise.
16613 (__arm_vrshrq_n_s32): Likewise.
16614 (__arm_vqshlq_n_s32): Likewise.
16615 (vsubq): Define polymorphic variant.
16616 (vsubq_n): Likewise.
16617 (vshlq_r): Likewise.
16618 (vrshlq_n): Likewise.
16619 (vrshlq): Likewise.
16620 (vrmulhq): Likewise.
16621 (vrhaddq): Likewise.
16622 (vqsubq_n): Likewise.
16623 (vqsubq): Likewise.
16624 (vqshlq): Likewise.
16625 (vqshlq_r): Likewise.
16626 (vqshluq): Likewise.
16627 (vrshrq_n): Likewise.
16628 (vshlq_n): Likewise.
16629 (vqshluq_n): Likewise.
16630 (vqshlq_n): Likewise.
16631 (vqrshlq_n): Likewise.
16632 (vqrshlq): Likewise.
16633 (vqrdmulhq_n): Likewise.
16634 (vqrdmulhq): Likewise.
16635 (vqdmulhq_n): Likewise.
16636 (vqdmulhq): Likewise.
16637 (vqaddq_n): Likewise.
16638 (vqaddq): Likewise.
16639 (vorrq_n): Likewise.
16642 (vmulq_n): Likewise.
16644 (vmulltq_int): Likewise.
16645 (vmullbq_int): Likewise.
16646 (vmulhq): Likewise.
16648 (vminaq): Likewise.
16650 (vmaxaq): Likewise.
16651 (vhsubq_n): Likewise.
16652 (vhsubq): Likewise.
16653 (vhcaddq_rot90): Likewise.
16654 (vhcaddq_rot270): Likewise.
16655 (vhaddq_n): Likewise.
16656 (vhaddq): Likewise.
16658 (vcaddq_rot90): Likewise.
16659 (vcaddq_rot270): Likewise.
16660 (vbrsrq_n): Likewise.
16661 (vbicq_n): Likewise.
16664 (vaddq_n): Likewise.
16667 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
16668 (BINOP_NONE_NONE_NONE): Likewise.
16669 (BINOP_NONE_NONE_UNONE): Likewise.
16670 (BINOP_UNONE_NONE_IMM): Likewise.
16671 (BINOP_UNONE_NONE_NONE): Likewise.
16672 (BINOP_UNONE_UNONE_IMM): Likewise.
16673 (BINOP_UNONE_UNONE_NONE): Likewise.
16674 (BINOP_UNONE_UNONE_UNONE): Likewise.
16675 * config/arm/constraints.md (Ra): Define constraint to check constant is
16676 in the range of 0 to 7.
16677 (Rg): Define constriant to check the constant is one among 1, 2, 4
16679 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
16680 (mve_vaddq_n_<supf>): Likewise.
16681 (mve_vaddvaq_<supf>): Likewise.
16682 (mve_vaddvq_p_<supf>): Likewise.
16683 (mve_vandq_<supf>): Likewise.
16684 (mve_vbicq_<supf>): Likewise.
16685 (mve_vbrsrq_n_<supf>): Likewise.
16686 (mve_vcaddq_rot270_<supf>): Likewise.
16687 (mve_vcaddq_rot90_<supf>): Likewise.
16688 (mve_vcmpcsq_n_u): Likewise.
16689 (mve_vcmpcsq_u): Likewise.
16690 (mve_vcmpeqq_n_<supf>): Likewise.
16691 (mve_vcmpeqq_<supf>): Likewise.
16692 (mve_vcmpgeq_n_s): Likewise.
16693 (mve_vcmpgeq_s): Likewise.
16694 (mve_vcmpgtq_n_s): Likewise.
16695 (mve_vcmpgtq_s): Likewise.
16696 (mve_vcmphiq_n_u): Likewise.
16697 (mve_vcmphiq_u): Likewise.
16698 (mve_vcmpleq_n_s): Likewise.
16699 (mve_vcmpleq_s): Likewise.
16700 (mve_vcmpltq_n_s): Likewise.
16701 (mve_vcmpltq_s): Likewise.
16702 (mve_vcmpneq_n_<supf>): Likewise.
16703 (mve_vddupq_n_u): Likewise.
16704 (mve_veorq_<supf>): Likewise.
16705 (mve_vhaddq_n_<supf>): Likewise.
16706 (mve_vhaddq_<supf>): Likewise.
16707 (mve_vhcaddq_rot270_s): Likewise.
16708 (mve_vhcaddq_rot90_s): Likewise.
16709 (mve_vhsubq_n_<supf>): Likewise.
16710 (mve_vhsubq_<supf>): Likewise.
16711 (mve_vidupq_n_u): Likewise.
16712 (mve_vmaxaq_s): Likewise.
16713 (mve_vmaxavq_s): Likewise.
16714 (mve_vmaxq_<supf>): Likewise.
16715 (mve_vmaxvq_<supf>): Likewise.
16716 (mve_vminaq_s): Likewise.
16717 (mve_vminavq_s): Likewise.
16718 (mve_vminq_<supf>): Likewise.
16719 (mve_vminvq_<supf>): Likewise.
16720 (mve_vmladavq_<supf>): Likewise.
16721 (mve_vmladavxq_s): Likewise.
16722 (mve_vmlsdavq_s): Likewise.
16723 (mve_vmlsdavxq_s): Likewise.
16724 (mve_vmulhq_<supf>): Likewise.
16725 (mve_vmullbq_int_<supf>): Likewise.
16726 (mve_vmulltq_int_<supf>): Likewise.
16727 (mve_vmulq_n_<supf>): Likewise.
16728 (mve_vmulq_<supf>): Likewise.
16729 (mve_vornq_<supf>): Likewise.
16730 (mve_vorrq_<supf>): Likewise.
16731 (mve_vqaddq_n_<supf>): Likewise.
16732 (mve_vqaddq_<supf>): Likewise.
16733 (mve_vqdmulhq_n_s): Likewise.
16734 (mve_vqdmulhq_s): Likewise.
16735 (mve_vqrdmulhq_n_s): Likewise.
16736 (mve_vqrdmulhq_s): Likewise.
16737 (mve_vqrshlq_n_<supf>): Likewise.
16738 (mve_vqrshlq_<supf>): Likewise.
16739 (mve_vqshlq_n_<supf>): Likewise.
16740 (mve_vqshlq_r_<supf>): Likewise.
16741 (mve_vqshlq_<supf>): Likewise.
16742 (mve_vqshluq_n_s): Likewise.
16743 (mve_vqsubq_n_<supf>): Likewise.
16744 (mve_vqsubq_<supf>): Likewise.
16745 (mve_vrhaddq_<supf>): Likewise.
16746 (mve_vrmulhq_<supf>): Likewise.
16747 (mve_vrshlq_n_<supf>): Likewise.
16748 (mve_vrshlq_<supf>): Likewise.
16749 (mve_vrshrq_n_<supf>): Likewise.
16750 (mve_vshlq_n_<supf>): Likewise.
16751 (mve_vshlq_r_<supf>): Likewise.
16752 (mve_vsubq_n_<supf>): Likewise.
16753 (mve_vsubq_<supf>): Likewise.
16754 * config/arm/predicates.md (mve_imm_7): Define predicate to check
16755 the matching constraint Ra.
16756 (mve_imm_selective_upto_8): Define predicate to check the matching
16759 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16760 Mihail Ionescu <mihail.ionescu@arm.com>
16761 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16763 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
16764 qualifier for binary operands.
16765 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
16766 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
16767 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
16768 (vaddlvq_p_u32): Likewise.
16769 (vcmpneq_s8): Likewise.
16770 (vcmpneq_s16): Likewise.
16771 (vcmpneq_s32): Likewise.
16772 (vcmpneq_u8): Likewise.
16773 (vcmpneq_u16): Likewise.
16774 (vcmpneq_u32): Likewise.
16775 (vshlq_s8): Likewise.
16776 (vshlq_s16): Likewise.
16777 (vshlq_s32): Likewise.
16778 (vshlq_u8): Likewise.
16779 (vshlq_u16): Likewise.
16780 (vshlq_u32): Likewise.
16781 (__arm_vaddlvq_p_s32): Define intrinsic.
16782 (__arm_vaddlvq_p_u32): Likewise.
16783 (__arm_vcmpneq_s8): Likewise.
16784 (__arm_vcmpneq_s16): Likewise.
16785 (__arm_vcmpneq_s32): Likewise.
16786 (__arm_vcmpneq_u8): Likewise.
16787 (__arm_vcmpneq_u16): Likewise.
16788 (__arm_vcmpneq_u32): Likewise.
16789 (__arm_vshlq_s8): Likewise.
16790 (__arm_vshlq_s16): Likewise.
16791 (__arm_vshlq_s32): Likewise.
16792 (__arm_vshlq_u8): Likewise.
16793 (__arm_vshlq_u16): Likewise.
16794 (__arm_vshlq_u32): Likewise.
16795 (vaddlvq_p): Define polymorphic variant.
16796 (vcmpneq): Likewise.
16798 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
16800 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
16801 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
16802 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
16803 (mve_vcmpneq_<supf><mode>): Likewise.
16804 (mve_vshlq_<supf><mode>): Likewise.
16806 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16807 Mihail Ionescu <mihail.ionescu@arm.com>
16808 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16810 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
16811 qualifier for binary operands.
16812 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16813 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
16814 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
16815 (vcvtq_n_s32_f32): Likewise.
16816 (vcvtq_n_u16_f16): Likewise.
16817 (vcvtq_n_u32_f32): Likewise.
16818 (vcreateq_u8): Likewise.
16819 (vcreateq_u16): Likewise.
16820 (vcreateq_u32): Likewise.
16821 (vcreateq_u64): Likewise.
16822 (vcreateq_s8): Likewise.
16823 (vcreateq_s16): Likewise.
16824 (vcreateq_s32): Likewise.
16825 (vcreateq_s64): Likewise.
16826 (vshrq_n_s8): Likewise.
16827 (vshrq_n_s16): Likewise.
16828 (vshrq_n_s32): Likewise.
16829 (vshrq_n_u8): Likewise.
16830 (vshrq_n_u16): Likewise.
16831 (vshrq_n_u32): Likewise.
16832 (__arm_vcreateq_u8): Define intrinsic.
16833 (__arm_vcreateq_u16): Likewise.
16834 (__arm_vcreateq_u32): Likewise.
16835 (__arm_vcreateq_u64): Likewise.
16836 (__arm_vcreateq_s8): Likewise.
16837 (__arm_vcreateq_s16): Likewise.
16838 (__arm_vcreateq_s32): Likewise.
16839 (__arm_vcreateq_s64): Likewise.
16840 (__arm_vshrq_n_s8): Likewise.
16841 (__arm_vshrq_n_s16): Likewise.
16842 (__arm_vshrq_n_s32): Likewise.
16843 (__arm_vshrq_n_u8): Likewise.
16844 (__arm_vshrq_n_u16): Likewise.
16845 (__arm_vshrq_n_u32): Likewise.
16846 (__arm_vcvtq_n_s16_f16): Likewise.
16847 (__arm_vcvtq_n_s32_f32): Likewise.
16848 (__arm_vcvtq_n_u16_f16): Likewise.
16849 (__arm_vcvtq_n_u32_f32): Likewise.
16850 (vshrq_n): Define polymorphic variant.
16851 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
16853 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
16854 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
16855 * config/arm/constraints.md (Rb): Define constraint to check constant is
16856 in the range of 1 to 8.
16857 (Rf): Define constraint to check constant is in the range of 1 to 32.
16858 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
16859 (mve_vshrq_n_<supf><mode>): Likewise.
16860 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
16861 * config/arm/predicates.md (mve_imm_8): Define predicate to check
16862 the matching constraint Rb.
16863 (mve_imm_32): Define predicate to check the matching constraint Rf.
16865 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16866 Mihail Ionescu <mihail.ionescu@arm.com>
16867 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16869 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
16870 qualifier for binary operands.
16871 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
16872 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16873 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
16874 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
16875 (vsubq_n_f32): Likewise.
16876 (vbrsrq_n_f16): Likewise.
16877 (vbrsrq_n_f32): Likewise.
16878 (vcvtq_n_f16_s16): Likewise.
16879 (vcvtq_n_f32_s32): Likewise.
16880 (vcvtq_n_f16_u16): Likewise.
16881 (vcvtq_n_f32_u32): Likewise.
16882 (vcreateq_f16): Likewise.
16883 (vcreateq_f32): Likewise.
16884 (__arm_vsubq_n_f16): Define intrinsic.
16885 (__arm_vsubq_n_f32): Likewise.
16886 (__arm_vbrsrq_n_f16): Likewise.
16887 (__arm_vbrsrq_n_f32): Likewise.
16888 (__arm_vcvtq_n_f16_s16): Likewise.
16889 (__arm_vcvtq_n_f32_s32): Likewise.
16890 (__arm_vcvtq_n_f16_u16): Likewise.
16891 (__arm_vcvtq_n_f32_u32): Likewise.
16892 (__arm_vcreateq_f16): Likewise.
16893 (__arm_vcreateq_f32): Likewise.
16894 (vsubq): Define polymorphic variant.
16895 (vbrsrq): Likewise.
16896 (vcvtq_n): Likewise.
16897 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
16899 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
16900 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
16901 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
16902 * config/arm/constraints.md (Rd): Define constraint to check constant is
16903 in the range of 1 to 16.
16904 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
16905 mve_vbrsrq_n_f<mode>: Likewise.
16906 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
16907 mve_vcreateq_f<mode>: Likewise.
16908 * config/arm/predicates.md (mve_imm_16): Define predicate to check
16909 the matching constraint Rd.
16911 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16912 Mihail Ionescu <mihail.ionescu@arm.com>
16913 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16915 * config/arm/arm-builtins.c (hi_UP): Define mode.
16916 * config/arm/arm.h (IS_VPR_REGNUM): Move.
16917 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
16918 (APSRQ_REGNUM): Modify.
16919 (APSRGE_REGNUM): Modify.
16920 * config/arm/arm_mve.h (vctp16q): Define macro.
16921 (vctp32q): Likewise.
16922 (vctp64q): Likewise.
16923 (vctp8q): Likewise.
16925 (__arm_vctp16q): Define intrinsic.
16926 (__arm_vctp32q): Likewise.
16927 (__arm_vctp64q): Likewise.
16928 (__arm_vctp8q): Likewise.
16929 (__arm_vpnot): Likewise.
16930 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
16932 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
16933 (mve_vpnothi): Likewise.
16935 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
16936 Mihail Ionescu <mihail.ionescu@arm.com>
16937 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
16939 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
16940 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
16941 (vdupq_n_s16): Likewise.
16942 (vdupq_n_s32): Likewise.
16943 (vabsq_s8): Likewise.
16944 (vabsq_s16): Likewise.
16945 (vabsq_s32): Likewise.
16946 (vclsq_s8): Likewise.
16947 (vclsq_s16): Likewise.
16948 (vclsq_s32): Likewise.
16949 (vclzq_s8): Likewise.
16950 (vclzq_s16): Likewise.
16951 (vclzq_s32): Likewise.
16952 (vnegq_s8): Likewise.
16953 (vnegq_s16): Likewise.
16954 (vnegq_s32): Likewise.
16955 (vaddlvq_s32): Likewise.
16956 (vaddvq_s8): Likewise.
16957 (vaddvq_s16): Likewise.
16958 (vaddvq_s32): Likewise.
16959 (vmovlbq_s8): Likewise.
16960 (vmovlbq_s16): Likewise.
16961 (vmovltq_s8): Likewise.
16962 (vmovltq_s16): Likewise.
16963 (vmvnq_s8): Likewise.
16964 (vmvnq_s16): Likewise.
16965 (vmvnq_s32): Likewise.
16966 (vrev16q_s8): Likewise.
16967 (vrev32q_s8): Likewise.
16968 (vrev32q_s16): Likewise.
16969 (vqabsq_s8): Likewise.
16970 (vqabsq_s16): Likewise.
16971 (vqabsq_s32): Likewise.
16972 (vqnegq_s8): Likewise.
16973 (vqnegq_s16): Likewise.
16974 (vqnegq_s32): Likewise.
16975 (vcvtaq_s16_f16): Likewise.
16976 (vcvtaq_s32_f32): Likewise.
16977 (vcvtnq_s16_f16): Likewise.
16978 (vcvtnq_s32_f32): Likewise.
16979 (vcvtpq_s16_f16): Likewise.
16980 (vcvtpq_s32_f32): Likewise.
16981 (vcvtmq_s16_f16): Likewise.
16982 (vcvtmq_s32_f32): Likewise.
16983 (vmvnq_u8): Likewise.
16984 (vmvnq_u16): Likewise.
16985 (vmvnq_u32): Likewise.
16986 (vdupq_n_u8): Likewise.
16987 (vdupq_n_u16): Likewise.
16988 (vdupq_n_u32): Likewise.
16989 (vclzq_u8): Likewise.
16990 (vclzq_u16): Likewise.
16991 (vclzq_u32): Likewise.
16992 (vaddvq_u8): Likewise.
16993 (vaddvq_u16): Likewise.
16994 (vaddvq_u32): Likewise.
16995 (vrev32q_u8): Likewise.
16996 (vrev32q_u16): Likewise.
16997 (vmovltq_u8): Likewise.
16998 (vmovltq_u16): Likewise.
16999 (vmovlbq_u8): Likewise.
17000 (vmovlbq_u16): Likewise.
17001 (vrev16q_u8): Likewise.
17002 (vaddlvq_u32): Likewise.
17003 (vcvtpq_u16_f16): Likewise.
17004 (vcvtpq_u32_f32): Likewise.
17005 (vcvtnq_u16_f16): Likewise.
17006 (vcvtmq_u16_f16): Likewise.
17007 (vcvtmq_u32_f32): Likewise.
17008 (vcvtaq_u16_f16): Likewise.
17009 (vcvtaq_u32_f32): Likewise.
17010 (__arm_vdupq_n_s8): Define intrinsic.
17011 (__arm_vdupq_n_s16): Likewise.
17012 (__arm_vdupq_n_s32): Likewise.
17013 (__arm_vabsq_s8): Likewise.
17014 (__arm_vabsq_s16): Likewise.
17015 (__arm_vabsq_s32): Likewise.
17016 (__arm_vclsq_s8): Likewise.
17017 (__arm_vclsq_s16): Likewise.
17018 (__arm_vclsq_s32): Likewise.
17019 (__arm_vclzq_s8): Likewise.
17020 (__arm_vclzq_s16): Likewise.
17021 (__arm_vclzq_s32): Likewise.
17022 (__arm_vnegq_s8): Likewise.
17023 (__arm_vnegq_s16): Likewise.
17024 (__arm_vnegq_s32): Likewise.
17025 (__arm_vaddlvq_s32): Likewise.
17026 (__arm_vaddvq_s8): Likewise.
17027 (__arm_vaddvq_s16): Likewise.
17028 (__arm_vaddvq_s32): Likewise.
17029 (__arm_vmovlbq_s8): Likewise.
17030 (__arm_vmovlbq_s16): Likewise.
17031 (__arm_vmovltq_s8): Likewise.
17032 (__arm_vmovltq_s16): Likewise.
17033 (__arm_vmvnq_s8): Likewise.
17034 (__arm_vmvnq_s16): Likewise.
17035 (__arm_vmvnq_s32): Likewise.
17036 (__arm_vrev16q_s8): Likewise.
17037 (__arm_vrev32q_s8): Likewise.
17038 (__arm_vrev32q_s16): Likewise.
17039 (__arm_vqabsq_s8): Likewise.
17040 (__arm_vqabsq_s16): Likewise.
17041 (__arm_vqabsq_s32): Likewise.
17042 (__arm_vqnegq_s8): Likewise.
17043 (__arm_vqnegq_s16): Likewise.
17044 (__arm_vqnegq_s32): Likewise.
17045 (__arm_vmvnq_u8): Likewise.
17046 (__arm_vmvnq_u16): Likewise.
17047 (__arm_vmvnq_u32): Likewise.
17048 (__arm_vdupq_n_u8): Likewise.
17049 (__arm_vdupq_n_u16): Likewise.
17050 (__arm_vdupq_n_u32): Likewise.
17051 (__arm_vclzq_u8): Likewise.
17052 (__arm_vclzq_u16): Likewise.
17053 (__arm_vclzq_u32): Likewise.
17054 (__arm_vaddvq_u8): Likewise.
17055 (__arm_vaddvq_u16): Likewise.
17056 (__arm_vaddvq_u32): Likewise.
17057 (__arm_vrev32q_u8): Likewise.
17058 (__arm_vrev32q_u16): Likewise.
17059 (__arm_vmovltq_u8): Likewise.
17060 (__arm_vmovltq_u16): Likewise.
17061 (__arm_vmovlbq_u8): Likewise.
17062 (__arm_vmovlbq_u16): Likewise.
17063 (__arm_vrev16q_u8): Likewise.
17064 (__arm_vaddlvq_u32): Likewise.
17065 (__arm_vcvtpq_u16_f16): Likewise.
17066 (__arm_vcvtpq_u32_f32): Likewise.
17067 (__arm_vcvtnq_u16_f16): Likewise.
17068 (__arm_vcvtmq_u16_f16): Likewise.
17069 (__arm_vcvtmq_u32_f32): Likewise.
17070 (__arm_vcvtaq_u16_f16): Likewise.
17071 (__arm_vcvtaq_u32_f32): Likewise.
17072 (__arm_vcvtaq_s16_f16): Likewise.
17073 (__arm_vcvtaq_s32_f32): Likewise.
17074 (__arm_vcvtnq_s16_f16): Likewise.
17075 (__arm_vcvtnq_s32_f32): Likewise.
17076 (__arm_vcvtpq_s16_f16): Likewise.
17077 (__arm_vcvtpq_s32_f32): Likewise.
17078 (__arm_vcvtmq_s16_f16): Likewise.
17079 (__arm_vcvtmq_s32_f32): Likewise.
17080 (vdupq_n): Define polymorphic variant.
17085 (vaddlvq): Likewise.
17086 (vaddvq): Likewise.
17087 (vmovlbq): Likewise.
17088 (vmovltq): Likewise.
17090 (vrev16q): Likewise.
17091 (vrev32q): Likewise.
17092 (vqabsq): Likewise.
17093 (vqnegq): Likewise.
17094 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
17095 (UNOP_SNONE_NONE): Likewise.
17096 (UNOP_UNONE_UNONE): Likewise.
17097 (UNOP_UNONE_NONE): Likewise.
17098 * config/arm/constraints.md (e): Define new constriant to allow only
17100 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
17101 (mve_vnegq_s<mode>): Likewise.
17102 (mve_vmvnq_<supf><mode>): Likewise.
17103 (mve_vdupq_n_<supf><mode>): Likewise.
17104 (mve_vclzq_<supf><mode>): Likewise.
17105 (mve_vclsq_s<mode>): Likewise.
17106 (mve_vaddvq_<supf><mode>): Likewise.
17107 (mve_vabsq_s<mode>): Likewise.
17108 (mve_vrev32q_<supf><mode>): Likewise.
17109 (mve_vmovltq_<supf><mode>): Likewise.
17110 (mve_vmovlbq_<supf><mode>): Likewise.
17111 (mve_vcvtpq_<supf><mode>): Likewise.
17112 (mve_vcvtnq_<supf><mode>): Likewise.
17113 (mve_vcvtmq_<supf><mode>): Likewise.
17114 (mve_vcvtaq_<supf><mode>): Likewise.
17115 (mve_vrev16q_<supf>v16qi): Likewise.
17116 (mve_vaddlvq_<supf>v4si): Likewise.
17118 2020-03-17 Jakub Jelinek <jakub@redhat.com>
17120 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
17122 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
17124 * read-rtl-function.c (find_param_by_name,
17125 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
17127 * spellcheck.c (get_edit_distance_cutoff): Likewise.
17128 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
17129 * tree.def (SWITCH_EXPR): Likewise.
17130 * selftest.c (assert_str_contains): Likewise.
17131 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
17133 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
17134 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
17135 * langhooks.h (struct lang_hooks_for_decls): Likewise.
17136 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
17137 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
17139 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
17140 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
17141 * tree.c (component_ref_size): Likewise.
17142 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
17143 * gimple-ssa-sprintf.c (get_string_length, format_string,
17144 format_directive): Likewise.
17145 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
17146 * input.c (string_concat_db::get_string_concatenation,
17147 test_lexer_string_locations_ucn4): Likewise.
17148 * cfgexpand.c (pass_expand::execute): Likewise.
17149 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
17150 maybe_diag_overlap): Likewise.
17151 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
17152 * shrink-wrap.c (spread_components): Likewise.
17153 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
17155 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
17157 * dwarf2out.c (dwarf2out_early_finish): Likewise.
17158 * gimple-ssa-store-merging.c: Likewise.
17159 * ira-costs.c (record_operand_costs): Likewise.
17160 * tree-vect-loop.c (vectorizable_reduction): Likewise.
17161 * target.def (dispatch): Likewise.
17162 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
17163 in documentation text.
17164 * doc/tm.texi: Regenerated.
17165 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
17166 duplicated word issue in a comment.
17167 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
17168 * config/i386/i386-features.c (remove_partial_avx_dependency):
17170 * config/msp430/msp430.c (msp430_select_section): Likewise.
17171 * config/gcn/gcn-run.c (load_image): Likewise.
17172 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
17173 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
17174 * config/aarch64/falkor-tag-collision-avoidance.c
17175 (single_dest_per_chain): Likewise.
17176 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
17177 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
17178 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
17179 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
17181 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
17182 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
17183 * config/rs6000/rs6000-logue.c
17184 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
17185 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
17186 Fix various other issues in the comment.
17188 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
17190 * config/arm/t-rmprofile: create new multilib for
17191 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
17194 2020-03-17 Jakub Jelinek <jakub@redhat.com>
17196 PR tree-optimization/94015
17197 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
17198 function where EXP is address of the bytes being stored rather than
17199 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
17200 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
17201 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
17202 calling native_encode_expr if host or target doesn't have 8-bit
17203 chars. Formatting fixes.
17204 (count_nonzero_bytes_addr): New function.
17206 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17207 Mihail Ionescu <mihail.ionescu@arm.com>
17208 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17210 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
17211 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
17212 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
17213 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
17214 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
17215 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
17216 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
17217 (vmvnq_n_s32): Likewise.
17218 (vrev64q_s8): Likewise.
17219 (vrev64q_s16): Likewise.
17220 (vrev64q_s32): Likewise.
17221 (vcvtq_s16_f16): Likewise.
17222 (vcvtq_s32_f32): Likewise.
17223 (vrev64q_u8): Likewise.
17224 (vrev64q_u16): Likewise.
17225 (vrev64q_u32): Likewise.
17226 (vmvnq_n_u16): Likewise.
17227 (vmvnq_n_u32): Likewise.
17228 (vcvtq_u16_f16): Likewise.
17229 (vcvtq_u32_f32): Likewise.
17230 (__arm_vmvnq_n_s16): Define intrinsic.
17231 (__arm_vmvnq_n_s32): Likewise.
17232 (__arm_vrev64q_s8): Likewise.
17233 (__arm_vrev64q_s16): Likewise.
17234 (__arm_vrev64q_s32): Likewise.
17235 (__arm_vrev64q_u8): Likewise.
17236 (__arm_vrev64q_u16): Likewise.
17237 (__arm_vrev64q_u32): Likewise.
17238 (__arm_vmvnq_n_u16): Likewise.
17239 (__arm_vmvnq_n_u32): Likewise.
17240 (__arm_vcvtq_s16_f16): Likewise.
17241 (__arm_vcvtq_s32_f32): Likewise.
17242 (__arm_vcvtq_u16_f16): Likewise.
17243 (__arm_vcvtq_u32_f32): Likewise.
17244 (vrev64q): Define polymorphic variant.
17245 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
17246 (UNOP_SNONE_NONE): Likewise.
17247 (UNOP_SNONE_IMM): Likewise.
17248 (UNOP_UNONE_UNONE): Likewise.
17249 (UNOP_UNONE_NONE): Likewise.
17250 (UNOP_UNONE_IMM): Likewise.
17251 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
17252 (mve_vcvtq_from_f_<supf><mode>): Likewise.
17253 (mve_vmvnq_n_<supf><mode>): Likewise.
17255 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
17256 Mihail Ionescu <mihail.ionescu@arm.com>
17257 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17259 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
17260 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
17261 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
17262 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
17263 (vrndxq_f32): Likewise.
17264 (vrndq_f16) Likewise.
17265 (vrndq_f32): Likewise.
17266 (vrndpq_f16): Likewise.
17267 (vrndpq_f32): Likewise.
17268 (vrndnq_f16): Likewise.
17269 (vrndnq_f32): Likewise.
17270 (vrndmq_f16): Likewise.
17271 (vrndmq_f32): Likewise.
17272 (vrndaq_f16): Likewise.
17273 (vrndaq_f32): Likewise.
17274 (vrev64q_f16): Likewise.
17275 (vrev64q_f32): Likewise.
17276 (vnegq_f16): Likewise.
17277 (vnegq_f32): Likewise.
17278 (vdupq_n_f16): Likewise.
17279 (vdupq_n_f32): Likewise.
17280 (vabsq_f16): Likewise.
17281 (vabsq_f32): Likewise.
17282 (vrev32q_f16): Likewise.
17283 (vcvttq_f32_f16): Likewise.
17284 (vcvtbq_f32_f16): Likewise.
17285 (vcvtq_f16_s16): Likewise.
17286 (vcvtq_f32_s32): Likewise.
17287 (vcvtq_f16_u16): Likewise.
17288 (vcvtq_f32_u32): Likewise.
17289 (__arm_vrndxq_f16): Define intrinsic.
17290 (__arm_vrndxq_f32): Likewise.
17291 (__arm_vrndq_f16): Likewise.
17292 (__arm_vrndq_f32): Likewise.
17293 (__arm_vrndpq_f16): Likewise.
17294 (__arm_vrndpq_f32): Likewise.
17295 (__arm_vrndnq_f16): Likewise.
17296 (__arm_vrndnq_f32): Likewise.
17297 (__arm_vrndmq_f16): Likewise.
17298 (__arm_vrndmq_f32): Likewise.
17299 (__arm_vrndaq_f16): Likewise.
17300 (__arm_vrndaq_f32): Likewise.
17301 (__arm_vrev64q_f16): Likewise.
17302 (__arm_vrev64q_f32): Likewise.
17303 (__arm_vnegq_f16): Likewise.
17304 (__arm_vnegq_f32): Likewise.
17305 (__arm_vdupq_n_f16): Likewise.
17306 (__arm_vdupq_n_f32): Likewise.
17307 (__arm_vabsq_f16): Likewise.
17308 (__arm_vabsq_f32): Likewise.
17309 (__arm_vrev32q_f16): Likewise.
17310 (__arm_vcvttq_f32_f16): Likewise.
17311 (__arm_vcvtbq_f32_f16): Likewise.
17312 (__arm_vcvtq_f16_s16): Likewise.
17313 (__arm_vcvtq_f32_s32): Likewise.
17314 (__arm_vcvtq_f16_u16): Likewise.
17315 (__arm_vcvtq_f32_u32): Likewise.
17316 (vrndxq): Define polymorphic variants.
17318 (vrndpq): Likewise.
17319 (vrndnq): Likewise.
17320 (vrndmq): Likewise.
17321 (vrndaq): Likewise.
17322 (vrev64q): Likewise.
17325 (vrev32q): Likewise.
17326 (vcvtbq_f32): Likewise.
17327 (vcvttq_f32): Likewise.
17329 * config/arm/arm_mve_builtins.def (VAR2): Define.
17331 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
17332 (mve_vrndq_f<mode>): Likewise.
17333 (mve_vrndpq_f<mode>): Likewise.
17334 (mve_vrndnq_f<mode>): Likewise.
17335 (mve_vrndmq_f<mode>): Likewise.
17336 (mve_vrndaq_f<mode>): Likewise.
17337 (mve_vrev64q_f<mode>): Likewise.
17338 (mve_vnegq_f<mode>): Likewise.
17339 (mve_vdupq_n_f<mode>): Likewise.
17340 (mve_vabsq_f<mode>): Likewise.
17341 (mve_vrev32q_fv8hf): Likewise.
17342 (mve_vcvttq_f32_f16v4sf): Likewise.
17343 (mve_vcvtbq_f32_f16v4sf): Likewise.
17344 (mve_vcvtq_to_f_<supf><mode>): Likewise.
17346 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
17347 Mihail Ionescu <mihail.ionescu@arm.com>
17348 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17350 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
17352 (ARM_BUILTIN_MVE_PATTERN_START): Define.
17353 (arm_init_mve_builtins): Define function.
17354 (arm_init_builtins): Add TARGET_HAVE_MVE check.
17355 (arm_expand_builtin_1): Check the range of fcode.
17356 (arm_expand_mve_builtin): Define function to expand MVE builtins.
17357 (arm_expand_builtin): Check the range of fcode.
17358 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
17360 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
17361 (vst4q_s8): Define macro.
17362 (vst4q_s16): Likewise.
17363 (vst4q_s32): Likewise.
17364 (vst4q_u8): Likewise.
17365 (vst4q_u16): Likewise.
17366 (vst4q_u32): Likewise.
17367 (vst4q_f16): Likewise.
17368 (vst4q_f32): Likewise.
17369 (__arm_vst4q_s8): Define inline builtin.
17370 (__arm_vst4q_s16): Likewise.
17371 (__arm_vst4q_s32): Likewise.
17372 (__arm_vst4q_u8): Likewise.
17373 (__arm_vst4q_u16): Likewise.
17374 (__arm_vst4q_u32): Likewise.
17375 (__arm_vst4q_f16): Likewise.
17376 (__arm_vst4q_f32): Likewise.
17377 (__ARM_mve_typeid): Define macro with MVE types.
17378 (__ARM_mve_coerce): Define macro with _Generic feature.
17379 (vst4q): Define polymorphic variant for different vst4q builtins.
17380 * config/arm/arm_mve_builtins.def: New file.
17381 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
17383 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
17384 (unspec): Define unspec.
17385 (mve_vst4q<mode>): Define RTL pattern.
17386 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
17388 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
17390 (define_split): Allow OI mode split for MVE after reload.
17391 (define_split): Allow XI mode split for MVE after reload.
17392 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
17393 (arm-builtins.o): Likewise.
17395 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
17397 * c-typeck.c (process_init_element): Handle constructor_type with
17398 type size represented by POLY_INT_CST.
17400 2020-03-17 Jakub Jelinek <jakub@redhat.com>
17402 PR tree-optimization/94187
17403 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
17404 nchars - offset < nbytes.
17406 PR middle-end/94189
17407 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
17408 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
17409 for code-generation.
17411 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
17414 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
17415 after changing memory subreg.
17417 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
17418 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17420 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
17421 emulator calls for dobule precision arithmetic operations for MVE.
17423 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
17424 Mihail Ionescu <mihail.ionescu@arm.com>
17425 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17427 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
17428 feature bit is on and -mfpu=auto is passed as compiler option, do not
17429 generate error on not finding any matching fpu. Because in this case
17430 fpu is not required.
17431 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
17432 enabled for MVE and also for all VFP extensions.
17433 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
17435 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
17436 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
17437 along with feature bits mve_float.
17438 (mve): Modify add options in armv8.1-m.main arch for MVE.
17439 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
17441 * config/arm/arm.c (use_return_insn): Replace the
17442 check with TARGET_VFP_BASE.
17443 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
17445 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
17446 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
17448 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
17449 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
17451 (arm_compute_frame_layout): Likewise.
17452 (arm_save_coproc_regs): Likewise.
17453 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
17455 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
17456 with equivalent macro TARGET_VFP_BASE.
17457 (arm_expand_epilogue_apcs_frame): Likewise.
17458 (arm_expand_epilogue): Likewise.
17459 (arm_conditional_register_usage): Likewise.
17460 (arm_declare_function_name): Add check to skip printing .fpu directive
17461 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
17463 * config/arm/arm.h (TARGET_VFP_BASE): Define.
17464 * config/arm/arm.md (arch): Add "mve" to arch.
17465 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
17466 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
17467 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
17468 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
17470 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
17471 to not allow for MVE.
17472 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
17474 (VUNSPEC_GET_FPSCR): Define.
17475 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
17476 instructions which move to general-purpose Register from Floating-point
17477 Special register and vice-versa.
17478 (thumb2_movhi_fp16): Likewise.
17479 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
17480 with MCR and MRC instructions which set and get Floating-point Status
17481 and Control Register (FPSCR).
17482 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
17484 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
17485 float move patterns in MVE.
17486 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
17487 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
17488 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
17489 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
17490 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
17491 TARGET_VFP_BASE check.
17492 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
17493 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
17495 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
17496 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
17500 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
17501 Mihail Ionescu <mihail.ionescu@arm.com>
17502 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
17504 * config.gcc (arm_mve.h): Include mve intrinsics header file.
17505 * config/arm/aout.h (p0): Add new register name for MVE predicated
17507 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
17508 common to Neon and MVE.
17509 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
17510 (arm_init_simd_builtin_types): Disable poly types for MVE.
17511 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
17512 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
17513 ARM_BUILTIN_NEON_LANE_CHECK.
17514 (mve_dereference_pointer): Add function.
17515 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
17517 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
17518 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
17519 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
17520 with floating point enabled.
17521 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
17522 simd_immediate_valid_for_move.
17523 (simd_immediate_valid_for_move): Renamed from
17524 neon_immediate_valid_for_move function.
17525 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
17526 error if vfpv2 feature bit is disabled and mve feature bit is also
17527 disabled for HARD_FLOAT_ABI.
17528 (use_return_insn): Check to not push VFP regs for MVE.
17529 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
17531 (aapcs_vfp_allocate_return_reg): Likewise.
17532 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
17533 address operand for MVE.
17534 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
17535 (neon_valid_immediate): Rename to simd_valid_immediate.
17536 (simd_valid_immediate): Rename from neon_valid_immediate.
17537 (simd_valid_immediate): MVE check on size of vector is 128 bits.
17538 (neon_immediate_valid_for_move): Rename to
17539 simd_immediate_valid_for_move.
17540 (simd_immediate_valid_for_move): Rename from
17541 neon_immediate_valid_for_move.
17542 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
17544 (neon_make_constant): Modify call to neon_valid_immediate function.
17545 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
17547 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
17548 (arm_compute_frame_layout): Calculate space for saved VFP registers for
17550 (arm_save_coproc_regs): Save coproc registers for MVE.
17551 (arm_print_operand): Add case 'E' to print memory operands for MVE.
17552 (arm_print_operand_address): Check to print register number for MVE.
17553 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
17554 (arm_modes_tieable_p): Check to allow structure mode for MVE.
17555 (arm_regno_class): Add VPR_REGNUM check.
17556 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
17558 (arm_expand_epilogue): MVE check for enabling pop instructions in
17560 (arm_print_asm_arch_directives): Modify function to disable print of
17561 .arch_extension "mve" and "fp" for cases where MVE is enabled with
17563 (arm_vector_mode_supported_p): Check for modes available in MVE interger
17564 and MVE floating point.
17565 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
17567 (arm_conditional_register_usage): Enable usage of conditional regsiter
17569 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
17570 (arm_declare_function_name): Modify function to disable print of
17571 .arch_extension "mve" and "fp" for cases where MVE is enabled with
17573 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
17574 when target general registers are required.
17575 (TARGET_HAVE_MVE_FLOAT): Likewise.
17576 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
17578 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
17579 which indicate this is not available for across function calls.
17580 (FIRST_PSEUDO_REGISTER): Modify.
17581 (VALID_MVE_MODE): Define valid MVE mode.
17582 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
17583 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
17584 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
17585 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
17587 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
17588 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
17589 (enum reg_class): Add VPR_REG entry.
17590 (REG_CLASS_NAMES): Add VPR_REG entry.
17591 * config/arm/arm.md (VPR_REGNUM): Define.
17592 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
17593 "unconditional" instructions.
17594 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
17595 (movdf_soft_insn): Modify RTL to not allow for MVE.
17596 (vfp_pop_multiple_with_writeback): Enable for MVE.
17597 (include "mve.md"): Include mve.md file.
17598 * config/arm/arm_mve.h: Add MVE intrinsics head file.
17599 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
17600 for vector predicated operands.
17601 * config/arm/iterators.md (VNIM1): Define.
17602 (VNINOTM1): Define.
17603 (VHFBF_split): Define
17604 * config/arm/mve.md: New file.
17605 (mve_mov<mode>): Define RTL for move, store and load in MVE.
17606 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
17608 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
17609 simd_immediate_valid_for_move.
17610 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
17611 is common to MVE and NEON to vec-common.md file.
17612 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
17613 * config/arm/predicates.md (vpr_register_operand): Define.
17614 * config/arm/t-arm: Add mve.md file.
17615 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
17617 (mve_store): Add MVE instructions mve_store to attribute "type".
17618 (mve_load): Add MVE instructions mve_load to attribute "type".
17619 (is_mve_type): Define attribute.
17620 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
17621 standard move patterns in MVE along with NEON and IWMMXT with mode
17623 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
17624 and IWMMXT with mode iterator V8HF.
17625 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
17627 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
17628 simd_immediate_valid_for_move.
17631 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
17634 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
17635 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
17637 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
17639 2020-03-16 Jakub Jelinek <jakub@redhat.com>
17642 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
17645 PR tree-optimization/94166
17646 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
17647 as secondary comparison key.
17649 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
17651 PR tree-optimization/94125
17652 * tree-loop-distribution.c
17653 (loop_distribution::break_alias_scc_partitions): Update post order
17654 number for merged scc.
17656 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
17659 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
17661 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
17662 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
17663 and ext_sse_reg_operand check.
17665 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
17667 * common.opt: Avoid redundancy in the help text.
17668 * config/arc/arc.opt: Likewise.
17669 * config/cr16/cr16.opt: Likewise.
17671 2020-03-14 Jakub Jelinek <jakub@redhat.com>
17673 PR middle-end/93566
17674 * tree-nested.c (convert_nonlocal_omp_clauses,
17675 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
17676 with C/C++ array sections.
17678 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
17681 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
17682 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
17685 2020-03-14 Jakub Jelinek <jakub@redhat.com>
17687 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
17688 "a an" to "an" in a comment.
17689 * hsa-common.h (is_a_helper): Likewise.
17690 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
17691 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
17692 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
17694 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
17697 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
17698 64-bit value by 64 bits (UB).
17700 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
17702 PR rtl-optimization/92303
17703 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
17705 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
17707 PR rtl-optimization/94148
17708 PR rtl-optimization/94042
17709 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
17710 (df_worklist_propagate_forward): New parameter last_change_age, use
17711 that instead of bb->aux.
17712 (df_worklist_propagate_backward): Ditto.
17713 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
17715 2020-03-13 Richard Biener <rguenther@suse.de>
17717 PR tree-optimization/94163
17718 * tree-ssa-pre.c (create_expression_by_pieces): Check
17719 whether alignment would be zero.
17721 2020-03-13 Martin Liska <mliska@suse.cz>
17724 * lto-wrapper.c (run_gcc): Use concat for appending
17725 to collect_gcc_options.
17727 2020-03-13 Jakub Jelinek <jakub@redhat.com>
17730 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
17731 instead of GEN_INT.
17733 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
17736 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
17737 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
17738 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
17739 TARGET_AVX512VL and ext_sse_reg_operand check.
17741 2020-03-13 Bu Le <bule1@huawei.com>
17744 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
17745 (-param=aarch64-double-recp-precision=): New options.
17746 * doc/invoke.texi: Document them.
17747 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
17748 instead of hard-coding the choice of 1 for float and 2 for double.
17750 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
17752 PR rtl-optimization/94119
17753 * resource.h (clear_hashed_info_until_next_barrier): Declare.
17754 * resource.c (clear_hashed_info_until_next_barrier): New function.
17755 * reorg.c (add_to_delay_list): Fix formatting.
17756 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
17757 the next instruction after removing a BARRIER.
17759 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
17761 PR middle-end/92071
17762 * expmed.c (store_integral_bit_field): For fields larger than a word,
17763 call extract_bit_field on the value if the mode is BLKmode. Remove
17764 specific path for big-endian targets and tidy things up a little bit.
17766 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
17768 PR rtl-optimization/90275
17769 * cse.c (cse_insn): Delete no-op register moves too.
17771 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
17773 * config/rx/rx.md (CTRLREG_CPEN): Remove.
17774 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
17776 2020-03-12 Richard Biener <rguenther@suse.de>
17778 PR tree-optimization/94103
17779 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
17780 punning when the mode precision is not sufficient.
17782 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
17785 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
17786 MODE_V1DF and MODE_V2SF.
17787 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
17788 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
17791 2020-03-12 Jakub Jelinek <jakub@redhat.com>
17793 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
17794 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
17795 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
17796 * doc/tm.texi: Regenerated.
17798 PR tree-optimization/94130
17799 * tree-ssa-dse.c: Include gimplify.h.
17800 (increment_start_addr): If stmt has lhs, drop the lhs from call and
17801 set it after the call to the original value of the first argument.
17803 (decrement_count): Formatting fix.
17805 2020-03-11 Delia Burduv <delia.burduv@arm.com>
17807 * config/arm/arm-builtins.c
17808 (arm_init_simd_builtin_scalar_types): New.
17809 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
17810 (vld2q_bf16): Used new builtin type.
17811 (vld3_bf16): Used new builtin type.
17812 (vld3q_bf16): Used new builtin type.
17813 (vld4_bf16): Used new builtin type.
17814 (vld4q_bf16): Used new builtin type.
17815 (vld2_dup_bf16): Used new builtin type.
17816 (vld2q_dup_bf16): Used new builtin type.
17817 (vld3_dup_bf16): Used new builtin type.
17818 (vld3q_dup_bf16): Used new builtin type.
17819 (vld4_dup_bf16): Used new builtin type.
17820 (vld4q_dup_bf16): Used new builtin type.
17822 2020-03-11 Jakub Jelinek <jakub@redhat.com>
17825 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
17826 at the start to switch to data section. Don't print extra newline if
17827 .globl directive has not been emitted.
17829 2020-03-11 Richard Biener <rguenther@suse.de>
17831 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
17834 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
17836 PR middle-end/93961
17837 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
17838 whose type is a qualified union.
17840 2020-03-11 Jakub Jelinek <jakub@redhat.com>
17843 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
17844 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
17847 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
17849 (get_nth_most_common_value): Use abs_hwi instead of abs.
17851 PR middle-end/94111
17852 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
17853 is rvc_normal, otherwise use real_to_decimal to print the number to
17856 PR tree-optimization/94114
17857 * tree-loop-distribution.c (generate_memset_builtin): Call
17858 rewrite_to_non_trapping_overflow even on mem.
17859 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
17862 2020-03-10 Jeff Law <law@redhat.com>
17864 * config/bfin/bfin.md (movsi_insv): Add length attribute.
17866 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
17869 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
17870 NAN and SIGNED_ZEROR for smax/smin.
17872 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
17875 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
17876 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
17878 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
17880 * loop-iv.c (find_simple_exit): Make it static.
17881 * cfgloop.h: Remove the corresponding prototype.
17883 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
17885 * ddg.c (create_ddg): Fix intendation.
17886 (set_recurrence_length): Likewise.
17887 (create_ddg_all_sccs): Likewise.
17889 2020-03-10 Jakub Jelinek <jakub@redhat.com>
17892 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
17893 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
17896 2020-03-09 Jason Merrill <jason@redhat.com>
17898 * gdbinit.in (pgs): Fix typo in documentation.
17900 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
17904 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
17906 PR rtl-optimization/93564
17907 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
17908 do not honor reg alloc order.
17910 2020-03-09 Andrew Pinski <apinski@marvell.com>
17912 PR inline-asm/94095
17913 * doc/extend.texi (x86 Operand Modifiers): Fix column
17916 2020-03-09 Martin Liska <mliska@suse.cz>
17919 * config/rs6000/rs6000.c (rs6000_option_override_internal):
17920 Remove set of str_align_loops and str_align_jumps as these
17921 should be set in previous 2 conditions in the function.
17923 2020-03-09 Jakub Jelinek <jakub@redhat.com>
17925 PR rtl-optimization/94045
17926 * params.opt (-param=max-find-base-term-values=): New option.
17927 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
17928 in a single toplevel find_base_term call.
17930 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
17933 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
17934 * config/aarch64/aarch64-simd.md
17935 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
17936 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
17937 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
17938 * config/aarch64/arm_neon.h:
17939 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
17940 (vmlal_lane_u16): Likewise.
17941 (vmlal_lane_s32): Likewise.
17942 (vmlal_lane_u32): Likewise.
17943 (vmlal_laneq_s16): Likewise.
17944 (vmlal_laneq_u16): Likewise.
17945 (vmlal_laneq_s32): Likewise.
17946 (vmlal_laneq_u32): Likewise.
17947 (vmull_lane_s16): Likewise.
17948 (vmull_lane_u16): Likewise.
17949 (vmull_lane_s32): Likewise.
17950 (vmull_lane_u32): Likewise.
17951 (vmull_laneq_s16): Likewise.
17952 (vmull_laneq_u16): Likewise.
17953 (vmull_laneq_s32): Likewise.
17954 (vmull_laneq_u32): Likewise.
17955 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
17958 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
17960 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
17961 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
17962 (aarch64_mls_elt<mode>): Likewise.
17963 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
17964 (aarch64_fma4_elt<mode>): Likewise.
17965 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
17966 (aarch64_fma4_elt_to_64v2df): Likewise.
17967 (aarch64_fnma4_elt<mode>): Likewise.
17968 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
17969 (aarch64_fnma4_elt_to_64v2df): Likewise.
17971 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17973 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
17974 Specify movprfx attribute.
17975 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
17977 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
17980 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
17982 (TARGET_NO_FP_IN_TOC): Same.
17983 * config/rs6000/aix71.h: Same.
17984 * config/rs6000/aix72.h: Same.
17986 2020-03-06 Andrew Pinski <apinski@marvell.com>
17987 Jeff Law <law@redhat.com>
17989 PR rtl-optimization/93996
17990 * haifa-sched.c (remove_notes): Be more careful when adding
17993 2020-03-06 Delia Burduv <delia.burduv@arm.com>
17995 * config/arm/arm_neon.h (vld2_bf16): New.
18001 (vld2_dup_bf16): New.
18002 (vld2q_dup_bf16): New.
18003 (vld3_dup_bf16): New.
18004 (vld3q_dup_bf16): New.
18005 (vld4_dup_bf16): New.
18006 (vld4q_dup_bf16): New.
18007 * config/arm/arm_neon_builtins.def
18008 (vld2): Changed to VAR13 and added v4bf, v8bf
18009 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
18010 (vld3): Changed to VAR13 and added v4bf, v8bf
18011 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
18012 (vld4): Changed to VAR13 and added v4bf, v8bf
18013 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
18014 * config/arm/iterators.md (VDXBF2): New iterator.
18015 *config/arm/neon.md (neon_vld2): Use new iterators.
18016 (neon_vld2_dup<mode): Use new iterators.
18017 (neon_vld3<mode>): Likewise.
18018 (neon_vld3qa<mode>): Likewise.
18019 (neon_vld3qb<mode>): Likewise.
18020 (neon_vld3_dup<mode>): Likewise.
18021 (neon_vld4<mode>): Likewise.
18022 (neon_vld4qa<mode>): Likewise.
18023 (neon_vld4qb<mode>): Likewise.
18024 (neon_vld4_dup<mode>): Likewise.
18025 (neon_vld2_dupv8bf): New.
18026 (neon_vld3_dupv8bf): Likewise.
18027 (neon_vld4_dupv8bf): Likewise.
18029 2020-03-06 Delia Burduv <delia.burduv@arm.com>
18031 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
18032 (bfloat16x8x2_t): New typedef.
18033 (bfloat16x4x3_t): New typedef.
18034 (bfloat16x8x3_t): New typedef.
18035 (bfloat16x4x4_t): New typedef.
18036 (bfloat16x8x4_t): New typedef.
18043 * config/arm/arm-builtins.c (v2bf_UP): Define.
18045 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
18046 * config/arm/arm-modes.def (V2BF): New mode.
18047 * config/arm/arm-simd-builtin-types.def
18048 (Bfloat16x2_t): New entry.
18049 * config/arm/arm_neon_builtins.def
18050 (vst2): Changed to VAR13 and added v4bf, v8bf
18051 (vst3): Changed to VAR13 and added v4bf, v8bf
18052 (vst4): Changed to VAR13 and added v4bf, v8bf
18053 * config/arm/iterators.md (VDXBF): New iterator.
18054 (VQ2BF): New iterator.
18055 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
18056 (neon_vst2<mode>): Used new iterators.
18057 (neon_vst3<mode>): Used new iterators.
18058 (neon_vst3<mode>): Used new iterators.
18059 (neon_vst3qa<mode>): Used new iterators.
18060 (neon_vst3qb<mode>): Used new iterators.
18061 (neon_vst4<mode>): Used new iterators.
18062 (neon_vst4<mode>): Used new iterators.
18063 (neon_vst4qa<mode>): Used new iterators.
18064 (neon_vst4qb<mode>): Used new iterators.
18066 2020-03-06 Delia Burduv <delia.burduv@arm.com>
18068 * config/aarch64/aarch64-simd-builtins.def
18069 (bfcvtn): New built-in function.
18070 (bfcvtn_q): New built-in function.
18071 (bfcvtn2): New built-in function.
18072 (bfcvt): New built-in function.
18073 * config/aarch64/aarch64-simd.md
18074 (aarch64_bfcvtn<q><mode>): New pattern.
18075 (aarch64_bfcvtn2v8bf): New pattern.
18076 (aarch64_bfcvtbf): New pattern.
18077 * config/aarch64/arm_bf16.h (float32_t): New typedef.
18078 (vcvth_bf16_f32): New intrinsic.
18079 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
18080 (vcvtq_low_bf16_f32): New intrinsic.
18081 (vcvtq_high_bf16_f32): New intrinsic.
18082 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
18083 (UNSPEC_BFCVTN): New UNSPEC.
18084 (UNSPEC_BFCVTN2): New UNSPEC.
18085 (UNSPEC_BFCVT): New UNSPEC.
18086 * config/arm/types.md (bf_cvt): New type.
18088 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
18090 * config/s390/s390.md ("tabort"): Get rid of two consecutive
18091 blanks in format string.
18093 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
18097 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
18098 * config/i386/i386.c (ix86_get_ssemov): New function.
18099 (ix86_output_ssemov): Likewise.
18100 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
18101 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
18103 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
18104 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
18105 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
18106 (*movti_internal): Likewise.
18107 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
18109 2020-03-05 Jeff Law <law@redhat.com>
18111 PR tree-optimization/91890
18112 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
18113 Use gimple_or_expr_nonartificial_location.
18114 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
18115 Use gimple_or_expr_nonartificial_location.
18116 * gimple.c (gimple_or_expr_nonartificial_location): New function.
18117 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
18118 * tree-ssa-strlen.c (maybe_warn_overflow): Use
18119 gimple_or_expr_nonartificial_location.
18120 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
18121 (maybe_warn_pointless_strcmp): Likewise.
18123 2020-03-05 Jakub Jelinek <jakub@redhat.com>
18126 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
18127 SRC and MASK arguments to __m128 from __m128d.
18128 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
18130 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
18132 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
18133 argument to __m128i from __m128d.
18134 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
18136 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
18137 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
18140 2020-03-05 Delia Burduv <delia.burduv@arm.com>
18142 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
18143 (vbfmlalbq_f32): New.
18144 (vbfmlaltq_f32): New.
18145 (vbfmlalbq_lane_f32): New.
18146 (vbfmlaltq_lane_f32): New.
18147 (vbfmlalbq_laneq_f32): New.
18148 (vbfmlaltq_laneq_f32): New.
18149 * config/arm/arm_neon_builtins.def (vmmla): New.
18154 (vfmab_laneq): New.
18155 (vfmat_laneq): New.
18156 * config/arm/iterators.md (BF_MA): New int iterator.
18157 (bt): New int attribute.
18158 (VQXBF): Copy of VQX with V8BF.
18159 * config/arm/neon.md (neon_vmmlav8bf): New insn.
18160 (neon_vfma<bt>v8bf): New insn.
18161 (neon_vfma<bt>_lanev8bf): New insn.
18162 (neon_vfma<bt>_laneqv8bf): New expand.
18163 (neon_vget_high<mode>): Changed iterator to VQXBF.
18164 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
18165 (UNSPEC_BFMAB): New UNSPEC.
18166 (UNSPEC_BFMAT): New UNSPEC.
18168 2020-03-05 Jakub Jelinek <jakub@redhat.com>
18170 PR middle-end/93399
18171 * tree-pretty-print.h (pretty_print_string): Declare.
18172 * tree-pretty-print.c (pretty_print_string): Remove forward
18173 declaration, no longer static. Change nbytes parameter type
18174 from unsigned to size_t.
18175 * print-rtl.c (print_value) <case CONST_STRING>: Use
18176 pretty_print_string and for shrink way too long strings.
18178 2020-03-05 Richard Biener <rguenther@suse.de>
18179 Jakub Jelinek <jakub@redhat.com>
18181 PR tree-optimization/93582
18182 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
18183 last operand as signed when looking for memset offset. Formatting
18186 2020-03-04 Andrew Pinski <apinski@marvell.com>
18189 * value-prof.c (dump_histogram_value): Use std::abs.
18191 2020-03-04 Martin Sebor <msebor@redhat.com>
18193 PR tree-optimization/93986
18194 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
18195 operands to the same precision widest_int to avoid ICEs.
18197 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
18200 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
18201 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
18202 for OPTION_MASK_ALTIVEC.
18204 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
18206 * config.gcc: Include the glibc-stdint.h header for zTPF.
18208 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
18210 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
18211 direct FPR-GPR copies.
18212 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
18215 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
18217 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
18218 operands to the prologue_tpf expander.
18219 (s390_emit_epilogue): Likewise.
18220 (s390_option_override_internal): Do error checking and setup for
18222 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
18223 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
18224 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
18225 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
18226 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
18227 operands for the check flag and the branch target.
18228 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
18229 ("mtpf-trace-hook-prologue-target")
18230 ("mtpf-trace-hook-epilogue-check")
18231 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
18233 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
18234 options are for debugging purposes and will not be documented
18237 2020-03-04 Jakub Jelinek <jakub@redhat.com>
18240 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
18242 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
18243 argument. Change pd argument so that it can be modified. Turn
18244 constant non-CONSTRUCTOR store into non-constant if it is too large.
18245 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
18247 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
18250 2020-02-04 Richard Biener <rguenther@suse.de>
18252 PR tree-optimization/93964
18253 * graphite-isl-ast-to-gimple.c
18254 (gcc_expression_from_isl_ast_expr_id): Add intermediate
18255 conversion for pointer to integer converts.
18256 * graphite-scop-detection.c (assign_parameter_index_in_region):
18259 2020-03-04 Martin Liska <mliska@suse.cz>
18263 * doc/invoke.texi: Clarify --help=language and --help=common
18266 2020-03-04 Jakub Jelinek <jakub@redhat.com>
18268 PR tree-optimization/94001
18269 * tree-tailcall.c (process_assignment): Before comparing op1 to
18270 *ass_var, verify *ass_var is non-NULL.
18272 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
18275 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
18278 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
18280 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
18281 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
18282 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
18283 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
18284 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
18285 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
18286 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
18287 (V_bf_low, V_bf_cvt_m): New mode attributes.
18288 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
18289 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
18290 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
18291 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
18292 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
18294 2020-03-03 Jakub Jelinek <jakub@redhat.com>
18296 PR tree-optimization/93582
18297 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
18298 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
18299 members, initialize them in the constructor and if mask is non-NULL,
18300 artificially push_partial_def {} for the portions of the mask that
18302 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
18303 val and return (void *)-1. Formatting fix.
18304 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
18306 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
18307 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
18309 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
18311 (visit_stmt): Formatting fix.
18313 2020-03-03 Richard Biener <rguenther@suse.de>
18315 PR tree-optimization/93946
18316 * alias.h (refs_same_for_tbaa_p): Declare.
18317 * alias.c (refs_same_for_tbaa_p): New function.
18318 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
18320 * tree-ssa-scopedtables.h
18321 (avail_exprs_stack::lookup_avail_expr): Add output argument
18322 giving access to the hashtable entry.
18323 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
18325 * tree-ssa-dom.c: Include alias.h.
18326 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
18327 removing redundant store.
18328 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
18329 (ao_ref_init_from_vn_reference): Adjust prototype.
18330 (vn_reference_lookup_pieces): Likewise.
18331 (vn_reference_insert_pieces): Likewise.
18332 * tree-ssa-sccvn.c: Track base alias set in addition to alias
18334 (eliminate_dom_walker::eliminate_stmt): Also check base alias
18335 set when removing redundant stores.
18336 (visit_reference_op_store): Likewise.
18337 * dse.c (record_store): Adjust valdity check for redundant
18340 2020-03-03 Jakub Jelinek <jakub@redhat.com>
18343 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
18345 PR rtl-optimization/94002
18346 * explow.c (plus_constant): Punt if cst has VOIDmode and
18347 get_pool_mode is different from mode.
18349 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
18351 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
18352 address has an offset which fits the scalling constraint for a
18353 load/store operation.
18354 (legitimate_scaled_address_p): Update use
18355 leigitimate_small_data_address_p.
18356 (arc_print_operand): Likewise.
18357 (arc_legitimate_address_p): Likewise.
18358 (legitimate_small_data_address_p): Likewise.
18360 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
18362 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
18363 (fnmasf4_fpu): Likewise.
18365 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
18367 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
18369 (subdi3): Likewise.
18370 (adddi3_i): Remove pattern.
18371 (subdi3_i): Likewise.
18373 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
18375 * config/arc/arc.md (eh_return): Add length info.
18377 2020-03-02 David Malcolm <dmalcolm@redhat.com>
18379 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
18381 2020-03-02 David Malcolm <dmalcolm@redhat.com>
18383 * doc/invoke.texi (Static Analyzer Options): Add
18384 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
18387 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
18390 * config/i386/i386.md (movstrict<mode>): Allow only
18391 registers with VALID_INT_MODE_P modes.
18393 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
18395 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
18396 (reduc_insn): Use 'U' and 'B' operand codes.
18397 (reduc_<reduc_op>_scal_<mode>): Allow all types.
18398 (reduc_<reduc_op>_scal_v64di): Delete.
18399 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
18400 (*plus_carry_dpp_shr_v64si): Change to ...
18401 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
18402 (mov_from_lane63_v64di): Change to ...
18403 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
18404 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
18405 Support UNSPEC_MOV_DPP_SHR output formats.
18406 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
18407 Add "use_extends" reductions.
18408 (print_operand_address): Add 'I' and 'U' codes.
18409 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
18411 2020-03-02 Martin Liska <mliska@suse.cz>
18413 * lto-wrapper.c: Fix typo in comment about
18414 C++ standard version.
18416 2020-03-01 Martin Sebor <msebor@redhat.com>
18419 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
18421 2020-03-01 Martin Sebor <msebor@redhat.com>
18423 PR middle-end/93829
18424 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
18425 of a pointer in the outermost ADDR_EXPRs.
18427 2020-02-28 Jeff Law <law@redhat.com>
18429 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
18430 * config/v850/v850.c (v850_asm_trampoline_template): Update
18433 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
18436 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
18439 2020-02-28 Martin Liska <mliska@suse.cz>
18442 * configure.ac: Improve detection of ld_date by requiring
18443 either two dashes or none.
18444 * configure: Regenerate.
18446 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
18448 PR rtl-optimization/93564
18449 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
18450 do not honor reg alloc order.
18452 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
18455 * config/aarch64/aarch64.c (aarch64_override_options): Fix
18456 misleading warning string.
18458 2020-02-27 Martin Sebor <msebor@redhat.com>
18460 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
18462 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
18465 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
18466 Split the insn into two parts. This insn only does variable
18467 extract from a register.
18468 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
18469 variable extract from memory.
18470 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
18471 only does variable extract from a register.
18472 (vsx_extract_v4sf_var_load): New insn, do variable extract from
18474 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
18475 into two parts. This insn only does variable extract from a
18477 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
18478 do variable extract from memory.
18480 2020-02-27 Martin Jambor <mjambor@suse.cz>
18481 Feng Xue <fxue@os.amperecomputing.com>
18484 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
18485 new function calls_same_node_or_its_all_contexts_clone_p.
18486 (cgraph_edge_brings_value_p): Use it.
18487 (cgraph_edge_brings_value_p): Likewise.
18488 (self_recursive_pass_through_p): Return false if caller is a clone.
18489 (self_recursive_agg_pass_through_p): Likewise.
18491 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
18493 PR middle-end/92152
18494 * alias.c (ends_tbaa_access_path_p): Break out from ...
18495 (component_uses_parent_alias_set_from): ... here.
18496 * alias.h (ends_tbaa_access_path_p): Declare.
18497 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
18498 handle trailing arrays past end of tbaa access path.
18499 (aliasing_component_refs_p): ... here; likewise.
18500 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
18501 path; disambiguate also past end of it.
18502 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
18505 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
18507 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
18508 beginning of the file.
18509 (vcreate_bf16, vcombine_bf16): New.
18510 (vdup_n_bf16, vdupq_n_bf16): New.
18511 (vdup_lane_bf16, vdup_laneq_bf16): New.
18512 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
18513 (vduph_lane_bf16, vduph_laneq_bf16): New.
18514 (vset_lane_bf16, vsetq_lane_bf16): New.
18515 (vget_lane_bf16, vgetq_lane_bf16): New.
18516 (vget_high_bf16, vget_low_bf16): New.
18517 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
18518 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
18519 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
18520 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
18521 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
18522 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
18523 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
18524 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
18525 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
18526 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
18527 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
18528 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
18529 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
18530 (vreinterpretq_bf16_p128): New.
18531 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
18532 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
18533 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
18534 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
18535 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
18536 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
18537 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
18538 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
18539 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
18540 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
18541 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
18542 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
18543 (vreinterpretq_p128_bf16): New.
18544 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
18545 (V_elem): Likewise.
18546 (V_elem_l): Likewise.
18547 (VD_LANE): Likewise.
18549 (V_DOUBLE): Likewise.
18550 (VDQX): Add V4BF and V8BF.
18551 (V_two_elem, V_three_elem, V_four_elem): Likewise.
18553 (V_HALF): Likewise.
18554 (V_double_vector_mode): Likewise.
18555 (V_cmp_result): Likewise.
18556 (V_uf_sclr): Likewise.
18557 (V_sz_elem): Likewise.
18558 (Is_d_reg): Likewise.
18559 (V_mode_nunits): Likewise.
18560 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
18562 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
18564 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
18565 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
18566 (<expander><mode>3<exec>): Likewise.
18567 (<expander><mode>3): New.
18568 (v<expander><mode>3): New.
18569 (<expander><mode>3): New.
18570 (<expander><mode>3<exec>): Rename to ...
18571 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
18572 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
18574 2020-02-27 Alexandre Oliva <oliva@adacore.com>
18576 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
18579 2020-02-27 Richard Biener <rguenther@suse.de>
18581 PR tree-optimization/93508
18582 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
18583 non-_CHK variants. Valueize their length arguments.
18585 2020-02-27 Richard Biener <rguenther@suse.de>
18587 PR tree-optimization/93953
18588 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
18589 to the hash-map entry.
18591 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
18593 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
18595 2020-02-27 Mark Williams <mwilliams@fb.com>
18597 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
18598 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
18599 -ffile-prefix-map and -fmacro-prefix-map.
18600 * lto-streamer-out.c: Include file-prefix-map.h.
18601 (lto_output_location): Remap the file part of locations.
18603 2020-02-27 Jakub Jelinek <jakub@redhat.com>
18606 * gimplify.c (gimplify_init_constructor): Don't promote readonly
18607 DECL_REGISTER variables to TREE_STATIC.
18609 PR tree-optimization/93582
18610 PR tree-optimization/93945
18611 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
18612 non-zero INTEGER_CST second argument and ref->offset or ref->size
18613 not a multiple of BITS_PER_UNIT.
18615 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
18617 * doc/install.texi (Binaries): Update description of BullFreeware.
18619 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
18623 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
18624 C++ Language Options, Warning Options, and Static Analyzer
18625 Options lists. Document negative form of options enabled by
18626 default. Move some things around to more accurately sort
18627 warnings by category.
18628 (C++ Dialect Options, Warning Options, Static Analyzer
18629 Options): Document negative form of options when enabled by
18630 default. Move some things around to more accurately sort
18631 warnings by category. Add some missing index entries.
18632 Light copy-editing.
18634 2020-02-26 Carl Love <cel@us.ibm.com>
18637 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
18638 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
18639 for the vector unsigned short arguments. It is also listed as the
18640 name of the built-in for arguments vector unsigned short,
18641 vector unsigned int and vector unsigned long long built-ins. The
18642 name of the builtins for these arguments should be:
18643 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
18644 __builtin_crypto_vpmsumd respectively.
18646 2020-02-26 Richard Biener <rguenther@suse.de>
18648 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
18649 and load permutation.
18651 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
18653 PR middle-end/93843
18654 * optabs-tree.c (supportable_convert_operation): Reject types with
18657 2020-02-26 David Malcolm <dmalcolm@redhat.com>
18659 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
18661 2020-02-26 Jakub Jelinek <jakub@redhat.com>
18663 PR tree-optimization/93820
18664 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
18665 argument to ALL_INTEGER_CST_P boolean.
18666 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
18667 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
18668 adjacent INTEGER_CST store into merged_store->only_constants like
18671 2020-02-25 Jakub Jelinek <jakub@redhat.com>
18674 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
18676 * cfghooks.c (verify_flow_info): Likewise.
18677 * predict.c (combine_predictions_for_bb): Likewise.
18678 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
18679 sucessor -> successor.
18680 (find_traces_1_round): Fix comment typo, destinarion -> destination.
18681 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
18683 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
18684 message typo, sucessors -> successors.
18686 2020-02-25 Martin Sebor <msebor@redhat.com>
18688 * doc/extend.texi (attribute access): Correct an example.
18690 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
18692 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
18694 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
18695 (VAR15, VAR16): New.
18696 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
18697 (VD): Enable for V4BF.
18699 (VQ): Enable for V8BF.
18701 (VQ_NO2E): Likewise.
18702 (VDBL, Vdbl): Add V4BF.
18703 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
18704 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
18705 (bfloat16x8x2_t): Likewise.
18706 (bfloat16x4x3_t): Likewise.
18707 (bfloat16x8x3_t): Likewise.
18708 (bfloat16x4x4_t): Likewise.
18709 (bfloat16x8x4_t): Likewise.
18710 (vcombine_bf16): New.
18711 (vld1_bf16, vld1_bf16_x2): New.
18712 (vld1_bf16_x3, vld1_bf16_x4): New.
18713 (vld1q_bf16, vld1q_bf16_x2): New.
18714 (vld1q_bf16_x3, vld1q_bf16_x4): New.
18715 (vld1_lane_bf16): New.
18716 (vld1q_lane_bf16): New.
18717 (vld1_dup_bf16): New.
18718 (vld1q_dup_bf16): New.
18721 (vld2_dup_bf16): New.
18722 (vld2q_dup_bf16): New.
18725 (vld3_dup_bf16): New.
18726 (vld3q_dup_bf16): New.
18729 (vld4_dup_bf16): New.
18730 (vld4q_dup_bf16): New.
18731 (vst1_bf16, vst1_bf16_x2): New.
18732 (vst1_bf16_x3, vst1_bf16_x4): New.
18733 (vst1q_bf16, vst1q_bf16_x2): New.
18734 (vst1q_bf16_x3, vst1q_bf16_x4): New.
18735 (vst1_lane_bf16): New.
18736 (vst1q_lane_bf16): New.
18744 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
18746 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
18747 (VALL_F16): Likewise.
18748 (VALLDI_F16): Likewise.
18750 (Vetype): Likewise.
18751 (vswap_width_name): Likewise.
18752 (VSWAP_WIDTH): Likewise.
18756 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
18757 (vget_lane_bf16, vgetq_lane_bf16): New.
18758 (vcreate_bf16): New.
18759 (vdup_n_bf16, vdupq_n_bf16): New.
18760 (vdup_lane_bf16, vdup_laneq_bf16): New.
18761 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
18762 (vduph_lane_bf16, vduph_laneq_bf16): New.
18763 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
18764 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
18765 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
18766 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
18767 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
18768 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
18769 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
18770 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
18771 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
18772 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
18773 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
18774 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
18775 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
18776 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
18777 (vreinterpretq_bf16_p128): New.
18778 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
18779 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
18780 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
18781 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
18782 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
18783 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
18784 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
18785 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
18786 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
18787 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
18788 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
18789 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
18790 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
18791 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
18792 (vreinterpretq_p128_bf16): New.
18794 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
18796 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
18797 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
18798 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
18799 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
18800 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
18801 * config/arm/iterators.md (VSF2BF): New attribute.
18802 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
18803 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
18804 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
18806 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
18808 * config/arm/arm.md (required_for_purecode): New attribute.
18809 (enabled): Handle required_for_purecode.
18810 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
18811 work with -mpure-code.
18813 2020-02-25 Jakub Jelinek <jakub@redhat.com>
18815 PR rtl-optimization/93908
18816 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
18819 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
18821 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
18823 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
18825 * doc/install.texi (--enable-checking): Adjust wording.
18827 2020-02-25 Richard Biener <rguenther@suse.de>
18829 PR tree-optimization/93868
18830 * tree-vect-slp.c (slp_copy_subtree): New function.
18831 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
18832 re-arranging stmts in it.
18834 2020-02-25 Jakub Jelinek <jakub@redhat.com>
18836 PR middle-end/93874
18837 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
18838 dummy function and remove it at the end.
18840 PR translation/93864
18841 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
18842 paramter -> parameter.
18843 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
18844 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
18846 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
18848 * doc/install.texi (--enable-checking): Properly document current
18850 (--enable-stage1-checking): Minor clarification about bootstrap.
18852 2020-02-24 David Malcolm <dmalcolm@redhat.com>
18855 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
18856 -fanalyzer-checker=taint is also required.
18857 (-fanalyzer-checker=): Note that providing this option enables the
18858 given checker, and doing so may be required for checkers that are
18859 disabled by default.
18861 2020-02-24 David Malcolm <dmalcolm@redhat.com>
18863 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
18864 significant control flow events; add a "3" which shows all
18865 control flow events; the old "3" becomes "4".
18867 2020-02-24 Jakub Jelinek <jakub@redhat.com>
18869 PR tree-optimization/93582
18870 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
18871 pd.offset and pd.size to be counted in bits rather than bytes, add
18872 support for maxsizei that is not a multiple of BITS_PER_UNIT and
18873 handle bitfield stores and loads.
18874 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
18875 uncomparable quantities - bytes vs. bits. Allow push_partial_def
18876 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
18877 pd.offset/pd.size to be counted in bits rather than bytes.
18878 Formatting fix. Rename shadowed len variable to buflen.
18880 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
18881 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
18884 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
18885 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
18886 * opts-common.c (parse_options_from_collect_gcc_options): New function.
18887 (prepend_xassembler_to_collect_as_options): Likewise.
18888 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
18889 (prepend_xassembler_to_collect_as_options): Likewise.
18890 * lto-opts.c (lto_write_options): Stream assembler options
18891 in COLLECT_AS_OPTIONS.
18892 * lto-wrapper.c (xassembler_options_error): New static variable.
18893 (get_options_from_collect_gcc_options): Move parsing options code to
18894 parse_options_from_collect_gcc_options and call it.
18895 (merge_and_complain): Validate -Xassembler options.
18896 (append_compiler_options): Handle OPT_Xassembler.
18897 (run_gcc): Append command line -Xassembler options to
18898 collect_gcc_options.
18899 * doc/invoke.texi: Add documentation about using Xassembler
18902 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
18904 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
18906 (riscv_rtx_costs): Update cost model for LTGT.
18908 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
18910 PR rtl-optimization/93564
18911 * ira-color.c (struct update_cost_queue_elem): New member start.
18912 (queue_update_cost, get_next_update_cost): Add new arg start.
18913 (allocnos_conflict_p): New function.
18914 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
18915 Add checking conflicts with allocnos_conflict_p.
18916 (update_costs_from_prefs, restore_costs_from_copies): Adjust
18917 update_costs_from_allocno calls.
18918 (update_conflict_hard_regno_costs): Add checking conflicts with
18919 allocnos_conflict_p. Adjust calls of queue_update_cost and
18920 get_next_update_cost.
18921 (assign_hard_reg): Adjust calls of queue_update_cost. Add
18923 (bucket_allocno_compare_func): Restore previous version.
18925 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
18927 * config/pa/pa.c (pa_function_value): Fix check for word and
18928 double-word size when handling aggregate return values.
18929 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
18930 that homogeneous SFmode and DFmode aggregates are passed and returned
18931 in general registers.
18933 2020-02-21 Jakub Jelinek <jakub@redhat.com>
18935 PR translation/93759
18936 * opts.c (print_filtered_help): Translate help before appending
18937 messages to it rather than after that.
18939 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
18941 PR rtl-optimization/PR92989
18942 * lra-lives.c (process_bb_lives): Restore the original order
18943 of the bb liveness update. Call make_hard_regno_dead for each
18944 register clobbered at the start of an EH receiver.
18946 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
18949 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
18950 self-recursively generated.
18952 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
18955 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
18958 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
18960 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
18961 Document new target supports option.
18963 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
18965 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
18966 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
18967 * config/arm/iterators.md (MATMUL): New iterator.
18968 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
18969 (mmla_sfx): New attribute.
18970 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
18971 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
18972 (UNSPEC_MATMUL_US): New.
18974 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18976 * config/arm/arm.md: Prevent scalar shifts from being used when big
18979 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
18980 Richard Biener <rguenther@suse.de>
18982 PR tree-optimization/93586
18983 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
18984 after mismatched array refs; do not sure type size information to
18985 recover from unmatched referneces with !flag_strict_aliasing_p.
18987 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
18989 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
18990 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
18991 (scatter_store<mode>): Rename to ...
18992 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
18993 (scatter<mode>_exec): Delete. Move contents ...
18994 (mask_scatter_store<mode>): ... here, and rename that to ...
18995 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
18996 Remove mode conversion.
18997 (mask_gather_load<mode>): Rename to ...
18998 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
18999 Remove mode conversion.
19000 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
19002 2020-02-21 Martin Jambor <mjambor@suse.cz>
19004 PR tree-optimization/93845
19005 * tree-sra.c (verify_sra_access_forest): Only test access size of
19008 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
19010 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
19011 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
19012 (addv64di3_exec): Likewise.
19013 (subv64di3): Likewise.
19014 (subv64di3_exec): Likewise.
19015 (addv64di3_zext): Likewise.
19016 (addv64di3_zext_exec): Likewise.
19017 (addv64di3_zext_dup): Likewise.
19018 (addv64di3_zext_dup_exec): Likewise.
19019 (addv64di3_zext_dup2): Likewise.
19020 (addv64di3_zext_dup2_exec): Likewise.
19021 (addv64di3_sext_dup2): Likewise.
19022 (addv64di3_sext_dup2_exec): Likewise.
19023 (<expander>v64di3): Likewise.
19024 (<expander>v64di3_exec): Likewise.
19025 (*<reduc_op>_dpp_shr_v64di): Likewise.
19026 (*plus_carry_dpp_shr_v64di): Likewise.
19027 * config/gcn/gcn.md (adddi3): Likewise.
19028 (addptrdi3): Likewise.
19029 (<expander>di3): Likewise.
19031 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
19033 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
19035 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
19037 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
19038 support. Use aarch64_emit_mult instead of emitting multiplication
19039 instructions directly.
19040 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
19041 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
19043 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
19045 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
19046 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
19047 instead of emitting multiplication instructions directly.
19048 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
19049 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
19050 (@aarch64_frecps<mode>): New expanders.
19052 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
19054 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
19055 on and produce uint64_ts rather than ints.
19056 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
19057 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
19059 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
19061 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
19062 an unused xmsk register when handling approximate rsqrt.
19064 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
19066 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
19067 flag_finite_math_only condition.
19069 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
19072 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
19073 to destination operand for shufps alternative.
19074 (*vec_extractv2si_1): Ditto.
19076 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
19079 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
19082 2020-02-20 Martin Liska <mliska@suse.cz>
19084 PR translation/93831
19085 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
19087 2020-02-20 Martin Liska <mliska@suse.cz>
19089 PR translation/93830
19090 * common/config/avr/avr-common.c: Remote trailing "|".
19092 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
19094 * collect2.c (maybe_run_lto_and_relink): Fix typo in
19097 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
19099 PR tree-optimization/93767
19100 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
19101 access-size bias from the offset calculations for negative strides.
19103 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
19105 * collect2.c (c_file, o_file): Make const again.
19106 (ldout,lderrout, dump_ld_file): Remove.
19107 (tool_cleanup): Avoid calling not signal-safe functions.
19108 (maybe_run_lto_and_relink): Avoid possible signal handler
19109 access to unintialzed memory (lto_o_files).
19110 (main): Avoid leaking temp files in $TMPDIR.
19111 Initialize c_file/o_file with concat, which avoids exposing
19112 uninitialized memory to signal handler, which calls unlink(!).
19113 Avoid calling maybe_unlink when the main function returns,
19114 since the atexit handler is already doing this.
19115 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
19117 2020-02-19 Martin Jambor <mjambor@suse.cz>
19119 PR tree-optimization/93776
19120 * tree-sra.c (create_access): Do not create zero size accesses.
19121 (get_access_for_expr): Do not search for zero sized accesses.
19123 2020-02-19 Martin Jambor <mjambor@suse.cz>
19125 PR tree-optimization/93667
19126 * tree-sra.c (scalarizable_type_p): Return false if record fields
19127 do not follow wach other.
19129 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
19131 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
19132 rather than fmv.x.s/fmv.s.x.
19134 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
19136 * config/aarch64/aarch64-simd-builtins.def
19137 (intrinsic_vec_smult_lo_): New.
19138 (intrinsic_vec_umult_lo_): Likewise.
19139 (vec_widen_smult_hi_): Likewise.
19140 (vec_widen_umult_hi_): Likewise.
19141 * config/aarch64/aarch64-simd.md
19142 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
19143 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
19144 (vmull_high_s16): Likewise.
19145 (vmull_high_s32): Likewise.
19146 (vmull_high_u8): Likewise.
19147 (vmull_high_u16): Likewise.
19148 (vmull_high_u32): Likewise.
19149 (vmull_s8): Likewise.
19150 (vmull_s16): Likewise.
19151 (vmull_s32): Likewise.
19152 (vmull_u8): Likewise.
19153 (vmull_u16): Likewise.
19154 (vmull_u32): Likewise.
19156 2020-02-18 Martin Liska <mliska@suse.cz>
19158 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
19159 bootstrap by missing removal of invalid sanity check.
19161 2020-02-18 Martin Liska <mliska@suse.cz>
19164 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
19165 Always compare LHS of gimple_assign.
19167 2020-02-18 Martin Liska <mliska@suse.cz>
19170 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
19171 and return type of functions.
19172 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
19173 Drop MALLOC attribute for void functions.
19174 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
19175 malloc_state for a new VOID clone.
19177 2020-02-18 Martin Liska <mliska@suse.cz>
19180 * common.opt: Add -fprofile-reproducibility.
19181 * doc/invoke.texi: Document it.
19182 * value-prof.c (dump_histogram_value):
19183 Document and support behavior for counters[0]
19184 being a negative value.
19185 (get_nth_most_common_value): Handle negative
19186 counters[0] in respect to flag_profile_reproducible.
19188 2020-02-18 Jakub Jelinek <jakub@redhat.com>
19191 * cgraph.c (verify_speculative_call): Use speculative_id instead of
19192 speculative_uid in messages. Remove trailing whitespace from error
19193 message. Use num_speculative_call_targets instead of
19194 num_speculative_targets in a message.
19195 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
19196 edge messages and stmt instead of cal_stmt in reference message.
19198 PR tree-optimization/93780
19199 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
19200 before calling build_vector_type.
19201 (execute_update_addresses_taken): Likewise.
19204 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
19205 typo, functoin -> function.
19206 * tree.c (free_lang_data_in_decl): Fix comment typo,
19207 functoin -> function.
19208 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
19210 2020-02-17 David Malcolm <dmalcolm@redhat.com>
19212 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
19214 (print_option_information): Don't call get_option_url if URLs
19217 2020-02-17 Alexandre Oliva <oliva@adacore.com>
19219 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
19220 handling of register_common-less targets.
19222 2020-02-17 Martin Liska <mliska@suse.cz>
19225 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
19227 2020-02-17 Martin Liska <mliska@suse.cz>
19229 PR translation/93755
19230 * config/rs6000/rs6000.c (rs6000_option_override_internal):
19233 2020-02-17 Martin Liska <mliska@suse.cz>
19236 * config/rx/elf.opt: Fix typo.
19238 2020-02-17 Richard Biener <rguenther@suse.de>
19241 * opts-global.c (print_ignored_options): Use inform and
19244 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
19247 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
19249 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
19252 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
19253 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
19255 2020-02-15 Jason Merrill <jason@redhat.com>
19257 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
19259 2020-02-15 Jakub Jelinek <jakub@redhat.com>
19261 PR tree-optimization/93744
19262 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
19263 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
19264 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
19265 sure @2 in the first and @1 in the other patterns has no side-effects.
19267 2020-02-15 David Malcolm <dmalcolm@redhat.com>
19268 Bernd Edlinger <bernd.edlinger@hotmail.de>
19272 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
19273 * configure.ac (--with-diagnostics-urls): New configuration
19274 option, based on --with-diagnostics-color.
19275 (DIAGNOSTICS_URLS_DEFAULT): New define.
19276 * config.h: Regenerate.
19277 * configure: Regenerate.
19278 * diagnostic.c (diagnostic_urls_init): Handle -1 for
19279 DIAGNOSTICS_URLS_DEFAULT from configure-time
19280 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
19281 and TERM_URLS environment variable.
19282 * diagnostic-url.h (diagnostic_url_format): New enum type.
19283 (diagnostic_urls_enabled_p): rename to...
19284 (determine_url_format): ... this, and change return type.
19285 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
19286 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
19287 the linux console, and mingw.
19288 (diagnostic_urls_enabled_p): rename to...
19289 (determine_url_format): ... this, and adjust.
19290 * pretty-print.h (pretty_printer::show_urls): rename to...
19291 (pretty_printer::url_format): ... this, and change to enum.
19292 * pretty-print.c (pretty_printer::pretty_printer,
19293 pp_begin_url, pp_end_url, test_urls): Adjust.
19294 * doc/install.texi (--with-diagnostics-urls): Document the new
19295 configuration option.
19296 (--with-diagnostics-color): Document the existing interaction
19297 with GCC_COLORS better.
19298 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
19299 vindex reference. Update description of defaults based on the above.
19300 (-fdiagnostics-color): Update description of how -fdiagnostics-color
19301 interacts with GCC_COLORS.
19303 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
19306 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
19307 conjunction with TARGET_GNU_TLS in early return.
19309 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
19311 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
19312 the mode is not wider than UNITS_PER_WORD.
19314 2020-02-14 Martin Jambor <mjambor@suse.cz>
19316 PR tree-optimization/93516
19317 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
19318 access of the same type as the parent.
19319 (propagate_subaccesses_from_lhs): Likewise.
19321 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
19324 * config/i386/avx512vbmi2intrin.h
19325 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
19326 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
19327 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
19328 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
19329 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
19330 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
19331 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
19332 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
19333 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
19334 of lacking a closing parenthesis.
19335 * config/i386/avx512vbmi2vlintrin.h
19336 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
19337 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
19338 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
19339 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
19340 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
19341 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
19342 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
19343 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
19344 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
19345 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
19346 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
19347 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
19348 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
19349 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
19350 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
19351 _mm_shldi_epi32, _mm_mask_shldi_epi32,
19352 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
19353 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
19355 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
19358 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
19359 the target function entry.
19361 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
19363 * common/config/arc/arc-common.c (arc_option_optimization_table):
19364 Disable if-conversion step when optimized for size.
19366 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
19368 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
19369 R12-R15 are always in ARCOMPACT16_REGS register class.
19370 * config/arc/arc.opt (mq-class): Deprecate.
19371 * config/arc/constraint.md ("q"): Remove dependency on mq-class
19373 * doc/invoke.texi (mq-class): Update text.
19374 * common/config/arc/arc-common.c (arc_option_optimization_table):
19377 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
19379 * config/arc/arc.c (arc_insn_cost): New function.
19380 (TARGET_INSN_COST): Define.
19381 * config/arc/arc.md (cost): New attribute.
19382 (add_n): Use arc_nonmemory_operand.
19383 (ashlsi3_insn): Likewise, also update constraints.
19384 (ashrsi3_insn): Likewise.
19385 (rotrsi3): Likewise.
19386 (add_shift): Likewise.
19387 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
19389 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
19391 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
19393 (umulsidi_600): Likewise.
19395 2020-02-13 Jakub Jelinek <jakub@redhat.com>
19398 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
19399 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
19400 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
19401 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
19402 pass __A to the builtin followed by __W instead of __A followed by
19404 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
19405 _mm512_mask_popcnt_epi64): Likewise.
19406 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
19407 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
19408 _mm256_mask_popcnt_epi64): Likewise.
19410 PR tree-optimization/93582
19411 * fold-const.h (shift_bytes_in_array_left,
19412 shift_bytes_in_array_right): Declare.
19413 * fold-const.c (shift_bytes_in_array_left,
19414 shift_bytes_in_array_right): New function, moved from
19415 gimple-ssa-store-merging.c, no longer static.
19416 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
19417 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
19418 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
19419 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
19420 shift_bytes_in_array.
19421 (verify_shift_bytes_in_array): Rename to ...
19422 (verify_shift_bytes_in_array_left): ... this. Use
19423 shift_bytes_in_array_left instead of shift_bytes_in_array.
19424 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
19425 instead of verify_shift_bytes_in_array.
19426 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
19427 / native_interpret_expr where the store covers all needed bits,
19428 punt on PDP-endian, otherwise allow all involved offsets and sizes
19429 not to be byte-aligned.
19432 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
19433 use const_0_to_255_operand predicate instead of immediate_operand.
19434 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
19435 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
19436 vgf2p8affineinvqb_<mode><mask_name>,
19437 vgf2p8affineqb_<mode><mask_name>): Drop mode from
19438 const_0_to_255_operand predicated operands.
19440 2020-02-12 Jeff Law <law@redhat.com>
19442 * config/h8300/h8300.md (comparison shortening peepholes): Use
19443 a mode iterator to merge the HImode and SImode peepholes.
19445 2020-02-12 Jakub Jelinek <jakub@redhat.com>
19447 PR middle-end/93663
19448 * real.c (is_even): Make static. Function comment fix.
19449 (is_halfway_below): Make static, don't assert R is not inf/nan,
19450 instead return false for those. Small formatting fixes.
19452 2020-02-12 Martin Sebor <msebor@redhat.com>
19454 PR middle-end/93646
19455 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
19456 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
19457 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
19458 (strlen_check_and_optimize_call): Adjust callee name.
19460 2020-02-12 Jeff Law <law@redhat.com>
19462 * config/h8300/h8300.md (comparison shortening peepholes): Drop
19463 (and (xor)) variant. Combine other two into single peephole.
19465 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
19467 PR rtl-optimization/93565
19468 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
19470 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
19472 * config/aarch64/aarch64-simd.md
19473 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
19474 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
19475 generating separate ADDV and zero_extend patterns.
19476 * config/aarch64/iterators.md (VDQV_E): New iterator.
19478 2020-02-12 Jeff Law <law@redhat.com>
19480 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
19481 expanders, splits, etc.
19482 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
19483 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
19484 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
19485 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
19486 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
19487 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
19488 function prototype.
19489 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
19491 2020-02-12 Jakub Jelinek <jakub@redhat.com>
19494 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
19495 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
19496 TARGET_AVX512DQ from condition.
19497 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
19498 instead of <mask_mode512bit_condition> in condition. If
19499 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
19501 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
19504 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
19507 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
19509 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
19511 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
19512 where strlen is more legible.
19513 (rs6000_builtin_vectorized_libmass): Ditto.
19514 (rs6000_print_options_internal): Ditto.
19516 2020-02-11 Martin Sebor <msebor@redhat.com>
19518 PR tree-optimization/93683
19519 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
19521 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
19523 * config/rs6000/predicates.md (cint34_operand): Rename the
19524 -mprefixed-addr option to be -mprefixed.
19525 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
19526 the -mprefixed-addr option to be -mprefixed.
19527 (OTHER_FUTURE_MASKS): Likewise.
19528 (POWERPC_MASKS): Likewise.
19529 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
19530 the -mprefixed-addr option to be -mprefixed. Change error
19531 messages to refer to -mprefixed.
19532 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
19534 (rs6000_legitimate_offset_address_p): Likewise.
19535 (rs6000_mode_dependent_address): Likewise.
19536 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
19537 "-mprefixed" for target attributes and pragmas.
19538 (address_to_insn_form): Rename the -mprefixed-addr option to be
19540 (rs6000_adjust_insn_length): Likewise.
19541 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
19542 -mprefixed-addr option to be -mprefixed.
19543 (ASM_OUTPUT_OPCODE): Likewise.
19544 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
19545 -mprefixed-addr option to be -mprefixed.
19546 * config/rs6000/rs6000.opt (-mprefixed): Rename the
19547 -mprefixed-addr option to be prefixed. Change the option from
19548 being undocumented to being documented.
19549 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
19550 -mprefixed option. Update the -mpcrel documentation to mention
19553 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
19555 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
19556 including FIRST_PSEUDO_REGISTER - 1.
19557 * ira-color.c (print_hard_reg_set): Ditto.
19559 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19561 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
19562 (USTERNOP_QUALIFIERS): New define.
19563 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
19564 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
19565 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
19566 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
19567 * config/arm/arm_neon.h (vusdot_s32): New.
19568 (vusdot_lane_s32): New.
19569 (vusdotq_lane_s32): New.
19570 (vsudot_lane_s32): New.
19571 (vsudotq_lane_s32): New.
19572 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
19573 * config/arm/iterators.md (DOTPROD_I8MM): New.
19574 (sup, opsuffix): Add <us/su>.
19575 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
19576 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
19578 2020-02-11 Richard Biener <rguenther@suse.de>
19580 PR tree-optimization/93661
19581 PR tree-optimization/93662
19582 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
19583 tree_to_poly_int64.
19584 * tree-sra.c (get_access_for_expr): Likewise.
19586 2020-02-10 Jakub Jelinek <jakub@redhat.com>
19589 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
19590 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
19591 Change condition from TARGET_AVX2 to TARGET_AVX.
19593 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
19596 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
19597 argument of strncmp.
19599 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
19601 Try to generate zero-based comparisons.
19602 * config/cris/cris.c (cris_reduce_compare): New function.
19603 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
19604 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
19605 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
19607 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
19610 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
19611 in Thumb state and also as a destination in Arm state. Add T16
19614 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
19616 * md.texi (Define Subst): Match closing paren in example.
19618 2020-02-10 Jakub Jelinek <jakub@redhat.com>
19622 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
19623 arguments of strncmp.
19625 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
19628 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
19629 but different source value.
19630 (adjust_callers_for_value_intersection): New function.
19631 (gather_edges_for_value): Adjust order of callers to let a
19632 non-self-recursive caller be the first element.
19633 (self_recursive_pass_through_p): Add a new parameter "simple", and
19634 check generalized self-recursive pass-through jump function.
19635 (self_recursive_agg_pass_through_p): Likewise.
19636 (find_more_scalar_values_for_callers_subset): Compute value from
19637 pass-through jump function for self-recursive.
19638 (intersect_with_plats): Cleanup previous implementation code for value
19639 itersection with self-recursive call edge.
19640 (intersect_with_agg_replacements): Likewise.
19641 (intersect_aggregates_with_edge): Deduce value from pass-through jump
19642 function for self-recursive call edge. Cleanup previous implementation
19643 code for value intersection with self-recursive call edge.
19644 (decide_whether_version_node): Remove dead callers and adjust order
19645 to let a non-self-recursive caller be the first element.
19647 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
19649 * recog.c: Move pass_split_before_sched2 code in front of
19650 pass_split_before_regstack.
19651 (pass_data_split_before_sched2): Rename pass to split3 from split4.
19652 (pass_data_split_before_regstack): Rename pass to split4 from split3.
19653 (rest_of_handle_split_before_sched2): Remove.
19654 (pass_split_before_sched2::execute): Unconditionally call
19656 (enable_split_before_sched2): New function.
19657 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
19658 (pass_split_before_regstack::gate): Ditto.
19659 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
19660 Update name check for renamed split4 pass.
19661 * config/sh/sh.c (register_sh_passes): Update pass insertion
19662 point for renamed split4 pass.
19664 2020-02-09 Jakub Jelinek <jakub@redhat.com>
19666 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
19667 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
19668 copying them around between host and target.
19670 2020-02-08 Andrew Pinski <apinski@marvell.com>
19673 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
19674 STRICT_ALIGNMENT also.
19676 2020-02-08 Jim Wilson <jimw@sifive.com>
19679 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
19681 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
19682 Jakub Jelinek <jakub@redhat.com>
19685 * config/i386/i386.h (CALL_USED_REGISTERS): Make
19686 xmm16-xmm31 call-used even in 64-bit ms-abi.
19688 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
19690 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
19691 (simd_ummla, simd_usmmla): Likewise.
19692 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
19693 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
19694 (vusmmlaq_s32): New.
19696 2020-02-07 Richard Biener <rguenther@suse.de>
19698 PR middle-end/93519
19699 * tree-inline.c (fold_marked_statements): Do a PRE walk,
19700 skipping unreachable regions.
19701 (optimize_inline_calls): Skip folding stmts when we didn't
19704 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
19707 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
19708 Don't return aggregates with only SFmode and DFmode in SSE
19710 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
19712 2020-02-07 Jakub Jelinek <jakub@redhat.com>
19715 * config/rs6000/rs6000-logue.c
19716 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
19717 if it fails, move rs into end_addr and retry. Add
19718 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
19719 the insn pattern doesn't describe well what exactly happens to
19723 * config/i386/predicates.md (avx_identity_operand): Remove.
19724 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
19725 (avx_<castmode><avxsizesuffix>_<castmode>,
19726 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
19727 a VEC_CONCAT of the operand and UNSPEC_CAST.
19728 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
19729 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
19733 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
19734 recog_data.insn if distance_non_agu_define changed it.
19736 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
19739 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
19740 we only had X-FORM (reg+reg) addressing for vectors. Also before
19741 ISA 3.0, we only had X-FORM addressing for scalars in the
19742 traditional Altivec registers.
19744 2020-02-06 <zhongyunde@huawei.com>
19745 Vladimir Makarov <vmakarov@redhat.com>
19747 PR rtl-optimization/93561
19748 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
19749 hard register range.
19751 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
19753 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
19756 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
19758 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
19759 where the low and the high 32 bits are equal to each other specially,
19760 with an rldimi instruction.
19762 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
19764 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
19766 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
19768 * config/arm/arm-tables.opt: Regenerate.
19770 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
19773 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
19774 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
19775 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
19777 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
19779 PR rtl-optimization/87763
19780 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
19782 2020-02-06 Delia Burduv <delia.burduv@arm.com>
19784 * config/aarch64/aarch64-simd-builtins.def
19785 (bfmlaq): New built-in function.
19786 (bfmlalb): New built-in function.
19787 (bfmlalt): New built-in function.
19788 (bfmlalb_lane): New built-in function.
19789 (bfmlalt_lane): New built-in function.
19790 * config/aarch64/aarch64-simd.md
19791 (aarch64_bfmmlaqv4sf): New pattern.
19792 (aarch64_bfmlal<bt>v4sf): New pattern.
19793 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
19794 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
19795 (vbfmlalbq_f32): New intrinsic.
19796 (vbfmlaltq_f32): New intrinsic.
19797 (vbfmlalbq_lane_f32): New intrinsic.
19798 (vbfmlaltq_lane_f32): New intrinsic.
19799 (vbfmlalbq_laneq_f32): New intrinsic.
19800 (vbfmlaltq_laneq_f32): New intrinsic.
19801 * config/aarch64/iterators.md (BF_MLA): New int iterator.
19802 (bt): New int attribute.
19804 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
19806 * config/i386/i386.md (*pushtf): Emit "#" instead of
19807 calling gcc_unreachable in insn output.
19810 (*pushsf_rex64): Ditto for alternatives other than 1.
19811 (*pushsf): Ditto for alternatives other than 1.
19813 2020-02-06 Martin Liska <mliska@suse.cz>
19815 PR gcov-profile/91971
19816 PR gcov-profile/93466
19817 * coverage.c (coverage_init): Revert mangling of
19818 path into filename. It can lead to huge filename length.
19819 Creation of subfolders seem more natural.
19821 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19824 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
19825 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
19826 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
19828 2020-02-06 Jakub Jelinek <jakub@redhat.com>
19831 * config/i386/predicates.md (avx_identity_operand): New predicate.
19832 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
19833 define_insn_and_split.
19836 * omp-low.c (use_pointer_for_field): For nested constructs, also
19837 look for map clauses on target construct.
19838 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
19839 taskreg_nesting_level.
19842 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
19843 shared clause, call omp_notice_variable on outer context if any.
19845 2020-02-05 Jason Merrill <jason@redhat.com>
19848 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
19849 non-zero address even if weak and not yet defined.
19851 2020-02-05 Martin Sebor <msebor@redhat.com>
19853 PR tree-optimization/92765
19854 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
19855 * tree-ssa-strlen.c (compute_string_length): Remove.
19856 (determine_min_objsize): Remove.
19857 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
19858 Avoid using type size as the upper bound on string length.
19859 (handle_builtin_string_cmp): Add an argument. Adjust.
19860 (strlen_check_and_optimize_call): Pass additional argument to
19861 handle_builtin_string_cmp.
19863 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
19865 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
19866 (*pushdi2_rex64 peephole2): Unconditionally split after
19867 epilogue_completed.
19868 (*ashl<mode>3_doubleword): Ditto.
19869 (*<shift_insn><mode>3_doubleword): Ditto.
19871 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
19874 * config/rs6000/rs6000.c (get_vector_offset): Fix
19876 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
19878 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
19880 2020-02-05 David Malcolm <dmalcolm@redhat.com>
19882 * doc/analyzer.texi
19883 (Special Functions for Debugging the Analyzer): Update description
19884 of __analyzer_dump_exploded_nodes.
19886 2020-02-05 Jakub Jelinek <jakub@redhat.com>
19889 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
19890 include sets and not clobbers in the vzeroupper pattern.
19891 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
19892 the parallel has 17 (64-bit) or 9 (32-bit) elts.
19893 (*avx_vzeroupper_1): New define_insn_and_split.
19896 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
19897 don't run when !optimize.
19898 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
19901 2020-02-05 Richard Biener <rguenther@suse.de>
19903 PR middle-end/90648
19904 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
19905 checks before matching calls.
19907 2020-02-05 Jakub Jelinek <jakub@redhat.com>
19909 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
19910 function comment typo.
19912 PR middle-end/93555
19913 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
19914 simd_clone_create failed when i == 0, adjust clone->nargs by
19917 2020-02-05 Martin Liska <mliska@suse.cz>
19920 * doc/invoke.texi: Document that one should
19921 not combine ASLR and -fpch.
19923 2020-02-04 Richard Biener <rguenther@suse.de>
19925 PR tree-optimization/93538
19926 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
19928 2020-02-04 Richard Biener <rguenther@suse.de>
19930 PR tree-optimization/91123
19931 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
19932 (vn_walk_cb_data::last_vuse): New member.
19933 (vn_walk_cb_data::saved_operands): Likewsie.
19934 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
19935 (vn_walk_cb_data::push_partial_def): Use finish.
19936 (vn_reference_lookup_2): Update last_vuse and use finish if
19937 we've saved operands.
19938 (vn_reference_lookup_3): Use finish and update calls to
19939 push_partial_defs everywhere. When translating through
19940 memcpy or aggregate copies save off operands and alias-set.
19941 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
19942 operation for redundant store removal.
19944 2020-02-04 Richard Biener <rguenther@suse.de>
19946 PR tree-optimization/92819
19947 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
19948 generating more stmts than before.
19950 2020-02-04 Martin Liska <mliska@suse.cz>
19952 * config/arm/arm.c (arm_gen_far_branch): Move the function
19953 outside of selftests.
19955 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
19957 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
19958 function to adjust PC-relative vector addresses.
19959 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
19960 handle vectors with PC-relative addresses.
19962 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
19964 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
19966 (hard_reg_and_mode_to_addr_mask): Delete.
19967 (rs6000_adjust_vec_address): If the original vector address
19968 was REG+REG or REG+OFFSET and the element is not zero, do the add
19969 of the elements in the original address before adding the offset
19970 for the vector element. Use address_to_insn_form to validate the
19971 address using the register being loaded, rather than guessing
19972 whether the address is a DS-FORM or DQ-FORM address.
19974 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
19976 * config/rs6000/rs6000.c (get_vector_offset): New helper function
19977 to calculate the offset in memory from the start of a vector of a
19978 particular element. Add code to keep the element number in
19979 bounds if the element number is variable.
19980 (rs6000_adjust_vec_address): Move calculation of offset of the
19981 vector element to get_vector_offset.
19982 (rs6000_split_vec_extract_var): Do not do the initial AND of
19983 element here, move the code to get_vector_offset.
19985 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
19987 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
19990 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
19992 * config/rs6000/constraints.md: Improve documentation.
19994 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
19997 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
19998 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
20000 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
20002 * config.gcc: Remove "carrizo" support.
20003 * config/gcn/gcn-opts.h (processor_type): Likewise.
20004 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
20005 * config/gcn/gcn.opt (gpu_type): Likewise.
20006 * config/gcn/t-omp-device: Likewise.
20008 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
20011 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
20012 * config/arm/arm.c (arm_gen_far_branch): New function
20013 arm_gen_far_branch.
20014 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
20016 2020-02-03 Julian Brown <julian@codesourcery.com>
20017 Tobias Burnus <tobias@codesourcery.com>
20019 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
20021 2020-02-03 Jakub Jelinek <jakub@redhat.com>
20024 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
20025 valid RTL to sum up the lowest and second lowest bytes of the popcnt
20028 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
20030 PR rtl-optimization/91333
20031 * ira-color.c (struct allocno_color_data): Add member
20033 (init_allocno_threads): Set the member up.
20034 (bucket_allocno_compare_func): Add compare hard reg
20037 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
20039 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
20041 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
20042 * config.in: Regenerated.
20043 * configure: Regenerated.
20044 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
20045 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
20046 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
20048 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
20050 * configure: Regenerate.
20052 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
20054 PR rtl-optimization/91333
20055 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
20056 reg preferences comparison up.
20058 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
20060 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
20061 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
20062 aarch64-sve-builtins-base.h.
20063 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
20064 aarch64-sve-builtins-base.cc.
20065 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
20066 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
20067 (svcvtnt): Declare.
20068 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
20069 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
20070 (svcvtnt): New functions.
20071 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
20072 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
20073 (svcvtnt): New functions.
20074 (svcvt): Add a form that converts f32 to bf16.
20075 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
20076 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
20078 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
20079 Treat B as bfloat16_t.
20080 (ternary_bfloat_lane_base): New class.
20081 (ternary_bfloat_def): Likewise.
20082 (ternary_bfloat): New shape.
20083 (ternary_bfloat_lane_def): New class.
20084 (ternary_bfloat_lane): New shape.
20085 (ternary_bfloat_lanex2_def): New class.
20086 (ternary_bfloat_lanex2): New shape.
20087 (ternary_bfloat_opt_n_def): New class.
20088 (ternary_bfloat_opt_n): New shape.
20089 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
20090 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
20091 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
20092 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
20093 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
20094 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
20095 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
20096 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
20097 the pattern off the narrow mode instead of the wider one.
20098 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
20099 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
20100 (sve_fp_op): Handle them.
20101 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
20102 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
20104 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
20106 * config/aarch64/arm_sve.h: Include arm_bf16.h.
20107 * config/aarch64/aarch64-modes.def (BF): Move definition before
20108 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
20109 (SVE_MODES): Handle BF modes.
20110 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
20112 (aarch64_full_sve_mode): Likewise.
20113 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
20115 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
20116 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
20117 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
20118 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
20120 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
20122 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
20123 (TYPES_all_data): Add bf16.
20124 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
20125 (register_tuple_type): Increase buffer size.
20126 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
20127 (bf16): New type suffix.
20128 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
20129 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
20130 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
20131 Change type from all_data to all_arith.
20132 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
20133 (svminp): Likewise.
20135 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
20136 Matthew Malcomson <matthew.malcomson@arm.com>
20137 Richard Sandiford <richard.sandiford@arm.com>
20139 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
20140 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
20141 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
20142 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
20143 __ARM_FEATURE_MATMUL_FP64.
20144 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
20145 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
20146 be disabled at the same time.
20147 (f32mm): New extension.
20148 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
20149 (AARCH64_FL_F64MM): Bump to the next bit up.
20150 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
20151 (TARGET_SVE_F64MM): New macros.
20152 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
20153 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
20154 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
20155 (UNSPEC_ZIP2Q): New unspeccs.
20156 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
20157 (optab, sur, perm_insn): Handle the new unspecs.
20158 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
20159 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
20160 TARGET_SVE_F64MM instead of separate tests.
20161 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
20162 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
20163 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
20164 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
20165 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
20166 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
20167 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
20168 (TYPES_s_signed): New macro.
20169 (TYPES_s_integer): Use it.
20170 (TYPES_d_float): New macro.
20171 (TYPES_d_data): Use it.
20172 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
20173 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
20174 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
20175 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
20176 (svmmla): New shape.
20177 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
20178 template parameters.
20179 (ternary_resize2_lane_base): Likewise.
20180 (ternary_resize2_base): New class.
20181 (ternary_qq_lane_base): Likewise.
20182 (ternary_intq_uintq_lane_def): Likewise.
20183 (ternary_intq_uintq_lane): New shape.
20184 (ternary_intq_uintq_opt_n_def): New class
20185 (ternary_intq_uintq_opt_n): New shape.
20186 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
20187 (ternary_uintq_intq_def): New class.
20188 (ternary_uintq_intq): New shape.
20189 (ternary_uintq_intq_lane_def): New class.
20190 (ternary_uintq_intq_lane): New shape.
20191 (ternary_uintq_intq_opt_n_def): New class.
20192 (ternary_uintq_intq_opt_n): New shape.
20193 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
20194 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
20195 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
20196 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
20198 (svdotprod_lane_impl): ...this new class.
20199 (svmmla_impl, svusdot_impl): New classes.
20200 (svdot_lane): Update to use svdotprod_lane_impl.
20201 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
20202 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
20204 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
20205 function, with no types defined.
20206 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
20207 AARCH64_FL_I8MM functions.
20208 (svmmla): New AARCH64_FL_F32MM function.
20209 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
20210 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
20211 AARCH64_FL_F64MM function.
20212 (REQUIRED_EXTENSIONS):
20214 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
20216 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
20219 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
20221 * config/i386/i386.md (*movoi_internal_avx): Do not check for
20222 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
20223 (*movti_internal): Do not check for
20224 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
20225 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
20226 just after check for TARGET_AVX.
20227 (*movdf_internal): Ditto.
20228 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
20229 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
20230 * config/i386/sse.md (mov<mode>_internal): Only check
20231 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
20232 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
20233 (<sse>_andnot<mode>3<mask_name>): Move check for
20234 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
20235 (<code><mode>3<mask_name>): Ditto.
20236 (*andnot<mode>3): Ditto.
20237 (*andnottf3): Ditto.
20238 (*<code><mode>3): Ditto.
20239 (*<code>tf3): Ditto.
20240 (*andnot<VI:mode>3): Remove
20241 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
20242 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
20243 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
20244 (sse4_1_blendv<ssemodesuffix>): Ditto.
20245 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
20246 Explain that tune applies to 128bit instructions only.
20248 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
20250 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
20251 to definition of hsa_kernel_description. Parse assembly to find SGPR
20252 and VGPR count of kernel and store in hsa_kernel_description.
20254 2020-01-31 Tamar Christina <tamar.christina@arm.com>
20256 PR rtl-optimization/91838
20257 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
20258 to truncate if allowed or reject combination.
20260 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
20262 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
20263 (find_inv_vars_cb): Likewise.
20265 2020-01-31 David Malcolm <dmalcolm@redhat.com>
20267 * calls.c (special_function_p): Split out the check for DECL_NAME
20268 being non-NULL and fndecl being extern at file scope into a
20269 new maybe_special_function_p and call it. Drop check for fndecl
20270 being non-NULL that was after a usage of DECL_NAME (fndecl).
20271 * tree.h (maybe_special_function_p): New inline function.
20273 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
20275 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
20276 (mask_gather_load<mode>): ... here, and zero-initialize the
20278 (maskload<mode>di): Zero-initialize the destination.
20279 * config/gcn/gcn.c:
20281 2020-01-30 David Malcolm <dmalcolm@redhat.com>
20284 * doc/analyzer.texi (Limitations): Note that constraints on
20285 floating-point values are currently ignored.
20287 2020-01-30 Jakub Jelinek <jakub@redhat.com>
20290 * symtab.c (symtab_node::noninterposable_alias): If localalias
20291 already exists, but is not usable, append numbers after it until
20292 a unique name is found. Formatting fix.
20294 PR middle-end/93505
20295 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
20298 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
20300 * config/gcn/gcn.c (print_operand): Handle LTGT.
20301 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
20303 2020-01-30 Richard Biener <rguenther@suse.de>
20305 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
20306 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
20308 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
20310 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
20311 without a DECL in .data.rel.ro.local.
20313 2020-01-30 Jakub Jelinek <jakub@redhat.com>
20316 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
20320 * config/i386/sse.md
20321 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
20322 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
20323 any_extend code iterator instead of always zero_extend.
20324 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
20325 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
20326 Use any_extend code iterator instead of always zero_extend.
20327 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
20328 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
20329 Use any_extend code iterator instead of always zero_extend.
20330 (*sse2_pmovmskb_ext): New define_insn.
20331 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
20334 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
20335 (*popcountsi2_zext_falsedep): New define_insn.
20337 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
20339 * config.in: Regenerated.
20340 * configure: Regenerated.
20342 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
20345 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
20346 LLVM's assembler changed the default in version 9.
20348 2020-01-24 Jeff Law <law@redhat.com>
20350 PR tree-optimization/89689
20351 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
20353 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
20357 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
20359 PR rtl-optimization/87763
20360 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
20361 simplification to handle subregs as well as bare regs.
20362 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
20364 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
20367 * ira.c (ira): Revert use of simplified LRA algorithm.
20369 2020-01-29 Martin Jambor <mjambor@suse.cz>
20371 PR tree-optimization/92706
20372 * tree-sra.c (struct access): Fields first_link, last_link,
20373 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
20374 next_rhs_queued and grp_rhs_queued respectively, new fields
20375 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
20376 (struct assign_link): Field next renamed to next_rhs, new field
20377 next_lhs. Updated comment.
20378 (work_queue_head): Renamed to rhs_work_queue_head.
20379 (lhs_work_queue_head): New variable.
20380 (add_link_to_lhs): New function.
20381 (relink_to_new_repr): Also relink LHS lists.
20382 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
20383 (add_access_to_lhs_work_queue): New function.
20384 (pop_access_from_work_queue): Renamed to
20385 pop_access_from_rhs_work_queue.
20386 (pop_access_from_lhs_work_queue): New function.
20387 (build_accesses_from_assign): Also add links to LHS lists and to LHS
20389 (child_would_conflict_in_lacc): Renamed to
20390 child_would_conflict_in_acc. Adjusted parameter names.
20391 (create_artificial_child_access): New parameter set_grp_read, use it.
20392 (subtree_mark_written_and_enqueue): Renamed to
20393 subtree_mark_written_and_rhs_enqueue.
20394 (propagate_subaccesses_across_link): Renamed to
20395 propagate_subaccesses_from_rhs.
20396 (propagate_subaccesses_from_lhs): New function.
20397 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
20400 2020-01-29 Martin Jambor <mjambor@suse.cz>
20402 PR tree-optimization/92706
20403 * tree-sra.c (struct access): Adjust comment of
20404 grp_total_scalarization.
20405 (find_access_in_subtree): Look for single children spanning an entire
20407 (scalarizable_type_p): Allow register accesses, adjust callers.
20408 (completely_scalarize): Remove function.
20409 (scalarize_elem): Likewise.
20410 (create_total_scalarization_access): Likewise.
20411 (sort_and_splice_var_accesses): Do not track total scalarization
20413 (analyze_access_subtree): New parameter totally, adjust to new meaning
20414 of grp_total_scalarization.
20415 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
20416 (can_totally_scalarize_forest_p): New function.
20417 (create_total_scalarization_access): Likewise.
20418 (create_total_access_and_reshape): Likewise.
20419 (total_should_skip_creating_access): Likewise.
20420 (totally_scalarize_subtree): Likewise.
20421 (analyze_all_variable_accesses): Perform total scalarization after
20422 subaccess propagation using the new functions above.
20423 (initialize_constant_pool_replacements): Output initializers by
20424 traversing the access tree.
20426 2020-01-29 Martin Jambor <mjambor@suse.cz>
20428 * tree-sra.c (verify_sra_access_forest): New function.
20429 (verify_all_sra_access_forests): Likewise.
20430 (create_artificial_child_access): Set parent.
20431 (analyze_all_variable_accesses): Call the verifier.
20433 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
20435 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
20436 if called on indirect edge.
20437 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
20438 speculative call if needed.
20440 2020-01-29 Richard Biener <rguenther@suse.de>
20442 PR tree-optimization/93428
20443 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
20444 permutation when the load node is created.
20445 (vect_analyze_slp_instance): Re-use it here.
20447 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
20449 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
20451 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
20453 PR rtl-optimization/93272
20454 * ira-lives.c (process_out_of_region_eh_regs): New function.
20455 (process_bb_node_lives): Call it.
20457 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
20459 * coverage.c (read_counts_file): Make error message lowercase.
20461 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
20463 * profile-count.c (profile_quality_display_names): Fix ordering.
20465 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
20468 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
20469 hash only when edge is first within the sequence.
20470 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
20471 (symbol_table::create_edge): Do not set target_prob.
20472 (cgraph_edge::remove_caller): Watch for speculative calls when updating
20473 the call site hash.
20474 (cgraph_edge::make_speculative): Drop target_prob parameter.
20475 (cgraph_edge::speculative_call_info): Remove.
20476 (cgraph_edge::first_speculative_call_target): New member function.
20477 (update_call_stmt_hash_for_removing_direct_edge): New function.
20478 (cgraph_edge::resolve_speculation): Rewrite to new API.
20479 (cgraph_edge::speculative_call_for_target): New member function.
20480 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
20481 multiple speculation targets.
20482 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
20484 (verify_speculative_call): Verify that targets form an interval.
20485 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
20486 (cgraph_edge::first_speculative_call_target): New member function.
20487 (cgraph_edge::next_speculative_call_target): New member function.
20488 (cgraph_edge::speculative_call_target_ref): New member function.
20489 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
20490 (cgraph_edge): Remove target_prob.
20491 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
20492 Fix handling of speculative calls.
20493 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
20494 * ipa-fnsummary.c (analyze_function_body): Likewise.
20495 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
20496 * ipa-profile.c (dump_histogram): Fix formating.
20497 (ipa_profile_generate_summary): Watch for overflows.
20498 (ipa_profile): Do not require probablity to be 1/2; update to new API.
20499 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
20500 (update_indirect_edges_after_inlining): Update to new API.
20501 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
20503 * profile-count.h: (profile_probability::adjusted): New.
20504 * tree-inline.c (copy_bb): Update to new speculative call API; fix
20505 updating of profile.
20506 * value-prof.c (gimple_ic_transform): Rename to ...
20507 (dump_ic_profile): ... this one; update dumping.
20508 (stream_in_histogram_value): Fix formating.
20509 (gimple_value_profile_transformations): Update.
20511 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
20514 * config/i386/i386.md (*movoi_internal_avx): Remove
20515 TARGET_SSE_TYPELESS_STORES check.
20516 (*movti_internal): Prefer TARGET_AVX over
20517 TARGET_SSE_TYPELESS_STORES.
20518 (*movtf_internal): Likewise.
20519 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
20520 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
20521 from TARGET_SSE_TYPELESS_STORES.
20523 2020-01-28 David Malcolm <dmalcolm@redhat.com>
20525 * diagnostic-core.h (warning_at): Rename overload to...
20526 (warning_meta): ...this.
20527 (emit_diagnostic_valist): Delete decl of overload taking
20528 diagnostic_metadata.
20529 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
20530 (warning_at): Rename overload taking diagnostic_metadata to...
20531 (warning_meta): ...this.
20533 2020-01-28 Richard Biener <rguenther@suse.de>
20535 PR tree-optimization/93439
20536 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
20537 * tree-cfg.c (move_sese_region_to_fn): ... here.
20538 (verify_types_in_gimple_reference): Verify used cliques are
20541 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
20544 * config/i386/i386-options.c (set_ix86_tune_features): Add an
20545 argument of a pointer to struct gcc_options and pass it to
20546 parse_mtune_ctrl_str.
20547 (ix86_function_specific_restore): Pass opts to
20548 set_ix86_tune_features.
20549 (ix86_option_override_internal): Likewise.
20550 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
20551 gcc_options and use it for x_ix86_tune_ctrl_string.
20553 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
20555 PR rtl-optimization/87763
20556 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
20557 simplification to handle subregs as well as bare regs.
20558 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
20560 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
20562 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
20563 for reduction chains that (now) include a call.
20565 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
20567 PR tree-optimization/92822
20568 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
20569 out the don't-care elements of a vector whose significant elements
20570 are duplicates, make the don't-care elements duplicates too.
20572 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
20574 PR tree-optimization/93434
20575 * tree-predcom.c (split_data_refs_to_components): Record which
20576 components have had aliasing loads removed. Prevent store-store
20577 commoning for all such components.
20579 2020-01-28 Jakub Jelinek <jakub@redhat.com>
20582 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
20583 -1 or is_vshift is true, use new_vector with number of elts npatterns
20584 rather than new_unary_operation.
20586 PR tree-optimization/93454
20587 * gimple-fold.c (fold_array_ctor_reference): Perform
20588 elt_size.to_uhwi () just once, instead of calling it in every
20589 iteration. Punt if that value is above size of the temporary
20590 buffer. Decrease third native_encode_expr argument when
20591 bufoff + elt_sz is above size of buf.
20593 2020-01-27 Joseph Myers <joseph@codesourcery.com>
20595 * config/mips/mips.c (mips_declare_object_name)
20596 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
20598 2020-01-27 Martin Liska <mliska@suse.cz>
20600 PR gcov-profile/93403
20601 * tree-profile.c (gimple_init_gcov_profiler): Generate
20602 both __gcov_indirect_call_profiler_v4 and
20603 __gcov_indirect_call_profiler_v4_atomic.
20605 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20608 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
20610 (@aarch64_split_simd_mov<mode>): Use it.
20611 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
20612 Leave the vec_extract patterns to handle 2-element vectors.
20613 (aarch64_simd_mov_from_<mode>high): Likewise.
20614 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
20615 (vec_extractv2dfv1df): Likewise.
20617 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20619 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
20620 jump conditions for *compare_condjump<GPI:mode>.
20622 2020-01-27 David Malcolm <dmalcolm@redhat.com>
20625 * digraph.cc (test_edge::test_edge): Specify template for base
20628 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
20630 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
20632 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
20634 * config/arc/arc-protos.h (gen_mlo): Remove.
20635 (gen_mhi): Likewise.
20636 * config/arc/arc.c (AUX_MULHI): Define.
20637 (arc_must_save_reister): Special handling for r58/59.
20638 (arc_compute_frame_size): Consider mlo/mhi registers.
20639 (arc_save_callee_saves): Emit fp/sp move only when emit_move
20641 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
20642 mlo/mhi name selection.
20643 (arc_restore_callee_saves): Don't early restore blink when ISR.
20644 (arc_expand_prologue): Add mlo/mhi saving.
20645 (arc_expand_epilogue): Add mlo/mhi restoring.
20648 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
20649 numbering when MUL64 option is used.
20650 (DWARF2_FRAME_REG_OUT): Define.
20651 * config/arc/arc.md (arc600_stall): New pattern.
20652 (VUNSPEC_ARC_ARC600_STALL): Define.
20653 (mulsi64): Use correct mlo/mhi registers.
20654 (mulsi_600): Clean it up.
20655 * config/arc/predicates.md (mlo_operand): Remove any dependency on
20657 (mhi_operand): Likewise.
20659 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
20660 Petro Karashchenko <petro.karashchenko@ring.com>
20662 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
20663 attributes if needed.
20664 (prepare_move_operands): Generate special unspec instruction for
20666 (arc_isuncached_mem_p): Propagate uncached attribute to each
20668 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
20669 (VUNSPEC_ARC_STDI): Likewise.
20670 (ALLI): New mode iterator.
20671 (mALLI): New mode attribute.
20672 (lddi): New instruction pattern.
20674 (stdidi_split): Split instruction for architectures which are not
20675 supporting ll64 option.
20676 (lddidi_split): Likewise.
20678 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20680 PR rtl-optimization/92989
20681 * lra-lives.c (process_bb_lives): Update the live-in set before
20682 processing additional clobbers.
20684 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20686 PR rtl-optimization/93170
20687 * cselib.c (cselib_invalidate_regno_val): New function, split out
20689 (cselib_invalidate_regno): ...here.
20690 (cselib_invalidated_by_call_p): New function.
20691 (cselib_process_insn): Iterate over all the hard-register entries in
20692 REG_VALUES and invalidate any that cross call-clobbered registers.
20694 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
20696 * dojump.c (split_comparison): Use HONOR_NANS rather than
20697 HONOR_SNANS when splitting LTGT.
20699 2020-01-27 Martin Liska <mliska@suse.cz>
20702 * opts.c (print_filtered_help): Exclude language-specific
20703 options from --help=common unless enabled in all FEs.
20705 2020-01-27 Martin Liska <mliska@suse.cz>
20707 * opts.c (print_help): Exclude params from
20708 all except --help=param.
20710 2020-01-27 Martin Liska <mliska@suse.cz>
20713 * config/i386/i386-features.c (make_resolver_func):
20714 Align the code with ppc64 target implementation.
20715 Do not generate a unique name for resolver function.
20717 2020-01-27 Richard Biener <rguenther@suse.de>
20719 PR tree-optimization/93397
20720 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
20721 converted reduction chain SLP graph adjustment.
20723 2020-01-26 Marek Polacek <polacek@redhat.com>
20726 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
20729 2020-01-26 Jason Merrill <jason@redhat.com>
20732 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
20735 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
20737 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
20738 (rx_setmem): Likewise.
20740 2020-01-26 Jakub Jelinek <jakub@redhat.com>
20743 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
20744 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
20745 drop <di> from constraint of last operand.
20748 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
20749 TARGET_AVX2 and V4DFmode not in the split condition, but in the
20750 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
20752 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
20755 * ipa-cp.c (get_info_about_necessary_edges): Remove value
20758 2020-01-24 Jeff Law <law@redhat.com>
20760 PR tree-optimization/92788
20761 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
20764 2020-01-24 Jakub Jelinek <jakub@redhat.com>
20767 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
20768 *avx_vperm_broadcast_<mode>,
20769 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
20770 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
20771 Move before avx2_perm<mode>/avx512f_perm<mode>.
20774 * simplify-rtx.c (simplify_const_unary_operation,
20775 simplify_const_binary_operation): Punt for mode precision above
20776 MAX_BITSIZE_MODE_ANY_INT.
20778 2020-01-24 Andrew Pinski <apinski@marvell.com>
20780 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
20781 alu.shift_reg to 0.
20783 2020-01-24 Jeff Law <law@redhat.com>
20786 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
20787 for REGs. Call output_operand_lossage to get more reasonable
20790 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
20792 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
20793 gcn_fp_compare_operator.
20794 (vec_cmpu<mode>di): Use gcn_compare_operator.
20795 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
20796 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
20797 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
20798 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
20799 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
20800 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
20801 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
20802 gcn_fp_compare_operator.
20803 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
20804 gcn_fp_compare_operator.
20805 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
20806 gcn_fp_compare_operator.
20807 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
20808 gcn_fp_compare_operator.
20810 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
20812 * doc/install.texi (Cross-Compiler-Specific Options): Document
20813 `--with-toolexeclibdir' option.
20815 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
20817 * target.def (flags_regnum): Also mention effect on delay slot filling.
20818 * doc/tm.texi: Regenerate.
20820 2020-01-23 Jeff Law <law@redhat.com>
20822 PR translation/90162
20823 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
20825 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
20828 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
20831 2020-01-23 Jakub Jelinek <jakub@redhat.com>
20833 PR rtl-optimization/93402
20834 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
20837 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
20839 * config.in: Regenerated.
20840 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
20841 for TARGET_LIBC_GNUSTACK.
20842 * configure: Regenerated.
20843 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
20844 found to be 2.31 or greater.
20846 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
20848 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
20850 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
20851 (mips_asm_file_end): New function. Delegate to
20852 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
20853 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
20855 2020-01-23 Jakub Jelinek <jakub@redhat.com>
20858 * config/i386/i386-modes.def (POImode): New mode.
20859 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
20860 * config/i386/i386.md (DPWI): New mode attribute.
20861 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
20862 (QWI): Rename to...
20863 (QPWI): ... this. Use POI instead of OI for TImode.
20864 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
20865 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
20868 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
20871 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
20873 (speculation_tracker_rev): New pattern.
20874 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
20875 Use speculation_tracker_rev to track the inverse condition.
20877 2020-01-23 Richard Biener <rguenther@suse.de>
20879 PR tree-optimization/93381
20880 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
20881 alias-set of the def as argument and record the first one.
20882 (vn_walk_cb_data::first_set): New member.
20883 (vn_reference_lookup_3): Pass the alias-set of the current def
20884 to push_partial_def. Fix alias-set used in the aggregate copy
20886 (vn_reference_lookup): Consistently set *last_vuse_ptr.
20887 * real.c (clear_significand_below): Fix out-of-bound access.
20889 2020-01-23 Jakub Jelinek <jakub@redhat.com>
20892 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
20893 New define_insn patterns.
20895 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
20897 * doc/sourcebuild.texi (check-function-bodies): Add an
20898 optional target/xfail selector.
20900 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
20902 PR rtl-optimization/93124
20903 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
20904 bare USE and CLOBBER insns.
20906 2020-01-22 Andrew Pinski <apinski@marvell.com>
20908 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
20910 2020-01-22 David Malcolm <dmalcolm@redhat.com>
20913 * gdbinit.in (break-on-saved-diagnostic): Update for move of
20914 diagnostic_manager into "ana" namespace.
20915 * selftest-run-tests.c (selftest::run_tests): Update for move of
20916 selftest::run_analyzer_selftests to
20917 ana::selftest::run_analyzer_selftests.
20919 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
20921 * cfgexpand.c (union_stack_vars): Update the size.
20923 2020-01-22 Richard Biener <rguenther@suse.de>
20925 PR tree-optimization/93381
20926 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
20927 throughout, handle all conversions the same.
20929 2020-01-22 Jakub Jelinek <jakub@redhat.com>
20932 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
20933 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
20934 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
20935 Call force_reg on high_in2 unconditionally.
20937 2020-01-22 Martin Liska <mliska@suse.cz>
20939 PR tree-optimization/92924
20940 * profile.c (compute_value_histograms): Divide
20941 all counter values.
20943 2020-01-22 Jakub Jelinek <jakub@redhat.com>
20946 * output.h (assemble_name_resolve): Declare.
20947 * varasm.c (assemble_name_resolve): New function.
20948 (assemble_name): Use it.
20949 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
20951 2020-01-22 Joseph Myers <joseph@codesourcery.com>
20953 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
20954 update_web_docs_git instead of update_web_docs_svn.
20956 2020-01-21 Andrew Pinski <apinski@marvell.com>
20959 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
20960 as PTR mode. Have operand 1 as being modeless, it can be P mode.
20961 (*tlsgd_small_<mode>): Likewise.
20962 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
20963 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
20964 register. Convert that register back to dest using convert_mode.
20966 2020-01-21 Jim Wilson <jimw@sifive.com>
20968 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
20971 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
20972 Uros Bizjak <ubizjak@gmail.com>
20975 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
20977 (legitimize_tls_address): Do GNU2 TLS address computation in
20978 ptr_mode and zero-extend result to Pmode.
20979 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
20980 :P with :PTR and Pmode with ptr_mode.
20981 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
20982 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
20983 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
20985 2020-01-21 Jakub Jelinek <jakub@redhat.com>
20988 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
20989 the last two operands are CONST_INT_P before using them as such.
20991 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
20993 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
20994 to get the integer element types.
20996 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
20998 * config/aarch64/aarch64-sve-builtins.h
20999 (function_expander::convert_to_pmode): Declare.
21000 * config/aarch64/aarch64-sve-builtins.cc
21001 (function_expander::convert_to_pmode): New function.
21002 (function_expander::get_contiguous_base): Use it.
21003 (function_expander::prepare_gather_address_operands): Likewise.
21004 * config/aarch64/aarch64-sve-builtins-sve2.cc
21005 (svwhilerw_svwhilewr_impl::expand): Likewise.
21007 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
21010 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
21011 cfun->machine->label_is_assembled.
21012 (aarch64_print_patchable_function_entry): New.
21013 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
21014 * config/aarch64/aarch64.h (struct machine_function): New field,
21015 label_is_assembled.
21017 2020-01-21 David Malcolm <dmalcolm@redhat.com>
21020 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
21023 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
21026 * cgraph.c (cgraph_edge::resolve_speculation,
21027 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
21028 call_stmt_site_hash.
21030 2020-01-21 Martin Liska <mliska@suse.cz>
21032 * config/rs6000/rs6000.c (common_mode_defined): Remove
21035 2020-01-21 Richard Biener <rguenther@suse.de>
21037 PR tree-optimization/92328
21038 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
21039 type when value-numbering same-sized store by inserting a
21041 (eliminate_dom_walker::eliminate_stmt): When eliminating
21042 a redundant store handle bit-reinterpretation of the same value.
21044 2020-01-21 Andrew Pinski <apinski@marvel.com>
21047 * tree-into-ssa.c (prepare_block_for_update_1): Split out
21049 (prepare_block_for_update): This. Use a worklist instead of
21052 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21054 * config/arm/arm.c (clear_operation_p):
21055 Initialise last_regno, skip first iteration
21056 based on the first_set value and use ints instead
21057 of the unnecessary HOST_WIDE_INTs.
21059 2020-01-21 Jakub Jelinek <jakub@redhat.com>
21062 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
21063 compare_mode other than SFmode or DFmode.
21065 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
21068 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
21069 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
21070 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
21072 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
21074 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
21076 2020-01-20 Andrew Pinski <apinski@marvell.com>
21078 PR middle-end/93242
21079 * targhooks.c (default_print_patchable_function_entry): Use
21080 output_asm_insn to emit the nop instruction.
21082 2020-01-20 Fangrui Song <maskray@google.com>
21084 PR middle-end/93194
21085 * targhooks.c (default_print_patchable_function_entry): Align to
21088 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
21091 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
21092 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
21093 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
21094 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
21095 (*tls_dynamic_gnu2_lea_64): Renamed to ...
21096 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
21097 Remove the {q} suffix from lea.
21098 (*tls_dynamic_gnu2_call_64): Renamed to ...
21099 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
21100 (*tls_dynamic_gnu2_combine_64): Renamed to ...
21101 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
21102 Pass Pmode to gen_tls_dynamic_gnu2_64.
21104 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
21106 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
21108 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
21110 * config/aarch64/aarch64-sve-builtins-base.cc
21111 (svld1ro_impl::memory_vector_mode): Remove parameter name.
21113 2020-01-20 Richard Biener <rguenther@suse.de>
21116 * dwarf2out.c (prune_unused_types): Unconditionally mark
21117 called function DIEs.
21119 2020-01-20 Martin Liska <mliska@suse.cz>
21121 PR tree-optimization/93199
21122 * tree-eh.c (struct leh_state): Add
21123 new field outer_non_cleanup.
21124 (cleanup_is_dead_in): Pass leh_state instead
21125 of eh_region. Add a checking that state->outer_non_cleanup
21126 points to outer non-clean up region.
21127 (lower_try_finally): Record outer_non_cleanup
21129 (lower_catch): Likewise.
21130 (lower_eh_filter): Likewise.
21131 (lower_eh_must_not_throw): Likewise.
21132 (lower_cleanup): Likewise.
21134 2020-01-20 Richard Biener <rguenther@suse.de>
21136 PR tree-optimization/93094
21137 * tree-vectorizer.h (vect_loop_versioning): Adjust.
21138 (vect_transform_loop): Likewise.
21139 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
21140 loop_vectorized_call to vect_transform_loop.
21141 * tree-vect-loop.c (vect_transform_loop): Pass down
21142 loop_vectorized_call to vect_loop_versioning.
21143 * tree-vect-loop-manip.c (vect_loop_versioning): Use
21144 the earlier discovered loop_vectorized_call.
21146 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
21148 * doc/contribute.texi: Update for SVN -> Git transition.
21149 * doc/install.texi: Likewise.
21151 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
21154 * cgraph.c (cgraph_edge::make_speculative): Increase number of
21155 speculative targets.
21156 (verify_speculative_call): New function
21157 (cgraph_node::verify_node): Use it.
21158 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
21161 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
21164 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
21165 (cgraph_edge::make_direct): Remove all indirect targets.
21166 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
21167 (cgraph_node::verify_node): Verify that only one call_stmt or
21168 lto_stmt_uid is set.
21169 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
21171 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
21172 (lto_output_ref): Simplify streaming of stmt.
21173 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
21175 2020-01-18 Tamar Christina <tamar.christina@arm.com>
21177 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
21178 Mark parameter unused.
21180 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
21182 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
21184 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
21186 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
21188 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
21190 * Makefile.in: Add coroutine-passes.o.
21191 * builtin-types.def (BT_CONST_SIZE): New.
21192 (BT_FN_BOOL_PTR): New.
21193 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
21194 * builtins.def (DEF_COROUTINE_BUILTIN): New.
21195 * coroutine-builtins.def: New file.
21196 * coroutine-passes.cc: New file.
21197 * function.h (struct GTY function): Add a bit to indicate that the
21198 function is a coroutine component.
21199 * internal-fn.c (expand_CO_FRAME): New.
21200 (expand_CO_YIELD): New.
21201 (expand_CO_SUSPN): New.
21202 (expand_CO_ACTOR): New.
21203 * internal-fn.def (CO_ACTOR): New.
21207 * passes.def: Add pass_coroutine_lower_builtins,
21208 pass_coroutine_early_expand_ifns.
21209 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
21210 (make_pass_coroutine_early_expand_ifns): New.
21211 * doc/invoke.texi: Document the fcoroutines command line
21214 2020-01-18 Jakub Jelinek <jakub@redhat.com>
21216 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
21219 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
21220 after checking the argument is a REG. Don't use REGNO (reg)
21221 again to set last_regno, reuse regno variable instead.
21223 2020-01-17 David Malcolm <dmalcolm@redhat.com>
21225 * doc/analyzer.texi (Limitations): Add note about NaN.
21227 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21228 Sudakshina Das <sudi.das@arm.com>
21230 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
21231 and valid immediate.
21232 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
21233 (lshrdi3): Generate thumb2_lsrl for valid immediates.
21234 * config/arm/constraints.md (Pg): New.
21235 * config/arm/predicates.md (long_shift_imm): New.
21236 (arm_reg_or_long_shift_imm): Likewise.
21237 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
21238 (thumb2_lsll): Likewise.
21239 (thumb2_lsrl): New.
21241 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21242 Sudakshina Das <sudi.das@arm.com>
21244 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
21245 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
21246 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
21247 register pairs for doubleword quantities for ARMv8.1M-Mainline.
21248 * config/arm/thumb2.md (thumb2_asrl): New.
21249 (thumb2_lsll): Likewise.
21251 2020-01-17 Jakub Jelinek <jakub@redhat.com>
21253 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
21256 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
21258 * gdbinit.in (help-gcc-hooks): New command.
21259 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
21260 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
21263 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
21265 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
21266 correct target macro.
21268 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
21270 * config/aarch64/aarch64-protos.h
21271 (aarch64_sve_ld1ro_operand_p): New.
21272 * config/aarch64/aarch64-sve-builtins-base.cc
21273 (class load_replicate): New.
21274 (class svld1ro_impl): New.
21275 (class svld1rq_impl): Change to inherit from load_replicate.
21276 (svld1ro): New sve intrinsic function base.
21277 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
21278 New DEF_SVE_FUNCTION.
21279 * config/aarch64/aarch64-sve-builtins-base.h
21280 (svld1ro): New decl.
21281 * config/aarch64/aarch64-sve-builtins.cc
21282 (function_expander::add_mem_operand): Modify assert to allow
21284 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
21286 * config/aarch64/aarch64.c
21287 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
21288 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
21289 (aarch64_sve_ld1ro_operand_p): New.
21290 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
21291 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
21292 * config/aarch64/predicates.md
21293 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
21295 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
21297 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
21298 Introduce this ACLE specified predefined macro.
21299 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
21300 (fp): Disabling this disables f64mm.
21301 (simd): Disabling this disables f64mm.
21302 (fp16): Disabling this disables f64mm.
21303 (sve): Disabling this disables f64mm.
21304 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
21305 (AARCH64_ISA_F64MM): New.
21306 (TARGET_F64MM): New.
21307 * doc/invoke.texi (f64mm): Document new option.
21309 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
21311 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
21312 (neoversen1_tunings): Likewise.
21314 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
21317 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
21318 Add assert to ensure prolog has been emitted.
21319 (aarch64_split_atomic_op): Likewise.
21320 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
21321 Use epilogue_completed rather than reload_completed.
21322 (aarch64_atomic_exchange<mode>): Likewise.
21323 (aarch64_atomic_<atomic_optab><mode>): Likewise.
21324 (atomic_nand<mode>): Likewise.
21325 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
21326 (atomic_fetch_nand<mode>): Likewise.
21327 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
21328 (atomic_nand_fetch<mode>): Likewise.
21330 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
21333 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
21335 (REVERSE_CONDITION): Delete.
21336 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
21337 (CCFP_CCFPE): Likewise.
21338 (e): New mode attribute.
21339 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
21340 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
21341 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
21342 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
21343 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
21344 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
21345 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
21346 name of generator from gen_ccmpdi to gen_ccmpccdi.
21347 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
21348 the previous comparison but aren't able to, use the new ccmp_rev
21351 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
21353 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
21354 than testing directly for INTEGER_CST.
21355 (gimplify_target_expr, gimplify_omp_depend): Likewise.
21357 2020-01-17 Jakub Jelinek <jakub@redhat.com>
21359 PR tree-optimization/93292
21360 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
21361 get_vectype_for_scalar_type returns NULL.
21363 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
21365 * params.opt (-param=max-predicted-iterations): Increase range from 0.
21366 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
21368 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
21370 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
21372 * params.opt: (max-predicted-iterations): Set bounds.
21373 * predict.c (real_almost_one, real_br_prob_base,
21374 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
21375 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
21376 probabilities; do not truncate to reg_br_prob_bases.
21377 (estimate_loops_at_level): Pass max_cyclic_prob.
21378 (estimate_loops): Compute max_cyclic_prob.
21379 (estimate_bb_frequencies): Do not initialize real_*; update calculation
21381 * profile-count.c (profile_probability::to_sreal): New.
21382 * profile-count.h (class sreal): Move up in file.
21383 (profile_probability::to_sreal): Declare.
21385 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21388 (arm_invalid_conversion): New function for target hook.
21389 (arm_invalid_unary_op): New function for target hook.
21390 (arm_invalid_binary_op): New function for target hook.
21392 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21394 * config.gcc: Add arm_bf16.h.
21395 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
21396 (arm_simd_builtin_std_type): Add BFmode.
21397 (arm_init_simd_builtin_types): Define element types for vector types.
21398 (arm_init_bf16_types): New function.
21399 (arm_init_builtins): Add arm_init_bf16_types function call.
21400 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
21401 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
21402 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
21403 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
21404 (arm_vector_mode_supported_p): Add V4BF, V8BF.
21405 (arm_mangle_type): Add __bf16.
21406 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
21407 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
21408 arm_bf16_ptr_type_node.
21409 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
21410 define_split between ARM registers.
21411 * config/arm/arm_bf16.h: New file.
21412 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
21413 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
21414 (VQXMOV): Add V8BF.
21415 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
21416 * config/arm/vfp.md: Add BFmode to movhf patterns.
21418 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
21419 Andre Vieira <andre.simoesdiasvieira@arm.com>
21421 * config/arm/arm-cpus.in (mve, mve_float): New features.
21422 (dsp, mve, mve.fp): New options.
21423 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
21424 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
21425 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
21427 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21428 Thomas Preud'homme <thomas.preudhomme@arm.com>
21430 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
21432 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
21433 error for using -mcmse when targeting Armv8.1-M Mainline.
21435 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21436 Thomas Preud'homme <thomas.preudhomme@arm.com>
21438 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
21439 address in r4 when targeting Armv8.1-M Mainline.
21440 (nonsecure_call_value_internal): Likewise.
21441 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
21442 a register match_operand again. Emit BLXNS when targeting
21443 Armv8.1-M Mainline.
21444 (nonsecure_call_value_reg_thumb2): Likewise.
21446 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21447 Thomas Preud'homme <thomas.preudhomme@arm.com>
21449 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
21450 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
21451 variable as true when floating-point ABI is not hard. Replace
21452 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
21453 Generate VLSTM and VLLDM instruction respectively before and
21454 after a function call to cmse_nonsecure_call function.
21455 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
21456 (VUNSPEC_VLLDM): Likewise.
21457 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
21458 (lazy_load_multiple_insn): Likewise.
21460 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21461 Thomas Preud'homme <thomas.preudhomme@arm.com>
21463 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
21464 (arm_emit_vfp_multi_reg_pop): Likewise.
21465 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
21466 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
21467 restore callee-saved VFP registers.
21469 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21470 Thomas Preud'homme <thomas.preudhomme@arm.com>
21472 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
21473 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
21474 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
21475 callee-saved GPRs as well as clear ip register before doing a nonsecure
21476 call then restore callee-saved GPRs after it when targeting
21477 Armv8.1-M Mainline.
21478 (arm_reorg): Adapt to function rename.
21480 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21481 Thomas Preud'homme <thomas.preudhomme@arm.com>
21483 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
21484 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
21485 clear_vfp_multiple pattern based on a new vfp parameter.
21486 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
21487 targeting Armv8.1-M Mainline.
21488 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
21489 unconditionally when targeting Armv8.1-M Mainline architecture. Check
21490 whether VFP registers are available before looking call_used_regs for a
21492 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
21493 of prototype of clear_operation_p.
21494 (clear_vfp_multiple_operation): New predicate.
21495 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
21496 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
21498 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21499 Thomas Preud'homme <thomas.preudhomme@arm.com>
21501 * config/arm/arm-protos.h (clear_operation_p): Declare.
21502 * config/arm/arm.c (clear_operation_p): New function.
21503 (cmse_clear_registers): Generate clear_multiple instruction pattern if
21504 targeting Armv8.1-M Mainline or successor.
21505 (output_return_instruction): Only output APSR register clearing if
21506 Armv8.1-M Mainline instructions not available.
21507 (thumb_exit): Likewise.
21508 * config/arm/predicates.md (clear_multiple_operation): New predicate.
21509 * config/arm/thumb2.md (clear_apsr): New define_insn.
21510 (clear_multiple): Likewise.
21511 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
21513 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21514 Thomas Preud'homme <thomas.preudhomme@arm.com>
21516 * config/arm/arm.c (fp_sysreg_names): Declare and define.
21517 (use_return_insn): Also return false for Armv8.1-M Mainline.
21518 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
21519 Mainline instructions are available.
21520 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
21521 when targeting Armv8.1-M Mainline Security Extensions.
21522 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
21523 Mainline entry function.
21524 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
21525 targeting Armv8.1-M Mainline or successor.
21526 (arm_expand_epilogue): Fix indentation of caller-saved register
21527 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
21529 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
21530 (FP_SYSREGS): Likewise.
21531 (enum vfp_sysregs_encoding): Define enum.
21532 (fp_sysreg_names): Declare.
21533 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
21534 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
21535 (pop_fpsysreg_insn): Likewise.
21537 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
21538 Thomas Preud'homme <thomas.preudhomme@arm.com>
21540 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
21541 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
21542 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
21543 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
21544 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
21545 (ARMv8_1m_main): New feature group.
21546 (armv8.1-m.main): New architecture.
21547 * config/arm/arm-tables.opt: Regenerate.
21548 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
21549 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
21550 (arm_options_perform_arch_sanity_checks): Error out when targeting
21551 Armv8.1-M Mainline Security Extensions.
21552 * config/arm/arm.h (arm_arch8_1m_main): Declare.
21554 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21556 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
21557 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
21558 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
21559 aarch64_bfdot_laneq): New.
21560 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
21561 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
21562 vbfdotq_laneq_f32): New.
21563 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
21564 VBFMLA_W, VBF): New.
21565 (isquadop): Add V4BF, V8BF.
21567 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
21569 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
21570 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
21571 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
21572 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
21573 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
21574 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
21575 usdot_laneq, sudot_lane,sudot_laneq): New.
21576 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
21577 (aarch64_<sur>dot_lane): New.
21578 * config/aarch64/arm_neon.h (vusdot_s32): New.
21579 (vusdotq_s32): New.
21580 (vusdot_lane_s32): New.
21581 (vsudot_lane_s32): New.
21582 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
21583 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
21585 2020-01-16 Martin Liska <mliska@suse.cz>
21587 * value-prof.c (dump_histogram_value): Fix
21588 obvious spacing issue.
21590 2020-01-16 Andrew Pinski <apinski@marvell.com>
21592 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
21593 !storage_order_barrier_p.
21595 2020-01-16 Andrew Pinski <apinski@marvell.com>
21597 * sched-int.h (_dep): Add unused bit-field field for the padding.
21598 * sched-deps.c (init_dep_1): Init unused field.
21600 2020-01-16 Andrew Pinski <apinski@marvell.com>
21602 * optabs.h (create_expand_operand): Initialize target field also.
21604 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
21606 PR tree-optimization/92429
21607 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
21608 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
21610 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
21613 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
21615 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
21616 aarch64_sve_int_mode to each mode.
21618 2020-01-15 David Malcolm <dmalcolm@redhat.com>
21620 * doc/analyzer.texi (Overview): Add note about
21621 -fdump-ipa-analyzer.
21623 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
21625 PR tree-optimization/93231
21626 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
21627 input_type is unsigned. Use tree_to_shwi for shift constant.
21628 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
21629 (simplify_count_trailing_zeroes): Add test to handle known non-zero
21630 inputs more efficiently.
21632 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
21634 * config/i386/i386.md (*movsf_internal): Do not require
21635 SSE2 ISA for alternatives 14 and 15.
21637 2020-01-15 Richard Biener <rguenther@suse.de>
21639 PR middle-end/93273
21640 * tree-eh.c (sink_clobbers): If we already visited the destination
21641 block do not defer insertion.
21642 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
21643 the purpose of defered insertion.
21645 2020-01-15 Jakub Jelinek <jakub@redhat.com>
21647 * BASE-VER: Bump to 10.0.1.
21649 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
21651 PR tree-optimization/93247
21652 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
21653 type of the stmt that we're going to vectorize.
21655 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
21657 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
21658 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
21661 2020-01-15 Martin Liska <mliska@suse.cz>
21663 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
21664 2 calls of streamer_read_hwi in a function call.
21666 2020-01-15 Richard Biener <rguenther@suse.de>
21668 * alias.c (record_alias_subset): Avoid redundant work when
21669 subset is already recorded.
21671 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21673 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
21674 the analyzer options provide CWE identifiers.
21676 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21678 * tree-diagnostic-path.cc (path_summary::event_range::print):
21679 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
21680 using get_pure_location.
21682 2020-01-15 Jakub Jelinek <jakub@redhat.com>
21684 PR tree-optimization/93262
21685 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
21686 perform head trimming only if the last argument is constant,
21687 either all ones, or larger or equal to head trim, in the latter
21688 case decrease the last argument by head_trim.
21690 PR tree-optimization/93249
21691 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
21692 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
21693 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
21694 perform head trim unless we can prove there are no '\0' chars
21695 from the source among the first head_trim chars.
21697 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21699 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
21701 2020-01-15 Jakub Jelinek <jakub@redhat.com>
21704 * config/i386/sse.md
21705 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
21706 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
21707 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
21708 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
21709 just a single alternative instead of two, make operands 1 and 2
21712 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
21715 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
21718 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21720 * Makefile.in (lang_opt_files): Add analyzer.opt.
21721 (ANALYZER_OBJS): New.
21722 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
21723 tristate.o and ANALYZER_OBJS.
21724 (TEXI_GCCINT_FILES): Add analyzer.texi.
21725 * common.opt (-fanalyzer): New driver option.
21726 * config.in: Regenerate.
21727 * configure: Regenerate.
21728 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
21729 (gccdepdir): Also create depdir for "analyzer" subdir.
21730 * digraph.cc: New file.
21731 * digraph.h: New file.
21732 * doc/analyzer.texi: New file.
21733 * doc/gccint.texi ("Static Analyzer") New menu item.
21734 (analyzer.texi): Include it.
21735 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
21736 ("Warning Options"): Add static analysis warnings to the list.
21737 (-Wno-analyzer-double-fclose): New option.
21738 (-Wno-analyzer-double-free): New option.
21739 (-Wno-analyzer-exposure-through-output-file): New option.
21740 (-Wno-analyzer-file-leak): New option.
21741 (-Wno-analyzer-free-of-non-heap): New option.
21742 (-Wno-analyzer-malloc-leak): New option.
21743 (-Wno-analyzer-possible-null-argument): New option.
21744 (-Wno-analyzer-possible-null-dereference): New option.
21745 (-Wno-analyzer-null-argument): New option.
21746 (-Wno-analyzer-null-dereference): New option.
21747 (-Wno-analyzer-stale-setjmp-buffer): New option.
21748 (-Wno-analyzer-tainted-array-index): New option.
21749 (-Wno-analyzer-use-after-free): New option.
21750 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
21751 (-Wno-analyzer-use-of-uninitialized-value): New option.
21752 (-Wanalyzer-too-complex): New option.
21753 (-fanalyzer-call-summaries): New warning.
21754 (-fanalyzer-checker=): New warning.
21755 (-fanalyzer-fine-grained): New warning.
21756 (-fno-analyzer-state-merge): New warning.
21757 (-fno-analyzer-state-purge): New warning.
21758 (-fanalyzer-transitivity): New warning.
21759 (-fanalyzer-verbose-edges): New warning.
21760 (-fanalyzer-verbose-state-changes): New warning.
21761 (-fanalyzer-verbosity=): New warning.
21762 (-fdump-analyzer): New warning.
21763 (-fdump-analyzer-callgraph): New warning.
21764 (-fdump-analyzer-exploded-graph): New warning.
21765 (-fdump-analyzer-exploded-nodes): New warning.
21766 (-fdump-analyzer-exploded-nodes-2): New warning.
21767 (-fdump-analyzer-exploded-nodes-3): New warning.
21768 (-fdump-analyzer-supergraph): New warning.
21769 * doc/sourcebuild.texi (dg-require-dot): New.
21770 (dg-check-dot): New.
21771 * gdbinit.in (break-on-saved-diagnostic): New command.
21772 * graphviz.cc: New file.
21773 * graphviz.h: New file.
21774 * ordered-hash-map-tests.cc: New file.
21775 * ordered-hash-map.h: New file.
21776 * passes.def (pass_analyzer): Add before
21777 pass_ipa_whole_program_visibility.
21778 * selftest-run-tests.c (selftest::run_tests): Call
21779 selftest::ordered_hash_map_tests_cc_tests.
21780 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
21782 * shortest-paths.h: New file.
21783 * timevar.def (TV_ANALYZER): New timevar.
21784 (TV_ANALYZER_SUPERGRAPH): Likewise.
21785 (TV_ANALYZER_STATE_PURGE): Likewise.
21786 (TV_ANALYZER_PLAN): Likewise.
21787 (TV_ANALYZER_SCC): Likewise.
21788 (TV_ANALYZER_WORKLIST): Likewise.
21789 (TV_ANALYZER_DUMP): Likewise.
21790 (TV_ANALYZER_DIAGNOSTICS): Likewise.
21791 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
21792 * tree-pass.h (make_pass_analyzer): New decl.
21793 * tristate.cc: New file.
21794 * tristate.h: New file.
21796 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
21799 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
21800 alternatives 9 and 10.
21802 2020-01-14 David Malcolm <dmalcolm@redhat.com>
21804 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
21805 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
21806 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
21807 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
21808 (selftest::hash_map_tests_c_tests): Call it.
21809 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
21810 New static constant, using the value of = H::empty_zero_p.
21811 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
21812 from default_hash_traits <Value>.
21813 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
21815 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
21816 * hash-table.h (hash_table::alloc_entries): Guard the loop of
21817 calls to mark_empty with !Descriptor::empty_zero_p.
21818 (hash_table::empty_slow): Conditionalize the memset call with a
21819 check that Descriptor::empty_zero_p; otherwise, loop through the
21820 entries calling mark_empty on them.
21821 * hash-traits.h (int_hash::empty_zero_p): New static constant.
21822 (pointer_hash::empty_zero_p): Likewise.
21823 (pair_hash::empty_zero_p): Likewise.
21824 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
21826 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
21827 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
21828 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
21829 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
21830 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
21831 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
21832 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
21833 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
21834 * tree-vectorizer.h
21835 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
21838 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
21840 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
21841 fix typo on return value.
21843 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
21846 * cgraph.c (symbol_table::create_edge): Init speculative_id and
21848 (cgraph_edge::make_speculative): Add param for setting speculative_id
21850 (cgraph_edge::speculative_call_info): Update comments and find reference
21851 by speculative_id for multiple indirect targets.
21852 (cgraph_edge::resolve_speculation): Decrease the speculations
21853 for indirect edge, drop it's speculative if not direct target
21854 left. Update comments.
21855 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
21856 (cgraph_node::dump): Print num_speculative_call_targets.
21857 (cgraph_node::verify_node): Don't report error if speculative
21858 edge not include statement.
21859 (cgraph_edge::num_speculative_call_targets_p): New function.
21860 * cgraph.h (int common_target_id): Remove.
21861 (int common_target_probability): Remove.
21862 (num_speculative_call_targets): New variable.
21863 (make_speculative): Add param for setting speculative_id.
21864 (cgraph_edge::num_speculative_call_targets_p): New declare.
21865 (target_prob): New variable.
21866 (speculative_id): New variable.
21867 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
21868 call summaries for multiple speculative call targets.
21869 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
21870 * ipa-profile.c (struct speculative_call_target): New struct.
21871 (class speculative_call_summary): New class.
21872 (class speculative_call_summaries): New class.
21873 (call_sums): New variable.
21874 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
21875 (ipa_profile_write_edge_summary): New function.
21876 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
21877 (ipa_profile_dump_all_summaries): New function.
21878 (ipa_profile_read_edge_summary): New function.
21879 (ipa_profile_read_summary_section): New function.
21880 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
21881 (ipa_profile): Generate num_speculative_call_targets from
21883 * ipa-ref.h (speculative_id): New variable.
21884 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
21885 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
21886 common_target_probability. Stream out speculative_id and
21887 num_speculative_call_targets.
21888 (input_edge): Likewise.
21889 * predict.c (dump_prediction): Remove edges count assert to be
21891 * symtab.c (symtab_node::create_reference): Init speculative_id.
21892 (symtab_node::clone_references): Clone speculative_id.
21893 (symtab_node::clone_referring): Clone speculative_id.
21894 (symtab_node::clone_reference): Clone speculative_id.
21895 (symtab_node::clear_stmts_in_references): Clear speculative_id.
21896 * tree-inline.c (copy_bb): Duplicate all the speculative edges
21897 if indirect call contains multiple speculative targets.
21898 * value-prof.h (check_ic_target): Remove.
21899 * value-prof.c (gimple_value_profile_transformations):
21900 Use void function gimple_ic_transform.
21901 * value-prof.c (gimple_ic_transform): Handle topn case.
21902 Fix comment typos. Change it to a void function.
21904 2020-01-13 Andrew Pinski <apinski@marvell.com>
21906 * config/aarch64/aarch64-cores.def (octeontx2): New define.
21907 (octeontx2t98): New define.
21908 (octeontx2t96): New define.
21909 (octeontx2t93): New define.
21910 (octeontx2f95): New define.
21911 (octeontx2f95n): New define.
21912 (octeontx2f95mm): New define.
21913 * config/aarch64/aarch64-tune.md: Regenerate.
21914 * doc/invoke.texi (-mcpu=): Document the new cpu types.
21916 2020-01-13 Jason Merrill <jason@redhat.com>
21918 PR c++/33799 - destroy return value if local cleanup throws.
21919 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
21921 2020-01-13 Martin Liska <mliska@suse.cz>
21923 * ipa-cp.c (get_max_overall_size): Use newly
21924 renamed param param_ipa_cp_unit_growth.
21925 * params.opt: Remove legacy param name.
21927 2020-01-13 Martin Sebor <msebor@redhat.com>
21929 PR tree-optimization/93213
21930 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
21931 stores to be eliminated.
21933 2020-01-13 Martin Liska <mliska@suse.cz>
21935 * opts.c (print_help): Do not print CL_PARAM
21936 and CL_WARNING for CL_OPTIMIZATION.
21938 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
21941 * doc/invoke.texi (Warning Options): Add caveat about some warnings
21942 depending on optimization settings.
21944 2020-01-13 Jakub Jelinek <jakub@redhat.com>
21946 PR tree-optimization/90838
21947 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
21948 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
21949 argument rather than to initialize temporary for targets that
21950 don't use the mode argument at all. Initialize ctzval to avoid
21953 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
21955 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
21956 * tree-core.h: Document it.
21957 * gimplify.c (gimplify_omp_workshare): Set it.
21958 * omp-low.c (lower_omp_target): Use it.
21959 * tree-pretty-print.c (dump_omp_clause): Print it.
21961 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
21962 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
21964 2020-01-10 David Malcolm <dmalcolm@redhat.com>
21966 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
21967 * common.opt (fdiagnostics-path-format=): New option.
21968 (diagnostic_path_format): New enum.
21969 (fdiagnostics-show-path-depths): New option.
21970 * coretypes.h (diagnostic_event_id_t): New forward decl.
21971 * diagnostic-color.c (color_dict): Add "path".
21972 * diagnostic-event-id.h: New file.
21973 * diagnostic-format-json.cc (json_from_expanded_location): Make
21975 (json_end_diagnostic): Call context->make_json_for_path if it
21976 exists and the diagnostic has a path.
21977 (diagnostic_output_format_init): Clear context->print_path.
21978 * diagnostic-path.h: New file.
21979 * diagnostic-show-locus.c (colorizer::set_range): Special-case
21980 when printing a run of events in a diagnostic_path so that they
21981 all get the same color.
21982 (layout::m_diagnostic_path_p): New field.
21983 (layout::layout): Initialize it.
21984 (layout::print_any_labels): Don't colorize the label text for an
21985 event in a diagnostic_path.
21986 (gcc_rich_location::add_location_if_nearby): Add
21987 "restrict_to_current_line_spans" and "label" params. Pass the
21988 former to layout.maybe_add_location_range; pass the latter
21989 when calling add_range.
21990 * diagnostic.c: Include "diagnostic-path.h".
21991 (diagnostic_initialize): Initialize context->path_format and
21992 context->show_path_depths.
21993 (diagnostic_show_any_path): New function.
21994 (diagnostic_path::interprocedural_p): New function.
21995 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
21996 (simple_diagnostic_path::num_events): New function.
21997 (simple_diagnostic_path::get_event): New function.
21998 (simple_diagnostic_path::add_event): New function.
21999 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
22000 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
22001 (debug): New overload taking a diagnostic_path *.
22002 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
22003 * diagnostic.h (enum diagnostic_path_format): New enum.
22004 (json::value): New forward decl.
22005 (diagnostic_context::path_format): New field.
22006 (diagnostic_context::show_path_depths): New field.
22007 (diagnostic_context::print_path): New callback field.
22008 (diagnostic_context::make_json_for_path): New callback field.
22009 (diagnostic_show_any_path): New decl.
22010 (json_from_expanded_location): New decl.
22011 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
22012 (-fdiagnostics-show-path-depths): New option.
22013 (-fdiagnostics-color): Add "path" to description of default
22014 GCC_COLORS; describe it.
22015 (-fdiagnostics-format=json): Document how diagnostic paths are
22016 represented in the JSON output format.
22017 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
22018 Add optional params "restrict_to_current_line_spans" and "label".
22019 * opts.c (common_handle_option): Handle
22020 OPT_fdiagnostics_path_format_ and
22021 OPT_fdiagnostics_show_path_depths.
22022 * pretty-print.c: Include "diagnostic-event-id.h".
22023 (pp_format): Implement "%@" format code for printing
22024 diagnostic_event_id_t *.
22025 (selftest::test_pp_format): Add tests for "%@".
22026 * selftest-run-tests.c (selftest::run_tests): Call
22027 selftest::tree_diagnostic_path_cc_tests.
22028 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
22029 * toplev.c (general_init): Initialize global_dc->path_format and
22030 global_dc->show_path_depths.
22031 * tree-diagnostic-path.cc: New file.
22032 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
22033 non-static. Drop "diagnostic" param in favor of storing the
22034 original value of "where" and re-using it.
22035 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
22036 maybe_unwind_expanded_macro_loc.
22037 (tree_diagnostics_defaults): Initialize context->print_path and
22038 context->make_json_for_path.
22039 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
22041 (default_tree_make_json_for_path): New decl.
22042 (maybe_unwind_expanded_macro_loc): New decl.
22044 2020-01-10 Jakub Jelinek <jakub@redhat.com>
22046 PR tree-optimization/93210
22047 * fold-const.h (native_encode_initializer,
22048 can_native_interpret_type_p): Declare.
22049 * fold-const.c (native_encode_string): Fix up handling with off != -1,
22051 (native_encode_initializer): New function, moved from dwarf2out.c.
22052 Adjust to native_encode_expr compatible arguments, including dry-run
22053 and partial extraction modes. Don't handle STRING_CST.
22054 (can_native_interpret_type_p): No longer static.
22055 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
22056 offset / BITS_PER_UNIT fits into int and don't call it if
22057 can_native_interpret_type_p fails. If suboff is NULL and for
22058 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
22059 native_encode_initializer.
22060 (fold_const_aggregate_ref_1): Formatting fix.
22061 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
22062 (tree_add_const_value_attribute): Adjust caller.
22064 PR tree-optimization/90838
22065 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
22066 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
22067 CTZ_DEFINED_VALUE_AT_ZERO.
22069 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
22071 PR inline-asm/93027
22072 * lra-constraints.c (match_reload): Permit input operands have the
22073 same mode as output while other input operands have a different
22076 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
22078 PR tree-optimization/90838
22079 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
22080 (check_ctz_string): Likewise.
22081 (optimize_count_trailing_zeroes): Likewise.
22082 (simplify_count_trailing_zeroes): Likewise.
22083 (pass_forwprop::execute): Try ctz simplification.
22084 * match.pd: Add matching for ctz idioms.
22086 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22088 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
22090 (aarch64_invalid_unary_op): New function for target hook.
22091 (aarch64_invalid_binary_op): New function for target hook.
22093 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22095 * config.gcc: Add arm_bf16.h.
22096 * config/aarch64/aarch64-builtins.c
22097 (aarch64_simd_builtin_std_type): Add BFmode.
22098 (aarch64_init_simd_builtin_types): Define element types for vector
22100 (aarch64_init_bf16_types): New function.
22101 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
22102 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
22104 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
22105 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
22107 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
22108 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
22109 * config/aarch64/aarch64.c
22110 (aarch64_classify_vector_mode): Add support for BF types.
22111 (aarch64_gimplify_va_arg_expr): Add support for BF types.
22112 (aarch64_vq_mode): Add support for BF types.
22113 (aarch64_simd_container_mode): Add support for BF types.
22114 (aarch64_mangle_type): Add support for BF scalar type.
22115 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
22116 * config/aarch64/arm_bf16.h: New file.
22117 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
22118 * config/aarch64/iterators.md: Add BF types to mode attributes.
22119 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
22121 2020-01-10 Jason Merrill <jason@redhat.com>
22123 PR c++/93173 - incorrect tree sharing.
22124 * gimplify.c (copy_if_shared): No longer static.
22125 * gimplify.h: Declare it.
22127 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
22129 * doc/invoke.texi (-msve-vector-bits=): Document that
22130 -msve-vector-bits=128 now generates VL-specific code for
22131 little-endian targets.
22132 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
22133 build_vector_type_for_mode to construct the data vector types.
22134 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
22135 VL-specific code for -msve-vector-bits=128 on little-endian targets.
22136 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
22137 for 128-bit vectors.
22139 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
22141 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
22144 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
22146 * config/aarch64/aarch64-builtins.c
22147 (aarch64_builtin_vectorized_function): Check for specific vector modes,
22148 rather than checking the number of elements and the element mode.
22150 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
22152 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
22153 get_related_vectype_for_scalar_type rather than build_vector_type
22154 to create the index type for a conditional reduction.
22156 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
22158 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
22159 for any type of gather or scatter, including strided accesses.
22161 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
22163 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
22166 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
22168 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
22169 get_dr_vinfo_offset
22170 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
22171 parameter and its use to reset DR_OFFSET's.
22172 (vect_transform_loop): Remove orig_drs_init argument.
22173 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
22174 member of dr_vec_info rather than the offset of the associated
22175 data_reference's innermost_loop_behavior.
22176 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
22177 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
22178 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
22179 get_dr_vinfo_offset.
22180 (vectorizable_store): Likewise.
22181 (vectorizable_load): Likewise.
22183 2020-01-10 Richard Biener <rguenther@suse.de>
22185 * gimple-ssa-store-merging
22186 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
22188 2020-01-10 Martin Liska <mliska@suse.cz>
22191 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
22192 encapsulation that was there before r280040.
22194 2020-01-10 Richard Biener <rguenther@suse.de>
22196 PR middle-end/93199
22197 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
22198 sequences to avoid walking them again for secondary opportunities.
22199 (pass_lower_eh_dispatch::execute): Instead actually insert
22202 2020-01-10 Richard Biener <rguenther@suse.de>
22204 PR middle-end/93199
22205 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
22206 (cleanup_all_empty_eh): Walk landing pads in reverse order to
22207 avoid quadraticness.
22209 2020-01-10 Martin Jambor <mjambor@suse.cz>
22211 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
22212 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
22213 to get param_ipa_sra_max_replacements.
22214 (param_splitting_across_edge): Pass the caller to
22215 pull_accesses_from_callee.
22217 2020-01-10 Martin Jambor <mjambor@suse.cz>
22219 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
22220 * ipa-cp.c (max_new_size): Removed.
22221 (orig_overall_size): New variable.
22222 (get_max_overall_size): New function.
22223 (estimate_local_effects): Use it. Adjust dump.
22224 (decide_about_value): Likewise.
22225 (ipcp_propagate_stage): Do not calculate max_new_size, just store
22226 orig_overall_size. Adjust dump.
22227 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
22229 2020-01-10 Martin Jambor <mjambor@suse.cz>
22231 * params.opt (param_ipa_max_agg_items): Mark as Optimization
22232 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
22233 instead of param_ipa_max_agg_items.
22234 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
22235 optimization info for the callee.
22237 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
22239 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
22240 markers if debug_inline_points is false.
22242 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22244 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
22246 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
22247 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
22248 aarch64-sve-builtins-sve2.h.
22249 (aarch64-sve-builtins-sve2.o): New rule.
22250 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
22251 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
22252 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
22253 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
22254 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
22255 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
22257 * config/aarch64/aarch64-sve.md: Update comments with SVE2
22258 instructions that are handled here.
22259 (@cond_asrd<mode>): Generalize to...
22260 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
22261 (*cond_asrd<mode>_2): Generalize to...
22262 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
22263 (*cond_asrd<mode>_z): Generalize to...
22264 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
22265 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
22266 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
22267 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
22268 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
22270 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
22271 (@aarch64_scatter_stnt<mode>): Likewise.
22272 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
22273 (@aarch64_mul_lane_<mode>): Likewise.
22274 (@aarch64_sve_suqadd<mode>_const): Likewise.
22275 (*<sur>h<addsub><mode>): Generalize to...
22276 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
22278 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
22279 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
22280 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
22281 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
22282 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
22283 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
22284 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
22285 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
22286 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
22287 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
22288 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
22289 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
22290 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
22291 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
22292 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
22293 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
22294 (@aarch64_sve2_xar<mode>): Likewise.
22295 (@aarch64_sve2_bcax<mode>): Likewise.
22296 (*aarch64_sve2_eor3<mode>): Rename to...
22297 (@aarch64_sve2_eor3<mode>): ...this.
22298 (@aarch64_sve2_bsl<mode>): New expander.
22299 (@aarch64_sve2_nbsl<mode>): Likewise.
22300 (@aarch64_sve2_bsl1n<mode>): Likewise.
22301 (@aarch64_sve2_bsl2n<mode>): Likewise.
22302 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
22303 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
22304 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
22305 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
22306 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
22307 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
22308 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
22309 (<su>mull<bt><Vwide>): Generalize to...
22310 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
22312 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
22313 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
22314 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
22315 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
22316 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
22317 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
22318 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
22319 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
22320 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
22321 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
22322 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
22323 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
22324 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
22325 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
22326 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
22327 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
22328 (<SHRNB:r>shrnb<mode>): Generalize to...
22329 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
22331 (<SHRNT:r>shrnt<mode>): Generalize to...
22332 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
22334 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
22335 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
22336 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
22337 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
22338 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
22339 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
22340 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
22341 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
22342 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
22343 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
22344 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
22345 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
22346 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
22347 (@aarch64_sve2_cvtnt<mode>): Likewise.
22348 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
22349 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
22350 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
22351 (@aarch64_sve2_cvtxnt<mode>): Likewise.
22352 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
22353 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
22354 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
22355 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
22356 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
22357 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
22358 (@aarch64_sve2_pmul<mode>): Likewise.
22359 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
22360 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
22361 (@aarch64_sve2_tbl2<mode>): Likewise.
22362 (@aarch64_sve2_tbx<mode>): Likewise.
22363 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
22364 (@aarch64_sve2_histcnt<mode>): Likewise.
22365 (@aarch64_sve2_histseg<mode>): Likewise.
22366 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
22367 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
22368 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
22369 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
22370 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
22371 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
22372 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
22373 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
22374 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
22375 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
22376 (SVE2_PMULL_PAIR_I): New mode iterators.
22377 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
22378 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
22379 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
22380 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
22381 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
22382 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
22383 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
22384 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
22385 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
22386 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
22387 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
22388 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
22389 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
22390 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
22391 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
22392 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
22393 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
22394 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
22395 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
22396 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
22397 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
22398 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
22399 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
22400 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
22401 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
22402 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
22403 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
22404 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
22405 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
22406 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
22407 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
22409 (VNARROW, Ventype): New mode attributes.
22410 (Vewtype): Handle VNx2DI. Fix typo in comment.
22411 (VDOUBLE): New mode attribute.
22412 (sve_lane_con): Handle VNx8HI.
22413 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
22414 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
22415 (sve_int_op, sve_int_op_rev): Handle the above codes.
22416 (sve_pred_int_rhs2_operand): Likewise.
22417 (MULLBT, SHRNB, SHRNT): Delete.
22418 (SVE_INT_SHIFT_IMM): New int iterator.
22419 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
22420 and UNSPEC_WHILEHS for TARGET_SVE2.
22421 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
22422 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
22423 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
22424 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
22425 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
22426 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
22427 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
22428 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
22429 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
22430 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
22431 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
22432 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
22433 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
22434 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
22435 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
22436 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
22437 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
22438 (optab): Handle the new unspecs.
22439 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
22441 (lr): Handle the new unspecs.
22443 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
22444 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
22445 (sve_int_qsub_op): New int attributes.
22446 (sve_fp_op, rot): Handle the new unspecs.
22447 * config/aarch64/aarch64-sve-builtins.h
22448 (function_resolver::require_matching_pointer_type): Declare.
22449 (function_resolver::resolve_unary): Add an optional boolean argument.
22450 (function_resolver::finish_opt_n_resolution): Add an optional
22451 type_suffix_index argument.
22452 (gimple_folder::redirect_call): Declare.
22453 (gimple_expander::prepare_gather_address_operands): Add an optional
22455 * config/aarch64/aarch64-sve-builtins.cc: Include
22456 aarch64-sve-builtins-sve2.h.
22457 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
22458 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
22459 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
22460 (TYPES_hsd_integer): Use TYPES_hsd_signed.
22461 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
22462 (TYPES_s_unsigned): Likewise.
22463 (TYPES_s_integer): Use TYPES_s_unsigned.
22464 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
22465 (TYPES_sd_integer): Use them.
22466 (TYPES_d_unsigned): New macro.
22467 (TYPES_d_integer): Use it.
22468 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
22469 (TYPES_cvt_narrow): Likewise.
22470 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
22471 (preds_mx): New variable.
22472 (function_builder::add_overloaded_function): Allow the new feature
22473 set to be more restrictive than the original one.
22474 (function_resolver::infer_pointer_type): Remove qualifiers from
22475 the pointer type before printing it.
22476 (function_resolver::require_matching_pointer_type): New function.
22477 (function_resolver::resolve_sv_displacement): Handle functions
22478 that don't support 32-bit vector indices or svint32_t vector offsets.
22479 (function_resolver::finish_opt_n_resolution): Take the inferred type
22480 as a separate argument.
22481 (function_resolver::resolve_unary): Optionally treat all forms in
22482 the same way as normal merging functions.
22483 (gimple_folder::redirect_call): New function.
22484 (function_expander::prepare_gather_address_operands): Add an argument
22485 that says whether scaled forms are available. If they aren't,
22486 handle scaling of vector indices and don't add the extension and
22488 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
22489 fall back to using cond_* instead.
22490 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
22491 Split out the member variables into...
22492 (rtx_code_function_base): ...this new base class.
22493 (rtx_code_function_rotated): Inherit rtx_code_function_base.
22494 (unspec_based_function): Split out the member variables into...
22495 (unspec_based_function_base): ...this new base class.
22496 (unspec_based_function_rotated): Inherit unspec_based_function_base.
22497 (unspec_based_function_exact_insn): New class.
22498 (unspec_based_add_function, unspec_based_add_lane_function)
22499 (unspec_based_lane_function, unspec_based_pred_function)
22500 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
22501 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
22502 (unspec_based_sub_function, unspec_based_sub_lane_function): New
22504 (unspec_based_fused_function): New class.
22505 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
22506 (unspec_based_fused_lane_function): New class.
22507 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
22509 (CODE_FOR_MODE1): New macro.
22510 (fixed_insn_function): New class.
22511 (while_comparison): Likewise.
22512 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
22513 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
22514 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
22515 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
22516 (load_gather_sv_restricted, shift_left_imm_long): Declare.
22517 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
22518 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
22519 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
22520 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
22521 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
22522 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
22523 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
22524 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
22525 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
22526 Also add an initial argument for unary_convert_narrowt, regardless
22527 of the predication type.
22528 (build_32_64): Allow loads and stores to specify MODE_none.
22529 (build_sv_index64, build_sv_uint_offset): New functions.
22530 (long_type_suffix): New function.
22531 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
22532 (binary_imm_long_base, load_gather_sv_base): Likewise.
22533 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
22534 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
22535 (unary_narrowb_base, unary_narrowt_base): Likewise.
22536 (binary_long_lane_def, binary_long_lane): New shape.
22537 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
22538 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
22539 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
22540 (binary_to_uint_def, binary_to_uint): Likewise.
22541 (binary_wide_def, binary_wide): Likewise.
22542 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
22543 (compare_def, compare): Likewise.
22544 (compare_ptr_def, compare_ptr): Likewise.
22545 (load_ext_gather_index_restricted_def,
22546 load_ext_gather_index_restricted): Likewise.
22547 (load_ext_gather_offset_restricted_def,
22548 load_ext_gather_offset_restricted): Likewise.
22549 (load_gather_sv_def): Inherit from load_gather_sv_base.
22550 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
22551 (shift_left_imm_def, shift_left_imm): Likewise.
22552 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
22553 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
22554 (store_scatter_index_restricted_def,
22555 store_scatter_index_restricted): Likewise.
22556 (store_scatter_offset_restricted_def,
22557 store_scatter_offset_restricted): Likewise.
22558 (tbl_tuple_def, tbl_tuple): Likewise.
22559 (ternary_long_lane_def, ternary_long_lane): Likewise.
22560 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
22561 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
22562 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
22563 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
22564 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
22565 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
22566 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
22567 (ternary_uint_def, ternary_uint): Likewise.
22568 (unary_convert): Fix typo in comment.
22569 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
22570 (unary_long_def, unary_long): Likewise.
22571 (unary_narrowb_def, unary_narrowb): Likewise.
22572 (unary_narrowt_def, unary_narrowt): Likewise.
22573 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
22574 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
22575 (unary_to_int_def, unary_to_int): Likewise.
22576 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
22577 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
22578 (svasrd_impl): Delete.
22579 (svcadd_impl::expand): Handle integer operations too.
22580 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
22581 new functions to derive the unspec numbers.
22582 (svmla_svmls_lane_impl): Replace with...
22583 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
22584 integer operations too.
22585 (svwhile_impl): Rename to...
22586 (svwhilelx_impl): ...this and inherit from while_comparison.
22587 (svasrd): Use unspec_based_function.
22588 (svmla_lane): Use svmla_lane_impl.
22589 (svmls_lane): Use svmls_lane_impl.
22590 (svrecpe, svrsqrte): Handle unsigned integer operations too.
22591 (svwhilele, svwhilelt): Use svwhilelx_impl.
22592 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
22593 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
22594 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
22595 * config/aarch64/aarch64-sve-builtins.def: Include
22596 aarch64-sve-builtins-sve2.def.
22598 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22600 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
22601 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
22602 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
22603 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
22604 immediates as well as vector ones.
22605 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
22606 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
22607 (aarch64_sve_qsub_immediate): Update calls accordingly.
22609 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22611 * config/aarch64/aarch64-sve2.md: Add banner comments.
22612 (<su>mulh<r>s<mode>3): Move further up file.
22613 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
22614 (*aarch64_sve2_sra<mode>): Move further down file.
22615 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
22617 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22619 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
22620 and UNSPEC_WHILEWR.
22621 (while_optab_cmp): Handle them.
22622 * config/aarch64/aarch64-sve.md
22623 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
22624 and add a "@" marker.
22625 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
22626 instead of gen_aarch64_sve2_while_ptest.
22627 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
22629 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22631 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
22632 (UNSPEC_WHILELE): ...this.
22633 (UNSPEC_WHILE_LO): Rename to...
22634 (UNSPEC_WHILELO): ...this.
22635 (UNSPEC_WHILE_LS): Rename to...
22636 (UNSPEC_WHILELS): ...this.
22637 (UNSPEC_WHILE_LT): Rename to...
22638 (UNSPEC_WHILELT): ...this.
22639 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
22640 (cmp_op, while_optab_cmp): Likewise.
22641 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
22642 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
22643 (svwhilelt): Likewise.
22645 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22647 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
22648 (unary_to_uint): Define.
22649 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
22650 (unary_count): Rename to...
22651 (unary_to_uint_def, unary_to_uint): ...this.
22652 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
22654 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22656 * config/aarch64/aarch64-sve-builtins-functions.h
22657 (code_for_mode_function): New class.
22658 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
22659 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
22660 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
22661 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
22662 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
22664 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22666 * config/aarch64/iterators.md (addsub): New code attribute.
22667 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
22669 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
22670 in the asm string and attributes. Fix indentation.
22671 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
22673 (@aarch64_sve_<optab><mode>): ...this.
22674 * config/aarch64/aarch64-sve-builtins.h
22675 (function_expander::expand_signed_unpred_op): Delete.
22676 * config/aarch64/aarch64-sve-builtins.cc
22677 (function_expander::expand_signed_unpred_op): Likewise.
22678 (function_expander::map_to_rtx_codes): If the optab isn't defined,
22679 try using code_for_aarch64_sve instead.
22680 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
22681 (svqsub_impl): Likewise.
22682 (svqadd, svqsub): Use rtx_code_function instead.
22684 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22686 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
22687 (HADDSUB, sur, addsub): Remove them.
22689 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22691 * tree-nrv.c (pass_return_slot::execute): Handle all internal
22692 functions the same way, rather than singling out those that
22693 aren't mapped directly to optabs.
22695 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
22697 * target.def (compatible_vector_types_p): New target hook.
22698 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
22699 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
22700 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
22701 * doc/tm.texi: Regenerate.
22702 * gimple-expr.c: Include target.h.
22703 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
22704 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
22706 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
22707 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
22708 Use the original predicate if it already has a suitable type.
22710 2020-01-09 Martin Jambor <mjambor@suse.cz>
22712 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
22713 resolve_speculation and redirect_call_stmt_to_callee static. Change
22714 return type of set_call_stmt to cgraph_edge *.
22715 * auto-profile.c (afdo_indirect_call): Adjust call to
22716 redirect_call_stmt_to_callee.
22717 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
22718 make the this pointer explicit, adjust self-recursive calls and the
22719 call top make_direct. Return the resulting edge.
22720 (cgraph_edge::remove): Make this pointer explicit.
22721 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
22722 (cgraph_edge::make_direct): Likewise, adjust call to
22723 resolve_speculation.
22724 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
22725 call to set_call_stmt.
22726 (cgraph_update_edges_for_call_stmt_node): Update call to
22727 set_call_stmt and remove.
22728 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
22729 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
22730 (cgraph_node::create_edge_including_clones): Moved "first" definition
22731 of edge to the block where it was used. Adjusted calls to
22733 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
22734 cgraph_edge::remove.
22735 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
22736 make_direct and redirect_call_stmt_to_callee.
22737 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
22738 resolve_speculation and make_direct.
22739 * ipa-inline-transform.c (inline_transform): Adjust call to
22740 redirect_call_stmt_to_callee.
22741 (check_speculations_1):: Adjust call to resolve_speculation.
22742 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
22743 resolve-speculation.
22744 (inline_small_functions): Adjust call to resolve_speculation.
22745 (ipa_inline): Likewise.
22746 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
22748 * ipa-visibility.c (function_and_variable_visibility): Make iteration
22749 safe with regards to edge removal, adjust calls to
22750 redirect_call_stmt_to_callee.
22751 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
22752 and redirect_call_stmt_to_callee.
22753 * multiple_target.c (create_dispatcher_calls): Adjust call to
22754 redirect_call_stmt_to_callee
22755 (redirect_to_specific_clone): Likewise.
22756 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
22757 Adjust calls to cgraph_edge::remove.
22758 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
22759 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
22760 (expand_call_inline): Adjust call to cgraph_edge::remove.
22762 2020-01-09 Martin Liska <mliska@suse.cz>
22764 * params.opt: Set Optimization for
22765 param_max_speculative_devirt_maydefs.
22767 2020-01-09 Martin Sebor <msebor@redhat.com>
22769 PR middle-end/93200
22771 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
22773 2020-01-09 Martin Liska <mliska@suse.cz>
22775 * auto-profile.c (auto_profile): Use opt_for_fn
22777 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
22778 (propagate_vals_across_arith_jfunc): Likewise.
22779 (hint_time_bonus): Likewise.
22780 (incorporate_penalties): Likewise.
22781 (good_cloning_opportunity_p): Likewise.
22782 (perform_estimation_of_a_value): Likewise.
22783 (estimate_local_effects): Likewise.
22784 (ipcp_propagate_stage): Likewise.
22785 * ipa-fnsummary.c (decompose_param_expr): Likewise.
22786 (set_switch_stmt_execution_predicate): Likewise.
22787 (analyze_function_body): Likewise.
22788 * ipa-inline-analysis.c (offline_size): Likewise.
22789 * ipa-inline.c (early_inliner): Likewise.
22790 * ipa-prop.c (ipa_analyze_node): Likewise.
22791 (ipcp_transform_function): Likewise.
22792 * ipa-sra.c (process_scan_results): Likewise.
22793 (ipa_sra_summarize_function): Likewise.
22794 * params.opt: Rename ipcp-unit-growth to
22795 ipa-cp-unit-growth. Add Optimization for various
22796 IPA-related parameters.
22798 2020-01-09 Richard Biener <rguenther@suse.de>
22800 PR middle-end/93054
22801 * gimplify.c (gimplify_expr): Deal with NOP definitions.
22803 2020-01-09 Richard Biener <rguenther@suse.de>
22805 PR tree-optimization/93040
22806 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
22808 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
22810 * common/config/avr/avr-common.c (avr_option_optimization_table)
22811 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
22813 2020-01-09 Martin Liska <mliska@suse.cz>
22815 * cgraphclones.c (symbol_table::materialize_all_clones):
22816 Use cgraph_node::dump_name.
22818 2020-01-09 Jakub Jelinek <jakub@redhat.com>
22820 PR inline-asm/93202
22821 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
22822 output_operand_lossage instead of gcc_unreachable.
22823 * doc/md.texi (riscv f constraint): Fix typo.
22826 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
22827 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
22828 CONST_SCALAR_INT_P instead of CONST_INT_P.
22829 (*subv<mode>4_1): Rename to ...
22830 (subv<mode>4_1): ... this.
22831 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
22832 define_insn_and_split patterns.
22833 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
22836 2020-01-08 David Malcolm <dmalcolm@redhat.com>
22838 * vec.c (class selftest::count_dtor): New class.
22839 (selftest::test_auto_delete_vec): New test.
22840 (selftest::vec_c_tests): Call it.
22841 * vec.h (class auto_delete_vec): New class template.
22842 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
22844 2020-01-08 David Malcolm <dmalcolm@redhat.com>
22846 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
22848 2020-01-08 Jim Wilson <jimw@sifive.com>
22850 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
22851 use of TLS_MODEL_LOCAL_EXEC when not pic.
22853 2020-01-08 David Malcolm <dmalcolm@redhat.com>
22855 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
22858 2020-01-08 Jakub Jelinek <jakub@redhat.com>
22861 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
22862 *stack_protect_set_3 peephole2): Also check that the second
22863 insns source is general_operand.
22866 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
22867 predicate for output operand instead of register_operand.
22868 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
22869 memory destination and non-memory operands[2].
22871 2020-01-08 Martin Liska <mliska@suse.cz>
22873 * cgraph.c (cgraph_node::dump): Use ::dump_name or
22874 ::dump_asm_name instead of (::name or ::asm_name).
22875 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
22876 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
22877 (analyze_functions): Likewise.
22878 (expand_all_functions): Likewise.
22879 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
22880 (propagate_bits_across_jump_function): Likewise.
22881 (dump_profile_updates): Likewise.
22882 (ipcp_store_bits_results): Likewise.
22883 (ipcp_store_vr_results): Likewise.
22884 * ipa-devirt.c (dump_targets): Likewise.
22885 * ipa-fnsummary.c (analyze_function_body): Likewise.
22886 * ipa-hsa.c (check_warn_node_versionable): Likewise.
22887 (process_hsa_functions): Likewise.
22888 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
22889 (set_alias_uids): Likewise.
22890 * ipa-inline-transform.c (save_inline_function_body): Likewise.
22891 * ipa-inline.c (recursive_inlining): Likewise.
22892 (inline_to_all_callers_1): Likewise.
22893 (ipa_inline): Likewise.
22894 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
22895 (ipa_propagate_frequency): Likewise.
22896 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
22897 (remove_described_reference): Likewise.
22898 * ipa-pure-const.c (worse_state): Likewise.
22899 (check_retval_uses): Likewise.
22900 (analyze_function): Likewise.
22901 (propagate_pure_const): Likewise.
22902 (propagate_nothrow): Likewise.
22903 (dump_malloc_lattice): Likewise.
22904 (propagate_malloc): Likewise.
22905 (pass_local_pure_const::execute): Likewise.
22906 * ipa-visibility.c (optimize_weakref): Likewise.
22907 (function_and_variable_visibility): Likewise.
22908 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
22909 (ipa_discover_variable_flags): Likewise.
22910 * lto-streamer-out.c (output_function): Likewise.
22911 (output_constructor): Likewise.
22912 * tree-inline.c (copy_bb): Likewise.
22913 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
22914 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
22916 2020-01-08 Richard Biener <rguenther@suse.de>
22918 PR middle-end/93199
22919 * tree-eh.c (sink_clobbers): Update virtual operands for
22920 the first and last stmt only. Add a dry-run capability.
22921 (pass_lower_eh_dispatch::execute): Perform clobber sinking
22922 after CFG manipulations and in RPO order to catch all
22923 secondary opportunities reliably.
22925 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
22928 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
22930 2019-01-08 Richard Biener <rguenther@suse.de>
22932 PR middle-end/93199
22933 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
22934 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
22935 virtual operand, also updating SSA use.
22936 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
22937 Update stmt after resetting virtual operand.
22938 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
22939 * gimple-iterator.c (gsi_remove): When not removing the stmt
22940 permanently do not delink immediate uses or mark the stmt modified.
22942 2020-01-08 Martin Liska <mliska@suse.cz>
22944 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
22945 (ipa_call_context::estimate_size_and_time): Likewise.
22946 (inline_analyze_function): Likewise.
22948 2020-01-08 Martin Liska <mliska@suse.cz>
22950 * cgraph.c (cgraph_node::dump): Use systematically
22953 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
22955 Add -nodevicespecs option for avr.
22958 * config/avr/avr.opt (-nodevicespecs): New driver option.
22959 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
22960 "-specs=device-specs/..." if that option is not set.
22961 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
22963 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
22965 Implement 64-bit double functions for avr.
22968 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
22969 --with-double-comparison.
22970 * doc/install.texi: Document them.
22971 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
22972 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
22973 <WITH_DOUBLE_COMPARISON>: New built-in defines.
22974 * doc/invoke.texi (AVR Built-in Macros): Document them.
22975 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
22976 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
22977 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
22979 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
22982 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
22983 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
22984 when only building rm-profile multilibs.
22986 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
22989 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
22990 lattice for a value to check.
22991 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
22992 finite propagation in self-recursive scc.
22994 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
22996 * ipa-inline.c (caller_growth_limits): Restore the AND.
22998 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
23000 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
23001 (VEC_ALLREG_ALT): New iterator.
23002 (VEC_ALLREG_INT_MODE): New iterator.
23003 (VCMP_MODE): New iterator.
23004 (VCMP_MODE_INT): New iterator.
23005 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
23006 (vec_cmp<u>v64qidi): New define_expand.
23007 (vec_cmp<mode>di_exec): Use VCMP_MODE.
23008 (vec_cmpu<mode>di_exec): New define_expand.
23009 (vec_cmp<u>v64qidi_exec): New define_expand.
23010 (vec_cmp<mode>di_dup): Use VCMP_MODE.
23011 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
23012 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
23013 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
23014 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
23015 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
23016 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
23017 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
23018 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
23019 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
23021 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
23022 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
23024 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
23026 * config/gcn/constraints.md (DA): Update description and match.
23028 (Db): New constraint.
23029 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
23031 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
23032 Implement 'Db' mixed immediate type.
23033 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
23034 (addcv64si3_dup<exec_vcc>): Delete.
23035 (subcv64si3<exec_vcc>): Rework constraints.
23036 (addv64di3): Rework constraints.
23037 (addv64di3_exec): Rework constraints.
23038 (subv64di3): Rework constraints.
23039 (addv64di3_dup): Delete.
23040 (addv64di3_dup_exec): Delete.
23041 (addv64di3_zext): Rework constraints.
23042 (addv64di3_zext_exec): Rework constraints.
23043 (addv64di3_zext_dup): Rework constraints.
23044 (addv64di3_zext_dup_exec): Rework constraints.
23045 (addv64di3_zext_dup2): Rework constraints.
23046 (addv64di3_zext_dup2_exec): Rework constraints.
23047 (addv64di3_sext_dup2): Rework constraints.
23048 (addv64di3_sext_dup2_exec): Rework constraints.
23050 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
23052 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
23053 existing target checks.
23055 2020-01-07 Richard Biener <rguenther@suse.de>
23057 * doc/install.texi: Bump minimal supported MPC version.
23059 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
23061 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
23062 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
23063 * langhooks.c: Include stor-layout.h.
23064 (lhd_simulate_enum_decl): New function.
23065 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
23066 handle_arm_sve_h for the LTO frontend.
23067 (register_vector_type): Cope with null returns from pushdecl.
23069 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
23071 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
23072 (aarch64_sve::nvectors_if_data_type): Replace with...
23073 (aarch64_sve::builtin_type_p): ...this.
23074 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
23075 (find_vector_type): Delete.
23076 (add_sve_type_attribute): New function.
23077 (lookup_sve_type_attribute): Likewise.
23078 (register_builtin_types): Add an "SVE type" attribute to each type.
23079 (register_tuple_type): Likewise.
23080 (svbool_type_p, nvectors_if_data_type): Delete.
23081 (mangle_builtin_type): Use lookup_sve_type_attribute.
23082 (builtin_type_p): Likewise. Add an overload that returns the
23083 number of constituent vector and predicate registers.
23084 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
23085 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
23086 instead of aarch64_sve_argument_p.
23087 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
23088 (aarch64_pass_by_reference): Likewise.
23089 (aarch64_function_value_1): Likewise.
23090 (aarch64_return_in_memory): Likewise.
23091 (aarch64_layout_arg): Likewise.
23093 2020-01-07 Jakub Jelinek <jakub@redhat.com>
23095 PR tree-optimization/93156
23096 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
23097 least significant bit is always clear.
23099 PR tree-optimization/93118
23100 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
23101 simplifier with two intermediate conversions.
23103 2020-01-07 Martin Liska <mliska@suse.cz>
23105 * params.opt: Add Optimization for various parameters.
23107 2020-01-07 Martin Liska <mliska@suse.cz>
23110 * doc/extend.texi: Explain cloning for target_clone
23113 2020-01-07 Martin Liska <mliska@suse.cz>
23115 PR tree-optimization/92860
23116 * common.opt: Make in Optimization option
23117 as it is affected by -O0, which is an Optimization
23119 * tree-inline.c (tree_inlinable_function_p):
23120 Use opt_for_fn for warn_inline.
23121 (expand_call_inline): Likewise.
23123 2020-01-07 Martin Liska <mliska@suse.cz>
23125 PR tree-optimization/92860
23126 * common.opt: Make flag_ree as optimization
23129 2020-01-07 Martin Liska <mliska@suse.cz>
23131 PR optimization/92860
23132 * params.opt: Mark param_min_crossjump_insns with Optimization
23135 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
23137 * ipa-inline-analysis.c (estimate_growth): Fix typo.
23138 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
23140 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
23142 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
23143 helper function to return the valid addressing formats for a given
23144 hard register and mode.
23145 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
23147 * config/rs6000/constraints.md (Q constraint): Update
23149 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
23152 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
23153 Use 'Q' for doing vector extract from memory.
23154 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
23156 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
23157 doing vector extract from memory.
23158 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
23159 extract from memory.
23161 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
23162 for the offset being 34-bits when -mcpu=future is used.
23164 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
23166 * config/pa/pa.md: Revert change to use ordered_comparison_operator
23167 instead of cmpib_comparison_operator in cmpib patterns.
23168 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
23169 of cmpib_comparison_operator. Revise comment.
23171 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
23173 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
23174 in an IFN_DIV_POW2 node to be equal.
23176 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
23178 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
23179 (vect_check_scalar_mask): ...this.
23180 (vectorizable_store, vectorizable_load): Update call accordingly.
23181 (vectorizable_call): Use vect_check_scalar_mask to check the mask
23182 argument in calls to conditional internal functions.
23184 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
23186 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
23187 '0' matching inputs.
23188 (subv64di3_exec): Likewise.
23190 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
23192 * config/mips/mips.c (vr4130_align_insns): Fix typo.
23193 * doc/md.texi (movstr): Likewise.
23195 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
23197 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
23200 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
23202 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
23204 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
23205 to a temporary file and use move-if-change to update the real
23206 file where necessary.
23208 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
23210 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
23211 rather than Upa for CPY /M.
23213 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
23215 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
23218 2020-01-06 Martin Liska <mliska@suse.cz>
23220 PR tree-optimization/92860
23221 * params.opt: Mark param_max_combine_insns with Optimization
23224 2020-01-05 Jakub Jelinek <jakub@redhat.com>
23227 * config/i386/i386.md (SWIDWI): New mode iterator.
23228 (DWI, dwi): Add TImode variants.
23229 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
23230 <general_hilo_operand> instead of <general_operand>. Use
23231 CONST_SCALAR_INT_P instead of CONST_INT_P.
23232 (*addv<mode>4_1): Rename to ...
23233 (addv<mode>4_1): ... this.
23234 (QWI): New mode attribute.
23235 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
23236 define_insn_and_split patterns.
23237 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
23239 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
23240 <general_hilo_operand> instead of <general_operand>.
23241 (*addcarry<mode>_1): New define_insn.
23242 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
23244 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
23246 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
23247 Use "call" instead of "set".
23249 2020-01-03 Martin Jambor <mjambor@suse.cz>
23252 * ipa-cp.c (print_all_lattices): Skip functions without info.
23254 2020-01-03 Jakub Jelinek <jakub@redhat.com>
23257 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
23258 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
23259 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
23260 for 'e' simd clones.
23263 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
23265 (mprefer-vector-width=): Add Save.
23266 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
23267 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
23268 (ix86_debug_options, ix86_function_specific_print): Adjust
23269 ix86_target_string callers.
23270 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
23271 (ix86_valid_target_attribute_tree): Likewise.
23272 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
23273 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
23274 ix86_target_string caller.
23277 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
23278 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
23279 instead of gen_int_shift_amount + convert_modes.
23281 PR rtl-optimization/93088
23282 * loop-iv.c (find_single_def_src): Punt after looking through
23283 128 reg copies for regs with single definitions. Move definitions
23286 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
23288 * config/arm/arm-c.c (arm_cpu_builtins): Define
23289 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
23290 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
23291 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
23292 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
23293 * config/arm/arm-tables.opt: Regenerated.
23294 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
23295 arm_arch_i8mm and arm_arch_bf16 when enabled.
23296 * config/arm/arm.h (TARGET_I8MM): New macro.
23297 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
23298 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
23299 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
23300 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
23301 (v8_6_a_simd_variants): New.
23302 (v8_*_a_simd_variants): Add i8mm and bf16.
23303 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
23305 2020-01-02 Jakub Jelinek <jakub@redhat.com>
23308 * predict.c (compute_function_frequency): Don't call
23309 warn_function_cold on functions that already have cold attribute.
23311 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
23314 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
23315 COMDAT group function labels in .data.rel.ro.local section.
23316 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
23319 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
23320 comparison_operator in B and S integer comparisons. Likewise, use
23321 ordered_comparison_operator instead of cmpib_comparison_operator in
23323 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
23325 2020-01-01 Jakub Jelinek <jakub@redhat.com>
23327 Update copyright years.
23329 * gcc.c (process_command): Update copyright notice dates.
23330 * gcov-dump.c (print_version): Ditto.
23331 * gcov.c (print_version): Ditto.
23332 * gcov-tool.c (print_version): Ditto.
23333 * gengtype.c (create_file): Ditto.
23334 * doc/cpp.texi: Bump @copying's copyright year.
23335 * doc/cppinternals.texi: Ditto.
23336 * doc/gcc.texi: Ditto.
23337 * doc/gccint.texi: Ditto.
23338 * doc/gcov.texi: Ditto.
23339 * doc/install.texi: Ditto.
23340 * doc/invoke.texi: Ditto.
23342 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
23344 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
23347 2020-01-01 Jakub Jelinek <jakub@redhat.com>
23349 PR tree-optimization/93098
23350 * match.pd (popcount): For shift amounts, use integer_onep
23351 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
23352 tests. Make sure that precision is power of two larger than or equal
23353 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
23354 instead of ULL suffixed constants. Formatting fixes.
23356 Copyright (C) 2020 Free Software Foundation, Inc.
23358 Copying and distribution of this file, with or without modification,
23359 are permitted in any medium without royalty provided the copyright
23360 notice and this notice are preserved.