x86: Tune Skylake, Cannonlake and Icelake as Haswell
[official-gcc.git] / gcc / testsuite / c-c++-common / pr80162-3.c
bloba600fde2a6b9bfd9e14727ad4953ec28781ff167
1 /* PR middle-end/80162 */
2 /* { dg-do compile { target { { i?86-*-* x86_64-*-* } && lp64 } } } */
3 /* { dg-options "-mavx2 -ffixed-xmm7" } */
5 typedef int V __attribute__ ((vector_size (32)));
6 register V u asm ("xmm7");
8 int *
9 foo (int i)
11 return &u[i]; /* { dg-error "address of \[^ \n\r]* register variable" } */
14 int *
15 bar (void)
17 return &u[5]; /* { dg-error "address of \[^ \n\r]* register variable" } */