1 /* Copyright (C) 2006, 2007 Free Software Foundation, Inc.
3 This file is free software; you can redistribute it and/or modify it under
4 the terms of the GNU General Public License as published by the Free
5 Software Foundation; either version 3 of the License, or (at your option)
8 This file is distributed in the hope that it will be useful, but WITHOUT
9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 You should have received a copy of the GNU General Public License
14 along with GCC; see the file COPYING3. If not see
15 <http://www.gnu.org/licenses/>. */
19 #define TARGET_CPU_CPP_BUILTINS() spu_cpu_cpp_builtins(pfile)
21 #define TARGET_VERSION fprintf (stderr, " (spu %s)", __DATE__);
23 #define OVERRIDE_OPTIONS spu_override_options()
24 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options()
26 #define OPTIMIZATION_OPTIONS(level,size) \
27 spu_optimization_options(level,size)
29 #define INIT_EXPANDERS spu_init_expanders()
31 extern int target_flags
;
32 extern const char *spu_fixed_range_string
;
34 /* Which processor to generate code or schedule for. */
41 extern GTY(()) int spu_arch
;
42 extern GTY(()) int spu_tune
;
44 /* Support for a compile-time default architecture and tuning. The rules are:
45 --with-arch is ignored if -march is specified.
46 --with-tune is ignored if -mtune is specified. */
47 #define OPTION_DEFAULT_SPECS \
48 {"arch", "%{!march=*:-march=%(VALUE)}" }, \
49 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
51 /* Default target_flags if no switches specified. */
52 #ifndef TARGET_DEFAULT
53 #define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS)
59 #define BITS_BIG_ENDIAN 1
61 #define BYTES_BIG_ENDIAN 1
63 #define WORDS_BIG_ENDIAN 1
65 #define BITS_PER_UNIT 8
67 /* GCC uses word_mode in many places, assuming that it is the fastest
68 integer mode. That is not the case for SPU though. We can't use
69 32 here because (of some reason I can't remember.) */
70 #define BITS_PER_WORD 128
72 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT)
74 /* We never actually change UNITS_PER_WORD, but defining this causes
75 libgcc to use some different sizes of types when compiling. */
76 #define MIN_UNITS_PER_WORD 4
78 #define POINTER_SIZE 32
80 #define PARM_BOUNDARY 128
82 #define STACK_BOUNDARY 128
84 /* We want it 8-byte aligned so we can properly use dual-issue
85 instructions, which can only happen on an 8-byte aligned address. */
86 #define FUNCTION_BOUNDARY 64
88 /* We would like to allow a larger alignment for data objects (for DMA)
89 but the aligned attribute is limited by BIGGEST_ALIGNMENT. We don't
90 define BIGGEST_ALIGNMENT as larger because it is used in other places
91 and would end up wasting space. (Is this still true?) */
92 #define BIGGEST_ALIGNMENT 128
94 #define MINIMUM_ATOMIC_ALIGNMENT 128
96 /* Make all static objects 16-byte aligned. This allows us to assume
97 they are also padded to 16-bytes, which means we can use a single
98 load or store instruction to access them. Do the same for objects
99 on the stack. (Except a bug (?) allows some stack objects to be
101 #define DATA_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
102 #define CONSTANT_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
103 #define LOCAL_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
105 #define EMPTY_FIELD_BOUNDARY 32
107 #define STRICT_ALIGNMENT 1
109 /* symbol_ref's of functions are not aligned to 16 byte boundary. */
110 #define ALIGNED_SYMBOL_REF_P(X) \
111 (GET_CODE (X) == SYMBOL_REF \
112 && (SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1) == 0 \
113 && (! SYMBOL_REF_FUNCTION_P (X) \
114 || align_functions >= 16))
116 #define PCC_BITFIELD_TYPE_MATTERS 1
118 #define MAX_FIXED_MODE_SIZE 128
120 #define STACK_SAVEAREA_MODE(save_level) \
121 (save_level == SAVE_FUNCTION ? VOIDmode \
122 : save_level == SAVE_NONLOCAL ? SImode \
125 #define STACK_SIZE_MODE SImode
130 #define INT_TYPE_SIZE 32
132 #define LONG_TYPE_SIZE 32
134 #define LONG_LONG_TYPE_SIZE 64
136 #define FLOAT_TYPE_SIZE 32
138 #define DOUBLE_TYPE_SIZE 64
140 #define LONG_DOUBLE_TYPE_SIZE 64
142 #define DEFAULT_SIGNED_CHAR 0
145 /* Register Basics */
147 /* 128-130 are special registers that never appear in assembly code. */
148 #define FIRST_PSEUDO_REGISTER 131
150 #define FIXED_REGISTERS { \
151 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
152 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
153 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
154 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
155 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
156 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
157 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
158 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
162 #define CALL_USED_REGISTERS { \
163 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
164 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
165 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
166 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
167 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
168 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
169 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
170 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
174 #define CONDITIONAL_REGISTER_USAGE \
175 spu_conditional_register_usage()
178 /* Values in Registers */
180 #define HARD_REGNO_NREGS(REGNO, MODE) \
181 ((GET_MODE_BITSIZE(MODE)+MAX_FIXED_MODE_SIZE-1)/MAX_FIXED_MODE_SIZE)
183 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
185 #define MODES_TIEABLE_P(MODE1, MODE2) \
186 (GET_MODE_BITSIZE (MODE1) <= MAX_FIXED_MODE_SIZE \
187 && GET_MODE_BITSIZE (MODE2) <= MAX_FIXED_MODE_SIZE)
190 /* Register Classes */
199 /* SPU is simple, it really only has one class of registers. */
200 #define IRA_COVER_CLASSES { GENERAL_REGS, LIM_REG_CLASSES }
202 #define N_REG_CLASSES (int) LIM_REG_CLASSES
204 #define REG_CLASS_NAMES \
210 #define REG_CLASS_CONTENTS { \
211 {0, 0, 0, 0, 0}, /* no regs */ \
212 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}, /* general regs */ \
213 {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}} /* all regs */
215 #define REGNO_REG_CLASS(REGNO) (GENERAL_REGS)
217 #define BASE_REG_CLASS GENERAL_REGS
219 #define INDEX_REG_CLASS GENERAL_REGS
221 #define REGNO_OK_FOR_BASE_P(regno) \
222 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
224 #define REGNO_OK_FOR_INDEX_P(regno) \
225 ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
227 #define INT_REG_OK_FOR_INDEX_P(X,STRICT) \
228 ((!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
229 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \
230 ((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
232 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
234 #define CLASS_MAX_NREGS(CLASS, MODE) \
235 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
237 /* GCC assumes that modes are in the lowpart of a register, which is
238 only true for SPU. */
239 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
240 ((GET_MODE_SIZE (FROM) > 4 || GET_MODE_SIZE (TO) > 4) \
241 && (GET_MODE_SIZE (FROM) < 16 || GET_MODE_SIZE (TO) < 16) \
242 && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
244 #define REGISTER_TARGET_PRAGMAS() do { \
245 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin; \
251 #define STACK_GROWS_DOWNWARD
253 #define STARTING_FRAME_OFFSET (0)
255 #define STACK_POINTER_OFFSET 32
257 #define FIRST_PARM_OFFSET(FNDECL) (0)
259 #define DYNAMIC_CHAIN_ADDRESS(FP) plus_constant ((FP), -16)
261 #define RETURN_ADDR_RTX(COUNT,FP) (spu_return_addr (COUNT, FP))
263 /* Should this be defined? Would it simplify our implementation. */
264 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */
266 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG(Pmode, LINK_REGISTER_REGNUM)
268 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM)
270 #define ARG_POINTER_CFA_OFFSET(FNDECL) (-STACK_POINTER_OFFSET)
275 /* We store the Available Stack Size in the second slot of the stack
276 register. We emit stack checking code during the prologue. */
277 #define STACK_CHECK_BUILTIN 1
280 /* Frame Registers, and other registers */
282 #define STACK_POINTER_REGNUM 1
284 /* Will be eliminated. */
285 #define FRAME_POINTER_REGNUM 128
287 /* This is not specified in any ABI, so could be set to anything. */
288 #define HARD_FRAME_POINTER_REGNUM 127
290 /* Will be eliminated. */
291 #define ARG_POINTER_REGNUM 129
293 #define STATIC_CHAIN_REGNUM 2
295 #define LINK_REGISTER_REGNUM 0
297 /* Used to keep track of instructions that have clobbered the hint
298 * buffer. Users can also specify it in inline asm. */
299 #define HBR_REGNUM 130
301 #define MAX_REGISTER_ARGS 72
302 #define FIRST_ARG_REGNUM 3
303 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + MAX_REGISTER_ARGS - 1)
305 #define MAX_REGISTER_RETURN 72
306 #define FIRST_RETURN_REGNUM 3
307 #define LAST_RETURN_REGNUM (FIRST_RETURN_REGNUM + MAX_REGISTER_RETURN - 1)
312 #define FRAME_POINTER_REQUIRED 0
314 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) ((DEPTH) = 0)
316 #define ELIMINABLE_REGS \
317 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
318 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
319 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
320 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
322 #define CAN_ELIMINATE(FROM,TO) 1
324 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
325 ((OFFSET) = spu_initial_elimination_offset((FROM),(TO)))
328 /* Stack Arguments */
330 #define ACCUMULATE_OUTGOING_ARGS 1
332 #define REG_PARM_STACK_SPACE(FNDECL) 0
334 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
336 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) (0)
339 /* Register Arguments */
341 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
342 (spu_function_arg((CUM),(MODE),(TYPE),(NAMED)))
344 #define CUMULATIVE_ARGS int
346 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
349 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
351 (TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST ? 1 \
352 : (MODE) == BLKmode ? ((int_size_in_bytes(TYPE)+15) / 16) \
353 : (MODE) == VOIDmode ? 1 \
354 : HARD_REGNO_NREGS(CUM,MODE))
356 #define FUNCTION_ARG_PADDING(MODE,TYPE) upward
358 #define PAD_VARARGS_DOWN 0
360 #define FUNCTION_ARG_REGNO_P(N) ((N) >= (FIRST_ARG_REGNUM) && (N) <= (LAST_ARG_REGNUM))
364 #define FUNCTION_VALUE(VALTYPE, FUNC) \
365 (spu_function_value((VALTYPE),(FUNC)))
367 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RETURN_REGNUM)
369 #define FUNCTION_VALUE_REGNO_P(N) ((N) >= (FIRST_RETURN_REGNUM) && (N) <= (LAST_RETURN_REGNUM))
372 /* Machine-specific symbol_ref flags. */
373 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
375 /* Aggregate Return */
377 #define DEFAULT_PCC_STRUCT_RETURN 0
382 #define EXIT_IGNORE_STACK 0
384 #define EPILOGUE_USES(REGNO) ((REGNO)==1 ? 1 : 0)
389 /* Nothing, for now. */
390 #define FUNCTION_PROFILER(FILE, LABELNO) \
391 fprintf (FILE, "\t\n")
396 #define TRAMPOLINE_SIZE (TARGET_LARGE_MEM ? 20 : 16)
398 #define TRAMPOLINE_ALIGNMENT 128
400 #define INITIALIZE_TRAMPOLINE(TRAMP,FNADDR,CXT) \
401 spu_initialize_trampoline(TRAMP,FNADDR,CXT)
404 /* Addressing Modes */
406 #define CONSTANT_ADDRESS_P(X) spu_constant_address_p(X)
408 #define MAX_REGS_PER_ADDRESS 2
411 # define REG_OK_STRICT_FLAG 1
413 # define REG_OK_STRICT_FLAG 0
416 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
417 { if (spu_legitimate_address (MODE, X, REG_OK_STRICT_FLAG)) \
421 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
422 { rtx result = spu_legitimize_address (X, OLDX, MODE); \
423 if (result != NULL_RTX) \
430 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
432 #define LEGITIMATE_CONSTANT_P(X) spu_legitimate_constant_p(X)
437 #define BRANCH_COST spu_branch_cost
439 #define SLOW_BYTE_ACCESS 0
441 #define MOVE_RATIO 32
443 #define NO_FUNCTION_CSE
448 #define TEXT_SECTION_ASM_OP ".text"
450 #define DATA_SECTION_ASM_OP ".data"
452 #define JUMP_TABLES_IN_TEXT_SECTION 1
456 #define PIC_OFFSET_TABLE_REGNUM 126
461 #define ASM_APP_ON ""
463 #define ASM_APP_OFF ""
465 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
466 do { fprintf (STREAM, "\t.file\t"); \
467 output_quoted_string (STREAM, NAME); \
468 fprintf (STREAM, "\n"); \
472 /* Uninitialized Data */
473 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
474 ( fputs (".comm ", (FILE)), \
475 assemble_name ((FILE), (NAME)), \
476 fprintf ((FILE), ",%d\n", (ROUNDED)))
478 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
479 ( fputs (".lcomm ", (FILE)), \
480 assemble_name ((FILE), (NAME)), \
481 fprintf ((FILE), ",%d\n", (ROUNDED)))
485 #define ASM_OUTPUT_LABEL(FILE,NAME) \
486 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
488 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
489 asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME))
492 /* Instruction Output */
493 #define REGISTER_NAMES \
494 {"$lr", "$sp", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
495 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \
496 "$32", "$33", "$34", "$35", "$36", "$37", "$38", "$39", "$40", "$41", "$42", "$43", "$44", "$45", "$46", "$47", \
497 "$48", "$49", "$50", "$51", "$52", "$53", "$54", "$55", "$56", "$57", "$58", "$59", "$60", "$61", "$62", "$63", \
498 "$64", "$65", "$66", "$67", "$68", "$69", "$70", "$71", "$72", "$73", "$74", "$75", "$76", "$77", "$78", "$79", \
499 "$80", "$81", "$82", "$83", "$84", "$85", "$86", "$87", "$88", "$89", "$90", "$91", "$92", "$93", "$94", "$95", \
500 "$96", "$97", "$98", "$99", "$100", "$101", "$102", "$103", "$104", "$105", "$106", "$107", "$108", "$109", "$110", "$111", \
501 "$112", "$113", "$114", "$115", "$116", "$117", "$118", "$119", "$120", "$121", "$122", "$123", "$124", "$125", "$126", "$127", \
502 "$vfp", "$vap", "hbr" \
505 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
507 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
508 print_operand_address (FILE, ADDR)
510 #define LOCAL_LABEL_PREFIX "."
512 #define USER_LABEL_PREFIX ""
515 /* Dispatch Tables */
517 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
518 fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
520 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
521 fprintf (FILE, "\t.word .L%d\n", VALUE)
524 /* Alignment Output */
526 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
527 do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0)
530 /* Model costs for the vectorizer. */
532 /* Cost of conditional branch. */
533 #ifndef TARG_COND_BRANCH_COST
534 #define TARG_COND_BRANCH_COST 6
537 /* Cost of any scalar operation, excluding load and store. */
538 #ifndef TARG_SCALAR_STMT_COST
539 #define TARG_SCALAR_STMT_COST 1
542 /* Cost of scalar load. */
543 #undef TARG_SCALAR_LOAD_COST
544 #define TARG_SCALAR_LOAD_COST 2 /* load + rotate */
546 /* Cost of scalar store. */
547 #undef TARG_SCALAR_STORE_COST
548 #define TARG_SCALAR_STORE_COST 10
550 /* Cost of any vector operation, excluding load, store,
551 or vector to scalar operation. */
552 #undef TARG_VEC_STMT_COST
553 #define TARG_VEC_STMT_COST 1
555 /* Cost of vector to scalar operation. */
556 #undef TARG_VEC_TO_SCALAR_COST
557 #define TARG_VEC_TO_SCALAR_COST 1
559 /* Cost of scalar to vector operation. */
560 #undef TARG_SCALAR_TO_VEC_COST
561 #define TARG_SCALAR_TO_VEC_COST 1
563 /* Cost of aligned vector load. */
564 #undef TARG_VEC_LOAD_COST
565 #define TARG_VEC_LOAD_COST 1
567 /* Cost of misaligned vector load. */
568 #undef TARG_VEC_UNALIGNED_LOAD_COST
569 #define TARG_VEC_UNALIGNED_LOAD_COST 2
571 /* Cost of vector store. */
572 #undef TARG_VEC_STORE_COST
573 #define TARG_VEC_STORE_COST 1
578 #define CASE_VECTOR_MODE SImode
582 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) ((INPREC) <= 32 && (OUTPREC) <= (INPREC))
584 #define STORE_FLAG_VALUE -1
588 #define FUNCTION_MODE QImode
590 #define NO_IMPLICIT_EXTERN_C 1
592 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
594 /* Canonicalize a comparison from one we don't have to one we do have. */
595 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
597 if (((CODE) == LE || (CODE) == LT || (CODE) == LEU || (CODE) == LTU)) \
602 (CODE) = swap_condition (CODE); \
606 /* These are set by the cmp patterns and used while expanding
607 conditional branches. */
608 extern GTY(()) rtx spu_compare_op0
;
609 extern GTY(()) rtx spu_compare_op1
;