1 /* Based on execute/simd-1.c, modified by joern.rennecke@st.com to
2 trigger a reload bug. Verified for gcc mainline from 20050722 13:00 UTC
4 /* { dg-options "-Wno-psabi" } */
5 /* { dg-add-options stack_size } */
8 #define STACK_SIZE (256*1024)
11 extern void abort (void);
12 extern void exit (int);
14 typedef struct { char c
[STACK_SIZE
/2]; } big_t
;
16 typedef int __attribute__((mode(SI
))) __attribute__((vector_size (8))) vecint
;
17 typedef int __attribute__((mode(SI
))) siint
;
19 vecint i
= { 150, 100 };
20 vecint j
= { 10, 13 };
29 verify (siint a1
, siint a2
, siint b1
, siint b2
, big_t big
)
40 vecint k0
, k1
, k2
, k3
, k4
, k5
, k6
, k7
;
45 verify (res
.i
[0], res
.i
[1], 160, 113, big
);
50 verify (res
.i
[0], res
.i
[1], 1500, 1300, big
);
53 /* This is the observed failure - reload 0 has the wrong type and thus the
54 conflict with reload 1 is missed:
56 (insn:HI 94 92 96 1 pr23135.c:46 (parallel [
57 (set (subreg:SI (reg:DI 253) 0)
60 (clobber (reg:SI 146 pr))
61 (clobber (reg:DF 64 fr0))
62 (clobber (reg:DF 66 fr2))
65 ]) 60 {divsi3_i4} (insn_list:REG_DEP_TRUE 90 (insn_list:REG_DEP_TRUE 89
66 (insn_list:REG_DEP_TRUE 42 (insn_list:REG_DEP_TRUE 83 (insn_list:REG_DEP_TRUE 92
67 (insn_list:REG_DEP_TRUE 91 (nil)))))))
68 (expr_list:REG_DEAD (reg:SI 4 r4)
69 (expr_list:REG_DEAD (reg:SI 5 r5)
70 (expr_list:REG_UNUSED (reg:DF 66 fr2)
71 (expr_list:REG_UNUSED (reg:DF 64 fr0)
72 (expr_list:REG_UNUSED (reg:SI 146 pr)
73 (insn_list:REG_RETVAL 91 (nil))))))))
76 Reload 0: reload_in (SI) = (plus:SI (reg/f:SI 14 r14)
77 (const_int 64 [0x40]))
78 GENERAL_REGS, RELOAD_FOR_OUTADDR_ADDRESS (opnum = 0)
79 reload_in_reg: (plus:SI (reg/f:SI 14 r14)
80 (const_int 64 [0x40]))
81 reload_reg_rtx: (reg:SI 3 r3)
82 Reload 1: GENERAL_REGS, RELOAD_FOR_OUTPUT_ADDRESS (opnum = 0), can't combine, se
84 reload_reg_rtx: (reg:SI 3 r3)
85 Reload 2: reload_out (SI) = (mem:SI (plus:SI (plus:SI (reg/f:SI 14 r14)
86 (const_int 64 [0x40]))
87 (const_int 28 [0x1c])) [ 16 S8 A32])
88 FPUL_REGS, RELOAD_FOR_OUTPUT (opnum = 0)
89 reload_out_reg: (subreg:SI (reg:DI 253) 0)
90 reload_reg_rtx: (reg:SI 150 fpul)
91 secondary_out_reload = 1
93 Reload 3: reload_in (SI) = (symbol_ref:SI ("__sdivsi3_i4") [flags 0x1])
94 GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 1), can't combine
95 reload_in_reg: (reg/f:SI 256)
96 reload_reg_rtx: (reg:SI 3 r3)
102 verify (res
.i
[0], res
.i
[1], 15, 7, big
);
107 verify (res
.i
[0], res
.i
[1], 2, 4, big
);
112 verify (res
.i
[0], res
.i
[1], 158, 109, big
);
117 verify (res
.i
[0], res
.i
[1], 156, 105, big
);
121 verify (res
.i
[0], res
.i
[1], -150, -100, big
);
125 verify (res
.i
[0], res
.i
[1], -151, -101, big
);
127 k
= k0
+ k1
+ k3
+ k4
+ k5
+ k6
+ k7
;
129 verify (res
.i
[0], res
.i
[1], 1675, 1430, big
);
131 k
= k0
* k1
* k3
* k4
* k5
* k6
* k7
;
133 verify (res
.i
[0], res
.i
[1], 1456467968, -1579586240, big
);
135 k
= k0
/ k1
/ k2
/ k3
/ k4
/ k5
/ k6
/ k7
;
137 verify (res
.i
[0], res
.i
[1], 0, 0, big
);