gcc/testsuite/gcc.target/sh/pr53988.c

   1 /* Check that the tst Rm,Rn instruction is generated for QImode and HImode
   2    values loaded from memory.  If everything goes as expected we won't see
   3    any sign/zero extensions or and ops.  On SH2A we don't expect to see the
   4    movu insn.  */
   5 /* { dg-do compile }  */
   6 /* { dg-options "-O1" } */
   7 /* { dg-final { scan-assembler-times "tst\tr" 8 } } */
   8 /* { dg-final { scan-assembler-not "tst\t#255" } } */
   9 /* { dg-final { scan-assembler-not "exts|extu|and|movu" } } */
  10
  11 int
  12 test00 (char* a, char* b, int c, int d)
  13 {
  14   if (*a & *b)
  15     return c;
  16   return d;
  17 }
  18
  19 int
  20 test01 (unsigned char* a, unsigned char* b, int c, int d)
  21 {
  22   if (*a & *b)
  23     return c;
  24   return d;
  25 }
  26
  27 int
  28 test02 (short* a, short* b, int c, int d)
  29 {
  30   if (*a & *b)
  31     return c;
  32   return d;
  33 }
  34
  35 int
  36 test03 (unsigned short* a, unsigned short* b, int c, int d)
  37 {
  38   if (*a & *b)
  39     return c;
  40   return d;
  41 }
  42
  43 int
  44 test04 (char* a, short* b, int c, int d)
  45 {
  46   if (*a & *b)
  47     return c;
  48   return d;
  49 }
  50
  51 int
  52 test05 (short* a, char* b, int c, int d)
  53 {
  54   if (*a & *b)
  55     return c;
  56   return d;
  57 }
  58
  59 int
  60 test06 (int* a, char* b, int c, int d)
  61 {
  62   if (*a & *b)
  63     return c;
  64   return d;
  65 }
  66
  67 int
  68 test07 (int* a, short* b, int c, int d)
  69 {
  70   if (*a & *b)
  71     return c;
  72   return d;
  73 }