1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
26 #include "insn-config.h"
28 #include "hard-reg-set.h"
33 #include "dominance.h"
35 #include "basic-block.h"
49 #include "diagnostic-core.h"
51 #include "addresses.h"
55 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
57 #define regno_save_mode \
58 (this_target_reload->x_regno_save_mode)
59 #define cached_reg_save_code \
60 (this_target_reload->x_cached_reg_save_code)
61 #define cached_reg_restore_code \
62 (this_target_reload->x_cached_reg_restore_code)
64 /* For each hard register, a place on the stack where it can be saved,
68 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
70 /* The number of elements in the subsequent array. */
71 static int save_slots_num
;
73 /* Allocated slots so far. */
74 static rtx save_slots
[FIRST_PSEUDO_REGISTER
];
76 /* Set of hard regs currently residing in save area (during insn scan). */
78 static HARD_REG_SET hard_regs_saved
;
80 /* Number of registers currently in hard_regs_saved. */
82 static int n_regs_saved
;
84 /* Computed by mark_referenced_regs, all regs referenced in a given
86 static HARD_REG_SET referenced_regs
;
89 typedef void refmarker_fn (rtx
*loc
, machine_mode mode
, int hardregno
,
92 static int reg_save_code (int, machine_mode
);
93 static int reg_restore_code (int, machine_mode
);
95 struct saved_hard_reg
;
96 static void initiate_saved_hard_regs (void);
97 static void new_saved_hard_reg (int, int);
98 static void finish_saved_hard_regs (void);
99 static int saved_hard_reg_compare_func (const void *, const void *);
101 static void mark_set_regs (rtx
, const_rtx
, void *);
102 static void mark_referenced_regs (rtx
*, refmarker_fn
*mark
, void *mark_arg
);
103 static refmarker_fn mark_reg_as_referenced
;
104 static refmarker_fn replace_reg_with_saved_mem
;
105 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
107 static int insert_restore (struct insn_chain
*, int, int, int,
109 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
111 static void add_stored_regs (rtx
, const_rtx
, void *);
115 static GTY(()) rtx savepat
;
116 static GTY(()) rtx restpat
;
117 static GTY(()) rtx test_reg
;
118 static GTY(()) rtx test_mem
;
119 static GTY(()) rtx_insn
*saveinsn
;
120 static GTY(()) rtx_insn
*restinsn
;
122 /* Return the INSN_CODE used to save register REG in mode MODE. */
124 reg_save_code (int reg
, machine_mode mode
)
127 if (cached_reg_save_code
[reg
][mode
])
128 return cached_reg_save_code
[reg
][mode
];
129 if (!HARD_REGNO_MODE_OK (reg
, mode
))
131 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
132 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
133 below silences a warning. */
134 gcc_assert (reg
< FIRST_PSEUDO_REGISTER
);
135 cached_reg_save_code
[reg
][mode
] = -1;
136 cached_reg_restore_code
[reg
][mode
] = -1;
140 /* Update the register number and modes of the register
141 and memory operand. */
142 set_mode_and_regno (test_reg
, mode
, reg
);
143 PUT_MODE (test_mem
, mode
);
145 /* Force re-recognition of the modified insns. */
146 INSN_CODE (saveinsn
) = -1;
147 INSN_CODE (restinsn
) = -1;
149 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
150 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
152 /* Now extract both insns and see if we can meet their
153 constraints. We don't know here whether the save and restore will
154 be in size- or speed-tuned code, so just use the set of enabled
156 ok
= (cached_reg_save_code
[reg
][mode
] != -1
157 && cached_reg_restore_code
[reg
][mode
] != -1);
160 extract_insn (saveinsn
);
161 ok
= constrain_operands (1, get_enabled_alternatives (saveinsn
));
162 extract_insn (restinsn
);
163 ok
&= constrain_operands (1, get_enabled_alternatives (restinsn
));
168 cached_reg_save_code
[reg
][mode
] = -1;
169 cached_reg_restore_code
[reg
][mode
] = -1;
171 gcc_assert (cached_reg_save_code
[reg
][mode
]);
172 return cached_reg_save_code
[reg
][mode
];
175 /* Return the INSN_CODE used to restore register REG in mode MODE. */
177 reg_restore_code (int reg
, machine_mode mode
)
179 if (cached_reg_restore_code
[reg
][mode
])
180 return cached_reg_restore_code
[reg
][mode
];
181 /* Populate our cache. */
182 reg_save_code (reg
, mode
);
183 return cached_reg_restore_code
[reg
][mode
];
186 /* Initialize for caller-save.
188 Look at all the hard registers that are used by a call and for which
189 reginfo.c has not already excluded from being used across a call.
191 Ensure that we can find a mode to save the register and that there is a
192 simple insn to save and restore the register. This latter check avoids
193 problems that would occur if we tried to save the MQ register of some
194 machines directly into memory. */
197 init_caller_save (void)
204 if (caller_save_initialized_p
)
207 caller_save_initialized_p
= true;
209 CLEAR_HARD_REG_SET (no_caller_save_reg_set
);
210 /* First find all the registers that we need to deal with and all
211 the modes that they can have. If we can't find a mode to use,
212 we can't have the register live over calls. */
214 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
216 if (call_used_regs
[i
]
217 && !TEST_HARD_REG_BIT (call_fixed_reg_set
, i
))
219 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
221 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
223 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
225 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
230 regno_save_mode
[i
][1] = VOIDmode
;
233 /* The following code tries to approximate the conditions under which
234 we can easily save and restore a register without scratch registers or
235 other complexities. It will usually work, except under conditions where
236 the validity of an insn operand is dependent on the address offset.
237 No such cases are currently known.
239 We first find a typical offset from some BASE_REG_CLASS register.
240 This address is chosen by finding the first register in the class
241 and by finding the smallest power of two that is a valid offset from
242 that register in every mode we will use to save registers. */
244 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
245 if (TEST_HARD_REG_BIT
247 [(int) base_reg_class (regno_save_mode
[i
][1], ADDR_SPACE_GENERIC
,
248 PLUS
, CONST_INT
)], i
))
251 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
253 addr_reg
= gen_rtx_REG (Pmode
, i
);
255 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
257 address
= gen_rtx_PLUS (Pmode
, addr_reg
, gen_int_mode (offset
, Pmode
));
259 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
260 if (regno_save_mode
[i
][1] != VOIDmode
261 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
264 if (i
== FIRST_PSEUDO_REGISTER
)
268 /* If we didn't find a valid address, we must use register indirect. */
272 /* Next we try to form an insn to save and restore the register. We
273 see if such an insn is recognized and meets its constraints.
275 To avoid lots of unnecessary RTL allocation, we construct all the RTL
276 once, then modify the memory and register operands in-place. */
278 test_reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
279 test_mem
= gen_rtx_MEM (word_mode
, address
);
280 savepat
= gen_rtx_SET (test_mem
, test_reg
);
281 restpat
= gen_rtx_SET (test_reg
, test_mem
);
283 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, savepat
, 0, -1, 0);
284 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, restpat
, 0, -1, 0);
286 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
287 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
288 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
290 regno_save_mode
[i
][j
] = VOIDmode
;
293 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
294 if (call_used_regs
[i
])
295 SET_HARD_REG_BIT (no_caller_save_reg_set
, i
);
302 /* Initialize save areas by showing that we haven't allocated any yet. */
305 init_save_areas (void)
309 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
310 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
311 regno_save_mem
[i
][j
] = 0;
316 /* The structure represents a hard register which should be saved
317 through the call. It is used when the integrated register
318 allocator (IRA) is used and sharing save slots is on. */
319 struct saved_hard_reg
321 /* Order number starting with 0. */
323 /* The hard regno. */
325 /* Execution frequency of all calls through which given hard
326 register should be saved. */
328 /* Stack slot reserved to save the hard register through calls. */
330 /* True if it is first hard register in the chain of hard registers
331 sharing the same stack slot. */
333 /* Order number of the next hard register structure with the same
334 slot in the chain. -1 represents end of the chain. */
338 /* Map: hard register number to the corresponding structure. */
339 static struct saved_hard_reg
*hard_reg_map
[FIRST_PSEUDO_REGISTER
];
341 /* The number of all structures representing hard registers should be
342 saved, in order words, the number of used elements in the following
344 static int saved_regs_num
;
346 /* Pointers to all the structures. Index is the order number of the
347 corresponding structure. */
348 static struct saved_hard_reg
*all_saved_regs
[FIRST_PSEUDO_REGISTER
];
350 /* First called function for work with saved hard registers. */
352 initiate_saved_hard_regs (void)
357 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
358 hard_reg_map
[i
] = NULL
;
361 /* Allocate and return new saved hard register with given REGNO and
364 new_saved_hard_reg (int regno
, int call_freq
)
366 struct saved_hard_reg
*saved_reg
;
369 = (struct saved_hard_reg
*) xmalloc (sizeof (struct saved_hard_reg
));
370 hard_reg_map
[regno
] = all_saved_regs
[saved_regs_num
] = saved_reg
;
371 saved_reg
->num
= saved_regs_num
++;
372 saved_reg
->hard_regno
= regno
;
373 saved_reg
->call_freq
= call_freq
;
374 saved_reg
->first_p
= FALSE
;
375 saved_reg
->next
= -1;
378 /* Free memory allocated for the saved hard registers. */
380 finish_saved_hard_regs (void)
384 for (i
= 0; i
< saved_regs_num
; i
++)
385 free (all_saved_regs
[i
]);
388 /* The function is used to sort the saved hard register structures
389 according their frequency. */
391 saved_hard_reg_compare_func (const void *v1p
, const void *v2p
)
393 const struct saved_hard_reg
*p1
= *(struct saved_hard_reg
* const *) v1p
;
394 const struct saved_hard_reg
*p2
= *(struct saved_hard_reg
* const *) v2p
;
396 if (flag_omit_frame_pointer
)
398 if (p1
->call_freq
- p2
->call_freq
!= 0)
399 return p1
->call_freq
- p2
->call_freq
;
401 else if (p2
->call_freq
- p1
->call_freq
!= 0)
402 return p2
->call_freq
- p1
->call_freq
;
404 return p1
->num
- p2
->num
;
407 /* Allocate save areas for any hard registers that might need saving.
408 We take a conservative approach here and look for call-clobbered hard
409 registers that are assigned to pseudos that cross calls. This may
410 overestimate slightly (especially if some of these registers are later
411 used as spill registers), but it should not be significant.
413 For IRA we use priority coloring to decrease stack slots needed for
414 saving hard registers through calls. We build conflicts for them
419 In the fallback case we should iterate backwards across all possible
420 modes for the save, choosing the largest available one instead of
421 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
423 We do not try to use "move multiple" instructions that exist
424 on some machines (such as the 68k moveml). It could be a win to try
425 and use them when possible. The hard part is doing it in a way that is
426 machine independent since they might be saving non-consecutive
427 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
430 setup_save_areas (void)
433 HARD_REG_SET hard_regs_used
;
434 struct saved_hard_reg
*saved_reg
;
436 struct insn_chain
*chain
, *next
;
438 HARD_REG_SET hard_regs_to_save
, used_regs
, this_insn_sets
;
439 reg_set_iterator rsi
;
441 CLEAR_HARD_REG_SET (hard_regs_used
);
443 /* Find every CALL_INSN and record which hard regs are live across the
444 call into HARD_REG_MAP and HARD_REGS_USED. */
445 initiate_saved_hard_regs ();
446 /* Create hard reg saved regs. */
447 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
454 || find_reg_note (insn
, REG_NORETURN
, NULL
))
456 freq
= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn
));
457 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
458 &chain
->live_throughout
);
459 get_call_reg_set_usage (insn
, &used_regs
, call_used_reg_set
);
461 /* Record all registers set in this call insn. These don't
462 need to be saved. N.B. the call insn might set a subreg
463 of a multi-hard-reg pseudo; then the pseudo is considered
464 live during the call, but the subreg that is set
466 CLEAR_HARD_REG_SET (this_insn_sets
);
467 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
468 /* Sibcalls are considered to set the return value. */
469 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
470 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
472 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
473 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
474 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
475 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
476 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
478 if (hard_reg_map
[regno
] != NULL
)
479 hard_reg_map
[regno
]->call_freq
+= freq
;
481 new_saved_hard_reg (regno
, freq
);
482 SET_HARD_REG_BIT (hard_regs_used
, regno
);
484 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
486 cheap
= XEXP (cheap
, 0);
487 /* Look through all live pseudos, mark their hard registers. */
488 EXECUTE_IF_SET_IN_REG_SET
489 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
491 int r
= reg_renumber
[regno
];
494 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
497 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
498 for (; r
< bound
; r
++)
499 if (TEST_HARD_REG_BIT (used_regs
, r
))
501 if (hard_reg_map
[r
] != NULL
)
502 hard_reg_map
[r
]->call_freq
+= freq
;
504 new_saved_hard_reg (r
, freq
);
505 SET_HARD_REG_BIT (hard_regs_to_save
, r
);
506 SET_HARD_REG_BIT (hard_regs_used
, r
);
511 /* If requested, figure out which hard regs can share save slots. */
512 if (optimize
&& flag_ira_share_save_slots
)
515 char *saved_reg_conflicts
;
517 struct saved_hard_reg
*saved_reg2
, *saved_reg3
;
518 int call_saved_regs_num
;
519 struct saved_hard_reg
*call_saved_regs
[FIRST_PSEUDO_REGISTER
];
521 int prev_save_slots_num
;
522 rtx prev_save_slots
[FIRST_PSEUDO_REGISTER
];
524 /* Find saved hard register conflicts. */
525 saved_reg_conflicts
= (char *) xmalloc (saved_regs_num
* saved_regs_num
);
526 memset (saved_reg_conflicts
, 0, saved_regs_num
* saved_regs_num
);
527 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
530 call_saved_regs_num
= 0;
534 || find_reg_note (insn
, REG_NORETURN
, NULL
))
537 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
539 cheap
= XEXP (cheap
, 0);
541 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
542 &chain
->live_throughout
);
543 get_call_reg_set_usage (insn
, &used_regs
, call_used_reg_set
);
545 /* Record all registers set in this call insn. These don't
546 need to be saved. N.B. the call insn might set a subreg
547 of a multi-hard-reg pseudo; then the pseudo is considered
548 live during the call, but the subreg that is set
550 CLEAR_HARD_REG_SET (this_insn_sets
);
551 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
552 /* Sibcalls are considered to set the return value,
553 compare df-scan.c:df_get_call_refs. */
554 if (SIBLING_CALL_P (insn
) && crtl
->return_rtx
)
555 mark_set_regs (crtl
->return_rtx
, NULL_RTX
, &this_insn_sets
);
557 AND_COMPL_HARD_REG_SET (used_regs
, call_fixed_reg_set
);
558 AND_COMPL_HARD_REG_SET (used_regs
, this_insn_sets
);
559 AND_HARD_REG_SET (hard_regs_to_save
, used_regs
);
560 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
561 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
563 gcc_assert (hard_reg_map
[regno
] != NULL
);
564 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[regno
];
566 /* Look through all live pseudos, mark their hard registers. */
567 EXECUTE_IF_SET_IN_REG_SET
568 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
570 int r
= reg_renumber
[regno
];
573 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
576 bound
= r
+ hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
577 for (; r
< bound
; r
++)
578 if (TEST_HARD_REG_BIT (used_regs
, r
))
579 call_saved_regs
[call_saved_regs_num
++] = hard_reg_map
[r
];
581 for (i
= 0; i
< call_saved_regs_num
; i
++)
583 saved_reg
= call_saved_regs
[i
];
584 for (j
= 0; j
< call_saved_regs_num
; j
++)
587 saved_reg2
= call_saved_regs
[j
];
588 saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
590 = saved_reg_conflicts
[saved_reg2
->num
* saved_regs_num
596 /* Sort saved hard regs. */
597 qsort (all_saved_regs
, saved_regs_num
, sizeof (struct saved_hard_reg
*),
598 saved_hard_reg_compare_func
);
599 /* Initiate slots available from the previous reload
601 prev_save_slots_num
= save_slots_num
;
602 memcpy (prev_save_slots
, save_slots
, save_slots_num
* sizeof (rtx
));
604 /* Allocate stack slots for the saved hard registers. */
605 for (i
= 0; i
< saved_regs_num
; i
++)
607 saved_reg
= all_saved_regs
[i
];
608 regno
= saved_reg
->hard_regno
;
609 for (j
= 0; j
< i
; j
++)
611 saved_reg2
= all_saved_regs
[j
];
612 if (! saved_reg2
->first_p
)
614 slot
= saved_reg2
->slot
;
615 for (k
= j
; k
>= 0; k
= next_k
)
617 saved_reg3
= all_saved_regs
[k
];
618 next_k
= saved_reg3
->next
;
619 if (saved_reg_conflicts
[saved_reg
->num
* saved_regs_num
624 && (GET_MODE_SIZE (regno_save_mode
[regno
][1])
625 <= GET_MODE_SIZE (regno_save_mode
626 [saved_reg2
->hard_regno
][1])))
630 (slot
, regno_save_mode
[saved_reg
->hard_regno
][1], 0);
631 regno_save_mem
[regno
][1] = saved_reg
->slot
;
632 saved_reg
->next
= saved_reg2
->next
;
633 saved_reg2
->next
= i
;
634 if (dump_file
!= NULL
)
635 fprintf (dump_file
, "%d uses slot of %d\n",
636 regno
, saved_reg2
->hard_regno
);
642 saved_reg
->first_p
= TRUE
;
643 for (best_slot_num
= -1, j
= 0; j
< prev_save_slots_num
; j
++)
645 slot
= prev_save_slots
[j
];
646 if (slot
== NULL_RTX
)
648 if (GET_MODE_SIZE (regno_save_mode
[regno
][1])
649 <= GET_MODE_SIZE (GET_MODE (slot
))
650 && best_slot_num
< 0)
652 if (GET_MODE (slot
) == regno_save_mode
[regno
][1])
655 if (best_slot_num
>= 0)
657 saved_reg
->slot
= prev_save_slots
[best_slot_num
];
661 regno_save_mode
[saved_reg
->hard_regno
][1], 0);
662 if (dump_file
!= NULL
)
664 "%d uses a slot from prev iteration\n", regno
);
665 prev_save_slots
[best_slot_num
] = NULL_RTX
;
666 if (best_slot_num
+ 1 == prev_save_slots_num
)
667 prev_save_slots_num
--;
672 = assign_stack_local_1
673 (regno_save_mode
[regno
][1],
674 GET_MODE_SIZE (regno_save_mode
[regno
][1]), 0,
676 if (dump_file
!= NULL
)
677 fprintf (dump_file
, "%d uses a new slot\n", regno
);
679 regno_save_mem
[regno
][1] = saved_reg
->slot
;
680 save_slots
[save_slots_num
++] = saved_reg
->slot
;
683 free (saved_reg_conflicts
);
684 finish_saved_hard_regs ();
688 /* We are not sharing slots.
690 Run through all the call-used hard-registers and allocate
691 space for each in the caller-save area. Try to allocate space
692 in a manner which allows multi-register saves/restores to be done. */
694 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
695 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
699 /* If no mode exists for this size, try another. Also break out
700 if we have already saved this hard register. */
701 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
704 /* See if any register in this group has been saved. */
705 for (k
= 0; k
< j
; k
++)
706 if (regno_save_mem
[i
+ k
][1])
714 for (k
= 0; k
< j
; k
++)
715 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
723 /* We have found an acceptable mode to store in. Since
724 hard register is always saved in the widest mode
725 available, the mode may be wider than necessary, it is
726 OK to reduce the alignment of spill space. We will
727 verify that it is equal to or greater than required
728 when we restore and save the hard register in
729 insert_restore and insert_save. */
731 = assign_stack_local_1 (regno_save_mode
[i
][j
],
732 GET_MODE_SIZE (regno_save_mode
[i
][j
]),
733 0, ASLK_REDUCE_ALIGN
);
735 /* Setup single word save area just in case... */
736 for (k
= 0; k
< j
; k
++)
737 /* This should not depend on WORDS_BIG_ENDIAN.
738 The order of words in regs is the same as in memory. */
739 regno_save_mem
[i
+ k
][1]
740 = adjust_address_nv (regno_save_mem
[i
][j
],
741 regno_save_mode
[i
+ k
][1],
746 /* Now loop again and set the alias set of any save areas we made to
747 the alias set used to represent frame objects. */
748 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
749 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
750 if (regno_save_mem
[i
][j
] != 0)
751 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
756 /* Find the places where hard regs are live across calls and save them. */
759 save_call_clobbered_regs (void)
761 struct insn_chain
*chain
, *next
, *last
= NULL
;
762 machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
764 /* Computed in mark_set_regs, holds all registers set by the current
766 HARD_REG_SET this_insn_sets
;
768 CLEAR_HARD_REG_SET (hard_regs_saved
);
771 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
773 rtx_insn
*insn
= chain
->insn
;
774 enum rtx_code code
= GET_CODE (insn
);
778 gcc_assert (!chain
->is_caller_save_insn
);
780 if (NONDEBUG_INSN_P (insn
))
782 /* If some registers have been saved, see if INSN references
783 any of them. We must restore them before the insn if so. */
788 HARD_REG_SET this_insn_sets
;
790 if (code
== JUMP_INSN
)
791 /* Restore all registers if this is a JUMP_INSN. */
792 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
795 CLEAR_HARD_REG_SET (referenced_regs
);
796 mark_referenced_regs (&PATTERN (insn
),
797 mark_reg_as_referenced
, NULL
);
798 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
801 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
802 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
803 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
,
805 /* If a saved register is set after the call, this means we no
806 longer should restore it. This can happen when parts of a
807 multi-word pseudo do not conflict with other pseudos, so
808 IRA may allocate the same hard register for both. One may
809 be live across the call, while the other is set
811 CLEAR_HARD_REG_SET (this_insn_sets
);
812 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
813 AND_COMPL_HARD_REG_SET (hard_regs_saved
, this_insn_sets
);
816 if (code
== CALL_INSN
817 && ! SIBLING_CALL_P (insn
)
818 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
821 HARD_REG_SET hard_regs_to_save
;
822 HARD_REG_SET call_def_reg_set
;
823 reg_set_iterator rsi
;
826 cheap
= find_reg_note (insn
, REG_RETURNED
, NULL
);
828 cheap
= XEXP (cheap
, 0);
830 /* Use the register life information in CHAIN to compute which
831 regs are live during the call. */
832 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
833 &chain
->live_throughout
);
834 /* Save hard registers always in the widest mode available. */
835 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
836 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
837 save_mode
[regno
] = regno_save_mode
[regno
][1];
839 save_mode
[regno
] = VOIDmode
;
841 /* Look through all live pseudos, mark their hard registers
842 and choose proper mode for saving. */
843 EXECUTE_IF_SET_IN_REG_SET
844 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
846 int r
= reg_renumber
[regno
];
850 if (r
< 0 || regno_reg_rtx
[regno
] == cheap
)
852 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
853 mode
= HARD_REGNO_CALLER_SAVE_MODE
854 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
855 if (GET_MODE_BITSIZE (mode
)
856 > GET_MODE_BITSIZE (save_mode
[r
]))
859 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
862 /* Record all registers set in this call insn. These don't need
863 to be saved. N.B. the call insn might set a subreg of a
864 multi-hard-reg pseudo; then the pseudo is considered live
865 during the call, but the subreg that is set isn't. */
866 CLEAR_HARD_REG_SET (this_insn_sets
);
867 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
869 /* Compute which hard regs must be saved before this call. */
870 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
871 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
872 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
873 get_call_reg_set_usage (insn
, &call_def_reg_set
,
875 AND_HARD_REG_SET (hard_regs_to_save
, call_def_reg_set
);
877 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
878 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
879 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
881 /* Must recompute n_regs_saved. */
883 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
884 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
888 && HARD_REGISTER_P (cheap
)
889 && TEST_HARD_REG_BIT (call_used_reg_set
, REGNO (cheap
)))
892 rtx pat
= PATTERN (insn
);
893 if (GET_CODE (pat
) == PARALLEL
)
894 pat
= XVECEXP (pat
, 0, 0);
895 dest
= SET_DEST (pat
);
896 /* For multiple return values dest is PARALLEL.
897 Currently we handle only single return value case. */
900 newpat
= gen_rtx_SET (cheap
, copy_rtx (dest
));
901 chain
= insert_one_insn (chain
, 0, -1, newpat
);
907 else if (DEBUG_INSN_P (insn
) && n_regs_saved
)
908 mark_referenced_regs (&PATTERN (insn
),
909 replace_reg_with_saved_mem
,
912 if (chain
->next
== 0 || chain
->next
->block
!= chain
->block
)
915 /* At the end of the basic block, we must restore any registers that
916 remain saved. If the last insn in the block is a JUMP_INSN, put
917 the restore before the insn, otherwise, put it after the insn. */
920 && DEBUG_INSN_P (insn
)
922 && last
->block
== chain
->block
)
924 rtx_insn
*ins
, *prev
;
925 basic_block bb
= BLOCK_FOR_INSN (insn
);
927 /* When adding hard reg restores after a DEBUG_INSN, move
928 all notes between last real insn and this DEBUG_INSN after
929 the DEBUG_INSN, otherwise we could get code
930 -g/-g0 differences. */
931 for (ins
= PREV_INSN (insn
); ins
!= last
->insn
; ins
= prev
)
933 prev
= PREV_INSN (ins
);
936 SET_NEXT_INSN (prev
) = NEXT_INSN (ins
);
937 SET_PREV_INSN (NEXT_INSN (ins
)) = prev
;
938 SET_PREV_INSN (ins
) = insn
;
939 SET_NEXT_INSN (ins
) = NEXT_INSN (insn
);
940 SET_NEXT_INSN (insn
) = ins
;
942 SET_PREV_INSN (NEXT_INSN (ins
)) = ins
;
943 if (BB_END (bb
) == insn
)
947 gcc_assert (DEBUG_INSN_P (ins
));
953 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
954 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
955 regno
+= insert_restore (chain
, JUMP_P (insn
),
956 regno
, MOVE_MAX_WORDS
, save_mode
);
961 /* Here from note_stores, or directly from save_call_clobbered_regs, when
962 an insn stores a value in a register.
963 Set the proper bit or bits in this_insn_sets. All pseudos that have
964 been assigned hard regs have had their register number changed already,
965 so we can ignore pseudos. */
967 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
969 int regno
, endregno
, i
;
970 HARD_REG_SET
*this_insn_sets
= (HARD_REG_SET
*) data
;
972 if (GET_CODE (reg
) == SUBREG
)
974 rtx inner
= SUBREG_REG (reg
);
975 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
977 regno
= subreg_regno (reg
);
978 endregno
= regno
+ subreg_nregs (reg
);
981 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
984 endregno
= END_REGNO (reg
);
989 for (i
= regno
; i
< endregno
; i
++)
990 SET_HARD_REG_BIT (*this_insn_sets
, i
);
993 /* Here from note_stores when an insn stores a value in a register.
994 Set the proper bit or bits in the passed regset. All pseudos that have
995 been assigned hard regs have had their register number changed already,
996 so we can ignore pseudos. */
998 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
1000 int regno
, endregno
, i
;
1001 machine_mode mode
= GET_MODE (reg
);
1004 if (GET_CODE (setter
) == CLOBBER
)
1007 if (GET_CODE (reg
) == SUBREG
1008 && REG_P (SUBREG_REG (reg
))
1009 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
1011 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
1012 GET_MODE (SUBREG_REG (reg
)),
1015 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
1016 endregno
= regno
+ subreg_nregs (reg
);
1020 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
1023 regno
= REGNO (reg
) + offset
;
1024 endregno
= end_hard_regno (mode
, regno
);
1027 for (i
= regno
; i
< endregno
; i
++)
1028 SET_REGNO_REG_SET ((regset
) data
, i
);
1031 /* Walk X and record all referenced registers in REFERENCED_REGS. */
1033 mark_referenced_regs (rtx
*loc
, refmarker_fn
*mark
, void *arg
)
1035 enum rtx_code code
= GET_CODE (*loc
);
1040 mark_referenced_regs (&SET_SRC (*loc
), mark
, arg
);
1041 if (code
== SET
|| code
== CLOBBER
)
1043 loc
= &SET_DEST (*loc
);
1044 code
= GET_CODE (*loc
);
1045 if ((code
== REG
&& REGNO (*loc
) < FIRST_PSEUDO_REGISTER
)
1046 || code
== PC
|| code
== CC0
1047 || (code
== SUBREG
&& REG_P (SUBREG_REG (*loc
))
1048 && REGNO (SUBREG_REG (*loc
)) < FIRST_PSEUDO_REGISTER
1049 /* If we're setting only part of a multi-word register,
1050 we shall mark it as referenced, because the words
1051 that are not being set should be restored. */
1052 && ((GET_MODE_SIZE (GET_MODE (*loc
))
1053 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
))))
1054 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc
)))
1055 <= UNITS_PER_WORD
))))
1058 if (code
== MEM
|| code
== SUBREG
)
1060 loc
= &XEXP (*loc
, 0);
1061 code
= GET_CODE (*loc
);
1066 int regno
= REGNO (*loc
);
1067 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
1068 : reg_renumber
[regno
]);
1071 mark (loc
, GET_MODE (*loc
), hardregno
, arg
);
1073 /* ??? Will we ever end up with an equiv expression in a debug
1074 insn, that would have required restoring a reg, or will
1075 reload take care of it for us? */
1077 /* If this is a pseudo that did not get a hard register, scan its
1078 memory location, since it might involve the use of another
1079 register, which might be saved. */
1080 else if (reg_equiv_mem (regno
) != 0)
1081 mark_referenced_regs (&XEXP (reg_equiv_mem (regno
), 0), mark
, arg
);
1082 else if (reg_equiv_address (regno
) != 0)
1083 mark_referenced_regs (®_equiv_address (regno
), mark
, arg
);
1087 fmt
= GET_RTX_FORMAT (code
);
1088 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1091 mark_referenced_regs (&XEXP (*loc
, i
), mark
, arg
);
1092 else if (fmt
[i
] == 'E')
1093 for (j
= XVECLEN (*loc
, i
) - 1; j
>= 0; j
--)
1094 mark_referenced_regs (&XVECEXP (*loc
, i
, j
), mark
, arg
);
1098 /* Parameter function for mark_referenced_regs() that adds registers
1099 present in the insn and in equivalent mems and addresses to
1103 mark_reg_as_referenced (rtx
*loc ATTRIBUTE_UNUSED
,
1106 void *arg ATTRIBUTE_UNUSED
)
1108 add_to_hard_reg_set (&referenced_regs
, mode
, hardregno
);
1111 /* Parameter function for mark_referenced_regs() that replaces
1112 registers referenced in a debug_insn that would have been restored,
1113 should it be a non-debug_insn, with their save locations. */
1116 replace_reg_with_saved_mem (rtx
*loc
,
1121 unsigned int i
, nregs
= hard_regno_nregs
[regno
][mode
];
1123 machine_mode
*save_mode
= (machine_mode
*)arg
;
1125 for (i
= 0; i
< nregs
; i
++)
1126 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1129 /* If none of the registers in the range would need restoring, we're
1135 if (!TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1139 && regno_save_mem
[regno
][nregs
])
1141 mem
= copy_rtx (regno_save_mem
[regno
][nregs
]);
1143 if (nregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
1144 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1146 if (GET_MODE (mem
) != mode
)
1148 /* This is gen_lowpart_if_possible(), but without validating
1149 the newly-formed address. */
1152 if (WORDS_BIG_ENDIAN
)
1153 offset
= (MAX (GET_MODE_SIZE (GET_MODE (mem
)), UNITS_PER_WORD
)
1154 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1155 if (BYTES_BIG_ENDIAN
)
1156 /* Adjust the address so that the address-after-the-data is
1158 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1159 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (mem
))));
1161 mem
= adjust_address_nv (mem
, mode
, offset
);
1166 mem
= gen_rtx_CONCATN (mode
, rtvec_alloc (nregs
));
1167 for (i
= 0; i
< nregs
; i
++)
1168 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ i
))
1170 gcc_assert (regno_save_mem
[regno
+ i
][1]);
1171 XVECEXP (mem
, 0, i
) = copy_rtx (regno_save_mem
[regno
+ i
][1]);
1175 machine_mode smode
= save_mode
[regno
];
1176 gcc_assert (smode
!= VOIDmode
);
1177 if (hard_regno_nregs
[regno
][smode
] > 1)
1178 smode
= mode_for_size (GET_MODE_SIZE (mode
) / nregs
,
1179 GET_MODE_CLASS (mode
), 0);
1180 XVECEXP (mem
, 0, i
) = gen_rtx_REG (smode
, regno
+ i
);
1184 gcc_assert (GET_MODE (mem
) == mode
);
1189 /* Insert a sequence of insns to restore. Place these insns in front of
1190 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1191 the maximum number of registers which should be restored during this call.
1192 It should never be less than 1 since we only work with entire registers.
1194 Note that we have verified in init_caller_save that we can do this
1195 with a simple SET, so use it. Set INSN_CODE to what we save there
1196 since the address might not be valid so the insn might not be recognized.
1197 These insns will be reloaded and have register elimination done by
1198 find_reload, so we need not worry about that here.
1200 Return the extra number of registers saved. */
1203 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
1204 int maxrestore
, machine_mode
*save_mode
)
1209 unsigned int numregs
= 0;
1210 struct insn_chain
*new_chain
;
1213 /* A common failure mode if register status is not correct in the
1214 RTL is for this routine to be called with a REGNO we didn't
1215 expect to save. That will cause us to write an insn with a (nil)
1216 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1217 later, check for this common case here instead. This will remove
1218 one step in debugging such problems. */
1219 gcc_assert (regno_save_mem
[regno
][1]);
1221 /* Get the pattern to emit and update our status.
1223 See if we can restore `maxrestore' registers at once. Work
1224 backwards to the single register case. */
1225 for (i
= maxrestore
; i
> 0; i
--)
1230 if (regno_save_mem
[regno
][i
] == 0)
1233 for (j
= 0; j
< i
; j
++)
1234 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
1239 /* Must do this one restore at a time. */
1247 mem
= regno_save_mem
[regno
][numregs
];
1248 if (save_mode
[regno
] != VOIDmode
1249 && save_mode
[regno
] != GET_MODE (mem
)
1250 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1251 /* Check that insn to restore REGNO in save_mode[regno] is
1253 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1254 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1256 mem
= copy_rtx (mem
);
1258 /* Verify that the alignment of spill space is equal to or greater
1260 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1261 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1263 pat
= gen_rtx_SET (gen_rtx_REG (GET_MODE (mem
), regno
), mem
);
1264 code
= reg_restore_code (regno
, GET_MODE (mem
));
1265 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1267 /* Clear status for all registers we restored. */
1268 for (k
= 0; k
< i
; k
++)
1270 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1271 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1275 /* Tell our callers how many extra registers we saved/restored. */
1279 /* Like insert_restore above, but save registers instead. */
1282 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
1283 HARD_REG_SET (*to_save
), machine_mode
*save_mode
)
1289 unsigned int numregs
= 0;
1290 struct insn_chain
*new_chain
;
1293 /* A common failure mode if register status is not correct in the
1294 RTL is for this routine to be called with a REGNO we didn't
1295 expect to save. That will cause us to write an insn with a (nil)
1296 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1297 later, check for this common case here. This will remove one
1298 step in debugging such problems. */
1299 gcc_assert (regno_save_mem
[regno
][1]);
1301 /* Get the pattern to emit and update our status.
1303 See if we can save several registers with a single instruction.
1304 Work backwards to the single register case. */
1305 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
1309 if (regno_save_mem
[regno
][i
] == 0)
1312 for (j
= 0; j
< i
; j
++)
1313 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
1318 /* Must do this one save at a time. */
1326 mem
= regno_save_mem
[regno
][numregs
];
1327 if (save_mode
[regno
] != VOIDmode
1328 && save_mode
[regno
] != GET_MODE (mem
)
1329 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]]
1330 /* Check that insn to save REGNO in save_mode[regno] is
1332 && reg_save_code (regno
, save_mode
[regno
]) >= 0)
1333 mem
= adjust_address_nv (mem
, save_mode
[regno
], 0);
1335 mem
= copy_rtx (mem
);
1337 /* Verify that the alignment of spill space is equal to or greater
1339 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT
,
1340 GET_MODE_ALIGNMENT (GET_MODE (mem
))) <= MEM_ALIGN (mem
));
1342 pat
= gen_rtx_SET (mem
, gen_rtx_REG (GET_MODE (mem
), regno
));
1343 code
= reg_save_code (regno
, GET_MODE (mem
));
1344 new_chain
= insert_one_insn (chain
, before_p
, code
, pat
);
1346 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1347 for (k
= 0; k
< numregs
; k
++)
1349 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
1350 SET_REGNO_REG_SET (&new_chain
->dead_or_set
, regno
+ k
);
1354 /* Tell our callers how many extra registers we saved/restored. */
1358 /* A note_uses callback used by insert_one_insn. Add the hard-register
1359 equivalent of each REG to regset DATA. */
1362 add_used_regs (rtx
*loc
, void *data
)
1364 subrtx_iterator::array_type array
;
1365 FOR_EACH_SUBRTX (iter
, array
, *loc
, NONCONST
)
1367 const_rtx x
= *iter
;
1370 unsigned int regno
= REGNO (x
);
1371 if (HARD_REGISTER_NUM_P (regno
))
1372 bitmap_set_range ((regset
) data
, regno
,
1373 hard_regno_nregs
[regno
][GET_MODE (x
)]);
1375 gcc_checking_assert (reg_renumber
[regno
] < 0);
1380 /* Emit a new caller-save insn and set the code. */
1381 static struct insn_chain
*
1382 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
1384 rtx_insn
*insn
= chain
->insn
;
1385 struct insn_chain
*new_chain
;
1387 /* If INSN references CC0, put our insns in front of the insn that sets
1388 CC0. This is always safe, since the only way we could be passed an
1389 insn that references CC0 is for a restore, and doing a restore earlier
1390 isn't a problem. We do, however, assume here that CALL_INSNs don't
1391 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1393 if (HAVE_cc0
&& (NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
1395 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
1396 chain
= chain
->prev
, insn
= chain
->insn
;
1398 new_chain
= new_insn_chain ();
1403 new_chain
->prev
= chain
->prev
;
1404 if (new_chain
->prev
!= 0)
1405 new_chain
->prev
->next
= new_chain
;
1407 reload_insn_chain
= new_chain
;
1409 chain
->prev
= new_chain
;
1410 new_chain
->next
= chain
;
1411 new_chain
->insn
= emit_insn_before (pat
, insn
);
1412 /* ??? It would be nice if we could exclude the already / still saved
1413 registers from the live sets. */
1414 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1415 note_uses (&PATTERN (chain
->insn
), add_used_regs
,
1416 &new_chain
->live_throughout
);
1417 /* If CHAIN->INSN is a call, then the registers which contain
1418 the arguments to the function are live in the new insn. */
1419 if (CALL_P (chain
->insn
))
1420 for (link
= CALL_INSN_FUNCTION_USAGE (chain
->insn
);
1422 link
= XEXP (link
, 1))
1423 note_uses (&XEXP (link
, 0), add_used_regs
,
1424 &new_chain
->live_throughout
);
1426 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1427 if (chain
->insn
== BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1428 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1432 new_chain
->next
= chain
->next
;
1433 if (new_chain
->next
!= 0)
1434 new_chain
->next
->prev
= new_chain
;
1435 chain
->next
= new_chain
;
1436 new_chain
->prev
= chain
;
1437 new_chain
->insn
= emit_insn_after (pat
, insn
);
1438 /* ??? It would be nice if we could exclude the already / still saved
1439 registers from the live sets, and observe REG_UNUSED notes. */
1440 COPY_REG_SET (&new_chain
->live_throughout
, &chain
->live_throughout
);
1441 /* Registers that are set in CHAIN->INSN live in the new insn.
1442 (Unless there is a REG_UNUSED note for them, but we don't
1443 look for them here.) */
1444 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
1445 &new_chain
->live_throughout
);
1446 CLEAR_REG_SET (&new_chain
->dead_or_set
);
1447 if (chain
->insn
== BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)))
1448 BB_END (BASIC_BLOCK_FOR_FN (cfun
, chain
->block
)) = new_chain
->insn
;
1450 new_chain
->block
= chain
->block
;
1451 new_chain
->is_caller_save_insn
= 1;
1453 INSN_CODE (new_chain
->insn
) = code
;
1456 #include "gt-caller-save.h"