[ARM/AArch64][testsuite] Add vmlal_n and vmlsl_n tests.
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / advsimd-intrinsics / vqneg.c
blob942eba871f061fce768bf9da55f83f652ad13815
1 #define INSN_NAME vqneg
2 #define TEST_MSG "VQNEG/VQNEGQ"
4 /* Extra tests for functions requiring corner cases tests */
5 void vqneg_extra(void);
6 #define EXTRA_TESTS vqneg_extra
8 #include "unary_sat_op.inc"
10 /* Expected results. */
11 VECT_VAR_DECL(expected,int,8,8) [] = { 0x10, 0xf, 0xe, 0xd, 0xc, 0xb, 0xa, 0x9 };
12 VECT_VAR_DECL(expected,int,16,4) [] = { 0x10, 0xf, 0xe, 0xd };
13 VECT_VAR_DECL(expected,int,32,2) [] = { 0x10, 0xf };
14 VECT_VAR_DECL(expected,int,64,1) [] = { 0x3333333333333333 };
15 VECT_VAR_DECL(expected,uint,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
16 0x33, 0x33, 0x33, 0x33 };
17 VECT_VAR_DECL(expected,uint,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
18 VECT_VAR_DECL(expected,uint,32,2) [] = { 0x33333333, 0x33333333 };
19 VECT_VAR_DECL(expected,uint,64,1) [] = { 0x3333333333333333 };
20 VECT_VAR_DECL(expected,poly,8,8) [] = { 0x33, 0x33, 0x33, 0x33,
21 0x33, 0x33, 0x33, 0x33 };
22 VECT_VAR_DECL(expected,poly,16,4) [] = { 0x3333, 0x3333, 0x3333, 0x3333 };
23 VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x33333333, 0x33333333 };
24 VECT_VAR_DECL(expected,int,8,16) [] = { 0x10, 0xf, 0xe, 0xd,
25 0xc, 0xb, 0xa, 0x9,
26 0x8, 0x7, 0x6, 0x5,
27 0x4, 0x3, 0x2, 0x1 };
28 VECT_VAR_DECL(expected,int,16,8) [] = { 0x10, 0xf, 0xe, 0xd,
29 0xc, 0xb, 0xa, 0x9 };
30 VECT_VAR_DECL(expected,int,32,4) [] = { 0x10, 0xf, 0xe, 0xd };
31 VECT_VAR_DECL(expected,int,64,2) [] = { 0x3333333333333333, 0x3333333333333333 };
32 VECT_VAR_DECL(expected,uint,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
33 0x33, 0x33, 0x33, 0x33,
34 0x33, 0x33, 0x33, 0x33,
35 0x33, 0x33, 0x33, 0x33 };
36 VECT_VAR_DECL(expected,uint,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
37 0x3333, 0x3333, 0x3333, 0x3333 };
38 VECT_VAR_DECL(expected,uint,32,4) [] = { 0x33333333, 0x33333333,
39 0x33333333, 0x33333333 };
40 VECT_VAR_DECL(expected,uint,64,2) [] = { 0x3333333333333333,
41 0x3333333333333333 };
42 VECT_VAR_DECL(expected,poly,8,16) [] = { 0x33, 0x33, 0x33, 0x33,
43 0x33, 0x33, 0x33, 0x33,
44 0x33, 0x33, 0x33, 0x33,
45 0x33, 0x33, 0x33, 0x33 };
46 VECT_VAR_DECL(expected,poly,16,8) [] = { 0x3333, 0x3333, 0x3333, 0x3333,
47 0x3333, 0x3333, 0x3333, 0x3333 };
48 VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x33333333, 0x33333333,
49 0x33333333, 0x33333333 };
51 /* Expected values of cumulative_saturation flag. */
52 int VECT_VAR(expected_cumulative_sat,int,8,8) = 0;
53 int VECT_VAR(expected_cumulative_sat,int,16,4) = 0;
54 int VECT_VAR(expected_cumulative_sat,int,32,2) = 0;
55 int VECT_VAR(expected_cumulative_sat,int,8,16) = 0;
56 int VECT_VAR(expected_cumulative_sat,int,16,8) = 0;
57 int VECT_VAR(expected_cumulative_sat,int,32,4) = 0;
59 /* Expected results when input is the min negative value of the type. */
60 VECT_VAR_DECL(expected_min_neg,int,8,8) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
61 0x7f, 0x7f, 0x7f, 0x7f };
62 VECT_VAR_DECL(expected_min_neg,int,16,4) [] = { 0x7fff, 0x7fff,
63 0x7fff, 0x7fff };
64 VECT_VAR_DECL(expected_min_neg,int,32,2) [] = { 0x7fffffff, 0x7fffffff };
65 VECT_VAR_DECL(expected_min_neg,int,8,16) [] = { 0x7f, 0x7f, 0x7f, 0x7f,
66 0x7f, 0x7f, 0x7f, 0x7f,
67 0x7f, 0x7f, 0x7f, 0x7f,
68 0x7f, 0x7f, 0x7f, 0x7f };
69 VECT_VAR_DECL(expected_min_neg,int,16,8) [] = { 0x7fff, 0x7fff,
70 0x7fff, 0x7fff,
71 0x7fff, 0x7fff,
72 0x7fff, 0x7fff };
73 VECT_VAR_DECL(expected_min_neg,int,32,4) [] = { 0x7fffffff, 0x7fffffff,
74 0x7fffffff, 0x7fffffff };
76 /* Expected values of cumulative_saturation flag when input is the min
77 negative value of the type. */
78 int VECT_VAR(expected_cumulative_sat_min_neg,int,8,8) = 1;
79 int VECT_VAR(expected_cumulative_sat_min_neg,int,16,4) = 1;
80 int VECT_VAR(expected_cumulative_sat_min_neg,int,32,2) = 1;
81 int VECT_VAR(expected_cumulative_sat_min_neg,int,8,16) = 1;
82 int VECT_VAR(expected_cumulative_sat_min_neg,int,16,8) = 1;
83 int VECT_VAR(expected_cumulative_sat_min_neg,int,32,4) = 1;
85 void vqneg_extra()
87 /* No need for 64 bits variants. */
88 DECL_VARIABLE(vector, int, 8, 8);
89 DECL_VARIABLE(vector, int, 16, 4);
90 DECL_VARIABLE(vector, int, 32, 2);
91 DECL_VARIABLE(vector, int, 8, 16);
92 DECL_VARIABLE(vector, int, 16, 8);
93 DECL_VARIABLE(vector, int, 32, 4);
95 DECL_VARIABLE(vector_res, int, 8, 8);
96 DECL_VARIABLE(vector_res, int, 16, 4);
97 DECL_VARIABLE(vector_res, int, 32, 2);
98 DECL_VARIABLE(vector_res, int, 8, 16);
99 DECL_VARIABLE(vector_res, int, 16, 8);
100 DECL_VARIABLE(vector_res, int, 32, 4);
102 clean_results ();
104 /* Initialize input "vector" with min negative values to check
105 saturation. */
106 VDUP(vector, , int, s, 8, 8, 0x80);
107 VDUP(vector, , int, s, 16, 4, 0x8000);
108 VDUP(vector, , int, s, 32, 2, 0x80000000);
109 VDUP(vector, q, int, s, 8, 16, 0x80);
110 VDUP(vector, q, int, s, 16, 8, 0x8000);
111 VDUP(vector, q, int, s, 32, 4, 0x80000000);
113 #define MSG "min negative input"
114 TEST_UNARY_SAT_OP(INSN_NAME, , int, s, 8, 8, expected_cumulative_sat_min_neg, MSG);
115 TEST_UNARY_SAT_OP(INSN_NAME, , int, s, 16, 4, expected_cumulative_sat_min_neg, MSG);
116 TEST_UNARY_SAT_OP(INSN_NAME, , int, s, 32, 2, expected_cumulative_sat_min_neg, MSG);
117 TEST_UNARY_SAT_OP(INSN_NAME, q, int, s, 8, 16, expected_cumulative_sat_min_neg, MSG);
118 TEST_UNARY_SAT_OP(INSN_NAME, q, int, s, 16, 8, expected_cumulative_sat_min_neg, MSG);
119 TEST_UNARY_SAT_OP(INSN_NAME, q, int, s, 32, 4, expected_cumulative_sat_min_neg, MSG);
121 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected_min_neg, MSG);
122 CHECK(TEST_MSG, int, 16, 4, PRIx8, expected_min_neg, MSG);
123 CHECK(TEST_MSG, int, 32, 2, PRIx8, expected_min_neg, MSG);
124 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected_min_neg, MSG);
125 CHECK(TEST_MSG, int, 16, 8, PRIx8, expected_min_neg, MSG);
126 CHECK(TEST_MSG, int, 32, 4, PRIx8, expected_min_neg, MSG);