2 /* { dg-require-effective-target arm_neon_ok } */
3 /* { dg-require-effective-target arm_neon_hw } */
4 /* { dg-require-effective-target arm_little_endian } */
5 /* { dg-options "-O2" } */
6 /* { dg-add-options arm_neon } */
13 tst_vext_u8 (uint8x8_t __a
, uint8x8_t __b
)
15 uint8x8_t __mask1
= {2, 3, 4, 5, 6, 7, 8, 9};
17 return __builtin_shuffle ( __a
, __b
, __mask1
) ;
21 tst_vext_u8_rotate (uint8x8_t __a
)
23 uint8x8_t __mask1
= {2, 3, 4, 5, 6, 7, 0, 1};
24 return __builtin_shuffle ( __a
, __mask1
) ;
28 tst_vext_u16 (uint16x4_t __a
, uint16x4_t __b
)
30 uint16x4_t __mask1
= {2, 3, 4, 5};
31 return __builtin_shuffle ( __a
, __b
, __mask1
) ;
35 tst_vext_u16_rotate (uint16x4_t __a
)
37 uint16x4_t __mask1
= {2, 3, 0, 1};
38 return __builtin_shuffle ( __a
, __mask1
) ;
42 tst_vext_u32 (uint32x2_t __a
, uint32x2_t __b
)
44 uint32x2_t __mask1
= {1, 2};
45 return __builtin_shuffle ( __a
, __b
, __mask1
) ;
48 /* This one is mapped into vrev64.32. */
50 tst_vext_u32_rotate (uint32x2_t __a
)
52 uint32x2_t __mask1
= {1, 0};
53 return __builtin_shuffle ( __a
, __mask1
) ;
57 tst_vextq_u8 (uint8x16_t __a
, uint8x16_t __b
)
59 uint8x16_t __mask1
= {4, 5, 6, 7, 8, 9, 10, 11,
60 12, 13, 14, 15, 16, 17, 18, 19};
61 return __builtin_shuffle ( __a
, __b
, __mask1
) ;
65 tst_vextq_u8_rotate (uint8x16_t __a
)
67 uint8x16_t __mask1
= {4, 5, 6, 7, 8, 9, 10, 11,
68 12, 13, 14, 15, 0, 1, 2, 3};
69 return __builtin_shuffle ( __a
, __mask1
) ;
73 tst_vextq_u16 (uint16x8_t __a
, uint16x8_t __b
)
75 uint16x8_t __mask1
= {2, 3, 4, 5, 6, 7, 8, 9};
76 return __builtin_shuffle ( __a
, __b
, __mask1
) ;
80 tst_vextq_u16_rotate (uint16x8_t __a
)
82 uint16x8_t __mask1
= {2, 3, 4, 5, 6, 7, 0, 1};
83 return __builtin_shuffle ( __a
, __mask1
) ;
87 tst_vextq_u32 (uint32x4_t __a
, uint32x4_t __b
)
89 uint32x4_t __mask1
= {1, 2, 3, 4};
90 return __builtin_shuffle ( __a
, __b
, __mask1
) ;
94 tst_vextq_u32_rotate (uint32x4_t __a
)
96 uint32x4_t __mask1
= {1, 2, 3, 0};
97 return __builtin_shuffle ( __a
, __mask1
) ;
101 tst_vextq_u64 (uint64x2_t __a
, uint64x2_t __b
)
103 uint64x2_t __mask1
= {1, 2};
104 return __builtin_shuffle ( __a
, __b
, __mask1
) ;
108 tst_vextq_u64_rotate (uint64x2_t __a
)
110 uint64x2_t __mask1
= {1, 0};
111 return __builtin_shuffle ( __a
, __mask1
) ;
116 uint8_t arr_u8x8
[] = {0, 1, 2, 3, 4, 5, 6, 7};
117 uint8_t arr2_u8x8
[] = {8, 9, 10, 11, 12, 13, 14, 15};
118 uint16_t arr_u16x4
[] = {0, 1, 2, 3};
119 uint16_t arr2_u16x4
[] = {4, 5, 6, 7};
120 uint32_t arr_u32x2
[] = {0, 1};
121 uint32_t arr2_u32x2
[] = {2, 3};
122 uint8_t arr_u8x16
[] = {0, 1, 2, 3, 4, 5, 6, 7,
123 8, 9, 10, 11, 12, 13, 14, 15};
124 uint8_t arr2_u8x16
[] = {16, 17, 18, 19, 20, 21, 22, 23,
125 24, 25, 26, 27, 28, 29, 30, 31};
126 uint16_t arr_u16x8
[] = {0, 1, 2, 3, 4, 5, 6, 7};
127 uint16_t arr2_u16x8
[] = {8, 9, 10, 11, 12, 13, 14, 15};
128 uint32_t arr_u32x4
[] = {0, 1, 2, 3};
129 uint32_t arr2_u32x4
[] = {4, 5, 6, 7};
130 uint64_t arr_u64x2
[] = {0, 1};
131 uint64_t arr2_u64x2
[] = {2, 3};
133 uint8_t expected_u8x8
[] = {2, 3, 4, 5, 6, 7, 8, 9};
134 uint8_t expected_rot_u8x8
[] = {2, 3, 4, 5, 6, 7, 0, 1};
135 uint16_t expected_u16x4
[] = {2, 3, 4, 5};
136 uint16_t expected_rot_u16x4
[] = {2, 3, 0, 1};
137 uint32_t expected_u32x2
[] = {1, 2};
138 uint32_t expected_rot_u32x2
[] = {1, 0};
139 uint8_t expected_u8x16
[] = {4, 5, 6, 7, 8, 9, 10, 11,
140 12, 13, 14, 15, 16, 17, 18, 19};
141 uint8_t expected_rot_u8x16
[] = {4, 5, 6, 7, 8, 9, 10, 11,
142 12, 13, 14, 15, 0, 1, 2, 3,};
143 uint16_t expected_u16x8
[] = {2, 3, 4, 5, 6, 7, 8, 9};
144 uint16_t expected_rot_u16x8
[] = {2, 3, 4, 5, 6, 7, 0, 1};
145 uint32_t expected_u32x4
[] = {1, 2, 3, 4};
146 uint32_t expected_rot_u32x4
[] = {1, 2, 3, 0};
147 uint64_t expected_u64x2
[] = {1, 2};
148 uint64_t expected_rot_u64x2
[] = {1, 0};
150 uint8x8_t vec_u8x8
= vld1_u8 (arr_u8x8
);
151 uint8x8_t vec2_u8x8
= vld1_u8 (arr2_u8x8
);
152 uint16x4_t vec_u16x4
= vld1_u16 (arr_u16x4
);
153 uint16x4_t vec2_u16x4
= vld1_u16 (arr2_u16x4
);
154 uint32x2_t vec_u32x2
= vld1_u32 (arr_u32x2
);
155 uint32x2_t vec2_u32x2
= vld1_u32 (arr2_u32x2
);
156 uint8x16_t vec_u8x16
= vld1q_u8 (arr_u8x16
);
157 uint8x16_t vec2_u8x16
= vld1q_u8 (arr2_u8x16
);
158 uint16x8_t vec_u16x8
= vld1q_u16 (arr_u16x8
);
159 uint16x8_t vec2_u16x8
= vld1q_u16 (arr2_u16x8
);
160 uint32x4_t vec_u32x4
= vld1q_u32 (arr_u32x4
);
161 uint32x4_t vec2_u32x4
= vld1q_u32 (arr2_u32x4
);
162 uint64x2_t vec_u64x2
= vld1q_u64 (arr_u64x2
);
163 uint64x2_t vec2_u64x2
= vld1q_u64 (arr2_u64x2
);
165 uint8x8_t result_u8x8
;
166 uint16x4_t result_u16x4
;
167 uint32x2_t result_u32x2
;
168 uint8x16_t result_u8x16
;
169 uint16x8_t result_u16x8
;
170 uint32x4_t result_u32x4
;
171 uint64x2_t result_u64x2
;
173 union {uint8x8_t v
; uint8_t buf
[8];} mem_u8x8
;
174 union {uint16x4_t v
; uint16_t buf
[4];} mem_u16x4
;
175 union {uint32x2_t v
; uint32_t buf
[2];} mem_u32x2
;
176 union {uint8x16_t v
; uint8_t buf
[16];} mem_u8x16
;
177 union {uint16x8_t v
; uint16_t buf
[8];} mem_u16x8
;
178 union {uint32x4_t v
; uint32_t buf
[4];} mem_u32x4
;
179 union {uint64x2_t v
; uint64_t buf
[2];} mem_u64x2
;
183 result_u8x8
= tst_vext_u8 (vec_u8x8
, vec2_u8x8
);
184 vst1_u8 (mem_u8x8
.buf
, result_u8x8
);
187 if (mem_u8x8
.buf
[i
] != expected_u8x8
[i
])
189 printf ("tst_vext_u8[%d]=%d expected %d\n",
190 i
, mem_u8x8
.buf
[i
], expected_u8x8
[i
]);
194 result_u8x8
= tst_vext_u8_rotate (vec_u8x8
);
195 vst1_u8 (mem_u8x8
.buf
, result_u8x8
);
198 if (mem_u8x8
.buf
[i
] != expected_rot_u8x8
[i
])
200 printf ("tst_vext_u8_rotate[%d]=%d expected %d\n",
201 i
, mem_u8x8
.buf
[i
], expected_rot_u8x8
[i
]);
206 result_u16x4
= tst_vext_u16 (vec_u16x4
, vec2_u16x4
);
207 vst1_u16 (mem_u16x4
.buf
, result_u16x4
);
210 if (mem_u16x4
.buf
[i
] != expected_u16x4
[i
])
212 printf ("tst_vext_u16[%d]=%d expected %d\n",
213 i
, mem_u16x4
.buf
[i
], expected_u16x4
[i
]);
217 result_u16x4
= tst_vext_u16_rotate (vec_u16x4
);
218 vst1_u16 (mem_u16x4
.buf
, result_u16x4
);
221 if (mem_u16x4
.buf
[i
] != expected_rot_u16x4
[i
])
223 printf ("tst_vext_u16_rotate[%d]=%d expected %d\n",
224 i
, mem_u16x4
.buf
[i
], expected_rot_u16x4
[i
]);
229 result_u32x2
= tst_vext_u32 (vec_u32x2
, vec2_u32x2
);
230 vst1_u32 (mem_u32x2
.buf
, result_u32x2
);
233 if (mem_u32x2
.buf
[i
] != expected_u32x2
[i
])
235 printf ("tst_vext_u32[%d]=%d expected %d\n",
236 i
, mem_u32x2
.buf
[i
], expected_u32x2
[i
]);
240 result_u32x2
= tst_vext_u32_rotate (vec_u32x2
);
241 vst1_u32 (mem_u32x2
.buf
, result_u32x2
);
244 if (mem_u32x2
.buf
[i
] != expected_rot_u32x2
[i
])
246 printf ("tst_vext_u32_rotate[%d]=%d expected %d\n",
247 i
, mem_u32x2
.buf
[i
], expected_rot_u32x2
[i
]);
252 result_u8x16
= tst_vextq_u8 (vec_u8x16
, vec2_u8x16
);
253 vst1q_u8 (mem_u8x16
.buf
, result_u8x16
);
256 if (mem_u8x16
.buf
[i
] != expected_u8x16
[i
])
258 printf ("tst_vextq_u8[%d]=%d expected %d\n",
259 i
, mem_u8x16
.buf
[i
], expected_u8x16
[i
]);
263 result_u8x16
= tst_vextq_u8_rotate (vec_u8x16
);
264 vst1q_u8 (mem_u8x16
.buf
, result_u8x16
);
267 if (mem_u8x16
.buf
[i
] != expected_rot_u8x16
[i
])
269 printf ("tst_vextq_u8_rotate[%d]=%d expected %d\n",
270 i
, mem_u8x16
.buf
[i
], expected_rot_u8x16
[i
]);
274 result_u16x8
= tst_vextq_u16 (vec_u16x8
, vec2_u16x8
);
275 vst1q_u16 (mem_u16x8
.buf
, result_u16x8
);
278 if (mem_u16x8
.buf
[i
] != expected_u16x8
[i
])
280 printf ("tst_vextq_u16[%d]=%d expected %d\n",
281 i
, mem_u16x8
.buf
[i
], expected_u16x8
[i
]);
285 result_u16x8
= tst_vextq_u16_rotate (vec_u16x8
);
286 vst1q_u16 (mem_u16x8
.buf
, result_u16x8
);
289 if (mem_u16x8
.buf
[i
] != expected_rot_u16x8
[i
])
291 printf ("tst_vextq_u16_rotate[%d]=%d expected %d\n",
292 i
, mem_u16x8
.buf
[i
], expected_rot_u16x8
[i
]);
296 result_u32x4
= tst_vextq_u32 (vec_u32x4
, vec2_u32x4
);
297 vst1q_u32 (mem_u32x4
.buf
, result_u32x4
);
300 if (mem_u32x4
.buf
[i
] != expected_u32x4
[i
])
302 printf ("tst_vextq_u32[%d]=%d expected %d\n",
303 i
, mem_u32x4
.buf
[i
], expected_u32x4
[i
]);
307 result_u32x4
= tst_vextq_u32_rotate (vec_u32x4
);
308 vst1q_u32 (mem_u32x4
.buf
, result_u32x4
);
311 if (mem_u32x4
.buf
[i
] != expected_rot_u32x4
[i
])
313 printf ("tst_vextq_u32_rotate[%d]=%d expected %d\n",
314 i
, mem_u32x4
.buf
[i
], expected_rot_u32x4
[i
]);
318 result_u64x2
= tst_vextq_u64 (vec_u64x2
, vec2_u64x2
);
319 vst1q_u64 (mem_u64x2
.buf
, result_u64x2
);
322 if (mem_u64x2
.buf
[i
] != expected_u64x2
[i
])
324 printf ("tst_vextq_u64[%d]=%lld expected %lld\n",
325 i
, mem_u64x2
.buf
[i
], expected_u64x2
[i
]);
329 result_u64x2
= tst_vextq_u64_rotate (vec_u64x2
);
330 vst1q_u64 (mem_u64x2
.buf
, result_u64x2
);
333 if (mem_u64x2
.buf
[i
] != expected_rot_u64x2
[i
])
335 printf ("tst_vextq_u64_rotate[%d]=%lld expected %lld\n",
336 i
, mem_u64x2
.buf
[i
], expected_rot_u64x2
[i
]);