1 /* { dg-do compile } */
2 /* { dg-require-effective-target arm_v8_2a_fp16_neon_ok } */
3 /* { dg-options "-O2" } */
4 /* { dg-add-options arm_v8_2a_fp16_neon } */
6 /* Test instructions generated for the FP16 vector intrinsics. */
10 #define MSTRCAT(L, str) L##str
12 #define UNOP_TEST(insn) \
14 MSTRCAT (test_##insn, _16x4) (float16x4_t a) \
16 return MSTRCAT (insn, _f16) (a); \
19 MSTRCAT (test_##insn, _16x8) (float16x8_t a) \
21 return MSTRCAT (insn, q_f16) (a); \
24 #define BINOP_TEST(insn) \
26 MSTRCAT (test_##insn, _16x4) (float16x4_t a, float16x4_t b) \
28 return MSTRCAT (insn, _f16) (a, b); \
31 MSTRCAT (test_##insn, _16x8) (float16x8_t a, float16x8_t b) \
33 return MSTRCAT (insn, q_f16) (a, b); \
36 #define BINOP_LANE_TEST(insn, I) \
38 MSTRCAT (test_##insn##_lane, _16x4) (float16x4_t a, float16x4_t b) \
40 return MSTRCAT (insn, _lane_f16) (a, b, I); \
43 MSTRCAT (test_##insn##_lane, _16x8) (float16x8_t a, float16x4_t b) \
45 return MSTRCAT (insn, q_lane_f16) (a, b, I); \
48 #define BINOP_LANEQ_TEST(insn, I) \
50 MSTRCAT (test_##insn##_laneq, _16x4) (float16x4_t a, float16x8_t b) \
52 return MSTRCAT (insn, _laneq_f16) (a, b, I); \
55 MSTRCAT (test_##insn##_laneq, _16x8) (float16x8_t a, float16x8_t b) \
57 return MSTRCAT (insn, q_laneq_f16) (a, b, I); \
60 #define BINOP_N_TEST(insn) \
62 MSTRCAT (test_##insn##_n, _16x4) (float16x4_t a, float16_t b) \
64 return MSTRCAT (insn, _n_f16) (a, b); \
67 MSTRCAT (test_##insn##_n, _16x8) (float16x8_t a, float16_t b) \
69 return MSTRCAT (insn, q_n_f16) (a, b); \
72 #define TERNOP_TEST(insn) \
74 MSTRCAT (test_##insn, _16) (float16_t a, float16_t b, float16_t c) \
76 return MSTRCAT (insn, h_f16) (a, b, c); \
79 MSTRCAT (test_##insn, _16x4) (float16x4_t a, float16x4_t b, \
82 return MSTRCAT (insn, _f16) (a, b, c); \
85 MSTRCAT (test_##insn, _16x8) (float16x8_t a, float16x8_t b, \
88 return MSTRCAT (insn, q_f16) (a, b, c); \
91 #define VCMP1_TEST(insn) \
93 MSTRCAT (test_##insn, _16x4) (float16x4_t a) \
95 return MSTRCAT (insn, _f16) (a); \
98 MSTRCAT (test_##insn, _16x8) (float16x8_t a) \
100 return MSTRCAT (insn, q_f16) (a); \
103 #define VCMP2_TEST(insn) \
105 MSTRCAT (test_##insn, _16x4) (float16x4_t a, float16x4_t b) \
107 return MSTRCAT (insn, _f16) (a, b); \
110 MSTRCAT (test_##insn, _16x8) (float16x8_t a, float16x8_t b) \
112 return MSTRCAT (insn, q_f16) (a, b); \
115 #define VCVT_TEST(insn, TY, TO, FR) \
116 MSTRCAT (TO, 16x4_t) \
117 MSTRCAT (test_##insn, TY) (MSTRCAT (FR, 16x4_t) a) \
119 return MSTRCAT (insn, TY) (a); \
121 MSTRCAT (TO, 16x8_t) \
122 MSTRCAT (test_##insn##_q, TY) (MSTRCAT (FR, 16x8_t) a) \
124 return MSTRCAT (insn, q##TY) (a); \
127 #define VCVT_N_TEST(insn, TY, TO, FR) \
128 MSTRCAT (TO, 16x4_t) \
129 MSTRCAT (test_##insn##_n, TY) (MSTRCAT (FR, 16x4_t) a) \
131 return MSTRCAT (insn, _n##TY) (a, 1); \
133 MSTRCAT (TO, 16x8_t) \
134 MSTRCAT (test_##insn##_n_q, TY) (MSTRCAT (FR, 16x8_t) a) \
136 return MSTRCAT (insn, q_n##TY) (a, 1); \
140 /* { dg-final { scan-assembler-times {vceq\.f16\td[0-9]+, d[0-0]+, #0} 1 } } */
141 /* { dg-final { scan-assembler-times {vceq\.f16\tq[0-9]+, q[0-9]+, #0} 1 } } */
144 /* { dg-final { scan-assembler-times {vcgt\.f16\td[0-9]+, d[0-9]+, #0} 1 } } */
145 /* { dg-final { scan-assembler-times {vceq\.f16\tq[0-9]+, q[0-9]+, #0} 1 } } */
148 /* { dg-final { scan-assembler-times {vcge\.f16\td[0-9]+, d[0-9]+, #0} 1 } } */
149 /* { dg-final { scan-assembler-times {vcge\.f16\tq[0-9]+, q[0-9]+, #0} 1 } } */
152 /* { dg-final { scan-assembler-times {vclt.f16\td[0-9]+, d[0-9]+, #0} 1 } } */
153 /* { dg-final { scan-assembler-times {vclt.f16\tq[0-9]+, q[0-9]+, #0} 1 } } */
156 /* { dg-final { scan-assembler-times {vcle\.f16\td[0-9]+, d[0-9]+, #0} 1 } } */
157 /* { dg-final { scan-assembler-times {vcle\.f16\tq[0-9]+, q[0-9]+, #0} 1 } } */
159 VCVT_TEST (vcvt
, _f16_s16
, float, int)
160 VCVT_N_TEST (vcvt
, _f16_s16
, float, int)
161 /* { dg-final { scan-assembler-times {vcvt\.f16\.s16\td[0-9]+, d[0-9]+} 2 } }
162 { dg-final { scan-assembler-times {vcvt\.f16\.s16\tq[0-9]+, q[0-9]+} 2 } }
163 { dg-final { scan-assembler-times {vcvt\.f16\.s16\td[0-9]+, d[0-9]+, #1} 1 } }
164 { dg-final { scan-assembler-times {vcvt\.f16\.s16\tq[0-9]+, q[0-9]+, #1} 1 } } */
166 VCVT_TEST (vcvt
, _f16_u16
, float, uint
)
167 VCVT_N_TEST (vcvt
, _f16_u16
, float, uint
)
168 /* { dg-final { scan-assembler-times {vcvt\.f16\.u16\td[0-9]+, d[0-9]+} 2 } }
169 { dg-final { scan-assembler-times {vcvt\.f16\.u16\tq[0-9]+, q[0-9]+} 2 } }
170 { dg-final { scan-assembler-times {vcvt\.f16\.u16\td[0-9]+, d[0-9]+, #1} 1 } }
171 { dg-final { scan-assembler-times {vcvt\.f16\.u16\tq[0-9]+, q[0-9]+, #1} 1 } } */
173 VCVT_TEST (vcvt
, _s16_f16
, int, float)
174 VCVT_N_TEST (vcvt
, _s16_f16
, int, float)
175 /* { dg-final { scan-assembler-times {vcvt\.s16\.f16\td[0-9]+, d[0-9]+} 2 } }
176 { dg-final { scan-assembler-times {vcvt\.s16\.f16\tq[0-9]+, q[0-9]+} 2 } }
177 { dg-final { scan-assembler-times {vcvt\.s16\.f16\td[0-9]+, d[0-9]+, #1} 1 } }
178 { dg-final { scan-assembler-times {vcvt\.s16\.f16\tq[0-9]+, q[0-9]+, #1} 1 } } */
180 VCVT_TEST (vcvt
, _u16_f16
, uint
, float)
181 VCVT_N_TEST (vcvt
, _u16_f16
, uint
, float)
182 /* { dg-final { scan-assembler-times {vcvt\.u16\.f16\td[0-9]+, d[0-9]+} 2 } }
183 { dg-final { scan-assembler-times {vcvt\.u16\.f16\tq[0-9]+, q[0-9]+} 2 } }
184 { dg-final { scan-assembler-times {vcvt\.u16\.f16\td[0-9]+, d[0-9]+, #1} 1 } }
185 { dg-final { scan-assembler-times {vcvt\.u16\.f16\tq[0-9]+, q[0-9]+, #1} 1 } } */
187 VCVT_TEST (vcvta
, _s16_f16
, int, float)
188 /* { dg-final { scan-assembler-times {vcvta\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
189 { dg-final { scan-assembler-times {vcvta\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
192 VCVT_TEST (vcvta
, _u16_f16
, uint
, float)
193 /* { dg-final { scan-assembler-times {vcvta\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
194 { dg-final { scan-assembler-times {vcvta\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
197 VCVT_TEST (vcvtm
, _s16_f16
, int, float)
198 /* { dg-final { scan-assembler-times {vcvtm\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
199 { dg-final { scan-assembler-times {vcvtm\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
202 VCVT_TEST (vcvtm
, _u16_f16
, uint
, float)
203 /* { dg-final { scan-assembler-times {vcvtm\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
204 { dg-final { scan-assembler-times {vcvtm\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
207 VCVT_TEST (vcvtn
, _s16_f16
, int, float)
208 /* { dg-final { scan-assembler-times {vcvtn\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
209 { dg-final { scan-assembler-times {vcvtn\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
212 VCVT_TEST (vcvtn
, _u16_f16
, uint
, float)
213 /* { dg-final { scan-assembler-times {vcvtn\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
214 { dg-final { scan-assembler-times {vcvtn\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
217 VCVT_TEST (vcvtp
, _s16_f16
, int, float)
218 /* { dg-final { scan-assembler-times {vcvtp\.s16\.f16\td[0-9]+, d[0-9]+} 1 } }
219 { dg-final { scan-assembler-times {vcvtp\.s16\.f16\tq[0-9]+, q[0-9]+} 1 } }
222 VCVT_TEST (vcvtp
, _u16_f16
, uint
, float)
223 /* { dg-final { scan-assembler-times {vcvtp\.u16\.f16\td[0-9]+, d[0-9]+} 1 } }
224 { dg-final { scan-assembler-times {vcvtp\.u16\.f16\tq[0-9]+, q[0-9]+} 1 } }
228 /* { dg-final { scan-assembler-times {vabs\.f16\td[0-9]+, d[0-9]+} 1 } }
229 { dg-final { scan-assembler-times {vabs\.f16\tq[0-9]+, q[0-9]+} 1 } } */
232 /* { dg-final { scan-assembler-times {vneg\.f16\td[0-9]+, d[0-9]+} 1 } }
233 { dg-final { scan-assembler-times {vneg\.f16\tq[0-9]+, q[0-9]+} 1 } } */
236 /* { dg-final { scan-assembler-times {vrecpe\.f16\td[0-9]+, d[0-9]+} 1 } }
237 { dg-final { scan-assembler-times {vrecpe\.f16\tq[0-9]+, q[0-9]+} 1 } } */
240 /* { dg-final { scan-assembler-times {vrintz\.f16\td[0-9]+, d[0-9]+} 1 } }
241 { dg-final { scan-assembler-times {vrintz\.f16\tq[0-9]+, q[0-9]+} 1 } } */
244 /* { dg-final { scan-assembler-times {vrinta\.f16\td[0-9]+, d[0-9]+} 1 } }
245 { dg-final { scan-assembler-times {vrinta\.f16\tq[0-9]+, q[0-9]+} 1 } } */
248 /* { dg-final { scan-assembler-times {vrintm\.f16\td[0-9]+, d[0-9]+} 1 } }
249 { dg-final { scan-assembler-times {vrintm\.f16\tq[0-9]+, q[0-9]+} 1 } } */
252 /* { dg-final { scan-assembler-times {vrintn\.f16\td[0-9]+, d[0-9]+} 1 } }
253 { dg-final { scan-assembler-times {vrintn\.f16\tq[0-9]+, q[0-9]+} 1 } } */
256 /* { dg-final { scan-assembler-times {vrintp\.f16\td[0-9]+, d[0-9]+} 1 } }
257 { dg-final { scan-assembler-times {vrintp\.f16\tq[0-9]+, q[0-9]+} 1 } } */
260 /* { dg-final { scan-assembler-times {vrintx\.f16\td[0-9]+, d[0-9]+} 1 } }
261 { dg-final { scan-assembler-times {vrintx\.f16\tq[0-9]+, q[0-9]+} 1 } } */
264 /* { dg-final { scan-assembler-times {vrsqrte\.f16\td[0-9]+, d[0-9]+} 1 } }
265 { dg-final { scan-assembler-times {vrsqrte\.f16\tq[0-9]+, q[0-9]+} 1 } } */
268 /* { dg-final { scan-assembler-times {vadd\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
269 { dg-final { scan-assembler-times {vadd\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
272 /* { dg-final { scan-assembler-times {vabd\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
273 { dg-final { scan-assembler-times {vabd\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
276 /* { dg-final { scan-assembler-times {vacge\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
277 { dg-final { scan-assembler-times {vacge\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
280 /* { dg-final { scan-assembler-times {vacgt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
281 { dg-final { scan-assembler-times {vacgt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
284 /* { dg-final { scan-assembler-times {vacle\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
285 { dg-final { scan-assembler-times {vacle\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
288 /* { dg-final { scan-assembler-times {vaclt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
289 { dg-final { scan-assembler-times {vaclt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
292 /* { dg-final { scan-assembler-times {vceq\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
293 { dg-final { scan-assembler-times {vceq\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
296 /* { dg-final { scan-assembler-times {vcge\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
297 { dg-final { scan-assembler-times {vcge\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
300 /* { dg-final { scan-assembler-times {vcgt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
301 { dg-final { scan-assembler-times {vcgt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
304 /* { dg-final { scan-assembler-times {vcle\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
305 { dg-final { scan-assembler-times {vcle\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
308 /* { dg-final { scan-assembler-times {vclt\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
309 { dg-final { scan-assembler-times {vclt\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
312 /* { dg-final { scan-assembler-times {vmax\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
313 { dg-final { scan-assembler-times {vmax\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
316 /* { dg-final { scan-assembler-times {vmin\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
317 { dg-final { scan-assembler-times {vmin\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
320 /* { dg-final { scan-assembler-times {vmaxnm\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
321 { dg-final { scan-assembler-times {vmaxnm\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
324 /* { dg-final { scan-assembler-times {vminnm\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
325 { dg-final { scan-assembler-times {vminnm\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
328 /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 3 } }
329 { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
330 BINOP_LANE_TEST (vmul
, 2)
331 /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+\[2\]} 1 } }
332 { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, d[0-9]+\[2\]} 1 } } */
334 /* { dg-final { scan-assembler-times {vmul\.f16\td[0-9]+, d[0-9]+, d[0-9]+\[0\]} 1 } }
335 { dg-final { scan-assembler-times {vmul\.f16\tq[0-9]+, q[0-9]+, d[0-9]+\[0\]} 1 } }*/
338 test_vpadd_16x4 (float16x4_t a
, float16x4_t b
)
340 return vpadd_f16 (a
, b
);
342 /* { dg-final { scan-assembler-times {vpadd\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
345 test_vpmax_16x4 (float16x4_t a
, float16x4_t b
)
347 return vpmax_f16 (a
, b
);
349 /* { dg-final { scan-assembler-times {vpmax\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
352 test_vpmin_16x4 (float16x4_t a
, float16x4_t b
)
354 return vpmin_f16 (a
, b
);
356 /* { dg-final { scan-assembler-times {vpmin\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
359 /* { dg-final { scan-assembler-times {vsub\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
360 { dg-final { scan-assembler-times {vsub\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
363 /* { dg-final { scan-assembler-times {vrecps\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
364 { dg-final { scan-assembler-times {vrecps\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
367 /* { dg-final { scan-assembler-times {vrsqrts\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
368 { dg-final { scan-assembler-times {vrsqrts\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
371 /* { dg-final { scan-assembler-times {vfma\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
372 { dg-final { scan-assembler-times {vfma\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
375 /* { dg-final { scan-assembler-times {vfms\.f16\td[0-9]+, d[0-9]+, d[0-9]+} 1 } }
376 { dg-final { scan-assembler-times {vfms\.f16\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
379 test_vmov_n_f16 (float16_t a
)
381 return vmov_n_f16 (a
);
385 test_vdup_n_f16 (float16_t a
)
387 return vdup_n_f16 (a
);
389 /* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, r[0-9]+} 2 } } */
392 test_vmovq_n_f16 (float16_t a
)
394 return vmovq_n_f16 (a
);
398 test_vdupq_n_f16 (float16_t a
)
400 return vdupq_n_f16 (a
);
402 /* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, r[0-9]+} 2 } } */
405 test_vdup_lane_f16 (float16x4_t a
)
407 return vdup_lane_f16 (a
, 1);
409 /* { dg-final { scan-assembler-times {vdup\.16\td[0-9]+, d[0-9]+\[1\]} 1 } } */
412 test_vdupq_lane_f16 (float16x4_t a
)
414 return vdupq_lane_f16 (a
, 1);
416 /* { dg-final { scan-assembler-times {vdup\.16\tq[0-9]+, d[0-9]+\[1\]} 1 } } */
419 test_vext_f16 (float16x4_t a
, float16x4_t b
)
421 return vext_f16 (a
, b
, 1);
423 /* { dg-final { scan-assembler-times {vext\.16\td[0-9]+, d[0-9]+, d[0-9]+, #1} 1 } } */
426 test_vextq_f16 (float16x8_t a
, float16x8_t b
)
428 return vextq_f16 (a
, b
, 1);
430 /* { dg-final { scan-assembler-times {vext\.16\tq[0-9]+, q[0-9]+, q[0-9]+, #1} 1 } } */
433 /* { dg-final { scan-assembler-times {vrev64\.16\td[0-9]+, d[0-9]+} 1 } }
434 { dg-final { scan-assembler-times {vrev64\.16\tq[0-9]+, q[0-9]+} 1 } } */
437 test_vbsl16x4 (uint16x4_t a
, float16x4_t b
, float16x4_t c
)
439 return vbsl_f16 (a
, b
, c
);
441 /* { dg-final { scan-assembler-times {vbsl\td[0-9]+, d[0-9]+, d[0-9]+} 1 } } */
444 test_vbslq16x8 (uint16x8_t a
, float16x8_t b
, float16x8_t c
)
446 return vbslq_f16 (a
, b
, c
);
448 /*{ dg-final { scan-assembler-times {vbsl\tq[0-9]+, q[0-9]+, q[0-9]+} 1 } } */
451 test_vzip16x4 (float16x4_t a
, float16x4_t b
)
453 return vzip_f16 (a
, b
);
455 /* { dg-final { scan-assembler-times {vzip\.16\td[0-9]+, d[0-9]+} 1 } } */
458 test_vzipq16x8 (float16x8_t a
, float16x8_t b
)
460 return vzipq_f16 (a
, b
);
462 /*{ dg-final { scan-assembler-times {vzip\.16\tq[0-9]+, q[0-9]+} 1 } } */
465 test_vuzp16x4 (float16x4_t a
, float16x4_t b
)
467 return vuzp_f16 (a
, b
);
469 /* { dg-final { scan-assembler-times {vuzp\.16\td[0-9]+, d[0-9]+} 1 } } */
472 test_vuzpq16x8 (float16x8_t a
, float16x8_t b
)
474 return vuzpq_f16 (a
, b
);
476 /*{ dg-final { scan-assembler-times {vuzp\.16\tq[0-9]+, q[0-9]+} 1 } } */
479 test_vtrn16x4 (float16x4_t a
, float16x4_t b
)
481 return vtrn_f16 (a
, b
);
483 /* { dg-final { scan-assembler-times {vtrn\.16\td[0-9]+, d[0-9]+} 1 } } */
486 test_vtrnq16x8 (float16x8_t a
, float16x8_t b
)
488 return vtrnq_f16 (a
, b
);
490 /*{ dg-final { scan-assembler-times {vtrn\.16\tq[0-9]+, q[0-9]+} 1 } } */