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* config/i386/netbsd-elf.h (TARGET_OS_CPP_BUILTINS): Define.
[official-gcc.git] / gcc / config / i370 / i370.h
blobbe1e79d81d94c5f03666d8de897039f275d82988
1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
7
8 This file is part of GNU CC.
9
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27 /* Run-time compilation parameters selecting different hardware subsets. */
28
29 extern int target_flags;
30
31 /* The sizes of the code and literals on the current page. */
32
33 extern int mvs_page_code, mvs_page_lit;
34
35 /* The current page number and the base page number for the function. */
36
37 extern int mvs_page_num, function_base_page;
38
39 /* The name of the current function. */
40
41 extern char *mvs_function_name;
42
43 /* The length of the function name malloc'd area. */
44
45 extern int mvs_function_name_length;
46
47 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
48 these are more than twice as fast as load-op-store.
49 On 3090 don't use this since load-op-store is much faster. */
50
51 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
52
53 /* Default target switches */
54
55 #define TARGET_DEFAULT 1
56
57 /* Macro to define tables used to set the flags. This is a list in braces
58 of pairs in braces, each pair being { "NAME", VALUE }
59 where VALUE is the bits to set or minus the bits to clear.
60 An empty string NAME is used to identify the default VALUE. */
61
62 #define TARGET_SWITCHES \
63 { { "char-instructions", 1, N_("Generate char instructions")}, \
64 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
65 { "", TARGET_DEFAULT, 0} }
66
67 /* To use IBM supplied macro function prologue and epilogue, define the
68 following to 1. Should only be needed if IBM changes the definition
69 of their prologue and epilogue. */
70
71 #define MACROPROLOGUE 0
72 #define MACROEPILOGUE 0
73
74 /* Target machine storage layout */
75
76 /* Define this if most significant bit is lowest numbered in instructions
77 that operate on numbered bit-fields. */
78
79 #define BITS_BIG_ENDIAN 1
80
81 /* Define this if most significant byte of a word is the lowest numbered. */
82
83 #define BYTES_BIG_ENDIAN 1
84
85 /* Define this if MS word of a multiword is the lowest numbered. */
86
87 #define WORDS_BIG_ENDIAN 1
88
89 /* Width of a word, in units (bytes). */
90
91 #define UNITS_PER_WORD 4
92
93 /* Allocation boundary (in *bits*) for storing pointers in memory. */
94
95 #define POINTER_BOUNDARY 32
96
97 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
98
99 #define PARM_BOUNDARY 32
100
101 /* Boundary (in *bits*) on which stack pointer should be aligned. */
102
103 #define STACK_BOUNDARY 32
104
105 /* Allocation boundary (in *bits*) for the code of a function. */
106
107 #define FUNCTION_BOUNDARY 32
108
109 /* There is no point aligning anything to a rounder boundary than this. */
110
111 #define BIGGEST_ALIGNMENT 64
112
113 /* Alignment of field after `int : 0' in a structure. */
114
115 #define EMPTY_FIELD_BOUNDARY 32
116
117 /* Define this if move instructions will actually fail to work when given
118 unaligned data. */
119
120 #define STRICT_ALIGNMENT 0
121
122 /* Define target floating point format. */
123
124 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
125
126 /* Define character mapping for cross-compiling. */
127 /* but only define it if really needed, since otherwise it will break builds */
128
129 #ifdef TARGET_EBCDIC
130 #ifdef HOST_EBCDIC
131 #define MAP_CHARACTER(c) ((char)(c))
132 #else
133 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
134 #endif
135 #endif
136
137 #ifdef TARGET_HLASM
138 /* HLASM requires #pragma map. */
139 #define REGISTER_TARGET_PRAGMAS(PFILE) \
140 cpp_register_pragma (PFILE, 0, "map", i370_pr_map)
141 #endif /* TARGET_HLASM */
142
143 /* Define maximum length of page minus page escape overhead. */
144
145 #define MAX_MVS_PAGE_LENGTH 4080
146
147 /* Define special register allocation order desired.
148 Don't fiddle with this. I did, and I got all sorts of register
149 spill errors when compiling even relatively simple programs...
150 I have no clue why ...
151 E.g. this one is bad:
152 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
153 */
154
155 #define REG_ALLOC_ORDER \
156 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
157
158 /* Standard register usage. */
159
160 /* Number of actual hardware registers. The hardware registers are
161 assigned numbers for the compiler from 0 to just below
162 FIRST_PSEUDO_REGISTER.
163 All registers that the compiler knows about must be given numbers,
164 even those that are not normally considered general registers.
165 For the 370, we give the data registers numbers 0-15,
166 and the floating point registers numbers 16-19. */
167
168 #define FIRST_PSEUDO_REGISTER 20
169
170 /* Define base and page registers. */
171
172 #define BASE_REGISTER 3
173 #define PAGE_REGISTER 4
174
175 #ifdef TARGET_HLASM
176 /* 1 for registers that have pervasive standard uses and are not available
177 for the register allocator. These are registers that must have fixed,
178 valid values stored in them for the entire length of the subroutine call,
179 and must not in any way be moved around, jiggered with, etc. That is,
180 they must never be clobbered, and, if clobbered, the register allocator
181 will never restore them back.
182
183 We use five registers in this special way:
184 -- R3 which is used as the base register
185 -- R4 the page origin table pointer used to load R3,
186 -- R11 the arg pointer.
187 -- R12 the TCA pointer
188 -- R13 the stack (DSA) pointer
189
190 A fifth register is also exceptional: R14 is used in many branch
191 instructions to hold the target of the branch. Technically, this
192 does not qualify R14 as a register with a long-term meaning; it should
193 be enough, theoretically, to note that these instructions clobber
194 R14, and let the compiler deal with that. In practice, however,
195 the "clobber" directive acts as a barrier to optimization, and the
196 optimizer appears to be unable to perform optimizations around branches.
197 Thus, a much better strategy appears to give R14 a pervasive use;
198 this eliminates it from the register pool witout hurting optimization.
199
200 There are other registers which have special meanings, but its OK
201 for them to get clobbered, since other allocator config below will
202 make sure that they always have the right value. These are for
203 example:
204 -- R1 the returned structure pointer.
205 -- R10 the static chain reg.
206 -- R15 holds the value a subroutine returns.
207
208 Notice that it is *almost* safe to mark R11 as available to the allocator.
209 By marking it as a call_used_register, in most cases, the compiler
210 can handle it being clobbered. However, there are a few rare
211 circumstances where the register allocator will allocate r11 and
212 also try to use it as the arg pointer ... thus it must be marked fixed.
213 I think this is a bug, but I can't track it down...
214 */
215
216 #define FIXED_REGISTERS \
217 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
218 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
219
220 /* 1 for registers not available across function calls. These must include
221 the FIXED_REGISTERS and also any registers that can be used without being
222 saved.
223 The latter must include the registers where values are returned
224 and the register where structure-value addresses are passed.
225 NOTE: all floating registers are undefined across calls.
226 */
227
228 #define CALL_USED_REGISTERS \
229 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
230 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
231
232 /* Return number of consecutive hard regs needed starting at reg REGNO
233 to hold something of mode MODE.
234 This is ordinarily the length in words of a value of mode MODE
235 but can be less for certain modes in special long registers.
236 Note that DCmode (complex double) needs two regs.
237 */
238 #endif /* TARGET_HLASM */
239
240 /* ================= */
241 #ifdef TARGET_ELF_ABI
242 /* The Linux/ELF ABI uses the same register layout as the
243 * the MVS/OE version, with the following exceptions:
244 * -- r12 (rtca) is not used.
245 */
246
247 #define FIXED_REGISTERS \
248 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
249 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
250
251 #define CALL_USED_REGISTERS \
252 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
253 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
254
255 #endif /* TARGET_ELF_ABI */
256 /* ================= */
257
258
259 #define HARD_REGNO_NREGS(REGNO, MODE) \
260 ((REGNO) > 15 ? \
261 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
262 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
263
264 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
265 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
266 even registers can hold DI. The floating point registers can hold
267 either SF, DF, SC or DC. */
268
269 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
270 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
271 (((MODE) != DImode) && ((MODE) != DFmode))) \
272 : ((MODE) == SFmode || (MODE) == DFmode) || \
273 (MODE) == SCmode || (MODE) == DCmode)
274
275 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
276 mode MODE1 and one has mode MODE2.
277 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
278 for any hard reg, then this must be 0 for correct output. */
279
280 #define MODES_TIEABLE_P(MODE1, MODE2) \
281 (((MODE1) == SFmode || (MODE1) == DFmode) \
282 == ((MODE2) == SFmode || (MODE2) == DFmode))
283
284 /* Specify the registers used for certain standard purposes.
285 The values of these macros are register numbers. */
286
287 /* 370 PC isn't overloaded on a register. */
288
289 /* #define PC_REGNUM */
290
291 /* Register to use for pushing function arguments. */
292
293 #define STACK_POINTER_REGNUM 13
294
295 /* Base register for access to local variables of the function. */
296
297 #define FRAME_POINTER_REGNUM 13
298
299 /* Value should be nonzero if functions must have frame pointers.
300 Zero means the frame pointer need not be set up (and parms may be
301 accessed via the stack pointer) in functions that seem suitable.
302 This is computed in `reload', in reload1.c. */
303
304 #define FRAME_POINTER_REQUIRED 1
305
306 /* Base register for access to arguments of the function. */
307
308 #define ARG_POINTER_REGNUM 11
309
310 /* R10 is register in which static-chain is passed to a function.
311 Static-chaining is done when a nested function references as a global
312 a stack variable of its parent: e.g.
313 int parent_func (int arg) {
314 int x; // x is in parents stack
315 void child_func (void) { x++: } // child references x as global var
316 ...
317 }
318 */
319
320 #define STATIC_CHAIN_REGNUM 10
321
322 /* R1 is register in which address to store a structure value is passed to
323 a function. This is used only when returning 64-bit long-long in a 32-bit arch
324 and when calling functions that return structs by value. e.g.
325 typedef struct A_s { int a,b,c; } A_t;
326 A_t fun_returns_value (void) {
327 A_t a; a.a=1; a.b=2 a.c=3;
328 return a;
329 }
330 In the above, the storage for the return value is in the callers stack, and
331 the R1 points at that mem location.
332 */
333
334 #define STRUCT_VALUE_REGNUM 1
335
336 /* Define the classes of registers for register constraints in the
337 machine description. Also define ranges of constants.
338
339 One of the classes must always be named ALL_REGS and include all hard regs.
340 If there is more than one class, another class must be named NO_REGS
341 and contain no registers.
342
343 The name GENERAL_REGS must be the name of a class (or an alias for
344 another name such as ALL_REGS). This is the class of registers
345 that is allowed by "g" or "r" in a register constraint.
346 Also, registers outside this class are allocated only when
347 instructions express preferences for them.
348
349 The classes must be numbered in nondecreasing order; that is,
350 a larger-numbered class must never be contained completely
351 in a smaller-numbered class.
352
353 For any two classes, it is very desirable that there be another
354 class that represents their union. */
355
356 enum reg_class
357 {
358 NO_REGS, ADDR_REGS, DATA_REGS,
359 FP_REGS, ALL_REGS, LIM_REG_CLASSES
360 };
361
362 #define GENERAL_REGS DATA_REGS
363 #define N_REG_CLASSES (int) LIM_REG_CLASSES
364
365 /* Give names of register classes as strings for dump file. */
366
367 #define REG_CLASS_NAMES \
368 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
369
370 /* Define which registers fit in which classes. This is an initializer for
371 a vector of HARD_REG_SET of length N_REG_CLASSES. */
372
373 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
374
375 /* The same information, inverted:
376 Return the class number of the smallest class containing
377 reg number REGNO. This could be a conditional expression
378 or could index an array. */
379
380 #define REGNO_REG_CLASS(REGNO) \
381 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
382
383 /* The class value for index registers, and the one for base regs. */
384
385 #define INDEX_REG_CLASS ADDR_REGS
386 #define BASE_REG_CLASS ADDR_REGS
387
388 /* Get reg_class from a letter such as appears in the machine description. */
389
390 #define REG_CLASS_FROM_LETTER(C) \
391 ((C) == 'a' ? ADDR_REGS : \
392 ((C) == 'd' ? DATA_REGS : \
393 ((C) == 'f' ? FP_REGS : NO_REGS)))
394
395 /* The letters I, J, K, L and M in a register constraint string can be used
396 to stand for particular ranges of immediate operands.
397 This macro defines what the ranges are.
398 C is the letter, and VALUE is a constant value.
399 Return 1 if VALUE is in the range specified by C. */
400
401 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
402 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
403 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
404 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
405
406 /* Similar, but for floating constants, and defining letters G and H.
407 Here VALUE is the CONST_DOUBLE rtx itself. */
408
409 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
410
411 /* see recog.c for details */
412 #define EXTRA_CONSTRAINT(OP,C) \
413 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
414 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
415
416 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
417 return the class of reg to actually use. In general this is just CLASS;
418 but on some machines in some cases it is preferable to use a more
419 restrictive class.
420
421 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
422 rare occasions when lots of egisters are spilled, reload() will try
423 to put a const int into r0 and then use r0 as an index register.
424 */
425
426 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
427 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
428 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
429 GET_CODE(X) == LABEL_REF || \
430 GET_CODE(X) == SYMBOL_REF || \
431 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
432
433 /* Return the maximum number of consecutive registers needed to represent
434 mode MODE in a register of class CLASS.
435 Note that DCmode (complex double) needs two regs.
436 */
437
438 #define CLASS_MAX_NREGS(CLASS, MODE) \
439 ((CLASS) == FP_REGS ? \
440 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
441 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
442
443 /* Stack layout; function entry, exit and calling. */
444
445 /* Define this if pushing a word on the stack makes the stack pointer a
446 smaller address. */
447 /* ------------------------------------------------------------------- */
448
449 /* ================= */
450 #ifdef TARGET_HLASM
451 /* #define STACK_GROWS_DOWNWARD */
452
453 /* Define this if the nominal address of the stack frame is at the
454 high-address end of the local variables; that is, each additional local
455 variable allocated goes at a more negative offset in the frame. */
456
457 /* #define FRAME_GROWS_DOWNWARD */
458
459 /* Offset within stack frame to start allocating local variables at.
460 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
461 first local allocated. Otherwise, it is the offset to the BEGINNING
462 of the first local allocated. */
463
464 #define STARTING_FRAME_OFFSET \
465 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
466
467 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
468
469 /* If we generate an insn to push BYTES bytes, this says how many the stack
470 pointer really advances by. On the 370, we have no push instruction. */
471
472 #endif /* TARGET_HLASM */
473
474 /* ================= */
475 #ifdef TARGET_ELF_ABI
476
477 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
478 But we want the compiler to generate posistive displacements from the
479 stack pointer, and so we make the frame lie above the stack. */
480
481 #define STACK_GROWS_DOWNWARD
482 /* #define FRAME_GROWS_DOWNWARD */
483
484 /* Offset within stack frame to start allocating local variables at.
485 This is the offset to the BEGINNING of the first local allocated. */
486
487 #define STARTING_FRAME_OFFSET \
488 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
489
490 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
491
492 #endif /* TARGET_ELF_ABI */
493 /* ================= */
494
495 /* #define PUSH_ROUNDING(BYTES) */
496
497 /* Accumulate the outgoing argument count so we can request the right
498 DSA size and determine stack offset. */
499
500 #define ACCUMULATE_OUTGOING_ARGS 1
501
502 /* Define offset from stack pointer, to location where a parm can be
503 pushed. */
504
505 #define STACK_POINTER_OFFSET 148
506
507 /* Offset of first parameter from the argument pointer register value. */
508
509 #define FIRST_PARM_OFFSET(FNDECL) 0
510
511 /* 1 if N is a possible register number for function argument passing.
512 On the 370, no registers are used in this way. */
513
514 #define FUNCTION_ARG_REGNO_P(N) 0
515
516 /* Define a data type for recording info about an argument list during
517 the scan of that argument list. This data type should hold all
518 necessary information about the function itself and about the args
519 processed so far, enough to enable macros such as FUNCTION_ARG to
520 determine where the next arg should go. */
521
522 #define CUMULATIVE_ARGS int
523
524 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
525 a function whose data type is FNTYPE.
526 For a library call, FNTYPE is 0. */
527
528 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
529
530 /* Update the data in CUM to advance over an argument of mode MODE and
531 data type TYPE. (TYPE is null for libcalls where that information
532 may not be available.) */
533
534 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
535 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
536 ? 256 \
537 : (MODE) != BLKmode \
538 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
539 : (int_size_in_bytes (TYPE) + 3) / 4))
540
541 /* Define where to put the arguments to a function. Value is zero to push
542 the argument on the stack, or a hard register in which to store the
543 argument. */
544
545 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
546
547 /* For an arg passed partly in registers and partly in memory, this is the
548 number of registers used. For args passed entirely in registers or
549 entirely in memory, zero. */
550
551 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
552
553 /* Define if returning from a function call automatically pops the
554 arguments described by the number-of-args field in the call. */
555
556 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
557
558 /* The FUNCTION_VALUE macro defines how to find the value returned by a
559 function. VALTYPE is the data type of the value (as a tree).
560 If the precise function being called is known, FUNC is its FUNCTION_DECL;
561 otherwise, FUNC is NULL.
562
563 On the 370 the return value is in R15 or R16. However,
564 DImode (64-bit ints) scalars need to get returned on the stack,
565 with r15 pointing to the location. To accomplish this, we define
566 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
567 and the DImode scalars.
568 */
569
570 #define RET_REG(MODE) \
571 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
572
573 #define FUNCTION_VALUE(VALTYPE, FUNC) \
574 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
575
576 #define RETURN_IN_MEMORY(VALTYPE) \
577 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
578
579 /* Define how to find the value returned by a library function assuming
580 the value has mode MODE. */
581
582 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
583
584 /* 1 if N is a possible register number for a function value.
585 On the 370 under C/370, R15 and R16 are thus used. */
586
587 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
588
589 /* This macro definition sets up a default value for `main' to return. */
590
591 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
592
593
594 /* Output assembler code for a block containing the constant parts of a
595 trampoline, leaving space for the variable parts.
596
597 On the 370, the trampoline contains these instructions:
598
599 BALR 14,0
600 USING *,14
601 L STATIC_CHAIN_REGISTER,X
602 L 15,Y
603 BR 15
604 X DS 0F
605 Y DS 0F */
606 /*
607 I am confused as to why this emitting raw binary, instead of instructions ...
608 see for example, rs6000/rs000.c for an example of a different way to
609 do this ... especially since BASR should probably be substituted for BALR.
610 */
611
612 #define TRAMPOLINE_TEMPLATE(FILE) \
613 { \
614 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
615 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
616 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
617 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
618 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
619 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
620 assemble_aligned_integer (2, const0_rtx); \
621 assemble_aligned_integer (2, const0_rtx); \
622 assemble_aligned_integer (2, const0_rtx); \
623 assemble_aligned_integer (2, const0_rtx); \
624 }
625
626 /* Length in units of the trampoline for entering a nested function. */
627
628 #define TRAMPOLINE_SIZE 20
629
630 /* Emit RTL insns to initialize the variable parts of a trampoline. */
631
632 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
633 { \
634 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
635 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
636 }
637
638 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
639 pointer does not matter (provided there is a frame pointer). */
640
641 #define EXIT_IGNORE_STACK 1
642
643 /* Addressing modes, and classification of registers for them. */
644
645 /* #define HAVE_POST_INCREMENT */
646 /* #define HAVE_POST_DECREMENT */
647
648 /* #define HAVE_PRE_DECREMENT */
649 /* #define HAVE_PRE_INCREMENT */
650
651 /* These assume that REGNO is a hard or pseudo reg number. They give
652 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
653 reg currently allocated to a suitable hard reg.
654 These definitions are NOT overridden anywhere. */
655
656 #define REGNO_OK_FOR_INDEX_P(REGNO) \
657 (((REGNO) > 0 && (REGNO) < 16) \
658 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
659
660 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
661
662 #define REGNO_OK_FOR_DATA_P(REGNO) \
663 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
664
665 #define REGNO_OK_FOR_FP_P(REGNO) \
666 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
667
668 /* Now macros that check whether X is a register and also,
669 strictly, whether it is in a specified class. */
670
671 /* 1 if X is a data register. */
672
673 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
674
675 /* 1 if X is an fp register. */
676
677 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
678
679 /* 1 if X is an address register. */
680
681 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
682
683 /* Maximum number of registers that can appear in a valid memory address. */
684
685 #define MAX_REGS_PER_ADDRESS 2
686
687 /* Recognize any constant value that is a valid address. */
688
689 #define CONSTANT_ADDRESS_P(X) \
690 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
691 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
692 || (GET_CODE (X) == CONST \
693 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
694 || (GET_CODE (X) == CONST \
695 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
696 && !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
697
698 /* Nonzero if the constant value X is a legitimate general operand.
699 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
700
701 #define LEGITIMATE_CONSTANT_P(X) 1
702
703 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
704 its validity for a certain class. We have two alternate definitions
705 for each of them. The usual definition accepts all pseudo regs; the
706 other rejects them all. The symbol REG_OK_STRICT causes the latter
707 definition to be used.
708
709 Most source files want to accept pseudo regs in the hope that they will
710 get allocated to the class that the insn wants them to be in.
711 Some source files that are used after register allocation
712 need to be strict. */
713
714 #ifndef REG_OK_STRICT
715
716 /* Nonzero if X is a hard reg that can be used as an index or if it is
717 a pseudo reg. */
718
719 #define REG_OK_FOR_INDEX_P(X) \
720 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
721
722 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
723 a pseudo reg. */
724
725 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
726
727 #else /* REG_OK_STRICT */
728
729 /* Nonzero if X is a hard reg that can be used as an index. */
730
731 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
732
733 /* Nonzero if X is a hard reg that can be used as a base reg. */
734
735 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
736
737 #endif /* REG_OK_STRICT */
738
739 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
740 valid memory address for an instruction.
741 The MODE argument is the machine mode for the MEM expression
742 that wants to use this address.
743
744 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
745 except for CONSTANT_ADDRESS_P which is actually machine-independent.
746 */
747
748 #define COUNT_REGS(X, REGS, FAIL) \
749 if (REG_P (X)) { \
750 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
751 else goto FAIL; \
752 } \
753 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
754 goto FAIL;
755
756 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
757 { \
758 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
759 goto ADDR; \
760 if (GET_CODE (X) == PLUS) \
761 { \
762 int regs = 0; \
763 rtx x0 = XEXP (X, 0); \
764 rtx x1 = XEXP (X, 1); \
765 if (GET_CODE (x0) == PLUS) \
766 { \
767 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
768 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
769 COUNT_REGS (x1, regs, FAIL); \
770 if (regs == 2) \
771 goto ADDR; \
772 } \
773 else if (GET_CODE (x1) == PLUS) \
774 { \
775 COUNT_REGS (x0, regs, FAIL); \
776 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
777 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
778 if (regs == 2) \
779 goto ADDR; \
780 } \
781 else \
782 { \
783 COUNT_REGS (x0, regs, FAIL); \
784 COUNT_REGS (x1, regs, FAIL); \
785 if (regs != 0) \
786 goto ADDR; \
787 } \
788 } \
789 FAIL: ; \
790 }
791
792 /* The 370 has no mode dependent addresses. */
793
794 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
795
796 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
797 Try machine-dependent ways of modifying an illegitimate address
798 to be legitimate. If we find one, return the new, valid address.
799 This macro is used in only one place: `memory_address' in explow.c.
800
801 Several comments:
802 (1) It's not obvious that this macro results in better code
803 than its omission does. For historical reasons we leave it in.
804
805 (2) This macro may be (???) implicated in the accidental promotion
806 or RS operand to RX operands, which bombs out any RS, SI, SS
807 instruction that was expecting a simple address. Note that
808 this occurs fairly rarely ...
809
810 (3) There is a bug somewhere that causes either r4 to be spilled,
811 or causes r0 to be used as a base register. Changeing the macro
812 below will make the bug move around, but will not make it go away
813 ... Note that this is a rare bug ...
814
815 */
816
817 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
818 { \
819 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
820 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
821 copy_to_mode_reg (SImode, XEXP (X, 1))); \
822 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
823 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
824 copy_to_mode_reg (SImode, XEXP (X, 0))); \
825 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
826 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
827 force_operand (XEXP (X, 0), 0)); \
828 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
829 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
830 force_operand (XEXP (X, 1), 0)); \
831 if (memory_address_p (MODE, X)) \
832 goto WIN; \
833 }
834
835 /* Specify the machine mode that this machine uses for the index in the
836 tablejump instruction. */
837
838 #define CASE_VECTOR_MODE SImode
839
840 /* Define this if the tablejump instruction expects the table to contain
841 offsets from the address of the table.
842 Do not define this if the table should contain absolute addresses. */
843
844 /* #define CASE_VECTOR_PC_RELATIVE */
845
846 /* Define this if fixuns_trunc is the same as fix_trunc. */
847
848 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
849
850 /* We use "unsigned char" as default. */
851
852 #define DEFAULT_SIGNED_CHAR 0
853
854 /* Max number of bytes we can move from memory to memory in one reasonably
855 fast instruction. */
856
857 #define MOVE_MAX 256
858
859 /* Nonzero if access to memory by bytes is slow and undesirable. */
860
861 #define SLOW_BYTE_ACCESS 1
862
863 /* Define if shifts truncate the shift count which implies one can omit
864 a sign-extension or zero-extension of a shift count. */
865
866 /* #define SHIFT_COUNT_TRUNCATED */
867
868 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
869 is done just by pretending it is already truncated. */
870
871 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
872
873 /* We assume that the store-condition-codes instructions store 0 for false
874 and some other value for true. This is the value stored for true. */
875
876 /* #define STORE_FLAG_VALUE (-1) */
877
878 /* When a prototype says `char' or `short', really pass an `int'. */
879
880 #define PROMOTE_PROTOTYPES 1
881
882 /* Don't perform CSE on function addresses. */
883
884 #define NO_FUNCTION_CSE
885
886 /* Specify the machine mode that pointers have.
887 After generation of rtl, the compiler makes no further distinction
888 between pointers and any other objects of this machine mode. */
889
890 #define Pmode SImode
891
892 /* A function address in a call instruction is a byte address (for
893 indexing purposes) so give the MEM rtx a byte's mode. */
894
895 #define FUNCTION_MODE QImode
896
897 /* Compute the cost of computing a constant rtl expression RTX whose
898 rtx-code is CODE. The body of this macro is a portion of a switch
899 statement. If the code is computed here, return it with a return
900 statement. Otherwise, break from the switch. */
901
902 #define CONST_COSTS(RTX, CODE, OUTERCODE) \
903 case CONST_INT: \
904 if ((unsigned) INTVAL (RTX) < 0xfff) return 1; \
905 case CONST: \
906 case LABEL_REF: \
907 case SYMBOL_REF: \
908 return 2; \
909 case CONST_DOUBLE: \
910 return 4;
911
912 /* A C statement (sans semicolon) to update the integer variable COST
913 based on the relationship between INSN that is dependent on
914 DEP_INSN through the dependence LINK. The default is to make no
915 adjustment to COST. This can be used for example to specify to
916 the scheduler that an output- or anti-dependence does not incur
917 the same cost as a data-dependence.
918
919 We will want to use this to indicate that there is a cost associated
920 with the loading, followed by use of base registers ...
921 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
922 */
923
924 /* Tell final.c how to eliminate redundant test instructions. */
925
926 /* Here we define machine-dependent flags and fields in cc_status
927 (see `conditions.h'). */
928
929 /* Store in cc_status the expressions that the condition codes will
930 describe after execution of an instruction whose pattern is EXP.
931 Do not alter them if the instruction would not alter the cc's.
932
933 On the 370, load insns do not alter the cc's. However, in some
934 cases these instructions can make it possibly invalid to use the
935 saved cc's. In those cases we clear out some or all of the saved
936 cc's so they won't be used.
937
938 Note that only some arith instructions set the CC. These include
939 add, subtract, complement, various shifts. Note that multiply
940 and divide do *not* set set the CC. Therefore, in the code below,
941 don't set the status for MUL, DIV, etc.
942
943 Note that the bitwise ops set the condition code, but not in a
944 way that we can make use of it. So we treat these as clobbering,
945 rather than setting the CC. These are clobbered in the individual
946 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
947 */
948
949 #define NOTICE_UPDATE_CC(EXP, INSN) \
950 { \
951 rtx exp = (EXP); \
952 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
953 exp = XVECEXP (exp, 0, 0); \
954 if (GET_CODE (exp) != SET) \
955 CC_STATUS_INIT; \
956 else \
957 { \
958 if (XEXP (exp, 0) == cc0_rtx) \
959 { \
960 cc_status.value1 = XEXP (exp, 0); \
961 cc_status.value2 = XEXP (exp, 1); \
962 cc_status.flags = 0; \
963 } \
964 else \
965 { \
966 if (cc_status.value1 \
967 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
968 cc_status.value1 = 0; \
969 if (cc_status.value2 \
970 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
971 cc_status.value2 = 0; \
972 switch (GET_CODE (XEXP (exp, 1))) \
973 { \
974 case PLUS: case MINUS: case NEG: \
975 case NOT: case ABS: \
976 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
977 \
978 /* mult and div don't set any cc codes !! */ \
979 case MULT: /* case UMULT: */ case DIV: case UDIV: \
980 /* and, or and xor set the cc's the wrong way !! */ \
981 case AND: case IOR: case XOR: \
982 /* some shifts set the CC some don't. */ \
983 case ASHIFT: case ASHIFTRT: \
984 do {} while (0); \
985 default: \
986 break; \
987 } \
988 } \
989 } \
990 }
991
992
993 #define CC_STATUS_SET(V1, V2) \
994 { \
995 cc_status.flags = 0; \
996 cc_status.value1 = (V1); \
997 cc_status.value2 = (V2); \
998 if (cc_status.value1 \
999 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
1000 cc_status.value2 = 0; \
1001 }
1002
1003 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1004 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
1005
1006 /* ------------------------------------------ */
1007 /* Control the assembler format that we output. */
1008
1009 /* Define standard character escape sequences for non-ASCII targets
1010 only. */
1011
1012 #ifdef TARGET_EBCDIC
1013 #define TARGET_ESC 39
1014 #define TARGET_BELL 47
1015 #define TARGET_BS 22
1016 #define TARGET_TAB 5
1017 #define TARGET_NEWLINE 21
1018 #define TARGET_VT 11
1019 #define TARGET_FF 12
1020 #define TARGET_CR 13
1021 #endif
1022
1023 /* ======================================================== */
1024
1025 #ifdef TARGET_HLASM
1026 #define TEXT_SECTION_ASM_OP "* Program text area"
1027 #define DATA_SECTION_ASM_OP "* Program data area"
1028 #define INIT_SECTION_ASM_OP "* Program initialization area"
1029 #define SHARED_SECTION_ASM_OP "* Program shared data"
1030 #define CTOR_LIST_BEGIN /* NO OP */
1031 #define CTOR_LIST_END /* NO OP */
1032 #define MAX_MVS_LABEL_SIZE 8
1033
1034 /* How to refer to registers in assembler output. This sequence is
1035 indexed by compiler's hard-register-number (see above). */
1036
1037 #define REGISTER_NAMES \
1038 { "0", "1", "2", "3", "4", "5", "6", "7", \
1039 "8", "9", "10", "11", "12", "13", "14", "15", \
1040 "0", "2", "4", "6" \
1041 }
1042
1043 #define ASM_FILE_START(FILE) \
1044 { fputs ("\tRMODE\tANY\n", FILE); \
1045 fputs ("\tCSECT\n", FILE); }
1046
1047 #define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1048 #define ASM_COMMENT_START "*"
1049 #define ASM_APP_OFF ""
1050 #define ASM_APP_ON ""
1051
1052 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1053 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1054
1055 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1056 { \
1057 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1058 if (mvs_check_alias (NAME, temp) == 2) \
1059 { \
1060 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1061 } \
1062 }
1063
1064 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1065 { \
1066 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1067 if (mvs_check_alias (NAME, temp) == 2) \
1068 { \
1069 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1070 } \
1071 fputs ("\tENTRY\t", FILE); \
1072 assemble_name (FILE, NAME); \
1073 fputs ("\n", FILE); \
1074 }
1075
1076 /* MVS externals are limited to 8 characters, upper case only.
1077 The '_' is mapped to '@', except for MVS functions, then '#'. */
1078
1079
1080 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1081 { \
1082 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1083 if (!mvs_get_alias (NAME, temp)) \
1084 strcpy (temp, NAME); \
1085 if (!strcmp (temp,"main")) \
1086 strcpy (temp,"gccmain"); \
1087 if (mvs_function_check (temp)) \
1088 ch = '#'; \
1089 else \
1090 ch = '@'; \
1091 for (bp = temp; *bp; bp++) \
1092 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1093 fprintf (FILE, "%s", temp); \
1094 }
1095
1096 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1097 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1098
1099 /* Generate internal label. Since we can branch here from off page, we
1100 must reload the base register. */
1101
1102 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1103 { \
1104 if (!strcmp (PREFIX,"L")) \
1105 { \
1106 mvs_add_label(NUM); \
1107 } \
1108 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
1109 }
1110
1111 /* Generate case label. For HLASM we can change to the data CSECT
1112 and put the vectors out of the code body. The assembler just
1113 concatenates CSECTs with the same name. */
1114
1115 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1116 fprintf (FILE, "\tDS\t0F\n"); \
1117 fprintf (FILE,"\tCSECT\n"); \
1118 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1119
1120 /* Put the CSECT back to the code body */
1121
1122 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1123 assemble_name (FILE, mvs_function_name); \
1124 fputs ("\tCSECT\n", FILE);
1125
1126 /* This is how to output an element of a case-vector that is absolute. */
1127
1128 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1129 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1130
1131 /* This is how to output an element of a case-vector that is relative. */
1132
1133 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1134 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1135
1136 /* This is how to output an insn to push a register on the stack.
1137 It need not be very fast code.
1138 Right now, PUSH & POP are used only when profiling is enabled,
1139 and then, only to push the static chain reg and the function struct
1140 value reg, and only if those are used. Since profiling is not
1141 supported anyway, punt on this. */
1142
1143 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1144 mvs_check_page (FILE, 8, 4); \
1145 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1146 reg_names[REGNO], STACK_POINTER_OFFSET)
1147
1148 /* This is how to output an insn to pop a register from the stack.
1149 It need not be very fast code. */
1150
1151 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1152 mvs_check_page (FILE, 8, 0); \
1153 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1154 reg_names[REGNO], STACK_POINTER_OFFSET)
1155
1156 /* This outputs a text string. The string are chopped up to fit into
1157 an 80 byte record. Also, control and special characters, interpreted
1158 by the IBM assembler, are output numerically. */
1159
1160 #define MVS_ASCII_TEXT_LENGTH 48
1161
1162 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1163 { \
1164 size_t i, limit = (LEN); \
1165 int j; \
1166 for (j = 0, i = 0; i < limit; j++, i++) \
1167 { \
1168 int c = (PTR)[i]; \
1169 if (ISCNTRL (c) || c == '&') \
1170 { \
1171 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1172 fprintf (FILE, "'\n"); \
1173 j = -1; \
1174 if (c == '&') c = MAP_CHARACTER (c); \
1175 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1176 } \
1177 else \
1178 { \
1179 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1180 fprintf (FILE, "\tDC\tC'"); \
1181 if ( c == '\'' ) \
1182 fprintf (FILE, "%c%c", c, c); \
1183 else \
1184 fprintf (FILE, "%c", c); \
1185 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1186 fprintf (FILE, "'\n" ); \
1187 } \
1188 } \
1189 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1190 fprintf (FILE, "'\n"); \
1191 }
1192
1193 /* This is how to output an assembler line that says to advance the
1194 location counter to a multiple of 2**LOG bytes. */
1195
1196 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1197 if (LOG) \
1198 { \
1199 if ((LOG) == 1) \
1200 fprintf (FILE, "\tDS\t0H\n" ); \
1201 else \
1202 fprintf (FILE, "\tDS\t0F\n" ); \
1203 } \
1204
1205 /* The maximum length of memory that the IBM assembler will allow in one
1206 DS operation. */
1207
1208 #define MAX_CHUNK 32767
1209
1210 /* A C statement to output to the stdio stream FILE an assembler
1211 instruction to advance the location counter by SIZE bytes. Those
1212 bytes should be zero when loaded. */
1213
1214 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1215 { \
1216 int s, k; \
1217 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1218 { \
1219 if (s > MAX_CHUNK) \
1220 k = MAX_CHUNK; \
1221 else \
1222 k = s; \
1223 fprintf (FILE, "\tDS\tXL%d\n", k); \
1224 } \
1225 }
1226
1227 /* A C statement (sans semicolon) to output to the stdio stream
1228 FILE the assembler definition of a common-label named NAME whose
1229 size is SIZE bytes. The variable ROUNDED is the size rounded up
1230 to whatever alignment the caller wants. */
1231
1232 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1233 { \
1234 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1235 if (mvs_check_alias(NAME, temp) == 2) \
1236 { \
1237 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1238 } \
1239 fputs ("\tENTRY\t", FILE); \
1240 assemble_name (FILE, NAME); \
1241 fputs ("\n", FILE); \
1242 fprintf (FILE, "\tDS\t0F\n"); \
1243 ASM_OUTPUT_LABEL (FILE,NAME); \
1244 ASM_OUTPUT_SKIP (FILE,SIZE); \
1245 }
1246
1247 /* A C statement (sans semicolon) to output to the stdio stream
1248 FILE the assembler definition of a local-common-label named NAME
1249 whose size is SIZE bytes. The variable ROUNDED is the size
1250 rounded up to whatever alignment the caller wants. */
1251
1252 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1253 { \
1254 fprintf (FILE, "\tDS\t0F\n"); \
1255 ASM_OUTPUT_LABEL (FILE,NAME); \
1256 ASM_OUTPUT_SKIP (FILE,SIZE); \
1257 }
1258
1259 /* Store in OUTPUT a string (made with alloca) containing an
1260 assembler-name for a local static variable named NAME.
1261 LABELNO is an integer which is different for each call. */
1262
1263 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1264 { \
1265 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1266 sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
1267 }
1268
1269 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1270 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1271 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1272
1273 #define PRINT_OPERAND(FILE, XV, CODE) \
1274 { \
1275 switch (GET_CODE (XV)) \
1276 { \
1277 static char curreg[4]; \
1278 case REG: \
1279 if (CODE == 'N') \
1280 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1281 else \
1282 strcpy (curreg, reg_names[REGNO (XV)]); \
1283 fprintf (FILE, "%s", curreg); \
1284 break; \
1285 case MEM: \
1286 { \
1287 rtx addr = XEXP (XV, 0); \
1288 if (CODE == 'O') \
1289 { \
1290 if (GET_CODE (addr) == PLUS) \
1291 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1292 else \
1293 fprintf (FILE, "0"); \
1294 } \
1295 else if (CODE == 'R') \
1296 { \
1297 if (GET_CODE (addr) == PLUS) \
1298 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1299 else \
1300 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1301 } \
1302 else \
1303 output_address (XEXP (XV, 0)); \
1304 } \
1305 break; \
1306 case SYMBOL_REF: \
1307 case LABEL_REF: \
1308 mvs_page_lit += 4; \
1309 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1310 else fprintf (FILE, "=A("); \
1311 output_addr_const (FILE, XV); \
1312 fprintf (FILE, ")"); \
1313 break; \
1314 case CONST_INT: \
1315 if (CODE == 'B') \
1316 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1317 else if (CODE == 'X') \
1318 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1319 else if (CODE == 'h') \
1320 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1321 else if (CODE == 'H') \
1322 { \
1323 mvs_page_lit += 2; \
1324 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1325 } \
1326 else if (CODE == 'K') \
1327 { \
1328 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1329 mvs_page_lit += 4; \
1330 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1331 } \
1332 else if (CODE == 'W') \
1333 { \
1334 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1335 mvs_page_lit += 8; \
1336 if (0 <= INTVAL (XV)) { \
1337 fprintf (FILE, "=XL8'00000000"); \
1338 } else { \
1339 fprintf (FILE, "=XL8'FFFFFFFF"); \
1340 } \
1341 fprintf (FILE, "%08X'", INTVAL (XV)); \
1342 } \
1343 else \
1344 { \
1345 mvs_page_lit += 4; \
1346 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1347 } \
1348 break; \
1349 case CONST_DOUBLE: \
1350 if (GET_MODE (XV) == DImode) \
1351 { \
1352 if (CODE == 'M') \
1353 { \
1354 mvs_page_lit += 4; \
1355 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1356 } \
1357 else if (CODE == 'L') \
1358 { \
1359 mvs_page_lit += 4; \
1360 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1361 } \
1362 else \
1363 { \
1364 mvs_page_lit += 8; \
1365 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1366 CONST_DOUBLE_HIGH (XV)); \
1367 } \
1368 } \
1369 else \
1370 { \
1371 char buf[50]; \
1372 REAL_VALUE_TYPE rval; \
1373 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1374 REAL_VALUE_TO_DECIMAL (rval, HOST_WIDE_INT_PRINT_DEC, buf); \
1375 if (GET_MODE (XV) == SFmode) \
1376 { \
1377 mvs_page_lit += 4; \
1378 fprintf (FILE, "=E'%s'", buf); \
1379 } \
1380 else \
1381 if (GET_MODE (XV) == DFmode) \
1382 { \
1383 mvs_page_lit += 8; \
1384 fprintf (FILE, "=D'%s'", buf); \
1385 } \
1386 else /* VOIDmode !?!? strange but true ... */ \
1387 { \
1388 mvs_page_lit += 8; \
1389 fprintf (FILE, "=XL8'%08X%08X'", \
1390 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1391 } \
1392 } \
1393 break; \
1394 case CONST: \
1395 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1396 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1397 { \
1398 mvs_page_lit += 4; \
1399 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1400 { \
1401 fprintf (FILE, "=V("); \
1402 ASM_OUTPUT_LABELREF (FILE, \
1403 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1404 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1405 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1406 } \
1407 else \
1408 { \
1409 fprintf (FILE, "=A("); \
1410 output_addr_const (FILE, XV); \
1411 fprintf (FILE, ")"); \
1412 } \
1413 } \
1414 else \
1415 { \
1416 mvs_page_lit += 4; \
1417 fprintf (FILE, "=F'"); \
1418 output_addr_const (FILE, XV); \
1419 fprintf (FILE, "'"); \
1420 } \
1421 break; \
1422 default: \
1423 abort(); \
1424 } \
1425 }
1426
1427 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1428 { \
1429 rtx breg, xreg, offset, plus; \
1430 \
1431 switch (GET_CODE (ADDR)) \
1432 { \
1433 case REG: \
1434 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1435 break; \
1436 case PLUS: \
1437 breg = 0; \
1438 xreg = 0; \
1439 offset = 0; \
1440 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1441 { \
1442 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1443 breg = XEXP (ADDR, 1); \
1444 else \
1445 offset = XEXP (ADDR, 1); \
1446 plus = XEXP (ADDR, 0); \
1447 } \
1448 else \
1449 { \
1450 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1451 breg = XEXP (ADDR, 0); \
1452 else \
1453 offset = XEXP (ADDR, 0); \
1454 plus = XEXP (ADDR, 1); \
1455 } \
1456 if (GET_CODE (plus) == PLUS) \
1457 { \
1458 if (GET_CODE (XEXP (plus, 0)) == REG) \
1459 { \
1460 if (breg) \
1461 xreg = XEXP (plus, 0); \
1462 else \
1463 breg = XEXP (plus, 0); \
1464 } \
1465 else \
1466 { \
1467 offset = XEXP (plus, 0); \
1468 } \
1469 if (GET_CODE (XEXP (plus, 1)) == REG) \
1470 { \
1471 if (breg) \
1472 xreg = XEXP (plus, 1); \
1473 else \
1474 breg = XEXP (plus, 1); \
1475 } \
1476 else \
1477 { \
1478 offset = XEXP (plus, 1); \
1479 } \
1480 } \
1481 else if (GET_CODE (plus) == REG) \
1482 { \
1483 if (breg) \
1484 xreg = plus; \
1485 else \
1486 breg = plus; \
1487 } \
1488 else \
1489 { \
1490 offset = plus; \
1491 } \
1492 if (offset) \
1493 { \
1494 if (GET_CODE (offset) == LABEL_REF) \
1495 fprintf (FILE, "L%d", \
1496 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1497 else \
1498 output_addr_const (FILE, offset); \
1499 } \
1500 else \
1501 fprintf (FILE, "0"); \
1502 if (xreg) \
1503 fprintf (FILE, "(%s,%s)", \
1504 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1505 else \
1506 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1507 break; \
1508 default: \
1509 mvs_page_lit += 4; \
1510 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1511 else fprintf (FILE, "=A("); \
1512 output_addr_const (FILE, ADDR); \
1513 fprintf (FILE, ")"); \
1514 break; \
1515 } \
1516 }
1517
1518 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1519 { \
1520 if (strlen (NAME) + 1 > mvs_function_name_length) \
1521 { \
1522 if (mvs_function_name) \
1523 free (mvs_function_name); \
1524 mvs_function_name = 0; \
1525 } \
1526 if (!mvs_function_name) \
1527 { \
1528 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1529 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1530 } \
1531 if (!strcmp (NAME, "main")) \
1532 strcpy (mvs_function_name, "gccmain"); \
1533 else \
1534 strcpy (mvs_function_name, NAME); \
1535 fprintf (FILE, "\tDS\t0F\n"); \
1536 assemble_name (FILE, mvs_function_name); \
1537 fputs ("\tRMODE\tANY\n", FILE); \
1538 assemble_name (FILE, mvs_function_name); \
1539 fputs ("\tCSECT\n", FILE); \
1540 }
1541
1542 /* Output assembler code to FILE to increment profiler label # LABELNO
1543 for profiling a function entry. */
1544
1545 #define FUNCTION_PROFILER(FILE, LABELNO) \
1546 fprintf (FILE, "Error: No profiling available.\n")
1547
1548 #endif /* TARGET_HLASM */
1549
1550 /* ======================================================== */
1551
1552 #ifdef TARGET_ELF_ABI
1553
1554 /* How to refer to registers in assembler output. This sequence is
1555 indexed by compiler's hard-register-number (see above). */
1556
1557 #define REGISTER_NAMES \
1558 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1559 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1560 "f0", "f2", "f4", "f6" \
1561 }
1562
1563 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1564 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1565 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1566
1567 #define PRINT_OPERAND(FILE, XV, CODE) \
1568 { \
1569 switch (GET_CODE (XV)) \
1570 { \
1571 static char curreg[4]; \
1572 case REG: \
1573 if (CODE == 'N') \
1574 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1575 else \
1576 strcpy (curreg, reg_names[REGNO (XV)]); \
1577 fprintf (FILE, "%s", curreg); \
1578 break; \
1579 case MEM: \
1580 { \
1581 rtx addr = XEXP (XV, 0); \
1582 if (CODE == 'O') \
1583 { \
1584 if (GET_CODE (addr) == PLUS) \
1585 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1586 else \
1587 fprintf (FILE, "0"); \
1588 } \
1589 else if (CODE == 'R') \
1590 { \
1591 if (GET_CODE (addr) == PLUS) \
1592 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1593 else \
1594 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1595 } \
1596 else \
1597 output_address (XEXP (XV, 0)); \
1598 } \
1599 break; \
1600 case SYMBOL_REF: \
1601 case LABEL_REF: \
1602 mvs_page_lit += 4; \
1603 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1604 else fprintf (FILE, "=A("); \
1605 output_addr_const (FILE, XV); \
1606 fprintf (FILE, ")"); \
1607 break; \
1608 case CONST_INT: \
1609 if (CODE == 'B') \
1610 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1611 else if (CODE == 'X') \
1612 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1613 else if (CODE == 'h') \
1614 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1615 else if (CODE == 'H') \
1616 { \
1617 mvs_page_lit += 2; \
1618 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1619 } \
1620 else if (CODE == 'K') \
1621 { \
1622 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1623 mvs_page_lit += 4; \
1624 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1625 } \
1626 else if (CODE == 'W') \
1627 { \
1628 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1629 mvs_page_lit += 8; \
1630 if (0 <= INTVAL (XV)) { \
1631 fprintf (FILE, "=XL8'00000000"); \
1632 } else { \
1633 fprintf (FILE, "=XL8'FFFFFFFF"); \
1634 } \
1635 fprintf (FILE, "%08X'", INTVAL (XV)); \
1636 } \
1637 else \
1638 { \
1639 mvs_page_lit += 4; \
1640 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1641 } \
1642 break; \
1643 case CONST_DOUBLE: \
1644 if (GET_MODE (XV) == DImode) \
1645 { \
1646 if (CODE == 'M') \
1647 { \
1648 mvs_page_lit += 4; \
1649 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1650 } \
1651 else if (CODE == 'L') \
1652 { \
1653 mvs_page_lit += 4; \
1654 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1655 } \
1656 else \
1657 { \
1658 mvs_page_lit += 8; \
1659 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1660 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1661 } \
1662 } \
1663 else \
1664 { \
1665 char buf[50]; \
1666 REAL_VALUE_TYPE rval; \
1667 REAL_VALUE_FROM_CONST_DOUBLE(rval, XV); \
1668 REAL_VALUE_TO_DECIMAL (rval, HOST_WIDE_INT_PRINT_DEC, buf); \
1669 if (GET_MODE (XV) == SFmode) \
1670 { \
1671 mvs_page_lit += 4; \
1672 fprintf (FILE, "=E'%s'", buf); \
1673 } \
1674 else \
1675 if (GET_MODE (XV) == DFmode) \
1676 { \
1677 mvs_page_lit += 8; \
1678 fprintf (FILE, "=D'%s'", buf); \
1679 } \
1680 else /* VOIDmode !?!? strange but true ... */ \
1681 { \
1682 mvs_page_lit += 8; \
1683 fprintf (FILE, "=XL8'%08X%08X'", \
1684 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1685 } \
1686 } \
1687 break; \
1688 case CONST: \
1689 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1690 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1691 { \
1692 mvs_page_lit += 4; \
1693 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1694 { \
1695 fprintf (FILE, "=V("); \
1696 ASM_OUTPUT_LABELREF (FILE, \
1697 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1698 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1699 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1700 } \
1701 else \
1702 { \
1703 fprintf (FILE, "=A("); \
1704 output_addr_const (FILE, XV); \
1705 fprintf (FILE, ")"); \
1706 } \
1707 } \
1708 else \
1709 { \
1710 mvs_page_lit += 4; \
1711 fprintf (FILE, "=bogus_bad_F'"); \
1712 output_addr_const (FILE, XV); \
1713 fprintf (FILE, "'"); \
1714 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1715 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1716 debug_rtx (XV); \
1717 abort(); \
1718 } \
1719 break; \
1720 default: \
1721 abort(); \
1722 } \
1723 }
1724
1725 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1726 { \
1727 rtx breg, xreg, offset, plus; \
1728 \
1729 switch (GET_CODE (ADDR)) \
1730 { \
1731 case REG: \
1732 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1733 break; \
1734 case PLUS: \
1735 breg = 0; \
1736 xreg = 0; \
1737 offset = 0; \
1738 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1739 { \
1740 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1741 breg = XEXP (ADDR, 1); \
1742 else \
1743 offset = XEXP (ADDR, 1); \
1744 plus = XEXP (ADDR, 0); \
1745 } \
1746 else \
1747 { \
1748 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1749 breg = XEXP (ADDR, 0); \
1750 else \
1751 offset = XEXP (ADDR, 0); \
1752 plus = XEXP (ADDR, 1); \
1753 } \
1754 if (GET_CODE (plus) == PLUS) \
1755 { \
1756 if (GET_CODE (XEXP (plus, 0)) == REG) \
1757 { \
1758 if (breg) \
1759 xreg = XEXP (plus, 0); \
1760 else \
1761 breg = XEXP (plus, 0); \
1762 } \
1763 else \
1764 { \
1765 offset = XEXP (plus, 0); \
1766 } \
1767 if (GET_CODE (XEXP (plus, 1)) == REG) \
1768 { \
1769 if (breg) \
1770 xreg = XEXP (plus, 1); \
1771 else \
1772 breg = XEXP (plus, 1); \
1773 } \
1774 else \
1775 { \
1776 offset = XEXP (plus, 1); \
1777 } \
1778 } \
1779 else if (GET_CODE (plus) == REG) \
1780 { \
1781 if (breg) \
1782 xreg = plus; \
1783 else \
1784 breg = plus; \
1785 } \
1786 else \
1787 { \
1788 offset = plus; \
1789 } \
1790 if (offset) \
1791 { \
1792 if (GET_CODE (offset) == LABEL_REF) \
1793 fprintf (FILE, "L%d", \
1794 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1795 else \
1796 output_addr_const (FILE, offset); \
1797 } \
1798 else \
1799 fprintf (FILE, "0"); \
1800 if (xreg) \
1801 fprintf (FILE, "(%s,%s)", \
1802 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1803 else \
1804 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1805 break; \
1806 default: \
1807 mvs_page_lit += 4; \
1808 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1809 else fprintf (FILE, "=A("); \
1810 output_addr_const (FILE, ADDR); \
1811 fprintf (FILE, ")"); \
1812 break; \
1813 } \
1814 }
1815
1816 /* Output assembler code to FILE to increment profiler label # LABELNO
1817 for profiling a function entry. */
1818 /* Make it a no-op for now, so we can at least compile glibc */
1819 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1820 mvs_check_page (FILE, 24, 4); \
1821 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1822 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1823 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1824 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1825 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1826 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1827 }
1828
1829 /* Don't bother to output .extern pseudo-ops. They are not needed by
1830 ELF assemblers. */
1831
1832 #undef ASM_OUTPUT_EXTERNAL
1833
1834 #define ASM_DOUBLE "\t.double"
1835
1836 /* This is how to output the definition of a user-level label named NAME,
1837 such as the label on a static function or variable NAME. */
1838 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1839 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1840
1841 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1842
1843 /* Generate internal label. Since we can branch here from off page, we
1844 must reload the base register. Note that internal labels are generated
1845 for loops, goto's and case labels. */
1846 #undef ASM_OUTPUT_INTERNAL_LABEL
1847 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1848 { \
1849 if (!strcmp (PREFIX,"L")) \
1850 { \
1851 mvs_add_label(NUM); \
1852 } \
1853 fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
1854 }
1855
1856 /* let config/svr4.h define this ...
1857 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1858 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1859 */
1860
1861 /* This is how to output an element of a case-vector that is absolute. */
1862 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1863 mvs_check_page (FILE, 4, 0); \
1864 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1865
1866 /* This is how to output an element of a case-vector that is relative. */
1867 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1868 mvs_check_page (FILE, 4, 0); \
1869 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1870
1871 /* Right now, PUSH & POP are used only when profiling is enabled,
1872 and then, only to push the static chain reg and the function struct
1873 value reg, and only if those are used by the function being profiled.
1874 We don't need this for profiling, so punt. */
1875 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1876 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1877
1878
1879 /* Indicate that jump tables go in the text section. This is
1880 necessary when compiling PIC code. */
1881 #define JUMP_TABLES_IN_TEXT_SECTION 1
1882
1883 /* Define macro used to output shift-double opcodes when the shift
1884 count is in %cl. Some assemblers require %cl as an argument;
1885 some don't.
1886
1887 GAS requires the %cl argument, so override i386/unix.h. */
1888
1889 #undef SHIFT_DOUBLE_OMITS_COUNT
1890 #define SHIFT_DOUBLE_OMITS_COUNT 0
1891
1892 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1893 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1894 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1895
1896 /* Allow #sccs in preprocessor. */
1897 #define SCCS_DIRECTIVE
1898
1899 /* Implicit library calls should use memcpy, not bcopy, etc. */
1900 #define TARGET_MEM_FUNCTIONS
1901
1902 /* Output before read-only data. */
1903 #define TEXT_SECTION_ASM_OP "\t.text"
1904
1905 /* Output before writable (initialized) data. */
1906 #define DATA_SECTION_ASM_OP "\t.data"
1907
1908 /* Output before writable (uninitialized) data. */
1909 #define BSS_SECTION_ASM_OP "\t.bss"
1910
1911 /* In the past there was confusion as to what the argument to .align was
1912 in GAS. For the last several years the rule has been this: for a.out
1913 file formats that argument is LOG, and for all other file formats the
1914 argument is 1<<LOG.
1915
1916 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1917 doubt or guess work, and since this file is used for both a.out and other
1918 file formats, we use one of them. */
1919
1920 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1921 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1922
1923 /* This is how to output a command to make the user-level label named NAME
1924 defined for reference from other files. */
1925
1926 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1927 (fputs (".globl ", FILE), assemble_name (FILE, NAME), fputs ("\n", FILE))
1928
1929 /* This says how to output an assembler line
1930 to define a global common symbol. */
1931
1932 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1933 ( fputs (".comm ", (FILE)), \
1934 assemble_name ((FILE), (NAME)), \
1935 fprintf ((FILE), ",%u\n", (ROUNDED)))
1936
1937 /* This says how to output an assembler line
1938 to define a local common symbol. */
1939
1940 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1941 ( fputs (".lcomm ", (FILE)), \
1942 assemble_name ((FILE), (NAME)), \
1943 fprintf ((FILE), ",%u\n", (ROUNDED)))
1944
1945 #endif /* TARGET_ELF_ABI */
1946 #endif /* ! GCC_I370_H */
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