1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
38 #include "coretypes.h"
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num
= 1;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers
;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these are unique; no other rtx-object will be equal to any
81 rtx global_rtl
[GR_MAX
];
83 /* Commonly used RTL for hard registers. These objects are not necessarily
84 unique, so we allocate them separately from global_rtl. They are
85 initialized once per compilation unit, then copied into regno_reg_rtx
86 at the beginning of each function. */
87 static GTY(()) rtx static_regno_reg_rtx
[FIRST_PSEUDO_REGISTER
];
89 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
90 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
91 record a copy of const[012]_rtx. */
93 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
97 REAL_VALUE_TYPE dconst0
;
98 REAL_VALUE_TYPE dconst1
;
99 REAL_VALUE_TYPE dconst2
;
100 REAL_VALUE_TYPE dconst3
;
101 REAL_VALUE_TYPE dconst10
;
102 REAL_VALUE_TYPE dconstm1
;
103 REAL_VALUE_TYPE dconstm2
;
104 REAL_VALUE_TYPE dconsthalf
;
105 REAL_VALUE_TYPE dconstthird
;
106 REAL_VALUE_TYPE dconstpi
;
107 REAL_VALUE_TYPE dconste
;
109 /* All references to the following fixed hard registers go through
110 these unique rtl objects. On machines where the frame-pointer and
111 arg-pointer are the same register, they use the same unique object.
113 After register allocation, other rtl objects which used to be pseudo-regs
114 may be clobbered to refer to the frame-pointer register.
115 But references that were originally to the frame-pointer can be
116 distinguished from the others because they contain frame_pointer_rtx.
118 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
119 tricky: until register elimination has taken place hard_frame_pointer_rtx
120 should be used if it is being set, and frame_pointer_rtx otherwise. After
121 register elimination hard_frame_pointer_rtx should always be used.
122 On machines where the two registers are same (most) then these are the
125 In an inline procedure, the stack and frame pointer rtxs may not be
126 used for anything else. */
127 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
146 htab_t const_int_htab
;
148 /* A hash table storing memory attribute structures. */
149 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs
)))
150 htab_t mem_attrs_htab
;
152 /* A hash table storing register attribute structures. */
153 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs
)))
154 htab_t reg_attrs_htab
;
156 /* A hash table storing all CONST_DOUBLEs. */
157 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def
)))
158 htab_t const_double_htab
;
160 #define first_insn (cfun->emit->x_first_insn)
161 #define last_insn (cfun->emit->x_last_insn)
162 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
163 #define last_location (cfun->emit->x_last_location)
164 #define first_label_num (cfun->emit->x_first_label_num)
166 static rtx
make_jump_insn_raw (rtx
);
167 static rtx
make_call_insn_raw (rtx
);
168 static rtx
find_line_note (rtx
);
169 static rtx
change_address_1 (rtx
, enum machine_mode
, rtx
, int);
170 static void unshare_all_decls (tree
);
171 static void reset_used_decls (tree
);
172 static void mark_label_nuses (rtx
);
173 static hashval_t
const_int_htab_hash (const void *);
174 static int const_int_htab_eq (const void *, const void *);
175 static hashval_t
const_double_htab_hash (const void *);
176 static int const_double_htab_eq (const void *, const void *);
177 static rtx
lookup_const_double (rtx
);
178 static hashval_t
mem_attrs_htab_hash (const void *);
179 static int mem_attrs_htab_eq (const void *, const void *);
180 static mem_attrs
*get_mem_attrs (HOST_WIDE_INT
, tree
, rtx
, rtx
, unsigned int,
182 static hashval_t
reg_attrs_htab_hash (const void *);
183 static int reg_attrs_htab_eq (const void *, const void *);
184 static reg_attrs
*get_reg_attrs (tree
, int);
185 static tree
component_ref_for_mem_expr (tree
);
186 static rtx
gen_const_vector (enum machine_mode
, int);
187 static void copy_rtx_if_shared_1 (rtx
*orig
);
189 /* Probability of the conditional branch currently proceeded by try_split.
190 Set to -1 otherwise. */
191 int split_branch_probability
= -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (const void *x
)
198 return (hashval_t
) INTVAL ((rtx
) x
);
201 /* Returns nonzero if the value represented by X (which is really a
202 CONST_INT) is the same as that given by Y (which is really a
206 const_int_htab_eq (const void *x
, const void *y
)
208 return (INTVAL ((rtx
) x
) == *((const HOST_WIDE_INT
*) y
));
211 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
213 const_double_htab_hash (const void *x
)
218 if (GET_MODE (value
) == VOIDmode
)
219 h
= CONST_DOUBLE_LOW (value
) ^ CONST_DOUBLE_HIGH (value
);
222 h
= real_hash (CONST_DOUBLE_REAL_VALUE (value
));
223 /* MODE is used in the comparison, so it should be in the hash. */
224 h
^= GET_MODE (value
);
229 /* Returns nonzero if the value represented by X (really a ...)
230 is the same as that represented by Y (really a ...) */
232 const_double_htab_eq (const void *x
, const void *y
)
234 rtx a
= (rtx
)x
, b
= (rtx
)y
;
236 if (GET_MODE (a
) != GET_MODE (b
))
238 if (GET_MODE (a
) == VOIDmode
)
239 return (CONST_DOUBLE_LOW (a
) == CONST_DOUBLE_LOW (b
)
240 && CONST_DOUBLE_HIGH (a
) == CONST_DOUBLE_HIGH (b
));
242 return real_identical (CONST_DOUBLE_REAL_VALUE (a
),
243 CONST_DOUBLE_REAL_VALUE (b
));
246 /* Returns a hash code for X (which is a really a mem_attrs *). */
249 mem_attrs_htab_hash (const void *x
)
251 mem_attrs
*p
= (mem_attrs
*) x
;
253 return (p
->alias
^ (p
->align
* 1000)
254 ^ ((p
->offset
? INTVAL (p
->offset
) : 0) * 50000)
255 ^ ((p
->size
? INTVAL (p
->size
) : 0) * 2500000)
259 /* Returns nonzero if the value represented by X (which is really a
260 mem_attrs *) is the same as that given by Y (which is also really a
264 mem_attrs_htab_eq (const void *x
, const void *y
)
266 mem_attrs
*p
= (mem_attrs
*) x
;
267 mem_attrs
*q
= (mem_attrs
*) y
;
269 return (p
->alias
== q
->alias
&& p
->expr
== q
->expr
&& p
->offset
== q
->offset
270 && p
->size
== q
->size
&& p
->align
== q
->align
);
273 /* Allocate a new mem_attrs structure and insert it into the hash table if
274 one identical to it is not already in the table. We are doing this for
278 get_mem_attrs (HOST_WIDE_INT alias
, tree expr
, rtx offset
, rtx size
,
279 unsigned int align
, enum machine_mode mode
)
284 /* If everything is the default, we can just return zero.
285 This must match what the corresponding MEM_* macros return when the
286 field is not present. */
287 if (alias
== 0 && expr
== 0 && offset
== 0
289 || (mode
!= BLKmode
&& GET_MODE_SIZE (mode
) == INTVAL (size
)))
290 && (STRICT_ALIGNMENT
&& mode
!= BLKmode
291 ? align
== GET_MODE_ALIGNMENT (mode
) : align
== BITS_PER_UNIT
))
296 attrs
.offset
= offset
;
300 slot
= htab_find_slot (mem_attrs_htab
, &attrs
, INSERT
);
303 *slot
= ggc_alloc (sizeof (mem_attrs
));
304 memcpy (*slot
, &attrs
, sizeof (mem_attrs
));
310 /* Returns a hash code for X (which is a really a reg_attrs *). */
313 reg_attrs_htab_hash (const void *x
)
315 reg_attrs
*p
= (reg_attrs
*) x
;
317 return ((p
->offset
* 1000) ^ (long) p
->decl
);
320 /* Returns nonzero if the value represented by X (which is really a
321 reg_attrs *) is the same as that given by Y (which is also really a
325 reg_attrs_htab_eq (const void *x
, const void *y
)
327 reg_attrs
*p
= (reg_attrs
*) x
;
328 reg_attrs
*q
= (reg_attrs
*) y
;
330 return (p
->decl
== q
->decl
&& p
->offset
== q
->offset
);
332 /* Allocate a new reg_attrs structure and insert it into the hash table if
333 one identical to it is not already in the table. We are doing this for
337 get_reg_attrs (tree decl
, int offset
)
342 /* If everything is the default, we can just return zero. */
343 if (decl
== 0 && offset
== 0)
347 attrs
.offset
= offset
;
349 slot
= htab_find_slot (reg_attrs_htab
, &attrs
, INSERT
);
352 *slot
= ggc_alloc (sizeof (reg_attrs
));
353 memcpy (*slot
, &attrs
, sizeof (reg_attrs
));
359 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
360 don't attempt to share with the various global pieces of rtl (such as
361 frame_pointer_rtx). */
364 gen_raw_REG (enum machine_mode mode
, int regno
)
366 rtx x
= gen_rtx_raw_REG (mode
, regno
);
367 ORIGINAL_REGNO (x
) = regno
;
371 /* There are some RTL codes that require special attention; the generation
372 functions do the raw handling. If you add to this list, modify
373 special_rtx in gengenrtl.c as well. */
376 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED
, HOST_WIDE_INT arg
)
380 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
381 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
383 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
384 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
385 return const_true_rtx
;
388 /* Look up the CONST_INT in the hash table. */
389 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
390 (hashval_t
) arg
, INSERT
);
392 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
398 gen_int_mode (HOST_WIDE_INT c
, enum machine_mode mode
)
400 return GEN_INT (trunc_int_for_mode (c
, mode
));
403 /* CONST_DOUBLEs might be created from pairs of integers, or from
404 REAL_VALUE_TYPEs. Also, their length is known only at run time,
405 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
407 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
408 hash table. If so, return its counterpart; otherwise add it
409 to the hash table and return it. */
411 lookup_const_double (rtx real
)
413 void **slot
= htab_find_slot (const_double_htab
, real
, INSERT
);
420 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
421 VALUE in mode MODE. */
423 const_double_from_real_value (REAL_VALUE_TYPE value
, enum machine_mode mode
)
425 rtx real
= rtx_alloc (CONST_DOUBLE
);
426 PUT_MODE (real
, mode
);
428 memcpy (&CONST_DOUBLE_LOW (real
), &value
, sizeof (REAL_VALUE_TYPE
));
430 return lookup_const_double (real
);
433 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
434 of ints: I0 is the low-order word and I1 is the high-order word.
435 Do not use this routine for non-integer modes; convert to
436 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
439 immed_double_const (HOST_WIDE_INT i0
, HOST_WIDE_INT i1
, enum machine_mode mode
)
444 if (mode
!= VOIDmode
)
448 gcc_assert (GET_MODE_CLASS (mode
) == MODE_INT
449 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
450 /* We can get a 0 for an error mark. */
451 || GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
452 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
);
454 /* We clear out all bits that don't belong in MODE, unless they and
455 our sign bit are all one. So we get either a reasonable negative
456 value or a reasonable unsigned value for this mode. */
457 width
= GET_MODE_BITSIZE (mode
);
458 if (width
< HOST_BITS_PER_WIDE_INT
459 && ((i0
& ((HOST_WIDE_INT
) (-1) << (width
- 1)))
460 != ((HOST_WIDE_INT
) (-1) << (width
- 1))))
461 i0
&= ((HOST_WIDE_INT
) 1 << width
) - 1, i1
= 0;
462 else if (width
== HOST_BITS_PER_WIDE_INT
463 && ! (i1
== ~0 && i0
< 0))
466 /* We should be able to represent this value as a constant. */
467 gcc_assert (width
<= 2 * HOST_BITS_PER_WIDE_INT
);
469 /* If this would be an entire word for the target, but is not for
470 the host, then sign-extend on the host so that the number will
471 look the same way on the host that it would on the target.
473 For example, when building a 64 bit alpha hosted 32 bit sparc
474 targeted compiler, then we want the 32 bit unsigned value -1 to be
475 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
476 The latter confuses the sparc backend. */
478 if (width
< HOST_BITS_PER_WIDE_INT
479 && (i0
& ((HOST_WIDE_INT
) 1 << (width
- 1))))
480 i0
|= ((HOST_WIDE_INT
) (-1) << width
);
482 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
485 ??? Strictly speaking, this is wrong if we create a CONST_INT for
486 a large unsigned constant with the size of MODE being
487 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
488 in a wider mode. In that case we will mis-interpret it as a
491 Unfortunately, the only alternative is to make a CONST_DOUBLE for
492 any constant in any mode if it is an unsigned constant larger
493 than the maximum signed integer in an int on the host. However,
494 doing this will break everyone that always expects to see a
495 CONST_INT for SImode and smaller.
497 We have always been making CONST_INTs in this case, so nothing
498 new is being broken. */
500 if (width
<= HOST_BITS_PER_WIDE_INT
)
501 i1
= (i0
< 0) ? ~(HOST_WIDE_INT
) 0 : 0;
504 /* If this integer fits in one word, return a CONST_INT. */
505 if ((i1
== 0 && i0
>= 0) || (i1
== ~0 && i0
< 0))
508 /* We use VOIDmode for integers. */
509 value
= rtx_alloc (CONST_DOUBLE
);
510 PUT_MODE (value
, VOIDmode
);
512 CONST_DOUBLE_LOW (value
) = i0
;
513 CONST_DOUBLE_HIGH (value
) = i1
;
515 for (i
= 2; i
< (sizeof CONST_DOUBLE_FORMAT
- 1); i
++)
516 XWINT (value
, i
) = 0;
518 return lookup_const_double (value
);
522 gen_rtx_REG (enum machine_mode mode
, unsigned int regno
)
524 /* In case the MD file explicitly references the frame pointer, have
525 all such references point to the same frame pointer. This is
526 used during frame pointer elimination to distinguish the explicit
527 references to these registers from pseudos that happened to be
530 If we have eliminated the frame pointer or arg pointer, we will
531 be using it as a normal register, for example as a spill
532 register. In such cases, we might be accessing it in a mode that
533 is not Pmode and therefore cannot use the pre-allocated rtx.
535 Also don't do this when we are making new REGs in reload, since
536 we don't want to get confused with the real pointers. */
538 if (mode
== Pmode
&& !reload_in_progress
)
540 if (regno
== FRAME_POINTER_REGNUM
541 && (!reload_completed
|| frame_pointer_needed
))
542 return frame_pointer_rtx
;
543 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
544 if (regno
== HARD_FRAME_POINTER_REGNUM
545 && (!reload_completed
|| frame_pointer_needed
))
546 return hard_frame_pointer_rtx
;
548 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
549 if (regno
== ARG_POINTER_REGNUM
)
550 return arg_pointer_rtx
;
552 #ifdef RETURN_ADDRESS_POINTER_REGNUM
553 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
554 return return_address_pointer_rtx
;
556 if (regno
== (unsigned) PIC_OFFSET_TABLE_REGNUM
557 && fixed_regs
[PIC_OFFSET_TABLE_REGNUM
])
558 return pic_offset_table_rtx
;
559 if (regno
== STACK_POINTER_REGNUM
)
560 return stack_pointer_rtx
;
564 /* If the per-function register table has been set up, try to re-use
565 an existing entry in that table to avoid useless generation of RTL.
567 This code is disabled for now until we can fix the various backends
568 which depend on having non-shared hard registers in some cases. Long
569 term we want to re-enable this code as it can significantly cut down
570 on the amount of useless RTL that gets generated.
572 We'll also need to fix some code that runs after reload that wants to
573 set ORIGINAL_REGNO. */
578 && regno
< FIRST_PSEUDO_REGISTER
579 && reg_raw_mode
[regno
] == mode
)
580 return regno_reg_rtx
[regno
];
583 return gen_raw_REG (mode
, regno
);
587 gen_rtx_MEM (enum machine_mode mode
, rtx addr
)
589 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
591 /* This field is not cleared by the mere allocation of the rtx, so
598 /* Generate a memory referring to non-trapping constant memory. */
601 gen_const_mem (enum machine_mode mode
, rtx addr
)
603 rtx mem
= gen_rtx_MEM (mode
, addr
);
604 MEM_READONLY_P (mem
) = 1;
605 MEM_NOTRAP_P (mem
) = 1;
609 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
610 this construct would be valid, and false otherwise. */
613 validate_subreg (enum machine_mode omode
, enum machine_mode imode
,
614 rtx reg
, unsigned int offset
)
616 unsigned int isize
= GET_MODE_SIZE (imode
);
617 unsigned int osize
= GET_MODE_SIZE (omode
);
619 /* All subregs must be aligned. */
620 if (offset
% osize
!= 0)
623 /* The subreg offset cannot be outside the inner object. */
627 /* ??? This should not be here. Temporarily continue to allow word_mode
628 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
629 Generally, backends are doing something sketchy but it'll take time to
631 if (omode
== word_mode
)
633 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
634 is the culprit here, and not the backends. */
635 else if (osize
>= UNITS_PER_WORD
&& isize
>= osize
)
637 /* Allow component subregs of complex and vector. Though given the below
638 extraction rules, it's not always clear what that means. */
639 else if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
640 && GET_MODE_INNER (imode
) == omode
)
642 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
643 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
644 represent this. It's questionable if this ought to be represented at
645 all -- why can't this all be hidden in post-reload splitters that make
646 arbitrarily mode changes to the registers themselves. */
647 else if (VECTOR_MODE_P (omode
) && GET_MODE_INNER (omode
) == imode
)
649 /* Subregs involving floating point modes are not allowed to
650 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
651 (subreg:SI (reg:DF) 0) isn't. */
652 else if (FLOAT_MODE_P (imode
) || FLOAT_MODE_P (omode
))
658 /* Paradoxical subregs must have offset zero. */
662 /* This is a normal subreg. Verify that the offset is representable. */
664 /* For hard registers, we already have most of these rules collected in
665 subreg_offset_representable_p. */
666 if (reg
&& REG_P (reg
) && HARD_REGISTER_P (reg
))
668 unsigned int regno
= REGNO (reg
);
670 #ifdef CANNOT_CHANGE_MODE_CLASS
671 if ((COMPLEX_MODE_P (imode
) || VECTOR_MODE_P (imode
))
672 && GET_MODE_INNER (imode
) == omode
)
674 else if (REG_CANNOT_CHANGE_MODE_P (regno
, imode
, omode
))
678 return subreg_offset_representable_p (regno
, imode
, offset
, omode
);
681 /* For pseudo registers, we want most of the same checks. Namely:
682 If the register no larger than a word, the subreg must be lowpart.
683 If the register is larger than a word, the subreg must be the lowpart
684 of a subword. A subreg does *not* perform arbitrary bit extraction.
685 Given that we've already checked mode/offset alignment, we only have
686 to check subword subregs here. */
687 if (osize
< UNITS_PER_WORD
)
689 enum machine_mode wmode
= isize
> UNITS_PER_WORD
? word_mode
: imode
;
690 unsigned int low_off
= subreg_lowpart_offset (omode
, wmode
);
691 if (offset
% UNITS_PER_WORD
!= low_off
)
698 gen_rtx_SUBREG (enum machine_mode mode
, rtx reg
, int offset
)
700 gcc_assert (validate_subreg (mode
, GET_MODE (reg
), reg
, offset
));
701 return gen_rtx_raw_SUBREG (mode
, reg
, offset
);
704 /* Generate a SUBREG representing the least-significant part of REG if MODE
705 is smaller than mode of REG, otherwise paradoxical SUBREG. */
708 gen_lowpart_SUBREG (enum machine_mode mode
, rtx reg
)
710 enum machine_mode inmode
;
712 inmode
= GET_MODE (reg
);
713 if (inmode
== VOIDmode
)
715 return gen_rtx_SUBREG (mode
, reg
,
716 subreg_lowpart_offset (mode
, inmode
));
719 /* gen_rtvec (n, [rt1, ..., rtn])
721 ** This routine creates an rtvec and stores within it the
722 ** pointers to rtx's which are its arguments.
727 gen_rtvec (int n
, ...)
736 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
738 vector
= alloca (n
* sizeof (rtx
));
740 for (i
= 0; i
< n
; i
++)
741 vector
[i
] = va_arg (p
, rtx
);
743 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
747 return gen_rtvec_v (save_n
, vector
);
751 gen_rtvec_v (int n
, rtx
*argp
)
757 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
759 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
761 for (i
= 0; i
< n
; i
++)
762 rt_val
->elem
[i
] = *argp
++;
767 /* Generate a REG rtx for a new pseudo register of mode MODE.
768 This pseudo is assigned the next sequential register number. */
771 gen_reg_rtx (enum machine_mode mode
)
773 struct function
*f
= cfun
;
776 /* Don't let anything called after initial flow analysis create new
778 gcc_assert (!no_new_pseudos
);
780 if (generating_concat_p
781 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
782 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
784 /* For complex modes, don't make a single pseudo.
785 Instead, make a CONCAT of two pseudos.
786 This allows noncontiguous allocation of the real and imaginary parts,
787 which makes much better code. Besides, allocating DCmode
788 pseudos overstrains reload on some machines like the 386. */
789 rtx realpart
, imagpart
;
790 enum machine_mode partmode
= GET_MODE_INNER (mode
);
792 realpart
= gen_reg_rtx (partmode
);
793 imagpart
= gen_reg_rtx (partmode
);
794 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
797 /* Make sure regno_pointer_align, and regno_reg_rtx are large
798 enough to have an element for this pseudo reg number. */
800 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
802 int old_size
= f
->emit
->regno_pointer_align_length
;
806 new = ggc_realloc (f
->emit
->regno_pointer_align
, old_size
* 2);
807 memset (new + old_size
, 0, old_size
);
808 f
->emit
->regno_pointer_align
= (unsigned char *) new;
810 new1
= ggc_realloc (f
->emit
->x_regno_reg_rtx
,
811 old_size
* 2 * sizeof (rtx
));
812 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
813 regno_reg_rtx
= new1
;
815 f
->emit
->regno_pointer_align_length
= old_size
* 2;
818 val
= gen_raw_REG (mode
, reg_rtx_no
);
819 regno_reg_rtx
[reg_rtx_no
++] = val
;
823 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
824 Do the big endian correction if needed. */
827 gen_rtx_REG_offset (rtx reg
, enum machine_mode mode
, unsigned int regno
, int offset
)
829 rtx
new = gen_rtx_REG (mode
, regno
);
831 HOST_WIDE_INT var_size
;
833 /* PR middle-end/14084
834 The problem appears when a variable is stored in a larger register
835 and later it is used in the original mode or some mode in between
836 or some part of variable is accessed.
838 On little endian machines there is no problem because
839 the REG_OFFSET of the start of the variable is the same when
840 accessed in any mode (it is 0).
842 However, this is not true on big endian machines.
843 The offset of the start of the variable is different when accessed
845 When we are taking a part of the REG we have to change the OFFSET
846 from offset WRT size of mode of REG to offset WRT size of variable.
848 If we would not do the big endian correction the resulting REG_OFFSET
849 would be larger than the size of the DECL.
851 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
853 REG.mode MODE DECL size old offset new offset description
854 DI SI 4 4 0 int32 in SImode
855 DI SI 1 4 0 char in SImode
856 DI QI 1 7 0 char in QImode
857 DI QI 4 5 1 1st element in QImode
859 DI HI 4 6 2 1st element in HImode
862 If the size of DECL is equal or greater than the size of REG
863 we can't do this correction because the register holds the
864 whole variable or a part of the variable and thus the REG_OFFSET
865 is already correct. */
867 decl
= REG_EXPR (reg
);
868 if ((BYTES_BIG_ENDIAN
|| WORDS_BIG_ENDIAN
)
871 && GET_MODE_SIZE (GET_MODE (reg
)) > GET_MODE_SIZE (mode
)
872 && ((var_size
= int_size_in_bytes (TREE_TYPE (decl
))) > 0
873 && var_size
< GET_MODE_SIZE (GET_MODE (reg
))))
877 /* Convert machine endian to little endian WRT size of mode of REG. */
878 if (WORDS_BIG_ENDIAN
)
879 offset_le
= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
880 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
882 offset_le
= (offset
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
884 if (BYTES_BIG_ENDIAN
)
885 offset_le
+= ((GET_MODE_SIZE (GET_MODE (reg
)) - 1 - offset
)
888 offset_le
+= offset
% UNITS_PER_WORD
;
890 if (offset_le
>= var_size
)
892 /* MODE is wider than the variable so the new reg will cover
893 the whole variable so the resulting OFFSET should be 0. */
898 /* Convert little endian to machine endian WRT size of variable. */
899 if (WORDS_BIG_ENDIAN
)
900 offset
= ((var_size
- 1 - offset_le
)
901 / UNITS_PER_WORD
) * UNITS_PER_WORD
;
903 offset
= (offset_le
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
905 if (BYTES_BIG_ENDIAN
)
906 offset
+= ((var_size
- 1 - offset_le
)
909 offset
+= offset_le
% UNITS_PER_WORD
;
913 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg
),
914 REG_OFFSET (reg
) + offset
);
918 /* Set the decl for MEM to DECL. */
921 set_reg_attrs_from_mem (rtx reg
, rtx mem
)
923 if (MEM_OFFSET (mem
) && GET_CODE (MEM_OFFSET (mem
)) == CONST_INT
)
925 = get_reg_attrs (MEM_EXPR (mem
), INTVAL (MEM_OFFSET (mem
)));
928 /* Set the register attributes for registers contained in PARM_RTX.
929 Use needed values from memory attributes of MEM. */
932 set_reg_attrs_for_parm (rtx parm_rtx
, rtx mem
)
934 if (REG_P (parm_rtx
))
935 set_reg_attrs_from_mem (parm_rtx
, mem
);
936 else if (GET_CODE (parm_rtx
) == PARALLEL
)
938 /* Check for a NULL entry in the first slot, used to indicate that the
939 parameter goes both on the stack and in registers. */
940 int i
= XEXP (XVECEXP (parm_rtx
, 0, 0), 0) ? 0 : 1;
941 for (; i
< XVECLEN (parm_rtx
, 0); i
++)
943 rtx x
= XVECEXP (parm_rtx
, 0, i
);
944 if (REG_P (XEXP (x
, 0)))
945 REG_ATTRS (XEXP (x
, 0))
946 = get_reg_attrs (MEM_EXPR (mem
),
947 INTVAL (XEXP (x
, 1)));
952 /* Assign the RTX X to declaration T. */
954 set_decl_rtl (tree t
, rtx x
)
956 DECL_CHECK (t
)->decl
.rtl
= x
;
960 /* For register, we maintain the reverse information too. */
962 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
963 else if (GET_CODE (x
) == SUBREG
)
964 REG_ATTRS (SUBREG_REG (x
))
965 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
966 if (GET_CODE (x
) == CONCAT
)
968 if (REG_P (XEXP (x
, 0)))
969 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
970 if (REG_P (XEXP (x
, 1)))
971 REG_ATTRS (XEXP (x
, 1))
972 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
974 if (GET_CODE (x
) == PARALLEL
)
977 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
979 rtx y
= XVECEXP (x
, 0, i
);
980 if (REG_P (XEXP (y
, 0)))
981 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
986 /* Assign the RTX X to parameter declaration T. */
988 set_decl_incoming_rtl (tree t
, rtx x
)
990 DECL_INCOMING_RTL (t
) = x
;
994 /* For register, we maintain the reverse information too. */
996 REG_ATTRS (x
) = get_reg_attrs (t
, 0);
997 else if (GET_CODE (x
) == SUBREG
)
998 REG_ATTRS (SUBREG_REG (x
))
999 = get_reg_attrs (t
, -SUBREG_BYTE (x
));
1000 if (GET_CODE (x
) == CONCAT
)
1002 if (REG_P (XEXP (x
, 0)))
1003 REG_ATTRS (XEXP (x
, 0)) = get_reg_attrs (t
, 0);
1004 if (REG_P (XEXP (x
, 1)))
1005 REG_ATTRS (XEXP (x
, 1))
1006 = get_reg_attrs (t
, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x
, 0))));
1008 if (GET_CODE (x
) == PARALLEL
)
1012 /* Check for a NULL entry, used to indicate that the parameter goes
1013 both on the stack and in registers. */
1014 if (XEXP (XVECEXP (x
, 0, 0), 0))
1019 for (i
= start
; i
< XVECLEN (x
, 0); i
++)
1021 rtx y
= XVECEXP (x
, 0, i
);
1022 if (REG_P (XEXP (y
, 0)))
1023 REG_ATTRS (XEXP (y
, 0)) = get_reg_attrs (t
, INTVAL (XEXP (y
, 1)));
1028 /* Identify REG (which may be a CONCAT) as a user register. */
1031 mark_user_reg (rtx reg
)
1033 if (GET_CODE (reg
) == CONCAT
)
1035 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
1036 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
1040 gcc_assert (REG_P (reg
));
1041 REG_USERVAR_P (reg
) = 1;
1045 /* Identify REG as a probable pointer register and show its alignment
1046 as ALIGN, if nonzero. */
1049 mark_reg_pointer (rtx reg
, int align
)
1051 if (! REG_POINTER (reg
))
1053 REG_POINTER (reg
) = 1;
1056 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1058 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
1059 /* We can no-longer be sure just how aligned this pointer is. */
1060 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
1063 /* Return 1 plus largest pseudo reg number used in the current function. */
1071 /* Return 1 + the largest label number used so far in the current function. */
1074 max_label_num (void)
1079 /* Return first label number used in this function (if any were used). */
1082 get_first_label_num (void)
1084 return first_label_num
;
1087 /* If the rtx for label was created during the expansion of a nested
1088 function, then first_label_num won't include this label number.
1089 Fix this now so that array indicies work later. */
1092 maybe_set_first_label_num (rtx x
)
1094 if (CODE_LABEL_NUMBER (x
) < first_label_num
)
1095 first_label_num
= CODE_LABEL_NUMBER (x
);
1098 /* Return a value representing some low-order bits of X, where the number
1099 of low-order bits is given by MODE. Note that no conversion is done
1100 between floating-point and fixed-point values, rather, the bit
1101 representation is returned.
1103 This function handles the cases in common between gen_lowpart, below,
1104 and two variants in cse.c and combine.c. These are the cases that can
1105 be safely handled at all points in the compilation.
1107 If this is not a case we can handle, return 0. */
1110 gen_lowpart_common (enum machine_mode mode
, rtx x
)
1112 int msize
= GET_MODE_SIZE (mode
);
1115 enum machine_mode innermode
;
1117 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1118 so we have to make one up. Yuk. */
1119 innermode
= GET_MODE (x
);
1120 if (GET_CODE (x
) == CONST_INT
&& msize
<= HOST_BITS_PER_WIDE_INT
)
1121 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
, MODE_INT
, 0);
1122 else if (innermode
== VOIDmode
)
1123 innermode
= mode_for_size (HOST_BITS_PER_WIDE_INT
* 2, MODE_INT
, 0);
1125 xsize
= GET_MODE_SIZE (innermode
);
1127 gcc_assert (innermode
!= VOIDmode
&& innermode
!= BLKmode
);
1129 if (innermode
== mode
)
1132 /* MODE must occupy no more words than the mode of X. */
1133 if ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
1134 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))
1137 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1138 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
&& msize
> xsize
)
1141 offset
= subreg_lowpart_offset (mode
, innermode
);
1143 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
1144 && (GET_MODE_CLASS (mode
) == MODE_INT
1145 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
1147 /* If we are getting the low-order part of something that has been
1148 sign- or zero-extended, we can either just use the object being
1149 extended or make a narrower extension. If we want an even smaller
1150 piece than the size of the object being extended, call ourselves
1153 This case is used mostly by combine and cse. */
1155 if (GET_MODE (XEXP (x
, 0)) == mode
)
1157 else if (msize
< GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
1158 return gen_lowpart_common (mode
, XEXP (x
, 0));
1159 else if (msize
< xsize
)
1160 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
1162 else if (GET_CODE (x
) == SUBREG
|| REG_P (x
)
1163 || GET_CODE (x
) == CONCAT
|| GET_CODE (x
) == CONST_VECTOR
1164 || GET_CODE (x
) == CONST_DOUBLE
|| GET_CODE (x
) == CONST_INT
)
1165 return simplify_gen_subreg (mode
, x
, innermode
, offset
);
1167 /* Otherwise, we can't do this. */
1172 gen_highpart (enum machine_mode mode
, rtx x
)
1174 unsigned int msize
= GET_MODE_SIZE (mode
);
1177 /* This case loses if X is a subreg. To catch bugs early,
1178 complain if an invalid MODE is used even in other cases. */
1179 gcc_assert (msize
<= UNITS_PER_WORD
1180 || msize
== (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x
)));
1182 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1183 subreg_highpart_offset (mode
, GET_MODE (x
)));
1184 gcc_assert (result
);
1186 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1187 the target if we have a MEM. gen_highpart must return a valid operand,
1188 emitting code if necessary to do so. */
1191 result
= validize_mem (result
);
1192 gcc_assert (result
);
1198 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1199 be VOIDmode constant. */
1201 gen_highpart_mode (enum machine_mode outermode
, enum machine_mode innermode
, rtx exp
)
1203 if (GET_MODE (exp
) != VOIDmode
)
1205 gcc_assert (GET_MODE (exp
) == innermode
);
1206 return gen_highpart (outermode
, exp
);
1208 return simplify_gen_subreg (outermode
, exp
, innermode
,
1209 subreg_highpart_offset (outermode
, innermode
));
1212 /* Return offset in bytes to get OUTERMODE low part
1213 of the value in mode INNERMODE stored in memory in target format. */
1216 subreg_lowpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1218 unsigned int offset
= 0;
1219 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1223 if (WORDS_BIG_ENDIAN
)
1224 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1225 if (BYTES_BIG_ENDIAN
)
1226 offset
+= difference
% UNITS_PER_WORD
;
1232 /* Return offset in bytes to get OUTERMODE high part
1233 of the value in mode INNERMODE stored in memory in target format. */
1235 subreg_highpart_offset (enum machine_mode outermode
, enum machine_mode innermode
)
1237 unsigned int offset
= 0;
1238 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1240 gcc_assert (GET_MODE_SIZE (innermode
) >= GET_MODE_SIZE (outermode
));
1244 if (! WORDS_BIG_ENDIAN
)
1245 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1246 if (! BYTES_BIG_ENDIAN
)
1247 offset
+= difference
% UNITS_PER_WORD
;
1253 /* Return 1 iff X, assumed to be a SUBREG,
1254 refers to the least significant part of its containing reg.
1255 If X is not a SUBREG, always return 1 (it is its own low part!). */
1258 subreg_lowpart_p (rtx x
)
1260 if (GET_CODE (x
) != SUBREG
)
1262 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1265 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1266 == SUBREG_BYTE (x
));
1269 /* Return subword OFFSET of operand OP.
1270 The word number, OFFSET, is interpreted as the word number starting
1271 at the low-order address. OFFSET 0 is the low-order word if not
1272 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1274 If we cannot extract the required word, we return zero. Otherwise,
1275 an rtx corresponding to the requested word will be returned.
1277 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1278 reload has completed, a valid address will always be returned. After
1279 reload, if a valid address cannot be returned, we return zero.
1281 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1282 it is the responsibility of the caller.
1284 MODE is the mode of OP in case it is a CONST_INT.
1286 ??? This is still rather broken for some cases. The problem for the
1287 moment is that all callers of this thing provide no 'goal mode' to
1288 tell us to work with. This exists because all callers were written
1289 in a word based SUBREG world.
1290 Now use of this function can be deprecated by simplify_subreg in most
1295 operand_subword (rtx op
, unsigned int offset
, int validate_address
, enum machine_mode mode
)
1297 if (mode
== VOIDmode
)
1298 mode
= GET_MODE (op
);
1300 gcc_assert (mode
!= VOIDmode
);
1302 /* If OP is narrower than a word, fail. */
1304 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1307 /* If we want a word outside OP, return zero. */
1309 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1312 /* Form a new MEM at the requested address. */
1315 rtx
new = adjust_address_nv (op
, word_mode
, offset
* UNITS_PER_WORD
);
1317 if (! validate_address
)
1320 else if (reload_completed
)
1322 if (! strict_memory_address_p (word_mode
, XEXP (new, 0)))
1326 return replace_equiv_address (new, XEXP (new, 0));
1329 /* Rest can be handled by simplify_subreg. */
1330 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1333 /* Similar to `operand_subword', but never return 0. If we can't
1334 extract the required subword, put OP into a register and try again.
1335 The second attempt must succeed. We always validate the address in
1338 MODE is the mode of OP, in case it is CONST_INT. */
1341 operand_subword_force (rtx op
, unsigned int offset
, enum machine_mode mode
)
1343 rtx result
= operand_subword (op
, offset
, 1, mode
);
1348 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1350 /* If this is a register which can not be accessed by words, copy it
1351 to a pseudo register. */
1353 op
= copy_to_reg (op
);
1355 op
= force_reg (mode
, op
);
1358 result
= operand_subword (op
, offset
, 1, mode
);
1359 gcc_assert (result
);
1364 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1365 or (2) a component ref of something variable. Represent the later with
1366 a NULL expression. */
1369 component_ref_for_mem_expr (tree ref
)
1371 tree inner
= TREE_OPERAND (ref
, 0);
1373 if (TREE_CODE (inner
) == COMPONENT_REF
)
1374 inner
= component_ref_for_mem_expr (inner
);
1377 /* Now remove any conversions: they don't change what the underlying
1378 object is. Likewise for SAVE_EXPR. */
1379 while (TREE_CODE (inner
) == NOP_EXPR
|| TREE_CODE (inner
) == CONVERT_EXPR
1380 || TREE_CODE (inner
) == NON_LVALUE_EXPR
1381 || TREE_CODE (inner
) == VIEW_CONVERT_EXPR
1382 || TREE_CODE (inner
) == SAVE_EXPR
)
1383 inner
= TREE_OPERAND (inner
, 0);
1385 if (! DECL_P (inner
))
1389 if (inner
== TREE_OPERAND (ref
, 0))
1392 return build3 (COMPONENT_REF
, TREE_TYPE (ref
), inner
,
1393 TREE_OPERAND (ref
, 1), NULL_TREE
);
1396 /* Returns 1 if both MEM_EXPR can be considered equal
1400 mem_expr_equal_p (tree expr1
, tree expr2
)
1405 if (! expr1
|| ! expr2
)
1408 if (TREE_CODE (expr1
) != TREE_CODE (expr2
))
1411 if (TREE_CODE (expr1
) == COMPONENT_REF
)
1413 mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1414 TREE_OPERAND (expr2
, 0))
1415 && mem_expr_equal_p (TREE_OPERAND (expr1
, 1), /* field decl */
1416 TREE_OPERAND (expr2
, 1));
1418 if (INDIRECT_REF_P (expr1
))
1419 return mem_expr_equal_p (TREE_OPERAND (expr1
, 0),
1420 TREE_OPERAND (expr2
, 0));
1422 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1423 have been resolved here. */
1424 gcc_assert (DECL_P (expr1
));
1426 /* Decls with different pointers can't be equal. */
1430 /* Given REF, a MEM, and T, either the type of X or the expression
1431 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1432 if we are making a new object of this type. BITPOS is nonzero if
1433 there is an offset outstanding on T that will be applied later. */
1436 set_mem_attributes_minus_bitpos (rtx ref
, tree t
, int objectp
,
1437 HOST_WIDE_INT bitpos
)
1439 HOST_WIDE_INT alias
= MEM_ALIAS_SET (ref
);
1440 tree expr
= MEM_EXPR (ref
);
1441 rtx offset
= MEM_OFFSET (ref
);
1442 rtx size
= MEM_SIZE (ref
);
1443 unsigned int align
= MEM_ALIGN (ref
);
1444 HOST_WIDE_INT apply_bitpos
= 0;
1447 /* It can happen that type_for_mode was given a mode for which there
1448 is no language-level type. In which case it returns NULL, which
1453 type
= TYPE_P (t
) ? t
: TREE_TYPE (t
);
1454 if (type
== error_mark_node
)
1457 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1458 wrong answer, as it assumes that DECL_RTL already has the right alias
1459 info. Callers should not set DECL_RTL until after the call to
1460 set_mem_attributes. */
1461 gcc_assert (!DECL_P (t
) || ref
!= DECL_RTL_IF_SET (t
));
1463 /* Get the alias set from the expression or type (perhaps using a
1464 front-end routine) and use it. */
1465 alias
= get_alias_set (t
);
1467 MEM_VOLATILE_P (ref
) |= TYPE_VOLATILE (type
);
1468 MEM_IN_STRUCT_P (ref
) = AGGREGATE_TYPE_P (type
);
1469 MEM_POINTER (ref
) = POINTER_TYPE_P (type
);
1470 MEM_NOTRAP_P (ref
) = TREE_THIS_NOTRAP (t
);
1472 /* If we are making an object of this type, or if this is a DECL, we know
1473 that it is a scalar if the type is not an aggregate. */
1474 if ((objectp
|| DECL_P (t
)) && ! AGGREGATE_TYPE_P (type
))
1475 MEM_SCALAR_P (ref
) = 1;
1477 /* We can set the alignment from the type if we are making an object,
1478 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1479 if (objectp
|| TREE_CODE (t
) == INDIRECT_REF
1480 || TREE_CODE (t
) == ALIGN_INDIRECT_REF
1481 || TYPE_ALIGN_OK (type
))
1482 align
= MAX (align
, TYPE_ALIGN (type
));
1484 if (TREE_CODE (t
) == MISALIGNED_INDIRECT_REF
)
1486 if (integer_zerop (TREE_OPERAND (t
, 1)))
1487 /* We don't know anything about the alignment. */
1488 align
= BITS_PER_UNIT
;
1490 align
= tree_low_cst (TREE_OPERAND (t
, 1), 1);
1493 /* If the size is known, we can set that. */
1494 if (TYPE_SIZE_UNIT (type
) && host_integerp (TYPE_SIZE_UNIT (type
), 1))
1495 size
= GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type
), 1));
1497 /* If T is not a type, we may be able to deduce some more information about
1501 tree base
= get_base_address (t
);
1502 if (base
&& DECL_P (base
)
1503 && TREE_READONLY (base
)
1504 && (TREE_STATIC (base
) || DECL_EXTERNAL (base
)))
1506 tree base_type
= TREE_TYPE (base
);
1507 gcc_assert (!(base_type
&& TYPE_NEEDS_CONSTRUCTING (base_type
))
1508 || DECL_ARTIFICIAL (base
));
1509 MEM_READONLY_P (ref
) = 1;
1512 if (TREE_THIS_VOLATILE (t
))
1513 MEM_VOLATILE_P (ref
) = 1;
1515 /* Now remove any conversions: they don't change what the underlying
1516 object is. Likewise for SAVE_EXPR. */
1517 while (TREE_CODE (t
) == NOP_EXPR
|| TREE_CODE (t
) == CONVERT_EXPR
1518 || TREE_CODE (t
) == NON_LVALUE_EXPR
1519 || TREE_CODE (t
) == VIEW_CONVERT_EXPR
1520 || TREE_CODE (t
) == SAVE_EXPR
)
1521 t
= TREE_OPERAND (t
, 0);
1523 /* If this expression uses it's parent's alias set, mark it such
1524 that we won't change it. */
1525 if (component_uses_parent_alias_set (t
))
1526 MEM_KEEP_ALIAS_SET_P (ref
) = 1;
1528 /* If this is a decl, set the attributes of the MEM from it. */
1532 offset
= const0_rtx
;
1533 apply_bitpos
= bitpos
;
1534 size
= (DECL_SIZE_UNIT (t
)
1535 && host_integerp (DECL_SIZE_UNIT (t
), 1)
1536 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t
), 1)) : 0);
1537 align
= DECL_ALIGN (t
);
1540 /* If this is a constant, we know the alignment. */
1541 else if (CONSTANT_CLASS_P (t
))
1543 align
= TYPE_ALIGN (type
);
1544 #ifdef CONSTANT_ALIGNMENT
1545 align
= CONSTANT_ALIGNMENT (t
, align
);
1549 /* If this is a field reference and not a bit-field, record it. */
1550 /* ??? There is some information that can be gleened from bit-fields,
1551 such as the word offset in the structure that might be modified.
1552 But skip it for now. */
1553 else if (TREE_CODE (t
) == COMPONENT_REF
1554 && ! DECL_BIT_FIELD (TREE_OPERAND (t
, 1)))
1556 expr
= component_ref_for_mem_expr (t
);
1557 offset
= const0_rtx
;
1558 apply_bitpos
= bitpos
;
1559 /* ??? Any reason the field size would be different than
1560 the size we got from the type? */
1563 /* If this is an array reference, look for an outer field reference. */
1564 else if (TREE_CODE (t
) == ARRAY_REF
)
1566 tree off_tree
= size_zero_node
;
1567 /* We can't modify t, because we use it at the end of the
1573 tree index
= TREE_OPERAND (t2
, 1);
1574 tree low_bound
= array_ref_low_bound (t2
);
1575 tree unit_size
= array_ref_element_size (t2
);
1577 /* We assume all arrays have sizes that are a multiple of a byte.
1578 First subtract the lower bound, if any, in the type of the
1579 index, then convert to sizetype and multiply by the size of
1580 the array element. */
1581 if (! integer_zerop (low_bound
))
1582 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
1585 off_tree
= size_binop (PLUS_EXPR
,
1586 size_binop (MULT_EXPR
, convert (sizetype
,
1590 t2
= TREE_OPERAND (t2
, 0);
1592 while (TREE_CODE (t2
) == ARRAY_REF
);
1598 if (host_integerp (off_tree
, 1))
1600 HOST_WIDE_INT ioff
= tree_low_cst (off_tree
, 1);
1601 HOST_WIDE_INT aoff
= (ioff
& -ioff
) * BITS_PER_UNIT
;
1602 align
= DECL_ALIGN (t2
);
1603 if (aoff
&& (unsigned HOST_WIDE_INT
) aoff
< align
)
1605 offset
= GEN_INT (ioff
);
1606 apply_bitpos
= bitpos
;
1609 else if (TREE_CODE (t2
) == COMPONENT_REF
)
1611 expr
= component_ref_for_mem_expr (t2
);
1612 if (host_integerp (off_tree
, 1))
1614 offset
= GEN_INT (tree_low_cst (off_tree
, 1));
1615 apply_bitpos
= bitpos
;
1617 /* ??? Any reason the field size would be different than
1618 the size we got from the type? */
1620 else if (flag_argument_noalias
> 1
1621 && (INDIRECT_REF_P (t2
))
1622 && TREE_CODE (TREE_OPERAND (t2
, 0)) == PARM_DECL
)
1629 /* If this is a Fortran indirect argument reference, record the
1631 else if (flag_argument_noalias
> 1
1632 && (INDIRECT_REF_P (t
))
1633 && TREE_CODE (TREE_OPERAND (t
, 0)) == PARM_DECL
)
1640 /* If we modified OFFSET based on T, then subtract the outstanding
1641 bit position offset. Similarly, increase the size of the accessed
1642 object to contain the negative offset. */
1645 offset
= plus_constant (offset
, -(apply_bitpos
/ BITS_PER_UNIT
));
1647 size
= plus_constant (size
, apply_bitpos
/ BITS_PER_UNIT
);
1650 if (TREE_CODE (t
) == ALIGN_INDIRECT_REF
)
1652 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1653 we're overlapping. */
1658 /* Now set the attributes we computed above. */
1660 = get_mem_attrs (alias
, expr
, offset
, size
, align
, GET_MODE (ref
));
1662 /* If this is already known to be a scalar or aggregate, we are done. */
1663 if (MEM_IN_STRUCT_P (ref
) || MEM_SCALAR_P (ref
))
1666 /* If it is a reference into an aggregate, this is part of an aggregate.
1667 Otherwise we don't know. */
1668 else if (TREE_CODE (t
) == COMPONENT_REF
|| TREE_CODE (t
) == ARRAY_REF
1669 || TREE_CODE (t
) == ARRAY_RANGE_REF
1670 || TREE_CODE (t
) == BIT_FIELD_REF
)
1671 MEM_IN_STRUCT_P (ref
) = 1;
1675 set_mem_attributes (rtx ref
, tree t
, int objectp
)
1677 set_mem_attributes_minus_bitpos (ref
, t
, objectp
, 0);
1680 /* Set the decl for MEM to DECL. */
1683 set_mem_attrs_from_reg (rtx mem
, rtx reg
)
1686 = get_mem_attrs (MEM_ALIAS_SET (mem
), REG_EXPR (reg
),
1687 GEN_INT (REG_OFFSET (reg
)),
1688 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1691 /* Set the alias set of MEM to SET. */
1694 set_mem_alias_set (rtx mem
, HOST_WIDE_INT set
)
1696 #ifdef ENABLE_CHECKING
1697 /* If the new and old alias sets don't conflict, something is wrong. */
1698 gcc_assert (alias_sets_conflict_p (set
, MEM_ALIAS_SET (mem
)));
1701 MEM_ATTRS (mem
) = get_mem_attrs (set
, MEM_EXPR (mem
), MEM_OFFSET (mem
),
1702 MEM_SIZE (mem
), MEM_ALIGN (mem
),
1706 /* Set the alignment of MEM to ALIGN bits. */
1709 set_mem_align (rtx mem
, unsigned int align
)
1711 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1712 MEM_OFFSET (mem
), MEM_SIZE (mem
), align
,
1716 /* Set the expr for MEM to EXPR. */
1719 set_mem_expr (rtx mem
, tree expr
)
1722 = get_mem_attrs (MEM_ALIAS_SET (mem
), expr
, MEM_OFFSET (mem
),
1723 MEM_SIZE (mem
), MEM_ALIGN (mem
), GET_MODE (mem
));
1726 /* Set the offset of MEM to OFFSET. */
1729 set_mem_offset (rtx mem
, rtx offset
)
1731 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1732 offset
, MEM_SIZE (mem
), MEM_ALIGN (mem
),
1736 /* Set the size of MEM to SIZE. */
1739 set_mem_size (rtx mem
, rtx size
)
1741 MEM_ATTRS (mem
) = get_mem_attrs (MEM_ALIAS_SET (mem
), MEM_EXPR (mem
),
1742 MEM_OFFSET (mem
), size
, MEM_ALIGN (mem
),
1746 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1747 and its address changed to ADDR. (VOIDmode means don't change the mode.
1748 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1749 returned memory location is required to be valid. The memory
1750 attributes are not changed. */
1753 change_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
, int validate
)
1757 gcc_assert (MEM_P (memref
));
1758 if (mode
== VOIDmode
)
1759 mode
= GET_MODE (memref
);
1761 addr
= XEXP (memref
, 0);
1762 if (mode
== GET_MODE (memref
) && addr
== XEXP (memref
, 0)
1763 && (!validate
|| memory_address_p (mode
, addr
)))
1768 if (reload_in_progress
|| reload_completed
)
1769 gcc_assert (memory_address_p (mode
, addr
));
1771 addr
= memory_address (mode
, addr
);
1774 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1777 new = gen_rtx_MEM (mode
, addr
);
1778 MEM_COPY_ATTRIBUTES (new, memref
);
1782 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1783 way we are changing MEMREF, so we only preserve the alias set. */
1786 change_address (rtx memref
, enum machine_mode mode
, rtx addr
)
1788 rtx
new = change_address_1 (memref
, mode
, addr
, 1), size
;
1789 enum machine_mode mmode
= GET_MODE (new);
1792 size
= mmode
== BLKmode
? 0 : GEN_INT (GET_MODE_SIZE (mmode
));
1793 align
= mmode
== BLKmode
? BITS_PER_UNIT
: GET_MODE_ALIGNMENT (mmode
);
1795 /* If there are no changes, just return the original memory reference. */
1798 if (MEM_ATTRS (memref
) == 0
1799 || (MEM_EXPR (memref
) == NULL
1800 && MEM_OFFSET (memref
) == NULL
1801 && MEM_SIZE (memref
) == size
1802 && MEM_ALIGN (memref
) == align
))
1805 new = gen_rtx_MEM (mmode
, XEXP (memref
, 0));
1806 MEM_COPY_ATTRIBUTES (new, memref
);
1810 = get_mem_attrs (MEM_ALIAS_SET (memref
), 0, 0, size
, align
, mmode
);
1815 /* Return a memory reference like MEMREF, but with its mode changed
1816 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1817 nonzero, the memory address is forced to be valid.
1818 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1819 and caller is responsible for adjusting MEMREF base register. */
1822 adjust_address_1 (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
,
1823 int validate
, int adjust
)
1825 rtx addr
= XEXP (memref
, 0);
1827 rtx memoffset
= MEM_OFFSET (memref
);
1829 unsigned int memalign
= MEM_ALIGN (memref
);
1831 /* If there are no changes, just return the original memory reference. */
1832 if (mode
== GET_MODE (memref
) && !offset
1833 && (!validate
|| memory_address_p (mode
, addr
)))
1836 /* ??? Prefer to create garbage instead of creating shared rtl.
1837 This may happen even if offset is nonzero -- consider
1838 (plus (plus reg reg) const_int) -- so do this always. */
1839 addr
= copy_rtx (addr
);
1843 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1844 object, we can merge it into the LO_SUM. */
1845 if (GET_MODE (memref
) != BLKmode
&& GET_CODE (addr
) == LO_SUM
1847 && (unsigned HOST_WIDE_INT
) offset
1848 < GET_MODE_ALIGNMENT (GET_MODE (memref
)) / BITS_PER_UNIT
)
1849 addr
= gen_rtx_LO_SUM (Pmode
, XEXP (addr
, 0),
1850 plus_constant (XEXP (addr
, 1), offset
));
1852 addr
= plus_constant (addr
, offset
);
1855 new = change_address_1 (memref
, mode
, addr
, validate
);
1857 /* Compute the new values of the memory attributes due to this adjustment.
1858 We add the offsets and update the alignment. */
1860 memoffset
= GEN_INT (offset
+ INTVAL (memoffset
));
1862 /* Compute the new alignment by taking the MIN of the alignment and the
1863 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1868 (unsigned HOST_WIDE_INT
) (offset
& -offset
) * BITS_PER_UNIT
);
1870 /* We can compute the size in a number of ways. */
1871 if (GET_MODE (new) != BLKmode
)
1872 size
= GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1873 else if (MEM_SIZE (memref
))
1874 size
= plus_constant (MEM_SIZE (memref
), -offset
);
1876 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
),
1877 memoffset
, size
, memalign
, GET_MODE (new));
1879 /* At some point, we should validate that this offset is within the object,
1880 if all the appropriate values are known. */
1884 /* Return a memory reference like MEMREF, but with its mode changed
1885 to MODE and its address changed to ADDR, which is assumed to be
1886 MEMREF offseted by OFFSET bytes. If VALIDATE is
1887 nonzero, the memory address is forced to be valid. */
1890 adjust_automodify_address_1 (rtx memref
, enum machine_mode mode
, rtx addr
,
1891 HOST_WIDE_INT offset
, int validate
)
1893 memref
= change_address_1 (memref
, VOIDmode
, addr
, validate
);
1894 return adjust_address_1 (memref
, mode
, offset
, validate
, 0);
1897 /* Return a memory reference like MEMREF, but whose address is changed by
1898 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1899 known to be in OFFSET (possibly 1). */
1902 offset_address (rtx memref
, rtx offset
, unsigned HOST_WIDE_INT pow2
)
1904 rtx
new, addr
= XEXP (memref
, 0);
1906 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1908 /* At this point we don't know _why_ the address is invalid. It
1909 could have secondary memory references, multiplies or anything.
1911 However, if we did go and rearrange things, we can wind up not
1912 being able to recognize the magic around pic_offset_table_rtx.
1913 This stuff is fragile, and is yet another example of why it is
1914 bad to expose PIC machinery too early. */
1915 if (! memory_address_p (GET_MODE (memref
), new)
1916 && GET_CODE (addr
) == PLUS
1917 && XEXP (addr
, 0) == pic_offset_table_rtx
)
1919 addr
= force_reg (GET_MODE (addr
), addr
);
1920 new = simplify_gen_binary (PLUS
, Pmode
, addr
, offset
);
1923 update_temp_slot_address (XEXP (memref
, 0), new);
1924 new = change_address_1 (memref
, VOIDmode
, new, 1);
1926 /* If there are no changes, just return the original memory reference. */
1930 /* Update the alignment to reflect the offset. Reset the offset, which
1933 = get_mem_attrs (MEM_ALIAS_SET (memref
), MEM_EXPR (memref
), 0, 0,
1934 MIN (MEM_ALIGN (memref
), pow2
* BITS_PER_UNIT
),
1939 /* Return a memory reference like MEMREF, but with its address changed to
1940 ADDR. The caller is asserting that the actual piece of memory pointed
1941 to is the same, just the form of the address is being changed, such as
1942 by putting something into a register. */
1945 replace_equiv_address (rtx memref
, rtx addr
)
1947 /* change_address_1 copies the memory attribute structure without change
1948 and that's exactly what we want here. */
1949 update_temp_slot_address (XEXP (memref
, 0), addr
);
1950 return change_address_1 (memref
, VOIDmode
, addr
, 1);
1953 /* Likewise, but the reference is not required to be valid. */
1956 replace_equiv_address_nv (rtx memref
, rtx addr
)
1958 return change_address_1 (memref
, VOIDmode
, addr
, 0);
1961 /* Return a memory reference like MEMREF, but with its mode widened to
1962 MODE and offset by OFFSET. This would be used by targets that e.g.
1963 cannot issue QImode memory operations and have to use SImode memory
1964 operations plus masking logic. */
1967 widen_memory_access (rtx memref
, enum machine_mode mode
, HOST_WIDE_INT offset
)
1969 rtx
new = adjust_address_1 (memref
, mode
, offset
, 1, 1);
1970 tree expr
= MEM_EXPR (new);
1971 rtx memoffset
= MEM_OFFSET (new);
1972 unsigned int size
= GET_MODE_SIZE (mode
);
1974 /* If there are no changes, just return the original memory reference. */
1978 /* If we don't know what offset we were at within the expression, then
1979 we can't know if we've overstepped the bounds. */
1985 if (TREE_CODE (expr
) == COMPONENT_REF
)
1987 tree field
= TREE_OPERAND (expr
, 1);
1988 tree offset
= component_ref_field_offset (expr
);
1990 if (! DECL_SIZE_UNIT (field
))
1996 /* Is the field at least as large as the access? If so, ok,
1997 otherwise strip back to the containing structure. */
1998 if (TREE_CODE (DECL_SIZE_UNIT (field
)) == INTEGER_CST
1999 && compare_tree_int (DECL_SIZE_UNIT (field
), size
) >= 0
2000 && INTVAL (memoffset
) >= 0)
2003 if (! host_integerp (offset
, 1))
2009 expr
= TREE_OPERAND (expr
, 0);
2011 = (GEN_INT (INTVAL (memoffset
)
2012 + tree_low_cst (offset
, 1)
2013 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field
), 1)
2016 /* Similarly for the decl. */
2017 else if (DECL_P (expr
)
2018 && DECL_SIZE_UNIT (expr
)
2019 && TREE_CODE (DECL_SIZE_UNIT (expr
)) == INTEGER_CST
2020 && compare_tree_int (DECL_SIZE_UNIT (expr
), size
) >= 0
2021 && (! memoffset
|| INTVAL (memoffset
) >= 0))
2025 /* The widened memory access overflows the expression, which means
2026 that it could alias another expression. Zap it. */
2033 memoffset
= NULL_RTX
;
2035 /* The widened memory may alias other stuff, so zap the alias set. */
2036 /* ??? Maybe use get_alias_set on any remaining expression. */
2038 MEM_ATTRS (new) = get_mem_attrs (0, expr
, memoffset
, GEN_INT (size
),
2039 MEM_ALIGN (new), mode
);
2044 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2047 gen_label_rtx (void)
2049 return gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
, NULL_RTX
,
2050 NULL
, label_num
++, NULL
);
2053 /* For procedure integration. */
2055 /* Install new pointers to the first and last insns in the chain.
2056 Also, set cur_insn_uid to one higher than the last in use.
2057 Used for an inline-procedure after copying the insn chain. */
2060 set_new_first_and_last_insn (rtx first
, rtx last
)
2068 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
2069 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
2074 /* Go through all the RTL insn bodies and copy any invalid shared
2075 structure. This routine should only be called once. */
2078 unshare_all_rtl_1 (tree fndecl
, rtx insn
)
2082 /* Make sure that virtual parameters are not shared. */
2083 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
2084 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
2086 /* Make sure that virtual stack slots are not shared. */
2087 unshare_all_decls (DECL_INITIAL (fndecl
));
2089 /* Unshare just about everything else. */
2090 unshare_all_rtl_in_chain (insn
);
2092 /* Make sure the addresses of stack slots found outside the insn chain
2093 (such as, in DECL_RTL of a variable) are not shared
2094 with the insn chain.
2096 This special care is necessary when the stack slot MEM does not
2097 actually appear in the insn chain. If it does appear, its address
2098 is unshared from all else at that point. */
2099 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
2102 /* Go through all the RTL insn bodies and copy any invalid shared
2103 structure, again. This is a fairly expensive thing to do so it
2104 should be done sparingly. */
2107 unshare_all_rtl_again (rtx insn
)
2112 for (p
= insn
; p
; p
= NEXT_INSN (p
))
2115 reset_used_flags (PATTERN (p
));
2116 reset_used_flags (REG_NOTES (p
));
2117 reset_used_flags (LOG_LINKS (p
));
2120 /* Make sure that virtual stack slots are not shared. */
2121 reset_used_decls (DECL_INITIAL (cfun
->decl
));
2123 /* Make sure that virtual parameters are not shared. */
2124 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
2125 reset_used_flags (DECL_RTL (decl
));
2127 reset_used_flags (stack_slot_list
);
2129 unshare_all_rtl_1 (cfun
->decl
, insn
);
2133 unshare_all_rtl (void)
2135 unshare_all_rtl_1 (current_function_decl
, get_insns ());
2138 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2139 Recursively does the same for subexpressions. */
2142 verify_rtx_sharing (rtx orig
, rtx insn
)
2147 const char *format_ptr
;
2152 code
= GET_CODE (x
);
2154 /* These types may be freely shared. */
2169 /* SCRATCH must be shared because they represent distinct values. */
2171 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2176 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2177 a LABEL_REF, it isn't sharable. */
2178 if (GET_CODE (XEXP (x
, 0)) == PLUS
2179 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2180 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2185 /* A MEM is allowed to be shared if its address is constant. */
2186 if (CONSTANT_ADDRESS_P (XEXP (x
, 0))
2187 || reload_completed
|| reload_in_progress
)
2196 /* This rtx may not be shared. If it has already been seen,
2197 replace it with a copy of itself. */
2198 #ifdef ENABLE_CHECKING
2199 if (RTX_FLAG (x
, used
))
2201 error ("Invalid rtl sharing found in the insn");
2203 error ("Shared rtx");
2205 internal_error ("Internal consistency failure");
2208 gcc_assert (!RTX_FLAG (x
, used
));
2210 RTX_FLAG (x
, used
) = 1;
2212 /* Now scan the subexpressions recursively. */
2214 format_ptr
= GET_RTX_FORMAT (code
);
2216 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2218 switch (*format_ptr
++)
2221 verify_rtx_sharing (XEXP (x
, i
), insn
);
2225 if (XVEC (x
, i
) != NULL
)
2228 int len
= XVECLEN (x
, i
);
2230 for (j
= 0; j
< len
; j
++)
2232 /* We allow sharing of ASM_OPERANDS inside single
2234 if (j
&& GET_CODE (XVECEXP (x
, i
, j
)) == SET
2235 && (GET_CODE (SET_SRC (XVECEXP (x
, i
, j
)))
2237 verify_rtx_sharing (SET_DEST (XVECEXP (x
, i
, j
)), insn
);
2239 verify_rtx_sharing (XVECEXP (x
, i
, j
), insn
);
2248 /* Go through all the RTL insn bodies and check that there is no unexpected
2249 sharing in between the subexpressions. */
2252 verify_rtl_sharing (void)
2256 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2259 reset_used_flags (PATTERN (p
));
2260 reset_used_flags (REG_NOTES (p
));
2261 reset_used_flags (LOG_LINKS (p
));
2264 for (p
= get_insns (); p
; p
= NEXT_INSN (p
))
2267 verify_rtx_sharing (PATTERN (p
), p
);
2268 verify_rtx_sharing (REG_NOTES (p
), p
);
2269 verify_rtx_sharing (LOG_LINKS (p
), p
);
2273 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2274 Assumes the mark bits are cleared at entry. */
2277 unshare_all_rtl_in_chain (rtx insn
)
2279 for (; insn
; insn
= NEXT_INSN (insn
))
2282 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
2283 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
2284 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
2288 /* Go through all virtual stack slots of a function and copy any
2289 shared structure. */
2291 unshare_all_decls (tree blk
)
2295 /* Copy shared decls. */
2296 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2297 if (DECL_RTL_SET_P (t
))
2298 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
2300 /* Now process sub-blocks. */
2301 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2302 unshare_all_decls (t
);
2305 /* Go through all virtual stack slots of a function and mark them as
2308 reset_used_decls (tree blk
)
2313 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
2314 if (DECL_RTL_SET_P (t
))
2315 reset_used_flags (DECL_RTL (t
));
2317 /* Now process sub-blocks. */
2318 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
2319 reset_used_decls (t
);
2322 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2323 Recursively does the same for subexpressions. Uses
2324 copy_rtx_if_shared_1 to reduce stack space. */
2327 copy_rtx_if_shared (rtx orig
)
2329 copy_rtx_if_shared_1 (&orig
);
2333 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2334 use. Recursively does the same for subexpressions. */
2337 copy_rtx_if_shared_1 (rtx
*orig1
)
2343 const char *format_ptr
;
2347 /* Repeat is used to turn tail-recursion into iteration. */
2354 code
= GET_CODE (x
);
2356 /* These types may be freely shared. */
2370 /* SCRATCH must be shared because they represent distinct values. */
2373 if (REG_P (XEXP (x
, 0)) && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
)
2378 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2379 a LABEL_REF, it isn't sharable. */
2380 if (GET_CODE (XEXP (x
, 0)) == PLUS
2381 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
2382 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
2391 /* The chain of insns is not being copied. */
2398 /* This rtx may not be shared. If it has already been seen,
2399 replace it with a copy of itself. */
2401 if (RTX_FLAG (x
, used
))
2405 copy
= rtx_alloc (code
);
2406 memcpy (copy
, x
, RTX_SIZE (code
));
2410 RTX_FLAG (x
, used
) = 1;
2412 /* Now scan the subexpressions recursively.
2413 We can store any replaced subexpressions directly into X
2414 since we know X is not shared! Any vectors in X
2415 must be copied if X was copied. */
2417 format_ptr
= GET_RTX_FORMAT (code
);
2418 length
= GET_RTX_LENGTH (code
);
2421 for (i
= 0; i
< length
; i
++)
2423 switch (*format_ptr
++)
2427 copy_rtx_if_shared_1 (last_ptr
);
2428 last_ptr
= &XEXP (x
, i
);
2432 if (XVEC (x
, i
) != NULL
)
2435 int len
= XVECLEN (x
, i
);
2437 /* Copy the vector iff I copied the rtx and the length
2439 if (copied
&& len
> 0)
2440 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
2442 /* Call recursively on all inside the vector. */
2443 for (j
= 0; j
< len
; j
++)
2446 copy_rtx_if_shared_1 (last_ptr
);
2447 last_ptr
= &XVECEXP (x
, i
, j
);
2462 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2463 to look for shared sub-parts. */
2466 reset_used_flags (rtx x
)
2470 const char *format_ptr
;
2473 /* Repeat is used to turn tail-recursion into iteration. */
2478 code
= GET_CODE (x
);
2480 /* These types may be freely shared so we needn't do any resetting
2501 /* The chain of insns is not being copied. */
2508 RTX_FLAG (x
, used
) = 0;
2510 format_ptr
= GET_RTX_FORMAT (code
);
2511 length
= GET_RTX_LENGTH (code
);
2513 for (i
= 0; i
< length
; i
++)
2515 switch (*format_ptr
++)
2523 reset_used_flags (XEXP (x
, i
));
2527 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2528 reset_used_flags (XVECEXP (x
, i
, j
));
2534 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2535 to look for shared sub-parts. */
2538 set_used_flags (rtx x
)
2542 const char *format_ptr
;
2547 code
= GET_CODE (x
);
2549 /* These types may be freely shared so we needn't do any resetting
2570 /* The chain of insns is not being copied. */
2577 RTX_FLAG (x
, used
) = 1;
2579 format_ptr
= GET_RTX_FORMAT (code
);
2580 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2582 switch (*format_ptr
++)
2585 set_used_flags (XEXP (x
, i
));
2589 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2590 set_used_flags (XVECEXP (x
, i
, j
));
2596 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2597 Return X or the rtx for the pseudo reg the value of X was copied into.
2598 OTHER must be valid as a SET_DEST. */
2601 make_safe_from (rtx x
, rtx other
)
2604 switch (GET_CODE (other
))
2607 other
= SUBREG_REG (other
);
2609 case STRICT_LOW_PART
:
2612 other
= XEXP (other
, 0);
2621 && GET_CODE (x
) != SUBREG
)
2623 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2624 || reg_mentioned_p (other
, x
))))
2626 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2627 emit_move_insn (temp
, x
);
2633 /* Emission of insns (adding them to the doubly-linked list). */
2635 /* Return the first insn of the current sequence or current function. */
2643 /* Specify a new insn as the first in the chain. */
2646 set_first_insn (rtx insn
)
2648 gcc_assert (!PREV_INSN (insn
));
2652 /* Return the last insn emitted in current sequence or current function. */
2655 get_last_insn (void)
2660 /* Specify a new insn as the last in the chain. */
2663 set_last_insn (rtx insn
)
2665 gcc_assert (!NEXT_INSN (insn
));
2669 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2672 get_last_insn_anywhere (void)
2674 struct sequence_stack
*stack
;
2677 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2678 if (stack
->last
!= 0)
2683 /* Return the first nonnote insn emitted in current sequence or current
2684 function. This routine looks inside SEQUENCEs. */
2687 get_first_nonnote_insn (void)
2689 rtx insn
= first_insn
;
2694 for (insn
= next_insn (insn
);
2695 insn
&& NOTE_P (insn
);
2696 insn
= next_insn (insn
))
2700 if (NONJUMP_INSN_P (insn
)
2701 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2702 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2709 /* Return the last nonnote insn emitted in current sequence or current
2710 function. This routine looks inside SEQUENCEs. */
2713 get_last_nonnote_insn (void)
2715 rtx insn
= last_insn
;
2720 for (insn
= previous_insn (insn
);
2721 insn
&& NOTE_P (insn
);
2722 insn
= previous_insn (insn
))
2726 if (NONJUMP_INSN_P (insn
)
2727 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2728 insn
= XVECEXP (PATTERN (insn
), 0,
2729 XVECLEN (PATTERN (insn
), 0) - 1);
2736 /* Return a number larger than any instruction's uid in this function. */
2741 return cur_insn_uid
;
2744 /* Renumber instructions so that no instruction UIDs are wasted. */
2747 renumber_insns (FILE *stream
)
2751 /* If we're not supposed to renumber instructions, don't. */
2752 if (!flag_renumber_insns
)
2755 /* If there aren't that many instructions, then it's not really
2756 worth renumbering them. */
2757 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2762 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2765 fprintf (stream
, "Renumbering insn %d to %d\n",
2766 INSN_UID (insn
), cur_insn_uid
);
2767 INSN_UID (insn
) = cur_insn_uid
++;
2771 /* Return the next insn. If it is a SEQUENCE, return the first insn
2775 next_insn (rtx insn
)
2779 insn
= NEXT_INSN (insn
);
2780 if (insn
&& NONJUMP_INSN_P (insn
)
2781 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2782 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2788 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2792 previous_insn (rtx insn
)
2796 insn
= PREV_INSN (insn
);
2797 if (insn
&& NONJUMP_INSN_P (insn
)
2798 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2799 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2805 /* Return the next insn after INSN that is not a NOTE. This routine does not
2806 look inside SEQUENCEs. */
2809 next_nonnote_insn (rtx insn
)
2813 insn
= NEXT_INSN (insn
);
2814 if (insn
== 0 || !NOTE_P (insn
))
2821 /* Return the previous insn before INSN that is not a NOTE. This routine does
2822 not look inside SEQUENCEs. */
2825 prev_nonnote_insn (rtx insn
)
2829 insn
= PREV_INSN (insn
);
2830 if (insn
== 0 || !NOTE_P (insn
))
2837 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2838 or 0, if there is none. This routine does not look inside
2842 next_real_insn (rtx insn
)
2846 insn
= NEXT_INSN (insn
);
2847 if (insn
== 0 || INSN_P (insn
))
2854 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2855 or 0, if there is none. This routine does not look inside
2859 prev_real_insn (rtx insn
)
2863 insn
= PREV_INSN (insn
);
2864 if (insn
== 0 || INSN_P (insn
))
2871 /* Return the last CALL_INSN in the current list, or 0 if there is none.
2872 This routine does not look inside SEQUENCEs. */
2875 last_call_insn (void)
2879 for (insn
= get_last_insn ();
2880 insn
&& !CALL_P (insn
);
2881 insn
= PREV_INSN (insn
))
2887 /* Find the next insn after INSN that really does something. This routine
2888 does not look inside SEQUENCEs. Until reload has completed, this is the
2889 same as next_real_insn. */
2892 active_insn_p (rtx insn
)
2894 return (CALL_P (insn
) || JUMP_P (insn
)
2895 || (NONJUMP_INSN_P (insn
)
2896 && (! reload_completed
2897 || (GET_CODE (PATTERN (insn
)) != USE
2898 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2902 next_active_insn (rtx insn
)
2906 insn
= NEXT_INSN (insn
);
2907 if (insn
== 0 || active_insn_p (insn
))
2914 /* Find the last insn before INSN that really does something. This routine
2915 does not look inside SEQUENCEs. Until reload has completed, this is the
2916 same as prev_real_insn. */
2919 prev_active_insn (rtx insn
)
2923 insn
= PREV_INSN (insn
);
2924 if (insn
== 0 || active_insn_p (insn
))
2931 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2934 next_label (rtx insn
)
2938 insn
= NEXT_INSN (insn
);
2939 if (insn
== 0 || LABEL_P (insn
))
2946 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2949 prev_label (rtx insn
)
2953 insn
= PREV_INSN (insn
);
2954 if (insn
== 0 || LABEL_P (insn
))
2961 /* Return the last label to mark the same position as LABEL. Return null
2962 if LABEL itself is null. */
2965 skip_consecutive_labels (rtx label
)
2969 for (insn
= label
; insn
!= 0 && !INSN_P (insn
); insn
= NEXT_INSN (insn
))
2977 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2978 and REG_CC_USER notes so we can find it. */
2981 link_cc0_insns (rtx insn
)
2983 rtx user
= next_nonnote_insn (insn
);
2985 if (NONJUMP_INSN_P (user
) && GET_CODE (PATTERN (user
)) == SEQUENCE
)
2986 user
= XVECEXP (PATTERN (user
), 0, 0);
2988 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2990 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2993 /* Return the next insn that uses CC0 after INSN, which is assumed to
2994 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2995 applied to the result of this function should yield INSN).
2997 Normally, this is simply the next insn. However, if a REG_CC_USER note
2998 is present, it contains the insn that uses CC0.
3000 Return 0 if we can't find the insn. */
3003 next_cc0_user (rtx insn
)
3005 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
3008 return XEXP (note
, 0);
3010 insn
= next_nonnote_insn (insn
);
3011 if (insn
&& NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
3012 insn
= XVECEXP (PATTERN (insn
), 0, 0);
3014 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
3020 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3021 note, it is the previous insn. */
3024 prev_cc0_setter (rtx insn
)
3026 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
3029 return XEXP (note
, 0);
3031 insn
= prev_nonnote_insn (insn
);
3032 gcc_assert (sets_cc0_p (PATTERN (insn
)));
3038 /* Increment the label uses for all labels present in rtx. */
3041 mark_label_nuses (rtx x
)
3047 code
= GET_CODE (x
);
3048 if (code
== LABEL_REF
&& LABEL_P (XEXP (x
, 0)))
3049 LABEL_NUSES (XEXP (x
, 0))++;
3051 fmt
= GET_RTX_FORMAT (code
);
3052 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3055 mark_label_nuses (XEXP (x
, i
));
3056 else if (fmt
[i
] == 'E')
3057 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3058 mark_label_nuses (XVECEXP (x
, i
, j
));
3063 /* Try splitting insns that can be split for better scheduling.
3064 PAT is the pattern which might split.
3065 TRIAL is the insn providing PAT.
3066 LAST is nonzero if we should return the last insn of the sequence produced.
3068 If this routine succeeds in splitting, it returns the first or last
3069 replacement insn depending on the value of LAST. Otherwise, it
3070 returns TRIAL. If the insn to be returned can be split, it will be. */
3073 try_split (rtx pat
, rtx trial
, int last
)
3075 rtx before
= PREV_INSN (trial
);
3076 rtx after
= NEXT_INSN (trial
);
3077 int has_barrier
= 0;
3081 rtx insn_last
, insn
;
3084 if (any_condjump_p (trial
)
3085 && (note
= find_reg_note (trial
, REG_BR_PROB
, 0)))
3086 split_branch_probability
= INTVAL (XEXP (note
, 0));
3087 probability
= split_branch_probability
;
3089 seq
= split_insns (pat
, trial
);
3091 split_branch_probability
= -1;
3093 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3094 We may need to handle this specially. */
3095 if (after
&& BARRIER_P (after
))
3098 after
= NEXT_INSN (after
);
3104 /* Avoid infinite loop if any insn of the result matches
3105 the original pattern. */
3109 if (INSN_P (insn_last
)
3110 && rtx_equal_p (PATTERN (insn_last
), pat
))
3112 if (!NEXT_INSN (insn_last
))
3114 insn_last
= NEXT_INSN (insn_last
);
3118 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3122 mark_jump_label (PATTERN (insn
), insn
, 0);
3124 if (probability
!= -1
3125 && any_condjump_p (insn
)
3126 && !find_reg_note (insn
, REG_BR_PROB
, 0))
3128 /* We can preserve the REG_BR_PROB notes only if exactly
3129 one jump is created, otherwise the machine description
3130 is responsible for this step using
3131 split_branch_probability variable. */
3132 gcc_assert (njumps
== 1);
3134 = gen_rtx_EXPR_LIST (REG_BR_PROB
,
3135 GEN_INT (probability
),
3141 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3142 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3145 for (insn
= insn_last
; insn
; insn
= PREV_INSN (insn
))
3148 rtx
*p
= &CALL_INSN_FUNCTION_USAGE (insn
);
3151 *p
= CALL_INSN_FUNCTION_USAGE (trial
);
3152 SIBLING_CALL_P (insn
) = SIBLING_CALL_P (trial
);
3156 /* Copy notes, particularly those related to the CFG. */
3157 for (note
= REG_NOTES (trial
); note
; note
= XEXP (note
, 1))
3159 switch (REG_NOTE_KIND (note
))
3163 while (insn
!= NULL_RTX
)
3166 || (flag_non_call_exceptions
&& INSN_P (insn
)
3167 && may_trap_p (PATTERN (insn
))))
3169 = gen_rtx_EXPR_LIST (REG_EH_REGION
,
3172 insn
= PREV_INSN (insn
);
3179 while (insn
!= NULL_RTX
)
3183 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3186 insn
= PREV_INSN (insn
);
3190 case REG_NON_LOCAL_GOTO
:
3192 while (insn
!= NULL_RTX
)
3196 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note
),
3199 insn
= PREV_INSN (insn
);
3208 /* If there are LABELS inside the split insns increment the
3209 usage count so we don't delete the label. */
3210 if (NONJUMP_INSN_P (trial
))
3213 while (insn
!= NULL_RTX
)
3215 if (NONJUMP_INSN_P (insn
))
3216 mark_label_nuses (PATTERN (insn
));
3218 insn
= PREV_INSN (insn
);
3222 tem
= emit_insn_after_setloc (seq
, trial
, INSN_LOCATOR (trial
));
3224 delete_insn (trial
);
3226 emit_barrier_after (tem
);
3228 /* Recursively call try_split for each new insn created; by the
3229 time control returns here that insn will be fully split, so
3230 set LAST and continue from the insn after the one returned.
3231 We can't use next_active_insn here since AFTER may be a note.
3232 Ignore deleted insns, which can be occur if not optimizing. */
3233 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
3234 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
3235 tem
= try_split (PATTERN (tem
), tem
, 1);
3237 /* Return either the first or the last insn, depending on which was
3240 ? (after
? PREV_INSN (after
) : last_insn
)
3241 : NEXT_INSN (before
);
3244 /* Make and return an INSN rtx, initializing all its slots.
3245 Store PATTERN in the pattern slots. */
3248 make_insn_raw (rtx pattern
)
3252 insn
= rtx_alloc (INSN
);
3254 INSN_UID (insn
) = cur_insn_uid
++;
3255 PATTERN (insn
) = pattern
;
3256 INSN_CODE (insn
) = -1;
3257 LOG_LINKS (insn
) = NULL
;
3258 REG_NOTES (insn
) = NULL
;
3259 INSN_LOCATOR (insn
) = 0;
3260 BLOCK_FOR_INSN (insn
) = NULL
;
3262 #ifdef ENABLE_RTL_CHECKING
3265 && (returnjump_p (insn
)
3266 || (GET_CODE (insn
) == SET
3267 && SET_DEST (insn
) == pc_rtx
)))
3269 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3277 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3280 make_jump_insn_raw (rtx pattern
)
3284 insn
= rtx_alloc (JUMP_INSN
);
3285 INSN_UID (insn
) = cur_insn_uid
++;
3287 PATTERN (insn
) = pattern
;
3288 INSN_CODE (insn
) = -1;
3289 LOG_LINKS (insn
) = NULL
;
3290 REG_NOTES (insn
) = NULL
;
3291 JUMP_LABEL (insn
) = NULL
;
3292 INSN_LOCATOR (insn
) = 0;
3293 BLOCK_FOR_INSN (insn
) = NULL
;
3298 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3301 make_call_insn_raw (rtx pattern
)
3305 insn
= rtx_alloc (CALL_INSN
);
3306 INSN_UID (insn
) = cur_insn_uid
++;
3308 PATTERN (insn
) = pattern
;
3309 INSN_CODE (insn
) = -1;
3310 LOG_LINKS (insn
) = NULL
;
3311 REG_NOTES (insn
) = NULL
;
3312 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
3313 INSN_LOCATOR (insn
) = 0;
3314 BLOCK_FOR_INSN (insn
) = NULL
;
3319 /* Add INSN to the end of the doubly-linked list.
3320 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3325 PREV_INSN (insn
) = last_insn
;
3326 NEXT_INSN (insn
) = 0;
3328 if (NULL
!= last_insn
)
3329 NEXT_INSN (last_insn
) = insn
;
3331 if (NULL
== first_insn
)
3337 /* Add INSN into the doubly-linked list after insn AFTER. This and
3338 the next should be the only functions called to insert an insn once
3339 delay slots have been filled since only they know how to update a
3343 add_insn_after (rtx insn
, rtx after
)
3345 rtx next
= NEXT_INSN (after
);
3348 gcc_assert (!optimize
|| !INSN_DELETED_P (after
));
3350 NEXT_INSN (insn
) = next
;
3351 PREV_INSN (insn
) = after
;
3355 PREV_INSN (next
) = insn
;
3356 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3357 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
3359 else if (last_insn
== after
)
3363 struct sequence_stack
*stack
= seq_stack
;
3364 /* Scan all pending sequences too. */
3365 for (; stack
; stack
= stack
->next
)
3366 if (after
== stack
->last
)
3375 if (!BARRIER_P (after
)
3376 && !BARRIER_P (insn
)
3377 && (bb
= BLOCK_FOR_INSN (after
)))
3379 set_block_for_insn (insn
, bb
);
3381 bb
->flags
|= BB_DIRTY
;
3382 /* Should not happen as first in the BB is always
3383 either NOTE or LABEL. */
3384 if (BB_END (bb
) == after
3385 /* Avoid clobbering of structure when creating new BB. */
3386 && !BARRIER_P (insn
)
3388 || NOTE_LINE_NUMBER (insn
) != NOTE_INSN_BASIC_BLOCK
))
3392 NEXT_INSN (after
) = insn
;
3393 if (NONJUMP_INSN_P (after
) && GET_CODE (PATTERN (after
)) == SEQUENCE
)
3395 rtx sequence
= PATTERN (after
);
3396 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3400 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3401 the previous should be the only functions called to insert an insn once
3402 delay slots have been filled since only they know how to update a
3406 add_insn_before (rtx insn
, rtx before
)
3408 rtx prev
= PREV_INSN (before
);
3411 gcc_assert (!optimize
|| !INSN_DELETED_P (before
));
3413 PREV_INSN (insn
) = prev
;
3414 NEXT_INSN (insn
) = before
;
3418 NEXT_INSN (prev
) = insn
;
3419 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3421 rtx sequence
= PATTERN (prev
);
3422 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
3425 else if (first_insn
== before
)
3429 struct sequence_stack
*stack
= seq_stack
;
3430 /* Scan all pending sequences too. */
3431 for (; stack
; stack
= stack
->next
)
3432 if (before
== stack
->first
)
3434 stack
->first
= insn
;
3441 if (!BARRIER_P (before
)
3442 && !BARRIER_P (insn
)
3443 && (bb
= BLOCK_FOR_INSN (before
)))
3445 set_block_for_insn (insn
, bb
);
3447 bb
->flags
|= BB_DIRTY
;
3448 /* Should not happen as first in the BB is always either NOTE or
3450 gcc_assert (BB_HEAD (bb
) != insn
3451 /* Avoid clobbering of structure when creating new BB. */
3454 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_BASIC_BLOCK
));
3457 PREV_INSN (before
) = insn
;
3458 if (NONJUMP_INSN_P (before
) && GET_CODE (PATTERN (before
)) == SEQUENCE
)
3459 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
3462 /* Remove an insn from its doubly-linked list. This function knows how
3463 to handle sequences. */
3465 remove_insn (rtx insn
)
3467 rtx next
= NEXT_INSN (insn
);
3468 rtx prev
= PREV_INSN (insn
);
3473 NEXT_INSN (prev
) = next
;
3474 if (NONJUMP_INSN_P (prev
) && GET_CODE (PATTERN (prev
)) == SEQUENCE
)
3476 rtx sequence
= PATTERN (prev
);
3477 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
3480 else if (first_insn
== insn
)
3484 struct sequence_stack
*stack
= seq_stack
;
3485 /* Scan all pending sequences too. */
3486 for (; stack
; stack
= stack
->next
)
3487 if (insn
== stack
->first
)
3489 stack
->first
= next
;
3498 PREV_INSN (next
) = prev
;
3499 if (NONJUMP_INSN_P (next
) && GET_CODE (PATTERN (next
)) == SEQUENCE
)
3500 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
3502 else if (last_insn
== insn
)
3506 struct sequence_stack
*stack
= seq_stack
;
3507 /* Scan all pending sequences too. */
3508 for (; stack
; stack
= stack
->next
)
3509 if (insn
== stack
->last
)
3517 if (!BARRIER_P (insn
)
3518 && (bb
= BLOCK_FOR_INSN (insn
)))
3521 bb
->flags
|= BB_DIRTY
;
3522 if (BB_HEAD (bb
) == insn
)
3524 /* Never ever delete the basic block note without deleting whole
3526 gcc_assert (!NOTE_P (insn
));
3527 BB_HEAD (bb
) = next
;
3529 if (BB_END (bb
) == insn
)
3534 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3537 add_function_usage_to (rtx call_insn
, rtx call_fusage
)
3539 gcc_assert (call_insn
&& CALL_P (call_insn
));
3541 /* Put the register usage information on the CALL. If there is already
3542 some usage information, put ours at the end. */
3543 if (CALL_INSN_FUNCTION_USAGE (call_insn
))
3547 for (link
= CALL_INSN_FUNCTION_USAGE (call_insn
); XEXP (link
, 1) != 0;
3548 link
= XEXP (link
, 1))
3551 XEXP (link
, 1) = call_fusage
;
3554 CALL_INSN_FUNCTION_USAGE (call_insn
) = call_fusage
;
3557 /* Delete all insns made since FROM.
3558 FROM becomes the new last instruction. */
3561 delete_insns_since (rtx from
)
3566 NEXT_INSN (from
) = 0;
3570 /* This function is deprecated, please use sequences instead.
3572 Move a consecutive bunch of insns to a different place in the chain.
3573 The insns to be moved are those between FROM and TO.
3574 They are moved to a new position after the insn AFTER.
3575 AFTER must not be FROM or TO or any insn in between.
3577 This function does not know about SEQUENCEs and hence should not be
3578 called after delay-slot filling has been done. */
3581 reorder_insns_nobb (rtx from
, rtx to
, rtx after
)
3583 /* Splice this bunch out of where it is now. */
3584 if (PREV_INSN (from
))
3585 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
3587 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
3588 if (last_insn
== to
)
3589 last_insn
= PREV_INSN (from
);
3590 if (first_insn
== from
)
3591 first_insn
= NEXT_INSN (to
);
3593 /* Make the new neighbors point to it and it to them. */
3594 if (NEXT_INSN (after
))
3595 PREV_INSN (NEXT_INSN (after
)) = to
;
3597 NEXT_INSN (to
) = NEXT_INSN (after
);
3598 PREV_INSN (from
) = after
;
3599 NEXT_INSN (after
) = from
;
3600 if (after
== last_insn
)
3604 /* Same as function above, but take care to update BB boundaries. */
3606 reorder_insns (rtx from
, rtx to
, rtx after
)
3608 rtx prev
= PREV_INSN (from
);
3609 basic_block bb
, bb2
;
3611 reorder_insns_nobb (from
, to
, after
);
3613 if (!BARRIER_P (after
)
3614 && (bb
= BLOCK_FOR_INSN (after
)))
3617 bb
->flags
|= BB_DIRTY
;
3619 if (!BARRIER_P (from
)
3620 && (bb2
= BLOCK_FOR_INSN (from
)))
3622 if (BB_END (bb2
) == to
)
3623 BB_END (bb2
) = prev
;
3624 bb2
->flags
|= BB_DIRTY
;
3627 if (BB_END (bb
) == after
)
3630 for (x
= from
; x
!= NEXT_INSN (to
); x
= NEXT_INSN (x
))
3632 set_block_for_insn (x
, bb
);
3636 /* Return the line note insn preceding INSN. */
3639 find_line_note (rtx insn
)
3641 if (no_line_numbers
)
3644 for (; insn
; insn
= PREV_INSN (insn
))
3646 && NOTE_LINE_NUMBER (insn
) >= 0)
3652 /* Remove unnecessary notes from the instruction stream. */
3655 remove_unnecessary_notes (void)
3657 rtx eh_stack
= NULL_RTX
;
3662 /* We must not remove the first instruction in the function because
3663 the compiler depends on the first instruction being a note. */
3664 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
3666 /* Remember what's next. */
3667 next
= NEXT_INSN (insn
);
3669 /* We're only interested in notes. */
3673 switch (NOTE_LINE_NUMBER (insn
))
3675 case NOTE_INSN_DELETED
:
3679 case NOTE_INSN_EH_REGION_BEG
:
3680 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
3683 case NOTE_INSN_EH_REGION_END
:
3684 /* Too many end notes. */
3685 gcc_assert (eh_stack
);
3686 /* Mismatched nesting. */
3687 gcc_assert (NOTE_EH_HANDLER (XEXP (eh_stack
, 0))
3688 == NOTE_EH_HANDLER (insn
));
3690 eh_stack
= XEXP (eh_stack
, 1);
3691 free_INSN_LIST_node (tmp
);
3694 case NOTE_INSN_BLOCK_BEG
:
3695 case NOTE_INSN_BLOCK_END
:
3696 /* BLOCK_END and BLOCK_BEG notes only exist in the `final' pass. */
3704 /* Too many EH_REGION_BEG notes. */
3705 gcc_assert (!eh_stack
);
3709 /* Emit insn(s) of given code and pattern
3710 at a specified place within the doubly-linked list.
3712 All of the emit_foo global entry points accept an object
3713 X which is either an insn list or a PATTERN of a single
3716 There are thus a few canonical ways to generate code and
3717 emit it at a specific place in the instruction stream. For
3718 example, consider the instruction named SPOT and the fact that
3719 we would like to emit some instructions before SPOT. We might
3723 ... emit the new instructions ...
3724 insns_head = get_insns ();
3727 emit_insn_before (insns_head, SPOT);
3729 It used to be common to generate SEQUENCE rtl instead, but that
3730 is a relic of the past which no longer occurs. The reason is that
3731 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3732 generated would almost certainly die right after it was created. */
3734 /* Make X be output before the instruction BEFORE. */
3737 emit_insn_before_noloc (rtx x
, rtx before
)
3742 gcc_assert (before
);
3747 switch (GET_CODE (x
))
3758 rtx next
= NEXT_INSN (insn
);
3759 add_insn_before (insn
, before
);
3765 #ifdef ENABLE_RTL_CHECKING
3772 last
= make_insn_raw (x
);
3773 add_insn_before (last
, before
);
3780 /* Make an instruction with body X and code JUMP_INSN
3781 and output it before the instruction BEFORE. */
3784 emit_jump_insn_before_noloc (rtx x
, rtx before
)
3786 rtx insn
, last
= NULL_RTX
;
3788 gcc_assert (before
);
3790 switch (GET_CODE (x
))
3801 rtx next
= NEXT_INSN (insn
);
3802 add_insn_before (insn
, before
);
3808 #ifdef ENABLE_RTL_CHECKING
3815 last
= make_jump_insn_raw (x
);
3816 add_insn_before (last
, before
);
3823 /* Make an instruction with body X and code CALL_INSN
3824 and output it before the instruction BEFORE. */
3827 emit_call_insn_before_noloc (rtx x
, rtx before
)
3829 rtx last
= NULL_RTX
, insn
;
3831 gcc_assert (before
);
3833 switch (GET_CODE (x
))
3844 rtx next
= NEXT_INSN (insn
);
3845 add_insn_before (insn
, before
);
3851 #ifdef ENABLE_RTL_CHECKING
3858 last
= make_call_insn_raw (x
);
3859 add_insn_before (last
, before
);
3866 /* Make an insn of code BARRIER
3867 and output it before the insn BEFORE. */
3870 emit_barrier_before (rtx before
)
3872 rtx insn
= rtx_alloc (BARRIER
);
3874 INSN_UID (insn
) = cur_insn_uid
++;
3876 add_insn_before (insn
, before
);
3880 /* Emit the label LABEL before the insn BEFORE. */
3883 emit_label_before (rtx label
, rtx before
)
3885 /* This can be called twice for the same label as a result of the
3886 confusion that follows a syntax error! So make it harmless. */
3887 if (INSN_UID (label
) == 0)
3889 INSN_UID (label
) = cur_insn_uid
++;
3890 add_insn_before (label
, before
);
3896 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3899 emit_note_before (int subtype
, rtx before
)
3901 rtx note
= rtx_alloc (NOTE
);
3902 INSN_UID (note
) = cur_insn_uid
++;
3903 #ifndef USE_MAPPED_LOCATION
3904 NOTE_SOURCE_FILE (note
) = 0;
3906 NOTE_LINE_NUMBER (note
) = subtype
;
3907 BLOCK_FOR_INSN (note
) = NULL
;
3909 add_insn_before (note
, before
);
3913 /* Helper for emit_insn_after, handles lists of instructions
3916 static rtx
emit_insn_after_1 (rtx
, rtx
);
3919 emit_insn_after_1 (rtx first
, rtx after
)
3925 if (!BARRIER_P (after
)
3926 && (bb
= BLOCK_FOR_INSN (after
)))
3928 bb
->flags
|= BB_DIRTY
;
3929 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3930 if (!BARRIER_P (last
))
3931 set_block_for_insn (last
, bb
);
3932 if (!BARRIER_P (last
))
3933 set_block_for_insn (last
, bb
);
3934 if (BB_END (bb
) == after
)
3938 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3941 after_after
= NEXT_INSN (after
);
3943 NEXT_INSN (after
) = first
;
3944 PREV_INSN (first
) = after
;
3945 NEXT_INSN (last
) = after_after
;
3947 PREV_INSN (after_after
) = last
;
3949 if (after
== last_insn
)
3954 /* Make X be output after the insn AFTER. */
3957 emit_insn_after_noloc (rtx x
, rtx after
)
3966 switch (GET_CODE (x
))
3974 last
= emit_insn_after_1 (x
, after
);
3977 #ifdef ENABLE_RTL_CHECKING
3984 last
= make_insn_raw (x
);
3985 add_insn_after (last
, after
);
3992 /* Similar to emit_insn_after, except that line notes are to be inserted so
3993 as to act as if this insn were at FROM. */
3996 emit_insn_after_with_line_notes (rtx x
, rtx after
, rtx from
)
3998 rtx from_line
= find_line_note (from
);
3999 rtx after_line
= find_line_note (after
);
4000 rtx insn
= emit_insn_after (x
, after
);
4003 emit_note_copy_after (from_line
, after
);
4006 emit_note_copy_after (after_line
, insn
);
4009 /* Make an insn of code JUMP_INSN with body X
4010 and output it after the insn AFTER. */
4013 emit_jump_insn_after_noloc (rtx x
, rtx after
)
4019 switch (GET_CODE (x
))
4027 last
= emit_insn_after_1 (x
, after
);
4030 #ifdef ENABLE_RTL_CHECKING
4037 last
= make_jump_insn_raw (x
);
4038 add_insn_after (last
, after
);
4045 /* Make an instruction with body X and code CALL_INSN
4046 and output it after the instruction AFTER. */
4049 emit_call_insn_after_noloc (rtx x
, rtx after
)
4055 switch (GET_CODE (x
))
4063 last
= emit_insn_after_1 (x
, after
);
4066 #ifdef ENABLE_RTL_CHECKING
4073 last
= make_call_insn_raw (x
);
4074 add_insn_after (last
, after
);
4081 /* Make an insn of code BARRIER
4082 and output it after the insn AFTER. */
4085 emit_barrier_after (rtx after
)
4087 rtx insn
= rtx_alloc (BARRIER
);
4089 INSN_UID (insn
) = cur_insn_uid
++;
4091 add_insn_after (insn
, after
);
4095 /* Emit the label LABEL after the insn AFTER. */
4098 emit_label_after (rtx label
, rtx after
)
4100 /* This can be called twice for the same label
4101 as a result of the confusion that follows a syntax error!
4102 So make it harmless. */
4103 if (INSN_UID (label
) == 0)
4105 INSN_UID (label
) = cur_insn_uid
++;
4106 add_insn_after (label
, after
);
4112 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4115 emit_note_after (int subtype
, rtx after
)
4117 rtx note
= rtx_alloc (NOTE
);
4118 INSN_UID (note
) = cur_insn_uid
++;
4119 #ifndef USE_MAPPED_LOCATION
4120 NOTE_SOURCE_FILE (note
) = 0;
4122 NOTE_LINE_NUMBER (note
) = subtype
;
4123 BLOCK_FOR_INSN (note
) = NULL
;
4124 add_insn_after (note
, after
);
4128 /* Emit a copy of note ORIG after the insn AFTER. */
4131 emit_note_copy_after (rtx orig
, rtx after
)
4135 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4141 note
= rtx_alloc (NOTE
);
4142 INSN_UID (note
) = cur_insn_uid
++;
4143 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4144 NOTE_DATA (note
) = NOTE_DATA (orig
);
4145 BLOCK_FOR_INSN (note
) = NULL
;
4146 add_insn_after (note
, after
);
4150 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4152 emit_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4154 rtx last
= emit_insn_after_noloc (pattern
, after
);
4156 if (pattern
== NULL_RTX
|| !loc
)
4159 after
= NEXT_INSN (after
);
4162 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4163 INSN_LOCATOR (after
) = loc
;
4166 after
= NEXT_INSN (after
);
4171 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4173 emit_insn_after (rtx pattern
, rtx after
)
4176 return emit_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4178 return emit_insn_after_noloc (pattern
, after
);
4181 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4183 emit_jump_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4185 rtx last
= emit_jump_insn_after_noloc (pattern
, after
);
4187 if (pattern
== NULL_RTX
|| !loc
)
4190 after
= NEXT_INSN (after
);
4193 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4194 INSN_LOCATOR (after
) = loc
;
4197 after
= NEXT_INSN (after
);
4202 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4204 emit_jump_insn_after (rtx pattern
, rtx after
)
4207 return emit_jump_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4209 return emit_jump_insn_after_noloc (pattern
, after
);
4212 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4214 emit_call_insn_after_setloc (rtx pattern
, rtx after
, int loc
)
4216 rtx last
= emit_call_insn_after_noloc (pattern
, after
);
4218 if (pattern
== NULL_RTX
|| !loc
)
4221 after
= NEXT_INSN (after
);
4224 if (active_insn_p (after
) && !INSN_LOCATOR (after
))
4225 INSN_LOCATOR (after
) = loc
;
4228 after
= NEXT_INSN (after
);
4233 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4235 emit_call_insn_after (rtx pattern
, rtx after
)
4238 return emit_call_insn_after_setloc (pattern
, after
, INSN_LOCATOR (after
));
4240 return emit_call_insn_after_noloc (pattern
, after
);
4243 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4245 emit_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4247 rtx first
= PREV_INSN (before
);
4248 rtx last
= emit_insn_before_noloc (pattern
, before
);
4250 if (pattern
== NULL_RTX
|| !loc
)
4253 first
= NEXT_INSN (first
);
4256 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4257 INSN_LOCATOR (first
) = loc
;
4260 first
= NEXT_INSN (first
);
4265 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4267 emit_insn_before (rtx pattern
, rtx before
)
4269 if (INSN_P (before
))
4270 return emit_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4272 return emit_insn_before_noloc (pattern
, before
);
4275 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4277 emit_jump_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4279 rtx first
= PREV_INSN (before
);
4280 rtx last
= emit_jump_insn_before_noloc (pattern
, before
);
4282 if (pattern
== NULL_RTX
)
4285 first
= NEXT_INSN (first
);
4288 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4289 INSN_LOCATOR (first
) = loc
;
4292 first
= NEXT_INSN (first
);
4297 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4299 emit_jump_insn_before (rtx pattern
, rtx before
)
4301 if (INSN_P (before
))
4302 return emit_jump_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4304 return emit_jump_insn_before_noloc (pattern
, before
);
4307 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4309 emit_call_insn_before_setloc (rtx pattern
, rtx before
, int loc
)
4311 rtx first
= PREV_INSN (before
);
4312 rtx last
= emit_call_insn_before_noloc (pattern
, before
);
4314 if (pattern
== NULL_RTX
)
4317 first
= NEXT_INSN (first
);
4320 if (active_insn_p (first
) && !INSN_LOCATOR (first
))
4321 INSN_LOCATOR (first
) = loc
;
4324 first
= NEXT_INSN (first
);
4329 /* like emit_call_insn_before_noloc,
4330 but set insn_locator according to before. */
4332 emit_call_insn_before (rtx pattern
, rtx before
)
4334 if (INSN_P (before
))
4335 return emit_call_insn_before_setloc (pattern
, before
, INSN_LOCATOR (before
));
4337 return emit_call_insn_before_noloc (pattern
, before
);
4340 /* Take X and emit it at the end of the doubly-linked
4343 Returns the last insn emitted. */
4348 rtx last
= last_insn
;
4354 switch (GET_CODE (x
))
4365 rtx next
= NEXT_INSN (insn
);
4372 #ifdef ENABLE_RTL_CHECKING
4379 last
= make_insn_raw (x
);
4387 /* Make an insn of code JUMP_INSN with pattern X
4388 and add it to the end of the doubly-linked list. */
4391 emit_jump_insn (rtx x
)
4393 rtx last
= NULL_RTX
, insn
;
4395 switch (GET_CODE (x
))
4406 rtx next
= NEXT_INSN (insn
);
4413 #ifdef ENABLE_RTL_CHECKING
4420 last
= make_jump_insn_raw (x
);
4428 /* Make an insn of code CALL_INSN with pattern X
4429 and add it to the end of the doubly-linked list. */
4432 emit_call_insn (rtx x
)
4436 switch (GET_CODE (x
))
4444 insn
= emit_insn (x
);
4447 #ifdef ENABLE_RTL_CHECKING
4454 insn
= make_call_insn_raw (x
);
4462 /* Add the label LABEL to the end of the doubly-linked list. */
4465 emit_label (rtx label
)
4467 /* This can be called twice for the same label
4468 as a result of the confusion that follows a syntax error!
4469 So make it harmless. */
4470 if (INSN_UID (label
) == 0)
4472 INSN_UID (label
) = cur_insn_uid
++;
4478 /* Make an insn of code BARRIER
4479 and add it to the end of the doubly-linked list. */
4484 rtx barrier
= rtx_alloc (BARRIER
);
4485 INSN_UID (barrier
) = cur_insn_uid
++;
4490 /* Make line numbering NOTE insn for LOCATION add it to the end
4491 of the doubly-linked list, but only if line-numbers are desired for
4492 debugging info and it doesn't match the previous one. */
4495 emit_line_note (location_t location
)
4499 #ifdef USE_MAPPED_LOCATION
4500 if (location
== last_location
)
4503 if (location
.file
&& last_location
.file
4504 && !strcmp (location
.file
, last_location
.file
)
4505 && location
.line
== last_location
.line
)
4508 last_location
= location
;
4510 if (no_line_numbers
)
4516 #ifdef USE_MAPPED_LOCATION
4517 note
= emit_note ((int) location
);
4519 note
= emit_note (location
.line
);
4520 NOTE_SOURCE_FILE (note
) = location
.file
;
4526 /* Emit a copy of note ORIG. */
4529 emit_note_copy (rtx orig
)
4533 if (NOTE_LINE_NUMBER (orig
) >= 0 && no_line_numbers
)
4539 note
= rtx_alloc (NOTE
);
4541 INSN_UID (note
) = cur_insn_uid
++;
4542 NOTE_DATA (note
) = NOTE_DATA (orig
);
4543 NOTE_LINE_NUMBER (note
) = NOTE_LINE_NUMBER (orig
);
4544 BLOCK_FOR_INSN (note
) = NULL
;
4550 /* Make an insn of code NOTE or type NOTE_NO
4551 and add it to the end of the doubly-linked list. */
4554 emit_note (int note_no
)
4558 note
= rtx_alloc (NOTE
);
4559 INSN_UID (note
) = cur_insn_uid
++;
4560 NOTE_LINE_NUMBER (note
) = note_no
;
4561 memset (&NOTE_DATA (note
), 0, sizeof (NOTE_DATA (note
)));
4562 BLOCK_FOR_INSN (note
) = NULL
;
4567 /* Cause next statement to emit a line note even if the line number
4571 force_next_line_note (void)
4573 #ifdef USE_MAPPED_LOCATION
4576 last_location
.line
= -1;
4580 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4581 note of this type already exists, remove it first. */
4584 set_unique_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
4586 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
4592 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4593 has multiple sets (some callers assume single_set
4594 means the insn only has one set, when in fact it
4595 means the insn only has one * useful * set). */
4596 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
4602 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4603 It serves no useful purpose and breaks eliminate_regs. */
4604 if (GET_CODE (datum
) == ASM_OPERANDS
)
4614 XEXP (note
, 0) = datum
;
4618 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
4619 return REG_NOTES (insn
);
4622 /* Return an indication of which type of insn should have X as a body.
4623 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4625 static enum rtx_code
4626 classify_insn (rtx x
)
4630 if (GET_CODE (x
) == CALL
)
4632 if (GET_CODE (x
) == RETURN
)
4634 if (GET_CODE (x
) == SET
)
4636 if (SET_DEST (x
) == pc_rtx
)
4638 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4643 if (GET_CODE (x
) == PARALLEL
)
4646 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
4647 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
4649 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4650 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
4652 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
4653 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
4659 /* Emit the rtl pattern X as an appropriate kind of insn.
4660 If X is a label, it is simply added into the insn chain. */
4665 enum rtx_code code
= classify_insn (x
);
4670 return emit_label (x
);
4672 return emit_insn (x
);
4675 rtx insn
= emit_jump_insn (x
);
4676 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
4677 return emit_barrier ();
4681 return emit_call_insn (x
);
4687 /* Space for free sequence stack entries. */
4688 static GTY ((deletable
)) struct sequence_stack
*free_sequence_stack
;
4690 /* Begin emitting insns to a sequence. If this sequence will contain
4691 something that might cause the compiler to pop arguments to function
4692 calls (because those pops have previously been deferred; see
4693 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4694 before calling this function. That will ensure that the deferred
4695 pops are not accidentally emitted in the middle of this sequence. */
4698 start_sequence (void)
4700 struct sequence_stack
*tem
;
4702 if (free_sequence_stack
!= NULL
)
4704 tem
= free_sequence_stack
;
4705 free_sequence_stack
= tem
->next
;
4708 tem
= ggc_alloc (sizeof (struct sequence_stack
));
4710 tem
->next
= seq_stack
;
4711 tem
->first
= first_insn
;
4712 tem
->last
= last_insn
;
4720 /* Set up the insn chain starting with FIRST as the current sequence,
4721 saving the previously current one. See the documentation for
4722 start_sequence for more information about how to use this function. */
4725 push_to_sequence (rtx first
)
4731 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
4737 /* Set up the outer-level insn chain
4738 as the current sequence, saving the previously current one. */
4741 push_topmost_sequence (void)
4743 struct sequence_stack
*stack
, *top
= NULL
;
4747 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4750 first_insn
= top
->first
;
4751 last_insn
= top
->last
;
4754 /* After emitting to the outer-level insn chain, update the outer-level
4755 insn chain, and restore the previous saved state. */
4758 pop_topmost_sequence (void)
4760 struct sequence_stack
*stack
, *top
= NULL
;
4762 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
4765 top
->first
= first_insn
;
4766 top
->last
= last_insn
;
4771 /* After emitting to a sequence, restore previous saved state.
4773 To get the contents of the sequence just made, you must call
4774 `get_insns' *before* calling here.
4776 If the compiler might have deferred popping arguments while
4777 generating this sequence, and this sequence will not be immediately
4778 inserted into the instruction stream, use do_pending_stack_adjust
4779 before calling get_insns. That will ensure that the deferred
4780 pops are inserted into this sequence, and not into some random
4781 location in the instruction stream. See INHIBIT_DEFER_POP for more
4782 information about deferred popping of arguments. */
4787 struct sequence_stack
*tem
= seq_stack
;
4789 first_insn
= tem
->first
;
4790 last_insn
= tem
->last
;
4791 seq_stack
= tem
->next
;
4793 memset (tem
, 0, sizeof (*tem
));
4794 tem
->next
= free_sequence_stack
;
4795 free_sequence_stack
= tem
;
4798 /* Return 1 if currently emitting into a sequence. */
4801 in_sequence_p (void)
4803 return seq_stack
!= 0;
4806 /* Put the various virtual registers into REGNO_REG_RTX. */
4809 init_virtual_regs (struct emit_status
*es
)
4811 rtx
*ptr
= es
->x_regno_reg_rtx
;
4812 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
4813 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
4814 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
4815 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
4816 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
4820 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4821 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
4822 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
4823 static int copy_insn_n_scratches
;
4825 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4826 copied an ASM_OPERANDS.
4827 In that case, it is the original input-operand vector. */
4828 static rtvec orig_asm_operands_vector
;
4830 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4831 copied an ASM_OPERANDS.
4832 In that case, it is the copied input-operand vector. */
4833 static rtvec copy_asm_operands_vector
;
4835 /* Likewise for the constraints vector. */
4836 static rtvec orig_asm_constraints_vector
;
4837 static rtvec copy_asm_constraints_vector
;
4839 /* Recursively create a new copy of an rtx for copy_insn.
4840 This function differs from copy_rtx in that it handles SCRATCHes and
4841 ASM_OPERANDs properly.
4842 Normally, this function is not used directly; use copy_insn as front end.
4843 However, you could first copy an insn pattern with copy_insn and then use
4844 this function afterwards to properly copy any REG_NOTEs containing
4848 copy_insn_1 (rtx orig
)
4853 const char *format_ptr
;
4855 code
= GET_CODE (orig
);
4869 if (REG_P (XEXP (orig
, 0)) && REGNO (XEXP (orig
, 0)) < FIRST_PSEUDO_REGISTER
)
4874 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
4875 if (copy_insn_scratch_in
[i
] == orig
)
4876 return copy_insn_scratch_out
[i
];
4880 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4881 a LABEL_REF, it isn't sharable. */
4882 if (GET_CODE (XEXP (orig
, 0)) == PLUS
4883 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
4884 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
4888 /* A MEM with a constant address is not sharable. The problem is that
4889 the constant address may need to be reloaded. If the mem is shared,
4890 then reloading one copy of this mem will cause all copies to appear
4891 to have been reloaded. */
4897 copy
= rtx_alloc (code
);
4899 /* Copy the various flags, and other information. We assume that
4900 all fields need copying, and then clear the fields that should
4901 not be copied. That is the sensible default behavior, and forces
4902 us to explicitly document why we are *not* copying a flag. */
4903 memcpy (copy
, orig
, RTX_HDR_SIZE
);
4905 /* We do not copy the USED flag, which is used as a mark bit during
4906 walks over the RTL. */
4907 RTX_FLAG (copy
, used
) = 0;
4909 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4912 RTX_FLAG (copy
, jump
) = 0;
4913 RTX_FLAG (copy
, call
) = 0;
4914 RTX_FLAG (copy
, frame_related
) = 0;
4917 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
4919 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
4921 copy
->u
.fld
[i
] = orig
->u
.fld
[i
];
4922 switch (*format_ptr
++)
4925 if (XEXP (orig
, i
) != NULL
)
4926 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
4931 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
4932 XVEC (copy
, i
) = copy_asm_constraints_vector
;
4933 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
4934 XVEC (copy
, i
) = copy_asm_operands_vector
;
4935 else if (XVEC (orig
, i
) != NULL
)
4937 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
4938 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
4939 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
4950 /* These are left unchanged. */
4958 if (code
== SCRATCH
)
4960 i
= copy_insn_n_scratches
++;
4961 gcc_assert (i
< MAX_RECOG_OPERANDS
);
4962 copy_insn_scratch_in
[i
] = orig
;
4963 copy_insn_scratch_out
[i
] = copy
;
4965 else if (code
== ASM_OPERANDS
)
4967 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
4968 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
4969 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
4970 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
4976 /* Create a new copy of an rtx.
4977 This function differs from copy_rtx in that it handles SCRATCHes and
4978 ASM_OPERANDs properly.
4979 INSN doesn't really have to be a full INSN; it could be just the
4982 copy_insn (rtx insn
)
4984 copy_insn_n_scratches
= 0;
4985 orig_asm_operands_vector
= 0;
4986 orig_asm_constraints_vector
= 0;
4987 copy_asm_operands_vector
= 0;
4988 copy_asm_constraints_vector
= 0;
4989 return copy_insn_1 (insn
);
4992 /* Initialize data structures and variables in this file
4993 before generating rtl for each function. */
4998 struct function
*f
= cfun
;
5000 f
->emit
= ggc_alloc (sizeof (struct emit_status
));
5004 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
5005 last_location
= UNKNOWN_LOCATION
;
5006 first_label_num
= label_num
;
5009 /* Init the tables that describe all the pseudo regs. */
5011 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
5013 f
->emit
->regno_pointer_align
5014 = ggc_alloc_cleared (f
->emit
->regno_pointer_align_length
5015 * sizeof (unsigned char));
5018 = ggc_alloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
));
5020 /* Put copies of all the hard registers into regno_reg_rtx. */
5021 memcpy (regno_reg_rtx
,
5022 static_regno_reg_rtx
,
5023 FIRST_PSEUDO_REGISTER
* sizeof (rtx
));
5025 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5026 init_virtual_regs (f
->emit
);
5028 /* Indicate that the virtual registers and stack locations are
5030 REG_POINTER (stack_pointer_rtx
) = 1;
5031 REG_POINTER (frame_pointer_rtx
) = 1;
5032 REG_POINTER (hard_frame_pointer_rtx
) = 1;
5033 REG_POINTER (arg_pointer_rtx
) = 1;
5035 REG_POINTER (virtual_incoming_args_rtx
) = 1;
5036 REG_POINTER (virtual_stack_vars_rtx
) = 1;
5037 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
5038 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
5039 REG_POINTER (virtual_cfa_rtx
) = 1;
5041 #ifdef STACK_BOUNDARY
5042 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
5043 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5044 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
5045 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
5047 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5048 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
5049 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
5050 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
5051 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
5054 #ifdef INIT_EXPANDERS
5059 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5062 gen_const_vector (enum machine_mode mode
, int constant
)
5067 enum machine_mode inner
;
5069 units
= GET_MODE_NUNITS (mode
);
5070 inner
= GET_MODE_INNER (mode
);
5072 v
= rtvec_alloc (units
);
5074 /* We need to call this function after we set the scalar const_tiny_rtx
5076 gcc_assert (const_tiny_rtx
[constant
][(int) inner
]);
5078 for (i
= 0; i
< units
; ++i
)
5079 RTVEC_ELT (v
, i
) = const_tiny_rtx
[constant
][(int) inner
];
5081 tem
= gen_rtx_raw_CONST_VECTOR (mode
, v
);
5085 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5086 all elements are zero, and the one vector when all elements are one. */
5088 gen_rtx_CONST_VECTOR (enum machine_mode mode
, rtvec v
)
5090 enum machine_mode inner
= GET_MODE_INNER (mode
);
5091 int nunits
= GET_MODE_NUNITS (mode
);
5095 /* Check to see if all of the elements have the same value. */
5096 x
= RTVEC_ELT (v
, nunits
- 1);
5097 for (i
= nunits
- 2; i
>= 0; i
--)
5098 if (RTVEC_ELT (v
, i
) != x
)
5101 /* If the values are all the same, check to see if we can use one of the
5102 standard constant vectors. */
5105 if (x
== CONST0_RTX (inner
))
5106 return CONST0_RTX (mode
);
5107 else if (x
== CONST1_RTX (inner
))
5108 return CONST1_RTX (mode
);
5111 return gen_rtx_raw_CONST_VECTOR (mode
, v
);
5114 /* Create some permanent unique rtl objects shared between all functions.
5115 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5118 init_emit_once (int line_numbers
)
5121 enum machine_mode mode
;
5122 enum machine_mode double_mode
;
5124 /* We need reg_raw_mode, so initialize the modes now. */
5125 init_reg_modes_once ();
5127 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5129 const_int_htab
= htab_create_ggc (37, const_int_htab_hash
,
5130 const_int_htab_eq
, NULL
);
5132 const_double_htab
= htab_create_ggc (37, const_double_htab_hash
,
5133 const_double_htab_eq
, NULL
);
5135 mem_attrs_htab
= htab_create_ggc (37, mem_attrs_htab_hash
,
5136 mem_attrs_htab_eq
, NULL
);
5137 reg_attrs_htab
= htab_create_ggc (37, reg_attrs_htab_hash
,
5138 reg_attrs_htab_eq
, NULL
);
5140 no_line_numbers
= ! line_numbers
;
5142 /* Compute the word and byte modes. */
5144 byte_mode
= VOIDmode
;
5145 word_mode
= VOIDmode
;
5146 double_mode
= VOIDmode
;
5148 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5149 mode
= GET_MODE_WIDER_MODE (mode
))
5151 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
5152 && byte_mode
== VOIDmode
)
5155 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
5156 && word_mode
== VOIDmode
)
5160 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5161 mode
= GET_MODE_WIDER_MODE (mode
))
5163 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
5164 && double_mode
== VOIDmode
)
5168 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
5170 /* Assign register numbers to the globally defined register rtx.
5171 This must be done at runtime because the register number field
5172 is in a union and some compilers can't initialize unions. */
5174 pc_rtx
= gen_rtx_PC (VOIDmode
);
5175 cc0_rtx
= gen_rtx_CC0 (VOIDmode
);
5176 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
5177 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
5178 if (hard_frame_pointer_rtx
== 0)
5179 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
5180 HARD_FRAME_POINTER_REGNUM
);
5181 if (arg_pointer_rtx
== 0)
5182 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
5183 virtual_incoming_args_rtx
=
5184 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
5185 virtual_stack_vars_rtx
=
5186 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
5187 virtual_stack_dynamic_rtx
=
5188 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
5189 virtual_outgoing_args_rtx
=
5190 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
5191 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
5193 /* Initialize RTL for commonly used hard registers. These are
5194 copied into regno_reg_rtx as we begin to compile each function. */
5195 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
5196 static_regno_reg_rtx
[i
] = gen_raw_REG (reg_raw_mode
[i
], i
);
5198 #ifdef INIT_EXPANDERS
5199 /* This is to initialize {init|mark|free}_machine_status before the first
5200 call to push_function_context_to. This is needed by the Chill front
5201 end which calls push_function_context_to before the first call to
5202 init_function_start. */
5206 /* Create the unique rtx's for certain rtx codes and operand values. */
5208 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5209 tries to use these variables. */
5210 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
5211 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
5212 gen_rtx_raw_CONST_INT (VOIDmode
, (HOST_WIDE_INT
) i
);
5214 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
5215 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
5216 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
5218 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
5220 REAL_VALUE_FROM_INT (dconst0
, 0, 0, double_mode
);
5221 REAL_VALUE_FROM_INT (dconst1
, 1, 0, double_mode
);
5222 REAL_VALUE_FROM_INT (dconst2
, 2, 0, double_mode
);
5223 REAL_VALUE_FROM_INT (dconst3
, 3, 0, double_mode
);
5224 REAL_VALUE_FROM_INT (dconst10
, 10, 0, double_mode
);
5225 REAL_VALUE_FROM_INT (dconstm1
, -1, -1, double_mode
);
5226 REAL_VALUE_FROM_INT (dconstm2
, -2, -1, double_mode
);
5228 dconsthalf
= dconst1
;
5229 SET_REAL_EXP (&dconsthalf
, REAL_EXP (&dconsthalf
) - 1);
5231 real_arithmetic (&dconstthird
, RDIV_EXPR
, &dconst1
, &dconst3
);
5233 /* Initialize mathematical constants for constant folding builtins.
5234 These constants need to be given to at least 160 bits precision. */
5235 real_from_string (&dconstpi
,
5236 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5237 real_from_string (&dconste
,
5238 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5240 for (i
= 0; i
< (int) ARRAY_SIZE (const_tiny_rtx
); i
++)
5242 REAL_VALUE_TYPE
*r
=
5243 (i
== 0 ? &dconst0
: i
== 1 ? &dconst1
: &dconst2
);
5245 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
5246 mode
= GET_MODE_WIDER_MODE (mode
))
5247 const_tiny_rtx
[i
][(int) mode
] =
5248 CONST_DOUBLE_FROM_REAL_VALUE (*r
, mode
);
5250 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
5252 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
5253 mode
= GET_MODE_WIDER_MODE (mode
))
5254 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5256 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
5258 mode
= GET_MODE_WIDER_MODE (mode
))
5259 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
5262 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT
);
5264 mode
= GET_MODE_WIDER_MODE (mode
))
5266 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5267 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5270 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT
);
5272 mode
= GET_MODE_WIDER_MODE (mode
))
5274 const_tiny_rtx
[0][(int) mode
] = gen_const_vector (mode
, 0);
5275 const_tiny_rtx
[1][(int) mode
] = gen_const_vector (mode
, 1);
5278 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
5279 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
5280 const_tiny_rtx
[0][i
] = const0_rtx
;
5282 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
5283 if (STORE_FLAG_VALUE
== 1)
5284 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
5286 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5287 return_address_pointer_rtx
5288 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
5291 #ifdef STATIC_CHAIN_REGNUM
5292 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
5294 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5295 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
5296 static_chain_incoming_rtx
5297 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
5300 static_chain_incoming_rtx
= static_chain_rtx
;
5304 static_chain_rtx
= STATIC_CHAIN
;
5306 #ifdef STATIC_CHAIN_INCOMING
5307 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
5309 static_chain_incoming_rtx
= static_chain_rtx
;
5313 if ((unsigned) PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
5314 pic_offset_table_rtx
= gen_raw_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
5317 /* Produce exact duplicate of insn INSN after AFTER.
5318 Care updating of libcall regions if present. */
5321 emit_copy_of_insn_after (rtx insn
, rtx after
)
5324 rtx note1
, note2
, link
;
5326 switch (GET_CODE (insn
))
5329 new = emit_insn_after (copy_insn (PATTERN (insn
)), after
);
5333 new = emit_jump_insn_after (copy_insn (PATTERN (insn
)), after
);
5337 new = emit_call_insn_after (copy_insn (PATTERN (insn
)), after
);
5338 if (CALL_INSN_FUNCTION_USAGE (insn
))
5339 CALL_INSN_FUNCTION_USAGE (new)
5340 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn
));
5341 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn
);
5342 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn
);
5349 /* Update LABEL_NUSES. */
5350 mark_jump_label (PATTERN (new), new, 0);
5352 INSN_LOCATOR (new) = INSN_LOCATOR (insn
);
5354 /* If the old insn is frame related, then so is the new one. This is
5355 primarily needed for IA-64 unwind info which marks epilogue insns,
5356 which may be duplicated by the basic block reordering code. */
5357 RTX_FRAME_RELATED_P (new) = RTX_FRAME_RELATED_P (insn
);
5359 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5361 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5362 if (REG_NOTE_KIND (link
) != REG_LABEL
)
5364 if (GET_CODE (link
) == EXPR_LIST
)
5366 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link
),
5371 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link
),
5376 /* Fix the libcall sequences. */
5377 if ((note1
= find_reg_note (new, REG_RETVAL
, NULL_RTX
)) != NULL
)
5380 while ((note2
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)) == NULL
)
5382 XEXP (note1
, 0) = p
;
5383 XEXP (note2
, 0) = new;
5385 INSN_CODE (new) = INSN_CODE (insn
);
5389 static GTY((deletable
)) rtx hard_reg_clobbers
[NUM_MACHINE_MODES
][FIRST_PSEUDO_REGISTER
];
5391 gen_hard_reg_clobber (enum machine_mode mode
, unsigned int regno
)
5393 if (hard_reg_clobbers
[mode
][regno
])
5394 return hard_reg_clobbers
[mode
][regno
];
5396 return (hard_reg_clobbers
[mode
][regno
] =
5397 gen_rtx_CLOBBER (VOIDmode
, gen_rtx_REG (mode
, regno
)));
5400 #include "gt-emit-rtl.h"