1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
29 #include "hard-reg-set.h"
30 #include "insn-config.h"
40 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
42 /* Forward declarations */
43 static void set_of_1 (rtx
, const_rtx
, void *);
44 static bool covers_regno_p (const_rtx
, unsigned int);
45 static bool covers_regno_no_parallel_p (const_rtx
, unsigned int);
46 static int rtx_referenced_p_1 (rtx
*, void *);
47 static int computed_jump_p_1 (const_rtx
);
48 static void parms_set (rtx
, const_rtx
, void *);
50 static unsigned HOST_WIDE_INT
cached_nonzero_bits (const_rtx
, enum machine_mode
,
51 const_rtx
, enum machine_mode
,
52 unsigned HOST_WIDE_INT
);
53 static unsigned HOST_WIDE_INT
nonzero_bits1 (const_rtx
, enum machine_mode
,
54 const_rtx
, enum machine_mode
,
55 unsigned HOST_WIDE_INT
);
56 static unsigned int cached_num_sign_bit_copies (const_rtx
, enum machine_mode
, const_rtx
,
59 static unsigned int num_sign_bit_copies1 (const_rtx
, enum machine_mode
, const_rtx
,
60 enum machine_mode
, unsigned int);
62 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
63 -1 if a code has no such operand. */
64 static int non_rtx_starting_operands
[NUM_RTX_CODE
];
66 /* Truncation narrows the mode from SOURCE mode to DESTINATION mode.
67 If TARGET_MODE_REP_EXTENDED (DESTINATION, DESTINATION_REP) is
68 SIGN_EXTEND then while narrowing we also have to enforce the
69 representation and sign-extend the value to mode DESTINATION_REP.
71 If the value is already sign-extended to DESTINATION_REP mode we
72 can just switch to DESTINATION mode on it. For each pair of
73 integral modes SOURCE and DESTINATION, when truncating from SOURCE
74 to DESTINATION, NUM_SIGN_BIT_COPIES_IN_REP[SOURCE][DESTINATION]
75 contains the number of high-order bits in SOURCE that have to be
76 copies of the sign-bit so that we can do this mode-switch to
80 num_sign_bit_copies_in_rep
[MAX_MODE_INT
+ 1][MAX_MODE_INT
+ 1];
82 /* Return 1 if the value of X is unstable
83 (would be different at a different point in the program).
84 The frame pointer, arg pointer, etc. are considered stable
85 (within one function) and so is anything marked `unchanging'. */
88 rtx_unstable_p (const_rtx x
)
90 const RTX_CODE code
= GET_CODE (x
);
97 return !MEM_READONLY_P (x
) || rtx_unstable_p (XEXP (x
, 0));
109 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
110 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
111 /* The arg pointer varies if it is not a fixed register. */
112 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
114 /* ??? When call-clobbered, the value is stable modulo the restore
115 that must happen after a call. This currently screws up local-alloc
116 into believing that the restore is not needed. */
117 if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
&& x
== pic_offset_table_rtx
)
122 if (MEM_VOLATILE_P (x
))
131 fmt
= GET_RTX_FORMAT (code
);
132 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
135 if (rtx_unstable_p (XEXP (x
, i
)))
138 else if (fmt
[i
] == 'E')
141 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
142 if (rtx_unstable_p (XVECEXP (x
, i
, j
)))
149 /* Return 1 if X has a value that can vary even between two
150 executions of the program. 0 means X can be compared reliably
151 against certain constants or near-constants.
152 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
153 zero, we are slightly more conservative.
154 The frame pointer and the arg pointer are considered constant. */
157 rtx_varies_p (const_rtx x
, bool for_alias
)
170 return !MEM_READONLY_P (x
) || rtx_varies_p (XEXP (x
, 0), for_alias
);
182 /* Note that we have to test for the actual rtx used for the frame
183 and arg pointers and not just the register number in case we have
184 eliminated the frame and/or arg pointer and are using it
186 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
187 /* The arg pointer varies if it is not a fixed register. */
188 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
190 if (x
== pic_offset_table_rtx
191 /* ??? When call-clobbered, the value is stable modulo the restore
192 that must happen after a call. This currently screws up
193 local-alloc into believing that the restore is not needed, so we
194 must return 0 only if we are called from alias analysis. */
195 && (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
|| for_alias
))
200 /* The operand 0 of a LO_SUM is considered constant
201 (in fact it is related specifically to operand 1)
202 during alias analysis. */
203 return (! for_alias
&& rtx_varies_p (XEXP (x
, 0), for_alias
))
204 || rtx_varies_p (XEXP (x
, 1), for_alias
);
207 if (MEM_VOLATILE_P (x
))
216 fmt
= GET_RTX_FORMAT (code
);
217 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
220 if (rtx_varies_p (XEXP (x
, i
), for_alias
))
223 else if (fmt
[i
] == 'E')
226 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
227 if (rtx_varies_p (XVECEXP (x
, i
, j
), for_alias
))
234 /* Return nonzero if the use of X as an address in a MEM can cause a trap.
235 MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls
236 whether nonzero is returned for unaligned memory accesses on strict
237 alignment machines. */
240 rtx_addr_can_trap_p_1 (const_rtx x
, HOST_WIDE_INT offset
, HOST_WIDE_INT size
,
241 enum machine_mode mode
, bool unaligned_mems
)
243 enum rtx_code code
= GET_CODE (x
);
247 && GET_MODE_SIZE (mode
) != 0)
249 HOST_WIDE_INT actual_offset
= offset
;
250 #ifdef SPARC_STACK_BOUNDARY_HACK
251 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
252 the real alignment of %sp. However, when it does this, the
253 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
254 if (SPARC_STACK_BOUNDARY_HACK
255 && (x
== stack_pointer_rtx
|| x
== hard_frame_pointer_rtx
))
256 actual_offset
-= STACK_POINTER_OFFSET
;
259 if (actual_offset
% GET_MODE_SIZE (mode
) != 0)
266 if (SYMBOL_REF_WEAK (x
))
268 if (!CONSTANT_POOL_ADDRESS_P (x
))
271 HOST_WIDE_INT decl_size
;
276 size
= GET_MODE_SIZE (mode
);
280 /* If the size of the access or of the symbol is unknown,
282 decl
= SYMBOL_REF_DECL (x
);
284 /* Else check that the access is in bounds. TODO: restructure
285 expr_size/tree_expr_size/int_expr_size and just use the latter. */
288 else if (DECL_P (decl
) && DECL_SIZE_UNIT (decl
))
289 decl_size
= (host_integerp (DECL_SIZE_UNIT (decl
), 0)
290 ? tree_low_cst (DECL_SIZE_UNIT (decl
), 0)
292 else if (TREE_CODE (decl
) == STRING_CST
)
293 decl_size
= TREE_STRING_LENGTH (decl
);
294 else if (TYPE_SIZE_UNIT (TREE_TYPE (decl
)))
295 decl_size
= int_size_in_bytes (TREE_TYPE (decl
));
299 return (decl_size
<= 0 ? offset
!= 0 : offset
+ size
> decl_size
);
308 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
309 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
310 || x
== stack_pointer_rtx
311 /* The arg pointer varies if it is not a fixed register. */
312 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
314 /* All of the virtual frame registers are stack references. */
315 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
316 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
321 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
322 mode
, unaligned_mems
);
325 /* An address is assumed not to trap if:
326 - it is the pic register plus a constant. */
327 if (XEXP (x
, 0) == pic_offset_table_rtx
&& CONSTANT_P (XEXP (x
, 1)))
330 /* - or it is an address that can't trap plus a constant integer,
331 with the proper remainder modulo the mode size if we are
332 considering unaligned memory references. */
333 if (CONST_INT_P (XEXP (x
, 1))
334 && !rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
+ INTVAL (XEXP (x
, 1)),
335 size
, mode
, unaligned_mems
))
342 return rtx_addr_can_trap_p_1 (XEXP (x
, 1), offset
, size
,
343 mode
, unaligned_mems
);
350 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), offset
, size
,
351 mode
, unaligned_mems
);
357 /* If it isn't one of the case above, it can cause a trap. */
361 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
364 rtx_addr_can_trap_p (const_rtx x
)
366 return rtx_addr_can_trap_p_1 (x
, 0, 0, VOIDmode
, false);
369 /* Return true if X is an address that is known to not be zero. */
372 nonzero_address_p (const_rtx x
)
374 const enum rtx_code code
= GET_CODE (x
);
379 return !SYMBOL_REF_WEAK (x
);
385 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
386 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
387 || x
== stack_pointer_rtx
388 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
390 /* All of the virtual frame registers are stack references. */
391 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
392 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
397 return nonzero_address_p (XEXP (x
, 0));
400 if (CONST_INT_P (XEXP (x
, 1)))
401 return nonzero_address_p (XEXP (x
, 0));
402 /* Handle PIC references. */
403 else if (XEXP (x
, 0) == pic_offset_table_rtx
404 && CONSTANT_P (XEXP (x
, 1)))
409 /* Similar to the above; allow positive offsets. Further, since
410 auto-inc is only allowed in memories, the register must be a
412 if (CONST_INT_P (XEXP (x
, 1))
413 && INTVAL (XEXP (x
, 1)) > 0)
415 return nonzero_address_p (XEXP (x
, 0));
418 /* Similarly. Further, the offset is always positive. */
425 return nonzero_address_p (XEXP (x
, 0));
428 return nonzero_address_p (XEXP (x
, 1));
434 /* If it isn't one of the case above, might be zero. */
438 /* Return 1 if X refers to a memory location whose address
439 cannot be compared reliably with constant addresses,
440 or if X refers to a BLKmode memory object.
441 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
442 zero, we are slightly more conservative. */
445 rtx_addr_varies_p (const_rtx x
, bool for_alias
)
456 return GET_MODE (x
) == BLKmode
|| rtx_varies_p (XEXP (x
, 0), for_alias
);
458 fmt
= GET_RTX_FORMAT (code
);
459 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
462 if (rtx_addr_varies_p (XEXP (x
, i
), for_alias
))
465 else if (fmt
[i
] == 'E')
468 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
469 if (rtx_addr_varies_p (XVECEXP (x
, i
, j
), for_alias
))
475 /* Return the value of the integer term in X, if one is apparent;
477 Only obvious integer terms are detected.
478 This is used in cse.c with the `related_value' field. */
481 get_integer_term (const_rtx x
)
483 if (GET_CODE (x
) == CONST
)
486 if (GET_CODE (x
) == MINUS
487 && CONST_INT_P (XEXP (x
, 1)))
488 return - INTVAL (XEXP (x
, 1));
489 if (GET_CODE (x
) == PLUS
490 && CONST_INT_P (XEXP (x
, 1)))
491 return INTVAL (XEXP (x
, 1));
495 /* If X is a constant, return the value sans apparent integer term;
497 Only obvious integer terms are detected. */
500 get_related_value (const_rtx x
)
502 if (GET_CODE (x
) != CONST
)
505 if (GET_CODE (x
) == PLUS
506 && CONST_INT_P (XEXP (x
, 1)))
508 else if (GET_CODE (x
) == MINUS
509 && CONST_INT_P (XEXP (x
, 1)))
514 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
515 to somewhere in the same object or object_block as SYMBOL. */
518 offset_within_block_p (const_rtx symbol
, HOST_WIDE_INT offset
)
522 if (GET_CODE (symbol
) != SYMBOL_REF
)
530 if (CONSTANT_POOL_ADDRESS_P (symbol
)
531 && offset
< (int) GET_MODE_SIZE (get_pool_mode (symbol
)))
534 decl
= SYMBOL_REF_DECL (symbol
);
535 if (decl
&& offset
< int_size_in_bytes (TREE_TYPE (decl
)))
539 if (SYMBOL_REF_HAS_BLOCK_INFO_P (symbol
)
540 && SYMBOL_REF_BLOCK (symbol
)
541 && SYMBOL_REF_BLOCK_OFFSET (symbol
) >= 0
542 && ((unsigned HOST_WIDE_INT
) offset
+ SYMBOL_REF_BLOCK_OFFSET (symbol
)
543 < (unsigned HOST_WIDE_INT
) SYMBOL_REF_BLOCK (symbol
)->size
))
549 /* Split X into a base and a constant offset, storing them in *BASE_OUT
550 and *OFFSET_OUT respectively. */
553 split_const (rtx x
, rtx
*base_out
, rtx
*offset_out
)
555 if (GET_CODE (x
) == CONST
)
558 if (GET_CODE (x
) == PLUS
&& CONST_INT_P (XEXP (x
, 1)))
560 *base_out
= XEXP (x
, 0);
561 *offset_out
= XEXP (x
, 1);
566 *offset_out
= const0_rtx
;
569 /* Return the number of places FIND appears within X. If COUNT_DEST is
570 zero, we do not count occurrences inside the destination of a SET. */
573 count_occurrences (const_rtx x
, const_rtx find
, int count_dest
)
577 const char *format_ptr
;
599 count
= count_occurrences (XEXP (x
, 0), find
, count_dest
);
601 count
+= count_occurrences (XEXP (x
, 1), find
, count_dest
);
605 if (MEM_P (find
) && rtx_equal_p (x
, find
))
610 if (SET_DEST (x
) == find
&& ! count_dest
)
611 return count_occurrences (SET_SRC (x
), find
, count_dest
);
618 format_ptr
= GET_RTX_FORMAT (code
);
621 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
623 switch (*format_ptr
++)
626 count
+= count_occurrences (XEXP (x
, i
), find
, count_dest
);
630 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
631 count
+= count_occurrences (XVECEXP (x
, i
, j
), find
, count_dest
);
639 /* Nonzero if register REG appears somewhere within IN.
640 Also works if REG is not a register; in this case it checks
641 for a subexpression of IN that is Lisp "equal" to REG. */
644 reg_mentioned_p (const_rtx reg
, const_rtx in
)
656 if (GET_CODE (in
) == LABEL_REF
)
657 return reg
== XEXP (in
, 0);
659 code
= GET_CODE (in
);
663 /* Compare registers by number. */
665 return REG_P (reg
) && REGNO (in
) == REGNO (reg
);
667 /* These codes have no constituent expressions
678 /* These are kept unique for a given value. */
685 if (GET_CODE (reg
) == code
&& rtx_equal_p (reg
, in
))
688 fmt
= GET_RTX_FORMAT (code
);
690 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
695 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
696 if (reg_mentioned_p (reg
, XVECEXP (in
, i
, j
)))
699 else if (fmt
[i
] == 'e'
700 && reg_mentioned_p (reg
, XEXP (in
, i
)))
706 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
707 no CODE_LABEL insn. */
710 no_labels_between_p (const_rtx beg
, const_rtx end
)
715 for (p
= NEXT_INSN (beg
); p
!= end
; p
= NEXT_INSN (p
))
721 /* Nonzero if register REG is used in an insn between
722 FROM_INSN and TO_INSN (exclusive of those two). */
725 reg_used_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
729 if (from_insn
== to_insn
)
732 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
733 if (NONDEBUG_INSN_P (insn
)
734 && (reg_overlap_mentioned_p (reg
, PATTERN (insn
))
735 || (CALL_P (insn
) && find_reg_fusage (insn
, USE
, reg
))))
740 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
741 is entirely replaced by a new value and the only use is as a SET_DEST,
742 we do not consider it a reference. */
745 reg_referenced_p (const_rtx x
, const_rtx body
)
749 switch (GET_CODE (body
))
752 if (reg_overlap_mentioned_p (x
, SET_SRC (body
)))
755 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
756 of a REG that occupies all of the REG, the insn references X if
757 it is mentioned in the destination. */
758 if (GET_CODE (SET_DEST (body
)) != CC0
759 && GET_CODE (SET_DEST (body
)) != PC
760 && !REG_P (SET_DEST (body
))
761 && ! (GET_CODE (SET_DEST (body
)) == SUBREG
762 && REG_P (SUBREG_REG (SET_DEST (body
)))
763 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body
))))
764 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
765 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body
)))
766 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
767 && reg_overlap_mentioned_p (x
, SET_DEST (body
)))
772 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
773 if (reg_overlap_mentioned_p (x
, ASM_OPERANDS_INPUT (body
, i
)))
780 return reg_overlap_mentioned_p (x
, body
);
783 return reg_overlap_mentioned_p (x
, TRAP_CONDITION (body
));
786 return reg_overlap_mentioned_p (x
, XEXP (body
, 0));
789 case UNSPEC_VOLATILE
:
790 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
791 if (reg_overlap_mentioned_p (x
, XVECEXP (body
, 0, i
)))
796 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
797 if (reg_referenced_p (x
, XVECEXP (body
, 0, i
)))
802 if (MEM_P (XEXP (body
, 0)))
803 if (reg_overlap_mentioned_p (x
, XEXP (XEXP (body
, 0), 0)))
808 if (reg_overlap_mentioned_p (x
, COND_EXEC_TEST (body
)))
810 return reg_referenced_p (x
, COND_EXEC_CODE (body
));
817 /* Nonzero if register REG is set or clobbered in an insn between
818 FROM_INSN and TO_INSN (exclusive of those two). */
821 reg_set_between_p (const_rtx reg
, const_rtx from_insn
, const_rtx to_insn
)
825 if (from_insn
== to_insn
)
828 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
829 if (INSN_P (insn
) && reg_set_p (reg
, insn
))
834 /* Internals of reg_set_between_p. */
836 reg_set_p (const_rtx reg
, const_rtx insn
)
838 /* We can be passed an insn or part of one. If we are passed an insn,
839 check if a side-effect of the insn clobbers REG. */
841 && (FIND_REG_INC_NOTE (insn
, reg
)
844 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
845 && overlaps_hard_reg_set_p (regs_invalidated_by_call
,
846 GET_MODE (reg
), REGNO (reg
)))
848 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
851 return set_of (reg
, insn
) != NULL_RTX
;
854 /* Similar to reg_set_between_p, but check all registers in X. Return 0
855 only if none of them are modified between START and END. Return 1 if
856 X contains a MEM; this routine does use memory aliasing. */
859 modified_between_p (const_rtx x
, const_rtx start
, const_rtx end
)
861 const enum rtx_code code
= GET_CODE (x
);
885 if (modified_between_p (XEXP (x
, 0), start
, end
))
887 if (MEM_READONLY_P (x
))
889 for (insn
= NEXT_INSN (start
); insn
!= end
; insn
= NEXT_INSN (insn
))
890 if (memory_modified_in_insn_p (x
, insn
))
896 return reg_set_between_p (x
, start
, end
);
902 fmt
= GET_RTX_FORMAT (code
);
903 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
905 if (fmt
[i
] == 'e' && modified_between_p (XEXP (x
, i
), start
, end
))
908 else if (fmt
[i
] == 'E')
909 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
910 if (modified_between_p (XVECEXP (x
, i
, j
), start
, end
))
917 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
918 of them are modified in INSN. Return 1 if X contains a MEM; this routine
919 does use memory aliasing. */
922 modified_in_p (const_rtx x
, const_rtx insn
)
924 const enum rtx_code code
= GET_CODE (x
);
944 if (modified_in_p (XEXP (x
, 0), insn
))
946 if (MEM_READONLY_P (x
))
948 if (memory_modified_in_insn_p (x
, insn
))
954 return reg_set_p (x
, insn
);
960 fmt
= GET_RTX_FORMAT (code
);
961 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
963 if (fmt
[i
] == 'e' && modified_in_p (XEXP (x
, i
), insn
))
966 else if (fmt
[i
] == 'E')
967 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
968 if (modified_in_p (XVECEXP (x
, i
, j
), insn
))
975 /* Helper function for set_of. */
983 set_of_1 (rtx x
, const_rtx pat
, void *data1
)
985 struct set_of_data
*const data
= (struct set_of_data
*) (data1
);
986 if (rtx_equal_p (x
, data
->pat
)
987 || (!MEM_P (x
) && reg_overlap_mentioned_p (data
->pat
, x
)))
991 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
992 (either directly or via STRICT_LOW_PART and similar modifiers). */
994 set_of (const_rtx pat
, const_rtx insn
)
996 struct set_of_data data
;
997 data
.found
= NULL_RTX
;
999 note_stores (INSN_P (insn
) ? PATTERN (insn
) : insn
, set_of_1
, &data
);
1003 /* Given an INSN, return a SET expression if this insn has only a single SET.
1004 It may also have CLOBBERs, USEs, or SET whose output
1005 will not be used, which we ignore. */
1008 single_set_2 (const_rtx insn
, const_rtx pat
)
1011 int set_verified
= 1;
1014 if (GET_CODE (pat
) == PARALLEL
)
1016 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1018 rtx sub
= XVECEXP (pat
, 0, i
);
1019 switch (GET_CODE (sub
))
1026 /* We can consider insns having multiple sets, where all
1027 but one are dead as single set insns. In common case
1028 only single set is present in the pattern so we want
1029 to avoid checking for REG_UNUSED notes unless necessary.
1031 When we reach set first time, we just expect this is
1032 the single set we are looking for and only when more
1033 sets are found in the insn, we check them. */
1036 if (find_reg_note (insn
, REG_UNUSED
, SET_DEST (set
))
1037 && !side_effects_p (set
))
1043 set
= sub
, set_verified
= 0;
1044 else if (!find_reg_note (insn
, REG_UNUSED
, SET_DEST (sub
))
1045 || side_effects_p (sub
))
1057 /* Given an INSN, return nonzero if it has more than one SET, else return
1061 multiple_sets (const_rtx insn
)
1066 /* INSN must be an insn. */
1067 if (! INSN_P (insn
))
1070 /* Only a PARALLEL can have multiple SETs. */
1071 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
1073 for (i
= 0, found
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
1074 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
1076 /* If we have already found a SET, then return now. */
1084 /* Either zero or one SET. */
1088 /* Return nonzero if the destination of SET equals the source
1089 and there are no side effects. */
1092 set_noop_p (const_rtx set
)
1094 rtx src
= SET_SRC (set
);
1095 rtx dst
= SET_DEST (set
);
1097 if (dst
== pc_rtx
&& src
== pc_rtx
)
1100 if (MEM_P (dst
) && MEM_P (src
))
1101 return rtx_equal_p (dst
, src
) && !side_effects_p (dst
);
1103 if (GET_CODE (dst
) == ZERO_EXTRACT
)
1104 return rtx_equal_p (XEXP (dst
, 0), src
)
1105 && ! BYTES_BIG_ENDIAN
&& XEXP (dst
, 2) == const0_rtx
1106 && !side_effects_p (src
);
1108 if (GET_CODE (dst
) == STRICT_LOW_PART
)
1109 dst
= XEXP (dst
, 0);
1111 if (GET_CODE (src
) == SUBREG
&& GET_CODE (dst
) == SUBREG
)
1113 if (SUBREG_BYTE (src
) != SUBREG_BYTE (dst
))
1115 src
= SUBREG_REG (src
);
1116 dst
= SUBREG_REG (dst
);
1119 return (REG_P (src
) && REG_P (dst
)
1120 && REGNO (src
) == REGNO (dst
));
1123 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1127 noop_move_p (const_rtx insn
)
1129 rtx pat
= PATTERN (insn
);
1131 if (INSN_CODE (insn
) == NOOP_MOVE_INSN_CODE
)
1134 /* Insns carrying these notes are useful later on. */
1135 if (find_reg_note (insn
, REG_EQUAL
, NULL_RTX
))
1138 if (GET_CODE (pat
) == SET
&& set_noop_p (pat
))
1141 if (GET_CODE (pat
) == PARALLEL
)
1144 /* If nothing but SETs of registers to themselves,
1145 this insn can also be deleted. */
1146 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1148 rtx tem
= XVECEXP (pat
, 0, i
);
1150 if (GET_CODE (tem
) == USE
1151 || GET_CODE (tem
) == CLOBBER
)
1154 if (GET_CODE (tem
) != SET
|| ! set_noop_p (tem
))
1164 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1165 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1166 If the object was modified, if we hit a partial assignment to X, or hit a
1167 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1168 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1172 find_last_value (rtx x
, rtx
*pinsn
, rtx valid_to
, int allow_hwreg
)
1176 for (p
= PREV_INSN (*pinsn
); p
&& !LABEL_P (p
);
1180 rtx set
= single_set (p
);
1181 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1183 if (set
&& rtx_equal_p (x
, SET_DEST (set
)))
1185 rtx src
= SET_SRC (set
);
1187 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
)
1188 src
= XEXP (note
, 0);
1190 if ((valid_to
== NULL_RTX
1191 || ! modified_between_p (src
, PREV_INSN (p
), valid_to
))
1192 /* Reject hard registers because we don't usually want
1193 to use them; we'd rather use a pseudo. */
1195 && REGNO (src
) < FIRST_PSEUDO_REGISTER
) || allow_hwreg
))
1202 /* If set in non-simple way, we don't have a value. */
1203 if (reg_set_p (x
, p
))
1210 /* Return nonzero if register in range [REGNO, ENDREGNO)
1211 appears either explicitly or implicitly in X
1212 other than being stored into.
1214 References contained within the substructure at LOC do not count.
1215 LOC may be zero, meaning don't ignore anything. */
1218 refers_to_regno_p (unsigned int regno
, unsigned int endregno
, const_rtx x
,
1222 unsigned int x_regno
;
1227 /* The contents of a REG_NONNEG note is always zero, so we must come here
1228 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1232 code
= GET_CODE (x
);
1237 x_regno
= REGNO (x
);
1239 /* If we modifying the stack, frame, or argument pointer, it will
1240 clobber a virtual register. In fact, we could be more precise,
1241 but it isn't worth it. */
1242 if ((x_regno
== STACK_POINTER_REGNUM
1243 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1244 || x_regno
== ARG_POINTER_REGNUM
1246 || x_regno
== FRAME_POINTER_REGNUM
)
1247 && regno
>= FIRST_VIRTUAL_REGISTER
&& regno
<= LAST_VIRTUAL_REGISTER
)
1250 return endregno
> x_regno
&& regno
< END_REGNO (x
);
1253 /* If this is a SUBREG of a hard reg, we can see exactly which
1254 registers are being modified. Otherwise, handle normally. */
1255 if (REG_P (SUBREG_REG (x
))
1256 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
1258 unsigned int inner_regno
= subreg_regno (x
);
1259 unsigned int inner_endregno
1260 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
1261 ? subreg_nregs (x
) : 1);
1263 return endregno
> inner_regno
&& regno
< inner_endregno
;
1269 if (&SET_DEST (x
) != loc
1270 /* Note setting a SUBREG counts as referring to the REG it is in for
1271 a pseudo but not for hard registers since we can
1272 treat each word individually. */
1273 && ((GET_CODE (SET_DEST (x
)) == SUBREG
1274 && loc
!= &SUBREG_REG (SET_DEST (x
))
1275 && REG_P (SUBREG_REG (SET_DEST (x
)))
1276 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
1277 && refers_to_regno_p (regno
, endregno
,
1278 SUBREG_REG (SET_DEST (x
)), loc
))
1279 || (!REG_P (SET_DEST (x
))
1280 && refers_to_regno_p (regno
, endregno
, SET_DEST (x
), loc
))))
1283 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
1292 /* X does not match, so try its subexpressions. */
1294 fmt
= GET_RTX_FORMAT (code
);
1295 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1297 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
1305 if (refers_to_regno_p (regno
, endregno
, XEXP (x
, i
), loc
))
1308 else if (fmt
[i
] == 'E')
1311 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1312 if (loc
!= &XVECEXP (x
, i
, j
)
1313 && refers_to_regno_p (regno
, endregno
, XVECEXP (x
, i
, j
), loc
))
1320 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1321 we check if any register number in X conflicts with the relevant register
1322 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1323 contains a MEM (we don't bother checking for memory addresses that can't
1324 conflict because we expect this to be a rare case. */
1327 reg_overlap_mentioned_p (const_rtx x
, const_rtx in
)
1329 unsigned int regno
, endregno
;
1331 /* If either argument is a constant, then modifying X can not
1332 affect IN. Here we look at IN, we can profitably combine
1333 CONSTANT_P (x) with the switch statement below. */
1334 if (CONSTANT_P (in
))
1338 switch (GET_CODE (x
))
1340 case STRICT_LOW_PART
:
1343 /* Overly conservative. */
1348 regno
= REGNO (SUBREG_REG (x
));
1349 if (regno
< FIRST_PSEUDO_REGISTER
)
1350 regno
= subreg_regno (x
);
1351 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
1352 ? subreg_nregs (x
) : 1);
1357 endregno
= END_REGNO (x
);
1359 return refers_to_regno_p (regno
, endregno
, in
, (rtx
*) 0);
1369 fmt
= GET_RTX_FORMAT (GET_CODE (in
));
1370 for (i
= GET_RTX_LENGTH (GET_CODE (in
)) - 1; i
>= 0; i
--)
1373 if (reg_overlap_mentioned_p (x
, XEXP (in
, i
)))
1376 else if (fmt
[i
] == 'E')
1379 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; --j
)
1380 if (reg_overlap_mentioned_p (x
, XVECEXP (in
, i
, j
)))
1390 return reg_mentioned_p (x
, in
);
1396 /* If any register in here refers to it we return true. */
1397 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1398 if (XEXP (XVECEXP (x
, 0, i
), 0) != 0
1399 && reg_overlap_mentioned_p (XEXP (XVECEXP (x
, 0, i
), 0), in
))
1405 gcc_assert (CONSTANT_P (x
));
1410 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1411 (X would be the pattern of an insn). DATA is an arbitrary pointer,
1412 ignored by note_stores, but passed to FUN.
1414 FUN receives three arguments:
1415 1. the REG, MEM, CC0 or PC being stored in or clobbered,
1416 2. the SET or CLOBBER rtx that does the store,
1417 3. the pointer DATA provided to note_stores.
1419 If the item being stored in or clobbered is a SUBREG of a hard register,
1420 the SUBREG will be passed. */
1423 note_stores (const_rtx x
, void (*fun
) (rtx
, const_rtx
, void *), void *data
)
1427 if (GET_CODE (x
) == COND_EXEC
)
1428 x
= COND_EXEC_CODE (x
);
1430 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1432 rtx dest
= SET_DEST (x
);
1434 while ((GET_CODE (dest
) == SUBREG
1435 && (!REG_P (SUBREG_REG (dest
))
1436 || REGNO (SUBREG_REG (dest
)) >= FIRST_PSEUDO_REGISTER
))
1437 || GET_CODE (dest
) == ZERO_EXTRACT
1438 || GET_CODE (dest
) == STRICT_LOW_PART
)
1439 dest
= XEXP (dest
, 0);
1441 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1442 each of whose first operand is a register. */
1443 if (GET_CODE (dest
) == PARALLEL
)
1445 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1446 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
1447 (*fun
) (XEXP (XVECEXP (dest
, 0, i
), 0), x
, data
);
1450 (*fun
) (dest
, x
, data
);
1453 else if (GET_CODE (x
) == PARALLEL
)
1454 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1455 note_stores (XVECEXP (x
, 0, i
), fun
, data
);
1458 /* Like notes_stores, but call FUN for each expression that is being
1459 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1460 FUN for each expression, not any interior subexpressions. FUN receives a
1461 pointer to the expression and the DATA passed to this function.
1463 Note that this is not quite the same test as that done in reg_referenced_p
1464 since that considers something as being referenced if it is being
1465 partially set, while we do not. */
1468 note_uses (rtx
*pbody
, void (*fun
) (rtx
*, void *), void *data
)
1473 switch (GET_CODE (body
))
1476 (*fun
) (&COND_EXEC_TEST (body
), data
);
1477 note_uses (&COND_EXEC_CODE (body
), fun
, data
);
1481 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1482 note_uses (&XVECEXP (body
, 0, i
), fun
, data
);
1486 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1487 note_uses (&PATTERN (XVECEXP (body
, 0, i
)), fun
, data
);
1491 (*fun
) (&XEXP (body
, 0), data
);
1495 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
1496 (*fun
) (&ASM_OPERANDS_INPUT (body
, i
), data
);
1500 (*fun
) (&TRAP_CONDITION (body
), data
);
1504 (*fun
) (&XEXP (body
, 0), data
);
1508 case UNSPEC_VOLATILE
:
1509 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1510 (*fun
) (&XVECEXP (body
, 0, i
), data
);
1514 if (MEM_P (XEXP (body
, 0)))
1515 (*fun
) (&XEXP (XEXP (body
, 0), 0), data
);
1520 rtx dest
= SET_DEST (body
);
1522 /* For sets we replace everything in source plus registers in memory
1523 expression in store and operands of a ZERO_EXTRACT. */
1524 (*fun
) (&SET_SRC (body
), data
);
1526 if (GET_CODE (dest
) == ZERO_EXTRACT
)
1528 (*fun
) (&XEXP (dest
, 1), data
);
1529 (*fun
) (&XEXP (dest
, 2), data
);
1532 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
)
1533 dest
= XEXP (dest
, 0);
1536 (*fun
) (&XEXP (dest
, 0), data
);
1541 /* All the other possibilities never store. */
1542 (*fun
) (pbody
, data
);
1547 /* Return nonzero if X's old contents don't survive after INSN.
1548 This will be true if X is (cc0) or if X is a register and
1549 X dies in INSN or because INSN entirely sets X.
1551 "Entirely set" means set directly and not through a SUBREG, or
1552 ZERO_EXTRACT, so no trace of the old contents remains.
1553 Likewise, REG_INC does not count.
1555 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1556 but for this use that makes no difference, since regs don't overlap
1557 during their lifetimes. Therefore, this function may be used
1558 at any time after deaths have been computed.
1560 If REG is a hard reg that occupies multiple machine registers, this
1561 function will only return 1 if each of those registers will be replaced
1565 dead_or_set_p (const_rtx insn
, const_rtx x
)
1567 unsigned int regno
, end_regno
;
1570 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1571 if (GET_CODE (x
) == CC0
)
1574 gcc_assert (REG_P (x
));
1577 end_regno
= END_REGNO (x
);
1578 for (i
= regno
; i
< end_regno
; i
++)
1579 if (! dead_or_set_regno_p (insn
, i
))
1585 /* Return TRUE iff DEST is a register or subreg of a register and
1586 doesn't change the number of words of the inner register, and any
1587 part of the register is TEST_REGNO. */
1590 covers_regno_no_parallel_p (const_rtx dest
, unsigned int test_regno
)
1592 unsigned int regno
, endregno
;
1594 if (GET_CODE (dest
) == SUBREG
1595 && (((GET_MODE_SIZE (GET_MODE (dest
))
1596 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)
1597 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
)))
1598 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)))
1599 dest
= SUBREG_REG (dest
);
1604 regno
= REGNO (dest
);
1605 endregno
= END_REGNO (dest
);
1606 return (test_regno
>= regno
&& test_regno
< endregno
);
1609 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1610 any member matches the covers_regno_no_parallel_p criteria. */
1613 covers_regno_p (const_rtx dest
, unsigned int test_regno
)
1615 if (GET_CODE (dest
) == PARALLEL
)
1617 /* Some targets place small structures in registers for return
1618 values of functions, and those registers are wrapped in
1619 PARALLELs that we may see as the destination of a SET. */
1622 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1624 rtx inner
= XEXP (XVECEXP (dest
, 0, i
), 0);
1625 if (inner
!= NULL_RTX
1626 && covers_regno_no_parallel_p (inner
, test_regno
))
1633 return covers_regno_no_parallel_p (dest
, test_regno
);
1636 /* Utility function for dead_or_set_p to check an individual register. */
1639 dead_or_set_regno_p (const_rtx insn
, unsigned int test_regno
)
1643 /* See if there is a death note for something that includes TEST_REGNO. */
1644 if (find_regno_note (insn
, REG_DEAD
, test_regno
))
1648 && find_regno_fusage (insn
, CLOBBER
, test_regno
))
1651 pattern
= PATTERN (insn
);
1653 if (GET_CODE (pattern
) == COND_EXEC
)
1654 pattern
= COND_EXEC_CODE (pattern
);
1656 if (GET_CODE (pattern
) == SET
)
1657 return covers_regno_p (SET_DEST (pattern
), test_regno
);
1658 else if (GET_CODE (pattern
) == PARALLEL
)
1662 for (i
= XVECLEN (pattern
, 0) - 1; i
>= 0; i
--)
1664 rtx body
= XVECEXP (pattern
, 0, i
);
1666 if (GET_CODE (body
) == COND_EXEC
)
1667 body
= COND_EXEC_CODE (body
);
1669 if ((GET_CODE (body
) == SET
|| GET_CODE (body
) == CLOBBER
)
1670 && covers_regno_p (SET_DEST (body
), test_regno
))
1678 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1679 If DATUM is nonzero, look for one whose datum is DATUM. */
1682 find_reg_note (const_rtx insn
, enum reg_note kind
, const_rtx datum
)
1686 gcc_checking_assert (insn
);
1688 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1689 if (! INSN_P (insn
))
1693 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1694 if (REG_NOTE_KIND (link
) == kind
)
1699 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1700 if (REG_NOTE_KIND (link
) == kind
&& datum
== XEXP (link
, 0))
1705 /* Return the reg-note of kind KIND in insn INSN which applies to register
1706 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1707 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1708 it might be the case that the note overlaps REGNO. */
1711 find_regno_note (const_rtx insn
, enum reg_note kind
, unsigned int regno
)
1715 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1716 if (! INSN_P (insn
))
1719 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1720 if (REG_NOTE_KIND (link
) == kind
1721 /* Verify that it is a register, so that scratch and MEM won't cause a
1723 && REG_P (XEXP (link
, 0))
1724 && REGNO (XEXP (link
, 0)) <= regno
1725 && END_REGNO (XEXP (link
, 0)) > regno
)
1730 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1734 find_reg_equal_equiv_note (const_rtx insn
)
1741 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1742 if (REG_NOTE_KIND (link
) == REG_EQUAL
1743 || REG_NOTE_KIND (link
) == REG_EQUIV
)
1745 /* FIXME: We should never have REG_EQUAL/REG_EQUIV notes on
1746 insns that have multiple sets. Checking single_set to
1747 make sure of this is not the proper check, as explained
1748 in the comment in set_unique_reg_note.
1750 This should be changed into an assert. */
1751 if (GET_CODE (PATTERN (insn
)) == PARALLEL
&& multiple_sets (insn
))
1758 /* Check whether INSN is a single_set whose source is known to be
1759 equivalent to a constant. Return that constant if so, otherwise
1763 find_constant_src (const_rtx insn
)
1767 set
= single_set (insn
);
1770 x
= avoid_constant_pool_reference (SET_SRC (set
));
1775 note
= find_reg_equal_equiv_note (insn
);
1776 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1777 return XEXP (note
, 0);
1782 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1783 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1786 find_reg_fusage (const_rtx insn
, enum rtx_code code
, const_rtx datum
)
1788 /* If it's not a CALL_INSN, it can't possibly have a
1789 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1799 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
1801 link
= XEXP (link
, 1))
1802 if (GET_CODE (XEXP (link
, 0)) == code
1803 && rtx_equal_p (datum
, XEXP (XEXP (link
, 0), 0)))
1808 unsigned int regno
= REGNO (datum
);
1810 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1811 to pseudo registers, so don't bother checking. */
1813 if (regno
< FIRST_PSEUDO_REGISTER
)
1815 unsigned int end_regno
= END_HARD_REGNO (datum
);
1818 for (i
= regno
; i
< end_regno
; i
++)
1819 if (find_regno_fusage (insn
, code
, i
))
1827 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1828 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1831 find_regno_fusage (const_rtx insn
, enum rtx_code code
, unsigned int regno
)
1835 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1836 to pseudo registers, so don't bother checking. */
1838 if (regno
>= FIRST_PSEUDO_REGISTER
1842 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1846 if (GET_CODE (op
= XEXP (link
, 0)) == code
1847 && REG_P (reg
= XEXP (op
, 0))
1848 && REGNO (reg
) <= regno
1849 && END_HARD_REGNO (reg
) > regno
)
1857 /* Allocate a register note with kind KIND and datum DATUM. LIST is
1858 stored as the pointer to the next register note. */
1861 alloc_reg_note (enum reg_note kind
, rtx datum
, rtx list
)
1869 case REG_LABEL_TARGET
:
1870 case REG_LABEL_OPERAND
:
1871 /* These types of register notes use an INSN_LIST rather than an
1872 EXPR_LIST, so that copying is done right and dumps look
1874 note
= alloc_INSN_LIST (datum
, list
);
1875 PUT_REG_NOTE_KIND (note
, kind
);
1879 note
= alloc_EXPR_LIST (kind
, datum
, list
);
1886 /* Add register note with kind KIND and datum DATUM to INSN. */
1889 add_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
1891 REG_NOTES (insn
) = alloc_reg_note (kind
, datum
, REG_NOTES (insn
));
1894 /* Remove register note NOTE from the REG_NOTES of INSN. */
1897 remove_note (rtx insn
, const_rtx note
)
1901 if (note
== NULL_RTX
)
1904 if (REG_NOTES (insn
) == note
)
1905 REG_NOTES (insn
) = XEXP (note
, 1);
1907 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1908 if (XEXP (link
, 1) == note
)
1910 XEXP (link
, 1) = XEXP (note
, 1);
1914 switch (REG_NOTE_KIND (note
))
1918 df_notes_rescan (insn
);
1925 /* Remove REG_EQUAL and/or REG_EQUIV notes if INSN has such notes. */
1928 remove_reg_equal_equiv_notes (rtx insn
)
1932 loc
= ®_NOTES (insn
);
1935 enum reg_note kind
= REG_NOTE_KIND (*loc
);
1936 if (kind
== REG_EQUAL
|| kind
== REG_EQUIV
)
1937 *loc
= XEXP (*loc
, 1);
1939 loc
= &XEXP (*loc
, 1);
1943 /* Remove all REG_EQUAL and REG_EQUIV notes referring to REGNO. */
1946 remove_reg_equal_equiv_notes_for_regno (unsigned int regno
)
1953 /* This loop is a little tricky. We cannot just go down the chain because
1954 it is being modified by some actions in the loop. So we just iterate
1955 over the head. We plan to drain the list anyway. */
1956 while ((eq_use
= DF_REG_EQ_USE_CHAIN (regno
)) != NULL
)
1958 rtx insn
= DF_REF_INSN (eq_use
);
1959 rtx note
= find_reg_equal_equiv_note (insn
);
1961 /* This assert is generally triggered when someone deletes a REG_EQUAL
1962 or REG_EQUIV note by hacking the list manually rather than calling
1966 remove_note (insn
, note
);
1970 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1971 return 1 if it is found. A simple equality test is used to determine if
1975 in_expr_list_p (const_rtx listp
, const_rtx node
)
1979 for (x
= listp
; x
; x
= XEXP (x
, 1))
1980 if (node
== XEXP (x
, 0))
1986 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1987 remove that entry from the list if it is found.
1989 A simple equality test is used to determine if NODE matches. */
1992 remove_node_from_expr_list (const_rtx node
, rtx
*listp
)
1995 rtx prev
= NULL_RTX
;
1999 if (node
== XEXP (temp
, 0))
2001 /* Splice the node out of the list. */
2003 XEXP (prev
, 1) = XEXP (temp
, 1);
2005 *listp
= XEXP (temp
, 1);
2011 temp
= XEXP (temp
, 1);
2015 /* Nonzero if X contains any volatile instructions. These are instructions
2016 which may cause unpredictable machine state instructions, and thus no
2017 instructions should be moved or combined across them. This includes
2018 only volatile asms and UNSPEC_VOLATILE instructions. */
2021 volatile_insn_p (const_rtx x
)
2023 const RTX_CODE code
= GET_CODE (x
);
2044 case UNSPEC_VOLATILE
:
2045 /* case TRAP_IF: This isn't clear yet. */
2050 if (MEM_VOLATILE_P (x
))
2057 /* Recursively scan the operands of this expression. */
2060 const char *const fmt
= GET_RTX_FORMAT (code
);
2063 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2067 if (volatile_insn_p (XEXP (x
, i
)))
2070 else if (fmt
[i
] == 'E')
2073 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2074 if (volatile_insn_p (XVECEXP (x
, i
, j
)))
2082 /* Nonzero if X contains any volatile memory references
2083 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2086 volatile_refs_p (const_rtx x
)
2088 const RTX_CODE code
= GET_CODE (x
);
2107 case UNSPEC_VOLATILE
:
2113 if (MEM_VOLATILE_P (x
))
2120 /* Recursively scan the operands of this expression. */
2123 const char *const fmt
= GET_RTX_FORMAT (code
);
2126 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2130 if (volatile_refs_p (XEXP (x
, i
)))
2133 else if (fmt
[i
] == 'E')
2136 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2137 if (volatile_refs_p (XVECEXP (x
, i
, j
)))
2145 /* Similar to above, except that it also rejects register pre- and post-
2149 side_effects_p (const_rtx x
)
2151 const RTX_CODE code
= GET_CODE (x
);
2171 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2172 when some combination can't be done. If we see one, don't think
2173 that we can simplify the expression. */
2174 return (GET_MODE (x
) != VOIDmode
);
2183 case UNSPEC_VOLATILE
:
2184 /* case TRAP_IF: This isn't clear yet. */
2190 if (MEM_VOLATILE_P (x
))
2197 /* Recursively scan the operands of this expression. */
2200 const char *fmt
= GET_RTX_FORMAT (code
);
2203 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2207 if (side_effects_p (XEXP (x
, i
)))
2210 else if (fmt
[i
] == 'E')
2213 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2214 if (side_effects_p (XVECEXP (x
, i
, j
)))
2222 /* Return nonzero if evaluating rtx X might cause a trap.
2223 FLAGS controls how to consider MEMs. A nonzero means the context
2224 of the access may have changed from the original, such that the
2225 address may have become invalid. */
2228 may_trap_p_1 (const_rtx x
, unsigned flags
)
2234 /* We make no distinction currently, but this function is part of
2235 the internal target-hooks ABI so we keep the parameter as
2236 "unsigned flags". */
2237 bool code_changed
= flags
!= 0;
2241 code
= GET_CODE (x
);
2244 /* Handle these cases quickly. */
2259 case UNSPEC_VOLATILE
:
2260 return targetm
.unspec_may_trap_p (x
, flags
);
2267 return MEM_VOLATILE_P (x
);
2269 /* Memory ref can trap unless it's a static var or a stack slot. */
2271 /* Recognize specific pattern of stack checking probes. */
2272 if (flag_stack_check
2273 && MEM_VOLATILE_P (x
)
2274 && XEXP (x
, 0) == stack_pointer_rtx
)
2276 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2277 reference; moving it out of context such as when moving code
2278 when optimizing, might cause its address to become invalid. */
2280 || !MEM_NOTRAP_P (x
))
2282 HOST_WIDE_INT size
= MEM_SIZE (x
) ? INTVAL (MEM_SIZE (x
)) : 0;
2283 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), 0, size
,
2284 GET_MODE (x
), code_changed
);
2289 /* Division by a non-constant might trap. */
2294 if (HONOR_SNANS (GET_MODE (x
)))
2296 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
)))
2297 return flag_trapping_math
;
2298 if (!CONSTANT_P (XEXP (x
, 1)) || (XEXP (x
, 1) == const0_rtx
))
2303 /* An EXPR_LIST is used to represent a function call. This
2304 certainly may trap. */
2313 /* Some floating point comparisons may trap. */
2314 if (!flag_trapping_math
)
2316 /* ??? There is no machine independent way to check for tests that trap
2317 when COMPARE is used, though many targets do make this distinction.
2318 For instance, sparc uses CCFPE for compares which generate exceptions
2319 and CCFP for compares which do not generate exceptions. */
2320 if (HONOR_NANS (GET_MODE (x
)))
2322 /* But often the compare has some CC mode, so check operand
2324 if (HONOR_NANS (GET_MODE (XEXP (x
, 0)))
2325 || HONOR_NANS (GET_MODE (XEXP (x
, 1))))
2331 if (HONOR_SNANS (GET_MODE (x
)))
2333 /* Often comparison is CC mode, so check operand modes. */
2334 if (HONOR_SNANS (GET_MODE (XEXP (x
, 0)))
2335 || HONOR_SNANS (GET_MODE (XEXP (x
, 1))))
2340 /* Conversion of floating point might trap. */
2341 if (flag_trapping_math
&& HONOR_NANS (GET_MODE (XEXP (x
, 0))))
2348 /* These operations don't trap even with floating point. */
2352 /* Any floating arithmetic may trap. */
2353 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
))
2354 && flag_trapping_math
)
2358 fmt
= GET_RTX_FORMAT (code
);
2359 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2363 if (may_trap_p_1 (XEXP (x
, i
), flags
))
2366 else if (fmt
[i
] == 'E')
2369 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2370 if (may_trap_p_1 (XVECEXP (x
, i
, j
), flags
))
2377 /* Return nonzero if evaluating rtx X might cause a trap. */
2380 may_trap_p (const_rtx x
)
2382 return may_trap_p_1 (x
, 0);
2385 /* Same as above, but additionally return nonzero if evaluating rtx X might
2386 cause a fault. We define a fault for the purpose of this function as a
2387 erroneous execution condition that cannot be encountered during the normal
2388 execution of a valid program; the typical example is an unaligned memory
2389 access on a strict alignment machine. The compiler guarantees that it
2390 doesn't generate code that will fault from a valid program, but this
2391 guarantee doesn't mean anything for individual instructions. Consider
2392 the following example:
2394 struct S { int d; union { char *cp; int *ip; }; };
2396 int foo(struct S *s)
2404 on a strict alignment machine. In a valid program, foo will never be
2405 invoked on a structure for which d is equal to 1 and the underlying
2406 unique field of the union not aligned on a 4-byte boundary, but the
2407 expression *s->ip might cause a fault if considered individually.
2409 At the RTL level, potentially problematic expressions will almost always
2410 verify may_trap_p; for example, the above dereference can be emitted as
2411 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2412 However, suppose that foo is inlined in a caller that causes s->cp to
2413 point to a local character variable and guarantees that s->d is not set
2414 to 1; foo may have been effectively translated into pseudo-RTL as:
2417 (set (reg:SI) (mem:SI (%fp - 7)))
2419 (set (reg:QI) (mem:QI (%fp - 7)))
2421 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2422 memory reference to a stack slot, but it will certainly cause a fault
2423 on a strict alignment machine. */
2426 may_trap_or_fault_p (const_rtx x
)
2428 return may_trap_p_1 (x
, 1);
2431 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2432 i.e., an inequality. */
2435 inequality_comparisons_p (const_rtx x
)
2439 const enum rtx_code code
= GET_CODE (x
);
2470 len
= GET_RTX_LENGTH (code
);
2471 fmt
= GET_RTX_FORMAT (code
);
2473 for (i
= 0; i
< len
; i
++)
2477 if (inequality_comparisons_p (XEXP (x
, i
)))
2480 else if (fmt
[i
] == 'E')
2483 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2484 if (inequality_comparisons_p (XVECEXP (x
, i
, j
)))
2492 /* Replace any occurrence of FROM in X with TO. The function does
2493 not enter into CONST_DOUBLE for the replace.
2495 Note that copying is not done so X must not be shared unless all copies
2496 are to be modified. */
2499 replace_rtx (rtx x
, rtx from
, rtx to
)
2504 /* The following prevents loops occurrence when we change MEM in
2505 CONST_DOUBLE onto the same CONST_DOUBLE. */
2506 if (x
!= 0 && GET_CODE (x
) == CONST_DOUBLE
)
2512 /* Allow this function to make replacements in EXPR_LISTs. */
2516 if (GET_CODE (x
) == SUBREG
)
2518 rtx new_rtx
= replace_rtx (SUBREG_REG (x
), from
, to
);
2520 if (CONST_INT_P (new_rtx
))
2522 x
= simplify_subreg (GET_MODE (x
), new_rtx
,
2523 GET_MODE (SUBREG_REG (x
)),
2528 SUBREG_REG (x
) = new_rtx
;
2532 else if (GET_CODE (x
) == ZERO_EXTEND
)
2534 rtx new_rtx
= replace_rtx (XEXP (x
, 0), from
, to
);
2536 if (CONST_INT_P (new_rtx
))
2538 x
= simplify_unary_operation (ZERO_EXTEND
, GET_MODE (x
),
2539 new_rtx
, GET_MODE (XEXP (x
, 0)));
2543 XEXP (x
, 0) = new_rtx
;
2548 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2549 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2552 XEXP (x
, i
) = replace_rtx (XEXP (x
, i
), from
, to
);
2553 else if (fmt
[i
] == 'E')
2554 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2555 XVECEXP (x
, i
, j
) = replace_rtx (XVECEXP (x
, i
, j
), from
, to
);
2561 /* Replace occurrences of the old label in *X with the new one.
2562 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2565 replace_label (rtx
*x
, void *data
)
2568 rtx old_label
= ((replace_label_data
*) data
)->r1
;
2569 rtx new_label
= ((replace_label_data
*) data
)->r2
;
2570 bool update_label_nuses
= ((replace_label_data
*) data
)->update_label_nuses
;
2575 if (GET_CODE (l
) == SYMBOL_REF
2576 && CONSTANT_POOL_ADDRESS_P (l
))
2578 rtx c
= get_pool_constant (l
);
2579 if (rtx_referenced_p (old_label
, c
))
2582 replace_label_data
*d
= (replace_label_data
*) data
;
2584 /* Create a copy of constant C; replace the label inside
2585 but do not update LABEL_NUSES because uses in constant pool
2587 new_c
= copy_rtx (c
);
2588 d
->update_label_nuses
= false;
2589 for_each_rtx (&new_c
, replace_label
, data
);
2590 d
->update_label_nuses
= update_label_nuses
;
2592 /* Add the new constant NEW_C to constant pool and replace
2593 the old reference to constant by new reference. */
2594 new_l
= XEXP (force_const_mem (get_pool_mode (l
), new_c
), 0);
2595 *x
= replace_rtx (l
, l
, new_l
);
2600 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2601 field. This is not handled by for_each_rtx because it doesn't
2602 handle unprinted ('0') fields. */
2603 if (JUMP_P (l
) && JUMP_LABEL (l
) == old_label
)
2604 JUMP_LABEL (l
) = new_label
;
2606 if ((GET_CODE (l
) == LABEL_REF
2607 || GET_CODE (l
) == INSN_LIST
)
2608 && XEXP (l
, 0) == old_label
)
2610 XEXP (l
, 0) = new_label
;
2611 if (update_label_nuses
)
2613 ++LABEL_NUSES (new_label
);
2614 --LABEL_NUSES (old_label
);
2622 /* When *BODY is equal to X or X is directly referenced by *BODY
2623 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2624 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2627 rtx_referenced_p_1 (rtx
*body
, void *x
)
2631 if (*body
== NULL_RTX
)
2632 return y
== NULL_RTX
;
2634 /* Return true if a label_ref *BODY refers to label Y. */
2635 if (GET_CODE (*body
) == LABEL_REF
&& LABEL_P (y
))
2636 return XEXP (*body
, 0) == y
;
2638 /* If *BODY is a reference to pool constant traverse the constant. */
2639 if (GET_CODE (*body
) == SYMBOL_REF
2640 && CONSTANT_POOL_ADDRESS_P (*body
))
2641 return rtx_referenced_p (y
, get_pool_constant (*body
));
2643 /* By default, compare the RTL expressions. */
2644 return rtx_equal_p (*body
, y
);
2647 /* Return true if X is referenced in BODY. */
2650 rtx_referenced_p (rtx x
, rtx body
)
2652 return for_each_rtx (&body
, rtx_referenced_p_1
, x
);
2655 /* If INSN is a tablejump return true and store the label (before jump table) to
2656 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2659 tablejump_p (const_rtx insn
, rtx
*labelp
, rtx
*tablep
)
2664 && (label
= JUMP_LABEL (insn
)) != NULL_RTX
2665 && (table
= next_active_insn (label
)) != NULL_RTX
2666 && JUMP_TABLE_DATA_P (table
))
2677 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2678 constant that is not in the constant pool and not in the condition
2679 of an IF_THEN_ELSE. */
2682 computed_jump_p_1 (const_rtx x
)
2684 const enum rtx_code code
= GET_CODE (x
);
2704 return ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
2705 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)));
2708 return (computed_jump_p_1 (XEXP (x
, 1))
2709 || computed_jump_p_1 (XEXP (x
, 2)));
2715 fmt
= GET_RTX_FORMAT (code
);
2716 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2719 && computed_jump_p_1 (XEXP (x
, i
)))
2722 else if (fmt
[i
] == 'E')
2723 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2724 if (computed_jump_p_1 (XVECEXP (x
, i
, j
)))
2731 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2733 Tablejumps and casesi insns are not considered indirect jumps;
2734 we can recognize them by a (use (label_ref)). */
2737 computed_jump_p (const_rtx insn
)
2742 rtx pat
= PATTERN (insn
);
2744 /* If we have a JUMP_LABEL set, we're not a computed jump. */
2745 if (JUMP_LABEL (insn
) != NULL
)
2748 if (GET_CODE (pat
) == PARALLEL
)
2750 int len
= XVECLEN (pat
, 0);
2751 int has_use_labelref
= 0;
2753 for (i
= len
- 1; i
>= 0; i
--)
2754 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
2755 && (GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0))
2757 has_use_labelref
= 1;
2759 if (! has_use_labelref
)
2760 for (i
= len
- 1; i
>= 0; i
--)
2761 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
2762 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
2763 && computed_jump_p_1 (SET_SRC (XVECEXP (pat
, 0, i
))))
2766 else if (GET_CODE (pat
) == SET
2767 && SET_DEST (pat
) == pc_rtx
2768 && computed_jump_p_1 (SET_SRC (pat
)))
2774 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2775 calls. Processes the subexpressions of EXP and passes them to F. */
2777 for_each_rtx_1 (rtx exp
, int n
, rtx_function f
, void *data
)
2780 const char *format
= GET_RTX_FORMAT (GET_CODE (exp
));
2783 for (; format
[n
] != '\0'; n
++)
2790 result
= (*f
) (x
, data
);
2792 /* Do not traverse sub-expressions. */
2794 else if (result
!= 0)
2795 /* Stop the traversal. */
2799 /* There are no sub-expressions. */
2802 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2805 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2813 if (XVEC (exp
, n
) == 0)
2815 for (j
= 0; j
< XVECLEN (exp
, n
); ++j
)
2818 x
= &XVECEXP (exp
, n
, j
);
2819 result
= (*f
) (x
, data
);
2821 /* Do not traverse sub-expressions. */
2823 else if (result
!= 0)
2824 /* Stop the traversal. */
2828 /* There are no sub-expressions. */
2831 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2834 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2842 /* Nothing to do. */
2850 /* Traverse X via depth-first search, calling F for each
2851 sub-expression (including X itself). F is also passed the DATA.
2852 If F returns -1, do not traverse sub-expressions, but continue
2853 traversing the rest of the tree. If F ever returns any other
2854 nonzero value, stop the traversal, and return the value returned
2855 by F. Otherwise, return 0. This function does not traverse inside
2856 tree structure that contains RTX_EXPRs, or into sub-expressions
2857 whose format code is `0' since it is not known whether or not those
2858 codes are actually RTL.
2860 This routine is very general, and could (should?) be used to
2861 implement many of the other routines in this file. */
2864 for_each_rtx (rtx
*x
, rtx_function f
, void *data
)
2870 result
= (*f
) (x
, data
);
2872 /* Do not traverse sub-expressions. */
2874 else if (result
!= 0)
2875 /* Stop the traversal. */
2879 /* There are no sub-expressions. */
2882 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2886 return for_each_rtx_1 (*x
, i
, f
, data
);
2890 /* Searches X for any reference to REGNO, returning the rtx of the
2891 reference found if any. Otherwise, returns NULL_RTX. */
2894 regno_use_in (unsigned int regno
, rtx x
)
2900 if (REG_P (x
) && REGNO (x
) == regno
)
2903 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2904 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2908 if ((tem
= regno_use_in (regno
, XEXP (x
, i
))))
2911 else if (fmt
[i
] == 'E')
2912 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2913 if ((tem
= regno_use_in (regno
, XVECEXP (x
, i
, j
))))
2920 /* Return a value indicating whether OP, an operand of a commutative
2921 operation, is preferred as the first or second operand. The higher
2922 the value, the stronger the preference for being the first operand.
2923 We use negative values to indicate a preference for the first operand
2924 and positive values for the second operand. */
2927 commutative_operand_precedence (rtx op
)
2929 enum rtx_code code
= GET_CODE (op
);
2931 /* Constants always come the second operand. Prefer "nice" constants. */
2932 if (code
== CONST_INT
)
2934 if (code
== CONST_DOUBLE
)
2936 if (code
== CONST_FIXED
)
2938 op
= avoid_constant_pool_reference (op
);
2939 code
= GET_CODE (op
);
2941 switch (GET_RTX_CLASS (code
))
2944 if (code
== CONST_INT
)
2946 if (code
== CONST_DOUBLE
)
2948 if (code
== CONST_FIXED
)
2953 /* SUBREGs of objects should come second. */
2954 if (code
== SUBREG
&& OBJECT_P (SUBREG_REG (op
)))
2959 /* Complex expressions should be the first, so decrease priority
2960 of objects. Prefer pointer objects over non pointer objects. */
2961 if ((REG_P (op
) && REG_POINTER (op
))
2962 || (MEM_P (op
) && MEM_POINTER (op
)))
2966 case RTX_COMM_ARITH
:
2967 /* Prefer operands that are themselves commutative to be first.
2968 This helps to make things linear. In particular,
2969 (and (and (reg) (reg)) (not (reg))) is canonical. */
2973 /* If only one operand is a binary expression, it will be the first
2974 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
2975 is canonical, although it will usually be further simplified. */
2979 /* Then prefer NEG and NOT. */
2980 if (code
== NEG
|| code
== NOT
)
2988 /* Return 1 iff it is necessary to swap operands of commutative operation
2989 in order to canonicalize expression. */
2992 swap_commutative_operands_p (rtx x
, rtx y
)
2994 return (commutative_operand_precedence (x
)
2995 < commutative_operand_precedence (y
));
2998 /* Return 1 if X is an autoincrement side effect and the register is
2999 not the stack pointer. */
3001 auto_inc_p (const_rtx x
)
3003 switch (GET_CODE (x
))
3011 /* There are no REG_INC notes for SP. */
3012 if (XEXP (x
, 0) != stack_pointer_rtx
)
3020 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
3022 loc_mentioned_in_p (rtx
*loc
, const_rtx in
)
3031 code
= GET_CODE (in
);
3032 fmt
= GET_RTX_FORMAT (code
);
3033 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3037 if (loc
== &XEXP (in
, i
) || loc_mentioned_in_p (loc
, XEXP (in
, i
)))
3040 else if (fmt
[i
] == 'E')
3041 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
3042 if (loc
== &XVECEXP (in
, i
, j
)
3043 || loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
3049 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
3050 and SUBREG_BYTE, return the bit offset where the subreg begins
3051 (counting from the least significant bit of the operand). */
3054 subreg_lsb_1 (enum machine_mode outer_mode
,
3055 enum machine_mode inner_mode
,
3056 unsigned int subreg_byte
)
3058 unsigned int bitpos
;
3062 /* A paradoxical subreg begins at bit position 0. */
3063 if (GET_MODE_BITSIZE (outer_mode
) > GET_MODE_BITSIZE (inner_mode
))
3066 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
3067 /* If the subreg crosses a word boundary ensure that
3068 it also begins and ends on a word boundary. */
3069 gcc_assert (!((subreg_byte
% UNITS_PER_WORD
3070 + GET_MODE_SIZE (outer_mode
)) > UNITS_PER_WORD
3071 && (subreg_byte
% UNITS_PER_WORD
3072 || GET_MODE_SIZE (outer_mode
) % UNITS_PER_WORD
)));
3074 if (WORDS_BIG_ENDIAN
)
3075 word
= (GET_MODE_SIZE (inner_mode
)
3076 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) / UNITS_PER_WORD
;
3078 word
= subreg_byte
/ UNITS_PER_WORD
;
3079 bitpos
= word
* BITS_PER_WORD
;
3081 if (BYTES_BIG_ENDIAN
)
3082 byte
= (GET_MODE_SIZE (inner_mode
)
3083 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) % UNITS_PER_WORD
;
3085 byte
= subreg_byte
% UNITS_PER_WORD
;
3086 bitpos
+= byte
* BITS_PER_UNIT
;
3091 /* Given a subreg X, return the bit offset where the subreg begins
3092 (counting from the least significant bit of the reg). */
3095 subreg_lsb (const_rtx x
)
3097 return subreg_lsb_1 (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
3101 /* Fill in information about a subreg of a hard register.
3102 xregno - A regno of an inner hard subreg_reg (or what will become one).
3103 xmode - The mode of xregno.
3104 offset - The byte offset.
3105 ymode - The mode of a top level SUBREG (or what may become one).
3106 info - Pointer to structure to fill in. */
3108 subreg_get_info (unsigned int xregno
, enum machine_mode xmode
,
3109 unsigned int offset
, enum machine_mode ymode
,
3110 struct subreg_info
*info
)
3112 int nregs_xmode
, nregs_ymode
;
3113 int mode_multiple
, nregs_multiple
;
3114 int offset_adj
, y_offset
, y_offset_adj
;
3115 int regsize_xmode
, regsize_ymode
;
3118 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3122 /* If there are holes in a non-scalar mode in registers, we expect
3123 that it is made up of its units concatenated together. */
3124 if (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
))
3126 enum machine_mode xmode_unit
;
3128 nregs_xmode
= HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode
);
3129 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3132 xmode_unit
= GET_MODE_INNER (xmode
);
3133 gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode_unit
));
3134 gcc_assert (nregs_xmode
3135 == (GET_MODE_NUNITS (xmode
)
3136 * HARD_REGNO_NREGS_WITH_PADDING (xregno
, xmode_unit
)));
3137 gcc_assert (hard_regno_nregs
[xregno
][xmode
]
3138 == (hard_regno_nregs
[xregno
][xmode_unit
]
3139 * GET_MODE_NUNITS (xmode
)));
3141 /* You can only ask for a SUBREG of a value with holes in the middle
3142 if you don't cross the holes. (Such a SUBREG should be done by
3143 picking a different register class, or doing it in memory if
3144 necessary.) An example of a value with holes is XCmode on 32-bit
3145 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3146 3 for each part, but in memory it's two 128-bit parts.
3147 Padding is assumed to be at the end (not necessarily the 'high part')
3149 if ((offset
/ GET_MODE_SIZE (xmode_unit
) + 1
3150 < GET_MODE_NUNITS (xmode
))
3151 && (offset
/ GET_MODE_SIZE (xmode_unit
)
3152 != ((offset
+ GET_MODE_SIZE (ymode
) - 1)
3153 / GET_MODE_SIZE (xmode_unit
))))
3155 info
->representable_p
= false;
3160 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3162 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3164 /* Paradoxical subregs are otherwise valid. */
3167 && GET_MODE_SIZE (ymode
) > GET_MODE_SIZE (xmode
))
3169 info
->representable_p
= true;
3170 /* If this is a big endian paradoxical subreg, which uses more
3171 actual hard registers than the original register, we must
3172 return a negative offset so that we find the proper highpart
3174 if (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3175 ? WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
3176 info
->offset
= nregs_xmode
- nregs_ymode
;
3179 info
->nregs
= nregs_ymode
;
3183 /* If registers store different numbers of bits in the different
3184 modes, we cannot generally form this subreg. */
3185 if (!HARD_REGNO_NREGS_HAS_PADDING (xregno
, xmode
)
3186 && !HARD_REGNO_NREGS_HAS_PADDING (xregno
, ymode
)
3187 && (GET_MODE_SIZE (xmode
) % nregs_xmode
) == 0
3188 && (GET_MODE_SIZE (ymode
) % nregs_ymode
) == 0)
3190 regsize_xmode
= GET_MODE_SIZE (xmode
) / nregs_xmode
;
3191 regsize_ymode
= GET_MODE_SIZE (ymode
) / nregs_ymode
;
3192 if (!rknown
&& regsize_xmode
> regsize_ymode
&& nregs_ymode
> 1)
3194 info
->representable_p
= false;
3196 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3197 info
->offset
= offset
/ regsize_xmode
;
3200 if (!rknown
&& regsize_ymode
> regsize_xmode
&& nregs_xmode
> 1)
3202 info
->representable_p
= false;
3204 = (GET_MODE_SIZE (ymode
) + regsize_xmode
- 1) / regsize_xmode
;
3205 info
->offset
= offset
/ regsize_xmode
;
3210 /* Lowpart subregs are otherwise valid. */
3211 if (!rknown
&& offset
== subreg_lowpart_offset (ymode
, xmode
))
3213 info
->representable_p
= true;
3216 if (offset
== 0 || nregs_xmode
== nregs_ymode
)
3219 info
->nregs
= nregs_ymode
;
3224 /* This should always pass, otherwise we don't know how to verify
3225 the constraint. These conditions may be relaxed but
3226 subreg_regno_offset would need to be redesigned. */
3227 gcc_assert ((GET_MODE_SIZE (xmode
) % GET_MODE_SIZE (ymode
)) == 0);
3228 gcc_assert ((nregs_xmode
% nregs_ymode
) == 0);
3230 /* The XMODE value can be seen as a vector of NREGS_XMODE
3231 values. The subreg must represent a lowpart of given field.
3232 Compute what field it is. */
3233 offset_adj
= offset
;
3234 offset_adj
-= subreg_lowpart_offset (ymode
,
3235 mode_for_size (GET_MODE_BITSIZE (xmode
)
3239 /* Size of ymode must not be greater than the size of xmode. */
3240 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3241 gcc_assert (mode_multiple
!= 0);
3243 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3244 y_offset_adj
= offset_adj
/ GET_MODE_SIZE (ymode
);
3245 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3247 gcc_assert ((offset_adj
% GET_MODE_SIZE (ymode
)) == 0);
3248 gcc_assert ((mode_multiple
% nregs_multiple
) == 0);
3252 info
->representable_p
= (!(y_offset_adj
% (mode_multiple
/ nregs_multiple
)));
3255 info
->offset
= (y_offset
/ (mode_multiple
/ nregs_multiple
)) * nregs_ymode
;
3256 info
->nregs
= nregs_ymode
;
3259 /* This function returns the regno offset of a subreg expression.
3260 xregno - A regno of an inner hard subreg_reg (or what will become one).
3261 xmode - The mode of xregno.
3262 offset - The byte offset.
3263 ymode - The mode of a top level SUBREG (or what may become one).
3264 RETURN - The regno offset which would be used. */
3266 subreg_regno_offset (unsigned int xregno
, enum machine_mode xmode
,
3267 unsigned int offset
, enum machine_mode ymode
)
3269 struct subreg_info info
;
3270 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3274 /* This function returns true when the offset is representable via
3275 subreg_offset in the given regno.
3276 xregno - A regno of an inner hard subreg_reg (or what will become one).
3277 xmode - The mode of xregno.
3278 offset - The byte offset.
3279 ymode - The mode of a top level SUBREG (or what may become one).
3280 RETURN - Whether the offset is representable. */
3282 subreg_offset_representable_p (unsigned int xregno
, enum machine_mode xmode
,
3283 unsigned int offset
, enum machine_mode ymode
)
3285 struct subreg_info info
;
3286 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3287 return info
.representable_p
;
3290 /* Return the number of a YMODE register to which
3292 (subreg:YMODE (reg:XMODE XREGNO) OFFSET)
3294 can be simplified. Return -1 if the subreg can't be simplified.
3296 XREGNO is a hard register number. */
3299 simplify_subreg_regno (unsigned int xregno
, enum machine_mode xmode
,
3300 unsigned int offset
, enum machine_mode ymode
)
3302 struct subreg_info info
;
3303 unsigned int yregno
;
3305 #ifdef CANNOT_CHANGE_MODE_CLASS
3306 /* Give the backend a chance to disallow the mode change. */
3307 if (GET_MODE_CLASS (xmode
) != MODE_COMPLEX_INT
3308 && GET_MODE_CLASS (xmode
) != MODE_COMPLEX_FLOAT
3309 && REG_CANNOT_CHANGE_MODE_P (xregno
, xmode
, ymode
))
3313 /* We shouldn't simplify stack-related registers. */
3314 if ((!reload_completed
|| frame_pointer_needed
)
3315 && xregno
== FRAME_POINTER_REGNUM
)
3318 if (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
3319 && xregno
== ARG_POINTER_REGNUM
)
3322 if (xregno
== STACK_POINTER_REGNUM
)
3325 /* Try to get the register offset. */
3326 subreg_get_info (xregno
, xmode
, offset
, ymode
, &info
);
3327 if (!info
.representable_p
)
3330 /* Make sure that the offsetted register value is in range. */
3331 yregno
= xregno
+ info
.offset
;
3332 if (!HARD_REGISTER_NUM_P (yregno
))
3335 /* See whether (reg:YMODE YREGNO) is valid.
3337 ??? We allow invalid registers if (reg:XMODE XREGNO) is also invalid.
3338 This is a kludge to work around how float/complex arguments are passed
3339 on 32-bit SPARC and should be fixed. */
3340 if (!HARD_REGNO_MODE_OK (yregno
, ymode
)
3341 && HARD_REGNO_MODE_OK (xregno
, xmode
))
3344 return (int) yregno
;
3347 /* Return the final regno that a subreg expression refers to. */
3349 subreg_regno (const_rtx x
)
3352 rtx subreg
= SUBREG_REG (x
);
3353 int regno
= REGNO (subreg
);
3355 ret
= regno
+ subreg_regno_offset (regno
,
3363 /* Return the number of registers that a subreg expression refers
3366 subreg_nregs (const_rtx x
)
3368 return subreg_nregs_with_regno (REGNO (SUBREG_REG (x
)), x
);
3371 /* Return the number of registers that a subreg REG with REGNO
3372 expression refers to. This is a copy of the rtlanal.c:subreg_nregs
3373 changed so that the regno can be passed in. */
3376 subreg_nregs_with_regno (unsigned int regno
, const_rtx x
)
3378 struct subreg_info info
;
3379 rtx subreg
= SUBREG_REG (x
);
3381 subreg_get_info (regno
, GET_MODE (subreg
), SUBREG_BYTE (x
), GET_MODE (x
),
3387 struct parms_set_data
3393 /* Helper function for noticing stores to parameter registers. */
3395 parms_set (rtx x
, const_rtx pat ATTRIBUTE_UNUSED
, void *data
)
3397 struct parms_set_data
*const d
= (struct parms_set_data
*) data
;
3398 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
3399 && TEST_HARD_REG_BIT (d
->regs
, REGNO (x
)))
3401 CLEAR_HARD_REG_BIT (d
->regs
, REGNO (x
));
3406 /* Look backward for first parameter to be loaded.
3407 Note that loads of all parameters will not necessarily be
3408 found if CSE has eliminated some of them (e.g., an argument
3409 to the outer function is passed down as a parameter).
3410 Do not skip BOUNDARY. */
3412 find_first_parameter_load (rtx call_insn
, rtx boundary
)
3414 struct parms_set_data parm
;
3415 rtx p
, before
, first_set
;
3417 /* Since different machines initialize their parameter registers
3418 in different orders, assume nothing. Collect the set of all
3419 parameter registers. */
3420 CLEAR_HARD_REG_SET (parm
.regs
);
3422 for (p
= CALL_INSN_FUNCTION_USAGE (call_insn
); p
; p
= XEXP (p
, 1))
3423 if (GET_CODE (XEXP (p
, 0)) == USE
3424 && REG_P (XEXP (XEXP (p
, 0), 0)))
3426 gcc_assert (REGNO (XEXP (XEXP (p
, 0), 0)) < FIRST_PSEUDO_REGISTER
);
3428 /* We only care about registers which can hold function
3430 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p
, 0), 0))))
3433 SET_HARD_REG_BIT (parm
.regs
, REGNO (XEXP (XEXP (p
, 0), 0)));
3437 first_set
= call_insn
;
3439 /* Search backward for the first set of a register in this set. */
3440 while (parm
.nregs
&& before
!= boundary
)
3442 before
= PREV_INSN (before
);
3444 /* It is possible that some loads got CSEed from one call to
3445 another. Stop in that case. */
3446 if (CALL_P (before
))
3449 /* Our caller needs either ensure that we will find all sets
3450 (in case code has not been optimized yet), or take care
3451 for possible labels in a way by setting boundary to preceding
3453 if (LABEL_P (before
))
3455 gcc_assert (before
== boundary
);
3459 if (INSN_P (before
))
3461 int nregs_old
= parm
.nregs
;
3462 note_stores (PATTERN (before
), parms_set
, &parm
);
3463 /* If we found something that did not set a parameter reg,
3464 we're done. Do not keep going, as that might result
3465 in hoisting an insn before the setting of a pseudo
3466 that is used by the hoisted insn. */
3467 if (nregs_old
!= parm
.nregs
)
3476 /* Return true if we should avoid inserting code between INSN and preceding
3477 call instruction. */
3480 keep_with_call_p (const_rtx insn
)
3484 if (INSN_P (insn
) && (set
= single_set (insn
)) != NULL
)
3486 if (REG_P (SET_DEST (set
))
3487 && REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
3488 && fixed_regs
[REGNO (SET_DEST (set
))]
3489 && general_operand (SET_SRC (set
), VOIDmode
))
3491 if (REG_P (SET_SRC (set
))
3492 && targetm
.calls
.function_value_regno_p (REGNO (SET_SRC (set
)))
3493 && REG_P (SET_DEST (set
))
3494 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3496 /* There may be a stack pop just after the call and before the store
3497 of the return register. Search for the actual store when deciding
3498 if we can break or not. */
3499 if (SET_DEST (set
) == stack_pointer_rtx
)
3501 /* This CONST_CAST is okay because next_nonnote_insn just
3502 returns its argument and we assign it to a const_rtx
3504 const_rtx i2
= next_nonnote_insn (CONST_CAST_RTX(insn
));
3505 if (i2
&& keep_with_call_p (i2
))
3512 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3513 to non-complex jumps. That is, direct unconditional, conditional,
3514 and tablejumps, but not computed jumps or returns. It also does
3515 not apply to the fallthru case of a conditional jump. */
3518 label_is_jump_target_p (const_rtx label
, const_rtx jump_insn
)
3520 rtx tmp
= JUMP_LABEL (jump_insn
);
3525 if (tablejump_p (jump_insn
, NULL
, &tmp
))
3527 rtvec vec
= XVEC (PATTERN (tmp
),
3528 GET_CODE (PATTERN (tmp
)) == ADDR_DIFF_VEC
);
3529 int i
, veclen
= GET_NUM_ELEM (vec
);
3531 for (i
= 0; i
< veclen
; ++i
)
3532 if (XEXP (RTVEC_ELT (vec
, i
), 0) == label
)
3536 if (find_reg_note (jump_insn
, REG_LABEL_TARGET
, label
))
3543 /* Return an estimate of the cost of computing rtx X.
3544 One use is in cse, to decide which expression to keep in the hash table.
3545 Another is in rtl generation, to pick the cheapest way to multiply.
3546 Other uses like the latter are expected in the future.
3548 SPEED parameter specify whether costs optimized for speed or size should
3552 rtx_cost (rtx x
, enum rtx_code outer_code ATTRIBUTE_UNUSED
, bool speed
)
3562 /* Compute the default costs of certain things.
3563 Note that targetm.rtx_costs can override the defaults. */
3565 code
= GET_CODE (x
);
3569 total
= COSTS_N_INSNS (5);
3575 total
= COSTS_N_INSNS (7);
3578 /* Used in combine.c as a marker. */
3582 total
= COSTS_N_INSNS (1);
3592 /* If we can't tie these modes, make this expensive. The larger
3593 the mode, the more expensive it is. */
3594 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
3595 return COSTS_N_INSNS (2
3596 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
3600 if (targetm
.rtx_costs (x
, code
, outer_code
, &total
, speed
))
3605 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3606 which is already in total. */
3608 fmt
= GET_RTX_FORMAT (code
);
3609 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3611 total
+= rtx_cost (XEXP (x
, i
), code
, speed
);
3612 else if (fmt
[i
] == 'E')
3613 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3614 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
, speed
);
3619 /* Fill in the structure C with information about both speed and size rtx
3620 costs for X, with outer code OUTER. */
3623 get_full_rtx_cost (rtx x
, enum rtx_code outer
, struct full_rtx_costs
*c
)
3625 c
->speed
= rtx_cost (x
, outer
, true);
3626 c
->size
= rtx_cost (x
, outer
, false);
3630 /* Return cost of address expression X.
3631 Expect that X is properly formed address reference.
3633 SPEED parameter specify whether costs optimized for speed or size should
3637 address_cost (rtx x
, enum machine_mode mode
, addr_space_t as
, bool speed
)
3639 /* We may be asked for cost of various unusual addresses, such as operands
3640 of push instruction. It is not worthwhile to complicate writing
3641 of the target hook by such cases. */
3643 if (!memory_address_addr_space_p (mode
, x
, as
))
3646 return targetm
.address_cost (x
, speed
);
3649 /* If the target doesn't override, compute the cost as with arithmetic. */
3652 default_address_cost (rtx x
, bool speed
)
3654 return rtx_cost (x
, MEM
, speed
);
3658 unsigned HOST_WIDE_INT
3659 nonzero_bits (const_rtx x
, enum machine_mode mode
)
3661 return cached_nonzero_bits (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3665 num_sign_bit_copies (const_rtx x
, enum machine_mode mode
)
3667 return cached_num_sign_bit_copies (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3670 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3671 It avoids exponential behavior in nonzero_bits1 when X has
3672 identical subexpressions on the first or the second level. */
3674 static unsigned HOST_WIDE_INT
3675 cached_nonzero_bits (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3676 enum machine_mode known_mode
,
3677 unsigned HOST_WIDE_INT known_ret
)
3679 if (x
== known_x
&& mode
== known_mode
)
3682 /* Try to find identical subexpressions. If found call
3683 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3684 precomputed value for the subexpression as KNOWN_RET. */
3686 if (ARITHMETIC_P (x
))
3688 rtx x0
= XEXP (x
, 0);
3689 rtx x1
= XEXP (x
, 1);
3691 /* Check the first level. */
3693 return nonzero_bits1 (x
, mode
, x0
, mode
,
3694 cached_nonzero_bits (x0
, mode
, known_x
,
3695 known_mode
, known_ret
));
3697 /* Check the second level. */
3698 if (ARITHMETIC_P (x0
)
3699 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3700 return nonzero_bits1 (x
, mode
, x1
, mode
,
3701 cached_nonzero_bits (x1
, mode
, known_x
,
3702 known_mode
, known_ret
));
3704 if (ARITHMETIC_P (x1
)
3705 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3706 return nonzero_bits1 (x
, mode
, x0
, mode
,
3707 cached_nonzero_bits (x0
, mode
, known_x
,
3708 known_mode
, known_ret
));
3711 return nonzero_bits1 (x
, mode
, known_x
, known_mode
, known_ret
);
3714 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3715 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3716 is less useful. We can't allow both, because that results in exponential
3717 run time recursion. There is a nullstone testcase that triggered
3718 this. This macro avoids accidental uses of num_sign_bit_copies. */
3719 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3721 /* Given an expression, X, compute which bits in X can be nonzero.
3722 We don't care about bits outside of those defined in MODE.
3724 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3725 an arithmetic operation, we can do better. */
3727 static unsigned HOST_WIDE_INT
3728 nonzero_bits1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
3729 enum machine_mode known_mode
,
3730 unsigned HOST_WIDE_INT known_ret
)
3732 unsigned HOST_WIDE_INT nonzero
= GET_MODE_MASK (mode
);
3733 unsigned HOST_WIDE_INT inner_nz
;
3735 unsigned int mode_width
= GET_MODE_BITSIZE (mode
);
3737 /* For floating-point and vector values, assume all bits are needed. */
3738 if (FLOAT_MODE_P (GET_MODE (x
)) || FLOAT_MODE_P (mode
)
3739 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
3742 /* If X is wider than MODE, use its mode instead. */
3743 if (GET_MODE_BITSIZE (GET_MODE (x
)) > mode_width
)
3745 mode
= GET_MODE (x
);
3746 nonzero
= GET_MODE_MASK (mode
);
3747 mode_width
= GET_MODE_BITSIZE (mode
);
3750 if (mode_width
> HOST_BITS_PER_WIDE_INT
)
3751 /* Our only callers in this case look for single bit values. So
3752 just return the mode mask. Those tests will then be false. */
3755 #ifndef WORD_REGISTER_OPERATIONS
3756 /* If MODE is wider than X, but both are a single word for both the host
3757 and target machines, we can compute this from which bits of the
3758 object might be nonzero in its own mode, taking into account the fact
3759 that on many CISC machines, accessing an object in a wider mode
3760 causes the high-order bits to become undefined. So they are
3761 not known to be zero. */
3763 if (GET_MODE (x
) != VOIDmode
&& GET_MODE (x
) != mode
3764 && GET_MODE_BITSIZE (GET_MODE (x
)) <= BITS_PER_WORD
3765 && GET_MODE_BITSIZE (GET_MODE (x
)) <= HOST_BITS_PER_WIDE_INT
3766 && GET_MODE_BITSIZE (mode
) > GET_MODE_BITSIZE (GET_MODE (x
)))
3768 nonzero
&= cached_nonzero_bits (x
, GET_MODE (x
),
3769 known_x
, known_mode
, known_ret
);
3770 nonzero
|= GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
));
3775 code
= GET_CODE (x
);
3779 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3780 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3781 all the bits above ptr_mode are known to be zero. */
3782 /* As we do not know which address space the pointer is refering to,
3783 we can do this only if the target does not support different pointer
3784 or address modes depending on the address space. */
3785 if (target_default_pointer_address_modes_p ()
3786 && POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
3788 nonzero
&= GET_MODE_MASK (ptr_mode
);
3791 /* Include declared information about alignment of pointers. */
3792 /* ??? We don't properly preserve REG_POINTER changes across
3793 pointer-to-integer casts, so we can't trust it except for
3794 things that we know must be pointers. See execute/960116-1.c. */
3795 if ((x
== stack_pointer_rtx
3796 || x
== frame_pointer_rtx
3797 || x
== arg_pointer_rtx
)
3798 && REGNO_POINTER_ALIGN (REGNO (x
)))
3800 unsigned HOST_WIDE_INT alignment
3801 = REGNO_POINTER_ALIGN (REGNO (x
)) / BITS_PER_UNIT
;
3803 #ifdef PUSH_ROUNDING
3804 /* If PUSH_ROUNDING is defined, it is possible for the
3805 stack to be momentarily aligned only to that amount,
3806 so we pick the least alignment. */
3807 if (x
== stack_pointer_rtx
&& PUSH_ARGS
)
3808 alignment
= MIN ((unsigned HOST_WIDE_INT
) PUSH_ROUNDING (1),
3812 nonzero
&= ~(alignment
- 1);
3816 unsigned HOST_WIDE_INT nonzero_for_hook
= nonzero
;
3817 rtx new_rtx
= rtl_hooks
.reg_nonzero_bits (x
, mode
, known_x
,
3818 known_mode
, known_ret
,
3822 nonzero_for_hook
&= cached_nonzero_bits (new_rtx
, mode
, known_x
,
3823 known_mode
, known_ret
);
3825 return nonzero_for_hook
;
3829 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
3830 /* If X is negative in MODE, sign-extend the value. */
3832 && mode_width
< BITS_PER_WORD
3833 && (UINTVAL (x
) & ((unsigned HOST_WIDE_INT
) 1 << (mode_width
- 1)))
3835 return UINTVAL (x
) | ((unsigned HOST_WIDE_INT
) (-1) << mode_width
);
3841 #ifdef LOAD_EXTEND_OP
3842 /* In many, if not most, RISC machines, reading a byte from memory
3843 zeros the rest of the register. Noticing that fact saves a lot
3844 of extra zero-extends. */
3845 if (LOAD_EXTEND_OP (GET_MODE (x
)) == ZERO_EXTEND
)
3846 nonzero
&= GET_MODE_MASK (GET_MODE (x
));
3851 case UNEQ
: case LTGT
:
3852 case GT
: case GTU
: case UNGT
:
3853 case LT
: case LTU
: case UNLT
:
3854 case GE
: case GEU
: case UNGE
:
3855 case LE
: case LEU
: case UNLE
:
3856 case UNORDERED
: case ORDERED
:
3857 /* If this produces an integer result, we know which bits are set.
3858 Code here used to clear bits outside the mode of X, but that is
3860 /* Mind that MODE is the mode the caller wants to look at this
3861 operation in, and not the actual operation mode. We can wind
3862 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
3863 that describes the results of a vector compare. */
3864 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
3865 && mode_width
<= HOST_BITS_PER_WIDE_INT
)
3866 nonzero
= STORE_FLAG_VALUE
;
3871 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3872 and num_sign_bit_copies. */
3873 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3874 == GET_MODE_BITSIZE (GET_MODE (x
)))
3878 if (GET_MODE_SIZE (GET_MODE (x
)) < mode_width
)
3879 nonzero
|= (GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
)));
3884 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3885 and num_sign_bit_copies. */
3886 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3887 == GET_MODE_BITSIZE (GET_MODE (x
)))
3893 nonzero
&= (cached_nonzero_bits (XEXP (x
, 0), mode
,
3894 known_x
, known_mode
, known_ret
)
3895 & GET_MODE_MASK (mode
));
3899 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3900 known_x
, known_mode
, known_ret
);
3901 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3902 nonzero
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3906 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
3907 Otherwise, show all the bits in the outer mode but not the inner
3909 inner_nz
= cached_nonzero_bits (XEXP (x
, 0), mode
,
3910 known_x
, known_mode
, known_ret
);
3911 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3913 inner_nz
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3915 & (((unsigned HOST_WIDE_INT
) 1
3916 << (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0))) - 1))))
3917 inner_nz
|= (GET_MODE_MASK (mode
)
3918 & ~GET_MODE_MASK (GET_MODE (XEXP (x
, 0))));
3921 nonzero
&= inner_nz
;
3925 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3926 known_x
, known_mode
, known_ret
)
3927 & cached_nonzero_bits (XEXP (x
, 1), mode
,
3928 known_x
, known_mode
, known_ret
);
3932 case UMIN
: case UMAX
: case SMIN
: case SMAX
:
3934 unsigned HOST_WIDE_INT nonzero0
3935 = cached_nonzero_bits (XEXP (x
, 0), mode
,
3936 known_x
, known_mode
, known_ret
);
3938 /* Don't call nonzero_bits for the second time if it cannot change
3940 if ((nonzero
& nonzero0
) != nonzero
)
3942 | cached_nonzero_bits (XEXP (x
, 1), mode
,
3943 known_x
, known_mode
, known_ret
);
3947 case PLUS
: case MINUS
:
3949 case DIV
: case UDIV
:
3950 case MOD
: case UMOD
:
3951 /* We can apply the rules of arithmetic to compute the number of
3952 high- and low-order zero bits of these operations. We start by
3953 computing the width (position of the highest-order nonzero bit)
3954 and the number of low-order zero bits for each value. */
3956 unsigned HOST_WIDE_INT nz0
3957 = cached_nonzero_bits (XEXP (x
, 0), mode
,
3958 known_x
, known_mode
, known_ret
);
3959 unsigned HOST_WIDE_INT nz1
3960 = cached_nonzero_bits (XEXP (x
, 1), mode
,
3961 known_x
, known_mode
, known_ret
);
3962 int sign_index
= GET_MODE_BITSIZE (GET_MODE (x
)) - 1;
3963 int width0
= floor_log2 (nz0
) + 1;
3964 int width1
= floor_log2 (nz1
) + 1;
3965 int low0
= floor_log2 (nz0
& -nz0
);
3966 int low1
= floor_log2 (nz1
& -nz1
);
3967 unsigned HOST_WIDE_INT op0_maybe_minusp
3968 = nz0
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
3969 unsigned HOST_WIDE_INT op1_maybe_minusp
3970 = nz1
& ((unsigned HOST_WIDE_INT
) 1 << sign_index
);
3971 unsigned int result_width
= mode_width
;
3977 result_width
= MAX (width0
, width1
) + 1;
3978 result_low
= MIN (low0
, low1
);
3981 result_low
= MIN (low0
, low1
);
3984 result_width
= width0
+ width1
;
3985 result_low
= low0
+ low1
;
3990 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
3991 result_width
= width0
;
3996 result_width
= width0
;
4001 if (!op0_maybe_minusp
&& !op1_maybe_minusp
)
4002 result_width
= MIN (width0
, width1
);
4003 result_low
= MIN (low0
, low1
);
4008 result_width
= MIN (width0
, width1
);
4009 result_low
= MIN (low0
, low1
);
4015 if (result_width
< mode_width
)
4016 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << result_width
) - 1;
4019 nonzero
&= ~(((unsigned HOST_WIDE_INT
) 1 << result_low
) - 1);
4021 #ifdef POINTERS_EXTEND_UNSIGNED
4022 /* If pointers extend unsigned and this is an addition or subtraction
4023 to a pointer in Pmode, all the bits above ptr_mode are known to be
4025 /* As we do not know which address space the pointer is refering to,
4026 we can do this only if the target does not support different pointer
4027 or address modes depending on the address space. */
4028 if (target_default_pointer_address_modes_p ()
4029 && POINTERS_EXTEND_UNSIGNED
> 0 && GET_MODE (x
) == Pmode
4030 && (code
== PLUS
|| code
== MINUS
)
4031 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
4032 nonzero
&= GET_MODE_MASK (ptr_mode
);
4038 if (CONST_INT_P (XEXP (x
, 1))
4039 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
4040 nonzero
&= ((unsigned HOST_WIDE_INT
) 1 << INTVAL (XEXP (x
, 1))) - 1;
4044 /* If this is a SUBREG formed for a promoted variable that has
4045 been zero-extended, we know that at least the high-order bits
4046 are zero, though others might be too. */
4048 if (SUBREG_PROMOTED_VAR_P (x
) && SUBREG_PROMOTED_UNSIGNED_P (x
) > 0)
4049 nonzero
= GET_MODE_MASK (GET_MODE (x
))
4050 & cached_nonzero_bits (SUBREG_REG (x
), GET_MODE (x
),
4051 known_x
, known_mode
, known_ret
);
4053 /* If the inner mode is a single word for both the host and target
4054 machines, we can compute this from which bits of the inner
4055 object might be nonzero. */
4056 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) <= BITS_PER_WORD
4057 && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4058 <= HOST_BITS_PER_WIDE_INT
))
4060 nonzero
&= cached_nonzero_bits (SUBREG_REG (x
), mode
,
4061 known_x
, known_mode
, known_ret
);
4063 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
4064 /* If this is a typical RISC machine, we only have to worry
4065 about the way loads are extended. */
4066 if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4068 & (((unsigned HOST_WIDE_INT
) 1
4069 << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) - 1))))
4071 : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) != ZERO_EXTEND
)
4072 || !MEM_P (SUBREG_REG (x
)))
4075 /* On many CISC machines, accessing an object in a wider mode
4076 causes the high-order bits to become undefined. So they are
4077 not known to be zero. */
4078 if (GET_MODE_SIZE (GET_MODE (x
))
4079 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4080 nonzero
|= (GET_MODE_MASK (GET_MODE (x
))
4081 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (x
))));
4090 /* The nonzero bits are in two classes: any bits within MODE
4091 that aren't in GET_MODE (x) are always significant. The rest of the
4092 nonzero bits are those that are significant in the operand of
4093 the shift when shifted the appropriate number of bits. This
4094 shows that high-order bits are cleared by the right shift and
4095 low-order bits by left shifts. */
4096 if (CONST_INT_P (XEXP (x
, 1))
4097 && INTVAL (XEXP (x
, 1)) >= 0
4098 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
4099 && INTVAL (XEXP (x
, 1)) < GET_MODE_BITSIZE (GET_MODE (x
)))
4101 enum machine_mode inner_mode
= GET_MODE (x
);
4102 unsigned int width
= GET_MODE_BITSIZE (inner_mode
);
4103 int count
= INTVAL (XEXP (x
, 1));
4104 unsigned HOST_WIDE_INT mode_mask
= GET_MODE_MASK (inner_mode
);
4105 unsigned HOST_WIDE_INT op_nonzero
4106 = cached_nonzero_bits (XEXP (x
, 0), mode
,
4107 known_x
, known_mode
, known_ret
);
4108 unsigned HOST_WIDE_INT inner
= op_nonzero
& mode_mask
;
4109 unsigned HOST_WIDE_INT outer
= 0;
4111 if (mode_width
> width
)
4112 outer
= (op_nonzero
& nonzero
& ~mode_mask
);
4114 if (code
== LSHIFTRT
)
4116 else if (code
== ASHIFTRT
)
4120 /* If the sign bit may have been nonzero before the shift, we
4121 need to mark all the places it could have been copied to
4122 by the shift as possibly nonzero. */
4123 if (inner
& ((unsigned HOST_WIDE_INT
) 1 << (width
- 1 - count
)))
4124 inner
|= (((unsigned HOST_WIDE_INT
) 1 << count
) - 1)
4127 else if (code
== ASHIFT
)
4130 inner
= ((inner
<< (count
% width
)
4131 | (inner
>> (width
- (count
% width
)))) & mode_mask
);
4133 nonzero
&= (outer
| inner
);
4139 /* This is at most the number of bits in the mode. */
4140 nonzero
= ((unsigned HOST_WIDE_INT
) 2 << (floor_log2 (mode_width
))) - 1;
4144 /* If CLZ has a known value at zero, then the nonzero bits are
4145 that value, plus the number of bits in the mode minus one. */
4146 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4148 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4154 /* If CTZ has a known value at zero, then the nonzero bits are
4155 that value, plus the number of bits in the mode minus one. */
4156 if (CTZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
4158 |= ((unsigned HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
4169 unsigned HOST_WIDE_INT nonzero_true
4170 = cached_nonzero_bits (XEXP (x
, 1), mode
,
4171 known_x
, known_mode
, known_ret
);
4173 /* Don't call nonzero_bits for the second time if it cannot change
4175 if ((nonzero
& nonzero_true
) != nonzero
)
4176 nonzero
&= nonzero_true
4177 | cached_nonzero_bits (XEXP (x
, 2), mode
,
4178 known_x
, known_mode
, known_ret
);
4189 /* See the macro definition above. */
4190 #undef cached_num_sign_bit_copies
4193 /* The function cached_num_sign_bit_copies is a wrapper around
4194 num_sign_bit_copies1. It avoids exponential behavior in
4195 num_sign_bit_copies1 when X has identical subexpressions on the
4196 first or the second level. */
4199 cached_num_sign_bit_copies (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4200 enum machine_mode known_mode
,
4201 unsigned int known_ret
)
4203 if (x
== known_x
&& mode
== known_mode
)
4206 /* Try to find identical subexpressions. If found call
4207 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
4208 the precomputed value for the subexpression as KNOWN_RET. */
4210 if (ARITHMETIC_P (x
))
4212 rtx x0
= XEXP (x
, 0);
4213 rtx x1
= XEXP (x
, 1);
4215 /* Check the first level. */
4218 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4219 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4223 /* Check the second level. */
4224 if (ARITHMETIC_P (x0
)
4225 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
4227 num_sign_bit_copies1 (x
, mode
, x1
, mode
,
4228 cached_num_sign_bit_copies (x1
, mode
, known_x
,
4232 if (ARITHMETIC_P (x1
)
4233 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
4235 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4236 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4241 return num_sign_bit_copies1 (x
, mode
, known_x
, known_mode
, known_ret
);
4244 /* Return the number of bits at the high-order end of X that are known to
4245 be equal to the sign bit. X will be used in mode MODE; if MODE is
4246 VOIDmode, X will be used in its own mode. The returned value will always
4247 be between 1 and the number of bits in MODE. */
4250 num_sign_bit_copies1 (const_rtx x
, enum machine_mode mode
, const_rtx known_x
,
4251 enum machine_mode known_mode
,
4252 unsigned int known_ret
)
4254 enum rtx_code code
= GET_CODE (x
);
4255 unsigned int bitwidth
= GET_MODE_BITSIZE (mode
);
4256 int num0
, num1
, result
;
4257 unsigned HOST_WIDE_INT nonzero
;
4259 /* If we weren't given a mode, use the mode of X. If the mode is still
4260 VOIDmode, we don't know anything. Likewise if one of the modes is
4263 if (mode
== VOIDmode
)
4264 mode
= GET_MODE (x
);
4266 if (mode
== VOIDmode
|| FLOAT_MODE_P (mode
) || FLOAT_MODE_P (GET_MODE (x
))
4267 || VECTOR_MODE_P (GET_MODE (x
)) || VECTOR_MODE_P (mode
))
4270 /* For a smaller object, just ignore the high bits. */
4271 if (bitwidth
< GET_MODE_BITSIZE (GET_MODE (x
)))
4273 num0
= cached_num_sign_bit_copies (x
, GET_MODE (x
),
4274 known_x
, known_mode
, known_ret
);
4276 num0
- (int) (GET_MODE_BITSIZE (GET_MODE (x
)) - bitwidth
));
4279 if (GET_MODE (x
) != VOIDmode
&& bitwidth
> GET_MODE_BITSIZE (GET_MODE (x
)))
4281 #ifndef WORD_REGISTER_OPERATIONS
4282 /* If this machine does not do all register operations on the entire
4283 register and MODE is wider than the mode of X, we can say nothing
4284 at all about the high-order bits. */
4287 /* Likewise on machines that do, if the mode of the object is smaller
4288 than a word and loads of that size don't sign extend, we can say
4289 nothing about the high order bits. */
4290 if (GET_MODE_BITSIZE (GET_MODE (x
)) < BITS_PER_WORD
4291 #ifdef LOAD_EXTEND_OP
4292 && LOAD_EXTEND_OP (GET_MODE (x
)) != SIGN_EXTEND
4303 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4304 /* If pointers extend signed and this is a pointer in Pmode, say that
4305 all the bits above ptr_mode are known to be sign bit copies. */
4306 /* As we do not know which address space the pointer is refering to,
4307 we can do this only if the target does not support different pointer
4308 or address modes depending on the address space. */
4309 if (target_default_pointer_address_modes_p ()
4310 && ! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4311 && mode
== Pmode
&& REG_POINTER (x
))
4312 return GET_MODE_BITSIZE (Pmode
) - GET_MODE_BITSIZE (ptr_mode
) + 1;
4316 unsigned int copies_for_hook
= 1, copies
= 1;
4317 rtx new_rtx
= rtl_hooks
.reg_num_sign_bit_copies (x
, mode
, known_x
,
4318 known_mode
, known_ret
,
4322 copies
= cached_num_sign_bit_copies (new_rtx
, mode
, known_x
,
4323 known_mode
, known_ret
);
4325 if (copies
> 1 || copies_for_hook
> 1)
4326 return MAX (copies
, copies_for_hook
);
4328 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4333 #ifdef LOAD_EXTEND_OP
4334 /* Some RISC machines sign-extend all loads of smaller than a word. */
4335 if (LOAD_EXTEND_OP (GET_MODE (x
)) == SIGN_EXTEND
)
4336 return MAX (1, ((int) bitwidth
4337 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1));
4342 /* If the constant is negative, take its 1's complement and remask.
4343 Then see how many zero bits we have. */
4344 nonzero
= UINTVAL (x
) & GET_MODE_MASK (mode
);
4345 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4346 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4347 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4349 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4352 /* If this is a SUBREG for a promoted object that is sign-extended
4353 and we are looking at it in a wider mode, we know that at least the
4354 high-order bits are known to be sign bit copies. */
4356 if (SUBREG_PROMOTED_VAR_P (x
) && ! SUBREG_PROMOTED_UNSIGNED_P (x
))
4358 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4359 known_x
, known_mode
, known_ret
);
4360 return MAX ((int) bitwidth
4361 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1,
4365 /* For a smaller object, just ignore the high bits. */
4366 if (bitwidth
<= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))))
4368 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), VOIDmode
,
4369 known_x
, known_mode
, known_ret
);
4370 return MAX (1, (num0
4371 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4375 #ifdef WORD_REGISTER_OPERATIONS
4376 #ifdef LOAD_EXTEND_OP
4377 /* For paradoxical SUBREGs on machines where all register operations
4378 affect the entire register, just look inside. Note that we are
4379 passing MODE to the recursive call, so the number of sign bit copies
4380 will remain relative to that mode, not the inner mode. */
4382 /* This works only if loads sign extend. Otherwise, if we get a
4383 reload for the inner part, it may be loaded from the stack, and
4384 then we lose all sign bit copies that existed before the store
4387 if ((GET_MODE_SIZE (GET_MODE (x
))
4388 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4389 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4390 && MEM_P (SUBREG_REG (x
)))
4391 return cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4392 known_x
, known_mode
, known_ret
);
4398 if (CONST_INT_P (XEXP (x
, 1)))
4399 return MAX (1, (int) bitwidth
- INTVAL (XEXP (x
, 1)));
4403 return (bitwidth
- GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4404 + cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4405 known_x
, known_mode
, known_ret
));
4408 /* For a smaller object, just ignore the high bits. */
4409 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4410 known_x
, known_mode
, known_ret
);
4411 return MAX (1, (num0
- (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4415 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4416 known_x
, known_mode
, known_ret
);
4418 case ROTATE
: case ROTATERT
:
4419 /* If we are rotating left by a number of bits less than the number
4420 of sign bit copies, we can just subtract that amount from the
4422 if (CONST_INT_P (XEXP (x
, 1))
4423 && INTVAL (XEXP (x
, 1)) >= 0
4424 && INTVAL (XEXP (x
, 1)) < (int) bitwidth
)
4426 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4427 known_x
, known_mode
, known_ret
);
4428 return MAX (1, num0
- (code
== ROTATE
? INTVAL (XEXP (x
, 1))
4429 : (int) bitwidth
- INTVAL (XEXP (x
, 1))));
4434 /* In general, this subtracts one sign bit copy. But if the value
4435 is known to be positive, the number of sign bit copies is the
4436 same as that of the input. Finally, if the input has just one bit
4437 that might be nonzero, all the bits are copies of the sign bit. */
4438 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4439 known_x
, known_mode
, known_ret
);
4440 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4441 return num0
> 1 ? num0
- 1 : 1;
4443 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4448 && (((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
))
4453 case IOR
: case AND
: case XOR
:
4454 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4455 /* Logical operations will preserve the number of sign-bit copies.
4456 MIN and MAX operations always return one of the operands. */
4457 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4458 known_x
, known_mode
, known_ret
);
4459 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4460 known_x
, known_mode
, known_ret
);
4462 /* If num1 is clearing some of the top bits then regardless of
4463 the other term, we are guaranteed to have at least that many
4464 high-order zero bits. */
4467 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4468 && CONST_INT_P (XEXP (x
, 1))
4469 && (UINTVAL (XEXP (x
, 1))
4470 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) == 0)
4473 /* Similarly for IOR when setting high-order bits. */
4476 && bitwidth
<= HOST_BITS_PER_WIDE_INT
4477 && CONST_INT_P (XEXP (x
, 1))
4478 && (UINTVAL (XEXP (x
, 1))
4479 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4482 return MIN (num0
, num1
);
4484 case PLUS
: case MINUS
:
4485 /* For addition and subtraction, we can have a 1-bit carry. However,
4486 if we are subtracting 1 from a positive number, there will not
4487 be such a carry. Furthermore, if the positive number is known to
4488 be 0 or 1, we know the result is either -1 or 0. */
4490 if (code
== PLUS
&& XEXP (x
, 1) == constm1_rtx
4491 && bitwidth
<= HOST_BITS_PER_WIDE_INT
)
4493 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4494 if ((((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
) == 0)
4495 return (nonzero
== 1 || nonzero
== 0 ? bitwidth
4496 : bitwidth
- floor_log2 (nonzero
) - 1);
4499 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4500 known_x
, known_mode
, known_ret
);
4501 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4502 known_x
, known_mode
, known_ret
);
4503 result
= MAX (1, MIN (num0
, num1
) - 1);
4505 #ifdef POINTERS_EXTEND_UNSIGNED
4506 /* If pointers extend signed and this is an addition or subtraction
4507 to a pointer in Pmode, all the bits above ptr_mode are known to be
4509 /* As we do not know which address space the pointer is refering to,
4510 we can do this only if the target does not support different pointer
4511 or address modes depending on the address space. */
4512 if (target_default_pointer_address_modes_p ()
4513 && ! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4514 && (code
== PLUS
|| code
== MINUS
)
4515 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
4516 result
= MAX ((int) (GET_MODE_BITSIZE (Pmode
)
4517 - GET_MODE_BITSIZE (ptr_mode
) + 1),
4523 /* The number of bits of the product is the sum of the number of
4524 bits of both terms. However, unless one of the terms if known
4525 to be positive, we must allow for an additional bit since negating
4526 a negative number can remove one sign bit copy. */
4528 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4529 known_x
, known_mode
, known_ret
);
4530 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4531 known_x
, known_mode
, known_ret
);
4533 result
= bitwidth
- (bitwidth
- num0
) - (bitwidth
- num1
);
4535 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4536 || (((nonzero_bits (XEXP (x
, 0), mode
)
4537 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4538 && ((nonzero_bits (XEXP (x
, 1), mode
)
4539 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1)))
4543 return MAX (1, result
);
4546 /* The result must be <= the first operand. If the first operand
4547 has the high bit set, we know nothing about the number of sign
4549 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4551 else if ((nonzero_bits (XEXP (x
, 0), mode
)
4552 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4555 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4556 known_x
, known_mode
, known_ret
);
4559 /* The result must be <= the second operand. If the second operand
4560 has (or just might have) the high bit set, we know nothing about
4561 the number of sign bit copies. */
4562 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4564 else if ((nonzero_bits (XEXP (x
, 1), mode
)
4565 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4568 return cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4569 known_x
, known_mode
, known_ret
);
4572 /* Similar to unsigned division, except that we have to worry about
4573 the case where the divisor is negative, in which case we have
4575 result
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4576 known_x
, known_mode
, known_ret
);
4578 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4579 || (nonzero_bits (XEXP (x
, 1), mode
)
4580 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4586 result
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4587 known_x
, known_mode
, known_ret
);
4589 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4590 || (nonzero_bits (XEXP (x
, 1), mode
)
4591 & ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4597 /* Shifts by a constant add to the number of bits equal to the
4599 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4600 known_x
, known_mode
, known_ret
);
4601 if (CONST_INT_P (XEXP (x
, 1))
4602 && INTVAL (XEXP (x
, 1)) > 0
4603 && INTVAL (XEXP (x
, 1)) < GET_MODE_BITSIZE (GET_MODE (x
)))
4604 num0
= MIN ((int) bitwidth
, num0
+ INTVAL (XEXP (x
, 1)));
4609 /* Left shifts destroy copies. */
4610 if (!CONST_INT_P (XEXP (x
, 1))
4611 || INTVAL (XEXP (x
, 1)) < 0
4612 || INTVAL (XEXP (x
, 1)) >= (int) bitwidth
4613 || INTVAL (XEXP (x
, 1)) >= GET_MODE_BITSIZE (GET_MODE (x
)))
4616 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4617 known_x
, known_mode
, known_ret
);
4618 return MAX (1, num0
- INTVAL (XEXP (x
, 1)));
4621 num0
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4622 known_x
, known_mode
, known_ret
);
4623 num1
= cached_num_sign_bit_copies (XEXP (x
, 2), mode
,
4624 known_x
, known_mode
, known_ret
);
4625 return MIN (num0
, num1
);
4627 case EQ
: case NE
: case GE
: case GT
: case LE
: case LT
:
4628 case UNEQ
: case LTGT
: case UNGE
: case UNGT
: case UNLE
: case UNLT
:
4629 case GEU
: case GTU
: case LEU
: case LTU
:
4630 case UNORDERED
: case ORDERED
:
4631 /* If the constant is negative, take its 1's complement and remask.
4632 Then see how many zero bits we have. */
4633 nonzero
= STORE_FLAG_VALUE
;
4634 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4635 && (nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4636 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4638 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4644 /* If we haven't been able to figure it out by one of the above rules,
4645 see if some of the high-order bits are known to be zero. If so,
4646 count those bits and return one less than that amount. If we can't
4647 safely compute the mask for this mode, always return BITWIDTH. */
4649 bitwidth
= GET_MODE_BITSIZE (mode
);
4650 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4653 nonzero
= nonzero_bits (x
, mode
);
4654 return nonzero
& ((unsigned HOST_WIDE_INT
) 1 << (bitwidth
- 1))
4655 ? 1 : bitwidth
- floor_log2 (nonzero
) - 1;
4658 /* Calculate the rtx_cost of a single instruction. A return value of
4659 zero indicates an instruction pattern without a known cost. */
4662 insn_rtx_cost (rtx pat
, bool speed
)
4667 /* Extract the single set rtx from the instruction pattern.
4668 We can't use single_set since we only have the pattern. */
4669 if (GET_CODE (pat
) == SET
)
4671 else if (GET_CODE (pat
) == PARALLEL
)
4674 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
4676 rtx x
= XVECEXP (pat
, 0, i
);
4677 if (GET_CODE (x
) == SET
)
4690 cost
= rtx_cost (SET_SRC (set
), SET
, speed
);
4691 return cost
> 0 ? cost
: COSTS_N_INSNS (1);
4694 /* Given an insn INSN and condition COND, return the condition in a
4695 canonical form to simplify testing by callers. Specifically:
4697 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4698 (2) Both operands will be machine operands; (cc0) will have been replaced.
4699 (3) If an operand is a constant, it will be the second operand.
4700 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4701 for GE, GEU, and LEU.
4703 If the condition cannot be understood, or is an inequality floating-point
4704 comparison which needs to be reversed, 0 will be returned.
4706 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4708 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4709 insn used in locating the condition was found. If a replacement test
4710 of the condition is desired, it should be placed in front of that
4711 insn and we will be sure that the inputs are still valid.
4713 If WANT_REG is nonzero, we wish the condition to be relative to that
4714 register, if possible. Therefore, do not canonicalize the condition
4715 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4716 to be a compare to a CC mode register.
4718 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4722 canonicalize_condition (rtx insn
, rtx cond
, int reverse
, rtx
*earliest
,
4723 rtx want_reg
, int allow_cc_mode
, int valid_at_insn_p
)
4730 int reverse_code
= 0;
4731 enum machine_mode mode
;
4732 basic_block bb
= BLOCK_FOR_INSN (insn
);
4734 code
= GET_CODE (cond
);
4735 mode
= GET_MODE (cond
);
4736 op0
= XEXP (cond
, 0);
4737 op1
= XEXP (cond
, 1);
4740 code
= reversed_comparison_code (cond
, insn
);
4741 if (code
== UNKNOWN
)
4747 /* If we are comparing a register with zero, see if the register is set
4748 in the previous insn to a COMPARE or a comparison operation. Perform
4749 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4752 while ((GET_RTX_CLASS (code
) == RTX_COMPARE
4753 || GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
)
4754 && op1
== CONST0_RTX (GET_MODE (op0
))
4757 /* Set nonzero when we find something of interest. */
4761 /* If comparison with cc0, import actual comparison from compare
4765 if ((prev
= prev_nonnote_insn (prev
)) == 0
4766 || !NONJUMP_INSN_P (prev
)
4767 || (set
= single_set (prev
)) == 0
4768 || SET_DEST (set
) != cc0_rtx
)
4771 op0
= SET_SRC (set
);
4772 op1
= CONST0_RTX (GET_MODE (op0
));
4778 /* If this is a COMPARE, pick up the two things being compared. */
4779 if (GET_CODE (op0
) == COMPARE
)
4781 op1
= XEXP (op0
, 1);
4782 op0
= XEXP (op0
, 0);
4785 else if (!REG_P (op0
))
4788 /* Go back to the previous insn. Stop if it is not an INSN. We also
4789 stop if it isn't a single set or if it has a REG_INC note because
4790 we don't want to bother dealing with it. */
4792 prev
= prev_nonnote_nondebug_insn (prev
);
4795 || !NONJUMP_INSN_P (prev
)
4796 || FIND_REG_INC_NOTE (prev
, NULL_RTX
)
4797 /* In cfglayout mode, there do not have to be labels at the
4798 beginning of a block, or jumps at the end, so the previous
4799 conditions would not stop us when we reach bb boundary. */
4800 || BLOCK_FOR_INSN (prev
) != bb
)
4803 set
= set_of (op0
, prev
);
4806 && (GET_CODE (set
) != SET
4807 || !rtx_equal_p (SET_DEST (set
), op0
)))
4810 /* If this is setting OP0, get what it sets it to if it looks
4814 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
4815 #ifdef FLOAT_STORE_FLAG_VALUE
4816 REAL_VALUE_TYPE fsfv
;
4819 /* ??? We may not combine comparisons done in a CCmode with
4820 comparisons not done in a CCmode. This is to aid targets
4821 like Alpha that have an IEEE compliant EQ instruction, and
4822 a non-IEEE compliant BEQ instruction. The use of CCmode is
4823 actually artificial, simply to prevent the combination, but
4824 should not affect other platforms.
4826 However, we must allow VOIDmode comparisons to match either
4827 CCmode or non-CCmode comparison, because some ports have
4828 modeless comparisons inside branch patterns.
4830 ??? This mode check should perhaps look more like the mode check
4831 in simplify_comparison in combine. */
4833 if ((GET_CODE (SET_SRC (set
)) == COMPARE
4836 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4837 && (GET_MODE_BITSIZE (inner_mode
)
4838 <= HOST_BITS_PER_WIDE_INT
)
4839 && (STORE_FLAG_VALUE
4840 & ((unsigned HOST_WIDE_INT
) 1
4841 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4842 #ifdef FLOAT_STORE_FLAG_VALUE
4844 && SCALAR_FLOAT_MODE_P (inner_mode
)
4845 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4846 REAL_VALUE_NEGATIVE (fsfv
)))
4849 && COMPARISON_P (SET_SRC (set
))))
4850 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4851 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4852 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4854 else if (((code
== EQ
4856 && (GET_MODE_BITSIZE (inner_mode
)
4857 <= HOST_BITS_PER_WIDE_INT
)
4858 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4859 && (STORE_FLAG_VALUE
4860 & ((unsigned HOST_WIDE_INT
) 1
4861 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4862 #ifdef FLOAT_STORE_FLAG_VALUE
4864 && SCALAR_FLOAT_MODE_P (inner_mode
)
4865 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4866 REAL_VALUE_NEGATIVE (fsfv
)))
4869 && COMPARISON_P (SET_SRC (set
))
4870 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4871 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4872 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4882 else if (reg_set_p (op0
, prev
))
4883 /* If this sets OP0, but not directly, we have to give up. */
4888 /* If the caller is expecting the condition to be valid at INSN,
4889 make sure X doesn't change before INSN. */
4890 if (valid_at_insn_p
)
4891 if (modified_in_p (x
, prev
) || modified_between_p (x
, prev
, insn
))
4893 if (COMPARISON_P (x
))
4894 code
= GET_CODE (x
);
4897 code
= reversed_comparison_code (x
, prev
);
4898 if (code
== UNKNOWN
)
4903 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
4909 /* If constant is first, put it last. */
4910 if (CONSTANT_P (op0
))
4911 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
4913 /* If OP0 is the result of a comparison, we weren't able to find what
4914 was really being compared, so fail. */
4916 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
4919 /* Canonicalize any ordered comparison with integers involving equality
4920 if we can do computations in the relevant mode and we do not
4923 if (GET_MODE_CLASS (GET_MODE (op0
)) != MODE_CC
4924 && CONST_INT_P (op1
)
4925 && GET_MODE (op0
) != VOIDmode
4926 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
4928 HOST_WIDE_INT const_val
= INTVAL (op1
);
4929 unsigned HOST_WIDE_INT uconst_val
= const_val
;
4930 unsigned HOST_WIDE_INT max_val
4931 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
4936 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
4937 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
4940 /* When cross-compiling, const_val might be sign-extended from
4941 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
4943 if ((const_val
& max_val
)
4944 != ((unsigned HOST_WIDE_INT
) 1
4945 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1)))
4946 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
4950 if (uconst_val
< max_val
)
4951 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
4955 if (uconst_val
!= 0)
4956 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
4964 /* Never return CC0; return zero instead. */
4968 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
4971 /* Given a jump insn JUMP, return the condition that will cause it to branch
4972 to its JUMP_LABEL. If the condition cannot be understood, or is an
4973 inequality floating-point comparison which needs to be reversed, 0 will
4976 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4977 insn used in locating the condition was found. If a replacement test
4978 of the condition is desired, it should be placed in front of that
4979 insn and we will be sure that the inputs are still valid. If EARLIEST
4980 is null, the returned condition will be valid at INSN.
4982 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
4983 compare CC mode register.
4985 VALID_AT_INSN_P is the same as for canonicalize_condition. */
4988 get_condition (rtx jump
, rtx
*earliest
, int allow_cc_mode
, int valid_at_insn_p
)
4994 /* If this is not a standard conditional jump, we can't parse it. */
4996 || ! any_condjump_p (jump
))
4998 set
= pc_set (jump
);
5000 cond
= XEXP (SET_SRC (set
), 0);
5002 /* If this branches to JUMP_LABEL when the condition is false, reverse
5005 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
5006 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
5008 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
,
5009 allow_cc_mode
, valid_at_insn_p
);
5012 /* Initialize the table NUM_SIGN_BIT_COPIES_IN_REP based on
5013 TARGET_MODE_REP_EXTENDED.
5015 Note that we assume that the property of
5016 TARGET_MODE_REP_EXTENDED(B, C) is sticky to the integral modes
5017 narrower than mode B. I.e., if A is a mode narrower than B then in
5018 order to be able to operate on it in mode B, mode A needs to
5019 satisfy the requirements set by the representation of mode B. */
5022 init_num_sign_bit_copies_in_rep (void)
5024 enum machine_mode mode
, in_mode
;
5026 for (in_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); in_mode
!= VOIDmode
;
5027 in_mode
= GET_MODE_WIDER_MODE (mode
))
5028 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= in_mode
;
5029 mode
= GET_MODE_WIDER_MODE (mode
))
5031 enum machine_mode i
;
5033 /* Currently, it is assumed that TARGET_MODE_REP_EXTENDED
5034 extends to the next widest mode. */
5035 gcc_assert (targetm
.mode_rep_extended (mode
, in_mode
) == UNKNOWN
5036 || GET_MODE_WIDER_MODE (mode
) == in_mode
);
5038 /* We are in in_mode. Count how many bits outside of mode
5039 have to be copies of the sign-bit. */
5040 for (i
= mode
; i
!= in_mode
; i
= GET_MODE_WIDER_MODE (i
))
5042 enum machine_mode wider
= GET_MODE_WIDER_MODE (i
);
5044 if (targetm
.mode_rep_extended (i
, wider
) == SIGN_EXTEND
5045 /* We can only check sign-bit copies starting from the
5046 top-bit. In order to be able to check the bits we
5047 have already seen we pretend that subsequent bits
5048 have to be sign-bit copies too. */
5049 || num_sign_bit_copies_in_rep
[in_mode
][mode
])
5050 num_sign_bit_copies_in_rep
[in_mode
][mode
]
5051 += GET_MODE_BITSIZE (wider
) - GET_MODE_BITSIZE (i
);
5056 /* Suppose that truncation from the machine mode of X to MODE is not a
5057 no-op. See if there is anything special about X so that we can
5058 assume it already contains a truncated value of MODE. */
5061 truncated_to_mode (enum machine_mode mode
, const_rtx x
)
5063 /* This register has already been used in MODE without explicit
5065 if (REG_P (x
) && rtl_hooks
.reg_truncated_to_mode (mode
, x
))
5068 /* See if we already satisfy the requirements of MODE. If yes we
5069 can just switch to MODE. */
5070 if (num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
]
5071 && (num_sign_bit_copies (x
, GET_MODE (x
))
5072 >= num_sign_bit_copies_in_rep
[GET_MODE (x
)][mode
] + 1))
5078 /* Initialize non_rtx_starting_operands, which is used to speed up
5084 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5086 const char *format
= GET_RTX_FORMAT (i
);
5087 const char *first
= strpbrk (format
, "eEV");
5088 non_rtx_starting_operands
[i
] = first
? first
- format
: -1;
5091 init_num_sign_bit_copies_in_rep ();
5094 /* Check whether this is a constant pool constant. */
5096 constant_pool_constant_p (rtx x
)
5098 x
= avoid_constant_pool_reference (x
);
5099 return GET_CODE (x
) == CONST_DOUBLE
;
5102 /* If M is a bitmask that selects a field of low-order bits within an item but
5103 not the entire word, return the length of the field. Return -1 otherwise.
5104 M is used in machine mode MODE. */
5107 low_bitmask_len (enum machine_mode mode
, unsigned HOST_WIDE_INT m
)
5109 if (mode
!= VOIDmode
)
5111 if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
5113 m
&= GET_MODE_MASK (mode
);
5116 return exact_log2 (m
+ 1);