* config/riscv/riscv.c: Remove unnecessary includes. Reorder
[official-gcc.git] / gcc / emit-rtl.c
blob041f2a717607fb273b87c0570367f3a9bd40e7ad
1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains support functions for creating rtl expressions
24 and manipulating them in the doubly-linked chain of insns.
26 The patterns of the insns are created by machine-dependent
27 routines in insn-emit.c, which is generated automatically from
28 the machine description. These routines make the individual rtx's
29 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
30 which are automatically generated from rtl.def; what is machine
31 dependent is the kind of rtx's they make and what arguments they
32 use. */
34 #include "config.h"
35 #include "system.h"
36 #include "coretypes.h"
37 #include "memmodel.h"
38 #include "backend.h"
39 #include "target.h"
40 #include "rtl.h"
41 #include "tree.h"
42 #include "df.h"
43 #include "tm_p.h"
44 #include "stringpool.h"
45 #include "insn-config.h"
46 #include "regs.h"
47 #include "emit-rtl.h"
48 #include "recog.h"
49 #include "diagnostic-core.h"
50 #include "alias.h"
51 #include "fold-const.h"
52 #include "varasm.h"
53 #include "cfgrtl.h"
54 #include "tree-eh.h"
55 #include "explow.h"
56 #include "expr.h"
57 #include "params.h"
58 #include "builtins.h"
59 #include "rtl-iter.h"
60 #include "stor-layout.h"
61 #include "opts.h"
63 struct target_rtl default_target_rtl;
64 #if SWITCHABLE_TARGET
65 struct target_rtl *this_target_rtl = &default_target_rtl;
66 #endif
68 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
70 /* Commonly used modes. */
72 machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
73 machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
74 machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
75 machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
77 /* Datastructures maintained for currently processed function in RTL form. */
79 struct rtl_data x_rtl;
81 /* Indexed by pseudo register number, gives the rtx for that pseudo.
82 Allocated in parallel with regno_pointer_align.
83 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
84 with length attribute nested in top level structures. */
86 rtx * regno_reg_rtx;
88 /* This is *not* reset after each function. It gives each CODE_LABEL
89 in the entire compilation a unique label number. */
91 static GTY(()) int label_num = 1;
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
96 is set only for MODE_INT and MODE_VECTOR_INT modes. */
98 rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
100 rtx const_true_rtx;
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconsthalf;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
110 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
115 integers. */
117 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
119 /* Standard pieces of rtx, to be substituted directly into things. */
120 rtx pc_rtx;
121 rtx ret_rtx;
122 rtx simple_return_rtx;
123 rtx cc0_rtx;
125 /* Marker used for denoting an INSN, which should never be accessed (i.e.,
126 this pointer should normally never be dereferenced), but is required to be
127 distinct from NULL_RTX. Currently used by peephole2 pass. */
128 rtx_insn *invalid_insn_rtx;
130 /* A hash table storing CONST_INTs whose absolute value is greater
131 than MAX_SAVED_CONST_INT. */
133 struct const_int_hasher : ggc_cache_ptr_hash<rtx_def>
135 typedef HOST_WIDE_INT compare_type;
137 static hashval_t hash (rtx i);
138 static bool equal (rtx i, HOST_WIDE_INT h);
141 static GTY ((cache)) hash_table<const_int_hasher> *const_int_htab;
143 struct const_wide_int_hasher : ggc_cache_ptr_hash<rtx_def>
145 static hashval_t hash (rtx x);
146 static bool equal (rtx x, rtx y);
149 static GTY ((cache)) hash_table<const_wide_int_hasher> *const_wide_int_htab;
151 /* A hash table storing register attribute structures. */
152 struct reg_attr_hasher : ggc_cache_ptr_hash<reg_attrs>
154 static hashval_t hash (reg_attrs *x);
155 static bool equal (reg_attrs *a, reg_attrs *b);
158 static GTY ((cache)) hash_table<reg_attr_hasher> *reg_attrs_htab;
160 /* A hash table storing all CONST_DOUBLEs. */
161 struct const_double_hasher : ggc_cache_ptr_hash<rtx_def>
163 static hashval_t hash (rtx x);
164 static bool equal (rtx x, rtx y);
167 static GTY ((cache)) hash_table<const_double_hasher> *const_double_htab;
169 /* A hash table storing all CONST_FIXEDs. */
170 struct const_fixed_hasher : ggc_cache_ptr_hash<rtx_def>
172 static hashval_t hash (rtx x);
173 static bool equal (rtx x, rtx y);
176 static GTY ((cache)) hash_table<const_fixed_hasher> *const_fixed_htab;
178 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
179 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
180 #define first_label_num (crtl->emit.x_first_label_num)
182 static void set_used_decls (tree);
183 static void mark_label_nuses (rtx);
184 #if TARGET_SUPPORTS_WIDE_INT
185 static rtx lookup_const_wide_int (rtx);
186 #endif
187 static rtx lookup_const_double (rtx);
188 static rtx lookup_const_fixed (rtx);
189 static reg_attrs *get_reg_attrs (tree, int);
190 static rtx gen_const_vector (machine_mode, int);
191 static void copy_rtx_if_shared_1 (rtx *orig);
193 /* Probability of the conditional branch currently proceeded by try_split.
194 Set to -1 otherwise. */
195 int split_branch_probability = -1;
197 /* Returns a hash code for X (which is a really a CONST_INT). */
199 hashval_t
200 const_int_hasher::hash (rtx x)
202 return (hashval_t) INTVAL (x);
205 /* Returns nonzero if the value represented by X (which is really a
206 CONST_INT) is the same as that given by Y (which is really a
207 HOST_WIDE_INT *). */
209 bool
210 const_int_hasher::equal (rtx x, HOST_WIDE_INT y)
212 return (INTVAL (x) == y);
215 #if TARGET_SUPPORTS_WIDE_INT
216 /* Returns a hash code for X (which is a really a CONST_WIDE_INT). */
218 hashval_t
219 const_wide_int_hasher::hash (rtx x)
221 int i;
222 unsigned HOST_WIDE_INT hash = 0;
223 const_rtx xr = x;
225 for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
226 hash += CONST_WIDE_INT_ELT (xr, i);
228 return (hashval_t) hash;
231 /* Returns nonzero if the value represented by X (which is really a
232 CONST_WIDE_INT) is the same as that given by Y (which is really a
233 CONST_WIDE_INT). */
235 bool
236 const_wide_int_hasher::equal (rtx x, rtx y)
238 int i;
239 const_rtx xr = x;
240 const_rtx yr = y;
241 if (CONST_WIDE_INT_NUNITS (xr) != CONST_WIDE_INT_NUNITS (yr))
242 return false;
244 for (i = 0; i < CONST_WIDE_INT_NUNITS (xr); i++)
245 if (CONST_WIDE_INT_ELT (xr, i) != CONST_WIDE_INT_ELT (yr, i))
246 return false;
248 return true;
250 #endif
252 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
253 hashval_t
254 const_double_hasher::hash (rtx x)
256 const_rtx const value = x;
257 hashval_t h;
259 if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (value) == VOIDmode)
260 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
261 else
263 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
264 /* MODE is used in the comparison, so it should be in the hash. */
265 h ^= GET_MODE (value);
267 return h;
270 /* Returns nonzero if the value represented by X (really a ...)
271 is the same as that represented by Y (really a ...) */
272 bool
273 const_double_hasher::equal (rtx x, rtx y)
275 const_rtx const a = x, b = y;
277 if (GET_MODE (a) != GET_MODE (b))
278 return 0;
279 if (TARGET_SUPPORTS_WIDE_INT == 0 && GET_MODE (a) == VOIDmode)
280 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
281 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
282 else
283 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
284 CONST_DOUBLE_REAL_VALUE (b));
287 /* Returns a hash code for X (which is really a CONST_FIXED). */
289 hashval_t
290 const_fixed_hasher::hash (rtx x)
292 const_rtx const value = x;
293 hashval_t h;
295 h = fixed_hash (CONST_FIXED_VALUE (value));
296 /* MODE is used in the comparison, so it should be in the hash. */
297 h ^= GET_MODE (value);
298 return h;
301 /* Returns nonzero if the value represented by X is the same as that
302 represented by Y. */
304 bool
305 const_fixed_hasher::equal (rtx x, rtx y)
307 const_rtx const a = x, b = y;
309 if (GET_MODE (a) != GET_MODE (b))
310 return 0;
311 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
314 /* Return true if the given memory attributes are equal. */
316 bool
317 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
319 if (p == q)
320 return true;
321 if (!p || !q)
322 return false;
323 return (p->alias == q->alias
324 && p->offset_known_p == q->offset_known_p
325 && (!p->offset_known_p || p->offset == q->offset)
326 && p->size_known_p == q->size_known_p
327 && (!p->size_known_p || p->size == q->size)
328 && p->align == q->align
329 && p->addrspace == q->addrspace
330 && (p->expr == q->expr
331 || (p->expr != NULL_TREE && q->expr != NULL_TREE
332 && operand_equal_p (p->expr, q->expr, 0))));
335 /* Set MEM's memory attributes so that they are the same as ATTRS. */
337 static void
338 set_mem_attrs (rtx mem, mem_attrs *attrs)
340 /* If everything is the default, we can just clear the attributes. */
341 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
343 MEM_ATTRS (mem) = 0;
344 return;
347 if (!MEM_ATTRS (mem)
348 || !mem_attrs_eq_p (attrs, MEM_ATTRS (mem)))
350 MEM_ATTRS (mem) = ggc_alloc<mem_attrs> ();
351 memcpy (MEM_ATTRS (mem), attrs, sizeof (mem_attrs));
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
357 hashval_t
358 reg_attr_hasher::hash (reg_attrs *x)
360 const reg_attrs *const p = x;
362 return ((p->offset * 1000) ^ (intptr_t) p->decl);
365 /* Returns nonzero if the value represented by X is the same as that given by
366 Y. */
368 bool
369 reg_attr_hasher::equal (reg_attrs *x, reg_attrs *y)
371 const reg_attrs *const p = x;
372 const reg_attrs *const q = y;
374 return (p->decl == q->decl && p->offset == q->offset);
376 /* Allocate a new reg_attrs structure and insert it into the hash table if
377 one identical to it is not already in the table. We are doing this for
378 MEM of mode MODE. */
380 static reg_attrs *
381 get_reg_attrs (tree decl, int offset)
383 reg_attrs attrs;
385 /* If everything is the default, we can just return zero. */
386 if (decl == 0 && offset == 0)
387 return 0;
389 attrs.decl = decl;
390 attrs.offset = offset;
392 reg_attrs **slot = reg_attrs_htab->find_slot (&attrs, INSERT);
393 if (*slot == 0)
395 *slot = ggc_alloc<reg_attrs> ();
396 memcpy (*slot, &attrs, sizeof (reg_attrs));
399 return *slot;
403 #if !HAVE_blockage
404 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule,
405 and to block register equivalences to be seen across this insn. */
408 gen_blockage (void)
410 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
411 MEM_VOLATILE_P (x) = true;
412 return x;
414 #endif
417 /* Set the mode and register number of X to MODE and REGNO. */
419 void
420 set_mode_and_regno (rtx x, machine_mode mode, unsigned int regno)
422 unsigned int nregs = (HARD_REGISTER_NUM_P (regno)
423 ? hard_regno_nregs[regno][mode]
424 : 1);
425 PUT_MODE_RAW (x, mode);
426 set_regno_raw (x, regno, nregs);
429 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
430 don't attempt to share with the various global pieces of rtl (such as
431 frame_pointer_rtx). */
434 gen_raw_REG (machine_mode mode, unsigned int regno)
436 rtx x = rtx_alloc_stat (REG MEM_STAT_INFO);
437 set_mode_and_regno (x, mode, regno);
438 REG_ATTRS (x) = NULL;
439 ORIGINAL_REGNO (x) = regno;
440 return x;
443 /* There are some RTL codes that require special attention; the generation
444 functions do the raw handling. If you add to this list, modify
445 special_rtx in gengenrtl.c as well. */
447 rtx_expr_list *
448 gen_rtx_EXPR_LIST (machine_mode mode, rtx expr, rtx expr_list)
450 return as_a <rtx_expr_list *> (gen_rtx_fmt_ee (EXPR_LIST, mode, expr,
451 expr_list));
454 rtx_insn_list *
455 gen_rtx_INSN_LIST (machine_mode mode, rtx insn, rtx insn_list)
457 return as_a <rtx_insn_list *> (gen_rtx_fmt_ue (INSN_LIST, mode, insn,
458 insn_list));
461 rtx_insn *
462 gen_rtx_INSN (machine_mode mode, rtx_insn *prev_insn, rtx_insn *next_insn,
463 basic_block bb, rtx pattern, int location, int code,
464 rtx reg_notes)
466 return as_a <rtx_insn *> (gen_rtx_fmt_uuBeiie (INSN, mode,
467 prev_insn, next_insn,
468 bb, pattern, location, code,
469 reg_notes));
473 gen_rtx_CONST_INT (machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
475 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
476 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
478 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
479 if (const_true_rtx && arg == STORE_FLAG_VALUE)
480 return const_true_rtx;
481 #endif
483 /* Look up the CONST_INT in the hash table. */
484 rtx *slot = const_int_htab->find_slot_with_hash (arg, (hashval_t) arg,
485 INSERT);
486 if (*slot == 0)
487 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
489 return *slot;
493 gen_int_mode (HOST_WIDE_INT c, machine_mode mode)
495 return GEN_INT (trunc_int_for_mode (c, mode));
498 /* CONST_DOUBLEs might be created from pairs of integers, or from
499 REAL_VALUE_TYPEs. Also, their length is known only at run time,
500 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
502 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
503 hash table. If so, return its counterpart; otherwise add it
504 to the hash table and return it. */
505 static rtx
506 lookup_const_double (rtx real)
508 rtx *slot = const_double_htab->find_slot (real, INSERT);
509 if (*slot == 0)
510 *slot = real;
512 return *slot;
515 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
516 VALUE in mode MODE. */
518 const_double_from_real_value (REAL_VALUE_TYPE value, machine_mode mode)
520 rtx real = rtx_alloc (CONST_DOUBLE);
521 PUT_MODE (real, mode);
523 real->u.rv = value;
525 return lookup_const_double (real);
528 /* Determine whether FIXED, a CONST_FIXED, already exists in the
529 hash table. If so, return its counterpart; otherwise add it
530 to the hash table and return it. */
532 static rtx
533 lookup_const_fixed (rtx fixed)
535 rtx *slot = const_fixed_htab->find_slot (fixed, INSERT);
536 if (*slot == 0)
537 *slot = fixed;
539 return *slot;
542 /* Return a CONST_FIXED rtx for a fixed-point value specified by
543 VALUE in mode MODE. */
546 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, machine_mode mode)
548 rtx fixed = rtx_alloc (CONST_FIXED);
549 PUT_MODE (fixed, mode);
551 fixed->u.fv = value;
553 return lookup_const_fixed (fixed);
556 #if TARGET_SUPPORTS_WIDE_INT == 0
557 /* Constructs double_int from rtx CST. */
559 double_int
560 rtx_to_double_int (const_rtx cst)
562 double_int r;
564 if (CONST_INT_P (cst))
565 r = double_int::from_shwi (INTVAL (cst));
566 else if (CONST_DOUBLE_AS_INT_P (cst))
568 r.low = CONST_DOUBLE_LOW (cst);
569 r.high = CONST_DOUBLE_HIGH (cst);
571 else
572 gcc_unreachable ();
574 return r;
576 #endif
578 #if TARGET_SUPPORTS_WIDE_INT
579 /* Determine whether CONST_WIDE_INT WINT already exists in the hash table.
580 If so, return its counterpart; otherwise add it to the hash table and
581 return it. */
583 static rtx
584 lookup_const_wide_int (rtx wint)
586 rtx *slot = const_wide_int_htab->find_slot (wint, INSERT);
587 if (*slot == 0)
588 *slot = wint;
590 return *slot;
592 #endif
594 /* Return an rtx constant for V, given that the constant has mode MODE.
595 The returned rtx will be a CONST_INT if V fits, otherwise it will be
596 a CONST_DOUBLE (if !TARGET_SUPPORTS_WIDE_INT) or a CONST_WIDE_INT
597 (if TARGET_SUPPORTS_WIDE_INT). */
600 immed_wide_int_const (const wide_int_ref &v, machine_mode mode)
602 unsigned int len = v.get_len ();
603 unsigned int prec = GET_MODE_PRECISION (mode);
605 /* Allow truncation but not extension since we do not know if the
606 number is signed or unsigned. */
607 gcc_assert (prec <= v.get_precision ());
609 if (len < 2 || prec <= HOST_BITS_PER_WIDE_INT)
610 return gen_int_mode (v.elt (0), mode);
612 #if TARGET_SUPPORTS_WIDE_INT
614 unsigned int i;
615 rtx value;
616 unsigned int blocks_needed
617 = (prec + HOST_BITS_PER_WIDE_INT - 1) / HOST_BITS_PER_WIDE_INT;
619 if (len > blocks_needed)
620 len = blocks_needed;
622 value = const_wide_int_alloc (len);
624 /* It is so tempting to just put the mode in here. Must control
625 myself ... */
626 PUT_MODE (value, VOIDmode);
627 CWI_PUT_NUM_ELEM (value, len);
629 for (i = 0; i < len; i++)
630 CONST_WIDE_INT_ELT (value, i) = v.elt (i);
632 return lookup_const_wide_int (value);
634 #else
635 return immed_double_const (v.elt (0), v.elt (1), mode);
636 #endif
639 #if TARGET_SUPPORTS_WIDE_INT == 0
640 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
641 of ints: I0 is the low-order word and I1 is the high-order word.
642 For values that are larger than HOST_BITS_PER_DOUBLE_INT, the
643 implied upper bits are copies of the high bit of i1. The value
644 itself is neither signed nor unsigned. Do not use this routine for
645 non-integer modes; convert to REAL_VALUE_TYPE and use
646 const_double_from_real_value. */
649 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, machine_mode mode)
651 rtx value;
652 unsigned int i;
654 /* There are the following cases (note that there are no modes with
655 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
657 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
658 gen_int_mode.
659 2) If the value of the integer fits into HOST_WIDE_INT anyway
660 (i.e., i1 consists only from copies of the sign bit, and sign
661 of i0 and i1 are the same), then we return a CONST_INT for i0.
662 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
663 if (mode != VOIDmode)
665 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
666 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
667 /* We can get a 0 for an error mark. */
668 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
669 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
670 || GET_MODE_CLASS (mode) == MODE_POINTER_BOUNDS);
672 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
673 return gen_int_mode (i0, mode);
676 /* If this integer fits in one word, return a CONST_INT. */
677 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
678 return GEN_INT (i0);
680 /* We use VOIDmode for integers. */
681 value = rtx_alloc (CONST_DOUBLE);
682 PUT_MODE (value, VOIDmode);
684 CONST_DOUBLE_LOW (value) = i0;
685 CONST_DOUBLE_HIGH (value) = i1;
687 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
688 XWINT (value, i) = 0;
690 return lookup_const_double (value);
692 #endif
695 gen_rtx_REG (machine_mode mode, unsigned int regno)
697 /* In case the MD file explicitly references the frame pointer, have
698 all such references point to the same frame pointer. This is
699 used during frame pointer elimination to distinguish the explicit
700 references to these registers from pseudos that happened to be
701 assigned to them.
703 If we have eliminated the frame pointer or arg pointer, we will
704 be using it as a normal register, for example as a spill
705 register. In such cases, we might be accessing it in a mode that
706 is not Pmode and therefore cannot use the pre-allocated rtx.
708 Also don't do this when we are making new REGs in reload, since
709 we don't want to get confused with the real pointers. */
711 if (mode == Pmode && !reload_in_progress && !lra_in_progress)
713 if (regno == FRAME_POINTER_REGNUM
714 && (!reload_completed || frame_pointer_needed))
715 return frame_pointer_rtx;
717 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
718 && regno == HARD_FRAME_POINTER_REGNUM
719 && (!reload_completed || frame_pointer_needed))
720 return hard_frame_pointer_rtx;
721 #if !HARD_FRAME_POINTER_IS_ARG_POINTER
722 if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
723 && regno == ARG_POINTER_REGNUM)
724 return arg_pointer_rtx;
725 #endif
726 #ifdef RETURN_ADDRESS_POINTER_REGNUM
727 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
728 return return_address_pointer_rtx;
729 #endif
730 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
731 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
732 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
733 return pic_offset_table_rtx;
734 if (regno == STACK_POINTER_REGNUM)
735 return stack_pointer_rtx;
738 #if 0
739 /* If the per-function register table has been set up, try to re-use
740 an existing entry in that table to avoid useless generation of RTL.
742 This code is disabled for now until we can fix the various backends
743 which depend on having non-shared hard registers in some cases. Long
744 term we want to re-enable this code as it can significantly cut down
745 on the amount of useless RTL that gets generated.
747 We'll also need to fix some code that runs after reload that wants to
748 set ORIGINAL_REGNO. */
750 if (cfun
751 && cfun->emit
752 && regno_reg_rtx
753 && regno < FIRST_PSEUDO_REGISTER
754 && reg_raw_mode[regno] == mode)
755 return regno_reg_rtx[regno];
756 #endif
758 return gen_raw_REG (mode, regno);
762 gen_rtx_MEM (machine_mode mode, rtx addr)
764 rtx rt = gen_rtx_raw_MEM (mode, addr);
766 /* This field is not cleared by the mere allocation of the rtx, so
767 we clear it here. */
768 MEM_ATTRS (rt) = 0;
770 return rt;
773 /* Generate a memory referring to non-trapping constant memory. */
776 gen_const_mem (machine_mode mode, rtx addr)
778 rtx mem = gen_rtx_MEM (mode, addr);
779 MEM_READONLY_P (mem) = 1;
780 MEM_NOTRAP_P (mem) = 1;
781 return mem;
784 /* Generate a MEM referring to fixed portions of the frame, e.g., register
785 save areas. */
788 gen_frame_mem (machine_mode mode, rtx addr)
790 rtx mem = gen_rtx_MEM (mode, addr);
791 MEM_NOTRAP_P (mem) = 1;
792 set_mem_alias_set (mem, get_frame_alias_set ());
793 return mem;
796 /* Generate a MEM referring to a temporary use of the stack, not part
797 of the fixed stack frame. For example, something which is pushed
798 by a target splitter. */
800 gen_tmp_stack_mem (machine_mode mode, rtx addr)
802 rtx mem = gen_rtx_MEM (mode, addr);
803 MEM_NOTRAP_P (mem) = 1;
804 if (!cfun->calls_alloca)
805 set_mem_alias_set (mem, get_frame_alias_set ());
806 return mem;
809 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
810 this construct would be valid, and false otherwise. */
812 bool
813 validate_subreg (machine_mode omode, machine_mode imode,
814 const_rtx reg, unsigned int offset)
816 unsigned int isize = GET_MODE_SIZE (imode);
817 unsigned int osize = GET_MODE_SIZE (omode);
819 /* All subregs must be aligned. */
820 if (offset % osize != 0)
821 return false;
823 /* The subreg offset cannot be outside the inner object. */
824 if (offset >= isize)
825 return false;
827 /* ??? This should not be here. Temporarily continue to allow word_mode
828 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
829 Generally, backends are doing something sketchy but it'll take time to
830 fix them all. */
831 if (omode == word_mode)
833 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
834 is the culprit here, and not the backends. */
835 else if (osize >= UNITS_PER_WORD && isize >= osize)
837 /* Allow component subregs of complex and vector. Though given the below
838 extraction rules, it's not always clear what that means. */
839 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
840 && GET_MODE_INNER (imode) == omode)
842 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
843 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
844 represent this. It's questionable if this ought to be represented at
845 all -- why can't this all be hidden in post-reload splitters that make
846 arbitrarily mode changes to the registers themselves. */
847 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
849 /* Subregs involving floating point modes are not allowed to
850 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
851 (subreg:SI (reg:DF) 0) isn't. */
852 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
854 if (! (isize == osize
855 /* LRA can use subreg to store a floating point value in
856 an integer mode. Although the floating point and the
857 integer modes need the same number of hard registers,
858 the size of floating point mode can be less than the
859 integer mode. LRA also uses subregs for a register
860 should be used in different mode in on insn. */
861 || lra_in_progress))
862 return false;
865 /* Paradoxical subregs must have offset zero. */
866 if (osize > isize)
867 return offset == 0;
869 /* This is a normal subreg. Verify that the offset is representable. */
871 /* For hard registers, we already have most of these rules collected in
872 subreg_offset_representable_p. */
873 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
875 unsigned int regno = REGNO (reg);
877 #ifdef CANNOT_CHANGE_MODE_CLASS
878 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
879 && GET_MODE_INNER (imode) == omode)
881 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
882 return false;
883 #endif
885 return subreg_offset_representable_p (regno, imode, offset, omode);
888 /* For pseudo registers, we want most of the same checks. Namely:
889 If the register no larger than a word, the subreg must be lowpart.
890 If the register is larger than a word, the subreg must be the lowpart
891 of a subword. A subreg does *not* perform arbitrary bit extraction.
892 Given that we've already checked mode/offset alignment, we only have
893 to check subword subregs here. */
894 if (osize < UNITS_PER_WORD
895 && ! (lra_in_progress && (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))))
897 machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
898 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
899 if (offset % UNITS_PER_WORD != low_off)
900 return false;
902 return true;
906 gen_rtx_SUBREG (machine_mode mode, rtx reg, int offset)
908 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
909 return gen_rtx_raw_SUBREG (mode, reg, offset);
912 /* Generate a SUBREG representing the least-significant part of REG if MODE
913 is smaller than mode of REG, otherwise paradoxical SUBREG. */
916 gen_lowpart_SUBREG (machine_mode mode, rtx reg)
918 machine_mode inmode;
920 inmode = GET_MODE (reg);
921 if (inmode == VOIDmode)
922 inmode = mode;
923 return gen_rtx_SUBREG (mode, reg,
924 subreg_lowpart_offset (mode, inmode));
928 gen_rtx_VAR_LOCATION (machine_mode mode, tree decl, rtx loc,
929 enum var_init_status status)
931 rtx x = gen_rtx_fmt_te (VAR_LOCATION, mode, decl, loc);
932 PAT_VAR_LOCATION_STATUS (x) = status;
933 return x;
937 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
939 rtvec
940 gen_rtvec (int n, ...)
942 int i;
943 rtvec rt_val;
944 va_list p;
946 va_start (p, n);
948 /* Don't allocate an empty rtvec... */
949 if (n == 0)
951 va_end (p);
952 return NULL_RTVEC;
955 rt_val = rtvec_alloc (n);
957 for (i = 0; i < n; i++)
958 rt_val->elem[i] = va_arg (p, rtx);
960 va_end (p);
961 return rt_val;
964 rtvec
965 gen_rtvec_v (int n, rtx *argp)
967 int i;
968 rtvec rt_val;
970 /* Don't allocate an empty rtvec... */
971 if (n == 0)
972 return NULL_RTVEC;
974 rt_val = rtvec_alloc (n);
976 for (i = 0; i < n; i++)
977 rt_val->elem[i] = *argp++;
979 return rt_val;
982 rtvec
983 gen_rtvec_v (int n, rtx_insn **argp)
985 int i;
986 rtvec rt_val;
988 /* Don't allocate an empty rtvec... */
989 if (n == 0)
990 return NULL_RTVEC;
992 rt_val = rtvec_alloc (n);
994 for (i = 0; i < n; i++)
995 rt_val->elem[i] = *argp++;
997 return rt_val;
1001 /* Return the number of bytes between the start of an OUTER_MODE
1002 in-memory value and the start of an INNER_MODE in-memory value,
1003 given that the former is a lowpart of the latter. It may be a
1004 paradoxical lowpart, in which case the offset will be negative
1005 on big-endian targets. */
1008 byte_lowpart_offset (machine_mode outer_mode,
1009 machine_mode inner_mode)
1011 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
1012 return subreg_lowpart_offset (outer_mode, inner_mode);
1013 else
1014 return -subreg_lowpart_offset (inner_mode, outer_mode);
1017 /* Generate a REG rtx for a new pseudo register of mode MODE.
1018 This pseudo is assigned the next sequential register number. */
1021 gen_reg_rtx (machine_mode mode)
1023 rtx val;
1024 unsigned int align = GET_MODE_ALIGNMENT (mode);
1026 gcc_assert (can_create_pseudo_p ());
1028 /* If a virtual register with bigger mode alignment is generated,
1029 increase stack alignment estimation because it might be spilled
1030 to stack later. */
1031 if (SUPPORTS_STACK_ALIGNMENT
1032 && crtl->stack_alignment_estimated < align
1033 && !crtl->stack_realign_processed)
1035 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
1036 if (crtl->stack_alignment_estimated < min_align)
1037 crtl->stack_alignment_estimated = min_align;
1040 if (generating_concat_p
1041 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
1042 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
1044 /* For complex modes, don't make a single pseudo.
1045 Instead, make a CONCAT of two pseudos.
1046 This allows noncontiguous allocation of the real and imaginary parts,
1047 which makes much better code. Besides, allocating DCmode
1048 pseudos overstrains reload on some machines like the 386. */
1049 rtx realpart, imagpart;
1050 machine_mode partmode = GET_MODE_INNER (mode);
1052 realpart = gen_reg_rtx (partmode);
1053 imagpart = gen_reg_rtx (partmode);
1054 return gen_rtx_CONCAT (mode, realpart, imagpart);
1057 /* Do not call gen_reg_rtx with uninitialized crtl. */
1058 gcc_assert (crtl->emit.regno_pointer_align_length);
1060 crtl->emit.ensure_regno_capacity ();
1061 gcc_assert (reg_rtx_no < crtl->emit.regno_pointer_align_length);
1063 val = gen_raw_REG (mode, reg_rtx_no);
1064 regno_reg_rtx[reg_rtx_no++] = val;
1065 return val;
1068 /* Make sure m_regno_pointer_align, and regno_reg_rtx are large
1069 enough to have elements in the range 0 <= idx <= reg_rtx_no. */
1071 void
1072 emit_status::ensure_regno_capacity ()
1074 int old_size = regno_pointer_align_length;
1076 if (reg_rtx_no < old_size)
1077 return;
1079 int new_size = old_size * 2;
1080 while (reg_rtx_no >= new_size)
1081 new_size *= 2;
1083 char *tmp = XRESIZEVEC (char, regno_pointer_align, new_size);
1084 memset (tmp + old_size, 0, new_size - old_size);
1085 regno_pointer_align = (unsigned char *) tmp;
1087 rtx *new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, new_size);
1088 memset (new1 + old_size, 0, (new_size - old_size) * sizeof (rtx));
1089 regno_reg_rtx = new1;
1091 crtl->emit.regno_pointer_align_length = new_size;
1094 /* Return TRUE if REG is a PARM_DECL, FALSE otherwise. */
1096 bool
1097 reg_is_parm_p (rtx reg)
1099 tree decl;
1101 gcc_assert (REG_P (reg));
1102 decl = REG_EXPR (reg);
1103 return (decl && TREE_CODE (decl) == PARM_DECL);
1106 /* Update NEW with the same attributes as REG, but with OFFSET added
1107 to the REG_OFFSET. */
1109 static void
1110 update_reg_offset (rtx new_rtx, rtx reg, int offset)
1112 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
1113 REG_OFFSET (reg) + offset);
1116 /* Generate a register with same attributes as REG, but with OFFSET
1117 added to the REG_OFFSET. */
1120 gen_rtx_REG_offset (rtx reg, machine_mode mode, unsigned int regno,
1121 int offset)
1123 rtx new_rtx = gen_rtx_REG (mode, regno);
1125 update_reg_offset (new_rtx, reg, offset);
1126 return new_rtx;
1129 /* Generate a new pseudo-register with the same attributes as REG, but
1130 with OFFSET added to the REG_OFFSET. */
1133 gen_reg_rtx_offset (rtx reg, machine_mode mode, int offset)
1135 rtx new_rtx = gen_reg_rtx (mode);
1137 update_reg_offset (new_rtx, reg, offset);
1138 return new_rtx;
1141 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
1142 new register is a (possibly paradoxical) lowpart of the old one. */
1144 void
1145 adjust_reg_mode (rtx reg, machine_mode mode)
1147 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
1148 PUT_MODE (reg, mode);
1151 /* Copy REG's attributes from X, if X has any attributes. If REG and X
1152 have different modes, REG is a (possibly paradoxical) lowpart of X. */
1154 void
1155 set_reg_attrs_from_value (rtx reg, rtx x)
1157 int offset;
1158 bool can_be_reg_pointer = true;
1160 /* Don't call mark_reg_pointer for incompatible pointer sign
1161 extension. */
1162 while (GET_CODE (x) == SIGN_EXTEND
1163 || GET_CODE (x) == ZERO_EXTEND
1164 || GET_CODE (x) == TRUNCATE
1165 || (GET_CODE (x) == SUBREG && subreg_lowpart_p (x)))
1167 #if defined(POINTERS_EXTEND_UNSIGNED)
1168 if (((GET_CODE (x) == SIGN_EXTEND && POINTERS_EXTEND_UNSIGNED)
1169 || (GET_CODE (x) == ZERO_EXTEND && ! POINTERS_EXTEND_UNSIGNED)
1170 || (paradoxical_subreg_p (x)
1171 && ! (SUBREG_PROMOTED_VAR_P (x)
1172 && SUBREG_CHECK_PROMOTED_SIGN (x,
1173 POINTERS_EXTEND_UNSIGNED))))
1174 && !targetm.have_ptr_extend ())
1175 can_be_reg_pointer = false;
1176 #endif
1177 x = XEXP (x, 0);
1180 /* Hard registers can be reused for multiple purposes within the same
1181 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1182 on them is wrong. */
1183 if (HARD_REGISTER_P (reg))
1184 return;
1186 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
1187 if (MEM_P (x))
1189 if (MEM_OFFSET_KNOWN_P (x))
1190 REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
1191 MEM_OFFSET (x) + offset);
1192 if (can_be_reg_pointer && MEM_POINTER (x))
1193 mark_reg_pointer (reg, 0);
1195 else if (REG_P (x))
1197 if (REG_ATTRS (x))
1198 update_reg_offset (reg, x, offset);
1199 if (can_be_reg_pointer && REG_POINTER (x))
1200 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1204 /* Generate a REG rtx for a new pseudo register, copying the mode
1205 and attributes from X. */
1208 gen_reg_rtx_and_attrs (rtx x)
1210 rtx reg = gen_reg_rtx (GET_MODE (x));
1211 set_reg_attrs_from_value (reg, x);
1212 return reg;
1215 /* Set the register attributes for registers contained in PARM_RTX.
1216 Use needed values from memory attributes of MEM. */
1218 void
1219 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1221 if (REG_P (parm_rtx))
1222 set_reg_attrs_from_value (parm_rtx, mem);
1223 else if (GET_CODE (parm_rtx) == PARALLEL)
1225 /* Check for a NULL entry in the first slot, used to indicate that the
1226 parameter goes both on the stack and in registers. */
1227 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1228 for (; i < XVECLEN (parm_rtx, 0); i++)
1230 rtx x = XVECEXP (parm_rtx, 0, i);
1231 if (REG_P (XEXP (x, 0)))
1232 REG_ATTRS (XEXP (x, 0))
1233 = get_reg_attrs (MEM_EXPR (mem),
1234 INTVAL (XEXP (x, 1)));
1239 /* Set the REG_ATTRS for registers in value X, given that X represents
1240 decl T. */
1242 void
1243 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1245 if (!t)
1246 return;
1247 tree tdecl = t;
1248 if (GET_CODE (x) == SUBREG)
1250 gcc_assert (subreg_lowpart_p (x));
1251 x = SUBREG_REG (x);
1253 if (REG_P (x))
1254 REG_ATTRS (x)
1255 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1256 DECL_P (tdecl)
1257 ? DECL_MODE (tdecl)
1258 : TYPE_MODE (TREE_TYPE (tdecl))));
1259 if (GET_CODE (x) == CONCAT)
1261 if (REG_P (XEXP (x, 0)))
1262 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1263 if (REG_P (XEXP (x, 1)))
1264 REG_ATTRS (XEXP (x, 1))
1265 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1267 if (GET_CODE (x) == PARALLEL)
1269 int i, start;
1271 /* Check for a NULL entry, used to indicate that the parameter goes
1272 both on the stack and in registers. */
1273 if (XEXP (XVECEXP (x, 0, 0), 0))
1274 start = 0;
1275 else
1276 start = 1;
1278 for (i = start; i < XVECLEN (x, 0); i++)
1280 rtx y = XVECEXP (x, 0, i);
1281 if (REG_P (XEXP (y, 0)))
1282 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1287 /* Assign the RTX X to declaration T. */
1289 void
1290 set_decl_rtl (tree t, rtx x)
1292 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1293 if (x)
1294 set_reg_attrs_for_decl_rtl (t, x);
1297 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1298 if the ABI requires the parameter to be passed by reference. */
1300 void
1301 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1303 DECL_INCOMING_RTL (t) = x;
1304 if (x && !by_reference_p)
1305 set_reg_attrs_for_decl_rtl (t, x);
1308 /* Identify REG (which may be a CONCAT) as a user register. */
1310 void
1311 mark_user_reg (rtx reg)
1313 if (GET_CODE (reg) == CONCAT)
1315 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1316 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1318 else
1320 gcc_assert (REG_P (reg));
1321 REG_USERVAR_P (reg) = 1;
1325 /* Identify REG as a probable pointer register and show its alignment
1326 as ALIGN, if nonzero. */
1328 void
1329 mark_reg_pointer (rtx reg, int align)
1331 if (! REG_POINTER (reg))
1333 REG_POINTER (reg) = 1;
1335 if (align)
1336 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1338 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1339 /* We can no-longer be sure just how aligned this pointer is. */
1340 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1343 /* Return 1 plus largest pseudo reg number used in the current function. */
1346 max_reg_num (void)
1348 return reg_rtx_no;
1351 /* Return 1 + the largest label number used so far in the current function. */
1354 max_label_num (void)
1356 return label_num;
1359 /* Return first label number used in this function (if any were used). */
1362 get_first_label_num (void)
1364 return first_label_num;
1367 /* If the rtx for label was created during the expansion of a nested
1368 function, then first_label_num won't include this label number.
1369 Fix this now so that array indices work later. */
1371 void
1372 maybe_set_first_label_num (rtx_code_label *x)
1374 if (CODE_LABEL_NUMBER (x) < first_label_num)
1375 first_label_num = CODE_LABEL_NUMBER (x);
1378 /* For use by the RTL function loader, when mingling with normal
1379 functions.
1380 Ensure that label_num is greater than the label num of X, to avoid
1381 duplicate labels in the generated assembler. */
1383 void
1384 maybe_set_max_label_num (rtx_code_label *x)
1386 if (CODE_LABEL_NUMBER (x) >= label_num)
1387 label_num = CODE_LABEL_NUMBER (x) + 1;
1391 /* Return a value representing some low-order bits of X, where the number
1392 of low-order bits is given by MODE. Note that no conversion is done
1393 between floating-point and fixed-point values, rather, the bit
1394 representation is returned.
1396 This function handles the cases in common between gen_lowpart, below,
1397 and two variants in cse.c and combine.c. These are the cases that can
1398 be safely handled at all points in the compilation.
1400 If this is not a case we can handle, return 0. */
1403 gen_lowpart_common (machine_mode mode, rtx x)
1405 int msize = GET_MODE_SIZE (mode);
1406 int xsize;
1407 machine_mode innermode;
1409 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1410 so we have to make one up. Yuk. */
1411 innermode = GET_MODE (x);
1412 if (CONST_INT_P (x)
1413 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1414 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1415 else if (innermode == VOIDmode)
1416 innermode = mode_for_size (HOST_BITS_PER_DOUBLE_INT, MODE_INT, 0);
1418 xsize = GET_MODE_SIZE (innermode);
1420 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1422 if (innermode == mode)
1423 return x;
1425 /* MODE must occupy no more words than the mode of X. */
1426 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1427 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1428 return 0;
1430 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1431 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1432 return 0;
1434 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1435 && (GET_MODE_CLASS (mode) == MODE_INT
1436 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1438 /* If we are getting the low-order part of something that has been
1439 sign- or zero-extended, we can either just use the object being
1440 extended or make a narrower extension. If we want an even smaller
1441 piece than the size of the object being extended, call ourselves
1442 recursively.
1444 This case is used mostly by combine and cse. */
1446 if (GET_MODE (XEXP (x, 0)) == mode)
1447 return XEXP (x, 0);
1448 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1449 return gen_lowpart_common (mode, XEXP (x, 0));
1450 else if (msize < xsize)
1451 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1453 else if (GET_CODE (x) == SUBREG || REG_P (x)
1454 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1455 || CONST_DOUBLE_AS_FLOAT_P (x) || CONST_SCALAR_INT_P (x))
1456 return lowpart_subreg (mode, x, innermode);
1458 /* Otherwise, we can't do this. */
1459 return 0;
1463 gen_highpart (machine_mode mode, rtx x)
1465 unsigned int msize = GET_MODE_SIZE (mode);
1466 rtx result;
1468 /* This case loses if X is a subreg. To catch bugs early,
1469 complain if an invalid MODE is used even in other cases. */
1470 gcc_assert (msize <= UNITS_PER_WORD
1471 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1473 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1474 subreg_highpart_offset (mode, GET_MODE (x)));
1475 gcc_assert (result);
1477 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1478 the target if we have a MEM. gen_highpart must return a valid operand,
1479 emitting code if necessary to do so. */
1480 if (MEM_P (result))
1482 result = validize_mem (result);
1483 gcc_assert (result);
1486 return result;
1489 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1490 be VOIDmode constant. */
1492 gen_highpart_mode (machine_mode outermode, machine_mode innermode, rtx exp)
1494 if (GET_MODE (exp) != VOIDmode)
1496 gcc_assert (GET_MODE (exp) == innermode);
1497 return gen_highpart (outermode, exp);
1499 return simplify_gen_subreg (outermode, exp, innermode,
1500 subreg_highpart_offset (outermode, innermode));
1503 /* Return the SUBREG_BYTE for a lowpart subreg whose outer mode has
1504 OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1506 unsigned int
1507 subreg_size_lowpart_offset (unsigned int outer_bytes, unsigned int inner_bytes)
1509 if (outer_bytes > inner_bytes)
1510 /* Paradoxical subregs always have a SUBREG_BYTE of 0. */
1511 return 0;
1513 if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1514 return inner_bytes - outer_bytes;
1515 else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1516 return 0;
1517 else
1518 return subreg_size_offset_from_lsb (outer_bytes, inner_bytes, 0);
1521 /* Return the SUBREG_BYTE for a highpart subreg whose outer mode has
1522 OUTER_BYTES bytes and whose inner mode has INNER_BYTES bytes. */
1524 unsigned int
1525 subreg_size_highpart_offset (unsigned int outer_bytes,
1526 unsigned int inner_bytes)
1528 gcc_assert (inner_bytes >= outer_bytes);
1530 if (BYTES_BIG_ENDIAN && WORDS_BIG_ENDIAN)
1531 return 0;
1532 else if (!BYTES_BIG_ENDIAN && !WORDS_BIG_ENDIAN)
1533 return inner_bytes - outer_bytes;
1534 else
1535 return subreg_size_offset_from_lsb (outer_bytes, inner_bytes,
1536 (inner_bytes - outer_bytes)
1537 * BITS_PER_UNIT);
1540 /* Return 1 iff X, assumed to be a SUBREG,
1541 refers to the least significant part of its containing reg.
1542 If X is not a SUBREG, always return 1 (it is its own low part!). */
1545 subreg_lowpart_p (const_rtx x)
1547 if (GET_CODE (x) != SUBREG)
1548 return 1;
1549 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1550 return 0;
1552 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1553 == SUBREG_BYTE (x));
1556 /* Return true if X is a paradoxical subreg, false otherwise. */
1557 bool
1558 paradoxical_subreg_p (const_rtx x)
1560 if (GET_CODE (x) != SUBREG)
1561 return false;
1562 return (GET_MODE_PRECISION (GET_MODE (x))
1563 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))));
1566 /* Return subword OFFSET of operand OP.
1567 The word number, OFFSET, is interpreted as the word number starting
1568 at the low-order address. OFFSET 0 is the low-order word if not
1569 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1571 If we cannot extract the required word, we return zero. Otherwise,
1572 an rtx corresponding to the requested word will be returned.
1574 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1575 reload has completed, a valid address will always be returned. After
1576 reload, if a valid address cannot be returned, we return zero.
1578 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1579 it is the responsibility of the caller.
1581 MODE is the mode of OP in case it is a CONST_INT.
1583 ??? This is still rather broken for some cases. The problem for the
1584 moment is that all callers of this thing provide no 'goal mode' to
1585 tell us to work with. This exists because all callers were written
1586 in a word based SUBREG world.
1587 Now use of this function can be deprecated by simplify_subreg in most
1588 cases.
1592 operand_subword (rtx op, unsigned int offset, int validate_address, machine_mode mode)
1594 if (mode == VOIDmode)
1595 mode = GET_MODE (op);
1597 gcc_assert (mode != VOIDmode);
1599 /* If OP is narrower than a word, fail. */
1600 if (mode != BLKmode
1601 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1602 return 0;
1604 /* If we want a word outside OP, return zero. */
1605 if (mode != BLKmode
1606 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1607 return const0_rtx;
1609 /* Form a new MEM at the requested address. */
1610 if (MEM_P (op))
1612 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1614 if (! validate_address)
1615 return new_rtx;
1617 else if (reload_completed)
1619 if (! strict_memory_address_addr_space_p (word_mode,
1620 XEXP (new_rtx, 0),
1621 MEM_ADDR_SPACE (op)))
1622 return 0;
1624 else
1625 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1628 /* Rest can be handled by simplify_subreg. */
1629 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1632 /* Similar to `operand_subword', but never return 0. If we can't
1633 extract the required subword, put OP into a register and try again.
1634 The second attempt must succeed. We always validate the address in
1635 this case.
1637 MODE is the mode of OP, in case it is CONST_INT. */
1640 operand_subword_force (rtx op, unsigned int offset, machine_mode mode)
1642 rtx result = operand_subword (op, offset, 1, mode);
1644 if (result)
1645 return result;
1647 if (mode != BLKmode && mode != VOIDmode)
1649 /* If this is a register which can not be accessed by words, copy it
1650 to a pseudo register. */
1651 if (REG_P (op))
1652 op = copy_to_reg (op);
1653 else
1654 op = force_reg (mode, op);
1657 result = operand_subword (op, offset, 1, mode);
1658 gcc_assert (result);
1660 return result;
1663 /* Returns 1 if both MEM_EXPR can be considered equal
1664 and 0 otherwise. */
1667 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1669 if (expr1 == expr2)
1670 return 1;
1672 if (! expr1 || ! expr2)
1673 return 0;
1675 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1676 return 0;
1678 return operand_equal_p (expr1, expr2, 0);
1681 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1682 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1683 -1 if not known. */
1686 get_mem_align_offset (rtx mem, unsigned int align)
1688 tree expr;
1689 unsigned HOST_WIDE_INT offset;
1691 /* This function can't use
1692 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1693 || (MAX (MEM_ALIGN (mem),
1694 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1695 < align))
1696 return -1;
1697 else
1698 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1699 for two reasons:
1700 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1701 for <variable>. get_inner_reference doesn't handle it and
1702 even if it did, the alignment in that case needs to be determined
1703 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1704 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1705 isn't sufficiently aligned, the object it is in might be. */
1706 gcc_assert (MEM_P (mem));
1707 expr = MEM_EXPR (mem);
1708 if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1709 return -1;
1711 offset = MEM_OFFSET (mem);
1712 if (DECL_P (expr))
1714 if (DECL_ALIGN (expr) < align)
1715 return -1;
1717 else if (INDIRECT_REF_P (expr))
1719 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1720 return -1;
1722 else if (TREE_CODE (expr) == COMPONENT_REF)
1724 while (1)
1726 tree inner = TREE_OPERAND (expr, 0);
1727 tree field = TREE_OPERAND (expr, 1);
1728 tree byte_offset = component_ref_field_offset (expr);
1729 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1731 if (!byte_offset
1732 || !tree_fits_uhwi_p (byte_offset)
1733 || !tree_fits_uhwi_p (bit_offset))
1734 return -1;
1736 offset += tree_to_uhwi (byte_offset);
1737 offset += tree_to_uhwi (bit_offset) / BITS_PER_UNIT;
1739 if (inner == NULL_TREE)
1741 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1742 < (unsigned int) align)
1743 return -1;
1744 break;
1746 else if (DECL_P (inner))
1748 if (DECL_ALIGN (inner) < align)
1749 return -1;
1750 break;
1752 else if (TREE_CODE (inner) != COMPONENT_REF)
1753 return -1;
1754 expr = inner;
1757 else
1758 return -1;
1760 return offset & ((align / BITS_PER_UNIT) - 1);
1763 /* Given REF (a MEM) and T, either the type of X or the expression
1764 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1765 if we are making a new object of this type. BITPOS is nonzero if
1766 there is an offset outstanding on T that will be applied later. */
1768 void
1769 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1770 HOST_WIDE_INT bitpos)
1772 HOST_WIDE_INT apply_bitpos = 0;
1773 tree type;
1774 struct mem_attrs attrs, *defattrs, *refattrs;
1775 addr_space_t as;
1777 /* It can happen that type_for_mode was given a mode for which there
1778 is no language-level type. In which case it returns NULL, which
1779 we can see here. */
1780 if (t == NULL_TREE)
1781 return;
1783 type = TYPE_P (t) ? t : TREE_TYPE (t);
1784 if (type == error_mark_node)
1785 return;
1787 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1788 wrong answer, as it assumes that DECL_RTL already has the right alias
1789 info. Callers should not set DECL_RTL until after the call to
1790 set_mem_attributes. */
1791 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1793 memset (&attrs, 0, sizeof (attrs));
1795 /* Get the alias set from the expression or type (perhaps using a
1796 front-end routine) and use it. */
1797 attrs.alias = get_alias_set (t);
1799 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1800 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1802 /* Default values from pre-existing memory attributes if present. */
1803 refattrs = MEM_ATTRS (ref);
1804 if (refattrs)
1806 /* ??? Can this ever happen? Calling this routine on a MEM that
1807 already carries memory attributes should probably be invalid. */
1808 attrs.expr = refattrs->expr;
1809 attrs.offset_known_p = refattrs->offset_known_p;
1810 attrs.offset = refattrs->offset;
1811 attrs.size_known_p = refattrs->size_known_p;
1812 attrs.size = refattrs->size;
1813 attrs.align = refattrs->align;
1816 /* Otherwise, default values from the mode of the MEM reference. */
1817 else
1819 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1820 gcc_assert (!defattrs->expr);
1821 gcc_assert (!defattrs->offset_known_p);
1823 /* Respect mode size. */
1824 attrs.size_known_p = defattrs->size_known_p;
1825 attrs.size = defattrs->size;
1826 /* ??? Is this really necessary? We probably should always get
1827 the size from the type below. */
1829 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1830 if T is an object, always compute the object alignment below. */
1831 if (TYPE_P (t))
1832 attrs.align = defattrs->align;
1833 else
1834 attrs.align = BITS_PER_UNIT;
1835 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1836 e.g. if the type carries an alignment attribute. Should we be
1837 able to simply always use TYPE_ALIGN? */
1840 /* We can set the alignment from the type if we are making an object or if
1841 this is an INDIRECT_REF. */
1842 if (objectp || TREE_CODE (t) == INDIRECT_REF)
1843 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1845 /* If the size is known, we can set that. */
1846 tree new_size = TYPE_SIZE_UNIT (type);
1848 /* The address-space is that of the type. */
1849 as = TYPE_ADDR_SPACE (type);
1851 /* If T is not a type, we may be able to deduce some more information about
1852 the expression. */
1853 if (! TYPE_P (t))
1855 tree base;
1857 if (TREE_THIS_VOLATILE (t))
1858 MEM_VOLATILE_P (ref) = 1;
1860 /* Now remove any conversions: they don't change what the underlying
1861 object is. Likewise for SAVE_EXPR. */
1862 while (CONVERT_EXPR_P (t)
1863 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1864 || TREE_CODE (t) == SAVE_EXPR)
1865 t = TREE_OPERAND (t, 0);
1867 /* Note whether this expression can trap. */
1868 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1870 base = get_base_address (t);
1871 if (base)
1873 if (DECL_P (base)
1874 && TREE_READONLY (base)
1875 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1876 && !TREE_THIS_VOLATILE (base))
1877 MEM_READONLY_P (ref) = 1;
1879 /* Mark static const strings readonly as well. */
1880 if (TREE_CODE (base) == STRING_CST
1881 && TREE_READONLY (base)
1882 && TREE_STATIC (base))
1883 MEM_READONLY_P (ref) = 1;
1885 /* Address-space information is on the base object. */
1886 if (TREE_CODE (base) == MEM_REF
1887 || TREE_CODE (base) == TARGET_MEM_REF)
1888 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (base,
1889 0))));
1890 else
1891 as = TYPE_ADDR_SPACE (TREE_TYPE (base));
1894 /* If this expression uses it's parent's alias set, mark it such
1895 that we won't change it. */
1896 if (component_uses_parent_alias_set_from (t) != NULL_TREE)
1897 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1899 /* If this is a decl, set the attributes of the MEM from it. */
1900 if (DECL_P (t))
1902 attrs.expr = t;
1903 attrs.offset_known_p = true;
1904 attrs.offset = 0;
1905 apply_bitpos = bitpos;
1906 new_size = DECL_SIZE_UNIT (t);
1909 /* ??? If we end up with a constant here do record a MEM_EXPR. */
1910 else if (CONSTANT_CLASS_P (t))
1913 /* If this is a field reference, record it. */
1914 else if (TREE_CODE (t) == COMPONENT_REF)
1916 attrs.expr = t;
1917 attrs.offset_known_p = true;
1918 attrs.offset = 0;
1919 apply_bitpos = bitpos;
1920 if (DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1921 new_size = DECL_SIZE_UNIT (TREE_OPERAND (t, 1));
1924 /* If this is an array reference, look for an outer field reference. */
1925 else if (TREE_CODE (t) == ARRAY_REF)
1927 tree off_tree = size_zero_node;
1928 /* We can't modify t, because we use it at the end of the
1929 function. */
1930 tree t2 = t;
1934 tree index = TREE_OPERAND (t2, 1);
1935 tree low_bound = array_ref_low_bound (t2);
1936 tree unit_size = array_ref_element_size (t2);
1938 /* We assume all arrays have sizes that are a multiple of a byte.
1939 First subtract the lower bound, if any, in the type of the
1940 index, then convert to sizetype and multiply by the size of
1941 the array element. */
1942 if (! integer_zerop (low_bound))
1943 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1944 index, low_bound);
1946 off_tree = size_binop (PLUS_EXPR,
1947 size_binop (MULT_EXPR,
1948 fold_convert (sizetype,
1949 index),
1950 unit_size),
1951 off_tree);
1952 t2 = TREE_OPERAND (t2, 0);
1954 while (TREE_CODE (t2) == ARRAY_REF);
1956 if (DECL_P (t2)
1957 || (TREE_CODE (t2) == COMPONENT_REF
1958 /* For trailing arrays t2 doesn't have a size that
1959 covers all valid accesses. */
1960 && ! array_at_struct_end_p (t)))
1962 attrs.expr = t2;
1963 attrs.offset_known_p = false;
1964 if (tree_fits_uhwi_p (off_tree))
1966 attrs.offset_known_p = true;
1967 attrs.offset = tree_to_uhwi (off_tree);
1968 apply_bitpos = bitpos;
1971 /* Else do not record a MEM_EXPR. */
1974 /* If this is an indirect reference, record it. */
1975 else if (TREE_CODE (t) == MEM_REF
1976 || TREE_CODE (t) == TARGET_MEM_REF)
1978 attrs.expr = t;
1979 attrs.offset_known_p = true;
1980 attrs.offset = 0;
1981 apply_bitpos = bitpos;
1984 /* Compute the alignment. */
1985 unsigned int obj_align;
1986 unsigned HOST_WIDE_INT obj_bitpos;
1987 get_object_alignment_1 (t, &obj_align, &obj_bitpos);
1988 obj_bitpos = (obj_bitpos - bitpos) & (obj_align - 1);
1989 if (obj_bitpos != 0)
1990 obj_align = least_bit_hwi (obj_bitpos);
1991 attrs.align = MAX (attrs.align, obj_align);
1994 if (tree_fits_uhwi_p (new_size))
1996 attrs.size_known_p = true;
1997 attrs.size = tree_to_uhwi (new_size);
2000 /* If we modified OFFSET based on T, then subtract the outstanding
2001 bit position offset. Similarly, increase the size of the accessed
2002 object to contain the negative offset. */
2003 if (apply_bitpos)
2005 gcc_assert (attrs.offset_known_p);
2006 attrs.offset -= apply_bitpos / BITS_PER_UNIT;
2007 if (attrs.size_known_p)
2008 attrs.size += apply_bitpos / BITS_PER_UNIT;
2011 /* Now set the attributes we computed above. */
2012 attrs.addrspace = as;
2013 set_mem_attrs (ref, &attrs);
2016 void
2017 set_mem_attributes (rtx ref, tree t, int objectp)
2019 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
2022 /* Set the alias set of MEM to SET. */
2024 void
2025 set_mem_alias_set (rtx mem, alias_set_type set)
2027 struct mem_attrs attrs;
2029 /* If the new and old alias sets don't conflict, something is wrong. */
2030 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
2031 attrs = *get_mem_attrs (mem);
2032 attrs.alias = set;
2033 set_mem_attrs (mem, &attrs);
2036 /* Set the address space of MEM to ADDRSPACE (target-defined). */
2038 void
2039 set_mem_addr_space (rtx mem, addr_space_t addrspace)
2041 struct mem_attrs attrs;
2043 attrs = *get_mem_attrs (mem);
2044 attrs.addrspace = addrspace;
2045 set_mem_attrs (mem, &attrs);
2048 /* Set the alignment of MEM to ALIGN bits. */
2050 void
2051 set_mem_align (rtx mem, unsigned int align)
2053 struct mem_attrs attrs;
2055 attrs = *get_mem_attrs (mem);
2056 attrs.align = align;
2057 set_mem_attrs (mem, &attrs);
2060 /* Set the expr for MEM to EXPR. */
2062 void
2063 set_mem_expr (rtx mem, tree expr)
2065 struct mem_attrs attrs;
2067 attrs = *get_mem_attrs (mem);
2068 attrs.expr = expr;
2069 set_mem_attrs (mem, &attrs);
2072 /* Set the offset of MEM to OFFSET. */
2074 void
2075 set_mem_offset (rtx mem, HOST_WIDE_INT offset)
2077 struct mem_attrs attrs;
2079 attrs = *get_mem_attrs (mem);
2080 attrs.offset_known_p = true;
2081 attrs.offset = offset;
2082 set_mem_attrs (mem, &attrs);
2085 /* Clear the offset of MEM. */
2087 void
2088 clear_mem_offset (rtx mem)
2090 struct mem_attrs attrs;
2092 attrs = *get_mem_attrs (mem);
2093 attrs.offset_known_p = false;
2094 set_mem_attrs (mem, &attrs);
2097 /* Set the size of MEM to SIZE. */
2099 void
2100 set_mem_size (rtx mem, HOST_WIDE_INT size)
2102 struct mem_attrs attrs;
2104 attrs = *get_mem_attrs (mem);
2105 attrs.size_known_p = true;
2106 attrs.size = size;
2107 set_mem_attrs (mem, &attrs);
2110 /* Clear the size of MEM. */
2112 void
2113 clear_mem_size (rtx mem)
2115 struct mem_attrs attrs;
2117 attrs = *get_mem_attrs (mem);
2118 attrs.size_known_p = false;
2119 set_mem_attrs (mem, &attrs);
2122 /* Return a memory reference like MEMREF, but with its mode changed to MODE
2123 and its address changed to ADDR. (VOIDmode means don't change the mode.
2124 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
2125 returned memory location is required to be valid. INPLACE is true if any
2126 changes can be made directly to MEMREF or false if MEMREF must be treated
2127 as immutable.
2129 The memory attributes are not changed. */
2131 static rtx
2132 change_address_1 (rtx memref, machine_mode mode, rtx addr, int validate,
2133 bool inplace)
2135 addr_space_t as;
2136 rtx new_rtx;
2138 gcc_assert (MEM_P (memref));
2139 as = MEM_ADDR_SPACE (memref);
2140 if (mode == VOIDmode)
2141 mode = GET_MODE (memref);
2142 if (addr == 0)
2143 addr = XEXP (memref, 0);
2144 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
2145 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2146 return memref;
2148 /* Don't validate address for LRA. LRA can make the address valid
2149 by itself in most efficient way. */
2150 if (validate && !lra_in_progress)
2152 if (reload_in_progress || reload_completed)
2153 gcc_assert (memory_address_addr_space_p (mode, addr, as));
2154 else
2155 addr = memory_address_addr_space (mode, addr, as);
2158 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2159 return memref;
2161 if (inplace)
2163 XEXP (memref, 0) = addr;
2164 return memref;
2167 new_rtx = gen_rtx_MEM (mode, addr);
2168 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2169 return new_rtx;
2172 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2173 way we are changing MEMREF, so we only preserve the alias set. */
2176 change_address (rtx memref, machine_mode mode, rtx addr)
2178 rtx new_rtx = change_address_1 (memref, mode, addr, 1, false);
2179 machine_mode mmode = GET_MODE (new_rtx);
2180 struct mem_attrs attrs, *defattrs;
2182 attrs = *get_mem_attrs (memref);
2183 defattrs = mode_mem_attrs[(int) mmode];
2184 attrs.expr = NULL_TREE;
2185 attrs.offset_known_p = false;
2186 attrs.size_known_p = defattrs->size_known_p;
2187 attrs.size = defattrs->size;
2188 attrs.align = defattrs->align;
2190 /* If there are no changes, just return the original memory reference. */
2191 if (new_rtx == memref)
2193 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2194 return new_rtx;
2196 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2197 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2200 set_mem_attrs (new_rtx, &attrs);
2201 return new_rtx;
2204 /* Return a memory reference like MEMREF, but with its mode changed
2205 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2206 nonzero, the memory address is forced to be valid.
2207 If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS
2208 and the caller is responsible for adjusting MEMREF base register.
2209 If ADJUST_OBJECT is zero, the underlying object associated with the
2210 memory reference is left unchanged and the caller is responsible for
2211 dealing with it. Otherwise, if the new memory reference is outside
2212 the underlying object, even partially, then the object is dropped.
2213 SIZE, if nonzero, is the size of an access in cases where MODE
2214 has no inherent size. */
2217 adjust_address_1 (rtx memref, machine_mode mode, HOST_WIDE_INT offset,
2218 int validate, int adjust_address, int adjust_object,
2219 HOST_WIDE_INT size)
2221 rtx addr = XEXP (memref, 0);
2222 rtx new_rtx;
2223 machine_mode address_mode;
2224 int pbits;
2225 struct mem_attrs attrs = *get_mem_attrs (memref), *defattrs;
2226 unsigned HOST_WIDE_INT max_align;
2227 #ifdef POINTERS_EXTEND_UNSIGNED
2228 machine_mode pointer_mode
2229 = targetm.addr_space.pointer_mode (attrs.addrspace);
2230 #endif
2232 /* VOIDmode means no mode change for change_address_1. */
2233 if (mode == VOIDmode)
2234 mode = GET_MODE (memref);
2236 /* Take the size of non-BLKmode accesses from the mode. */
2237 defattrs = mode_mem_attrs[(int) mode];
2238 if (defattrs->size_known_p)
2239 size = defattrs->size;
2241 /* If there are no changes, just return the original memory reference. */
2242 if (mode == GET_MODE (memref) && !offset
2243 && (size == 0 || (attrs.size_known_p && attrs.size == size))
2244 && (!validate || memory_address_addr_space_p (mode, addr,
2245 attrs.addrspace)))
2246 return memref;
2248 /* ??? Prefer to create garbage instead of creating shared rtl.
2249 This may happen even if offset is nonzero -- consider
2250 (plus (plus reg reg) const_int) -- so do this always. */
2251 addr = copy_rtx (addr);
2253 /* Convert a possibly large offset to a signed value within the
2254 range of the target address space. */
2255 address_mode = get_address_mode (memref);
2256 pbits = GET_MODE_BITSIZE (address_mode);
2257 if (HOST_BITS_PER_WIDE_INT > pbits)
2259 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2260 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2261 >> shift);
2264 if (adjust_address)
2266 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2267 object, we can merge it into the LO_SUM. */
2268 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2269 && offset >= 0
2270 && (unsigned HOST_WIDE_INT) offset
2271 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2272 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2273 plus_constant (address_mode,
2274 XEXP (addr, 1), offset));
2275 #ifdef POINTERS_EXTEND_UNSIGNED
2276 /* If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
2277 in that mode, we merge it into the ZERO_EXTEND. We take advantage of
2278 the fact that pointers are not allowed to overflow. */
2279 else if (POINTERS_EXTEND_UNSIGNED > 0
2280 && GET_CODE (addr) == ZERO_EXTEND
2281 && GET_MODE (XEXP (addr, 0)) == pointer_mode
2282 && trunc_int_for_mode (offset, pointer_mode) == offset)
2283 addr = gen_rtx_ZERO_EXTEND (address_mode,
2284 plus_constant (pointer_mode,
2285 XEXP (addr, 0), offset));
2286 #endif
2287 else
2288 addr = plus_constant (address_mode, addr, offset);
2291 new_rtx = change_address_1 (memref, mode, addr, validate, false);
2293 /* If the address is a REG, change_address_1 rightfully returns memref,
2294 but this would destroy memref's MEM_ATTRS. */
2295 if (new_rtx == memref && offset != 0)
2296 new_rtx = copy_rtx (new_rtx);
2298 /* Conservatively drop the object if we don't know where we start from. */
2299 if (adjust_object && (!attrs.offset_known_p || !attrs.size_known_p))
2301 attrs.expr = NULL_TREE;
2302 attrs.alias = 0;
2305 /* Compute the new values of the memory attributes due to this adjustment.
2306 We add the offsets and update the alignment. */
2307 if (attrs.offset_known_p)
2309 attrs.offset += offset;
2311 /* Drop the object if the new left end is not within its bounds. */
2312 if (adjust_object && attrs.offset < 0)
2314 attrs.expr = NULL_TREE;
2315 attrs.alias = 0;
2319 /* Compute the new alignment by taking the MIN of the alignment and the
2320 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2321 if zero. */
2322 if (offset != 0)
2324 max_align = least_bit_hwi (offset) * BITS_PER_UNIT;
2325 attrs.align = MIN (attrs.align, max_align);
2328 if (size)
2330 /* Drop the object if the new right end is not within its bounds. */
2331 if (adjust_object && (offset + size) > attrs.size)
2333 attrs.expr = NULL_TREE;
2334 attrs.alias = 0;
2336 attrs.size_known_p = true;
2337 attrs.size = size;
2339 else if (attrs.size_known_p)
2341 gcc_assert (!adjust_object);
2342 attrs.size -= offset;
2343 /* ??? The store_by_pieces machinery generates negative sizes,
2344 so don't assert for that here. */
2347 set_mem_attrs (new_rtx, &attrs);
2349 return new_rtx;
2352 /* Return a memory reference like MEMREF, but with its mode changed
2353 to MODE and its address changed to ADDR, which is assumed to be
2354 MEMREF offset by OFFSET bytes. If VALIDATE is
2355 nonzero, the memory address is forced to be valid. */
2358 adjust_automodify_address_1 (rtx memref, machine_mode mode, rtx addr,
2359 HOST_WIDE_INT offset, int validate)
2361 memref = change_address_1 (memref, VOIDmode, addr, validate, false);
2362 return adjust_address_1 (memref, mode, offset, validate, 0, 0, 0);
2365 /* Return a memory reference like MEMREF, but whose address is changed by
2366 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2367 known to be in OFFSET (possibly 1). */
2370 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2372 rtx new_rtx, addr = XEXP (memref, 0);
2373 machine_mode address_mode;
2374 struct mem_attrs attrs, *defattrs;
2376 attrs = *get_mem_attrs (memref);
2377 address_mode = get_address_mode (memref);
2378 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2380 /* At this point we don't know _why_ the address is invalid. It
2381 could have secondary memory references, multiplies or anything.
2383 However, if we did go and rearrange things, we can wind up not
2384 being able to recognize the magic around pic_offset_table_rtx.
2385 This stuff is fragile, and is yet another example of why it is
2386 bad to expose PIC machinery too early. */
2387 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2388 attrs.addrspace)
2389 && GET_CODE (addr) == PLUS
2390 && XEXP (addr, 0) == pic_offset_table_rtx)
2392 addr = force_reg (GET_MODE (addr), addr);
2393 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2396 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2397 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1, false);
2399 /* If there are no changes, just return the original memory reference. */
2400 if (new_rtx == memref)
2401 return new_rtx;
2403 /* Update the alignment to reflect the offset. Reset the offset, which
2404 we don't know. */
2405 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2406 attrs.offset_known_p = false;
2407 attrs.size_known_p = defattrs->size_known_p;
2408 attrs.size = defattrs->size;
2409 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2410 set_mem_attrs (new_rtx, &attrs);
2411 return new_rtx;
2414 /* Return a memory reference like MEMREF, but with its address changed to
2415 ADDR. The caller is asserting that the actual piece of memory pointed
2416 to is the same, just the form of the address is being changed, such as
2417 by putting something into a register. INPLACE is true if any changes
2418 can be made directly to MEMREF or false if MEMREF must be treated as
2419 immutable. */
2422 replace_equiv_address (rtx memref, rtx addr, bool inplace)
2424 /* change_address_1 copies the memory attribute structure without change
2425 and that's exactly what we want here. */
2426 update_temp_slot_address (XEXP (memref, 0), addr);
2427 return change_address_1 (memref, VOIDmode, addr, 1, inplace);
2430 /* Likewise, but the reference is not required to be valid. */
2433 replace_equiv_address_nv (rtx memref, rtx addr, bool inplace)
2435 return change_address_1 (memref, VOIDmode, addr, 0, inplace);
2438 /* Return a memory reference like MEMREF, but with its mode widened to
2439 MODE and offset by OFFSET. This would be used by targets that e.g.
2440 cannot issue QImode memory operations and have to use SImode memory
2441 operations plus masking logic. */
2444 widen_memory_access (rtx memref, machine_mode mode, HOST_WIDE_INT offset)
2446 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1, 0, 0);
2447 struct mem_attrs attrs;
2448 unsigned int size = GET_MODE_SIZE (mode);
2450 /* If there are no changes, just return the original memory reference. */
2451 if (new_rtx == memref)
2452 return new_rtx;
2454 attrs = *get_mem_attrs (new_rtx);
2456 /* If we don't know what offset we were at within the expression, then
2457 we can't know if we've overstepped the bounds. */
2458 if (! attrs.offset_known_p)
2459 attrs.expr = NULL_TREE;
2461 while (attrs.expr)
2463 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2465 tree field = TREE_OPERAND (attrs.expr, 1);
2466 tree offset = component_ref_field_offset (attrs.expr);
2468 if (! DECL_SIZE_UNIT (field))
2470 attrs.expr = NULL_TREE;
2471 break;
2474 /* Is the field at least as large as the access? If so, ok,
2475 otherwise strip back to the containing structure. */
2476 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2477 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2478 && attrs.offset >= 0)
2479 break;
2481 if (! tree_fits_uhwi_p (offset))
2483 attrs.expr = NULL_TREE;
2484 break;
2487 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2488 attrs.offset += tree_to_uhwi (offset);
2489 attrs.offset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
2490 / BITS_PER_UNIT);
2492 /* Similarly for the decl. */
2493 else if (DECL_P (attrs.expr)
2494 && DECL_SIZE_UNIT (attrs.expr)
2495 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2496 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2497 && (! attrs.offset_known_p || attrs.offset >= 0))
2498 break;
2499 else
2501 /* The widened memory access overflows the expression, which means
2502 that it could alias another expression. Zap it. */
2503 attrs.expr = NULL_TREE;
2504 break;
2508 if (! attrs.expr)
2509 attrs.offset_known_p = false;
2511 /* The widened memory may alias other stuff, so zap the alias set. */
2512 /* ??? Maybe use get_alias_set on any remaining expression. */
2513 attrs.alias = 0;
2514 attrs.size_known_p = true;
2515 attrs.size = size;
2516 set_mem_attrs (new_rtx, &attrs);
2517 return new_rtx;
2520 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2521 static GTY(()) tree spill_slot_decl;
2523 tree
2524 get_spill_slot_decl (bool force_build_p)
2526 tree d = spill_slot_decl;
2527 rtx rd;
2528 struct mem_attrs attrs;
2530 if (d || !force_build_p)
2531 return d;
2533 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2534 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2535 DECL_ARTIFICIAL (d) = 1;
2536 DECL_IGNORED_P (d) = 1;
2537 TREE_USED (d) = 1;
2538 spill_slot_decl = d;
2540 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2541 MEM_NOTRAP_P (rd) = 1;
2542 attrs = *mode_mem_attrs[(int) BLKmode];
2543 attrs.alias = new_alias_set ();
2544 attrs.expr = d;
2545 set_mem_attrs (rd, &attrs);
2546 SET_DECL_RTL (d, rd);
2548 return d;
2551 /* Given MEM, a result from assign_stack_local, fill in the memory
2552 attributes as appropriate for a register allocator spill slot.
2553 These slots are not aliasable by other memory. We arrange for
2554 them all to use a single MEM_EXPR, so that the aliasing code can
2555 work properly in the case of shared spill slots. */
2557 void
2558 set_mem_attrs_for_spill (rtx mem)
2560 struct mem_attrs attrs;
2561 rtx addr;
2563 attrs = *get_mem_attrs (mem);
2564 attrs.expr = get_spill_slot_decl (true);
2565 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2566 attrs.addrspace = ADDR_SPACE_GENERIC;
2568 /* We expect the incoming memory to be of the form:
2569 (mem:MODE (plus (reg sfp) (const_int offset)))
2570 with perhaps the plus missing for offset = 0. */
2571 addr = XEXP (mem, 0);
2572 attrs.offset_known_p = true;
2573 attrs.offset = 0;
2574 if (GET_CODE (addr) == PLUS
2575 && CONST_INT_P (XEXP (addr, 1)))
2576 attrs.offset = INTVAL (XEXP (addr, 1));
2578 set_mem_attrs (mem, &attrs);
2579 MEM_NOTRAP_P (mem) = 1;
2582 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2584 rtx_code_label *
2585 gen_label_rtx (void)
2587 return as_a <rtx_code_label *> (
2588 gen_rtx_CODE_LABEL (VOIDmode, NULL_RTX, NULL_RTX,
2589 NULL, label_num++, NULL));
2592 /* For procedure integration. */
2594 /* Install new pointers to the first and last insns in the chain.
2595 Also, set cur_insn_uid to one higher than the last in use.
2596 Used for an inline-procedure after copying the insn chain. */
2598 void
2599 set_new_first_and_last_insn (rtx_insn *first, rtx_insn *last)
2601 rtx_insn *insn;
2603 set_first_insn (first);
2604 set_last_insn (last);
2605 cur_insn_uid = 0;
2607 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2609 int debug_count = 0;
2611 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2612 cur_debug_insn_uid = 0;
2614 for (insn = first; insn; insn = NEXT_INSN (insn))
2615 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2616 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2617 else
2619 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2620 if (DEBUG_INSN_P (insn))
2621 debug_count++;
2624 if (debug_count)
2625 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2626 else
2627 cur_debug_insn_uid++;
2629 else
2630 for (insn = first; insn; insn = NEXT_INSN (insn))
2631 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2633 cur_insn_uid++;
2636 /* Go through all the RTL insn bodies and copy any invalid shared
2637 structure. This routine should only be called once. */
2639 static void
2640 unshare_all_rtl_1 (rtx_insn *insn)
2642 /* Unshare just about everything else. */
2643 unshare_all_rtl_in_chain (insn);
2645 /* Make sure the addresses of stack slots found outside the insn chain
2646 (such as, in DECL_RTL of a variable) are not shared
2647 with the insn chain.
2649 This special care is necessary when the stack slot MEM does not
2650 actually appear in the insn chain. If it does appear, its address
2651 is unshared from all else at that point. */
2652 unsigned int i;
2653 rtx temp;
2654 FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2655 (*stack_slot_list)[i] = copy_rtx_if_shared (temp);
2658 /* Go through all the RTL insn bodies and copy any invalid shared
2659 structure, again. This is a fairly expensive thing to do so it
2660 should be done sparingly. */
2662 void
2663 unshare_all_rtl_again (rtx_insn *insn)
2665 rtx_insn *p;
2666 tree decl;
2668 for (p = insn; p; p = NEXT_INSN (p))
2669 if (INSN_P (p))
2671 reset_used_flags (PATTERN (p));
2672 reset_used_flags (REG_NOTES (p));
2673 if (CALL_P (p))
2674 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2677 /* Make sure that virtual stack slots are not shared. */
2678 set_used_decls (DECL_INITIAL (cfun->decl));
2680 /* Make sure that virtual parameters are not shared. */
2681 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2682 set_used_flags (DECL_RTL (decl));
2684 rtx temp;
2685 unsigned int i;
2686 FOR_EACH_VEC_SAFE_ELT (stack_slot_list, i, temp)
2687 reset_used_flags (temp);
2689 unshare_all_rtl_1 (insn);
2692 unsigned int
2693 unshare_all_rtl (void)
2695 unshare_all_rtl_1 (get_insns ());
2697 for (tree decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2699 if (DECL_RTL_SET_P (decl))
2700 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2701 DECL_INCOMING_RTL (decl) = copy_rtx_if_shared (DECL_INCOMING_RTL (decl));
2704 return 0;
2708 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2709 Recursively does the same for subexpressions. */
2711 static void
2712 verify_rtx_sharing (rtx orig, rtx insn)
2714 rtx x = orig;
2715 int i;
2716 enum rtx_code code;
2717 const char *format_ptr;
2719 if (x == 0)
2720 return;
2722 code = GET_CODE (x);
2724 /* These types may be freely shared. */
2726 switch (code)
2728 case REG:
2729 case DEBUG_EXPR:
2730 case VALUE:
2731 CASE_CONST_ANY:
2732 case SYMBOL_REF:
2733 case LABEL_REF:
2734 case CODE_LABEL:
2735 case PC:
2736 case CC0:
2737 case RETURN:
2738 case SIMPLE_RETURN:
2739 case SCRATCH:
2740 /* SCRATCH must be shared because they represent distinct values. */
2741 return;
2742 case CLOBBER:
2743 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2744 clobbers or clobbers of hard registers that originated as pseudos.
2745 This is needed to allow safe register renaming. */
2746 if (REG_P (XEXP (x, 0))
2747 && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
2748 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
2749 return;
2750 break;
2752 case CONST:
2753 if (shared_const_p (orig))
2754 return;
2755 break;
2757 case MEM:
2758 /* A MEM is allowed to be shared if its address is constant. */
2759 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2760 || reload_completed || reload_in_progress)
2761 return;
2763 break;
2765 default:
2766 break;
2769 /* This rtx may not be shared. If it has already been seen,
2770 replace it with a copy of itself. */
2771 if (flag_checking && RTX_FLAG (x, used))
2773 error ("invalid rtl sharing found in the insn");
2774 debug_rtx (insn);
2775 error ("shared rtx");
2776 debug_rtx (x);
2777 internal_error ("internal consistency failure");
2779 gcc_assert (!RTX_FLAG (x, used));
2781 RTX_FLAG (x, used) = 1;
2783 /* Now scan the subexpressions recursively. */
2785 format_ptr = GET_RTX_FORMAT (code);
2787 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2789 switch (*format_ptr++)
2791 case 'e':
2792 verify_rtx_sharing (XEXP (x, i), insn);
2793 break;
2795 case 'E':
2796 if (XVEC (x, i) != NULL)
2798 int j;
2799 int len = XVECLEN (x, i);
2801 for (j = 0; j < len; j++)
2803 /* We allow sharing of ASM_OPERANDS inside single
2804 instruction. */
2805 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2806 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2807 == ASM_OPERANDS))
2808 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2809 else
2810 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2813 break;
2816 return;
2819 /* Reset used-flags for INSN. */
2821 static void
2822 reset_insn_used_flags (rtx insn)
2824 gcc_assert (INSN_P (insn));
2825 reset_used_flags (PATTERN (insn));
2826 reset_used_flags (REG_NOTES (insn));
2827 if (CALL_P (insn))
2828 reset_used_flags (CALL_INSN_FUNCTION_USAGE (insn));
2831 /* Go through all the RTL insn bodies and clear all the USED bits. */
2833 static void
2834 reset_all_used_flags (void)
2836 rtx_insn *p;
2838 for (p = get_insns (); p; p = NEXT_INSN (p))
2839 if (INSN_P (p))
2841 rtx pat = PATTERN (p);
2842 if (GET_CODE (pat) != SEQUENCE)
2843 reset_insn_used_flags (p);
2844 else
2846 gcc_assert (REG_NOTES (p) == NULL);
2847 for (int i = 0; i < XVECLEN (pat, 0); i++)
2849 rtx insn = XVECEXP (pat, 0, i);
2850 if (INSN_P (insn))
2851 reset_insn_used_flags (insn);
2857 /* Verify sharing in INSN. */
2859 static void
2860 verify_insn_sharing (rtx insn)
2862 gcc_assert (INSN_P (insn));
2863 verify_rtx_sharing (PATTERN (insn), insn);
2864 verify_rtx_sharing (REG_NOTES (insn), insn);
2865 if (CALL_P (insn))
2866 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (insn), insn);
2869 /* Go through all the RTL insn bodies and check that there is no unexpected
2870 sharing in between the subexpressions. */
2872 DEBUG_FUNCTION void
2873 verify_rtl_sharing (void)
2875 rtx_insn *p;
2877 timevar_push (TV_VERIFY_RTL_SHARING);
2879 reset_all_used_flags ();
2881 for (p = get_insns (); p; p = NEXT_INSN (p))
2882 if (INSN_P (p))
2884 rtx pat = PATTERN (p);
2885 if (GET_CODE (pat) != SEQUENCE)
2886 verify_insn_sharing (p);
2887 else
2888 for (int i = 0; i < XVECLEN (pat, 0); i++)
2890 rtx insn = XVECEXP (pat, 0, i);
2891 if (INSN_P (insn))
2892 verify_insn_sharing (insn);
2896 reset_all_used_flags ();
2898 timevar_pop (TV_VERIFY_RTL_SHARING);
2901 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2902 Assumes the mark bits are cleared at entry. */
2904 void
2905 unshare_all_rtl_in_chain (rtx_insn *insn)
2907 for (; insn; insn = NEXT_INSN (insn))
2908 if (INSN_P (insn))
2910 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2911 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2912 if (CALL_P (insn))
2913 CALL_INSN_FUNCTION_USAGE (insn)
2914 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
2918 /* Go through all virtual stack slots of a function and mark them as
2919 shared. We never replace the DECL_RTLs themselves with a copy,
2920 but expressions mentioned into a DECL_RTL cannot be shared with
2921 expressions in the instruction stream.
2923 Note that reload may convert pseudo registers into memories in-place.
2924 Pseudo registers are always shared, but MEMs never are. Thus if we
2925 reset the used flags on MEMs in the instruction stream, we must set
2926 them again on MEMs that appear in DECL_RTLs. */
2928 static void
2929 set_used_decls (tree blk)
2931 tree t;
2933 /* Mark decls. */
2934 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2935 if (DECL_RTL_SET_P (t))
2936 set_used_flags (DECL_RTL (t));
2938 /* Now process sub-blocks. */
2939 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2940 set_used_decls (t);
2943 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2944 Recursively does the same for subexpressions. Uses
2945 copy_rtx_if_shared_1 to reduce stack space. */
2948 copy_rtx_if_shared (rtx orig)
2950 copy_rtx_if_shared_1 (&orig);
2951 return orig;
2954 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2955 use. Recursively does the same for subexpressions. */
2957 static void
2958 copy_rtx_if_shared_1 (rtx *orig1)
2960 rtx x;
2961 int i;
2962 enum rtx_code code;
2963 rtx *last_ptr;
2964 const char *format_ptr;
2965 int copied = 0;
2966 int length;
2968 /* Repeat is used to turn tail-recursion into iteration. */
2969 repeat:
2970 x = *orig1;
2972 if (x == 0)
2973 return;
2975 code = GET_CODE (x);
2977 /* These types may be freely shared. */
2979 switch (code)
2981 case REG:
2982 case DEBUG_EXPR:
2983 case VALUE:
2984 CASE_CONST_ANY:
2985 case SYMBOL_REF:
2986 case LABEL_REF:
2987 case CODE_LABEL:
2988 case PC:
2989 case CC0:
2990 case RETURN:
2991 case SIMPLE_RETURN:
2992 case SCRATCH:
2993 /* SCRATCH must be shared because they represent distinct values. */
2994 return;
2995 case CLOBBER:
2996 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
2997 clobbers or clobbers of hard registers that originated as pseudos.
2998 This is needed to allow safe register renaming. */
2999 if (REG_P (XEXP (x, 0))
3000 && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
3001 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (x, 0))))
3002 return;
3003 break;
3005 case CONST:
3006 if (shared_const_p (x))
3007 return;
3008 break;
3010 case DEBUG_INSN:
3011 case INSN:
3012 case JUMP_INSN:
3013 case CALL_INSN:
3014 case NOTE:
3015 case BARRIER:
3016 /* The chain of insns is not being copied. */
3017 return;
3019 default:
3020 break;
3023 /* This rtx may not be shared. If it has already been seen,
3024 replace it with a copy of itself. */
3026 if (RTX_FLAG (x, used))
3028 x = shallow_copy_rtx (x);
3029 copied = 1;
3031 RTX_FLAG (x, used) = 1;
3033 /* Now scan the subexpressions recursively.
3034 We can store any replaced subexpressions directly into X
3035 since we know X is not shared! Any vectors in X
3036 must be copied if X was copied. */
3038 format_ptr = GET_RTX_FORMAT (code);
3039 length = GET_RTX_LENGTH (code);
3040 last_ptr = NULL;
3042 for (i = 0; i < length; i++)
3044 switch (*format_ptr++)
3046 case 'e':
3047 if (last_ptr)
3048 copy_rtx_if_shared_1 (last_ptr);
3049 last_ptr = &XEXP (x, i);
3050 break;
3052 case 'E':
3053 if (XVEC (x, i) != NULL)
3055 int j;
3056 int len = XVECLEN (x, i);
3058 /* Copy the vector iff I copied the rtx and the length
3059 is nonzero. */
3060 if (copied && len > 0)
3061 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
3063 /* Call recursively on all inside the vector. */
3064 for (j = 0; j < len; j++)
3066 if (last_ptr)
3067 copy_rtx_if_shared_1 (last_ptr);
3068 last_ptr = &XVECEXP (x, i, j);
3071 break;
3074 *orig1 = x;
3075 if (last_ptr)
3077 orig1 = last_ptr;
3078 goto repeat;
3080 return;
3083 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
3085 static void
3086 mark_used_flags (rtx x, int flag)
3088 int i, j;
3089 enum rtx_code code;
3090 const char *format_ptr;
3091 int length;
3093 /* Repeat is used to turn tail-recursion into iteration. */
3094 repeat:
3095 if (x == 0)
3096 return;
3098 code = GET_CODE (x);
3100 /* These types may be freely shared so we needn't do any resetting
3101 for them. */
3103 switch (code)
3105 case REG:
3106 case DEBUG_EXPR:
3107 case VALUE:
3108 CASE_CONST_ANY:
3109 case SYMBOL_REF:
3110 case CODE_LABEL:
3111 case PC:
3112 case CC0:
3113 case RETURN:
3114 case SIMPLE_RETURN:
3115 return;
3117 case DEBUG_INSN:
3118 case INSN:
3119 case JUMP_INSN:
3120 case CALL_INSN:
3121 case NOTE:
3122 case LABEL_REF:
3123 case BARRIER:
3124 /* The chain of insns is not being copied. */
3125 return;
3127 default:
3128 break;
3131 RTX_FLAG (x, used) = flag;
3133 format_ptr = GET_RTX_FORMAT (code);
3134 length = GET_RTX_LENGTH (code);
3136 for (i = 0; i < length; i++)
3138 switch (*format_ptr++)
3140 case 'e':
3141 if (i == length-1)
3143 x = XEXP (x, i);
3144 goto repeat;
3146 mark_used_flags (XEXP (x, i), flag);
3147 break;
3149 case 'E':
3150 for (j = 0; j < XVECLEN (x, i); j++)
3151 mark_used_flags (XVECEXP (x, i, j), flag);
3152 break;
3157 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
3158 to look for shared sub-parts. */
3160 void
3161 reset_used_flags (rtx x)
3163 mark_used_flags (x, 0);
3166 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
3167 to look for shared sub-parts. */
3169 void
3170 set_used_flags (rtx x)
3172 mark_used_flags (x, 1);
3175 /* Copy X if necessary so that it won't be altered by changes in OTHER.
3176 Return X or the rtx for the pseudo reg the value of X was copied into.
3177 OTHER must be valid as a SET_DEST. */
3180 make_safe_from (rtx x, rtx other)
3182 while (1)
3183 switch (GET_CODE (other))
3185 case SUBREG:
3186 other = SUBREG_REG (other);
3187 break;
3188 case STRICT_LOW_PART:
3189 case SIGN_EXTEND:
3190 case ZERO_EXTEND:
3191 other = XEXP (other, 0);
3192 break;
3193 default:
3194 goto done;
3196 done:
3197 if ((MEM_P (other)
3198 && ! CONSTANT_P (x)
3199 && !REG_P (x)
3200 && GET_CODE (x) != SUBREG)
3201 || (REG_P (other)
3202 && (REGNO (other) < FIRST_PSEUDO_REGISTER
3203 || reg_mentioned_p (other, x))))
3205 rtx temp = gen_reg_rtx (GET_MODE (x));
3206 emit_move_insn (temp, x);
3207 return temp;
3209 return x;
3212 /* Emission of insns (adding them to the doubly-linked list). */
3214 /* Return the last insn emitted, even if it is in a sequence now pushed. */
3216 rtx_insn *
3217 get_last_insn_anywhere (void)
3219 struct sequence_stack *seq;
3220 for (seq = get_current_sequence (); seq; seq = seq->next)
3221 if (seq->last != 0)
3222 return seq->last;
3223 return 0;
3226 /* Return the first nonnote insn emitted in current sequence or current
3227 function. This routine looks inside SEQUENCEs. */
3229 rtx_insn *
3230 get_first_nonnote_insn (void)
3232 rtx_insn *insn = get_insns ();
3234 if (insn)
3236 if (NOTE_P (insn))
3237 for (insn = next_insn (insn);
3238 insn && NOTE_P (insn);
3239 insn = next_insn (insn))
3240 continue;
3241 else
3243 if (NONJUMP_INSN_P (insn)
3244 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3245 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3249 return insn;
3252 /* Return the last nonnote insn emitted in current sequence or current
3253 function. This routine looks inside SEQUENCEs. */
3255 rtx_insn *
3256 get_last_nonnote_insn (void)
3258 rtx_insn *insn = get_last_insn ();
3260 if (insn)
3262 if (NOTE_P (insn))
3263 for (insn = previous_insn (insn);
3264 insn && NOTE_P (insn);
3265 insn = previous_insn (insn))
3266 continue;
3267 else
3269 if (NONJUMP_INSN_P (insn))
3270 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3271 insn = seq->insn (seq->len () - 1);
3275 return insn;
3278 /* Return the number of actual (non-debug) insns emitted in this
3279 function. */
3282 get_max_insn_count (void)
3284 int n = cur_insn_uid;
3286 /* The table size must be stable across -g, to avoid codegen
3287 differences due to debug insns, and not be affected by
3288 -fmin-insn-uid, to avoid excessive table size and to simplify
3289 debugging of -fcompare-debug failures. */
3290 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3291 n -= cur_debug_insn_uid;
3292 else
3293 n -= MIN_NONDEBUG_INSN_UID;
3295 return n;
3299 /* Return the next insn. If it is a SEQUENCE, return the first insn
3300 of the sequence. */
3302 rtx_insn *
3303 next_insn (rtx_insn *insn)
3305 if (insn)
3307 insn = NEXT_INSN (insn);
3308 if (insn && NONJUMP_INSN_P (insn)
3309 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3310 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3313 return insn;
3316 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3317 of the sequence. */
3319 rtx_insn *
3320 previous_insn (rtx_insn *insn)
3322 if (insn)
3324 insn = PREV_INSN (insn);
3325 if (insn && NONJUMP_INSN_P (insn))
3326 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
3327 insn = seq->insn (seq->len () - 1);
3330 return insn;
3333 /* Return the next insn after INSN that is not a NOTE. This routine does not
3334 look inside SEQUENCEs. */
3336 rtx_insn *
3337 next_nonnote_insn (rtx_insn *insn)
3339 while (insn)
3341 insn = NEXT_INSN (insn);
3342 if (insn == 0 || !NOTE_P (insn))
3343 break;
3346 return insn;
3349 /* Return the next insn after INSN that is not a NOTE, but stop the
3350 search before we enter another basic block. This routine does not
3351 look inside SEQUENCEs. */
3353 rtx_insn *
3354 next_nonnote_insn_bb (rtx_insn *insn)
3356 while (insn)
3358 insn = NEXT_INSN (insn);
3359 if (insn == 0 || !NOTE_P (insn))
3360 break;
3361 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3362 return NULL;
3365 return insn;
3368 /* Return the previous insn before INSN that is not a NOTE. This routine does
3369 not look inside SEQUENCEs. */
3371 rtx_insn *
3372 prev_nonnote_insn (rtx_insn *insn)
3374 while (insn)
3376 insn = PREV_INSN (insn);
3377 if (insn == 0 || !NOTE_P (insn))
3378 break;
3381 return insn;
3384 /* Return the previous insn before INSN that is not a NOTE, but stop
3385 the search before we enter another basic block. This routine does
3386 not look inside SEQUENCEs. */
3388 rtx_insn *
3389 prev_nonnote_insn_bb (rtx_insn *insn)
3392 while (insn)
3394 insn = PREV_INSN (insn);
3395 if (insn == 0 || !NOTE_P (insn))
3396 break;
3397 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3398 return NULL;
3401 return insn;
3404 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3405 routine does not look inside SEQUENCEs. */
3407 rtx_insn *
3408 next_nondebug_insn (rtx_insn *insn)
3410 while (insn)
3412 insn = NEXT_INSN (insn);
3413 if (insn == 0 || !DEBUG_INSN_P (insn))
3414 break;
3417 return insn;
3420 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3421 This routine does not look inside SEQUENCEs. */
3423 rtx_insn *
3424 prev_nondebug_insn (rtx_insn *insn)
3426 while (insn)
3428 insn = PREV_INSN (insn);
3429 if (insn == 0 || !DEBUG_INSN_P (insn))
3430 break;
3433 return insn;
3436 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3437 This routine does not look inside SEQUENCEs. */
3439 rtx_insn *
3440 next_nonnote_nondebug_insn (rtx_insn *insn)
3442 while (insn)
3444 insn = NEXT_INSN (insn);
3445 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3446 break;
3449 return insn;
3452 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3453 This routine does not look inside SEQUENCEs. */
3455 rtx_insn *
3456 prev_nonnote_nondebug_insn (rtx_insn *insn)
3458 while (insn)
3460 insn = PREV_INSN (insn);
3461 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3462 break;
3465 return insn;
3468 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3469 or 0, if there is none. This routine does not look inside
3470 SEQUENCEs. */
3472 rtx_insn *
3473 next_real_insn (rtx uncast_insn)
3475 rtx_insn *insn = safe_as_a <rtx_insn *> (uncast_insn);
3477 while (insn)
3479 insn = NEXT_INSN (insn);
3480 if (insn == 0 || INSN_P (insn))
3481 break;
3484 return insn;
3487 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3488 or 0, if there is none. This routine does not look inside
3489 SEQUENCEs. */
3491 rtx_insn *
3492 prev_real_insn (rtx_insn *insn)
3494 while (insn)
3496 insn = PREV_INSN (insn);
3497 if (insn == 0 || INSN_P (insn))
3498 break;
3501 return insn;
3504 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3505 This routine does not look inside SEQUENCEs. */
3507 rtx_call_insn *
3508 last_call_insn (void)
3510 rtx_insn *insn;
3512 for (insn = get_last_insn ();
3513 insn && !CALL_P (insn);
3514 insn = PREV_INSN (insn))
3517 return safe_as_a <rtx_call_insn *> (insn);
3520 /* Find the next insn after INSN that really does something. This routine
3521 does not look inside SEQUENCEs. After reload this also skips over
3522 standalone USE and CLOBBER insn. */
3525 active_insn_p (const rtx_insn *insn)
3527 return (CALL_P (insn) || JUMP_P (insn)
3528 || JUMP_TABLE_DATA_P (insn) /* FIXME */
3529 || (NONJUMP_INSN_P (insn)
3530 && (! reload_completed
3531 || (GET_CODE (PATTERN (insn)) != USE
3532 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3535 rtx_insn *
3536 next_active_insn (rtx_insn *insn)
3538 while (insn)
3540 insn = NEXT_INSN (insn);
3541 if (insn == 0 || active_insn_p (insn))
3542 break;
3545 return insn;
3548 /* Find the last insn before INSN that really does something. This routine
3549 does not look inside SEQUENCEs. After reload this also skips over
3550 standalone USE and CLOBBER insn. */
3552 rtx_insn *
3553 prev_active_insn (rtx_insn *insn)
3555 while (insn)
3557 insn = PREV_INSN (insn);
3558 if (insn == 0 || active_insn_p (insn))
3559 break;
3562 return insn;
3565 /* Return the next insn that uses CC0 after INSN, which is assumed to
3566 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3567 applied to the result of this function should yield INSN).
3569 Normally, this is simply the next insn. However, if a REG_CC_USER note
3570 is present, it contains the insn that uses CC0.
3572 Return 0 if we can't find the insn. */
3574 rtx_insn *
3575 next_cc0_user (rtx_insn *insn)
3577 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3579 if (note)
3580 return safe_as_a <rtx_insn *> (XEXP (note, 0));
3582 insn = next_nonnote_insn (insn);
3583 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3584 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
3586 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3587 return insn;
3589 return 0;
3592 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3593 note, it is the previous insn. */
3595 rtx_insn *
3596 prev_cc0_setter (rtx_insn *insn)
3598 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3600 if (note)
3601 return safe_as_a <rtx_insn *> (XEXP (note, 0));
3603 insn = prev_nonnote_insn (insn);
3604 gcc_assert (sets_cc0_p (PATTERN (insn)));
3606 return insn;
3609 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3611 static int
3612 find_auto_inc (const_rtx x, const_rtx reg)
3614 subrtx_iterator::array_type array;
3615 FOR_EACH_SUBRTX (iter, array, x, NONCONST)
3617 const_rtx x = *iter;
3618 if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC
3619 && rtx_equal_p (reg, XEXP (x, 0)))
3620 return true;
3622 return false;
3625 /* Increment the label uses for all labels present in rtx. */
3627 static void
3628 mark_label_nuses (rtx x)
3630 enum rtx_code code;
3631 int i, j;
3632 const char *fmt;
3634 code = GET_CODE (x);
3635 if (code == LABEL_REF && LABEL_P (label_ref_label (x)))
3636 LABEL_NUSES (label_ref_label (x))++;
3638 fmt = GET_RTX_FORMAT (code);
3639 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3641 if (fmt[i] == 'e')
3642 mark_label_nuses (XEXP (x, i));
3643 else if (fmt[i] == 'E')
3644 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3645 mark_label_nuses (XVECEXP (x, i, j));
3650 /* Try splitting insns that can be split for better scheduling.
3651 PAT is the pattern which might split.
3652 TRIAL is the insn providing PAT.
3653 LAST is nonzero if we should return the last insn of the sequence produced.
3655 If this routine succeeds in splitting, it returns the first or last
3656 replacement insn depending on the value of LAST. Otherwise, it
3657 returns TRIAL. If the insn to be returned can be split, it will be. */
3659 rtx_insn *
3660 try_split (rtx pat, rtx_insn *trial, int last)
3662 rtx_insn *before, *after;
3663 rtx note;
3664 rtx_insn *seq, *tem;
3665 int probability;
3666 rtx_insn *insn_last, *insn;
3667 int njumps = 0;
3668 rtx_insn *call_insn = NULL;
3670 /* We're not good at redistributing frame information. */
3671 if (RTX_FRAME_RELATED_P (trial))
3672 return trial;
3674 if (any_condjump_p (trial)
3675 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3676 split_branch_probability = XINT (note, 0);
3677 probability = split_branch_probability;
3679 seq = split_insns (pat, trial);
3681 split_branch_probability = -1;
3683 if (!seq)
3684 return trial;
3686 /* Avoid infinite loop if any insn of the result matches
3687 the original pattern. */
3688 insn_last = seq;
3689 while (1)
3691 if (INSN_P (insn_last)
3692 && rtx_equal_p (PATTERN (insn_last), pat))
3693 return trial;
3694 if (!NEXT_INSN (insn_last))
3695 break;
3696 insn_last = NEXT_INSN (insn_last);
3699 /* We will be adding the new sequence to the function. The splitters
3700 may have introduced invalid RTL sharing, so unshare the sequence now. */
3701 unshare_all_rtl_in_chain (seq);
3703 /* Mark labels and copy flags. */
3704 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3706 if (JUMP_P (insn))
3708 if (JUMP_P (trial))
3709 CROSSING_JUMP_P (insn) = CROSSING_JUMP_P (trial);
3710 mark_jump_label (PATTERN (insn), insn, 0);
3711 njumps++;
3712 if (probability != -1
3713 && any_condjump_p (insn)
3714 && !find_reg_note (insn, REG_BR_PROB, 0))
3716 /* We can preserve the REG_BR_PROB notes only if exactly
3717 one jump is created, otherwise the machine description
3718 is responsible for this step using
3719 split_branch_probability variable. */
3720 gcc_assert (njumps == 1);
3721 add_int_reg_note (insn, REG_BR_PROB, probability);
3726 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3727 in SEQ and copy any additional information across. */
3728 if (CALL_P (trial))
3730 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3731 if (CALL_P (insn))
3733 rtx_insn *next;
3734 rtx *p;
3736 gcc_assert (call_insn == NULL_RTX);
3737 call_insn = insn;
3739 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3740 target may have explicitly specified. */
3741 p = &CALL_INSN_FUNCTION_USAGE (insn);
3742 while (*p)
3743 p = &XEXP (*p, 1);
3744 *p = CALL_INSN_FUNCTION_USAGE (trial);
3746 /* If the old call was a sibling call, the new one must
3747 be too. */
3748 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3750 /* If the new call is the last instruction in the sequence,
3751 it will effectively replace the old call in-situ. Otherwise
3752 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3753 so that it comes immediately after the new call. */
3754 if (NEXT_INSN (insn))
3755 for (next = NEXT_INSN (trial);
3756 next && NOTE_P (next);
3757 next = NEXT_INSN (next))
3758 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3760 remove_insn (next);
3761 add_insn_after (next, insn, NULL);
3762 break;
3767 /* Copy notes, particularly those related to the CFG. */
3768 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3770 switch (REG_NOTE_KIND (note))
3772 case REG_EH_REGION:
3773 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3774 break;
3776 case REG_NORETURN:
3777 case REG_SETJMP:
3778 case REG_TM:
3779 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3781 if (CALL_P (insn))
3782 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3784 break;
3786 case REG_NON_LOCAL_GOTO:
3787 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3789 if (JUMP_P (insn))
3790 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3792 break;
3794 case REG_INC:
3795 if (!AUTO_INC_DEC)
3796 break;
3798 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3800 rtx reg = XEXP (note, 0);
3801 if (!FIND_REG_INC_NOTE (insn, reg)
3802 && find_auto_inc (PATTERN (insn), reg))
3803 add_reg_note (insn, REG_INC, reg);
3805 break;
3807 case REG_ARGS_SIZE:
3808 fixup_args_size_notes (NULL, insn_last, INTVAL (XEXP (note, 0)));
3809 break;
3811 case REG_CALL_DECL:
3812 gcc_assert (call_insn != NULL_RTX);
3813 add_reg_note (call_insn, REG_NOTE_KIND (note), XEXP (note, 0));
3814 break;
3816 default:
3817 break;
3821 /* If there are LABELS inside the split insns increment the
3822 usage count so we don't delete the label. */
3823 if (INSN_P (trial))
3825 insn = insn_last;
3826 while (insn != NULL_RTX)
3828 /* JUMP_P insns have already been "marked" above. */
3829 if (NONJUMP_INSN_P (insn))
3830 mark_label_nuses (PATTERN (insn));
3832 insn = PREV_INSN (insn);
3836 before = PREV_INSN (trial);
3837 after = NEXT_INSN (trial);
3839 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATION (trial));
3841 delete_insn (trial);
3843 /* Recursively call try_split for each new insn created; by the
3844 time control returns here that insn will be fully split, so
3845 set LAST and continue from the insn after the one returned.
3846 We can't use next_active_insn here since AFTER may be a note.
3847 Ignore deleted insns, which can be occur if not optimizing. */
3848 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3849 if (! tem->deleted () && INSN_P (tem))
3850 tem = try_split (PATTERN (tem), tem, 1);
3852 /* Return either the first or the last insn, depending on which was
3853 requested. */
3854 return last
3855 ? (after ? PREV_INSN (after) : get_last_insn ())
3856 : NEXT_INSN (before);
3859 /* Make and return an INSN rtx, initializing all its slots.
3860 Store PATTERN in the pattern slots. */
3862 rtx_insn *
3863 make_insn_raw (rtx pattern)
3865 rtx_insn *insn;
3867 insn = as_a <rtx_insn *> (rtx_alloc (INSN));
3869 INSN_UID (insn) = cur_insn_uid++;
3870 PATTERN (insn) = pattern;
3871 INSN_CODE (insn) = -1;
3872 REG_NOTES (insn) = NULL;
3873 INSN_LOCATION (insn) = curr_insn_location ();
3874 BLOCK_FOR_INSN (insn) = NULL;
3876 #ifdef ENABLE_RTL_CHECKING
3877 if (insn
3878 && INSN_P (insn)
3879 && (returnjump_p (insn)
3880 || (GET_CODE (insn) == SET
3881 && SET_DEST (insn) == pc_rtx)))
3883 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3884 debug_rtx (insn);
3886 #endif
3888 return insn;
3891 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3893 static rtx_insn *
3894 make_debug_insn_raw (rtx pattern)
3896 rtx_debug_insn *insn;
3898 insn = as_a <rtx_debug_insn *> (rtx_alloc (DEBUG_INSN));
3899 INSN_UID (insn) = cur_debug_insn_uid++;
3900 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3901 INSN_UID (insn) = cur_insn_uid++;
3903 PATTERN (insn) = pattern;
3904 INSN_CODE (insn) = -1;
3905 REG_NOTES (insn) = NULL;
3906 INSN_LOCATION (insn) = curr_insn_location ();
3907 BLOCK_FOR_INSN (insn) = NULL;
3909 return insn;
3912 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3914 static rtx_insn *
3915 make_jump_insn_raw (rtx pattern)
3917 rtx_jump_insn *insn;
3919 insn = as_a <rtx_jump_insn *> (rtx_alloc (JUMP_INSN));
3920 INSN_UID (insn) = cur_insn_uid++;
3922 PATTERN (insn) = pattern;
3923 INSN_CODE (insn) = -1;
3924 REG_NOTES (insn) = NULL;
3925 JUMP_LABEL (insn) = NULL;
3926 INSN_LOCATION (insn) = curr_insn_location ();
3927 BLOCK_FOR_INSN (insn) = NULL;
3929 return insn;
3932 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3934 static rtx_insn *
3935 make_call_insn_raw (rtx pattern)
3937 rtx_call_insn *insn;
3939 insn = as_a <rtx_call_insn *> (rtx_alloc (CALL_INSN));
3940 INSN_UID (insn) = cur_insn_uid++;
3942 PATTERN (insn) = pattern;
3943 INSN_CODE (insn) = -1;
3944 REG_NOTES (insn) = NULL;
3945 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3946 INSN_LOCATION (insn) = curr_insn_location ();
3947 BLOCK_FOR_INSN (insn) = NULL;
3949 return insn;
3952 /* Like `make_insn_raw' but make a NOTE instead of an insn. */
3954 static rtx_note *
3955 make_note_raw (enum insn_note subtype)
3957 /* Some notes are never created this way at all. These notes are
3958 only created by patching out insns. */
3959 gcc_assert (subtype != NOTE_INSN_DELETED_LABEL
3960 && subtype != NOTE_INSN_DELETED_DEBUG_LABEL);
3962 rtx_note *note = as_a <rtx_note *> (rtx_alloc (NOTE));
3963 INSN_UID (note) = cur_insn_uid++;
3964 NOTE_KIND (note) = subtype;
3965 BLOCK_FOR_INSN (note) = NULL;
3966 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
3967 return note;
3970 /* Add INSN to the end of the doubly-linked list, between PREV and NEXT.
3971 INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects,
3972 but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL. */
3974 static inline void
3975 link_insn_into_chain (rtx_insn *insn, rtx_insn *prev, rtx_insn *next)
3977 SET_PREV_INSN (insn) = prev;
3978 SET_NEXT_INSN (insn) = next;
3979 if (prev != NULL)
3981 SET_NEXT_INSN (prev) = insn;
3982 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3984 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
3985 SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = insn;
3988 if (next != NULL)
3990 SET_PREV_INSN (next) = insn;
3991 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3993 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
3994 SET_PREV_INSN (sequence->insn (0)) = insn;
3998 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
4000 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (insn));
4001 SET_PREV_INSN (sequence->insn (0)) = prev;
4002 SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4006 /* Add INSN to the end of the doubly-linked list.
4007 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
4009 void
4010 add_insn (rtx_insn *insn)
4012 rtx_insn *prev = get_last_insn ();
4013 link_insn_into_chain (insn, prev, NULL);
4014 if (NULL == get_insns ())
4015 set_first_insn (insn);
4016 set_last_insn (insn);
4019 /* Add INSN into the doubly-linked list after insn AFTER. */
4021 static void
4022 add_insn_after_nobb (rtx_insn *insn, rtx_insn *after)
4024 rtx_insn *next = NEXT_INSN (after);
4026 gcc_assert (!optimize || !after->deleted ());
4028 link_insn_into_chain (insn, after, next);
4030 if (next == NULL)
4032 struct sequence_stack *seq;
4034 for (seq = get_current_sequence (); seq; seq = seq->next)
4035 if (after == seq->last)
4037 seq->last = insn;
4038 break;
4043 /* Add INSN into the doubly-linked list before insn BEFORE. */
4045 static void
4046 add_insn_before_nobb (rtx_insn *insn, rtx_insn *before)
4048 rtx_insn *prev = PREV_INSN (before);
4050 gcc_assert (!optimize || !before->deleted ());
4052 link_insn_into_chain (insn, prev, before);
4054 if (prev == NULL)
4056 struct sequence_stack *seq;
4058 for (seq = get_current_sequence (); seq; seq = seq->next)
4059 if (before == seq->first)
4061 seq->first = insn;
4062 break;
4065 gcc_assert (seq);
4069 /* Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN.
4070 If BB is NULL, an attempt is made to infer the bb from before.
4072 This and the next function should be the only functions called
4073 to insert an insn once delay slots have been filled since only
4074 they know how to update a SEQUENCE. */
4076 void
4077 add_insn_after (rtx uncast_insn, rtx uncast_after, basic_block bb)
4079 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
4080 rtx_insn *after = as_a <rtx_insn *> (uncast_after);
4081 add_insn_after_nobb (insn, after);
4082 if (!BARRIER_P (after)
4083 && !BARRIER_P (insn)
4084 && (bb = BLOCK_FOR_INSN (after)))
4086 set_block_for_insn (insn, bb);
4087 if (INSN_P (insn))
4088 df_insn_rescan (insn);
4089 /* Should not happen as first in the BB is always
4090 either NOTE or LABEL. */
4091 if (BB_END (bb) == after
4092 /* Avoid clobbering of structure when creating new BB. */
4093 && !BARRIER_P (insn)
4094 && !NOTE_INSN_BASIC_BLOCK_P (insn))
4095 BB_END (bb) = insn;
4099 /* Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN.
4100 If BB is NULL, an attempt is made to infer the bb from before.
4102 This and the previous function should be the only functions called
4103 to insert an insn once delay slots have been filled since only
4104 they know how to update a SEQUENCE. */
4106 void
4107 add_insn_before (rtx uncast_insn, rtx uncast_before, basic_block bb)
4109 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
4110 rtx_insn *before = as_a <rtx_insn *> (uncast_before);
4111 add_insn_before_nobb (insn, before);
4113 if (!bb
4114 && !BARRIER_P (before)
4115 && !BARRIER_P (insn))
4116 bb = BLOCK_FOR_INSN (before);
4118 if (bb)
4120 set_block_for_insn (insn, bb);
4121 if (INSN_P (insn))
4122 df_insn_rescan (insn);
4123 /* Should not happen as first in the BB is always either NOTE or
4124 LABEL. */
4125 gcc_assert (BB_HEAD (bb) != insn
4126 /* Avoid clobbering of structure when creating new BB. */
4127 || BARRIER_P (insn)
4128 || NOTE_INSN_BASIC_BLOCK_P (insn));
4132 /* Replace insn with an deleted instruction note. */
4134 void
4135 set_insn_deleted (rtx insn)
4137 if (INSN_P (insn))
4138 df_insn_delete (as_a <rtx_insn *> (insn));
4139 PUT_CODE (insn, NOTE);
4140 NOTE_KIND (insn) = NOTE_INSN_DELETED;
4144 /* Unlink INSN from the insn chain.
4146 This function knows how to handle sequences.
4148 This function does not invalidate data flow information associated with
4149 INSN (i.e. does not call df_insn_delete). That makes this function
4150 usable for only disconnecting an insn from the chain, and re-emit it
4151 elsewhere later.
4153 To later insert INSN elsewhere in the insn chain via add_insn and
4154 similar functions, PREV_INSN and NEXT_INSN must be nullified by
4155 the caller. Nullifying them here breaks many insn chain walks.
4157 To really delete an insn and related DF information, use delete_insn. */
4159 void
4160 remove_insn (rtx uncast_insn)
4162 rtx_insn *insn = as_a <rtx_insn *> (uncast_insn);
4163 rtx_insn *next = NEXT_INSN (insn);
4164 rtx_insn *prev = PREV_INSN (insn);
4165 basic_block bb;
4167 if (prev)
4169 SET_NEXT_INSN (prev) = next;
4170 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
4172 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (prev));
4173 SET_NEXT_INSN (sequence->insn (sequence->len () - 1)) = next;
4176 else
4178 struct sequence_stack *seq;
4180 for (seq = get_current_sequence (); seq; seq = seq->next)
4181 if (insn == seq->first)
4183 seq->first = next;
4184 break;
4187 gcc_assert (seq);
4190 if (next)
4192 SET_PREV_INSN (next) = prev;
4193 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
4195 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (next));
4196 SET_PREV_INSN (sequence->insn (0)) = prev;
4199 else
4201 struct sequence_stack *seq;
4203 for (seq = get_current_sequence (); seq; seq = seq->next)
4204 if (insn == seq->last)
4206 seq->last = prev;
4207 break;
4210 gcc_assert (seq);
4213 /* Fix up basic block boundaries, if necessary. */
4214 if (!BARRIER_P (insn)
4215 && (bb = BLOCK_FOR_INSN (insn)))
4217 if (BB_HEAD (bb) == insn)
4219 /* Never ever delete the basic block note without deleting whole
4220 basic block. */
4221 gcc_assert (!NOTE_P (insn));
4222 BB_HEAD (bb) = next;
4224 if (BB_END (bb) == insn)
4225 BB_END (bb) = prev;
4229 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4231 void
4232 add_function_usage_to (rtx call_insn, rtx call_fusage)
4234 gcc_assert (call_insn && CALL_P (call_insn));
4236 /* Put the register usage information on the CALL. If there is already
4237 some usage information, put ours at the end. */
4238 if (CALL_INSN_FUNCTION_USAGE (call_insn))
4240 rtx link;
4242 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4243 link = XEXP (link, 1))
4246 XEXP (link, 1) = call_fusage;
4248 else
4249 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4252 /* Delete all insns made since FROM.
4253 FROM becomes the new last instruction. */
4255 void
4256 delete_insns_since (rtx_insn *from)
4258 if (from == 0)
4259 set_first_insn (0);
4260 else
4261 SET_NEXT_INSN (from) = 0;
4262 set_last_insn (from);
4265 /* This function is deprecated, please use sequences instead.
4267 Move a consecutive bunch of insns to a different place in the chain.
4268 The insns to be moved are those between FROM and TO.
4269 They are moved to a new position after the insn AFTER.
4270 AFTER must not be FROM or TO or any insn in between.
4272 This function does not know about SEQUENCEs and hence should not be
4273 called after delay-slot filling has been done. */
4275 void
4276 reorder_insns_nobb (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4278 if (flag_checking)
4280 for (rtx_insn *x = from; x != to; x = NEXT_INSN (x))
4281 gcc_assert (after != x);
4282 gcc_assert (after != to);
4285 /* Splice this bunch out of where it is now. */
4286 if (PREV_INSN (from))
4287 SET_NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4288 if (NEXT_INSN (to))
4289 SET_PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4290 if (get_last_insn () == to)
4291 set_last_insn (PREV_INSN (from));
4292 if (get_insns () == from)
4293 set_first_insn (NEXT_INSN (to));
4295 /* Make the new neighbors point to it and it to them. */
4296 if (NEXT_INSN (after))
4297 SET_PREV_INSN (NEXT_INSN (after)) = to;
4299 SET_NEXT_INSN (to) = NEXT_INSN (after);
4300 SET_PREV_INSN (from) = after;
4301 SET_NEXT_INSN (after) = from;
4302 if (after == get_last_insn ())
4303 set_last_insn (to);
4306 /* Same as function above, but take care to update BB boundaries. */
4307 void
4308 reorder_insns (rtx_insn *from, rtx_insn *to, rtx_insn *after)
4310 rtx_insn *prev = PREV_INSN (from);
4311 basic_block bb, bb2;
4313 reorder_insns_nobb (from, to, after);
4315 if (!BARRIER_P (after)
4316 && (bb = BLOCK_FOR_INSN (after)))
4318 rtx_insn *x;
4319 df_set_bb_dirty (bb);
4321 if (!BARRIER_P (from)
4322 && (bb2 = BLOCK_FOR_INSN (from)))
4324 if (BB_END (bb2) == to)
4325 BB_END (bb2) = prev;
4326 df_set_bb_dirty (bb2);
4329 if (BB_END (bb) == after)
4330 BB_END (bb) = to;
4332 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4333 if (!BARRIER_P (x))
4334 df_insn_change_bb (x, bb);
4339 /* Emit insn(s) of given code and pattern
4340 at a specified place within the doubly-linked list.
4342 All of the emit_foo global entry points accept an object
4343 X which is either an insn list or a PATTERN of a single
4344 instruction.
4346 There are thus a few canonical ways to generate code and
4347 emit it at a specific place in the instruction stream. For
4348 example, consider the instruction named SPOT and the fact that
4349 we would like to emit some instructions before SPOT. We might
4350 do it like this:
4352 start_sequence ();
4353 ... emit the new instructions ...
4354 insns_head = get_insns ();
4355 end_sequence ();
4357 emit_insn_before (insns_head, SPOT);
4359 It used to be common to generate SEQUENCE rtl instead, but that
4360 is a relic of the past which no longer occurs. The reason is that
4361 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4362 generated would almost certainly die right after it was created. */
4364 static rtx_insn *
4365 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4366 rtx_insn *(*make_raw) (rtx))
4368 rtx_insn *insn;
4370 gcc_assert (before);
4372 if (x == NULL_RTX)
4373 return safe_as_a <rtx_insn *> (last);
4375 switch (GET_CODE (x))
4377 case DEBUG_INSN:
4378 case INSN:
4379 case JUMP_INSN:
4380 case CALL_INSN:
4381 case CODE_LABEL:
4382 case BARRIER:
4383 case NOTE:
4384 insn = as_a <rtx_insn *> (x);
4385 while (insn)
4387 rtx_insn *next = NEXT_INSN (insn);
4388 add_insn_before (insn, before, bb);
4389 last = insn;
4390 insn = next;
4392 break;
4394 #ifdef ENABLE_RTL_CHECKING
4395 case SEQUENCE:
4396 gcc_unreachable ();
4397 break;
4398 #endif
4400 default:
4401 last = (*make_raw) (x);
4402 add_insn_before (last, before, bb);
4403 break;
4406 return safe_as_a <rtx_insn *> (last);
4409 /* Make X be output before the instruction BEFORE. */
4411 rtx_insn *
4412 emit_insn_before_noloc (rtx x, rtx_insn *before, basic_block bb)
4414 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4417 /* Make an instruction with body X and code JUMP_INSN
4418 and output it before the instruction BEFORE. */
4420 rtx_jump_insn *
4421 emit_jump_insn_before_noloc (rtx x, rtx_insn *before)
4423 return as_a <rtx_jump_insn *> (
4424 emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4425 make_jump_insn_raw));
4428 /* Make an instruction with body X and code CALL_INSN
4429 and output it before the instruction BEFORE. */
4431 rtx_insn *
4432 emit_call_insn_before_noloc (rtx x, rtx_insn *before)
4434 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4435 make_call_insn_raw);
4438 /* Make an instruction with body X and code DEBUG_INSN
4439 and output it before the instruction BEFORE. */
4441 rtx_insn *
4442 emit_debug_insn_before_noloc (rtx x, rtx before)
4444 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4445 make_debug_insn_raw);
4448 /* Make an insn of code BARRIER
4449 and output it before the insn BEFORE. */
4451 rtx_barrier *
4452 emit_barrier_before (rtx before)
4454 rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4456 INSN_UID (insn) = cur_insn_uid++;
4458 add_insn_before (insn, before, NULL);
4459 return insn;
4462 /* Emit the label LABEL before the insn BEFORE. */
4464 rtx_code_label *
4465 emit_label_before (rtx label, rtx_insn *before)
4467 gcc_checking_assert (INSN_UID (label) == 0);
4468 INSN_UID (label) = cur_insn_uid++;
4469 add_insn_before (label, before, NULL);
4470 return as_a <rtx_code_label *> (label);
4473 /* Helper for emit_insn_after, handles lists of instructions
4474 efficiently. */
4476 static rtx_insn *
4477 emit_insn_after_1 (rtx_insn *first, rtx uncast_after, basic_block bb)
4479 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4480 rtx_insn *last;
4481 rtx_insn *after_after;
4482 if (!bb && !BARRIER_P (after))
4483 bb = BLOCK_FOR_INSN (after);
4485 if (bb)
4487 df_set_bb_dirty (bb);
4488 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4489 if (!BARRIER_P (last))
4491 set_block_for_insn (last, bb);
4492 df_insn_rescan (last);
4494 if (!BARRIER_P (last))
4496 set_block_for_insn (last, bb);
4497 df_insn_rescan (last);
4499 if (BB_END (bb) == after)
4500 BB_END (bb) = last;
4502 else
4503 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4504 continue;
4506 after_after = NEXT_INSN (after);
4508 SET_NEXT_INSN (after) = first;
4509 SET_PREV_INSN (first) = after;
4510 SET_NEXT_INSN (last) = after_after;
4511 if (after_after)
4512 SET_PREV_INSN (after_after) = last;
4514 if (after == get_last_insn ())
4515 set_last_insn (last);
4517 return last;
4520 static rtx_insn *
4521 emit_pattern_after_noloc (rtx x, rtx uncast_after, basic_block bb,
4522 rtx_insn *(*make_raw)(rtx))
4524 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4525 rtx_insn *last = after;
4527 gcc_assert (after);
4529 if (x == NULL_RTX)
4530 return last;
4532 switch (GET_CODE (x))
4534 case DEBUG_INSN:
4535 case INSN:
4536 case JUMP_INSN:
4537 case CALL_INSN:
4538 case CODE_LABEL:
4539 case BARRIER:
4540 case NOTE:
4541 last = emit_insn_after_1 (as_a <rtx_insn *> (x), after, bb);
4542 break;
4544 #ifdef ENABLE_RTL_CHECKING
4545 case SEQUENCE:
4546 gcc_unreachable ();
4547 break;
4548 #endif
4550 default:
4551 last = (*make_raw) (x);
4552 add_insn_after (last, after, bb);
4553 break;
4556 return last;
4559 /* Make X be output after the insn AFTER and set the BB of insn. If
4560 BB is NULL, an attempt is made to infer the BB from AFTER. */
4562 rtx_insn *
4563 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4565 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4569 /* Make an insn of code JUMP_INSN with body X
4570 and output it after the insn AFTER. */
4572 rtx_jump_insn *
4573 emit_jump_insn_after_noloc (rtx x, rtx after)
4575 return as_a <rtx_jump_insn *> (
4576 emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw));
4579 /* Make an instruction with body X and code CALL_INSN
4580 and output it after the instruction AFTER. */
4582 rtx_insn *
4583 emit_call_insn_after_noloc (rtx x, rtx after)
4585 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4588 /* Make an instruction with body X and code CALL_INSN
4589 and output it after the instruction AFTER. */
4591 rtx_insn *
4592 emit_debug_insn_after_noloc (rtx x, rtx after)
4594 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4597 /* Make an insn of code BARRIER
4598 and output it after the insn AFTER. */
4600 rtx_barrier *
4601 emit_barrier_after (rtx after)
4603 rtx_barrier *insn = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
4605 INSN_UID (insn) = cur_insn_uid++;
4607 add_insn_after (insn, after, NULL);
4608 return insn;
4611 /* Emit the label LABEL after the insn AFTER. */
4613 rtx_insn *
4614 emit_label_after (rtx label, rtx_insn *after)
4616 gcc_checking_assert (INSN_UID (label) == 0);
4617 INSN_UID (label) = cur_insn_uid++;
4618 add_insn_after (label, after, NULL);
4619 return as_a <rtx_insn *> (label);
4622 /* Notes require a bit of special handling: Some notes need to have their
4623 BLOCK_FOR_INSN set, others should never have it set, and some should
4624 have it set or clear depending on the context. */
4626 /* Return true iff a note of kind SUBTYPE should be emitted with routines
4627 that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the
4628 caller is asked to emit a note before BB_HEAD, or after BB_END. */
4630 static bool
4631 note_outside_basic_block_p (enum insn_note subtype, bool on_bb_boundary_p)
4633 switch (subtype)
4635 /* NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks. */
4636 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
4637 return true;
4639 /* Notes for var tracking and EH region markers can appear between or
4640 inside basic blocks. If the caller is emitting on the basic block
4641 boundary, do not set BLOCK_FOR_INSN on the new note. */
4642 case NOTE_INSN_VAR_LOCATION:
4643 case NOTE_INSN_CALL_ARG_LOCATION:
4644 case NOTE_INSN_EH_REGION_BEG:
4645 case NOTE_INSN_EH_REGION_END:
4646 return on_bb_boundary_p;
4648 /* Otherwise, BLOCK_FOR_INSN must be set. */
4649 default:
4650 return false;
4654 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4656 rtx_note *
4657 emit_note_after (enum insn_note subtype, rtx_insn *after)
4659 rtx_note *note = make_note_raw (subtype);
4660 basic_block bb = BARRIER_P (after) ? NULL : BLOCK_FOR_INSN (after);
4661 bool on_bb_boundary_p = (bb != NULL && BB_END (bb) == after);
4663 if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4664 add_insn_after_nobb (note, after);
4665 else
4666 add_insn_after (note, after, bb);
4667 return note;
4670 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4672 rtx_note *
4673 emit_note_before (enum insn_note subtype, rtx_insn *before)
4675 rtx_note *note = make_note_raw (subtype);
4676 basic_block bb = BARRIER_P (before) ? NULL : BLOCK_FOR_INSN (before);
4677 bool on_bb_boundary_p = (bb != NULL && BB_HEAD (bb) == before);
4679 if (note_outside_basic_block_p (subtype, on_bb_boundary_p))
4680 add_insn_before_nobb (note, before);
4681 else
4682 add_insn_before (note, before, bb);
4683 return note;
4686 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4687 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4689 static rtx_insn *
4690 emit_pattern_after_setloc (rtx pattern, rtx uncast_after, int loc,
4691 rtx_insn *(*make_raw) (rtx))
4693 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4694 rtx_insn *last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4696 if (pattern == NULL_RTX || !loc)
4697 return last;
4699 after = NEXT_INSN (after);
4700 while (1)
4702 if (active_insn_p (after)
4703 && !JUMP_TABLE_DATA_P (after) /* FIXME */
4704 && !INSN_LOCATION (after))
4705 INSN_LOCATION (after) = loc;
4706 if (after == last)
4707 break;
4708 after = NEXT_INSN (after);
4710 return last;
4713 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4714 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4715 any DEBUG_INSNs. */
4717 static rtx_insn *
4718 emit_pattern_after (rtx pattern, rtx uncast_after, bool skip_debug_insns,
4719 rtx_insn *(*make_raw) (rtx))
4721 rtx_insn *after = safe_as_a <rtx_insn *> (uncast_after);
4722 rtx_insn *prev = after;
4724 if (skip_debug_insns)
4725 while (DEBUG_INSN_P (prev))
4726 prev = PREV_INSN (prev);
4728 if (INSN_P (prev))
4729 return emit_pattern_after_setloc (pattern, after, INSN_LOCATION (prev),
4730 make_raw);
4731 else
4732 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4735 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4736 rtx_insn *
4737 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4739 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4742 /* Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4743 rtx_insn *
4744 emit_insn_after (rtx pattern, rtx after)
4746 return emit_pattern_after (pattern, after, true, make_insn_raw);
4749 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4750 rtx_jump_insn *
4751 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4753 return as_a <rtx_jump_insn *> (
4754 emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw));
4757 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4758 rtx_jump_insn *
4759 emit_jump_insn_after (rtx pattern, rtx after)
4761 return as_a <rtx_jump_insn *> (
4762 emit_pattern_after (pattern, after, true, make_jump_insn_raw));
4765 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4766 rtx_insn *
4767 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4769 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4772 /* Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4773 rtx_insn *
4774 emit_call_insn_after (rtx pattern, rtx after)
4776 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4779 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC. */
4780 rtx_insn *
4781 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4783 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4786 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER. */
4787 rtx_insn *
4788 emit_debug_insn_after (rtx pattern, rtx after)
4790 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4793 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4794 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4795 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4796 CALL_INSN, etc. */
4798 static rtx_insn *
4799 emit_pattern_before_setloc (rtx pattern, rtx uncast_before, int loc, bool insnp,
4800 rtx_insn *(*make_raw) (rtx))
4802 rtx_insn *before = as_a <rtx_insn *> (uncast_before);
4803 rtx_insn *first = PREV_INSN (before);
4804 rtx_insn *last = emit_pattern_before_noloc (pattern, before,
4805 insnp ? before : NULL_RTX,
4806 NULL, make_raw);
4808 if (pattern == NULL_RTX || !loc)
4809 return last;
4811 if (!first)
4812 first = get_insns ();
4813 else
4814 first = NEXT_INSN (first);
4815 while (1)
4817 if (active_insn_p (first)
4818 && !JUMP_TABLE_DATA_P (first) /* FIXME */
4819 && !INSN_LOCATION (first))
4820 INSN_LOCATION (first) = loc;
4821 if (first == last)
4822 break;
4823 first = NEXT_INSN (first);
4825 return last;
4828 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4829 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4830 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4831 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4833 static rtx_insn *
4834 emit_pattern_before (rtx pattern, rtx uncast_before, bool skip_debug_insns,
4835 bool insnp, rtx_insn *(*make_raw) (rtx))
4837 rtx_insn *before = safe_as_a <rtx_insn *> (uncast_before);
4838 rtx_insn *next = before;
4840 if (skip_debug_insns)
4841 while (DEBUG_INSN_P (next))
4842 next = PREV_INSN (next);
4844 if (INSN_P (next))
4845 return emit_pattern_before_setloc (pattern, before, INSN_LOCATION (next),
4846 insnp, make_raw);
4847 else
4848 return emit_pattern_before_noloc (pattern, before,
4849 insnp ? before : NULL_RTX,
4850 NULL, make_raw);
4853 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4854 rtx_insn *
4855 emit_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
4857 return emit_pattern_before_setloc (pattern, before, loc, true,
4858 make_insn_raw);
4861 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4862 rtx_insn *
4863 emit_insn_before (rtx pattern, rtx before)
4865 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4868 /* like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4869 rtx_jump_insn *
4870 emit_jump_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
4872 return as_a <rtx_jump_insn *> (
4873 emit_pattern_before_setloc (pattern, before, loc, false,
4874 make_jump_insn_raw));
4877 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE. */
4878 rtx_jump_insn *
4879 emit_jump_insn_before (rtx pattern, rtx before)
4881 return as_a <rtx_jump_insn *> (
4882 emit_pattern_before (pattern, before, true, false,
4883 make_jump_insn_raw));
4886 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4887 rtx_insn *
4888 emit_call_insn_before_setloc (rtx pattern, rtx_insn *before, int loc)
4890 return emit_pattern_before_setloc (pattern, before, loc, false,
4891 make_call_insn_raw);
4894 /* Like emit_call_insn_before_noloc,
4895 but set insn_location according to BEFORE. */
4896 rtx_insn *
4897 emit_call_insn_before (rtx pattern, rtx_insn *before)
4899 return emit_pattern_before (pattern, before, true, false,
4900 make_call_insn_raw);
4903 /* Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC. */
4904 rtx_insn *
4905 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4907 return emit_pattern_before_setloc (pattern, before, loc, false,
4908 make_debug_insn_raw);
4911 /* Like emit_debug_insn_before_noloc,
4912 but set insn_location according to BEFORE. */
4913 rtx_insn *
4914 emit_debug_insn_before (rtx pattern, rtx_insn *before)
4916 return emit_pattern_before (pattern, before, false, false,
4917 make_debug_insn_raw);
4920 /* Take X and emit it at the end of the doubly-linked
4921 INSN list.
4923 Returns the last insn emitted. */
4925 rtx_insn *
4926 emit_insn (rtx x)
4928 rtx_insn *last = get_last_insn ();
4929 rtx_insn *insn;
4931 if (x == NULL_RTX)
4932 return last;
4934 switch (GET_CODE (x))
4936 case DEBUG_INSN:
4937 case INSN:
4938 case JUMP_INSN:
4939 case CALL_INSN:
4940 case CODE_LABEL:
4941 case BARRIER:
4942 case NOTE:
4943 insn = as_a <rtx_insn *> (x);
4944 while (insn)
4946 rtx_insn *next = NEXT_INSN (insn);
4947 add_insn (insn);
4948 last = insn;
4949 insn = next;
4951 break;
4953 #ifdef ENABLE_RTL_CHECKING
4954 case JUMP_TABLE_DATA:
4955 case SEQUENCE:
4956 gcc_unreachable ();
4957 break;
4958 #endif
4960 default:
4961 last = make_insn_raw (x);
4962 add_insn (last);
4963 break;
4966 return last;
4969 /* Make an insn of code DEBUG_INSN with pattern X
4970 and add it to the end of the doubly-linked list. */
4972 rtx_insn *
4973 emit_debug_insn (rtx x)
4975 rtx_insn *last = get_last_insn ();
4976 rtx_insn *insn;
4978 if (x == NULL_RTX)
4979 return last;
4981 switch (GET_CODE (x))
4983 case DEBUG_INSN:
4984 case INSN:
4985 case JUMP_INSN:
4986 case CALL_INSN:
4987 case CODE_LABEL:
4988 case BARRIER:
4989 case NOTE:
4990 insn = as_a <rtx_insn *> (x);
4991 while (insn)
4993 rtx_insn *next = NEXT_INSN (insn);
4994 add_insn (insn);
4995 last = insn;
4996 insn = next;
4998 break;
5000 #ifdef ENABLE_RTL_CHECKING
5001 case JUMP_TABLE_DATA:
5002 case SEQUENCE:
5003 gcc_unreachable ();
5004 break;
5005 #endif
5007 default:
5008 last = make_debug_insn_raw (x);
5009 add_insn (last);
5010 break;
5013 return last;
5016 /* Make an insn of code JUMP_INSN with pattern X
5017 and add it to the end of the doubly-linked list. */
5019 rtx_insn *
5020 emit_jump_insn (rtx x)
5022 rtx_insn *last = NULL;
5023 rtx_insn *insn;
5025 switch (GET_CODE (x))
5027 case DEBUG_INSN:
5028 case INSN:
5029 case JUMP_INSN:
5030 case CALL_INSN:
5031 case CODE_LABEL:
5032 case BARRIER:
5033 case NOTE:
5034 insn = as_a <rtx_insn *> (x);
5035 while (insn)
5037 rtx_insn *next = NEXT_INSN (insn);
5038 add_insn (insn);
5039 last = insn;
5040 insn = next;
5042 break;
5044 #ifdef ENABLE_RTL_CHECKING
5045 case JUMP_TABLE_DATA:
5046 case SEQUENCE:
5047 gcc_unreachable ();
5048 break;
5049 #endif
5051 default:
5052 last = make_jump_insn_raw (x);
5053 add_insn (last);
5054 break;
5057 return last;
5060 /* Make an insn of code CALL_INSN with pattern X
5061 and add it to the end of the doubly-linked list. */
5063 rtx_insn *
5064 emit_call_insn (rtx x)
5066 rtx_insn *insn;
5068 switch (GET_CODE (x))
5070 case DEBUG_INSN:
5071 case INSN:
5072 case JUMP_INSN:
5073 case CALL_INSN:
5074 case CODE_LABEL:
5075 case BARRIER:
5076 case NOTE:
5077 insn = emit_insn (x);
5078 break;
5080 #ifdef ENABLE_RTL_CHECKING
5081 case SEQUENCE:
5082 case JUMP_TABLE_DATA:
5083 gcc_unreachable ();
5084 break;
5085 #endif
5087 default:
5088 insn = make_call_insn_raw (x);
5089 add_insn (insn);
5090 break;
5093 return insn;
5096 /* Add the label LABEL to the end of the doubly-linked list. */
5098 rtx_code_label *
5099 emit_label (rtx uncast_label)
5101 rtx_code_label *label = as_a <rtx_code_label *> (uncast_label);
5103 gcc_checking_assert (INSN_UID (label) == 0);
5104 INSN_UID (label) = cur_insn_uid++;
5105 add_insn (label);
5106 return label;
5109 /* Make an insn of code JUMP_TABLE_DATA
5110 and add it to the end of the doubly-linked list. */
5112 rtx_jump_table_data *
5113 emit_jump_table_data (rtx table)
5115 rtx_jump_table_data *jump_table_data =
5116 as_a <rtx_jump_table_data *> (rtx_alloc (JUMP_TABLE_DATA));
5117 INSN_UID (jump_table_data) = cur_insn_uid++;
5118 PATTERN (jump_table_data) = table;
5119 BLOCK_FOR_INSN (jump_table_data) = NULL;
5120 add_insn (jump_table_data);
5121 return jump_table_data;
5124 /* Make an insn of code BARRIER
5125 and add it to the end of the doubly-linked list. */
5127 rtx_barrier *
5128 emit_barrier (void)
5130 rtx_barrier *barrier = as_a <rtx_barrier *> (rtx_alloc (BARRIER));
5131 INSN_UID (barrier) = cur_insn_uid++;
5132 add_insn (barrier);
5133 return barrier;
5136 /* Emit a copy of note ORIG. */
5138 rtx_note *
5139 emit_note_copy (rtx_note *orig)
5141 enum insn_note kind = (enum insn_note) NOTE_KIND (orig);
5142 rtx_note *note = make_note_raw (kind);
5143 NOTE_DATA (note) = NOTE_DATA (orig);
5144 add_insn (note);
5145 return note;
5148 /* Make an insn of code NOTE or type NOTE_NO
5149 and add it to the end of the doubly-linked list. */
5151 rtx_note *
5152 emit_note (enum insn_note kind)
5154 rtx_note *note = make_note_raw (kind);
5155 add_insn (note);
5156 return note;
5159 /* Emit a clobber of lvalue X. */
5161 rtx_insn *
5162 emit_clobber (rtx x)
5164 /* CONCATs should not appear in the insn stream. */
5165 if (GET_CODE (x) == CONCAT)
5167 emit_clobber (XEXP (x, 0));
5168 return emit_clobber (XEXP (x, 1));
5170 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5173 /* Return a sequence of insns to clobber lvalue X. */
5175 rtx_insn *
5176 gen_clobber (rtx x)
5178 rtx_insn *seq;
5180 start_sequence ();
5181 emit_clobber (x);
5182 seq = get_insns ();
5183 end_sequence ();
5184 return seq;
5187 /* Emit a use of rvalue X. */
5189 rtx_insn *
5190 emit_use (rtx x)
5192 /* CONCATs should not appear in the insn stream. */
5193 if (GET_CODE (x) == CONCAT)
5195 emit_use (XEXP (x, 0));
5196 return emit_use (XEXP (x, 1));
5198 return emit_insn (gen_rtx_USE (VOIDmode, x));
5201 /* Return a sequence of insns to use rvalue X. */
5203 rtx_insn *
5204 gen_use (rtx x)
5206 rtx_insn *seq;
5208 start_sequence ();
5209 emit_use (x);
5210 seq = get_insns ();
5211 end_sequence ();
5212 return seq;
5215 /* Notes like REG_EQUAL and REG_EQUIV refer to a set in an instruction.
5216 Return the set in INSN that such notes describe, or NULL if the notes
5217 have no meaning for INSN. */
5220 set_for_reg_notes (rtx insn)
5222 rtx pat, reg;
5224 if (!INSN_P (insn))
5225 return NULL_RTX;
5227 pat = PATTERN (insn);
5228 if (GET_CODE (pat) == PARALLEL)
5230 /* We do not use single_set because that ignores SETs of unused
5231 registers. REG_EQUAL and REG_EQUIV notes really do require the
5232 PARALLEL to have a single SET. */
5233 if (multiple_sets (insn))
5234 return NULL_RTX;
5235 pat = XVECEXP (pat, 0, 0);
5238 if (GET_CODE (pat) != SET)
5239 return NULL_RTX;
5241 reg = SET_DEST (pat);
5243 /* Notes apply to the contents of a STRICT_LOW_PART. */
5244 if (GET_CODE (reg) == STRICT_LOW_PART
5245 || GET_CODE (reg) == ZERO_EXTRACT)
5246 reg = XEXP (reg, 0);
5248 /* Check that we have a register. */
5249 if (!(REG_P (reg) || GET_CODE (reg) == SUBREG))
5250 return NULL_RTX;
5252 return pat;
5255 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5256 note of this type already exists, remove it first. */
5259 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5261 rtx note = find_reg_note (insn, kind, NULL_RTX);
5263 switch (kind)
5265 case REG_EQUAL:
5266 case REG_EQUIV:
5267 /* We need to support the REG_EQUAL on USE trick of find_reloads. */
5268 if (!set_for_reg_notes (insn) && GET_CODE (PATTERN (insn)) != USE)
5269 return NULL_RTX;
5271 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5272 It serves no useful purpose and breaks eliminate_regs. */
5273 if (GET_CODE (datum) == ASM_OPERANDS)
5274 return NULL_RTX;
5276 /* Notes with side effects are dangerous. Even if the side-effect
5277 initially mirrors one in PATTERN (INSN), later optimizations
5278 might alter the way that the final register value is calculated
5279 and so move or alter the side-effect in some way. The note would
5280 then no longer be a valid substitution for SET_SRC. */
5281 if (side_effects_p (datum))
5282 return NULL_RTX;
5283 break;
5285 default:
5286 break;
5289 if (note)
5290 XEXP (note, 0) = datum;
5291 else
5293 add_reg_note (insn, kind, datum);
5294 note = REG_NOTES (insn);
5297 switch (kind)
5299 case REG_EQUAL:
5300 case REG_EQUIV:
5301 df_notes_rescan (as_a <rtx_insn *> (insn));
5302 break;
5303 default:
5304 break;
5307 return note;
5310 /* Like set_unique_reg_note, but don't do anything unless INSN sets DST. */
5312 set_dst_reg_note (rtx insn, enum reg_note kind, rtx datum, rtx dst)
5314 rtx set = set_for_reg_notes (insn);
5316 if (set && SET_DEST (set) == dst)
5317 return set_unique_reg_note (insn, kind, datum);
5318 return NULL_RTX;
5321 /* Emit the rtl pattern X as an appropriate kind of insn. Also emit a
5322 following barrier if the instruction needs one and if ALLOW_BARRIER_P
5323 is true.
5325 If X is a label, it is simply added into the insn chain. */
5327 rtx_insn *
5328 emit (rtx x, bool allow_barrier_p)
5330 enum rtx_code code = classify_insn (x);
5332 switch (code)
5334 case CODE_LABEL:
5335 return emit_label (x);
5336 case INSN:
5337 return emit_insn (x);
5338 case JUMP_INSN:
5340 rtx_insn *insn = emit_jump_insn (x);
5341 if (allow_barrier_p
5342 && (any_uncondjump_p (insn) || GET_CODE (x) == RETURN))
5343 return emit_barrier ();
5344 return insn;
5346 case CALL_INSN:
5347 return emit_call_insn (x);
5348 case DEBUG_INSN:
5349 return emit_debug_insn (x);
5350 default:
5351 gcc_unreachable ();
5355 /* Space for free sequence stack entries. */
5356 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5358 /* Begin emitting insns to a sequence. If this sequence will contain
5359 something that might cause the compiler to pop arguments to function
5360 calls (because those pops have previously been deferred; see
5361 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5362 before calling this function. That will ensure that the deferred
5363 pops are not accidentally emitted in the middle of this sequence. */
5365 void
5366 start_sequence (void)
5368 struct sequence_stack *tem;
5370 if (free_sequence_stack != NULL)
5372 tem = free_sequence_stack;
5373 free_sequence_stack = tem->next;
5375 else
5376 tem = ggc_alloc<sequence_stack> ();
5378 tem->next = get_current_sequence ()->next;
5379 tem->first = get_insns ();
5380 tem->last = get_last_insn ();
5381 get_current_sequence ()->next = tem;
5383 set_first_insn (0);
5384 set_last_insn (0);
5387 /* Set up the insn chain starting with FIRST as the current sequence,
5388 saving the previously current one. See the documentation for
5389 start_sequence for more information about how to use this function. */
5391 void
5392 push_to_sequence (rtx_insn *first)
5394 rtx_insn *last;
5396 start_sequence ();
5398 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5401 set_first_insn (first);
5402 set_last_insn (last);
5405 /* Like push_to_sequence, but take the last insn as an argument to avoid
5406 looping through the list. */
5408 void
5409 push_to_sequence2 (rtx_insn *first, rtx_insn *last)
5411 start_sequence ();
5413 set_first_insn (first);
5414 set_last_insn (last);
5417 /* Set up the outer-level insn chain
5418 as the current sequence, saving the previously current one. */
5420 void
5421 push_topmost_sequence (void)
5423 struct sequence_stack *top;
5425 start_sequence ();
5427 top = get_topmost_sequence ();
5428 set_first_insn (top->first);
5429 set_last_insn (top->last);
5432 /* After emitting to the outer-level insn chain, update the outer-level
5433 insn chain, and restore the previous saved state. */
5435 void
5436 pop_topmost_sequence (void)
5438 struct sequence_stack *top;
5440 top = get_topmost_sequence ();
5441 top->first = get_insns ();
5442 top->last = get_last_insn ();
5444 end_sequence ();
5447 /* After emitting to a sequence, restore previous saved state.
5449 To get the contents of the sequence just made, you must call
5450 `get_insns' *before* calling here.
5452 If the compiler might have deferred popping arguments while
5453 generating this sequence, and this sequence will not be immediately
5454 inserted into the instruction stream, use do_pending_stack_adjust
5455 before calling get_insns. That will ensure that the deferred
5456 pops are inserted into this sequence, and not into some random
5457 location in the instruction stream. See INHIBIT_DEFER_POP for more
5458 information about deferred popping of arguments. */
5460 void
5461 end_sequence (void)
5463 struct sequence_stack *tem = get_current_sequence ()->next;
5465 set_first_insn (tem->first);
5466 set_last_insn (tem->last);
5467 get_current_sequence ()->next = tem->next;
5469 memset (tem, 0, sizeof (*tem));
5470 tem->next = free_sequence_stack;
5471 free_sequence_stack = tem;
5474 /* Return 1 if currently emitting into a sequence. */
5477 in_sequence_p (void)
5479 return get_current_sequence ()->next != 0;
5482 /* Put the various virtual registers into REGNO_REG_RTX. */
5484 static void
5485 init_virtual_regs (void)
5487 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5488 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5489 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5490 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5491 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5492 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5493 = virtual_preferred_stack_boundary_rtx;
5497 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5498 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5499 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5500 static int copy_insn_n_scratches;
5502 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5503 copied an ASM_OPERANDS.
5504 In that case, it is the original input-operand vector. */
5505 static rtvec orig_asm_operands_vector;
5507 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5508 copied an ASM_OPERANDS.
5509 In that case, it is the copied input-operand vector. */
5510 static rtvec copy_asm_operands_vector;
5512 /* Likewise for the constraints vector. */
5513 static rtvec orig_asm_constraints_vector;
5514 static rtvec copy_asm_constraints_vector;
5516 /* Recursively create a new copy of an rtx for copy_insn.
5517 This function differs from copy_rtx in that it handles SCRATCHes and
5518 ASM_OPERANDs properly.
5519 Normally, this function is not used directly; use copy_insn as front end.
5520 However, you could first copy an insn pattern with copy_insn and then use
5521 this function afterwards to properly copy any REG_NOTEs containing
5522 SCRATCHes. */
5525 copy_insn_1 (rtx orig)
5527 rtx copy;
5528 int i, j;
5529 RTX_CODE code;
5530 const char *format_ptr;
5532 if (orig == NULL)
5533 return NULL;
5535 code = GET_CODE (orig);
5537 switch (code)
5539 case REG:
5540 case DEBUG_EXPR:
5541 CASE_CONST_ANY:
5542 case SYMBOL_REF:
5543 case CODE_LABEL:
5544 case PC:
5545 case CC0:
5546 case RETURN:
5547 case SIMPLE_RETURN:
5548 return orig;
5549 case CLOBBER:
5550 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
5551 clobbers or clobbers of hard registers that originated as pseudos.
5552 This is needed to allow safe register renaming. */
5553 if (REG_P (XEXP (orig, 0))
5554 && HARD_REGISTER_NUM_P (REGNO (XEXP (orig, 0)))
5555 && HARD_REGISTER_NUM_P (ORIGINAL_REGNO (XEXP (orig, 0))))
5556 return orig;
5557 break;
5559 case SCRATCH:
5560 for (i = 0; i < copy_insn_n_scratches; i++)
5561 if (copy_insn_scratch_in[i] == orig)
5562 return copy_insn_scratch_out[i];
5563 break;
5565 case CONST:
5566 if (shared_const_p (orig))
5567 return orig;
5568 break;
5570 /* A MEM with a constant address is not sharable. The problem is that
5571 the constant address may need to be reloaded. If the mem is shared,
5572 then reloading one copy of this mem will cause all copies to appear
5573 to have been reloaded. */
5575 default:
5576 break;
5579 /* Copy the various flags, fields, and other information. We assume
5580 that all fields need copying, and then clear the fields that should
5581 not be copied. That is the sensible default behavior, and forces
5582 us to explicitly document why we are *not* copying a flag. */
5583 copy = shallow_copy_rtx (orig);
5585 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5586 if (INSN_P (orig))
5588 RTX_FLAG (copy, jump) = 0;
5589 RTX_FLAG (copy, call) = 0;
5590 RTX_FLAG (copy, frame_related) = 0;
5593 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5595 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5596 switch (*format_ptr++)
5598 case 'e':
5599 if (XEXP (orig, i) != NULL)
5600 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5601 break;
5603 case 'E':
5604 case 'V':
5605 if (XVEC (orig, i) == orig_asm_constraints_vector)
5606 XVEC (copy, i) = copy_asm_constraints_vector;
5607 else if (XVEC (orig, i) == orig_asm_operands_vector)
5608 XVEC (copy, i) = copy_asm_operands_vector;
5609 else if (XVEC (orig, i) != NULL)
5611 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5612 for (j = 0; j < XVECLEN (copy, i); j++)
5613 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5615 break;
5617 case 't':
5618 case 'w':
5619 case 'i':
5620 case 's':
5621 case 'S':
5622 case 'u':
5623 case '0':
5624 /* These are left unchanged. */
5625 break;
5627 default:
5628 gcc_unreachable ();
5631 if (code == SCRATCH)
5633 i = copy_insn_n_scratches++;
5634 gcc_assert (i < MAX_RECOG_OPERANDS);
5635 copy_insn_scratch_in[i] = orig;
5636 copy_insn_scratch_out[i] = copy;
5638 else if (code == ASM_OPERANDS)
5640 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5641 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5642 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5643 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5646 return copy;
5649 /* Create a new copy of an rtx.
5650 This function differs from copy_rtx in that it handles SCRATCHes and
5651 ASM_OPERANDs properly.
5652 INSN doesn't really have to be a full INSN; it could be just the
5653 pattern. */
5655 copy_insn (rtx insn)
5657 copy_insn_n_scratches = 0;
5658 orig_asm_operands_vector = 0;
5659 orig_asm_constraints_vector = 0;
5660 copy_asm_operands_vector = 0;
5661 copy_asm_constraints_vector = 0;
5662 return copy_insn_1 (insn);
5665 /* Return a copy of INSN that can be used in a SEQUENCE delay slot,
5666 on that assumption that INSN itself remains in its original place. */
5668 rtx_insn *
5669 copy_delay_slot_insn (rtx_insn *insn)
5671 /* Copy INSN with its rtx_code, all its notes, location etc. */
5672 insn = as_a <rtx_insn *> (copy_rtx (insn));
5673 INSN_UID (insn) = cur_insn_uid++;
5674 return insn;
5677 /* Initialize data structures and variables in this file
5678 before generating rtl for each function. */
5680 void
5681 init_emit (void)
5683 set_first_insn (NULL);
5684 set_last_insn (NULL);
5685 if (MIN_NONDEBUG_INSN_UID)
5686 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5687 else
5688 cur_insn_uid = 1;
5689 cur_debug_insn_uid = 1;
5690 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5691 first_label_num = label_num;
5692 get_current_sequence ()->next = NULL;
5694 /* Init the tables that describe all the pseudo regs. */
5696 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5698 crtl->emit.regno_pointer_align
5699 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5701 regno_reg_rtx
5702 = ggc_cleared_vec_alloc<rtx> (crtl->emit.regno_pointer_align_length);
5704 /* Put copies of all the hard registers into regno_reg_rtx. */
5705 memcpy (regno_reg_rtx,
5706 initial_regno_reg_rtx,
5707 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5709 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5710 init_virtual_regs ();
5712 /* Indicate that the virtual registers and stack locations are
5713 all pointers. */
5714 REG_POINTER (stack_pointer_rtx) = 1;
5715 REG_POINTER (frame_pointer_rtx) = 1;
5716 REG_POINTER (hard_frame_pointer_rtx) = 1;
5717 REG_POINTER (arg_pointer_rtx) = 1;
5719 REG_POINTER (virtual_incoming_args_rtx) = 1;
5720 REG_POINTER (virtual_stack_vars_rtx) = 1;
5721 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5722 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5723 REG_POINTER (virtual_cfa_rtx) = 1;
5725 #ifdef STACK_BOUNDARY
5726 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5727 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5728 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5729 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5731 /* ??? These are problematic (for example, 3 out of 4 are wrong on
5732 32-bit SPARC and cannot be all fixed because of the ABI). */
5733 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5734 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5735 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5736 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5738 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5739 #endif
5741 #ifdef INIT_EXPANDERS
5742 INIT_EXPANDERS;
5743 #endif
5746 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5748 static rtx
5749 gen_const_vector (machine_mode mode, int constant)
5751 rtx tem;
5752 rtvec v;
5753 int units, i;
5754 machine_mode inner;
5756 units = GET_MODE_NUNITS (mode);
5757 inner = GET_MODE_INNER (mode);
5759 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5761 v = rtvec_alloc (units);
5763 /* We need to call this function after we set the scalar const_tiny_rtx
5764 entries. */
5765 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5767 for (i = 0; i < units; ++i)
5768 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5770 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5771 return tem;
5774 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5775 all elements are zero, and the one vector when all elements are one. */
5777 gen_rtx_CONST_VECTOR (machine_mode mode, rtvec v)
5779 machine_mode inner = GET_MODE_INNER (mode);
5780 int nunits = GET_MODE_NUNITS (mode);
5781 rtx x;
5782 int i;
5784 /* Check to see if all of the elements have the same value. */
5785 x = RTVEC_ELT (v, nunits - 1);
5786 for (i = nunits - 2; i >= 0; i--)
5787 if (RTVEC_ELT (v, i) != x)
5788 break;
5790 /* If the values are all the same, check to see if we can use one of the
5791 standard constant vectors. */
5792 if (i == -1)
5794 if (x == CONST0_RTX (inner))
5795 return CONST0_RTX (mode);
5796 else if (x == CONST1_RTX (inner))
5797 return CONST1_RTX (mode);
5798 else if (x == CONSTM1_RTX (inner))
5799 return CONSTM1_RTX (mode);
5802 return gen_rtx_raw_CONST_VECTOR (mode, v);
5805 /* Initialise global register information required by all functions. */
5807 void
5808 init_emit_regs (void)
5810 int i;
5811 machine_mode mode;
5812 mem_attrs *attrs;
5814 /* Reset register attributes */
5815 reg_attrs_htab->empty ();
5817 /* We need reg_raw_mode, so initialize the modes now. */
5818 init_reg_modes_target ();
5820 /* Assign register numbers to the globally defined register rtx. */
5821 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5822 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5823 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5824 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5825 virtual_incoming_args_rtx =
5826 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5827 virtual_stack_vars_rtx =
5828 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5829 virtual_stack_dynamic_rtx =
5830 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5831 virtual_outgoing_args_rtx =
5832 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5833 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5834 virtual_preferred_stack_boundary_rtx =
5835 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5837 /* Initialize RTL for commonly used hard registers. These are
5838 copied into regno_reg_rtx as we begin to compile each function. */
5839 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5840 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5842 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5843 return_address_pointer_rtx
5844 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5845 #endif
5847 pic_offset_table_rtx = NULL_RTX;
5848 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5849 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5851 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5853 mode = (machine_mode) i;
5854 attrs = ggc_cleared_alloc<mem_attrs> ();
5855 attrs->align = BITS_PER_UNIT;
5856 attrs->addrspace = ADDR_SPACE_GENERIC;
5857 if (mode != BLKmode)
5859 attrs->size_known_p = true;
5860 attrs->size = GET_MODE_SIZE (mode);
5861 if (STRICT_ALIGNMENT)
5862 attrs->align = GET_MODE_ALIGNMENT (mode);
5864 mode_mem_attrs[i] = attrs;
5868 /* Initialize global machine_mode variables. */
5870 void
5871 init_derived_machine_modes (void)
5873 byte_mode = VOIDmode;
5874 word_mode = VOIDmode;
5876 for (machine_mode mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5877 mode != VOIDmode;
5878 mode = GET_MODE_WIDER_MODE (mode))
5880 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5881 && byte_mode == VOIDmode)
5882 byte_mode = mode;
5884 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5885 && word_mode == VOIDmode)
5886 word_mode = mode;
5889 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5892 /* Create some permanent unique rtl objects shared between all functions. */
5894 void
5895 init_emit_once (void)
5897 int i;
5898 machine_mode mode;
5899 machine_mode double_mode;
5901 /* Initialize the CONST_INT, CONST_WIDE_INT, CONST_DOUBLE,
5902 CONST_FIXED, and memory attribute hash tables. */
5903 const_int_htab = hash_table<const_int_hasher>::create_ggc (37);
5905 #if TARGET_SUPPORTS_WIDE_INT
5906 const_wide_int_htab = hash_table<const_wide_int_hasher>::create_ggc (37);
5907 #endif
5908 const_double_htab = hash_table<const_double_hasher>::create_ggc (37);
5910 const_fixed_htab = hash_table<const_fixed_hasher>::create_ggc (37);
5912 reg_attrs_htab = hash_table<reg_attr_hasher>::create_ggc (37);
5914 #ifdef INIT_EXPANDERS
5915 /* This is to initialize {init|mark|free}_machine_status before the first
5916 call to push_function_context_to. This is needed by the Chill front
5917 end which calls push_function_context_to before the first call to
5918 init_function_start. */
5919 INIT_EXPANDERS;
5920 #endif
5922 /* Create the unique rtx's for certain rtx codes and operand values. */
5924 /* Process stack-limiting command-line options. */
5925 if (opt_fstack_limit_symbol_arg != NULL)
5926 stack_limit_rtx
5927 = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (opt_fstack_limit_symbol_arg));
5928 if (opt_fstack_limit_register_no >= 0)
5929 stack_limit_rtx = gen_rtx_REG (Pmode, opt_fstack_limit_register_no);
5931 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5932 tries to use these variables. */
5933 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5934 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5935 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5937 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5938 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5939 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5940 else
5941 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5943 double_mode = mode_for_size (DOUBLE_TYPE_SIZE, MODE_FLOAT, 0);
5945 real_from_integer (&dconst0, double_mode, 0, SIGNED);
5946 real_from_integer (&dconst1, double_mode, 1, SIGNED);
5947 real_from_integer (&dconst2, double_mode, 2, SIGNED);
5949 dconstm1 = dconst1;
5950 dconstm1.sign = 1;
5952 dconsthalf = dconst1;
5953 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5955 for (i = 0; i < 3; i++)
5957 const REAL_VALUE_TYPE *const r =
5958 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5960 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5961 mode != VOIDmode;
5962 mode = GET_MODE_WIDER_MODE (mode))
5963 const_tiny_rtx[i][(int) mode] =
5964 const_double_from_real_value (*r, mode);
5966 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5967 mode != VOIDmode;
5968 mode = GET_MODE_WIDER_MODE (mode))
5969 const_tiny_rtx[i][(int) mode] =
5970 const_double_from_real_value (*r, mode);
5972 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5974 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5975 mode != VOIDmode;
5976 mode = GET_MODE_WIDER_MODE (mode))
5977 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5979 for (mode = MIN_MODE_PARTIAL_INT;
5980 mode <= MAX_MODE_PARTIAL_INT;
5981 mode = (machine_mode)((int)(mode) + 1))
5982 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5985 const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
5987 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5988 mode != VOIDmode;
5989 mode = GET_MODE_WIDER_MODE (mode))
5990 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5992 for (mode = MIN_MODE_PARTIAL_INT;
5993 mode <= MAX_MODE_PARTIAL_INT;
5994 mode = (machine_mode)((int)(mode) + 1))
5995 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5997 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5998 mode != VOIDmode;
5999 mode = GET_MODE_WIDER_MODE (mode))
6001 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6002 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6005 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
6006 mode != VOIDmode;
6007 mode = GET_MODE_WIDER_MODE (mode))
6009 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
6010 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
6013 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
6014 mode != VOIDmode;
6015 mode = GET_MODE_WIDER_MODE (mode))
6017 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6018 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6019 const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
6022 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
6023 mode != VOIDmode;
6024 mode = GET_MODE_WIDER_MODE (mode))
6026 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6027 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6030 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
6031 mode != VOIDmode;
6032 mode = GET_MODE_WIDER_MODE (mode))
6034 FCONST0 (mode).data.high = 0;
6035 FCONST0 (mode).data.low = 0;
6036 FCONST0 (mode).mode = mode;
6037 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6038 FCONST0 (mode), mode);
6041 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
6042 mode != VOIDmode;
6043 mode = GET_MODE_WIDER_MODE (mode))
6045 FCONST0 (mode).data.high = 0;
6046 FCONST0 (mode).data.low = 0;
6047 FCONST0 (mode).mode = mode;
6048 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6049 FCONST0 (mode), mode);
6052 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
6053 mode != VOIDmode;
6054 mode = GET_MODE_WIDER_MODE (mode))
6056 FCONST0 (mode).data.high = 0;
6057 FCONST0 (mode).data.low = 0;
6058 FCONST0 (mode).mode = mode;
6059 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6060 FCONST0 (mode), mode);
6062 /* We store the value 1. */
6063 FCONST1 (mode).data.high = 0;
6064 FCONST1 (mode).data.low = 0;
6065 FCONST1 (mode).mode = mode;
6066 FCONST1 (mode).data
6067 = double_int_one.lshift (GET_MODE_FBIT (mode),
6068 HOST_BITS_PER_DOUBLE_INT,
6069 SIGNED_FIXED_POINT_MODE_P (mode));
6070 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6071 FCONST1 (mode), mode);
6074 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
6075 mode != VOIDmode;
6076 mode = GET_MODE_WIDER_MODE (mode))
6078 FCONST0 (mode).data.high = 0;
6079 FCONST0 (mode).data.low = 0;
6080 FCONST0 (mode).mode = mode;
6081 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6082 FCONST0 (mode), mode);
6084 /* We store the value 1. */
6085 FCONST1 (mode).data.high = 0;
6086 FCONST1 (mode).data.low = 0;
6087 FCONST1 (mode).mode = mode;
6088 FCONST1 (mode).data
6089 = double_int_one.lshift (GET_MODE_FBIT (mode),
6090 HOST_BITS_PER_DOUBLE_INT,
6091 SIGNED_FIXED_POINT_MODE_P (mode));
6092 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
6093 FCONST1 (mode), mode);
6096 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
6097 mode != VOIDmode;
6098 mode = GET_MODE_WIDER_MODE (mode))
6100 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6103 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
6104 mode != VOIDmode;
6105 mode = GET_MODE_WIDER_MODE (mode))
6107 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6110 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
6111 mode != VOIDmode;
6112 mode = GET_MODE_WIDER_MODE (mode))
6114 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6115 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6118 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
6119 mode != VOIDmode;
6120 mode = GET_MODE_WIDER_MODE (mode))
6122 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
6123 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
6126 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
6127 if (GET_MODE_CLASS ((machine_mode) i) == MODE_CC)
6128 const_tiny_rtx[0][i] = const0_rtx;
6130 const_tiny_rtx[0][(int) BImode] = const0_rtx;
6131 if (STORE_FLAG_VALUE == 1)
6132 const_tiny_rtx[1][(int) BImode] = const1_rtx;
6134 for (mode = GET_CLASS_NARROWEST_MODE (MODE_POINTER_BOUNDS);
6135 mode != VOIDmode;
6136 mode = GET_MODE_WIDER_MODE (mode))
6138 wide_int wi_zero = wi::zero (GET_MODE_PRECISION (mode));
6139 const_tiny_rtx[0][mode] = immed_wide_int_const (wi_zero, mode);
6142 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
6143 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
6144 simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
6145 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
6146 invalid_insn_rtx = gen_rtx_INSN (VOIDmode,
6147 /*prev_insn=*/NULL,
6148 /*next_insn=*/NULL,
6149 /*bb=*/NULL,
6150 /*pattern=*/NULL_RTX,
6151 /*location=*/-1,
6152 CODE_FOR_nothing,
6153 /*reg_notes=*/NULL_RTX);
6156 /* Produce exact duplicate of insn INSN after AFTER.
6157 Care updating of libcall regions if present. */
6159 rtx_insn *
6160 emit_copy_of_insn_after (rtx_insn *insn, rtx_insn *after)
6162 rtx_insn *new_rtx;
6163 rtx link;
6165 switch (GET_CODE (insn))
6167 case INSN:
6168 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6169 break;
6171 case JUMP_INSN:
6172 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6173 CROSSING_JUMP_P (new_rtx) = CROSSING_JUMP_P (insn);
6174 break;
6176 case DEBUG_INSN:
6177 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6178 break;
6180 case CALL_INSN:
6181 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6182 if (CALL_INSN_FUNCTION_USAGE (insn))
6183 CALL_INSN_FUNCTION_USAGE (new_rtx)
6184 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6185 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6186 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6187 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6188 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6189 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6190 break;
6192 default:
6193 gcc_unreachable ();
6196 /* Update LABEL_NUSES. */
6197 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6199 INSN_LOCATION (new_rtx) = INSN_LOCATION (insn);
6201 /* If the old insn is frame related, then so is the new one. This is
6202 primarily needed for IA-64 unwind info which marks epilogue insns,
6203 which may be duplicated by the basic block reordering code. */
6204 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6206 /* Locate the end of existing REG_NOTES in NEW_RTX. */
6207 rtx *ptail = &REG_NOTES (new_rtx);
6208 while (*ptail != NULL_RTX)
6209 ptail = &XEXP (*ptail, 1);
6211 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6212 will make them. REG_LABEL_TARGETs are created there too, but are
6213 supposed to be sticky, so we copy them. */
6214 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6215 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6217 *ptail = duplicate_reg_note (link);
6218 ptail = &XEXP (*ptail, 1);
6221 INSN_CODE (new_rtx) = INSN_CODE (insn);
6222 return new_rtx;
6225 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6227 gen_hard_reg_clobber (machine_mode mode, unsigned int regno)
6229 if (hard_reg_clobbers[mode][regno])
6230 return hard_reg_clobbers[mode][regno];
6231 else
6232 return (hard_reg_clobbers[mode][regno] =
6233 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6236 location_t prologue_location;
6237 location_t epilogue_location;
6239 /* Hold current location information and last location information, so the
6240 datastructures are built lazily only when some instructions in given
6241 place are needed. */
6242 static location_t curr_location;
6244 /* Allocate insn location datastructure. */
6245 void
6246 insn_locations_init (void)
6248 prologue_location = epilogue_location = 0;
6249 curr_location = UNKNOWN_LOCATION;
6252 /* At the end of emit stage, clear current location. */
6253 void
6254 insn_locations_finalize (void)
6256 epilogue_location = curr_location;
6257 curr_location = UNKNOWN_LOCATION;
6260 /* Set current location. */
6261 void
6262 set_curr_insn_location (location_t location)
6264 curr_location = location;
6267 /* Get current location. */
6268 location_t
6269 curr_insn_location (void)
6271 return curr_location;
6274 /* Return lexical scope block insn belongs to. */
6275 tree
6276 insn_scope (const rtx_insn *insn)
6278 return LOCATION_BLOCK (INSN_LOCATION (insn));
6281 /* Return line number of the statement that produced this insn. */
6283 insn_line (const rtx_insn *insn)
6285 return LOCATION_LINE (INSN_LOCATION (insn));
6288 /* Return source file of the statement that produced this insn. */
6289 const char *
6290 insn_file (const rtx_insn *insn)
6292 return LOCATION_FILE (INSN_LOCATION (insn));
6295 /* Return expanded location of the statement that produced this insn. */
6296 expanded_location
6297 insn_location (const rtx_insn *insn)
6299 return expand_location (INSN_LOCATION (insn));
6302 /* Return true if memory model MODEL requires a pre-operation (release-style)
6303 barrier or a post-operation (acquire-style) barrier. While not universal,
6304 this function matches behavior of several targets. */
6306 bool
6307 need_atomic_barrier_p (enum memmodel model, bool pre)
6309 switch (model & MEMMODEL_BASE_MASK)
6311 case MEMMODEL_RELAXED:
6312 case MEMMODEL_CONSUME:
6313 return false;
6314 case MEMMODEL_RELEASE:
6315 return pre;
6316 case MEMMODEL_ACQUIRE:
6317 return !pre;
6318 case MEMMODEL_ACQ_REL:
6319 case MEMMODEL_SEQ_CST:
6320 return true;
6321 default:
6322 gcc_unreachable ();
6326 /* Initialize fields of rtl_data related to stack alignment. */
6328 void
6329 rtl_data::init_stack_alignment ()
6331 stack_alignment_needed = STACK_BOUNDARY;
6332 max_used_stack_slot_alignment = STACK_BOUNDARY;
6333 stack_alignment_estimated = 0;
6334 preferred_stack_boundary = STACK_BOUNDARY;
6338 #include "gt-emit-rtl.h"