1 # Copyright
(C
) 1999-2018 Free Software Foundation
, Inc.
3 # This
program is free software
; you can redistribute it and
/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation
; either version
3 of the License
, or
6 #
(at your option
) any later version.
8 # This
program is distributed in the hope that it will be useful
,
9 # but WITHOUT
ANY WARRANTY
; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License
for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC
; see the file COPYING3.
If not see
15 #
<http
://www.gnu.org
/licenses
/>.
17 # Please email
any bugs
, comments
, and
/or additions to this file to
:
18 # gcc
-patches@gcc.gnu.org
20 # This file defines procs
for determining features supported by the target.
22 # Try to
compile the code given by CONTENTS into an output file of
23 # type TYPE
, where TYPE is as
for target_compile.
Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the
name of the output file.
27 # BASENAME is a prefix to use
for source and output files.
28 #
If ARGS is not empty
, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise
, code should contain
:
34 #
"! Fortran" for Fortran code,
36 #
"// ObjC++" for ObjC++
38 #
If the tool is ObjC
/ObjC
++ then we overide the extension to .m
/.mm to
39 # allow
for ObjC
/ObjC
++ specific flags.
40 proc check_compile
{basename type contents
args} {
42 verbose
"check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite
's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources
] {
48 set tmp_additional_sources
"$additional_sources"
49 set additional_sources
""
52 if { [llength $
args] > 0 } {
53 set options
[list
"additional_flags=[lindex $args 0]"]
57 switch -glob
-- $contents
{
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default
{ set src $
{basename
}[pid
].c
}
72 set compile_type $type
74 assembly
{ set output $
{basename
}[pid
].s
}
75 object
{ set output $
{basename
}[pid
].o
}
76 executable
{ set output $
{basename
}[pid
].exe
}
78 set output $
{basename
}[pid
].s
79 lappend options
"additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines
[$
{tool
}_target_compile $src $output $compile_type
"$options"]
89 set scan_output $output
90 # Don
't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp
"rtl-(.*)" $type dummy rtl_type] {
93 set scan_output
"[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources
] {
99 set additional_sources
"$tmp_additional_sources"
102 return [list $lines $scan_output
]
105 proc current_target_name
{ } {
107 if [info exists target_info
(target
,name)] {
108 set answer $target_info
(target
,name)
115 # Implement an effective
-target check
for property PROP by invoking
116 # the Tcl command
ARGS and seeing
if it returns true.
118 proc check_cached_effective_target
{ prop
args } {
122 set target
[current_target_name
]
123 if {![info exists et_cache
($prop
,target
)]
124 || $et_cache
($prop
,target
) != $target
} {
125 verbose
"check_cached_effective_target $prop: checking $target" 2
126 set et_cache
($prop
,target
) $target
127 set et_cache
($prop
,value
) [uplevel eval $
args]
128 if {![info exists et_prop_list
]
129 ||
[lsearch $et_prop_list $prop
] < 0} {
130 lappend et_prop_list $prop
132 verbose
"check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache
($prop
,value
)
135 verbose
"check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective
-target
cache. This is useful after testing
140 # effective
-target features and overriding TEST_ALWAYS_FLAGS and
/or
142 #
If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS
then they should
143 #
do a clear_effective_target_cache at the end as the target
cache can
144 # make decisions based upon the flags
, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init
/asan_finish pair.
148 proc clear_effective_target_cache
{ } {
152 if {[info exists et_prop_list
]} {
153 verbose
"clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list
{
155 unset et_cache
($prop
,value
)
156 unset et_cache
($prop
,target
)
162 # Like check_compile
, but
delete the output file and
return true
if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache
{args} {
165 set result
[eval check_compile $
args]
166 set lines
[lindex $result
0]
167 set output
[lindex $result
1]
168 remote_file build
delete $output
169 return [string match
"" $lines]
172 # Like check_no_compiler_messages_nocache
, but
cache the result.
173 # PROP is the
property we
're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP
, otherwise they satisfy it
185 #
if they
do match regular expression PATTERN.
(PATTERN can start
186 # with something like
"[!]" if the regular expression needs to match
187 #
"!" as the first character.)
189 #
Delete the output file before returning. The other arguments are
190 # as
for check_compile.
191 proc check_no_messages_and_pattern_nocache
{basename pattern
args} {
194 set result
[eval
[list check_compile $basename
] $
args]
195 set lines
[lindex $result
0]
196 set output
[lindex $result
1]
199 if { [string match
"" $lines] } {
200 set chan
[open
"$output"]
201 set invert
[regexp
{^
!(.
*)} $pattern dummy pattern
]
202 set ok
[expr
{ [regexp $pattern
[read $chan
]] != $invert
}]
206 remote_file build
delete $output
210 # Like check_no_messages_and_pattern_nocache
, but
cache the result.
211 # PROP is the
property we
're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking
, and doubles as a prefix
for temporary
247 proc check_runtime
{prop
args} {
250 return [check_cached_effective_target $prop
{
251 eval
[list check_runtime_nocache $prop
] $
args
255 #
Return 1 if GCC was configured with $pattern.
256 proc check_configured_with
{ pattern
} {
259 set gcc_output
[$
{tool
}_target_compile
"-v" "" "none" ""]
260 if { [ regexp
"Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose
"Matched: $pattern" 2
265 verbose
"Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available
{ }
271 ###############################
273 # weak symbols are only supported in some configs
/object formats
274 # this proc returns
1 if they
're supported, 0 if they're not
, or
-1 if unsure
276 proc check_weak_available
{ } {
279 # All mips targets should support it
281 if { [ string first
"mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget
*-*-aix
*] } {
291 # All solaris2 targets should support it
293 if { [istarget
*-*-solaris2
*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
303 # HP
-UX
10.X doesn
't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 # return 1 if weak undefined symbols are supported.
333 proc check_effective_target_weak_undefined { } {
334 return [check_runtime weak_undefined {
335 extern void foo () __attribute__((weak));
336 int main (void) { if (foo) return 1; return 0; }
340 ###############################
341 # proc check_weak_override_available { }
342 ###############################
344 # Like check_weak_available, but return 0 if weak symbol definitions
345 # cannot be overridden.
347 proc check_weak_override_available { } {
348 if { [istarget *-*-mingw*] } {
351 return [check_weak_available]
354 ###############################
355 # proc check_visibility_available { what_kind }
356 ###############################
358 # The visibility attribute is only support in some object formats
359 # This proc returns 1 if it is supported, 0 if not.
360 # The argument is the kind of visibility, default/protected/hidden/internal.
362 proc check_visibility_available { what_kind } {
363 if [string match "" $what_kind] { set what_kind "hidden" }
365 return [check_no_compiler_messages visibility_available_$what_kind object "
366 void f() __attribute__((visibility(\"$what_kind\")));
371 ###############################
372 # proc check_alias_available { }
373 ###############################
375 # Determine if the target toolchain supports the alias attribute.
377 # Returns 2 if the target supports aliases. Returns 1 if the target
378 # only supports weak aliased. Returns 0 if the target does not
379 # support aliases at all. Returns -1 if support for aliases could not
382 proc check_alias_available { } {
383 global alias_available_saved
386 if [info exists alias_available_saved] {
387 verbose "check_alias_available returning saved $alias_available_saved" 2
391 verbose "check_alias_available compiling testfile $src" 2
392 set f [open $src "w"]
393 # Compile a small test program. The definition of "g" is
394 # necessary to keep the Solaris assembler from complaining
396 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
397 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
399 set lines [${tool}_target_compile $src $obj object ""]
401 remote_file build delete $obj
403 if [string match "" $lines] then {
404 # No error messages, everything is OK.
405 set alias_available_saved 2
407 if [regexp "alias definitions not supported" $lines] {
408 verbose "check_alias_available target does not support aliases" 2
410 set objformat [gcc_target_object_format]
412 if { $objformat == "elf" } {
413 verbose "check_alias_available but target uses ELF format, so it ought to" 2
414 set alias_available_saved -1
416 set alias_available_saved 0
419 if [regexp "only weak aliases are supported" $lines] {
420 verbose "check_alias_available target supports only weak aliases" 2
421 set alias_available_saved 1
423 set alias_available_saved -1
428 verbose "check_alias_available returning $alias_available_saved" 2
431 return $alias_available_saved
434 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
436 proc check_effective_target_alias { } {
437 if { [check_alias_available] < 2 } {
444 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
446 proc check_ifunc_available { } {
447 return [check_no_compiler_messages ifunc_available object {
452 typedef void F (void);
453 F* g (void) { return &f_; }
454 void f () __attribute__ ((ifunc ("g")));
461 # Returns true if --gc-sections is supported on the target.
463 proc check_gc_sections_available { } {
464 global gc_sections_available_saved
467 if {![info exists gc_sections_available_saved]} {
468 # Some targets don't support gc
-sections despite whatever
's
469 # advertised by ld's options.
470 if { [istarget alpha
*-*-*]
471 ||
[istarget ia64
-*-*] } {
472 set gc_sections_available_saved
0
476 # elf2flt uses
-q
(--emit
-relocs
), which is incompatible with
478 if { [board_info target
exists ldflags
]
479 && [regexp
" -elf2flt\[ =\]" " [board_info target ldflags] "] } {
480 set gc_sections_available_saved
0
484 # VxWorks kernel modules are relocatable objects linked with
-r
,
485 #
while RTP executables are linked with
-q
(--emit
-relocs
).
486 # Both of these options are incompatible with
--gc
-sections.
487 if { [istarget
*-*-vxworks
*] } {
488 set gc_sections_available_saved
0
492 # Check
if the
ld used by gcc supports
--gc
-sections.
493 set gcc_ld
[lindex
[$
{tool
}_target_compile
"-print-prog-name=ld" "" "none" ""] 0]
494 set ld_output
[remote_exec host
"$gcc_ld" "--help"]
495 if { [ string first
"--gc-sections" $ld_output ] >= 0 } {
496 set gc_sections_available_saved
1
498 set gc_sections_available_saved
0
501 return $gc_sections_available_saved
504 #
Return 1 if according to target_info struct and explicit target list
505 # target is supposed to support trampolines.
507 proc check_effective_target_trampolines
{ } {
508 if [target_info
exists gcc
,no_trampolines
] {
511 if { [istarget avr
-*-*]
512 ||
[istarget msp430
-*-*]
513 ||
[istarget nvptx
-*-*]
514 ||
[istarget hppa2.0w
-hp
-hpux11.23
]
515 ||
[istarget hppa64
-hp
-hpux11.23
] } {
521 #
Return 1 if target has limited stack size.
523 proc check_effective_target_stack_size
{ } {
524 if [target_info
exists gcc
,stack_size
] {
530 #
Return the value attribute of an effective target
, otherwise
return 0.
532 proc dg
-effective
-target
-value
{ effective_target
} {
533 if { "$effective_target" == "stack_size" } {
534 if [check_effective_target_stack_size
] {
535 return [target_info gcc
,stack_size
]
542 #
Return 1 if signal.h is supported.
544 proc check_effective_target_signal
{ } {
545 if [target_info
exists gcc
,signal_suppress
] {
551 #
Return 1 if according to target_info struct and explicit target list
552 # target disables
-fdelete
-null
-pointer
-checks. Targets should
return 0
553 #
if they simply default to
-fno
-delete-null
-pointer
-checks but obey
554 #
-fdelete
-null
-pointer
-checks when passed explicitly
(and tests that
555 # depend
on this option should
do that
).
557 proc check_effective_target_keeps_null_pointer_checks
{ } {
558 if [target_info
exists keeps_null_pointer_checks
] {
561 if { [istarget msp430
-*-*] } {
567 #
Return the autofdo profile wrapper
569 # Linux by default allows
516KB of perf event buffers
570 # in
/proc
/sys
/kernel
/perf_event_mlock_kb
571 # Each individual perf tries to grab it
572 # This causes problems with parallel test suite runs. Instead
573 #
limit us to
8 pages
(32K
), which should be good enough
574 #
for the small test programs. With the default settings
575 # this allows parallelism of
16 and higher of parallel gcc
-auto
-profile
576 proc profopt
-perf
-wrapper
{ } {
578 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
581 #
Return true
if profiling is supported
on the target.
583 proc check_profiling_available
{ test_what
} {
584 global profiling_available_saved
586 verbose
"Profiling argument is <$test_what>" 1
588 # These conditions depend
on the
argument so examine them before
589 # looking at the
cache variable.
591 # Tree profiling requires TLS runtime support.
592 if { $test_what
== "-fprofile-generate" } {
593 if { ![check_effective_target_tls_runtime
] } {
598 if { $test_what
== "-fauto-profile" } {
599 if { !([istarget i?
86-*-linux
*] ||
[istarget x86_64
-*-linux
*]) } {
600 verbose
"autofdo only supported on linux"
603 # not cross compiling?
605 verbose
"autofdo not supported for non native builds"
608 set event
[profopt
-perf
-wrapper
]
610 verbose
"autofdo not supported"
614 set status [remote_exec host
"$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
615 if { [lindex $
status 0] != 0 } {
616 verbose
"autofdo not supported because perf does not work"
620 # no good way to check this in advance
-- check later instead.
621 #
set status [remote_exec host
"create_gcov" "2>/dev/null"]
622 #
if { [lindex $
status 0] != 255 } {
623 # verbose
"autofdo not supported due to missing create_gcov"
628 # Support
for -p
on solaris2 relies
on mcrt1.o which comes with the
629 # vendor compiler. We cannot reliably predict the directory where the
630 # vendor compiler
(and thus mcrt1.o
) is installed so we can
't
631 # necessarily find mcrt1.o even if we have it.
632 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
636 # We don't yet support profiling
for MIPS16.
637 if { [istarget mips
*-*-*]
638 && ![check_effective_target_nomips16
]
639 && ($test_what
== "-p" || $test_what == "-pg") } {
643 # MinGW does not support
-p.
644 if { [istarget
*-*-mingw
*] && $test_what
== "-p" } {
648 # cygwin does not support
-p.
649 if { [istarget
*-*-cygwin
*] && $test_what
== "-p" } {
653 # uClibc does not have gcrt1.o.
654 if { [check_effective_target_uclibc
]
655 && ($test_what
== "-p" || $test_what == "-pg") } {
659 # Now examine the
cache variable.
660 if {![info exists profiling_available_saved
]} {
661 # Some targets don
't have any implementation of __bb_init_func or are
662 # missing other needed machinery.
663 if {[istarget aarch64*-*-elf]
664 || [istarget am3*-*-linux*]
665 || [istarget arm*-*-eabi*]
666 || [istarget arm*-*-elf]
667 || [istarget arm*-*-symbianelf*]
668 || [istarget avr-*-*]
669 || [istarget bfin-*-*]
670 || [istarget cris-*-*]
671 || [istarget crisv32-*-*]
672 || [istarget fido-*-elf]
673 || [istarget h8300-*-*]
674 || [istarget lm32-*-*]
675 || [istarget m32c-*-elf]
676 || [istarget m68k-*-elf]
677 || [istarget m68k-*-uclinux*]
678 || [istarget mips*-*-elf*]
679 || [istarget mmix-*-*]
680 || [istarget mn10300-*-elf*]
681 || [istarget moxie-*-elf*]
682 || [istarget msp430-*-*]
683 || [istarget nds32*-*-elf]
684 || [istarget nios2-*-elf]
685 || [istarget nvptx-*-*]
686 || [istarget powerpc-*-eabi*]
687 || [istarget powerpc-*-elf]
689 || [istarget tic6x-*-elf]
690 || [istarget visium-*-*]
691 || [istarget xstormy16-*]
692 || [istarget xtensa*-*-elf]
693 || [istarget *-*-rtems*]
694 || [istarget *-*-vxworks*] } {
695 set profiling_available_saved 0
697 set profiling_available_saved 1
701 # -pg link test result can't be cached since it may change between
703 set profiling_working $profiling_available_saved
704 if { $profiling_available_saved
== 1
705 && ![check_no_compiler_messages_nocache profiling executable
{
706 int main
() { return 0; } } "-pg"] } {
707 set profiling_working
0
710 return $profiling_working
713 # Check to see
if a target is
"freestanding". This is as per the definition
714 # in Section
4 of C99 standard. Effectively
, it is a target which supports no
715 # extra headers or libraries other than what is considered essential.
716 proc check_effective_target_freestanding
{ } {
717 if { [istarget nvptx
-*-*] } {
723 #
Return 1 if target has packed layout of structure members by
724 # default
, 0 otherwise. Note that this is slightly different than
725 # whether the target has
"natural alignment": both attributes may be
728 proc check_effective_target_default_packed
{ } {
729 return [check_no_compiler_messages default_packed assembly
{
730 struct x
{ char a
; long b
; } c
;
731 int s
[sizeof
(c
) == sizeof
(char
) + sizeof
(long
) ?
1 : -1];
735 #
Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
736 # documentation
, where the test also comes from.
738 proc check_effective_target_pcc_bitfield_type_matters
{ } {
739 # PCC_BITFIELD_TYPE_MATTERS isn
't just about unnamed or empty
740 # bitfields, but let's stick to the example code from the docs.
741 return [check_no_compiler_messages pcc_bitfield_type_matters assembly
{
742 struct foo1
{ char x
; char
:0; char y
; };
743 struct foo2
{ char x
; int :0; char y
; };
744 int s
[sizeof
(struct foo1
) != sizeof
(struct foo2
) ?
1 : -1];
748 # Add to FLAGS all the target
-specific flags needed to use thread
-local storage.
750 proc add_options_for_tls
{ flags
} {
751 #
On Solaris
9, __tls_get_addr
/___tls_get_addr only lives in
752 # libthread
, so always pass
-pthread
for native TLS. Same
for AIX.
753 # Need to duplicate native TLS check from
754 # check_effective_target_tls_native to avoid recursion.
755 if { ([istarget powerpc
-ibm
-aix
*]) &&
756 [check_no_messages_and_pattern tls_native
"!emutls" assembly {
758 int f
(void
) { return i
; }
759 void g
(int j
) { i
= j
; }
761 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
766 #
Return 1 if indirect jumps are supported
, 0 otherwise.
768 proc check_effective_target_indirect_jumps
{} {
769 if { [istarget nvptx
-*-*] } {
775 #
Return 1 if nonlocal
goto is supported
, 0 otherwise.
777 proc check_effective_target_nonlocal_goto
{} {
778 if { [istarget nvptx
-*-*] } {
784 #
Return 1 if global constructors are supported
, 0 otherwise.
786 proc check_effective_target_global_constructor
{} {
787 if { [istarget nvptx
-*-*] } {
793 #
Return 1 if taking label
values is supported
, 0 otherwise.
795 proc check_effective_target_label_values
{} {
796 if { [istarget nvptx
-*-*] ||
[target_info
exists gcc
,no_label_values
] } {
803 #
Return 1 if builtin_return_address and builtin_frame_address are
804 # supported
, 0 otherwise.
806 proc check_effective_target_return_address
{} {
807 if { [istarget nvptx
-*-*] } {
813 #
Return 1 if the assembler does not verify function types against
814 # calls
, 0 otherwise. Such verification will typically
show up problems
815 # with K
&R C function declarations.
817 proc check_effective_target_untyped_assembly
{} {
818 if { [istarget nvptx
-*-*] } {
824 #
Return 1 if alloca is supported
, 0 otherwise.
826 proc check_effective_target_alloca
{} {
827 if { [istarget nvptx
-*-*] } {
828 return [check_no_compiler_messages alloca assembly
{
830 void g
(int n
) { f
(__builtin_alloca
(n
)); }
836 #
Return 1 if thread local storage
(TLS
) is supported
, 0 otherwise.
838 proc check_effective_target_tls
{} {
839 return [check_no_compiler_messages tls assembly
{
841 int f
(void
) { return i
; }
842 void g
(int j
) { i
= j
; }
846 #
Return 1 if *native
* thread local storage
(TLS
) is supported
, 0 otherwise.
848 proc check_effective_target_tls_native
{} {
849 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
850 # functions
, so we fail to automatically detect it.
851 if { [istarget
*-*-vxworks
*] } {
855 return [check_no_messages_and_pattern tls_native
"!emutls" assembly {
857 int f
(void
) { return i
; }
858 void g
(int j
) { i
= j
; }
862 #
Return 1 if *emulated
* thread local storage
(TLS
) is supported
, 0 otherwise.
864 proc check_effective_target_tls_emulated
{} {
865 # VxWorks uses emulated TLS machinery
, but with non
-standard helper
866 # functions
, so we fail to automatically detect it.
867 if { [istarget
*-*-vxworks
*] } {
871 return [check_no_messages_and_pattern tls_emulated
"emutls" assembly {
873 int f
(void
) { return i
; }
874 void g
(int j
) { i
= j
; }
878 #
Return 1 if TLS executables can run correctly
, 0 otherwise.
880 proc check_effective_target_tls_runtime
{} {
881 # The runtime does not have TLS support
, but just
882 # running the test below is insufficient to
show this.
883 if { [istarget msp430
-*-*] ||
[istarget visium
-*-*] } {
886 return [check_runtime tls_runtime
{
887 __thread
int thr
= 0;
888 int main
(void
) { return thr
; }
889 } [add_options_for_tls
""]]
892 #
Return 1 if atomic compare
-and
-swap is supported
on 'int'
894 proc check_effective_target_cas_char
{} {
895 return [check_no_compiler_messages cas_char assembly
{
896 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
902 proc check_effective_target_cas_int
{} {
903 return [check_no_compiler_messages cas_int assembly
{
904 #
if __INT_MAX__
== 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
906 #elif __INT_MAX__
== 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
914 #
Return 1 if -ffunction
-sections is supported
, 0 otherwise.
916 proc check_effective_target_function_sections
{} {
917 # Darwin has its own scheme and silently accepts
-ffunction
-sections.
918 if { [istarget
*-*-darwin
*] } {
922 return [check_no_compiler_messages functionsections assembly
{
924 } "-ffunction-sections"]
927 #
Return 1 if instruction scheduling is available
, 0 otherwise.
929 proc check_effective_target_scheduling
{} {
930 return [check_no_compiler_messages scheduling object
{
932 } "-fschedule-insns"]
935 #
Return 1 if trapping arithmetic is available
, 0 otherwise.
937 proc check_effective_target_trapping
{} {
938 return [check_no_compiler_messages trapping object
{
939 int add
(int a
, int b
) { return a
+ b
; }
943 #
Return 1 if compilation with
-fgraphite is error
-free
for trivial
946 proc check_effective_target_fgraphite
{} {
947 return [check_no_compiler_messages fgraphite object
{
952 #
Return 1 if compilation with
-fopenacc is error
-free
for trivial
955 proc check_effective_target_fopenacc
{} {
956 # nvptx can be built with the device
-side bits of openacc
, but it
957 # does not make sense to test it as an openacc host.
958 if [istarget nvptx
-*-*] { return 0 }
960 return [check_no_compiler_messages fopenacc object
{
965 #
Return 1 if compilation with
-fopenmp is error
-free
for trivial
968 proc check_effective_target_fopenmp
{} {
969 # nvptx can be built with the device
-side bits of libgomp
, but it
970 # does not make sense to test it as an openmp host.
971 if [istarget nvptx
-*-*] { return 0 }
973 return [check_no_compiler_messages fopenmp object
{
978 #
Return 1 if compilation with
-fgnu
-tm is error
-free
for trivial
981 proc check_effective_target_fgnu_tm
{} {
982 return [check_no_compiler_messages fgnu_tm object
{
987 #
Return 1 if the target supports mmap
, 0 otherwise.
989 proc check_effective_target_mmap
{} {
990 return [check_function_available
"mmap"]
993 #
Return 1 if the target supports dlopen
, 0 otherwise.
994 proc check_effective_target_dlopen
{} {
995 return [check_no_compiler_messages dlopen executable
{
997 int main
(void
) { dlopen
("dummy.so", RTLD_NOW); }
998 } [add_options_for_dlopen
""]]
1001 proc add_options_for_dlopen
{ flags
} {
1002 return "$flags -ldl"
1005 #
Return 1 if the target supports clone
, 0 otherwise.
1006 proc check_effective_target_clone
{} {
1007 return [check_function_available
"clone"]
1010 #
Return 1 if the target supports setrlimit
, 0 otherwise.
1011 proc check_effective_target_setrlimit
{} {
1012 # Darwin has non
-posix compliant RLIMIT_AS
1013 if { [istarget
*-*-darwin
*] } {
1016 return [check_function_available
"setrlimit"]
1019 #
Return 1 if the target supports gettimeofday
, 0 otherwise.
1020 proc check_effective_target_gettimeofday
{} {
1021 return [check_function_available
"gettimeofday"]
1024 #
Return 1 if the target supports swapcontext
, 0 otherwise.
1025 proc check_effective_target_swapcontext
{} {
1026 return [check_no_compiler_messages swapcontext executable
{
1027 #
include <ucontext.h
>
1030 ucontext_t orig_context
,child_context
;
1031 if (swapcontext
(&child_context
, &orig_context
) < 0) { }
1036 #
Return 1 if compilation with
-pthread is error
-free
for trivial
1037 # code
, 0 otherwise.
1039 proc check_effective_target_pthread
{} {
1040 return [check_no_compiler_messages pthread object
{
1045 #
Return 1 if compilation with
-gstabs is error
-free
for trivial
1046 # code
, 0 otherwise.
1048 proc check_effective_target_stabs
{} {
1049 return [check_no_compiler_messages stabs object
{
1054 #
Return 1 if compilation with
-mpe
-aligned
-commons is error
-free
1055 #
for trivial code
, 0 otherwise.
1057 proc check_effective_target_pe_aligned_commons
{} {
1058 if { [istarget
*-*-cygwin
*] ||
[istarget
*-*-mingw
*] } {
1059 return [check_no_compiler_messages pe_aligned_commons object
{
1061 } "-mpe-aligned-commons"]
1066 #
Return 1 if the target supports
-static
1067 proc check_effective_target_static
{} {
1068 return [check_no_compiler_messages static executable
{
1069 int main
(void
) { return 0; }
1073 #
Return 1 if the target supports
-fstack
-protector
1074 proc check_effective_target_fstack_protector
{} {
1075 return [check_runtime fstack_protector
{
1077 int main
(int argc
, char
*argv
[]) {
1079 return !strcpy
(buf
, strrchr
(argv
[0], '/'));
1081 } "-fstack-protector"]
1084 #
Return 1 if the target supports
-fstack
-check or
-fstack
-check
=$stack_kind
1085 proc check_stack_check_available
{ stack_kind
} {
1086 if [string match
"" $stack_kind] then {
1087 set stack_opt
"-fstack-check"
1088 } else { set stack_opt
"-fstack-check=$stack_kind" }
1090 return [check_no_compiler_messages stack_check_$stack_kind executable
{
1091 int main
(void
) { return 0; }
1095 #
Return 1 if compilation with
-freorder
-blocks
-and
-partition is error
-free
1096 #
for trivial code
, 0 otherwise. As some targets
(ARM
for example
) only
1097 # warn when
-fprofile
-use is also supplied we test that combination too.
1099 proc check_effective_target_freorder
{} {
1100 if { [check_no_compiler_messages freorder object
{
1102 } "-freorder-blocks-and-partition"]
1103 && [check_no_compiler_messages fprofile_use_freorder object
{
1105 } "-fprofile-use -freorder-blocks-and-partition"] } {
1111 #
Return 1 if -fpic and
-fPIC are supported
, as in no warnings or errors
1112 # emitted
, 0 otherwise. Whether a shared library can actually be built is
1113 # out of scope
for this test.
1115 proc check_effective_target_fpic
{ } {
1116 # Note that M68K has a multilib that supports
-fpic but not
1117 #
-fPIC
, so we need to check both. We test with a
program that
1118 # requires GOT references.
1119 foreach
arg {fpic fPIC
} {
1120 if [check_no_compiler_messages $
arg object
{
1121 extern
int foo
(void
); extern
int bar
;
1122 int baz
(void
) { return foo
() + bar
; }
1130 #
On AArch64
, if -fpic is not supported
, then we will fall
back to
-fPIC
1131 # silently. So
, we can
't rely on above "check_effective_target_fpic" as it
1132 # assumes compiler will give warning if -fpic not supported. Here we check
1133 # whether binutils supports those new -fpic relocation modifiers, and assume
1134 # -fpic is supported if there is binutils support. GCC configuration will
1135 # enable -fpic for AArch64 in this case.
1137 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1138 # memory model -fpic relocation types.
1140 proc check_effective_target_aarch64_small_fpic { } {
1141 if { [istarget aarch64*-*-*] } {
1142 return [check_no_compiler_messages aarch64_small_fpic object {
1143 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1150 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1151 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1152 # in binutils since
2015-03-04 as PR gas
/17843.
1154 # This test directive make sure binutils support all features needed by TLS LE
1155 # under
-mtls
-size
=32 on AArch64.
1157 proc check_effective_target_aarch64_tlsle32
{ } {
1158 if { [istarget aarch64
*-*-*] } {
1159 return [check_no_compiler_messages aarch64_tlsle32 object
{
1160 void foo
(void
) { asm
("movk x1,#:tprel_g0_nc:t1"); }
1167 #
Return 1 if -shared is supported
, as in no warnings or errors
1168 # emitted
, 0 otherwise.
1170 proc check_effective_target_shared
{ } {
1171 # Note that M68K has a multilib that supports
-fpic but not
1172 #
-fPIC
, so we need to check both. We test with a
program that
1173 # requires GOT references.
1174 return [check_no_compiler_messages shared executable
{
1175 extern
int foo
(void
); extern
int bar
;
1176 int baz
(void
) { return foo
() + bar
; }
1180 #
Return 1 if -pie
, -fpie and
-fPIE are supported
, 0 otherwise.
1182 proc check_effective_target_pie
{ } {
1183 if { [istarget
*-*-darwin\
[912\
]*]
1184 ||
[istarget
*-*-dragonfly
*]
1185 ||
[istarget
*-*-freebsd
*]
1186 ||
[istarget
*-*-linux
*]
1187 ||
[istarget
*-*-gnu
*] } {
1190 if { [istarget
*-*-solaris2.1\
[1-9\
]*] } {
1191 # Full PIE support was added in Solaris
11.3, but gcc errors out
1192 #
if missing
, so check
for that.
1193 return [check_no_compiler_messages pie executable
{
1194 int main
(void
) { return 0; }
1200 #
Return true
if the target supports
-mpaired
-single
(as used
on MIPS
).
1202 proc check_effective_target_mpaired_single
{ } {
1203 return [check_no_compiler_messages mpaired_single object
{
1205 } "-mpaired-single"]
1208 #
Return true
if the target has access to FPU instructions.
1210 proc check_effective_target_hard_float
{ } {
1211 if { [istarget mips
*-*-*] } {
1212 return [check_no_compiler_messages hard_float assembly
{
1213 #
if (defined __mips_soft_float || defined __mips16
)
1214 #error __mips_soft_float || __mips16
1219 # This proc is actually checking the availabilty of FPU
1220 # support
for doubles
, so
on the RX we must fail
if the
1221 #
64-bit double multilib has been selected.
1222 if { [istarget rx
-*-*] } {
1224 #
return [check_no_compiler_messages hard_float assembly
{
1225 #
if defined __RX_64_BIT_DOUBLES__
1226 #error __RX_64_BIT_DOUBLES__
1231 # The generic test equates hard_float with
"no call for adding doubles".
1232 return [check_no_messages_and_pattern hard_float
"!\\(call" rtl-expand {
1233 double a
(double b
, double c
) { return b
+ c
; }
1237 #
Return true
if the target is a
64-bit MIPS target.
1239 proc check_effective_target_mips64
{ } {
1240 return [check_no_compiler_messages mips64 assembly
{
1247 #
Return true
if the target is a MIPS target that does not produce
1250 proc check_effective_target_nomips16
{ } {
1251 return [check_no_compiler_messages nomips16 object
{
1255 /* A cheap way of testing
for -mflip
-mips16.
*/
1256 void foo
(void
) { asm
("addiu $20,$20,1"); }
1257 void bar
(void
) { asm
("addiu $20,$20,1"); }
1262 # Add the options needed
for MIPS16 function attributes. At the moment
,
1263 # we don
't support MIPS16 PIC.
1265 proc add_options_for_mips16_attribute { flags } {
1266 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1269 # Return true if we can force a mode that allows MIPS16 code generation.
1270 # We don't support MIPS16 PIC
, and only support MIPS16
-mhard
-float
1273 proc check_effective_target_mips16_attribute
{ } {
1274 return [check_no_compiler_messages mips16_attribute assembly
{
1278 #
if defined __mips_hard_float \
1279 && (!defined _ABIO32 || _MIPS_SIM
!= _ABIO32
) \
1280 && (!defined _ABIO64 || _MIPS_SIM
!= _ABIO64
)
1281 #error __mips_hard_float
&& (!_ABIO32 ||
!_ABIO64
)
1283 } [add_options_for_mips16_attribute
""]]
1286 #
Return 1 if the target supports long double larger than double when
1287 # using the new ABI
, 0 otherwise.
1289 proc check_effective_target_mips_newabi_large_long_double
{ } {
1290 return [check_no_compiler_messages mips_newabi_large_long_double object
{
1291 int dummy
[sizeof
(long double
) > sizeof
(double
) ?
1 : -1];
1295 #
Return true
if the target is a MIPS target that has access
1296 # to the LL and SC instructions.
1298 proc check_effective_target_mips_llsc
{ } {
1299 if { ![istarget mips
*-*-*] } {
1302 # Assume that these instructions are always implemented
for
1303 # non
-elf
* targets
, via emulation
if necessary.
1304 if { ![istarget
*-*-elf
*] } {
1307 # Otherwise assume LL
/SC support
for everything but MIPS I.
1308 return [check_no_compiler_messages mips_llsc assembly
{
1315 #
Return true
if the target is a MIPS target that uses in
-place relocations.
1317 proc check_effective_target_mips_rel
{ } {
1318 if { ![istarget mips
*-*-*] } {
1321 return [check_no_compiler_messages mips_rel object
{
1322 #
if (defined _ABIN32
&& _MIPS_SIM
== _ABIN32
) \
1323 ||
(defined _ABI64
&& _MIPS_SIM
== _ABI64
)
1324 #error _ABIN32
&& (_ABIN32 || _ABI64
)
1329 #
Return true
if the target is a MIPS target that uses the EABI.
1331 proc check_effective_target_mips_eabi
{ } {
1332 if { ![istarget mips
*-*-*] } {
1335 return [check_no_compiler_messages mips_eabi object
{
1342 #
Return 1 if the current multilib does not generate PIC by default.
1344 proc check_effective_target_nonpic
{ } {
1345 return [check_no_compiler_messages nonpic assembly
{
1352 #
Return 1 if the current multilib generates PIE by default.
1354 proc check_effective_target_pie_enabled
{ } {
1355 return [check_no_compiler_messages pie_enabled assembly
{
1362 #
Return 1 if the target generates
-fstack
-protector by default.
1364 proc check_effective_target_fstack_protector_enabled
{} {
1365 return [ check_no_compiler_messages fstack_protector_enabled assembly
{
1366 #
if !defined
(__SSP__
) && !defined
(__SSP_ALL__
) && \
1367 !defined
(__SSP_STRONG__
) && !defined
(__SSP_EXPICIT__
)
1373 #
Return 1 if the target does not use a
status wrapper.
1375 proc check_effective_target_unwrapped
{ } {
1376 if { [target_info needs_status_wrapper
] != "" \
1377 && [target_info needs_status_wrapper
] != "0" } {
1383 #
Return true
if iconv is supported
on the target. In particular IBM1047.
1385 proc check_iconv_available
{ test_what
} {
1388 #
If the tool configuration file has not
set libiconv
, try
"-liconv"
1389 if { ![info exists libiconv
] } {
1390 set libiconv
"-liconv"
1392 set test_what
[lindex $test_what
1]
1393 return [check_runtime_nocache $test_what
[subst
{
1399 cd
= iconv_open
("$test_what", "UTF-8");
1400 if (cd
== (iconv_t
) -1)
1407 #
Return true
if the atomic library is supported
on the target.
1408 proc check_effective_target_libatomic_available
{ } {
1409 return [check_no_compiler_messages libatomic_available executable
{
1410 int main
(void
) { return 0; }
1414 #
Return 1 if an ASCII locale is supported
on this host
, 0 otherwise.
1416 proc check_ascii_locale_available
{ } {
1420 #
Return true
if named sections are supported
on this target.
1422 proc check_named_sections_available
{ } {
1423 return [check_no_compiler_messages named_sections assembly
{
1424 int __attribute__
((section
("whatever"))) foo;
1428 #
Return true
if the
"naked" function attribute is supported on this target.
1430 proc check_effective_target_naked_functions
{ } {
1431 return [check_no_compiler_messages naked_functions assembly
{
1432 void f
() __attribute__
((naked
));
1436 #
Return 1 if the target supports Fortran real kinds larger than real
(8),
1439 # When the target
name changes
, replace the cached result.
1441 proc check_effective_target_fortran_large_real
{ } {
1442 return [check_no_compiler_messages fortran_large_real executable
{
1444 integer,parameter
:: k
= selected_real_kind
(precision
(0.0_8
) + 1)
1451 #
Return 1 if the target supports Fortran real kind real
(16),
1452 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1453 # this checks
for Real
(16) only
; the other returned real
(10) if
1454 # both real
(10) and real
(16) are available.
1456 # When the target
name changes
, replace the cached result.
1458 proc check_effective_target_fortran_real_16
{ } {
1459 return [check_no_compiler_messages fortran_real_16 executable
{
1467 #
Return 1 if the target supports Fortran real kind
10,
1468 #
0 otherwise. Contrary to check_effective_target_fortran_large_real
1469 # this checks
for real
(10) only.
1471 # When the target
name changes
, replace the cached result.
1473 proc check_effective_target_fortran_real_10
{ } {
1474 return [check_no_compiler_messages fortran_real_10 executable
{
1482 #
Return 1 if the target supports Fortran
's IEEE modules,
1485 # When the target name changes, replace the cached result.
1487 proc check_effective_target_fortran_ieee { flags } {
1488 return [check_no_compiler_messages fortran_ieee executable {
1490 use, intrinsic :: ieee_features
1496 # Return 1 if the target supports SQRT for the largest floating-point
1497 # type. (Some targets lack the libm support for this FP type.)
1498 # On most targets, this check effectively checks either whether sqrtl is
1499 # available or on __float128 systems whether libquadmath is installed,
1500 # which provides sqrtq.
1502 # When the target name changes, replace the cached result.
1504 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1505 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1507 use iso_fortran_env, only: real_kinds
1508 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1509 real(kind=maxFP), volatile :: x
1517 # Return 1 if the target supports Fortran integer kinds larger than
1518 # integer(8), 0 otherwise.
1520 # When the target name changes, replace the cached result.
1522 proc check_effective_target_fortran_large_int { } {
1523 return [check_no_compiler_messages fortran_large_int executable {
1525 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1526 integer(kind=k) :: i
1531 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1533 # When the target name changes, replace the cached result.
1535 proc check_effective_target_fortran_integer_16 { } {
1536 return [check_no_compiler_messages fortran_integer_16 executable {
1543 # Return 1 if we can statically link libgfortran, 0 otherwise.
1545 # When the target name changes, replace the cached result.
1547 proc check_effective_target_static_libgfortran { } {
1548 return [check_no_compiler_messages static_libgfortran executable {
1555 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1557 proc check_effective_target_rdynamic { } {
1558 return [check_no_compiler_messages rdynamic executable {
1559 int main() { return 0; }
1563 proc check_linker_plugin_available { } {
1564 return [check_no_compiler_messages_nocache linker_plugin executable {
1565 int main() { return 0; }
1566 } "-flto -fuse-linker-plugin"]
1569 # Return 1 if the target OS supports running SSE executables, 0
1570 # otherwise. Cache the result.
1572 proc check_sse_os_support_available { } {
1573 return [check_cached_effective_target sse_os_support_available {
1574 # If this is not the right target then we can skip the test.
1575 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1577 } elseif { [istarget i?86-*-solaris2*] } {
1578 # The Solaris 2 kernel doesn't save and restore SSE registers
1579 # before Solaris
9 4/04. Before that
, executables die with SIGILL.
1580 check_runtime_nocache sse_os_support_available
{
1583 asm volatile
("movaps %xmm0,%xmm0");
1593 #
Return 1 if the target OS supports running AVX executables
, 0
1594 # otherwise.
Cache the result.
1596 proc check_avx_os_support_available
{ } {
1597 return [check_cached_effective_target avx_os_support_available
{
1598 #
If this is not the right target
then we can skip the test.
1599 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1602 # Check that OS has AVX and SSE saving enabled.
1603 check_runtime_nocache avx_os_support_available
{
1606 unsigned
int eax
, edx
;
1608 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1609 return (eax
& 0x06) != 0x06;
1616 #
Return 1 if the target OS supports running AVX executables
, 0
1617 # otherwise.
Cache the result.
1619 proc check_avx512_os_support_available
{ } {
1620 return [check_cached_effective_target avx512_os_support_available
{
1621 #
If this is not the right target
then we can skip the test.
1622 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1625 # Check that OS has AVX512
, AVX and SSE saving enabled.
1626 check_runtime_nocache avx512_os_support_available
{
1629 unsigned
int eax
, edx
;
1631 asm
("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1632 return (eax
& 0xe6) != 0xe6;
1639 #
Return 1 if the target supports executing SSE instructions
, 0
1640 # otherwise.
Cache the result.
1642 proc check_sse_hw_available
{ } {
1643 return [check_cached_effective_target sse_hw_available
{
1644 #
If this is not the right target
then we can skip the test.
1645 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1648 check_runtime_nocache sse_hw_available
{
1652 unsigned
int eax
, ebx
, ecx
, edx
;
1653 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1656 return !(edx
& bit_SSE
);
1663 #
Return 1 if the target supports executing SSE2 instructions
, 0
1664 # otherwise.
Cache the result.
1666 proc check_sse2_hw_available
{ } {
1667 return [check_cached_effective_target sse2_hw_available
{
1668 #
If this is not the right target
then we can skip the test.
1669 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1672 check_runtime_nocache sse2_hw_available
{
1676 unsigned
int eax
, ebx
, ecx
, edx
;
1677 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1680 return !(edx
& bit_SSE2
);
1687 #
Return 1 if the target supports executing SSE4 instructions
, 0
1688 # otherwise.
Cache the result.
1690 proc check_sse4_hw_available
{ } {
1691 return [check_cached_effective_target sse4_hw_available
{
1692 #
If this is not the right target
then we can skip the test.
1693 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1696 check_runtime_nocache sse4_hw_available
{
1700 unsigned
int eax
, ebx
, ecx
, edx
;
1701 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1704 return !(ecx
& bit_SSE4_2
);
1711 #
Return 1 if the target supports executing AVX instructions
, 0
1712 # otherwise.
Cache the result.
1714 proc check_avx_hw_available
{ } {
1715 return [check_cached_effective_target avx_hw_available
{
1716 #
If this is not the right target
then we can skip the test.
1717 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1720 check_runtime_nocache avx_hw_available
{
1724 unsigned
int eax
, ebx
, ecx
, edx
;
1725 if (!__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
1728 return ((ecx
& (bit_AVX | bit_OSXSAVE
))
1729 != (bit_AVX | bit_OSXSAVE
));
1736 #
Return 1 if the target supports executing AVX2 instructions
, 0
1737 # otherwise.
Cache the result.
1739 proc check_avx2_hw_available
{ } {
1740 return [check_cached_effective_target avx2_hw_available
{
1741 #
If this is not the right target
then we can skip the test.
1742 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1745 check_runtime_nocache avx2_hw_available
{
1750 unsigned
int eax
, ebx
, ecx
, edx
;
1752 if (__get_cpuid_max
(0, NULL
) < 7)
1755 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1757 if (!(ecx
& bit_OSXSAVE
))
1760 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1762 return !(ebx
& bit_AVX2
);
1769 #
Return 1 if the target supports executing AVX512 foundation instructions
, 0
1770 # otherwise.
Cache the result.
1772 proc check_avx512f_hw_available
{ } {
1773 return [check_cached_effective_target avx512f_hw_available
{
1774 #
If this is not the right target
then we can skip the test.
1775 if { !([istarget x86_64
-*-*] ||
[istarget i?
86-*-*]) } {
1778 check_runtime_nocache avx512f_hw_available
{
1783 unsigned
int eax
, ebx
, ecx
, edx
;
1785 if (__get_cpuid_max
(0, NULL
) < 7)
1788 __cpuid
(1, eax
, ebx
, ecx
, edx
);
1790 if (!(ecx
& bit_OSXSAVE
))
1793 __cpuid_count
(7, 0, eax
, ebx
, ecx
, edx
);
1795 return !(ebx
& bit_AVX512F
);
1802 #
Return 1 if the target supports running SSE executables
, 0 otherwise.
1804 proc check_effective_target_sse_runtime
{ } {
1805 if { [check_effective_target_sse
]
1806 && [check_sse_hw_available
]
1807 && [check_sse_os_support_available
] } {
1813 #
Return 1 if the target supports running SSE2 executables
, 0 otherwise.
1815 proc check_effective_target_sse2_runtime
{ } {
1816 if { [check_effective_target_sse2
]
1817 && [check_sse2_hw_available
]
1818 && [check_sse_os_support_available
] } {
1824 #
Return 1 if the target supports running SSE4 executables
, 0 otherwise.
1826 proc check_effective_target_sse4_runtime
{ } {
1827 if { [check_effective_target_sse4
]
1828 && [check_sse4_hw_available
]
1829 && [check_sse_os_support_available
] } {
1835 #
Return 1 if the target supports running AVX executables
, 0 otherwise.
1837 proc check_effective_target_avx_runtime
{ } {
1838 if { [check_effective_target_avx
]
1839 && [check_avx_hw_available
]
1840 && [check_avx_os_support_available
] } {
1846 #
Return 1 if the target supports running AVX2 executables
, 0 otherwise.
1848 proc check_effective_target_avx2_runtime
{ } {
1849 if { [check_effective_target_avx2
]
1850 && [check_avx2_hw_available
]
1851 && [check_avx_os_support_available
] } {
1857 #
Return 1 if the target supports running AVX512f executables
, 0 otherwise.
1859 proc check_effective_target_avx512f_runtime
{ } {
1860 if { [check_effective_target_avx512f
]
1861 && [check_avx512f_hw_available
]
1862 && [check_avx512_os_support_available
] } {
1868 #
Return 1 if bmi2 instructions can be compiled.
1869 proc check_effective_target_bmi2
{ } {
1870 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
1873 return [check_no_compiler_messages bmi2 object
{
1875 _bzhi_u32
(unsigned
int __X
, unsigned
int __Y
)
1877 return __builtin_ia32_bzhi_si
(__X
, __Y
);
1882 #
Return 1 if the target supports executing MIPS Paired
-Single instructions
,
1883 #
0 otherwise.
Cache the result.
1885 proc check_mpaired_single_hw_available
{ } {
1886 return [check_cached_effective_target mpaired_single_hw_available
{
1887 #
If this is not the right target
then we can skip the test.
1888 if { !([istarget mips
*-*-*]) } {
1891 check_runtime_nocache mpaired_single_hw_available
{
1894 asm volatile
("pll.ps $f2,$f4,$f6");
1902 #
Return 1 if the target supports executing Loongson vector instructions
,
1903 #
0 otherwise.
Cache the result.
1905 proc check_mips_loongson_hw_available
{ } {
1906 return [check_cached_effective_target mips_loongson_hw_available
{
1907 #
If this is not the right target
then we can skip the test.
1908 if { !([istarget mips
*-*-*]) } {
1911 check_runtime_nocache mips_loongson_hw_available
{
1912 #
include <loongson.h
>
1915 asm volatile
("paddw $f2,$f4,$f6");
1923 #
Return 1 if the target supports executing MIPS MSA instructions
, 0
1924 # otherwise.
Cache the result.
1926 proc check_mips_msa_hw_available
{ } {
1927 return [check_cached_effective_target mips_msa_hw_available
{
1928 #
If this is not the right target
then we can skip the test.
1929 if { !([istarget mips
*-*-*]) } {
1932 check_runtime_nocache mips_msa_hw_available
{
1933 #
if !defined
(__mips_msa
)
1934 #error
"MSA NOT AVAIL"
1936 #
if !(((__mips
== 64) ||
(__mips
== 32)) && (__mips_isa_rev
>= 2))
1937 #error
"MSA NOT AVAIL FOR ISA REV < 2"
1939 #
if !defined
(__mips_hard_float
)
1940 #error
"MSA HARD_FLOAT REQUIRED"
1942 #
if __mips_fpr
!= 64
1943 #error
"MSA 64-bit FPR REQUIRED"
1949 v8i16 v
= __builtin_msa_ldi_h
(0);
1959 #
Return 1 if the target supports running MIPS Paired
-Single
1960 # executables
, 0 otherwise.
1962 proc check_effective_target_mpaired_single_runtime
{ } {
1963 if { [check_effective_target_mpaired_single
]
1964 && [check_mpaired_single_hw_available
] } {
1970 #
Return 1 if the target supports running Loongson executables
, 0 otherwise.
1972 proc check_effective_target_mips_loongson_runtime
{ } {
1973 if { [check_effective_target_mips_loongson
]
1974 && [check_mips_loongson_hw_available
] } {
1980 #
Return 1 if the target supports running MIPS MSA executables
, 0 otherwise.
1982 proc check_effective_target_mips_msa_runtime
{ } {
1983 if { [check_effective_target_mips_msa
]
1984 && [check_mips_msa_hw_available
] } {
1990 #
Return 1 if we are compiling
for 64-bit PowerPC but we
do not use direct
1991 #
move instructions
for moves from GPR to FPR.
1993 proc check_effective_target_powerpc64_no_dm
{ } {
1994 # The
"mulld" checks if we are generating PowerPC64 code. The "lfd"
1995 # checks
if we
do not use direct moves
, but use the old
-fashioned
1996 # slower
move-via
-the
-stack.
1997 return [check_no_messages_and_pattern powerpc64_no_dm \
1998 {\mmulld\M.
*\mlfd
} assembly
{
1999 double f
(long long x
) { return x
*x
; }
2003 #
Return 1 if the target supports the __builtin_cpu_supports built
-in
,
2004 # including having a new enough library to support the test.
Cache the result.
2005 # Require at least a power7 to run
on.
2007 proc check_ppc_cpu_supports_hw_available
{ } {
2008 return [check_cached_effective_target ppc_cpu_supports_hw_available
{
2009 # Some simulators are known to not support VSX
/power8 instructions.
2010 #
For now
, disable
on Darwin
2011 if { [istarget powerpc
-*-eabi
]
2012 ||
[istarget powerpc
*-*-eabispe
]
2013 ||
[istarget
*-*-darwin
*]} {
2017 check_runtime_nocache ppc_cpu_supports_hw_available
{
2021 asm volatile
("xxlor vs0,vs0,vs0");
2023 asm volatile
("xxlor 0,0,0");
2025 if (!__builtin_cpu_supports
("vsx"))
2034 #
Return 1 if the target supports executing
750CL paired
-single instructions
, 0
2035 # otherwise.
Cache the result.
2037 proc check_750cl_hw_available
{ } {
2038 return [check_cached_effective_target
750cl_hw_available
{
2039 #
If this is not the right target
then we can skip the test.
2040 if { ![istarget powerpc
-*paired
*] } {
2043 check_runtime_nocache
750cl_hw_available
{
2047 asm volatile
("ps_mul v0,v0,v0");
2049 asm volatile
("ps_mul 0,0,0");
2058 #
Return 1 if the target supports executing power8 vector instructions
, 0
2059 # otherwise.
Cache the result.
2061 proc check_p8vector_hw_available
{ } {
2062 return [check_cached_effective_target p8vector_hw_available
{
2063 # Some simulators are known to not support VSX
/power8 instructions.
2064 #
For now
, disable
on Darwin
2065 if { [istarget powerpc
-*-eabi
]
2066 ||
[istarget powerpc
*-*-eabispe
]
2067 ||
[istarget
*-*-darwin
*]} {
2070 set options
"-mpower8-vector"
2071 check_runtime_nocache p8vector_hw_available
{
2075 asm volatile
("xxlorc vs0,vs0,vs0");
2077 asm volatile
("xxlorc 0,0,0");
2086 #
Return 1 if the target supports executing power9 vector instructions
, 0
2087 # otherwise.
Cache the result.
2089 proc check_p9vector_hw_available
{ } {
2090 return [check_cached_effective_target p9vector_hw_available
{
2091 # Some simulators are known to not support VSX
/power8
/power9
2092 # instructions.
For now
, disable
on Darwin.
2093 if { [istarget powerpc
-*-eabi
]
2094 ||
[istarget powerpc
*-*-eabispe
]
2095 ||
[istarget
*-*-darwin
*]} {
2098 set options
"-mpower9-vector"
2099 check_runtime_nocache p9vector_hw_available
{
2103 vector double v
= (vector double
) { 0.0, 0.0 };
2104 asm
("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2112 #
Return 1 if the target supports executing power9 modulo instructions
, 0
2113 # otherwise.
Cache the result.
2115 proc check_p9modulo_hw_available
{ } {
2116 return [check_cached_effective_target p9modulo_hw_available
{
2117 # Some simulators are known to not support VSX
/power8
/power9
2118 # instructions.
For now
, disable
on Darwin.
2119 if { [istarget powerpc
-*-eabi
]
2120 ||
[istarget powerpc
*-*-eabispe
]
2121 ||
[istarget
*-*-darwin
*]} {
2124 set options
"-mmodulo"
2125 check_runtime_nocache p9modulo_hw_available
{
2128 int i
= 5, j
= 3, r
= -1;
2129 asm
("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2137 #
Return 1 if the target supports executing __float128
on PowerPC via software
2138 # emulation
, 0 otherwise.
Cache the result.
2140 proc check_ppc_float128_sw_available
{ } {
2141 return [check_cached_effective_target ppc_float128_sw_available
{
2142 # Some simulators are known to not support VSX
/power8
/power9
2143 # instructions.
For now
, disable
on Darwin.
2144 if { [istarget powerpc
-*-eabi
]
2145 ||
[istarget powerpc
*-*-eabispe
]
2146 ||
[istarget
*-*-darwin
*]} {
2149 set options
"-mfloat128 -mvsx"
2150 check_runtime_nocache ppc_float128_sw_available
{
2151 volatile __float128 x
= 1.0q
;
2152 volatile __float128 y
= 2.0q
;
2155 __float128 z
= x
+ y
;
2163 #
Return 1 if the target supports executing __float128
on PowerPC via power9
2164 # hardware instructions
, 0 otherwise.
Cache the result.
2166 proc check_ppc_float128_hw_available
{ } {
2167 return [check_cached_effective_target ppc_float128_hw_available
{
2168 # Some simulators are known to not support VSX
/power8
/power9
2169 # instructions.
For now
, disable
on Darwin.
2170 if { [istarget powerpc
-*-eabi
]
2171 ||
[istarget powerpc
*-*-eabispe
]
2172 ||
[istarget
*-*-darwin
*]} {
2175 set options
"-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2176 check_runtime_nocache ppc_float128_hw_available
{
2177 volatile __float128 x
= 1.0q
;
2178 volatile __float128 y
= 2.0q
;
2181 __float128 z
= x
+ y
;
2182 __float128 w
= -1.0q
;
2184 __asm__
("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2185 return ((z
!= 3.0q
) ||
(z
!= w
);
2192 #
Return 1 if the target supports executing VSX instructions
, 0
2193 # otherwise.
Cache the result.
2195 proc check_vsx_hw_available
{ } {
2196 return [check_cached_effective_target vsx_hw_available
{
2197 # Some simulators are known to not support VSX instructions.
2198 #
For now
, disable
on Darwin
2199 if { [istarget powerpc
-*-eabi
]
2200 ||
[istarget powerpc
*-*-eabispe
]
2201 ||
[istarget
*-*-darwin
*]} {
2205 check_runtime_nocache vsx_hw_available
{
2209 asm volatile
("xxlor vs0,vs0,vs0");
2211 asm volatile
("xxlor 0,0,0");
2220 #
Return 1 if the target supports executing AltiVec instructions
, 0
2221 # otherwise.
Cache the result.
2223 proc check_vmx_hw_available
{ } {
2224 return [check_cached_effective_target vmx_hw_available
{
2225 # Some simulators are known to not support VMX instructions.
2226 if { [istarget powerpc
-*-eabi
] ||
[istarget powerpc
*-*-eabispe
] } {
2229 # Most targets don
't require special flags for this test case, but
2230 # Darwin does. Just to be sure, make sure VSX is not enabled for
2231 # the altivec tests.
2232 if { [istarget *-*-darwin*]
2233 || [istarget *-*-aix*] } {
2234 set options "-maltivec -mno-vsx"
2236 set options "-mno-vsx"
2238 check_runtime_nocache vmx_hw_available {
2242 asm volatile ("vor v0,v0,v0");
2244 asm volatile ("vor 0,0,0");
2253 proc check_ppc_recip_hw_available { } {
2254 return [check_cached_effective_target ppc_recip_hw_available {
2255 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2256 # For now, disable on Darwin
2257 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2260 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2261 check_runtime_nocache ppc_recip_hw_available {
2262 volatile double d_recip, d_rsqrt, d_four = 4.0;
2263 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2266 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2267 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2268 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2269 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2277 # Return 1 if the target supports executing AltiVec and Cell PPU
2278 # instructions, 0 otherwise. Cache the result.
2280 proc check_effective_target_cell_hw { } {
2281 return [check_cached_effective_target cell_hw_available {
2282 # Some simulators are known to not support VMX and PPU instructions.
2283 if { [istarget powerpc-*-eabi*] } {
2286 # Most targets don't require special flags
for this test
2287 # case
, but Darwin and AIX
do.
2288 if { [istarget
*-*-darwin
*]
2289 ||
[istarget
*-*-aix
*] } {
2290 set options
"-maltivec -mcpu=cell"
2292 set options
"-mcpu=cell"
2294 check_runtime_nocache cell_hw_available
{
2298 asm volatile
("vor v0,v0,v0");
2299 asm volatile
("lvlx v0,r0,r0");
2301 asm volatile
("vor 0,0,0");
2302 asm volatile
("lvlx 0,0,0");
2311 #
Return 1 if the target supports executing
64-bit instructions
, 0
2312 # otherwise.
Cache the result.
2314 proc check_effective_target_powerpc64
{ } {
2315 global powerpc64_available_saved
2318 if [info exists powerpc64_available_saved
] {
2319 verbose
"check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2321 set powerpc64_available_saved
0
2323 # Some simulators are known to not support powerpc64 instructions.
2324 if { [istarget powerpc
-*-eabi
*] ||
[istarget powerpc
-ibm
-aix
*] } {
2325 verbose
"check_effective_target_powerpc64 returning 0" 2
2326 return $powerpc64_available_saved
2329 #
Set up
, compile, and
execute a test
program containing a
64-bit
2330 # instruction.
Include the current process ID in the file
2331 # names to prevent conflicts with invocations
for multiple
2336 set f
[open $src
"w"]
2337 puts $f
"int main() {"
2338 puts $f
"#ifdef __MACH__"
2339 puts $f
" asm volatile (\"extsw r0,r0\");"
2341 puts $f
" asm volatile (\"extsw 0,0\");"
2343 puts $f
" return 0; }"
2346 set opts
"additional_flags=-mcpu=G5"
2348 verbose
"check_effective_target_powerpc64 compiling testfile $src" 2
2349 set lines
[$
{tool
}_target_compile $src $exe executable
"$opts"]
2352 if [string match
"" $lines] then {
2353 # No error message
, compilation succeeded.
2354 set result
[$
{tool
}_load
"./$exe" "" ""]
2355 set status [lindex $result
0]
2356 remote_file build
delete $exe
2357 verbose
"check_effective_target_powerpc64 testfile status is <$status>" 2
2359 if { $
status == "pass" } then {
2360 set powerpc64_available_saved
1
2363 verbose
"check_effective_target_powerpc64 testfile compilation failed" 2
2367 return $powerpc64_available_saved
2370 # GCC
3.4.0 for powerpc64
-*-linux
* included an ABI fix
for passing
2371 # complex float arguments. This affects gfortran tests that
call cabsf
2372 # in libm built by an earlier compiler.
Return 0 if libm uses the same
2373 #
argument passing as the compiler under test
, 1 otherwise.
2375 proc check_effective_target_broken_cplxf_arg
{ } {
2376 # Skip the work
for targets known not to be affected.
2377 if { ![istarget powerpc
*-*-linux
*] ||
![is
-effective
-target lp64
] } {
2381 return [check_cached_effective_target broken_cplxf_arg
{
2382 check_runtime_nocache broken_cplxf_arg
{
2383 #
include <complex.h
>
2384 extern void abort
(void
);
2385 float fabsf
(float
);
2386 float cabsf
(_Complex float
);
2393 if (fabsf
(f
- 5.0) > 0.0001)
2394 /* Yes
, it
's broken. */
2396 /* All fine, not broken. */
2403 # Return 1 is this is a TI C6X target supporting C67X instructions
2404 proc check_effective_target_ti_c67x { } {
2405 return [check_no_compiler_messages ti_c67x assembly {
2406 #if !defined(_TMS320C6700)
2407 #error !_TMS320C6700
2412 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2413 proc check_effective_target_ti_c64xp { } {
2414 return [check_no_compiler_messages ti_c64xp assembly {
2415 #if !defined(_TMS320C6400_PLUS)
2416 #error !_TMS320C6400_PLUS
2422 proc check_alpha_max_hw_available { } {
2423 return [check_runtime alpha_max_hw_available {
2424 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2428 # Returns true iff the FUNCTION is available on the target system.
2429 # (This is essentially a Tcl implementation of Autoconf's
2432 proc check_function_available
{ function
} {
2433 return [check_no_compiler_messages $
{function
}_available \
2439 int main
() { $function
(); }
2443 # Returns true iff
"fork" is available on the target system.
2445 proc check_fork_available
{} {
2446 return [check_function_available
"fork"]
2449 # Returns true iff
"mkfifo" is available on the target system.
2451 proc check_mkfifo_available
{} {
2452 if { [istarget
*-*-cygwin
*] } {
2453 # Cygwin has mkfifo
, but support is incomplete.
2457 return [check_function_available
"mkfifo"]
2460 # Returns true iff
"__cxa_atexit" is used on the target system.
2462 proc check_cxa_atexit_available
{ } {
2463 return [check_cached_effective_target cxa_atexit_available
{
2464 if { [istarget hppa
*-*-hpux10
*] } {
2465 # HP
-UX
10 doesn
't have __cxa_atexit but subsequent test passes.
2467 } elseif { [istarget *-*-vxworks] } {
2468 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2471 check_runtime_nocache cxa_atexit_available
{
2474 static unsigned
int count;
2491 Y
() { f
(); count = 2; }
2500 int main
() { return 0; }
2506 proc check_effective_target_objc2
{ } {
2507 return [check_no_compiler_messages objc2 object
{
2516 proc check_effective_target_next_runtime
{ } {
2517 return [check_no_compiler_messages objc2 object
{
2518 #ifdef __NEXT_RUNTIME__
2521 #error
!__NEXT_RUNTIME__
2526 #
Return 1 if we
're generating code for big-endian memory order.
2528 proc check_effective_target_be { } {
2529 return [check_no_compiler_messages be object {
2530 int dummy[__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ? 1 : -1];
2534 # Return 1 if we're generating code
for little
-endian memory order.
2536 proc check_effective_target_le
{ } {
2537 return [check_no_compiler_messages le object
{
2538 int dummy
[__BYTE_ORDER__
== __ORDER_LITTLE_ENDIAN__ ?
1 : -1];
2542 #
Return 1 if we
're generating 32-bit code using default options, 0
2545 proc check_effective_target_ilp32 { } {
2546 return [check_no_compiler_messages ilp32 object {
2547 int dummy[sizeof (int) == 4
2548 && sizeof (void *) == 4
2549 && sizeof (long) == 4 ? 1 : -1];
2553 # Return 1 if we're generating ia32 code using default options
, 0
2556 proc check_effective_target_ia32
{ } {
2557 return [check_no_compiler_messages ia32 object
{
2558 int dummy
[sizeof
(int) == 4
2559 && sizeof
(void
*) == 4
2560 && sizeof
(long
) == 4 ?
1 : -1] = { __i386__
};
2564 #
Return 1 if we
're generating x32 code using default options, 0
2567 proc check_effective_target_x32 { } {
2568 return [check_no_compiler_messages x32 object {
2569 int dummy[sizeof (int) == 4
2570 && sizeof (void *) == 4
2571 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2575 # Return 1 if we're generating
32-bit integers using default
2576 # options
, 0 otherwise.
2578 proc check_effective_target_int32
{ } {
2579 return [check_no_compiler_messages int32 object
{
2580 int dummy
[sizeof
(int) == 4 ?
1 : -1];
2584 #
Return 1 if we
're generating 32-bit or larger integers using default
2585 # options, 0 otherwise.
2587 proc check_effective_target_int32plus { } {
2588 return [check_no_compiler_messages int32plus object {
2589 int dummy[sizeof (int) >= 4 ? 1 : -1];
2593 # Return 1 if we're generating
32-bit or larger pointers using default
2594 # options
, 0 otherwise.
2596 proc check_effective_target_ptr32plus
{ } {
2597 # The msp430 has
16-bit or
20-bit pointers. The
20-bit pointer is stored
2598 # in a
32-bit slot when in memory
, so sizeof
(void
*) returns
4, but it
2599 # cannot really hold a
32-bit address
, so we always
return false here.
2600 if { [istarget msp430
-*-*] } {
2604 return [check_no_compiler_messages ptr32plus object
{
2605 int dummy
[sizeof
(void
*) >= 4 ?
1 : -1];
2609 #
Return 1 if we support
32-bit or larger array and structure sizes
2610 # using default options
, 0 otherwise. Avoid false positive
on
2611 # targets with
20 or
24 bit address spaces.
2613 proc check_effective_target_size32plus
{ } {
2614 return [check_no_compiler_messages size32plus object
{
2615 char dummy
[16777217L];
2619 # Returns
1 if we
're generating 16-bit or smaller integers with the
2620 # default options, 0 otherwise.
2622 proc check_effective_target_int16 { } {
2623 return [check_no_compiler_messages int16 object {
2624 int dummy[sizeof (int) < 4 ? 1 : -1];
2628 # Return 1 if we're generating
64-bit code using default options
, 0
2631 proc check_effective_target_lp64
{ } {
2632 return [check_no_compiler_messages lp64 object
{
2633 int dummy
[sizeof
(int) == 4
2634 && sizeof
(void
*) == 8
2635 && sizeof
(long
) == 8 ?
1 : -1];
2639 #
Return 1 if we
're generating 64-bit code using default llp64 options,
2642 proc check_effective_target_llp64 { } {
2643 return [check_no_compiler_messages llp64 object {
2644 int dummy[sizeof (int) == 4
2645 && sizeof (void *) == 8
2646 && sizeof (long long) == 8
2647 && sizeof (long) == 4 ? 1 : -1];
2651 # Return 1 if long and int have different sizes,
2654 proc check_effective_target_long_neq_int { } {
2655 return [check_no_compiler_messages long_ne_int object {
2656 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2660 # Return 1 if the target supports long double larger than double,
2663 proc check_effective_target_large_long_double { } {
2664 return [check_no_compiler_messages large_long_double object {
2665 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2669 # Return 1 if the target supports double larger than float,
2672 proc check_effective_target_large_double { } {
2673 return [check_no_compiler_messages large_double object {
2674 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2678 # Return 1 if the target supports long double of 128 bits,
2681 proc check_effective_target_longdouble128 { } {
2682 return [check_no_compiler_messages longdouble128 object {
2683 int dummy[sizeof(long double) == 16 ? 1 : -1];
2687 # Return 1 if the target supports double of 64 bits,
2690 proc check_effective_target_double64 { } {
2691 return [check_no_compiler_messages double64 object {
2692 int dummy[sizeof(double) == 8 ? 1 : -1];
2696 # Return 1 if the target supports double of at least 64 bits,
2699 proc check_effective_target_double64plus { } {
2700 return [check_no_compiler_messages double64plus object {
2701 int dummy[sizeof(double) >= 8 ? 1 : -1];
2705 # Return 1 if the target supports 'w
' suffix on floating constant
2708 proc check_effective_target_has_w_floating_suffix { } {
2710 if [check_effective_target_c++] {
2711 append opts "-std=gnu++03"
2713 return [check_no_compiler_messages w_fp_suffix object {
2718 # Return 1 if the target supports 'q
' suffix on floating constant
2721 proc check_effective_target_has_q_floating_suffix { } {
2723 if [check_effective_target_c++] {
2724 append opts "-std=gnu++03"
2726 return [check_no_compiler_messages q_fp_suffix object {
2731 # Return 1 if the target supports the _FloatN / _FloatNx type
2732 # indicated in the function name, 0 otherwise.
2734 proc check_effective_target_float16 {} {
2735 return [check_no_compiler_messages_nocache float16 object {
2737 } [add_options_for_float16 ""]]
2740 proc check_effective_target_float32 {} {
2741 return [check_no_compiler_messages_nocache float32 object {
2743 } [add_options_for_float32 ""]]
2746 proc check_effective_target_float64 {} {
2747 return [check_no_compiler_messages_nocache float64 object {
2749 } [add_options_for_float64 ""]]
2752 proc check_effective_target_float128 {} {
2753 return [check_no_compiler_messages_nocache float128 object {
2755 } [add_options_for_float128 ""]]
2758 proc check_effective_target_float32x {} {
2759 return [check_no_compiler_messages_nocache float32x object {
2761 } [add_options_for_float32x ""]]
2764 proc check_effective_target_float64x {} {
2765 return [check_no_compiler_messages_nocache float64x object {
2767 } [add_options_for_float64x ""]]
2770 proc check_effective_target_float128x {} {
2771 return [check_no_compiler_messages_nocache float128x object {
2773 } [add_options_for_float128x ""]]
2776 # Likewise, but runtime support for any special options used as well
2777 # as compile-time support is required.
2779 proc check_effective_target_float16_runtime {} {
2780 return [check_effective_target_float16]
2783 proc check_effective_target_float32_runtime {} {
2784 return [check_effective_target_float32]
2787 proc check_effective_target_float64_runtime {} {
2788 return [check_effective_target_float64]
2791 proc check_effective_target_float128_runtime {} {
2792 if { ![check_effective_target_float128] } {
2795 if { [istarget powerpc*-*-*] } {
2796 return [check_effective_target_base_quadfloat_support]
2801 proc check_effective_target_float32x_runtime {} {
2802 return [check_effective_target_float32x]
2805 proc check_effective_target_float64x_runtime {} {
2806 if { ![check_effective_target_float64x] } {
2809 if { [istarget powerpc*-*-*] } {
2810 return [check_effective_target_base_quadfloat_support]
2815 proc check_effective_target_float128x_runtime {} {
2816 return [check_effective_target_float128x]
2819 # Return 1 if the target hardware supports any options added for
2820 # _FloatN and _FloatNx types, 0 otherwise.
2822 proc check_effective_target_floatn_nx_runtime {} {
2823 if { [istarget powerpc*-*-aix*] } {
2826 if { [istarget powerpc*-*-*] } {
2827 return [check_effective_target_base_quadfloat_support]
2832 # Add options needed to use the _FloatN / _FloatNx type indicated in
2833 # the function name.
2835 proc add_options_for_float16 { flags } {
2836 if { [istarget arm*-*-*] } {
2837 return "$flags -mfp16-format=ieee"
2842 proc add_options_for_float32 { flags } {
2846 proc add_options_for_float64 { flags } {
2850 proc add_options_for_float128 { flags } {
2851 return [add_options_for___float128 "$flags"]
2854 proc add_options_for_float32x { flags } {
2858 proc add_options_for_float64x { flags } {
2859 return [add_options_for___float128 "$flags"]
2862 proc add_options_for_float128x { flags } {
2866 # Return 1 if the target supports __float128,
2869 proc check_effective_target___float128 { } {
2870 if { [istarget powerpc*-*-*] } {
2871 return [check_ppc_float128_sw_available]
2873 if { [istarget ia64-*-*]
2874 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2880 proc add_options_for___float128 { flags } {
2881 if { [istarget powerpc*-*-*] } {
2882 return "$flags -mfloat128 -mvsx"
2887 # Return 1 if the target supports any special run-time requirements
2888 # for __float128 or _Float128,
2891 proc check_effective_target_base_quadfloat_support { } {
2892 if { [istarget powerpc*-*-*] } {
2893 return [check_vsx_hw_available]
2898 # Return 1 if the target supports all four forms of fused multiply-add
2899 # (fma, fms, fnma, and fnms) for both float and double.
2901 proc check_effective_target_scalar_all_fma { } {
2902 return [istarget aarch64*-*-*]
2905 # Return 1 if the target supports compiling fixed-point,
2908 proc check_effective_target_fixed_point { } {
2909 return [check_no_compiler_messages fixed_point object {
2910 _Sat _Fract x; _Sat _Accum y;
2914 # Return 1 if the target supports compiling decimal floating point,
2917 proc check_effective_target_dfp_nocache { } {
2918 verbose "check_effective_target_dfp_nocache: compiling source" 2
2919 set ret [check_no_compiler_messages_nocache dfp object {
2920 float x __attribute__((mode(DD)));
2922 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2926 proc check_effective_target_dfprt_nocache { } {
2927 return [check_runtime_nocache dfprt {
2928 typedef float d64 __attribute__((mode(DD)));
2929 d64 x = 1.2df, y = 2.3dd, z;
2930 int main () { z = x + y; return 0; }
2934 # Return 1 if the target supports compiling Decimal Floating Point,
2937 # This won't change
for different subtargets so
cache the result.
2939 proc check_effective_target_dfp
{ } {
2940 return [check_cached_effective_target dfp
{
2941 check_effective_target_dfp_nocache
2945 #
Return 1 if the target supports linking and executing Decimal Floating
2946 # Point
, 0 otherwise.
2948 # This won
't change for different subtargets so cache the result.
2950 proc check_effective_target_dfprt { } {
2951 return [check_cached_effective_target dfprt {
2952 check_effective_target_dfprt_nocache
2956 proc check_effective_target_powerpc_popcntb_ok { } {
2957 return [check_cached_effective_target powerpc_popcntb_ok {
2959 # Disable on Darwin.
2960 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2963 check_runtime_nocache powerpc_popcntb_ok {
2965 volatile int a = 0x12345678;
2968 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2976 # Return 1 if the target supports executing DFP hardware instructions,
2977 # 0 otherwise. Cache the result.
2979 proc check_dfp_hw_available { } {
2980 return [check_cached_effective_target dfp_hw_available {
2981 # For now, disable on Darwin
2982 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2985 check_runtime_nocache dfp_hw_available {
2986 volatile _Decimal64 r;
2987 volatile _Decimal64 a = 4.0DD;
2988 volatile _Decimal64 b = 2.0DD;
2991 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2992 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2993 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2994 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2997 } "-mcpu=power6 -mhard-float"
3002 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3004 proc check_effective_target_ucn_nocache { } {
3005 # -std=c99 is only valid for C
3006 if [check_effective_target_c] {
3007 set ucnopts "-std=c99"
3011 verbose "check_effective_target_ucn_nocache: compiling source" 2
3012 set ret [check_no_compiler_messages_nocache ucn object {
3015 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3019 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3021 # This won't change
for different subtargets
, so
cache the result.
3023 proc check_effective_target_ucn
{ } {
3024 return [check_cached_effective_target ucn
{
3025 check_effective_target_ucn_nocache
3029 #
Return 1 if the target needs a command line
argument to enable a SIMD
3032 proc check_effective_target_vect_cmdline_needed
{ } {
3033 global et_vect_cmdline_needed_saved
3034 global et_vect_cmdline_needed_target_name
3036 if { ![info exists et_vect_cmdline_needed_target_name
] } {
3037 set et_vect_cmdline_needed_target_name
""
3040 #
If the target has changed since we
set the cached value
, clear it.
3041 set current_target
[current_target_name
]
3042 if { $current_target
!= $et_vect_cmdline_needed_target_name
} {
3043 verbose
"check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3044 set et_vect_cmdline_needed_target_name $current_target
3045 if { [info exists et_vect_cmdline_needed_saved
] } {
3046 verbose
"check_effective_target_vect_cmdline_needed: removing cached result" 2
3047 unset et_vect_cmdline_needed_saved
3051 if [info exists et_vect_cmdline_needed_saved
] {
3052 verbose
"check_effective_target_vect_cmdline_needed: using cached result" 2
3054 set et_vect_cmdline_needed_saved
1
3055 if { [istarget alpha
*-*-*]
3056 ||
[istarget ia64
-*-*]
3057 ||
(([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
3058 && ![is
-effective
-target ia32
])
3059 ||
([istarget powerpc
*-*-*]
3060 && ([check_effective_target_powerpc_spe
]
3061 ||
[check_effective_target_powerpc_altivec
]))
3062 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_vis
])
3063 ||
[istarget spu
-*-*]
3064 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon
])
3065 ||
[istarget aarch64
*-*-*] } {
3066 set et_vect_cmdline_needed_saved
0
3070 verbose
"check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
3071 return $et_vect_cmdline_needed_saved
3074 #
Return 1 if the target supports hardware vectors of
int, 0 otherwise.
3076 # This won
't change for different subtargets so cache the result.
3078 proc check_effective_target_vect_int { } {
3079 global et_vect_int_saved
3082 if [info exists et_vect_int_saved($et_index)] {
3083 verbose "check_effective_target_vect_int: using cached result" 2
3085 set et_vect_int_saved($et_index) 0
3086 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3087 || ([istarget powerpc*-*-*]
3088 && ![istarget powerpc-*-linux*paired*])
3089 || [istarget spu-*-*]
3090 || [istarget sparc*-*-*]
3091 || [istarget alpha*-*-*]
3092 || [istarget ia64-*-*]
3093 || [istarget aarch64*-*-*]
3094 || [is-effective-target arm_neon]
3095 || ([istarget mips*-*-*]
3096 && ([et-is-effective-target mips_loongson]
3097 || [et-is-effective-target mips_msa]))
3098 || ([istarget s390*-*-*]
3099 && [check_effective_target_s390_vx]) } {
3100 set et_vect_int_saved($et_index) 1
3104 verbose "check_effective_target_vect_int:\
3105 returning $et_vect_int_saved($et_index)" 2
3106 return $et_vect_int_saved($et_index)
3109 # Return 1 if the target supports signed int->float conversion
3112 proc check_effective_target_vect_intfloat_cvt { } {
3113 global et_vect_intfloat_cvt_saved
3116 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
3117 verbose "check_effective_target_vect_intfloat_cvt:\
3118 using cached result" 2
3120 set et_vect_intfloat_cvt_saved($et_index) 0
3121 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3122 || ([istarget powerpc*-*-*]
3123 && ![istarget powerpc-*-linux*paired*])
3124 || [is-effective-target arm_neon]
3125 || ([istarget mips*-*-*]
3126 && [et-is-effective-target mips_msa]) } {
3127 set et_vect_intfloat_cvt_saved($et_index) 1
3131 verbose "check_effective_target_vect_intfloat_cvt:\
3132 returning $et_vect_intfloat_cvt_saved($et_index)" 2
3133 return $et_vect_intfloat_cvt_saved($et_index)
3136 # Return 1 if the target supports signed double->int conversion
3139 proc check_effective_target_vect_doubleint_cvt { } {
3140 global et_vect_doubleint_cvt_saved
3143 if [info exists et_vect_doubleint_cvt_saved($et_index)] {
3144 verbose "check_effective_target_vect_doubleint_cvt: using cached result" 2
3146 set et_vect_doubleint_cvt_saved($et_index) 0
3147 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3148 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3149 #ifdef __tune_atom__
3150 # error No double vectorizer support.
3153 || [istarget aarch64*-*-*]
3154 || [istarget spu-*-*]
3155 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3156 || ([istarget mips*-*-*]
3157 && [et-is-effective-target mips_msa]) } {
3158 set et_vect_doubleint_cvt_saved($et_index) 1
3162 verbose "check_effective_target_vect_doubleint_cvt:\
3163 returning $et_vect_doubleint_cvt_saved($et_index)" 2
3164 return $et_vect_doubleint_cvt_saved($et_index)
3167 # Return 1 if the target supports signed int->double conversion
3170 proc check_effective_target_vect_intdouble_cvt { } {
3171 global et_vect_intdouble_cvt_saved
3174 if [info exists et_vect_intdouble_cvt_saved($et_index)] {
3175 verbose "check_effective_target_vect_intdouble_cvt: using cached result" 2
3177 set et_vect_intdouble_cvt_saved($et_index) 0
3178 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3179 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3180 #ifdef __tune_atom__
3181 # error No double vectorizer support.
3184 || [istarget aarch64*-*-*]
3185 || [istarget spu-*-*]
3186 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3187 || ([istarget mips*-*-*]
3188 && [et-is-effective-target mips_msa]) } {
3189 set et_vect_intdouble_cvt_saved($et_index) 1
3193 verbose "check_effective_target_vect_intdouble_cvt:\
3194 returning $et_vect_intdouble_cvt_saved($et_index)" 2
3195 return $et_vect_intdouble_cvt_saved($et_index)
3198 #Return 1 if we're supporting __int128
for target
, 0 otherwise.
3200 proc check_effective_target_int128
{ } {
3201 return [check_no_compiler_messages int128 object
{
3203 #ifndef __SIZEOF_INT128__
3212 #
Return 1 if the target supports unsigned
int->float conversion
3215 proc check_effective_target_vect_uintfloat_cvt
{ } {
3216 global et_vect_uintfloat_cvt_saved
3219 if [info exists et_vect_uintfloat_cvt_saved
($et_index
)] {
3220 verbose
"check_effective_target_vect_uintfloat_cvt:\
3221 using cached result
" 2
3223 set et_vect_uintfloat_cvt_saved
($et_index
) 0
3224 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3225 ||
([istarget powerpc
*-*-*]
3226 && ![istarget powerpc
-*-linux
*paired
*])
3227 ||
[istarget aarch64
*-*-*]
3228 ||
[is
-effective
-target arm_neon
]
3229 ||
([istarget mips
*-*-*]
3230 && [et
-is
-effective
-target mips_msa
]) } {
3231 set et_vect_uintfloat_cvt_saved
($et_index
) 1
3235 verbose
"check_effective_target_vect_uintfloat_cvt:\
3236 returning $et_vect_uintfloat_cvt_saved
($et_index
)" 2
3237 return $et_vect_uintfloat_cvt_saved
($et_index
)
3241 #
Return 1 if the target supports signed float
->int conversion
3244 proc check_effective_target_vect_floatint_cvt
{ } {
3245 global et_vect_floatint_cvt_saved
3248 if [info exists et_vect_floatint_cvt_saved
($et_index
)] {
3249 verbose
"check_effective_target_vect_floatint_cvt:\
3250 using cached result
" 2
3252 set et_vect_floatint_cvt_saved
($et_index
) 0
3253 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
3254 ||
([istarget powerpc
*-*-*]
3255 && ![istarget powerpc
-*-linux
*paired
*])
3256 ||
[is
-effective
-target arm_neon
]
3257 ||
([istarget mips
*-*-*]
3258 && [et
-is
-effective
-target mips_msa
]) } {
3259 set et_vect_floatint_cvt_saved
($et_index
) 1
3263 verbose
"check_effective_target_vect_floatint_cvt:\
3264 returning $et_vect_floatint_cvt_saved
($et_index
)" 2
3265 return $et_vect_floatint_cvt_saved
($et_index
)
3268 #
Return 1 if the target supports unsigned float
->int conversion
3271 proc check_effective_target_vect_floatuint_cvt
{ } {
3272 global et_vect_floatuint_cvt_saved
3275 if [info exists et_vect_floatuint_cvt_saved
($et_index
)] {
3276 verbose
"check_effective_target_vect_floatuint_cvt:\
3277 using cached result
" 2
3279 set et_vect_floatuint_cvt_saved
($et_index
) 0
3280 if { ([istarget powerpc
*-*-*]
3281 && ![istarget powerpc
-*-linux
*paired
*])
3282 ||
[is
-effective
-target arm_neon
]
3283 ||
([istarget mips
*-*-*]
3284 && [et
-is
-effective
-target mips_msa
]) } {
3285 set et_vect_floatuint_cvt_saved
($et_index
) 1
3289 verbose
"check_effective_target_vect_floatuint_cvt:\
3290 returning $et_vect_floatuint_cvt_saved
($et_index
)" 2
3291 return $et_vect_floatuint_cvt_saved
($et_index
)
3294 #
Return 1 if peeling
for alignment might be profitable
on the target
3297 proc check_effective_target_vect_peeling_profitable
{ } {
3298 global et_vect_peeling_profitable_saved
3301 if [info exists et_vect_peeling_profitable_saved
($et_index
)] {
3302 verbose
"check_effective_target_vect_peeling_profitable: using cached result" 2
3304 set et_vect_peeling_profitable_saved
($et_index
) 1
3305 if { ([istarget s390
*-*-*]
3306 && [check_effective_target_s390_vx
])
3307 ||
[check_effective_target_vect_element_align_preferred
] } {
3308 set et_vect_peeling_profitable_saved
($et_index
) 0
3312 verbose
"check_effective_target_vect_peeling_profitable:\
3313 returning $et_vect_peeling_profitable_saved
($et_index
)" 2
3314 return $et_vect_peeling_profitable_saved
($et_index
)
3317 #
Return 1 if the target supports #pragma omp declare simd
, 0 otherwise.
3319 # This won
't change for different subtargets so cache the result.
3321 proc check_effective_target_vect_simd_clones { } {
3322 global et_vect_simd_clones_saved
3325 if [info exists et_vect_simd_clones_saved($et_index)] {
3326 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3328 set et_vect_simd_clones_saved($et_index) 0
3329 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3330 # avx2 and avx512f clone. Only the right clone for the
3331 # specified arch will be chosen, but still we need to at least
3332 # be able to assemble avx512f.
3333 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3334 && [check_effective_target_avx512f]) } {
3335 set et_vect_simd_clones_saved($et_index) 1
3339 verbose "check_effective_target_vect_simd_clones:\
3340 returning $et_vect_simd_clones_saved($et_index)" 2
3341 return $et_vect_simd_clones_saved($et_index)
3344 # Return 1 if this is a AArch64 target supporting big endian
3345 proc check_effective_target_aarch64_big_endian { } {
3346 return [check_no_compiler_messages aarch64_big_endian assembly {
3347 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3348 #error !__aarch64__ || !__AARCH64EB__
3353 # Return 1 if this is a AArch64 target supporting little endian
3354 proc check_effective_target_aarch64_little_endian { } {
3355 if { ![istarget aarch64*-*-*] } {
3359 return [check_no_compiler_messages aarch64_little_endian assembly {
3360 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3366 # Return 1 if this is an AArch64 target supporting SVE.
3367 proc check_effective_target_aarch64_sve { } {
3368 if { ![istarget aarch64*-*-*] } {
3371 return [check_no_compiler_messages aarch64_sve assembly {
3372 #if !defined (__ARM_FEATURE_SVE)
3378 # Return the size in bits of an SVE vector, or 0 if the size is variable.
3379 proc aarch64_sve_bits { } {
3380 return [check_cached_effective_target aarch64_sve_bits {
3383 set src dummy[pid].c
3384 set f [open $src "w"]
3385 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
3387 set output [${tool}_target_compile $src "" preprocess ""]
3390 regsub {.*bits = ([^;]*);.*} $output {\1} bits
3395 # Return 1 if this is a compiler supporting ARC atomic operations
3396 proc check_effective_target_arc_atomic { } {
3397 return [check_no_compiler_messages arc_atomic assembly {
3398 #if !defined(__ARC_ATOMIC__)
3404 # Return 1 if this is an arm target using 32-bit instructions
3405 proc check_effective_target_arm32 { } {
3406 if { ![istarget arm*-*-*] } {
3410 return [check_no_compiler_messages arm32 assembly {
3411 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3412 #error !__arm || __thumb__ && !__thumb2__
3417 # Return 1 if this is an arm target not using Thumb
3418 proc check_effective_target_arm_nothumb { } {
3419 if { ![istarget arm*-*-*] } {
3423 return [check_no_compiler_messages arm_nothumb assembly {
3424 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3425 #error !__arm__ || __thumb || __thumb2__
3430 # Return 1 if this is a little-endian ARM target
3431 proc check_effective_target_arm_little_endian { } {
3432 if { ![istarget arm*-*-*] } {
3436 return [check_no_compiler_messages arm_little_endian assembly {
3437 #if !defined(__arm__) || !defined(__ARMEL__)
3438 #error !__arm__ || !__ARMEL__
3443 # Return 1 if this is an ARM target that only supports aligned vector accesses
3444 proc check_effective_target_arm_vect_no_misalign { } {
3445 if { ![istarget arm*-*-*] } {
3449 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3450 #if !defined(__arm__) \
3451 || (defined(__ARM_FEATURE_UNALIGNED) \
3452 && defined(__ARMEL__))
3453 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3459 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
3460 # multilibs may be incompatible with this option.
3462 proc check_effective_target_arm_soft_ok { } {
3463 if { [check_effective_target_arm32] } {
3464 return [check_no_compiler_messages arm_soft_ok executable {
3465 int main() { return 0;}
3466 } "-mfloat-abi=soft"]
3472 # Return 1 if this is an ARM target supporting -mfpu=vfp
3473 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3476 proc check_effective_target_arm_vfp_ok { } {
3477 if { [check_effective_target_arm32] } {
3478 return [check_no_compiler_messages arm_vfp_ok object {
3480 } "-mfpu=vfp -mfloat-abi=softfp"]
3486 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3487 # -mfloat-abi=softfp.
3489 proc check_effective_target_arm_vfp3_ok { } {
3490 if { [check_effective_target_arm32] } {
3491 return [check_no_compiler_messages arm_vfp3_ok object {
3493 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3499 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3500 # -mfloat-abi=softfp.
3501 proc check_effective_target_arm_v8_vfp_ok {} {
3502 if { [check_effective_target_arm32] } {
3503 return [check_no_compiler_messages arm_v8_vfp_ok object {
3506 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3509 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3515 # Return 1 if this is an ARM target supporting -mfpu=vfp
3516 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3519 proc check_effective_target_arm_hard_vfp_ok { } {
3520 if { [check_effective_target_arm32]
3521 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3522 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3523 int main() { return 0;}
3524 } "-mfpu=vfp -mfloat-abi=hard"]
3530 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3531 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3532 # incompatible with these options. Also set et_arm_fp_flags to the
3533 # best options to add.
3535 proc check_effective_target_arm_fp_ok_nocache { } {
3536 global et_arm_fp_flags
3537 set et_arm_fp_flags ""
3538 if { [check_effective_target_arm32] } {
3539 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3540 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3542 #error __ARM_FP not defined
3545 set et_arm_fp_flags $flags
3554 proc check_effective_target_arm_fp_ok { } {
3555 return [check_cached_effective_target arm_fp_ok \
3556 check_effective_target_arm_fp_ok_nocache]
3559 # Add the options needed to define __ARM_FP. We need either
3560 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3561 # specified by the multilib, use it.
3563 proc add_options_for_arm_fp { flags } {
3564 if { ! [check_effective_target_arm_fp_ok] } {
3567 global et_arm_fp_flags
3568 return "$flags $et_arm_fp_flags"
3571 # Return 1 if this is an ARM target that supports DSP multiply with
3572 # current multilib flags.
3574 proc check_effective_target_arm_dsp { } {
3575 return [check_no_compiler_messages arm_dsp assembly {
3576 #ifndef __ARM_FEATURE_DSP
3583 # Return 1 if this is an ARM target that supports unaligned word/halfword
3584 # load/store instructions.
3586 proc check_effective_target_arm_unaligned { } {
3587 return [check_no_compiler_messages arm_unaligned assembly {
3588 #ifndef __ARM_FEATURE_UNALIGNED
3589 #error no unaligned support
3595 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3596 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3597 # incompatible with these options. Also set et_arm_crypto_flags to the
3598 # best options to add.
3600 proc check_effective_target_arm_crypto_ok_nocache { } {
3601 global et_arm_crypto_flags
3602 set et_arm_crypto_flags ""
3603 if { [check_effective_target_arm_v8_neon_ok] } {
3604 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3605 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3606 #include "arm_neon.h"
3608 foo (uint8x16_t a, uint8x16_t b)
3610 return vaeseq_u8 (a, b);
3613 set et_arm_crypto_flags $flags
3622 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3624 proc check_effective_target_arm_crypto_ok { } {
3625 return [check_cached_effective_target arm_crypto_ok \
3626 check_effective_target_arm_crypto_ok_nocache]
3629 # Add options for crypto extensions.
3630 proc add_options_for_arm_crypto { flags } {
3631 if { ! [check_effective_target_arm_crypto_ok] } {
3634 global et_arm_crypto_flags
3635 return "$flags $et_arm_crypto_flags"
3638 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3639 # or -mfloat-abi=hard, but if one is already specified by the
3640 # multilib, use it. Similarly, if a -mfpu option already enables
3641 # NEON, do not add -mfpu=neon.
3643 proc add_options_for_arm_neon { flags } {
3644 if { ! [check_effective_target_arm_neon_ok] } {
3647 global et_arm_neon_flags
3648 return "$flags $et_arm_neon_flags"
3651 proc add_options_for_arm_v8_vfp { flags } {
3652 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3655 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3658 proc add_options_for_arm_v8_neon { flags } {
3659 if { ! [check_effective_target_arm_v8_neon_ok] } {
3662 global et_arm_v8_neon_flags
3663 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3666 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3667 # options for AArch64 and for ARM.
3669 proc add_options_for_arm_v8_1a_neon { flags } {
3670 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3673 global et_arm_v8_1a_neon_flags
3674 return "$flags $et_arm_v8_1a_neon_flags"
3677 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3678 # Also adds the ARMv8 FP options for ARM and for AArch64.
3680 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3681 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3684 global et_arm_v8_2a_fp16_scalar_flags
3685 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3688 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3689 # the ARMv8 NEON options for ARM and for AArch64.
3691 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3692 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3695 global et_arm_v8_2a_fp16_neon_flags
3696 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3699 proc add_options_for_arm_crc { flags } {
3700 if { ! [check_effective_target_arm_crc_ok] } {
3703 global et_arm_crc_flags
3704 return "$flags $et_arm_crc_flags"
3707 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3708 # or -mfloat-abi=hard, but if one is already specified by the
3709 # multilib, use it. Similarly, if a -mfpu option already enables
3710 # NEON, do not add -mfpu=neon.
3712 proc add_options_for_arm_neonv2 { flags } {
3713 if { ! [check_effective_target_arm_neonv2_ok] } {
3716 global et_arm_neonv2_flags
3717 return "$flags $et_arm_neonv2_flags"
3720 # Add the options needed for vfp3.
3721 proc add_options_for_arm_vfp3 { flags } {
3722 if { ! [check_effective_target_arm_vfp3_ok] } {
3725 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3728 # Return 1 if this is an ARM target supporting -mfpu=neon
3729 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3730 # incompatible with these options. Also set et_arm_neon_flags to the
3731 # best options to add.
3733 proc check_effective_target_arm_neon_ok_nocache { } {
3734 global et_arm_neon_flags
3735 set et_arm_neon_flags ""
3736 if { [check_effective_target_arm32] } {
3737 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3738 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3739 #include <arm_neon.h>
3741 #ifndef __ARM_NEON__
3744 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3745 configured for -mcpu=arm926ej-s, for example. */
3746 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3747 #error Architecture does not support NEON.
3750 set et_arm_neon_flags $flags
3759 proc check_effective_target_arm_neon_ok { } {
3760 return [check_cached_effective_target arm_neon_ok \
3761 check_effective_target_arm_neon_ok_nocache]
3764 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3765 # -mfloat-abi= option. Useful in tests where add_options is not
3766 # supported (such as lto tests).
3768 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3769 if { [check_effective_target_arm32] } {
3770 foreach flags {"-mfpu=neon"} {
3771 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3772 #include <arm_neon.h>
3774 #ifndef __ARM_NEON__
3777 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3778 configured for -mcpu=arm926ej-s, for example. */
3779 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M
'
3780 #error Architecture does not support NEON.
3791 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3792 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3793 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3796 proc check_effective_target_arm_crc_ok_nocache { } {
3797 global et_arm_crc_flags
3798 set et_arm_crc_flags "-march=armv8-a+crc"
3799 return [check_no_compiler_messages_nocache arm_crc_ok object {
3800 #if !defined (__ARM_FEATURE_CRC32)
3803 } "$et_arm_crc_flags"]
3806 proc check_effective_target_arm_crc_ok { } {
3807 return [check_cached_effective_target arm_crc_ok \
3808 check_effective_target_arm_crc_ok_nocache]
3811 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3812 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3813 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3814 # the best options to add.
3816 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3817 global et_arm_neon_fp16_flags
3818 global et_arm_neon_flags
3819 set et_arm_neon_fp16_flags ""
3820 if { [check_effective_target_arm32]
3821 && [check_effective_target_arm_neon_ok] } {
3822 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3823 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3824 "-mfp16-format=ieee"
3825 "-mfloat-abi=softfp -mfp16-format=ieee"
3826 "-mfpu=neon-fp16 -mfp16-format=ieee"
3827 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3828 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3829 #include "arm_neon.h"
3831 foo (float32x4_t arg)
3833 return vcvt_f16_f32 (arg);
3835 } "$et_arm_neon_flags $flags"] } {
3836 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3845 proc check_effective_target_arm_neon_fp16_ok { } {
3846 return [check_cached_effective_target arm_neon_fp16_ok \
3847 check_effective_target_arm_neon_fp16_ok_nocache]
3850 proc check_effective_target_arm_neon_fp16_hw { } {
3851 if {! [check_effective_target_arm_neon_fp16_ok] } {
3854 global et_arm_neon_fp16_flags
3855 check_runtime_nocache arm_neon_fp16_hw {
3857 main (int argc, char **argv)
3859 asm ("vcvt.f32.f16 q1, d0");
3862 } $et_arm_neon_fp16_flags
3865 proc add_options_for_arm_neon_fp16 { flags } {
3866 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3869 global et_arm_neon_fp16_flags
3870 return "$flags $et_arm_neon_fp16_flags"
3873 # Return 1 if this is an ARM target supporting the FP16 alternative
3874 # format. Some multilibs may be incompatible with the options needed. Also
3875 # set et_arm_neon_fp16_flags to the best options to add.
3877 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3878 global et_arm_neon_fp16_flags
3879 set et_arm_neon_fp16_flags ""
3880 if { [check_effective_target_arm32] } {
3881 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3882 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3883 if { [check_no_compiler_messages_nocache \
3884 arm_fp16_alternative_ok object {
3885 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3886 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3888 } "$flags -mfp16-format=alternative"] } {
3889 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3898 proc check_effective_target_arm_fp16_alternative_ok { } {
3899 return [check_cached_effective_target arm_fp16_alternative_ok \
3900 check_effective_target_arm_fp16_alternative_ok_nocache]
3903 # Return 1 if this is an ARM target supports specifying the FP16 none
3904 # format. Some multilibs may be incompatible with the options needed.
3906 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3907 if { [check_effective_target_arm32] } {
3908 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3909 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3910 if { [check_no_compiler_messages_nocache \
3911 arm_fp16_none_ok object {
3912 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3913 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3915 #if defined (__ARM_FP16_FORMAT_IEEE)
3916 #error __ARM_FP16_FORMAT_IEEE defined
3918 } "$flags -mfp16-format=none"] } {
3927 proc check_effective_target_arm_fp16_none_ok { } {
3928 return [check_cached_effective_target arm_fp16_none_ok \
3929 check_effective_target_arm_fp16_none_ok_nocache]
3932 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3933 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3934 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3935 # best options to add.
3937 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3938 global et_arm_v8_neon_flags
3939 set et_arm_v8_neon_flags ""
3940 if { [check_effective_target_arm32] } {
3941 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3942 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3944 #error not armv8 or later
3946 #include "arm_neon.h"
3950 __asm__ volatile ("vrintn.f32 q0, q0");
3952 } "$flags -march=armv8-a"] } {
3953 set et_arm_v8_neon_flags $flags
3962 proc check_effective_target_arm_v8_neon_ok { } {
3963 return [check_cached_effective_target arm_v8_neon_ok \
3964 check_effective_target_arm_v8_neon_ok_nocache]
3967 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3968 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3969 # incompatible with these options. Also set et_arm_neonv2_flags to the
3970 # best options to add.
3972 proc check_effective_target_arm_neonv2_ok_nocache { } {
3973 global et_arm_neonv2_flags
3974 global et_arm_neon_flags
3975 set et_arm_neonv2_flags ""
3976 if { [check_effective_target_arm32]
3977 && [check_effective_target_arm_neon_ok] } {
3978 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3979 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3980 #include "arm_neon.h"
3982 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3984 return vfma_f32 (a, b, c);
3986 } "$et_arm_neon_flags $flags"] } {
3987 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3996 proc check_effective_target_arm_neonv2_ok { } {
3997 return [check_cached_effective_target arm_neonv2_ok \
3998 check_effective_target_arm_neonv2_ok_nocache]
4001 # Add the options needed for VFP FP16 support. We need either
4002 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
4003 # the multilib, use it.
4005 proc add_options_for_arm_fp16 { flags } {
4006 if { ! [check_effective_target_arm_fp16_ok] } {
4009 global et_arm_fp16_flags
4010 return "$flags $et_arm_fp16_flags"
4013 # Add the options needed to enable support for IEEE format
4014 # half-precision support. This is valid for ARM targets.
4016 proc add_options_for_arm_fp16_ieee { flags } {
4017 if { ! [check_effective_target_arm_fp16_ok] } {
4020 global et_arm_fp16_flags
4021 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4024 # Add the options needed to enable support for ARM Alternative format
4025 # half-precision support. This is valid for ARM targets.
4027 proc add_options_for_arm_fp16_alternative { flags } {
4028 if { ! [check_effective_target_arm_fp16_ok] } {
4031 global et_arm_fp16_flags
4032 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4035 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
4036 # Skip multilibs that are incompatible with these options and set
4037 # et_arm_fp16_flags to the best options to add. This test is valid for
4040 proc check_effective_target_arm_fp16_ok_nocache { } {
4041 global et_arm_fp16_flags
4042 set et_arm_fp16_flags ""
4043 if { ! [check_effective_target_arm32] } {
4047 [list "" { *-*-* } { "-mfpu=*" } \
4048 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
4049 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
4050 # Multilib flags would override -mfpu.
4053 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
4054 # Must generate floating-point instructions.
4057 if [check_effective_target_arm_hf_eabi] {
4058 # Use existing float-abi and force an fpu which supports fp16
4059 set et_arm_fp16_flags "-mfpu=vfpv4"
4062 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4063 # The existing -mfpu value is OK; use it, but add softfp.
4064 set et_arm_fp16_flags "-mfloat-abi=softfp"
4067 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4068 # macro to check for this support.
4069 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4070 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4073 set et_arm_fp16_flags "$flags"
4080 proc check_effective_target_arm_fp16_ok { } {
4081 return [check_cached_effective_target arm_fp16_ok \
4082 check_effective_target_arm_fp16_ok_nocache]
4085 # Return 1 if the target supports executing VFP FP16 instructions, 0
4086 # otherwise. This test is valid for ARM only.
4088 proc check_effective_target_arm_fp16_hw { } {
4089 if {! [check_effective_target_arm_fp16_ok] } {
4092 global et_arm_fp16_flags
4093 check_runtime_nocache arm_fp16_hw {
4095 main (int argc, char **argv)
4099 asm ("vcvtb.f32.f16 %0, %1"
4100 : "=w" (r) : "w" (a)
4101 : /* No clobbers. */);
4102 return (r == 1.0) ? 0 : 1;
4104 } "$et_arm_fp16_flags -mfp16-format=ieee"
4107 # Creates a series of routines that return 1 if the given architecture
4108 # can be selected and a routine to give the flags to select that architecture
4109 # Note: Extra flags may be added to disable options from newer compilers
4110 # (Thumb in particular - but others may be added in the future).
4111 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4112 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4113 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4114 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4115 # /* { dg-add-options arm_arch_v5t } */
4116 # /* { dg-require-effective-target arm_arch_v5t_multilib } */
4117 foreach { armfunc armflag armdefs } {
4118 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4119 v4t "-march=armv4t" __ARM_ARCH_4T__
4120 v5t "-march=armv5t" __ARM_ARCH_5T__
4121 v5te "-march=armv5te" __ARM_ARCH_5TE__
4122 v6 "-march=armv6" __ARM_ARCH_6__
4123 v6k "-march=armv6k" __ARM_ARCH_6K__
4124 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4125 v6z "-march=armv6z" __ARM_ARCH_6Z__
4126 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4127 v7a "-march=armv7-a" __ARM_ARCH_7A__
4128 v7r "-march=armv7-r" __ARM_ARCH_7R__
4129 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4130 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4131 v7ve "-march=armv7ve -marm"
4132 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4133 v8a "-march=armv8-a" __ARM_ARCH_8A__
4134 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
4135 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
4136 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4137 __ARM_ARCH_8M_BASE__
4138 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4139 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
4140 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4141 proc check_effective_target_arm_arch_FUNC_ok { } {
4142 if { [ string match "*-marm*" "FLAG" ] &&
4143 ![check_effective_target_arm_arm_ok] } {
4146 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4158 proc add_options_for_arm_arch_FUNC { flags } {
4159 return "$flags FLAG"
4162 proc check_effective_target_arm_arch_FUNC_multilib { } {
4163 return [check_runtime arm_arch_FUNC_multilib {
4169 } [add_options_for_arm_arch_FUNC ""]]
4174 # Return 1 if GCC was configured with --with-mode=
4175 proc check_effective_target_default_mode { } {
4177 return [check_configured_with "with-mode="]
4180 # Return 1 if this is an ARM target where -marm causes ARM to be
4183 proc check_effective_target_arm_arm_ok { } {
4184 return [check_no_compiler_messages arm_arm_ok assembly {
4185 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4186 #error !__arm__ || __thumb__ || __thumb2__
4192 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4195 proc check_effective_target_arm_thumb1_ok { } {
4196 return [check_no_compiler_messages arm_thumb1_ok assembly {
4197 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4198 #error !__arm__ || !__thumb__ || __thumb2__
4200 int foo (int i) { return i; }
4204 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4207 proc check_effective_target_arm_thumb2_ok { } {
4208 return [check_no_compiler_messages arm_thumb2_ok assembly {
4209 #if !defined(__thumb2__)
4212 int foo (int i) { return i; }
4216 # Return 1 if this is an ARM target where Thumb-1 is used without options
4217 # added by the test.
4219 proc check_effective_target_arm_thumb1 { } {
4220 return [check_no_compiler_messages arm_thumb1 assembly {
4221 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4222 #error !__arm__ || !__thumb__ || __thumb2__
4228 # Return 1 if this is an ARM target where Thumb-2 is used without options
4229 # added by the test.
4231 proc check_effective_target_arm_thumb2 { } {
4232 return [check_no_compiler_messages arm_thumb2 assembly {
4233 #if !defined(__thumb2__)
4240 # Return 1 if this is an ARM target where conditional execution is available.
4242 proc check_effective_target_arm_cond_exec { } {
4243 return [check_no_compiler_messages arm_cond_exec assembly {
4244 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4251 # Return 1 if this is an ARM cortex-M profile cpu
4253 proc check_effective_target_arm_cortex_m { } {
4254 if { ![istarget arm*-*-*] } {
4257 return [check_no_compiler_messages arm_cortex_m assembly {
4258 #if defined(__ARM_ARCH_ISA_ARM)
4259 #error __ARM_ARCH_ISA_ARM is defined
4265 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4266 # used and MOVT/MOVW instructions to be available.
4268 proc check_effective_target_arm_thumb1_movt_ok {} {
4269 if [check_effective_target_arm_thumb1_ok] {
4270 return [check_no_compiler_messages arm_movt object {
4274 asm ("movt r0, #42");
4282 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4283 # used and CBZ and CBNZ instructions are available.
4285 proc check_effective_target_arm_thumb1_cbz_ok {} {
4286 if [check_effective_target_arm_thumb1_ok] {
4287 return [check_no_compiler_messages arm_movt object {
4291 asm ("cbz r0, 2f\n2:");
4299 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4302 proc check_effective_target_arm_cmse_ok {} {
4303 return [check_no_compiler_messages arm_cmse object {
4312 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4314 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4315 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4316 int foo (void) { return 0; }
4317 } "-O2 -mprint-tune-info" ]
4320 # Return 1 if the target supports executing NEON instructions, 0
4321 # otherwise. Cache the result.
4323 proc check_effective_target_arm_neon_hw { } {
4324 return [check_runtime arm_neon_hw_available {
4328 long long a = 0, b = 1;
4329 asm ("vorr %P0, %P1, %P2"
4331 : "0" (a), "w" (b));
4334 } [add_options_for_arm_neon ""]]
4337 # Return true if this is an AArch64 target that can run SVE code.
4339 proc check_effective_target_aarch64_sve_hw { } {
4340 if { ![istarget aarch64*-*-*] } {
4343 return [check_runtime aarch64_sve_hw_available {
4347 asm volatile ("ptrue p0.b");
4353 # Return true if this is an AArch64 target that can run SVE code and
4354 # if its SVE vectors have exactly BITS bits.
4356 proc aarch64_sve_hw_bits { bits } {
4357 if { ![check_effective_target_aarch64_sve_hw] } {
4360 return [check_runtime aarch64_sve${bits}_hw [subst {
4365 asm volatile ("cntd %0" : "=r" (res));
4366 if (res * 64 != $bits)
4373 # Return true if this is an AArch64 target that can run SVE code and
4374 # if its SVE vectors have exactly 256 bits.
4376 proc check_effective_target_aarch64_sve256_hw { } {
4377 return [aarch64_sve_hw_bits 256]
4380 proc check_effective_target_arm_neonv2_hw { } {
4381 return [check_runtime arm_neon_hwv2_available {
4382 #include "arm_neon.h"
4386 float32x2_t a, b, c;
4387 asm ("vfma.f32 %P0, %P1, %P2"
4389 : "w" (b), "w" (c));
4392 } [add_options_for_arm_neonv2 ""]]
4395 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4396 # otherwise. The test is valid for AArch64 and ARM. Record the command
4397 # line options needed.
4399 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4400 global et_arm_v8_1a_neon_flags
4401 set et_arm_v8_1a_neon_flags ""
4403 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4407 # Iterate through sets of options to find the compiler flags that
4408 # need to be added to the -march option. Start with the empty set
4409 # since AArch64 only needs the -march setting.
4410 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4411 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4412 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4413 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4414 #if !defined (__ARM_FEATURE_QRDMX)
4415 #error "__ARM_FEATURE_QRDMX not defined"
4417 } "$flags $arches"] } {
4418 set et_arm_v8_1a_neon_flags "$flags $arches"
4427 proc check_effective_target_arm_v8_1a_neon_ok { } {
4428 return [check_cached_effective_target arm_v8_1a_neon_ok \
4429 check_effective_target_arm_v8_1a_neon_ok_nocache]
4432 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4433 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4434 # Record the command line options needed.
4436 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4437 global et_arm_v8_2a_fp16_scalar_flags
4438 set et_arm_v8_2a_fp16_scalar_flags ""
4440 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4444 # Iterate through sets of options to find the compiler flags that
4445 # need to be added to the -march option.
4446 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4447 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4448 if { [check_no_compiler_messages_nocache \
4449 arm_v8_2a_fp16_scalar_ok object {
4450 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4451 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4453 } "$flags -march=armv8.2-a+fp16"] } {
4454 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4462 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4463 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4464 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4467 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4468 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4469 # Record the command line options needed.
4471 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4472 global et_arm_v8_2a_fp16_neon_flags
4473 set et_arm_v8_2a_fp16_neon_flags ""
4475 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4479 # Iterate through sets of options to find the compiler flags that
4480 # need to be added to the -march option.
4481 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4482 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4483 if { [check_no_compiler_messages_nocache \
4484 arm_v8_2a_fp16_neon_ok object {
4485 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4486 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4488 } "$flags -march=armv8.2-a+fp16"] } {
4489 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4497 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4498 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4499 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4502 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
4503 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4504 # Record the command line options needed.
4506 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
4507 global et_arm_v8_2a_dotprod_neon_flags
4508 set et_arm_v8_2a_dotprod_neon_flags ""
4510 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4514 # Iterate through sets of options to find the compiler flags that
4515 # need to be added to the -march option.
4516 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4517 if { [check_no_compiler_messages_nocache \
4518 arm_v8_2a_dotprod_neon_ok object {
4519 #if !defined (__ARM_FEATURE_DOTPROD)
4520 #error "__ARM_FEATURE_DOTPROD not defined"
4522 } "$flags -march=armv8.2-a+dotprod"] } {
4523 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
4531 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
4532 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
4533 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
4536 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
4537 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4540 global et_arm_v8_2a_dotprod_neon_flags
4541 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
4544 # Return 1 if the target supports FP16 VFMAL and VFMSL
4545 # instructions, 0 otherwise.
4546 # Record the command line options needed.
4548 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
4549 global et_arm_fp16fml_neon_flags
4550 set et_arm_fp16fml_neon_flags ""
4552 if { ![istarget arm*-*-*] } {
4556 # Iterate through sets of options to find the compiler flags that
4557 # need to be added to the -march option.
4558 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4559 if { [check_no_compiler_messages_nocache \
4560 arm_fp16fml_neon_ok assembly {
4561 #include <arm_neon.h>
4563 foo (float32x2_t r, float16x4_t a, float16x4_t b)
4565 return vfmlal_high_u32 (r, a, b);
4567 } "$flags -march=armv8.2-a+fp16fml"] } {
4568 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
4576 proc check_effective_target_arm_fp16fml_neon_ok { } {
4577 return [check_cached_effective_target arm_fp16fml_neon_ok \
4578 check_effective_target_arm_fp16fml_neon_ok_nocache]
4581 proc add_options_for_arm_fp16fml_neon { flags } {
4582 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
4585 global et_arm_fp16fml_neon_flags
4586 return "$flags $et_arm_fp16fml_neon_flags"
4589 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4592 proc check_effective_target_arm_v8_neon_hw { } {
4593 return [check_runtime arm_v8_neon_hw_available {
4594 #include "arm_neon.h"
4598 float32x2_t a = { 1.0f, 2.0f };
4599 #ifdef __ARM_ARCH_ISA_A64
4600 asm ("frinta %0.2s, %1.2s"
4604 asm ("vrinta.f32 %P0, %P1"
4608 return a[0] == 2.0f;
4610 } [add_options_for_arm_v8_neon ""]]
4613 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4614 # otherwise. The test is valid for AArch64 and ARM.
4616 proc check_effective_target_arm_v8_1a_neon_hw { } {
4617 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4620 return [check_runtime arm_v8_1a_neon_hw_available {
4624 #ifdef __ARM_ARCH_ISA_A64
4625 __Int32x2_t a = {0, 1};
4626 __Int32x2_t b = {0, 2};
4629 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4632 : /* No clobbers. */);
4636 __simd64_int32_t a = {0, 1};
4637 __simd64_int32_t b = {0, 2};
4638 __simd64_int32_t result;
4640 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4643 : /* No clobbers. */);
4648 } [add_options_for_arm_v8_1a_neon ""]]
4651 # Return 1 if the target supports executing floating point instructions from
4652 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4655 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4656 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4659 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4666 #ifdef __ARM_ARCH_ISA_A64
4668 asm ("fabs %h0, %h1"
4671 : /* No clobbers. */);
4675 asm ("vabs.f16 %0, %1"
4678 : /* No clobbers. */);
4682 return (result == 1.0) ? 0 : 1;
4684 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4687 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4688 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4691 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4692 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4695 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4699 #ifdef __ARM_ARCH_ISA_A64
4701 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4702 __Float16x4_t result;
4704 asm ("fabs %0.4h, %1.4h"
4707 : /* No clobbers. */);
4711 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4712 __simd64_float16_t result;
4714 asm ("vabs.f16 %P0, %P1"
4717 : /* No clobbers. */);
4721 return (result[0] == 1.0) ? 0 : 1;
4723 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4726 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
4727 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
4730 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
4731 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4734 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
4735 #include "arm_neon.h"
4740 uint32x2_t results = {0,0};
4741 uint8x8_t a = {1,1,1,1,2,2,2,2};
4742 uint8x8_t b = {2,2,2,2,3,3,3,3};
4744 #ifdef __ARM_ARCH_ISA_A64
4745 asm ("udot %0.2s, %1.8b, %2.8b"
4748 : /* No clobbers. */);
4751 asm ("vudot.u8 %P0, %P1, %P2"
4754 : /* No clobbers. */);
4757 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
4759 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
4762 # Return 1 if this is a ARM target with NEON enabled.
4764 proc check_effective_target_arm_neon { } {
4765 if { [check_effective_target_arm32] } {
4766 return [check_no_compiler_messages arm_neon object {
4767 #ifndef __ARM_NEON__
4778 proc check_effective_target_arm_neonv2 { } {
4779 if { [check_effective_target_arm32] } {
4780 return [check_no_compiler_messages arm_neon object {
4781 #ifndef __ARM_NEON__
4784 #ifndef __ARM_FEATURE_FMA
4796 # Return 1 if this is an ARM target with load acquire and store release
4797 # instructions for 8-, 16- and 32-bit types.
4799 proc check_effective_target_arm_acq_rel { } {
4800 return [check_no_compiler_messages arm_acq_rel object {
4802 load_acquire_store_release (void)
4804 asm ("lda r0, [r1]\n\t"
4810 : : : "r0", "memory");
4815 # Add the options needed for MIPS Paired-Single.
4817 proc add_options_for_mpaired_single { flags } {
4818 if { ! [check_effective_target_mpaired_single] } {
4821 return "$flags -mpaired-single"
4824 # Add the options needed for MIPS SIMD Architecture.
4826 proc add_options_for_mips_msa { flags } {
4827 if { ! [check_effective_target_mips_msa] } {
4830 return "$flags -mmsa"
4833 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4834 # the Loongson vector modes.
4836 proc check_effective_target_mips_loongson { } {
4837 return [check_no_compiler_messages loongson assembly {
4838 #if !defined(__mips_loongson_vector_rev)
4839 #error !__mips_loongson_vector_rev
4844 # Return 1 if this is a MIPS target that supports the legacy NAN.
4846 proc check_effective_target_mips_nanlegacy { } {
4847 return [check_no_compiler_messages nanlegacy assembly {
4849 int main () { return 0; }
4853 # Return 1 if an MSA program can be compiled to object
4855 proc check_effective_target_mips_msa { } {
4856 if ![check_effective_target_nomips16] {
4859 return [check_no_compiler_messages msa object {
4860 #if !defined(__mips_msa)
4861 #error "MSA NOT AVAIL"
4863 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4864 #error "MSA NOT AVAIL FOR ISA REV < 2"
4866 #if !defined(__mips_hard_float)
4867 #error "MSA HARD_FLOAT REQUIRED"
4869 #if __mips_fpr != 64
4870 #error "MSA 64-bit FPR REQUIRED"
4876 v8i16 v = __builtin_msa_ldi_h (1);
4884 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4887 proc check_effective_target_arm_eabi { } {
4888 return [check_no_compiler_messages arm_eabi object {
4889 #ifndef __ARM_EABI__
4897 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4898 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4900 proc check_effective_target_arm_hf_eabi { } {
4901 return [check_no_compiler_messages arm_hf_eabi object {
4902 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4903 #error not hard-float EABI
4910 # Return 1 if this is an ARM target that uses the soft float ABI
4911 # with no floating-point instructions at all (e.g. -mfloat-abi=soft).
4913 proc check_effective_target_arm_softfloat { } {
4914 return [check_no_compiler_messages arm_softfloat object {
4915 #if !defined(__SOFTFP__)
4916 #error not soft-float EABI
4923 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4924 # Some multilibs may be incompatible with this option.
4926 proc check_effective_target_arm_iwmmxt_ok { } {
4927 if { [check_effective_target_arm32] } {
4928 return [check_no_compiler_messages arm_iwmmxt_ok object {
4936 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4937 # for an ARM target.
4938 proc check_effective_target_arm_prefer_ldrd_strd { } {
4939 if { ![check_effective_target_arm32] } {
4943 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4944 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4948 # Return 1 if this is a PowerPC target supporting -meabi.
4950 proc check_effective_target_powerpc_eabi_ok { } {
4951 if { [istarget powerpc*-*-*] } {
4952 return [check_no_compiler_messages powerpc_eabi_ok object {
4960 # Return 1 if this is a PowerPC target with floating-point registers.
4962 proc check_effective_target_powerpc_fprs { } {
4963 if { [istarget powerpc*-*-*]
4964 || [istarget rs6000-*-*] } {
4965 return [check_no_compiler_messages powerpc_fprs object {
4977 # Return 1 if this is a PowerPC target with hardware double-precision
4980 proc check_effective_target_powerpc_hard_double { } {
4981 if { [istarget powerpc*-*-*]
4982 || [istarget rs6000-*-*] } {
4983 return [check_no_compiler_messages powerpc_hard_double object {
4995 # Return 1 if this is a PowerPC target supporting -maltivec.
4997 proc check_effective_target_powerpc_altivec_ok { } {
4998 if { ([istarget powerpc*-*-*]
4999 && ![istarget powerpc-*-linux*paired*])
5000 || [istarget rs6000-*-*] } {
5001 # AltiVec is not supported on AIX before 5.3.
5002 if { [istarget powerpc*-*-aix4*]
5003 || [istarget powerpc*-*-aix5.1*]
5004 || [istarget powerpc*-*-aix5.2*] } {
5007 return [check_no_compiler_messages powerpc_altivec_ok object {
5015 # Return 1 if this is a PowerPC target supporting -mpower8-vector
5017 proc check_effective_target_powerpc_p8vector_ok { } {
5018 if { ([istarget powerpc*-*-*]
5019 && ![istarget powerpc-*-linux*paired*])
5020 || [istarget rs6000-*-*] } {
5021 # AltiVec is not supported on AIX before 5.3.
5022 if { [istarget powerpc*-*-aix4*]
5023 || [istarget powerpc*-*-aix5.1*]
5024 || [istarget powerpc*-*-aix5.2*] } {
5027 return [check_no_compiler_messages powerpc_p8vector_ok object {
5030 asm volatile ("xxlorc vs0,vs0,vs0");
5032 asm volatile ("xxlorc 0,0,0");
5036 } "-mpower8-vector"]
5042 # Return 1 if this is a PowerPC target supporting -mpower9-vector
5044 proc check_effective_target_powerpc_p9vector_ok { } {
5045 if { ([istarget powerpc*-*-*]
5046 && ![istarget powerpc-*-linux*paired*])
5047 || [istarget rs6000-*-*] } {
5048 # AltiVec is not supported on AIX before 5.3.
5049 if { [istarget powerpc*-*-aix4*]
5050 || [istarget powerpc*-*-aix5.1*]
5051 || [istarget powerpc*-*-aix5.2*] } {
5054 return [check_no_compiler_messages powerpc_p9vector_ok object {
5057 vector double v = (vector double) { 0.0, 0.0 };
5058 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
5061 } "-mpower9-vector"]
5067 # Return 1 if this is a PowerPC target supporting -mmodulo
5069 proc check_effective_target_powerpc_p9modulo_ok { } {
5070 if { ([istarget powerpc*-*-*]
5071 && ![istarget powerpc-*-linux*paired*])
5072 || [istarget rs6000-*-*] } {
5073 # AltiVec is not supported on AIX before 5.3.
5074 if { [istarget powerpc*-*-aix4*]
5075 || [istarget powerpc*-*-aix5.1*]
5076 || [istarget powerpc*-*-aix5.2*] } {
5079 return [check_no_compiler_messages powerpc_p9modulo_ok object {
5081 int i = 5, j = 3, r = -1;
5082 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
5091 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
5092 # software emulation on power7/power8 systems or hardware support on power9.
5094 proc check_effective_target_powerpc_float128_sw_ok { } {
5095 if { ([istarget powerpc*-*-*]
5096 && ![istarget powerpc-*-linux*paired*])
5097 || [istarget rs6000-*-*] } {
5098 # AltiVec is not supported on AIX before 5.3.
5099 if { [istarget powerpc*-*-aix4*]
5100 || [istarget powerpc*-*-aix5.1*]
5101 || [istarget powerpc*-*-aix5.2*] } {
5104 return [check_no_compiler_messages powerpc_float128_sw_ok object {
5105 volatile __float128 x = 1.0q;
5106 volatile __float128 y = 2.0q;
5108 __float128 z = x + y;
5111 } "-mfloat128 -mvsx"]
5117 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
5118 # support on power9.
5120 proc check_effective_target_powerpc_float128_hw_ok { } {
5121 if { ([istarget powerpc*-*-*]
5122 && ![istarget powerpc-*-linux*paired*])
5123 || [istarget rs6000-*-*] } {
5124 # AltiVec is not supported on AIX before 5.3.
5125 if { [istarget powerpc*-*-aix4*]
5126 || [istarget powerpc*-*-aix5.1*]
5127 || [istarget powerpc*-*-aix5.2*] } {
5130 return [check_no_compiler_messages powerpc_float128_hw_ok object {
5131 volatile __float128 x = 1.0q;
5132 volatile __float128 y = 2.0q;
5135 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
5138 } "-mfloat128-hardware"]
5144 # Return 1 if this is a PowerPC target supporting -mvsx
5146 proc check_effective_target_powerpc_vsx_ok { } {
5147 if { ([istarget powerpc*-*-*]
5148 && ![istarget powerpc-*-linux*paired*])
5149 || [istarget rs6000-*-*] } {
5150 # VSX is not supported on AIX before 7.1.
5151 if { [istarget powerpc*-*-aix4*]
5152 || [istarget powerpc*-*-aix5*]
5153 || [istarget powerpc*-*-aix6*] } {
5156 return [check_no_compiler_messages powerpc_vsx_ok object {
5159 asm volatile ("xxlor vs0,vs0,vs0");
5161 asm volatile ("xxlor 0,0,0");
5171 # Return 1 if this is a PowerPC target supporting -mhtm
5173 proc check_effective_target_powerpc_htm_ok { } {
5174 if { ([istarget powerpc*-*-*]
5175 && ![istarget powerpc-*-linux*paired*])
5176 || [istarget rs6000-*-*] } {
5177 # HTM is not supported on AIX yet.
5178 if { [istarget powerpc*-*-aix*] } {
5181 return [check_no_compiler_messages powerpc_htm_ok object {
5183 asm volatile ("tbegin. 0");
5192 # Return 1 if the target supports executing HTM hardware instructions,
5193 # 0 otherwise. Cache the result.
5195 proc check_htm_hw_available { } {
5196 return [check_cached_effective_target htm_hw_available {
5197 # For now, disable on Darwin
5198 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
5201 check_runtime_nocache htm_hw_available {
5211 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
5213 proc check_effective_target_powerpc_ppu_ok { } {
5214 if [check_effective_target_powerpc_altivec_ok] {
5215 return [check_no_compiler_messages cell_asm_available object {
5218 asm volatile ("lvlx v0,v0,v0");
5220 asm volatile ("lvlx 0,0,0");
5230 # Return 1 if this is a PowerPC target that supports SPU.
5232 proc check_effective_target_powerpc_spu { } {
5233 if { [istarget powerpc*-*-linux*] } {
5234 return [check_effective_target_powerpc_altivec_ok]
5240 # Return 1 if this is a PowerPC SPE target. The check includes options
5241 # specified by dg-options for this test, so don't
cache the result.
5243 proc check_effective_target_powerpc_spe_nocache
{ } {
5244 if { [istarget powerpc
*-*-*] } {
5245 return [check_no_compiler_messages_nocache powerpc_spe object
{
5251 } [current_compiler_flags
]]
5257 #
Return 1 if this is a PowerPC target with SPE enabled.
5259 proc check_effective_target_powerpc_spe
{ } {
5260 if { [istarget powerpc
*-*-*] } {
5261 return [check_no_compiler_messages powerpc_spe object
{
5273 #
Return 1 if this is a PowerPC target with Altivec enabled.
5275 proc check_effective_target_powerpc_altivec
{ } {
5276 if { [istarget powerpc
*-*-*] } {
5277 return [check_no_compiler_messages powerpc_altivec object
{
5289 #
Return 1 if this is a PowerPC
405 target. The check includes options
5290 # specified by dg
-options
for this test
, so don
't cache the result.
5292 proc check_effective_target_powerpc_405_nocache { } {
5293 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
5294 return [check_no_compiler_messages_nocache powerpc_405 object {
5300 } [current_compiler_flags]]
5306 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
5308 proc check_effective_target_powerpc_elfv2 { } {
5309 if { [istarget powerpc*-*-*] } {
5310 return [check_no_compiler_messages powerpc_elfv2 object {
5312 #error not ELF v2 ABI
5322 # Return 1 if this is a SPU target with a toolchain that
5323 # supports automatic overlay generation.
5325 proc check_effective_target_spu_auto_overlay { } {
5326 if { [istarget spu*-*-elf*] } {
5327 return [check_no_compiler_messages spu_auto_overlay executable {
5329 } "-Wl,--auto-overlay" ]
5335 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5336 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
5337 # test environment appears to run executables on such a simulator.
5339 proc check_effective_target_ultrasparc_hw { } {
5340 return [check_runtime ultrasparc_hw {
5341 int main() { return 0; }
5342 } "-mcpu=ultrasparc"]
5345 # Return 1 if the test environment supports executing UltraSPARC VIS2
5346 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5348 proc check_effective_target_ultrasparc_vis2_hw { } {
5349 return [check_runtime ultrasparc_vis2_hw {
5350 int main() { __asm__(".word 0x81b00320"); return 0; }
5351 } "-mcpu=ultrasparc3"]
5354 # Return 1 if the test environment supports executing UltraSPARC VIS3
5355 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5357 proc check_effective_target_ultrasparc_vis3_hw { } {
5358 return [check_runtime ultrasparc_vis3_hw {
5359 int main() { __asm__(".word 0x81b00220"); return 0; }
5363 # Return 1 if this is a SPARC-V9 target.
5365 proc check_effective_target_sparc_v9 { } {
5366 if { [istarget sparc*-*-*] } {
5367 return [check_no_compiler_messages sparc_v9 object {
5369 asm volatile ("return %i7+8");
5378 # Return 1 if this is a SPARC target with VIS enabled.
5380 proc check_effective_target_sparc_vis { } {
5381 if { [istarget sparc*-*-*] } {
5382 return [check_no_compiler_messages sparc_vis object {
5394 # Return 1 if the target supports hardware vector shift operation.
5396 proc check_effective_target_vect_shift { } {
5397 global et_vect_shift_saved
5400 if [info exists et_vect_shift_saved($et_index)] {
5401 verbose "check_effective_target_vect_shift: using cached result" 2
5403 set et_vect_shift_saved($et_index) 0
5404 if { ([istarget powerpc*-*-*]
5405 && ![istarget powerpc-*-linux*paired*])
5406 || [istarget ia64-*-*]
5407 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5408 || [istarget aarch64*-*-*]
5409 || [is-effective-target arm_neon]
5410 || ([istarget mips*-*-*]
5411 && ([et-is-effective-target mips_msa]
5412 || [et-is-effective-target mips_loongson]))
5413 || ([istarget s390*-*-*]
5414 && [check_effective_target_s390_vx]) } {
5415 set et_vect_shift_saved($et_index) 1
5419 verbose "check_effective_target_vect_shift:\
5420 returning $et_vect_shift_saved($et_index)" 2
5421 return $et_vect_shift_saved($et_index)
5424 proc check_effective_target_whole_vector_shift { } {
5425 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5426 || [istarget ia64-*-*]
5427 || [istarget aarch64*-*-*]
5428 || [istarget powerpc64*-*-*]
5429 || ([is-effective-target arm_neon]
5430 && [check_effective_target_arm_little_endian])
5431 || ([istarget mips*-*-*]
5432 && [et-is-effective-target mips_loongson])
5433 || ([istarget s390*-*-*]
5434 && [check_effective_target_s390_vx]) } {
5440 verbose "check_effective_target_vect_long: returning $answer" 2
5444 # Return 1 if the target supports vector bswap operations.
5446 proc check_effective_target_vect_bswap { } {
5447 global et_vect_bswap_saved
5450 if [info exists et_vect_bswap_saved($et_index)] {
5451 verbose "check_effective_target_vect_bswap: using cached result" 2
5453 set et_vect_bswap_saved($et_index) 0
5454 if { [istarget aarch64*-*-*]
5455 || [is-effective-target arm_neon]
5457 set et_vect_bswap_saved($et_index) 1
5461 verbose "check_effective_target_vect_bswap:\
5462 returning $et_vect_bswap_saved($et_index)" 2
5463 return $et_vect_bswap_saved($et_index)
5466 # Return 1 if the target supports hardware vector shift operation for char.
5468 proc check_effective_target_vect_shift_char { } {
5469 global et_vect_shift_char_saved
5472 if [info exists et_vect_shift_char_saved($et_index)] {
5473 verbose "check_effective_target_vect_shift_char: using cached result" 2
5475 set et_vect_shift_char_saved($et_index) 0
5476 if { ([istarget powerpc*-*-*]
5477 && ![istarget powerpc-*-linux*paired*])
5478 || [is-effective-target arm_neon]
5479 || ([istarget mips*-*-*]
5480 && [et-is-effective-target mips_msa])
5481 || ([istarget s390*-*-*]
5482 && [check_effective_target_s390_vx]) } {
5483 set et_vect_shift_char_saved($et_index) 1
5487 verbose "check_effective_target_vect_shift_char:\
5488 returning $et_vect_shift_char_saved($et_index)" 2
5489 return $et_vect_shift_char_saved($et_index)
5492 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5494 # This can change for different subtargets so do not cache the result.
5496 proc check_effective_target_vect_long { } {
5497 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5498 || (([istarget powerpc*-*-*]
5499 && ![istarget powerpc-*-linux*paired*])
5500 && [check_effective_target_ilp32])
5501 || [is-effective-target arm_neon]
5502 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5503 || [istarget aarch64*-*-*]
5504 || ([istarget mips*-*-*]
5505 && [et-is-effective-target mips_msa])
5506 || ([istarget s390*-*-*]
5507 && [check_effective_target_s390_vx]) } {
5513 verbose "check_effective_target_vect_long: returning $answer" 2
5517 # Return 1 if the target supports hardware vectors of float when
5518 # -funsafe-math-optimizations is enabled, 0 otherwise.
5520 # This won't change
for different subtargets so
cache the result.
5522 proc check_effective_target_vect_float
{ } {
5523 global et_vect_float_saved
5526 if [info exists et_vect_float_saved
($et_index
)] {
5527 verbose
"check_effective_target_vect_float: using cached result" 2
5529 set et_vect_float_saved
($et_index
) 0
5530 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5531 ||
[istarget powerpc
*-*-*]
5532 ||
[istarget spu
-*-*]
5533 ||
[istarget mips
-sde
-elf
]
5534 ||
[istarget mipsisa64
*-*-*]
5535 ||
[istarget ia64
-*-*]
5536 ||
[istarget aarch64
*-*-*]
5537 ||
([istarget mips
*-*-*]
5538 && [et
-is
-effective
-target mips_msa
])
5539 ||
[is
-effective
-target arm_neon
]
5540 ||
([istarget s390
*-*-*]
5541 && [check_effective_target_s390_vxe
]) } {
5542 set et_vect_float_saved
($et_index
) 1
5546 verbose
"check_effective_target_vect_float:\
5547 returning $et_vect_float_saved
($et_index
)" 2
5548 return $et_vect_float_saved
($et_index
)
5551 #
Return 1 if the target supports hardware vectors of float without
5552 #
-funsafe
-math
-optimizations being enabled
, 0 otherwise.
5554 proc check_effective_target_vect_float_strict
{ } {
5555 return [expr
{ [check_effective_target_vect_float
]
5556 && ![istarget arm
*-*-*] }]
5559 #
Return 1 if the target supports hardware vectors of double
, 0 otherwise.
5561 # This won
't change for different subtargets so cache the result.
5563 proc check_effective_target_vect_double { } {
5564 global et_vect_double_saved
5567 if [info exists et_vect_double_saved($et_index)] {
5568 verbose "check_effective_target_vect_double: using cached result" 2
5570 set et_vect_double_saved($et_index) 0
5571 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5572 && [check_no_compiler_messages vect_double assembly {
5573 #ifdef __tune_atom__
5574 # error No double vectorizer support.
5577 || [istarget aarch64*-*-*]
5578 || [istarget spu-*-*]
5579 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5580 || ([istarget mips*-*-*]
5581 && [et-is-effective-target mips_msa])
5582 || ([istarget s390*-*-*]
5583 && [check_effective_target_s390_vx]) } {
5584 set et_vect_double_saved($et_index) 1
5588 verbose "check_effective_target_vect_double:\
5589 returning $et_vect_double_saved($et_index)" 2
5590 return $et_vect_double_saved($et_index)
5593 # Return 1 if the target supports conditional addition, subtraction,
5594 # multiplication, division, minimum and maximum on vectors of double,
5595 # via the cond_ optabs. Return 0 otherwise.
5597 proc check_effective_target_vect_double_cond_arith { } {
5598 return [check_effective_target_aarch64_sve]
5601 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5603 # This won't change
for different subtargets so
cache the result.
5605 proc check_effective_target_vect_long_long
{ } {
5606 global et_vect_long_long_saved
5609 if [info exists et_vect_long_long_saved
($et_index
)] {
5610 verbose
"check_effective_target_vect_long_long: using cached result" 2
5612 set et_vect_long_long_saved
($et_index
) 0
5613 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5614 ||
([istarget mips
*-*-*]
5615 && [et
-is
-effective
-target mips_msa
])
5616 ||
([istarget s390
*-*-*]
5617 && [check_effective_target_s390_vx
]) } {
5618 set et_vect_long_long_saved
($et_index
) 1
5622 verbose
"check_effective_target_vect_long_long:\
5623 returning $et_vect_long_long_saved
($et_index
)" 2
5624 return $et_vect_long_long_saved
($et_index
)
5628 #
Return 1 if the target plus current options does not support a vector
5629 #
max instruction
on "int", 0 otherwise.
5631 # This won
't change for different subtargets so cache the result.
5633 proc check_effective_target_vect_no_int_min_max { } {
5634 global et_vect_no_int_min_max_saved
5637 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5638 verbose "check_effective_target_vect_no_int_min_max:\
5639 using cached result" 2
5641 set et_vect_no_int_min_max_saved($et_index) 0
5642 if { [istarget sparc*-*-*]
5643 || [istarget spu-*-*]
5644 || [istarget alpha*-*-*]
5645 || ([istarget mips*-*-*]
5646 && [et-is-effective-target mips_loongson]) } {
5647 set et_vect_no_int_min_max_saved($et_index) 1
5650 verbose "check_effective_target_vect_no_int_min_max:\
5651 returning $et_vect_no_int_min_max_saved($et_index)" 2
5652 return $et_vect_no_int_min_max_saved($et_index)
5655 # Return 1 if the target plus current options does not support a vector
5656 # add instruction on "int", 0 otherwise.
5658 # This won't change
for different subtargets so
cache the result.
5660 proc check_effective_target_vect_no_int_add
{ } {
5661 global et_vect_no_int_add_saved
5664 if [info exists et_vect_no_int_add_saved
($et_index
)] {
5665 verbose
"check_effective_target_vect_no_int_add: using cached result" 2
5667 set et_vect_no_int_add_saved
($et_index
) 0
5668 # Alpha only supports vector add
on V8QI and V4HI.
5669 if { [istarget alpha
*-*-*] } {
5670 set et_vect_no_int_add_saved
($et_index
) 1
5673 verbose
"check_effective_target_vect_no_int_add:\
5674 returning $et_vect_no_int_add_saved
($et_index
)" 2
5675 return $et_vect_no_int_add_saved
($et_index
)
5678 #
Return 1 if the target plus current options does not support vector
5679 # bitwise instructions
, 0 otherwise.
5681 # This won
't change for different subtargets so cache the result.
5683 proc check_effective_target_vect_no_bitwise { } {
5684 global et_vect_no_bitwise_saved
5687 if [info exists et_vect_no_bitwise_saved($et_index)] {
5688 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5690 set et_vect_no_bitwise_saved($et_index) 0
5692 verbose "check_effective_target_vect_no_bitwise:\
5693 returning $et_vect_no_bitwise_saved($et_index)" 2
5694 return $et_vect_no_bitwise_saved($et_index)
5697 # Return 1 if the target plus current options supports vector permutation,
5700 # This won't change
for different subtargets so
cache the result.
5702 proc check_effective_target_vect_perm
{ } {
5703 global et_vect_perm_saved
5706 if [info exists et_vect_perm_saved
($et_index
)] {
5707 verbose
"check_effective_target_vect_perm: using cached result" 2
5709 set et_vect_perm_saved
($et_index
) 0
5710 if { [is
-effective
-target arm_neon
]
5711 ||
([istarget aarch64
*-*-*]
5712 && ![check_effective_target_vect_variable_length
])
5713 ||
[istarget powerpc
*-*-*]
5714 ||
[istarget spu
-*-*]
5715 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
5716 ||
([istarget mips
*-*-*]
5717 && ([et
-is
-effective
-target mpaired_single
]
5718 ||
[et
-is
-effective
-target mips_msa
]))
5719 ||
([istarget s390
*-*-*]
5720 && [check_effective_target_s390_vx
]) } {
5721 set et_vect_perm_saved
($et_index
) 1
5724 verbose
"check_effective_target_vect_perm:\
5725 returning $et_vect_perm_saved
($et_index
)" 2
5726 return $et_vect_perm_saved
($et_index
)
5729 #
Return 1 if, for some VF
:
5731 #
- the target
's default vector size is VF * ELEMENT_BITS bits
5733 # - it is possible to implement the equivalent of:
5735 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
5736 # for (int i = 0; i < COUNT; ++i)
5737 # for (int j = 0; j < COUNT * VF; ++j)
5738 # s1[i][j] = s2[j - j % COUNT + i]
5740 # using only a single 2-vector permute for each vector in s1.
5742 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
5744 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
5745 # ------+-------------+-------------+------------
5746 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
5747 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
5748 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
5750 # Each s1 permute requires only two of a, b and c.
5752 # The distance between the start of vector n in s1[0] and the start
5753 # of vector n in s2 is:
5755 # A = (n * VF) % COUNT
5757 # The corresponding value for the end of vector n is:
5759 # B = (n * VF + VF - 1) % COUNT
5761 # Subtracting i from each value gives the corresponding difference
5762 # for s1[i]. The condition being tested by this function is false
5763 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
5764 # element for s1[i] comes from vector n - 1 of s2 and the last element
5765 # comes from vector n + 1 of s2. The condition is therefore true iff
5766 # A <= B for all n. This is turn means the condition is true iff:
5768 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
5770 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
5771 # and will be that value for at least one n in [0, COUNT), so we want:
5773 # (VF - 1) % COUNT < gcd (VF, COUNT)
5775 proc vect_perm_supported { count element_bits } {
5776 set vector_bits [lindex [available_vector_sizes] 0]
5777 if { $vector_bits <= 0 } {
5780 set vf [expr { $vector_bits / $element_bits }]
5782 # Compute gcd (VF, COUNT).
5785 while { $temp1 > 0 } {
5786 set temp2 [expr { $gcd % $temp1 }]
5790 return [expr { ($vf - 1) % $count < $gcd }]
5793 # Return 1 if the target supports SLP permutation of 3 vectors when each
5794 # element has 32 bits.
5796 proc check_effective_target_vect_perm3_int { } {
5797 return [expr { [check_effective_target_vect_perm]
5798 && [vect_perm_supported 3 32] }]
5801 # Return 1 if the target plus current options supports vector permutation
5802 # on byte-sized elements, 0 otherwise.
5804 # This won't change
for different subtargets so
cache the result.
5806 proc check_effective_target_vect_perm_byte
{ } {
5807 global et_vect_perm_byte_saved
5810 if [info exists et_vect_perm_byte_saved
($et_index
)] {
5811 verbose
"check_effective_target_vect_perm_byte: using cached result" 2
5813 set et_vect_perm_byte_saved
($et_index
) 0
5814 if { ([is
-effective
-target arm_neon
]
5815 && [is
-effective
-target arm_little_endian
])
5816 ||
([istarget aarch64
*-*-*]
5817 && [is
-effective
-target aarch64_little_endian
]
5818 && ![check_effective_target_vect_variable_length
])
5819 ||
[istarget powerpc
*-*-*]
5820 ||
[istarget spu
-*-*]
5821 ||
([istarget mips
-*.
*]
5822 && [et
-is
-effective
-target mips_msa
])
5823 ||
([istarget s390
*-*-*]
5824 && [check_effective_target_s390_vx
]) } {
5825 set et_vect_perm_byte_saved
($et_index
) 1
5828 verbose
"check_effective_target_vect_perm_byte:\
5829 returning $et_vect_perm_byte_saved
($et_index
)" 2
5830 return $et_vect_perm_byte_saved
($et_index
)
5833 #
Return 1 if the target supports SLP permutation of
3 vectors when each
5834 # element has
8 bits.
5836 proc check_effective_target_vect_perm3_byte
{ } {
5837 return [expr
{ [check_effective_target_vect_perm_byte
]
5838 && [vect_perm_supported
3 8] }]
5841 #
Return 1 if the target plus current options supports vector permutation
5842 #
on short
-sized elements
, 0 otherwise.
5844 # This won
't change for different subtargets so cache the result.
5846 proc check_effective_target_vect_perm_short { } {
5847 global et_vect_perm_short_saved
5850 if [info exists et_vect_perm_short_saved($et_index)] {
5851 verbose "check_effective_target_vect_perm_short: using cached result" 2
5853 set et_vect_perm_short_saved($et_index) 0
5854 if { ([is-effective-target arm_neon]
5855 && [is-effective-target arm_little_endian])
5856 || ([istarget aarch64*-*-*]
5857 && [is-effective-target aarch64_little_endian]
5858 && ![check_effective_target_vect_variable_length])
5859 || [istarget powerpc*-*-*]
5860 || [istarget spu-*-*]
5861 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
5862 && [check_ssse3_available])
5863 || ([istarget mips*-*-*]
5864 && [et-is-effective-target mips_msa])
5865 || ([istarget s390*-*-*]
5866 && [check_effective_target_s390_vx]) } {
5867 set et_vect_perm_short_saved($et_index) 1
5870 verbose "check_effective_target_vect_perm_short:\
5871 returning $et_vect_perm_short_saved($et_index)" 2
5872 return $et_vect_perm_short_saved($et_index)
5875 # Return 1 if the target supports SLP permutation of 3 vectors when each
5876 # element has 16 bits.
5878 proc check_effective_target_vect_perm3_short { } {
5879 return [expr { [check_effective_target_vect_perm_short]
5880 && [vect_perm_supported 3 16] }]
5883 # Return 1 if the target plus current options supports folding of
5884 # copysign into XORSIGN.
5886 # This won't change
for different subtargets so
cache the result.
5888 proc check_effective_target_xorsign
{ } {
5889 global et_xorsign_saved
5892 if [info exists et_xorsign_saved
($et_index
)] {
5893 verbose
"check_effective_target_xorsign: using cached result" 2
5895 set et_xorsign_saved
($et_index
) 0
5896 if { [istarget aarch64
*-*-*] ||
[istarget arm
*-*-*] } {
5897 set et_xorsign_saved
($et_index
) 1
5900 verbose
"check_effective_target_xorsign:\
5901 returning $et_xorsign_saved
($et_index
)" 2
5902 return $et_xorsign_saved
($et_index
)
5905 #
Return 1 if the target plus current options supports a vector
5906 # widening summation of
*short
* args into
*int* result
, 0 otherwise.
5908 # This won
't change for different subtargets so cache the result.
5910 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5911 global et_vect_widen_sum_hi_to_si_pattern_saved
5914 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5915 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5916 using cached result" 2
5918 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5919 if { [istarget powerpc*-*-*]
5920 || ([istarget aarch64*-*-*]
5921 && ![check_effective_target_aarch64_sve])
5922 || [is-effective-target arm_neon]
5923 || [istarget ia64-*-*] } {
5924 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5927 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5928 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5929 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5932 # Return 1 if the target plus current options supports a vector
5933 # widening summation of *short* args into *int* result, 0 otherwise.
5934 # A target can also support this widening summation if it can support
5935 # promotion (unpacking) from shorts to ints.
5937 # This won't change
for different subtargets so
cache the result.
5939 proc check_effective_target_vect_widen_sum_hi_to_si
{ } {
5940 global et_vect_widen_sum_hi_to_si_saved
5943 if [info exists et_vect_widen_sum_hi_to_si_saved
($et_index
)] {
5944 verbose
"check_effective_target_vect_widen_sum_hi_to_si:\
5945 using cached result
" 2
5947 set et_vect_widen_sum_hi_to_si_saved
($et_index
) \
5948 [check_effective_target_vect_unpack
]
5949 if { [istarget powerpc
*-*-*]
5950 ||
[istarget ia64
-*-*] } {
5951 set et_vect_widen_sum_hi_to_si_saved
($et_index
) 1
5954 verbose
"check_effective_target_vect_widen_sum_hi_to_si:\
5955 returning $et_vect_widen_sum_hi_to_si_saved
($et_index
)" 2
5956 return $et_vect_widen_sum_hi_to_si_saved
($et_index
)
5959 #
Return 1 if the target plus current options supports a vector
5960 # widening summation of
*char
* args into
*short
* result
, 0 otherwise.
5961 # A target can also support this widening summation
if it can support
5962 # promotion
(unpacking
) from chars to shorts.
5964 # This won
't change for different subtargets so cache the result.
5966 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5967 global et_vect_widen_sum_qi_to_hi_saved
5970 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5971 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5972 using cached result" 2
5974 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5975 if { [check_effective_target_vect_unpack]
5976 || [is-effective-target arm_neon]
5977 || [istarget ia64-*-*] } {
5978 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5981 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5982 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5983 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5986 # Return 1 if the target plus current options supports a vector
5987 # widening summation of *char* args into *int* result, 0 otherwise.
5989 # This won't change
for different subtargets so
cache the result.
5991 proc check_effective_target_vect_widen_sum_qi_to_si
{ } {
5992 global et_vect_widen_sum_qi_to_si_saved
5995 if [info exists et_vect_widen_sum_qi_to_si_saved
($et_index
)] {
5996 verbose
"check_effective_target_vect_widen_sum_qi_to_si:\
5997 using cached result
" 2
5999 set et_vect_widen_sum_qi_to_si_saved
($et_index
) 0
6000 if { [istarget powerpc
*-*-*] } {
6001 set et_vect_widen_sum_qi_to_si_saved
($et_index
) 1
6004 verbose
"check_effective_target_vect_widen_sum_qi_to_si:\
6005 returning $et_vect_widen_sum_qi_to_si_saved
($et_index
)" 2
6006 return $et_vect_widen_sum_qi_to_si_saved
($et_index
)
6009 #
Return 1 if the target plus current options supports a vector
6010 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
6011 # A target can also support this widening multplication
if it can support
6012 # promotion
(unpacking
) from chars to shorts
, and vect_short_mult
(non
-widening
6013 # multiplication of shorts
).
6015 # This won
't change for different subtargets so cache the result.
6018 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
6019 global et_vect_widen_mult_qi_to_hi_saved
6022 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
6023 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
6024 using cached result" 2
6026 if { [check_effective_target_vect_unpack]
6027 && [check_effective_target_vect_short_mult] } {
6028 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
6030 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
6032 if { [istarget powerpc*-*-*]
6033 || ([istarget aarch64*-*-*]
6034 && ![check_effective_target_aarch64_sve])
6035 || [is-effective-target arm_neon]
6036 || ([istarget s390*-*-*]
6037 && [check_effective_target_s390_vx]) } {
6038 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
6041 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
6042 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
6043 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
6046 # Return 1 if the target plus current options supports a vector
6047 # widening multiplication of *short* args into *int* result, 0 otherwise.
6048 # A target can also support this widening multplication if it can support
6049 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
6050 # multiplication of ints).
6052 # This won't change
for different subtargets so
cache the result.
6055 proc check_effective_target_vect_widen_mult_hi_to_si
{ } {
6056 global et_vect_widen_mult_hi_to_si_saved
6059 if [info exists et_vect_widen_mult_hi_to_si_saved
($et_index
)] {
6060 verbose
"check_effective_target_vect_widen_mult_hi_to_si:\
6061 using cached result
" 2
6063 if { [check_effective_target_vect_unpack
]
6064 && [check_effective_target_vect_int_mult
] } {
6065 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 1
6067 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 0
6069 if { [istarget powerpc
*-*-*]
6070 ||
[istarget spu
-*-*]
6071 ||
[istarget ia64
-*-*]
6072 ||
([istarget aarch64
*-*-*]
6073 && ![check_effective_target_aarch64_sve
])
6074 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6075 ||
[is
-effective
-target arm_neon
]
6076 ||
([istarget s390
*-*-*]
6077 && [check_effective_target_s390_vx
]) } {
6078 set et_vect_widen_mult_hi_to_si_saved
($et_index
) 1
6081 verbose
"check_effective_target_vect_widen_mult_hi_to_si:\
6082 returning $et_vect_widen_mult_hi_to_si_saved
($et_index
)" 2
6083 return $et_vect_widen_mult_hi_to_si_saved
($et_index
)
6086 #
Return 1 if the target plus current options supports a vector
6087 # widening multiplication of
*char
* args into
*short
* result
, 0 otherwise.
6089 # This won
't change for different subtargets so cache the result.
6091 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
6092 global et_vect_widen_mult_qi_to_hi_pattern_saved
6095 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
6096 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
6097 using cached result" 2
6099 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
6100 if { [istarget powerpc*-*-*]
6101 || ([is-effective-target arm_neon]
6102 && [check_effective_target_arm_little_endian])
6103 || ([istarget s390*-*-*]
6104 && [check_effective_target_s390_vx]) } {
6105 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
6108 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
6109 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
6110 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
6113 # Return 1 if the target plus current options supports a vector
6114 # widening multiplication of *short* args into *int* result, 0 otherwise.
6116 # This won't change
for different subtargets so
cache the result.
6118 proc check_effective_target_vect_widen_mult_hi_to_si_pattern
{ } {
6119 global et_vect_widen_mult_hi_to_si_pattern_saved
6122 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)] {
6123 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern:\
6124 using cached result
" 2
6126 set et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
) 0
6127 if { [istarget powerpc
*-*-*]
6128 ||
[istarget spu
-*-*]
6129 ||
[istarget ia64
-*-*]
6130 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6131 ||
([is
-effective
-target arm_neon
]
6132 && [check_effective_target_arm_little_endian
])
6133 ||
([istarget s390
*-*-*]
6134 && [check_effective_target_s390_vx
]) } {
6135 set et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
) 1
6138 verbose
"check_effective_target_vect_widen_mult_hi_to_si_pattern:\
6139 returning $et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)" 2
6140 return $et_vect_widen_mult_hi_to_si_pattern_saved
($et_index
)
6143 #
Return 1 if the target plus current options supports a vector
6144 # widening multiplication of
*int* args into
*long
* result
, 0 otherwise.
6146 # This won
't change for different subtargets so cache the result.
6148 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
6149 global et_vect_widen_mult_si_to_di_pattern_saved
6152 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
6153 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
6154 using cached result" 2
6156 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
6157 if {[istarget ia64-*-*]
6158 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6159 || ([istarget s390*-*-*]
6160 && [check_effective_target_s390_vx]) } {
6161 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
6164 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
6165 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
6166 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
6169 # Return 1 if the target plus current options supports a vector
6170 # widening shift, 0 otherwise.
6172 # This won't change
for different subtargets so
cache the result.
6174 proc check_effective_target_vect_widen_shift
{ } {
6175 global et_vect_widen_shift_saved
6178 if [info exists et_vect_shift_saved
($et_index
)] {
6179 verbose
"check_effective_target_vect_widen_shift: using cached result" 2
6181 set et_vect_widen_shift_saved
($et_index
) 0
6182 if { [is
-effective
-target arm_neon
] } {
6183 set et_vect_widen_shift_saved
($et_index
) 1
6186 verbose
"check_effective_target_vect_widen_shift:\
6187 returning $et_vect_widen_shift_saved
($et_index
)" 2
6188 return $et_vect_widen_shift_saved
($et_index
)
6191 #
Return 1 if the target plus current options supports a vector
6192 # dot
-product of signed chars
, 0 otherwise.
6194 # This won
't change for different subtargets so cache the result.
6196 proc check_effective_target_vect_sdot_qi { } {
6197 global et_vect_sdot_qi_saved
6200 if [info exists et_vect_sdot_qi_saved($et_index)] {
6201 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
6203 set et_vect_sdot_qi_saved($et_index) 0
6204 if { [istarget ia64-*-*]
6205 || [istarget aarch64*-*-*]
6206 || [istarget arm*-*-*]
6207 || ([istarget mips*-*-*]
6208 && [et-is-effective-target mips_msa]) } {
6209 set et_vect_udot_qi_saved 1
6212 verbose "check_effective_target_vect_sdot_qi:\
6213 returning $et_vect_sdot_qi_saved($et_index)" 2
6214 return $et_vect_sdot_qi_saved($et_index)
6217 # Return 1 if the target plus current options supports a vector
6218 # dot-product of unsigned chars, 0 otherwise.
6220 # This won't change
for different subtargets so
cache the result.
6222 proc check_effective_target_vect_udot_qi
{ } {
6223 global et_vect_udot_qi_saved
6226 if [info exists et_vect_udot_qi_saved
($et_index
)] {
6227 verbose
"check_effective_target_vect_udot_qi: using cached result" 2
6229 set et_vect_udot_qi_saved
($et_index
) 0
6230 if { [istarget powerpc
*-*-*]
6231 ||
[istarget aarch64
*-*-*]
6232 ||
[istarget arm
*-*-*]
6233 ||
[istarget ia64
-*-*]
6234 ||
([istarget mips
*-*-*]
6235 && [et
-is
-effective
-target mips_msa
]) } {
6236 set et_vect_udot_qi_saved
($et_index
) 1
6239 verbose
"check_effective_target_vect_udot_qi:\
6240 returning $et_vect_udot_qi_saved
($et_index
)" 2
6241 return $et_vect_udot_qi_saved
($et_index
)
6244 #
Return 1 if the target plus current options supports a vector
6245 # dot
-product of signed shorts
, 0 otherwise.
6247 # This won
't change for different subtargets so cache the result.
6249 proc check_effective_target_vect_sdot_hi { } {
6250 global et_vect_sdot_hi_saved
6253 if [info exists et_vect_sdot_hi_saved($et_index)] {
6254 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
6256 set et_vect_sdot_hi_saved($et_index) 0
6257 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6258 || [istarget ia64-*-*]
6259 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6260 || ([istarget mips*-*-*]
6261 && [et-is-effective-target mips_msa]) } {
6262 set et_vect_sdot_hi_saved($et_index) 1
6265 verbose "check_effective_target_vect_sdot_hi:\
6266 returning $et_vect_sdot_hi_saved($et_index)" 2
6267 return $et_vect_sdot_hi_saved($et_index)
6270 # Return 1 if the target plus current options supports a vector
6271 # dot-product of unsigned shorts, 0 otherwise.
6273 # This won't change
for different subtargets so
cache the result.
6275 proc check_effective_target_vect_udot_hi
{ } {
6276 global et_vect_udot_hi_saved
6279 if [info exists et_vect_udot_hi_saved
($et_index
)] {
6280 verbose
"check_effective_target_vect_udot_hi: using cached result" 2
6282 set et_vect_udot_hi_saved
($et_index
) 0
6283 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6284 ||
([istarget mips
*-*-*]
6285 && [et
-is
-effective
-target mips_msa
]) } {
6286 set et_vect_udot_hi_saved
($et_index
) 1
6289 verbose
"check_effective_target_vect_udot_hi:\
6290 returning $et_vect_udot_hi_saved
($et_index
)" 2
6291 return $et_vect_udot_hi_saved
($et_index
)
6294 #
Return 1 if the target plus current options supports a vector
6295 # sad operation of unsigned chars
, 0 otherwise.
6297 # This won
't change for different subtargets so cache the result.
6299 proc check_effective_target_vect_usad_char { } {
6300 global et_vect_usad_char_saved
6303 if [info exists et_vect_usad_char_saved($et_index)] {
6304 verbose "check_effective_target_vect_usad_char: using cached result" 2
6306 set et_vect_usad_char_saved($et_index) 0
6307 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6308 set et_vect_usad_char_saved($et_index) 1
6311 verbose "check_effective_target_vect_usad_char:\
6312 returning $et_vect_usad_char_saved($et_index)" 2
6313 return $et_vect_usad_char_saved($et_index)
6316 # Return 1 if the target plus current options supports both signed
6317 # and unsigned average operations on vectors of bytes.
6319 proc check_effective_target_vect_avg_qi {} {
6323 # Return 1 if the target plus current options supports a vector
6324 # demotion (packing) of shorts (to chars) and ints (to shorts)
6325 # using modulo arithmetic, 0 otherwise.
6327 # This won't change
for different subtargets so
cache the result.
6329 proc check_effective_target_vect_pack_trunc
{ } {
6330 global et_vect_pack_trunc_saved
6333 if [info exists et_vect_pack_trunc_saved
($et_index
)] {
6334 verbose
"check_effective_target_vect_pack_trunc: using cached result" 2
6336 set et_vect_pack_trunc_saved
($et_index
) 0
6337 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6338 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6339 ||
[istarget aarch64
*-*-*]
6340 ||
[istarget spu
-*-*]
6341 ||
([istarget arm
*-*-*] && [check_effective_target_arm_neon_ok
]
6342 && [check_effective_target_arm_little_endian
])
6343 ||
([istarget mips
*-*-*]
6344 && [et
-is
-effective
-target mips_msa
])
6345 ||
([istarget s390
*-*-*]
6346 && [check_effective_target_s390_vx
]) } {
6347 set et_vect_pack_trunc_saved
($et_index
) 1
6350 verbose
"check_effective_target_vect_pack_trunc:\
6351 returning $et_vect_pack_trunc_saved
($et_index
)" 2
6352 return $et_vect_pack_trunc_saved
($et_index
)
6355 #
Return 1 if the target plus current options supports a vector
6356 # promotion
(unpacking
) of chars
(to shorts
) and shorts
(to ints
), 0 otherwise.
6358 # This won
't change for different subtargets so cache the result.
6360 proc check_effective_target_vect_unpack { } {
6361 global et_vect_unpack_saved
6364 if [info exists et_vect_unpack_saved($et_index)] {
6365 verbose "check_effective_target_vect_unpack: using cached result" 2
6367 set et_vect_unpack_saved($et_index) 0
6368 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
6369 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6370 || [istarget spu-*-*]
6371 || [istarget ia64-*-*]
6372 || [istarget aarch64*-*-*]
6373 || ([istarget mips*-*-*]
6374 && [et-is-effective-target mips_msa])
6375 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6376 && [check_effective_target_arm_little_endian])
6377 || ([istarget s390*-*-*]
6378 && [check_effective_target_s390_vx]) } {
6379 set et_vect_unpack_saved($et_index) 1
6382 verbose "check_effective_target_vect_unpack:\
6383 returning $et_vect_unpack_saved($et_index)" 2
6384 return $et_vect_unpack_saved($et_index)
6387 # Return 1 if the target plus current options does not guarantee
6388 # that its STACK_BOUNDARY is >= the reguired vector alignment.
6390 # This won't change
for different subtargets so
cache the result.
6392 proc check_effective_target_unaligned_stack
{ } {
6393 global et_unaligned_stack_saved
6395 if [info exists et_unaligned_stack_saved
] {
6396 verbose
"check_effective_target_unaligned_stack: using cached result" 2
6398 set et_unaligned_stack_saved
0
6400 verbose
"check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
6401 return $et_unaligned_stack_saved
6404 #
Return 1 if the target plus current options does not support a vector
6405 # alignment mechanism
, 0 otherwise.
6407 # This won
't change for different subtargets so cache the result.
6409 proc check_effective_target_vect_no_align { } {
6410 global et_vect_no_align_saved
6413 if [info exists et_vect_no_align_saved($et_index)] {
6414 verbose "check_effective_target_vect_no_align: using cached result" 2
6416 set et_vect_no_align_saved($et_index) 0
6417 if { [istarget mipsisa64*-*-*]
6418 || [istarget mips-sde-elf]
6419 || [istarget sparc*-*-*]
6420 || [istarget ia64-*-*]
6421 || [check_effective_target_arm_vect_no_misalign]
6422 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6423 || ([istarget mips*-*-*]
6424 && [et-is-effective-target mips_loongson]) } {
6425 set et_vect_no_align_saved($et_index) 1
6428 verbose "check_effective_target_vect_no_align:\
6429 returning $et_vect_no_align_saved($et_index)" 2
6430 return $et_vect_no_align_saved($et_index)
6433 # Return 1 if the target supports a vector misalign access, 0 otherwise.
6435 # This won't change
for different subtargets so
cache the result.
6437 proc check_effective_target_vect_hw_misalign
{ } {
6438 global et_vect_hw_misalign_saved
6441 if [info exists et_vect_hw_misalign_saved
($et_index
)] {
6442 verbose
"check_effective_target_vect_hw_misalign: using cached result" 2
6444 set et_vect_hw_misalign_saved
($et_index
) 0
6445 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6446 ||
([istarget powerpc
*-*-*] && [check_p8vector_hw_available
])
6447 ||
[istarget aarch64
*-*-*]
6448 ||
([istarget mips
*-*-*] && [et
-is
-effective
-target mips_msa
])
6449 ||
([istarget s390
*-*-*]
6450 && [check_effective_target_s390_vx
]) } {
6451 set et_vect_hw_misalign_saved
($et_index
) 1
6453 if { [istarget arm
*-*-*] } {
6454 set et_vect_hw_misalign_saved
($et_index
) [expr
![check_effective_target_arm_vect_no_misalign
]]
6457 verbose
"check_effective_target_vect_hw_misalign:\
6458 returning $et_vect_hw_misalign_saved
($et_index
)" 2
6459 return $et_vect_hw_misalign_saved
($et_index
)
6463 #
Return 1 if arrays are aligned to the vector alignment
6464 # boundary
, 0 otherwise.
6466 proc check_effective_target_vect_aligned_arrays
{ } {
6467 set et_vect_aligned_arrays
0
6468 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
6469 && !([is
-effective
-target ia32
]
6470 ||
([check_avx_available
] && ![check_prefer_avx128
])))
6471 ||
[istarget spu
-*-*] } {
6472 set et_vect_aligned_arrays
1
6475 verbose
"check_effective_target_vect_aligned_arrays:\
6476 returning $et_vect_aligned_arrays
" 2
6477 return $et_vect_aligned_arrays
6480 #
Return 1 if types of size
32 bit or less are naturally aligned
6481 #
(aligned to their type
-size
), 0 otherwise.
6483 # This won
't change for different subtargets so cache the result.
6485 proc check_effective_target_natural_alignment_32 { } {
6486 global et_natural_alignment_32
6488 if [info exists et_natural_alignment_32_saved] {
6489 verbose "check_effective_target_natural_alignment_32: using cached result" 2
6491 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
6492 set et_natural_alignment_32_saved 1
6493 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
6494 || [istarget avr-*-*] } {
6495 set et_natural_alignment_32_saved 0
6498 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
6499 return $et_natural_alignment_32_saved
6502 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
6503 # type-size), 0 otherwise.
6505 # This won't change
for different subtargets so
cache the result.
6507 proc check_effective_target_natural_alignment_64
{ } {
6508 global et_natural_alignment_64
6510 if [info exists et_natural_alignment_64_saved
] {
6511 verbose
"check_effective_target_natural_alignment_64: using cached result" 2
6513 set et_natural_alignment_64_saved
0
6514 if { ([is
-effective
-target lp64
] && ![istarget
*-*-darwin
*])
6515 ||
[istarget spu
-*-*] } {
6516 set et_natural_alignment_64_saved
1
6519 verbose
"check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
6520 return $et_natural_alignment_64_saved
6523 #
Return 1 if all vector types are naturally aligned
(aligned to their
6524 # type
-size
), 0 otherwise.
6526 proc check_effective_target_vect_natural_alignment
{ } {
6527 set et_vect_natural_alignment
1
6528 if { [check_effective_target_arm_eabi
]
6529 ||
[istarget nvptx
-*-*]
6530 ||
[istarget s390
*-*-*] } {
6531 set et_vect_natural_alignment
0
6533 verbose
"check_effective_target_vect_natural_alignment:\
6534 returning $et_vect_natural_alignment
" 2
6535 return $et_vect_natural_alignment
6538 #
Return true
if fully
-masked loops are supported.
6540 proc check_effective_target_vect_fully_masked
{ } {
6541 return [check_effective_target_aarch64_sve
]
6544 #
Return 1 if the target doesn
't prefer any alignment beyond element
6545 # alignment during vectorization.
6547 proc check_effective_target_vect_element_align_preferred { } {
6548 return [expr { [check_effective_target_aarch64_sve]
6549 && [check_effective_target_vect_variable_length] }]
6552 # Return 1 if we can align stack data to the preferred vector alignment.
6554 proc check_effective_target_vect_align_stack_vars { } {
6555 if { [check_effective_target_aarch64_sve] } {
6556 return [check_effective_target_vect_variable_length]
6561 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
6563 proc check_effective_target_vector_alignment_reachable { } {
6564 set et_vector_alignment_reachable 0
6565 if { [check_effective_target_vect_aligned_arrays]
6566 || [check_effective_target_natural_alignment_32] } {
6567 set et_vector_alignment_reachable 1
6569 verbose "check_effective_target_vector_alignment_reachable:\
6570 returning $et_vector_alignment_reachable" 2
6571 return $et_vector_alignment_reachable
6574 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
6576 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
6577 set et_vector_alignment_reachable_for_64bit 0
6578 if { [check_effective_target_vect_aligned_arrays]
6579 || [check_effective_target_natural_alignment_64] } {
6580 set et_vector_alignment_reachable_for_64bit 1
6582 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
6583 returning $et_vector_alignment_reachable_for_64bit" 2
6584 return $et_vector_alignment_reachable_for_64bit
6587 # Return 1 if the target only requires element alignment for vector accesses
6589 proc check_effective_target_vect_element_align { } {
6590 global et_vect_element_align
6593 if [info exists et_vect_element_align($et_index)] {
6594 verbose "check_effective_target_vect_element_align:\
6595 using cached result" 2
6597 set et_vect_element_align($et_index) 0
6598 if { ([istarget arm*-*-*]
6599 && ![check_effective_target_arm_vect_no_misalign])
6600 || [check_effective_target_vect_hw_misalign] } {
6601 set et_vect_element_align($et_index) 1
6605 verbose "check_effective_target_vect_element_align:\
6606 returning $et_vect_element_align($et_index)" 2
6607 return $et_vect_element_align($et_index)
6610 # Return 1 if we expect to see unaligned accesses in at least some
6613 proc check_effective_target_vect_unaligned_possible { } {
6614 return [expr { ![check_effective_target_vect_element_align_preferred]
6615 && (![check_effective_target_vect_no_align]
6616 || [check_effective_target_vect_hw_misalign]) }]
6619 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
6621 proc check_effective_target_vect_load_lanes { } {
6622 global et_vect_load_lanes
6624 if [info exists et_vect_load_lanes] {
6625 verbose "check_effective_target_vect_load_lanes: using cached result" 2
6627 set et_vect_load_lanes 0
6628 # We don't support load_lanes correctly
on big
-endian arm.
6629 if { ([check_effective_target_arm_little_endian
] && [check_effective_target_arm_neon_ok
])
6630 ||
[istarget aarch64
*-*-*] } {
6631 set et_vect_load_lanes
1
6635 verbose
"check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6636 return $et_vect_load_lanes
6639 #
Return 1 if the target supports vector masked stores.
6641 proc check_effective_target_vect_masked_store
{ } {
6642 return [check_effective_target_aarch64_sve
]
6645 #
Return 1 if the target supports vector scatter stores.
6647 proc check_effective_target_vect_scatter_store
{ } {
6648 return [check_effective_target_aarch64_sve
]
6651 #
Return 1 if the target supports vector conditional operations
, 0 otherwise.
6653 proc check_effective_target_vect_condition
{ } {
6654 global et_vect_cond_saved
6657 if [info exists et_vect_cond_saved
($et_index
)] {
6658 verbose
"check_effective_target_vect_cond: using cached result" 2
6660 set et_vect_cond_saved
($et_index
) 0
6661 if { [istarget aarch64
*-*-*]
6662 ||
[istarget powerpc
*-*-*]
6663 ||
[istarget ia64
-*-*]
6664 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6665 ||
[istarget spu
-*-*]
6666 ||
([istarget mips
*-*-*]
6667 && [et
-is
-effective
-target mips_msa
])
6668 ||
([istarget arm
*-*-*]
6669 && [check_effective_target_arm_neon_ok
])
6670 ||
([istarget s390
*-*-*]
6671 && [check_effective_target_s390_vx
]) } {
6672 set et_vect_cond_saved
($et_index
) 1
6676 verbose
"check_effective_target_vect_cond:\
6677 returning $et_vect_cond_saved
($et_index
)" 2
6678 return $et_vect_cond_saved
($et_index
)
6681 #
Return 1 if the target supports vector conditional operations where
6682 # the comparison has different type from the lhs
, 0 otherwise.
6684 proc check_effective_target_vect_cond_mixed
{ } {
6685 global et_vect_cond_mixed_saved
6688 if [info exists et_vect_cond_mixed_saved
($et_index
)] {
6689 verbose
"check_effective_target_vect_cond_mixed: using cached result" 2
6691 set et_vect_cond_mixed_saved
($et_index
) 0
6692 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6693 ||
[istarget aarch64
*-*-*]
6694 ||
[istarget powerpc
*-*-*]
6695 ||
([istarget mips
*-*-*]
6696 && [et
-is
-effective
-target mips_msa
])
6697 ||
([istarget s390
*-*-*]
6698 && [check_effective_target_s390_vx
]) } {
6699 set et_vect_cond_mixed_saved
($et_index
) 1
6703 verbose
"check_effective_target_vect_cond_mixed:\
6704 returning $et_vect_cond_mixed_saved
($et_index
)" 2
6705 return $et_vect_cond_mixed_saved
($et_index
)
6708 #
Return 1 if the target supports vector char multiplication
, 0 otherwise.
6710 proc check_effective_target_vect_char_mult
{ } {
6711 global et_vect_char_mult_saved
6714 if [info exists et_vect_char_mult_saved
($et_index
)] {
6715 verbose
"check_effective_target_vect_char_mult: using cached result" 2
6717 set et_vect_char_mult_saved
($et_index
) 0
6718 if { [istarget aarch64
*-*-*]
6719 ||
[istarget ia64
-*-*]
6720 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6721 ||
[check_effective_target_arm32
]
6722 ||
[check_effective_target_powerpc_altivec
]
6723 ||
([istarget mips
*-*-*]
6724 && [et
-is
-effective
-target mips_msa
])
6725 ||
([istarget s390
*-*-*]
6726 && [check_effective_target_s390_vx
]) } {
6727 set et_vect_char_mult_saved
($et_index
) 1
6731 verbose
"check_effective_target_vect_char_mult:\
6732 returning $et_vect_char_mult_saved
($et_index
)" 2
6733 return $et_vect_char_mult_saved
($et_index
)
6736 #
Return 1 if the target supports vector short multiplication
, 0 otherwise.
6738 proc check_effective_target_vect_short_mult
{ } {
6739 global et_vect_short_mult_saved
6742 if [info exists et_vect_short_mult_saved
($et_index
)] {
6743 verbose
"check_effective_target_vect_short_mult: using cached result" 2
6745 set et_vect_short_mult_saved
($et_index
) 0
6746 if { [istarget ia64
-*-*]
6747 ||
[istarget spu
-*-*]
6748 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6749 ||
[istarget powerpc
*-*-*]
6750 ||
[istarget aarch64
*-*-*]
6751 ||
[check_effective_target_arm32
]
6752 ||
([istarget mips
*-*-*]
6753 && ([et
-is
-effective
-target mips_msa
]
6754 ||
[et
-is
-effective
-target mips_loongson
]))
6755 ||
([istarget s390
*-*-*]
6756 && [check_effective_target_s390_vx
]) } {
6757 set et_vect_short_mult_saved
($et_index
) 1
6761 verbose
"check_effective_target_vect_short_mult:\
6762 returning $et_vect_short_mult_saved
($et_index
)" 2
6763 return $et_vect_short_mult_saved
($et_index
)
6766 #
Return 1 if the target supports vector
int multiplication
, 0 otherwise.
6768 proc check_effective_target_vect_int_mult
{ } {
6769 global et_vect_int_mult_saved
6772 if [info exists et_vect_int_mult_saved
($et_index
)] {
6773 verbose
"check_effective_target_vect_int_mult: using cached result" 2
6775 set et_vect_int_mult_saved
($et_index
) 0
6776 if { ([istarget powerpc
*-*-*] && ![istarget powerpc
-*-linux
*paired
*])
6777 ||
[istarget spu
-*-*]
6778 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6779 ||
[istarget ia64
-*-*]
6780 ||
[istarget aarch64
*-*-*]
6781 ||
([istarget mips
*-*-*]
6782 && [et
-is
-effective
-target mips_msa
])
6783 ||
[check_effective_target_arm32
]
6784 ||
([istarget s390
*-*-*]
6785 && [check_effective_target_s390_vx
]) } {
6786 set et_vect_int_mult_saved
($et_index
) 1
6790 verbose
"check_effective_target_vect_int_mult:\
6791 returning $et_vect_int_mult_saved
($et_index
)" 2
6792 return $et_vect_int_mult_saved
($et_index
)
6795 #
Return 1 if the target supports
64 bit hardware vector
6796 # multiplication of long operands with a long result
, 0 otherwise.
6798 # This can change
for different subtargets so
do not
cache the result.
6800 proc check_effective_target_vect_long_mult
{ } {
6801 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6802 ||
(([istarget powerpc
*-*-*]
6803 && ![istarget powerpc
-*-linux
*paired
*])
6804 && [check_effective_target_ilp32
])
6805 ||
[is
-effective
-target arm_neon
]
6806 ||
([istarget sparc
*-*-*] && [check_effective_target_ilp32
])
6807 ||
[istarget aarch64
*-*-*]
6808 ||
([istarget mips
*-*-*]
6809 && [et
-is
-effective
-target mips_msa
]) } {
6815 verbose
"check_effective_target_vect_long_mult: returning $answer" 2
6819 #
Return 1 if the target supports vector even
/odd elements extraction
, 0 otherwise.
6821 proc check_effective_target_vect_extract_even_odd
{ } {
6822 global et_vect_extract_even_odd_saved
6825 if [info exists et_vect_extract_even_odd_saved
($et_index
)] {
6826 verbose
"check_effective_target_vect_extract_even_odd:\
6827 using cached result
" 2
6829 set et_vect_extract_even_odd_saved
($et_index
) 0
6830 if { [istarget aarch64
*-*-*]
6831 ||
[istarget powerpc
*-*-*]
6832 ||
[is
-effective
-target arm_neon
]
6833 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6834 ||
[istarget ia64
-*-*]
6835 ||
[istarget spu
-*-*]
6836 ||
([istarget mips
*-*-*]
6837 && ([et
-is
-effective
-target mips_msa
]
6838 ||
[et
-is
-effective
-target mpaired_single
]))
6839 ||
([istarget s390
*-*-*]
6840 && [check_effective_target_s390_vx
]) } {
6841 set et_vect_extract_even_odd_saved
($et_index
) 1
6845 verbose
"check_effective_target_vect_extract_even_odd:\
6846 returning $et_vect_extract_even_odd_saved
($et_index
)" 2
6847 return $et_vect_extract_even_odd_saved
($et_index
)
6850 #
Return 1 if the target supports vector interleaving
, 0 otherwise.
6852 proc check_effective_target_vect_interleave
{ } {
6853 global et_vect_interleave_saved
6856 if [info exists et_vect_interleave_saved
($et_index
)] {
6857 verbose
"check_effective_target_vect_interleave: using cached result" 2
6859 set et_vect_interleave_saved
($et_index
) 0
6860 if { [istarget aarch64
*-*-*]
6861 ||
[istarget powerpc
*-*-*]
6862 ||
[is
-effective
-target arm_neon
]
6863 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6864 ||
[istarget ia64
-*-*]
6865 ||
[istarget spu
-*-*]
6866 ||
([istarget mips
*-*-*]
6867 && ([et
-is
-effective
-target mpaired_single
]
6868 ||
[et
-is
-effective
-target mips_msa
]))
6869 ||
([istarget s390
*-*-*]
6870 && [check_effective_target_s390_vx
]) } {
6871 set et_vect_interleave_saved
($et_index
) 1
6875 verbose
"check_effective_target_vect_interleave:\
6876 returning $et_vect_interleave_saved
($et_index
)" 2
6877 return $et_vect_interleave_saved
($et_index
)
6880 foreach N
{2 3 4 8} {
6881 eval
[string map
[list N $N
] {
6882 #
Return 1 if the target supports
2-vector interleaving
6883 proc check_effective_target_vect_stridedN
{ } {
6884 global et_vect_stridedN_saved
6887 if [info exists et_vect_stridedN_saved
($et_index
)] {
6888 verbose
"check_effective_target_vect_stridedN:\
6889 using cached result
" 2
6891 set et_vect_stridedN_saved
($et_index
) 0
6893 && [check_effective_target_vect_interleave
]
6894 && [check_effective_target_vect_extract_even_odd
] } {
6895 set et_vect_stridedN_saved
($et_index
) 1
6897 if { ([istarget arm
*-*-*]
6898 ||
[istarget aarch64
*-*-*]) && N
>= 2 && N
<= 4 } {
6899 set et_vect_stridedN_saved
($et_index
) 1
6903 verbose
"check_effective_target_vect_stridedN:\
6904 returning $et_vect_stridedN_saved
($et_index
)" 2
6905 return $et_vect_stridedN_saved
($et_index
)
6910 #
Return the list of vector sizes
(in bits
) that each target supports.
6911 # A vector length of
"0" indicates variable-length vectors.
6913 proc available_vector_sizes
{ } {
6915 if { [istarget aarch64
*-*-*] } {
6916 if { [check_effective_target_aarch64_sve
] } {
6917 lappend result
[aarch64_sve_bits
]
6919 lappend result
128 64
6920 } elseif
{ [istarget arm
*-*-*]
6921 && [check_effective_target_arm_neon_ok
] } {
6922 lappend result
128 64
6923 } elseif
{ (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
6924 && ([check_avx_available
] && ![check_prefer_avx128
])) } {
6925 lappend result
256 128
6926 } elseif
{ [istarget sparc
*-*-*] } {
6929 # The traditional default asumption.
6935 #
Return 1 if the target supports multiple vector sizes
6937 proc check_effective_target_vect_multiple_sizes
{ } {
6938 return [expr
{ [llength
[available_vector_sizes
]] > 1 }]
6941 #
Return true
if variable-length vectors are supported.
6943 proc check_effective_target_vect_variable_length
{ } {
6944 return [expr
{ [lindex
[available_vector_sizes
] 0] == 0 }]
6947 #
Return 1 if the target supports vectors of
64 bits.
6949 proc check_effective_target_vect64
{ } {
6950 return [expr
{ [lsearch
-exact
[available_vector_sizes
] 64] >= 0 }]
6953 #
Return 1 if the target supports vector copysignf calls.
6955 proc check_effective_target_vect_call_copysignf
{ } {
6956 global et_vect_call_copysignf_saved
6959 if [info exists et_vect_call_copysignf_saved
($et_index
)] {
6960 verbose
"check_effective_target_vect_call_copysignf:\
6961 using cached result
" 2
6963 set et_vect_call_copysignf_saved
($et_index
) 0
6964 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6965 ||
[istarget powerpc
*-*-*]
6966 ||
[istarget aarch64
*-*-*] } {
6967 set et_vect_call_copysignf_saved
($et_index
) 1
6971 verbose
"check_effective_target_vect_call_copysignf:\
6972 returning $et_vect_call_copysignf_saved
($et_index
)" 2
6973 return $et_vect_call_copysignf_saved
($et_index
)
6976 #
Return 1 if the target supports hardware square root instructions.
6978 proc check_effective_target_sqrt_insn
{ } {
6979 global et_sqrt_insn_saved
6981 if [info exists et_sqrt_insn_saved
] {
6982 verbose
"check_effective_target_hw_sqrt: using cached result" 2
6984 set et_sqrt_insn_saved
0
6985 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
6986 ||
[istarget powerpc
*-*-*]
6987 ||
[istarget aarch64
*-*-*]
6988 ||
([istarget arm
*-*-*] && [check_effective_target_arm_vfp_ok
])
6989 ||
([istarget s390
*-*-*]
6990 && [check_effective_target_s390_vx
]) } {
6991 set et_sqrt_insn_saved
1
6995 verbose
"check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6996 return $et_sqrt_insn_saved
6999 #
Return 1 if the target supports vector sqrtf calls.
7001 proc check_effective_target_vect_call_sqrtf
{ } {
7002 global et_vect_call_sqrtf_saved
7005 if [info exists et_vect_call_sqrtf_saved
($et_index
)] {
7006 verbose
"check_effective_target_vect_call_sqrtf: using cached result" 2
7008 set et_vect_call_sqrtf_saved
($et_index
) 0
7009 if { [istarget aarch64
*-*-*]
7010 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7011 ||
([istarget powerpc
*-*-*] && [check_vsx_hw_available
])
7012 ||
([istarget s390
*-*-*]
7013 && [check_effective_target_s390_vx
]) } {
7014 set et_vect_call_sqrtf_saved
($et_index
) 1
7018 verbose
"check_effective_target_vect_call_sqrtf:\
7019 returning $et_vect_call_sqrtf_saved
($et_index
)" 2
7020 return $et_vect_call_sqrtf_saved
($et_index
)
7023 #
Return 1 if the target supports vector lrint calls.
7025 proc check_effective_target_vect_call_lrint
{ } {
7026 set et_vect_call_lrint
0
7027 if { (([istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
7028 && [check_effective_target_ilp32
]) } {
7029 set et_vect_call_lrint
1
7032 verbose
"check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
7033 return $et_vect_call_lrint
7036 #
Return 1 if the target supports vector btrunc calls.
7038 proc check_effective_target_vect_call_btrunc
{ } {
7039 global et_vect_call_btrunc_saved
7042 if [info exists et_vect_call_btrunc_saved
($et_index
)] {
7043 verbose
"check_effective_target_vect_call_btrunc:\
7044 using cached result
" 2
7046 set et_vect_call_btrunc_saved
($et_index
) 0
7047 if { [istarget aarch64
*-*-*] } {
7048 set et_vect_call_btrunc_saved
($et_index
) 1
7052 verbose
"check_effective_target_vect_call_btrunc:\
7053 returning $et_vect_call_btrunc_saved
($et_index
)" 2
7054 return $et_vect_call_btrunc_saved
($et_index
)
7057 #
Return 1 if the target supports vector btruncf calls.
7059 proc check_effective_target_vect_call_btruncf
{ } {
7060 global et_vect_call_btruncf_saved
7063 if [info exists et_vect_call_btruncf_saved
($et_index
)] {
7064 verbose
"check_effective_target_vect_call_btruncf:\
7065 using cached result
" 2
7067 set et_vect_call_btruncf_saved
($et_index
) 0
7068 if { [istarget aarch64
*-*-*] } {
7069 set et_vect_call_btruncf_saved
($et_index
) 1
7073 verbose
"check_effective_target_vect_call_btruncf:\
7074 returning $et_vect_call_btruncf_saved
($et_index
)" 2
7075 return $et_vect_call_btruncf_saved
($et_index
)
7078 #
Return 1 if the target supports vector ceil calls.
7080 proc check_effective_target_vect_call_ceil
{ } {
7081 global et_vect_call_ceil_saved
7084 if [info exists et_vect_call_ceil_saved
($et_index
)] {
7085 verbose
"check_effective_target_vect_call_ceil: using cached result" 2
7087 set et_vect_call_ceil_saved
($et_index
) 0
7088 if { [istarget aarch64
*-*-*] } {
7089 set et_vect_call_ceil_saved
($et_index
) 1
7093 verbose
"check_effective_target_vect_call_ceil:\
7094 returning $et_vect_call_ceil_saved
($et_index
)" 2
7095 return $et_vect_call_ceil_saved
($et_index
)
7098 #
Return 1 if the target supports vector ceilf calls.
7100 proc check_effective_target_vect_call_ceilf
{ } {
7101 global et_vect_call_ceilf_saved
7104 if [info exists et_vect_call_ceilf_saved
($et_index
)] {
7105 verbose
"check_effective_target_vect_call_ceilf: using cached result" 2
7107 set et_vect_call_ceilf_saved
($et_index
) 0
7108 if { [istarget aarch64
*-*-*] } {
7109 set et_vect_call_ceilf_saved
($et_index
) 1
7113 verbose
"check_effective_target_vect_call_ceilf:\
7114 returning $et_vect_call_ceilf_saved
($et_index
)" 2
7115 return $et_vect_call_ceilf_saved
($et_index
)
7118 #
Return 1 if the target supports vector floor calls.
7120 proc check_effective_target_vect_call_floor
{ } {
7121 global et_vect_call_floor_saved
7124 if [info exists et_vect_call_floor_saved
($et_index
)] {
7125 verbose
"check_effective_target_vect_call_floor: using cached result" 2
7127 set et_vect_call_floor_saved
($et_index
) 0
7128 if { [istarget aarch64
*-*-*] } {
7129 set et_vect_call_floor_saved
($et_index
) 1
7133 verbose
"check_effective_target_vect_call_floor:\
7134 returning $et_vect_call_floor_saved
($et_index
)" 2
7135 return $et_vect_call_floor_saved
($et_index
)
7138 #
Return 1 if the target supports vector floorf calls.
7140 proc check_effective_target_vect_call_floorf
{ } {
7141 global et_vect_call_floorf_saved
7144 if [info exists et_vect_call_floorf_saved
($et_index
)] {
7145 verbose
"check_effective_target_vect_call_floorf: using cached result" 2
7147 set et_vect_call_floorf_saved
($et_index
) 0
7148 if { [istarget aarch64
*-*-*] } {
7149 set et_vect_call_floorf_saved
($et_index
) 1
7153 verbose
"check_effective_target_vect_call_floorf:\
7154 returning $et_vect_call_floorf_saved
($et_index
)" 2
7155 return $et_vect_call_floorf_saved
($et_index
)
7158 #
Return 1 if the target supports vector lceil calls.
7160 proc check_effective_target_vect_call_lceil
{ } {
7161 global et_vect_call_lceil_saved
7164 if [info exists et_vect_call_lceil_saved
($et_index
)] {
7165 verbose
"check_effective_target_vect_call_lceil: using cached result" 2
7167 set et_vect_call_lceil_saved
($et_index
) 0
7168 if { [istarget aarch64
*-*-*] } {
7169 set et_vect_call_lceil_saved
($et_index
) 1
7173 verbose
"check_effective_target_vect_call_lceil:\
7174 returning $et_vect_call_lceil_saved
($et_index
)" 2
7175 return $et_vect_call_lceil_saved
($et_index
)
7178 #
Return 1 if the target supports vector lfloor calls.
7180 proc check_effective_target_vect_call_lfloor
{ } {
7181 global et_vect_call_lfloor_saved
7184 if [info exists et_vect_call_lfloor_saved
($et_index
)] {
7185 verbose
"check_effective_target_vect_call_lfloor: using cached result" 2
7187 set et_vect_call_lfloor_saved
($et_index
) 0
7188 if { [istarget aarch64
*-*-*] } {
7189 set et_vect_call_lfloor_saved
($et_index
) 1
7193 verbose
"check_effective_target_vect_call_lfloor:\
7194 returning $et_vect_call_lfloor_saved
($et_index
)" 2
7195 return $et_vect_call_lfloor_saved
($et_index
)
7198 #
Return 1 if the target supports vector nearbyint calls.
7200 proc check_effective_target_vect_call_nearbyint
{ } {
7201 global et_vect_call_nearbyint_saved
7204 if [info exists et_vect_call_nearbyint_saved
($et_index
)] {
7205 verbose
"check_effective_target_vect_call_nearbyint: using cached result" 2
7207 set et_vect_call_nearbyint_saved
($et_index
) 0
7208 if { [istarget aarch64
*-*-*] } {
7209 set et_vect_call_nearbyint_saved
($et_index
) 1
7213 verbose
"check_effective_target_vect_call_nearbyint:\
7214 returning $et_vect_call_nearbyint_saved
($et_index
)" 2
7215 return $et_vect_call_nearbyint_saved
($et_index
)
7218 #
Return 1 if the target supports vector nearbyintf calls.
7220 proc check_effective_target_vect_call_nearbyintf
{ } {
7221 global et_vect_call_nearbyintf_saved
7224 if [info exists et_vect_call_nearbyintf_saved
($et_index
)] {
7225 verbose
"check_effective_target_vect_call_nearbyintf:\
7226 using cached result
" 2
7228 set et_vect_call_nearbyintf_saved
($et_index
) 0
7229 if { [istarget aarch64
*-*-*] } {
7230 set et_vect_call_nearbyintf_saved
($et_index
) 1
7234 verbose
"check_effective_target_vect_call_nearbyintf:\
7235 returning $et_vect_call_nearbyintf_saved
($et_index
)" 2
7236 return $et_vect_call_nearbyintf_saved
($et_index
)
7239 #
Return 1 if the target supports vector
round calls.
7241 proc check_effective_target_vect_call_round
{ } {
7242 global et_vect_call_round_saved
7245 if [info exists et_vect_call_round_saved
($et_index
)] {
7246 verbose
"check_effective_target_vect_call_round: using cached result" 2
7248 set et_vect_call_round_saved
($et_index
) 0
7249 if { [istarget aarch64
*-*-*] } {
7250 set et_vect_call_round_saved
($et_index
) 1
7254 verbose
"check_effective_target_vect_call_round:\
7255 returning $et_vect_call_round_saved
($et_index
)" 2
7256 return $et_vect_call_round_saved
($et_index
)
7259 #
Return 1 if the target supports vector roundf calls.
7261 proc check_effective_target_vect_call_roundf
{ } {
7262 global et_vect_call_roundf_saved
7265 if [info exists et_vect_call_roundf_saved
($et_index
)] {
7266 verbose
"check_effective_target_vect_call_roundf: using cached result" 2
7268 set et_vect_call_roundf_saved
($et_index
) 0
7269 if { [istarget aarch64
*-*-*] } {
7270 set et_vect_call_roundf_saved
($et_index
) 1
7274 verbose
"check_effective_target_vect_call_roundf:\
7275 returning $et_vect_call_roundf_saved
($et_index
)" 2
7276 return $et_vect_call_roundf_saved
($et_index
)
7279 #
Return 1 if the target supports AND
, OR and XOR reduction.
7281 proc check_effective_target_vect_logical_reduc
{ } {
7282 return [check_effective_target_aarch64_sve
]
7285 #
Return 1 if the target supports the fold_extract_last optab.
7287 proc check_effective_target_vect_fold_extract_last
{ } {
7288 return [check_effective_target_aarch64_sve
]
7291 #
Return 1 if the target supports section
-anchors
7293 proc check_effective_target_section_anchors
{ } {
7294 global et_section_anchors_saved
7296 if [info exists et_section_anchors_saved
] {
7297 verbose
"check_effective_target_section_anchors: using cached result" 2
7299 set et_section_anchors_saved
0
7300 if { [istarget powerpc
*-*-*]
7301 ||
[istarget arm
*-*-*]
7302 ||
[istarget aarch64
*-*-*] } {
7303 set et_section_anchors_saved
1
7307 verbose
"check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
7308 return $et_section_anchors_saved
7311 #
Return 1 if the target supports atomic operations
on "int_128" values.
7313 proc check_effective_target_sync_int_128
{ } {
7314 if { [istarget spu
-*-*] } {
7321 #
Return 1 if the target supports atomic operations
on "int_128" values
7322 # and can
execute them.
7323 # This requires support
for both compare
-and
-swap and true atomic loads.
7325 proc check_effective_target_sync_int_128_runtime
{ } {
7326 if { [istarget spu
-*-*] } {
7333 #
Return 1 if the target supports atomic operations
on "long long".
7335 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
7336 # Note
: 32bit s390 targets require
-mzarch in dg
-options.
7338 proc check_effective_target_sync_long_long
{ } {
7339 if { [istarget i?
86-*-*] ||
[istarget x86_64
-*-*])
7340 ||
[istarget aarch64
*-*-*]
7341 ||
[istarget arm
*-*-*]
7342 ||
[istarget alpha
*-*-*]
7343 ||
([istarget sparc
*-*-*] && [check_effective_target_lp64
])
7344 ||
[istarget s390
*-*-*]
7345 ||
[istarget spu
-*-*] } {
7352 #
Return 1 if the target supports atomic operations
on "long long"
7353 # and can
execute them.
7355 # Note
: 32bit x86 targets require
-march
=pentium in dg
-options.
7357 proc check_effective_target_sync_long_long_runtime
{ } {
7358 if { (([istarget x86_64
-*-*] ||
[istarget i?
86-*-*])
7359 && [check_cached_effective_target sync_long_long_available
{
7360 check_runtime_nocache sync_long_long_available
{
7364 unsigned
int eax
, ebx
, ecx
, edx
;
7365 if (__get_cpuid
(1, &eax
, &ebx
, &ecx
, &edx
))
7366 return !(edx
& bit_CMPXCHG8B
);
7371 ||
[istarget aarch64
*-*-*]
7372 ||
([istarget arm
*-*-linux
-*]
7373 && [check_runtime sync_longlong_runtime
{
7379 if (sizeof
(long long
) != 8)
7382 /* Just check
for native
;
7383 checking
for kernel fallback is tricky.
*/
7384 asm volatile
("ldrexd r0,r1, [%0]"
7385 : : "r" (&l1) : "r0", "r1");
7389 ||
[istarget alpha
*-*-*]
7390 ||
([istarget sparc
*-*-*]
7391 && [check_effective_target_lp64
]
7392 && [check_effective_target_ultrasparc_hw
])
7393 ||
[istarget spu
-*-*]
7394 ||
([istarget powerpc
*-*-*] && [check_effective_target_lp64
]) } {
7401 #
Return 1 if the target supports byte swap instructions.
7403 proc check_effective_target_bswap
{ } {
7404 global et_bswap_saved
7406 if [info exists et_bswap_saved
] {
7407 verbose
"check_effective_target_bswap: using cached result" 2
7409 set et_bswap_saved
0
7410 if { [istarget aarch64
*-*-*]
7411 ||
[istarget alpha
*-*-*]
7412 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7413 ||
[istarget m68k
-*-*]
7414 ||
[istarget powerpc
*-*-*]
7415 ||
[istarget rs6000
-*-*]
7416 ||
[istarget s390
*-*-*]
7417 ||
([istarget arm
*-*-*]
7418 && [check_no_compiler_messages_nocache arm_v6_or_later object
{
7420 #error not armv6 or later
7424 set et_bswap_saved
1
7428 verbose
"check_effective_target_bswap: returning $et_bswap_saved" 2
7429 return $et_bswap_saved
7432 #
Return 1 if the target supports atomic operations
on "int" and "long".
7434 proc check_effective_target_sync_int_long
{ } {
7435 global et_sync_int_long_saved
7437 if [info exists et_sync_int_long_saved
] {
7438 verbose
"check_effective_target_sync_int_long: using cached result" 2
7440 set et_sync_int_long_saved
0
7441 # This is intentionally powerpc but not rs6000
, rs6000 doesn
't have the
7442 # load-reserved/store-conditional instructions.
7443 if { [istarget ia64-*-*]
7444 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7445 || [istarget aarch64*-*-*]
7446 || [istarget alpha*-*-*]
7447 || [istarget arm*-*-linux-*]
7448 || ([istarget arm*-*-*]
7449 && [check_effective_target_arm_acq_rel])
7450 || [istarget bfin*-*linux*]
7451 || [istarget hppa*-*linux*]
7452 || [istarget s390*-*-*]
7453 || [istarget powerpc*-*-*]
7454 || [istarget crisv32-*-*] || [istarget cris-*-*]
7455 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7456 || [istarget spu-*-*]
7457 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7458 || [check_effective_target_mips_llsc] } {
7459 set et_sync_int_long_saved 1
7463 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
7464 return $et_sync_int_long_saved
7467 # Return 1 if the target supports atomic operations on "char" and "short".
7469 proc check_effective_target_sync_char_short { } {
7470 global et_sync_char_short_saved
7472 if [info exists et_sync_char_short_saved] {
7473 verbose "check_effective_target_sync_char_short: using cached result" 2
7475 set et_sync_char_short_saved 0
7476 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7477 #
load-reserved/store
-conditional instructions.
7478 if { [istarget aarch64
*-*-*]
7479 ||
[istarget ia64
-*-*]
7480 ||
[istarget i?
86-*-*] ||
[istarget x86_64
-*-*]
7481 ||
[istarget alpha
*-*-*]
7482 ||
[istarget arm
*-*-linux
-*]
7483 ||
([istarget arm
*-*-*]
7484 && [check_effective_target_arm_acq_rel
])
7485 ||
[istarget hppa
*-*linux
*]
7486 ||
[istarget s390
*-*-*]
7487 ||
[istarget powerpc
*-*-*]
7488 ||
[istarget crisv32
-*-*] ||
[istarget cris
-*-*]
7489 ||
([istarget sparc
*-*-*] && [check_effective_target_sparc_v9
])
7490 ||
[istarget spu
-*-*]
7491 ||
([istarget arc
*-*-*] && [check_effective_target_arc_atomic
])
7492 ||
[check_effective_target_mips_llsc
] } {
7493 set et_sync_char_short_saved
1
7497 verbose
"check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
7498 return $et_sync_char_short_saved
7501 #
Return 1 if the target uses a ColdFire FPU.
7503 proc check_effective_target_coldfire_fpu
{ } {
7504 return [check_no_compiler_messages coldfire_fpu assembly
{
7511 #
Return true
if this is a uClibc target.
7513 proc check_effective_target_uclibc
{} {
7514 return [check_no_compiler_messages uclibc object
{
7515 #
include <features.h
>
7516 #
if !defined
(__UCLIBC__
)
7522 #
Return true
if this is a uclibc target and
if the uclibc feature
7523 # described by __$feature__ is not present.
7525 proc check_missing_uclibc_feature
{feature
} {
7526 return [check_no_compiler_messages $feature object
"
7527 #
include <features.h
>
7528 #
if !defined
(__UCLIBC
) || defined
(__$
{feature
}__
)
7534 #
Return true
if this is a Newlib target.
7536 proc check_effective_target_newlib
{} {
7537 return [check_no_compiler_messages newlib object
{
7542 # Some newlib versions don
't provide a frexpl and instead depend
7543 # on frexp to implement long double conversions in their printf-like
7544 # functions. This leads to broken results. Detect such versions here.
7546 proc check_effective_target_newlib_broken_long_double_io {} {
7547 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
7553 # Return true if this is NOT a Bionic target.
7555 proc check_effective_target_non_bionic {} {
7556 return [check_no_compiler_messages non_bionic object {
7558 #if defined (__BIONIC__)
7564 # Return true if this target has error.h header.
7566 proc check_effective_target_error_h {} {
7567 return [check_no_compiler_messages error_h object {
7572 # Return true if this target has tgmath.h header.
7574 proc check_effective_target_tgmath_h {} {
7575 return [check_no_compiler_messages tgmath_h object {
7580 # Return true if target's libc supports complex functions.
7582 proc check_effective_target_libc_has_complex_functions
{} {
7583 return [check_no_compiler_messages libc_has_complex_functions object
{
7584 #
include <complex.h
>
7589 #
(a
) an error of a few ULP is expected in string to floating
-point
7590 # conversion functions
; and
7591 #
(b
) overflow is not always detected correctly by those functions.
7593 proc check_effective_target_lax_strtofp
{} {
7594 # By default
, assume that all uClibc targets suffer from this.
7595 return [check_effective_target_uclibc
]
7598 #
Return 1 if this is a target
for which wcsftime is a dummy
7599 # function that always returns
0.
7601 proc check_effective_target_dummy_wcsftime
{} {
7602 # By default
, assume that all uClibc targets suffer from this.
7603 return [check_effective_target_uclibc
]
7606 #
Return 1 if constructors with initialization priority arguments are
7607 # supposed
on this target.
7609 proc check_effective_target_init_priority
{} {
7610 return [check_no_compiler_messages init_priority assembly
"
7611 void f
() __attribute__
((constructor
(1000)));
7616 #
Return 1 if the target matches the effective target
'arg', 0 otherwise.
7617 # This can be used with
any check_
* proc that takes no
argument and
7618 # returns only
1 or
0. It could be used with check_
* procs that take
7619 # arguments with keywords that pass particular arguments.
7621 proc is
-effective
-target
{ arg } {
7624 if { ![info exists et_index
] } {
7625 # Initialize the effective target index that is used in some
7626 # check_effective_target_
* procs.
7629 if { [info procs check_effective_target_$
{arg}] != [list
] } {
7630 set selected
[check_effective_target_$
{arg}]
7633 "vmx_hw" { set selected [check_vmx_hw_available] }
7634 "vsx_hw" { set selected [check_vsx_hw_available] }
7635 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7636 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7637 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7638 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7639 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7640 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7641 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7642 "dfp_hw" { set selected [check_dfp_hw_available] }
7643 "htm_hw" { set selected [check_htm_hw_available] }
7644 "named_sections" { set selected [check_named_sections_available] }
7645 "gc_sections" { set selected [check_gc_sections_available] }
7646 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7647 default
{ error
"unknown effective target keyword `$arg'" }
7650 verbose
"is-effective-target: $arg $selected" 2
7654 #
Return 1 if the
argument is an effective
-target keyword
, 0 otherwise.
7656 proc is
-effective
-target
-keyword
{ arg } {
7657 if { [info procs check_effective_target_$
{arg}] != [list
] } {
7660 # These have different names
for their check_
* procs.
7662 "vmx_hw" { return 1 }
7663 "vsx_hw" { return 1 }
7664 "p8vector_hw" { return 1 }
7665 "p9vector_hw" { return 1 }
7666 "p9modulo_hw" { return 1 }
7667 "ppc_float128_sw" { return 1 }
7668 "ppc_float128_hw" { return 1 }
7669 "ppc_recip_hw" { return 1 }
7670 "dfp_hw" { return 1 }
7671 "htm_hw" { return 1 }
7672 "named_sections" { return 1 }
7673 "gc_sections" { return 1 }
7674 "cxa_atexit" { return 1 }
7675 default
{ return 0 }
7680 #
Execute tests
for all targets in EFFECTIVE_TARGETS list.
Set et_index to
7681 # indicate what target is currently being processed. This is
for
7682 # the vectorizer tests
, e.g. vect_int
, to keep track what target supports
7685 proc et
-dg
-runtest
{ runtest testcases flags default
-extra
-flags
} {
7686 global dg
-do-what
-default
7687 global EFFECTIVE_TARGETS
7690 if { [llength $EFFECTIVE_TARGETS
] > 0 } {
7691 foreach target $EFFECTIVE_TARGETS
{
7692 set target_flags $flags
7693 set dg
-do-what
-default
compile
7694 set et_index
[lsearch
-exact $EFFECTIVE_TARGETS $target
]
7695 if { [info procs add_options_for_$
{target
}] != [list
] } {
7696 set target_flags
[add_options_for_$
{target
} "$flags"]
7698 if { [info procs check_effective_target_$
{target
}_runtime
]
7699 != [list
] && [check_effective_target_$
{target
}_runtime
] } {
7700 set dg
-do-what
-default run
7702 $runtest $testcases $target_flags $
{default
-extra
-flags
}
7706 $runtest $testcases $flags $
{default
-extra
-flags
}
7710 #
Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7711 # et_index
, 0 otherwise.
7713 proc et
-is
-effective
-target
{ target
} {
7714 global EFFECTIVE_TARGETS
7717 if { [llength $EFFECTIVE_TARGETS
] > $et_index
7718 && [lindex $EFFECTIVE_TARGETS $et_index
] == $target
} {
7724 #
Return 1 if target default to short enums
7726 proc check_effective_target_short_enums
{ } {
7727 return [check_no_compiler_messages short_enums assembly
{
7729 int s
[sizeof
(enum foo
) == 1 ?
1 : -1];
7733 #
Return 1 if target supports merging string constants at link time.
7735 proc check_effective_target_string_merging
{ } {
7736 return [check_no_messages_and_pattern string_merging \
7737 "rodata\\.str" assembly {
7738 const char
*var
= "String";
7742 #
Return 1 if target has the basic signed and unsigned types in
7743 #
<stdint.h
>, 0 otherwise. This will be obsolete when GCC ensures a
7744 # working
<stdint.h
> for all targets.
7746 proc check_effective_target_stdint_types
{ } {
7747 return [check_no_compiler_messages stdint_types assembly
{
7749 int8_t a
; int16_t b
; int32_t c
; int64_t d
;
7750 uint8_t e
; uint16_t f
; uint32_t g
; uint64_t h
;
7754 #
Return 1 if target has the basic signed and unsigned types in
7755 #
<inttypes.h
>, 0 otherwise. This is
for tests that GCC
's notions of
7756 # these types agree with those in the header, as some systems have
7757 # only <inttypes.h>.
7759 proc check_effective_target_inttypes_types { } {
7760 return [check_no_compiler_messages inttypes_types assembly {
7761 #include <inttypes.h>
7762 int8_t a; int16_t b; int32_t c; int64_t d;
7763 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7767 # Return 1 if programs are intended to be run on a simulator
7768 # (i.e. slowly) rather than hardware (i.e. fast).
7770 proc check_effective_target_simulator { } {
7772 # All "src/sim" simulators set this one.
7773 if [board_info target exists is_simulator] {
7774 return [board_info target is_simulator]
7777 # The "sid" simulators don't
set that one
, but at least they
set
7779 if [board_info target
exists slow_simulator
] {
7780 return [board_info target slow_simulator
]
7786 #
Return 1 if programs are intended to be run
on hardware rather than
7789 proc check_effective_target_hw
{ } {
7791 # All
"src/sim" simulators set this one.
7792 if [board_info target
exists is_simulator
] {
7793 if [board_info target is_simulator
] {
7800 # The
"sid" simulators don't set that one, but at least they set
7802 if [board_info target
exists slow_simulator
] {
7803 if [board_info target slow_simulator
] {
7813 #
Return 1 if the target is a VxWorks kernel.
7815 proc check_effective_target_vxworks_kernel
{ } {
7816 return [check_no_compiler_messages vxworks_kernel assembly
{
7817 #
if !defined __vxworks || defined __RTP__
7823 #
Return 1 if the target is a VxWorks RTP.
7825 proc check_effective_target_vxworks_rtp
{ } {
7826 return [check_no_compiler_messages vxworks_rtp assembly
{
7827 #
if !defined __vxworks ||
!defined __RTP__
7833 #
Return 1 if the target is expected to provide wide character support.
7835 proc check_effective_target_wchar
{ } {
7836 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR
]} {
7839 return [check_no_compiler_messages wchar assembly
{
7844 #
Return 1 if the target has
<pthread.h
>.
7846 proc check_effective_target_pthread_h
{ } {
7847 return [check_no_compiler_messages pthread_h assembly
{
7848 #
include <pthread.h
>
7852 #
Return 1 if the target can truncate a file from a file
-descriptor
,
7853 # as used by libgfortran
/io
/unix.c
:fd_truncate
; i.e. ftruncate or
7854 # chsize. We test
for a trivially functional truncation
; no stubs.
7855 # As libgfortran uses _FILE_OFFSET_BITS
64, we
do too
; it
'll cause a
7856 # different function to be used.
7858 proc check_effective_target_fd_truncate { } {
7860 #define _FILE_OFFSET_BITS 64
7867 FILE *f = fopen ("tst.tmp", "wb");
7869 const char t[] = "test writing more than ten characters";
7873 write (fd, t, sizeof (t) - 1);
7875 if (ftruncate (fd, 10) != 0)
7884 f = fopen ("tst.tmp", "rb");
7885 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7893 if { [check_runtime ftruncate $prog] } {
7897 regsub "ftruncate" $prog "chsize" prog
7898 return [check_runtime chsize $prog]
7901 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7903 proc add_options_for_c99_runtime { flags } {
7904 if { [istarget *-*-solaris2*] } {
7905 return "$flags -std=c99"
7907 if { [istarget powerpc-*-darwin*] } {
7908 return "$flags -mmacosx-version-min=10.3"
7913 # Add to FLAGS all the target-specific flags needed to enable
7914 # full IEEE compliance mode.
7916 proc add_options_for_ieee { flags } {
7917 if { [istarget alpha*-*-*]
7918 || [istarget sh*-*-*] } {
7919 return "$flags -mieee"
7921 if { [istarget rx-*-*] } {
7922 return "$flags -mnofpu"
7927 if {![info exists flags_to_postpone]} {
7928 set flags_to_postpone ""
7931 # Add to FLAGS the flags needed to enable functions to bind locally
7932 # when using pic/PIC passes in the testsuite.
7933 proc add_options_for_bind_pic_locally { flags } {
7934 global flags_to_postpone
7936 # Instead of returning 'flags
' with the -fPIE or -fpie appended, we save it
7937 # in 'flags_to_postpone
' and append it later in gcc_target_compile procedure in
7938 # order to make sure that the multilib_flags doesn't override this.
7940 if {[check_no_compiler_messages using_pic2 assembly
{
7945 set flags_to_postpone
"-fPIE"
7948 if {[check_no_compiler_messages using_pic1 assembly
{
7953 set flags_to_postpone
"-fpie"
7959 # Add to FLAGS the flags needed to enable
64-bit vectors.
7961 proc add_options_for_double_vectors
{ flags
} {
7962 if [is
-effective
-target arm_neon_ok
] {
7963 return "$flags -mvectorize-with-neon-double"
7969 # Add to FLAGS the flags needed to
define the STACK_SIZE macro.
7971 proc add_options_for_stack_size
{ flags
} {
7972 if [is
-effective
-target stack_size
] {
7973 set stack_size
[dg
-effective
-target
-value stack_size
]
7974 return "$flags -DSTACK_SIZE=$stack_size"
7980 #
Return 1 if the target provides a full C99 runtime.
7982 proc check_effective_target_c99_runtime
{ } {
7983 return [check_cached_effective_target c99_runtime
{
7986 set file
[open
"$srcdir/gcc.dg/builtins-config.h"]
7987 set contents
[read $file
]
7990 #ifndef HAVE_C99_RUNTIME
7991 #error
!HAVE_C99_RUNTIME
7994 check_no_compiler_messages_nocache c99_runtime assembly \
7995 $contents
[add_options_for_c99_runtime
""]
7999 #
Return 1 if target wchar_t is at least
4 bytes.
8001 proc check_effective_target_4byte_wchar_t
{ } {
8002 return [check_no_compiler_messages
4byte_wchar_t object
{
8003 int dummy
[sizeof
(__WCHAR_TYPE__
) >= 4 ?
1 : -1];
8007 #
Return 1 if the target supports automatic stack alignment.
8009 proc check_effective_target_automatic_stack_alignment
{ } {
8010 # Ordinarily x86 supports automatic stack alignment ...
8011 if { [istarget i?
86*-*-*] ||
[istarget x86_64
-*-*] } then {
8012 if { [istarget
*-*-mingw
*] ||
[istarget
*-*-cygwin
*] } {
8013 # ... except Win64 SEH doesn
't. Succeed for Win32 though.
8014 return [check_effective_target_ilp32];
8021 # Return true if we are compiling for AVX target.
8023 proc check_avx_available { } {
8024 if { [check_no_compiler_messages avx_available assembly {
8034 # Return true if we are compiling for SSSE3 target.
8036 proc check_ssse3_available { } {
8037 if { [check_no_compiler_messages sse3a_available assembly {
8047 # Return true if 32- and 16-bytes vectors are available.
8049 proc check_effective_target_vect_sizes_32B_16B { } {
8050 return [expr { [available_vector_sizes] == [list 256 128] }]
8053 # Return true if 16- and 8-bytes vectors are available.
8055 proc check_effective_target_vect_sizes_16B_8B { } {
8056 if { [check_avx_available]
8057 || [is-effective-target arm_neon]
8058 || [istarget aarch64*-*-*] } {
8066 # Return true if 128-bits vectors are preferred even if 256-bits vectors
8069 proc check_prefer_avx128 { } {
8070 if ![check_avx_available] {
8073 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
8074 float a[1024],b[1024],c[1024];
8075 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
8076 } "-O2 -ftree-vectorize"]
8080 # Return 1 if avx512f instructions can be compiled.
8082 proc check_effective_target_avx512f { } {
8083 return [check_no_compiler_messages avx512f object {
8084 typedef double __m512d __attribute__ ((__vector_size__ (64)));
8085 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8087 __m512d _mm512_add (__m512d a)
8089 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
8092 __m128d _mm128_add (__m128d a)
8094 return __builtin_ia32_addsd_round (a, a, 8);
8097 __m128d _mm128_getmant (__m128d a)
8099 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
8104 # Return 1 if avx instructions can be compiled.
8106 proc check_effective_target_avx { } {
8107 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8110 return [check_no_compiler_messages avx object {
8111 void _mm256_zeroall (void)
8113 __builtin_ia32_vzeroall ();
8118 # Return 1 if avx2 instructions can be compiled.
8119 proc check_effective_target_avx2 { } {
8120 return [check_no_compiler_messages avx2 object {
8121 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8123 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
8125 return __builtin_ia32_andnotsi256 (__X, __Y);
8130 # Return 1 if sse instructions can be compiled.
8131 proc check_effective_target_sse { } {
8132 return [check_no_compiler_messages sse object {
8135 __builtin_ia32_stmxcsr ();
8141 # Return 1 if sse2 instructions can be compiled.
8142 proc check_effective_target_sse2 { } {
8143 return [check_no_compiler_messages sse2 object {
8144 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8146 __m128i _mm_srli_si128 (__m128i __A, int __N)
8148 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
8153 # Return 1 if sse4.1 instructions can be compiled.
8154 proc check_effective_target_sse4 { } {
8155 return [check_no_compiler_messages sse4.1 object {
8156 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8157 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8159 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
8161 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
8167 # Return 1 if F16C instructions can be compiled.
8169 proc check_effective_target_f16c { } {
8170 return [check_no_compiler_messages f16c object {
8171 #include "immintrin.h"
8173 foo (unsigned short val)
8175 return _cvtsh_ss (val);
8180 # Return 1 if C wchar_t type is compatible with char16_t.
8182 proc check_effective_target_wchar_t_char16_t_compatible { } {
8183 return [check_no_compiler_messages wchar_t_char16_t object {
8185 __CHAR16_TYPE__ *p16 = &wc;
8186 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8190 # Return 1 if C wchar_t type is compatible with char32_t.
8192 proc check_effective_target_wchar_t_char32_t_compatible { } {
8193 return [check_no_compiler_messages wchar_t_char32_t object {
8195 __CHAR32_TYPE__ *p32 = &wc;
8196 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8200 # Return 1 if pow10 function exists.
8202 proc check_effective_target_pow10 { } {
8203 return [check_runtime pow10 {
8213 # Return 1 if frexpl function exists.
8215 proc check_effective_target_frexpl { } {
8216 return [check_runtime frexpl {
8221 x = frexpl (5.0, &y);
8228 # Return 1 if issignaling function exists.
8229 proc check_effective_target_issignaling {} {
8230 return [check_runtime issignaling {
8235 return issignaling (0.0);
8240 # Return 1 if current options generate DFP instructions, 0 otherwise.
8241 proc check_effective_target_hard_dfp {} {
8242 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
8243 typedef float d64 __attribute__((mode(DD)));
8245 void foo (void) { z = x + y; }
8249 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
8250 # for strchr etc. functions.
8252 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
8253 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
8256 #if !defined(__cplusplus) \
8257 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
8258 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
8259 ISO C++ correct string.h and wchar.h protos not supported.
8266 # Return 1 if GNU as is used.
8268 proc check_effective_target_gas { } {
8269 global use_gas_saved
8272 if {![info exists use_gas_saved]} {
8273 # Check if the as used by gcc is GNU as.
8274 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
8275 # Provide /dev/null as input, otherwise gas times out reading from
8277 set status [remote_exec host "$gcc_as" "-v /dev/null"]
8278 set as_output [lindex $status 1]
8279 if { [ string first "GNU" $as_output ] >= 0 } {
8285 return $use_gas_saved
8288 # Return 1 if GNU ld is used.
8290 proc check_effective_target_gld { } {
8291 global use_gld_saved
8294 if {![info exists use_gld_saved]} {
8295 # Check if the ld used by gcc is GNU ld.
8296 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
8297 set status [remote_exec host "$gcc_ld" "--version"]
8298 set ld_output [lindex $status 1]
8299 if { [ string first "GNU" $ld_output ] >= 0 } {
8305 return $use_gld_saved
8308 # Return 1 if the compiler has been configure with link-time optimization
8311 proc check_effective_target_lto { } {
8312 if { [istarget nvptx-*-*] } {
8315 return [check_no_compiler_messages lto object {
8320 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
8322 proc check_effective_target_maybe_x32 { } {
8323 return [check_no_compiler_messages maybe_x32 object {
8325 } "-mx32 -maddress-mode=short"]
8328 # Return 1 if this target supports the -fsplit-stack option, 0
8331 proc check_effective_target_split_stack {} {
8332 return [check_no_compiler_messages split_stack object {
8337 # Return 1 if this target supports the -masm=intel option, 0
8340 proc check_effective_target_masm_intel {} {
8341 return [check_no_compiler_messages masm_intel object {
8342 extern void abort (void);
8346 # Return 1 if the language for the compiler under test is C.
8348 proc check_effective_target_c { } {
8350 if [string match $tool "gcc"] {
8356 # Return 1 if the language for the compiler under test is C++.
8358 proc check_effective_target_c++ { } {
8360 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
8366 set cxx_default "c++14"
8367 # Check whether the current active language standard supports the features
8368 # of C++11/C++14 by checking for the presence of one of the -std flags.
8369 # This assumes that the default for the compiler is $cxx_default, and that
8370 # there will never be multiple -std= arguments on the command line.
8371 proc check_effective_target_c++11_only { } {
8373 if ![check_effective_target_c++] {
8376 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
8379 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
8384 proc check_effective_target_c++11 { } {
8385 if [check_effective_target_c++11_only] {
8388 return [check_effective_target_c++14]
8390 proc check_effective_target_c++11_down { } {
8391 if ![check_effective_target_c++] {
8394 return [expr ![check_effective_target_c++14] ]
8397 proc check_effective_target_c++14_only { } {
8399 if ![check_effective_target_c++] {
8402 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8405 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8411 proc check_effective_target_c++14 { } {
8412 if [check_effective_target_c++14_only] {
8415 return [check_effective_target_c++17]
8417 proc check_effective_target_c++14_down { } {
8418 if ![check_effective_target_c++] {
8421 return [expr ![check_effective_target_c++17] ]
8424 proc check_effective_target_c++98_only { } {
8426 if ![check_effective_target_c++] {
8429 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8432 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8438 proc check_effective_target_c++17_only { } {
8440 if ![check_effective_target_c++] {
8443 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8446 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8452 proc check_effective_target_c++17 { } {
8453 if [check_effective_target_c++17_only] {
8456 return [check_effective_target_c++2a]
8458 proc check_effective_target_c++17_down { } {
8459 if ![check_effective_target_c++] {
8462 return [expr ![check_effective_target_c++2a] ]
8465 proc check_effective_target_c++2a_only { } {
8467 if ![check_effective_target_c++] {
8470 if [check-flags { { } { } { -std=c++2a -std=gnu++2a } }] {
8473 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8478 proc check_effective_target_c++2a { } {
8479 return [check_effective_target_c++2a_only]
8482 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
8483 proc check_effective_target_concepts { } {
8484 return [check-flags { "" { } { -fconcepts } }]
8487 # Return 1 if expensive testcases should be run.
8489 proc check_effective_target_run_expensive_tests { } {
8490 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8496 # Returns 1 if "mempcpy" is available on the target system.
8498 proc check_effective_target_mempcpy {} {
8499 return [check_function_available "mempcpy"]
8502 # Returns 1 if "stpcpy" is available on the target system.
8504 proc check_effective_target_stpcpy {} {
8505 return [check_function_available "stpcpy"]
8508 # Check whether the vectorizer tests are supported by the target and
8509 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8510 # If a port wants to execute the tests more than once it should append
8511 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8512 # will be added by a call to add_options_for_<target>.
8513 # Set dg-do-what-default to either compile or run, depending on target
8514 # capabilities. Do not set this if the supported target is appended to
8515 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8516 # automatically. Return the number of effective targets if vectorizer tests
8517 # are supported, 0 otherwise.
8519 proc check_vect_support_and_set_flags { } {
8520 global DEFAULT_VECTCFLAGS
8521 global dg-do-what-default
8522 global EFFECTIVE_TARGETS
8524 if [istarget powerpc-*paired*] {
8525 lappend DEFAULT_VECTCFLAGS "-mpaired"
8526 if [check_750cl_hw_available] {
8527 set dg-do-what-default run
8529 set dg-do-what-default compile
8531 } elseif [istarget powerpc*-*-*] {
8532 # Skip targets not supporting -maltivec.
8533 if ![is-effective-target powerpc_altivec_ok] {
8537 lappend DEFAULT_VECTCFLAGS "-maltivec"
8538 if [check_p9vector_hw_available] {
8539 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8540 } elseif [check_p8vector_hw_available] {
8541 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8542 } elseif [check_vsx_hw_available] {
8543 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8546 if [check_vmx_hw_available] {
8547 set dg-do-what-default run
8549 if [is-effective-target ilp32] {
8550 # Specify a cpu that supports VMX for compile-only tests.
8551 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8553 set dg-do-what-default compile
8555 } elseif { [istarget spu-*-*] } {
8556 set dg-do-what-default run
8557 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8558 lappend DEFAULT_VECTCFLAGS "-msse2"
8559 if { [check_effective_target_sse2_runtime] } {
8560 set dg-do-what-default run
8562 set dg-do-what-default compile
8564 } elseif { [istarget mips*-*-*]
8565 && [check_effective_target_nomips16] } {
8566 if { [check_effective_target_mpaired_single] } {
8567 lappend EFFECTIVE_TARGETS mpaired_single
8569 if { [check_effective_target_mips_loongson] } {
8570 lappend EFFECTIVE_TARGETS mips_loongson
8572 if { [check_effective_target_mips_msa] } {
8573 lappend EFFECTIVE_TARGETS mips_msa
8575 return [llength $EFFECTIVE_TARGETS]
8576 } elseif [istarget sparc*-*-*] {
8577 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
8578 if [check_effective_target_ultrasparc_hw] {
8579 set dg-do-what-default run
8581 set dg-do-what-default compile
8583 } elseif [istarget alpha*-*-*] {
8584 # Alpha's vectorization capabilities are extremely limited.
8585 # It
's more effort than its worth disabling all of the tests
8586 # that it cannot pass. But if you actually want to see what
8587 # does work, command out the return.
8590 lappend DEFAULT_VECTCFLAGS "-mmax"
8591 if [check_alpha_max_hw_available] {
8592 set dg-do-what-default run
8594 set dg-do-what-default compile
8596 } elseif [istarget ia64-*-*] {
8597 set dg-do-what-default run
8598 } elseif [is-effective-target arm_neon_ok] {
8599 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
8600 # NEON does not support denormals, so is not used for vectorization by
8601 # default to avoid loss of precision. We must pass -ffast-math to test
8602 # vectorization of float operations.
8603 lappend DEFAULT_VECTCFLAGS "-ffast-math"
8604 if [is-effective-target arm_neon_hw] {
8605 set dg-do-what-default run
8607 set dg-do-what-default compile
8609 } elseif [istarget "aarch64*-*-*"] {
8610 set dg-do-what-default run
8611 } elseif [istarget s390*-*-*] {
8612 # The S/390 backend set a default of 2 for that value.
8613 # Override it to have the same situation as with other
8615 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
8616 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
8617 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
8618 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
8619 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
8620 if [check_effective_target_s390_vxe] {
8621 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8622 set dg-do-what-default run
8623 } elseif [check_effective_target_s390_vx] {
8624 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
8625 set dg-do-what-default run
8627 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8628 set dg-do-what-default compile
8637 # Return 1 if the target does *not* require strict alignment.
8639 proc check_effective_target_non_strict_align {} {
8641 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8642 # are interfaces defined for misaligned access and thus
8643 # depending on the architecture levels unaligned access is
8645 if [istarget "arm*-*-*"] {
8646 return [check_effective_target_arm_unaligned]
8649 return [check_no_compiler_messages non_strict_align assembly {
8651 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8653 void foo(void) { z = (c *) y; }
8657 # Return 1 if the target has <ucontext.h>.
8659 proc check_effective_target_ucontext_h { } {
8660 return [check_no_compiler_messages ucontext_h assembly {
8661 #include <ucontext.h>
8665 proc check_effective_target_aarch64_tiny { } {
8666 if { [istarget aarch64*-*-*] } {
8667 return [check_no_compiler_messages aarch64_tiny object {
8668 #ifdef __AARCH64_CMODEL_TINY__
8671 #error target not AArch64 tiny code model
8679 # Create functions to check that the AArch64 assembler supports the
8680 # various architecture extensions via the .arch_extension pseudo-op.
8682 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"} {
8683 eval [string map [list FUNC $aarch64_ext] {
8684 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8685 if { [istarget aarch64*-*-*] } {
8686 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8687 __asm__ (".arch_extension FUNC");
8688 } "-march=armv8-a+FUNC"]
8696 proc check_effective_target_aarch64_small { } {
8697 if { [istarget aarch64*-*-*] } {
8698 return [check_no_compiler_messages aarch64_small object {
8699 #ifdef __AARCH64_CMODEL_SMALL__
8702 #error target not AArch64 small code model
8710 proc check_effective_target_aarch64_large { } {
8711 if { [istarget aarch64*-*-*] } {
8712 return [check_no_compiler_messages aarch64_large object {
8713 #ifdef __AARCH64_CMODEL_LARGE__
8716 #error target not AArch64 large code model
8725 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8726 # register set, instruction set, addressing capabilities and ABI.
8728 proc check_effective_target_avr_tiny { } {
8729 if { [istarget avr*-*-*] } {
8730 return [check_no_compiler_messages avr_tiny object {
8734 #error target not a reduced AVR Tiny core
8742 # Return 1 if <fenv.h> is available with all the standard IEEE
8743 # exceptions and floating-point exceptions are raised by arithmetic
8744 # operations. (If the target requires special options for "inexact"
8745 # exceptions, those need to be specified in the testcases.)
8747 proc check_effective_target_fenv_exceptions {} {
8748 return [check_runtime fenv_exceptions {
8751 #ifndef FE_DIVBYZERO
8752 # error Missing FE_DIVBYZERO
8755 # error Missing FE_INEXACT
8758 # error Missing FE_INVALID
8761 # error Missing FE_OVERFLOW
8763 #ifndef FE_UNDERFLOW
8764 # error Missing FE_UNDERFLOW
8766 volatile float a = 0.0f, r;
8771 if (fetestexcept (FE_INVALID))
8776 } [add_options_for_ieee "-std=gnu99"]]
8779 proc check_effective_target_tiny {} {
8780 global et_target_tiny_saved
8782 if [info exists et_target_tiny_saved] {
8783 verbose "check_effective_target_tiny: using cached result" 2
8785 set et_target_tiny_saved 0
8786 if { [istarget aarch64*-*-*]
8787 && [check_effective_target_aarch64_tiny] } {
8788 set et_target_tiny_saved 1
8790 if { [istarget avr-*-*]
8791 && [check_effective_target_avr_tiny] } {
8792 set et_target_tiny_saved 1
8796 return $et_target_tiny_saved
8799 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8801 proc check_effective_target_logical_op_short_circuit {} {
8802 if { [istarget mips*-*-*]
8803 || [istarget arc*-*-*]
8804 || [istarget avr*-*-*]
8805 || [istarget crisv32-*-*] || [istarget cris-*-*]
8806 || [istarget mmix-*-*]
8807 || [istarget s390*-*-*]
8808 || [istarget powerpc*-*-*]
8809 || [istarget nios2*-*-*]
8810 || [istarget riscv*-*-*]
8811 || [istarget v850*-*-*]
8812 || [istarget visium-*-*]
8813 || [check_effective_target_arm_cortex_m] } {
8819 # Return 1 if the target supports -mbranch-cost=N option.
8821 proc check_effective_target_branch_cost {} {
8822 if { [ istarget arm*-*-*]
8823 || [istarget avr*-*-*]
8824 || [istarget epiphany*-*-*]
8825 || [istarget frv*-*-*]
8826 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8827 || [istarget mips*-*-*]
8828 || [istarget s390*-*-*]
8829 || [istarget riscv*-*-*]
8830 || [istarget sh*-*-*]
8831 || [istarget spu*-*-*] } {
8837 # Record that dg-final test TEST requires convential compilation.
8839 proc force_conventional_output_for { test } {
8840 if { [info proc $test] == "" } {
8841 perror "$test does not exist"
8844 proc ${test}_required_options {} {
8845 global gcc_force_conventional_output
8846 return $gcc_force_conventional_output
8850 # Record that dg-final test scan-ltrans-tree-dump* requires -flto-partition=one
8851 # in order to force a single partition, allowing scan-ltrans-tree-dump* to scan
8852 # a dump file *.exe.ltrans0.*.
8854 proc scan-ltrans-tree-dump_required_options {} {
8855 return "-flto-partition=one"
8857 proc scan-ltrans-tree-dump-times_required_options {} {
8858 return "-flto-partition=one"
8860 proc scan-ltrans-tree-dump-not_required_options {} {
8861 return "-flto-partition=one"
8863 proc scan-ltrans-tree-dump-dem_required_options {} {
8864 return "-flto-partition=one"
8866 proc scan-ltrans-tree-dump-dem-not_required_options {} {
8867 return "-flto-partition=one"
8870 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8871 # otherwise. Cache the result.
8873 proc check_effective_target_pie_copyreloc { } {
8874 global pie_copyreloc_available_saved
8876 global GCC_UNDER_TEST
8878 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8882 # Need auto-host.h to check linker support.
8883 if { ![file exists ../../auto-host.h ] } {
8887 if [info exists pie_copyreloc_available_saved] {
8888 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8890 # Set up and compile to see if linker supports PIE with copy
8891 # reloc. Include the current process ID in the file names to
8892 # prevent conflicts with invocations for multiple testsuites.
8897 set f [open $src "w"]
8898 puts $f "#include \"../../auto-host.h\""
8899 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8900 puts $f "# error Linker does not support PIE with copy reloc."
8904 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8905 set lines [${tool}_target_compile $src $obj object ""]
8910 if [string match "" $lines] then {
8911 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8912 set pie_copyreloc_available_saved 1
8914 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8915 set pie_copyreloc_available_saved 0
8919 return $pie_copyreloc_available_saved
8922 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8923 # otherwise. Cache the result.
8925 proc check_effective_target_got32x_reloc { } {
8926 global got32x_reloc_available_saved
8928 global GCC_UNDER_TEST
8930 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8934 # Need auto-host.h to check linker support.
8935 if { ![file exists ../../auto-host.h ] } {
8939 if [info exists got32x_reloc_available_saved] {
8940 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8942 # Include the current process ID in the file names to prevent
8943 # conflicts with invocations for multiple testsuites.
8945 set src got32x[pid].c
8946 set obj got32x[pid].o
8948 set f [open $src "w"]
8949 puts $f "#include \"../../auto-host.h\""
8950 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8951 puts $f "# error Assembler does not support R_386_GOT32X."
8955 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8956 set lines [${tool}_target_compile $src $obj object ""]
8961 if [string match "" $lines] then {
8962 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8963 set got32x_reloc_available_saved 1
8965 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8966 set got32x_reloc_available_saved 0
8970 return $got32x_reloc_available_saved
8973 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8974 # 0 otherwise. Cache the result.
8976 proc check_effective_target_tls_get_addr_via_got { } {
8977 global tls_get_addr_via_got_available_saved
8979 global GCC_UNDER_TEST
8981 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8985 # Need auto-host.h to check linker support.
8986 if { ![file exists ../../auto-host.h ] } {
8990 if [info exists tls_get_addr_via_got_available_saved] {
8991 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8993 # Include the current process ID in the file names to prevent
8994 # conflicts with invocations for multiple testsuites.
8996 set src tls_get_addr_via_got[pid].c
8997 set obj tls_get_addr_via_got[pid].o
8999 set f [open $src "w"]
9000 puts $f "#include \"../../auto-host.h\""
9001 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
9002 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
9006 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
9007 set lines [${tool}_target_compile $src $obj object ""]
9012 if [string match "" $lines] then {
9013 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
9014 set tls_get_addr_via_got_available_saved 1
9016 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
9017 set tls_get_addr_via_got_available_saved 0
9021 return $tls_get_addr_via_got_available_saved
9024 # Return 1 if the target uses comdat groups.
9026 proc check_effective_target_comdat_group {} {
9027 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
9029 inline int foo () { return 1; }
9034 # Return 1 if target supports __builtin_eh_return
9035 proc check_effective_target_builtin_eh_return { } {
9036 return [check_no_compiler_messages builtin_eh_return object {
9037 void test (long l, void *p)
9039 __builtin_eh_return (l, p);
9044 # Return 1 if the target supports max reduction for vectors.
9046 proc check_effective_target_vect_max_reduc { } {
9047 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
9053 # Return 1 if there is an nvptx offload compiler.
9055 proc check_effective_target_offload_nvptx { } {
9056 return [check_no_compiler_messages offload_nvptx object {
9057 int main () {return 0;}
9058 } "-foffload=nvptx-none" ]
9061 # Return 1 if the compiler has been configured with hsa offloading.
9063 proc check_effective_target_offload_hsa { } {
9064 return [check_no_compiler_messages offload_hsa assembly {
9065 int main () {return 0;}
9069 # Return 1 if the target support -fprofile-update=atomic
9070 proc check_effective_target_profile_update_atomic {} {
9071 return [check_no_compiler_messages profile_update_atomic assembly {
9072 int main (void) { return 0; }
9073 } "-fprofile-update=atomic -fprofile-generate"]
9076 # Return 1 if vector (va - vector add) instructions are understood by
9077 # the assembler and can be executed. This also covers checking for
9078 # the VX kernel feature. A kernel without that feature does not
9079 # enable the vector facility and the following check will die with a
9081 proc check_effective_target_s390_vx { } {
9082 if ![istarget s390*-*-*] then {
9086 return [check_runtime s390_check_vx {
9089 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
9092 } "-march=z13 -mzarch" ]
9095 # Same as above but for the z14 vector enhancement facility. Test
9096 # is performed with the vector nand instruction.
9097 proc check_effective_target_s390_vxe { } {
9098 if ![istarget s390*-*-*] then {
9102 return [check_runtime s390_check_vxe {
9105 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
9108 } "-march=z14 -mzarch" ]
9111 #For versions of ARM architectures that have hardware div insn,
9112 #disable the divmod transform
9114 proc check_effective_target_arm_divmod_simode { } {
9115 return [check_no_compiler_messages arm_divmod assembly {
9116 #ifdef __ARM_ARCH_EXT_IDIV__
9123 # Return 1 if target supports divmod hardware insn or divmod libcall.
9125 proc check_effective_target_divmod { } {
9126 #TODO: Add checks for all targets that have either hardware divmod insn
9127 # or define libfunc for divmod.
9128 if { [istarget arm*-*-*]
9129 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9135 # Return 1 if target supports divmod for SImode. The reason for
9136 # separating this from check_effective_target_divmod is that
9137 # some versions of ARM architecture define div instruction
9138 # only for simode, and for these archs, we do not want to enable
9139 # divmod transform for simode.
9141 proc check_effective_target_divmod_simode { } {
9142 if { [istarget arm*-*-*] } {
9143 return [check_effective_target_arm_divmod_simode]
9146 return [check_effective_target_divmod]
9149 # Return 1 if store merging optimization is applicable for target.
9150 # Store merging is not profitable for targets like the avr which
9151 # can load/store only one byte at a time. Use int size as a proxy
9152 # for the number of bytes the target can write, and skip for targets
9153 # with a smallish (< 32) size.
9155 proc check_effective_target_store_merge { } {
9156 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
9163 # Return 1 if we're able to assemble rdrand
9165 proc check_effective_target_rdrand
{ } {
9166 return [check_no_compiler_messages_nocache rdrand object
{
9171 __builtin_ia32_rdrand32_step
(&val
);
9177 #
Return 1 if the target supports coprocessor instructions
: cdp
, ldc
, ldcl
,
9178 # stc
, stcl
, mcr and mrc.
9179 proc check_effective_target_arm_coproc1_ok_nocache
{ } {
9180 if { ![istarget arm
*-*-*] } {
9183 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly
{
9184 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 4
9190 proc check_effective_target_arm_coproc1_ok
{ } {
9191 return [check_cached_effective_target arm_coproc1_ok \
9192 check_effective_target_arm_coproc1_ok_nocache
]
9195 #
Return 1 if the target supports all coprocessor instructions checked by
9196 # check_effective_target_arm_coproc1_ok in addition to the following
: cdp2
,
9197 # ldc2
, ldc2l
, stc2
, stc2l
, mcr2 and mrc2.
9198 proc check_effective_target_arm_coproc2_ok_nocache
{ } {
9199 if { ![check_effective_target_arm_coproc1_ok
] } {
9202 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly
{
9203 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 5
9209 proc check_effective_target_arm_coproc2_ok
{ } {
9210 return [check_cached_effective_target arm_coproc2_ok \
9211 check_effective_target_arm_coproc2_ok_nocache
]
9214 #
Return 1 if the target supports all coprocessor instructions checked by
9215 # check_effective_target_arm_coproc2_ok in addition the following
: mcrr and
9217 proc check_effective_target_arm_coproc3_ok_nocache
{ } {
9218 if { ![check_effective_target_arm_coproc2_ok
] } {
9221 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly
{
9222 #
if (__thumb__
&& !__thumb2__
) \
9223 ||
(__ARM_ARCH
< 6 && !defined
(__ARM_ARCH_5TE__
))
9229 proc check_effective_target_arm_coproc3_ok
{ } {
9230 return [check_cached_effective_target arm_coproc3_ok \
9231 check_effective_target_arm_coproc3_ok_nocache
]
9234 #
Return 1 if the target supports all coprocessor instructions checked by
9235 # check_effective_target_arm_coproc3_ok in addition the following
: mcrr2 and
9237 proc check_effective_target_arm_coproc4_ok_nocache
{ } {
9238 if { ![check_effective_target_arm_coproc3_ok
] } {
9241 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly
{
9242 #
if (__thumb__
&& !__thumb2__
) || __ARM_ARCH
< 6
9248 proc check_effective_target_arm_coproc4_ok
{ } {
9249 return [check_cached_effective_target arm_coproc4_ok \
9250 check_effective_target_arm_coproc4_ok_nocache
]
9253 #
Return 1 if the target supports the auto_inc_dec optimization pass.
9254 proc check_effective_target_autoincdec
{ } {
9255 if { ![check_no_compiler_messages auto_incdec assembly
{ void f
() { }
9256 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
9260 set dumpfile
[glob
-nocomplain
"auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
9261 if { [file
exists $dumpfile
] } {
9262 file
delete $dumpfile
9268 #
Return 1 if the target has support
for stack probing designed
9269 # to avoid stack
-clash style attacks.
9271 # This is used to restrict the stack
-clash mitigation tests to
9272 # just those targets that have been explicitly supported.
9274 # In addition to the prologue work
on those targets
, each target
's
9275 # properties should be described in the functions below so that
9276 # tests do not become a mess of unreadable target conditions.
9278 proc check_effective_target_supports_stack_clash_protection { } {
9280 # Temporary until the target bits are fully ACK'd.
9281 #
if { [istarget aarch
*-*-*] } {
9285 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*]
9286 ||
[istarget powerpc
*-*-*] ||
[istarget rs6000
*-*-*]
9287 ||
[istarget s390
*-*-*] } {
9293 #
Return 1 if the target creates a frame pointer
for non
-leaf functions
9294 # Note we ignore cases where we apply tail
call optimization here.
9295 proc check_effective_target_frame_pointer_for_non_leaf
{ } {
9296 if { [istarget aarch
*-*-*] } {
9300 # Solaris
/x86 defaults to
-fno
-omit
-frame
-pointer.
9301 if { [istarget i?
86-*-solaris
*] ||
[istarget x86_64
-*-solaris
*] } {
9308 #
Return 1 if the target
's calling sequence or its ABI
9309 # create implicit stack probes at or prior to function entry.
9310 proc check_effective_target_caller_implicit_probes { } {
9312 # On x86/x86_64 the call instruction itself pushes the return
9313 # address onto the stack. That is an implicit probe of *sp.
9314 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9318 # On PPC, the ABI mandates that the address of the outer
9319 # frame be stored at *sp. Thus each allocation of stack
9320 # space is itself an implicit probe of *sp.
9321 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
9325 # s390's ABI has a register save area allocated by the
9326 # caller
for use by the callee. The mere existence does
9327 # not constitute a probe by the caller
, but when the slots
9328 # used by the callee those stores are implicit probes.
9329 if { [istarget s390
*-*-*] } {
9333 # Not strictly true
on aarch64
, but we have agreed that we will
9334 #
consider any function that pushes SP more than
3kbytes into
9335 # the guard
page as broken. This essentially means that we can
9336 #
consider the aarch64 as having a caller implicit probe at
9338 if { [istarget aarch64
*-*-*] } {
9345 # Targets that potentially realign the stack pointer often cause residual
9346 # stack allocations and make it difficult to elimination loops or residual
9347 # allocations
for dynamic stack allocations
9348 proc check_effective_target_callee_realigns_stack
{ } {
9349 if { [istarget x86_64
-*-*] ||
[istarget i?
86-*-*] } {
9355 #
Return 1 if CET instructions can be compiled.
9356 proc check_effective_target_cet
{ } {
9357 if { !([istarget i?
86-*-*] ||
[istarget x86_64
-*-*]) } {
9360 return [check_no_compiler_messages cet object
{