1 ; Options for the IA-32 and AMD64 ports of the compiler.
3 ; Copyright (C) 2005-2016 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 3, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING3. If not see
19 ; <http://www.gnu.org/licenses/>.
22 config/i386/i386-opts.h
24 ; Bit flags that specify the ISA we are compiling for.
26 HOST_WIDE_INT ix86_isa_flags = TARGET_64BIT_DEFAULT | TARGET_SUBTARGET_ISA_DEFAULT
28 ; A mask of ix86_isa_flags that includes bit X if X was set or cleared
29 ; on the command line.
31 HOST_WIDE_INT ix86_isa_flags_explicit
33 ; Additional target flags
38 int recip_mask = RECIP_MASK_DEFAULT
41 int recip_mask_explicit
44 int x_recip_mask_explicit
46 ;; Definitions to add to the cl_target_option structure
55 ;; -march= processor-string
57 const char *x_ix86_arch_string
59 ;; -mtune= processor-string
61 const char *x_ix86_tune_string
65 unsigned char schedule
67 ;; True if processor has SSE prefetch instruction.
69 unsigned char prefetch_sse
73 unsigned char branch_cost
75 ;; which flags were passed by the user
77 HOST_WIDE_INT x_ix86_isa_flags_explicit
79 ;; whether -mtune was not specified
81 unsigned char tune_defaulted
83 ;; whether -march was specified
85 unsigned char arch_specified
89 enum cmodel x_ix86_cmodel
93 enum calling_abi x_ix86_abi
97 enum asm_dialect x_ix86_asm_dialect
101 int x_ix86_branch_cost
103 ;; -mdump-tune-features=
105 int x_ix86_dump_tunes
109 int x_ix86_force_align_arg_pointer
113 int x_ix86_force_drap
115 ;; -mincoming-stack-boundary=
117 int x_ix86_incoming_stack_boundary_arg
121 enum pmode x_ix86_pmode
123 ;; -mpreferred-stack-boundary=
125 int x_ix86_preferred_stack_boundary_arg
129 const char *x_ix86_recip_name
135 ;; -mlarge-data-threshold=
137 int x_ix86_section_threshold
143 ;; -mstack-protector-guard=
145 enum stack_protector_guard x_ix86_stack_protector_guard
147 ;; -mstringop-strategy=
149 enum stringop_alg x_ix86_stringop_alg
153 enum tls_dialect x_ix86_tls_dialect
157 const char *x_ix86_tune_ctrl_string
159 ;; -mmemcpy-strategy=
161 const char *x_ix86_tune_memcpy_strategy
163 ;; -mmemset-strategy=
165 const char *x_ix86_tune_memset_strategy
169 int x_ix86_tune_no_default
173 enum ix86_veclibabi x_ix86_veclibabi_type
177 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE) Save
178 sizeof(long double) is 16.
181 Target Report Mask(80387) Save
185 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE) Save
186 sizeof(long double) is 12.
189 Target Report RejectNegative Negative(mlong-double-64) InverseMask(LONG_DOUBLE_64) Save
190 Use 80-bit long double.
193 Target Report RejectNegative Negative(mlong-double-128) Mask(LONG_DOUBLE_64) InverseMask(LONG_DOUBLE_128) Save
194 Use 64-bit long double.
197 Target Report RejectNegative Negative(mlong-double-80) Mask(LONG_DOUBLE_128) InverseMask(LONG_DOUBLE_64) Save
198 Use 128-bit long double.
200 maccumulate-outgoing-args
201 Target Report Mask(ACCUMULATE_OUTGOING_ARGS) Save
202 Reserve space for outgoing arguments in the function prologue.
205 Target Report Mask(ALIGN_DOUBLE) Save
206 Align some doubles on dword boundary.
209 Target RejectNegative Joined UInteger
210 Function starts are aligned to this power of 2.
213 Target RejectNegative Joined UInteger
214 Jump targets are aligned to this power of 2.
217 Target RejectNegative Joined UInteger
218 Loop code aligned to this power of 2.
221 Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save
222 Align destination of the string operations.
225 Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat)
226 Use the given data alignment.
229 Name(ix86_align_data) Type(enum ix86_align_data)
230 Known data alignment choices (for use with the -malign-data= option):
233 Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat)
236 Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi)
239 Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline)
242 Target RejectNegative Joined Var(ix86_arch_string)
243 Generate code for given CPU.
246 Target RejectNegative Joined Enum(asm_dialect) Var(ix86_asm_dialect) Init(ASM_ATT)
247 Use given assembler dialect.
250 Name(asm_dialect) Type(enum asm_dialect)
251 Known assembler dialects (for use with the -masm-dialect= option):
254 Enum(asm_dialect) String(intel) Value(ASM_INTEL)
257 Enum(asm_dialect) String(att) Value(ASM_ATT)
260 Target RejectNegative Joined UInteger Var(ix86_branch_cost)
261 Branches are this expensive (1-5, arbitrary units).
263 mlarge-data-threshold=
264 Target RejectNegative Joined UInteger Var(ix86_section_threshold) Init(DEFAULT_LARGE_SECTION_THRESHOLD)
265 Data greater than given threshold will go into .ldata section in x86-64 medium model.
268 Target RejectNegative Joined Enum(cmodel) Var(ix86_cmodel) Init(CM_32)
269 Use given x86-64 code model.
272 Name(cmodel) Type(enum cmodel)
273 Known code models (for use with the -mcmodel= option):
276 Enum(cmodel) String(small) Value(CM_SMALL)
279 Enum(cmodel) String(medium) Value(CM_MEDIUM)
282 Enum(cmodel) String(large) Value(CM_LARGE)
285 Enum(cmodel) String(32) Value(CM_32)
288 Enum(cmodel) String(kernel) Value(CM_KERNEL)
291 Target RejectNegative Joined Enum(pmode) Var(ix86_pmode) Init(PMODE_SI)
292 Use given address mode.
295 Name(pmode) Type(enum pmode)
296 Known address mode (for use with the -maddress-mode= option):
299 Enum(pmode) String(short) Value(PMODE_SI)
302 Enum(pmode) String(long) Value(PMODE_DI)
305 Target RejectNegative Joined Undocumented Alias(mtune=) Warn(%<-mcpu=%> is deprecated; use %<-mtune=%> or %<-march=%> instead)
308 Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387) Save
309 Generate sin, cos, sqrt for FPU.
312 Target Report Var(ix86_force_drap)
313 Always use Dynamic Realigned Argument Pointer (DRAP) to realign stack.
316 Target Report Mask(FLOAT_RETURNS) Save
317 Return values of functions in FPU registers.
320 Target RejectNegative Joined Var(ix86_fpmath) Enum(fpmath_unit) Init(FPMATH_387) Save
321 Generate floating point mathematics using given instruction set.
324 Name(fpmath_unit) Type(enum fpmath_unit)
325 Valid arguments to -mfpmath=:
328 Enum(fpmath_unit) String(387) Value(FPMATH_387)
331 Enum(fpmath_unit) String(sse) Value(FPMATH_SSE)
334 Enum(fpmath_unit) String(387,sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
337 Enum(fpmath_unit) String(387+sse) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
340 Enum(fpmath_unit) String(sse,387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
343 Enum(fpmath_unit) String(sse+387) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
346 Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
349 Target RejectNegative Mask(80387) Save
353 Target Report Mask(IEEE_FP) Save
354 Use IEEE math for fp comparisons.
356 minline-all-stringops
357 Target Report Mask(INLINE_ALL_STRINGOPS) Save
358 Inline all known string operations.
360 minline-stringops-dynamically
361 Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY) Save
362 Inline memset/memcpy string operations, but perform inline version only for small blocks.
365 Target Undocumented Alias(masm=, intel, att) Warn(%<-mintel-syntax%> and %<-mno-intel-syntax%> are deprecated; use %<-masm=intel%> and %<-masm=att%> instead)
369 Target Report Mask(MS_BITFIELD_LAYOUT) Save
370 Use native (MS) bitfield layout.
373 Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented Save
376 Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented Save
379 Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented Save
382 Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented Save
384 momit-leaf-frame-pointer
385 Target Report Mask(OMIT_LEAF_FRAME_POINTER) Save
386 Omit the frame pointer in leaf functions.
389 Target RejectNegative Report
390 Set 80387 floating-point precision to 32-bit.
393 Target RejectNegative Report
394 Set 80387 floating-point precision to 64-bit.
397 Target RejectNegative Report
398 Set 80387 floating-point precision to 80-bit.
400 mpreferred-stack-boundary=
401 Target RejectNegative Joined UInteger Var(ix86_preferred_stack_boundary_arg)
402 Attempt to keep stack aligned to this power of 2.
404 mincoming-stack-boundary=
405 Target RejectNegative Joined UInteger Var(ix86_incoming_stack_boundary_arg)
406 Assume incoming stack aligned to this power of 2.
409 Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS) Save
410 Use push instructions to save outgoing arguments.
413 Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE) Save
414 Use red-zone in the x86-64 code.
417 Target RejectNegative Joined UInteger Var(ix86_regparm)
418 Number of registers used to pass integer arguments.
421 Target Report Mask(RTD) Save
422 Alternate calling convention.
425 Target InverseMask(80387) Save
426 Do not use hardware fp.
429 Target RejectNegative Mask(SSEREGPARM) Save
430 Use SSE register passing conventions for SF and DF mode.
433 Target Report Var(ix86_force_align_arg_pointer) Init(-1)
434 Realign stack in prologue.
437 Target Report Mask(STACK_PROBE) Save
438 Enable stack probing.
441 Target RejectNegative Joined Var(ix86_tune_memcpy_strategy)
442 Specify memcpy expansion strategy when expected size is known.
445 Target RejectNegative Joined Var(ix86_tune_memset_strategy)
446 Specify memset expansion strategy when expected size is known.
449 Target RejectNegative Joined Enum(stringop_alg) Var(ix86_stringop_alg) Init(no_stringop)
450 Chose strategy to generate stringop using.
453 Name(stringop_alg) Type(enum stringop_alg)
454 Valid arguments to -mstringop-strategy=:
457 Enum(stringop_alg) String(rep_byte) Value(rep_prefix_1_byte)
460 Enum(stringop_alg) String(libcall) Value(libcall)
463 Enum(stringop_alg) String(rep_4byte) Value(rep_prefix_4_byte)
466 Enum(stringop_alg) String(rep_8byte) Value(rep_prefix_8_byte)
469 Enum(stringop_alg) String(byte_loop) Value(loop_1_byte)
472 Enum(stringop_alg) String(loop) Value(loop)
475 Enum(stringop_alg) String(unrolled_loop) Value(unrolled_loop)
478 Enum(stringop_alg) String(vector_loop) Value(vector_loop)
481 Target RejectNegative Joined Var(ix86_tls_dialect) Enum(tls_dialect) Init(TLS_DIALECT_GNU)
482 Use given thread-local storage dialect.
485 Name(tls_dialect) Type(enum tls_dialect)
486 Known TLS dialects (for use with the -mtls-dialect= option):
489 Enum(tls_dialect) String(gnu) Value(TLS_DIALECT_GNU)
492 Enum(tls_dialect) String(gnu2) Value(TLS_DIALECT_GNU2)
495 Target Report Mask(TLS_DIRECT_SEG_REFS)
496 Use direct references against %gs when accessing tls data.
499 Target RejectNegative Joined Var(ix86_tune_string)
500 Schedule code for given CPU.
503 Target RejectNegative Joined Var(ix86_tune_ctrl_string)
504 Fine grain control of tune features.
507 Target RejectNegative Var(ix86_tune_no_default) Init(0)
508 Clear all tune features.
511 Target RejectNegative Var(ix86_dump_tunes) Init(0)
514 Target Report Mask(IAMCU)
515 Generate code that conforms to Intel MCU psABI.
518 Target RejectNegative Joined Var(ix86_abi) Enum(calling_abi) Init(SYSV_ABI)
519 Generate code that conforms to the given ABI.
522 Name(calling_abi) Type(enum calling_abi)
523 Known ABIs (for use with the -mabi= option):
526 Enum(calling_abi) String(sysv) Value(SYSV_ABI)
529 Enum(calling_abi) String(ms) Value(MS_ABI)
532 Target RejectNegative Joined Var(ix86_veclibabi_type) Enum(ix86_veclibabi) Init(ix86_veclibabi_type_none)
533 Vector library ABI to use.
536 Name(ix86_veclibabi) Type(enum ix86_veclibabi)
537 Known vectorization library ABIs (for use with the -mveclibabi= option):
540 Enum(ix86_veclibabi) String(svml) Value(ix86_veclibabi_type_svml)
543 Enum(ix86_veclibabi) String(acml) Value(ix86_veclibabi_type_acml)
546 Target Report Mask(VECT8_RETURNS) Save
547 Return 8-byte vectors in memory.
550 Target Report Mask(RECIP) Save
551 Generate reciprocals instead of divss and sqrtss.
554 Target Report RejectNegative Joined Var(ix86_recip_name)
555 Control generation of reciprocal estimates.
558 Target Report Mask(CLD) Save
559 Generate cld instruction in the function prologue.
562 Target Report Mask(VZEROUPPER) Save
563 Generate vzeroupper instruction before a transfer of control flow out of
567 Target Report Mask(STV) Save
568 Disable Scalar to Vector optimization pass transforming 64-bit integer
569 computations into a vector ones.
572 Target RejectNegative Var(flag_dispatch_scheduler)
573 Do dispatch scheduling if processor is bdver1, bdver2, bdver3, bdver4
574 or znver1 and Haifa scheduling is selected.
577 Target Report Mask(PREFER_AVX128) SAVE
578 Use 128-bit AVX instructions instead of 256-bit AVX instructions in the auto-vectorizer.
583 Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
584 Generate 32bit i386 code.
587 Target RejectNegative Negative(mx32) Report Mask(ABI_64) Var(ix86_isa_flags) Save
588 Generate 64bit x86-64 code.
591 Target RejectNegative Negative(m16) Report Mask(ABI_X32) Var(ix86_isa_flags) Save
592 Generate 32bit x86-64 code.
595 Target RejectNegative Negative(m32) Report Mask(CODE16) InverseMask(ISA_64BIT) Var(ix86_isa_flags) Save
596 Generate 16bit i386 code.
599 Target Report Mask(ISA_MMX) Var(ix86_isa_flags) Save
600 Support MMX built-in functions.
603 Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) Save
604 Support 3DNow! built-in functions.
607 Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) Save
608 Support Athlon 3Dnow! built-in functions.
611 Target Report Mask(ISA_SSE) Var(ix86_isa_flags) Save
612 Support MMX and SSE built-in functions and code generation.
615 Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) Save
616 Support MMX, SSE and SSE2 built-in functions and code generation.
619 Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) Save
620 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation.
623 Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) Save
624 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation.
627 Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) Save
628 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation.
631 Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
632 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation.
635 Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
636 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation.
639 Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save
640 Do not support SSE4.1 and SSE4.2 built-in functions and code generation.
643 Target Undocumented Alias(mavx) Warn(%<-msse5%> was removed)
647 Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save
648 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation.
651 Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save
652 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation.
655 Target Report Mask(ISA_AVX512F) Var(ix86_isa_flags) Save
656 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F built-in functions and code generation.
659 Target Report Mask(ISA_AVX512PF) Var(ix86_isa_flags) Save
660 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512PF built-in functions and code generation.
663 Target Report Mask(ISA_AVX512ER) Var(ix86_isa_flags) Save
664 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512ER built-in functions and code generation.
667 Target Report Mask(ISA_AVX512CD) Var(ix86_isa_flags) Save
668 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512CD built-in functions and code generation.
671 Target Report Mask(ISA_AVX512DQ) Var(ix86_isa_flags) Save
672 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512DQ built-in functions and code generation.
675 Target Report Mask(ISA_AVX512BW) Var(ix86_isa_flags) Save
676 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512BW built-in functions and code generation.
679 Target Report Mask(ISA_AVX512VL) Var(ix86_isa_flags) Save
680 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VL built-in functions and code generation.
683 Target Report Mask(ISA_AVX512IFMA) Var(ix86_isa_flags) Save
684 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512IFMA built-in functions and code generation.
687 Target Report Mask(ISA_AVX512VBMI) Var(ix86_isa_flags) Save
688 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2 and AVX512F and AVX512VBMI built-in functions and code generation.
691 Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
692 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation.
695 Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) Save
696 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation.
699 Target Report Mask(ISA_FMA4) Var(ix86_isa_flags) Save
700 Support FMA4 built-in functions and code generation.
703 Target Report Mask(ISA_XOP) Var(ix86_isa_flags) Save
704 Support XOP built-in functions and code generation.
707 Target Report Mask(ISA_LWP) Var(ix86_isa_flags) Save
708 Support LWP built-in functions and code generation.
711 Target Report Mask(ISA_ABM) Var(ix86_isa_flags) Save
712 Support code generation of Advanced Bit Manipulation (ABM) instructions.
715 Target Report Mask(ISA_POPCNT) Var(ix86_isa_flags) Save
716 Support code generation of popcnt instruction.
719 Target Report Mask(ISA_BMI) Var(ix86_isa_flags) Save
720 Support BMI built-in functions and code generation.
723 Target Report Mask(ISA_BMI2) Var(ix86_isa_flags) Save
724 Support BMI2 built-in functions and code generation.
727 Target Report Mask(ISA_LZCNT) Var(ix86_isa_flags) Save
728 Support LZCNT built-in function and code generation.
731 Target Report Mask(ISA_HLE) Var(ix86_isa_flags) Save
732 Support Hardware Lock Elision prefixes.
735 Target Report Mask(ISA_RDSEED) Var(ix86_isa_flags) Save
736 Support RDSEED instruction.
739 Target Report Mask(ISA_PRFCHW) Var(ix86_isa_flags) Save
740 Support PREFETCHW instruction.
743 Target Report Mask(ISA_ADX) Var(ix86_isa_flags) Save
744 Support flag-preserving add-carry instructions.
747 Target Report Mask(ISA_CLFLUSHOPT) Var(ix86_isa_flags) Save
748 Support CLFLUSHOPT instructions.
751 Target Report Mask(ISA_CLWB) Var(ix86_isa_flags) Save
752 Support CLWB instruction.
755 Target Report Mask(ISA_PCOMMIT) Var(ix86_isa_flags) Save
756 Support PCOMMIT instruction.
759 Target Report Mask(ISA_FXSR) Var(ix86_isa_flags) Save
760 Support FXSAVE and FXRSTOR instructions.
763 Target Report Mask(ISA_XSAVE) Var(ix86_isa_flags) Save
764 Support XSAVE and XRSTOR instructions.
767 Target Report Mask(ISA_XSAVEOPT) Var(ix86_isa_flags) Save
768 Support XSAVEOPT instruction.
771 Target Report Mask(ISA_XSAVEC) Var(ix86_isa_flags) Save
772 Support XSAVEC instructions.
775 Target Report Mask(ISA_XSAVES) Var(ix86_isa_flags) Save
776 Support XSAVES and XRSTORS instructions.
779 Target Report Mask(ISA_TBM) Var(ix86_isa_flags) Save
780 Support TBM built-in functions and code generation.
783 Target Report Mask(ISA_CX16) Var(ix86_isa_flags) Save
784 Support code generation of cmpxchg16b instruction.
787 Target Report Mask(ISA_SAHF) Var(ix86_isa_flags) Save
788 Support code generation of sahf instruction in 64bit x86-64 code.
791 Target Report Mask(ISA_MOVBE) Var(ix86_isa_flags) Save
792 Support code generation of movbe instruction.
795 Target Report Mask(ISA_CRC32) Var(ix86_isa_flags) Save
796 Support code generation of crc32 instruction.
799 Target Report Mask(ISA_AES) Var(ix86_isa_flags) Save
800 Support AES built-in functions and code generation.
803 Target Report Mask(ISA_SHA) Var(ix86_isa_flags) Save
804 Support SHA1 and SHA256 built-in functions and code generation.
807 Target Report Mask(ISA_PCLMUL) Var(ix86_isa_flags) Save
808 Support PCLMUL built-in functions and code generation.
811 Target Report Var(ix86_sse2avx)
812 Encode SSE instructions with VEX prefix.
815 Target Report Mask(ISA_FSGSBASE) Var(ix86_isa_flags) Save
816 Support FSGSBASE built-in functions and code generation.
819 Target Report Mask(ISA_RDRND) Var(ix86_isa_flags) Save
820 Support RDRND built-in functions and code generation.
823 Target Report Mask(ISA_F16C) Var(ix86_isa_flags) Save
824 Support F16C built-in functions and code generation.
827 Target Report Mask(ISA_PREFETCHWT1) Var(ix86_isa_flags) Save
828 Support PREFETCHWT1 built-in functions and code generation.
831 Target Report Var(flag_fentry) Init(-1)
832 Emit profiling counter call at function entry before prologue.
835 Target Report Var(flag_record_mcount) Init(0)
836 Generate __mcount_loc section with all mcount or __fentry__ calls.
839 Target Report Var(flag_nop_mcount) Init(0)
840 Generate mcount/__fentry__ calls as nops. To activate they need to be
844 Target Report Var(flag_skip_rax_setup) Init(0)
845 Skip setting up RAX register when passing variable arguments.
848 Target Report Mask(USE_8BIT_IDIV) Save
849 Expand 32bit/64bit integer divide into 8bit unsigned integer divide with run-time check.
851 mavx256-split-unaligned-load
852 Target Report Mask(AVX256_SPLIT_UNALIGNED_LOAD) Save
853 Split 32-byte AVX unaligned load.
855 mavx256-split-unaligned-store
856 Target Report Mask(AVX256_SPLIT_UNALIGNED_STORE) Save
857 Split 32-byte AVX unaligned store.
860 Target Report Mask(ISA_RTM) Var(ix86_isa_flags) Save
861 Support RTM built-in functions and code generation.
864 Target Report Mask(ISA_MPX) Var(ix86_isa_flags) Save
865 Support MPX code generation.
868 Target Report Mask(ISA_MWAITX) Var(ix86_isa_flags) Save
869 Support MWAITX and MONITORX built-in functions and code generation.
872 Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags) Save
873 Support CLZERO built-in functions and code generation.
876 Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save
877 Support PKU built-in functions and code generation.
879 mstack-protector-guard=
880 Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS)
881 Use given stack-protector guard.
884 Name(stack_protector_guard) Type(enum stack_protector_guard)
885 Known stack protector guard (for use with the -mstack-protector-guard= option):
888 Enum(stack_protector_guard) String(tls) Value(SSP_TLS)
891 Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL)
894 Target Var(flag_mitigate_rop) Init(0)
895 Attempt to avoid generating instruction sequences containing ret bytes.
898 Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Var(ix86_target_flags) Save
899 Generate code which uses only the general registers.