gcc/config/i386/ia32intrin.h

   1 /* Copyright (C) 2009-2015 Free Software Foundation, Inc.
   2
   3    This file is part of GCC.
   4
   5    GCC is free software; you can redistribute it and/or modify
   6    it under the terms of the GNU General Public License as published by
   7    the Free Software Foundation; either version 3, or (at your option)
   8    any later version.
   9
  10    GCC is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13    GNU General Public License for more details.
  14
  15    Under Section 7 of GPL version 3, you are granted additional
  16    permissions described in the GCC Runtime Library Exception, version
  17    3.1, as published by the Free Software Foundation.
  18
  19    You should have received a copy of the GNU General Public License and
  20    a copy of the GCC Runtime Library Exception along with this program;
  21    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
  22    <http://www.gnu.org/licenses/>.  */
  23
  24 #ifndef _X86INTRIN_H_INCLUDED
  25 # error "Never use <ia32intrin.h> directly; include <x86intrin.h> instead."
  26 #endif
  27
  28 /* 32bit bsf */
  29 extern __inline int
  30 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  31 __bsfd (int __X)
  32 {
  33   return __builtin_ctz (__X);
  34 }
  35
  36 /* 32bit bsr */
  37 extern __inline int
  38 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  39 __bsrd (int __X)
  40 {
  41   return __builtin_ia32_bsrsi (__X);
  42 }
  43
  44 /* 32bit bswap */
  45 extern __inline int
  46 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  47 __bswapd (int __X)
  48 {
  49   return __builtin_bswap32 (__X);
  50 }
  51
  52 #ifndef __SSE4_2__
  53 #pragma GCC push_options
  54 #pragma GCC target("sse4.2")
  55 #define __DISABLE_SSE4_2__
  56 #endif /* __SSE4_2__ */
  57
  58 /* 32bit accumulate CRC32 (polynomial 0x11EDC6F41) value.  */
  59 extern __inline unsigned int
  60 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  61 __crc32b (unsigned int __C, unsigned char __V)
  62 {
  63   return __builtin_ia32_crc32qi (__C, __V);
  64 }
  65
  66 extern __inline unsigned int
  67 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  68 __crc32w (unsigned int __C, unsigned short __V)
  69 {
  70   return __builtin_ia32_crc32hi (__C, __V);
  71 }
  72
  73 extern __inline unsigned int
  74 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  75 __crc32d (unsigned int __C, unsigned int __V)
  76 {
  77   return __builtin_ia32_crc32si (__C, __V);
  78 }
  79
  80 #ifdef __DISABLE_SSE4_2__
  81 #undef __DISABLE_SSE4_2__
  82 #pragma GCC pop_options
  83 #endif /* __DISABLE_SSE4_2__ */
  84
  85 /* 32bit popcnt */
  86 extern __inline int
  87 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  88 __popcntd (unsigned int __X)
  89 {
  90   return __builtin_popcount (__X);
  91 }
  92
  93 /* rdpmc */
  94 extern __inline unsigned long long
  95 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
  96 __rdpmc (int __S)
  97 {
  98   return __builtin_ia32_rdpmc (__S);
  99 }
 100
 101 /* rdtsc */
 102 extern __inline unsigned long long
 103 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 104 __rdtsc (void)
 105 {
 106   return __builtin_ia32_rdtsc ();
 107 }
 108
 109 /* rdtscp */
 110 extern __inline unsigned long long
 111 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 112 __rdtscp (unsigned int *__A)
 113 {
 114   return __builtin_ia32_rdtscp (__A);
 115 }
 116
 117 /* 8bit rol */
 118 extern __inline unsigned char
 119 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 120 __rolb (unsigned char __X, int __C)
 121 {
 122   return __builtin_ia32_rolqi (__X, __C);
 123 }
 124
 125 /* 16bit rol */
 126 extern __inline unsigned short
 127 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 128 __rolw (unsigned short __X, int __C)
 129 {
 130   return __builtin_ia32_rolhi (__X, __C);
 131 }
 132
 133 /* 32bit rol */
 134 extern __inline unsigned int
 135 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 136 __rold (unsigned int __X, int __C)
 137 {
 138   return (__X << __C) | (__X >> (32 - __C));
 139 }
 140
 141 /* 8bit ror */
 142 extern __inline unsigned char
 143 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 144 __rorb (unsigned char __X, int __C)
 145 {
 146   return __builtin_ia32_rorqi (__X, __C);
 147 }
 148
 149 /* 16bit ror */
 150 extern __inline unsigned short
 151 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 152 __rorw (unsigned short __X, int __C)
 153 {
 154   return __builtin_ia32_rorhi (__X, __C);
 155 }
 156
 157 /* 32bit ror */
 158 extern __inline unsigned int
 159 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 160 __rord (unsigned int __X, int __C)
 161 {
 162   return (__X >> __C) | (__X << (32 - __C));
 163 }
 164
 165 /* Pause */
 166 extern __inline void
 167 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 168 __pause (void)
 169 {
 170   __builtin_ia32_pause ();
 171 }
 172
 173 #ifdef __x86_64__
 174 /* 64bit bsf */
 175 extern __inline int
 176 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 177 __bsfq (long long __X)
 178 {
 179   return __builtin_ctzll (__X);
 180 }
 181
 182 /* 64bit bsr */
 183 extern __inline int
 184 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 185 __bsrq (long long __X)
 186 {
 187   return __builtin_ia32_bsrdi (__X);
 188 }
 189
 190 /* 64bit bswap */
 191 extern __inline long long
 192 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 193 __bswapq (long long __X)
 194 {
 195   return __builtin_bswap64 (__X);
 196 }
 197
 198 #ifndef __SSE4_2__
 199 #pragma GCC push_options
 200 #pragma GCC target("sse4.2")
 201 #define __DISABLE_SSE4_2__
 202 #endif /* __SSE4_2__ */
 203
 204 /* 64bit accumulate CRC32 (polynomial 0x11EDC6F41) value.  */
 205 extern __inline unsigned long long
 206 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 207 __crc32q (unsigned long long __C, unsigned long long __V)
 208 {
 209   return __builtin_ia32_crc32di (__C, __V);
 210 }
 211
 212 #ifdef __DISABLE_SSE4_2__
 213 #undef __DISABLE_SSE4_2__
 214 #pragma GCC pop_options
 215 #endif /* __DISABLE_SSE4_2__ */
 216
 217 /* 64bit popcnt */
 218 extern __inline long long
 219 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 220 __popcntq (unsigned long long __X)
 221 {
 222   return __builtin_popcountll (__X);
 223 }
 224
 225 /* 64bit rol */
 226 extern __inline unsigned long long
 227 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 228 __rolq (unsigned long long __X, int __C)
 229 {
 230   return (__X << __C) | (__X >> (64 - __C));
 231 }
 232
 233 /* 64bit ror */
 234 extern __inline unsigned long long
 235 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 236 __rorq (unsigned long long __X, int __C)
 237 {
 238   return (__X >> __C) | (__X << (64 - __C));
 239 }
 240
 241 /* Read flags register */
 242 extern __inline unsigned long long
 243 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 244 __readeflags (void)
 245 {
 246   return __builtin_ia32_readeflags_u64 ();
 247 }
 248
 249 /* Write flags register */
 250 extern __inline void
 251 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 252 __writeeflags (unsigned long long X)
 253 {
 254   __builtin_ia32_writeeflags_u64 (X);
 255 }
 256
 257 #define _bswap64(a)             __bswapq(a)
 258 #define _popcnt64(a)            __popcntq(a)
 259 #else
 260
 261 /* Read flags register */
 262 extern __inline unsigned int
 263 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 264 __readeflags (void)
 265 {
 266   return __builtin_ia32_readeflags_u32 ();
 267 }
 268
 269 /* Write flags register */
 270 extern __inline void
 271 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 272 __writeeflags (unsigned int X)
 273 {
 274   __builtin_ia32_writeeflags_u32 (X);
 275 }
 276
 277 #endif
 278
 279 /* On LP64 systems, longs are 64-bit.  Use the appropriate rotate
 280  * function.  */
 281 #ifdef __LP64__
 282 #define _lrotl(a,b)             __rolq((a), (b))
 283 #define _lrotr(a,b)             __rorq((a), (b))
 284 #else
 285 #define _lrotl(a,b)             __rold((a), (b))
 286 #define _lrotr(a,b)             __rord((a), (b))
 287 #endif
 288
 289 #define _bit_scan_forward(a)    __bsfd(a)
 290 #define _bit_scan_reverse(a)    __bsrd(a)
 291 #define _bswap(a)               __bswapd(a)
 292 #define _popcnt32(a)            __popcntd(a)
 293 #define _rdpmc(a)               __rdpmc(a)
 294 #define _rdtsc()                __rdtsc()
 295 #define _rdtscp(a)              __rdtscp(a)
 296 #define _rotwl(a,b)             __rolw((a), (b))
 297 #define _rotwr(a,b)             __rorw((a), (b))
 298 #define _rotl(a,b)              __rold((a), (b))
 299 #define _rotr(a,b)              __rord((a), (b))