1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987-2023 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "insn-config.h"
37 #include "cfgcleanup.h"
40 #include "rtlhooks-def.h"
41 #include "tree-pass.h"
45 #include "function-abi.h"
49 /* The basic idea of common subexpression elimination is to go
50 through the code, keeping a record of expressions that would
51 have the same value at the current scan point, and replacing
52 expressions encountered with the cheapest equivalent expression.
54 It is too complicated to keep track of the different possibilities
55 when control paths merge in this code; so, at each label, we forget all
56 that is known and start fresh. This can be described as processing each
57 extended basic block separately. We have a separate pass to perform
60 Note CSE can turn a conditional or computed jump into a nop or
61 an unconditional jump. When this occurs we arrange to run the jump
62 optimizer after CSE to delete the unreachable code.
64 We use two data structures to record the equivalent expressions:
65 a hash table for most expressions, and a vector of "quantity
66 numbers" to record equivalent (pseudo) registers.
68 The use of the special data structure for registers is desirable
69 because it is faster. It is possible because registers references
70 contain a fairly small number, the register number, taken from
71 a contiguously allocated series, and two register references are
72 identical if they have the same number. General expressions
73 do not have any such thing, so the only way to retrieve the
74 information recorded on an expression other than a register
75 is to keep it in a hash table.
77 Registers and "quantity numbers":
79 At the start of each basic block, all of the (hardware and pseudo)
80 registers used in the function are given distinct quantity
81 numbers to indicate their contents. During scan, when the code
82 copies one register into another, we copy the quantity number.
83 When a register is loaded in any other way, we allocate a new
84 quantity number to describe the value generated by this operation.
85 `REG_QTY (N)' records what quantity register N is currently thought
88 All real quantity numbers are greater than or equal to zero.
89 If register N has not been assigned a quantity, `REG_QTY (N)' will
90 equal -N - 1, which is always negative.
92 Quantity numbers below zero do not exist and none of the `qty_table'
93 entries should be referenced with a negative index.
95 We also maintain a bidirectional chain of registers for each
96 quantity number. The `qty_table` members `first_reg' and `last_reg',
97 and `reg_eqv_table' members `next' and `prev' hold these chains.
99 The first register in a chain is the one whose lifespan is least local.
100 Among equals, it is the one that was seen first.
101 We replace any equivalent register with that one.
103 If two registers have the same quantity number, it must be true that
104 REG expressions with qty_table `mode' must be in the hash table for both
105 registers and must be in the same class.
107 The converse is not true. Since hard registers may be referenced in
108 any mode, two REG expressions might be equivalent in the hash table
109 but not have the same quantity number if the quantity number of one
110 of the registers is not the same mode as those expressions.
112 Constants and quantity numbers
114 When a quantity has a known constant value, that value is stored
115 in the appropriate qty_table `const_rtx'. This is in addition to
116 putting the constant in the hash table as is usual for non-regs.
118 Whether a reg or a constant is preferred is determined by the configuration
119 macro CONST_COSTS and will often depend on the constant value. In any
120 event, expressions containing constants can be simplified, by fold_rtx.
122 When a quantity has a known nearly constant value (such as an address
123 of a stack slot), that value is stored in the appropriate qty_table
126 Integer constants don't have a machine mode. However, cse
127 determines the intended machine mode from the destination
128 of the instruction that moves the constant. The machine mode
129 is recorded in the hash table along with the actual RTL
130 constant expression so that different modes are kept separate.
134 To record known equivalences among expressions in general
135 we use a hash table called `table'. It has a fixed number of buckets
136 that contain chains of `struct table_elt' elements for expressions.
137 These chains connect the elements whose expressions have the same
140 Other chains through the same elements connect the elements which
141 currently have equivalent values.
143 Register references in an expression are canonicalized before hashing
144 the expression. This is done using `reg_qty' and qty_table `first_reg'.
145 The hash code of a register reference is computed using the quantity
146 number, not the register number.
148 When the value of an expression changes, it is necessary to remove from the
149 hash table not just that expression but all expressions whose values
150 could be different as a result.
152 1. If the value changing is in memory, except in special cases
153 ANYTHING referring to memory could be changed. That is because
154 nobody knows where a pointer does not point.
155 The function `invalidate_memory' removes what is necessary.
157 The special cases are when the address is constant or is
158 a constant plus a fixed register such as the frame pointer
159 or a static chain pointer. When such addresses are stored in,
160 we can tell exactly which other such addresses must be invalidated
161 due to overlap. `invalidate' does this.
162 All expressions that refer to non-constant
163 memory addresses are also invalidated. `invalidate_memory' does this.
165 2. If the value changing is a register, all expressions
166 containing references to that register, and only those,
169 Because searching the entire hash table for expressions that contain
170 a register is very slow, we try to figure out when it isn't necessary.
171 Precisely, this is necessary only when expressions have been
172 entered in the hash table using this register, and then the value has
173 changed, and then another expression wants to be added to refer to
174 the register's new value. This sequence of circumstances is rare
175 within any one basic block.
177 `REG_TICK' and `REG_IN_TABLE', accessors for members of
178 cse_reg_info, are used to detect this case. REG_TICK (i) is
179 incremented whenever a value is stored in register i.
180 REG_IN_TABLE (i) holds -1 if no references to register i have been
181 entered in the table; otherwise, it contains the value REG_TICK (i)
182 had when the references were entered. If we want to enter a
183 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
184 remove old references. Until we want to enter a new entry, the
185 mere fact that the two vectors don't match makes the entries be
186 ignored if anyone tries to match them.
188 Registers themselves are entered in the hash table as well as in
189 the equivalent-register chains. However, `REG_TICK' and
190 `REG_IN_TABLE' do not apply to expressions which are simple
191 register references. These expressions are removed from the table
192 immediately when they become invalid, and this can be done even if
193 we do not immediately search for all the expressions that refer to
196 A CLOBBER rtx in an instruction invalidates its operand for further
197 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
198 invalidates everything that resides in memory.
202 Constant expressions that differ only by an additive integer
203 are called related. When a constant expression is put in
204 the table, the related expression with no constant term
205 is also entered. These are made to point at each other
206 so that it is possible to find out if there exists any
207 register equivalent to an expression related to a given expression. */
209 /* Length of qty_table vector. We know in advance we will not need
210 a quantity number this big. */
214 /* Next quantity number to be allocated.
215 This is 1 + the largest number needed so far. */
219 /* Per-qty information tracking.
221 `first_reg' and `last_reg' track the head and tail of the
222 chain of registers which currently contain this quantity.
224 `mode' contains the machine mode of this quantity.
226 `const_rtx' holds the rtx of the constant value of this
227 quantity, if known. A summations of the frame/arg pointer
228 and a constant can also be entered here. When this holds
229 a known value, `const_insn' is the insn which stored the
232 `comparison_{code,const,qty}' are used to track when a
233 comparison between a quantity and some constant or register has
234 been passed. In such a case, we know the results of the comparison
235 in case we see it again. These members record a comparison that
236 is known to be true. `comparison_code' holds the rtx code of such
237 a comparison, else it is set to UNKNOWN and the other two
238 comparison members are undefined. `comparison_const' holds
239 the constant being compared against, or zero if the comparison
240 is not against a constant. `comparison_qty' holds the quantity
241 being compared against when the result is known. If the comparison
242 is not with a register, `comparison_qty' is -1. */
244 struct qty_table_elem
247 rtx_insn
*const_insn
;
248 rtx comparison_const
;
250 unsigned int first_reg
, last_reg
;
251 ENUM_BITFIELD(machine_mode
) mode
: MACHINE_MODE_BITSIZE
;
252 ENUM_BITFIELD(rtx_code
) comparison_code
: RTX_CODE_BITSIZE
;
255 /* The table of all qtys, indexed by qty number. */
256 static struct qty_table_elem
*qty_table
;
258 /* Insn being scanned. */
260 static rtx_insn
*this_insn
;
261 static bool optimize_this_for_speed_p
;
263 /* Index by register number, gives the number of the next (or
264 previous) register in the chain of registers sharing the same
267 Or -1 if this register is at the end of the chain.
269 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
271 /* Per-register equivalence chain. */
277 /* The table of all register equivalence chains. */
278 static struct reg_eqv_elem
*reg_eqv_table
;
282 /* The timestamp at which this register is initialized. */
283 unsigned int timestamp
;
285 /* The quantity number of the register's current contents. */
288 /* The number of times the register has been altered in the current
292 /* The REG_TICK value at which rtx's containing this register are
293 valid in the hash table. If this does not equal the current
294 reg_tick value, such expressions existing in the hash table are
298 /* The SUBREG that was set when REG_TICK was last incremented. Set
299 to -1 if the last store was to the whole register, not a subreg. */
300 unsigned int subreg_ticked
;
303 /* A table of cse_reg_info indexed by register numbers. */
304 static struct cse_reg_info
*cse_reg_info_table
;
306 /* The size of the above table. */
307 static unsigned int cse_reg_info_table_size
;
309 /* The index of the first entry that has not been initialized. */
310 static unsigned int cse_reg_info_table_first_uninitialized
;
312 /* The timestamp at the beginning of the current run of
313 cse_extended_basic_block. We increment this variable at the beginning of
314 the current run of cse_extended_basic_block. The timestamp field of a
315 cse_reg_info entry matches the value of this variable if and only
316 if the entry has been initialized during the current run of
317 cse_extended_basic_block. */
318 static unsigned int cse_reg_info_timestamp
;
320 /* A HARD_REG_SET containing all the hard registers for which there is
321 currently a REG expression in the hash table. Note the difference
322 from the above variables, which indicate if the REG is mentioned in some
323 expression in the table. */
325 static HARD_REG_SET hard_regs_in_table
;
327 /* True if CSE has altered the CFG. */
328 static bool cse_cfg_altered
;
330 /* True if CSE has altered conditional jump insns in such a way
331 that jump optimization should be redone. */
332 static bool cse_jumps_altered
;
334 /* True if we put a LABEL_REF into the hash table for an INSN
335 without a REG_LABEL_OPERAND, we have to rerun jump after CSE
336 to put in the note. */
337 static bool recorded_label_ref
;
339 /* canon_hash stores 1 in do_not_record if it notices a reference to PC or
340 some other volatile subexpression. */
342 static int do_not_record
;
344 /* canon_hash stores 1 in hash_arg_in_memory
345 if it notices a reference to memory within the expression being hashed. */
347 static int hash_arg_in_memory
;
349 /* The hash table contains buckets which are chains of `struct table_elt's,
350 each recording one expression's information.
351 That expression is in the `exp' field.
353 The canon_exp field contains a canonical (from the point of view of
354 alias analysis) version of the `exp' field.
356 Those elements with the same hash code are chained in both directions
357 through the `next_same_hash' and `prev_same_hash' fields.
359 Each set of expressions with equivalent values
360 are on a two-way chain through the `next_same_value'
361 and `prev_same_value' fields, and all point with
362 the `first_same_value' field at the first element in
363 that chain. The chain is in order of increasing cost.
364 Each element's cost value is in its `cost' field.
366 The `in_memory' field is nonzero for elements that
367 involve any reference to memory. These elements are removed
368 whenever a write is done to an unidentified location in memory.
369 To be safe, we assume that a memory address is unidentified unless
370 the address is either a symbol constant or a constant plus
371 the frame pointer or argument pointer.
373 The `related_value' field is used to connect related expressions
374 (that differ by adding an integer).
375 The related expressions are chained in a circular fashion.
376 `related_value' is zero for expressions for which this
379 The `cost' field stores the cost of this element's expression.
380 The `regcost' field stores the value returned by approx_reg_cost for
381 this element's expression.
383 The `is_const' flag is set if the element is a constant (including
386 The `flag' field is used as a temporary during some search routines.
388 The `mode' field is usually the same as GET_MODE (`exp'), but
389 if `exp' is a CONST_INT and has no machine mode then the `mode'
390 field is the mode it was being used as. Each constant is
391 recorded separately for each mode it is used with. */
397 struct table_elt
*next_same_hash
;
398 struct table_elt
*prev_same_hash
;
399 struct table_elt
*next_same_value
;
400 struct table_elt
*prev_same_value
;
401 struct table_elt
*first_same_value
;
402 struct table_elt
*related_value
;
405 ENUM_BITFIELD(machine_mode
) mode
: MACHINE_MODE_BITSIZE
;
411 /* We don't want a lot of buckets, because we rarely have very many
412 things stored in the hash table, and a lot of buckets slows
413 down a lot of loops that happen frequently. */
415 #define HASH_SIZE (1 << HASH_SHIFT)
416 #define HASH_MASK (HASH_SIZE - 1)
418 /* Determine whether register number N is considered a fixed register for the
419 purpose of approximating register costs.
420 It is desirable to replace other regs with fixed regs, to reduce need for
422 A reg wins if it is either the frame pointer or designated as fixed. */
423 #define FIXED_REGNO_P(N) \
424 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
425 || fixed_regs[N] || global_regs[N])
427 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
428 hard registers and pointers into the frame are the cheapest with a cost
429 of 0. Next come pseudos with a cost of one and other hard registers with
430 a cost of 2. Aside from these special cases, call `rtx_cost'. */
432 #define CHEAP_REGNO(N) \
433 (REGNO_PTR_FRAME_P (N) \
434 || (HARD_REGISTER_NUM_P (N) \
435 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
437 #define COST(X, MODE) \
438 (REG_P (X) ? 0 : notreg_cost (X, MODE, SET, 1))
439 #define COST_IN(X, MODE, OUTER, OPNO) \
440 (REG_P (X) ? 0 : notreg_cost (X, MODE, OUTER, OPNO))
442 /* Get the number of times this register has been updated in this
445 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
447 /* Get the point at which REG was recorded in the table. */
449 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
451 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
454 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
456 /* Get the quantity number for REG. */
458 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
460 /* Determine if the quantity number for register X represents a valid index
461 into the qty_table. */
463 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
465 /* Compare table_elt X and Y and return true iff X is cheaper than Y. */
467 #define CHEAPER(X, Y) \
468 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
470 static struct table_elt
*table
[HASH_SIZE
];
472 /* Chain of `struct table_elt's made so far for this function
473 but currently removed from the table. */
475 static struct table_elt
*free_element_chain
;
477 /* Trace a patch through the CFG. */
481 /* The basic block for this path entry. */
485 /* This data describes a block that will be processed by
486 cse_extended_basic_block. */
488 struct cse_basic_block_data
490 /* Total number of SETs in block. */
492 /* Size of current branch path, if any. */
494 /* Current path, indicating which basic_blocks will be processed. */
495 struct branch_path
*path
;
499 /* Pointers to the live in/live out bitmaps for the boundaries of the
501 static bitmap cse_ebb_live_in
, cse_ebb_live_out
;
503 /* A simple bitmap to track which basic blocks have been visited
504 already as part of an already processed extended basic block. */
505 static sbitmap cse_visited_basic_blocks
;
507 static bool fixed_base_plus_p (rtx x
);
508 static int notreg_cost (rtx
, machine_mode
, enum rtx_code
, int);
509 static int preferable (int, int, int, int);
510 static void new_basic_block (void);
511 static void make_new_qty (unsigned int, machine_mode
);
512 static void make_regs_eqv (unsigned int, unsigned int);
513 static void delete_reg_equiv (unsigned int);
514 static int mention_regs (rtx
);
515 static int insert_regs (rtx
, struct table_elt
*, int);
516 static void remove_from_table (struct table_elt
*, unsigned);
517 static void remove_pseudo_from_table (rtx
, unsigned);
518 static struct table_elt
*lookup (rtx
, unsigned, machine_mode
);
519 static struct table_elt
*lookup_for_remove (rtx
, unsigned, machine_mode
);
520 static rtx
lookup_as_function (rtx
, enum rtx_code
);
521 static struct table_elt
*insert_with_costs (rtx
, struct table_elt
*, unsigned,
522 machine_mode
, int, int);
523 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
525 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
526 static void invalidate (rtx
, machine_mode
);
527 static void remove_invalid_refs (unsigned int);
528 static void remove_invalid_subreg_refs (unsigned int, poly_uint64
,
530 static void rehash_using_reg (rtx
);
531 static void invalidate_memory (void);
532 static rtx
use_related_value (rtx
, struct table_elt
*);
534 static inline unsigned canon_hash (rtx
, machine_mode
);
535 static inline unsigned safe_hash (rtx
, machine_mode
);
536 static inline unsigned hash_rtx_string (const char *);
538 static rtx
canon_reg (rtx
, rtx_insn
*);
539 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
542 static rtx
fold_rtx (rtx
, rtx_insn
*);
543 static rtx
equiv_constant (rtx
);
544 static void record_jump_equiv (rtx_insn
*, bool);
545 static void record_jump_cond (enum rtx_code
, machine_mode
, rtx
, rtx
,
547 static void cse_insn (rtx_insn
*);
548 static void cse_prescan_path (struct cse_basic_block_data
*);
549 static void invalidate_from_clobbers (rtx_insn
*);
550 static void invalidate_from_sets_and_clobbers (rtx_insn
*);
551 static void cse_extended_basic_block (struct cse_basic_block_data
*);
552 extern void dump_class (struct table_elt
*);
553 static void get_cse_reg_info_1 (unsigned int regno
);
554 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
556 static void flush_hash_table (void);
557 static bool insn_live_p (rtx_insn
*, int *);
558 static bool set_live_p (rtx
, int *);
559 static void cse_change_cc_mode_insn (rtx_insn
*, rtx
);
560 static void cse_change_cc_mode_insns (rtx_insn
*, rtx_insn
*, rtx
);
561 static machine_mode
cse_cc_succs (basic_block
, basic_block
, rtx
, rtx
,
565 #undef RTL_HOOKS_GEN_LOWPART
566 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
568 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
570 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
571 register (hard registers may require `do_not_record' to be set). */
573 static inline unsigned
574 HASH (rtx x
, machine_mode mode
)
576 unsigned h
= (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
577 ? (((unsigned) REG
<< 7) + (unsigned) REG_QTY (REGNO (x
)))
578 : canon_hash (x
, mode
));
579 return (h
^ (h
>> HASH_SHIFT
)) & HASH_MASK
;
582 /* Like HASH, but without side-effects. */
584 static inline unsigned
585 SAFE_HASH (rtx x
, machine_mode mode
)
587 unsigned h
= (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
588 ? (((unsigned) REG
<< 7) + (unsigned) REG_QTY (REGNO (x
)))
589 : safe_hash (x
, mode
));
590 return (h
^ (h
>> HASH_SHIFT
)) & HASH_MASK
;
593 /* Nonzero if X has the form (PLUS frame-pointer integer). */
596 fixed_base_plus_p (rtx x
)
598 switch (GET_CODE (x
))
601 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
603 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
608 if (!CONST_INT_P (XEXP (x
, 1)))
610 return fixed_base_plus_p (XEXP (x
, 0));
617 /* Dump the expressions in the equivalence class indicated by CLASSP.
618 This function is used only for debugging. */
620 dump_class (struct table_elt
*classp
)
622 struct table_elt
*elt
;
624 fprintf (stderr
, "Equivalence chain for ");
625 print_rtl (stderr
, classp
->exp
);
626 fprintf (stderr
, ": \n");
628 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
630 print_rtl (stderr
, elt
->exp
);
631 fprintf (stderr
, "\n");
635 /* Return an estimate of the cost of the registers used in an rtx.
636 This is mostly the number of different REG expressions in the rtx;
637 however for some exceptions like fixed registers we use a cost of
638 0. If any other hard register reference occurs, return MAX_COST. */
641 approx_reg_cost (const_rtx x
)
644 subrtx_iterator::array_type array
;
645 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
650 unsigned int regno
= REGNO (x
);
651 if (!CHEAP_REGNO (regno
))
653 if (regno
< FIRST_PSEUDO_REGISTER
)
655 if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
667 /* Return a negative value if an rtx A, whose costs are given by COST_A
668 and REGCOST_A, is more desirable than an rtx B.
669 Return a positive value if A is less desirable, or 0 if the two are
672 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
674 /* First, get rid of cases involving expressions that are entirely
676 if (cost_a
!= cost_b
)
678 if (cost_a
== MAX_COST
)
680 if (cost_b
== MAX_COST
)
684 /* Avoid extending lifetimes of hardregs. */
685 if (regcost_a
!= regcost_b
)
687 if (regcost_a
== MAX_COST
)
689 if (regcost_b
== MAX_COST
)
693 /* Normal operation costs take precedence. */
694 if (cost_a
!= cost_b
)
695 return cost_a
- cost_b
;
696 /* Only if these are identical consider effects on register pressure. */
697 if (regcost_a
!= regcost_b
)
698 return regcost_a
- regcost_b
;
702 /* Internal function, to compute cost when X is not a register; called
703 from COST macro to keep it simple. */
706 notreg_cost (rtx x
, machine_mode mode
, enum rtx_code outer
, int opno
)
708 scalar_int_mode int_mode
, inner_mode
;
709 return ((GET_CODE (x
) == SUBREG
710 && REG_P (SUBREG_REG (x
))
711 && is_int_mode (mode
, &int_mode
)
712 && is_int_mode (GET_MODE (SUBREG_REG (x
)), &inner_mode
)
713 && GET_MODE_SIZE (int_mode
) < GET_MODE_SIZE (inner_mode
)
714 && subreg_lowpart_p (x
)
715 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, inner_mode
))
717 : rtx_cost (x
, mode
, outer
, opno
, optimize_this_for_speed_p
) * 2);
721 /* Initialize CSE_REG_INFO_TABLE. */
724 init_cse_reg_info (unsigned int nregs
)
726 /* Do we need to grow the table? */
727 if (nregs
> cse_reg_info_table_size
)
729 unsigned int new_size
;
731 if (cse_reg_info_table_size
< 2048)
733 /* Compute a new size that is a power of 2 and no smaller
734 than the large of NREGS and 64. */
735 new_size
= (cse_reg_info_table_size
736 ? cse_reg_info_table_size
: 64);
738 while (new_size
< nregs
)
743 /* If we need a big table, allocate just enough to hold
748 /* Reallocate the table with NEW_SIZE entries. */
749 free (cse_reg_info_table
);
750 cse_reg_info_table
= XNEWVEC (struct cse_reg_info
, new_size
);
751 cse_reg_info_table_size
= new_size
;
752 cse_reg_info_table_first_uninitialized
= 0;
755 /* Do we have all of the first NREGS entries initialized? */
756 if (cse_reg_info_table_first_uninitialized
< nregs
)
758 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
761 /* Put the old timestamp on newly allocated entries so that they
762 will all be considered out of date. We do not touch those
763 entries beyond the first NREGS entries to be nice to the
765 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
766 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
768 cse_reg_info_table_first_uninitialized
= nregs
;
772 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
775 get_cse_reg_info_1 (unsigned int regno
)
777 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
778 entry will be considered to have been initialized. */
779 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
781 /* Initialize the rest of the entry. */
782 cse_reg_info_table
[regno
].reg_tick
= 1;
783 cse_reg_info_table
[regno
].reg_in_table
= -1;
784 cse_reg_info_table
[regno
].subreg_ticked
= -1;
785 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
788 /* Find a cse_reg_info entry for REGNO. */
790 static inline struct cse_reg_info
*
791 get_cse_reg_info (unsigned int regno
)
793 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
795 /* If this entry has not been initialized, go ahead and initialize
797 if (p
->timestamp
!= cse_reg_info_timestamp
)
798 get_cse_reg_info_1 (regno
);
803 /* Clear the hash table and initialize each register with its own quantity,
804 for a new basic block. */
807 new_basic_block (void)
813 /* Invalidate cse_reg_info_table. */
814 cse_reg_info_timestamp
++;
816 /* Clear out hash table state for this pass. */
817 CLEAR_HARD_REG_SET (hard_regs_in_table
);
819 /* The per-quantity values used to be initialized here, but it is
820 much faster to initialize each as it is made in `make_new_qty'. */
822 for (i
= 0; i
< HASH_SIZE
; i
++)
824 struct table_elt
*first
;
829 struct table_elt
*last
= first
;
833 while (last
->next_same_hash
!= NULL
)
834 last
= last
->next_same_hash
;
836 /* Now relink this hash entire chain into
837 the free element list. */
839 last
->next_same_hash
= free_element_chain
;
840 free_element_chain
= first
;
845 /* Say that register REG contains a quantity in mode MODE not in any
846 register before and initialize that quantity. */
849 make_new_qty (unsigned int reg
, machine_mode mode
)
852 struct qty_table_elem
*ent
;
853 struct reg_eqv_elem
*eqv
;
855 gcc_assert (next_qty
< max_qty
);
857 q
= REG_QTY (reg
) = next_qty
++;
859 ent
->first_reg
= reg
;
862 ent
->const_rtx
= ent
->const_insn
= NULL
;
863 ent
->comparison_code
= UNKNOWN
;
865 eqv
= ®_eqv_table
[reg
];
866 eqv
->next
= eqv
->prev
= -1;
869 /* Make reg NEW equivalent to reg OLD.
870 OLD is not changing; NEW is. */
873 make_regs_eqv (unsigned int new_reg
, unsigned int old_reg
)
875 unsigned int lastr
, firstr
;
876 int q
= REG_QTY (old_reg
);
877 struct qty_table_elem
*ent
;
881 /* Nothing should become eqv until it has a "non-invalid" qty number. */
882 gcc_assert (REGNO_QTY_VALID_P (old_reg
));
884 REG_QTY (new_reg
) = q
;
885 firstr
= ent
->first_reg
;
886 lastr
= ent
->last_reg
;
888 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
889 hard regs. Among pseudos, if NEW will live longer than any other reg
890 of the same qty, and that is beyond the current basic block,
891 make it the new canonical replacement for this qty. */
892 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
893 /* Certain fixed registers might be of the class NO_REGS. This means
894 that not only can they not be allocated by the compiler, but
895 they cannot be used in substitutions or canonicalizations
897 && (new_reg
>= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new_reg
) != NO_REGS
)
898 && ((new_reg
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new_reg
))
899 || (new_reg
>= FIRST_PSEUDO_REGISTER
900 && (firstr
< FIRST_PSEUDO_REGISTER
901 || (bitmap_bit_p (cse_ebb_live_out
, new_reg
)
902 && !bitmap_bit_p (cse_ebb_live_out
, firstr
))
903 || (bitmap_bit_p (cse_ebb_live_in
, new_reg
)
904 && !bitmap_bit_p (cse_ebb_live_in
, firstr
))))))
906 reg_eqv_table
[firstr
].prev
= new_reg
;
907 reg_eqv_table
[new_reg
].next
= firstr
;
908 reg_eqv_table
[new_reg
].prev
= -1;
909 ent
->first_reg
= new_reg
;
913 /* If NEW is a hard reg (known to be non-fixed), insert at end.
914 Otherwise, insert before any non-fixed hard regs that are at the
915 end. Registers of class NO_REGS cannot be used as an
916 equivalent for anything. */
917 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
918 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
919 && new_reg
>= FIRST_PSEUDO_REGISTER
)
920 lastr
= reg_eqv_table
[lastr
].prev
;
921 reg_eqv_table
[new_reg
].next
= reg_eqv_table
[lastr
].next
;
922 if (reg_eqv_table
[lastr
].next
>= 0)
923 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new_reg
;
925 qty_table
[q
].last_reg
= new_reg
;
926 reg_eqv_table
[lastr
].next
= new_reg
;
927 reg_eqv_table
[new_reg
].prev
= lastr
;
931 /* Remove REG from its equivalence class. */
934 delete_reg_equiv (unsigned int reg
)
936 struct qty_table_elem
*ent
;
937 int q
= REG_QTY (reg
);
940 /* If invalid, do nothing. */
941 if (! REGNO_QTY_VALID_P (reg
))
946 p
= reg_eqv_table
[reg
].prev
;
947 n
= reg_eqv_table
[reg
].next
;
950 reg_eqv_table
[n
].prev
= p
;
954 reg_eqv_table
[p
].next
= n
;
958 REG_QTY (reg
) = -reg
- 1;
961 /* Remove any invalid expressions from the hash table
962 that refer to any of the registers contained in expression X.
964 Make sure that newly inserted references to those registers
965 as subexpressions will be considered valid.
967 mention_regs is not called when a register itself
968 is being stored in the table.
970 Return 1 if we have done something that may have changed the hash code
987 unsigned int regno
= REGNO (x
);
988 unsigned int endregno
= END_REGNO (x
);
991 for (i
= regno
; i
< endregno
; i
++)
993 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
994 remove_invalid_refs (i
);
996 REG_IN_TABLE (i
) = REG_TICK (i
);
997 SUBREG_TICKED (i
) = -1;
1003 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1004 pseudo if they don't use overlapping words. We handle only pseudos
1005 here for simplicity. */
1006 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1007 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1009 unsigned int i
= REGNO (SUBREG_REG (x
));
1011 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1013 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1014 the last store to this register really stored into this
1015 subreg, then remove the memory of this subreg.
1016 Otherwise, remove any memory of the entire register and
1017 all its subregs from the table. */
1018 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1019 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1020 remove_invalid_refs (i
);
1022 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1025 REG_IN_TABLE (i
) = REG_TICK (i
);
1026 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1030 /* If X is a comparison or a COMPARE and either operand is a register
1031 that does not have a quantity, give it one. This is so that a later
1032 call to record_jump_equiv won't cause X to be assigned a different
1033 hash code and not found in the table after that call.
1035 It is not necessary to do this here, since rehash_using_reg can
1036 fix up the table later, but doing this here eliminates the need to
1037 call that expensive function in the most common case where the only
1038 use of the register is in the comparison. */
1040 if (code
== COMPARE
|| COMPARISON_P (x
))
1042 if (REG_P (XEXP (x
, 0))
1043 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1044 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1046 rehash_using_reg (XEXP (x
, 0));
1050 if (REG_P (XEXP (x
, 1))
1051 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1052 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1054 rehash_using_reg (XEXP (x
, 1));
1059 fmt
= GET_RTX_FORMAT (code
);
1060 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1062 changed
|= mention_regs (XEXP (x
, i
));
1063 else if (fmt
[i
] == 'E')
1064 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1065 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1070 /* Update the register quantities for inserting X into the hash table
1071 with a value equivalent to CLASSP.
1072 (If the class does not contain a REG, it is irrelevant.)
1073 If MODIFIED is nonzero, X is a destination; it is being modified.
1074 Note that delete_reg_equiv should be called on a register
1075 before insert_regs is done on that register with MODIFIED != 0.
1077 Nonzero value means that elements of reg_qty have changed
1078 so X's hash code may be different. */
1081 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1085 unsigned int regno
= REGNO (x
);
1088 /* If REGNO is in the equivalence table already but is of the
1089 wrong mode for that equivalence, don't do anything here. */
1091 qty_valid
= REGNO_QTY_VALID_P (regno
);
1094 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1096 if (ent
->mode
!= GET_MODE (x
))
1100 if (modified
|| ! qty_valid
)
1103 for (classp
= classp
->first_same_value
;
1105 classp
= classp
->next_same_value
)
1106 if (REG_P (classp
->exp
)
1107 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1109 unsigned c_regno
= REGNO (classp
->exp
);
1111 gcc_assert (REGNO_QTY_VALID_P (c_regno
));
1113 /* Suppose that 5 is hard reg and 100 and 101 are
1116 (set (reg:si 100) (reg:si 5))
1117 (set (reg:si 5) (reg:si 100))
1118 (set (reg:di 101) (reg:di 5))
1120 We would now set REG_QTY (101) = REG_QTY (5), but the
1121 entry for 5 is in SImode. When we use this later in
1122 copy propagation, we get the register in wrong mode. */
1123 if (qty_table
[REG_QTY (c_regno
)].mode
!= GET_MODE (x
))
1126 make_regs_eqv (regno
, c_regno
);
1130 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1131 than REG_IN_TABLE to find out if there was only a single preceding
1132 invalidation - for the SUBREG - or another one, which would be
1133 for the full register. However, if we find here that REG_TICK
1134 indicates that the register is invalid, it means that it has
1135 been invalidated in a separate operation. The SUBREG might be used
1136 now (then this is a recursive call), or we might use the full REG
1137 now and a SUBREG of it later. So bump up REG_TICK so that
1138 mention_regs will do the right thing. */
1140 && REG_IN_TABLE (regno
) >= 0
1141 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1143 make_new_qty (regno
, GET_MODE (x
));
1150 /* If X is a SUBREG, we will likely be inserting the inner register in the
1151 table. If that register doesn't have an assigned quantity number at
1152 this point but does later, the insertion that we will be doing now will
1153 not be accessible because its hash code will have changed. So assign
1154 a quantity number now. */
1156 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1157 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1159 insert_regs (SUBREG_REG (x
), NULL
, 0);
1164 return mention_regs (x
);
1168 /* Compute upper and lower anchors for CST. Also compute the offset of CST
1169 from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff
1170 CST is equal to an anchor. */
1173 compute_const_anchors (rtx cst
,
1174 HOST_WIDE_INT
*lower_base
, HOST_WIDE_INT
*lower_offs
,
1175 HOST_WIDE_INT
*upper_base
, HOST_WIDE_INT
*upper_offs
)
1177 unsigned HOST_WIDE_INT n
= UINTVAL (cst
);
1179 *lower_base
= n
& ~(targetm
.const_anchor
- 1);
1180 if ((unsigned HOST_WIDE_INT
) *lower_base
== n
)
1183 *upper_base
= ((n
+ (targetm
.const_anchor
- 1))
1184 & ~(targetm
.const_anchor
- 1));
1185 *upper_offs
= n
- *upper_base
;
1186 *lower_offs
= n
- *lower_base
;
1190 /* Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE. */
1193 insert_const_anchor (HOST_WIDE_INT anchor
, rtx reg
, HOST_WIDE_INT offs
,
1196 struct table_elt
*elt
;
1201 anchor_exp
= gen_int_mode (anchor
, mode
);
1202 hash
= HASH (anchor_exp
, mode
);
1203 elt
= lookup (anchor_exp
, hash
, mode
);
1205 elt
= insert (anchor_exp
, NULL
, hash
, mode
);
1207 exp
= plus_constant (mode
, reg
, offs
);
1208 /* REG has just been inserted and the hash codes recomputed. */
1210 hash
= HASH (exp
, mode
);
1212 /* Use the cost of the register rather than the whole expression. When
1213 looking up constant anchors we will further offset the corresponding
1214 expression therefore it does not make sense to prefer REGs over
1215 reg-immediate additions. Prefer instead the oldest expression. Also
1216 don't prefer pseudos over hard regs so that we derive constants in
1217 argument registers from other argument registers rather than from the
1218 original pseudo that was used to synthesize the constant. */
1219 insert_with_costs (exp
, elt
, hash
, mode
, COST (reg
, mode
), 1);
1222 /* The constant CST is equivalent to the register REG. Create
1223 equivalences between the two anchors of CST and the corresponding
1224 register-offset expressions using REG. */
1227 insert_const_anchors (rtx reg
, rtx cst
, machine_mode mode
)
1229 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1231 if (!compute_const_anchors (cst
, &lower_base
, &lower_offs
,
1232 &upper_base
, &upper_offs
))
1235 /* Ignore anchors of value 0. Constants accessible from zero are
1237 if (lower_base
!= 0)
1238 insert_const_anchor (lower_base
, reg
, -lower_offs
, mode
);
1240 if (upper_base
!= 0)
1241 insert_const_anchor (upper_base
, reg
, -upper_offs
, mode
);
1244 /* We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of
1245 ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a
1246 valid expression. Return the cheapest and oldest of such expressions. In
1247 *OLD, return how old the resulting expression is compared to the other
1248 equivalent expressions. */
1251 find_reg_offset_for_const (struct table_elt
*anchor_elt
, HOST_WIDE_INT offs
,
1254 struct table_elt
*elt
;
1256 struct table_elt
*match_elt
;
1259 /* Find the cheapest and *oldest* expression to maximize the chance of
1260 reusing the same pseudo. */
1264 for (elt
= anchor_elt
->first_same_value
, idx
= 0;
1266 elt
= elt
->next_same_value
, idx
++)
1268 if (match_elt
&& CHEAPER (match_elt
, elt
))
1271 if (REG_P (elt
->exp
)
1272 || (GET_CODE (elt
->exp
) == PLUS
1273 && REG_P (XEXP (elt
->exp
, 0))
1274 && GET_CODE (XEXP (elt
->exp
, 1)) == CONST_INT
))
1278 /* Ignore expressions that are no longer valid. */
1279 if (!REG_P (elt
->exp
) && !exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
1282 x
= plus_constant (GET_MODE (elt
->exp
), elt
->exp
, offs
);
1284 || (GET_CODE (x
) == PLUS
1285 && IN_RANGE (INTVAL (XEXP (x
, 1)),
1286 -targetm
.const_anchor
,
1287 targetm
.const_anchor
- 1)))
1299 /* Try to express the constant SRC_CONST using a register+offset expression
1300 derived from a constant anchor. Return it if successful or NULL_RTX,
1304 try_const_anchors (rtx src_const
, machine_mode mode
)
1306 struct table_elt
*lower_elt
, *upper_elt
;
1307 HOST_WIDE_INT lower_base
, lower_offs
, upper_base
, upper_offs
;
1308 rtx lower_anchor_rtx
, upper_anchor_rtx
;
1309 rtx lower_exp
= NULL_RTX
, upper_exp
= NULL_RTX
;
1310 unsigned lower_old
, upper_old
;
1312 /* CONST_INT is used for CC modes, but we should leave those alone. */
1313 if (GET_MODE_CLASS (mode
) == MODE_CC
)
1316 gcc_assert (SCALAR_INT_MODE_P (mode
));
1317 if (!compute_const_anchors (src_const
, &lower_base
, &lower_offs
,
1318 &upper_base
, &upper_offs
))
1321 lower_anchor_rtx
= GEN_INT (lower_base
);
1322 upper_anchor_rtx
= GEN_INT (upper_base
);
1323 lower_elt
= lookup (lower_anchor_rtx
, HASH (lower_anchor_rtx
, mode
), mode
);
1324 upper_elt
= lookup (upper_anchor_rtx
, HASH (upper_anchor_rtx
, mode
), mode
);
1327 lower_exp
= find_reg_offset_for_const (lower_elt
, lower_offs
, &lower_old
);
1329 upper_exp
= find_reg_offset_for_const (upper_elt
, upper_offs
, &upper_old
);
1336 /* Return the older expression. */
1337 return (upper_old
> lower_old
? upper_exp
: lower_exp
);
1340 /* Look in or update the hash table. */
1342 /* Remove table element ELT from use in the table.
1343 HASH is its hash code, made using the HASH macro.
1344 It's an argument because often that is known in advance
1345 and we save much time not recomputing it. */
1348 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1353 /* Mark this element as removed. See cse_insn. */
1354 elt
->first_same_value
= 0;
1356 /* Remove the table element from its equivalence class. */
1359 struct table_elt
*prev
= elt
->prev_same_value
;
1360 struct table_elt
*next
= elt
->next_same_value
;
1363 next
->prev_same_value
= prev
;
1366 prev
->next_same_value
= next
;
1369 struct table_elt
*newfirst
= next
;
1372 next
->first_same_value
= newfirst
;
1373 next
= next
->next_same_value
;
1378 /* Remove the table element from its hash bucket. */
1381 struct table_elt
*prev
= elt
->prev_same_hash
;
1382 struct table_elt
*next
= elt
->next_same_hash
;
1385 next
->prev_same_hash
= prev
;
1388 prev
->next_same_hash
= next
;
1389 else if (table
[hash
] == elt
)
1393 /* This entry is not in the proper hash bucket. This can happen
1394 when two classes were merged by `merge_equiv_classes'. Search
1395 for the hash bucket that it heads. This happens only very
1396 rarely, so the cost is acceptable. */
1397 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1398 if (table
[hash
] == elt
)
1403 /* Remove the table element from its related-value circular chain. */
1405 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1407 struct table_elt
*p
= elt
->related_value
;
1409 while (p
->related_value
!= elt
)
1410 p
= p
->related_value
;
1411 p
->related_value
= elt
->related_value
;
1412 if (p
->related_value
== p
)
1413 p
->related_value
= 0;
1416 /* Now add it to the free element chain. */
1417 elt
->next_same_hash
= free_element_chain
;
1418 free_element_chain
= elt
;
1421 /* Same as above, but X is a pseudo-register. */
1424 remove_pseudo_from_table (rtx x
, unsigned int hash
)
1426 struct table_elt
*elt
;
1428 /* Because a pseudo-register can be referenced in more than one
1429 mode, we might have to remove more than one table entry. */
1430 while ((elt
= lookup_for_remove (x
, hash
, VOIDmode
)))
1431 remove_from_table (elt
, hash
);
1434 /* Look up X in the hash table and return its table element,
1435 or 0 if X is not in the table.
1437 MODE is the machine-mode of X, or if X is an integer constant
1438 with VOIDmode then MODE is the mode with which X will be used.
1440 Here we are satisfied to find an expression whose tree structure
1443 static struct table_elt
*
1444 lookup (rtx x
, unsigned int hash
, machine_mode mode
)
1446 struct table_elt
*p
;
1448 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1449 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1450 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1456 /* Like `lookup' but don't care whether the table element uses invalid regs.
1457 Also ignore discrepancies in the machine mode of a register. */
1459 static struct table_elt
*
1460 lookup_for_remove (rtx x
, unsigned int hash
, machine_mode mode
)
1462 struct table_elt
*p
;
1466 unsigned int regno
= REGNO (x
);
1468 /* Don't check the machine mode when comparing registers;
1469 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1470 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1472 && REGNO (p
->exp
) == regno
)
1477 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1479 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1486 /* Look for an expression equivalent to X and with code CODE.
1487 If one is found, return that expression. */
1490 lookup_as_function (rtx x
, enum rtx_code code
)
1493 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1498 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1499 if (GET_CODE (p
->exp
) == code
1500 /* Make sure this is a valid entry in the table. */
1501 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1507 /* Insert X in the hash table, assuming HASH is its hash code and
1508 CLASSP is an element of the class it should go in (or 0 if a new
1509 class should be made). COST is the code of X and reg_cost is the
1510 cost of registers in X. It is inserted at the proper position to
1511 keep the class in the order cheapest first.
1513 MODE is the machine-mode of X, or if X is an integer constant
1514 with VOIDmode then MODE is the mode with which X will be used.
1516 For elements of equal cheapness, the most recent one
1517 goes in front, except that the first element in the list
1518 remains first unless a cheaper element is added. The order of
1519 pseudo-registers does not matter, as canon_reg will be called to
1520 find the cheapest when a register is retrieved from the table.
1522 The in_memory field in the hash table element is set to 0.
1523 The caller must set it nonzero if appropriate.
1525 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1526 and if insert_regs returns a nonzero value
1527 you must then recompute its hash code before calling here.
1529 If necessary, update table showing constant values of quantities. */
1531 static struct table_elt
*
1532 insert_with_costs (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1533 machine_mode mode
, int cost
, int reg_cost
)
1535 struct table_elt
*elt
;
1537 /* If X is a register and we haven't made a quantity for it,
1538 something is wrong. */
1539 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1541 /* If X is a hard register, show it is being put in the table. */
1542 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1543 add_to_hard_reg_set (&hard_regs_in_table
, GET_MODE (x
), REGNO (x
));
1545 /* Put an element for X into the right hash bucket. */
1547 elt
= free_element_chain
;
1549 free_element_chain
= elt
->next_same_hash
;
1551 elt
= XNEW (struct table_elt
);
1554 elt
->canon_exp
= NULL_RTX
;
1556 elt
->regcost
= reg_cost
;
1557 elt
->next_same_value
= 0;
1558 elt
->prev_same_value
= 0;
1559 elt
->next_same_hash
= table
[hash
];
1560 elt
->prev_same_hash
= 0;
1561 elt
->related_value
= 0;
1564 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1567 table
[hash
]->prev_same_hash
= elt
;
1570 /* Put it into the proper value-class. */
1573 classp
= classp
->first_same_value
;
1574 if (CHEAPER (elt
, classp
))
1575 /* Insert at the head of the class. */
1577 struct table_elt
*p
;
1578 elt
->next_same_value
= classp
;
1579 classp
->prev_same_value
= elt
;
1580 elt
->first_same_value
= elt
;
1582 for (p
= classp
; p
; p
= p
->next_same_value
)
1583 p
->first_same_value
= elt
;
1587 /* Insert not at head of the class. */
1588 /* Put it after the last element cheaper than X. */
1589 struct table_elt
*p
, *next
;
1592 (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1596 /* Put it after P and before NEXT. */
1597 elt
->next_same_value
= next
;
1599 next
->prev_same_value
= elt
;
1601 elt
->prev_same_value
= p
;
1602 p
->next_same_value
= elt
;
1603 elt
->first_same_value
= classp
;
1607 elt
->first_same_value
= elt
;
1609 /* If this is a constant being set equivalent to a register or a register
1610 being set equivalent to a constant, note the constant equivalence.
1612 If this is a constant, it cannot be equivalent to a different constant,
1613 and a constant is the only thing that can be cheaper than a register. So
1614 we know the register is the head of the class (before the constant was
1617 If this is a register that is not already known equivalent to a
1618 constant, we must check the entire class.
1620 If this is a register that is already known equivalent to an insn,
1621 update the qtys `const_insn' to show that `this_insn' is the latest
1622 insn making that quantity equivalent to the constant. */
1624 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1627 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1628 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1630 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1631 exp_ent
->const_insn
= this_insn
;
1636 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1639 struct table_elt
*p
;
1641 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1643 if (p
->is_const
&& !REG_P (p
->exp
))
1645 int x_q
= REG_QTY (REGNO (x
));
1646 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1649 = gen_lowpart (GET_MODE (x
), p
->exp
);
1650 x_ent
->const_insn
= this_insn
;
1657 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1658 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1659 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1661 /* If this is a constant with symbolic value,
1662 and it has a term with an explicit integer value,
1663 link it up with related expressions. */
1664 if (GET_CODE (x
) == CONST
)
1666 rtx subexp
= get_related_value (x
);
1668 struct table_elt
*subelt
, *subelt_prev
;
1672 /* Get the integer-free subexpression in the hash table. */
1673 subhash
= SAFE_HASH (subexp
, mode
);
1674 subelt
= lookup (subexp
, subhash
, mode
);
1676 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1677 /* Initialize SUBELT's circular chain if it has none. */
1678 if (subelt
->related_value
== 0)
1679 subelt
->related_value
= subelt
;
1680 /* Find the element in the circular chain that precedes SUBELT. */
1681 subelt_prev
= subelt
;
1682 while (subelt_prev
->related_value
!= subelt
)
1683 subelt_prev
= subelt_prev
->related_value
;
1684 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1685 This way the element that follows SUBELT is the oldest one. */
1686 elt
->related_value
= subelt_prev
->related_value
;
1687 subelt_prev
->related_value
= elt
;
1694 /* Wrap insert_with_costs by passing the default costs. */
1696 static struct table_elt
*
1697 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
,
1700 return insert_with_costs (x
, classp
, hash
, mode
,
1701 COST (x
, mode
), approx_reg_cost (x
));
1705 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1706 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1707 the two classes equivalent.
1709 CLASS1 will be the surviving class; CLASS2 should not be used after this
1712 Any invalid entries in CLASS2 will not be copied. */
1715 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1717 struct table_elt
*elt
, *next
, *new_elt
;
1719 /* Ensure we start with the head of the classes. */
1720 class1
= class1
->first_same_value
;
1721 class2
= class2
->first_same_value
;
1723 /* If they were already equal, forget it. */
1724 if (class1
== class2
)
1727 for (elt
= class2
; elt
; elt
= next
)
1731 machine_mode mode
= elt
->mode
;
1733 next
= elt
->next_same_value
;
1735 /* Remove old entry, make a new one in CLASS1's class.
1736 Don't do this for invalid entries as we cannot find their
1737 hash code (it also isn't necessary). */
1738 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1740 bool need_rehash
= false;
1742 hash_arg_in_memory
= 0;
1743 hash
= HASH (exp
, mode
);
1747 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1748 delete_reg_equiv (REGNO (exp
));
1751 if (REG_P (exp
) && REGNO (exp
) >= FIRST_PSEUDO_REGISTER
)
1752 remove_pseudo_from_table (exp
, hash
);
1754 remove_from_table (elt
, hash
);
1756 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1758 rehash_using_reg (exp
);
1759 hash
= HASH (exp
, mode
);
1761 new_elt
= insert (exp
, class1
, hash
, mode
);
1762 new_elt
->in_memory
= hash_arg_in_memory
;
1763 if (GET_CODE (exp
) == ASM_OPERANDS
&& elt
->cost
== MAX_COST
)
1764 new_elt
->cost
= MAX_COST
;
1769 /* Flush the entire hash table. */
1772 flush_hash_table (void)
1775 struct table_elt
*p
;
1777 for (i
= 0; i
< HASH_SIZE
; i
++)
1778 for (p
= table
[i
]; p
; p
= table
[i
])
1780 /* Note that invalidate can remove elements
1781 after P in the current hash chain. */
1783 invalidate (p
->exp
, VOIDmode
);
1785 remove_from_table (p
, i
);
1789 /* Check whether an anti dependence exists between X and EXP. MODE and
1790 ADDR are as for canon_anti_dependence. */
1793 check_dependence (const_rtx x
, rtx exp
, machine_mode mode
, rtx addr
)
1795 subrtx_iterator::array_type array
;
1796 FOR_EACH_SUBRTX (iter
, array
, x
, NONCONST
)
1798 const_rtx x
= *iter
;
1799 if (MEM_P (x
) && canon_anti_dependence (x
, true, exp
, mode
, addr
))
1805 /* Remove from the hash table, or mark as invalid, all expressions whose
1806 values could be altered by storing in register X. */
1809 invalidate_reg (rtx x
)
1811 gcc_assert (GET_CODE (x
) == REG
);
1813 /* If X is a register, dependencies on its contents are recorded
1814 through the qty number mechanism. Just change the qty number of
1815 the register, mark it as invalid for expressions that refer to it,
1816 and remove it itself. */
1817 unsigned int regno
= REGNO (x
);
1818 unsigned int hash
= HASH (x
, GET_MODE (x
));
1820 /* Remove REGNO from any quantity list it might be on and indicate
1821 that its value might have changed. If it is a pseudo, remove its
1822 entry from the hash table.
1824 For a hard register, we do the first two actions above for any
1825 additional hard registers corresponding to X. Then, if any of these
1826 registers are in the table, we must remove any REG entries that
1827 overlap these registers. */
1829 delete_reg_equiv (regno
);
1831 SUBREG_TICKED (regno
) = -1;
1833 if (regno
>= FIRST_PSEUDO_REGISTER
)
1834 remove_pseudo_from_table (x
, hash
);
1837 HOST_WIDE_INT in_table
= TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1838 unsigned int endregno
= END_REGNO (x
);
1840 struct table_elt
*p
, *next
;
1842 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1844 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1846 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1847 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1848 delete_reg_equiv (rn
);
1850 SUBREG_TICKED (rn
) = -1;
1854 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1855 for (p
= table
[hash
]; p
; p
= next
)
1857 next
= p
->next_same_hash
;
1859 if (!REG_P (p
->exp
) || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1862 unsigned int tregno
= REGNO (p
->exp
);
1863 unsigned int tendregno
= END_REGNO (p
->exp
);
1864 if (tendregno
> regno
&& tregno
< endregno
)
1865 remove_from_table (p
, hash
);
1870 /* Remove from the hash table, or mark as invalid, all expressions whose
1871 values could be altered by storing in X. X is a register, a subreg, or
1872 a memory reference with nonvarying address (because, when a memory
1873 reference with a varying address is stored in, all memory references are
1874 removed by invalidate_memory so specific invalidation is superfluous).
1875 FULL_MODE, if not VOIDmode, indicates that this much should be
1876 invalidated instead of just the amount indicated by the mode of X. This
1877 is only used for bitfield stores into memory.
1879 A nonvarying address may be just a register or just a symbol reference,
1880 or it may be either of those plus a numeric offset. */
1883 invalidate (rtx x
, machine_mode full_mode
)
1886 struct table_elt
*p
;
1889 switch (GET_CODE (x
))
1896 invalidate (SUBREG_REG (x
), VOIDmode
);
1900 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1901 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1905 /* This is part of a disjoint return value; extract the location in
1906 question ignoring the offset. */
1907 invalidate (XEXP (x
, 0), VOIDmode
);
1911 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1912 /* Calculate the canonical version of X here so that
1913 true_dependence doesn't generate new RTL for X on each call. */
1916 /* Remove all hash table elements that refer to overlapping pieces of
1918 if (full_mode
== VOIDmode
)
1919 full_mode
= GET_MODE (x
);
1921 for (i
= 0; i
< HASH_SIZE
; i
++)
1923 struct table_elt
*next
;
1925 for (p
= table
[i
]; p
; p
= next
)
1927 next
= p
->next_same_hash
;
1930 /* Just canonicalize the expression once;
1931 otherwise each time we call invalidate
1932 true_dependence will canonicalize the
1933 expression again. */
1935 p
->canon_exp
= canon_rtx (p
->exp
);
1936 if (check_dependence (p
->canon_exp
, x
, full_mode
, addr
))
1937 remove_from_table (p
, i
);
1948 /* Invalidate DEST. Used when DEST is not going to be added
1949 into the hash table for some reason, e.g. do_not_record
1953 invalidate_dest (rtx dest
)
1956 || GET_CODE (dest
) == SUBREG
1958 invalidate (dest
, VOIDmode
);
1959 else if (GET_CODE (dest
) == STRICT_LOW_PART
1960 || GET_CODE (dest
) == ZERO_EXTRACT
)
1961 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
1964 /* Remove all expressions that refer to register REGNO,
1965 since they are already invalid, and we are about to
1966 mark that register valid again and don't want the old
1967 expressions to reappear as valid. */
1970 remove_invalid_refs (unsigned int regno
)
1973 struct table_elt
*p
, *next
;
1975 for (i
= 0; i
< HASH_SIZE
; i
++)
1976 for (p
= table
[i
]; p
; p
= next
)
1978 next
= p
->next_same_hash
;
1979 if (!REG_P (p
->exp
) && refers_to_regno_p (regno
, p
->exp
))
1980 remove_from_table (p
, i
);
1984 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1987 remove_invalid_subreg_refs (unsigned int regno
, poly_uint64 offset
,
1991 struct table_elt
*p
, *next
;
1993 for (i
= 0; i
< HASH_SIZE
; i
++)
1994 for (p
= table
[i
]; p
; p
= next
)
1997 next
= p
->next_same_hash
;
2000 && (GET_CODE (exp
) != SUBREG
2001 || !REG_P (SUBREG_REG (exp
))
2002 || REGNO (SUBREG_REG (exp
)) != regno
2003 || ranges_maybe_overlap_p (SUBREG_BYTE (exp
),
2004 GET_MODE_SIZE (GET_MODE (exp
)),
2005 offset
, GET_MODE_SIZE (mode
)))
2006 && refers_to_regno_p (regno
, p
->exp
))
2007 remove_from_table (p
, i
);
2011 /* Recompute the hash codes of any valid entries in the hash table that
2012 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
2014 This is called when we make a jump equivalence. */
2017 rehash_using_reg (rtx x
)
2020 struct table_elt
*p
, *next
;
2023 if (GET_CODE (x
) == SUBREG
)
2026 /* If X is not a register or if the register is known not to be in any
2027 valid entries in the table, we have no work to do. */
2030 || REG_IN_TABLE (REGNO (x
)) < 0
2031 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
2034 /* Scan all hash chains looking for valid entries that mention X.
2035 If we find one and it is in the wrong hash chain, move it. */
2037 for (i
= 0; i
< HASH_SIZE
; i
++)
2038 for (p
= table
[i
]; p
; p
= next
)
2040 next
= p
->next_same_hash
;
2041 if (reg_mentioned_p (x
, p
->exp
)
2042 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
2043 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
2045 if (p
->next_same_hash
)
2046 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
2048 if (p
->prev_same_hash
)
2049 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
2051 table
[i
] = p
->next_same_hash
;
2053 p
->next_same_hash
= table
[hash
];
2054 p
->prev_same_hash
= 0;
2056 table
[hash
]->prev_same_hash
= p
;
2062 /* Remove from the hash table any expression that is a call-clobbered
2063 register in INSN. Also update their TICK values. */
2066 invalidate_for_call (rtx_insn
*insn
)
2070 struct table_elt
*p
, *next
;
2072 hard_reg_set_iterator hrsi
;
2074 /* Go through all the hard registers. For each that might be clobbered
2075 in call insn INSN, remove the register from quantity chains and update
2076 reg_tick if defined. Also see if any of these registers is currently
2079 ??? We could be more precise for partially-clobbered registers,
2080 and only invalidate values that actually occupy the clobbered part
2081 of the registers. It doesn't seem worth the effort though, since
2082 we shouldn't see this situation much before RA. Whatever choice
2083 we make here has to be consistent with the table walk below,
2084 so any change to this test will require a change there too. */
2085 HARD_REG_SET callee_clobbers
2086 = insn_callee_abi (insn
).full_and_partial_reg_clobbers ();
2087 EXECUTE_IF_SET_IN_HARD_REG_SET (callee_clobbers
, 0, regno
, hrsi
)
2089 delete_reg_equiv (regno
);
2090 if (REG_TICK (regno
) >= 0)
2093 SUBREG_TICKED (regno
) = -1;
2095 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2098 /* In the case where we have no call-clobbered hard registers in the
2099 table, we are done. Otherwise, scan the table and remove any
2100 entry that overlaps a call-clobbered register. */
2103 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2104 for (p
= table
[hash
]; p
; p
= next
)
2106 next
= p
->next_same_hash
;
2109 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2112 /* This must use the same test as above rather than the
2113 more accurate clobbers_reg_p. */
2114 if (overlaps_hard_reg_set_p (callee_clobbers
, GET_MODE (p
->exp
),
2116 remove_from_table (p
, hash
);
2120 /* Given an expression X of type CONST,
2121 and ELT which is its table entry (or 0 if it
2122 is not in the hash table),
2123 return an alternate expression for X as a register plus integer.
2124 If none can be found, return 0. */
2127 use_related_value (rtx x
, struct table_elt
*elt
)
2129 struct table_elt
*relt
= 0;
2130 struct table_elt
*p
, *q
;
2131 HOST_WIDE_INT offset
;
2133 /* First, is there anything related known?
2134 If we have a table element, we can tell from that.
2135 Otherwise, must look it up. */
2137 if (elt
!= 0 && elt
->related_value
!= 0)
2139 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2141 rtx subexp
= get_related_value (x
);
2143 relt
= lookup (subexp
,
2144 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2151 /* Search all related table entries for one that has an
2152 equivalent register. */
2157 /* This loop is strange in that it is executed in two different cases.
2158 The first is when X is already in the table. Then it is searching
2159 the RELATED_VALUE list of X's class (RELT). The second case is when
2160 X is not in the table. Then RELT points to a class for the related
2163 Ensure that, whatever case we are in, that we ignore classes that have
2164 the same value as X. */
2166 if (rtx_equal_p (x
, p
->exp
))
2169 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2176 p
= p
->related_value
;
2178 /* We went all the way around, so there is nothing to be found.
2179 Alternatively, perhaps RELT was in the table for some other reason
2180 and it has no related values recorded. */
2181 if (p
== relt
|| p
== 0)
2188 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2189 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2190 return plus_constant (q
->mode
, q
->exp
, offset
);
2194 /* Hash a string. Just add its bytes up. */
2195 static inline unsigned
2196 hash_rtx_string (const char *ps
)
2199 const unsigned char *p
= (const unsigned char *) ps
;
2208 /* Same as hash_rtx, but call CB on each rtx if it is not NULL.
2209 When the callback returns true, we continue with the new rtx. */
2212 hash_rtx_cb (const_rtx x
, machine_mode mode
,
2213 int *do_not_record_p
, int *hash_arg_in_memory_p
,
2214 bool have_reg_qty
, hash_rtx_callback_function cb
)
2220 machine_mode newmode
;
2223 /* Used to turn recursion into iteration. We can't rely on GCC's
2224 tail-recursion elimination since we need to keep accumulating values
2230 /* Invoke the callback first. */
2232 && ((*cb
) (x
, mode
, &newx
, &newmode
)))
2234 hash
+= hash_rtx_cb (newx
, newmode
, do_not_record_p
,
2235 hash_arg_in_memory_p
, have_reg_qty
, cb
);
2239 code
= GET_CODE (x
);
2244 unsigned int regno
= REGNO (x
);
2246 if (do_not_record_p
&& !reload_completed
)
2248 /* On some machines, we can't record any non-fixed hard register,
2249 because extending its life will cause reload problems. We
2250 consider ap, fp, sp, gp to be fixed for this purpose.
2252 We also consider CCmode registers to be fixed for this purpose;
2253 failure to do so leads to failure to simplify 0<100 type of
2256 On all machines, we can't record any global registers.
2257 Nor should we record any register that is in a small
2258 class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. */
2261 if (regno
>= FIRST_PSEUDO_REGISTER
)
2263 else if (x
== frame_pointer_rtx
2264 || x
== hard_frame_pointer_rtx
2265 || x
== arg_pointer_rtx
2266 || x
== stack_pointer_rtx
2267 || x
== pic_offset_table_rtx
)
2269 else if (global_regs
[regno
])
2271 else if (fixed_regs
[regno
])
2273 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2275 else if (targetm
.small_register_classes_for_mode_p (GET_MODE (x
)))
2277 else if (targetm
.class_likely_spilled_p (REGNO_REG_CLASS (regno
)))
2284 *do_not_record_p
= 1;
2289 hash
+= ((unsigned int) REG
<< 7);
2290 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2294 /* We handle SUBREG of a REG specially because the underlying
2295 reg changes its hash value with every value change; we don't
2296 want to have to forget unrelated subregs when one subreg changes. */
2299 if (REG_P (SUBREG_REG (x
)))
2301 hash
+= (((unsigned int) SUBREG
<< 7)
2302 + REGNO (SUBREG_REG (x
))
2303 + (constant_lower_bound (SUBREG_BYTE (x
))
2311 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2312 + (unsigned int) INTVAL (x
));
2315 case CONST_WIDE_INT
:
2316 for (i
= 0; i
< CONST_WIDE_INT_NUNITS (x
); i
++)
2317 hash
+= CONST_WIDE_INT_ELT (x
, i
);
2320 case CONST_POLY_INT
:
2324 for (unsigned int i
= 0; i
< NUM_POLY_INT_COEFFS
; ++i
)
2325 h
.add_wide_int (CONST_POLY_INT_COEFFS (x
)[i
]);
2330 /* This is like the general case, except that it only counts
2331 the integers representing the constant. */
2332 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2333 if (TARGET_SUPPORTS_WIDE_INT
== 0 && GET_MODE (x
) == VOIDmode
)
2334 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2335 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2337 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2341 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2342 hash
+= fixed_hash (CONST_FIXED_VALUE (x
));
2350 units
= const_vector_encoded_nelts (x
);
2352 for (i
= 0; i
< units
; ++i
)
2354 elt
= CONST_VECTOR_ENCODED_ELT (x
, i
);
2355 hash
+= hash_rtx_cb (elt
, GET_MODE (elt
),
2356 do_not_record_p
, hash_arg_in_memory_p
,
2363 /* Assume there is only one rtx object for any given label. */
2365 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2366 differences and differences between each stage's debugging dumps. */
2367 hash
+= (((unsigned int) LABEL_REF
<< 7)
2368 + CODE_LABEL_NUMBER (label_ref_label (x
)));
2373 /* Don't hash on the symbol's address to avoid bootstrap differences.
2374 Different hash values may cause expressions to be recorded in
2375 different orders and thus different registers to be used in the
2376 final assembler. This also avoids differences in the dump files
2377 between various stages. */
2379 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2382 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2384 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2389 /* We don't record if marked volatile or if BLKmode since we don't
2390 know the size of the move. */
2391 if (do_not_record_p
&& (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
))
2393 *do_not_record_p
= 1;
2396 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2397 *hash_arg_in_memory_p
= 1;
2399 /* Now that we have already found this special case,
2400 might as well speed it up as much as possible. */
2401 hash
+= (unsigned) MEM
;
2406 /* A USE that mentions non-volatile memory needs special
2407 handling since the MEM may be BLKmode which normally
2408 prevents an entry from being made. Pure calls are
2409 marked by a USE which mentions BLKmode memory.
2410 See calls.cc:emit_call_1. */
2411 if (MEM_P (XEXP (x
, 0))
2412 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2414 hash
+= (unsigned) USE
;
2417 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2418 *hash_arg_in_memory_p
= 1;
2420 /* Now that we have already found this special case,
2421 might as well speed it up as much as possible. */
2422 hash
+= (unsigned) MEM
;
2436 case UNSPEC_VOLATILE
:
2437 if (do_not_record_p
) {
2438 *do_not_record_p
= 1;
2446 if (do_not_record_p
&& MEM_VOLATILE_P (x
))
2448 *do_not_record_p
= 1;
2453 /* We don't want to take the filename and line into account. */
2454 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2455 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2456 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2457 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2459 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2461 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2463 hash
+= (hash_rtx_cb (ASM_OPERANDS_INPUT (x
, i
),
2464 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2465 do_not_record_p
, hash_arg_in_memory_p
,
2468 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2471 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2472 x
= ASM_OPERANDS_INPUT (x
, 0);
2473 mode
= GET_MODE (x
);
2485 i
= GET_RTX_LENGTH (code
) - 1;
2486 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2487 fmt
= GET_RTX_FORMAT (code
);
2493 /* If we are about to do the last recursive call
2494 needed at this level, change it into iteration.
2495 This function is called enough to be worth it. */
2502 hash
+= hash_rtx_cb (XEXP (x
, i
), VOIDmode
, do_not_record_p
,
2503 hash_arg_in_memory_p
,
2508 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2509 hash
+= hash_rtx_cb (XVECEXP (x
, i
, j
), VOIDmode
, do_not_record_p
,
2510 hash_arg_in_memory_p
,
2515 hash
+= hash_rtx_string (XSTR (x
, i
));
2519 hash
+= (unsigned int) XINT (x
, i
);
2523 hash
+= constant_lower_bound (SUBREG_BYTE (x
));
2538 /* Hash an rtx. We are careful to make sure the value is never negative.
2539 Equivalent registers hash identically.
2540 MODE is used in hashing for CONST_INTs only;
2541 otherwise the mode of X is used.
2543 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2545 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2546 a MEM rtx which does not have the MEM_READONLY_P flag set.
2548 Note that cse_insn knows that the hash code of a MEM expression
2549 is just (int) MEM plus the hash code of the address. */
2552 hash_rtx (const_rtx x
, machine_mode mode
, int *do_not_record_p
,
2553 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2555 return hash_rtx_cb (x
, mode
, do_not_record_p
,
2556 hash_arg_in_memory_p
, have_reg_qty
, NULL
);
2559 /* Hash an rtx X for cse via hash_rtx.
2560 Stores 1 in do_not_record if any subexpression is volatile.
2561 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2562 does not have the MEM_READONLY_P flag set. */
2564 static inline unsigned
2565 canon_hash (rtx x
, machine_mode mode
)
2567 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2570 /* Like canon_hash but with no side effects, i.e. do_not_record
2571 and hash_arg_in_memory are not changed. */
2573 static inline unsigned
2574 safe_hash (rtx x
, machine_mode mode
)
2576 int dummy_do_not_record
;
2577 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2580 /* Return 1 iff X and Y would canonicalize into the same thing,
2581 without actually constructing the canonicalization of either one.
2582 If VALIDATE is nonzero,
2583 we assume X is an expression being processed from the rtl
2584 and Y was found in the hash table. We check register refs
2585 in Y for being marked as valid.
2587 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2590 exp_equiv_p (const_rtx x
, const_rtx y
, int validate
, bool for_gcse
)
2596 /* Note: it is incorrect to assume an expression is equivalent to itself
2597 if VALIDATE is nonzero. */
2598 if (x
== y
&& !validate
)
2601 if (x
== 0 || y
== 0)
2604 code
= GET_CODE (x
);
2605 if (code
!= GET_CODE (y
))
2608 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2609 if (GET_MODE (x
) != GET_MODE (y
))
2612 /* MEMs referring to different address space are not equivalent. */
2613 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2623 if (!same_vector_encodings_p (x
, y
))
2628 return label_ref_label (x
) == label_ref_label (y
);
2631 return XSTR (x
, 0) == XSTR (y
, 0);
2635 return REGNO (x
) == REGNO (y
);
2638 unsigned int regno
= REGNO (y
);
2640 unsigned int endregno
= END_REGNO (y
);
2642 /* If the quantities are not the same, the expressions are not
2643 equivalent. If there are and we are not to validate, they
2644 are equivalent. Otherwise, ensure all regs are up-to-date. */
2646 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2652 for (i
= regno
; i
< endregno
; i
++)
2653 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2662 /* A volatile mem should not be considered equivalent to any
2664 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2667 /* Can't merge two expressions in different alias sets, since we
2668 can decide that the expression is transparent in a block when
2669 it isn't, due to it being set with the different alias set.
2671 Also, can't merge two expressions with different MEM_ATTRS.
2672 They could e.g. be two different entities allocated into the
2673 same space on the stack (see e.g. PR25130). In that case, the
2674 MEM addresses can be the same, even though the two MEMs are
2675 absolutely not equivalent.
2677 But because really all MEM attributes should be the same for
2678 equivalent MEMs, we just use the invariant that MEMs that have
2679 the same attributes share the same mem_attrs data structure. */
2680 if (!mem_attrs_eq_p (MEM_ATTRS (x
), MEM_ATTRS (y
)))
2683 /* If we are handling exceptions, we cannot consider two expressions
2684 with different trapping status as equivalent, because simple_mem
2685 might accept one and reject the other. */
2686 if (cfun
->can_throw_non_call_exceptions
2687 && (MEM_NOTRAP_P (x
) != MEM_NOTRAP_P (y
)))
2692 /* For commutative operations, check both orders. */
2700 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2702 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2703 validate
, for_gcse
))
2704 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2706 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2707 validate
, for_gcse
)));
2710 /* We don't use the generic code below because we want to
2711 disregard filename and line numbers. */
2713 /* A volatile asm isn't equivalent to any other. */
2714 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2717 if (GET_MODE (x
) != GET_MODE (y
)
2718 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2719 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2720 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2721 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2722 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2725 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2727 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2728 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2729 ASM_OPERANDS_INPUT (y
, i
),
2731 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2732 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2742 /* Compare the elements. If any pair of corresponding elements
2743 fail to match, return 0 for the whole thing. */
2745 fmt
= GET_RTX_FORMAT (code
);
2746 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2751 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2752 validate
, for_gcse
))
2757 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2759 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2760 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2761 validate
, for_gcse
))
2766 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2771 if (XINT (x
, i
) != XINT (y
, i
))
2776 if (XWINT (x
, i
) != XWINT (y
, i
))
2781 if (maybe_ne (SUBREG_BYTE (x
), SUBREG_BYTE (y
)))
2797 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2798 the result if necessary. INSN is as for canon_reg. */
2801 validate_canon_reg (rtx
*xloc
, rtx_insn
*insn
)
2805 rtx new_rtx
= canon_reg (*xloc
, insn
);
2807 /* If replacing pseudo with hard reg or vice versa, ensure the
2808 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2809 gcc_assert (insn
&& new_rtx
);
2810 validate_change (insn
, xloc
, new_rtx
, 1);
2814 /* Canonicalize an expression:
2815 replace each register reference inside it
2816 with the "oldest" equivalent register.
2818 If INSN is nonzero validate_change is used to ensure that INSN remains valid
2819 after we make our substitution. The calls are made with IN_GROUP nonzero
2820 so apply_change_group must be called upon the outermost return from this
2821 function (unless INSN is zero). The result of apply_change_group can
2822 generally be discarded since the changes we are making are optional. */
2825 canon_reg (rtx x
, rtx_insn
*insn
)
2834 code
= GET_CODE (x
);
2850 struct qty_table_elem
*ent
;
2852 /* Never replace a hard reg, because hard regs can appear
2853 in more than one machine mode, and we must preserve the mode
2854 of each occurrence. Also, some hard regs appear in
2855 MEMs that are shared and mustn't be altered. Don't try to
2856 replace any reg that maps to a reg of class NO_REGS. */
2857 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2858 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2861 q
= REG_QTY (REGNO (x
));
2862 ent
= &qty_table
[q
];
2863 first
= ent
->first_reg
;
2864 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2865 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2866 : gen_rtx_REG (ent
->mode
, first
));
2873 fmt
= GET_RTX_FORMAT (code
);
2874 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2879 validate_canon_reg (&XEXP (x
, i
), insn
);
2880 else if (fmt
[i
] == 'E')
2881 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2882 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2888 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2889 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2890 what values are being compared.
2892 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2893 actually being compared. For example, if *PARG1 was (reg:CC CC_REG) and
2894 *PARG2 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that
2895 were compared to produce (reg:CC CC_REG).
2897 The return value is the comparison operator and is either the code of
2898 A or the code corresponding to the inverse of the comparison. */
2900 static enum rtx_code
2901 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
2902 machine_mode
*pmode1
, machine_mode
*pmode2
)
2905 hash_set
<rtx
> *visited
= NULL
;
2906 /* Set nonzero when we find something of interest. */
2909 arg1
= *parg1
, arg2
= *parg2
;
2911 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2913 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
2915 int reverse_code
= 0;
2916 struct table_elt
*p
= 0;
2918 /* Remember state from previous iteration. */
2922 visited
= new hash_set
<rtx
>;
2927 /* If arg1 is a COMPARE, extract the comparison arguments from it. */
2929 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
2932 /* If ARG1 is a comparison operator and CODE is testing for
2933 STORE_FLAG_VALUE, get the inner arguments. */
2935 else if (COMPARISON_P (arg1
))
2937 #ifdef FLOAT_STORE_FLAG_VALUE
2938 REAL_VALUE_TYPE fsfv
;
2942 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2943 && code
== LT
&& STORE_FLAG_VALUE
== -1)
2944 #ifdef FLOAT_STORE_FLAG_VALUE
2945 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2946 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2947 REAL_VALUE_NEGATIVE (fsfv
)))
2952 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
2953 && code
== GE
&& STORE_FLAG_VALUE
== -1)
2954 #ifdef FLOAT_STORE_FLAG_VALUE
2955 || (SCALAR_FLOAT_MODE_P (GET_MODE (arg1
))
2956 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
2957 REAL_VALUE_NEGATIVE (fsfv
)))
2960 x
= arg1
, reverse_code
= 1;
2963 /* ??? We could also check for
2965 (ne (and (eq (...) (const_int 1))) (const_int 0))
2967 and related forms, but let's wait until we see them occurring. */
2970 /* Look up ARG1 in the hash table and see if it has an equivalence
2971 that lets us see what is being compared. */
2972 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
2975 p
= p
->first_same_value
;
2977 /* If what we compare is already known to be constant, that is as
2979 We need to break the loop in this case, because otherwise we
2980 can have an infinite loop when looking at a reg that is known
2981 to be a constant which is the same as a comparison of a reg
2982 against zero which appears later in the insn stream, which in
2983 turn is constant and the same as the comparison of the first reg
2989 for (; p
; p
= p
->next_same_value
)
2991 machine_mode inner_mode
= GET_MODE (p
->exp
);
2992 #ifdef FLOAT_STORE_FLAG_VALUE
2993 REAL_VALUE_TYPE fsfv
;
2996 /* If the entry isn't valid, skip it. */
2997 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3000 /* If it's a comparison we've used before, skip it. */
3001 if (visited
&& visited
->contains (p
->exp
))
3004 if (GET_CODE (p
->exp
) == COMPARE
3005 /* Another possibility is that this machine has a compare insn
3006 that includes the comparison code. In that case, ARG1 would
3007 be equivalent to a comparison operation that would set ARG1 to
3008 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3009 ORIG_CODE is the actual comparison being done; if it is an EQ,
3010 we must reverse ORIG_CODE. On machine with a negative value
3011 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3014 && val_signbit_known_set_p (inner_mode
,
3016 #ifdef FLOAT_STORE_FLAG_VALUE
3018 && SCALAR_FLOAT_MODE_P (inner_mode
)
3019 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3020 REAL_VALUE_NEGATIVE (fsfv
)))
3023 && COMPARISON_P (p
->exp
)))
3028 else if ((code
== EQ
3030 && val_signbit_known_set_p (inner_mode
,
3032 #ifdef FLOAT_STORE_FLAG_VALUE
3034 && SCALAR_FLOAT_MODE_P (inner_mode
)
3035 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3036 REAL_VALUE_NEGATIVE (fsfv
)))
3039 && COMPARISON_P (p
->exp
))
3046 /* If this non-trapping address, e.g. fp + constant, the
3047 equivalent is a better operand since it may let us predict
3048 the value of the comparison. */
3049 else if (!rtx_addr_can_trap_p (p
->exp
))
3056 /* If we didn't find a useful equivalence for ARG1, we are done.
3057 Otherwise, set up for the next iteration. */
3061 /* If we need to reverse the comparison, make sure that is
3062 possible -- we can't necessarily infer the value of GE from LT
3063 with floating-point operands. */
3066 enum rtx_code reversed
= reversed_comparison_code (x
, NULL
);
3067 if (reversed
== UNKNOWN
)
3072 else if (COMPARISON_P (x
))
3073 code
= GET_CODE (x
);
3074 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3077 /* Return our results. Return the modes from before fold_rtx
3078 because fold_rtx might produce const_int, and then it's too late. */
3079 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3080 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3087 /* If X is a nontrivial arithmetic operation on an argument for which
3088 a constant value can be determined, return the result of operating
3089 on that value, as a constant. Otherwise, return X, possibly with
3090 one or more operands changed to a forward-propagated constant.
3092 If X is a register whose contents are known, we do NOT return
3093 those contents here; equiv_constant is called to perform that task.
3094 For SUBREGs and MEMs, we do that both here and in equiv_constant.
3096 INSN is the insn that we may be modifying. If it is 0, make a copy
3097 of X before modifying it. */
3100 fold_rtx (rtx x
, rtx_insn
*insn
)
3110 /* Operands of X. */
3111 /* Workaround -Wmaybe-uninitialized false positive during
3112 profiledbootstrap by initializing them. */
3113 rtx folded_arg0
= NULL_RTX
;
3114 rtx folded_arg1
= NULL_RTX
;
3116 /* Constant equivalents of first three operands of X;
3117 0 when no such equivalent is known. */
3122 /* The mode of the first operand of X. We need this for sign and zero
3124 machine_mode mode_arg0
;
3129 /* Try to perform some initial simplifications on X. */
3130 code
= GET_CODE (x
);
3135 /* The first operand of a SIGN/ZERO_EXTRACT has a different meaning
3136 than it would in other contexts. Basically its mode does not
3137 signify the size of the object read. That information is carried
3138 by size operand. If we happen to have a MEM of the appropriate
3139 mode in our tables with a constant value we could simplify the
3140 extraction incorrectly if we allowed substitution of that value
3144 if ((new_rtx
= equiv_constant (x
)) != NULL_RTX
)
3154 /* No use simplifying an EXPR_LIST
3155 since they are used only for lists of args
3156 in a function call's REG_EQUAL note. */
3163 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3164 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3165 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3170 if (NO_FUNCTION_CSE
&& CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3175 rtx trueop0
= XEXP (x
, 0);
3176 mode
= GET_MODE (trueop0
);
3177 rtx trueop1
= XEXP (x
, 1);
3178 /* If we select a low-part subreg, return that. */
3179 if (vec_series_lowpart_p (GET_MODE (x
), mode
, trueop1
))
3181 rtx new_rtx
= lowpart_subreg (GET_MODE (x
), trueop0
, mode
);
3182 if (new_rtx
!= NULL_RTX
)
3187 /* Anything else goes through the loop below. */
3192 mode
= GET_MODE (x
);
3196 mode_arg0
= VOIDmode
;
3198 /* Try folding our operands.
3199 Then see which ones have constant values known. */
3201 fmt
= GET_RTX_FORMAT (code
);
3202 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3205 rtx folded_arg
= XEXP (x
, i
), const_arg
;
3206 machine_mode mode_arg
= GET_MODE (folded_arg
);
3208 switch (GET_CODE (folded_arg
))
3213 const_arg
= equiv_constant (folded_arg
);
3220 const_arg
= folded_arg
;
3224 folded_arg
= fold_rtx (folded_arg
, insn
);
3225 const_arg
= equiv_constant (folded_arg
);
3229 /* For the first three operands, see if the operand
3230 is constant or equivalent to a constant. */
3234 folded_arg0
= folded_arg
;
3235 const_arg0
= const_arg
;
3236 mode_arg0
= mode_arg
;
3239 folded_arg1
= folded_arg
;
3240 const_arg1
= const_arg
;
3243 const_arg2
= const_arg
;
3247 /* Pick the least expensive of the argument and an equivalent constant
3250 && const_arg
!= folded_arg
3251 && (COST_IN (const_arg
, mode_arg
, code
, i
)
3252 <= COST_IN (folded_arg
, mode_arg
, code
, i
))
3254 /* It's not safe to substitute the operand of a conversion
3255 operator with a constant, as the conversion's identity
3256 depends upon the mode of its operand. This optimization
3257 is handled by the call to simplify_unary_operation. */
3258 && (GET_RTX_CLASS (code
) != RTX_UNARY
3259 || GET_MODE (const_arg
) == mode_arg0
3260 || (code
!= ZERO_EXTEND
3261 && code
!= SIGN_EXTEND
3263 && code
!= FLOAT_TRUNCATE
3264 && code
!= FLOAT_EXTEND
3267 && code
!= UNSIGNED_FLOAT
3268 && code
!= UNSIGNED_FIX
)))
3269 folded_arg
= const_arg
;
3271 if (folded_arg
== XEXP (x
, i
))
3274 if (insn
== NULL_RTX
&& !changed
)
3277 validate_unshare_change (insn
, &XEXP (x
, i
), folded_arg
, 1);
3282 /* Canonicalize X if necessary, and keep const_argN and folded_argN
3283 consistent with the order in X. */
3284 if (canonicalize_change_group (insn
, x
))
3286 std::swap (const_arg0
, const_arg1
);
3287 std::swap (folded_arg0
, folded_arg1
);
3290 apply_change_group ();
3293 /* If X is an arithmetic operation, see if we can simplify it. */
3295 switch (GET_RTX_CLASS (code
))
3299 /* We can't simplify extension ops unless we know the
3301 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3302 && mode_arg0
== VOIDmode
)
3305 new_rtx
= simplify_unary_operation (code
, mode
,
3306 const_arg0
? const_arg0
: folded_arg0
,
3312 case RTX_COMM_COMPARE
:
3313 /* See what items are actually being compared and set FOLDED_ARG[01]
3314 to those values and CODE to the actual comparison code. If any are
3315 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3316 do anything if both operands are already known to be constant. */
3318 /* ??? Vector mode comparisons are not supported yet. */
3319 if (VECTOR_MODE_P (mode
))
3322 if (const_arg0
== 0 || const_arg1
== 0)
3324 struct table_elt
*p0
, *p1
;
3325 rtx true_rtx
, false_rtx
;
3326 machine_mode mode_arg1
;
3328 if (SCALAR_FLOAT_MODE_P (mode
))
3330 #ifdef FLOAT_STORE_FLAG_VALUE
3331 true_rtx
= (const_double_from_real_value
3332 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3334 true_rtx
= NULL_RTX
;
3336 false_rtx
= CONST0_RTX (mode
);
3340 true_rtx
= const_true_rtx
;
3341 false_rtx
= const0_rtx
;
3344 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3345 &mode_arg0
, &mode_arg1
);
3347 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3348 what kinds of things are being compared, so we can't do
3349 anything with this comparison. */
3351 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3354 const_arg0
= equiv_constant (folded_arg0
);
3355 const_arg1
= equiv_constant (folded_arg1
);
3357 /* If we do not now have two constants being compared, see
3358 if we can nevertheless deduce some things about the
3360 if (const_arg0
== 0 || const_arg1
== 0)
3362 if (const_arg1
!= NULL
)
3364 rtx cheapest_simplification
;
3367 struct table_elt
*p
;
3369 /* See if we can find an equivalent of folded_arg0
3370 that gets us a cheaper expression, possibly a
3371 constant through simplifications. */
3372 p
= lookup (folded_arg0
, SAFE_HASH (folded_arg0
, mode_arg0
),
3377 cheapest_simplification
= x
;
3378 cheapest_cost
= COST (x
, mode
);
3380 for (p
= p
->first_same_value
; p
!= NULL
; p
= p
->next_same_value
)
3384 /* If the entry isn't valid, skip it. */
3385 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3388 /* Try to simplify using this equivalence. */
3390 = simplify_relational_operation (code
, mode
,
3395 if (simp_result
== NULL
)
3398 cost
= COST (simp_result
, mode
);
3399 if (cost
< cheapest_cost
)
3401 cheapest_cost
= cost
;
3402 cheapest_simplification
= simp_result
;
3406 /* If we have a cheaper expression now, use that
3407 and try folding it further, from the top. */
3408 if (cheapest_simplification
!= x
)
3409 return fold_rtx (copy_rtx (cheapest_simplification
),
3414 /* See if the two operands are the same. */
3416 if ((REG_P (folded_arg0
)
3417 && REG_P (folded_arg1
)
3418 && (REG_QTY (REGNO (folded_arg0
))
3419 == REG_QTY (REGNO (folded_arg1
))))
3420 || ((p0
= lookup (folded_arg0
,
3421 SAFE_HASH (folded_arg0
, mode_arg0
),
3423 && (p1
= lookup (folded_arg1
,
3424 SAFE_HASH (folded_arg1
, mode_arg0
),
3426 && p0
->first_same_value
== p1
->first_same_value
))
3427 folded_arg1
= folded_arg0
;
3429 /* If FOLDED_ARG0 is a register, see if the comparison we are
3430 doing now is either the same as we did before or the reverse
3431 (we only check the reverse if not floating-point). */
3432 else if (REG_P (folded_arg0
))
3434 int qty
= REG_QTY (REGNO (folded_arg0
));
3436 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
3438 struct qty_table_elem
*ent
= &qty_table
[qty
];
3440 if ((comparison_dominates_p (ent
->comparison_code
, code
)
3441 || (! FLOAT_MODE_P (mode_arg0
)
3442 && comparison_dominates_p (ent
->comparison_code
,
3443 reverse_condition (code
))))
3444 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
3446 && rtx_equal_p (ent
->comparison_const
,
3448 || (REG_P (folded_arg1
)
3449 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
3451 if (comparison_dominates_p (ent
->comparison_code
, code
))
3466 /* If we are comparing against zero, see if the first operand is
3467 equivalent to an IOR with a constant. If so, we may be able to
3468 determine the result of this comparison. */
3469 if (const_arg1
== const0_rtx
&& !const_arg0
)
3471 rtx y
= lookup_as_function (folded_arg0
, IOR
);
3475 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
3476 && CONST_INT_P (inner_const
)
3477 && INTVAL (inner_const
) != 0)
3478 folded_arg0
= gen_rtx_IOR (mode_arg0
, XEXP (y
, 0), inner_const
);
3482 rtx op0
= const_arg0
? const_arg0
: copy_rtx (folded_arg0
);
3483 rtx op1
= const_arg1
? const_arg1
: copy_rtx (folded_arg1
);
3484 new_rtx
= simplify_relational_operation (code
, mode
, mode_arg0
,
3490 case RTX_COMM_ARITH
:
3494 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3495 with that LABEL_REF as its second operand. If so, the result is
3496 the first operand of that MINUS. This handles switches with an
3497 ADDR_DIFF_VEC table. */
3498 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
3501 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
3502 : lookup_as_function (folded_arg0
, MINUS
);
3504 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3505 && label_ref_label (XEXP (y
, 1)) == label_ref_label (const_arg1
))
3508 /* Now try for a CONST of a MINUS like the above. */
3509 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
3510 : lookup_as_function (folded_arg0
, CONST
))) != 0
3511 && GET_CODE (XEXP (y
, 0)) == MINUS
3512 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3513 && label_ref_label (XEXP (XEXP (y
, 0), 1)) == label_ref_label (const_arg1
))
3514 return XEXP (XEXP (y
, 0), 0);
3517 /* Likewise if the operands are in the other order. */
3518 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
3521 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
3522 : lookup_as_function (folded_arg1
, MINUS
);
3524 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
3525 && label_ref_label (XEXP (y
, 1)) == label_ref_label (const_arg0
))
3528 /* Now try for a CONST of a MINUS like the above. */
3529 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
3530 : lookup_as_function (folded_arg1
, CONST
))) != 0
3531 && GET_CODE (XEXP (y
, 0)) == MINUS
3532 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
3533 && label_ref_label (XEXP (XEXP (y
, 0), 1)) == label_ref_label (const_arg0
))
3534 return XEXP (XEXP (y
, 0), 0);
3537 /* If second operand is a register equivalent to a negative
3538 CONST_INT, see if we can find a register equivalent to the
3539 positive constant. Make a MINUS if so. Don't do this for
3540 a non-negative constant since we might then alternate between
3541 choosing positive and negative constants. Having the positive
3542 constant previously-used is the more common case. Be sure
3543 the resulting constant is non-negative; if const_arg1 were
3544 the smallest negative number this would overflow: depending
3545 on the mode, this would either just be the same value (and
3546 hence not save anything) or be incorrect. */
3547 if (const_arg1
!= 0 && CONST_INT_P (const_arg1
)
3548 && INTVAL (const_arg1
) < 0
3549 /* This used to test
3551 -INTVAL (const_arg1) >= 0
3553 But The Sun V5.0 compilers mis-compiled that test. So
3554 instead we test for the problematic value in a more direct
3555 manner and hope the Sun compilers get it correct. */
3556 && INTVAL (const_arg1
) !=
3557 (HOST_WIDE_INT_1
<< (HOST_BITS_PER_WIDE_INT
- 1))
3558 && REG_P (folded_arg1
))
3560 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
3562 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
3565 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
3567 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
3568 canon_reg (p
->exp
, NULL
));
3573 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3574 If so, produce (PLUS Z C2-C). */
3575 if (const_arg1
!= 0 && poly_int_rtx_p (const_arg1
, &xval
))
3577 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
3578 if (y
&& poly_int_rtx_p (XEXP (y
, 1)))
3579 return fold_rtx (plus_constant (mode
, copy_rtx (y
), -xval
),
3586 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
3587 case IOR
: case AND
: case XOR
:
3589 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
3590 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3591 is known to be of similar form, we may be able to replace the
3592 operation with a combined operation. This may eliminate the
3593 intermediate operation if every use is simplified in this way.
3594 Note that the similar optimization done by combine.cc only works
3595 if the intermediate operation's result has only one reference. */
3597 if (REG_P (folded_arg0
)
3598 && const_arg1
&& CONST_INT_P (const_arg1
))
3601 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
3602 rtx y
, inner_const
, new_const
;
3603 rtx canon_const_arg1
= const_arg1
;
3604 enum rtx_code associate_code
;
3607 && (INTVAL (const_arg1
) >= GET_MODE_UNIT_PRECISION (mode
)
3608 || INTVAL (const_arg1
) < 0))
3610 if (SHIFT_COUNT_TRUNCATED
)
3611 canon_const_arg1
= gen_int_shift_amount
3612 (mode
, (INTVAL (const_arg1
)
3613 & (GET_MODE_UNIT_BITSIZE (mode
) - 1)));
3618 y
= lookup_as_function (folded_arg0
, code
);
3622 /* If we have compiled a statement like
3623 "if (x == (x & mask1))", and now are looking at
3624 "x & mask2", we will have a case where the first operand
3625 of Y is the same as our first operand. Unless we detect
3626 this case, an infinite loop will result. */
3627 if (XEXP (y
, 0) == folded_arg0
)
3630 inner_const
= equiv_constant (fold_rtx (XEXP (y
, 1), 0));
3631 if (!inner_const
|| !CONST_INT_P (inner_const
))
3634 /* Don't associate these operations if they are a PLUS with the
3635 same constant and it is a power of two. These might be doable
3636 with a pre- or post-increment. Similarly for two subtracts of
3637 identical powers of two with post decrement. */
3639 if (code
== PLUS
&& const_arg1
== inner_const
3640 && ((HAVE_PRE_INCREMENT
3641 && pow2p_hwi (INTVAL (const_arg1
)))
3642 || (HAVE_POST_INCREMENT
3643 && pow2p_hwi (INTVAL (const_arg1
)))
3644 || (HAVE_PRE_DECREMENT
3645 && pow2p_hwi (- INTVAL (const_arg1
)))
3646 || (HAVE_POST_DECREMENT
3647 && pow2p_hwi (- INTVAL (const_arg1
)))))
3650 /* ??? Vector mode shifts by scalar
3651 shift operand are not supported yet. */
3652 if (is_shift
&& VECTOR_MODE_P (mode
))
3656 && (INTVAL (inner_const
) >= GET_MODE_UNIT_PRECISION (mode
)
3657 || INTVAL (inner_const
) < 0))
3659 if (SHIFT_COUNT_TRUNCATED
)
3660 inner_const
= gen_int_shift_amount
3661 (mode
, (INTVAL (inner_const
)
3662 & (GET_MODE_UNIT_BITSIZE (mode
) - 1)));
3667 /* Compute the code used to compose the constants. For example,
3668 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
3670 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
3672 new_const
= simplify_binary_operation (associate_code
, mode
,
3679 /* If we are associating shift operations, don't let this
3680 produce a shift of the size of the object or larger.
3681 This could occur when we follow a sign-extend by a right
3682 shift on a machine that does a sign-extend as a pair
3686 && CONST_INT_P (new_const
)
3687 && INTVAL (new_const
) >= GET_MODE_UNIT_PRECISION (mode
))
3689 /* As an exception, we can turn an ASHIFTRT of this
3690 form into a shift of the number of bits - 1. */
3691 if (code
== ASHIFTRT
)
3692 new_const
= gen_int_shift_amount
3693 (mode
, GET_MODE_UNIT_BITSIZE (mode
) - 1);
3694 else if (!side_effects_p (XEXP (y
, 0)))
3695 return CONST0_RTX (mode
);
3700 y
= copy_rtx (XEXP (y
, 0));
3702 /* If Y contains our first operand (the most common way this
3703 can happen is if Y is a MEM), we would do into an infinite
3704 loop if we tried to fold it. So don't in that case. */
3706 if (! reg_mentioned_p (folded_arg0
, y
))
3707 y
= fold_rtx (y
, insn
);
3709 return simplify_gen_binary (code
, mode
, y
, new_const
);
3713 case DIV
: case UDIV
:
3714 /* ??? The associative optimization performed immediately above is
3715 also possible for DIV and UDIV using associate_code of MULT.
3716 However, we would need extra code to verify that the
3717 multiplication does not overflow, that is, there is no overflow
3718 in the calculation of new_const. */
3725 new_rtx
= simplify_binary_operation (code
, mode
,
3726 const_arg0
? const_arg0
: folded_arg0
,
3727 const_arg1
? const_arg1
: folded_arg1
);
3731 /* (lo_sum (high X) X) is simply X. */
3732 if (code
== LO_SUM
&& const_arg0
!= 0
3733 && GET_CODE (const_arg0
) == HIGH
3734 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
3739 case RTX_BITFIELD_OPS
:
3740 new_rtx
= simplify_ternary_operation (code
, mode
, mode_arg0
,
3741 const_arg0
? const_arg0
: folded_arg0
,
3742 const_arg1
? const_arg1
: folded_arg1
,
3743 const_arg2
? const_arg2
: XEXP (x
, 2));
3750 return new_rtx
? new_rtx
: x
;
3753 /* Return a constant value currently equivalent to X.
3754 Return 0 if we don't know one. */
3757 equiv_constant (rtx x
)
3760 && REGNO_QTY_VALID_P (REGNO (x
)))
3762 int x_q
= REG_QTY (REGNO (x
));
3763 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
3765 if (x_ent
->const_rtx
)
3766 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
3769 if (x
== 0 || CONSTANT_P (x
))
3772 if (GET_CODE (x
) == SUBREG
)
3774 machine_mode mode
= GET_MODE (x
);
3775 machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3778 /* See if we previously assigned a constant value to this SUBREG. */
3779 if ((new_rtx
= lookup_as_function (x
, CONST_INT
)) != 0
3780 || (new_rtx
= lookup_as_function (x
, CONST_WIDE_INT
)) != 0
3781 || (NUM_POLY_INT_COEFFS
> 1
3782 && (new_rtx
= lookup_as_function (x
, CONST_POLY_INT
)) != 0)
3783 || (new_rtx
= lookup_as_function (x
, CONST_DOUBLE
)) != 0
3784 || (new_rtx
= lookup_as_function (x
, CONST_FIXED
)) != 0)
3787 /* If we didn't and if doing so makes sense, see if we previously
3788 assigned a constant value to the enclosing word mode SUBREG. */
3789 if (known_lt (GET_MODE_SIZE (mode
), UNITS_PER_WORD
)
3790 && known_lt (UNITS_PER_WORD
, GET_MODE_SIZE (imode
)))
3792 poly_int64 byte
= (SUBREG_BYTE (x
)
3793 - subreg_lowpart_offset (mode
, word_mode
));
3794 if (known_ge (byte
, 0) && multiple_p (byte
, UNITS_PER_WORD
))
3796 rtx y
= gen_rtx_SUBREG (word_mode
, SUBREG_REG (x
), byte
);
3797 new_rtx
= lookup_as_function (y
, CONST_INT
);
3799 return gen_lowpart (mode
, new_rtx
);
3803 /* Otherwise see if we already have a constant for the inner REG,
3804 and if that is enough to calculate an equivalent constant for
3805 the subreg. Note that the upper bits of paradoxical subregs
3806 are undefined, so they cannot be said to equal anything. */
3807 if (REG_P (SUBREG_REG (x
))
3808 && !paradoxical_subreg_p (x
)
3809 && (new_rtx
= equiv_constant (SUBREG_REG (x
))) != 0)
3810 return simplify_subreg (mode
, new_rtx
, imode
, SUBREG_BYTE (x
));
3815 /* If X is a MEM, see if it is a constant-pool reference, or look it up in
3816 the hash table in case its value was seen before. */
3820 struct table_elt
*elt
;
3822 x
= avoid_constant_pool_reference (x
);
3826 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
3830 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3831 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
3838 /* Given INSN, a jump insn, TAKEN indicates if we are following the
3841 In certain cases, this can cause us to add an equivalence. For example,
3842 if we are following the taken case of
3844 we can add the fact that `i' and '2' are now equivalent.
3846 In any case, we can record that this comparison was passed. If the same
3847 comparison is seen later, we will know its value. */
3850 record_jump_equiv (rtx_insn
*insn
, bool taken
)
3852 int cond_known_true
;
3855 machine_mode mode
, mode0
, mode1
;
3856 int reversed_nonequality
= 0;
3859 /* Ensure this is the right kind of insn. */
3860 gcc_assert (any_condjump_p (insn
));
3862 set
= pc_set (insn
);
3864 /* See if this jump condition is known true or false. */
3866 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
3868 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
3870 /* Get the type of comparison being done and the operands being compared.
3871 If we had to reverse a non-equality condition, record that fact so we
3872 know that it isn't valid for floating-point. */
3873 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
3874 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
3875 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
3877 /* If fold_rtx returns NULL_RTX, there's nothing to record. */
3878 if (op0
== NULL_RTX
|| op1
== NULL_RTX
)
3881 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
3882 if (! cond_known_true
)
3884 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
3886 /* Don't remember if we can't find the inverse. */
3887 if (code
== UNKNOWN
)
3891 /* The mode is the mode of the non-constant. */
3893 if (mode1
!= VOIDmode
)
3896 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
3899 /* Yet another form of subreg creation. In this case, we want something in
3900 MODE, and we should assume OP has MODE iff it is naturally modeless. */
3903 record_jump_cond_subreg (machine_mode mode
, rtx op
)
3905 machine_mode op_mode
= GET_MODE (op
);
3906 if (op_mode
== mode
|| op_mode
== VOIDmode
)
3908 return lowpart_subreg (mode
, op
, op_mode
);
3911 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
3912 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
3913 Make any useful entries we can with that information. Called from
3914 above function and called recursively. */
3917 record_jump_cond (enum rtx_code code
, machine_mode mode
, rtx op0
,
3918 rtx op1
, int reversed_nonequality
)
3920 unsigned op0_hash
, op1_hash
;
3921 int op0_in_memory
, op1_in_memory
;
3922 struct table_elt
*op0_elt
, *op1_elt
;
3924 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
3925 we know that they are also equal in the smaller mode (this is also
3926 true for all smaller modes whether or not there is a SUBREG, but
3927 is not worth testing for with no SUBREG). */
3929 /* Note that GET_MODE (op0) may not equal MODE. */
3930 if (code
== EQ
&& paradoxical_subreg_p (op0
))
3932 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3933 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3935 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3936 reversed_nonequality
);
3939 if (code
== EQ
&& paradoxical_subreg_p (op1
))
3941 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3942 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3944 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3945 reversed_nonequality
);
3948 /* Similarly, if this is an NE comparison, and either is a SUBREG
3949 making a smaller mode, we know the whole thing is also NE. */
3951 /* Note that GET_MODE (op0) may not equal MODE;
3952 if we test MODE instead, we can get an infinite recursion
3953 alternating between two modes each wider than MODE. */
3956 && partial_subreg_p (op0
)
3957 && subreg_lowpart_p (op0
))
3959 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
3960 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
3962 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
3963 reversed_nonequality
);
3967 && partial_subreg_p (op1
)
3968 && subreg_lowpart_p (op1
))
3970 machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
3971 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
3973 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
3974 reversed_nonequality
);
3977 /* Hash both operands. */
3980 hash_arg_in_memory
= 0;
3981 op0_hash
= HASH (op0
, mode
);
3982 op0_in_memory
= hash_arg_in_memory
;
3988 hash_arg_in_memory
= 0;
3989 op1_hash
= HASH (op1
, mode
);
3990 op1_in_memory
= hash_arg_in_memory
;
3995 /* Look up both operands. */
3996 op0_elt
= lookup (op0
, op0_hash
, mode
);
3997 op1_elt
= lookup (op1
, op1_hash
, mode
);
3999 /* If both operands are already equivalent or if they are not in the
4000 table but are identical, do nothing. */
4001 if ((op0_elt
!= 0 && op1_elt
!= 0
4002 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4003 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4006 /* If we aren't setting two things equal all we can do is save this
4007 comparison. Similarly if this is floating-point. In the latter
4008 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4009 If we record the equality, we might inadvertently delete code
4010 whose intent was to change -0 to +0. */
4012 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4014 struct qty_table_elem
*ent
;
4017 /* If we reversed a floating-point comparison, if OP0 is not a
4018 register, or if OP1 is neither a register or constant, we can't
4022 op1
= equiv_constant (op1
);
4024 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4025 || !REG_P (op0
) || op1
== 0)
4028 /* Put OP0 in the hash table if it isn't already. This gives it a
4029 new quantity number. */
4032 if (insert_regs (op0
, NULL
, 0))
4034 rehash_using_reg (op0
);
4035 op0_hash
= HASH (op0
, mode
);
4037 /* If OP0 is contained in OP1, this changes its hash code
4038 as well. Faster to rehash than to check, except
4039 for the simple case of a constant. */
4040 if (! CONSTANT_P (op1
))
4041 op1_hash
= HASH (op1
,mode
);
4044 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4045 op0_elt
->in_memory
= op0_in_memory
;
4048 qty
= REG_QTY (REGNO (op0
));
4049 ent
= &qty_table
[qty
];
4051 ent
->comparison_code
= code
;
4054 /* Look it up again--in case op0 and op1 are the same. */
4055 op1_elt
= lookup (op1
, op1_hash
, mode
);
4057 /* Put OP1 in the hash table so it gets a new quantity number. */
4060 if (insert_regs (op1
, NULL
, 0))
4062 rehash_using_reg (op1
);
4063 op1_hash
= HASH (op1
, mode
);
4066 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4067 op1_elt
->in_memory
= op1_in_memory
;
4070 ent
->comparison_const
= NULL_RTX
;
4071 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4075 ent
->comparison_const
= op1
;
4076 ent
->comparison_qty
= -1;
4082 /* If either side is still missing an equivalence, make it now,
4083 then merge the equivalences. */
4087 if (insert_regs (op0
, NULL
, 0))
4089 rehash_using_reg (op0
);
4090 op0_hash
= HASH (op0
, mode
);
4093 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4094 op0_elt
->in_memory
= op0_in_memory
;
4099 if (insert_regs (op1
, NULL
, 0))
4101 rehash_using_reg (op1
);
4102 op1_hash
= HASH (op1
, mode
);
4105 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4106 op1_elt
->in_memory
= op1_in_memory
;
4109 merge_equiv_classes (op0_elt
, op1_elt
);
4112 /* CSE processing for one instruction.
4114 Most "true" common subexpressions are mostly optimized away in GIMPLE,
4115 but the few that "leak through" are cleaned up by cse_insn, and complex
4116 addressing modes are often formed here.
4118 The main function is cse_insn, and between here and that function
4119 a couple of helper functions is defined to keep the size of cse_insn
4120 within reasonable proportions.
4122 Data is shared between the main and helper functions via STRUCT SET,
4123 that contains all data related for every set in the instruction that
4126 Note that cse_main processes all sets in the instruction. Most
4127 passes in GCC only process simple SET insns or single_set insns, but
4128 CSE processes insns with multiple sets as well. */
4130 /* Data on one SET contained in the instruction. */
4134 /* The SET rtx itself. */
4136 /* The SET_SRC of the rtx (the original value, if it is changing). */
4138 /* The hash-table element for the SET_SRC of the SET. */
4139 struct table_elt
*src_elt
;
4140 /* Hash value for the SET_SRC. */
4142 /* Hash value for the SET_DEST. */
4144 /* The SET_DEST, with SUBREG, etc., stripped. */
4146 /* Nonzero if the SET_SRC is in memory. */
4148 /* Nonzero if the SET_SRC contains something
4149 whose value cannot be predicted and understood. */
4151 /* Original machine mode, in case it becomes a CONST_INT. */
4152 ENUM_BITFIELD(machine_mode
) mode
: MACHINE_MODE_BITSIZE
;
4153 /* Hash value of constant equivalent for SET_SRC. */
4154 unsigned src_const_hash
;
4155 /* A constant equivalent for SET_SRC, if any. */
4157 /* Table entry for constant equivalent for SET_SRC, if any. */
4158 struct table_elt
*src_const_elt
;
4159 /* Table entry for the destination address. */
4160 struct table_elt
*dest_addr_elt
;
4163 /* Special handling for (set REG0 REG1) where REG0 is the
4164 "cheapest", cheaper than REG1. After cse, REG1 will probably not
4165 be used in the sequel, so (if easily done) change this insn to
4166 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
4167 that computed their value. Then REG1 will become a dead store
4168 and won't cloud the situation for later optimizations.
4170 Do not make this change if REG1 is a hard register, because it will
4171 then be used in the sequel and we may be changing a two-operand insn
4172 into a three-operand insn.
4174 This is the last transformation that cse_insn will try to do. */
4177 try_back_substitute_reg (rtx set
, rtx_insn
*insn
)
4179 rtx dest
= SET_DEST (set
);
4180 rtx src
= SET_SRC (set
);
4183 && REG_P (src
) && ! HARD_REGISTER_P (src
)
4184 && REGNO_QTY_VALID_P (REGNO (src
)))
4186 int src_q
= REG_QTY (REGNO (src
));
4187 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
4189 if (src_ent
->first_reg
== REGNO (dest
))
4191 /* Scan for the previous nonnote insn, but stop at a basic
4193 rtx_insn
*prev
= insn
;
4194 rtx_insn
*bb_head
= BB_HEAD (BLOCK_FOR_INSN (insn
));
4197 prev
= PREV_INSN (prev
);
4199 while (prev
!= bb_head
&& (NOTE_P (prev
) || DEBUG_INSN_P (prev
)));
4201 /* Do not swap the registers around if the previous instruction
4202 attaches a REG_EQUIV note to REG1.
4204 ??? It's not entirely clear whether we can transfer a REG_EQUIV
4205 from the pseudo that originally shadowed an incoming argument
4206 to another register. Some uses of REG_EQUIV might rely on it
4207 being attached to REG1 rather than REG2.
4209 This section previously turned the REG_EQUIV into a REG_EQUAL
4210 note. We cannot do that because REG_EQUIV may provide an
4211 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
4212 if (NONJUMP_INSN_P (prev
)
4213 && GET_CODE (PATTERN (prev
)) == SET
4214 && SET_DEST (PATTERN (prev
)) == src
4215 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
4219 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
4220 validate_change (insn
, &SET_DEST (set
), src
, 1);
4221 validate_change (insn
, &SET_SRC (set
), dest
, 1);
4222 apply_change_group ();
4224 /* If INSN has a REG_EQUAL note, and this note mentions
4225 REG0, then we must delete it, because the value in
4226 REG0 has changed. If the note's value is REG1, we must
4227 also delete it because that is now this insn's dest. */
4228 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4230 && (reg_mentioned_p (dest
, XEXP (note
, 0))
4231 || rtx_equal_p (src
, XEXP (note
, 0))))
4232 remove_note (insn
, note
);
4234 /* If INSN has a REG_ARGS_SIZE note, move it to PREV. */
4235 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4238 remove_note (insn
, note
);
4239 gcc_assert (!find_reg_note (prev
, REG_ARGS_SIZE
, NULL_RTX
));
4240 set_unique_reg_note (prev
, REG_ARGS_SIZE
, XEXP (note
, 0));
4247 /* Add an entry containing RTL X into SETS. */
4249 add_to_set (vec
<struct set
> *sets
, rtx x
)
4251 struct set entry
= {};
4253 sets
->safe_push (entry
);
4256 /* Record all the SETs in this instruction into SETS_PTR,
4257 and return the number of recorded sets. */
4259 find_sets_in_insn (rtx_insn
*insn
, vec
<struct set
> *psets
)
4261 rtx x
= PATTERN (insn
);
4263 if (GET_CODE (x
) == SET
)
4265 /* Ignore SETs that are unconditional jumps.
4266 They never need cse processing, so this does not hurt.
4267 The reason is not efficiency but rather
4268 so that we can test at the end for instructions
4269 that have been simplified to unconditional jumps
4270 and not be misled by unchanged instructions
4271 that were unconditional jumps to begin with. */
4272 if (SET_DEST (x
) == pc_rtx
4273 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4275 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4276 The hard function value register is used only once, to copy to
4277 someplace else, so it isn't worth cse'ing. */
4278 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4280 else if (GET_CODE (SET_SRC (x
)) == CONST_VECTOR
4281 && GET_MODE_CLASS (GET_MODE (SET_SRC (x
))) != MODE_VECTOR_BOOL
4282 /* Prevent duplicates from being generated if the type is a V1
4283 type and a subreg. Folding this will result in the same
4284 element as folding x itself. */
4285 && !(SUBREG_P (SET_DEST (x
))
4286 && known_eq (GET_MODE_NUNITS (GET_MODE (SET_SRC (x
))), 1)))
4288 /* First register the vector itself. */
4289 add_to_set (psets
, x
);
4290 rtx src
= SET_SRC (x
);
4291 /* Go over the constants of the CONST_VECTOR in forward order, to
4292 put them in the same order in the SETS array. */
4293 for (unsigned i
= 0; i
< const_vector_encoded_nelts (src
) ; i
++)
4295 /* These are templates and don't actually get emitted but are
4296 used to tell CSE how to get to a particular constant. */
4297 rtx y
= simplify_gen_vec_select (SET_DEST (x
), i
);
4299 add_to_set (psets
, gen_rtx_SET (y
, CONST_VECTOR_ELT (src
, i
)));
4303 add_to_set (psets
, x
);
4305 else if (GET_CODE (x
) == PARALLEL
)
4307 int i
, lim
= XVECLEN (x
, 0);
4309 /* Go over the expressions of the PARALLEL in forward order, to
4310 put them in the same order in the SETS array. */
4311 for (i
= 0; i
< lim
; i
++)
4313 rtx y
= XVECEXP (x
, 0, i
);
4314 if (GET_CODE (y
) == SET
)
4316 /* As above, we ignore unconditional jumps and call-insns and
4317 ignore the result of apply_change_group. */
4318 if (SET_DEST (y
) == pc_rtx
4319 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4321 else if (GET_CODE (SET_SRC (y
)) == CALL
)
4324 add_to_set (psets
, y
);
4329 return psets
->length ();
4332 /* Subroutine of canonicalize_insn. X is an ASM_OPERANDS in INSN. */
4335 canon_asm_operands (rtx x
, rtx_insn
*insn
)
4337 for (int i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
4339 rtx input
= ASM_OPERANDS_INPUT (x
, i
);
4340 if (!(REG_P (input
) && HARD_REGISTER_P (input
)))
4342 input
= canon_reg (input
, insn
);
4343 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
), input
, 1);
4348 /* Where possible, substitute every register reference in the N_SETS
4349 number of SETS in INSN with the canonical register.
4351 Register canonicalization propagatest the earliest register (i.e.
4352 one that is set before INSN) with the same value. This is a very
4353 useful, simple form of CSE, to clean up warts from expanding GIMPLE
4354 to RTL. For instance, a CONST for an address is usually expanded
4355 multiple times to loads into different registers, thus creating many
4356 subexpressions of the form:
4358 (set (reg1) (some_const))
4359 (set (mem (... reg1 ...) (thing)))
4360 (set (reg2) (some_const))
4361 (set (mem (... reg2 ...) (thing)))
4363 After canonicalizing, the code takes the following form:
4365 (set (reg1) (some_const))
4366 (set (mem (... reg1 ...) (thing)))
4367 (set (reg2) (some_const))
4368 (set (mem (... reg1 ...) (thing)))
4370 The set to reg2 is now trivially dead, and the memory reference (or
4371 address, or whatever) may be a candidate for further CSEing.
4373 In this function, the result of apply_change_group can be ignored;
4377 canonicalize_insn (rtx_insn
*insn
, vec
<struct set
> *psets
)
4379 vec
<struct set
> sets
= *psets
;
4380 int n_sets
= sets
.length ();
4382 rtx x
= PATTERN (insn
);
4387 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4388 if (GET_CODE (XEXP (tem
, 0)) != SET
)
4389 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4392 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
4394 canon_reg (SET_SRC (x
), insn
);
4395 apply_change_group ();
4396 fold_rtx (SET_SRC (x
), insn
);
4398 else if (GET_CODE (x
) == CLOBBER
)
4400 /* If we clobber memory, canon the address.
4401 This does nothing when a register is clobbered
4402 because we have already invalidated the reg. */
4403 if (MEM_P (XEXP (x
, 0)))
4404 canon_reg (XEXP (x
, 0), insn
);
4406 else if (GET_CODE (x
) == USE
4407 && ! (REG_P (XEXP (x
, 0))
4408 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4409 /* Canonicalize a USE of a pseudo register or memory location. */
4410 canon_reg (x
, insn
);
4411 else if (GET_CODE (x
) == ASM_OPERANDS
)
4412 canon_asm_operands (x
, insn
);
4413 else if (GET_CODE (x
) == CALL
)
4415 canon_reg (x
, insn
);
4416 apply_change_group ();
4419 else if (DEBUG_INSN_P (insn
))
4420 canon_reg (PATTERN (insn
), insn
);
4421 else if (GET_CODE (x
) == PARALLEL
)
4423 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
4425 rtx y
= XVECEXP (x
, 0, i
);
4426 if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
4428 canon_reg (SET_SRC (y
), insn
);
4429 apply_change_group ();
4430 fold_rtx (SET_SRC (y
), insn
);
4432 else if (GET_CODE (y
) == CLOBBER
)
4434 if (MEM_P (XEXP (y
, 0)))
4435 canon_reg (XEXP (y
, 0), insn
);
4437 else if (GET_CODE (y
) == USE
4438 && ! (REG_P (XEXP (y
, 0))
4439 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4440 canon_reg (y
, insn
);
4441 else if (GET_CODE (y
) == ASM_OPERANDS
)
4442 canon_asm_operands (y
, insn
);
4443 else if (GET_CODE (y
) == CALL
)
4445 canon_reg (y
, insn
);
4446 apply_change_group ();
4452 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4453 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4455 /* We potentially will process this insn many times. Therefore,
4456 drop the REG_EQUAL note if it is equal to the SET_SRC of the
4459 Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
4460 because cse_insn handles those specially. */
4461 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != STRICT_LOW_PART
4462 && rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
)))
4463 remove_note (insn
, tem
);
4466 canon_reg (XEXP (tem
, 0), insn
);
4467 apply_change_group ();
4468 XEXP (tem
, 0) = fold_rtx (XEXP (tem
, 0), insn
);
4469 df_notes_rescan (insn
);
4473 /* Canonicalize sources and addresses of destinations.
4474 We do this in a separate pass to avoid problems when a MATCH_DUP is
4475 present in the insn pattern. In that case, we want to ensure that
4476 we don't break the duplicate nature of the pattern. So we will replace
4477 both operands at the same time. Otherwise, we would fail to find an
4478 equivalent substitution in the loop calling validate_change below.
4480 We used to suppress canonicalization of DEST if it appears in SRC,
4481 but we don't do this any more. */
4483 for (i
= 0; i
< n_sets
; i
++)
4485 rtx dest
= SET_DEST (sets
[i
].rtl
);
4486 rtx src
= SET_SRC (sets
[i
].rtl
);
4487 rtx new_rtx
= canon_reg (src
, insn
);
4489 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
4491 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4493 validate_change (insn
, &XEXP (dest
, 1),
4494 canon_reg (XEXP (dest
, 1), insn
), 1);
4495 validate_change (insn
, &XEXP (dest
, 2),
4496 canon_reg (XEXP (dest
, 2), insn
), 1);
4499 while (GET_CODE (dest
) == SUBREG
4500 || GET_CODE (dest
) == ZERO_EXTRACT
4501 || GET_CODE (dest
) == STRICT_LOW_PART
)
4502 dest
= XEXP (dest
, 0);
4505 canon_reg (dest
, insn
);
4508 /* Now that we have done all the replacements, we can apply the change
4509 group and see if they all work. Note that this will cause some
4510 canonicalizations that would have worked individually not to be applied
4511 because some other canonicalization didn't work, but this should not
4514 The result of apply_change_group can be ignored; see canon_reg. */
4516 apply_change_group ();
4519 /* Main function of CSE.
4520 First simplify sources and addresses of all assignments
4521 in the instruction, using previously-computed equivalents values.
4522 Then install the new sources and destinations in the table
4523 of available values. */
4526 cse_insn (rtx_insn
*insn
)
4528 rtx x
= PATTERN (insn
);
4534 struct table_elt
*src_eqv_elt
= 0;
4535 int src_eqv_volatile
= 0;
4536 int src_eqv_in_memory
= 0;
4537 unsigned src_eqv_hash
= 0;
4541 /* Find all regs explicitly clobbered in this insn,
4542 to ensure they are not replaced with any other regs
4543 elsewhere in this insn. */
4544 invalidate_from_sets_and_clobbers (insn
);
4546 /* Record all the SETs in this instruction. */
4547 auto_vec
<struct set
, 8> sets
;
4548 n_sets
= find_sets_in_insn (insn
, (vec
<struct set
>*)&sets
);
4550 /* Substitute the canonical register where possible. */
4551 canonicalize_insn (insn
, (vec
<struct set
>*)&sets
);
4553 /* If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
4554 if different, or if the DEST is a STRICT_LOW_PART/ZERO_EXTRACT. The
4555 latter condition is necessary because SRC_EQV is handled specially for
4556 this case, and if it isn't set, then there will be no equivalence
4557 for the destination. */
4558 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4559 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0)
4562 if (GET_CODE (SET_DEST (sets
[0].rtl
)) != ZERO_EXTRACT
4563 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4564 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4565 src_eqv
= copy_rtx (XEXP (tem
, 0));
4566 /* If DEST is of the form ZERO_EXTACT, as in:
4567 (set (zero_extract:SI (reg:SI 119)
4568 (const_int 16 [0x10])
4569 (const_int 16 [0x10]))
4570 (const_int 51154 [0xc7d2]))
4571 REG_EQUAL note will specify the value of register (reg:SI 119) at this
4572 point. Note that this is different from SRC_EQV. We can however
4573 calculate SRC_EQV with the position and width of ZERO_EXTRACT. */
4574 else if (GET_CODE (SET_DEST (sets
[0].rtl
)) == ZERO_EXTRACT
4575 && CONST_INT_P (XEXP (tem
, 0))
4576 && CONST_INT_P (XEXP (SET_DEST (sets
[0].rtl
), 1))
4577 && CONST_INT_P (XEXP (SET_DEST (sets
[0].rtl
), 2)))
4579 rtx dest_reg
= XEXP (SET_DEST (sets
[0].rtl
), 0);
4580 /* This is the mode of XEXP (tem, 0) as well. */
4581 scalar_int_mode dest_mode
4582 = as_a
<scalar_int_mode
> (GET_MODE (dest_reg
));
4583 rtx width
= XEXP (SET_DEST (sets
[0].rtl
), 1);
4584 rtx pos
= XEXP (SET_DEST (sets
[0].rtl
), 2);
4585 HOST_WIDE_INT val
= INTVAL (XEXP (tem
, 0));
4588 if (BITS_BIG_ENDIAN
)
4589 shift
= (GET_MODE_PRECISION (dest_mode
)
4590 - INTVAL (pos
) - INTVAL (width
));
4592 shift
= INTVAL (pos
);
4593 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
4594 mask
= HOST_WIDE_INT_M1
;
4596 mask
= (HOST_WIDE_INT_1
<< INTVAL (width
)) - 1;
4597 val
= (val
>> shift
) & mask
;
4598 src_eqv
= GEN_INT (val
);
4602 /* Set sets[i].src_elt to the class each source belongs to.
4603 Detect assignments from or to volatile things
4604 and set set[i] to zero so they will be ignored
4605 in the rest of this function.
4607 Nothing in this loop changes the hash table or the register chains. */
4609 for (i
= 0; i
< n_sets
; i
++)
4611 bool repeat
= false;
4612 bool noop_insn
= false;
4615 struct table_elt
*elt
= 0, *p
;
4619 rtx src_related
= 0;
4620 rtx dest_related
= 0;
4621 bool src_related_is_const_anchor
= false;
4622 struct table_elt
*src_const_elt
= 0;
4623 int src_cost
= MAX_COST
;
4624 int src_eqv_cost
= MAX_COST
;
4625 int src_folded_cost
= MAX_COST
;
4626 int src_related_cost
= MAX_COST
;
4627 int src_elt_cost
= MAX_COST
;
4628 int src_regcost
= MAX_COST
;
4629 int src_eqv_regcost
= MAX_COST
;
4630 int src_folded_regcost
= MAX_COST
;
4631 int src_related_regcost
= MAX_COST
;
4632 int src_elt_regcost
= MAX_COST
;
4633 scalar_int_mode int_mode
;
4635 dest
= SET_DEST (sets
[i
].rtl
);
4636 src
= SET_SRC (sets
[i
].rtl
);
4638 /* If SRC is a constant that has no machine mode,
4639 hash it with the destination's machine mode.
4640 This way we can keep different modes separate. */
4642 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4643 sets
[i
].mode
= mode
;
4647 machine_mode eqvmode
= mode
;
4648 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4649 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4651 hash_arg_in_memory
= 0;
4652 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4654 /* Find the equivalence class for the equivalent expression. */
4657 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4659 src_eqv_volatile
= do_not_record
;
4660 src_eqv_in_memory
= hash_arg_in_memory
;
4663 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4664 value of the INNER register, not the destination. So it is not
4665 a valid substitution for the source. But save it for later. */
4666 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4669 src_eqv_here
= src_eqv
;
4671 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4672 simplified result, which may not necessarily be valid. */
4673 src_folded
= fold_rtx (src
, NULL
);
4676 /* ??? This caused bad code to be generated for the m68k port with -O2.
4677 Suppose src is (CONST_INT -1), and that after truncation src_folded
4678 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4679 At the end we will add src and src_const to the same equivalence
4680 class. We now have 3 and -1 on the same equivalence class. This
4681 causes later instructions to be mis-optimized. */
4682 /* If storing a constant in a bitfield, pre-truncate the constant
4683 so we will be able to record it later. */
4684 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
4686 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
4688 if (CONST_INT_P (src
)
4689 && CONST_INT_P (width
)
4690 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
4691 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
4693 = GEN_INT (INTVAL (src
) & ((HOST_WIDE_INT_1
4694 << INTVAL (width
)) - 1));
4698 /* Compute SRC's hash code, and also notice if it
4699 should not be recorded at all. In that case,
4700 prevent any further processing of this assignment.
4702 We set DO_NOT_RECORD if the destination has a REG_UNUSED note.
4703 This avoids getting the source register into the tables, where it
4704 may be invalidated later (via REG_QTY), then trigger an ICE upon
4707 This is only a problem in multi-set insns. If it were a single
4708 set the dead copy would have been removed. If the RHS were anything
4709 but a simple REG, then we won't call insert_regs and thus there's
4710 no potential for triggering the ICE. */
4711 do_not_record
= (REG_P (dest
)
4713 && find_reg_note (insn
, REG_UNUSED
, dest
));
4714 hash_arg_in_memory
= 0;
4717 sets
[i
].src_hash
= HASH (src
, mode
);
4718 sets
[i
].src_volatile
= do_not_record
;
4719 sets
[i
].src_in_memory
= hash_arg_in_memory
;
4721 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4722 a pseudo, do not record SRC. Using SRC as a replacement for
4723 anything else will be incorrect in that situation. Note that
4724 this usually occurs only for stack slots, in which case all the
4725 RTL would be referring to SRC, so we don't lose any optimization
4726 opportunities by not having SRC in the hash table. */
4729 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
4731 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
4732 sets
[i
].src_volatile
= 1;
4734 else if (GET_CODE (src
) == ASM_OPERANDS
4735 && GET_CODE (x
) == PARALLEL
)
4737 /* Do not record result of a non-volatile inline asm with
4738 more than one result. */
4740 sets
[i
].src_volatile
= 1;
4742 int j
, lim
= XVECLEN (x
, 0);
4743 for (j
= 0; j
< lim
; j
++)
4745 rtx y
= XVECEXP (x
, 0, j
);
4746 /* And do not record result of a non-volatile inline asm
4747 with "memory" clobber. */
4748 if (GET_CODE (y
) == CLOBBER
&& MEM_P (XEXP (y
, 0)))
4750 sets
[i
].src_volatile
= 1;
4757 /* It is no longer clear why we used to do this, but it doesn't
4758 appear to still be needed. So let's try without it since this
4759 code hurts cse'ing widened ops. */
4760 /* If source is a paradoxical subreg (such as QI treated as an SI),
4761 treat it as volatile. It may do the work of an SI in one context
4762 where the extra bits are not being used, but cannot replace an SI
4764 if (paradoxical_subreg_p (src
))
4765 sets
[i
].src_volatile
= 1;
4768 /* Locate all possible equivalent forms for SRC. Try to replace
4769 SRC in the insn with each cheaper equivalent.
4771 We have the following types of equivalents: SRC itself, a folded
4772 version, a value given in a REG_EQUAL note, or a value related
4775 Each of these equivalents may be part of an additional class
4776 of equivalents (if more than one is in the table, they must be in
4777 the same class; we check for this).
4779 If the source is volatile, we don't do any table lookups.
4781 We note any constant equivalent for possible later use in a
4784 if (!sets
[i
].src_volatile
)
4785 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
4787 sets
[i
].src_elt
= elt
;
4789 if (elt
&& src_eqv_here
&& src_eqv_elt
)
4791 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
4793 /* The REG_EQUAL is indicating that two formerly distinct
4794 classes are now equivalent. So merge them. */
4795 merge_equiv_classes (elt
, src_eqv_elt
);
4796 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
4797 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
4803 else if (src_eqv_elt
)
4806 /* Try to find a constant somewhere and record it in `src_const'.
4807 Record its table element, if any, in `src_const_elt'. Look in
4808 any known equivalences first. (If the constant is not in the
4809 table, also set `sets[i].src_const_hash'). */
4811 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
4815 src_const_elt
= elt
;
4820 && (CONSTANT_P (src_folded
)
4821 /* Consider (minus (label_ref L1) (label_ref L2)) as
4822 "constant" here so we will record it. This allows us
4823 to fold switch statements when an ADDR_DIFF_VEC is used. */
4824 || (GET_CODE (src_folded
) == MINUS
4825 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
4826 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
4827 src_const
= src_folded
, src_const_elt
= elt
;
4828 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
4829 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
4831 /* If we don't know if the constant is in the table, get its
4832 hash code and look it up. */
4833 if (src_const
&& src_const_elt
== 0)
4835 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
4836 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
4839 sets
[i
].src_const
= src_const
;
4840 sets
[i
].src_const_elt
= src_const_elt
;
4842 /* If the constant and our source are both in the table, mark them as
4843 equivalent. Otherwise, if a constant is in the table but the source
4844 isn't, set ELT to it. */
4845 if (src_const_elt
&& elt
4846 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
4847 merge_equiv_classes (elt
, src_const_elt
);
4848 else if (src_const_elt
&& elt
== 0)
4849 elt
= src_const_elt
;
4851 /* See if there is a register linearly related to a constant
4852 equivalent of SRC. */
4854 && (GET_CODE (src_const
) == CONST
4855 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
4857 src_related
= use_related_value (src_const
, src_const_elt
);
4860 struct table_elt
*src_related_elt
4861 = lookup (src_related
, HASH (src_related
, mode
), mode
);
4862 if (src_related_elt
&& elt
)
4864 if (elt
->first_same_value
4865 != src_related_elt
->first_same_value
)
4866 /* This can occur when we previously saw a CONST
4867 involving a SYMBOL_REF and then see the SYMBOL_REF
4868 twice. Merge the involved classes. */
4869 merge_equiv_classes (elt
, src_related_elt
);
4872 src_related_elt
= 0;
4874 else if (src_related_elt
&& elt
== 0)
4875 elt
= src_related_elt
;
4879 /* See if we have a CONST_INT that is already in a register in a
4882 if (src_const
&& src_related
== 0 && CONST_INT_P (src_const
)
4883 && is_int_mode (mode
, &int_mode
)
4884 && GET_MODE_PRECISION (int_mode
) < BITS_PER_WORD
)
4886 opt_scalar_int_mode wider_mode_iter
;
4887 FOR_EACH_WIDER_MODE (wider_mode_iter
, int_mode
)
4889 scalar_int_mode wider_mode
= wider_mode_iter
.require ();
4890 if (GET_MODE_PRECISION (wider_mode
) > BITS_PER_WORD
)
4893 struct table_elt
*const_elt
4894 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
4899 for (const_elt
= const_elt
->first_same_value
;
4900 const_elt
; const_elt
= const_elt
->next_same_value
)
4901 if (REG_P (const_elt
->exp
))
4903 src_related
= gen_lowpart (int_mode
, const_elt
->exp
);
4907 if (src_related
!= 0)
4912 /* Another possibility is that we have an AND with a constant in
4913 a mode narrower than a word. If so, it might have been generated
4914 as part of an "if" which would narrow the AND. If we already
4915 have done the AND in a wider mode, we can use a SUBREG of that
4918 if (flag_expensive_optimizations
&& ! src_related
4919 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
4920 && GET_CODE (src
) == AND
&& CONST_INT_P (XEXP (src
, 1))
4921 && GET_MODE_SIZE (int_mode
) < UNITS_PER_WORD
)
4923 opt_scalar_int_mode tmode_iter
;
4924 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
4926 FOR_EACH_WIDER_MODE (tmode_iter
, int_mode
)
4928 scalar_int_mode tmode
= tmode_iter
.require ();
4929 if (GET_MODE_SIZE (tmode
) > UNITS_PER_WORD
)
4932 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
4933 struct table_elt
*larger_elt
;
4937 PUT_MODE (new_and
, tmode
);
4938 XEXP (new_and
, 0) = inner
;
4939 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
4940 if (larger_elt
== 0)
4943 for (larger_elt
= larger_elt
->first_same_value
;
4944 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4945 if (REG_P (larger_elt
->exp
))
4948 = gen_lowpart (int_mode
, larger_elt
->exp
);
4958 /* See if a MEM has already been loaded with a widening operation;
4959 if it has, we can use a subreg of that. Many CISC machines
4960 also have such operations, but this is only likely to be
4961 beneficial on these machines. */
4964 if (flag_expensive_optimizations
&& src_related
== 0
4965 && MEM_P (src
) && ! do_not_record
4966 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
4967 && (extend_op
= load_extend_op (int_mode
)) != UNKNOWN
)
4969 struct rtx_def memory_extend_buf
;
4970 rtx memory_extend_rtx
= &memory_extend_buf
;
4972 /* Set what we are trying to extend and the operation it might
4973 have been extended with. */
4974 memset (memory_extend_rtx
, 0, sizeof (*memory_extend_rtx
));
4975 PUT_CODE (memory_extend_rtx
, extend_op
);
4976 XEXP (memory_extend_rtx
, 0) = src
;
4978 opt_scalar_int_mode tmode_iter
;
4979 FOR_EACH_WIDER_MODE (tmode_iter
, int_mode
)
4981 struct table_elt
*larger_elt
;
4983 scalar_int_mode tmode
= tmode_iter
.require ();
4984 if (GET_MODE_SIZE (tmode
) > UNITS_PER_WORD
)
4987 PUT_MODE (memory_extend_rtx
, tmode
);
4988 larger_elt
= lookup (memory_extend_rtx
,
4989 HASH (memory_extend_rtx
, tmode
), tmode
);
4990 if (larger_elt
== 0)
4993 for (larger_elt
= larger_elt
->first_same_value
;
4994 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
4995 if (REG_P (larger_elt
->exp
))
4997 src_related
= gen_lowpart (int_mode
, larger_elt
->exp
);
5006 /* Try to express the constant using a register+offset expression
5007 derived from a constant anchor. */
5009 if (targetm
.const_anchor
5012 && GET_CODE (src_const
) == CONST_INT
)
5014 src_related
= try_const_anchors (src_const
, mode
);
5015 src_related_is_const_anchor
= src_related
!= NULL_RTX
;
5018 /* Try to re-materialize a vec_dup with an existing constant. */
5020 if ((!src_eqv_here
|| CONSTANT_P (src_eqv_here
))
5021 && const_vec_duplicate_p (src
, &src_elt
))
5023 machine_mode const_mode
= GET_MODE_INNER (GET_MODE (src
));
5024 struct table_elt
*related_elt
5025 = lookup (src_elt
, HASH (src_elt
, const_mode
), const_mode
);
5028 for (related_elt
= related_elt
->first_same_value
;
5029 related_elt
; related_elt
= related_elt
->next_same_value
)
5030 if (REG_P (related_elt
->exp
))
5032 /* We don't need to compare costs with an existing (constant)
5033 src_eqv_here, since any such src_eqv_here should already be
5034 available in src_const. */
5036 = gen_rtx_VEC_DUPLICATE (GET_MODE (src
),
5043 if (src
== src_folded
)
5046 /* At this point, ELT, if nonzero, points to a class of expressions
5047 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5048 and SRC_RELATED, if nonzero, each contain additional equivalent
5049 expressions. Prune these latter expressions by deleting expressions
5050 already in the equivalence class.
5052 Check for an equivalent identical to the destination. If found,
5053 this is the preferred equivalent since it will likely lead to
5054 elimination of the insn. Indicate this by placing it in
5058 elt
= elt
->first_same_value
;
5059 for (p
= elt
; p
; p
= p
->next_same_value
)
5061 enum rtx_code code
= GET_CODE (p
->exp
);
5063 /* If the expression is not valid, ignore it. Then we do not
5064 have to check for validity below. In most cases, we can use
5065 `rtx_equal_p', since canonicalization has already been done. */
5066 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
5069 /* Also skip paradoxical subregs, unless that's what we're
5071 if (paradoxical_subreg_p (p
->exp
)
5073 && GET_CODE (src
) == SUBREG
5074 && GET_MODE (src
) == GET_MODE (p
->exp
)
5075 && partial_subreg_p (GET_MODE (SUBREG_REG (src
)),
5076 GET_MODE (SUBREG_REG (p
->exp
)))))
5079 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5081 else if (src_folded
&& GET_CODE (src_folded
) == code
5082 && rtx_equal_p (src_folded
, p
->exp
))
5084 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5085 && rtx_equal_p (src_eqv_here
, p
->exp
))
5087 else if (src_related
&& GET_CODE (src_related
) == code
5088 && rtx_equal_p (src_related
, p
->exp
))
5091 /* This is the same as the destination of the insns, we want
5092 to prefer it. The code below will then give it a negative
5095 && GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5096 dest_related
= p
->exp
;
5099 /* Find the cheapest valid equivalent, trying all the available
5100 possibilities. Prefer items not in the hash table to ones
5101 that are when they are equal cost. Note that we can never
5102 worsen an insn as the current contents will also succeed.
5103 If we find an equivalent identical to the destination, use it as best,
5104 since this insn will probably be eliminated in that case. */
5107 if (rtx_equal_p (src
, dest
))
5108 src_cost
= src_regcost
= -1;
5111 src_cost
= COST (src
, mode
);
5112 src_regcost
= approx_reg_cost (src
);
5118 if (rtx_equal_p (src_eqv_here
, dest
))
5119 src_eqv_cost
= src_eqv_regcost
= -1;
5122 src_eqv_cost
= COST (src_eqv_here
, mode
);
5123 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5129 if (rtx_equal_p (src_folded
, dest
))
5130 src_folded_cost
= src_folded_regcost
= -1;
5133 src_folded_cost
= COST (src_folded
, mode
);
5134 src_folded_regcost
= approx_reg_cost (src_folded
);
5140 src_related_cost
= src_related_regcost
= -1;
5141 /* Handle it as src_related. */
5142 src_related
= dest_related
;
5144 else if (src_related
)
5146 src_related_cost
= COST (src_related
, mode
);
5147 src_related_regcost
= approx_reg_cost (src_related
);
5149 /* If a const-anchor is used to synthesize a constant that
5150 normally requires multiple instructions then slightly prefer
5151 it over the original sequence. These instructions are likely
5152 to become redundant now. We can't compare against the cost
5153 of src_eqv_here because, on MIPS for example, multi-insn
5154 constants have zero cost; they are assumed to be hoisted from
5156 if (src_related_is_const_anchor
5157 && src_related_cost
== src_cost
5162 /* If this was an indirect jump insn, a known label will really be
5163 cheaper even though it looks more expensive. */
5164 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5165 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5167 /* Terminate loop when replacement made. This must terminate since
5168 the current contents will be tested and will always be valid. */
5173 /* Skip invalid entries. */
5174 while (elt
&& !REG_P (elt
->exp
)
5175 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5176 elt
= elt
->next_same_value
;
5178 /* A paradoxical subreg would be bad here: it'll be the right
5179 size, but later may be adjusted so that the upper bits aren't
5180 what we want. So reject it. */
5182 && paradoxical_subreg_p (elt
->exp
)
5183 /* It is okay, though, if the rtx we're trying to match
5184 will ignore any of the bits we can't predict. */
5186 && GET_CODE (src
) == SUBREG
5187 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5188 && partial_subreg_p (GET_MODE (SUBREG_REG (src
)),
5189 GET_MODE (SUBREG_REG (elt
->exp
)))))
5191 elt
= elt
->next_same_value
;
5197 src_elt_cost
= elt
->cost
;
5198 src_elt_regcost
= elt
->regcost
;
5201 /* Find cheapest and skip it for the next time. For items
5202 of equal cost, use this order:
5203 src_folded, src, src_eqv, src_related and hash table entry. */
5205 && preferable (src_folded_cost
, src_folded_regcost
,
5206 src_cost
, src_regcost
) <= 0
5207 && preferable (src_folded_cost
, src_folded_regcost
,
5208 src_eqv_cost
, src_eqv_regcost
) <= 0
5209 && preferable (src_folded_cost
, src_folded_regcost
,
5210 src_related_cost
, src_related_regcost
) <= 0
5211 && preferable (src_folded_cost
, src_folded_regcost
,
5212 src_elt_cost
, src_elt_regcost
) <= 0)
5213 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5215 && preferable (src_cost
, src_regcost
,
5216 src_eqv_cost
, src_eqv_regcost
) <= 0
5217 && preferable (src_cost
, src_regcost
,
5218 src_related_cost
, src_related_regcost
) <= 0
5219 && preferable (src_cost
, src_regcost
,
5220 src_elt_cost
, src_elt_regcost
) <= 0)
5221 trial
= src
, src_cost
= MAX_COST
;
5222 else if (src_eqv_here
5223 && preferable (src_eqv_cost
, src_eqv_regcost
,
5224 src_related_cost
, src_related_regcost
) <= 0
5225 && preferable (src_eqv_cost
, src_eqv_regcost
,
5226 src_elt_cost
, src_elt_regcost
) <= 0)
5227 trial
= src_eqv_here
, src_eqv_cost
= MAX_COST
;
5228 else if (src_related
5229 && preferable (src_related_cost
, src_related_regcost
,
5230 src_elt_cost
, src_elt_regcost
) <= 0)
5231 trial
= src_related
, src_related_cost
= MAX_COST
;
5235 elt
= elt
->next_same_value
;
5236 src_elt_cost
= MAX_COST
;
5240 (set (reg:M N) (const_int A))
5241 (set (reg:M2 O) (const_int B))
5242 (set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
5244 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
5245 && CONST_INT_P (trial
)
5246 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5247 && CONST_INT_P (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5248 && REG_P (XEXP (SET_DEST (sets
[i
].rtl
), 0))
5250 (GET_MODE_PRECISION (GET_MODE (SET_DEST (sets
[i
].rtl
))),
5251 INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))))
5252 && ((unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 1))
5253 + (unsigned) INTVAL (XEXP (SET_DEST (sets
[i
].rtl
), 2))
5254 <= HOST_BITS_PER_WIDE_INT
))
5256 rtx dest_reg
= XEXP (SET_DEST (sets
[i
].rtl
), 0);
5257 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5258 rtx pos
= XEXP (SET_DEST (sets
[i
].rtl
), 2);
5259 unsigned int dest_hash
= HASH (dest_reg
, GET_MODE (dest_reg
));
5260 struct table_elt
*dest_elt
5261 = lookup (dest_reg
, dest_hash
, GET_MODE (dest_reg
));
5262 rtx dest_cst
= NULL
;
5265 for (p
= dest_elt
->first_same_value
; p
; p
= p
->next_same_value
)
5266 if (p
->is_const
&& CONST_INT_P (p
->exp
))
5273 HOST_WIDE_INT val
= INTVAL (dest_cst
);
5276 /* This is the mode of DEST_CST as well. */
5277 scalar_int_mode dest_mode
5278 = as_a
<scalar_int_mode
> (GET_MODE (dest_reg
));
5279 if (BITS_BIG_ENDIAN
)
5280 shift
= GET_MODE_PRECISION (dest_mode
)
5281 - INTVAL (pos
) - INTVAL (width
);
5283 shift
= INTVAL (pos
);
5284 if (INTVAL (width
) == HOST_BITS_PER_WIDE_INT
)
5285 mask
= HOST_WIDE_INT_M1
;
5287 mask
= (HOST_WIDE_INT_1
<< INTVAL (width
)) - 1;
5288 val
&= ~(mask
<< shift
);
5289 val
|= (INTVAL (trial
) & mask
) << shift
;
5290 val
= trunc_int_for_mode (val
, dest_mode
);
5291 validate_unshare_change (insn
, &SET_DEST (sets
[i
].rtl
),
5293 validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5295 if (apply_change_group ())
5297 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
5300 remove_note (insn
, note
);
5301 df_notes_rescan (insn
);
5305 src_eqv_volatile
= 0;
5306 src_eqv_in_memory
= 0;
5314 /* We don't normally have an insn matching (set (pc) (pc)), so
5315 check for this separately here. We will delete such an
5318 For other cases such as a table jump or conditional jump
5319 where we know the ultimate target, go ahead and replace the
5320 operand. While that may not make a valid insn, we will
5321 reemit the jump below (and also insert any necessary
5323 if (n_sets
== 1 && dest
== pc_rtx
5325 || (GET_CODE (trial
) == LABEL_REF
5326 && ! condjump_p (insn
))))
5328 /* Don't substitute non-local labels, this confuses CFG. */
5329 if (GET_CODE (trial
) == LABEL_REF
5330 && LABEL_REF_NONLOCAL_P (trial
))
5333 SET_SRC (sets
[i
].rtl
) = trial
;
5334 cse_jumps_altered
= true;
5338 /* Similarly, lots of targets don't allow no-op
5339 (set (mem x) (mem x)) moves. Even (set (reg x) (reg x))
5340 might be impossible for certain registers (like CC registers). */
5341 else if (n_sets
== 1
5343 && (MEM_P (trial
) || REG_P (trial
))
5344 && rtx_equal_p (trial
, dest
)
5345 && !side_effects_p (dest
)
5346 && (cfun
->can_delete_dead_exceptions
5347 || insn_nothrow_p (insn
))
5348 /* We can only remove the later store if the earlier aliases
5349 at least all accesses the later one. */
5351 || ((MEM_ALIAS_SET (dest
) == MEM_ALIAS_SET (trial
)
5352 || alias_set_subset_of (MEM_ALIAS_SET (dest
),
5353 MEM_ALIAS_SET (trial
)))
5354 && (!MEM_EXPR (trial
)
5355 || refs_same_for_tbaa_p (MEM_EXPR (trial
),
5356 MEM_EXPR (dest
))))))
5358 SET_SRC (sets
[i
].rtl
) = trial
;
5363 /* Reject certain invalid forms of CONST that we create. */
5364 else if (CONSTANT_P (trial
)
5365 && GET_CODE (trial
) == CONST
5366 /* Reject cases that will cause decode_rtx_const to
5367 die. On the alpha when simplifying a switch, we
5368 get (const (truncate (minus (label_ref)
5370 && (GET_CODE (XEXP (trial
, 0)) == TRUNCATE
5371 /* Likewise on IA-64, except without the
5373 || (GET_CODE (XEXP (trial
, 0)) == MINUS
5374 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5375 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)))
5376 /* Do nothing for this case. */
5379 /* Do not replace anything with a MEM, except the replacement
5380 is a no-op. This allows this loop to terminate. */
5381 else if (MEM_P (trial
) && !rtx_equal_p (trial
, SET_SRC(sets
[i
].rtl
)))
5382 /* Do nothing for this case. */
5385 /* Look for a substitution that makes a valid insn. */
5386 else if (validate_unshare_change (insn
, &SET_SRC (sets
[i
].rtl
),
5389 rtx new_rtx
= canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5391 /* The result of apply_change_group can be ignored; see
5394 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_rtx
, 1);
5395 apply_change_group ();
5400 /* If the current function uses a constant pool and this is a
5401 constant, try making a pool entry. Put it in src_folded
5402 unless we already have done this since that is where it
5403 likely came from. */
5405 else if (crtl
->uses_const_pool
5406 && CONSTANT_P (trial
)
5407 && !CONST_INT_P (trial
)
5408 && (src_folded
== 0 || !MEM_P (src_folded
))
5409 && GET_MODE_CLASS (mode
) != MODE_CC
5410 && mode
!= VOIDmode
)
5412 src_folded
= force_const_mem (mode
, trial
);
5415 src_folded_cost
= COST (src_folded
, mode
);
5416 src_folded_regcost
= approx_reg_cost (src_folded
);
5421 /* If we changed the insn too much, handle this set from scratch. */
5428 src
= SET_SRC (sets
[i
].rtl
);
5430 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5431 However, there is an important exception: If both are registers
5432 that are not the head of their equivalence class, replace SET_SRC
5433 with the head of the class. If we do not do this, we will have
5434 both registers live over a portion of the basic block. This way,
5435 their lifetimes will likely abut instead of overlapping. */
5437 && REGNO_QTY_VALID_P (REGNO (dest
)))
5439 int dest_q
= REG_QTY (REGNO (dest
));
5440 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5442 if (dest_ent
->mode
== GET_MODE (dest
)
5443 && dest_ent
->first_reg
!= REGNO (dest
)
5444 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5445 /* Don't do this if the original insn had a hard reg as
5446 SET_SRC or SET_DEST. */
5447 && (!REG_P (sets
[i
].src
)
5448 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5449 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5450 /* We can't call canon_reg here because it won't do anything if
5451 SRC is a hard register. */
5453 int src_q
= REG_QTY (REGNO (src
));
5454 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5455 int first
= src_ent
->first_reg
;
5457 = (first
>= FIRST_PSEUDO_REGISTER
5458 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5460 /* We must use validate-change even for this, because this
5461 might be a special no-op instruction, suitable only to
5463 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5466 /* If we had a constant that is cheaper than what we are now
5467 setting SRC to, use that constant. We ignored it when we
5468 thought we could make this into a no-op. */
5469 if (src_const
&& COST (src_const
, mode
) < COST (src
, mode
)
5470 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5477 /* If we made a change, recompute SRC values. */
5478 if (src
!= sets
[i
].src
)
5481 hash_arg_in_memory
= 0;
5483 sets
[i
].src_hash
= HASH (src
, mode
);
5484 sets
[i
].src_volatile
= do_not_record
;
5485 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5486 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5489 /* If this is a single SET, we are setting a register, and we have an
5490 equivalent constant, we want to add a REG_EQUAL note if the constant
5491 is different from the source. We don't want to do it for a constant
5492 pseudo since verifying that this pseudo hasn't been eliminated is a
5493 pain; moreover such a note won't help anything.
5495 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5496 which can be created for a reference to a compile time computable
5497 entry in a jump table. */
5501 && !REG_P (src_const
)
5502 && !(GET_CODE (src_const
) == SUBREG
5503 && REG_P (SUBREG_REG (src_const
)))
5504 && !(GET_CODE (src_const
) == CONST
5505 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5506 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5507 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
)
5508 && !rtx_equal_p (src
, src_const
))
5510 /* Make sure that the rtx is not shared. */
5511 src_const
= copy_rtx (src_const
);
5513 /* Record the actual constant value in a REG_EQUAL note,
5514 making a new one if one does not already exist. */
5515 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5516 df_notes_rescan (insn
);
5519 /* Now deal with the destination. */
5522 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5523 while (GET_CODE (dest
) == SUBREG
5524 || GET_CODE (dest
) == ZERO_EXTRACT
5525 || GET_CODE (dest
) == STRICT_LOW_PART
)
5526 dest
= XEXP (dest
, 0);
5528 sets
[i
].inner_dest
= dest
;
5532 #ifdef PUSH_ROUNDING
5533 /* Stack pushes invalidate the stack pointer. */
5534 rtx addr
= XEXP (dest
, 0);
5535 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5536 && XEXP (addr
, 0) == stack_pointer_rtx
)
5537 invalidate (stack_pointer_rtx
, VOIDmode
);
5539 dest
= fold_rtx (dest
, insn
);
5542 /* Compute the hash code of the destination now,
5543 before the effects of this instruction are recorded,
5544 since the register values used in the address computation
5545 are those before this instruction. */
5546 sets
[i
].dest_hash
= HASH (dest
, mode
);
5548 /* Don't enter a bit-field in the hash table
5549 because the value in it after the store
5550 may not equal what was stored, due to truncation. */
5552 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5554 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5556 if (src_const
!= 0 && CONST_INT_P (src_const
)
5557 && CONST_INT_P (width
)
5558 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5559 && ! (INTVAL (src_const
)
5560 & (HOST_WIDE_INT_M1U
<< INTVAL (width
))))
5561 /* Exception: if the value is constant,
5562 and it won't be truncated, record it. */
5566 /* This is chosen so that the destination will be invalidated
5567 but no new value will be recorded.
5568 We must invalidate because sometimes constant
5569 values can be recorded for bitfields. */
5570 sets
[i
].src_elt
= 0;
5571 sets
[i
].src_volatile
= 1;
5577 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5579 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5581 /* One less use of the label this insn used to jump to. */
5582 cse_cfg_altered
|= delete_insn_and_edges (insn
);
5583 cse_jumps_altered
= true;
5584 /* No more processing for this set. */
5588 /* Similarly for no-op moves. */
5591 if (cfun
->can_throw_non_call_exceptions
&& can_throw_internal (insn
))
5592 cse_cfg_altered
= true;
5593 cse_cfg_altered
|= delete_insn_and_edges (insn
);
5594 /* No more processing for this set. */
5598 /* If this SET is now setting PC to a label, we know it used to
5599 be a conditional or computed branch. */
5600 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5601 && !LABEL_REF_NONLOCAL_P (src
))
5603 /* We reemit the jump in as many cases as possible just in
5604 case the form of an unconditional jump is significantly
5605 different than a computed jump or conditional jump.
5607 If this insn has multiple sets, then reemitting the
5608 jump is nontrivial. So instead we just force rerecognition
5609 and hope for the best. */
5612 rtx_jump_insn
*new_rtx
;
5615 rtx_insn
*seq
= targetm
.gen_jump (XEXP (src
, 0));
5616 new_rtx
= emit_jump_insn_before (seq
, insn
);
5617 JUMP_LABEL (new_rtx
) = XEXP (src
, 0);
5618 LABEL_NUSES (XEXP (src
, 0))++;
5620 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5621 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5624 XEXP (note
, 1) = NULL_RTX
;
5625 REG_NOTES (new_rtx
) = note
;
5628 cse_cfg_altered
|= delete_insn_and_edges (insn
);
5632 INSN_CODE (insn
) = -1;
5634 /* Do not bother deleting any unreachable code, let jump do it. */
5635 cse_jumps_altered
= true;
5639 /* If destination is volatile, invalidate it and then do no further
5640 processing for this assignment. */
5642 else if (do_not_record
)
5644 invalidate_dest (dest
);
5648 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5651 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5654 invalidate_dest (SET_DEST (sets
[i
].rtl
));
5660 /* Now enter all non-volatile source expressions in the hash table
5661 if they are not already present.
5662 Record their equivalence classes in src_elt.
5663 This way we can insert the corresponding destinations into
5664 the same classes even if the actual sources are no longer in them
5665 (having been invalidated). */
5667 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5668 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5670 struct table_elt
*elt
;
5671 struct table_elt
*classp
= sets
[0].src_elt
;
5672 rtx dest
= SET_DEST (sets
[0].rtl
);
5673 machine_mode eqvmode
= GET_MODE (dest
);
5675 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5677 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5680 if (insert_regs (src_eqv
, classp
, 0))
5682 rehash_using_reg (src_eqv
);
5683 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5685 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5686 elt
->in_memory
= src_eqv_in_memory
;
5689 /* Check to see if src_eqv_elt is the same as a set source which
5690 does not yet have an elt, and if so set the elt of the set source
5692 for (i
= 0; i
< n_sets
; i
++)
5693 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5694 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5695 sets
[i
].src_elt
= src_eqv_elt
;
5698 for (i
= 0; i
< n_sets
; i
++)
5699 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5700 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5702 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5704 /* REG_EQUAL in setting a STRICT_LOW_PART
5705 gives an equivalent for the entire destination register,
5706 not just for the subreg being stored in now.
5707 This is a more interesting equivalence, so we arrange later
5708 to treat the entire reg as the destination. */
5709 sets
[i
].src_elt
= src_eqv_elt
;
5710 sets
[i
].src_hash
= src_eqv_hash
;
5714 /* Insert source and constant equivalent into hash table, if not
5716 struct table_elt
*classp
= src_eqv_elt
;
5717 rtx src
= sets
[i
].src
;
5718 rtx dest
= SET_DEST (sets
[i
].rtl
);
5720 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5722 /* It's possible that we have a source value known to be
5723 constant but don't have a REG_EQUAL note on the insn.
5724 Lack of a note will mean src_eqv_elt will be NULL. This
5725 can happen where we've generated a SUBREG to access a
5726 CONST_INT that is already in a register in a wider mode.
5727 Ensure that the source expression is put in the proper
5730 classp
= sets
[i
].src_const_elt
;
5732 if (sets
[i
].src_elt
== 0)
5734 struct table_elt
*elt
;
5736 /* Note that these insert_regs calls cannot remove
5737 any of the src_elt's, because they would have failed to
5738 match if not still valid. */
5739 if (insert_regs (src
, classp
, 0))
5741 rehash_using_reg (src
);
5742 sets
[i
].src_hash
= HASH (src
, mode
);
5744 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5745 elt
->in_memory
= sets
[i
].src_in_memory
;
5746 /* If inline asm has any clobbers, ensure we only reuse
5747 existing inline asms and never try to put the ASM_OPERANDS
5748 into an insn that isn't inline asm. */
5749 if (GET_CODE (src
) == ASM_OPERANDS
5750 && GET_CODE (x
) == PARALLEL
)
5751 elt
->cost
= MAX_COST
;
5752 sets
[i
].src_elt
= classp
= elt
;
5754 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5755 && src
!= sets
[i
].src_const
5756 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5757 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5758 sets
[i
].src_const_hash
, mode
);
5761 else if (sets
[i
].src_elt
== 0)
5762 /* If we did not insert the source into the hash table (e.g., it was
5763 volatile), note the equivalence class for the REG_EQUAL value, if any,
5764 so that the destination goes into that class. */
5765 sets
[i
].src_elt
= src_eqv_elt
;
5767 /* Record destination addresses in the hash table. This allows us to
5768 check if they are invalidated by other sets. */
5769 for (i
= 0; i
< n_sets
; i
++)
5773 rtx x
= sets
[i
].inner_dest
;
5774 struct table_elt
*elt
;
5781 mode
= GET_MODE (x
);
5782 hash
= HASH (x
, mode
);
5783 elt
= lookup (x
, hash
, mode
);
5786 if (insert_regs (x
, NULL
, 0))
5788 rtx dest
= SET_DEST (sets
[i
].rtl
);
5790 rehash_using_reg (x
);
5791 hash
= HASH (x
, mode
);
5792 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5794 elt
= insert (x
, NULL
, hash
, mode
);
5797 sets
[i
].dest_addr_elt
= elt
;
5800 sets
[i
].dest_addr_elt
= NULL
;
5804 invalidate_from_clobbers (insn
);
5806 /* Some registers are invalidated by subroutine calls. Memory is
5807 invalidated by non-constant calls. */
5811 if (!(RTL_CONST_OR_PURE_CALL_P (insn
)))
5812 invalidate_memory ();
5814 /* For const/pure calls, invalidate any argument slots, because
5815 those are owned by the callee. */
5816 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
5817 if (GET_CODE (XEXP (tem
, 0)) == USE
5818 && MEM_P (XEXP (XEXP (tem
, 0), 0)))
5819 invalidate (XEXP (XEXP (tem
, 0), 0), VOIDmode
);
5820 invalidate_for_call (insn
);
5823 /* Now invalidate everything set by this instruction.
5824 If a SUBREG or other funny destination is being set,
5825 sets[i].rtl is still nonzero, so here we invalidate the reg
5826 a part of which is being set. */
5828 for (i
= 0; i
< n_sets
; i
++)
5831 /* We can't use the inner dest, because the mode associated with
5832 a ZERO_EXTRACT is significant. */
5833 rtx dest
= SET_DEST (sets
[i
].rtl
);
5835 /* Needed for registers to remove the register from its
5836 previous quantity's chain.
5837 Needed for memory if this is a nonvarying address, unless
5838 we have just done an invalidate_memory that covers even those. */
5839 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5840 invalidate (dest
, VOIDmode
);
5841 else if (MEM_P (dest
))
5842 invalidate (dest
, VOIDmode
);
5843 else if (GET_CODE (dest
) == STRICT_LOW_PART
5844 || GET_CODE (dest
) == ZERO_EXTRACT
)
5845 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5848 /* Don't cse over a call to setjmp; on some machines (eg VAX)
5849 the regs restored by the longjmp come from a later time
5851 if (CALL_P (insn
) && find_reg_note (insn
, REG_SETJMP
, NULL
))
5853 flush_hash_table ();
5857 /* Make sure registers mentioned in destinations
5858 are safe for use in an expression to be inserted.
5859 This removes from the hash table
5860 any invalid entry that refers to one of these registers.
5862 We don't care about the return value from mention_regs because
5863 we are going to hash the SET_DEST values unconditionally. */
5865 for (i
= 0; i
< n_sets
; i
++)
5869 rtx x
= SET_DEST (sets
[i
].rtl
);
5875 /* We used to rely on all references to a register becoming
5876 inaccessible when a register changes to a new quantity,
5877 since that changes the hash code. However, that is not
5878 safe, since after HASH_SIZE new quantities we get a
5879 hash 'collision' of a register with its own invalid
5880 entries. And since SUBREGs have been changed not to
5881 change their hash code with the hash code of the register,
5882 it wouldn't work any longer at all. So we have to check
5883 for any invalid references lying around now.
5884 This code is similar to the REG case in mention_regs,
5885 but it knows that reg_tick has been incremented, and
5886 it leaves reg_in_table as -1 . */
5887 unsigned int regno
= REGNO (x
);
5888 unsigned int endregno
= END_REGNO (x
);
5891 for (i
= regno
; i
< endregno
; i
++)
5893 if (REG_IN_TABLE (i
) >= 0)
5895 remove_invalid_refs (i
);
5896 REG_IN_TABLE (i
) = -1;
5903 /* We may have just removed some of the src_elt's from the hash table.
5904 So replace each one with the current head of the same class.
5905 Also check if destination addresses have been removed. */
5907 for (i
= 0; i
< n_sets
; i
++)
5910 if (sets
[i
].dest_addr_elt
5911 && sets
[i
].dest_addr_elt
->first_same_value
== 0)
5913 /* The elt was removed, which means this destination is not
5914 valid after this instruction. */
5915 sets
[i
].rtl
= NULL_RTX
;
5917 else if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
5918 /* If elt was removed, find current head of same class,
5919 or 0 if nothing remains of that class. */
5921 struct table_elt
*elt
= sets
[i
].src_elt
;
5923 while (elt
&& elt
->prev_same_value
)
5924 elt
= elt
->prev_same_value
;
5926 while (elt
&& elt
->first_same_value
== 0)
5927 elt
= elt
->next_same_value
;
5928 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
5932 /* Now insert the destinations into their equivalence classes. */
5934 for (i
= 0; i
< n_sets
; i
++)
5937 rtx dest
= SET_DEST (sets
[i
].rtl
);
5938 struct table_elt
*elt
;
5940 /* Don't record value if we are not supposed to risk allocating
5941 floating-point values in registers that might be wider than
5943 if ((flag_float_store
5945 && FLOAT_MODE_P (GET_MODE (dest
)))
5946 /* Don't record BLKmode values, because we don't know the
5947 size of it, and can't be sure that other BLKmode values
5948 have the same or smaller size. */
5949 || GET_MODE (dest
) == BLKmode
5950 /* If we didn't put a REG_EQUAL value or a source into the hash
5951 table, there is no point is recording DEST. */
5952 || sets
[i
].src_elt
== 0)
5955 /* STRICT_LOW_PART isn't part of the value BEING set,
5956 and neither is the SUBREG inside it.
5957 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5958 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5959 dest
= SUBREG_REG (XEXP (dest
, 0));
5961 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5962 /* Registers must also be inserted into chains for quantities. */
5963 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
5965 /* If `insert_regs' changes something, the hash code must be
5967 rehash_using_reg (dest
);
5968 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
5971 /* If DEST is a paradoxical SUBREG, don't record DEST since the bits
5972 outside the mode of GET_MODE (SUBREG_REG (dest)) are undefined. */
5973 if (paradoxical_subreg_p (dest
))
5976 elt
= insert (dest
, sets
[i
].src_elt
,
5977 sets
[i
].dest_hash
, GET_MODE (dest
));
5979 /* If this is a constant, insert the constant anchors with the
5980 equivalent register-offset expressions using register DEST. */
5981 if (targetm
.const_anchor
5983 && SCALAR_INT_MODE_P (GET_MODE (dest
))
5984 && GET_CODE (sets
[i
].src_elt
->exp
) == CONST_INT
)
5985 insert_const_anchors (dest
, sets
[i
].src_elt
->exp
, GET_MODE (dest
));
5987 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
5988 && !MEM_READONLY_P (sets
[i
].inner_dest
));
5990 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5991 narrower than M2, and both M1 and M2 are the same number of words,
5992 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5993 make that equivalence as well.
5995 However, BAR may have equivalences for which gen_lowpart
5996 will produce a simpler value than gen_lowpart applied to
5997 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5998 BAR's equivalences. If we don't get a simplified form, make
5999 the SUBREG. It will not be used in an equivalence, but will
6000 cause two similar assignments to be detected.
6002 Note the loop below will find SUBREG_REG (DEST) since we have
6003 already entered SRC and DEST of the SET in the table. */
6005 if (GET_CODE (dest
) == SUBREG
6006 && (known_equal_after_align_down
6007 (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1,
6008 GET_MODE_SIZE (GET_MODE (dest
)) - 1,
6010 && !partial_subreg_p (dest
)
6011 && sets
[i
].src_elt
!= 0)
6013 machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6014 struct table_elt
*elt
, *classp
= 0;
6016 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6017 elt
= elt
->next_same_value
)
6021 struct table_elt
*src_elt
;
6023 /* Ignore invalid entries. */
6024 if (!REG_P (elt
->exp
)
6025 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
6028 /* We may have already been playing subreg games. If the
6029 mode is already correct for the destination, use it. */
6030 if (GET_MODE (elt
->exp
) == new_mode
)
6035 = subreg_lowpart_offset (new_mode
, GET_MODE (dest
));
6036 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6037 GET_MODE (dest
), byte
);
6040 /* The call to simplify_gen_subreg fails if the value
6041 is VOIDmode, yet we can't do any simplification, e.g.
6042 for EXPR_LISTs denoting function call results.
6043 It is invalid to construct a SUBREG with a VOIDmode
6044 SUBREG_REG, hence a zero new_src means we can't do
6045 this substitution. */
6049 src_hash
= HASH (new_src
, new_mode
);
6050 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6052 /* Put the new source in the hash table is if isn't
6056 if (insert_regs (new_src
, classp
, 0))
6058 rehash_using_reg (new_src
);
6059 src_hash
= HASH (new_src
, new_mode
);
6061 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6062 src_elt
->in_memory
= elt
->in_memory
;
6063 if (GET_CODE (new_src
) == ASM_OPERANDS
6064 && elt
->cost
== MAX_COST
)
6065 src_elt
->cost
= MAX_COST
;
6067 else if (classp
&& classp
!= src_elt
->first_same_value
)
6068 /* Show that two things that we've seen before are
6069 actually the same. */
6070 merge_equiv_classes (src_elt
, classp
);
6072 classp
= src_elt
->first_same_value
;
6073 /* Ignore invalid entries. */
6075 && !REG_P (classp
->exp
)
6076 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
6077 classp
= classp
->next_same_value
;
6082 /* Special handling for (set REG0 REG1) where REG0 is the
6083 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6084 be used in the sequel, so (if easily done) change this insn to
6085 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6086 that computed their value. Then REG1 will become a dead store
6087 and won't cloud the situation for later optimizations.
6089 Do not make this change if REG1 is a hard register, because it will
6090 then be used in the sequel and we may be changing a two-operand insn
6091 into a three-operand insn.
6093 Also do not do this if we are operating on a copy of INSN. */
6095 if (n_sets
== 1 && sets
[0].rtl
)
6096 try_back_substitute_reg (sets
[0].rtl
, insn
);
6101 /* Remove from the hash table all expressions that reference memory. */
6104 invalidate_memory (void)
6107 struct table_elt
*p
, *next
;
6109 for (i
= 0; i
< HASH_SIZE
; i
++)
6110 for (p
= table
[i
]; p
; p
= next
)
6112 next
= p
->next_same_hash
;
6114 remove_from_table (p
, i
);
6118 /* Perform invalidation on the basis of everything about INSN,
6119 except for invalidating the actual places that are SET in it.
6120 This includes the places CLOBBERed, and anything that might
6121 alias with something that is SET or CLOBBERed. */
6124 invalidate_from_clobbers (rtx_insn
*insn
)
6126 rtx x
= PATTERN (insn
);
6128 if (GET_CODE (x
) == CLOBBER
)
6130 rtx ref
= XEXP (x
, 0);
6133 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6135 invalidate (ref
, VOIDmode
);
6136 else if (GET_CODE (ref
) == STRICT_LOW_PART
6137 || GET_CODE (ref
) == ZERO_EXTRACT
)
6138 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6141 else if (GET_CODE (x
) == PARALLEL
)
6144 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6146 rtx y
= XVECEXP (x
, 0, i
);
6147 if (GET_CODE (y
) == CLOBBER
)
6149 rtx ref
= XEXP (y
, 0);
6150 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6152 invalidate (ref
, VOIDmode
);
6153 else if (GET_CODE (ref
) == STRICT_LOW_PART
6154 || GET_CODE (ref
) == ZERO_EXTRACT
)
6155 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6161 /* Perform invalidation on the basis of everything about INSN.
6162 This includes the places CLOBBERed, and anything that might
6163 alias with something that is SET or CLOBBERed. */
6166 invalidate_from_sets_and_clobbers (rtx_insn
*insn
)
6169 rtx x
= PATTERN (insn
);
6173 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
6175 rtx temx
= XEXP (tem
, 0);
6176 if (GET_CODE (temx
) == CLOBBER
)
6177 invalidate (SET_DEST (temx
), VOIDmode
);
6181 /* Ensure we invalidate the destination register of a CALL insn.
6182 This is necessary for machines where this register is a fixed_reg,
6183 because no other code would invalidate it. */
6184 if (GET_CODE (x
) == SET
&& GET_CODE (SET_SRC (x
)) == CALL
)
6185 invalidate (SET_DEST (x
), VOIDmode
);
6187 else if (GET_CODE (x
) == PARALLEL
)
6191 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6193 rtx y
= XVECEXP (x
, 0, i
);
6194 if (GET_CODE (y
) == CLOBBER
)
6196 rtx clobbered
= XEXP (y
, 0);
6198 if (REG_P (clobbered
)
6199 || GET_CODE (clobbered
) == SUBREG
)
6200 invalidate (clobbered
, VOIDmode
);
6201 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
6202 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
6203 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
6205 else if (GET_CODE (y
) == SET
&& GET_CODE (SET_SRC (y
)) == CALL
)
6206 invalidate (SET_DEST (y
), VOIDmode
);
6211 static rtx
cse_process_note (rtx
);
6213 /* A simplify_replace_fn_rtx callback for cse_process_note. Process X,
6214 part of the REG_NOTES of an insn. Replace any registers with either
6215 an equivalent constant or the canonical form of the register.
6216 Only replace addresses if the containing MEM remains valid.
6218 Return the replacement for X, or null if it should be simplified
6222 cse_process_note_1 (rtx x
, const_rtx
, void *)
6226 validate_change (x
, &XEXP (x
, 0), cse_process_note (XEXP (x
, 0)), false);
6232 int i
= REG_QTY (REGNO (x
));
6234 /* Return a constant or a constant register. */
6235 if (REGNO_QTY_VALID_P (REGNO (x
)))
6237 struct qty_table_elem
*ent
= &qty_table
[i
];
6239 if (ent
->const_rtx
!= NULL_RTX
6240 && (CONSTANT_P (ent
->const_rtx
)
6241 || REG_P (ent
->const_rtx
)))
6243 rtx new_rtx
= gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6245 return copy_rtx (new_rtx
);
6249 /* Otherwise, canonicalize this register. */
6250 return canon_reg (x
, NULL
);
6256 /* Process X, part of the REG_NOTES of an insn. Replace any registers in it
6257 with either an equivalent constant or the canonical form of the register.
6258 Only replace addresses if the containing MEM remains valid. */
6261 cse_process_note (rtx x
)
6263 return simplify_replace_fn_rtx (x
, NULL_RTX
, cse_process_note_1
, NULL
);
6267 /* Find a path in the CFG, starting with FIRST_BB to perform CSE on.
6269 DATA is a pointer to a struct cse_basic_block_data, that is used to
6271 It is filled with a queue of basic blocks, starting with FIRST_BB
6272 and following a trace through the CFG.
6274 If all paths starting at FIRST_BB have been followed, or no new path
6275 starting at FIRST_BB can be constructed, this function returns FALSE.
6276 Otherwise, DATA->path is filled and the function returns TRUE indicating
6277 that a path to follow was found.
6279 If FOLLOW_JUMPS is false, the maximum path length is 1 and the only
6280 block in the path will be FIRST_BB. */
6283 cse_find_path (basic_block first_bb
, struct cse_basic_block_data
*data
,
6290 bitmap_set_bit (cse_visited_basic_blocks
, first_bb
->index
);
6292 /* See if there is a previous path. */
6293 path_size
= data
->path_size
;
6295 /* There is a previous path. Make sure it started with FIRST_BB. */
6297 gcc_assert (data
->path
[0].bb
== first_bb
);
6299 /* There was only one basic block in the last path. Clear the path and
6300 return, so that paths starting at another basic block can be tried. */
6307 /* If the path was empty from the beginning, construct a new path. */
6309 data
->path
[path_size
++].bb
= first_bb
;
6312 /* Otherwise, path_size must be equal to or greater than 2, because
6313 a previous path exists that is at least two basic blocks long.
6315 Update the previous branch path, if any. If the last branch was
6316 previously along the branch edge, take the fallthrough edge now. */
6317 while (path_size
>= 2)
6319 basic_block last_bb_in_path
, previous_bb_in_path
;
6323 last_bb_in_path
= data
->path
[path_size
].bb
;
6324 previous_bb_in_path
= data
->path
[path_size
- 1].bb
;
6326 /* If we previously followed a path along the branch edge, try
6327 the fallthru edge now. */
6328 if (EDGE_COUNT (previous_bb_in_path
->succs
) == 2
6329 && any_condjump_p (BB_END (previous_bb_in_path
))
6330 && (e
= find_edge (previous_bb_in_path
, last_bb_in_path
))
6331 && e
== BRANCH_EDGE (previous_bb_in_path
))
6333 bb
= FALLTHRU_EDGE (previous_bb_in_path
)->dest
;
6334 if (bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6335 && single_pred_p (bb
)
6336 /* We used to assert here that we would only see blocks
6337 that we have not visited yet. But we may end up
6338 visiting basic blocks twice if the CFG has changed
6339 in this run of cse_main, because when the CFG changes
6340 the topological sort of the CFG also changes. A basic
6341 blocks that previously had more than two predecessors
6342 may now have a single predecessor, and become part of
6343 a path that starts at another basic block.
6345 We still want to visit each basic block only once, so
6346 halt the path here if we have already visited BB. */
6347 && !bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
))
6349 bitmap_set_bit (cse_visited_basic_blocks
, bb
->index
);
6350 data
->path
[path_size
++].bb
= bb
;
6355 data
->path
[path_size
].bb
= NULL
;
6358 /* If only one block remains in the path, bail. */
6366 /* Extend the path if possible. */
6369 bb
= data
->path
[path_size
- 1].bb
;
6370 while (bb
&& path_size
< param_max_cse_path_length
)
6372 if (single_succ_p (bb
))
6373 e
= single_succ_edge (bb
);
6374 else if (EDGE_COUNT (bb
->succs
) == 2
6375 && any_condjump_p (BB_END (bb
)))
6377 /* First try to follow the branch. If that doesn't lead
6378 to a useful path, follow the fallthru edge. */
6379 e
= BRANCH_EDGE (bb
);
6380 if (!single_pred_p (e
->dest
))
6381 e
= FALLTHRU_EDGE (bb
);
6387 && !((e
->flags
& EDGE_ABNORMAL_CALL
) && cfun
->has_nonlocal_label
)
6388 && e
->dest
!= EXIT_BLOCK_PTR_FOR_FN (cfun
)
6389 && single_pred_p (e
->dest
)
6390 /* Avoid visiting basic blocks twice. The large comment
6391 above explains why this can happen. */
6392 && !bitmap_bit_p (cse_visited_basic_blocks
, e
->dest
->index
))
6394 basic_block bb2
= e
->dest
;
6395 bitmap_set_bit (cse_visited_basic_blocks
, bb2
->index
);
6396 data
->path
[path_size
++].bb
= bb2
;
6405 data
->path_size
= path_size
;
6406 return path_size
!= 0;
6409 /* Dump the path in DATA to file F. NSETS is the number of sets
6413 cse_dump_path (struct cse_basic_block_data
*data
, int nsets
, FILE *f
)
6417 fprintf (f
, ";; Following path with %d sets: ", nsets
);
6418 for (path_entry
= 0; path_entry
< data
->path_size
; path_entry
++)
6419 fprintf (f
, "%d ", (data
->path
[path_entry
].bb
)->index
);
6425 /* Return true if BB has exception handling successor edges. */
6428 have_eh_succ_edges (basic_block bb
)
6433 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
6434 if (e
->flags
& EDGE_EH
)
6441 /* Scan to the end of the path described by DATA. Return an estimate of
6442 the total number of SETs of all insns in the path. */
6445 cse_prescan_path (struct cse_basic_block_data
*data
)
6448 int path_size
= data
->path_size
;
6451 /* Scan to end of each basic block in the path. */
6452 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6457 bb
= data
->path
[path_entry
].bb
;
6459 FOR_BB_INSNS (bb
, insn
)
6464 /* A PARALLEL can have lots of SETs in it,
6465 especially if it is really an ASM_OPERANDS. */
6466 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6467 nsets
+= XVECLEN (PATTERN (insn
), 0);
6473 data
->nsets
= nsets
;
6476 /* Return true if the pattern of INSN uses a LABEL_REF for which
6477 there isn't a REG_LABEL_OPERAND note. */
6480 check_for_label_ref (rtx_insn
*insn
)
6482 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
6483 note for it, we must rerun jump since it needs to place the note. If
6484 this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
6485 don't do this since no REG_LABEL_OPERAND will be added. */
6486 subrtx_iterator::array_type array
;
6487 FOR_EACH_SUBRTX (iter
, array
, PATTERN (insn
), ALL
)
6489 const_rtx x
= *iter
;
6490 if (GET_CODE (x
) == LABEL_REF
6491 && !LABEL_REF_NONLOCAL_P (x
)
6493 || !label_is_jump_target_p (label_ref_label (x
), insn
))
6494 && LABEL_P (label_ref_label (x
))
6495 && INSN_UID (label_ref_label (x
)) != 0
6496 && !find_reg_note (insn
, REG_LABEL_OPERAND
, label_ref_label (x
)))
6502 /* Process a single extended basic block described by EBB_DATA. */
6505 cse_extended_basic_block (struct cse_basic_block_data
*ebb_data
)
6507 int path_size
= ebb_data
->path_size
;
6511 /* Allocate the space needed by qty_table. */
6512 qty_table
= XNEWVEC (struct qty_table_elem
, max_qty
);
6515 cse_ebb_live_in
= df_get_live_in (ebb_data
->path
[0].bb
);
6516 cse_ebb_live_out
= df_get_live_out (ebb_data
->path
[path_size
- 1].bb
);
6517 for (path_entry
= 0; path_entry
< path_size
; path_entry
++)
6522 bb
= ebb_data
->path
[path_entry
].bb
;
6524 /* Invalidate recorded information for eh regs if there is an EH
6525 edge pointing to that bb. */
6526 if (bb_has_eh_pred (bb
))
6530 FOR_EACH_ARTIFICIAL_DEF (def
, bb
->index
)
6531 if (DF_REF_FLAGS (def
) & DF_REF_AT_TOP
)
6532 invalidate (DF_REF_REG (def
), GET_MODE (DF_REF_REG (def
)));
6535 optimize_this_for_speed_p
= optimize_bb_for_speed_p (bb
);
6536 FOR_BB_INSNS (bb
, insn
)
6538 /* If we have processed 1,000 insns, flush the hash table to
6539 avoid extreme quadratic behavior. We must not include NOTEs
6540 in the count since there may be more of them when generating
6541 debugging information. If we clear the table at different
6542 times, code generated with -g -O might be different than code
6543 generated with -O but not -g.
6545 FIXME: This is a real kludge and needs to be done some other
6547 if (NONDEBUG_INSN_P (insn
)
6548 && num_insns
++ > param_max_cse_insns
)
6550 flush_hash_table ();
6556 /* Process notes first so we have all notes in canonical forms
6557 when looking for duplicate operations. */
6558 bool changed
= false;
6559 for (rtx note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
6560 if (REG_NOTE_KIND (note
) == REG_EQUAL
)
6562 rtx newval
= cse_process_note (XEXP (note
, 0));
6563 if (newval
!= XEXP (note
, 0))
6565 XEXP (note
, 0) = newval
;
6570 df_notes_rescan (insn
);
6574 /* If we haven't already found an insn where we added a LABEL_REF,
6576 if (INSN_P (insn
) && !recorded_label_ref
6577 && check_for_label_ref (insn
))
6578 recorded_label_ref
= true;
6582 /* With non-call exceptions, we are not always able to update
6583 the CFG properly inside cse_insn. So clean up possibly
6584 redundant EH edges here. */
6585 if (cfun
->can_throw_non_call_exceptions
&& have_eh_succ_edges (bb
))
6586 cse_cfg_altered
|= purge_dead_edges (bb
);
6588 /* If we changed a conditional jump, we may have terminated
6589 the path we are following. Check that by verifying that
6590 the edge we would take still exists. If the edge does
6591 not exist anymore, purge the remainder of the path.
6592 Note that this will cause us to return to the caller. */
6593 if (path_entry
< path_size
- 1)
6595 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6596 if (!find_edge (bb
, next_bb
))
6602 /* If we truncate the path, we must also reset the
6603 visited bit on the remaining blocks in the path,
6604 or we will never visit them at all. */
6605 bitmap_clear_bit (cse_visited_basic_blocks
,
6606 ebb_data
->path
[path_size
].bb
->index
);
6607 ebb_data
->path
[path_size
].bb
= NULL
;
6609 while (path_size
- 1 != path_entry
);
6610 ebb_data
->path_size
= path_size
;
6614 /* If this is a conditional jump insn, record any known
6615 equivalences due to the condition being tested. */
6617 if (path_entry
< path_size
- 1
6618 && EDGE_COUNT (bb
->succs
) == 2
6620 && single_set (insn
)
6621 && any_condjump_p (insn
))
6623 basic_block next_bb
= ebb_data
->path
[path_entry
+ 1].bb
;
6624 bool taken
= (next_bb
== BRANCH_EDGE (bb
)->dest
);
6625 record_jump_equiv (insn
, taken
);
6629 gcc_assert (next_qty
<= max_qty
);
6635 /* Perform cse on the instructions of a function.
6636 F is the first instruction.
6637 NREGS is one plus the highest pseudo-reg number used in the instruction.
6639 Return 2 if jump optimizations should be redone due to simplifications
6640 in conditional jump instructions.
6641 Return 1 if the CFG should be cleaned up because it has been modified.
6642 Return 0 otherwise. */
6645 cse_main (rtx_insn
*f ATTRIBUTE_UNUSED
, int nregs
)
6647 struct cse_basic_block_data ebb_data
;
6649 int *rc_order
= XNEWVEC (int, last_basic_block_for_fn (cfun
));
6652 /* CSE doesn't use dominane info but can invalidate it in different ways.
6653 For simplicity free dominance info here. */
6654 free_dominance_info (CDI_DOMINATORS
);
6656 df_set_flags (DF_LR_RUN_DCE
);
6657 df_note_add_problem ();
6659 df_set_flags (DF_DEFER_INSN_RESCAN
);
6661 reg_scan (get_insns (), max_reg_num ());
6662 init_cse_reg_info (nregs
);
6664 ebb_data
.path
= XNEWVEC (struct branch_path
,
6665 param_max_cse_path_length
);
6667 cse_cfg_altered
= false;
6668 cse_jumps_altered
= false;
6669 recorded_label_ref
= false;
6670 ebb_data
.path_size
= 0;
6672 rtl_hooks
= cse_rtl_hooks
;
6675 init_alias_analysis ();
6677 reg_eqv_table
= XNEWVEC (struct reg_eqv_elem
, nregs
);
6679 /* Set up the table of already visited basic blocks. */
6680 cse_visited_basic_blocks
= sbitmap_alloc (last_basic_block_for_fn (cfun
));
6681 bitmap_clear (cse_visited_basic_blocks
);
6683 /* Loop over basic blocks in reverse completion order (RPO),
6684 excluding the ENTRY and EXIT blocks. */
6685 n_blocks
= pre_and_rev_post_order_compute (NULL
, rc_order
, false);
6687 while (i
< n_blocks
)
6689 /* Find the first block in the RPO queue that we have not yet
6690 processed before. */
6693 bb
= BASIC_BLOCK_FOR_FN (cfun
, rc_order
[i
++]);
6695 while (bitmap_bit_p (cse_visited_basic_blocks
, bb
->index
)
6698 /* Find all paths starting with BB, and process them. */
6699 while (cse_find_path (bb
, &ebb_data
, flag_cse_follow_jumps
))
6701 /* Pre-scan the path. */
6702 cse_prescan_path (&ebb_data
);
6704 /* If this basic block has no sets, skip it. */
6705 if (ebb_data
.nsets
== 0)
6708 /* Get a reasonable estimate for the maximum number of qty's
6709 needed for this path. For this, we take the number of sets
6710 and multiply that by MAX_RECOG_OPERANDS. */
6711 max_qty
= ebb_data
.nsets
* MAX_RECOG_OPERANDS
;
6713 /* Dump the path we're about to process. */
6715 cse_dump_path (&ebb_data
, ebb_data
.nsets
, dump_file
);
6717 cse_extended_basic_block (&ebb_data
);
6722 end_alias_analysis ();
6723 free (reg_eqv_table
);
6724 free (ebb_data
.path
);
6725 sbitmap_free (cse_visited_basic_blocks
);
6727 rtl_hooks
= general_rtl_hooks
;
6729 if (cse_jumps_altered
|| recorded_label_ref
)
6731 else if (cse_cfg_altered
)
6737 /* Count the number of times registers are used (not set) in X.
6738 COUNTS is an array in which we accumulate the count, INCR is how much
6739 we count each register usage.
6741 Don't count a usage of DEST, which is the SET_DEST of a SET which
6742 contains X in its SET_SRC. This is because such a SET does not
6743 modify the liveness of DEST.
6744 DEST is set to pc_rtx for a trapping insn, or for an insn with side effects.
6745 We must then count uses of a SET_DEST regardless, because the insn can't be
6749 count_reg_usage (rtx x
, int *counts
, rtx dest
, int incr
)
6759 switch (code
= GET_CODE (x
))
6763 counts
[REGNO (x
)] += incr
;
6774 /* If we are clobbering a MEM, mark any registers inside the address
6776 if (MEM_P (XEXP (x
, 0)))
6777 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, NULL_RTX
, incr
);
6781 /* Unless we are setting a REG, count everything in SET_DEST. */
6782 if (!REG_P (SET_DEST (x
)))
6783 count_reg_usage (SET_DEST (x
), counts
, NULL_RTX
, incr
);
6784 count_reg_usage (SET_SRC (x
), counts
,
6785 dest
? dest
: SET_DEST (x
),
6795 /* We expect dest to be NULL_RTX here. If the insn may throw,
6796 or if it cannot be deleted due to side-effects, mark this fact
6797 by setting DEST to pc_rtx. */
6798 if ((!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (x
))
6799 || side_effects_p (PATTERN (x
)))
6801 if (code
== CALL_INSN
)
6802 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, dest
, incr
);
6803 count_reg_usage (PATTERN (x
), counts
, dest
, incr
);
6805 /* Things used in a REG_EQUAL note aren't dead since loop may try to
6808 note
= find_reg_equal_equiv_note (x
);
6811 rtx eqv
= XEXP (note
, 0);
6813 if (GET_CODE (eqv
) == EXPR_LIST
)
6814 /* This REG_EQUAL note describes the result of a function call.
6815 Process all the arguments. */
6818 count_reg_usage (XEXP (eqv
, 0), counts
, dest
, incr
);
6819 eqv
= XEXP (eqv
, 1);
6821 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
6823 count_reg_usage (eqv
, counts
, dest
, incr
);
6828 if (REG_NOTE_KIND (x
) == REG_EQUAL
6829 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
6830 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
6831 involving registers in the address. */
6832 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
6833 count_reg_usage (XEXP (x
, 0), counts
, NULL_RTX
, incr
);
6835 count_reg_usage (XEXP (x
, 1), counts
, NULL_RTX
, incr
);
6839 /* Iterate over just the inputs, not the constraints as well. */
6840 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
6841 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, dest
, incr
);
6852 fmt
= GET_RTX_FORMAT (code
);
6853 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6856 count_reg_usage (XEXP (x
, i
), counts
, dest
, incr
);
6857 else if (fmt
[i
] == 'E')
6858 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6859 count_reg_usage (XVECEXP (x
, i
, j
), counts
, dest
, incr
);
6863 /* Return true if X is a dead register. */
6866 is_dead_reg (const_rtx x
, int *counts
)
6869 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6870 && counts
[REGNO (x
)] == 0);
6873 /* Return true if set is live. */
6875 set_live_p (rtx set
, int *counts
)
6877 if (set_noop_p (set
))
6880 if (!is_dead_reg (SET_DEST (set
), counts
)
6881 || side_effects_p (SET_SRC (set
)))
6887 /* Return true if insn is live. */
6890 insn_live_p (rtx_insn
*insn
, int *counts
)
6893 if (!cfun
->can_delete_dead_exceptions
&& !insn_nothrow_p (insn
))
6895 else if (GET_CODE (PATTERN (insn
)) == SET
)
6896 return set_live_p (PATTERN (insn
), counts
);
6897 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6899 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
6901 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6903 if (GET_CODE (elt
) == SET
)
6905 if (set_live_p (elt
, counts
))
6908 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
6913 else if (DEBUG_INSN_P (insn
))
6915 if (DEBUG_MARKER_INSN_P (insn
))
6918 if (DEBUG_BIND_INSN_P (insn
)
6919 && TREE_VISITED (INSN_VAR_LOCATION_DECL (insn
)))
6928 /* Count the number of stores into pseudo. Callback for note_stores. */
6931 count_stores (rtx x
, const_rtx set ATTRIBUTE_UNUSED
, void *data
)
6933 int *counts
= (int *) data
;
6934 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
)
6935 counts
[REGNO (x
)]++;
6938 /* Return if DEBUG_INSN pattern PAT needs to be reset because some dead
6939 pseudo doesn't have a replacement. COUNTS[X] is zero if register X
6940 is dead and REPLACEMENTS[X] is null if it has no replacemenet.
6941 Set *SEEN_REPL to true if we see a dead register that does have
6945 is_dead_debug_insn (const_rtx pat
, int *counts
, rtx
*replacements
,
6948 subrtx_iterator::array_type array
;
6949 FOR_EACH_SUBRTX (iter
, array
, pat
, NONCONST
)
6951 const_rtx x
= *iter
;
6952 if (is_dead_reg (x
, counts
))
6954 if (replacements
&& replacements
[REGNO (x
)] != NULL_RTX
)
6963 /* Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR.
6964 Callback for simplify_replace_fn_rtx. */
6967 replace_dead_reg (rtx x
, const_rtx old_rtx ATTRIBUTE_UNUSED
, void *data
)
6969 rtx
*replacements
= (rtx
*) data
;
6972 && REGNO (x
) >= FIRST_PSEUDO_REGISTER
6973 && replacements
[REGNO (x
)] != NULL_RTX
)
6975 if (GET_MODE (x
) == GET_MODE (replacements
[REGNO (x
)]))
6976 return replacements
[REGNO (x
)];
6977 return lowpart_subreg (GET_MODE (x
), replacements
[REGNO (x
)],
6978 GET_MODE (replacements
[REGNO (x
)]));
6983 /* Scan all the insns and delete any that are dead; i.e., they store a register
6984 that is never used or they copy a register to itself.
6986 This is used to remove insns made obviously dead by cse, loop or other
6987 optimizations. It improves the heuristics in loop since it won't try to
6988 move dead invariants out of loops or make givs for dead quantities. The
6989 remaining passes of the compilation are also sped up. */
6992 delete_trivially_dead_insns (rtx_insn
*insns
, int nreg
)
6995 rtx_insn
*insn
, *prev
;
6996 rtx
*replacements
= NULL
;
6999 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7000 /* First count the number of times each register is used. */
7001 if (MAY_HAVE_DEBUG_BIND_INSNS
)
7003 counts
= XCNEWVEC (int, nreg
* 3);
7004 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
7005 if (DEBUG_BIND_INSN_P (insn
))
7007 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
7009 TREE_VISITED (INSN_VAR_LOCATION_DECL (insn
)) = 0;
7011 else if (INSN_P (insn
))
7013 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7014 note_stores (insn
, count_stores
, counts
+ nreg
* 2);
7016 /* If there can be debug insns, COUNTS are 3 consecutive arrays.
7017 First one counts how many times each pseudo is used outside
7018 of debug insns, second counts how many times each pseudo is
7019 used in debug insns and third counts how many times a pseudo
7024 counts
= XCNEWVEC (int, nreg
);
7025 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
7027 count_reg_usage (insn
, counts
, NULL_RTX
, 1);
7028 /* If no debug insns can be present, COUNTS is just an array
7029 which counts how many times each pseudo is used. */
7031 /* Pseudo PIC register should be considered as used due to possible
7032 new usages generated. */
7033 if (!reload_completed
7034 && pic_offset_table_rtx
7035 && REGNO (pic_offset_table_rtx
) >= FIRST_PSEUDO_REGISTER
)
7036 counts
[REGNO (pic_offset_table_rtx
)]++;
7037 /* Go from the last insn to the first and delete insns that only set unused
7038 registers or copy a register to itself. As we delete an insn, remove
7039 usage counts for registers it uses.
7041 The first jump optimization pass may leave a real insn as the last
7042 insn in the function. We must not skip that insn or we may end
7043 up deleting code that is not really dead.
7045 If some otherwise unused register is only used in DEBUG_INSNs,
7046 try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
7047 the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
7048 has been created for the unused register, replace it with
7049 the DEBUG_EXPR, otherwise reset the DEBUG_INSN. */
7050 auto_vec
<tree
, 32> later_debug_set_vars
;
7051 for (insn
= get_last_insn (); insn
; insn
= prev
)
7055 prev
= PREV_INSN (insn
);
7059 live_insn
= insn_live_p (insn
, counts
);
7061 /* If this is a dead insn, delete it and show registers in it aren't
7064 if (! live_insn
&& dbg_cnt (delete_trivial_dead
))
7066 if (DEBUG_INSN_P (insn
))
7068 if (DEBUG_BIND_INSN_P (insn
))
7069 count_reg_usage (INSN_VAR_LOCATION_LOC (insn
), counts
+ nreg
,
7075 if (MAY_HAVE_DEBUG_BIND_INSNS
7076 && (set
= single_set (insn
)) != NULL_RTX
7077 && is_dead_reg (SET_DEST (set
), counts
)
7078 /* Used at least once in some DEBUG_INSN. */
7079 && counts
[REGNO (SET_DEST (set
)) + nreg
] > 0
7080 /* And set exactly once. */
7081 && counts
[REGNO (SET_DEST (set
)) + nreg
* 2] == 1
7082 && !side_effects_p (SET_SRC (set
))
7083 && asm_noperands (PATTERN (insn
)) < 0)
7085 rtx dval
, bind_var_loc
;
7088 /* Create DEBUG_EXPR (and DEBUG_EXPR_DECL). */
7089 dval
= make_debug_expr_from_rtl (SET_DEST (set
));
7091 /* Emit a debug bind insn before the insn in which
7094 gen_rtx_VAR_LOCATION (GET_MODE (SET_DEST (set
)),
7095 DEBUG_EXPR_TREE_DECL (dval
),
7097 VAR_INIT_STATUS_INITIALIZED
);
7098 count_reg_usage (bind_var_loc
, counts
+ nreg
, NULL_RTX
, 1);
7100 bind
= emit_debug_insn_before (bind_var_loc
, insn
);
7101 df_insn_rescan (bind
);
7103 if (replacements
== NULL
)
7104 replacements
= XCNEWVEC (rtx
, nreg
);
7105 replacements
[REGNO (SET_DEST (set
))] = dval
;
7108 count_reg_usage (insn
, counts
, NULL_RTX
, -1);
7111 cse_cfg_altered
|= delete_insn_and_edges (insn
);
7115 if (!DEBUG_INSN_P (insn
) || DEBUG_MARKER_INSN_P (insn
))
7117 for (tree var
: later_debug_set_vars
)
7118 TREE_VISITED (var
) = 0;
7119 later_debug_set_vars
.truncate (0);
7121 else if (DEBUG_BIND_INSN_P (insn
)
7122 && !TREE_VISITED (INSN_VAR_LOCATION_DECL (insn
)))
7124 later_debug_set_vars
.safe_push (INSN_VAR_LOCATION_DECL (insn
));
7125 TREE_VISITED (INSN_VAR_LOCATION_DECL (insn
)) = 1;
7130 if (MAY_HAVE_DEBUG_BIND_INSNS
)
7132 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
7133 if (DEBUG_BIND_INSN_P (insn
))
7135 /* If this debug insn references a dead register that wasn't replaced
7136 with an DEBUG_EXPR, reset the DEBUG_INSN. */
7137 bool seen_repl
= false;
7138 if (is_dead_debug_insn (INSN_VAR_LOCATION_LOC (insn
),
7139 counts
, replacements
, &seen_repl
))
7141 INSN_VAR_LOCATION_LOC (insn
) = gen_rtx_UNKNOWN_VAR_LOC ();
7142 df_insn_rescan (insn
);
7146 INSN_VAR_LOCATION_LOC (insn
)
7147 = simplify_replace_fn_rtx (INSN_VAR_LOCATION_LOC (insn
),
7148 NULL_RTX
, replace_dead_reg
,
7150 df_insn_rescan (insn
);
7153 free (replacements
);
7156 if (dump_file
&& ndead
)
7157 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7161 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7165 /* If LOC contains references to NEWREG in a different mode, change them
7166 to use NEWREG instead. */
7169 cse_change_cc_mode (subrtx_ptr_iterator::array_type
&array
,
7170 rtx
*loc
, rtx_insn
*insn
, rtx newreg
)
7172 FOR_EACH_SUBRTX_PTR (iter
, array
, loc
, NONCONST
)
7178 && REGNO (x
) == REGNO (newreg
)
7179 && GET_MODE (x
) != GET_MODE (newreg
))
7181 validate_change (insn
, loc
, newreg
, 1);
7182 iter
.skip_subrtxes ();
7187 /* Change the mode of any reference to the register REGNO (NEWREG) to
7188 GET_MODE (NEWREG) in INSN. */
7191 cse_change_cc_mode_insn (rtx_insn
*insn
, rtx newreg
)
7198 subrtx_ptr_iterator::array_type array
;
7199 cse_change_cc_mode (array
, &PATTERN (insn
), insn
, newreg
);
7200 cse_change_cc_mode (array
, ®_NOTES (insn
), insn
, newreg
);
7202 /* If the following assertion was triggered, there is most probably
7203 something wrong with the cc_modes_compatible back end function.
7204 CC modes only can be considered compatible if the insn - with the mode
7205 replaced by any of the compatible modes - can still be recognized. */
7206 success
= apply_change_group ();
7207 gcc_assert (success
);
7210 /* Change the mode of any reference to the register REGNO (NEWREG) to
7211 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7212 any instruction which modifies NEWREG. */
7215 cse_change_cc_mode_insns (rtx_insn
*start
, rtx_insn
*end
, rtx newreg
)
7219 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7221 if (! INSN_P (insn
))
7224 if (reg_set_p (newreg
, insn
))
7227 cse_change_cc_mode_insn (insn
, newreg
);
7231 /* BB is a basic block which finishes with CC_REG as a condition code
7232 register which is set to CC_SRC. Look through the successors of BB
7233 to find blocks which have a single predecessor (i.e., this one),
7234 and look through those blocks for an assignment to CC_REG which is
7235 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7236 permitted to change the mode of CC_SRC to a compatible mode. This
7237 returns VOIDmode if no equivalent assignments were found.
7238 Otherwise it returns the mode which CC_SRC should wind up with.
7239 ORIG_BB should be the same as BB in the outermost cse_cc_succs call,
7240 but is passed unmodified down to recursive calls in order to prevent
7243 The main complexity in this function is handling the mode issues.
7244 We may have more than one duplicate which we can eliminate, and we
7245 try to find a mode which will work for multiple duplicates. */
7248 cse_cc_succs (basic_block bb
, basic_block orig_bb
, rtx cc_reg
, rtx cc_src
,
7249 bool can_change_mode
)
7253 unsigned int insn_count
;
7256 machine_mode modes
[2];
7257 rtx_insn
*last_insns
[2];
7262 /* We expect to have two successors. Look at both before picking
7263 the final mode for the comparison. If we have more successors
7264 (i.e., some sort of table jump, although that seems unlikely),
7265 then we require all beyond the first two to use the same
7268 found_equiv
= false;
7269 mode
= GET_MODE (cc_src
);
7271 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7276 if (e
->flags
& EDGE_COMPLEX
)
7279 if (EDGE_COUNT (e
->dest
->preds
) != 1
7280 || e
->dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
)
7281 /* Avoid endless recursion on unreachable blocks. */
7282 || e
->dest
== orig_bb
)
7285 end
= NEXT_INSN (BB_END (e
->dest
));
7286 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7290 if (! INSN_P (insn
))
7293 /* If CC_SRC is modified, we have to stop looking for
7294 something which uses it. */
7295 if (modified_in_p (cc_src
, insn
))
7298 /* Check whether INSN sets CC_REG to CC_SRC. */
7299 set
= single_set (insn
);
7301 && REG_P (SET_DEST (set
))
7302 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7305 machine_mode set_mode
;
7306 machine_mode comp_mode
;
7309 set_mode
= GET_MODE (SET_SRC (set
));
7310 comp_mode
= set_mode
;
7311 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7313 else if (GET_CODE (cc_src
) == COMPARE
7314 && GET_CODE (SET_SRC (set
)) == COMPARE
7316 && rtx_equal_p (XEXP (cc_src
, 0),
7317 XEXP (SET_SRC (set
), 0))
7318 && rtx_equal_p (XEXP (cc_src
, 1),
7319 XEXP (SET_SRC (set
), 1)))
7322 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7323 if (comp_mode
!= VOIDmode
7324 && (can_change_mode
|| comp_mode
== mode
))
7331 if (insn_count
< ARRAY_SIZE (insns
))
7333 insns
[insn_count
] = insn
;
7334 modes
[insn_count
] = set_mode
;
7335 last_insns
[insn_count
] = end
;
7338 if (mode
!= comp_mode
)
7340 gcc_assert (can_change_mode
);
7343 /* The modified insn will be re-recognized later. */
7344 PUT_MODE (cc_src
, mode
);
7349 if (set_mode
!= mode
)
7351 /* We found a matching expression in the
7352 wrong mode, but we don't have room to
7353 store it in the array. Punt. This case
7357 /* INSN sets CC_REG to a value equal to CC_SRC
7358 with the right mode. We can simply delete
7363 /* We found an instruction to delete. Keep looking,
7364 in the hopes of finding a three-way jump. */
7368 /* We found an instruction which sets the condition
7369 code, so don't look any farther. */
7373 /* If INSN sets CC_REG in some other way, don't look any
7375 if (reg_set_p (cc_reg
, insn
))
7379 /* If we fell off the bottom of the block, we can keep looking
7380 through successors. We pass CAN_CHANGE_MODE as false because
7381 we aren't prepared to handle compatibility between the
7382 further blocks and this block. */
7385 machine_mode submode
;
7387 submode
= cse_cc_succs (e
->dest
, orig_bb
, cc_reg
, cc_src
, false);
7388 if (submode
!= VOIDmode
)
7390 gcc_assert (submode
== mode
);
7392 can_change_mode
= false;
7400 /* Now INSN_COUNT is the number of instructions we found which set
7401 CC_REG to a value equivalent to CC_SRC. The instructions are in
7402 INSNS. The modes used by those instructions are in MODES. */
7405 for (i
= 0; i
< insn_count
; ++i
)
7407 if (modes
[i
] != mode
)
7409 /* We need to change the mode of CC_REG in INSNS[i] and
7410 subsequent instructions. */
7413 if (GET_MODE (cc_reg
) == mode
)
7416 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7418 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7422 cse_cfg_altered
|= delete_insn_and_edges (insns
[i
]);
7428 /* If we have a fixed condition code register (or two), walk through
7429 the instructions and try to eliminate duplicate assignments. */
7432 cse_condition_code_reg (void)
7434 unsigned int cc_regno_1
;
7435 unsigned int cc_regno_2
;
7440 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7443 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7444 if (cc_regno_2
!= INVALID_REGNUM
)
7445 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7447 cc_reg_2
= NULL_RTX
;
7449 FOR_EACH_BB_FN (bb
, cfun
)
7451 rtx_insn
*last_insn
;
7454 rtx_insn
*cc_src_insn
;
7457 machine_mode orig_mode
;
7459 /* Look for blocks which end with a conditional jump based on a
7460 condition code register. Then look for the instruction which
7461 sets the condition code register. Then look through the
7462 successor blocks for instructions which set the condition
7463 code register to the same value. There are other possible
7464 uses of the condition code register, but these are by far the
7465 most common and the ones which we are most likely to be able
7468 last_insn
= BB_END (bb
);
7469 if (!JUMP_P (last_insn
))
7472 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7474 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7481 for (insn
= PREV_INSN (last_insn
);
7482 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7483 insn
= PREV_INSN (insn
))
7487 if (! INSN_P (insn
))
7489 set
= single_set (insn
);
7491 && REG_P (SET_DEST (set
))
7492 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7495 cc_src
= SET_SRC (set
);
7498 else if (reg_set_p (cc_reg
, insn
))
7505 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7508 /* Now CC_REG is a condition code register used for a
7509 conditional jump at the end of the block, and CC_SRC, in
7510 CC_SRC_INSN, is the value to which that condition code
7511 register is set, and CC_SRC is still meaningful at the end of
7514 orig_mode
= GET_MODE (cc_src
);
7515 mode
= cse_cc_succs (bb
, bb
, cc_reg
, cc_src
, true);
7516 if (mode
!= VOIDmode
)
7518 gcc_assert (mode
== GET_MODE (cc_src
));
7519 if (mode
!= orig_mode
)
7521 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7523 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7525 /* Do the same in the following insns that use the
7526 current value of CC_REG within BB. */
7527 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7528 NEXT_INSN (last_insn
),
7536 /* Perform common subexpression elimination. Nonzero value from
7537 `cse_main' means that jumps were simplified and some code may now
7538 be unreachable, so do jump optimization again. */
7540 rest_of_handle_cse (void)
7545 dump_flow_info (dump_file
, dump_flags
);
7547 tem
= cse_main (get_insns (), max_reg_num ());
7549 /* If we are not running more CSE passes, then we are no longer
7550 expecting CSE to be run. But always rerun it in a cheap mode. */
7551 cse_not_expected
= !flag_rerun_cse_after_loop
&& !flag_gcse
;
7555 timevar_push (TV_JUMP
);
7556 rebuild_jump_labels (get_insns ());
7557 cse_cfg_altered
|= cleanup_cfg (CLEANUP_CFG_CHANGED
);
7558 timevar_pop (TV_JUMP
);
7560 else if (tem
== 1 || optimize
> 1)
7561 cse_cfg_altered
|= cleanup_cfg (0);
7568 const pass_data pass_data_cse
=
7570 RTL_PASS
, /* type */
7572 OPTGROUP_NONE
, /* optinfo_flags */
7574 0, /* properties_required */
7575 0, /* properties_provided */
7576 0, /* properties_destroyed */
7577 0, /* todo_flags_start */
7578 TODO_df_finish
, /* todo_flags_finish */
7581 class pass_cse
: public rtl_opt_pass
7584 pass_cse (gcc::context
*ctxt
)
7585 : rtl_opt_pass (pass_data_cse
, ctxt
)
7588 /* opt_pass methods: */
7589 bool gate (function
*) final override
{ return optimize
> 0; }
7590 unsigned int execute (function
*) final override
7592 return rest_of_handle_cse ();
7595 }; // class pass_cse
7600 make_pass_cse (gcc::context
*ctxt
)
7602 return new pass_cse (ctxt
);
7606 /* Run second CSE pass after loop optimizations. */
7608 rest_of_handle_cse2 (void)
7613 dump_flow_info (dump_file
, dump_flags
);
7615 tem
= cse_main (get_insns (), max_reg_num ());
7617 /* Run a pass to eliminate duplicated assignments to condition code
7618 registers. We have to run this after bypass_jumps, because it
7619 makes it harder for that pass to determine whether a jump can be
7621 cse_condition_code_reg ();
7623 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7627 timevar_push (TV_JUMP
);
7628 rebuild_jump_labels (get_insns ());
7629 cse_cfg_altered
|= cleanup_cfg (CLEANUP_CFG_CHANGED
);
7630 timevar_pop (TV_JUMP
);
7632 else if (tem
== 1 || cse_cfg_altered
)
7633 cse_cfg_altered
|= cleanup_cfg (0);
7635 cse_not_expected
= 1;
7642 const pass_data pass_data_cse2
=
7644 RTL_PASS
, /* type */
7646 OPTGROUP_NONE
, /* optinfo_flags */
7647 TV_CSE2
, /* tv_id */
7648 0, /* properties_required */
7649 0, /* properties_provided */
7650 0, /* properties_destroyed */
7651 0, /* todo_flags_start */
7652 TODO_df_finish
, /* todo_flags_finish */
7655 class pass_cse2
: public rtl_opt_pass
7658 pass_cse2 (gcc::context
*ctxt
)
7659 : rtl_opt_pass (pass_data_cse2
, ctxt
)
7662 /* opt_pass methods: */
7663 bool gate (function
*) final override
7665 return optimize
> 0 && flag_rerun_cse_after_loop
;
7668 unsigned int execute (function
*) final override
7670 return rest_of_handle_cse2 ();
7673 }; // class pass_cse2
7678 make_pass_cse2 (gcc::context
*ctxt
)
7680 return new pass_cse2 (ctxt
);
7683 /* Run second CSE pass after loop optimizations. */
7685 rest_of_handle_cse_after_global_opts (void)
7690 /* We only want to do local CSE, so don't follow jumps. */
7691 save_cfj
= flag_cse_follow_jumps
;
7692 flag_cse_follow_jumps
= 0;
7694 rebuild_jump_labels (get_insns ());
7695 tem
= cse_main (get_insns (), max_reg_num ());
7696 cse_cfg_altered
|= purge_all_dead_edges ();
7697 delete_trivially_dead_insns (get_insns (), max_reg_num ());
7699 cse_not_expected
= !flag_rerun_cse_after_loop
;
7701 /* If cse altered any jumps, rerun jump opts to clean things up. */
7704 timevar_push (TV_JUMP
);
7705 rebuild_jump_labels (get_insns ());
7706 cse_cfg_altered
|= cleanup_cfg (CLEANUP_CFG_CHANGED
);
7707 timevar_pop (TV_JUMP
);
7709 else if (tem
== 1 || cse_cfg_altered
)
7710 cse_cfg_altered
|= cleanup_cfg (0);
7712 flag_cse_follow_jumps
= save_cfj
;
7718 const pass_data pass_data_cse_after_global_opts
=
7720 RTL_PASS
, /* type */
7721 "cse_local", /* name */
7722 OPTGROUP_NONE
, /* optinfo_flags */
7724 0, /* properties_required */
7725 0, /* properties_provided */
7726 0, /* properties_destroyed */
7727 0, /* todo_flags_start */
7728 TODO_df_finish
, /* todo_flags_finish */
7731 class pass_cse_after_global_opts
: public rtl_opt_pass
7734 pass_cse_after_global_opts (gcc::context
*ctxt
)
7735 : rtl_opt_pass (pass_data_cse_after_global_opts
, ctxt
)
7738 /* opt_pass methods: */
7739 bool gate (function
*) final override
7741 return optimize
> 0 && flag_rerun_cse_after_global_opts
;
7744 unsigned int execute (function
*) final override
7746 return rest_of_handle_cse_after_global_opts ();
7749 }; // class pass_cse_after_global_opts
7754 make_pass_cse_after_global_opts (gcc::context
*ctxt
)
7756 return new pass_cse_after_global_opts (ctxt
);