1 /* If-conversion support.
2 Copyright (C) 2000-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
31 #include "hard-reg-set.h"
35 #include "insn-config.h"
39 #include "dominance.h"
43 #include "cfgcleanup.h"
44 #include "basic-block.h"
47 #include "insn-codes.h"
49 #include "diagnostic-core.h"
53 #include "tree-pass.h"
56 #include "shrink-wrap.h"
59 #ifndef HAVE_conditional_move
60 #define HAVE_conditional_move 0
72 #ifndef MAX_CONDITIONAL_EXECUTE
73 #define MAX_CONDITIONAL_EXECUTE \
74 (BRANCH_COST (optimize_function_for_speed_p (cfun), false) \
78 #define IFCVT_MULTIPLE_DUMPS 1
80 #define NULL_BLOCK ((basic_block) NULL)
82 /* True if after combine pass. */
83 static bool ifcvt_after_combine
;
85 /* # of IF-THEN or IF-THEN-ELSE blocks we looked at */
86 static int num_possible_if_blocks
;
88 /* # of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
90 static int num_updated_if_blocks
;
92 /* # of changes made. */
93 static int num_true_changes
;
95 /* Whether conditional execution changes were made. */
96 static int cond_exec_changed_p
;
98 /* Forward references. */
99 static int count_bb_insns (const_basic_block
);
100 static bool cheap_bb_rtx_cost_p (const_basic_block
, int, int);
101 static rtx_insn
*first_active_insn (basic_block
);
102 static rtx_insn
*last_active_insn (basic_block
, int);
103 static rtx_insn
*find_active_insn_before (basic_block
, rtx_insn
*);
104 static rtx_insn
*find_active_insn_after (basic_block
, rtx_insn
*);
105 static basic_block
block_fallthru (basic_block
);
106 static int cond_exec_process_insns (ce_if_block
*, rtx_insn
*, rtx
, rtx
, int,
108 static rtx
cond_exec_get_condition (rtx_insn
*);
109 static rtx
noce_get_condition (rtx_insn
*, rtx_insn
**, bool);
110 static int noce_operand_ok (const_rtx
);
111 static void merge_if_block (ce_if_block
*);
112 static int find_cond_trap (basic_block
, edge
, edge
);
113 static basic_block
find_if_header (basic_block
, int);
114 static int block_jumps_and_fallthru_p (basic_block
, basic_block
);
115 static int noce_find_if_block (basic_block
, edge
, edge
, int);
116 static int cond_exec_find_if_block (ce_if_block
*);
117 static int find_if_case_1 (basic_block
, edge
, edge
);
118 static int find_if_case_2 (basic_block
, edge
, edge
);
119 static int dead_or_predicable (basic_block
, basic_block
, basic_block
,
121 static void noce_emit_move_insn (rtx
, rtx
);
122 static rtx_insn
*block_has_only_trap (basic_block
);
124 /* Count the number of non-jump active insns in BB. */
127 count_bb_insns (const_basic_block bb
)
130 rtx_insn
*insn
= BB_HEAD (bb
);
134 if (active_insn_p (insn
) && !JUMP_P (insn
))
137 if (insn
== BB_END (bb
))
139 insn
= NEXT_INSN (insn
);
145 /* Determine whether the total insn_rtx_cost on non-jump insns in
146 basic block BB is less than MAX_COST. This function returns
147 false if the cost of any instruction could not be estimated.
149 The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE
150 as those insns are being speculated. MAX_COST is scaled with SCALE
151 plus a small fudge factor. */
154 cheap_bb_rtx_cost_p (const_basic_block bb
, int scale
, int max_cost
)
157 rtx_insn
*insn
= BB_HEAD (bb
);
158 bool speed
= optimize_bb_for_speed_p (bb
);
160 /* Set scale to REG_BR_PROB_BASE to void the identical scaling
161 applied to insn_rtx_cost when optimizing for size. Only do
162 this after combine because if-conversion might interfere with
163 passes before combine.
165 Use optimize_function_for_speed_p instead of the pre-defined
166 variable speed to make sure it is set to same value for all
167 basic blocks in one if-conversion transformation. */
168 if (!optimize_function_for_speed_p (cfun
) && ifcvt_after_combine
)
169 scale
= REG_BR_PROB_BASE
;
170 /* Our branch probability/scaling factors are just estimates and don't
171 account for cases where we can get speculation for free and other
172 secondary benefits. So we fudge the scale factor to make speculating
173 appear a little more profitable when optimizing for performance. */
175 scale
+= REG_BR_PROB_BASE
/ 8;
182 if (NONJUMP_INSN_P (insn
))
184 int cost
= insn_rtx_cost (PATTERN (insn
), speed
) * REG_BR_PROB_BASE
;
188 /* If this instruction is the load or set of a "stack" register,
189 such as a floating point register on x87, then the cost of
190 speculatively executing this insn may need to include
191 the additional cost of popping its result off of the
192 register stack. Unfortunately, correctly recognizing and
193 accounting for this additional overhead is tricky, so for
194 now we simply prohibit such speculative execution. */
197 rtx set
= single_set (insn
);
198 if (set
&& STACK_REG_P (SET_DEST (set
)))
204 if (count
>= max_cost
)
207 else if (CALL_P (insn
))
210 if (insn
== BB_END (bb
))
212 insn
= NEXT_INSN (insn
);
218 /* Return the first non-jump active insn in the basic block. */
221 first_active_insn (basic_block bb
)
223 rtx_insn
*insn
= BB_HEAD (bb
);
227 if (insn
== BB_END (bb
))
229 insn
= NEXT_INSN (insn
);
232 while (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
234 if (insn
== BB_END (bb
))
236 insn
= NEXT_INSN (insn
);
245 /* Return the last non-jump active (non-jump) insn in the basic block. */
248 last_active_insn (basic_block bb
, int skip_use_p
)
250 rtx_insn
*insn
= BB_END (bb
);
251 rtx_insn
*head
= BB_HEAD (bb
);
255 || DEBUG_INSN_P (insn
)
257 && NONJUMP_INSN_P (insn
)
258 && GET_CODE (PATTERN (insn
)) == USE
))
262 insn
= PREV_INSN (insn
);
271 /* Return the active insn before INSN inside basic block CURR_BB. */
274 find_active_insn_before (basic_block curr_bb
, rtx_insn
*insn
)
276 if (!insn
|| insn
== BB_HEAD (curr_bb
))
279 while ((insn
= PREV_INSN (insn
)) != NULL_RTX
)
281 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
284 /* No other active insn all the way to the start of the basic block. */
285 if (insn
== BB_HEAD (curr_bb
))
292 /* Return the active insn after INSN inside basic block CURR_BB. */
295 find_active_insn_after (basic_block curr_bb
, rtx_insn
*insn
)
297 if (!insn
|| insn
== BB_END (curr_bb
))
300 while ((insn
= NEXT_INSN (insn
)) != NULL_RTX
)
302 if (NONJUMP_INSN_P (insn
) || JUMP_P (insn
) || CALL_P (insn
))
305 /* No other active insn all the way to the end of the basic block. */
306 if (insn
== BB_END (curr_bb
))
313 /* Return the basic block reached by falling though the basic block BB. */
316 block_fallthru (basic_block bb
)
318 edge e
= find_fallthru_edge (bb
->succs
);
320 return (e
) ? e
->dest
: NULL_BLOCK
;
323 /* Return true if RTXs A and B can be safely interchanged. */
326 rtx_interchangeable_p (const_rtx a
, const_rtx b
)
328 if (!rtx_equal_p (a
, b
))
331 if (GET_CODE (a
) != MEM
)
334 /* A dead type-unsafe memory reference is legal, but a live type-unsafe memory
335 reference is not. Interchanging a dead type-unsafe memory reference with
336 a live type-safe one creates a live type-unsafe memory reference, in other
337 words, it makes the program illegal.
338 We check here conservatively whether the two memory references have equal
339 memory attributes. */
341 return mem_attrs_eq_p (get_mem_attrs (a
), get_mem_attrs (b
));
345 /* Go through a bunch of insns, converting them to conditional
346 execution format if possible. Return TRUE if all of the non-note
347 insns were processed. */
350 cond_exec_process_insns (ce_if_block
*ce_info ATTRIBUTE_UNUSED
,
351 /* if block information */rtx_insn
*start
,
352 /* first insn to look at */rtx end
,
353 /* last insn to look at */rtx test
,
354 /* conditional execution test */int prob_val
,
355 /* probability of branch taken. */int mod_ok
)
357 int must_be_last
= FALSE
;
365 for (insn
= start
; ; insn
= NEXT_INSN (insn
))
367 /* dwarf2out can't cope with conditional prologues. */
368 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_PROLOGUE_END
)
371 if (NOTE_P (insn
) || DEBUG_INSN_P (insn
))
374 gcc_assert (NONJUMP_INSN_P (insn
) || CALL_P (insn
));
376 /* dwarf2out can't cope with conditional unwind info. */
377 if (RTX_FRAME_RELATED_P (insn
))
380 /* Remove USE insns that get in the way. */
381 if (reload_completed
&& GET_CODE (PATTERN (insn
)) == USE
)
383 /* ??? Ug. Actually unlinking the thing is problematic,
384 given what we'd have to coordinate with our callers. */
385 SET_INSN_DELETED (insn
);
389 /* Last insn wasn't last? */
393 if (modified_in_p (test
, insn
))
400 /* Now build the conditional form of the instruction. */
401 pattern
= PATTERN (insn
);
402 xtest
= copy_rtx (test
);
404 /* If this is already a COND_EXEC, rewrite the test to be an AND of the
406 if (GET_CODE (pattern
) == COND_EXEC
)
408 if (GET_MODE (xtest
) != GET_MODE (COND_EXEC_TEST (pattern
)))
411 xtest
= gen_rtx_AND (GET_MODE (xtest
), xtest
,
412 COND_EXEC_TEST (pattern
));
413 pattern
= COND_EXEC_CODE (pattern
);
416 pattern
= gen_rtx_COND_EXEC (VOIDmode
, xtest
, pattern
);
418 /* If the machine needs to modify the insn being conditionally executed,
419 say for example to force a constant integer operand into a temp
420 register, do so here. */
421 #ifdef IFCVT_MODIFY_INSN
422 IFCVT_MODIFY_INSN (ce_info
, pattern
, insn
);
427 validate_change (insn
, &PATTERN (insn
), pattern
, 1);
429 if (CALL_P (insn
) && prob_val
>= 0)
430 validate_change (insn
, ®_NOTES (insn
),
431 gen_rtx_INT_LIST ((machine_mode
) REG_BR_PROB
,
432 prob_val
, REG_NOTES (insn
)), 1);
442 /* Return the condition for a jump. Do not do any special processing. */
445 cond_exec_get_condition (rtx_insn
*jump
)
449 if (any_condjump_p (jump
))
450 test_if
= SET_SRC (pc_set (jump
));
453 cond
= XEXP (test_if
, 0);
455 /* If this branches to JUMP_LABEL when the condition is false,
456 reverse the condition. */
457 if (GET_CODE (XEXP (test_if
, 2)) == LABEL_REF
458 && LABEL_REF_LABEL (XEXP (test_if
, 2)) == JUMP_LABEL (jump
))
460 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
464 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
471 /* Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it
472 to conditional execution. Return TRUE if we were successful at
473 converting the block. */
476 cond_exec_process_if_block (ce_if_block
* ce_info
,
477 /* if block information */int do_multiple_p
)
479 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
480 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
481 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
482 rtx test_expr
; /* expression in IF_THEN_ELSE that is tested */
483 rtx_insn
*then_start
; /* first insn in THEN block */
484 rtx_insn
*then_end
; /* last insn + 1 in THEN block */
485 rtx_insn
*else_start
= NULL
; /* first insn in ELSE block or NULL */
486 rtx_insn
*else_end
= NULL
; /* last insn + 1 in ELSE block */
487 int max
; /* max # of insns to convert. */
488 int then_mod_ok
; /* whether conditional mods are ok in THEN */
489 rtx true_expr
; /* test for else block insns */
490 rtx false_expr
; /* test for then block insns */
491 int true_prob_val
; /* probability of else block */
492 int false_prob_val
; /* probability of then block */
493 rtx_insn
*then_last_head
= NULL
; /* Last match at the head of THEN */
494 rtx_insn
*else_last_head
= NULL
; /* Last match at the head of ELSE */
495 rtx_insn
*then_first_tail
= NULL
; /* First match at the tail of THEN */
496 rtx_insn
*else_first_tail
= NULL
; /* First match at the tail of ELSE */
497 int then_n_insns
, else_n_insns
, n_insns
;
498 enum rtx_code false_code
;
501 /* If test is comprised of && or || elements, and we've failed at handling
502 all of them together, just use the last test if it is the special case of
503 && elements without an ELSE block. */
504 if (!do_multiple_p
&& ce_info
->num_multiple_test_blocks
)
506 if (else_bb
|| ! ce_info
->and_and_p
)
509 ce_info
->test_bb
= test_bb
= ce_info
->last_test_bb
;
510 ce_info
->num_multiple_test_blocks
= 0;
511 ce_info
->num_and_and_blocks
= 0;
512 ce_info
->num_or_or_blocks
= 0;
515 /* Find the conditional jump to the ELSE or JOIN part, and isolate
517 test_expr
= cond_exec_get_condition (BB_END (test_bb
));
521 /* If the conditional jump is more than just a conditional jump,
522 then we can not do conditional execution conversion on this block. */
523 if (! onlyjump_p (BB_END (test_bb
)))
526 /* Collect the bounds of where we're to search, skipping any labels, jumps
527 and notes at the beginning and end of the block. Then count the total
528 number of insns and see if it is small enough to convert. */
529 then_start
= first_active_insn (then_bb
);
530 then_end
= last_active_insn (then_bb
, TRUE
);
531 then_n_insns
= ce_info
->num_then_insns
= count_bb_insns (then_bb
);
532 n_insns
= then_n_insns
;
533 max
= MAX_CONDITIONAL_EXECUTE
;
540 else_start
= first_active_insn (else_bb
);
541 else_end
= last_active_insn (else_bb
, TRUE
);
542 else_n_insns
= ce_info
->num_else_insns
= count_bb_insns (else_bb
);
543 n_insns
+= else_n_insns
;
545 /* Look for matching sequences at the head and tail of the two blocks,
546 and limit the range of insns to be converted if possible. */
547 n_matching
= flow_find_cross_jump (then_bb
, else_bb
,
548 &then_first_tail
, &else_first_tail
,
550 if (then_first_tail
== BB_HEAD (then_bb
))
551 then_start
= then_end
= NULL
;
552 if (else_first_tail
== BB_HEAD (else_bb
))
553 else_start
= else_end
= NULL
;
558 then_end
= find_active_insn_before (then_bb
, then_first_tail
);
560 else_end
= find_active_insn_before (else_bb
, else_first_tail
);
561 n_insns
-= 2 * n_matching
;
566 && then_n_insns
> n_matching
567 && else_n_insns
> n_matching
)
569 int longest_match
= MIN (then_n_insns
- n_matching
,
570 else_n_insns
- n_matching
);
572 = flow_find_head_matching_sequence (then_bb
, else_bb
,
581 /* We won't pass the insns in the head sequence to
582 cond_exec_process_insns, so we need to test them here
583 to make sure that they don't clobber the condition. */
584 for (insn
= BB_HEAD (then_bb
);
585 insn
!= NEXT_INSN (then_last_head
);
586 insn
= NEXT_INSN (insn
))
587 if (!LABEL_P (insn
) && !NOTE_P (insn
)
588 && !DEBUG_INSN_P (insn
)
589 && modified_in_p (test_expr
, insn
))
593 if (then_last_head
== then_end
)
594 then_start
= then_end
= NULL
;
595 if (else_last_head
== else_end
)
596 else_start
= else_end
= NULL
;
601 then_start
= find_active_insn_after (then_bb
, then_last_head
);
603 else_start
= find_active_insn_after (else_bb
, else_last_head
);
604 n_insns
-= 2 * n_matching
;
612 /* Map test_expr/test_jump into the appropriate MD tests to use on
613 the conditionally executed code. */
615 true_expr
= test_expr
;
617 false_code
= reversed_comparison_code (true_expr
, BB_END (test_bb
));
618 if (false_code
!= UNKNOWN
)
619 false_expr
= gen_rtx_fmt_ee (false_code
, GET_MODE (true_expr
),
620 XEXP (true_expr
, 0), XEXP (true_expr
, 1));
622 false_expr
= NULL_RTX
;
624 #ifdef IFCVT_MODIFY_TESTS
625 /* If the machine description needs to modify the tests, such as setting a
626 conditional execution register from a comparison, it can do so here. */
627 IFCVT_MODIFY_TESTS (ce_info
, true_expr
, false_expr
);
629 /* See if the conversion failed. */
630 if (!true_expr
|| !false_expr
)
634 note
= find_reg_note (BB_END (test_bb
), REG_BR_PROB
, NULL_RTX
);
637 true_prob_val
= XINT (note
, 0);
638 false_prob_val
= REG_BR_PROB_BASE
- true_prob_val
;
646 /* If we have && or || tests, do them here. These tests are in the adjacent
647 blocks after the first block containing the test. */
648 if (ce_info
->num_multiple_test_blocks
> 0)
650 basic_block bb
= test_bb
;
651 basic_block last_test_bb
= ce_info
->last_test_bb
;
658 rtx_insn
*start
, *end
;
660 enum rtx_code f_code
;
662 bb
= block_fallthru (bb
);
663 start
= first_active_insn (bb
);
664 end
= last_active_insn (bb
, TRUE
);
666 && ! cond_exec_process_insns (ce_info
, start
, end
, false_expr
,
667 false_prob_val
, FALSE
))
670 /* If the conditional jump is more than just a conditional jump, then
671 we can not do conditional execution conversion on this block. */
672 if (! onlyjump_p (BB_END (bb
)))
675 /* Find the conditional jump and isolate the test. */
676 t
= cond_exec_get_condition (BB_END (bb
));
680 f_code
= reversed_comparison_code (t
, BB_END (bb
));
681 if (f_code
== UNKNOWN
)
684 f
= gen_rtx_fmt_ee (f_code
, GET_MODE (t
), XEXP (t
, 0), XEXP (t
, 1));
685 if (ce_info
->and_and_p
)
687 t
= gen_rtx_AND (GET_MODE (t
), true_expr
, t
);
688 f
= gen_rtx_IOR (GET_MODE (t
), false_expr
, f
);
692 t
= gen_rtx_IOR (GET_MODE (t
), true_expr
, t
);
693 f
= gen_rtx_AND (GET_MODE (t
), false_expr
, f
);
696 /* If the machine description needs to modify the tests, such as
697 setting a conditional execution register from a comparison, it can
699 #ifdef IFCVT_MODIFY_MULTIPLE_TESTS
700 IFCVT_MODIFY_MULTIPLE_TESTS (ce_info
, bb
, t
, f
);
702 /* See if the conversion failed. */
710 while (bb
!= last_test_bb
);
713 /* For IF-THEN-ELSE blocks, we don't allow modifications of the test
714 on then THEN block. */
715 then_mod_ok
= (else_bb
== NULL_BLOCK
);
717 /* Go through the THEN and ELSE blocks converting the insns if possible
718 to conditional execution. */
722 || ! cond_exec_process_insns (ce_info
, then_start
, then_end
,
723 false_expr
, false_prob_val
,
727 if (else_bb
&& else_end
728 && ! cond_exec_process_insns (ce_info
, else_start
, else_end
,
729 true_expr
, true_prob_val
, TRUE
))
732 /* If we cannot apply the changes, fail. Do not go through the normal fail
733 processing, since apply_change_group will call cancel_changes. */
734 if (! apply_change_group ())
736 #ifdef IFCVT_MODIFY_CANCEL
737 /* Cancel any machine dependent changes. */
738 IFCVT_MODIFY_CANCEL (ce_info
);
743 #ifdef IFCVT_MODIFY_FINAL
744 /* Do any machine dependent final modifications. */
745 IFCVT_MODIFY_FINAL (ce_info
);
748 /* Conversion succeeded. */
750 fprintf (dump_file
, "%d insn%s converted to conditional execution.\n",
751 n_insns
, (n_insns
== 1) ? " was" : "s were");
753 /* Merge the blocks! If we had matching sequences, make sure to delete one
754 copy at the appropriate location first: delete the copy in the THEN branch
755 for a tail sequence so that the remaining one is executed last for both
756 branches, and delete the copy in the ELSE branch for a head sequence so
757 that the remaining one is executed first for both branches. */
760 rtx_insn
*from
= then_first_tail
;
762 from
= find_active_insn_after (then_bb
, from
);
763 delete_insn_chain (from
, BB_END (then_bb
), false);
766 delete_insn_chain (first_active_insn (else_bb
), else_last_head
, false);
768 merge_if_block (ce_info
);
769 cond_exec_changed_p
= TRUE
;
773 #ifdef IFCVT_MODIFY_CANCEL
774 /* Cancel any machine dependent changes. */
775 IFCVT_MODIFY_CANCEL (ce_info
);
782 /* Used by noce_process_if_block to communicate with its subroutines.
784 The subroutines know that A and B may be evaluated freely. They
785 know that X is a register. They should insert new instructions
786 before cond_earliest. */
790 /* The basic blocks that make up the IF-THEN-{ELSE-,}JOIN block. */
791 basic_block test_bb
, then_bb
, else_bb
, join_bb
;
793 /* The jump that ends TEST_BB. */
796 /* The jump condition. */
799 /* New insns should be inserted before this one. */
800 rtx_insn
*cond_earliest
;
802 /* Insns in the THEN and ELSE block. There is always just this
803 one insns in those blocks. The insns are single_set insns.
804 If there was no ELSE block, INSN_B is the last insn before
805 COND_EARLIEST, or NULL_RTX. In the former case, the insn
806 operands are still valid, as if INSN_B was moved down below
808 rtx_insn
*insn_a
, *insn_b
;
810 /* The SET_SRC of INSN_A and INSN_B. */
813 /* The SET_DEST of INSN_A. */
816 /* True if this if block is not canonical. In the canonical form of
817 if blocks, the THEN_BB is the block reached via the fallthru edge
818 from TEST_BB. For the noce transformations, we allow the symmetric
820 bool then_else_reversed
;
822 /* Estimated cost of the particular branch instruction. */
826 static rtx
noce_emit_store_flag (struct noce_if_info
*, rtx
, int, int);
827 static int noce_try_move (struct noce_if_info
*);
828 static int noce_try_store_flag (struct noce_if_info
*);
829 static int noce_try_addcc (struct noce_if_info
*);
830 static int noce_try_store_flag_constants (struct noce_if_info
*);
831 static int noce_try_store_flag_mask (struct noce_if_info
*);
832 static rtx
noce_emit_cmove (struct noce_if_info
*, rtx
, enum rtx_code
, rtx
,
834 static int noce_try_cmove (struct noce_if_info
*);
835 static int noce_try_cmove_arith (struct noce_if_info
*);
836 static rtx
noce_get_alt_condition (struct noce_if_info
*, rtx
, rtx_insn
**);
837 static int noce_try_minmax (struct noce_if_info
*);
838 static int noce_try_abs (struct noce_if_info
*);
839 static int noce_try_sign_mask (struct noce_if_info
*);
841 /* Helper function for noce_try_store_flag*. */
844 noce_emit_store_flag (struct noce_if_info
*if_info
, rtx x
, int reversep
,
847 rtx cond
= if_info
->cond
;
851 cond_complex
= (! general_operand (XEXP (cond
, 0), VOIDmode
)
852 || ! general_operand (XEXP (cond
, 1), VOIDmode
));
854 /* If earliest == jump, or when the condition is complex, try to
855 build the store_flag insn directly. */
859 rtx set
= pc_set (if_info
->jump
);
860 cond
= XEXP (SET_SRC (set
), 0);
861 if (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
862 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
))
863 reversep
= !reversep
;
864 if (if_info
->then_else_reversed
)
865 reversep
= !reversep
;
869 code
= reversed_comparison_code (cond
, if_info
->jump
);
871 code
= GET_CODE (cond
);
873 if ((if_info
->cond_earliest
== if_info
->jump
|| cond_complex
)
874 && (normalize
== 0 || STORE_FLAG_VALUE
== normalize
))
876 rtx src
= gen_rtx_fmt_ee (code
, GET_MODE (x
), XEXP (cond
, 0),
878 rtx set
= gen_rtx_SET (VOIDmode
, x
, src
);
881 rtx_insn
*insn
= emit_insn (set
);
883 if (recog_memoized (insn
) >= 0)
885 rtx_insn
*seq
= get_insns ();
889 if_info
->cond_earliest
= if_info
->jump
;
897 /* Don't even try if the comparison operands or the mode of X are weird. */
898 if (cond_complex
|| !SCALAR_INT_MODE_P (GET_MODE (x
)))
901 return emit_store_flag (x
, code
, XEXP (cond
, 0),
902 XEXP (cond
, 1), VOIDmode
,
903 (code
== LTU
|| code
== LEU
904 || code
== GEU
|| code
== GTU
), normalize
);
907 /* Emit instruction to move an rtx, possibly into STRICT_LOW_PART.
908 X is the destination/target and Y is the value to copy. */
911 noce_emit_move_insn (rtx x
, rtx y
)
913 machine_mode outmode
;
917 if (GET_CODE (x
) != STRICT_LOW_PART
)
919 rtx_insn
*seq
, *insn
;
924 /* Check that the SET_SRC is reasonable before calling emit_move_insn,
925 otherwise construct a suitable SET pattern ourselves. */
926 insn
= (OBJECT_P (y
) || CONSTANT_P (y
) || GET_CODE (y
) == SUBREG
)
927 ? emit_move_insn (x
, y
)
928 : emit_insn (gen_rtx_SET (VOIDmode
, x
, y
));
932 if (recog_memoized (insn
) <= 0)
934 if (GET_CODE (x
) == ZERO_EXTRACT
)
936 rtx op
= XEXP (x
, 0);
937 unsigned HOST_WIDE_INT size
= INTVAL (XEXP (x
, 1));
938 unsigned HOST_WIDE_INT start
= INTVAL (XEXP (x
, 2));
940 /* store_bit_field expects START to be relative to
941 BYTES_BIG_ENDIAN and adjusts this value for machines with
942 BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
943 invoke store_bit_field again it is necessary to have the START
944 value from the first call. */
945 if (BITS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
948 start
= BITS_PER_UNIT
- start
- size
;
951 gcc_assert (REG_P (op
));
952 start
= BITS_PER_WORD
- start
- size
;
956 gcc_assert (start
< (MEM_P (op
) ? BITS_PER_UNIT
: BITS_PER_WORD
));
957 store_bit_field (op
, size
, start
, 0, 0, GET_MODE (x
), y
);
961 switch (GET_RTX_CLASS (GET_CODE (y
)))
964 ot
= code_to_optab (GET_CODE (y
));
968 target
= expand_unop (GET_MODE (y
), ot
, XEXP (y
, 0), x
, 0);
969 if (target
!= NULL_RTX
)
972 emit_move_insn (x
, target
);
981 ot
= code_to_optab (GET_CODE (y
));
985 target
= expand_binop (GET_MODE (y
), ot
,
986 XEXP (y
, 0), XEXP (y
, 1),
988 if (target
!= NULL_RTX
)
991 emit_move_insn (x
, target
);
1007 outer
= XEXP (x
, 0);
1008 inner
= XEXP (outer
, 0);
1009 outmode
= GET_MODE (outer
);
1010 bitpos
= SUBREG_BYTE (outer
) * BITS_PER_UNIT
;
1011 store_bit_field (inner
, GET_MODE_BITSIZE (outmode
), bitpos
,
1015 /* Return sequence of instructions generated by if conversion. This
1016 function calls end_sequence() to end the current stream, ensures
1017 that are instructions are unshared, recognizable non-jump insns.
1018 On failure, this function returns a NULL_RTX. */
1021 end_ifcvt_sequence (struct noce_if_info
*if_info
)
1024 rtx_insn
*seq
= get_insns ();
1026 set_used_flags (if_info
->x
);
1027 set_used_flags (if_info
->cond
);
1028 set_used_flags (if_info
->a
);
1029 set_used_flags (if_info
->b
);
1030 unshare_all_rtl_in_chain (seq
);
1033 /* Make sure that all of the instructions emitted are recognizable,
1034 and that we haven't introduced a new jump instruction.
1035 As an exercise for the reader, build a general mechanism that
1036 allows proper placement of required clobbers. */
1037 for (insn
= seq
; insn
; insn
= NEXT_INSN (insn
))
1039 || recog_memoized (insn
) == -1)
1045 /* Convert "if (a != b) x = a; else x = b" into "x = a" and
1046 "if (a == b) x = a; else x = b" into "x = b". */
1049 noce_try_move (struct noce_if_info
*if_info
)
1051 rtx cond
= if_info
->cond
;
1052 enum rtx_code code
= GET_CODE (cond
);
1056 if (code
!= NE
&& code
!= EQ
)
1059 /* This optimization isn't valid if either A or B could be a NaN
1060 or a signed zero. */
1061 if (HONOR_NANS (GET_MODE (if_info
->x
))
1062 || HONOR_SIGNED_ZEROS (GET_MODE (if_info
->x
)))
1065 /* Check whether the operands of the comparison are A and in
1067 if ((rtx_equal_p (if_info
->a
, XEXP (cond
, 0))
1068 && rtx_equal_p (if_info
->b
, XEXP (cond
, 1)))
1069 || (rtx_equal_p (if_info
->a
, XEXP (cond
, 1))
1070 && rtx_equal_p (if_info
->b
, XEXP (cond
, 0))))
1072 if (!rtx_interchangeable_p (if_info
->a
, if_info
->b
))
1075 y
= (code
== EQ
) ? if_info
->a
: if_info
->b
;
1077 /* Avoid generating the move if the source is the destination. */
1078 if (! rtx_equal_p (if_info
->x
, y
))
1081 noce_emit_move_insn (if_info
->x
, y
);
1082 seq
= end_ifcvt_sequence (if_info
);
1086 emit_insn_before_setloc (seq
, if_info
->jump
,
1087 INSN_LOCATION (if_info
->insn_a
));
1094 /* Convert "if (test) x = 1; else x = 0".
1096 Only try 0 and STORE_FLAG_VALUE here. Other combinations will be
1097 tried in noce_try_store_flag_constants after noce_try_cmove has had
1098 a go at the conversion. */
1101 noce_try_store_flag (struct noce_if_info
*if_info
)
1107 if (CONST_INT_P (if_info
->b
)
1108 && INTVAL (if_info
->b
) == STORE_FLAG_VALUE
1109 && if_info
->a
== const0_rtx
)
1111 else if (if_info
->b
== const0_rtx
1112 && CONST_INT_P (if_info
->a
)
1113 && INTVAL (if_info
->a
) == STORE_FLAG_VALUE
1114 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1122 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, 0);
1125 if (target
!= if_info
->x
)
1126 noce_emit_move_insn (if_info
->x
, target
);
1128 seq
= end_ifcvt_sequence (if_info
);
1132 emit_insn_before_setloc (seq
, if_info
->jump
,
1133 INSN_LOCATION (if_info
->insn_a
));
1143 /* Convert "if (test) x = a; else x = b", for A and B constant. */
1146 noce_try_store_flag_constants (struct noce_if_info
*if_info
)
1151 HOST_WIDE_INT itrue
, ifalse
, diff
, tmp
;
1152 int normalize
, can_reverse
;
1155 if (CONST_INT_P (if_info
->a
)
1156 && CONST_INT_P (if_info
->b
))
1158 mode
= GET_MODE (if_info
->x
);
1159 ifalse
= INTVAL (if_info
->a
);
1160 itrue
= INTVAL (if_info
->b
);
1162 diff
= (unsigned HOST_WIDE_INT
) itrue
- ifalse
;
1163 /* Make sure we can represent the difference between the two values. */
1165 != ((ifalse
< 0) != (itrue
< 0) ? ifalse
< 0 : ifalse
< itrue
))
1168 diff
= trunc_int_for_mode (diff
, mode
);
1170 can_reverse
= (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1174 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1176 else if (ifalse
== 0 && exact_log2 (itrue
) >= 0
1177 && (STORE_FLAG_VALUE
== 1
1178 || if_info
->branch_cost
>= 2))
1180 else if (itrue
== 0 && exact_log2 (ifalse
) >= 0 && can_reverse
1181 && (STORE_FLAG_VALUE
== 1 || if_info
->branch_cost
>= 2))
1182 normalize
= 1, reversep
= 1;
1183 else if (itrue
== -1
1184 && (STORE_FLAG_VALUE
== -1
1185 || if_info
->branch_cost
>= 2))
1187 else if (ifalse
== -1 && can_reverse
1188 && (STORE_FLAG_VALUE
== -1 || if_info
->branch_cost
>= 2))
1189 normalize
= -1, reversep
= 1;
1190 else if ((if_info
->branch_cost
>= 2 && STORE_FLAG_VALUE
== -1)
1191 || if_info
->branch_cost
>= 3)
1198 tmp
= itrue
; itrue
= ifalse
; ifalse
= tmp
;
1199 diff
= trunc_int_for_mode (-(unsigned HOST_WIDE_INT
) diff
, mode
);
1203 target
= noce_emit_store_flag (if_info
, if_info
->x
, reversep
, normalize
);
1210 /* if (test) x = 3; else x = 4;
1211 => x = 3 + (test == 0); */
1212 if (diff
== STORE_FLAG_VALUE
|| diff
== -STORE_FLAG_VALUE
)
1214 target
= expand_simple_binop (mode
,
1215 (diff
== STORE_FLAG_VALUE
1217 gen_int_mode (ifalse
, mode
), target
,
1218 if_info
->x
, 0, OPTAB_WIDEN
);
1221 /* if (test) x = 8; else x = 0;
1222 => x = (test != 0) << 3; */
1223 else if (ifalse
== 0 && (tmp
= exact_log2 (itrue
)) >= 0)
1225 target
= expand_simple_binop (mode
, ASHIFT
,
1226 target
, GEN_INT (tmp
), if_info
->x
, 0,
1230 /* if (test) x = -1; else x = b;
1231 => x = -(test != 0) | b; */
1232 else if (itrue
== -1)
1234 target
= expand_simple_binop (mode
, IOR
,
1235 target
, gen_int_mode (ifalse
, mode
),
1236 if_info
->x
, 0, OPTAB_WIDEN
);
1239 /* if (test) x = a; else x = b;
1240 => x = (-(test != 0) & (b - a)) + a; */
1243 target
= expand_simple_binop (mode
, AND
,
1244 target
, gen_int_mode (diff
, mode
),
1245 if_info
->x
, 0, OPTAB_WIDEN
);
1247 target
= expand_simple_binop (mode
, PLUS
,
1248 target
, gen_int_mode (ifalse
, mode
),
1249 if_info
->x
, 0, OPTAB_WIDEN
);
1258 if (target
!= if_info
->x
)
1259 noce_emit_move_insn (if_info
->x
, target
);
1261 seq
= end_ifcvt_sequence (if_info
);
1265 emit_insn_before_setloc (seq
, if_info
->jump
,
1266 INSN_LOCATION (if_info
->insn_a
));
1273 /* Convert "if (test) foo++" into "foo += (test != 0)", and
1274 similarly for "foo--". */
1277 noce_try_addcc (struct noce_if_info
*if_info
)
1281 int subtract
, normalize
;
1283 if (GET_CODE (if_info
->a
) == PLUS
1284 && rtx_equal_p (XEXP (if_info
->a
, 0), if_info
->b
)
1285 && (reversed_comparison_code (if_info
->cond
, if_info
->jump
)
1288 rtx cond
= if_info
->cond
;
1289 enum rtx_code code
= reversed_comparison_code (cond
, if_info
->jump
);
1291 /* First try to use addcc pattern. */
1292 if (general_operand (XEXP (cond
, 0), VOIDmode
)
1293 && general_operand (XEXP (cond
, 1), VOIDmode
))
1296 target
= emit_conditional_add (if_info
->x
, code
,
1301 XEXP (if_info
->a
, 1),
1302 GET_MODE (if_info
->x
),
1303 (code
== LTU
|| code
== GEU
1304 || code
== LEU
|| code
== GTU
));
1307 if (target
!= if_info
->x
)
1308 noce_emit_move_insn (if_info
->x
, target
);
1310 seq
= end_ifcvt_sequence (if_info
);
1314 emit_insn_before_setloc (seq
, if_info
->jump
,
1315 INSN_LOCATION (if_info
->insn_a
));
1321 /* If that fails, construct conditional increment or decrement using
1323 if (if_info
->branch_cost
>= 2
1324 && (XEXP (if_info
->a
, 1) == const1_rtx
1325 || XEXP (if_info
->a
, 1) == constm1_rtx
))
1328 if (STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1329 subtract
= 0, normalize
= 0;
1330 else if (-STORE_FLAG_VALUE
== INTVAL (XEXP (if_info
->a
, 1)))
1331 subtract
= 1, normalize
= 0;
1333 subtract
= 0, normalize
= INTVAL (XEXP (if_info
->a
, 1));
1336 target
= noce_emit_store_flag (if_info
,
1337 gen_reg_rtx (GET_MODE (if_info
->x
)),
1341 target
= expand_simple_binop (GET_MODE (if_info
->x
),
1342 subtract
? MINUS
: PLUS
,
1343 if_info
->b
, target
, if_info
->x
,
1347 if (target
!= if_info
->x
)
1348 noce_emit_move_insn (if_info
->x
, target
);
1350 seq
= end_ifcvt_sequence (if_info
);
1354 emit_insn_before_setloc (seq
, if_info
->jump
,
1355 INSN_LOCATION (if_info
->insn_a
));
1365 /* Convert "if (test) x = 0;" to "x &= -(test == 0);" */
1368 noce_try_store_flag_mask (struct noce_if_info
*if_info
)
1375 if ((if_info
->branch_cost
>= 2
1376 || STORE_FLAG_VALUE
== -1)
1377 && ((if_info
->a
== const0_rtx
1378 && rtx_equal_p (if_info
->b
, if_info
->x
))
1379 || ((reversep
= (reversed_comparison_code (if_info
->cond
,
1382 && if_info
->b
== const0_rtx
1383 && rtx_equal_p (if_info
->a
, if_info
->x
))))
1386 target
= noce_emit_store_flag (if_info
,
1387 gen_reg_rtx (GET_MODE (if_info
->x
)),
1390 target
= expand_simple_binop (GET_MODE (if_info
->x
), AND
,
1392 target
, if_info
->x
, 0,
1397 int old_cost
, new_cost
, insn_cost
;
1400 if (target
!= if_info
->x
)
1401 noce_emit_move_insn (if_info
->x
, target
);
1403 seq
= end_ifcvt_sequence (if_info
);
1407 speed_p
= optimize_bb_for_speed_p (BLOCK_FOR_INSN (if_info
->insn_a
));
1408 insn_cost
= insn_rtx_cost (PATTERN (if_info
->insn_a
), speed_p
);
1409 old_cost
= COSTS_N_INSNS (if_info
->branch_cost
) + insn_cost
;
1410 new_cost
= seq_cost (seq
, speed_p
);
1412 if (new_cost
> old_cost
)
1415 emit_insn_before_setloc (seq
, if_info
->jump
,
1416 INSN_LOCATION (if_info
->insn_a
));
1426 /* Helper function for noce_try_cmove and noce_try_cmove_arith. */
1429 noce_emit_cmove (struct noce_if_info
*if_info
, rtx x
, enum rtx_code code
,
1430 rtx cmp_a
, rtx cmp_b
, rtx vfalse
, rtx vtrue
)
1432 rtx target ATTRIBUTE_UNUSED
;
1433 int unsignedp ATTRIBUTE_UNUSED
;
1435 /* If earliest == jump, try to build the cmove insn directly.
1436 This is helpful when combine has created some complex condition
1437 (like for alpha's cmovlbs) that we can't hope to regenerate
1438 through the normal interface. */
1440 if (if_info
->cond_earliest
== if_info
->jump
)
1442 rtx cond
= gen_rtx_fmt_ee (code
, GET_MODE (if_info
->cond
), cmp_a
, cmp_b
);
1443 rtx if_then_else
= gen_rtx_IF_THEN_ELSE (GET_MODE (x
),
1444 cond
, vtrue
, vfalse
);
1445 rtx set
= gen_rtx_SET (VOIDmode
, x
, if_then_else
);
1448 rtx_insn
*insn
= emit_insn (set
);
1450 if (recog_memoized (insn
) >= 0)
1452 rtx_insn
*seq
= get_insns ();
1462 /* Don't even try if the comparison operands are weird. */
1463 if (! general_operand (cmp_a
, GET_MODE (cmp_a
))
1464 || ! general_operand (cmp_b
, GET_MODE (cmp_b
)))
1467 #if HAVE_conditional_move
1468 unsignedp
= (code
== LTU
|| code
== GEU
1469 || code
== LEU
|| code
== GTU
);
1471 target
= emit_conditional_move (x
, code
, cmp_a
, cmp_b
, VOIDmode
,
1472 vtrue
, vfalse
, GET_MODE (x
),
1477 /* We might be faced with a situation like:
1480 vtrue = (subreg:M (reg:N VTRUE) BYTE)
1481 vfalse = (subreg:M (reg:N VFALSE) BYTE)
1483 We can't do a conditional move in mode M, but it's possible that we
1484 could do a conditional move in mode N instead and take a subreg of
1487 If we can't create new pseudos, though, don't bother. */
1488 if (reload_completed
)
1491 if (GET_CODE (vtrue
) == SUBREG
&& GET_CODE (vfalse
) == SUBREG
)
1493 rtx reg_vtrue
= SUBREG_REG (vtrue
);
1494 rtx reg_vfalse
= SUBREG_REG (vfalse
);
1495 unsigned int byte_vtrue
= SUBREG_BYTE (vtrue
);
1496 unsigned int byte_vfalse
= SUBREG_BYTE (vfalse
);
1497 rtx promoted_target
;
1499 if (GET_MODE (reg_vtrue
) != GET_MODE (reg_vfalse
)
1500 || byte_vtrue
!= byte_vfalse
1501 || (SUBREG_PROMOTED_VAR_P (vtrue
)
1502 != SUBREG_PROMOTED_VAR_P (vfalse
))
1503 || (SUBREG_PROMOTED_GET (vtrue
)
1504 != SUBREG_PROMOTED_GET (vfalse
)))
1507 promoted_target
= gen_reg_rtx (GET_MODE (reg_vtrue
));
1509 target
= emit_conditional_move (promoted_target
, code
, cmp_a
, cmp_b
,
1510 VOIDmode
, reg_vtrue
, reg_vfalse
,
1511 GET_MODE (reg_vtrue
), unsignedp
);
1512 /* Nope, couldn't do it in that mode either. */
1516 target
= gen_rtx_SUBREG (GET_MODE (vtrue
), promoted_target
, byte_vtrue
);
1517 SUBREG_PROMOTED_VAR_P (target
) = SUBREG_PROMOTED_VAR_P (vtrue
);
1518 SUBREG_PROMOTED_SET (target
, SUBREG_PROMOTED_GET (vtrue
));
1519 emit_move_insn (x
, target
);
1525 /* We'll never get here, as noce_process_if_block doesn't call the
1526 functions involved. Ifdef code, however, should be discouraged
1527 because it leads to typos in the code not selected. However,
1528 emit_conditional_move won't exist either. */
1533 /* Try only simple constants and registers here. More complex cases
1534 are handled in noce_try_cmove_arith after noce_try_store_flag_arith
1535 has had a go at it. */
1538 noce_try_cmove (struct noce_if_info
*if_info
)
1544 if ((CONSTANT_P (if_info
->a
) || register_operand (if_info
->a
, VOIDmode
))
1545 && (CONSTANT_P (if_info
->b
) || register_operand (if_info
->b
, VOIDmode
)))
1549 code
= GET_CODE (if_info
->cond
);
1550 target
= noce_emit_cmove (if_info
, if_info
->x
, code
,
1551 XEXP (if_info
->cond
, 0),
1552 XEXP (if_info
->cond
, 1),
1553 if_info
->a
, if_info
->b
);
1557 if (target
!= if_info
->x
)
1558 noce_emit_move_insn (if_info
->x
, target
);
1560 seq
= end_ifcvt_sequence (if_info
);
1564 emit_insn_before_setloc (seq
, if_info
->jump
,
1565 INSN_LOCATION (if_info
->insn_a
));
1578 /* Try more complex cases involving conditional_move. */
1581 noce_try_cmove_arith (struct noce_if_info
*if_info
)
1587 rtx_insn
*insn_a
, *insn_b
;
1592 rtx_insn
*ifcvt_seq
;
1594 /* A conditional move from two memory sources is equivalent to a
1595 conditional on their addresses followed by a load. Don't do this
1596 early because it'll screw alias analysis. Note that we've
1597 already checked for no side effects. */
1598 /* ??? FIXME: Magic number 5. */
1599 if (cse_not_expected
1600 && MEM_P (a
) && MEM_P (b
)
1601 && MEM_ADDR_SPACE (a
) == MEM_ADDR_SPACE (b
)
1602 && if_info
->branch_cost
>= 5)
1604 machine_mode address_mode
= get_address_mode (a
);
1608 x
= gen_reg_rtx (address_mode
);
1612 /* ??? We could handle this if we knew that a load from A or B could
1613 not trap or fault. This is also true if we've already loaded
1614 from the address along the path from ENTRY. */
1615 else if (may_trap_or_fault_p (a
) || may_trap_or_fault_p (b
))
1618 /* if (test) x = a + b; else x = c - d;
1625 code
= GET_CODE (if_info
->cond
);
1626 insn_a
= if_info
->insn_a
;
1627 insn_b
= if_info
->insn_b
;
1629 /* Total insn_rtx_cost should be smaller than branch cost. Exit
1630 if insn_rtx_cost can't be estimated. */
1634 = insn_rtx_cost (PATTERN (insn_a
),
1635 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_a
)));
1636 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1645 += insn_rtx_cost (PATTERN (insn_b
),
1646 optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn_b
)));
1647 if (insn_cost
== 0 || insn_cost
> COSTS_N_INSNS (if_info
->branch_cost
))
1651 /* Possibly rearrange operands to make things come out more natural. */
1652 if (reversed_comparison_code (if_info
->cond
, if_info
->jump
) != UNKNOWN
)
1655 if (rtx_equal_p (b
, x
))
1657 else if (general_operand (b
, GET_MODE (b
)))
1664 code
= reversed_comparison_code (if_info
->cond
, if_info
->jump
);
1665 tmp
= a
, a
= b
, b
= tmp
;
1666 tmp_insn
= insn_a
, insn_a
= insn_b
, insn_b
= tmp_insn
;
1675 /* If either operand is complex, load it into a register first.
1676 The best way to do this is to copy the original insn. In this
1677 way we preserve any clobbers etc that the insn may have had.
1678 This is of course not possible in the IS_MEM case. */
1679 if (! general_operand (a
, GET_MODE (a
)))
1685 rtx reg
= gen_reg_rtx (GET_MODE (a
));
1686 insn
= emit_insn (gen_rtx_SET (VOIDmode
, reg
, a
));
1689 goto end_seq_and_fail
;
1692 a
= gen_reg_rtx (GET_MODE (a
));
1693 rtx_insn
*copy_of_a
= as_a
<rtx_insn
*> (copy_rtx (insn_a
));
1694 rtx set
= single_set (copy_of_a
);
1696 insn
= emit_insn (PATTERN (copy_of_a
));
1698 if (recog_memoized (insn
) < 0)
1699 goto end_seq_and_fail
;
1701 if (! general_operand (b
, GET_MODE (b
)))
1709 rtx reg
= gen_reg_rtx (GET_MODE (b
));
1710 pat
= gen_rtx_SET (VOIDmode
, reg
, b
);
1713 goto end_seq_and_fail
;
1716 b
= gen_reg_rtx (GET_MODE (b
));
1717 rtx_insn
*copy_of_insn_b
= as_a
<rtx_insn
*> (copy_rtx (insn_b
));
1718 rtx set
= single_set (copy_of_insn_b
);
1720 pat
= PATTERN (copy_of_insn_b
);
1723 /* If insn to set up A clobbers any registers B depends on, try to
1724 swap insn that sets up A with the one that sets up B. If even
1725 that doesn't help, punt. */
1726 last
= get_last_insn ();
1727 if (last
&& modified_in_p (orig_b
, last
))
1729 new_insn
= emit_insn_before (pat
, get_insns ());
1730 if (modified_in_p (orig_a
, new_insn
))
1731 goto end_seq_and_fail
;
1734 new_insn
= emit_insn (pat
);
1736 if (recog_memoized (new_insn
) < 0)
1737 goto end_seq_and_fail
;
1740 target
= noce_emit_cmove (if_info
, x
, code
, XEXP (if_info
->cond
, 0),
1741 XEXP (if_info
->cond
, 1), a
, b
);
1744 goto end_seq_and_fail
;
1746 /* If we're handling a memory for above, emit the load now. */
1749 rtx mem
= gen_rtx_MEM (GET_MODE (if_info
->x
), target
);
1751 /* Copy over flags as appropriate. */
1752 if (MEM_VOLATILE_P (if_info
->a
) || MEM_VOLATILE_P (if_info
->b
))
1753 MEM_VOLATILE_P (mem
) = 1;
1754 if (MEM_ALIAS_SET (if_info
->a
) == MEM_ALIAS_SET (if_info
->b
))
1755 set_mem_alias_set (mem
, MEM_ALIAS_SET (if_info
->a
));
1757 MIN (MEM_ALIGN (if_info
->a
), MEM_ALIGN (if_info
->b
)));
1759 gcc_assert (MEM_ADDR_SPACE (if_info
->a
) == MEM_ADDR_SPACE (if_info
->b
));
1760 set_mem_addr_space (mem
, MEM_ADDR_SPACE (if_info
->a
));
1762 noce_emit_move_insn (if_info
->x
, mem
);
1764 else if (target
!= x
)
1765 noce_emit_move_insn (x
, target
);
1767 ifcvt_seq
= end_ifcvt_sequence (if_info
);
1771 emit_insn_before_setloc (ifcvt_seq
, if_info
->jump
,
1772 INSN_LOCATION (if_info
->insn_a
));
1780 /* For most cases, the simplified condition we found is the best
1781 choice, but this is not the case for the min/max/abs transforms.
1782 For these we wish to know that it is A or B in the condition. */
1785 noce_get_alt_condition (struct noce_if_info
*if_info
, rtx target
,
1786 rtx_insn
**earliest
)
1792 /* If target is already mentioned in the known condition, return it. */
1793 if (reg_mentioned_p (target
, if_info
->cond
))
1795 *earliest
= if_info
->cond_earliest
;
1796 return if_info
->cond
;
1799 set
= pc_set (if_info
->jump
);
1800 cond
= XEXP (SET_SRC (set
), 0);
1802 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
1803 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (if_info
->jump
);
1804 if (if_info
->then_else_reversed
)
1807 /* If we're looking for a constant, try to make the conditional
1808 have that constant in it. There are two reasons why it may
1809 not have the constant we want:
1811 1. GCC may have needed to put the constant in a register, because
1812 the target can't compare directly against that constant. For
1813 this case, we look for a SET immediately before the comparison
1814 that puts a constant in that register.
1816 2. GCC may have canonicalized the conditional, for example
1817 replacing "if x < 4" with "if x <= 3". We can undo that (or
1818 make equivalent types of changes) to get the constants we need
1819 if they're off by one in the right direction. */
1821 if (CONST_INT_P (target
))
1823 enum rtx_code code
= GET_CODE (if_info
->cond
);
1824 rtx op_a
= XEXP (if_info
->cond
, 0);
1825 rtx op_b
= XEXP (if_info
->cond
, 1);
1828 /* First, look to see if we put a constant in a register. */
1829 prev_insn
= prev_nonnote_insn (if_info
->cond_earliest
);
1831 && BLOCK_FOR_INSN (prev_insn
)
1832 == BLOCK_FOR_INSN (if_info
->cond_earliest
)
1833 && INSN_P (prev_insn
)
1834 && GET_CODE (PATTERN (prev_insn
)) == SET
)
1836 rtx src
= find_reg_equal_equiv_note (prev_insn
);
1838 src
= SET_SRC (PATTERN (prev_insn
));
1839 if (CONST_INT_P (src
))
1841 if (rtx_equal_p (op_a
, SET_DEST (PATTERN (prev_insn
))))
1843 else if (rtx_equal_p (op_b
, SET_DEST (PATTERN (prev_insn
))))
1846 if (CONST_INT_P (op_a
))
1851 code
= swap_condition (code
);
1856 /* Now, look to see if we can get the right constant by
1857 adjusting the conditional. */
1858 if (CONST_INT_P (op_b
))
1860 HOST_WIDE_INT desired_val
= INTVAL (target
);
1861 HOST_WIDE_INT actual_val
= INTVAL (op_b
);
1866 if (actual_val
== desired_val
+ 1)
1869 op_b
= GEN_INT (desired_val
);
1873 if (actual_val
== desired_val
- 1)
1876 op_b
= GEN_INT (desired_val
);
1880 if (actual_val
== desired_val
- 1)
1883 op_b
= GEN_INT (desired_val
);
1887 if (actual_val
== desired_val
+ 1)
1890 op_b
= GEN_INT (desired_val
);
1898 /* If we made any changes, generate a new conditional that is
1899 equivalent to what we started with, but has the right
1901 if (code
!= GET_CODE (if_info
->cond
)
1902 || op_a
!= XEXP (if_info
->cond
, 0)
1903 || op_b
!= XEXP (if_info
->cond
, 1))
1905 cond
= gen_rtx_fmt_ee (code
, GET_MODE (cond
), op_a
, op_b
);
1906 *earliest
= if_info
->cond_earliest
;
1911 cond
= canonicalize_condition (if_info
->jump
, cond
, reverse
,
1912 earliest
, target
, false, true);
1913 if (! cond
|| ! reg_mentioned_p (target
, cond
))
1916 /* We almost certainly searched back to a different place.
1917 Need to re-verify correct lifetimes. */
1919 /* X may not be mentioned in the range (cond_earliest, jump]. */
1920 for (insn
= if_info
->jump
; insn
!= *earliest
; insn
= PREV_INSN (insn
))
1921 if (INSN_P (insn
) && reg_overlap_mentioned_p (if_info
->x
, PATTERN (insn
)))
1924 /* A and B may not be modified in the range [cond_earliest, jump). */
1925 for (insn
= *earliest
; insn
!= if_info
->jump
; insn
= NEXT_INSN (insn
))
1927 && (modified_in_p (if_info
->a
, insn
)
1928 || modified_in_p (if_info
->b
, insn
)))
1934 /* Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc. */
1937 noce_try_minmax (struct noce_if_info
*if_info
)
1940 rtx_insn
*earliest
, *seq
;
1941 enum rtx_code code
, op
;
1944 /* ??? Reject modes with NaNs or signed zeros since we don't know how
1945 they will be resolved with an SMIN/SMAX. It wouldn't be too hard
1946 to get the target to tell us... */
1947 if (HONOR_SIGNED_ZEROS (GET_MODE (if_info
->x
))
1948 || HONOR_NANS (GET_MODE (if_info
->x
)))
1951 cond
= noce_get_alt_condition (if_info
, if_info
->a
, &earliest
);
1955 /* Verify the condition is of the form we expect, and canonicalize
1956 the comparison code. */
1957 code
= GET_CODE (cond
);
1958 if (rtx_equal_p (XEXP (cond
, 0), if_info
->a
))
1960 if (! rtx_equal_p (XEXP (cond
, 1), if_info
->b
))
1963 else if (rtx_equal_p (XEXP (cond
, 1), if_info
->a
))
1965 if (! rtx_equal_p (XEXP (cond
, 0), if_info
->b
))
1967 code
= swap_condition (code
);
1972 /* Determine what sort of operation this is. Note that the code is for
1973 a taken branch, so the code->operation mapping appears backwards. */
2006 target
= expand_simple_binop (GET_MODE (if_info
->x
), op
,
2007 if_info
->a
, if_info
->b
,
2008 if_info
->x
, unsignedp
, OPTAB_WIDEN
);
2014 if (target
!= if_info
->x
)
2015 noce_emit_move_insn (if_info
->x
, target
);
2017 seq
= end_ifcvt_sequence (if_info
);
2021 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2022 if_info
->cond
= cond
;
2023 if_info
->cond_earliest
= earliest
;
2028 /* Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);",
2029 "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);",
2033 noce_try_abs (struct noce_if_info
*if_info
)
2035 rtx cond
, target
, a
, b
, c
;
2036 rtx_insn
*earliest
, *seq
;
2038 bool one_cmpl
= false;
2040 /* Reject modes with signed zeros. */
2041 if (HONOR_SIGNED_ZEROS (GET_MODE (if_info
->x
)))
2044 /* Recognize A and B as constituting an ABS or NABS. The canonical
2045 form is a branch around the negation, taken when the object is the
2046 first operand of a comparison against 0 that evaluates to true. */
2049 if (GET_CODE (a
) == NEG
&& rtx_equal_p (XEXP (a
, 0), b
))
2051 else if (GET_CODE (b
) == NEG
&& rtx_equal_p (XEXP (b
, 0), a
))
2053 c
= a
; a
= b
; b
= c
;
2056 else if (GET_CODE (a
) == NOT
&& rtx_equal_p (XEXP (a
, 0), b
))
2061 else if (GET_CODE (b
) == NOT
&& rtx_equal_p (XEXP (b
, 0), a
))
2063 c
= a
; a
= b
; b
= c
;
2070 cond
= noce_get_alt_condition (if_info
, b
, &earliest
);
2074 /* Verify the condition is of the form we expect. */
2075 if (rtx_equal_p (XEXP (cond
, 0), b
))
2077 else if (rtx_equal_p (XEXP (cond
, 1), b
))
2085 /* Verify that C is zero. Search one step backward for a
2086 REG_EQUAL note or a simple source if necessary. */
2090 rtx_insn
*insn
= prev_nonnote_insn (earliest
);
2092 && BLOCK_FOR_INSN (insn
) == BLOCK_FOR_INSN (earliest
)
2093 && (set
= single_set (insn
))
2094 && rtx_equal_p (SET_DEST (set
), c
))
2096 rtx note
= find_reg_equal_equiv_note (insn
);
2106 && GET_CODE (XEXP (c
, 0)) == SYMBOL_REF
2107 && CONSTANT_POOL_ADDRESS_P (XEXP (c
, 0)))
2108 c
= get_pool_constant (XEXP (c
, 0));
2110 /* Work around funny ideas get_condition has wrt canonicalization.
2111 Note that these rtx constants are known to be CONST_INT, and
2112 therefore imply integer comparisons. */
2113 if (c
== constm1_rtx
&& GET_CODE (cond
) == GT
)
2115 else if (c
== const1_rtx
&& GET_CODE (cond
) == LT
)
2117 else if (c
!= CONST0_RTX (GET_MODE (b
)))
2120 /* Determine what sort of operation this is. */
2121 switch (GET_CODE (cond
))
2140 target
= expand_one_cmpl_abs_nojump (GET_MODE (if_info
->x
), b
,
2143 target
= expand_abs_nojump (GET_MODE (if_info
->x
), b
, if_info
->x
, 1);
2145 /* ??? It's a quandary whether cmove would be better here, especially
2146 for integers. Perhaps combine will clean things up. */
2147 if (target
&& negate
)
2150 target
= expand_simple_unop (GET_MODE (target
), NOT
, target
,
2153 target
= expand_simple_unop (GET_MODE (target
), NEG
, target
,
2163 if (target
!= if_info
->x
)
2164 noce_emit_move_insn (if_info
->x
, target
);
2166 seq
= end_ifcvt_sequence (if_info
);
2170 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2171 if_info
->cond
= cond
;
2172 if_info
->cond_earliest
= earliest
;
2177 /* Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;". */
2180 noce_try_sign_mask (struct noce_if_info
*if_info
)
2186 bool t_unconditional
;
2188 cond
= if_info
->cond
;
2189 code
= GET_CODE (cond
);
2194 if (if_info
->a
== const0_rtx
)
2196 if ((code
== LT
&& c
== const0_rtx
)
2197 || (code
== LE
&& c
== constm1_rtx
))
2200 else if (if_info
->b
== const0_rtx
)
2202 if ((code
== GE
&& c
== const0_rtx
)
2203 || (code
== GT
&& c
== constm1_rtx
))
2207 if (! t
|| side_effects_p (t
))
2210 /* We currently don't handle different modes. */
2211 mode
= GET_MODE (t
);
2212 if (GET_MODE (m
) != mode
)
2215 /* This is only profitable if T is unconditionally executed/evaluated in the
2216 original insn sequence or T is cheap. The former happens if B is the
2217 non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no
2218 INSN_B which can happen for e.g. conditional stores to memory. For the
2219 cost computation use the block TEST_BB where the evaluation will end up
2220 after the transformation. */
2223 && (if_info
->insn_b
== NULL_RTX
2224 || BLOCK_FOR_INSN (if_info
->insn_b
) == if_info
->test_bb
));
2225 if (!(t_unconditional
2226 || (set_src_cost (t
, optimize_bb_for_speed_p (if_info
->test_bb
))
2227 < COSTS_N_INSNS (2))))
2231 /* Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding
2232 "(signed) m >> 31" directly. This benefits targets with specialized
2233 insns to obtain the signmask, but still uses ashr_optab otherwise. */
2234 m
= emit_store_flag (gen_reg_rtx (mode
), LT
, m
, const0_rtx
, mode
, 0, -1);
2235 t
= m
? expand_binop (mode
, and_optab
, m
, t
, NULL_RTX
, 0, OPTAB_DIRECT
)
2244 noce_emit_move_insn (if_info
->x
, t
);
2246 seq
= end_ifcvt_sequence (if_info
);
2250 emit_insn_before_setloc (seq
, if_info
->jump
, INSN_LOCATION (if_info
->insn_a
));
2255 /* Optimize away "if (x & C) x |= C" and similar bit manipulation
2259 noce_try_bitop (struct noce_if_info
*if_info
)
2261 rtx cond
, x
, a
, result
;
2268 cond
= if_info
->cond
;
2269 code
= GET_CODE (cond
);
2271 /* Check for no else condition. */
2272 if (! rtx_equal_p (x
, if_info
->b
))
2275 /* Check for a suitable condition. */
2276 if (code
!= NE
&& code
!= EQ
)
2278 if (XEXP (cond
, 1) != const0_rtx
)
2280 cond
= XEXP (cond
, 0);
2282 /* ??? We could also handle AND here. */
2283 if (GET_CODE (cond
) == ZERO_EXTRACT
)
2285 if (XEXP (cond
, 1) != const1_rtx
2286 || !CONST_INT_P (XEXP (cond
, 2))
2287 || ! rtx_equal_p (x
, XEXP (cond
, 0)))
2289 bitnum
= INTVAL (XEXP (cond
, 2));
2290 mode
= GET_MODE (x
);
2291 if (BITS_BIG_ENDIAN
)
2292 bitnum
= GET_MODE_BITSIZE (mode
) - 1 - bitnum
;
2293 if (bitnum
< 0 || bitnum
>= HOST_BITS_PER_WIDE_INT
)
2300 if (GET_CODE (a
) == IOR
|| GET_CODE (a
) == XOR
)
2302 /* Check for "if (X & C) x = x op C". */
2303 if (! rtx_equal_p (x
, XEXP (a
, 0))
2304 || !CONST_INT_P (XEXP (a
, 1))
2305 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2306 != (unsigned HOST_WIDE_INT
) 1 << bitnum
)
2309 /* if ((x & C) == 0) x |= C; is transformed to x |= C. */
2310 /* if ((x & C) != 0) x |= C; is transformed to nothing. */
2311 if (GET_CODE (a
) == IOR
)
2312 result
= (code
== NE
) ? a
: NULL_RTX
;
2313 else if (code
== NE
)
2315 /* if ((x & C) == 0) x ^= C; is transformed to x |= C. */
2316 result
= gen_int_mode ((HOST_WIDE_INT
) 1 << bitnum
, mode
);
2317 result
= simplify_gen_binary (IOR
, mode
, x
, result
);
2321 /* if ((x & C) != 0) x ^= C; is transformed to x &= ~C. */
2322 result
= gen_int_mode (~((HOST_WIDE_INT
) 1 << bitnum
), mode
);
2323 result
= simplify_gen_binary (AND
, mode
, x
, result
);
2326 else if (GET_CODE (a
) == AND
)
2328 /* Check for "if (X & C) x &= ~C". */
2329 if (! rtx_equal_p (x
, XEXP (a
, 0))
2330 || !CONST_INT_P (XEXP (a
, 1))
2331 || (INTVAL (XEXP (a
, 1)) & GET_MODE_MASK (mode
))
2332 != (~((HOST_WIDE_INT
) 1 << bitnum
) & GET_MODE_MASK (mode
)))
2335 /* if ((x & C) == 0) x &= ~C; is transformed to nothing. */
2336 /* if ((x & C) != 0) x &= ~C; is transformed to x &= ~C. */
2337 result
= (code
== EQ
) ? a
: NULL_RTX
;
2345 noce_emit_move_insn (x
, result
);
2346 seq
= end_ifcvt_sequence (if_info
);
2350 emit_insn_before_setloc (seq
, if_info
->jump
,
2351 INSN_LOCATION (if_info
->insn_a
));
2357 /* Similar to get_condition, only the resulting condition must be
2358 valid at JUMP, instead of at EARLIEST.
2360 If THEN_ELSE_REVERSED is true, the fallthrough does not go to the
2361 THEN block of the caller, and we have to reverse the condition. */
2364 noce_get_condition (rtx_insn
*jump
, rtx_insn
**earliest
, bool then_else_reversed
)
2369 if (! any_condjump_p (jump
))
2372 set
= pc_set (jump
);
2374 /* If this branches to JUMP_LABEL when the condition is false,
2375 reverse the condition. */
2376 reverse
= (GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
2377 && LABEL_REF_LABEL (XEXP (SET_SRC (set
), 2)) == JUMP_LABEL (jump
));
2379 /* We may have to reverse because the caller's if block is not canonical,
2380 i.e. the THEN block isn't the fallthrough block for the TEST block
2381 (see find_if_header). */
2382 if (then_else_reversed
)
2385 /* If the condition variable is a register and is MODE_INT, accept it. */
2387 cond
= XEXP (SET_SRC (set
), 0);
2388 tmp
= XEXP (cond
, 0);
2389 if (REG_P (tmp
) && GET_MODE_CLASS (GET_MODE (tmp
)) == MODE_INT
2390 && (GET_MODE (tmp
) != BImode
2391 || !targetm
.small_register_classes_for_mode_p (BImode
)))
2396 cond
= gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond
)),
2397 GET_MODE (cond
), tmp
, XEXP (cond
, 1));
2401 /* Otherwise, fall back on canonicalize_condition to do the dirty
2402 work of manipulating MODE_CC values and COMPARE rtx codes. */
2403 tmp
= canonicalize_condition (jump
, cond
, reverse
, earliest
,
2404 NULL_RTX
, false, true);
2406 /* We don't handle side-effects in the condition, like handling
2407 REG_INC notes and making sure no duplicate conditions are emitted. */
2408 if (tmp
!= NULL_RTX
&& side_effects_p (tmp
))
2414 /* Return true if OP is ok for if-then-else processing. */
2417 noce_operand_ok (const_rtx op
)
2419 if (side_effects_p (op
))
2422 /* We special-case memories, so handle any of them with
2423 no address side effects. */
2425 return ! side_effects_p (XEXP (op
, 0));
2427 return ! may_trap_p (op
);
2430 /* Return true if a write into MEM may trap or fault. */
2433 noce_mem_write_may_trap_or_fault_p (const_rtx mem
)
2437 if (MEM_READONLY_P (mem
))
2440 if (may_trap_or_fault_p (mem
))
2443 addr
= XEXP (mem
, 0);
2445 /* Call target hook to avoid the effects of -fpic etc.... */
2446 addr
= targetm
.delegitimize_address (addr
);
2449 switch (GET_CODE (addr
))
2457 addr
= XEXP (addr
, 0);
2461 addr
= XEXP (addr
, 1);
2464 if (CONST_INT_P (XEXP (addr
, 1)))
2465 addr
= XEXP (addr
, 0);
2472 if (SYMBOL_REF_DECL (addr
)
2473 && decl_readonly_section (SYMBOL_REF_DECL (addr
), 0))
2483 /* Return whether we can use store speculation for MEM. TOP_BB is the
2484 basic block above the conditional block where we are considering
2485 doing the speculative store. We look for whether MEM is set
2486 unconditionally later in the function. */
2489 noce_can_store_speculate_p (basic_block top_bb
, const_rtx mem
)
2491 basic_block dominator
;
2493 for (dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, top_bb
);
2495 dominator
= get_immediate_dominator (CDI_POST_DOMINATORS
, dominator
))
2499 FOR_BB_INSNS (dominator
, insn
)
2501 /* If we see something that might be a memory barrier, we
2502 have to stop looking. Even if the MEM is set later in
2503 the function, we still don't want to set it
2504 unconditionally before the barrier. */
2506 && (volatile_insn_p (PATTERN (insn
))
2507 || (CALL_P (insn
) && (!RTL_CONST_CALL_P (insn
)))))
2510 if (memory_must_be_modified_in_insn_p (mem
, insn
))
2512 if (modified_in_p (XEXP (mem
, 0), insn
))
2521 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2522 it without using conditional execution. Return TRUE if we were successful
2523 at converting the block. */
2526 noce_process_if_block (struct noce_if_info
*if_info
)
2528 basic_block test_bb
= if_info
->test_bb
; /* test block */
2529 basic_block then_bb
= if_info
->then_bb
; /* THEN */
2530 basic_block else_bb
= if_info
->else_bb
; /* ELSE or NULL */
2531 basic_block join_bb
= if_info
->join_bb
; /* JOIN */
2532 rtx_insn
*jump
= if_info
->jump
;
2533 rtx cond
= if_info
->cond
;
2534 rtx_insn
*insn_a
, *insn_b
;
2536 rtx orig_x
, x
, a
, b
;
2538 /* We're looking for patterns of the form
2540 (1) if (...) x = a; else x = b;
2541 (2) x = b; if (...) x = a;
2542 (3) if (...) x = a; // as if with an initial x = x.
2544 The later patterns require jumps to be more expensive.
2546 ??? For future expansion, look for multiple X in such patterns. */
2548 /* Look for one of the potential sets. */
2549 insn_a
= first_active_insn (then_bb
);
2551 || insn_a
!= last_active_insn (then_bb
, FALSE
)
2552 || (set_a
= single_set (insn_a
)) == NULL_RTX
)
2555 x
= SET_DEST (set_a
);
2556 a
= SET_SRC (set_a
);
2558 /* Look for the other potential set. Make sure we've got equivalent
2560 /* ??? This is overconservative. Storing to two different mems is
2561 as easy as conditionally computing the address. Storing to a
2562 single mem merely requires a scratch memory to use as one of the
2563 destination addresses; often the memory immediately below the
2564 stack pointer is available for this. */
2568 insn_b
= first_active_insn (else_bb
);
2570 || insn_b
!= last_active_insn (else_bb
, FALSE
)
2571 || (set_b
= single_set (insn_b
)) == NULL_RTX
2572 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
)))
2577 insn_b
= prev_nonnote_nondebug_insn (if_info
->cond_earliest
);
2578 /* We're going to be moving the evaluation of B down from above
2579 COND_EARLIEST to JUMP. Make sure the relevant data is still
2582 || BLOCK_FOR_INSN (insn_b
) != BLOCK_FOR_INSN (if_info
->cond_earliest
)
2583 || !NONJUMP_INSN_P (insn_b
)
2584 || (set_b
= single_set (insn_b
)) == NULL_RTX
2585 || ! rtx_interchangeable_p (x
, SET_DEST (set_b
))
2586 || ! noce_operand_ok (SET_SRC (set_b
))
2587 || reg_overlap_mentioned_p (x
, SET_SRC (set_b
))
2588 || modified_between_p (SET_SRC (set_b
), insn_b
, jump
)
2589 /* Avoid extending the lifetime of hard registers on small
2590 register class machines. */
2591 || (REG_P (SET_SRC (set_b
))
2592 && HARD_REGISTER_P (SET_SRC (set_b
))
2593 && targetm
.small_register_classes_for_mode_p
2594 (GET_MODE (SET_SRC (set_b
))))
2595 /* Likewise with X. In particular this can happen when
2596 noce_get_condition looks farther back in the instruction
2597 stream than one might expect. */
2598 || reg_overlap_mentioned_p (x
, cond
)
2599 || reg_overlap_mentioned_p (x
, a
)
2600 || modified_between_p (x
, insn_b
, jump
))
2607 /* If x has side effects then only the if-then-else form is safe to
2608 convert. But even in that case we would need to restore any notes
2609 (such as REG_INC) at then end. That can be tricky if
2610 noce_emit_move_insn expands to more than one insn, so disable the
2611 optimization entirely for now if there are side effects. */
2612 if (side_effects_p (x
))
2615 b
= (set_b
? SET_SRC (set_b
) : x
);
2617 /* Only operate on register destinations, and even then avoid extending
2618 the lifetime of hard registers on small register class machines. */
2621 || (HARD_REGISTER_P (x
)
2622 && targetm
.small_register_classes_for_mode_p (GET_MODE (x
))))
2624 if (GET_MODE (x
) == BLKmode
)
2627 if (GET_CODE (x
) == ZERO_EXTRACT
2628 && (!CONST_INT_P (XEXP (x
, 1))
2629 || !CONST_INT_P (XEXP (x
, 2))))
2632 x
= gen_reg_rtx (GET_MODE (GET_CODE (x
) == STRICT_LOW_PART
2633 ? XEXP (x
, 0) : x
));
2636 /* Don't operate on sources that may trap or are volatile. */
2637 if (! noce_operand_ok (a
) || ! noce_operand_ok (b
))
2641 /* Set up the info block for our subroutines. */
2642 if_info
->insn_a
= insn_a
;
2643 if_info
->insn_b
= insn_b
;
2648 /* Try optimizations in some approximation of a useful order. */
2649 /* ??? Should first look to see if X is live incoming at all. If it
2650 isn't, we don't need anything but an unconditional set. */
2652 /* Look and see if A and B are really the same. Avoid creating silly
2653 cmove constructs that no one will fix up later. */
2654 if (rtx_interchangeable_p (a
, b
))
2656 /* If we have an INSN_B, we don't have to create any new rtl. Just
2657 move the instruction that we already have. If we don't have an
2658 INSN_B, that means that A == X, and we've got a noop move. In
2659 that case don't do anything and let the code below delete INSN_A. */
2660 if (insn_b
&& else_bb
)
2664 if (else_bb
&& insn_b
== BB_END (else_bb
))
2665 BB_END (else_bb
) = PREV_INSN (insn_b
);
2666 reorder_insns (insn_b
, insn_b
, PREV_INSN (jump
));
2668 /* If there was a REG_EQUAL note, delete it since it may have been
2669 true due to this insn being after a jump. */
2670 if ((note
= find_reg_note (insn_b
, REG_EQUAL
, NULL_RTX
)) != 0)
2671 remove_note (insn_b
, note
);
2675 /* If we have "x = b; if (...) x = a;", and x has side-effects, then
2676 x must be executed twice. */
2677 else if (insn_b
&& side_effects_p (orig_x
))
2684 if (!set_b
&& MEM_P (orig_x
))
2686 /* Disallow the "if (...) x = a;" form (implicit "else x = x;")
2687 for optimizations if writing to x may trap or fault,
2688 i.e. it's a memory other than a static var or a stack slot,
2689 is misaligned on strict aligned machines or is read-only. If
2690 x is a read-only memory, then the program is valid only if we
2691 avoid the store into it. If there are stores on both the
2692 THEN and ELSE arms, then we can go ahead with the conversion;
2693 either the program is broken, or the condition is always
2694 false such that the other memory is selected. */
2695 if (noce_mem_write_may_trap_or_fault_p (orig_x
))
2698 /* Avoid store speculation: given "if (...) x = a" where x is a
2699 MEM, we only want to do the store if x is always set
2700 somewhere in the function. This avoids cases like
2701 if (pthread_mutex_trylock(mutex))
2703 where we only want global_variable to be changed if the mutex
2704 is held. FIXME: This should ideally be expressed directly in
2706 if (!noce_can_store_speculate_p (test_bb
, orig_x
))
2710 if (noce_try_move (if_info
))
2712 if (noce_try_store_flag (if_info
))
2714 if (noce_try_bitop (if_info
))
2716 if (noce_try_minmax (if_info
))
2718 if (noce_try_abs (if_info
))
2720 if (HAVE_conditional_move
2721 && noce_try_cmove (if_info
))
2723 if (! targetm
.have_conditional_execution ())
2725 if (noce_try_store_flag_constants (if_info
))
2727 if (noce_try_addcc (if_info
))
2729 if (noce_try_store_flag_mask (if_info
))
2731 if (HAVE_conditional_move
2732 && noce_try_cmove_arith (if_info
))
2734 if (noce_try_sign_mask (if_info
))
2738 if (!else_bb
&& set_b
)
2750 /* If we used a temporary, fix it up now. */
2756 noce_emit_move_insn (orig_x
, x
);
2758 set_used_flags (orig_x
);
2759 unshare_all_rtl_in_chain (seq
);
2762 emit_insn_before_setloc (seq
, BB_END (test_bb
), INSN_LOCATION (insn_a
));
2765 /* The original THEN and ELSE blocks may now be removed. The test block
2766 must now jump to the join block. If the test block and the join block
2767 can be merged, do so. */
2770 delete_basic_block (else_bb
);
2774 remove_edge (find_edge (test_bb
, join_bb
));
2776 remove_edge (find_edge (then_bb
, join_bb
));
2777 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
2778 delete_basic_block (then_bb
);
2781 if (can_merge_blocks_p (test_bb
, join_bb
))
2783 merge_blocks (test_bb
, join_bb
);
2787 num_updated_if_blocks
++;
2791 /* Check whether a block is suitable for conditional move conversion.
2792 Every insn must be a simple set of a register to a constant or a
2793 register. For each assignment, store the value in the pointer map
2794 VALS, keyed indexed by register pointer, then store the register
2795 pointer in REGS. COND is the condition we will test. */
2798 check_cond_move_block (basic_block bb
,
2799 hash_map
<rtx
, rtx
> *vals
,
2805 /* We can only handle simple jumps at the end of the basic block.
2806 It is almost impossible to update the CFG otherwise. */
2808 if (JUMP_P (insn
) && !onlyjump_p (insn
))
2811 FOR_BB_INSNS (bb
, insn
)
2815 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
2817 set
= single_set (insn
);
2821 dest
= SET_DEST (set
);
2822 src
= SET_SRC (set
);
2824 || (HARD_REGISTER_P (dest
)
2825 && targetm
.small_register_classes_for_mode_p (GET_MODE (dest
))))
2828 if (!CONSTANT_P (src
) && !register_operand (src
, VOIDmode
))
2831 if (side_effects_p (src
) || side_effects_p (dest
))
2834 if (may_trap_p (src
) || may_trap_p (dest
))
2837 /* Don't try to handle this if the source register was
2838 modified earlier in the block. */
2841 || (GET_CODE (src
) == SUBREG
&& REG_P (SUBREG_REG (src
))
2842 && vals
->get (SUBREG_REG (src
))))
2845 /* Don't try to handle this if the destination register was
2846 modified earlier in the block. */
2847 if (vals
->get (dest
))
2850 /* Don't try to handle this if the condition uses the
2851 destination register. */
2852 if (reg_overlap_mentioned_p (dest
, cond
))
2855 /* Don't try to handle this if the source register is modified
2856 later in the block. */
2857 if (!CONSTANT_P (src
)
2858 && modified_between_p (src
, insn
, NEXT_INSN (BB_END (bb
))))
2861 vals
->put (dest
, src
);
2863 regs
->safe_push (dest
);
2869 /* Given a basic block BB suitable for conditional move conversion,
2870 a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing
2871 the register values depending on COND, emit the insns in the block as
2872 conditional moves. If ELSE_BLOCK is true, THEN_BB was already
2873 processed. The caller has started a sequence for the conversion.
2874 Return true if successful, false if something goes wrong. */
2877 cond_move_convert_if_block (struct noce_if_info
*if_infop
,
2878 basic_block bb
, rtx cond
,
2879 hash_map
<rtx
, rtx
> *then_vals
,
2880 hash_map
<rtx
, rtx
> *else_vals
,
2885 rtx cond_arg0
, cond_arg1
;
2887 code
= GET_CODE (cond
);
2888 cond_arg0
= XEXP (cond
, 0);
2889 cond_arg1
= XEXP (cond
, 1);
2891 FOR_BB_INSNS (bb
, insn
)
2893 rtx set
, target
, dest
, t
, e
;
2895 /* ??? Maybe emit conditional debug insn? */
2896 if (!NONDEBUG_INSN_P (insn
) || JUMP_P (insn
))
2898 set
= single_set (insn
);
2899 gcc_assert (set
&& REG_P (SET_DEST (set
)));
2901 dest
= SET_DEST (set
);
2903 rtx
*then_slot
= then_vals
->get (dest
);
2904 rtx
*else_slot
= else_vals
->get (dest
);
2905 t
= then_slot
? *then_slot
: NULL_RTX
;
2906 e
= else_slot
? *else_slot
: NULL_RTX
;
2910 /* If this register was set in the then block, we already
2911 handled this case there. */
2924 target
= noce_emit_cmove (if_infop
, dest
, code
, cond_arg0
, cond_arg1
,
2930 noce_emit_move_insn (dest
, target
);
2936 /* Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert
2937 it using only conditional moves. Return TRUE if we were successful at
2938 converting the block. */
2941 cond_move_process_if_block (struct noce_if_info
*if_info
)
2943 basic_block test_bb
= if_info
->test_bb
;
2944 basic_block then_bb
= if_info
->then_bb
;
2945 basic_block else_bb
= if_info
->else_bb
;
2946 basic_block join_bb
= if_info
->join_bb
;
2947 rtx_insn
*jump
= if_info
->jump
;
2948 rtx cond
= if_info
->cond
;
2949 rtx_insn
*seq
, *loc_insn
;
2952 vec
<rtx
> then_regs
= vNULL
;
2953 vec
<rtx
> else_regs
= vNULL
;
2955 int success_p
= FALSE
;
2957 /* Build a mapping for each block to the value used for each
2959 hash_map
<rtx
, rtx
> then_vals
;
2960 hash_map
<rtx
, rtx
> else_vals
;
2962 /* Make sure the blocks are suitable. */
2963 if (!check_cond_move_block (then_bb
, &then_vals
, &then_regs
, cond
)
2965 && !check_cond_move_block (else_bb
, &else_vals
, &else_regs
, cond
)))
2968 /* Make sure the blocks can be used together. If the same register
2969 is set in both blocks, and is not set to a constant in both
2970 cases, then both blocks must set it to the same register. We
2971 have already verified that if it is set to a register, that the
2972 source register does not change after the assignment. Also count
2973 the number of registers set in only one of the blocks. */
2975 FOR_EACH_VEC_ELT (then_regs
, i
, reg
)
2977 rtx
*then_slot
= then_vals
.get (reg
);
2978 rtx
*else_slot
= else_vals
.get (reg
);
2980 gcc_checking_assert (then_slot
);
2985 rtx then_val
= *then_slot
;
2986 rtx else_val
= *else_slot
;
2987 if (!CONSTANT_P (then_val
) && !CONSTANT_P (else_val
)
2988 && !rtx_equal_p (then_val
, else_val
))
2993 /* Finish off c for MAX_CONDITIONAL_EXECUTE. */
2994 FOR_EACH_VEC_ELT (else_regs
, i
, reg
)
2996 gcc_checking_assert (else_vals
.get (reg
));
2997 if (!then_vals
.get (reg
))
3001 /* Make sure it is reasonable to convert this block. What matters
3002 is the number of assignments currently made in only one of the
3003 branches, since if we convert we are going to always execute
3005 if (c
> MAX_CONDITIONAL_EXECUTE
)
3008 /* Try to emit the conditional moves. First do the then block,
3009 then do anything left in the else blocks. */
3011 if (!cond_move_convert_if_block (if_info
, then_bb
, cond
,
3012 &then_vals
, &else_vals
, false)
3014 && !cond_move_convert_if_block (if_info
, else_bb
, cond
,
3015 &then_vals
, &else_vals
, true)))
3020 seq
= end_ifcvt_sequence (if_info
);
3024 loc_insn
= first_active_insn (then_bb
);
3027 loc_insn
= first_active_insn (else_bb
);
3028 gcc_assert (loc_insn
);
3030 emit_insn_before_setloc (seq
, jump
, INSN_LOCATION (loc_insn
));
3034 delete_basic_block (else_bb
);
3038 remove_edge (find_edge (test_bb
, join_bb
));
3040 remove_edge (find_edge (then_bb
, join_bb
));
3041 redirect_edge_and_branch_force (single_succ_edge (test_bb
), join_bb
);
3042 delete_basic_block (then_bb
);
3045 if (can_merge_blocks_p (test_bb
, join_bb
))
3047 merge_blocks (test_bb
, join_bb
);
3051 num_updated_if_blocks
++;
3056 then_regs
.release ();
3057 else_regs
.release ();
3062 /* Determine if a given basic block heads a simple IF-THEN-JOIN or an
3063 IF-THEN-ELSE-JOIN block.
3065 If so, we'll try to convert the insns to not require the branch,
3066 using only transformations that do not require conditional execution.
3068 Return TRUE if we were successful at converting the block. */
3071 noce_find_if_block (basic_block test_bb
, edge then_edge
, edge else_edge
,
3074 basic_block then_bb
, else_bb
, join_bb
;
3075 bool then_else_reversed
= false;
3078 rtx_insn
*cond_earliest
;
3079 struct noce_if_info if_info
;
3081 /* We only ever should get here before reload. */
3082 gcc_assert (!reload_completed
);
3084 /* Recognize an IF-THEN-ELSE-JOIN block. */
3085 if (single_pred_p (then_edge
->dest
)
3086 && single_succ_p (then_edge
->dest
)
3087 && single_pred_p (else_edge
->dest
)
3088 && single_succ_p (else_edge
->dest
)
3089 && single_succ (then_edge
->dest
) == single_succ (else_edge
->dest
))
3091 then_bb
= then_edge
->dest
;
3092 else_bb
= else_edge
->dest
;
3093 join_bb
= single_succ (then_bb
);
3095 /* Recognize an IF-THEN-JOIN block. */
3096 else if (single_pred_p (then_edge
->dest
)
3097 && single_succ_p (then_edge
->dest
)
3098 && single_succ (then_edge
->dest
) == else_edge
->dest
)
3100 then_bb
= then_edge
->dest
;
3101 else_bb
= NULL_BLOCK
;
3102 join_bb
= else_edge
->dest
;
3104 /* Recognize an IF-ELSE-JOIN block. We can have those because the order
3105 of basic blocks in cfglayout mode does not matter, so the fallthrough
3106 edge can go to any basic block (and not just to bb->next_bb, like in
3108 else if (single_pred_p (else_edge
->dest
)
3109 && single_succ_p (else_edge
->dest
)
3110 && single_succ (else_edge
->dest
) == then_edge
->dest
)
3112 /* The noce transformations do not apply to IF-ELSE-JOIN blocks.
3113 To make this work, we have to invert the THEN and ELSE blocks
3114 and reverse the jump condition. */
3115 then_bb
= else_edge
->dest
;
3116 else_bb
= NULL_BLOCK
;
3117 join_bb
= single_succ (then_bb
);
3118 then_else_reversed
= true;
3121 /* Not a form we can handle. */
3124 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3125 if (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3128 && single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3131 num_possible_if_blocks
++;
3136 "\nIF-THEN%s-JOIN block found, pass %d, test %d, then %d",
3137 (else_bb
) ? "-ELSE" : "",
3138 pass
, test_bb
->index
, then_bb
->index
);
3141 fprintf (dump_file
, ", else %d", else_bb
->index
);
3143 fprintf (dump_file
, ", join %d\n", join_bb
->index
);
3146 /* If the conditional jump is more than just a conditional
3147 jump, then we can not do if-conversion on this block. */
3148 jump
= BB_END (test_bb
);
3149 if (! onlyjump_p (jump
))
3152 /* If this is not a standard conditional jump, we can't parse it. */
3153 cond
= noce_get_condition (jump
, &cond_earliest
, then_else_reversed
);
3157 /* We must be comparing objects whose modes imply the size. */
3158 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3161 /* Initialize an IF_INFO struct to pass around. */
3162 memset (&if_info
, 0, sizeof if_info
);
3163 if_info
.test_bb
= test_bb
;
3164 if_info
.then_bb
= then_bb
;
3165 if_info
.else_bb
= else_bb
;
3166 if_info
.join_bb
= join_bb
;
3167 if_info
.cond
= cond
;
3168 if_info
.cond_earliest
= cond_earliest
;
3169 if_info
.jump
= jump
;
3170 if_info
.then_else_reversed
= then_else_reversed
;
3171 if_info
.branch_cost
= BRANCH_COST (optimize_bb_for_speed_p (test_bb
),
3172 predictable_edge_p (then_edge
));
3174 /* Do the real work. */
3176 if (noce_process_if_block (&if_info
))
3179 if (HAVE_conditional_move
3180 && cond_move_process_if_block (&if_info
))
3187 /* Merge the blocks and mark for local life update. */
3190 merge_if_block (struct ce_if_block
* ce_info
)
3192 basic_block test_bb
= ce_info
->test_bb
; /* last test block */
3193 basic_block then_bb
= ce_info
->then_bb
; /* THEN */
3194 basic_block else_bb
= ce_info
->else_bb
; /* ELSE or NULL */
3195 basic_block join_bb
= ce_info
->join_bb
; /* join block */
3196 basic_block combo_bb
;
3198 /* All block merging is done into the lower block numbers. */
3201 df_set_bb_dirty (test_bb
);
3203 /* Merge any basic blocks to handle && and || subtests. Each of
3204 the blocks are on the fallthru path from the predecessor block. */
3205 if (ce_info
->num_multiple_test_blocks
> 0)
3207 basic_block bb
= test_bb
;
3208 basic_block last_test_bb
= ce_info
->last_test_bb
;
3209 basic_block fallthru
= block_fallthru (bb
);
3214 fallthru
= block_fallthru (bb
);
3215 merge_blocks (combo_bb
, bb
);
3218 while (bb
!= last_test_bb
);
3221 /* Merge TEST block into THEN block. Normally the THEN block won't have a
3222 label, but it might if there were || tests. That label's count should be
3223 zero, and it normally should be removed. */
3227 /* If THEN_BB has no successors, then there's a BARRIER after it.
3228 If COMBO_BB has more than one successor (THEN_BB), then that BARRIER
3229 is no longer needed, and in fact it is incorrect to leave it in
3231 if (EDGE_COUNT (then_bb
->succs
) == 0
3232 && EDGE_COUNT (combo_bb
->succs
) > 1)
3234 rtx_insn
*end
= NEXT_INSN (BB_END (then_bb
));
3235 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3236 end
= NEXT_INSN (end
);
3238 if (end
&& BARRIER_P (end
))
3241 merge_blocks (combo_bb
, then_bb
);
3245 /* The ELSE block, if it existed, had a label. That label count
3246 will almost always be zero, but odd things can happen when labels
3247 get their addresses taken. */
3250 /* If ELSE_BB has no successors, then there's a BARRIER after it.
3251 If COMBO_BB has more than one successor (ELSE_BB), then that BARRIER
3252 is no longer needed, and in fact it is incorrect to leave it in
3254 if (EDGE_COUNT (else_bb
->succs
) == 0
3255 && EDGE_COUNT (combo_bb
->succs
) > 1)
3257 rtx_insn
*end
= NEXT_INSN (BB_END (else_bb
));
3258 while (end
&& NOTE_P (end
) && !NOTE_INSN_BASIC_BLOCK_P (end
))
3259 end
= NEXT_INSN (end
);
3261 if (end
&& BARRIER_P (end
))
3264 merge_blocks (combo_bb
, else_bb
);
3268 /* If there was no join block reported, that means it was not adjacent
3269 to the others, and so we cannot merge them. */
3273 rtx_insn
*last
= BB_END (combo_bb
);
3275 /* The outgoing edge for the current COMBO block should already
3276 be correct. Verify this. */
3277 if (EDGE_COUNT (combo_bb
->succs
) == 0)
3278 gcc_assert (find_reg_note (last
, REG_NORETURN
, NULL
)
3279 || (NONJUMP_INSN_P (last
)
3280 && GET_CODE (PATTERN (last
)) == TRAP_IF
3281 && (TRAP_CONDITION (PATTERN (last
))
3282 == const_true_rtx
)));
3285 /* There should still be something at the end of the THEN or ELSE
3286 blocks taking us to our final destination. */
3287 gcc_assert (JUMP_P (last
)
3288 || (EDGE_SUCC (combo_bb
, 0)->dest
3289 == EXIT_BLOCK_PTR_FOR_FN (cfun
)
3291 && SIBLING_CALL_P (last
))
3292 || ((EDGE_SUCC (combo_bb
, 0)->flags
& EDGE_EH
)
3293 && can_throw_internal (last
)));
3296 /* The JOIN block may have had quite a number of other predecessors too.
3297 Since we've already merged the TEST, THEN and ELSE blocks, we should
3298 have only one remaining edge from our if-then-else diamond. If there
3299 is more than one remaining edge, it must come from elsewhere. There
3300 may be zero incoming edges if the THEN block didn't actually join
3301 back up (as with a call to a non-return function). */
3302 else if (EDGE_COUNT (join_bb
->preds
) < 2
3303 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3305 /* We can merge the JOIN cleanly and update the dataflow try
3306 again on this pass.*/
3307 merge_blocks (combo_bb
, join_bb
);
3312 /* We cannot merge the JOIN. */
3314 /* The outgoing edge for the current COMBO block should already
3315 be correct. Verify this. */
3316 gcc_assert (single_succ_p (combo_bb
)
3317 && single_succ (combo_bb
) == join_bb
);
3319 /* Remove the jump and cruft from the end of the COMBO block. */
3320 if (join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3321 tidy_fallthru_edge (single_succ_edge (combo_bb
));
3324 num_updated_if_blocks
++;
3327 /* Find a block ending in a simple IF condition and try to transform it
3328 in some way. When converting a multi-block condition, put the new code
3329 in the first such block and delete the rest. Return a pointer to this
3330 first block if some transformation was done. Return NULL otherwise. */
3333 find_if_header (basic_block test_bb
, int pass
)
3335 ce_if_block ce_info
;
3339 /* The kind of block we're looking for has exactly two successors. */
3340 if (EDGE_COUNT (test_bb
->succs
) != 2)
3343 then_edge
= EDGE_SUCC (test_bb
, 0);
3344 else_edge
= EDGE_SUCC (test_bb
, 1);
3346 if (df_get_bb_dirty (then_edge
->dest
))
3348 if (df_get_bb_dirty (else_edge
->dest
))
3351 /* Neither edge should be abnormal. */
3352 if ((then_edge
->flags
& EDGE_COMPLEX
)
3353 || (else_edge
->flags
& EDGE_COMPLEX
))
3356 /* Nor exit the loop. */
3357 if ((then_edge
->flags
& EDGE_LOOP_EXIT
)
3358 || (else_edge
->flags
& EDGE_LOOP_EXIT
))
3361 /* The THEN edge is canonically the one that falls through. */
3362 if (then_edge
->flags
& EDGE_FALLTHRU
)
3364 else if (else_edge
->flags
& EDGE_FALLTHRU
)
3367 else_edge
= then_edge
;
3371 /* Otherwise this must be a multiway branch of some sort. */
3374 memset (&ce_info
, 0, sizeof (ce_info
));
3375 ce_info
.test_bb
= test_bb
;
3376 ce_info
.then_bb
= then_edge
->dest
;
3377 ce_info
.else_bb
= else_edge
->dest
;
3378 ce_info
.pass
= pass
;
3380 #ifdef IFCVT_MACHDEP_INIT
3381 IFCVT_MACHDEP_INIT (&ce_info
);
3384 if (!reload_completed
3385 && noce_find_if_block (test_bb
, then_edge
, else_edge
, pass
))
3388 if (reload_completed
3389 && targetm
.have_conditional_execution ()
3390 && cond_exec_find_if_block (&ce_info
))
3394 && optab_handler (ctrap_optab
, word_mode
) != CODE_FOR_nothing
3395 && find_cond_trap (test_bb
, then_edge
, else_edge
))
3398 if (dom_info_state (CDI_POST_DOMINATORS
) >= DOM_NO_FAST_QUERY
3399 && (reload_completed
|| !targetm
.have_conditional_execution ()))
3401 if (find_if_case_1 (test_bb
, then_edge
, else_edge
))
3403 if (find_if_case_2 (test_bb
, then_edge
, else_edge
))
3411 fprintf (dump_file
, "Conversion succeeded on pass %d.\n", pass
);
3412 /* Set this so we continue looking. */
3413 cond_exec_changed_p
= TRUE
;
3414 return ce_info
.test_bb
;
3417 /* Return true if a block has two edges, one of which falls through to the next
3418 block, and the other jumps to a specific block, so that we can tell if the
3419 block is part of an && test or an || test. Returns either -1 or the number
3420 of non-note, non-jump, non-USE/CLOBBER insns in the block. */
3423 block_jumps_and_fallthru_p (basic_block cur_bb
, basic_block target_bb
)
3426 int fallthru_p
= FALSE
;
3433 if (!cur_bb
|| !target_bb
)
3436 /* If no edges, obviously it doesn't jump or fallthru. */
3437 if (EDGE_COUNT (cur_bb
->succs
) == 0)
3440 FOR_EACH_EDGE (cur_edge
, ei
, cur_bb
->succs
)
3442 if (cur_edge
->flags
& EDGE_COMPLEX
)
3443 /* Anything complex isn't what we want. */
3446 else if (cur_edge
->flags
& EDGE_FALLTHRU
)
3449 else if (cur_edge
->dest
== target_bb
)
3456 if ((jump_p
& fallthru_p
) == 0)
3459 /* Don't allow calls in the block, since this is used to group && and ||
3460 together for conditional execution support. ??? we should support
3461 conditional execution support across calls for IA-64 some day, but
3462 for now it makes the code simpler. */
3463 end
= BB_END (cur_bb
);
3464 insn
= BB_HEAD (cur_bb
);
3466 while (insn
!= NULL_RTX
)
3473 && !DEBUG_INSN_P (insn
)
3474 && GET_CODE (PATTERN (insn
)) != USE
3475 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
3481 insn
= NEXT_INSN (insn
);
3487 /* Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE
3488 block. If so, we'll try to convert the insns to not require the branch.
3489 Return TRUE if we were successful at converting the block. */
3492 cond_exec_find_if_block (struct ce_if_block
* ce_info
)
3494 basic_block test_bb
= ce_info
->test_bb
;
3495 basic_block then_bb
= ce_info
->then_bb
;
3496 basic_block else_bb
= ce_info
->else_bb
;
3497 basic_block join_bb
= NULL_BLOCK
;
3502 ce_info
->last_test_bb
= test_bb
;
3504 /* We only ever should get here after reload,
3505 and if we have conditional execution. */
3506 gcc_assert (reload_completed
&& targetm
.have_conditional_execution ());
3508 /* Discover if any fall through predecessors of the current test basic block
3509 were && tests (which jump to the else block) or || tests (which jump to
3511 if (single_pred_p (test_bb
)
3512 && single_pred_edge (test_bb
)->flags
== EDGE_FALLTHRU
)
3514 basic_block bb
= single_pred (test_bb
);
3515 basic_block target_bb
;
3516 int max_insns
= MAX_CONDITIONAL_EXECUTE
;
3519 /* Determine if the preceding block is an && or || block. */
3520 if ((n_insns
= block_jumps_and_fallthru_p (bb
, else_bb
)) >= 0)
3522 ce_info
->and_and_p
= TRUE
;
3523 target_bb
= else_bb
;
3525 else if ((n_insns
= block_jumps_and_fallthru_p (bb
, then_bb
)) >= 0)
3527 ce_info
->and_and_p
= FALSE
;
3528 target_bb
= then_bb
;
3531 target_bb
= NULL_BLOCK
;
3533 if (target_bb
&& n_insns
<= max_insns
)
3535 int total_insns
= 0;
3538 ce_info
->last_test_bb
= test_bb
;
3540 /* Found at least one && or || block, look for more. */
3543 ce_info
->test_bb
= test_bb
= bb
;
3544 total_insns
+= n_insns
;
3547 if (!single_pred_p (bb
))
3550 bb
= single_pred (bb
);
3551 n_insns
= block_jumps_and_fallthru_p (bb
, target_bb
);
3553 while (n_insns
>= 0 && (total_insns
+ n_insns
) <= max_insns
);
3555 ce_info
->num_multiple_test_blocks
= blocks
;
3556 ce_info
->num_multiple_test_insns
= total_insns
;
3558 if (ce_info
->and_and_p
)
3559 ce_info
->num_and_and_blocks
= blocks
;
3561 ce_info
->num_or_or_blocks
= blocks
;
3565 /* The THEN block of an IF-THEN combo must have exactly one predecessor,
3566 other than any || blocks which jump to the THEN block. */
3567 if ((EDGE_COUNT (then_bb
->preds
) - ce_info
->num_or_or_blocks
) != 1)
3570 /* The edges of the THEN and ELSE blocks cannot have complex edges. */
3571 FOR_EACH_EDGE (cur_edge
, ei
, then_bb
->preds
)
3573 if (cur_edge
->flags
& EDGE_COMPLEX
)
3577 FOR_EACH_EDGE (cur_edge
, ei
, else_bb
->preds
)
3579 if (cur_edge
->flags
& EDGE_COMPLEX
)
3583 /* The THEN block of an IF-THEN combo must have zero or one successors. */
3584 if (EDGE_COUNT (then_bb
->succs
) > 0
3585 && (!single_succ_p (then_bb
)
3586 || (single_succ_edge (then_bb
)->flags
& EDGE_COMPLEX
)
3587 || (epilogue_completed
3588 && tablejump_p (BB_END (then_bb
), NULL
, NULL
))))
3591 /* If the THEN block has no successors, conditional execution can still
3592 make a conditional call. Don't do this unless the ELSE block has
3593 only one incoming edge -- the CFG manipulation is too ugly otherwise.
3594 Check for the last insn of the THEN block being an indirect jump, which
3595 is listed as not having any successors, but confuses the rest of the CE
3596 code processing. ??? we should fix this in the future. */
3597 if (EDGE_COUNT (then_bb
->succs
) == 0)
3599 if (single_pred_p (else_bb
) && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3601 rtx_insn
*last_insn
= BB_END (then_bb
);
3604 && NOTE_P (last_insn
)
3605 && last_insn
!= BB_HEAD (then_bb
))
3606 last_insn
= PREV_INSN (last_insn
);
3609 && JUMP_P (last_insn
)
3610 && ! simplejump_p (last_insn
))
3614 else_bb
= NULL_BLOCK
;
3620 /* If the THEN block's successor is the other edge out of the TEST block,
3621 then we have an IF-THEN combo without an ELSE. */
3622 else if (single_succ (then_bb
) == else_bb
)
3625 else_bb
= NULL_BLOCK
;
3628 /* If the THEN and ELSE block meet in a subsequent block, and the ELSE
3629 has exactly one predecessor and one successor, and the outgoing edge
3630 is not complex, then we have an IF-THEN-ELSE combo. */
3631 else if (single_succ_p (else_bb
)
3632 && single_succ (then_bb
) == single_succ (else_bb
)
3633 && single_pred_p (else_bb
)
3634 && !(single_succ_edge (else_bb
)->flags
& EDGE_COMPLEX
)
3635 && !(epilogue_completed
3636 && tablejump_p (BB_END (else_bb
), NULL
, NULL
)))
3637 join_bb
= single_succ (else_bb
);
3639 /* Otherwise it is not an IF-THEN or IF-THEN-ELSE combination. */
3643 num_possible_if_blocks
++;
3648 "\nIF-THEN%s block found, pass %d, start block %d "
3649 "[insn %d], then %d [%d]",
3650 (else_bb
) ? "-ELSE" : "",
3653 BB_HEAD (test_bb
) ? (int)INSN_UID (BB_HEAD (test_bb
)) : -1,
3655 BB_HEAD (then_bb
) ? (int)INSN_UID (BB_HEAD (then_bb
)) : -1);
3658 fprintf (dump_file
, ", else %d [%d]",
3660 BB_HEAD (else_bb
) ? (int)INSN_UID (BB_HEAD (else_bb
)) : -1);
3662 fprintf (dump_file
, ", join %d [%d]",
3664 BB_HEAD (join_bb
) ? (int)INSN_UID (BB_HEAD (join_bb
)) : -1);
3666 if (ce_info
->num_multiple_test_blocks
> 0)
3667 fprintf (dump_file
, ", %d %s block%s last test %d [%d]",
3668 ce_info
->num_multiple_test_blocks
,
3669 (ce_info
->and_and_p
) ? "&&" : "||",
3670 (ce_info
->num_multiple_test_blocks
== 1) ? "" : "s",
3671 ce_info
->last_test_bb
->index
,
3672 ((BB_HEAD (ce_info
->last_test_bb
))
3673 ? (int)INSN_UID (BB_HEAD (ce_info
->last_test_bb
))
3676 fputc ('\n', dump_file
);
3679 /* Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the
3680 first condition for free, since we've already asserted that there's a
3681 fallthru edge from IF to THEN. Likewise for the && and || blocks, since
3682 we checked the FALLTHRU flag, those are already adjacent to the last IF
3684 /* ??? As an enhancement, move the ELSE block. Have to deal with
3685 BLOCK notes, if by no other means than backing out the merge if they
3686 exist. Sticky enough I don't want to think about it now. */
3688 if (else_bb
&& (next
= next
->next_bb
) != else_bb
)
3690 if ((next
= next
->next_bb
) != join_bb
3691 && join_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
3699 /* Do the real work. */
3701 ce_info
->else_bb
= else_bb
;
3702 ce_info
->join_bb
= join_bb
;
3704 /* If we have && and || tests, try to first handle combining the && and ||
3705 tests into the conditional code, and if that fails, go back and handle
3706 it without the && and ||, which at present handles the && case if there
3707 was no ELSE block. */
3708 if (cond_exec_process_if_block (ce_info
, TRUE
))
3711 if (ce_info
->num_multiple_test_blocks
)
3715 if (cond_exec_process_if_block (ce_info
, FALSE
))
3722 /* Convert a branch over a trap, or a branch
3723 to a trap, into a conditional trap. */
3726 find_cond_trap (basic_block test_bb
, edge then_edge
, edge else_edge
)
3728 basic_block then_bb
= then_edge
->dest
;
3729 basic_block else_bb
= else_edge
->dest
;
3730 basic_block other_bb
, trap_bb
;
3731 rtx_insn
*trap
, *jump
;
3733 rtx_insn
*cond_earliest
;
3736 /* Locate the block with the trap instruction. */
3737 /* ??? While we look for no successors, we really ought to allow
3738 EH successors. Need to fix merge_if_block for that to work. */
3739 if ((trap
= block_has_only_trap (then_bb
)) != NULL
)
3740 trap_bb
= then_bb
, other_bb
= else_bb
;
3741 else if ((trap
= block_has_only_trap (else_bb
)) != NULL
)
3742 trap_bb
= else_bb
, other_bb
= then_bb
;
3748 fprintf (dump_file
, "\nTRAP-IF block found, start %d, trap %d\n",
3749 test_bb
->index
, trap_bb
->index
);
3752 /* If this is not a standard conditional jump, we can't parse it. */
3753 jump
= BB_END (test_bb
);
3754 cond
= noce_get_condition (jump
, &cond_earliest
, false);
3758 /* If the conditional jump is more than just a conditional jump, then
3759 we can not do if-conversion on this block. */
3760 if (! onlyjump_p (jump
))
3763 /* We must be comparing objects whose modes imply the size. */
3764 if (GET_MODE (XEXP (cond
, 0)) == BLKmode
)
3767 /* Reverse the comparison code, if necessary. */
3768 code
= GET_CODE (cond
);
3769 if (then_bb
== trap_bb
)
3771 code
= reversed_comparison_code (cond
, jump
);
3772 if (code
== UNKNOWN
)
3776 /* Attempt to generate the conditional trap. */
3777 seq
= gen_cond_trap (code
, copy_rtx (XEXP (cond
, 0)),
3778 copy_rtx (XEXP (cond
, 1)),
3779 TRAP_CODE (PATTERN (trap
)));
3783 /* Emit the new insns before cond_earliest. */
3784 emit_insn_before_setloc (seq
, cond_earliest
, INSN_LOCATION (trap
));
3786 /* Delete the trap block if possible. */
3787 remove_edge (trap_bb
== then_bb
? then_edge
: else_edge
);
3788 df_set_bb_dirty (test_bb
);
3789 df_set_bb_dirty (then_bb
);
3790 df_set_bb_dirty (else_bb
);
3792 if (EDGE_COUNT (trap_bb
->preds
) == 0)
3794 delete_basic_block (trap_bb
);
3798 /* Wire together the blocks again. */
3799 if (current_ir_type () == IR_RTL_CFGLAYOUT
)
3800 single_succ_edge (test_bb
)->flags
|= EDGE_FALLTHRU
;
3801 else if (trap_bb
== then_bb
)
3806 lab
= JUMP_LABEL (jump
);
3807 newjump
= emit_jump_insn_after (gen_jump (lab
), jump
);
3808 LABEL_NUSES (lab
) += 1;
3809 JUMP_LABEL (newjump
) = lab
;
3810 emit_barrier_after (newjump
);
3814 if (can_merge_blocks_p (test_bb
, other_bb
))
3816 merge_blocks (test_bb
, other_bb
);
3820 num_updated_if_blocks
++;
3824 /* Subroutine of find_cond_trap: if BB contains only a trap insn,
3828 block_has_only_trap (basic_block bb
)
3832 /* We're not the exit block. */
3833 if (bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
3836 /* The block must have no successors. */
3837 if (EDGE_COUNT (bb
->succs
) > 0)
3840 /* The only instruction in the THEN block must be the trap. */
3841 trap
= first_active_insn (bb
);
3842 if (! (trap
== BB_END (bb
)
3843 && GET_CODE (PATTERN (trap
)) == TRAP_IF
3844 && TRAP_CONDITION (PATTERN (trap
)) == const_true_rtx
))
3850 /* Look for IF-THEN-ELSE cases in which one of THEN or ELSE is
3851 transformable, but not necessarily the other. There need be no
3854 Return TRUE if we were successful at converting the block.
3856 Cases we'd like to look at:
3859 if (test) goto over; // x not live
3867 if (! test) goto label;
3870 if (test) goto E; // x not live
3884 (3) // This one's really only interesting for targets that can do
3885 // multiway branching, e.g. IA-64 BBB bundles. For other targets
3886 // it results in multiple branches on a cache line, which often
3887 // does not sit well with predictors.
3889 if (test1) goto E; // predicted not taken
3905 (A) Don't do (2) if the branch is predicted against the block we're
3906 eliminating. Do it anyway if we can eliminate a branch; this requires
3907 that the sole successor of the eliminated block postdominate the other
3910 (B) With CE, on (3) we can steal from both sides of the if, creating
3919 Again, this is most useful if J postdominates.
3921 (C) CE substitutes for helpful life information.
3923 (D) These heuristics need a lot of work. */
3925 /* Tests for case 1 above. */
3928 find_if_case_1 (basic_block test_bb
, edge then_edge
, edge else_edge
)
3930 basic_block then_bb
= then_edge
->dest
;
3931 basic_block else_bb
= else_edge
->dest
;
3933 int then_bb_index
, then_prob
;
3934 rtx else_target
= NULL_RTX
;
3936 /* If we are partitioning hot/cold basic blocks, we don't want to
3937 mess up unconditional or indirect jumps that cross between hot
3940 Basic block partitioning may result in some jumps that appear to
3941 be optimizable (or blocks that appear to be mergeable), but which really
3942 must be left untouched (they are required to make it safely across
3943 partition boundaries). See the comments at the top of
3944 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
3946 if ((BB_END (then_bb
)
3947 && JUMP_P (BB_END (then_bb
))
3948 && CROSSING_JUMP_P (BB_END (then_bb
)))
3949 || (BB_END (test_bb
)
3950 && JUMP_P (BB_END (test_bb
))
3951 && CROSSING_JUMP_P (BB_END (test_bb
)))
3952 || (BB_END (else_bb
)
3953 && JUMP_P (BB_END (else_bb
))
3954 && CROSSING_JUMP_P (BB_END (else_bb
))))
3957 /* THEN has one successor. */
3958 if (!single_succ_p (then_bb
))
3961 /* THEN does not fall through, but is not strange either. */
3962 if (single_succ_edge (then_bb
)->flags
& (EDGE_COMPLEX
| EDGE_FALLTHRU
))
3965 /* THEN has one predecessor. */
3966 if (!single_pred_p (then_bb
))
3969 /* THEN must do something. */
3970 if (forwarder_block_p (then_bb
))
3973 num_possible_if_blocks
++;
3976 "\nIF-CASE-1 found, start %d, then %d\n",
3977 test_bb
->index
, then_bb
->index
);
3979 if (then_edge
->probability
)
3980 then_prob
= REG_BR_PROB_BASE
- then_edge
->probability
;
3982 then_prob
= REG_BR_PROB_BASE
/ 2;
3984 /* We're speculating from the THEN path, we want to make sure the cost
3985 of speculation is within reason. */
3986 if (! cheap_bb_rtx_cost_p (then_bb
, then_prob
,
3987 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (then_edge
->src
),
3988 predictable_edge_p (then_edge
)))))
3991 if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
3993 rtx_insn
*jump
= BB_END (else_edge
->src
);
3994 gcc_assert (JUMP_P (jump
));
3995 else_target
= JUMP_LABEL (jump
);
3998 /* Registers set are dead, or are predicable. */
3999 if (! dead_or_predicable (test_bb
, then_bb
, else_bb
,
4000 single_succ_edge (then_bb
), 1))
4003 /* Conversion went ok, including moving the insns and fixing up the
4004 jump. Adjust the CFG to match. */
4006 /* We can avoid creating a new basic block if then_bb is immediately
4007 followed by else_bb, i.e. deleting then_bb allows test_bb to fall
4008 through to else_bb. */
4010 if (then_bb
->next_bb
== else_bb
4011 && then_bb
->prev_bb
== test_bb
4012 && else_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
4014 redirect_edge_succ (FALLTHRU_EDGE (test_bb
), else_bb
);
4017 else if (else_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4018 new_bb
= force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb
),
4019 else_bb
, else_target
);
4021 new_bb
= redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb
),
4024 df_set_bb_dirty (test_bb
);
4025 df_set_bb_dirty (else_bb
);
4027 then_bb_index
= then_bb
->index
;
4028 delete_basic_block (then_bb
);
4030 /* Make rest of code believe that the newly created block is the THEN_BB
4031 block we removed. */
4034 df_bb_replace (then_bb_index
, new_bb
);
4035 /* This should have been done above via force_nonfallthru_and_redirect
4036 (possibly called from redirect_edge_and_branch_force). */
4037 gcc_checking_assert (BB_PARTITION (new_bb
) == BB_PARTITION (test_bb
));
4041 num_updated_if_blocks
++;
4046 /* Test for case 2 above. */
4049 find_if_case_2 (basic_block test_bb
, edge then_edge
, edge else_edge
)
4051 basic_block then_bb
= then_edge
->dest
;
4052 basic_block else_bb
= else_edge
->dest
;
4054 int then_prob
, else_prob
;
4056 /* We do not want to speculate (empty) loop latches. */
4058 && else_bb
->loop_father
->latch
== else_bb
)
4061 /* If we are partitioning hot/cold basic blocks, we don't want to
4062 mess up unconditional or indirect jumps that cross between hot
4065 Basic block partitioning may result in some jumps that appear to
4066 be optimizable (or blocks that appear to be mergeable), but which really
4067 must be left untouched (they are required to make it safely across
4068 partition boundaries). See the comments at the top of
4069 bb-reorder.c:partition_hot_cold_basic_blocks for complete details. */
4071 if ((BB_END (then_bb
)
4072 && JUMP_P (BB_END (then_bb
))
4073 && CROSSING_JUMP_P (BB_END (then_bb
)))
4074 || (BB_END (test_bb
)
4075 && JUMP_P (BB_END (test_bb
))
4076 && CROSSING_JUMP_P (BB_END (test_bb
)))
4077 || (BB_END (else_bb
)
4078 && JUMP_P (BB_END (else_bb
))
4079 && CROSSING_JUMP_P (BB_END (else_bb
))))
4082 /* ELSE has one successor. */
4083 if (!single_succ_p (else_bb
))
4086 else_succ
= single_succ_edge (else_bb
);
4088 /* ELSE outgoing edge is not complex. */
4089 if (else_succ
->flags
& EDGE_COMPLEX
)
4092 /* ELSE has one predecessor. */
4093 if (!single_pred_p (else_bb
))
4096 /* THEN is not EXIT. */
4097 if (then_bb
->index
< NUM_FIXED_BLOCKS
)
4100 if (else_edge
->probability
)
4102 else_prob
= else_edge
->probability
;
4103 then_prob
= REG_BR_PROB_BASE
- else_prob
;
4107 else_prob
= REG_BR_PROB_BASE
/ 2;
4108 then_prob
= REG_BR_PROB_BASE
/ 2;
4111 /* ELSE is predicted or SUCC(ELSE) postdominates THEN. */
4112 if (else_prob
> then_prob
)
4114 else if (else_succ
->dest
->index
< NUM_FIXED_BLOCKS
4115 || dominated_by_p (CDI_POST_DOMINATORS
, then_bb
,
4121 num_possible_if_blocks
++;
4124 "\nIF-CASE-2 found, start %d, else %d\n",
4125 test_bb
->index
, else_bb
->index
);
4127 /* We're speculating from the ELSE path, we want to make sure the cost
4128 of speculation is within reason. */
4129 if (! cheap_bb_rtx_cost_p (else_bb
, else_prob
,
4130 COSTS_N_INSNS (BRANCH_COST (optimize_bb_for_speed_p (else_edge
->src
),
4131 predictable_edge_p (else_edge
)))))
4134 /* Registers set are dead, or are predicable. */
4135 if (! dead_or_predicable (test_bb
, else_bb
, then_bb
, else_succ
, 0))
4138 /* Conversion went ok, including moving the insns and fixing up the
4139 jump. Adjust the CFG to match. */
4141 df_set_bb_dirty (test_bb
);
4142 df_set_bb_dirty (then_bb
);
4143 delete_basic_block (else_bb
);
4146 num_updated_if_blocks
++;
4148 /* ??? We may now fallthru from one of THEN's successors into a join
4149 block. Rerun cleanup_cfg? Examine things manually? Wait? */
4154 /* Used by the code above to perform the actual rtl transformations.
4155 Return TRUE if successful.
4157 TEST_BB is the block containing the conditional branch. MERGE_BB
4158 is the block containing the code to manipulate. DEST_EDGE is an
4159 edge representing a jump to the join block; after the conversion,
4160 TEST_BB should be branching to its destination.
4161 REVERSEP is true if the sense of the branch should be reversed. */
4164 dead_or_predicable (basic_block test_bb
, basic_block merge_bb
,
4165 basic_block other_bb
, edge dest_edge
, int reversep
)
4167 basic_block new_dest
= dest_edge
->dest
;
4168 rtx_insn
*head
, *end
, *jump
;
4169 rtx_insn
*earliest
= NULL
;
4171 bitmap merge_set
= NULL
;
4172 /* Number of pending changes. */
4173 int n_validated_changes
= 0;
4174 rtx new_dest_label
= NULL_RTX
;
4176 jump
= BB_END (test_bb
);
4178 /* Find the extent of the real code in the merge block. */
4179 head
= BB_HEAD (merge_bb
);
4180 end
= BB_END (merge_bb
);
4182 while (DEBUG_INSN_P (end
) && end
!= head
)
4183 end
= PREV_INSN (end
);
4185 /* If merge_bb ends with a tablejump, predicating/moving insn's
4186 into test_bb and then deleting merge_bb will result in the jumptable
4187 that follows merge_bb being removed along with merge_bb and then we
4188 get an unresolved reference to the jumptable. */
4189 if (tablejump_p (end
, NULL
, NULL
))
4193 head
= NEXT_INSN (head
);
4194 while (DEBUG_INSN_P (head
) && head
!= end
)
4195 head
= NEXT_INSN (head
);
4203 head
= NEXT_INSN (head
);
4204 while (DEBUG_INSN_P (head
) && head
!= end
)
4205 head
= NEXT_INSN (head
);
4210 if (!onlyjump_p (end
))
4217 end
= PREV_INSN (end
);
4218 while (DEBUG_INSN_P (end
) && end
!= head
)
4219 end
= PREV_INSN (end
);
4222 /* Don't move frame-related insn across the conditional branch. This
4223 can lead to one of the paths of the branch having wrong unwind info. */
4224 if (epilogue_completed
)
4226 rtx_insn
*insn
= head
;
4229 if (INSN_P (insn
) && RTX_FRAME_RELATED_P (insn
))
4233 insn
= NEXT_INSN (insn
);
4237 /* Disable handling dead code by conditional execution if the machine needs
4238 to do anything funny with the tests, etc. */
4239 #ifndef IFCVT_MODIFY_TESTS
4240 if (targetm
.have_conditional_execution ())
4242 /* In the conditional execution case, we have things easy. We know
4243 the condition is reversible. We don't have to check life info
4244 because we're going to conditionally execute the code anyway.
4245 All that's left is making sure the insns involved can actually
4250 cond
= cond_exec_get_condition (jump
);
4254 rtx note
= find_reg_note (jump
, REG_BR_PROB
, NULL_RTX
);
4255 int prob_val
= (note
? XINT (note
, 0) : -1);
4259 enum rtx_code rev
= reversed_comparison_code (cond
, jump
);
4262 cond
= gen_rtx_fmt_ee (rev
, GET_MODE (cond
), XEXP (cond
, 0),
4265 prob_val
= REG_BR_PROB_BASE
- prob_val
;
4268 if (cond_exec_process_insns (NULL
, head
, end
, cond
, prob_val
, 0)
4269 && verify_changes (0))
4270 n_validated_changes
= num_validated_changes ();
4278 /* If we allocated new pseudos (e.g. in the conditional move
4279 expander called from noce_emit_cmove), we must resize the
4281 if (max_regno
< max_reg_num ())
4282 max_regno
= max_reg_num ();
4284 /* Try the NCE path if the CE path did not result in any changes. */
4285 if (n_validated_changes
== 0)
4292 /* In the non-conditional execution case, we have to verify that there
4293 are no trapping operations, no calls, no references to memory, and
4294 that any registers modified are dead at the branch site. */
4296 if (!any_condjump_p (jump
))
4299 /* Find the extent of the conditional. */
4300 cond
= noce_get_condition (jump
, &earliest
, false);
4304 live
= BITMAP_ALLOC (®_obstack
);
4305 simulate_backwards_to_point (merge_bb
, live
, end
);
4306 success
= can_move_insns_across (head
, end
, earliest
, jump
,
4308 df_get_live_in (other_bb
), NULL
);
4313 /* Collect the set of registers set in MERGE_BB. */
4314 merge_set
= BITMAP_ALLOC (®_obstack
);
4316 FOR_BB_INSNS (merge_bb
, insn
)
4317 if (NONDEBUG_INSN_P (insn
))
4318 df_simulate_find_defs (insn
, merge_set
);
4320 /* If shrink-wrapping, disable this optimization when test_bb is
4321 the first basic block and merge_bb exits. The idea is to not
4322 move code setting up a return register as that may clobber a
4323 register used to pass function parameters, which then must be
4324 saved in caller-saved regs. A caller-saved reg requires the
4325 prologue, killing a shrink-wrap opportunity. */
4326 if ((SHRINK_WRAPPING_ENABLED
&& !epilogue_completed
)
4327 && ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
== test_bb
4328 && single_succ_p (new_dest
)
4329 && single_succ (new_dest
) == EXIT_BLOCK_PTR_FOR_FN (cfun
)
4330 && bitmap_intersect_p (df_get_live_in (new_dest
), merge_set
))
4335 return_regs
= BITMAP_ALLOC (®_obstack
);
4337 /* Start off with the intersection of regs used to pass
4338 params and regs used to return values. */
4339 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
4340 if (FUNCTION_ARG_REGNO_P (i
)
4341 && targetm
.calls
.function_value_regno_p (i
))
4342 bitmap_set_bit (return_regs
, INCOMING_REGNO (i
));
4344 bitmap_and_into (return_regs
,
4345 df_get_live_out (ENTRY_BLOCK_PTR_FOR_FN (cfun
)));
4346 bitmap_and_into (return_regs
,
4347 df_get_live_in (EXIT_BLOCK_PTR_FOR_FN (cfun
)));
4348 if (!bitmap_empty_p (return_regs
))
4350 FOR_BB_INSNS_REVERSE (new_dest
, insn
)
4351 if (NONDEBUG_INSN_P (insn
))
4355 /* If this insn sets any reg in return_regs, add all
4356 reg uses to the set of regs we're interested in. */
4357 FOR_EACH_INSN_DEF (def
, insn
)
4358 if (bitmap_bit_p (return_regs
, DF_REF_REGNO (def
)))
4360 df_simulate_uses (insn
, return_regs
);
4364 if (bitmap_intersect_p (merge_set
, return_regs
))
4366 BITMAP_FREE (return_regs
);
4367 BITMAP_FREE (merge_set
);
4371 BITMAP_FREE (return_regs
);
4376 /* We don't want to use normal invert_jump or redirect_jump because
4377 we don't want to delete_insn called. Also, we want to do our own
4378 change group management. */
4380 old_dest
= JUMP_LABEL (jump
);
4381 if (other_bb
!= new_dest
)
4383 if (!any_condjump_p (jump
))
4386 if (JUMP_P (BB_END (dest_edge
->src
)))
4387 new_dest_label
= JUMP_LABEL (BB_END (dest_edge
->src
));
4388 else if (new_dest
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
4389 new_dest_label
= ret_rtx
;
4391 new_dest_label
= block_label (new_dest
);
4394 ? ! invert_jump_1 (jump
, new_dest_label
)
4395 : ! redirect_jump_1 (jump
, new_dest_label
))
4399 if (verify_changes (n_validated_changes
))
4400 confirm_change_group ();
4404 if (other_bb
!= new_dest
)
4406 redirect_jump_2 (jump
, old_dest
, new_dest_label
, 0, reversep
);
4408 redirect_edge_succ (BRANCH_EDGE (test_bb
), new_dest
);
4411 gcov_type count
, probability
;
4412 count
= BRANCH_EDGE (test_bb
)->count
;
4413 BRANCH_EDGE (test_bb
)->count
= FALLTHRU_EDGE (test_bb
)->count
;
4414 FALLTHRU_EDGE (test_bb
)->count
= count
;
4415 probability
= BRANCH_EDGE (test_bb
)->probability
;
4416 BRANCH_EDGE (test_bb
)->probability
4417 = FALLTHRU_EDGE (test_bb
)->probability
;
4418 FALLTHRU_EDGE (test_bb
)->probability
= probability
;
4419 update_br_prob_note (test_bb
);
4423 /* Move the insns out of MERGE_BB to before the branch. */
4428 if (end
== BB_END (merge_bb
))
4429 BB_END (merge_bb
) = PREV_INSN (head
);
4431 /* PR 21767: when moving insns above a conditional branch, the REG_EQUAL
4432 notes being moved might become invalid. */
4438 if (! INSN_P (insn
))
4440 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
4443 remove_note (insn
, note
);
4444 } while (insn
!= end
&& (insn
= NEXT_INSN (insn
)));
4446 /* PR46315: when moving insns above a conditional branch, the REG_EQUAL
4447 notes referring to the registers being set might become invalid. */
4453 EXECUTE_IF_SET_IN_BITMAP (merge_set
, 0, i
, bi
)
4454 remove_reg_equal_equiv_notes_for_regno (i
);
4456 BITMAP_FREE (merge_set
);
4459 reorder_insns (head
, end
, PREV_INSN (earliest
));
4462 /* Remove the jump and edge if we can. */
4463 if (other_bb
== new_dest
)
4466 remove_edge (BRANCH_EDGE (test_bb
));
4467 /* ??? Can't merge blocks here, as then_bb is still in use.
4468 At minimum, the merge will get done just before bb-reorder. */
4477 BITMAP_FREE (merge_set
);
4482 /* Main entry point for all if-conversion. AFTER_COMBINE is true if
4483 we are after combine pass. */
4486 if_convert (bool after_combine
)
4493 df_live_add_problem ();
4494 df_live_set_all_dirty ();
4497 /* Record whether we are after combine pass. */
4498 ifcvt_after_combine
= after_combine
;
4499 num_possible_if_blocks
= 0;
4500 num_updated_if_blocks
= 0;
4501 num_true_changes
= 0;
4503 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
4504 mark_loop_exit_edges ();
4505 loop_optimizer_finalize ();
4506 free_dominance_info (CDI_DOMINATORS
);
4508 /* Compute postdominators. */
4509 calculate_dominance_info (CDI_POST_DOMINATORS
);
4511 df_set_flags (DF_LR_RUN_DCE
);
4513 /* Go through each of the basic blocks looking for things to convert. If we
4514 have conditional execution, we make multiple passes to allow us to handle
4515 IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. */
4520 /* Only need to do dce on the first pass. */
4521 df_clear_flags (DF_LR_RUN_DCE
);
4522 cond_exec_changed_p
= FALSE
;
4525 #ifdef IFCVT_MULTIPLE_DUMPS
4526 if (dump_file
&& pass
> 1)
4527 fprintf (dump_file
, "\n\n========== Pass %d ==========\n", pass
);
4530 FOR_EACH_BB_FN (bb
, cfun
)
4533 while (!df_get_bb_dirty (bb
)
4534 && (new_bb
= find_if_header (bb
, pass
)) != NULL
)
4538 #ifdef IFCVT_MULTIPLE_DUMPS
4539 if (dump_file
&& cond_exec_changed_p
)
4540 print_rtl_with_bb (dump_file
, get_insns (), dump_flags
);
4543 while (cond_exec_changed_p
);
4545 #ifdef IFCVT_MULTIPLE_DUMPS
4547 fprintf (dump_file
, "\n\n========== no more changes\n");
4550 free_dominance_info (CDI_POST_DOMINATORS
);
4555 clear_aux_for_blocks ();
4557 /* If we allocated new pseudos, we must resize the array for sched1. */
4558 if (max_regno
< max_reg_num ())
4559 max_regno
= max_reg_num ();
4561 /* Write the final stats. */
4562 if (dump_file
&& num_possible_if_blocks
> 0)
4565 "\n%d possible IF blocks searched.\n",
4566 num_possible_if_blocks
);
4568 "%d IF blocks converted.\n",
4569 num_updated_if_blocks
);
4571 "%d true changes made.\n\n\n",
4576 df_remove_problem (df_live
);
4578 #ifdef ENABLE_CHECKING
4579 verify_flow_info ();
4583 /* If-conversion and CFG cleanup. */
4585 rest_of_handle_if_conversion (void)
4587 if (flag_if_conversion
)
4591 dump_reg_info (dump_file
);
4592 dump_flow_info (dump_file
, dump_flags
);
4594 cleanup_cfg (CLEANUP_EXPENSIVE
);
4604 const pass_data pass_data_rtl_ifcvt
=
4606 RTL_PASS
, /* type */
4608 OPTGROUP_NONE
, /* optinfo_flags */
4609 TV_IFCVT
, /* tv_id */
4610 0, /* properties_required */
4611 0, /* properties_provided */
4612 0, /* properties_destroyed */
4613 0, /* todo_flags_start */
4614 TODO_df_finish
, /* todo_flags_finish */
4617 class pass_rtl_ifcvt
: public rtl_opt_pass
4620 pass_rtl_ifcvt (gcc::context
*ctxt
)
4621 : rtl_opt_pass (pass_data_rtl_ifcvt
, ctxt
)
4624 /* opt_pass methods: */
4625 virtual bool gate (function
*)
4627 return (optimize
> 0) && dbg_cnt (if_conversion
);
4630 virtual unsigned int execute (function
*)
4632 return rest_of_handle_if_conversion ();
4635 }; // class pass_rtl_ifcvt
4640 make_pass_rtl_ifcvt (gcc::context
*ctxt
)
4642 return new pass_rtl_ifcvt (ctxt
);
4646 /* Rerun if-conversion, as combine may have simplified things enough
4647 to now meet sequence length restrictions. */
4651 const pass_data pass_data_if_after_combine
=
4653 RTL_PASS
, /* type */
4655 OPTGROUP_NONE
, /* optinfo_flags */
4656 TV_IFCVT
, /* tv_id */
4657 0, /* properties_required */
4658 0, /* properties_provided */
4659 0, /* properties_destroyed */
4660 0, /* todo_flags_start */
4661 TODO_df_finish
, /* todo_flags_finish */
4664 class pass_if_after_combine
: public rtl_opt_pass
4667 pass_if_after_combine (gcc::context
*ctxt
)
4668 : rtl_opt_pass (pass_data_if_after_combine
, ctxt
)
4671 /* opt_pass methods: */
4672 virtual bool gate (function
*)
4674 return optimize
> 0 && flag_if_conversion
4675 && dbg_cnt (if_after_combine
);
4678 virtual unsigned int execute (function
*)
4684 }; // class pass_if_after_combine
4689 make_pass_if_after_combine (gcc::context
*ctxt
)
4691 return new pass_if_after_combine (ctxt
);
4697 const pass_data pass_data_if_after_reload
=
4699 RTL_PASS
, /* type */
4701 OPTGROUP_NONE
, /* optinfo_flags */
4702 TV_IFCVT2
, /* tv_id */
4703 0, /* properties_required */
4704 0, /* properties_provided */
4705 0, /* properties_destroyed */
4706 0, /* todo_flags_start */
4707 TODO_df_finish
, /* todo_flags_finish */
4710 class pass_if_after_reload
: public rtl_opt_pass
4713 pass_if_after_reload (gcc::context
*ctxt
)
4714 : rtl_opt_pass (pass_data_if_after_reload
, ctxt
)
4717 /* opt_pass methods: */
4718 virtual bool gate (function
*)
4720 return optimize
> 0 && flag_if_conversion2
4721 && dbg_cnt (if_after_reload
);
4724 virtual unsigned int execute (function
*)
4730 }; // class pass_if_after_reload
4735 make_pass_if_after_reload (gcc::context
*ctxt
)
4737 return new pass_if_after_reload (ctxt
);