1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2021 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
65 #include "tree-pretty-print.h"
69 /* If this is nonzero, we do not bother generating VOLATILE
70 around volatile memory references, and we are willing to
71 output indirect addresses. If cse is to follow, we reject
72 indirect addresses so a useful potential cse is generated;
73 if it is used only once, instruction combination will produce
74 the same indirect address eventually. */
77 static bool block_move_libcall_safe_for_call_parm (void);
78 static bool emit_block_move_via_pattern (rtx
, rtx
, rtx
, unsigned, unsigned,
79 HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
80 unsigned HOST_WIDE_INT
,
81 unsigned HOST_WIDE_INT
, bool);
82 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
83 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
84 static rtx_insn
*compress_float_constant (rtx
, rtx
);
85 static rtx
get_subtarget (rtx
);
86 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
87 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
88 machine_mode
, tree
, alias_set_type
, bool, bool);
90 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
92 static int is_aligning_offset (const_tree
, const_tree
);
93 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
94 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
96 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
98 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
100 static rtx
const_vector_from_tree (tree
);
101 static tree
tree_expr_size (const_tree
);
102 static HOST_WIDE_INT
int_expr_size (tree
);
103 static void convert_mode_scalar (rtx
, rtx
, int);
106 /* This is run to set up which modes can be used
107 directly in memory and to initialize the block move optab. It is run
108 at the beginning of compilation and when the target is reinitialized. */
111 init_expr_target (void)
118 /* Try indexing by frame ptr and try by stack ptr.
119 It is known that on the Convex the stack ptr isn't a valid index.
120 With luck, one or the other is valid on any machine. */
121 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
122 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
124 /* A scratch register we can modify in-place below to avoid
125 useless RTL allocations. */
126 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
128 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
129 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
130 PATTERN (insn
) = pat
;
132 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
133 mode
= (machine_mode
) ((int) mode
+ 1))
137 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
138 PUT_MODE (mem
, mode
);
139 PUT_MODE (mem1
, mode
);
141 /* See if there is some register that can be used in this mode and
142 directly loaded or stored from memory. */
144 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
145 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
146 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
149 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
152 set_mode_and_regno (reg
, mode
, regno
);
155 SET_DEST (pat
) = reg
;
156 if (recog (pat
, insn
, &num_clobbers
) >= 0)
157 direct_load
[(int) mode
] = 1;
159 SET_SRC (pat
) = mem1
;
160 SET_DEST (pat
) = reg
;
161 if (recog (pat
, insn
, &num_clobbers
) >= 0)
162 direct_load
[(int) mode
] = 1;
165 SET_DEST (pat
) = mem
;
166 if (recog (pat
, insn
, &num_clobbers
) >= 0)
167 direct_store
[(int) mode
] = 1;
170 SET_DEST (pat
) = mem1
;
171 if (recog (pat
, insn
, &num_clobbers
) >= 0)
172 direct_store
[(int) mode
] = 1;
176 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
178 opt_scalar_float_mode mode_iter
;
179 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
181 scalar_float_mode mode
= mode_iter
.require ();
182 scalar_float_mode srcmode
;
183 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
187 ic
= can_extend_p (mode
, srcmode
, 0);
188 if (ic
== CODE_FOR_nothing
)
191 PUT_MODE (mem
, srcmode
);
193 if (insn_operand_matches (ic
, 1, mem
))
194 float_extend_from_mem
[mode
][srcmode
] = true;
199 /* This is run at the start of compiling a function. */
204 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
207 /* Copy data from FROM to TO, where the machine modes are not the same.
208 Both modes may be integer, or both may be floating, or both may be
210 UNSIGNEDP should be nonzero if FROM is an unsigned type.
211 This causes zero-extension instead of sign-extension. */
214 convert_move (rtx to
, rtx from
, int unsignedp
)
216 machine_mode to_mode
= GET_MODE (to
);
217 machine_mode from_mode
= GET_MODE (from
);
219 gcc_assert (to_mode
!= BLKmode
);
220 gcc_assert (from_mode
!= BLKmode
);
222 /* If the source and destination are already the same, then there's
227 /* If FROM is a SUBREG that indicates that we have already done at least
228 the required extension, strip it. We don't handle such SUBREGs as
231 scalar_int_mode to_int_mode
;
232 if (GET_CODE (from
) == SUBREG
233 && SUBREG_PROMOTED_VAR_P (from
)
234 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
235 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
236 >= GET_MODE_PRECISION (to_int_mode
))
237 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
239 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
240 from_mode
= to_int_mode
;
243 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
245 if (to_mode
== from_mode
246 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
248 emit_move_insn (to
, from
);
252 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
254 if (GET_MODE_UNIT_PRECISION (to_mode
)
255 > GET_MODE_UNIT_PRECISION (from_mode
))
257 optab op
= unsignedp
? zext_optab
: sext_optab
;
258 insn_code icode
= convert_optab_handler (op
, to_mode
, from_mode
);
259 if (icode
!= CODE_FOR_nothing
)
261 emit_unop_insn (icode
, to
, from
,
262 unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
);
267 if (GET_MODE_UNIT_PRECISION (to_mode
)
268 < GET_MODE_UNIT_PRECISION (from_mode
))
270 insn_code icode
= convert_optab_handler (trunc_optab
,
272 if (icode
!= CODE_FOR_nothing
)
274 emit_unop_insn (icode
, to
, from
, TRUNCATE
);
279 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
280 GET_MODE_BITSIZE (to_mode
)));
282 if (VECTOR_MODE_P (to_mode
))
283 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
285 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
287 emit_move_insn (to
, from
);
291 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
293 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
294 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
298 convert_mode_scalar (to
, from
, unsignedp
);
301 /* Like convert_move, but deals only with scalar modes. */
304 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
306 /* Both modes should be scalar types. */
307 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
308 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
309 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
310 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
314 gcc_assert (to_real
== from_real
);
316 /* rtx code for making an equivalent value. */
317 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
318 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
326 gcc_assert ((GET_MODE_PRECISION (from_mode
)
327 != GET_MODE_PRECISION (to_mode
))
328 || (DECIMAL_FLOAT_MODE_P (from_mode
)
329 != DECIMAL_FLOAT_MODE_P (to_mode
)));
331 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
332 /* Conversion between decimal float and binary float, same size. */
333 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
334 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
339 /* Try converting directly if the insn is supported. */
341 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
342 if (code
!= CODE_FOR_nothing
)
344 emit_unop_insn (code
, to
, from
,
345 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
349 /* Otherwise use a libcall. */
350 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
352 /* Is this conversion implemented yet? */
353 gcc_assert (libcall
);
356 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
358 insns
= get_insns ();
360 emit_libcall_block (insns
, to
, value
,
361 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
363 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
367 /* Handle pointer conversion. */ /* SPEE 900220. */
368 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
372 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
379 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
382 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
388 /* Targets are expected to provide conversion insns between PxImode and
389 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
390 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
392 scalar_int_mode full_mode
393 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
395 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
396 != CODE_FOR_nothing
);
398 if (full_mode
!= from_mode
)
399 from
= convert_to_mode (full_mode
, from
, unsignedp
);
400 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
404 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
407 scalar_int_mode full_mode
408 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
409 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
410 enum insn_code icode
;
412 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
413 gcc_assert (icode
!= CODE_FOR_nothing
);
415 if (to_mode
== full_mode
)
417 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
421 new_from
= gen_reg_rtx (full_mode
);
422 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
424 /* else proceed to integer conversions below. */
425 from_mode
= full_mode
;
429 /* Make sure both are fixed-point modes or both are not. */
430 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
431 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
432 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
434 /* If we widen from_mode to to_mode and they are in the same class,
435 we won't saturate the result.
436 Otherwise, always saturate the result to play safe. */
437 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
438 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
439 expand_fixed_convert (to
, from
, 0, 0);
441 expand_fixed_convert (to
, from
, 0, 1);
445 /* Now both modes are integers. */
447 /* Handle expanding beyond a word. */
448 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
449 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
456 scalar_mode lowpart_mode
;
457 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
459 /* Try converting directly if the insn is supported. */
460 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
463 /* If FROM is a SUBREG, put it into a register. Do this
464 so that we always generate the same set of insns for
465 better cse'ing; if an intermediate assignment occurred,
466 we won't be doing the operation directly on the SUBREG. */
467 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
468 from
= force_reg (from_mode
, from
);
469 emit_unop_insn (code
, to
, from
, equiv_code
);
472 /* Next, try converting via full word. */
473 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
474 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
475 != CODE_FOR_nothing
))
477 rtx word_to
= gen_reg_rtx (word_mode
);
480 if (reg_overlap_mentioned_p (to
, from
))
481 from
= force_reg (from_mode
, from
);
484 convert_move (word_to
, from
, unsignedp
);
485 emit_unop_insn (code
, to
, word_to
, equiv_code
);
489 /* No special multiword conversion insn; do it by hand. */
492 /* Since we will turn this into a no conflict block, we must ensure
493 the source does not overlap the target so force it into an isolated
494 register when maybe so. Likewise for any MEM input, since the
495 conversion sequence might require several references to it and we
496 must ensure we're getting the same value every time. */
498 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
499 from
= force_reg (from_mode
, from
);
501 /* Get a copy of FROM widened to a word, if necessary. */
502 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
503 lowpart_mode
= word_mode
;
505 lowpart_mode
= from_mode
;
507 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
509 lowpart
= gen_lowpart (lowpart_mode
, to
);
510 emit_move_insn (lowpart
, lowfrom
);
512 /* Compute the value to put in each remaining word. */
514 fill_value
= const0_rtx
;
516 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
517 LT
, lowfrom
, const0_rtx
,
518 lowpart_mode
, 0, -1);
520 /* Fill the remaining words. */
521 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
523 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
524 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
526 gcc_assert (subword
);
528 if (fill_value
!= subword
)
529 emit_move_insn (subword
, fill_value
);
532 insns
= get_insns ();
539 /* Truncating multi-word to a word or less. */
540 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
541 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
544 && ! MEM_VOLATILE_P (from
)
545 && direct_load
[(int) to_mode
]
546 && ! mode_dependent_address_p (XEXP (from
, 0),
547 MEM_ADDR_SPACE (from
)))
549 || GET_CODE (from
) == SUBREG
))
550 from
= force_reg (from_mode
, from
);
551 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
555 /* Now follow all the conversions between integers
556 no more than a word long. */
558 /* For truncation, usually we can just refer to FROM in a narrower mode. */
559 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
560 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
563 && ! MEM_VOLATILE_P (from
)
564 && direct_load
[(int) to_mode
]
565 && ! mode_dependent_address_p (XEXP (from
, 0),
566 MEM_ADDR_SPACE (from
)))
568 || GET_CODE (from
) == SUBREG
))
569 from
= force_reg (from_mode
, from
);
570 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
571 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
572 from
= copy_to_reg (from
);
573 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
577 /* Handle extension. */
578 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
580 /* Convert directly if that works. */
581 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
584 emit_unop_insn (code
, to
, from
, equiv_code
);
592 /* Search for a mode to convert via. */
593 opt_scalar_mode intermediate_iter
;
594 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
596 scalar_mode intermediate
= intermediate_iter
.require ();
597 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
599 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
600 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
602 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
603 != CODE_FOR_nothing
))
605 convert_move (to
, convert_to_mode (intermediate
, from
,
606 unsignedp
), unsignedp
);
611 /* No suitable intermediate mode.
612 Generate what we need with shifts. */
613 shift_amount
= (GET_MODE_PRECISION (to_mode
)
614 - GET_MODE_PRECISION (from_mode
));
615 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
616 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
618 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
621 emit_move_insn (to
, tmp
);
626 /* Support special truncate insns for certain modes. */
627 if (convert_optab_handler (trunc_optab
, to_mode
,
628 from_mode
) != CODE_FOR_nothing
)
630 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
635 /* Handle truncation of volatile memrefs, and so on;
636 the things that couldn't be truncated directly,
637 and for which there was no special instruction.
639 ??? Code above formerly short-circuited this, for most integer
640 mode pairs, with a force_reg in from_mode followed by a recursive
641 call to this routine. Appears always to have been wrong. */
642 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
644 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
645 emit_move_insn (to
, temp
);
649 /* Mode combination is not recognized. */
653 /* Return an rtx for a value that would result
654 from converting X to mode MODE.
655 Both X and MODE may be floating, or both integer.
656 UNSIGNEDP is nonzero if X is an unsigned value.
657 This can be done by referring to a part of X in place
658 or by copying to a new temporary with conversion. */
661 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
663 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
666 /* Return an rtx for a value that would result
667 from converting X from mode OLDMODE to mode MODE.
668 Both modes may be floating, or both integer.
669 UNSIGNEDP is nonzero if X is an unsigned value.
671 This can be done by referring to a part of X in place
672 or by copying to a new temporary with conversion.
674 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
677 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
680 scalar_int_mode int_mode
;
682 /* If FROM is a SUBREG that indicates that we have already done at least
683 the required extension, strip it. */
685 if (GET_CODE (x
) == SUBREG
686 && SUBREG_PROMOTED_VAR_P (x
)
687 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
688 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
689 >= GET_MODE_PRECISION (int_mode
))
690 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
691 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
693 if (GET_MODE (x
) != VOIDmode
)
694 oldmode
= GET_MODE (x
);
699 if (CONST_SCALAR_INT_P (x
)
700 && is_a
<scalar_int_mode
> (mode
, &int_mode
))
702 /* If the caller did not tell us the old mode, then there is not
703 much to do with respect to canonicalization. We have to
704 assume that all the bits are significant. */
705 if (!is_a
<scalar_int_mode
> (oldmode
))
706 oldmode
= MAX_MODE_INT
;
707 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
708 GET_MODE_PRECISION (int_mode
),
709 unsignedp
? UNSIGNED
: SIGNED
);
710 return immed_wide_int_const (w
, int_mode
);
713 /* We can do this with a gen_lowpart if both desired and current modes
714 are integer, and this is either a constant integer, a register, or a
716 scalar_int_mode int_oldmode
;
717 if (is_int_mode (mode
, &int_mode
)
718 && is_int_mode (oldmode
, &int_oldmode
)
719 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
720 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
721 || CONST_POLY_INT_P (x
)
723 && (!HARD_REGISTER_P (x
)
724 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
725 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
726 return gen_lowpart (int_mode
, x
);
728 /* Converting from integer constant into mode is always equivalent to an
730 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
732 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
733 GET_MODE_BITSIZE (oldmode
)));
734 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
737 temp
= gen_reg_rtx (mode
);
738 convert_move (temp
, x
, unsignedp
);
742 /* Return the largest alignment we can use for doing a move (or store)
743 of MAX_PIECES. ALIGN is the largest alignment we could use. */
746 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
748 scalar_int_mode tmode
749 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
751 if (align
>= GET_MODE_ALIGNMENT (tmode
))
752 align
= GET_MODE_ALIGNMENT (tmode
);
755 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
756 opt_scalar_int_mode mode_iter
;
757 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
759 tmode
= mode_iter
.require ();
760 if (GET_MODE_SIZE (tmode
) > max_pieces
761 || targetm
.slow_unaligned_access (tmode
, align
))
766 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
772 /* Return the widest integer mode that is narrower than SIZE bytes. */
774 static scalar_int_mode
775 widest_int_mode_for_size (unsigned int size
)
777 scalar_int_mode result
= NARROWEST_INT_MODE
;
779 gcc_checking_assert (size
> 1);
781 opt_scalar_int_mode tmode
;
782 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
783 if (GET_MODE_SIZE (tmode
.require ()) < size
)
784 result
= tmode
.require ();
789 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
790 and should be performed piecewise. */
793 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
794 enum by_pieces_operation op
)
796 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
797 optimize_insn_for_speed_p ());
800 /* Determine whether the LEN bytes can be moved by using several move
801 instructions. Return nonzero if a call to move_by_pieces should
805 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
807 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
810 /* Return number of insns required to perform operation OP by pieces
811 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
813 unsigned HOST_WIDE_INT
814 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
815 unsigned int max_size
, by_pieces_operation op
)
817 unsigned HOST_WIDE_INT n_insns
= 0;
819 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
821 while (max_size
> 1 && l
> 0)
823 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
824 enum insn_code icode
;
826 unsigned int modesize
= GET_MODE_SIZE (mode
);
828 icode
= optab_handler (mov_optab
, mode
);
829 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
831 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
839 case COMPARE_BY_PIECES
:
840 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
841 int batch_ops
= 4 * batch
- 1;
842 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
843 n_insns
+= full
* batch_ops
;
844 if (n_pieces
% batch
!= 0)
857 /* Used when performing piecewise block operations, holds information
858 about one of the memory objects involved. The member functions
859 can be used to generate code for loading from the object and
860 updating the address when iterating. */
864 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
867 /* The address of the object. Can differ from that seen in the
868 MEM rtx if we copied the address to a register. */
870 /* Nonzero if the address on the object has an autoincrement already,
871 signifies whether that was an increment or decrement. */
872 signed char m_addr_inc
;
873 /* Nonzero if we intend to use autoinc without the address already
874 having autoinc form. We will insert add insns around each memory
875 reference, expecting later passes to form autoinc addressing modes.
876 The only supported options are predecrement and postincrement. */
877 signed char m_explicit_inc
;
878 /* True if we have either of the two possible cases of using
881 /* True if this is an address to be used for load operations rather
885 /* Optionally, a function to obtain constants for any given offset into
886 the objects, and data associated with it. */
887 by_pieces_constfn m_constfn
;
890 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
891 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
892 void increment_address (HOST_WIDE_INT
);
893 void maybe_predec (HOST_WIDE_INT
);
894 void maybe_postinc (HOST_WIDE_INT
);
895 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
902 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
903 true if the operation to be performed on this object is a load
904 rather than a store. For stores, OBJ can be NULL, in which case we
905 assume the operation is a stack push. For loads, the optional
906 CONSTFN and its associated CFNDATA can be used in place of the
909 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
911 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
917 rtx addr
= XEXP (obj
, 0);
918 rtx_code code
= GET_CODE (addr
);
920 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
921 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
924 m_addr_inc
= dec
? -1 : 1;
926 /* While we have always looked for these codes here, the code
927 implementing the memory operation has never handled them.
928 Support could be added later if necessary or beneficial. */
929 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
937 if (STACK_GROWS_DOWNWARD
)
943 gcc_assert (constfn
!= NULL
);
947 gcc_assert (is_load
);
950 /* Decide whether to use autoinc for an address involved in a memory op.
951 MODE is the mode of the accesses, REVERSE is true if we've decided to
952 perform the operation starting from the end, and LEN is the length of
953 the operation. Don't override an earlier decision to set m_auto. */
956 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
959 if (m_auto
|| m_obj
== NULL_RTX
)
962 bool use_predec
= (m_is_load
963 ? USE_LOAD_PRE_DECREMENT (mode
)
964 : USE_STORE_PRE_DECREMENT (mode
));
965 bool use_postinc
= (m_is_load
966 ? USE_LOAD_POST_INCREMENT (mode
)
967 : USE_STORE_POST_INCREMENT (mode
));
968 machine_mode addr_mode
= get_address_mode (m_obj
);
970 if (use_predec
&& reverse
)
972 m_addr
= copy_to_mode_reg (addr_mode
,
973 plus_constant (addr_mode
,
978 else if (use_postinc
&& !reverse
)
980 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
984 else if (CONSTANT_P (m_addr
))
985 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
988 /* Adjust the address to refer to the data at OFFSET in MODE. If we
989 are using autoincrement for this address, we don't add the offset,
990 but we still modify the MEM's properties. */
993 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
996 return m_constfn (m_cfndata
, offset
, mode
);
997 if (m_obj
== NULL_RTX
)
1000 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
1002 return adjust_address (m_obj
, mode
, offset
);
1005 /* Emit an add instruction to increment the address by SIZE. */
1008 pieces_addr::increment_address (HOST_WIDE_INT size
)
1010 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
1011 emit_insn (gen_add2_insn (m_addr
, amount
));
1014 /* If we are supposed to decrement the address after each access, emit code
1015 to do so now. Increment by SIZE (which has should have the correct sign
1019 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
1021 if (m_explicit_inc
>= 0)
1023 gcc_assert (HAVE_PRE_DECREMENT
);
1024 increment_address (size
);
1027 /* If we are supposed to decrement the address after each access, emit code
1028 to do so now. Increment by SIZE. */
1031 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1033 if (m_explicit_inc
<= 0)
1035 gcc_assert (HAVE_POST_INCREMENT
);
1036 increment_address (size
);
1039 /* This structure is used by do_op_by_pieces to describe the operation
1042 class op_by_pieces_d
1045 pieces_addr m_to
, m_from
;
1046 unsigned HOST_WIDE_INT m_len
;
1047 HOST_WIDE_INT m_offset
;
1048 unsigned int m_align
;
1049 unsigned int m_max_size
;
1052 /* Virtual functions, overriden by derived classes for the specific
1054 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1055 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1056 virtual void finish_mode (machine_mode
)
1061 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1062 unsigned HOST_WIDE_INT
, unsigned int);
1066 /* The constructor for an op_by_pieces_d structure. We require two
1067 objects named TO and FROM, which are identified as loads or stores
1068 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1069 and its associated FROM_CFN_DATA can be used to replace loads with
1070 constant values. LEN describes the length of the operation. */
1072 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1073 rtx from
, bool from_load
,
1074 by_pieces_constfn from_cfn
,
1075 void *from_cfn_data
,
1076 unsigned HOST_WIDE_INT len
,
1078 : m_to (to
, to_load
, NULL
, NULL
),
1079 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1080 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1082 int toi
= m_to
.get_addr_inc ();
1083 int fromi
= m_from
.get_addr_inc ();
1084 if (toi
>= 0 && fromi
>= 0)
1086 else if (toi
<= 0 && fromi
<= 0)
1091 m_offset
= m_reverse
? len
: 0;
1092 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1093 from
? MEM_ALIGN (from
) : align
);
1095 /* If copying requires more than two move insns,
1096 copy addresses to registers (to make displacements shorter)
1097 and use post-increment if available. */
1098 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1100 /* Find the mode of the largest comparison. */
1101 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1103 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1104 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1107 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1111 /* This function contains the main loop used for expanding a block
1112 operation. First move what we can in the largest integer mode,
1113 then go to successively smaller modes. For every access, call
1114 GENFUN with the two operands and the EXTRA_DATA. */
1117 op_by_pieces_d::run ()
1119 while (m_max_size
> 1 && m_len
> 0)
1121 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1123 if (prepare_mode (mode
, m_align
))
1125 unsigned int size
= GET_MODE_SIZE (mode
);
1126 rtx to1
= NULL_RTX
, from1
;
1128 while (m_len
>= size
)
1133 to1
= m_to
.adjust (mode
, m_offset
);
1134 from1
= m_from
.adjust (mode
, m_offset
);
1136 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1137 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1139 generate (to1
, from1
, mode
);
1141 m_to
.maybe_postinc (size
);
1142 m_from
.maybe_postinc (size
);
1153 m_max_size
= GET_MODE_SIZE (mode
);
1156 /* The code above should have handled everything. */
1157 gcc_assert (!m_len
);
1160 /* Derived class from op_by_pieces_d, providing support for block move
1163 class move_by_pieces_d
: public op_by_pieces_d
1165 insn_gen_fn m_gen_fun
;
1166 void generate (rtx
, rtx
, machine_mode
);
1167 bool prepare_mode (machine_mode
, unsigned int);
1170 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1172 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1175 rtx
finish_retmode (memop_ret
);
1178 /* Return true if MODE can be used for a set of copies, given an
1179 alignment ALIGN. Prepare whatever data is necessary for later
1180 calls to generate. */
1183 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1185 insn_code icode
= optab_handler (mov_optab
, mode
);
1186 m_gen_fun
= GEN_FCN (icode
);
1187 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1190 /* A callback used when iterating for a compare_by_pieces_operation.
1191 OP0 and OP1 are the values that have been loaded and should be
1192 compared in MODE. If OP0 is NULL, this means we should generate a
1193 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1194 gen function that should be used to generate the mode. */
1197 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1198 machine_mode mode ATTRIBUTE_UNUSED
)
1200 #ifdef PUSH_ROUNDING
1201 if (op0
== NULL_RTX
)
1203 emit_single_push_insn (mode
, op1
, NULL
);
1207 emit_insn (m_gen_fun (op0
, op1
));
1210 /* Perform the final adjustment at the end of a string to obtain the
1211 correct return value for the block operation.
1212 Return value is based on RETMODE argument. */
1215 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1217 gcc_assert (!m_reverse
);
1218 if (retmode
== RETURN_END_MINUS_ONE
)
1220 m_to
.maybe_postinc (-1);
1223 return m_to
.adjust (QImode
, m_offset
);
1226 /* Generate several move instructions to copy LEN bytes from block FROM to
1227 block TO. (These are MEM rtx's with BLKmode).
1229 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1230 used to push FROM to the stack.
1232 ALIGN is maximum stack alignment we can assume.
1234 Return value is based on RETMODE argument. */
1237 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1238 unsigned int align
, memop_ret retmode
)
1240 #ifndef PUSH_ROUNDING
1245 move_by_pieces_d
data (to
, from
, len
, align
);
1249 if (retmode
!= RETURN_BEGIN
)
1250 return data
.finish_retmode (retmode
);
1255 /* Derived class from op_by_pieces_d, providing support for block move
1258 class store_by_pieces_d
: public op_by_pieces_d
1260 insn_gen_fn m_gen_fun
;
1261 void generate (rtx
, rtx
, machine_mode
);
1262 bool prepare_mode (machine_mode
, unsigned int);
1265 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1266 unsigned HOST_WIDE_INT len
, unsigned int align
)
1267 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1270 rtx
finish_retmode (memop_ret
);
1273 /* Return true if MODE can be used for a set of stores, given an
1274 alignment ALIGN. Prepare whatever data is necessary for later
1275 calls to generate. */
1278 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1280 insn_code icode
= optab_handler (mov_optab
, mode
);
1281 m_gen_fun
= GEN_FCN (icode
);
1282 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1285 /* A callback used when iterating for a store_by_pieces_operation.
1286 OP0 and OP1 are the values that have been loaded and should be
1287 compared in MODE. If OP0 is NULL, this means we should generate a
1288 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1289 gen function that should be used to generate the mode. */
1292 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1294 emit_insn (m_gen_fun (op0
, op1
));
1297 /* Perform the final adjustment at the end of a string to obtain the
1298 correct return value for the block operation.
1299 Return value is based on RETMODE argument. */
1302 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1304 gcc_assert (!m_reverse
);
1305 if (retmode
== RETURN_END_MINUS_ONE
)
1307 m_to
.maybe_postinc (-1);
1310 return m_to
.adjust (QImode
, m_offset
);
1313 /* Determine whether the LEN bytes generated by CONSTFUN can be
1314 stored to memory using several move instructions. CONSTFUNDATA is
1315 a pointer which will be passed as argument in every CONSTFUN call.
1316 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1317 a memset operation and false if it's a copy of a constant string.
1318 Return nonzero if a call to store_by_pieces should succeed. */
1321 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1322 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1323 void *constfundata
, unsigned int align
, bool memsetp
)
1325 unsigned HOST_WIDE_INT l
;
1326 unsigned int max_size
;
1327 HOST_WIDE_INT offset
= 0;
1328 enum insn_code icode
;
1330 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1331 rtx cst ATTRIBUTE_UNUSED
;
1336 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1340 optimize_insn_for_speed_p ()))
1343 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1345 /* We would first store what we can in the largest integer mode, then go to
1346 successively smaller modes. */
1349 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1353 max_size
= STORE_MAX_PIECES
+ 1;
1354 while (max_size
> 1 && l
> 0)
1356 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1358 icode
= optab_handler (mov_optab
, mode
);
1359 if (icode
!= CODE_FOR_nothing
1360 && align
>= GET_MODE_ALIGNMENT (mode
))
1362 unsigned int size
= GET_MODE_SIZE (mode
);
1369 cst
= (*constfun
) (constfundata
, offset
, mode
);
1370 if (!targetm
.legitimate_constant_p (mode
, cst
))
1380 max_size
= GET_MODE_SIZE (mode
);
1383 /* The code above should have handled everything. */
1390 /* Generate several move instructions to store LEN bytes generated by
1391 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1392 pointer which will be passed as argument in every CONSTFUN call.
1393 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1394 a memset operation and false if it's a copy of a constant string.
1395 Return value is based on RETMODE argument. */
1398 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1399 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1400 void *constfundata
, unsigned int align
, bool memsetp
,
1405 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1409 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1411 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1412 optimize_insn_for_speed_p ()));
1414 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1417 if (retmode
!= RETURN_BEGIN
)
1418 return data
.finish_retmode (retmode
);
1423 /* Callback routine for clear_by_pieces.
1424 Return const0_rtx unconditionally. */
1427 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1432 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1433 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1436 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1441 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1445 /* Context used by compare_by_pieces_genfn. It stores the fail label
1446 to jump to in case of miscomparison, and for branch ratios greater than 1,
1447 it stores an accumulator and the current and maximum counts before
1448 emitting another branch. */
1450 class compare_by_pieces_d
: public op_by_pieces_d
1452 rtx_code_label
*m_fail_label
;
1454 int m_count
, m_batch
;
1456 void generate (rtx
, rtx
, machine_mode
);
1457 bool prepare_mode (machine_mode
, unsigned int);
1458 void finish_mode (machine_mode
);
1460 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1461 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1462 rtx_code_label
*fail_label
)
1463 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1465 m_fail_label
= fail_label
;
1469 /* A callback used when iterating for a compare_by_pieces_operation.
1470 OP0 and OP1 are the values that have been loaded and should be
1471 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1472 context structure. */
1475 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1479 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1480 true, OPTAB_LIB_WIDEN
);
1482 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1483 true, OPTAB_LIB_WIDEN
);
1484 m_accumulator
= temp
;
1486 if (++m_count
< m_batch
)
1490 op0
= m_accumulator
;
1492 m_accumulator
= NULL_RTX
;
1494 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1495 m_fail_label
, profile_probability::uninitialized ());
1498 /* Return true if MODE can be used for a set of moves and comparisons,
1499 given an alignment ALIGN. Prepare whatever data is necessary for
1500 later calls to generate. */
1503 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1505 insn_code icode
= optab_handler (mov_optab
, mode
);
1506 if (icode
== CODE_FOR_nothing
1507 || align
< GET_MODE_ALIGNMENT (mode
)
1508 || !can_compare_p (EQ
, mode
, ccp_jump
))
1510 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1513 m_accumulator
= NULL_RTX
;
1518 /* Called after expanding a series of comparisons in MODE. If we have
1519 accumulated results for which we haven't emitted a branch yet, do
1523 compare_by_pieces_d::finish_mode (machine_mode mode
)
1525 if (m_accumulator
!= NULL_RTX
)
1526 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1527 NULL_RTX
, NULL
, m_fail_label
,
1528 profile_probability::uninitialized ());
1531 /* Generate several move instructions to compare LEN bytes from blocks
1532 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1534 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1535 used to push FROM to the stack.
1537 ALIGN is maximum stack alignment we can assume.
1539 Optionally, the caller can pass a constfn and associated data in A1_CFN
1540 and A1_CFN_DATA. describing that the second operand being compared is a
1541 known constant and how to obtain its data. */
1544 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1545 rtx target
, unsigned int align
,
1546 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1548 rtx_code_label
*fail_label
= gen_label_rtx ();
1549 rtx_code_label
*end_label
= gen_label_rtx ();
1551 if (target
== NULL_RTX
1552 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1553 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1555 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1560 emit_move_insn (target
, const0_rtx
);
1561 emit_jump (end_label
);
1563 emit_label (fail_label
);
1564 emit_move_insn (target
, const1_rtx
);
1565 emit_label (end_label
);
1570 /* Emit code to move a block Y to a block X. This may be done with
1571 string-move instructions, with multiple scalar move instructions,
1572 or with a library call.
1574 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1575 SIZE is an rtx that says how long they are.
1576 ALIGN is the maximum alignment we can assume they have.
1577 METHOD describes what kind of copy this is, and what mechanisms may be used.
1578 MIN_SIZE is the minimal size of block to move
1579 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1580 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1582 Return the address of the new block, if memcpy is called and returns it,
1586 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1587 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1588 unsigned HOST_WIDE_INT min_size
,
1589 unsigned HOST_WIDE_INT max_size
,
1590 unsigned HOST_WIDE_INT probable_max_size
,
1591 bool bail_out_libcall
, bool *is_move_done
,
1599 *is_move_done
= true;
1602 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1607 case BLOCK_OP_NORMAL
:
1608 case BLOCK_OP_TAILCALL
:
1612 case BLOCK_OP_CALL_PARM
:
1613 may_use_call
= block_move_libcall_safe_for_call_parm ();
1615 /* Make inhibit_defer_pop nonzero around the library call
1616 to force it to pop the arguments right away. */
1620 case BLOCK_OP_NO_LIBCALL
:
1624 case BLOCK_OP_NO_LIBCALL_RET
:
1632 gcc_assert (MEM_P (x
) && MEM_P (y
));
1633 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1634 gcc_assert (align
>= BITS_PER_UNIT
);
1636 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1637 block copy is more efficient for other large modes, e.g. DCmode. */
1638 x
= adjust_address (x
, BLKmode
, 0);
1639 y
= adjust_address (y
, BLKmode
, 0);
1641 /* If source and destination are the same, no need to copy anything. */
1642 if (rtx_equal_p (x
, y
)
1643 && !MEM_VOLATILE_P (x
)
1644 && !MEM_VOLATILE_P (y
))
1647 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1648 can be incorrect is coming from __builtin_memcpy. */
1649 poly_int64 const_size
;
1650 if (poly_int_rtx_p (size
, &const_size
))
1652 x
= shallow_copy_rtx (x
);
1653 y
= shallow_copy_rtx (y
);
1654 set_mem_size (x
, const_size
);
1655 set_mem_size (y
, const_size
);
1658 bool pieces_ok
= CONST_INT_P (size
)
1659 && can_move_by_pieces (INTVAL (size
), align
);
1660 bool pattern_ok
= false;
1662 if (!pieces_ok
|| might_overlap
)
1665 = emit_block_move_via_pattern (x
, y
, size
, align
,
1666 expected_align
, expected_size
,
1667 min_size
, max_size
, probable_max_size
,
1669 if (!pattern_ok
&& might_overlap
)
1671 /* Do not try any of the other methods below as they are not safe
1672 for overlapping moves. */
1673 *is_move_done
= false;
1681 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
1682 else if (may_use_call
&& !might_overlap
1683 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1684 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1686 if (bail_out_libcall
)
1689 *is_move_done
= false;
1693 if (may_use_call
< 0)
1696 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1697 method
== BLOCK_OP_TAILCALL
);
1699 else if (might_overlap
)
1700 *is_move_done
= false;
1702 emit_block_move_via_loop (x
, y
, size
, align
);
1704 if (method
== BLOCK_OP_CALL_PARM
)
1711 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1713 unsigned HOST_WIDE_INT max
, min
= 0;
1714 if (GET_CODE (size
) == CONST_INT
)
1715 min
= max
= UINTVAL (size
);
1717 max
= GET_MODE_MASK (GET_MODE (size
));
1718 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1722 /* A subroutine of emit_block_move. Returns true if calling the
1723 block move libcall will not clobber any parameters which may have
1724 already been placed on the stack. */
1727 block_move_libcall_safe_for_call_parm (void)
1731 /* If arguments are pushed on the stack, then they're safe. */
1735 /* If registers go on the stack anyway, any argument is sure to clobber
1736 an outgoing argument. */
1737 #if defined (REG_PARM_STACK_SPACE)
1738 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1739 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1740 depend on its argument. */
1742 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1743 && REG_PARM_STACK_SPACE (fn
) != 0)
1747 /* If any argument goes in memory, then it might clobber an outgoing
1750 CUMULATIVE_ARGS args_so_far_v
;
1751 cumulative_args_t args_so_far
;
1754 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1755 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1756 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1758 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1759 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1761 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1762 function_arg_info
arg_info (mode
, /*named=*/true);
1763 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, arg_info
);
1764 if (!tmp
|| !REG_P (tmp
))
1766 if (targetm
.calls
.arg_partial_bytes (args_so_far
, arg_info
))
1768 targetm
.calls
.function_arg_advance (args_so_far
, arg_info
);
1774 /* A subroutine of emit_block_move. Expand a cpymem or movmem pattern;
1775 return true if successful.
1777 X is the destination of the copy or move.
1778 Y is the source of the copy or move.
1779 SIZE is the size of the block to be moved.
1781 MIGHT_OVERLAP indicates this originated with expansion of a
1782 builtin_memmove() and the source and destination blocks may
1787 emit_block_move_via_pattern (rtx x
, rtx y
, rtx size
, unsigned int align
,
1788 unsigned int expected_align
,
1789 HOST_WIDE_INT expected_size
,
1790 unsigned HOST_WIDE_INT min_size
,
1791 unsigned HOST_WIDE_INT max_size
,
1792 unsigned HOST_WIDE_INT probable_max_size
,
1795 if (expected_align
< align
)
1796 expected_align
= align
;
1797 if (expected_size
!= -1)
1799 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1800 expected_size
= probable_max_size
;
1801 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1802 expected_size
= min_size
;
1805 /* Since this is a move insn, we don't care about volatility. */
1806 temporary_volatile_ok
v (true);
1808 /* Try the most limited insn first, because there's no point
1809 including more than one in the machine description unless
1810 the more limited one has some advantage. */
1812 opt_scalar_int_mode mode_iter
;
1813 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1815 scalar_int_mode mode
= mode_iter
.require ();
1816 enum insn_code code
;
1818 code
= direct_optab_handler (movmem_optab
, mode
);
1820 code
= direct_optab_handler (cpymem_optab
, mode
);
1822 if (code
!= CODE_FOR_nothing
1823 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1824 here because if SIZE is less than the mode mask, as it is
1825 returned by the macro, it will definitely be less than the
1826 actual mode mask. Since SIZE is within the Pmode address
1827 space, we limit MODE to Pmode. */
1828 && ((CONST_INT_P (size
)
1829 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1830 <= (GET_MODE_MASK (mode
) >> 1)))
1831 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1832 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1834 class expand_operand ops
[9];
1837 /* ??? When called via emit_block_move_for_call, it'd be
1838 nice if there were some way to inform the backend, so
1839 that it doesn't fail the expansion because it thinks
1840 emitting the libcall would be more efficient. */
1841 nops
= insn_data
[(int) code
].n_generator_args
;
1842 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1844 create_fixed_operand (&ops
[0], x
);
1845 create_fixed_operand (&ops
[1], y
);
1846 /* The check above guarantees that this size conversion is valid. */
1847 create_convert_operand_to (&ops
[2], size
, mode
, true);
1848 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1851 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1852 create_integer_operand (&ops
[5], expected_size
);
1856 create_integer_operand (&ops
[6], min_size
);
1857 /* If we cannot represent the maximal size,
1858 make parameter NULL. */
1859 if ((HOST_WIDE_INT
) max_size
!= -1)
1860 create_integer_operand (&ops
[7], max_size
);
1862 create_fixed_operand (&ops
[7], NULL
);
1866 /* If we cannot represent the maximal size,
1867 make parameter NULL. */
1868 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1869 create_integer_operand (&ops
[8], probable_max_size
);
1871 create_fixed_operand (&ops
[8], NULL
);
1873 if (maybe_expand_insn (code
, nops
, ops
))
1881 /* A subroutine of emit_block_move. Copy the data via an explicit
1882 loop. This is used only when libcalls are forbidden. */
1883 /* ??? It'd be nice to copy in hunks larger than QImode. */
1886 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1887 unsigned int align ATTRIBUTE_UNUSED
)
1889 rtx_code_label
*cmp_label
, *top_label
;
1890 rtx iter
, x_addr
, y_addr
, tmp
;
1891 machine_mode x_addr_mode
= get_address_mode (x
);
1892 machine_mode y_addr_mode
= get_address_mode (y
);
1893 machine_mode iter_mode
;
1895 iter_mode
= GET_MODE (size
);
1896 if (iter_mode
== VOIDmode
)
1897 iter_mode
= word_mode
;
1899 top_label
= gen_label_rtx ();
1900 cmp_label
= gen_label_rtx ();
1901 iter
= gen_reg_rtx (iter_mode
);
1903 emit_move_insn (iter
, const0_rtx
);
1905 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1906 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1907 do_pending_stack_adjust ();
1909 emit_jump (cmp_label
);
1910 emit_label (top_label
);
1912 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1913 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1915 if (x_addr_mode
!= y_addr_mode
)
1916 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1917 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1919 x
= change_address (x
, QImode
, x_addr
);
1920 y
= change_address (y
, QImode
, y_addr
);
1922 emit_move_insn (x
, y
);
1924 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1925 true, OPTAB_LIB_WIDEN
);
1927 emit_move_insn (iter
, tmp
);
1929 emit_label (cmp_label
);
1931 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1933 profile_probability::guessed_always ()
1934 .apply_scale (9, 10));
1937 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1938 TAILCALL is true if this is a tail call. */
1941 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1942 rtx size
, bool tailcall
)
1944 rtx dst_addr
, src_addr
;
1945 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1946 machine_mode size_mode
;
1948 /* Since dst and src are passed to a libcall, mark the corresponding
1949 tree EXPR as addressable. */
1950 tree dst_expr
= MEM_EXPR (dst
);
1951 tree src_expr
= MEM_EXPR (src
);
1953 mark_addressable (dst_expr
);
1955 mark_addressable (src_expr
);
1957 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1958 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1959 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1961 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1962 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1963 src_tree
= make_tree (ptr_type_node
, src_addr
);
1965 size_mode
= TYPE_MODE (sizetype
);
1966 size
= convert_to_mode (size_mode
, size
, 1);
1967 size
= copy_to_mode_reg (size_mode
, size
);
1968 size_tree
= make_tree (sizetype
, size
);
1970 /* It is incorrect to use the libcall calling conventions for calls to
1971 memcpy/memmove/memcmp because they can be provided by the user. */
1972 tree fn
= builtin_decl_implicit (fncode
);
1973 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1974 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1976 return expand_call (call_expr
, NULL_RTX
, false);
1979 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1980 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1981 otherwise return null. */
1984 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1985 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1986 HOST_WIDE_INT align
)
1988 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1990 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1993 class expand_operand ops
[5];
1994 create_output_operand (&ops
[0], target
, insn_mode
);
1995 create_fixed_operand (&ops
[1], arg1_rtx
);
1996 create_fixed_operand (&ops
[2], arg2_rtx
);
1997 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1998 TYPE_UNSIGNED (arg3_type
));
1999 create_integer_operand (&ops
[4], align
);
2000 if (maybe_expand_insn (icode
, 5, ops
))
2001 return ops
[0].value
;
2005 /* Expand a block compare between X and Y with length LEN using the
2006 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
2007 of the expression that was used to calculate the length. ALIGN
2008 gives the known minimum common alignment. */
2011 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2014 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
2015 implementing memcmp because it will stop if it encounters two
2017 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
2019 if (icode
== CODE_FOR_nothing
)
2022 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
2025 /* Emit code to compare a block Y to a block X. This may be done with
2026 string-compare instructions, with multiple scalar instructions,
2027 or with a library call.
2029 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
2030 they are. LEN_TYPE is the type of the expression that was used to
2033 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
2034 value of a normal memcmp call, instead we can just compare for equality.
2035 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
2038 Optionally, the caller can pass a constfn and associated data in Y_CFN
2039 and Y_CFN_DATA. describing that the second operand being compared is a
2040 known constant and how to obtain its data.
2041 Return the result of the comparison, or NULL_RTX if we failed to
2042 perform the operation. */
2045 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
2046 bool equality_only
, by_pieces_constfn y_cfn
,
2051 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
2054 gcc_assert (MEM_P (x
) && MEM_P (y
));
2055 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
2056 gcc_assert (align
>= BITS_PER_UNIT
);
2058 x
= adjust_address (x
, BLKmode
, 0);
2059 y
= adjust_address (y
, BLKmode
, 0);
2062 && CONST_INT_P (len
)
2063 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
2064 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2067 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2072 /* Copy all or part of a value X into registers starting at REGNO.
2073 The number of registers to be filled is NREGS. */
2076 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2081 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2082 x
= validize_mem (force_const_mem (mode
, x
));
2084 /* See if the machine can do this with a load multiple insn. */
2085 if (targetm
.have_load_multiple ())
2087 rtx_insn
*last
= get_last_insn ();
2088 rtx first
= gen_rtx_REG (word_mode
, regno
);
2089 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2096 delete_insns_since (last
);
2099 for (int i
= 0; i
< nregs
; i
++)
2100 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2101 operand_subword_force (x
, i
, mode
));
2104 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2105 The number of registers to be filled is NREGS. */
2108 move_block_from_reg (int regno
, rtx x
, int nregs
)
2113 /* See if the machine can do this with a store multiple insn. */
2114 if (targetm
.have_store_multiple ())
2116 rtx_insn
*last
= get_last_insn ();
2117 rtx first
= gen_rtx_REG (word_mode
, regno
);
2118 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2125 delete_insns_since (last
);
2128 for (int i
= 0; i
< nregs
; i
++)
2130 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2134 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2138 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2139 ORIG, where ORIG is a non-consecutive group of registers represented by
2140 a PARALLEL. The clone is identical to the original except in that the
2141 original set of registers is replaced by a new set of pseudo registers.
2142 The new set has the same modes as the original set. */
2145 gen_group_rtx (rtx orig
)
2150 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2152 length
= XVECLEN (orig
, 0);
2153 tmps
= XALLOCAVEC (rtx
, length
);
2155 /* Skip a NULL entry in first slot. */
2156 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2161 for (; i
< length
; i
++)
2163 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2164 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2166 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2169 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2172 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2173 except that values are placed in TMPS[i], and must later be moved
2174 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2177 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2182 machine_mode m
= GET_MODE (orig_src
);
2184 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2187 && !SCALAR_INT_MODE_P (m
)
2188 && !MEM_P (orig_src
)
2189 && GET_CODE (orig_src
) != CONCAT
)
2191 scalar_int_mode imode
;
2192 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2194 src
= gen_reg_rtx (imode
);
2195 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2199 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2200 emit_move_insn (src
, orig_src
);
2202 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2206 /* Check for a NULL entry, used to indicate that the parameter goes
2207 both on the stack and in registers. */
2208 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2213 /* Process the pieces. */
2214 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2216 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2217 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2218 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2219 poly_int64 shift
= 0;
2221 /* Handle trailing fragments that run over the size of the struct.
2222 It's the target's responsibility to make sure that the fragment
2223 cannot be strictly smaller in some cases and strictly larger
2225 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2226 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2228 /* Arrange to shift the fragment to where it belongs.
2229 extract_bit_field loads to the lsb of the reg. */
2231 #ifdef BLOCK_REG_PADDING
2232 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2233 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2238 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2239 bytelen
= ssize
- bytepos
;
2240 gcc_assert (maybe_gt (bytelen
, 0));
2243 /* If we won't be loading directly from memory, protect the real source
2244 from strange tricks we might play; but make sure that the source can
2245 be loaded directly into the destination. */
2247 if (!MEM_P (orig_src
)
2248 && (!CONSTANT_P (orig_src
)
2249 || (GET_MODE (orig_src
) != mode
2250 && GET_MODE (orig_src
) != VOIDmode
)))
2252 if (GET_MODE (orig_src
) == VOIDmode
)
2253 src
= gen_reg_rtx (mode
);
2255 src
= gen_reg_rtx (GET_MODE (orig_src
));
2257 emit_move_insn (src
, orig_src
);
2260 /* Optimize the access just a bit. */
2262 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2263 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2264 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2265 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2267 tmps
[i
] = gen_reg_rtx (mode
);
2268 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2270 else if (COMPLEX_MODE_P (mode
)
2271 && GET_MODE (src
) == mode
2272 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2273 /* Let emit_move_complex do the bulk of the work. */
2275 else if (GET_CODE (src
) == CONCAT
)
2277 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2278 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2282 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2283 && known_le (subpos
+ bytelen
, slen0
))
2285 /* The following assumes that the concatenated objects all
2286 have the same size. In this case, a simple calculation
2287 can be used to determine the object and the bit field
2289 tmps
[i
] = XEXP (src
, elt
);
2290 if (maybe_ne (subpos
, 0)
2291 || maybe_ne (subpos
+ bytelen
, slen0
)
2292 || (!CONSTANT_P (tmps
[i
])
2293 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2294 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2295 subpos
* BITS_PER_UNIT
,
2296 1, NULL_RTX
, mode
, mode
, false,
2303 gcc_assert (known_eq (bytepos
, 0));
2304 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2305 emit_move_insn (mem
, src
);
2306 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2307 0, 1, NULL_RTX
, mode
, mode
, false,
2311 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2312 SIMD register, which is currently broken. While we get GCC
2313 to emit proper RTL for these cases, let's dump to memory. */
2314 else if (VECTOR_MODE_P (GET_MODE (dst
))
2317 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2320 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2321 emit_move_insn (mem
, src
);
2322 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2324 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2325 && XVECLEN (dst
, 0) > 1)
2326 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2327 else if (CONSTANT_P (src
))
2329 if (known_eq (bytelen
, ssize
))
2335 /* TODO: const_wide_int can have sizes other than this... */
2336 gcc_assert (known_eq (2 * bytelen
, ssize
));
2337 split_double (src
, &first
, &second
);
2344 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2347 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2348 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2349 mode
, mode
, false, NULL
);
2351 if (maybe_ne (shift
, 0))
2352 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2357 /* Emit code to move a block SRC of type TYPE to a block DST,
2358 where DST is non-consecutive registers represented by a PARALLEL.
2359 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2363 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2368 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2369 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2371 /* Copy the extracted pieces into the proper (probable) hard regs. */
2372 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2374 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2377 emit_move_insn (d
, tmps
[i
]);
2381 /* Similar, but load SRC into new pseudos in a format that looks like
2382 PARALLEL. This can later be fed to emit_group_move to get things
2383 in the right place. */
2386 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2391 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2392 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2394 /* Convert the vector to look just like the original PARALLEL, except
2395 with the computed values. */
2396 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2398 rtx e
= XVECEXP (parallel
, 0, i
);
2399 rtx d
= XEXP (e
, 0);
2403 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2404 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2406 RTVEC_ELT (vec
, i
) = e
;
2409 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2412 /* Emit code to move a block SRC to block DST, where SRC and DST are
2413 non-consecutive groups of registers, each represented by a PARALLEL. */
2416 emit_group_move (rtx dst
, rtx src
)
2420 gcc_assert (GET_CODE (src
) == PARALLEL
2421 && GET_CODE (dst
) == PARALLEL
2422 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2424 /* Skip first entry if NULL. */
2425 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2426 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2427 XEXP (XVECEXP (src
, 0, i
), 0));
2430 /* Move a group of registers represented by a PARALLEL into pseudos. */
2433 emit_group_move_into_temps (rtx src
)
2435 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2438 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2440 rtx e
= XVECEXP (src
, 0, i
);
2441 rtx d
= XEXP (e
, 0);
2444 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2445 RTVEC_ELT (vec
, i
) = e
;
2448 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2451 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2452 where SRC is non-consecutive registers represented by a PARALLEL.
2453 SSIZE represents the total size of block ORIG_DST, or -1 if not
2457 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2461 int start
, finish
, i
;
2462 machine_mode m
= GET_MODE (orig_dst
);
2464 gcc_assert (GET_CODE (src
) == PARALLEL
);
2466 if (!SCALAR_INT_MODE_P (m
)
2467 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2469 scalar_int_mode imode
;
2470 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2472 dst
= gen_reg_rtx (imode
);
2473 emit_group_store (dst
, src
, type
, ssize
);
2474 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2478 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2479 emit_group_store (dst
, src
, type
, ssize
);
2481 emit_move_insn (orig_dst
, dst
);
2485 /* Check for a NULL entry, used to indicate that the parameter goes
2486 both on the stack and in registers. */
2487 if (XEXP (XVECEXP (src
, 0, 0), 0))
2491 finish
= XVECLEN (src
, 0);
2493 tmps
= XALLOCAVEC (rtx
, finish
);
2495 /* Copy the (probable) hard regs into pseudos. */
2496 for (i
= start
; i
< finish
; i
++)
2498 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2499 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2501 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2502 emit_move_insn (tmps
[i
], reg
);
2508 /* If we won't be storing directly into memory, protect the real destination
2509 from strange tricks we might play. */
2511 if (GET_CODE (dst
) == PARALLEL
)
2515 /* We can get a PARALLEL dst if there is a conditional expression in
2516 a return statement. In that case, the dst and src are the same,
2517 so no action is necessary. */
2518 if (rtx_equal_p (dst
, src
))
2521 /* It is unclear if we can ever reach here, but we may as well handle
2522 it. Allocate a temporary, and split this into a store/load to/from
2524 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2525 emit_group_store (temp
, src
, type
, ssize
);
2526 emit_group_load (dst
, temp
, type
, ssize
);
2529 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2531 machine_mode outer
= GET_MODE (dst
);
2537 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2538 dst
= gen_reg_rtx (outer
);
2540 /* Make life a bit easier for combine. */
2541 /* If the first element of the vector is the low part
2542 of the destination mode, use a paradoxical subreg to
2543 initialize the destination. */
2546 inner
= GET_MODE (tmps
[start
]);
2547 bytepos
= subreg_lowpart_offset (inner
, outer
);
2548 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2551 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2555 emit_move_insn (dst
, temp
);
2562 /* If the first element wasn't the low part, try the last. */
2564 && start
< finish
- 1)
2566 inner
= GET_MODE (tmps
[finish
- 1]);
2567 bytepos
= subreg_lowpart_offset (inner
, outer
);
2568 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2572 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2576 emit_move_insn (dst
, temp
);
2583 /* Otherwise, simply initialize the result to zero. */
2585 emit_move_insn (dst
, CONST0_RTX (outer
));
2588 /* Process the pieces. */
2589 for (i
= start
; i
< finish
; i
++)
2591 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2592 machine_mode mode
= GET_MODE (tmps
[i
]);
2593 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2594 poly_uint64 adj_bytelen
;
2597 /* Handle trailing fragments that run over the size of the struct.
2598 It's the target's responsibility to make sure that the fragment
2599 cannot be strictly smaller in some cases and strictly larger
2601 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2602 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2603 adj_bytelen
= ssize
- bytepos
;
2605 adj_bytelen
= bytelen
;
2607 if (GET_CODE (dst
) == CONCAT
)
2609 if (known_le (bytepos
+ adj_bytelen
,
2610 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2611 dest
= XEXP (dst
, 0);
2612 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2614 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2615 dest
= XEXP (dst
, 1);
2619 machine_mode dest_mode
= GET_MODE (dest
);
2620 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2622 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2624 if (GET_MODE_ALIGNMENT (dest_mode
)
2625 >= GET_MODE_ALIGNMENT (tmp_mode
))
2627 dest
= assign_stack_temp (dest_mode
,
2628 GET_MODE_SIZE (dest_mode
));
2629 emit_move_insn (adjust_address (dest
,
2637 dest
= assign_stack_temp (tmp_mode
,
2638 GET_MODE_SIZE (tmp_mode
));
2639 emit_move_insn (dest
, tmps
[i
]);
2640 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2646 /* Handle trailing fragments that run over the size of the struct. */
2647 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2649 /* store_bit_field always takes its value from the lsb.
2650 Move the fragment to the lsb if it's not already there. */
2652 #ifdef BLOCK_REG_PADDING
2653 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2654 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2660 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2661 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2665 /* Make sure not to write past the end of the struct. */
2666 store_bit_field (dest
,
2667 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2668 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2669 VOIDmode
, tmps
[i
], false);
2672 /* Optimize the access just a bit. */
2673 else if (MEM_P (dest
)
2674 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2675 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2676 && multiple_p (bytepos
* BITS_PER_UNIT
,
2677 GET_MODE_ALIGNMENT (mode
))
2678 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2679 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2682 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2683 0, 0, mode
, tmps
[i
], false);
2686 /* Copy from the pseudo into the (probable) hard reg. */
2687 if (orig_dst
!= dst
)
2688 emit_move_insn (orig_dst
, dst
);
2691 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2692 of the value stored in X. */
2695 maybe_emit_group_store (rtx x
, tree type
)
2697 machine_mode mode
= TYPE_MODE (type
);
2698 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2699 if (GET_CODE (x
) == PARALLEL
)
2701 rtx result
= gen_reg_rtx (mode
);
2702 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2708 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2710 This is used on targets that return BLKmode values in registers. */
2713 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2715 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2716 rtx src
= NULL
, dst
= NULL
;
2717 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2718 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2719 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2720 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2721 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2722 fixed_size_mode copy_mode
;
2724 /* BLKmode registers created in the back-end shouldn't have survived. */
2725 gcc_assert (mode
!= BLKmode
);
2727 /* If the structure doesn't take up a whole number of words, see whether
2728 SRCREG is padded on the left or on the right. If it's on the left,
2729 set PADDING_CORRECTION to the number of bits to skip.
2731 In most ABIs, the structure will be returned at the least end of
2732 the register, which translates to right padding on little-endian
2733 targets and left padding on big-endian targets. The opposite
2734 holds if the structure is returned at the most significant
2735 end of the register. */
2736 if (bytes
% UNITS_PER_WORD
!= 0
2737 && (targetm
.calls
.return_in_msb (type
)
2739 : BYTES_BIG_ENDIAN
))
2741 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2743 /* We can use a single move if we have an exact mode for the size. */
2744 else if (MEM_P (target
)
2745 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2746 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2747 && bytes
== GET_MODE_SIZE (mode
))
2749 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2753 /* And if we additionally have the same mode for a register. */
2754 else if (REG_P (target
)
2755 && GET_MODE (target
) == mode
2756 && bytes
== GET_MODE_SIZE (mode
))
2758 emit_move_insn (target
, srcreg
);
2762 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2763 into a new pseudo which is a full word. */
2764 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2766 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2770 /* Copy the structure BITSIZE bits at a time. If the target lives in
2771 memory, take care of not reading/writing past its end by selecting
2772 a copy mode suited to BITSIZE. This should always be possible given
2775 If the target lives in register, make sure not to select a copy mode
2776 larger than the mode of the register.
2778 We could probably emit more efficient code for machines which do not use
2779 strict alignment, but it doesn't seem worth the effort at the current
2782 copy_mode
= word_mode
;
2785 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2786 if (mem_mode
.exists ())
2787 copy_mode
= mem_mode
.require ();
2789 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2792 for (bitpos
= 0, xbitpos
= padding_correction
;
2793 bitpos
< bytes
* BITS_PER_UNIT
;
2794 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2796 /* We need a new source operand each time xbitpos is on a
2797 word boundary and when xbitpos == padding_correction
2798 (the first time through). */
2799 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2800 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2802 /* We need a new destination operand each time bitpos is on
2804 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2806 else if (bitpos
% BITS_PER_WORD
== 0)
2807 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2809 /* Use xbitpos for the source extraction (right justified) and
2810 bitpos for the destination store (left justified). */
2811 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2812 extract_bit_field (src
, bitsize
,
2813 xbitpos
% BITS_PER_WORD
, 1,
2814 NULL_RTX
, copy_mode
, copy_mode
,
2820 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2821 register if it contains any data, otherwise return null.
2823 This is used on targets that return BLKmode values in registers. */
2826 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2829 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2830 unsigned int bitsize
;
2831 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2832 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2833 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2834 fixed_size_mode dst_mode
;
2835 scalar_int_mode min_mode
;
2837 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2839 x
= expand_normal (src
);
2841 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2845 /* If the structure doesn't take up a whole number of words, see
2846 whether the register value should be padded on the left or on
2847 the right. Set PADDING_CORRECTION to the number of padding
2848 bits needed on the left side.
2850 In most ABIs, the structure will be returned at the least end of
2851 the register, which translates to right padding on little-endian
2852 targets and left padding on big-endian targets. The opposite
2853 holds if the structure is returned at the most significant
2854 end of the register. */
2855 if (bytes
% UNITS_PER_WORD
!= 0
2856 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2858 : BYTES_BIG_ENDIAN
))
2859 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2862 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2863 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2864 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2865 min_mode
= smallest_int_mode_for_size (bitsize
);
2867 /* Copy the structure BITSIZE bits at a time. */
2868 for (bitpos
= 0, xbitpos
= padding_correction
;
2869 bitpos
< bytes
* BITS_PER_UNIT
;
2870 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2872 /* We need a new destination pseudo each time xbitpos is
2873 on a word boundary and when xbitpos == padding_correction
2874 (the first time through). */
2875 if (xbitpos
% BITS_PER_WORD
== 0
2876 || xbitpos
== padding_correction
)
2878 /* Generate an appropriate register. */
2879 dst_word
= gen_reg_rtx (word_mode
);
2880 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2882 /* Clear the destination before we move anything into it. */
2883 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2886 /* Find the largest integer mode that can be used to copy all or as
2887 many bits as possible of the structure if the target supports larger
2888 copies. There are too many corner cases here w.r.t to alignments on
2889 the read/writes. So if there is any padding just use single byte
2891 opt_scalar_int_mode mode_iter
;
2892 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2894 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2896 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2897 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2898 && msize
<= BITS_PER_WORD
)
2905 /* We need a new source operand each time bitpos is on a word
2907 if (bitpos
% BITS_PER_WORD
== 0)
2908 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2910 /* Use bitpos for the source extraction (left justified) and
2911 xbitpos for the destination store (right justified). */
2912 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2914 extract_bit_field (src_word
, bitsize
,
2915 bitpos
% BITS_PER_WORD
, 1,
2916 NULL_RTX
, word_mode
, word_mode
,
2921 if (mode
== BLKmode
)
2923 /* Find the smallest integer mode large enough to hold the
2924 entire structure. */
2925 opt_scalar_int_mode mode_iter
;
2926 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2927 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2930 /* A suitable mode should have been found. */
2931 mode
= mode_iter
.require ();
2934 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2935 dst_mode
= word_mode
;
2938 dst
= gen_reg_rtx (dst_mode
);
2940 for (i
= 0; i
< n_regs
; i
++)
2941 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2943 if (mode
!= dst_mode
)
2944 dst
= gen_lowpart (mode
, dst
);
2949 /* Add a USE expression for REG to the (possibly empty) list pointed
2950 to by CALL_FUSAGE. REG must denote a hard register. */
2953 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2955 gcc_assert (REG_P (reg
));
2957 if (!HARD_REGISTER_P (reg
))
2961 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2964 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2965 to by CALL_FUSAGE. REG must denote a hard register. */
2968 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2970 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2973 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2976 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2977 starting at REGNO. All of these registers must be hard registers. */
2980 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2984 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2986 for (i
= 0; i
< nregs
; i
++)
2987 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2990 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2991 PARALLEL REGS. This is for calls that pass values in multiple
2992 non-contiguous locations. The Irix 6 ABI has examples of this. */
2995 use_group_regs (rtx
*call_fusage
, rtx regs
)
2999 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
3001 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
3003 /* A NULL entry means the parameter goes both on the stack and in
3004 registers. This can also be a MEM for targets that pass values
3005 partially on the stack and partially in registers. */
3006 if (reg
!= 0 && REG_P (reg
))
3007 use_reg (call_fusage
, reg
);
3011 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3012 assigment and the code of the expresion on the RHS is CODE. Return
3016 get_def_for_expr (tree name
, enum tree_code code
)
3020 if (TREE_CODE (name
) != SSA_NAME
)
3023 def_stmt
= get_gimple_for_ssa_name (name
);
3025 || gimple_assign_rhs_code (def_stmt
) != code
)
3031 /* Return the defining gimple statement for SSA_NAME NAME if it is an
3032 assigment and the class of the expresion on the RHS is CLASS. Return
3036 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
3040 if (TREE_CODE (name
) != SSA_NAME
)
3043 def_stmt
= get_gimple_for_ssa_name (name
);
3045 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
3051 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
3052 its length in bytes. */
3055 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
3056 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3057 unsigned HOST_WIDE_INT min_size
,
3058 unsigned HOST_WIDE_INT max_size
,
3059 unsigned HOST_WIDE_INT probable_max_size
)
3061 machine_mode mode
= GET_MODE (object
);
3064 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3066 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3067 just move a zero. Otherwise, do this a piece at a time. */
3068 poly_int64 size_val
;
3070 && poly_int_rtx_p (size
, &size_val
)
3071 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3073 rtx zero
= CONST0_RTX (mode
);
3076 emit_move_insn (object
, zero
);
3080 if (COMPLEX_MODE_P (mode
))
3082 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3085 write_complex_part (object
, zero
, 0);
3086 write_complex_part (object
, zero
, 1);
3092 if (size
== const0_rtx
)
3095 align
= MEM_ALIGN (object
);
3097 if (CONST_INT_P (size
)
3098 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3100 optimize_insn_for_speed_p ()))
3101 clear_by_pieces (object
, INTVAL (size
), align
);
3102 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3103 expected_align
, expected_size
,
3104 min_size
, max_size
, probable_max_size
))
3106 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3107 return set_storage_via_libcall (object
, size
, const0_rtx
,
3108 method
== BLOCK_OP_TAILCALL
);
3116 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3118 unsigned HOST_WIDE_INT max
, min
= 0;
3119 if (GET_CODE (size
) == CONST_INT
)
3120 min
= max
= UINTVAL (size
);
3122 max
= GET_MODE_MASK (GET_MODE (size
));
3123 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3127 /* A subroutine of clear_storage. Expand a call to memset.
3128 Return the return value of memset, 0 otherwise. */
3131 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3133 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3134 machine_mode size_mode
;
3136 object
= copy_addr_to_reg (XEXP (object
, 0));
3137 object_tree
= make_tree (ptr_type_node
, object
);
3139 if (!CONST_INT_P (val
))
3140 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3141 val_tree
= make_tree (integer_type_node
, val
);
3143 size_mode
= TYPE_MODE (sizetype
);
3144 size
= convert_to_mode (size_mode
, size
, 1);
3145 size
= copy_to_mode_reg (size_mode
, size
);
3146 size_tree
= make_tree (sizetype
, size
);
3148 /* It is incorrect to use the libcall calling conventions for calls to
3149 memset because it can be provided by the user. */
3150 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3151 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3152 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3154 return expand_call (call_expr
, NULL_RTX
, false);
3157 /* Expand a setmem pattern; return true if successful. */
3160 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3161 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3162 unsigned HOST_WIDE_INT min_size
,
3163 unsigned HOST_WIDE_INT max_size
,
3164 unsigned HOST_WIDE_INT probable_max_size
)
3166 /* Try the most limited insn first, because there's no point
3167 including more than one in the machine description unless
3168 the more limited one has some advantage. */
3170 if (expected_align
< align
)
3171 expected_align
= align
;
3172 if (expected_size
!= -1)
3174 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3175 expected_size
= max_size
;
3176 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3177 expected_size
= min_size
;
3180 opt_scalar_int_mode mode_iter
;
3181 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3183 scalar_int_mode mode
= mode_iter
.require ();
3184 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3186 if (code
!= CODE_FOR_nothing
3187 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3188 here because if SIZE is less than the mode mask, as it is
3189 returned by the macro, it will definitely be less than the
3190 actual mode mask. Since SIZE is within the Pmode address
3191 space, we limit MODE to Pmode. */
3192 && ((CONST_INT_P (size
)
3193 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3194 <= (GET_MODE_MASK (mode
) >> 1)))
3195 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3196 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3198 class expand_operand ops
[9];
3201 nops
= insn_data
[(int) code
].n_generator_args
;
3202 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3204 create_fixed_operand (&ops
[0], object
);
3205 /* The check above guarantees that this size conversion is valid. */
3206 create_convert_operand_to (&ops
[1], size
, mode
, true);
3207 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3208 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3211 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3212 create_integer_operand (&ops
[5], expected_size
);
3216 create_integer_operand (&ops
[6], min_size
);
3217 /* If we cannot represent the maximal size,
3218 make parameter NULL. */
3219 if ((HOST_WIDE_INT
) max_size
!= -1)
3220 create_integer_operand (&ops
[7], max_size
);
3222 create_fixed_operand (&ops
[7], NULL
);
3226 /* If we cannot represent the maximal size,
3227 make parameter NULL. */
3228 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3229 create_integer_operand (&ops
[8], probable_max_size
);
3231 create_fixed_operand (&ops
[8], NULL
);
3233 if (maybe_expand_insn (code
, nops
, ops
))
3242 /* Write to one of the components of the complex value CPLX. Write VAL to
3243 the real part if IMAG_P is false, and the imaginary part if its true. */
3246 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3252 if (GET_CODE (cplx
) == CONCAT
)
3254 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3258 cmode
= GET_MODE (cplx
);
3259 imode
= GET_MODE_INNER (cmode
);
3260 ibitsize
= GET_MODE_BITSIZE (imode
);
3262 /* For MEMs simplify_gen_subreg may generate an invalid new address
3263 because, e.g., the original address is considered mode-dependent
3264 by the target, which restricts simplify_subreg from invoking
3265 adjust_address_nv. Instead of preparing fallback support for an
3266 invalid address, we call adjust_address_nv directly. */
3269 emit_move_insn (adjust_address_nv (cplx
, imode
,
3270 imag_p
? GET_MODE_SIZE (imode
) : 0),
3275 /* If the sub-object is at least word sized, then we know that subregging
3276 will work. This special case is important, since store_bit_field
3277 wants to operate on integer modes, and there's rarely an OImode to
3278 correspond to TCmode. */
3279 if (ibitsize
>= BITS_PER_WORD
3280 /* For hard regs we have exact predicates. Assume we can split
3281 the original object if it spans an even number of hard regs.
3282 This special case is important for SCmode on 64-bit platforms
3283 where the natural size of floating-point regs is 32-bit. */
3285 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3286 && REG_NREGS (cplx
) % 2 == 0))
3288 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3289 imag_p
? GET_MODE_SIZE (imode
) : 0);
3292 emit_move_insn (part
, val
);
3296 /* simplify_gen_subreg may fail for sub-word MEMs. */
3297 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3300 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3304 /* Extract one of the components of the complex value CPLX. Extract the
3305 real part if IMAG_P is false, and the imaginary part if it's true. */
3308 read_complex_part (rtx cplx
, bool imag_p
)
3314 if (GET_CODE (cplx
) == CONCAT
)
3315 return XEXP (cplx
, imag_p
);
3317 cmode
= GET_MODE (cplx
);
3318 imode
= GET_MODE_INNER (cmode
);
3319 ibitsize
= GET_MODE_BITSIZE (imode
);
3321 /* Special case reads from complex constants that got spilled to memory. */
3322 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3324 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3325 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3327 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3328 if (CONSTANT_CLASS_P (part
))
3329 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3333 /* For MEMs simplify_gen_subreg may generate an invalid new address
3334 because, e.g., the original address is considered mode-dependent
3335 by the target, which restricts simplify_subreg from invoking
3336 adjust_address_nv. Instead of preparing fallback support for an
3337 invalid address, we call adjust_address_nv directly. */
3339 return adjust_address_nv (cplx
, imode
,
3340 imag_p
? GET_MODE_SIZE (imode
) : 0);
3342 /* If the sub-object is at least word sized, then we know that subregging
3343 will work. This special case is important, since extract_bit_field
3344 wants to operate on integer modes, and there's rarely an OImode to
3345 correspond to TCmode. */
3346 if (ibitsize
>= BITS_PER_WORD
3347 /* For hard regs we have exact predicates. Assume we can split
3348 the original object if it spans an even number of hard regs.
3349 This special case is important for SCmode on 64-bit platforms
3350 where the natural size of floating-point regs is 32-bit. */
3352 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3353 && REG_NREGS (cplx
) % 2 == 0))
3355 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3356 imag_p
? GET_MODE_SIZE (imode
) : 0);
3360 /* simplify_gen_subreg may fail for sub-word MEMs. */
3361 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3364 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3365 true, NULL_RTX
, imode
, imode
, false, NULL
);
3368 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3369 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3370 represented in NEW_MODE. If FORCE is true, this will never happen, as
3371 we'll force-create a SUBREG if needed. */
3374 emit_move_change_mode (machine_mode new_mode
,
3375 machine_mode old_mode
, rtx x
, bool force
)
3379 if (push_operand (x
, GET_MODE (x
)))
3381 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3382 MEM_COPY_ATTRIBUTES (ret
, x
);
3386 /* We don't have to worry about changing the address since the
3387 size in bytes is supposed to be the same. */
3388 if (reload_in_progress
)
3390 /* Copy the MEM to change the mode and move any
3391 substitutions from the old MEM to the new one. */
3392 ret
= adjust_address_nv (x
, new_mode
, 0);
3393 copy_replacements (x
, ret
);
3396 ret
= adjust_address (x
, new_mode
, 0);
3400 /* Note that we do want simplify_subreg's behavior of validating
3401 that the new mode is ok for a hard register. If we were to use
3402 simplify_gen_subreg, we would create the subreg, but would
3403 probably run into the target not being able to implement it. */
3404 /* Except, of course, when FORCE is true, when this is exactly what
3405 we want. Which is needed for CCmodes on some targets. */
3407 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3409 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3415 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3416 an integer mode of the same size as MODE. Returns the instruction
3417 emitted, or NULL if such a move could not be generated. */
3420 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3422 scalar_int_mode imode
;
3423 enum insn_code code
;
3425 /* There must exist a mode of the exact size we require. */
3426 if (!int_mode_for_mode (mode
).exists (&imode
))
3429 /* The target must support moves in this mode. */
3430 code
= optab_handler (mov_optab
, imode
);
3431 if (code
== CODE_FOR_nothing
)
3434 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3437 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3440 return emit_insn (GEN_FCN (code
) (x
, y
));
3443 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3444 Return an equivalent MEM that does not use an auto-increment. */
3447 emit_move_resolve_push (machine_mode mode
, rtx x
)
3449 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3452 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3453 #ifdef PUSH_ROUNDING
3454 adjust
= PUSH_ROUNDING (adjust
);
3456 if (code
== PRE_DEC
|| code
== POST_DEC
)
3458 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3460 rtx expr
= XEXP (XEXP (x
, 0), 1);
3462 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3463 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3464 if (GET_CODE (expr
) == MINUS
)
3466 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3470 /* Do not use anti_adjust_stack, since we don't want to update
3471 stack_pointer_delta. */
3472 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3473 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3474 0, OPTAB_LIB_WIDEN
);
3475 if (temp
!= stack_pointer_rtx
)
3476 emit_move_insn (stack_pointer_rtx
, temp
);
3483 temp
= stack_pointer_rtx
;
3488 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3494 return replace_equiv_address (x
, temp
);
3497 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3498 X is known to satisfy push_operand, and MODE is known to be complex.
3499 Returns the last instruction emitted. */
3502 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3504 scalar_mode submode
= GET_MODE_INNER (mode
);
3507 #ifdef PUSH_ROUNDING
3508 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3510 /* In case we output to the stack, but the size is smaller than the
3511 machine can push exactly, we need to use move instructions. */
3512 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3514 x
= emit_move_resolve_push (mode
, x
);
3515 return emit_move_insn (x
, y
);
3519 /* Note that the real part always precedes the imag part in memory
3520 regardless of machine's endianness. */
3521 switch (GET_CODE (XEXP (x
, 0)))
3535 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3536 read_complex_part (y
, imag_first
));
3537 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3538 read_complex_part (y
, !imag_first
));
3541 /* A subroutine of emit_move_complex. Perform the move from Y to X
3542 via two moves of the parts. Returns the last instruction emitted. */
3545 emit_move_complex_parts (rtx x
, rtx y
)
3547 /* Show the output dies here. This is necessary for SUBREGs
3548 of pseudos since we cannot track their lifetimes correctly;
3549 hard regs shouldn't appear here except as return values. */
3550 if (!reload_completed
&& !reload_in_progress
3551 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3554 write_complex_part (x
, read_complex_part (y
, false), false);
3555 write_complex_part (x
, read_complex_part (y
, true), true);
3557 return get_last_insn ();
3560 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3561 MODE is known to be complex. Returns the last instruction emitted. */
3564 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3568 /* Need to take special care for pushes, to maintain proper ordering
3569 of the data, and possibly extra padding. */
3570 if (push_operand (x
, mode
))
3571 return emit_move_complex_push (mode
, x
, y
);
3573 /* See if we can coerce the target into moving both values at once, except
3574 for floating point where we favor moving as parts if this is easy. */
3575 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3576 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3578 && HARD_REGISTER_P (x
)
3579 && REG_NREGS (x
) == 1)
3581 && HARD_REGISTER_P (y
)
3582 && REG_NREGS (y
) == 1))
3584 /* Not possible if the values are inherently not adjacent. */
3585 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3587 /* Is possible if both are registers (or subregs of registers). */
3588 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3590 /* If one of the operands is a memory, and alignment constraints
3591 are friendly enough, we may be able to do combined memory operations.
3592 We do not attempt this if Y is a constant because that combination is
3593 usually better with the by-parts thing below. */
3594 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3595 && (!STRICT_ALIGNMENT
3596 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3605 /* For memory to memory moves, optimal behavior can be had with the
3606 existing block move logic. But use normal expansion if optimizing
3608 if (MEM_P (x
) && MEM_P (y
))
3610 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3611 (optimize_insn_for_speed_p()
3612 ? BLOCK_OP_NO_LIBCALL
: BLOCK_OP_NORMAL
));
3613 return get_last_insn ();
3616 ret
= emit_move_via_integer (mode
, x
, y
, true);
3621 return emit_move_complex_parts (x
, y
);
3624 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3625 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3628 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3632 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3635 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3636 if (code
!= CODE_FOR_nothing
)
3638 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3639 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3640 return emit_insn (GEN_FCN (code
) (x
, y
));
3644 /* Otherwise, find the MODE_INT mode of the same width. */
3645 ret
= emit_move_via_integer (mode
, x
, y
, false);
3646 gcc_assert (ret
!= NULL
);
3650 /* Return true if word I of OP lies entirely in the
3651 undefined bits of a paradoxical subreg. */
3654 undefined_operand_subword_p (const_rtx op
, int i
)
3656 if (GET_CODE (op
) != SUBREG
)
3658 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3659 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3660 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3661 || known_le (offset
, -UNITS_PER_WORD
));
3664 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3665 MODE is any multi-word or full-word mode that lacks a move_insn
3666 pattern. Note that you will get better code if you define such
3667 patterns, even if they must turn into multiple assembler instructions. */
3670 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3672 rtx_insn
*last_insn
= 0;
3678 /* This function can only handle cases where the number of words is
3679 known at compile time. */
3680 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3681 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3683 /* If X is a push on the stack, do the push now and replace
3684 X with a reference to the stack pointer. */
3685 if (push_operand (x
, mode
))
3686 x
= emit_move_resolve_push (mode
, x
);
3688 /* If we are in reload, see if either operand is a MEM whose address
3689 is scheduled for replacement. */
3690 if (reload_in_progress
&& MEM_P (x
)
3691 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3692 x
= replace_equiv_address_nv (x
, inner
);
3693 if (reload_in_progress
&& MEM_P (y
)
3694 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3695 y
= replace_equiv_address_nv (y
, inner
);
3699 need_clobber
= false;
3700 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3702 /* Do not generate code for a move if it would go entirely
3703 to the non-existing bits of a paradoxical subreg. */
3704 if (undefined_operand_subword_p (x
, i
))
3707 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3710 /* Do not generate code for a move if it would come entirely
3711 from the undefined bits of a paradoxical subreg. */
3712 if (undefined_operand_subword_p (y
, i
))
3715 ypart
= operand_subword (y
, i
, 1, mode
);
3717 /* If we can't get a part of Y, put Y into memory if it is a
3718 constant. Otherwise, force it into a register. Then we must
3719 be able to get a part of Y. */
3720 if (ypart
== 0 && CONSTANT_P (y
))
3722 y
= use_anchored_address (force_const_mem (mode
, y
));
3723 ypart
= operand_subword (y
, i
, 1, mode
);
3725 else if (ypart
== 0)
3726 ypart
= operand_subword_force (y
, i
, mode
);
3728 gcc_assert (xpart
&& ypart
);
3730 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3732 last_insn
= emit_move_insn (xpart
, ypart
);
3738 /* Show the output dies here. This is necessary for SUBREGs
3739 of pseudos since we cannot track their lifetimes correctly;
3740 hard regs shouldn't appear here except as return values.
3741 We never want to emit such a clobber after reload. */
3743 && ! (reload_in_progress
|| reload_completed
)
3744 && need_clobber
!= 0)
3752 /* Low level part of emit_move_insn.
3753 Called just like emit_move_insn, but assumes X and Y
3754 are basically valid. */
3757 emit_move_insn_1 (rtx x
, rtx y
)
3759 machine_mode mode
= GET_MODE (x
);
3760 enum insn_code code
;
3762 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3764 code
= optab_handler (mov_optab
, mode
);
3765 if (code
!= CODE_FOR_nothing
)
3766 return emit_insn (GEN_FCN (code
) (x
, y
));
3768 /* Expand complex moves by moving real part and imag part. */
3769 if (COMPLEX_MODE_P (mode
))
3770 return emit_move_complex (mode
, x
, y
);
3772 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3773 || ALL_FIXED_POINT_MODE_P (mode
))
3775 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3777 /* If we can't find an integer mode, use multi words. */
3781 return emit_move_multi_word (mode
, x
, y
);
3784 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3785 return emit_move_ccmode (mode
, x
, y
);
3787 /* Try using a move pattern for the corresponding integer mode. This is
3788 only safe when simplify_subreg can convert MODE constants into integer
3789 constants. At present, it can only do this reliably if the value
3790 fits within a HOST_WIDE_INT. */
3792 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3794 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3798 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3803 return emit_move_multi_word (mode
, x
, y
);
3806 /* Generate code to copy Y into X.
3807 Both Y and X must have the same mode, except that
3808 Y can be a constant with VOIDmode.
3809 This mode cannot be BLKmode; use emit_block_move for that.
3811 Return the last instruction emitted. */
3814 emit_move_insn (rtx x
, rtx y
)
3816 machine_mode mode
= GET_MODE (x
);
3817 rtx y_cst
= NULL_RTX
;
3818 rtx_insn
*last_insn
;
3821 gcc_assert (mode
!= BLKmode
3822 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3824 /* If we have a copy that looks like one of the following patterns:
3825 (set (subreg:M1 (reg:M2 ...)) (subreg:M1 (reg:M2 ...)))
3826 (set (subreg:M1 (reg:M2 ...)) (mem:M1 ADDR))
3827 (set (mem:M1 ADDR) (subreg:M1 (reg:M2 ...)))
3828 (set (subreg:M1 (reg:M2 ...)) (constant C))
3829 where mode M1 is equal in size to M2, try to detect whether the
3830 mode change involves an implicit round trip through memory.
3831 If so, see if we can avoid that by removing the subregs and
3832 doing the move in mode M2 instead. */
3834 rtx x_inner
= NULL_RTX
;
3835 rtx y_inner
= NULL_RTX
;
3837 auto candidate_subreg_p
= [&](rtx subreg
) {
3838 return (REG_P (SUBREG_REG (subreg
))
3839 && known_eq (GET_MODE_SIZE (GET_MODE (SUBREG_REG (subreg
))),
3840 GET_MODE_SIZE (GET_MODE (subreg
)))
3841 && optab_handler (mov_optab
, GET_MODE (SUBREG_REG (subreg
)))
3842 != CODE_FOR_nothing
);
3845 auto candidate_mem_p
= [&](machine_mode innermode
, rtx mem
) {
3846 return (!targetm
.can_change_mode_class (innermode
, GET_MODE (mem
), ALL_REGS
)
3847 && !push_operand (mem
, GET_MODE (mem
))
3848 /* Not a candiate if innermode requires too much alignment. */
3849 && (MEM_ALIGN (mem
) >= GET_MODE_ALIGNMENT (innermode
)
3850 || targetm
.slow_unaligned_access (GET_MODE (mem
),
3852 || !targetm
.slow_unaligned_access (innermode
,
3856 if (SUBREG_P (x
) && candidate_subreg_p (x
))
3857 x_inner
= SUBREG_REG (x
);
3859 if (SUBREG_P (y
) && candidate_subreg_p (y
))
3860 y_inner
= SUBREG_REG (y
);
3862 if (x_inner
!= NULL_RTX
3863 && y_inner
!= NULL_RTX
3864 && GET_MODE (x_inner
) == GET_MODE (y_inner
)
3865 && !targetm
.can_change_mode_class (GET_MODE (x_inner
), mode
, ALL_REGS
))
3869 mode
= GET_MODE (x_inner
);
3871 else if (x_inner
!= NULL_RTX
3873 && candidate_mem_p (GET_MODE (x_inner
), y
))
3876 y
= adjust_address (y
, GET_MODE (x_inner
), 0);
3877 mode
= GET_MODE (x_inner
);
3879 else if (y_inner
!= NULL_RTX
3881 && candidate_mem_p (GET_MODE (y_inner
), x
))
3883 x
= adjust_address (x
, GET_MODE (y_inner
), 0);
3885 mode
= GET_MODE (y_inner
);
3887 else if (x_inner
!= NULL_RTX
3889 && !targetm
.can_change_mode_class (GET_MODE (x_inner
),
3891 && (y_inner
= simplify_subreg (GET_MODE (x_inner
), y
, mode
, 0)))
3895 mode
= GET_MODE (x_inner
);
3901 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3902 && (last_insn
= compress_float_constant (x
, y
)))
3907 if (!targetm
.legitimate_constant_p (mode
, y
))
3909 y
= force_const_mem (mode
, y
);
3911 /* If the target's cannot_force_const_mem prevented the spill,
3912 assume that the target's move expanders will also take care
3913 of the non-legitimate constant. */
3917 y
= use_anchored_address (y
);
3921 /* If X or Y are memory references, verify that their addresses are valid
3924 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3926 && ! push_operand (x
, GET_MODE (x
))))
3927 x
= validize_mem (x
);
3930 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3931 MEM_ADDR_SPACE (y
)))
3932 y
= validize_mem (y
);
3934 gcc_assert (mode
!= BLKmode
);
3936 last_insn
= emit_move_insn_1 (x
, y
);
3938 if (y_cst
&& REG_P (x
)
3939 && (set
= single_set (last_insn
)) != NULL_RTX
3940 && SET_DEST (set
) == x
3941 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3942 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3947 /* Generate the body of an instruction to copy Y into X.
3948 It may be a list of insns, if one insn isn't enough. */
3951 gen_move_insn (rtx x
, rtx y
)
3956 emit_move_insn_1 (x
, y
);
3962 /* If Y is representable exactly in a narrower mode, and the target can
3963 perform the extension directly from constant or memory, then emit the
3964 move as an extension. */
3967 compress_float_constant (rtx x
, rtx y
)
3969 machine_mode dstmode
= GET_MODE (x
);
3970 machine_mode orig_srcmode
= GET_MODE (y
);
3971 machine_mode srcmode
;
3972 const REAL_VALUE_TYPE
*r
;
3973 int oldcost
, newcost
;
3974 bool speed
= optimize_insn_for_speed_p ();
3976 r
= CONST_DOUBLE_REAL_VALUE (y
);
3978 if (targetm
.legitimate_constant_p (dstmode
, y
))
3979 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3981 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3983 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3987 rtx_insn
*last_insn
;
3989 /* Skip if the target can't extend this way. */
3990 ic
= can_extend_p (dstmode
, srcmode
, 0);
3991 if (ic
== CODE_FOR_nothing
)
3994 /* Skip if the narrowed value isn't exact. */
3995 if (! exact_real_truncate (srcmode
, r
))
3998 trunc_y
= const_double_from_real_value (*r
, srcmode
);
4000 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
4002 /* Skip if the target needs extra instructions to perform
4004 if (!insn_operand_matches (ic
, 1, trunc_y
))
4006 /* This is valid, but may not be cheaper than the original. */
4007 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4009 if (oldcost
< newcost
)
4012 else if (float_extend_from_mem
[dstmode
][srcmode
])
4014 trunc_y
= force_const_mem (srcmode
, trunc_y
);
4015 /* This is valid, but may not be cheaper than the original. */
4016 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
4018 if (oldcost
< newcost
)
4020 trunc_y
= validize_mem (trunc_y
);
4025 /* For CSE's benefit, force the compressed constant pool entry
4026 into a new pseudo. This constant may be used in different modes,
4027 and if not, combine will put things back together for us. */
4028 trunc_y
= force_reg (srcmode
, trunc_y
);
4030 /* If x is a hard register, perform the extension into a pseudo,
4031 so that e.g. stack realignment code is aware of it. */
4033 if (REG_P (x
) && HARD_REGISTER_P (x
))
4034 target
= gen_reg_rtx (dstmode
);
4036 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
4037 last_insn
= get_last_insn ();
4040 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
4043 return emit_move_insn (x
, target
);
4050 /* Pushing data onto the stack. */
4052 /* Push a block of length SIZE (perhaps variable)
4053 and return an rtx to address the beginning of the block.
4054 The value may be virtual_outgoing_args_rtx.
4056 EXTRA is the number of bytes of padding to push in addition to SIZE.
4057 BELOW nonzero means this padding comes at low addresses;
4058 otherwise, the padding comes at high addresses. */
4061 push_block (rtx size
, poly_int64 extra
, int below
)
4065 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
4066 if (CONSTANT_P (size
))
4067 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
4068 else if (REG_P (size
) && known_eq (extra
, 0))
4069 anti_adjust_stack (size
);
4072 temp
= copy_to_mode_reg (Pmode
, size
);
4073 if (maybe_ne (extra
, 0))
4074 temp
= expand_binop (Pmode
, add_optab
, temp
,
4075 gen_int_mode (extra
, Pmode
),
4076 temp
, 0, OPTAB_LIB_WIDEN
);
4077 anti_adjust_stack (temp
);
4080 if (STACK_GROWS_DOWNWARD
)
4082 temp
= virtual_outgoing_args_rtx
;
4083 if (maybe_ne (extra
, 0) && below
)
4084 temp
= plus_constant (Pmode
, temp
, extra
);
4089 if (poly_int_rtx_p (size
, &csize
))
4090 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
4091 -csize
- (below
? 0 : extra
));
4092 else if (maybe_ne (extra
, 0) && !below
)
4093 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4094 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
4097 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
4098 negate_rtx (Pmode
, size
));
4101 return memory_address (NARROWEST_INT_MODE
, temp
);
4104 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
4107 mem_autoinc_base (rtx mem
)
4111 rtx addr
= XEXP (mem
, 0);
4112 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
4113 return XEXP (addr
, 0);
4118 /* A utility routine used here, in reload, and in try_split. The insns
4119 after PREV up to and including LAST are known to adjust the stack,
4120 with a final value of END_ARGS_SIZE. Iterate backward from LAST
4121 placing notes as appropriate. PREV may be NULL, indicating the
4122 entire insn sequence prior to LAST should be scanned.
4124 The set of allowed stack pointer modifications is small:
4125 (1) One or more auto-inc style memory references (aka pushes),
4126 (2) One or more addition/subtraction with the SP as destination,
4127 (3) A single move insn with the SP as destination,
4128 (4) A call_pop insn,
4129 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
4131 Insns in the sequence that do not modify the SP are ignored,
4132 except for noreturn calls.
4134 The return value is the amount of adjustment that can be trivially
4135 verified, via immediate operand or auto-inc. If the adjustment
4136 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4139 find_args_size_adjust (rtx_insn
*insn
)
4144 pat
= PATTERN (insn
);
4147 /* Look for a call_pop pattern. */
4150 /* We have to allow non-call_pop patterns for the case
4151 of emit_single_push_insn of a TLS address. */
4152 if (GET_CODE (pat
) != PARALLEL
)
4155 /* All call_pop have a stack pointer adjust in the parallel.
4156 The call itself is always first, and the stack adjust is
4157 usually last, so search from the end. */
4158 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4160 set
= XVECEXP (pat
, 0, i
);
4161 if (GET_CODE (set
) != SET
)
4163 dest
= SET_DEST (set
);
4164 if (dest
== stack_pointer_rtx
)
4167 /* We'd better have found the stack pointer adjust. */
4170 /* Fall through to process the extracted SET and DEST
4171 as if it was a standalone insn. */
4173 else if (GET_CODE (pat
) == SET
)
4175 else if ((set
= single_set (insn
)) != NULL
)
4177 else if (GET_CODE (pat
) == PARALLEL
)
4179 /* ??? Some older ports use a parallel with a stack adjust
4180 and a store for a PUSH_ROUNDING pattern, rather than a
4181 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4182 /* ??? See h8300 and m68k, pushqi1. */
4183 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4185 set
= XVECEXP (pat
, 0, i
);
4186 if (GET_CODE (set
) != SET
)
4188 dest
= SET_DEST (set
);
4189 if (dest
== stack_pointer_rtx
)
4192 /* We do not expect an auto-inc of the sp in the parallel. */
4193 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4194 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4195 != stack_pointer_rtx
);
4203 dest
= SET_DEST (set
);
4205 /* Look for direct modifications of the stack pointer. */
4206 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4208 /* Look for a trivial adjustment, otherwise assume nothing. */
4209 /* Note that the SPU restore_stack_block pattern refers to
4210 the stack pointer in V4SImode. Consider that non-trivial. */
4212 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4213 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4215 /* ??? Reload can generate no-op moves, which will be cleaned
4216 up later. Recognize it and continue searching. */
4217 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4220 return HOST_WIDE_INT_MIN
;
4226 /* Otherwise only think about autoinc patterns. */
4227 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4230 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4231 != stack_pointer_rtx
);
4233 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4234 mem
= SET_SRC (set
);
4238 addr
= XEXP (mem
, 0);
4239 switch (GET_CODE (addr
))
4243 return GET_MODE_SIZE (GET_MODE (mem
));
4246 return -GET_MODE_SIZE (GET_MODE (mem
));
4249 addr
= XEXP (addr
, 1);
4250 gcc_assert (GET_CODE (addr
) == PLUS
);
4251 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4252 return rtx_to_poly_int64 (XEXP (addr
, 1));
4260 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4261 poly_int64 end_args_size
)
4263 poly_int64 args_size
= end_args_size
;
4264 bool saw_unknown
= false;
4267 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4269 if (!NONDEBUG_INSN_P (insn
))
4272 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4273 a call argument containing a TLS address that itself requires
4274 a call to __tls_get_addr. The handling of stack_pointer_delta
4275 in emit_single_push_insn is supposed to ensure that any such
4276 notes are already correct. */
4277 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4278 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4280 poly_int64 this_delta
= find_args_size_adjust (insn
);
4281 if (known_eq (this_delta
, 0))
4284 || ACCUMULATE_OUTGOING_ARGS
4285 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4289 gcc_assert (!saw_unknown
);
4290 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4294 add_args_size_note (insn
, args_size
);
4295 if (STACK_GROWS_DOWNWARD
)
4296 this_delta
= -poly_uint64 (this_delta
);
4299 args_size
= HOST_WIDE_INT_MIN
;
4301 args_size
-= this_delta
;
4307 #ifdef PUSH_ROUNDING
4308 /* Emit single push insn. */
4311 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4314 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4316 enum insn_code icode
;
4318 /* If there is push pattern, use it. Otherwise try old way of throwing
4319 MEM representing push operation to move expander. */
4320 icode
= optab_handler (push_optab
, mode
);
4321 if (icode
!= CODE_FOR_nothing
)
4323 class expand_operand ops
[1];
4325 create_input_operand (&ops
[0], x
, mode
);
4326 if (maybe_expand_insn (icode
, 1, ops
))
4329 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4330 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4331 /* If we are to pad downward, adjust the stack pointer first and
4332 then store X into the stack location using an offset. This is
4333 because emit_move_insn does not know how to pad; it does not have
4335 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4337 emit_move_insn (stack_pointer_rtx
,
4338 expand_binop (Pmode
,
4339 STACK_GROWS_DOWNWARD
? sub_optab
4342 gen_int_mode (rounded_size
, Pmode
),
4343 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4345 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4346 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4347 /* We have already decremented the stack pointer, so get the
4349 offset
+= rounded_size
;
4351 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4352 /* We have already incremented the stack pointer, so get the
4354 offset
-= rounded_size
;
4356 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4360 if (STACK_GROWS_DOWNWARD
)
4361 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4362 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4364 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4365 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4367 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4370 dest
= gen_rtx_MEM (mode
, dest_addr
);
4374 set_mem_attributes (dest
, type
, 1);
4376 if (cfun
->tail_call_marked
)
4377 /* Function incoming arguments may overlap with sibling call
4378 outgoing arguments and we cannot allow reordering of reads
4379 from function arguments with stores to outgoing arguments
4380 of sibling calls. */
4381 set_mem_alias_set (dest
, 0);
4383 emit_move_insn (dest
, x
);
4386 /* Emit and annotate a single push insn. */
4389 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4391 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4392 rtx_insn
*prev
= get_last_insn ();
4395 emit_single_push_insn_1 (mode
, x
, type
);
4397 /* Adjust stack_pointer_delta to describe the situation after the push
4398 we just performed. Note that we must do this after the push rather
4399 than before the push in case calculating X needs pushes and pops of
4400 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4401 for such pushes and pops must not include the effect of the future
4403 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4405 last
= get_last_insn ();
4407 /* Notice the common case where we emitted exactly one insn. */
4408 if (PREV_INSN (last
) == prev
)
4410 add_args_size_note (last
, stack_pointer_delta
);
4414 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4415 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4416 || known_eq (delta
, old_delta
));
4420 /* If reading SIZE bytes from X will end up reading from
4421 Y return the number of bytes that overlap. Return -1
4422 if there is no overlap or -2 if we can't determine
4423 (for example when X and Y have different base registers). */
4426 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4428 rtx tmp
= plus_constant (Pmode
, x
, size
);
4429 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4431 if (!CONST_INT_P (sub
))
4434 HOST_WIDE_INT val
= INTVAL (sub
);
4436 return IN_RANGE (val
, 1, size
) ? val
: -1;
4439 /* Generate code to push X onto the stack, assuming it has mode MODE and
4441 MODE is redundant except when X is a CONST_INT (since they don't
4443 SIZE is an rtx for the size of data to be copied (in bytes),
4444 needed only if X is BLKmode.
4445 Return true if successful. May return false if asked to push a
4446 partial argument during a sibcall optimization (as specified by
4447 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4450 ALIGN (in bits) is maximum alignment we can assume.
4452 If PARTIAL and REG are both nonzero, then copy that many of the first
4453 bytes of X into registers starting with REG, and push the rest of X.
4454 The amount of space pushed is decreased by PARTIAL bytes.
4455 REG must be a hard register in this case.
4456 If REG is zero but PARTIAL is not, take any all others actions for an
4457 argument partially in registers, but do not actually load any
4460 EXTRA is the amount in bytes of extra space to leave next to this arg.
4461 This is ignored if an argument block has already been allocated.
4463 On a machine that lacks real push insns, ARGS_ADDR is the address of
4464 the bottom of the argument block for this call. We use indexing off there
4465 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4466 argument block has not been preallocated.
4468 ARGS_SO_FAR is the size of args previously pushed for this call.
4470 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4471 for arguments passed in registers. If nonzero, it will be the number
4472 of bytes required. */
4475 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4476 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4477 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4478 rtx alignment_pad
, bool sibcall_p
)
4481 pad_direction stack_direction
4482 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4484 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4485 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4486 Default is below for small data on big-endian machines; else above. */
4487 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4489 /* Invert direction if stack is post-decrement.
4491 if (STACK_PUSH_CODE
== POST_DEC
)
4492 if (where_pad
!= PAD_NONE
)
4493 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4497 int nregs
= partial
/ UNITS_PER_WORD
;
4498 rtx
*tmp_regs
= NULL
;
4499 int overlapping
= 0;
4502 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4504 /* Copy a block into the stack, entirely or partially. */
4511 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4512 used
= partial
- offset
;
4514 if (mode
!= BLKmode
)
4516 /* A value is to be stored in an insufficiently aligned
4517 stack slot; copy via a suitably aligned slot if
4519 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4520 if (!MEM_P (xinner
))
4522 temp
= assign_temp (type
, 1, 1);
4523 emit_move_insn (temp
, xinner
);
4530 /* USED is now the # of bytes we need not copy to the stack
4531 because registers will take care of them. */
4534 xinner
= adjust_address (xinner
, BLKmode
, used
);
4536 /* If the partial register-part of the arg counts in its stack size,
4537 skip the part of stack space corresponding to the registers.
4538 Otherwise, start copying to the beginning of the stack space,
4539 by setting SKIP to 0. */
4540 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4542 #ifdef PUSH_ROUNDING
4543 /* Do it with several push insns if that doesn't take lots of insns
4544 and if there is no difficulty with push insns that skip bytes
4545 on the stack for alignment purposes. */
4548 && CONST_INT_P (size
)
4550 && MEM_ALIGN (xinner
) >= align
4551 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4552 /* Here we avoid the case of a structure whose weak alignment
4553 forces many pushes of a small amount of data,
4554 and such small pushes do rounding that causes trouble. */
4555 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4556 || align
>= BIGGEST_ALIGNMENT
4557 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4558 align
/ BITS_PER_UNIT
))
4559 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4561 /* Push padding now if padding above and stack grows down,
4562 or if padding below and stack grows up.
4563 But if space already allocated, this has already been done. */
4564 if (maybe_ne (extra
, 0)
4566 && where_pad
!= PAD_NONE
4567 && where_pad
!= stack_direction
)
4568 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4570 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4574 #endif /* PUSH_ROUNDING */
4578 /* Otherwise make space on the stack and copy the data
4579 to the address of that space. */
4581 /* Deduct words put into registers from the size we must copy. */
4584 if (CONST_INT_P (size
))
4585 size
= GEN_INT (INTVAL (size
) - used
);
4587 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4588 gen_int_mode (used
, GET_MODE (size
)),
4589 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4592 /* Get the address of the stack space.
4593 In this case, we do not deal with EXTRA separately.
4594 A single stack adjust will do. */
4595 poly_int64 const_args_so_far
;
4598 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4601 else if (poly_int_rtx_p (args_so_far
, &const_args_so_far
))
4602 temp
= memory_address (BLKmode
,
4603 plus_constant (Pmode
, args_addr
,
4604 skip
+ const_args_so_far
));
4606 temp
= memory_address (BLKmode
,
4607 plus_constant (Pmode
,
4608 gen_rtx_PLUS (Pmode
,
4613 if (!ACCUMULATE_OUTGOING_ARGS
)
4615 /* If the source is referenced relative to the stack pointer,
4616 copy it to another register to stabilize it. We do not need
4617 to do this if we know that we won't be changing sp. */
4619 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4620 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4621 temp
= copy_to_reg (temp
);
4624 target
= gen_rtx_MEM (BLKmode
, temp
);
4626 /* We do *not* set_mem_attributes here, because incoming arguments
4627 may overlap with sibling call outgoing arguments and we cannot
4628 allow reordering of reads from function arguments with stores
4629 to outgoing arguments of sibling calls. We do, however, want
4630 to record the alignment of the stack slot. */
4631 /* ALIGN may well be better aligned than TYPE, e.g. due to
4632 PARM_BOUNDARY. Assume the caller isn't lying. */
4633 set_mem_align (target
, align
);
4635 /* If part should go in registers and pushing to that part would
4636 overwrite some of the values that need to go into regs, load the
4637 overlapping values into temporary pseudos to be moved into the hard
4638 regs at the end after the stack pushing has completed.
4639 We cannot load them directly into the hard regs here because
4640 they can be clobbered by the block move expansions.
4643 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4644 && GET_CODE (reg
) != PARALLEL
)
4646 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4647 if (overlapping
> 0)
4649 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4650 overlapping
/= UNITS_PER_WORD
;
4652 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4654 for (int i
= 0; i
< overlapping
; i
++)
4655 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4657 for (int i
= 0; i
< overlapping
; i
++)
4658 emit_move_insn (tmp_regs
[i
],
4659 operand_subword_force (target
, i
, mode
));
4661 else if (overlapping
== -1)
4663 /* Could not determine whether there is overlap.
4664 Fail the sibcall. */
4672 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4675 else if (partial
> 0)
4677 /* Scalar partly in registers. This case is only supported
4678 for fixed-wdth modes. */
4679 int num_words
= GET_MODE_SIZE (mode
).to_constant ();
4680 num_words
/= UNITS_PER_WORD
;
4683 /* # bytes of start of argument
4684 that we must make space for but need not store. */
4685 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4686 int args_offset
= INTVAL (args_so_far
);
4689 /* Push padding now if padding above and stack grows down,
4690 or if padding below and stack grows up.
4691 But if space already allocated, this has already been done. */
4692 if (maybe_ne (extra
, 0)
4694 && where_pad
!= PAD_NONE
4695 && where_pad
!= stack_direction
)
4696 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4698 /* If we make space by pushing it, we might as well push
4699 the real data. Otherwise, we can leave OFFSET nonzero
4700 and leave the space uninitialized. */
4704 /* Now NOT_STACK gets the number of words that we don't need to
4705 allocate on the stack. Convert OFFSET to words too. */
4706 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4707 offset
/= UNITS_PER_WORD
;
4709 /* If the partial register-part of the arg counts in its stack size,
4710 skip the part of stack space corresponding to the registers.
4711 Otherwise, start copying to the beginning of the stack space,
4712 by setting SKIP to 0. */
4713 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4715 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4716 x
= validize_mem (force_const_mem (mode
, x
));
4718 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4719 SUBREGs of such registers are not allowed. */
4720 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4721 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4722 x
= copy_to_reg (x
);
4724 /* Loop over all the words allocated on the stack for this arg. */
4725 /* We can do it by words, because any scalar bigger than a word
4726 has a size a multiple of a word. */
4727 for (i
= num_words
- 1; i
>= not_stack
; i
--)
4728 if (i
>= not_stack
+ offset
)
4729 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4730 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4732 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4734 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4742 /* Push padding now if padding above and stack grows down,
4743 or if padding below and stack grows up.
4744 But if space already allocated, this has already been done. */
4745 if (maybe_ne (extra
, 0)
4747 && where_pad
!= PAD_NONE
4748 && where_pad
!= stack_direction
)
4749 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4751 #ifdef PUSH_ROUNDING
4752 if (args_addr
== 0 && PUSH_ARGS
)
4753 emit_single_push_insn (mode
, x
, type
);
4757 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4758 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4760 /* We do *not* set_mem_attributes here, because incoming arguments
4761 may overlap with sibling call outgoing arguments and we cannot
4762 allow reordering of reads from function arguments with stores
4763 to outgoing arguments of sibling calls. We do, however, want
4764 to record the alignment of the stack slot. */
4765 /* ALIGN may well be better aligned than TYPE, e.g. due to
4766 PARM_BOUNDARY. Assume the caller isn't lying. */
4767 set_mem_align (dest
, align
);
4769 emit_move_insn (dest
, x
);
4773 /* Move the partial arguments into the registers and any overlapping
4774 values that we moved into the pseudos in tmp_regs. */
4775 if (partial
> 0 && reg
!= 0)
4777 /* Handle calls that pass values in multiple non-contiguous locations.
4778 The Irix 6 ABI has examples of this. */
4779 if (GET_CODE (reg
) == PARALLEL
)
4780 emit_group_load (reg
, x
, type
, -1);
4783 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4784 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4786 for (int i
= 0; i
< overlapping
; i
++)
4787 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4788 + nregs
- overlapping
+ i
),
4794 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4795 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4797 if (alignment_pad
&& args_addr
== 0)
4798 anti_adjust_stack (alignment_pad
);
4803 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4807 get_subtarget (rtx x
)
4811 /* Only registers can be subtargets. */
4813 /* Don't use hard regs to avoid extending their life. */
4814 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4818 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4819 FIELD is a bitfield. Returns true if the optimization was successful,
4820 and there's nothing else to do. */
4823 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4824 poly_uint64 pbitpos
,
4825 poly_uint64 pbitregion_start
,
4826 poly_uint64 pbitregion_end
,
4827 machine_mode mode1
, rtx str_rtx
,
4828 tree to
, tree src
, bool reverse
)
4830 /* str_mode is not guaranteed to be a scalar type. */
4831 machine_mode str_mode
= GET_MODE (str_rtx
);
4832 unsigned int str_bitsize
;
4837 enum tree_code code
;
4839 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4840 if (mode1
!= VOIDmode
4841 || !pbitsize
.is_constant (&bitsize
)
4842 || !pbitpos
.is_constant (&bitpos
)
4843 || !pbitregion_start
.is_constant (&bitregion_start
)
4844 || !pbitregion_end
.is_constant (&bitregion_end
)
4845 || bitsize
>= BITS_PER_WORD
4846 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4847 || str_bitsize
> BITS_PER_WORD
4848 || TREE_SIDE_EFFECTS (to
)
4849 || TREE_THIS_VOLATILE (to
))
4853 if (TREE_CODE (src
) != SSA_NAME
)
4855 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4858 srcstmt
= get_gimple_for_ssa_name (src
);
4860 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4863 code
= gimple_assign_rhs_code (srcstmt
);
4865 op0
= gimple_assign_rhs1 (srcstmt
);
4867 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4868 to find its initialization. Hopefully the initialization will
4869 be from a bitfield load. */
4870 if (TREE_CODE (op0
) == SSA_NAME
)
4872 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4874 /* We want to eventually have OP0 be the same as TO, which
4875 should be a bitfield. */
4877 || !is_gimple_assign (op0stmt
)
4878 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4880 op0
= gimple_assign_rhs1 (op0stmt
);
4883 op1
= gimple_assign_rhs2 (srcstmt
);
4885 if (!operand_equal_p (to
, op0
, 0))
4888 if (MEM_P (str_rtx
))
4890 unsigned HOST_WIDE_INT offset1
;
4892 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4893 str_bitsize
= BITS_PER_WORD
;
4895 scalar_int_mode best_mode
;
4896 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4897 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4899 str_mode
= best_mode
;
4900 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4903 bitpos
%= str_bitsize
;
4904 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4905 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4907 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4910 /* If the bit field covers the whole REG/MEM, store_field
4911 will likely generate better code. */
4912 if (bitsize
>= str_bitsize
)
4915 /* We can't handle fields split across multiple entities. */
4916 if (bitpos
+ bitsize
> str_bitsize
)
4919 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4920 bitpos
= str_bitsize
- bitpos
- bitsize
;
4926 /* For now, just optimize the case of the topmost bitfield
4927 where we don't need to do any masking and also
4928 1 bit bitfields where xor can be used.
4929 We might win by one instruction for the other bitfields
4930 too if insv/extv instructions aren't used, so that
4931 can be added later. */
4932 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4933 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4936 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4937 value
= convert_modes (str_mode
,
4938 TYPE_MODE (TREE_TYPE (op1
)), value
,
4939 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4941 /* We may be accessing data outside the field, which means
4942 we can alias adjacent data. */
4943 if (MEM_P (str_rtx
))
4945 str_rtx
= shallow_copy_rtx (str_rtx
);
4946 set_mem_alias_set (str_rtx
, 0);
4947 set_mem_expr (str_rtx
, 0);
4950 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4952 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4956 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4958 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4960 value
= flip_storage_order (str_mode
, value
);
4961 result
= expand_binop (str_mode
, binop
, str_rtx
,
4962 value
, str_rtx
, 1, OPTAB_WIDEN
);
4963 if (result
!= str_rtx
)
4964 emit_move_insn (str_rtx
, result
);
4969 if (TREE_CODE (op1
) != INTEGER_CST
)
4971 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4972 value
= convert_modes (str_mode
,
4973 TYPE_MODE (TREE_TYPE (op1
)), value
,
4974 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4976 /* We may be accessing data outside the field, which means
4977 we can alias adjacent data. */
4978 if (MEM_P (str_rtx
))
4980 str_rtx
= shallow_copy_rtx (str_rtx
);
4981 set_mem_alias_set (str_rtx
, 0);
4982 set_mem_expr (str_rtx
, 0);
4985 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4986 if (bitpos
+ bitsize
!= str_bitsize
)
4988 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4990 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4992 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4994 value
= flip_storage_order (str_mode
, value
);
4995 result
= expand_binop (str_mode
, binop
, str_rtx
,
4996 value
, str_rtx
, 1, OPTAB_WIDEN
);
4997 if (result
!= str_rtx
)
4998 emit_move_insn (str_rtx
, result
);
5008 /* In the C++ memory model, consecutive bit fields in a structure are
5009 considered one memory location.
5011 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
5012 returns the bit range of consecutive bits in which this COMPONENT_REF
5013 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
5014 and *OFFSET may be adjusted in the process.
5016 If the access does not need to be restricted, 0 is returned in both
5017 *BITSTART and *BITEND. */
5020 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
5021 poly_int64_pod
*bitpos
, tree
*offset
)
5023 poly_int64 bitoffset
;
5026 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
5028 field
= TREE_OPERAND (exp
, 1);
5029 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
5030 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
5031 need to limit the range we can access. */
5034 *bitstart
= *bitend
= 0;
5038 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
5039 part of a larger bit field, then the representative does not serve any
5040 useful purpose. This can occur in Ada. */
5041 if (handled_component_p (TREE_OPERAND (exp
, 0)))
5044 poly_int64 rbitsize
, rbitpos
;
5046 int unsignedp
, reversep
, volatilep
= 0;
5047 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
5048 &roffset
, &rmode
, &unsignedp
, &reversep
,
5050 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
5052 *bitstart
= *bitend
= 0;
5057 /* Compute the adjustment to bitpos from the offset of the field
5058 relative to the representative. DECL_FIELD_OFFSET of field and
5059 repr are the same by construction if they are not constants,
5060 see finish_bitfield_layout. */
5061 poly_uint64 field_offset
, repr_offset
;
5062 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
5063 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
5064 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
5067 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
5068 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
5070 /* If the adjustment is larger than bitpos, we would have a negative bit
5071 position for the lower bound and this may wreak havoc later. Adjust
5072 offset and bitpos to make the lower bound non-negative in that case. */
5073 if (maybe_gt (bitoffset
, *bitpos
))
5075 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
5076 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
5078 *bitpos
+= adjust_bits
;
5079 if (*offset
== NULL_TREE
)
5080 *offset
= size_int (-adjust_bytes
);
5082 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
5086 *bitstart
= *bitpos
- bitoffset
;
5088 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
5091 /* Returns true if BASE is a DECL that does not reside in memory and
5092 has non-BLKmode. DECL_RTL must not be a MEM; if
5093 DECL_RTL was not set yet, return false. */
5096 non_mem_decl_p (tree base
)
5099 || TREE_ADDRESSABLE (base
)
5100 || DECL_MODE (base
) == BLKmode
)
5103 if (!DECL_RTL_SET_P (base
))
5106 return (!MEM_P (DECL_RTL (base
)));
5109 /* Returns true if REF refers to an object that does not
5110 reside in memory and has non-BLKmode. */
5113 mem_ref_refers_to_non_mem_p (tree ref
)
5117 if (TREE_CODE (ref
) == MEM_REF
5118 || TREE_CODE (ref
) == TARGET_MEM_REF
)
5120 tree addr
= TREE_OPERAND (ref
, 0);
5122 if (TREE_CODE (addr
) != ADDR_EXPR
)
5125 base
= TREE_OPERAND (addr
, 0);
5130 return non_mem_decl_p (base
);
5133 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
5134 is true, try generating a nontemporal store. */
5137 expand_assignment (tree to
, tree from
, bool nontemporal
)
5143 enum insn_code icode
;
5145 /* Don't crash if the lhs of the assignment was erroneous. */
5146 if (TREE_CODE (to
) == ERROR_MARK
)
5148 expand_normal (from
);
5152 /* Optimize away no-op moves without side-effects. */
5153 if (operand_equal_p (to
, from
, 0))
5156 /* Handle misaligned stores. */
5157 mode
= TYPE_MODE (TREE_TYPE (to
));
5158 if ((TREE_CODE (to
) == MEM_REF
5159 || TREE_CODE (to
) == TARGET_MEM_REF
5162 && !mem_ref_refers_to_non_mem_p (to
)
5163 && ((align
= get_object_alignment (to
))
5164 < GET_MODE_ALIGNMENT (mode
))
5165 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5166 != CODE_FOR_nothing
)
5167 || targetm
.slow_unaligned_access (mode
, align
)))
5171 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5172 /* Handle PARALLEL. */
5173 reg
= maybe_emit_group_store (reg
, TREE_TYPE (from
));
5174 reg
= force_not_mem (reg
);
5175 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5176 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5177 reg
= flip_storage_order (mode
, reg
);
5179 if (icode
!= CODE_FOR_nothing
)
5181 class expand_operand ops
[2];
5183 create_fixed_operand (&ops
[0], mem
);
5184 create_input_operand (&ops
[1], reg
, mode
);
5185 /* The movmisalign<mode> pattern cannot fail, else the assignment
5186 would silently be omitted. */
5187 expand_insn (icode
, 2, ops
);
5190 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5195 /* Assignment of a structure component needs special treatment
5196 if the structure component's rtx is not simply a MEM.
5197 Assignment of an array element at a constant index, and assignment of
5198 an array element in an unaligned packed structure field, has the same
5199 problem. Same for (partially) storing into a non-memory object. */
5200 if (handled_component_p (to
)
5201 || (TREE_CODE (to
) == MEM_REF
5202 && (REF_REVERSE_STORAGE_ORDER (to
)
5203 || mem_ref_refers_to_non_mem_p (to
)))
5204 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5207 poly_int64 bitsize
, bitpos
;
5208 poly_uint64 bitregion_start
= 0;
5209 poly_uint64 bitregion_end
= 0;
5211 int unsignedp
, reversep
, volatilep
= 0;
5215 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5216 &unsignedp
, &reversep
, &volatilep
);
5218 /* Make sure bitpos is not negative, it can wreak havoc later. */
5219 if (maybe_lt (bitpos
, 0))
5221 gcc_assert (offset
== NULL_TREE
);
5222 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5223 bitpos
= num_trailing_bits (bitpos
);
5226 if (TREE_CODE (to
) == COMPONENT_REF
5227 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5228 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5229 /* The C++ memory model naturally applies to byte-aligned fields.
5230 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5231 BITSIZE are not byte-aligned, there is no need to limit the range
5232 we can access. This can occur with packed structures in Ada. */
5233 else if (maybe_gt (bitsize
, 0)
5234 && multiple_p (bitsize
, BITS_PER_UNIT
)
5235 && multiple_p (bitpos
, BITS_PER_UNIT
))
5237 bitregion_start
= bitpos
;
5238 bitregion_end
= bitpos
+ bitsize
- 1;
5241 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5243 /* If the field has a mode, we want to access it in the
5244 field's mode, not the computed mode.
5245 If a MEM has VOIDmode (external with incomplete type),
5246 use BLKmode for it instead. */
5249 if (mode1
!= VOIDmode
)
5250 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5251 else if (GET_MODE (to_rtx
) == VOIDmode
)
5252 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5257 machine_mode address_mode
;
5260 if (!MEM_P (to_rtx
))
5262 /* We can get constant negative offsets into arrays with broken
5263 user code. Translate this to a trap instead of ICEing. */
5264 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5265 expand_builtin_trap ();
5266 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5269 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5270 address_mode
= get_address_mode (to_rtx
);
5271 if (GET_MODE (offset_rtx
) != address_mode
)
5273 /* We cannot be sure that the RTL in offset_rtx is valid outside
5274 of a memory address context, so force it into a register
5275 before attempting to convert it to the desired mode. */
5276 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5277 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5280 /* If we have an expression in OFFSET_RTX and a non-zero
5281 byte offset in BITPOS, adding the byte offset before the
5282 OFFSET_RTX results in better intermediate code, which makes
5283 later rtl optimization passes perform better.
5285 We prefer intermediate code like this:
5287 r124:DI=r123:DI+0x18
5292 r124:DI=r123:DI+0x10
5293 [r124:DI+0x8]=r121:DI
5295 This is only done for aligned data values, as these can
5296 be expected to result in single move instructions. */
5298 if (mode1
!= VOIDmode
5299 && maybe_ne (bitpos
, 0)
5300 && maybe_gt (bitsize
, 0)
5301 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5302 && multiple_p (bitpos
, bitsize
)
5303 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5304 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5306 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5307 bitregion_start
= 0;
5308 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5309 bitregion_end
-= bitpos
;
5313 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5314 highest_pow2_factor_for_target (to
,
5318 /* No action is needed if the target is not a memory and the field
5319 lies completely outside that target. This can occur if the source
5320 code contains an out-of-bounds access to a small array. */
5322 && GET_MODE (to_rtx
) != BLKmode
5323 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5325 expand_normal (from
);
5328 /* Handle expand_expr of a complex value returning a CONCAT. */
5329 else if (GET_CODE (to_rtx
) == CONCAT
)
5331 machine_mode to_mode
= GET_MODE (to_rtx
);
5332 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5333 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5334 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5335 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5336 && known_eq (bitpos
, 0)
5337 && known_eq (bitsize
, mode_bitsize
))
5338 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5339 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5340 && known_eq (bitsize
, inner_bitsize
)
5341 && (known_eq (bitpos
, 0)
5342 || known_eq (bitpos
, inner_bitsize
)))
5343 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5344 false, nontemporal
, reversep
);
5345 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5346 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5347 bitregion_start
, bitregion_end
,
5348 mode1
, from
, get_alias_set (to
),
5349 nontemporal
, reversep
);
5350 else if (known_ge (bitpos
, inner_bitsize
))
5351 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5352 bitpos
- inner_bitsize
,
5353 bitregion_start
, bitregion_end
,
5354 mode1
, from
, get_alias_set (to
),
5355 nontemporal
, reversep
);
5356 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5358 result
= expand_normal (from
);
5359 if (GET_CODE (result
) == CONCAT
)
5361 to_mode
= GET_MODE_INNER (to_mode
);
5362 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5364 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5367 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5369 if (!from_real
|| !from_imag
)
5370 goto concat_store_slow
;
5371 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5372 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5376 machine_mode from_mode
5377 = GET_MODE (result
) == VOIDmode
5378 ? TYPE_MODE (TREE_TYPE (from
))
5379 : GET_MODE (result
);
5382 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
5385 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5388 emit_move_insn (XEXP (to_rtx
, 0),
5389 read_complex_part (from_rtx
, false));
5390 emit_move_insn (XEXP (to_rtx
, 1),
5391 read_complex_part (from_rtx
, true));
5395 to_mode
= GET_MODE_INNER (to_mode
);
5397 = simplify_gen_subreg (to_mode
, result
, from_mode
, 0);
5399 = simplify_gen_subreg (to_mode
, result
, from_mode
,
5400 GET_MODE_SIZE (to_mode
));
5401 if (!from_real
|| !from_imag
)
5402 goto concat_store_slow
;
5403 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5404 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5411 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5412 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5413 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5414 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5415 result
= store_field (temp
, bitsize
, bitpos
,
5416 bitregion_start
, bitregion_end
,
5417 mode1
, from
, get_alias_set (to
),
5418 nontemporal
, reversep
);
5419 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5420 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5423 /* For calls to functions returning variable length structures, if TO_RTX
5424 is not a MEM, go through a MEM because we must not create temporaries
5426 else if (!MEM_P (to_rtx
)
5427 && TREE_CODE (from
) == CALL_EXPR
5428 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5429 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5431 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5432 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5433 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5434 bitregion_end
, mode1
, from
, get_alias_set (to
),
5435 nontemporal
, reversep
);
5436 emit_move_insn (to_rtx
, temp
);
5442 /* If the field is at offset zero, we could have been given the
5443 DECL_RTX of the parent struct. Don't munge it. */
5444 to_rtx
= shallow_copy_rtx (to_rtx
);
5445 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5447 MEM_VOLATILE_P (to_rtx
) = 1;
5450 gcc_checking_assert (known_ge (bitpos
, 0));
5451 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5452 bitregion_start
, bitregion_end
,
5453 mode1
, to_rtx
, to
, from
,
5456 else if (SUBREG_P (to_rtx
)
5457 && SUBREG_PROMOTED_VAR_P (to_rtx
))
5459 /* If to_rtx is a promoted subreg, we need to zero or sign
5460 extend the value afterwards. */
5461 if (TREE_CODE (to
) == MEM_REF
5462 && TYPE_MODE (TREE_TYPE (from
)) != BLKmode
5463 && !REF_REVERSE_STORAGE_ORDER (to
)
5464 && known_eq (bitpos
, 0)
5465 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (to_rtx
))))
5466 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5470 = lowpart_subreg (subreg_unpromoted_mode (to_rtx
),
5471 SUBREG_REG (to_rtx
),
5472 subreg_promoted_mode (to_rtx
));
5473 result
= store_field (to_rtx1
, bitsize
, bitpos
,
5474 bitregion_start
, bitregion_end
,
5475 mode1
, from
, get_alias_set (to
),
5476 nontemporal
, reversep
);
5477 convert_move (SUBREG_REG (to_rtx
), to_rtx1
,
5478 SUBREG_PROMOTED_SIGN (to_rtx
));
5482 result
= store_field (to_rtx
, bitsize
, bitpos
,
5483 bitregion_start
, bitregion_end
,
5484 mode1
, from
, get_alias_set (to
),
5485 nontemporal
, reversep
);
5489 preserve_temp_slots (result
);
5494 /* If the rhs is a function call and its value is not an aggregate,
5495 call the function before we start to compute the lhs.
5496 This is needed for correct code for cases such as
5497 val = setjmp (buf) on machines where reference to val
5498 requires loading up part of an address in a separate insn.
5500 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5501 since it might be a promoted variable where the zero- or sign- extension
5502 needs to be done. Handling this in the normal way is safe because no
5503 computation is done before the call. The same is true for SSA names. */
5504 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5505 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5506 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5508 || TREE_CODE (to
) == PARM_DECL
5509 || TREE_CODE (to
) == RESULT_DECL
)
5510 && REG_P (DECL_RTL (to
)))
5511 || TREE_CODE (to
) == SSA_NAME
))
5516 value
= expand_normal (from
);
5519 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5521 /* Handle calls that return values in multiple non-contiguous locations.
5522 The Irix 6 ABI has examples of this. */
5523 if (GET_CODE (to_rtx
) == PARALLEL
)
5525 if (GET_CODE (value
) == PARALLEL
)
5526 emit_group_move (to_rtx
, value
);
5528 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5529 int_size_in_bytes (TREE_TYPE (from
)));
5531 else if (GET_CODE (value
) == PARALLEL
)
5532 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5533 int_size_in_bytes (TREE_TYPE (from
)));
5534 else if (GET_MODE (to_rtx
) == BLKmode
)
5536 /* Handle calls that return BLKmode values in registers. */
5538 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5540 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5544 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5545 value
= convert_memory_address_addr_space
5546 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5547 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5549 emit_move_insn (to_rtx
, value
);
5552 preserve_temp_slots (to_rtx
);
5557 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5558 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5560 /* Don't move directly into a return register. */
5561 if (TREE_CODE (to
) == RESULT_DECL
5562 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5568 /* If the source is itself a return value, it still is in a pseudo at
5569 this point so we can move it back to the return register directly. */
5571 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5572 && TREE_CODE (from
) != CALL_EXPR
)
5573 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5575 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5577 /* Handle calls that return values in multiple non-contiguous locations.
5578 The Irix 6 ABI has examples of this. */
5579 if (GET_CODE (to_rtx
) == PARALLEL
)
5581 if (GET_CODE (temp
) == PARALLEL
)
5582 emit_group_move (to_rtx
, temp
);
5584 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5585 int_size_in_bytes (TREE_TYPE (from
)));
5588 emit_move_insn (to_rtx
, temp
);
5590 preserve_temp_slots (to_rtx
);
5595 /* In case we are returning the contents of an object which overlaps
5596 the place the value is being stored, use a safe function when copying
5597 a value through a pointer into a structure value return block. */
5598 if (TREE_CODE (to
) == RESULT_DECL
5599 && TREE_CODE (from
) == INDIRECT_REF
5600 && ADDR_SPACE_GENERIC_P
5601 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5602 && refs_may_alias_p (to
, from
)
5603 && cfun
->returns_struct
5604 && !cfun
->returns_pcc_struct
)
5609 size
= expr_size (from
);
5610 from_rtx
= expand_normal (from
);
5612 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5614 preserve_temp_slots (to_rtx
);
5619 /* Compute FROM and store the value in the rtx we got. */
5622 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5623 preserve_temp_slots (result
);
5628 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5629 succeeded, false otherwise. */
5632 emit_storent_insn (rtx to
, rtx from
)
5634 class expand_operand ops
[2];
5635 machine_mode mode
= GET_MODE (to
);
5636 enum insn_code code
= optab_handler (storent_optab
, mode
);
5638 if (code
== CODE_FOR_nothing
)
5641 create_fixed_operand (&ops
[0], to
);
5642 create_input_operand (&ops
[1], from
, mode
);
5643 return maybe_expand_insn (code
, 2, ops
);
5646 /* Helper function for store_expr storing of STRING_CST. */
5649 string_cst_read_str (void *data
, HOST_WIDE_INT offset
, scalar_int_mode mode
)
5651 tree str
= (tree
) data
;
5653 gcc_assert (offset
>= 0);
5654 if (offset
>= TREE_STRING_LENGTH (str
))
5657 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
5658 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
5660 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
5661 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
5662 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
5663 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
5664 return c_readstr (p
, mode
, false);
5667 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
5670 /* Generate code for computing expression EXP,
5671 and storing the value into TARGET.
5673 If the mode is BLKmode then we may return TARGET itself.
5674 It turns out that in BLKmode it doesn't cause a problem.
5675 because C has no operators that could combine two different
5676 assignments into the same BLKmode object with different values
5677 with no sequence point. Will other languages need this to
5680 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5681 stack, and block moves may need to be treated specially.
5683 If NONTEMPORAL is true, try using a nontemporal store instruction.
5685 If REVERSE is true, the store is to be done in reverse order. */
5688 store_expr (tree exp
, rtx target
, int call_param_p
,
5689 bool nontemporal
, bool reverse
)
5692 rtx alt_rtl
= NULL_RTX
;
5693 location_t loc
= curr_insn_location ();
5694 bool shortened_string_cst
= false;
5696 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5698 /* C++ can generate ?: expressions with a throw expression in one
5699 branch and an rvalue in the other. Here, we resolve attempts to
5700 store the throw expression's nonexistent result. */
5701 gcc_assert (!call_param_p
);
5702 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5705 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5707 /* Perform first part of compound expression, then assign from second
5709 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5710 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5711 return store_expr (TREE_OPERAND (exp
, 1), target
,
5712 call_param_p
, nontemporal
, reverse
);
5714 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5716 /* For conditional expression, get safe form of the target. Then
5717 test the condition, doing the appropriate assignment on either
5718 side. This avoids the creation of unnecessary temporaries.
5719 For non-BLKmode, it is more efficient not to do this. */
5721 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5723 do_pending_stack_adjust ();
5725 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5726 profile_probability::uninitialized ());
5727 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5728 nontemporal
, reverse
);
5729 emit_jump_insn (targetm
.gen_jump (lab2
));
5732 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5733 nontemporal
, reverse
);
5739 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5740 /* If this is a scalar in a register that is stored in a wider mode
5741 than the declared mode, compute the result into its declared mode
5742 and then convert to the wider mode. Our value is the computed
5745 rtx inner_target
= 0;
5746 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5747 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5749 /* We can do the conversion inside EXP, which will often result
5750 in some optimizations. Do the conversion in two steps: first
5751 change the signedness, if needed, then the extend. But don't
5752 do this if the type of EXP is a subtype of something else
5753 since then the conversion might involve more than just
5754 converting modes. */
5755 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5756 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5757 && GET_MODE_PRECISION (outer_mode
)
5758 == TYPE_PRECISION (TREE_TYPE (exp
)))
5760 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5761 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5763 /* Some types, e.g. Fortran's logical*4, won't have a signed
5764 version, so use the mode instead. */
5766 = (signed_or_unsigned_type_for
5767 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5769 ntype
= lang_hooks
.types
.type_for_mode
5770 (TYPE_MODE (TREE_TYPE (exp
)),
5771 SUBREG_PROMOTED_SIGN (target
));
5773 exp
= fold_convert_loc (loc
, ntype
, exp
);
5776 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5777 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5780 inner_target
= SUBREG_REG (target
);
5783 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5784 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5787 /* If TEMP is a VOIDmode constant, use convert_modes to make
5788 sure that we properly convert it. */
5789 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5791 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5792 temp
, SUBREG_PROMOTED_SIGN (target
));
5793 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5794 SUBREG_PROMOTED_SIGN (target
));
5797 convert_move (SUBREG_REG (target
), temp
,
5798 SUBREG_PROMOTED_SIGN (target
));
5802 else if ((TREE_CODE (exp
) == STRING_CST
5803 || (TREE_CODE (exp
) == MEM_REF
5804 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5805 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5807 && integer_zerop (TREE_OPERAND (exp
, 1))))
5808 && !nontemporal
&& !call_param_p
5811 /* Optimize initialization of an array with a STRING_CST. */
5812 HOST_WIDE_INT exp_len
, str_copy_len
;
5814 tree str
= TREE_CODE (exp
) == STRING_CST
5815 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5817 exp_len
= int_expr_size (exp
);
5821 if (TREE_STRING_LENGTH (str
) <= 0)
5824 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
5825 MEM_ALIGN (target
), false))
5827 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
5828 MEM_ALIGN (target
), false, RETURN_BEGIN
);
5832 str_copy_len
= TREE_STRING_LENGTH (str
);
5833 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
5835 str_copy_len
+= STORE_MAX_PIECES
- 1;
5836 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5838 if (str_copy_len
>= exp_len
)
5841 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
5842 (void *) str
, MEM_ALIGN (target
), false))
5845 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
5846 (void *) str
, MEM_ALIGN (target
), false,
5848 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
5849 exp_len
- str_copy_len
),
5850 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
5858 /* If we want to use a nontemporal or a reverse order store, force the
5859 value into a register first. */
5860 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5862 if (TREE_CODE (exp
) == STRING_CST
5863 && tmp_target
== target
5864 && GET_MODE (target
) == BLKmode
5865 && TYPE_MODE (TREE_TYPE (exp
)) == BLKmode
)
5867 rtx size
= expr_size (exp
);
5868 if (CONST_INT_P (size
)
5869 && size
!= const0_rtx
5871 > ((unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (exp
) + 32)))
5873 /* If the STRING_CST has much larger array type than
5874 TREE_STRING_LENGTH, only emit the TREE_STRING_LENGTH part of
5875 it into the rodata section as the code later on will use
5876 memset zero for the remainder anyway. See PR95052. */
5877 tmp_target
= NULL_RTX
;
5878 rexp
= copy_node (exp
);
5880 = build_index_type (size_int (TREE_STRING_LENGTH (exp
) - 1));
5881 TREE_TYPE (rexp
) = build_array_type (TREE_TYPE (TREE_TYPE (exp
)),
5883 shortened_string_cst
= true;
5886 temp
= expand_expr_real (rexp
, tmp_target
, GET_MODE (target
),
5888 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5890 if (shortened_string_cst
)
5892 gcc_assert (MEM_P (temp
));
5893 temp
= change_address (temp
, BLKmode
, NULL_RTX
);
5897 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5898 the same as that of TARGET, adjust the constant. This is needed, for
5899 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5900 only a word-sized value. */
5901 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5902 && TREE_CODE (exp
) != ERROR_MARK
5903 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5905 gcc_assert (!shortened_string_cst
);
5906 if (GET_MODE_CLASS (GET_MODE (target
))
5907 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5908 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5909 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5911 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5912 TYPE_MODE (TREE_TYPE (exp
)), 0);
5916 if (GET_MODE (temp
) == VOIDmode
)
5917 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5918 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5921 /* If value was not generated in the target, store it there.
5922 Convert the value to TARGET's type first if necessary and emit the
5923 pending incrementations that have been queued when expanding EXP.
5924 Note that we cannot emit the whole queue blindly because this will
5925 effectively disable the POST_INC optimization later.
5927 If TEMP and TARGET compare equal according to rtx_equal_p, but
5928 one or both of them are volatile memory refs, we have to distinguish
5930 - expand_expr has used TARGET. In this case, we must not generate
5931 another copy. This can be detected by TARGET being equal according
5933 - expand_expr has not used TARGET - that means that the source just
5934 happens to have the same RTX form. Since temp will have been created
5935 by expand_expr, it will compare unequal according to == .
5936 We must generate a copy in this case, to reach the correct number
5937 of volatile memory references. */
5939 if ((! rtx_equal_p (temp
, target
)
5940 || (temp
!= target
&& (side_effects_p (temp
)
5941 || side_effects_p (target
))))
5942 && TREE_CODE (exp
) != ERROR_MARK
5943 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5944 but TARGET is not valid memory reference, TEMP will differ
5945 from TARGET although it is really the same location. */
5947 && rtx_equal_p (alt_rtl
, target
)
5948 && !side_effects_p (alt_rtl
)
5949 && !side_effects_p (target
))
5950 /* If there's nothing to copy, don't bother. Don't call
5951 expr_size unless necessary, because some front-ends (C++)
5952 expr_size-hook must not be given objects that are not
5953 supposed to be bit-copied or bit-initialized. */
5954 && expr_size (exp
) != const0_rtx
)
5956 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5958 gcc_assert (!shortened_string_cst
);
5959 if (GET_MODE (target
) == BLKmode
)
5961 /* Handle calls that return BLKmode values in registers. */
5962 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5963 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5965 store_bit_field (target
,
5966 rtx_to_poly_int64 (expr_size (exp
))
5968 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5971 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5974 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5976 /* Handle copying a string constant into an array. The string
5977 constant may be shorter than the array. So copy just the string's
5978 actual length, and clear the rest. First get the size of the data
5979 type of the string, which is actually the size of the target. */
5980 rtx size
= expr_size (exp
);
5982 if (CONST_INT_P (size
)
5983 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5984 emit_block_move (target
, temp
, size
,
5986 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5989 machine_mode pointer_mode
5990 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5991 machine_mode address_mode
= get_address_mode (target
);
5993 /* Compute the size of the data to copy from the string. */
5995 = size_binop_loc (loc
, MIN_EXPR
,
5996 make_tree (sizetype
, size
),
5997 size_int (TREE_STRING_LENGTH (exp
)));
5999 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
6001 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
6002 rtx_code_label
*label
= 0;
6004 /* Copy that much. */
6005 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
6006 TYPE_UNSIGNED (sizetype
));
6007 emit_block_move (target
, temp
, copy_size_rtx
,
6009 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6011 /* Figure out how much is left in TARGET that we have to clear.
6012 Do all calculations in pointer_mode. */
6013 poly_int64 const_copy_size
;
6014 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
6016 size
= plus_constant (address_mode
, size
, -const_copy_size
);
6017 target
= adjust_address (target
, BLKmode
, const_copy_size
);
6021 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
6022 copy_size_rtx
, NULL_RTX
, 0,
6025 if (GET_MODE (copy_size_rtx
) != address_mode
)
6026 copy_size_rtx
= convert_to_mode (address_mode
,
6028 TYPE_UNSIGNED (sizetype
));
6030 target
= offset_address (target
, copy_size_rtx
,
6031 highest_pow2_factor (copy_size
));
6032 label
= gen_label_rtx ();
6033 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
6034 GET_MODE (size
), 0, label
);
6037 if (size
!= const0_rtx
)
6038 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
6044 else if (shortened_string_cst
)
6046 /* Handle calls that return values in multiple non-contiguous locations.
6047 The Irix 6 ABI has examples of this. */
6048 else if (GET_CODE (target
) == PARALLEL
)
6050 if (GET_CODE (temp
) == PARALLEL
)
6051 emit_group_move (target
, temp
);
6053 emit_group_load (target
, temp
, TREE_TYPE (exp
),
6054 int_size_in_bytes (TREE_TYPE (exp
)));
6056 else if (GET_CODE (temp
) == PARALLEL
)
6057 emit_group_store (target
, temp
, TREE_TYPE (exp
),
6058 int_size_in_bytes (TREE_TYPE (exp
)));
6059 else if (GET_MODE (temp
) == BLKmode
)
6060 emit_block_move (target
, temp
, expr_size (exp
),
6062 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
6063 /* If we emit a nontemporal store, there is nothing else to do. */
6064 else if (nontemporal
&& emit_storent_insn (target
, temp
))
6069 temp
= flip_storage_order (GET_MODE (target
), temp
);
6070 temp
= force_operand (temp
, target
);
6072 emit_move_insn (target
, temp
);
6076 gcc_assert (!shortened_string_cst
);
6081 /* Return true if field F of structure TYPE is a flexible array. */
6084 flexible_array_member_p (const_tree f
, const_tree type
)
6089 return (DECL_CHAIN (f
) == NULL
6090 && TREE_CODE (tf
) == ARRAY_TYPE
6092 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
6093 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
6094 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
6095 && int_size_in_bytes (type
) >= 0);
6098 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
6099 must have in order for it to completely initialize a value of type TYPE.
6100 Return -1 if the number isn't known.
6102 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
6104 static HOST_WIDE_INT
6105 count_type_elements (const_tree type
, bool for_ctor_p
)
6107 switch (TREE_CODE (type
))
6113 nelts
= array_type_nelts (type
);
6114 if (nelts
&& tree_fits_uhwi_p (nelts
))
6116 unsigned HOST_WIDE_INT n
;
6118 n
= tree_to_uhwi (nelts
) + 1;
6119 if (n
== 0 || for_ctor_p
)
6122 return n
* count_type_elements (TREE_TYPE (type
), false);
6124 return for_ctor_p
? -1 : 1;
6129 unsigned HOST_WIDE_INT n
;
6133 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6134 if (TREE_CODE (f
) == FIELD_DECL
)
6137 n
+= count_type_elements (TREE_TYPE (f
), false);
6138 else if (!flexible_array_member_p (f
, type
))
6139 /* Don't count flexible arrays, which are not supposed
6140 to be initialized. */
6148 case QUAL_UNION_TYPE
:
6153 gcc_assert (!for_ctor_p
);
6154 /* Estimate the number of scalars in each field and pick the
6155 maximum. Other estimates would do instead; the idea is simply
6156 to make sure that the estimate is not sensitive to the ordering
6159 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
6160 if (TREE_CODE (f
) == FIELD_DECL
)
6162 m
= count_type_elements (TREE_TYPE (f
), false);
6163 /* If the field doesn't span the whole union, add an extra
6164 scalar for the rest. */
6165 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
6166 TYPE_SIZE (type
)) != 1)
6179 unsigned HOST_WIDE_INT nelts
;
6180 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
6188 case FIXED_POINT_TYPE
:
6193 case REFERENCE_TYPE
:
6210 /* Helper for categorize_ctor_elements. Identical interface. */
6213 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6214 HOST_WIDE_INT
*p_unique_nz_elts
,
6215 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6217 unsigned HOST_WIDE_INT idx
;
6218 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
6219 tree value
, purpose
, elt_type
;
6221 /* Whether CTOR is a valid constant initializer, in accordance with what
6222 initializer_constant_valid_p does. If inferred from the constructor
6223 elements, true until proven otherwise. */
6224 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
6225 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6231 elt_type
= NULL_TREE
;
6233 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6235 HOST_WIDE_INT mult
= 1;
6237 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6239 tree lo_index
= TREE_OPERAND (purpose
, 0);
6240 tree hi_index
= TREE_OPERAND (purpose
, 1);
6242 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6243 mult
= (tree_to_uhwi (hi_index
)
6244 - tree_to_uhwi (lo_index
) + 1);
6247 elt_type
= TREE_TYPE (value
);
6249 switch (TREE_CODE (value
))
6253 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6255 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6258 nz_elts
+= mult
* nz
;
6259 unique_nz_elts
+= unz
;
6260 init_elts
+= mult
* ic
;
6262 if (const_from_elts_p
&& const_p
)
6263 const_p
= const_elt_p
;
6270 if (!initializer_zerop (value
))
6279 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6280 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6281 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6285 if (!initializer_zerop (TREE_REALPART (value
)))
6290 if (!initializer_zerop (TREE_IMAGPART (value
)))
6295 init_elts
+= 2 * mult
;
6300 /* We can only construct constant-length vectors using
6302 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6303 for (unsigned int i
= 0; i
< nunits
; ++i
)
6305 tree v
= VECTOR_CST_ELT (value
, i
);
6306 if (!initializer_zerop (v
))
6318 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6319 nz_elts
+= mult
* tc
;
6320 unique_nz_elts
+= tc
;
6321 init_elts
+= mult
* tc
;
6323 if (const_from_elts_p
&& const_p
)
6325 = initializer_constant_valid_p (value
,
6327 TYPE_REVERSE_STORAGE_ORDER
6335 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6336 num_fields
, elt_type
))
6337 *p_complete
= false;
6339 *p_nz_elts
+= nz_elts
;
6340 *p_unique_nz_elts
+= unique_nz_elts
;
6341 *p_init_elts
+= init_elts
;
6346 /* Examine CTOR to discover:
6347 * how many scalar fields are set to nonzero values,
6348 and place it in *P_NZ_ELTS;
6349 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6350 high - low + 1 (this can be useful for callers to determine ctors
6351 that could be cheaply initialized with - perhaps nested - loops
6352 compared to copied from huge read-only data),
6353 and place it in *P_UNIQUE_NZ_ELTS;
6354 * how many scalar fields in total are in CTOR,
6355 and place it in *P_ELT_COUNT.
6356 * whether the constructor is complete -- in the sense that every
6357 meaningful byte is explicitly given a value --
6358 and place it in *P_COMPLETE.
6360 Return whether or not CTOR is a valid static constant initializer, the same
6361 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6364 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6365 HOST_WIDE_INT
*p_unique_nz_elts
,
6366 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6369 *p_unique_nz_elts
= 0;
6373 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6374 p_init_elts
, p_complete
);
6377 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6378 of which had type LAST_TYPE. Each element was itself a complete
6379 initializer, in the sense that every meaningful byte was explicitly
6380 given a value. Return true if the same is true for the constructor
6384 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6385 const_tree last_type
)
6387 if (TREE_CODE (type
) == UNION_TYPE
6388 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6393 gcc_assert (num_elts
== 1 && last_type
);
6395 /* ??? We could look at each element of the union, and find the
6396 largest element. Which would avoid comparing the size of the
6397 initialized element against any tail padding in the union.
6398 Doesn't seem worth the effort... */
6399 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6402 return count_type_elements (type
, true) == num_elts
;
6405 /* Return 1 if EXP contains mostly (3/4) zeros. */
6408 mostly_zeros_p (const_tree exp
)
6410 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6412 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6415 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6417 return !complete_p
|| nz_elts
< init_elts
/ 4;
6420 return initializer_zerop (exp
);
6423 /* Return 1 if EXP contains all zeros. */
6426 all_zeros_p (const_tree exp
)
6428 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6430 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6433 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6435 return nz_elts
== 0;
6438 return initializer_zerop (exp
);
6441 /* Helper function for store_constructor.
6442 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6443 CLEARED is as for store_constructor.
6444 ALIAS_SET is the alias set to use for any stores.
6445 If REVERSE is true, the store is to be done in reverse order.
6447 This provides a recursive shortcut back to store_constructor when it isn't
6448 necessary to go through store_field. This is so that we can pass through
6449 the cleared field to let store_constructor know that we may not have to
6450 clear a substructure if the outer structure has already been cleared. */
6453 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6454 poly_uint64 bitregion_start
,
6455 poly_uint64 bitregion_end
,
6457 tree exp
, int cleared
,
6458 alias_set_type alias_set
, bool reverse
)
6461 poly_uint64 bytesize
;
6462 if (TREE_CODE (exp
) == CONSTRUCTOR
6463 /* We can only call store_constructor recursively if the size and
6464 bit position are on a byte boundary. */
6465 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6466 && maybe_ne (bitsize
, 0U)
6467 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6468 /* If we have a nonzero bitpos for a register target, then we just
6469 let store_field do the bitfield handling. This is unlikely to
6470 generate unnecessary clear instructions anyways. */
6471 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6475 machine_mode target_mode
= GET_MODE (target
);
6476 if (target_mode
!= BLKmode
6477 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6478 target_mode
= BLKmode
;
6479 target
= adjust_address (target
, target_mode
, bytepos
);
6483 /* Update the alias set, if required. */
6484 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6485 && MEM_ALIAS_SET (target
) != 0)
6487 target
= copy_rtx (target
);
6488 set_mem_alias_set (target
, alias_set
);
6491 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6494 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6495 exp
, alias_set
, false, reverse
);
6499 /* Returns the number of FIELD_DECLs in TYPE. */
6502 fields_length (const_tree type
)
6504 tree t
= TYPE_FIELDS (type
);
6507 for (; t
; t
= DECL_CHAIN (t
))
6508 if (TREE_CODE (t
) == FIELD_DECL
)
6515 /* Store the value of constructor EXP into the rtx TARGET.
6516 TARGET is either a REG or a MEM; we know it cannot conflict, since
6517 safe_from_p has been called.
6518 CLEARED is true if TARGET is known to have been zero'd.
6519 SIZE is the number of bytes of TARGET we are allowed to modify: this
6520 may not be the same as the size of EXP if we are assigning to a field
6521 which has been packed to exclude padding bits.
6522 If REVERSE is true, the store is to be done in reverse order. */
6525 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6528 tree type
= TREE_TYPE (exp
);
6529 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6530 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6532 switch (TREE_CODE (type
))
6536 case QUAL_UNION_TYPE
:
6538 unsigned HOST_WIDE_INT idx
;
6541 /* The storage order is specified for every aggregate type. */
6542 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6544 /* If size is zero or the target is already cleared, do nothing. */
6545 if (known_eq (size
, 0) || cleared
)
6547 /* We either clear the aggregate or indicate the value is dead. */
6548 else if ((TREE_CODE (type
) == UNION_TYPE
6549 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6550 && ! CONSTRUCTOR_ELTS (exp
))
6551 /* If the constructor is empty, clear the union. */
6553 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6557 /* If we are building a static constructor into a register,
6558 set the initial value as zero so we can fold the value into
6559 a constant. But if more than one register is involved,
6560 this probably loses. */
6561 else if (REG_P (target
) && TREE_STATIC (exp
)
6562 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6563 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6565 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6569 /* If the constructor has fewer fields than the structure or
6570 if we are initializing the structure to mostly zeros, clear
6571 the whole structure first. Don't do this if TARGET is a
6572 register whose mode size isn't equal to SIZE since
6573 clear_storage can't handle this case. */
6574 else if (known_size_p (size
)
6575 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6576 || mostly_zeros_p (exp
))
6578 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6580 clear_storage (target
, gen_int_mode (size
, Pmode
),
6585 if (REG_P (target
) && !cleared
)
6586 emit_clobber (target
);
6588 /* Store each element of the constructor into the
6589 corresponding field of TARGET. */
6590 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6593 HOST_WIDE_INT bitsize
;
6594 HOST_WIDE_INT bitpos
= 0;
6596 rtx to_rtx
= target
;
6598 /* Just ignore missing fields. We cleared the whole
6599 structure, above, if any fields are missing. */
6603 if (cleared
&& initializer_zerop (value
))
6606 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6607 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6611 mode
= DECL_MODE (field
);
6612 if (DECL_BIT_FIELD (field
))
6615 offset
= DECL_FIELD_OFFSET (field
);
6616 if (tree_fits_shwi_p (offset
)
6617 && tree_fits_shwi_p (bit_position (field
)))
6619 bitpos
= int_bit_position (field
);
6625 /* If this initializes a field that is smaller than a
6626 word, at the start of a word, try to widen it to a full
6627 word. This special case allows us to output C++ member
6628 function initializations in a form that the optimizers
6630 if (WORD_REGISTER_OPERATIONS
6632 && bitsize
< BITS_PER_WORD
6633 && bitpos
% BITS_PER_WORD
== 0
6634 && GET_MODE_CLASS (mode
) == MODE_INT
6635 && TREE_CODE (value
) == INTEGER_CST
6637 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6639 type
= TREE_TYPE (value
);
6641 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6643 type
= lang_hooks
.types
.type_for_mode
6644 (word_mode
, TYPE_UNSIGNED (type
));
6645 value
= fold_convert (type
, value
);
6646 /* Make sure the bits beyond the original bitsize are zero
6647 so that we can correctly avoid extra zeroing stores in
6648 later constructor elements. */
6650 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6652 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6655 if (BYTES_BIG_ENDIAN
)
6657 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6658 build_int_cst (type
,
6659 BITS_PER_WORD
- bitsize
));
6660 bitsize
= BITS_PER_WORD
;
6664 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6665 && DECL_NONADDRESSABLE_P (field
))
6667 to_rtx
= copy_rtx (to_rtx
);
6668 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6671 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6672 0, bitregion_end
, mode
,
6674 get_alias_set (TREE_TYPE (field
)),
6682 unsigned HOST_WIDE_INT i
;
6685 tree elttype
= TREE_TYPE (type
);
6687 HOST_WIDE_INT minelt
= 0;
6688 HOST_WIDE_INT maxelt
= 0;
6690 /* The storage order is specified for every aggregate type. */
6691 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6693 domain
= TYPE_DOMAIN (type
);
6694 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6695 && TYPE_MAX_VALUE (domain
)
6696 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6697 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6699 /* If we have constant bounds for the range of the type, get them. */
6702 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6703 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6706 /* If the constructor has fewer elements than the array, clear
6707 the whole array first. Similarly if this is static
6708 constructor of a non-BLKmode object. */
6711 else if (REG_P (target
) && TREE_STATIC (exp
))
6715 unsigned HOST_WIDE_INT idx
;
6716 HOST_WIDE_INT count
= 0, zero_count
= 0;
6717 need_to_clear
= ! const_bounds_p
;
6719 /* This loop is a more accurate version of the loop in
6720 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6721 is also needed to check for missing elements. */
6722 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6724 HOST_WIDE_INT this_node_count
;
6729 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6731 tree lo_index
= TREE_OPERAND (index
, 0);
6732 tree hi_index
= TREE_OPERAND (index
, 1);
6734 if (! tree_fits_uhwi_p (lo_index
)
6735 || ! tree_fits_uhwi_p (hi_index
))
6741 this_node_count
= (tree_to_uhwi (hi_index
)
6742 - tree_to_uhwi (lo_index
) + 1);
6745 this_node_count
= 1;
6747 count
+= this_node_count
;
6748 if (mostly_zeros_p (value
))
6749 zero_count
+= this_node_count
;
6752 /* Clear the entire array first if there are any missing
6753 elements, or if the incidence of zero elements is >=
6756 && (count
< maxelt
- minelt
+ 1
6757 || 4 * zero_count
>= 3 * count
))
6761 if (need_to_clear
&& maybe_gt (size
, 0))
6764 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6766 clear_storage (target
, gen_int_mode (size
, Pmode
),
6771 if (!cleared
&& REG_P (target
))
6772 /* Inform later passes that the old value is dead. */
6773 emit_clobber (target
);
6775 /* Store each element of the constructor into the
6776 corresponding element of TARGET, determined by counting the
6778 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6782 HOST_WIDE_INT bitpos
;
6783 rtx xtarget
= target
;
6785 if (cleared
&& initializer_zerop (value
))
6788 mode
= TYPE_MODE (elttype
);
6789 if (mode
!= BLKmode
)
6790 bitsize
= GET_MODE_BITSIZE (mode
);
6791 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6794 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6796 tree lo_index
= TREE_OPERAND (index
, 0);
6797 tree hi_index
= TREE_OPERAND (index
, 1);
6798 rtx index_r
, pos_rtx
;
6799 HOST_WIDE_INT lo
, hi
, count
;
6802 /* If the range is constant and "small", unroll the loop. */
6804 && tree_fits_shwi_p (lo_index
)
6805 && tree_fits_shwi_p (hi_index
)
6806 && (lo
= tree_to_shwi (lo_index
),
6807 hi
= tree_to_shwi (hi_index
),
6808 count
= hi
- lo
+ 1,
6811 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6812 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6815 lo
-= minelt
; hi
-= minelt
;
6816 for (; lo
<= hi
; lo
++)
6818 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6821 && !MEM_KEEP_ALIAS_SET_P (target
)
6822 && TREE_CODE (type
) == ARRAY_TYPE
6823 && TYPE_NONALIASED_COMPONENT (type
))
6825 target
= copy_rtx (target
);
6826 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6829 store_constructor_field
6830 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6831 mode
, value
, cleared
,
6832 get_alias_set (elttype
), reverse
);
6837 rtx_code_label
*loop_start
= gen_label_rtx ();
6838 rtx_code_label
*loop_end
= gen_label_rtx ();
6841 expand_normal (hi_index
);
6843 index
= build_decl (EXPR_LOCATION (exp
),
6844 VAR_DECL
, NULL_TREE
, domain
);
6845 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6846 SET_DECL_RTL (index
, index_r
);
6847 store_expr (lo_index
, index_r
, 0, false, reverse
);
6849 /* Build the head of the loop. */
6850 do_pending_stack_adjust ();
6851 emit_label (loop_start
);
6853 /* Assign value to element index. */
6855 fold_convert (ssizetype
,
6856 fold_build2 (MINUS_EXPR
,
6859 TYPE_MIN_VALUE (domain
)));
6862 size_binop (MULT_EXPR
, position
,
6863 fold_convert (ssizetype
,
6864 TYPE_SIZE_UNIT (elttype
)));
6866 pos_rtx
= expand_normal (position
);
6867 xtarget
= offset_address (target
, pos_rtx
,
6868 highest_pow2_factor (position
));
6869 xtarget
= adjust_address (xtarget
, mode
, 0);
6870 if (TREE_CODE (value
) == CONSTRUCTOR
)
6871 store_constructor (value
, xtarget
, cleared
,
6872 exact_div (bitsize
, BITS_PER_UNIT
),
6875 store_expr (value
, xtarget
, 0, false, reverse
);
6877 /* Generate a conditional jump to exit the loop. */
6878 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6880 jumpif (exit_cond
, loop_end
,
6881 profile_probability::uninitialized ());
6883 /* Update the loop counter, and jump to the head of
6885 expand_assignment (index
,
6886 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6887 index
, integer_one_node
),
6890 emit_jump (loop_start
);
6892 /* Build the end of the loop. */
6893 emit_label (loop_end
);
6896 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6897 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6902 index
= ssize_int (1);
6905 index
= fold_convert (ssizetype
,
6906 fold_build2 (MINUS_EXPR
,
6909 TYPE_MIN_VALUE (domain
)));
6912 size_binop (MULT_EXPR
, index
,
6913 fold_convert (ssizetype
,
6914 TYPE_SIZE_UNIT (elttype
)));
6915 xtarget
= offset_address (target
,
6916 expand_normal (position
),
6917 highest_pow2_factor (position
));
6918 xtarget
= adjust_address (xtarget
, mode
, 0);
6919 store_expr (value
, xtarget
, 0, false, reverse
);
6924 bitpos
= ((tree_to_shwi (index
) - minelt
)
6925 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6927 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6929 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6930 && TREE_CODE (type
) == ARRAY_TYPE
6931 && TYPE_NONALIASED_COMPONENT (type
))
6933 target
= copy_rtx (target
);
6934 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6936 store_constructor_field (target
, bitsize
, bitpos
, 0,
6937 bitregion_end
, mode
, value
,
6938 cleared
, get_alias_set (elttype
),
6947 unsigned HOST_WIDE_INT idx
;
6948 constructor_elt
*ce
;
6951 insn_code icode
= CODE_FOR_nothing
;
6953 tree elttype
= TREE_TYPE (type
);
6954 int elt_size
= vector_element_bits (type
);
6955 machine_mode eltmode
= TYPE_MODE (elttype
);
6956 HOST_WIDE_INT bitsize
;
6957 HOST_WIDE_INT bitpos
;
6958 rtvec vector
= NULL
;
6960 unsigned HOST_WIDE_INT const_n_elts
;
6961 alias_set_type alias
;
6962 bool vec_vec_init_p
= false;
6963 machine_mode mode
= GET_MODE (target
);
6965 gcc_assert (eltmode
!= BLKmode
);
6967 /* Try using vec_duplicate_optab for uniform vectors. */
6968 if (!TREE_SIDE_EFFECTS (exp
)
6969 && VECTOR_MODE_P (mode
)
6970 && eltmode
== GET_MODE_INNER (mode
)
6971 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6972 != CODE_FOR_nothing
)
6973 && (elt
= uniform_vector_p (exp
)))
6975 class expand_operand ops
[2];
6976 create_output_operand (&ops
[0], target
, mode
);
6977 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6978 expand_insn (icode
, 2, ops
);
6979 if (!rtx_equal_p (target
, ops
[0].value
))
6980 emit_move_insn (target
, ops
[0].value
);
6984 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6986 && VECTOR_MODE_P (mode
)
6987 && n_elts
.is_constant (&const_n_elts
))
6989 machine_mode emode
= eltmode
;
6990 bool vector_typed_elts_p
= false;
6992 if (CONSTRUCTOR_NELTS (exp
)
6993 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6996 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6997 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6998 * TYPE_VECTOR_SUBPARTS (etype
),
7000 emode
= TYPE_MODE (etype
);
7001 vector_typed_elts_p
= true;
7003 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
7004 if (icode
!= CODE_FOR_nothing
)
7006 unsigned int n
= const_n_elts
;
7008 if (vector_typed_elts_p
)
7010 n
= CONSTRUCTOR_NELTS (exp
);
7011 vec_vec_init_p
= true;
7013 vector
= rtvec_alloc (n
);
7014 for (unsigned int k
= 0; k
< n
; k
++)
7015 RTVEC_ELT (vector
, k
) = CONST0_RTX (emode
);
7019 /* Compute the size of the elements in the CTOR. It differs
7020 from the size of the vector type elements only when the
7021 CTOR elements are vectors themselves. */
7022 tree val_type
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
7023 if (VECTOR_TYPE_P (val_type
))
7024 bitsize
= tree_to_uhwi (TYPE_SIZE (val_type
));
7028 /* If the constructor has fewer elements than the vector,
7029 clear the whole array first. Similarly if this is static
7030 constructor of a non-BLKmode object. */
7033 else if (REG_P (target
) && TREE_STATIC (exp
))
7037 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
7040 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
7042 int n_elts_here
= bitsize
/ elt_size
;
7043 count
+= n_elts_here
;
7044 if (mostly_zeros_p (value
))
7045 zero_count
+= n_elts_here
;
7048 /* Clear the entire vector first if there are any missing elements,
7049 or if the incidence of zero elements is >= 75%. */
7050 need_to_clear
= (maybe_lt (count
, n_elts
)
7051 || 4 * zero_count
>= 3 * count
);
7054 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
7057 emit_move_insn (target
, CONST0_RTX (mode
));
7059 clear_storage (target
, gen_int_mode (size
, Pmode
),
7064 /* Inform later passes that the old value is dead. */
7065 if (!cleared
&& !vector
&& REG_P (target
))
7066 emit_move_insn (target
, CONST0_RTX (mode
));
7069 alias
= MEM_ALIAS_SET (target
);
7071 alias
= get_alias_set (elttype
);
7073 /* Store each element of the constructor into the corresponding
7074 element of TARGET, determined by counting the elements. */
7075 for (idx
= 0, i
= 0;
7076 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
7077 idx
++, i
+= bitsize
/ elt_size
)
7079 HOST_WIDE_INT eltpos
;
7080 tree value
= ce
->value
;
7082 if (cleared
&& initializer_zerop (value
))
7086 eltpos
= tree_to_uhwi (ce
->index
);
7094 gcc_assert (ce
->index
== NULL_TREE
);
7095 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
7099 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
7100 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
7104 machine_mode value_mode
7105 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
7106 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
7107 bitpos
= eltpos
* elt_size
;
7108 store_constructor_field (target
, bitsize
, bitpos
, 0,
7109 bitregion_end
, value_mode
,
7110 value
, cleared
, alias
, reverse
);
7115 emit_insn (GEN_FCN (icode
) (target
,
7116 gen_rtx_PARALLEL (mode
, vector
)));
7125 /* Store the value of EXP (an expression tree)
7126 into a subfield of TARGET which has mode MODE and occupies
7127 BITSIZE bits, starting BITPOS bits from the start of TARGET.
7128 If MODE is VOIDmode, it means that we are storing into a bit-field.
7130 BITREGION_START is bitpos of the first bitfield in this region.
7131 BITREGION_END is the bitpos of the ending bitfield in this region.
7132 These two fields are 0, if the C++ memory model does not apply,
7133 or we are not interested in keeping track of bitfield regions.
7135 Always return const0_rtx unless we have something particular to
7138 ALIAS_SET is the alias set for the destination. This value will
7139 (in general) be different from that for TARGET, since TARGET is a
7140 reference to the containing structure.
7142 If NONTEMPORAL is true, try generating a nontemporal store.
7144 If REVERSE is true, the store is to be done in reverse order. */
7147 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
7148 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
7149 machine_mode mode
, tree exp
,
7150 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
7152 if (TREE_CODE (exp
) == ERROR_MARK
)
7155 /* If we have nothing to store, do nothing unless the expression has
7156 side-effects. Don't do that for zero sized addressable lhs of
7158 if (known_eq (bitsize
, 0)
7159 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7160 || TREE_CODE (exp
) != CALL_EXPR
))
7161 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
7163 if (GET_CODE (target
) == CONCAT
)
7165 /* We're storing into a struct containing a single __complex. */
7167 gcc_assert (known_eq (bitpos
, 0));
7168 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
7171 /* If the structure is in a register or if the component
7172 is a bit field, we cannot use addressing to access it.
7173 Use bit-field techniques or SUBREG to store in it. */
7175 poly_int64 decl_bitsize
;
7176 if (mode
== VOIDmode
7177 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
7178 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
7179 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
7181 || GET_CODE (target
) == SUBREG
7182 /* If the field isn't aligned enough to store as an ordinary memref,
7183 store it as a bit field. */
7185 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
7186 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
7187 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
7188 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
7189 || (known_size_p (bitsize
)
7191 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
7192 /* If the RHS and field are a constant size and the size of the
7193 RHS isn't the same size as the bitfield, we must use bitfield
7195 || (known_size_p (bitsize
)
7196 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
7197 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
7199 /* Except for initialization of full bytes from a CONSTRUCTOR, which
7200 we will handle specially below. */
7201 && !(TREE_CODE (exp
) == CONSTRUCTOR
7202 && multiple_p (bitsize
, BITS_PER_UNIT
))
7203 /* And except for bitwise copying of TREE_ADDRESSABLE types,
7204 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
7205 includes some extra padding. store_expr / expand_expr will in
7206 that case call get_inner_reference that will have the bitsize
7207 we check here and thus the block move will not clobber the
7208 padding that shouldn't be clobbered. In the future we could
7209 replace the TREE_ADDRESSABLE check with a check that
7210 get_base_address needs to live in memory. */
7211 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
7212 || TREE_CODE (exp
) != COMPONENT_REF
7213 || !multiple_p (bitsize
, BITS_PER_UNIT
)
7214 || !multiple_p (bitpos
, BITS_PER_UNIT
)
7215 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
7217 || maybe_ne (decl_bitsize
, bitsize
))
7218 /* A call with an addressable return type and return-slot
7219 optimization must not need bitfield operations but we must
7220 pass down the original target. */
7221 && (TREE_CODE (exp
) != CALL_EXPR
7222 || !TREE_ADDRESSABLE (TREE_TYPE (exp
))
7223 || !CALL_EXPR_RETURN_SLOT_OPT (exp
)))
7224 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
7225 decl we must use bitfield operations. */
7226 || (known_size_p (bitsize
)
7227 && TREE_CODE (exp
) == MEM_REF
7228 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
7229 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7230 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7231 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
7236 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7237 implies a mask operation. If the precision is the same size as
7238 the field we're storing into, that mask is redundant. This is
7239 particularly common with bit field assignments generated by the
7241 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7244 tree type
= TREE_TYPE (exp
);
7245 if (INTEGRAL_TYPE_P (type
)
7246 && maybe_ne (TYPE_PRECISION (type
),
7247 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7248 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7250 tree op
= gimple_assign_rhs1 (nop_def
);
7251 type
= TREE_TYPE (op
);
7252 if (INTEGRAL_TYPE_P (type
)
7253 && known_ge (TYPE_PRECISION (type
), bitsize
))
7258 temp
= expand_normal (exp
);
7260 /* We don't support variable-sized BLKmode bitfields, since our
7261 handling of BLKmode is bound up with the ability to break
7262 things into words. */
7263 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7265 /* Handle calls that return values in multiple non-contiguous locations.
7266 The Irix 6 ABI has examples of this. */
7267 if (GET_CODE (temp
) == PARALLEL
)
7269 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7270 machine_mode temp_mode
= GET_MODE (temp
);
7271 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7272 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7273 rtx temp_target
= gen_reg_rtx (temp_mode
);
7274 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7278 /* Handle calls that return BLKmode values in registers. */
7279 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7281 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7282 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7286 /* If the value has aggregate type and an integral mode then, if BITSIZE
7287 is narrower than this mode and this is for big-endian data, we first
7288 need to put the value into the low-order bits for store_bit_field,
7289 except when MODE is BLKmode and BITSIZE larger than the word size
7290 (see the handling of fields larger than a word in store_bit_field).
7291 Moreover, the field may be not aligned on a byte boundary; in this
7292 case, if it has reverse storage order, it needs to be accessed as a
7293 scalar field with reverse storage order and we must first put the
7294 value into target order. */
7295 scalar_int_mode temp_mode
;
7296 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7297 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7299 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7301 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7304 temp
= flip_storage_order (temp_mode
, temp
);
7306 gcc_checking_assert (known_le (bitsize
, size
));
7307 if (maybe_lt (bitsize
, size
)
7308 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7309 /* Use of to_constant for BLKmode was checked above. */
7310 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7311 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7312 size
- bitsize
, NULL_RTX
, 1);
7315 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7316 if (mode
!= VOIDmode
&& mode
!= BLKmode
7317 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7318 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7320 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7321 and BITPOS must be aligned on a byte boundary. If so, we simply do
7322 a block copy. Likewise for a BLKmode-like TARGET. */
7323 if (GET_MODE (temp
) == BLKmode
7324 && (GET_MODE (target
) == BLKmode
7326 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7327 && multiple_p (bitpos
, BITS_PER_UNIT
)
7328 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7330 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7331 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7332 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7334 target
= adjust_address (target
, VOIDmode
, bytepos
);
7335 emit_block_move (target
, temp
,
7336 gen_int_mode (bytesize
, Pmode
),
7342 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7343 word size, we need to load the value (see again store_bit_field). */
7344 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7346 temp_mode
= smallest_int_mode_for_size (bitsize
);
7347 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7348 temp_mode
, false, NULL
);
7351 /* Store the value in the bitfield. */
7352 gcc_checking_assert (known_ge (bitpos
, 0));
7353 store_bit_field (target
, bitsize
, bitpos
,
7354 bitregion_start
, bitregion_end
,
7355 mode
, temp
, reverse
);
7361 /* Now build a reference to just the desired component. */
7362 rtx to_rtx
= adjust_address (target
, mode
,
7363 exact_div (bitpos
, BITS_PER_UNIT
));
7365 if (to_rtx
== target
)
7366 to_rtx
= copy_rtx (to_rtx
);
7368 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7369 set_mem_alias_set (to_rtx
, alias_set
);
7371 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7372 into a target smaller than its type; handle that case now. */
7373 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7375 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7376 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7380 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7384 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7385 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7386 codes and find the ultimate containing object, which we return.
7388 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7389 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7390 storage order of the field.
7391 If the position of the field is variable, we store a tree
7392 giving the variable offset (in units) in *POFFSET.
7393 This offset is in addition to the bit position.
7394 If the position is not variable, we store 0 in *POFFSET.
7396 If any of the extraction expressions is volatile,
7397 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7399 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7400 Otherwise, it is a mode that can be used to access the field.
7402 If the field describes a variable-sized object, *PMODE is set to
7403 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7404 this case, but the address of the object can be found. */
7407 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7408 poly_int64_pod
*pbitpos
, tree
*poffset
,
7409 machine_mode
*pmode
, int *punsignedp
,
7410 int *preversep
, int *pvolatilep
)
7413 machine_mode mode
= VOIDmode
;
7414 bool blkmode_bitfield
= false;
7415 tree offset
= size_zero_node
;
7416 poly_offset_int bit_offset
= 0;
7418 /* First get the mode, signedness, storage order and size. We do this from
7419 just the outermost expression. */
7421 if (TREE_CODE (exp
) == COMPONENT_REF
)
7423 tree field
= TREE_OPERAND (exp
, 1);
7424 size_tree
= DECL_SIZE (field
);
7425 if (flag_strict_volatile_bitfields
> 0
7426 && TREE_THIS_VOLATILE (exp
)
7427 && DECL_BIT_FIELD_TYPE (field
)
7428 && DECL_MODE (field
) != BLKmode
)
7429 /* Volatile bitfields should be accessed in the mode of the
7430 field's type, not the mode computed based on the bit
7432 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7433 else if (!DECL_BIT_FIELD (field
))
7435 mode
= DECL_MODE (field
);
7436 /* For vector fields re-check the target flags, as DECL_MODE
7437 could have been set with different target flags than
7438 the current function has. */
7440 && VECTOR_TYPE_P (TREE_TYPE (field
))
7441 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7442 mode
= TYPE_MODE (TREE_TYPE (field
));
7444 else if (DECL_MODE (field
) == BLKmode
)
7445 blkmode_bitfield
= true;
7447 *punsignedp
= DECL_UNSIGNED (field
);
7449 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7451 size_tree
= TREE_OPERAND (exp
, 1);
7452 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7453 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7455 /* For vector element types with the correct size of access or for
7456 vector typed accesses use the mode of the access type. */
7457 if ((TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7458 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7459 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7460 || VECTOR_TYPE_P (TREE_TYPE (exp
)))
7461 mode
= TYPE_MODE (TREE_TYPE (exp
));
7465 mode
= TYPE_MODE (TREE_TYPE (exp
));
7466 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7468 if (mode
== BLKmode
)
7469 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7471 *pbitsize
= GET_MODE_BITSIZE (mode
);
7476 if (! tree_fits_uhwi_p (size_tree
))
7477 mode
= BLKmode
, *pbitsize
= -1;
7479 *pbitsize
= tree_to_uhwi (size_tree
);
7482 *preversep
= reverse_storage_order_for_component_p (exp
);
7484 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7485 and find the ultimate containing object. */
7488 switch (TREE_CODE (exp
))
7491 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7496 tree field
= TREE_OPERAND (exp
, 1);
7497 tree this_offset
= component_ref_field_offset (exp
);
7499 /* If this field hasn't been filled in yet, don't go past it.
7500 This should only happen when folding expressions made during
7501 type construction. */
7502 if (this_offset
== 0)
7505 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7506 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7508 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7513 case ARRAY_RANGE_REF
:
7515 tree index
= TREE_OPERAND (exp
, 1);
7516 tree low_bound
= array_ref_low_bound (exp
);
7517 tree unit_size
= array_ref_element_size (exp
);
7519 /* We assume all arrays have sizes that are a multiple of a byte.
7520 First subtract the lower bound, if any, in the type of the
7521 index, then convert to sizetype and multiply by the size of
7522 the array element. */
7523 if (! integer_zerop (low_bound
))
7524 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7527 offset
= size_binop (PLUS_EXPR
, offset
,
7528 size_binop (MULT_EXPR
,
7529 fold_convert (sizetype
, index
),
7538 bit_offset
+= *pbitsize
;
7541 case VIEW_CONVERT_EXPR
:
7545 /* Hand back the decl for MEM[&decl, off]. */
7546 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7548 tree off
= TREE_OPERAND (exp
, 1);
7549 if (!integer_zerop (off
))
7551 poly_offset_int boff
= mem_ref_offset (exp
);
7552 boff
<<= LOG2_BITS_PER_UNIT
;
7555 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7563 /* If any reference in the chain is volatile, the effect is volatile. */
7564 if (TREE_THIS_VOLATILE (exp
))
7567 exp
= TREE_OPERAND (exp
, 0);
7571 /* If OFFSET is constant, see if we can return the whole thing as a
7572 constant bit position. Make sure to handle overflow during
7574 if (poly_int_tree_p (offset
))
7576 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7577 TYPE_PRECISION (sizetype
));
7578 tem
<<= LOG2_BITS_PER_UNIT
;
7580 if (tem
.to_shwi (pbitpos
))
7581 *poffset
= offset
= NULL_TREE
;
7584 /* Otherwise, split it up. */
7587 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7588 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7590 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7591 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7592 offset
= size_binop (PLUS_EXPR
, offset
,
7593 build_int_cst (sizetype
, bytes
.force_shwi ()));
7599 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7600 if (mode
== VOIDmode
7602 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7603 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7611 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7613 static unsigned HOST_WIDE_INT
7614 target_align (const_tree target
)
7616 /* We might have a chain of nested references with intermediate misaligning
7617 bitfields components, so need to recurse to find out. */
7619 unsigned HOST_WIDE_INT this_align
, outer_align
;
7621 switch (TREE_CODE (target
))
7627 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7628 outer_align
= target_align (TREE_OPERAND (target
, 0));
7629 return MIN (this_align
, outer_align
);
7632 case ARRAY_RANGE_REF
:
7633 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7634 outer_align
= target_align (TREE_OPERAND (target
, 0));
7635 return MIN (this_align
, outer_align
);
7638 case NON_LVALUE_EXPR
:
7639 case VIEW_CONVERT_EXPR
:
7640 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7641 outer_align
= target_align (TREE_OPERAND (target
, 0));
7642 return MAX (this_align
, outer_align
);
7645 return TYPE_ALIGN (TREE_TYPE (target
));
7650 /* Given an rtx VALUE that may contain additions and multiplications, return
7651 an equivalent value that just refers to a register, memory, or constant.
7652 This is done by generating instructions to perform the arithmetic and
7653 returning a pseudo-register containing the value.
7655 The returned value may be a REG, SUBREG, MEM or constant. */
7658 force_operand (rtx value
, rtx target
)
7661 /* Use subtarget as the target for operand 0 of a binary operation. */
7662 rtx subtarget
= get_subtarget (target
);
7663 enum rtx_code code
= GET_CODE (value
);
7665 /* Check for subreg applied to an expression produced by loop optimizer. */
7667 && !REG_P (SUBREG_REG (value
))
7668 && !MEM_P (SUBREG_REG (value
)))
7671 = simplify_gen_subreg (GET_MODE (value
),
7672 force_reg (GET_MODE (SUBREG_REG (value
)),
7673 force_operand (SUBREG_REG (value
),
7675 GET_MODE (SUBREG_REG (value
)),
7676 SUBREG_BYTE (value
));
7677 code
= GET_CODE (value
);
7680 /* Check for a PIC address load. */
7681 if ((code
== PLUS
|| code
== MINUS
)
7682 && XEXP (value
, 0) == pic_offset_table_rtx
7683 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7684 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7685 || GET_CODE (XEXP (value
, 1)) == CONST
))
7688 subtarget
= gen_reg_rtx (GET_MODE (value
));
7689 emit_move_insn (subtarget
, value
);
7693 if (ARITHMETIC_P (value
))
7695 op2
= XEXP (value
, 1);
7696 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7698 if (code
== MINUS
&& CONST_INT_P (op2
))
7701 op2
= negate_rtx (GET_MODE (value
), op2
);
7704 /* Check for an addition with OP2 a constant integer and our first
7705 operand a PLUS of a virtual register and something else. In that
7706 case, we want to emit the sum of the virtual register and the
7707 constant first and then add the other value. This allows virtual
7708 register instantiation to simply modify the constant rather than
7709 creating another one around this addition. */
7710 if (code
== PLUS
&& CONST_INT_P (op2
)
7711 && GET_CODE (XEXP (value
, 0)) == PLUS
7712 && REG_P (XEXP (XEXP (value
, 0), 0))
7713 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7714 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7716 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7717 XEXP (XEXP (value
, 0), 0), op2
,
7718 subtarget
, 0, OPTAB_LIB_WIDEN
);
7719 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7720 force_operand (XEXP (XEXP (value
,
7722 target
, 0, OPTAB_LIB_WIDEN
);
7725 op1
= force_operand (XEXP (value
, 0), subtarget
);
7726 op2
= force_operand (op2
, NULL_RTX
);
7730 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7732 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7733 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7734 target
, 1, OPTAB_LIB_WIDEN
);
7736 return expand_divmod (0,
7737 FLOAT_MODE_P (GET_MODE (value
))
7738 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7739 GET_MODE (value
), op1
, op2
, target
, 0);
7741 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7744 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7747 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7750 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7751 target
, 0, OPTAB_LIB_WIDEN
);
7753 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7754 target
, 1, OPTAB_LIB_WIDEN
);
7757 if (UNARY_P (value
))
7760 target
= gen_reg_rtx (GET_MODE (value
));
7761 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7768 case FLOAT_TRUNCATE
:
7769 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7774 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7778 case UNSIGNED_FLOAT
:
7779 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7783 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7787 #ifdef INSN_SCHEDULING
7788 /* On machines that have insn scheduling, we want all memory reference to be
7789 explicit, so we need to deal with such paradoxical SUBREGs. */
7790 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7792 = simplify_gen_subreg (GET_MODE (value
),
7793 force_reg (GET_MODE (SUBREG_REG (value
)),
7794 force_operand (SUBREG_REG (value
),
7796 GET_MODE (SUBREG_REG (value
)),
7797 SUBREG_BYTE (value
));
7803 /* Subroutine of expand_expr: return nonzero iff there is no way that
7804 EXP can reference X, which is being modified. TOP_P is nonzero if this
7805 call is going to be used to determine whether we need a temporary
7806 for EXP, as opposed to a recursive call to this function.
7808 It is always safe for this routine to return zero since it merely
7809 searches for optimization opportunities. */
7812 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7818 /* If EXP has varying size, we MUST use a target since we currently
7819 have no way of allocating temporaries of variable size
7820 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7821 So we assume here that something at a higher level has prevented a
7822 clash. This is somewhat bogus, but the best we can do. Only
7823 do this when X is BLKmode and when we are at the top level. */
7824 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7825 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7826 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7827 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7828 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7830 && GET_MODE (x
) == BLKmode
)
7831 /* If X is in the outgoing argument area, it is always safe. */
7833 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7834 || (GET_CODE (XEXP (x
, 0)) == PLUS
7835 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7838 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7839 find the underlying pseudo. */
7840 if (GET_CODE (x
) == SUBREG
)
7843 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7847 /* Now look at our tree code and possibly recurse. */
7848 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7850 case tcc_declaration
:
7851 exp_rtl
= DECL_RTL_IF_SET (exp
);
7857 case tcc_exceptional
:
7858 if (TREE_CODE (exp
) == TREE_LIST
)
7862 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7864 exp
= TREE_CHAIN (exp
);
7867 if (TREE_CODE (exp
) != TREE_LIST
)
7868 return safe_from_p (x
, exp
, 0);
7871 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7873 constructor_elt
*ce
;
7874 unsigned HOST_WIDE_INT idx
;
7876 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7877 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7878 || !safe_from_p (x
, ce
->value
, 0))
7882 else if (TREE_CODE (exp
) == ERROR_MARK
)
7883 return 1; /* An already-visited SAVE_EXPR? */
7888 /* The only case we look at here is the DECL_INITIAL inside a
7890 return (TREE_CODE (exp
) != DECL_EXPR
7891 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7892 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7893 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7896 case tcc_comparison
:
7897 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7902 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7904 case tcc_expression
:
7907 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7908 the expression. If it is set, we conflict iff we are that rtx or
7909 both are in memory. Otherwise, we check all operands of the
7910 expression recursively. */
7912 switch (TREE_CODE (exp
))
7915 /* If the operand is static or we are static, we can't conflict.
7916 Likewise if we don't conflict with the operand at all. */
7917 if (staticp (TREE_OPERAND (exp
, 0))
7918 || TREE_STATIC (exp
)
7919 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7922 /* Otherwise, the only way this can conflict is if we are taking
7923 the address of a DECL a that address if part of X, which is
7925 exp
= TREE_OPERAND (exp
, 0);
7928 if (!DECL_RTL_SET_P (exp
)
7929 || !MEM_P (DECL_RTL (exp
)))
7932 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7938 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7939 get_alias_set (exp
)))
7944 /* Assume that the call will clobber all hard registers and
7946 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7951 case WITH_CLEANUP_EXPR
:
7952 case CLEANUP_POINT_EXPR
:
7953 /* Lowered by gimplify.c. */
7957 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7963 /* If we have an rtx, we do not need to scan our operands. */
7967 nops
= TREE_OPERAND_LENGTH (exp
);
7968 for (i
= 0; i
< nops
; i
++)
7969 if (TREE_OPERAND (exp
, i
) != 0
7970 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7976 /* Should never get a type here. */
7980 /* If we have an rtl, find any enclosed object. Then see if we conflict
7984 if (GET_CODE (exp_rtl
) == SUBREG
)
7986 exp_rtl
= SUBREG_REG (exp_rtl
);
7988 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7992 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7993 are memory and they conflict. */
7994 return ! (rtx_equal_p (x
, exp_rtl
)
7995 || (MEM_P (x
) && MEM_P (exp_rtl
)
7996 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7999 /* If we reach here, it is safe. */
8004 /* Return the highest power of two that EXP is known to be a multiple of.
8005 This is used in updating alignment of MEMs in array references. */
8007 unsigned HOST_WIDE_INT
8008 highest_pow2_factor (const_tree exp
)
8010 unsigned HOST_WIDE_INT ret
;
8011 int trailing_zeros
= tree_ctz (exp
);
8012 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
8013 return BIGGEST_ALIGNMENT
;
8014 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
8015 if (ret
> BIGGEST_ALIGNMENT
)
8016 return BIGGEST_ALIGNMENT
;
8020 /* Similar, except that the alignment requirements of TARGET are
8021 taken into account. Assume it is at least as aligned as its
8022 type, unless it is a COMPONENT_REF in which case the layout of
8023 the structure gives the alignment. */
8025 static unsigned HOST_WIDE_INT
8026 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
8028 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
8029 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
8031 return MAX (factor
, talign
);
8034 /* Convert the tree comparison code TCODE to the rtl one where the
8035 signedness is UNSIGNEDP. */
8037 static enum rtx_code
8038 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
8050 code
= unsignedp
? LTU
: LT
;
8053 code
= unsignedp
? LEU
: LE
;
8056 code
= unsignedp
? GTU
: GT
;
8059 code
= unsignedp
? GEU
: GE
;
8061 case UNORDERED_EXPR
:
8092 /* Subroutine of expand_expr. Expand the two operands of a binary
8093 expression EXP0 and EXP1 placing the results in OP0 and OP1.
8094 The value may be stored in TARGET if TARGET is nonzero. The
8095 MODIFIER argument is as documented by expand_expr. */
8098 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
8099 enum expand_modifier modifier
)
8101 if (! safe_from_p (target
, exp1
, 1))
8103 if (operand_equal_p (exp0
, exp1
, 0))
8105 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8106 *op1
= copy_rtx (*op0
);
8110 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
8111 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
8116 /* Return a MEM that contains constant EXP. DEFER is as for
8117 output_constant_def and MODIFIER is as for expand_expr. */
8120 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
8124 mem
= output_constant_def (exp
, defer
);
8125 if (modifier
!= EXPAND_INITIALIZER
)
8126 mem
= use_anchored_address (mem
);
8130 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
8131 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8134 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
8135 enum expand_modifier modifier
, addr_space_t as
)
8137 rtx result
, subtarget
;
8139 poly_int64 bitsize
, bitpos
;
8140 int unsignedp
, reversep
, volatilep
= 0;
8143 /* If we are taking the address of a constant and are at the top level,
8144 we have to use output_constant_def since we can't call force_const_mem
8146 /* ??? This should be considered a front-end bug. We should not be
8147 generating ADDR_EXPR of something that isn't an LVALUE. The only
8148 exception here is STRING_CST. */
8149 if (CONSTANT_CLASS_P (exp
))
8151 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
8152 if (modifier
< EXPAND_SUM
)
8153 result
= force_operand (result
, target
);
8157 /* Everything must be something allowed by is_gimple_addressable. */
8158 switch (TREE_CODE (exp
))
8161 /* This case will happen via recursion for &a->b. */
8162 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
8166 tree tem
= TREE_OPERAND (exp
, 0);
8167 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
8168 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
8169 return expand_expr (tem
, target
, tmode
, modifier
);
8172 case TARGET_MEM_REF
:
8173 return addr_for_mem_ref (exp
, as
, true);
8176 /* Expand the initializer like constants above. */
8177 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
8179 if (modifier
< EXPAND_SUM
)
8180 result
= force_operand (result
, target
);
8184 /* The real part of the complex number is always first, therefore
8185 the address is the same as the address of the parent object. */
8188 inner
= TREE_OPERAND (exp
, 0);
8192 /* The imaginary part of the complex number is always second.
8193 The expression is therefore always offset by the size of the
8196 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
8197 inner
= TREE_OPERAND (exp
, 0);
8200 case COMPOUND_LITERAL_EXPR
:
8201 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
8202 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
8203 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
8204 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
8205 the initializers aren't gimplified. */
8206 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
8207 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
8208 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
8209 target
, tmode
, modifier
, as
);
8212 /* If the object is a DECL, then expand it for its rtl. Don't bypass
8213 expand_expr, as that can have various side effects; LABEL_DECLs for
8214 example, may not have their DECL_RTL set yet. Expand the rtl of
8215 CONSTRUCTORs too, which should yield a memory reference for the
8216 constructor's contents. Assume language specific tree nodes can
8217 be expanded in some interesting way. */
8218 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
8220 || TREE_CODE (exp
) == CONSTRUCTOR
8221 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
8223 result
= expand_expr (exp
, target
, tmode
,
8224 modifier
== EXPAND_INITIALIZER
8225 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
8227 /* If the DECL isn't in memory, then the DECL wasn't properly
8228 marked TREE_ADDRESSABLE, which will be either a front-end
8229 or a tree optimizer bug. */
8231 gcc_assert (MEM_P (result
));
8232 result
= XEXP (result
, 0);
8234 /* ??? Is this needed anymore? */
8236 TREE_USED (exp
) = 1;
8238 if (modifier
!= EXPAND_INITIALIZER
8239 && modifier
!= EXPAND_CONST_ADDRESS
8240 && modifier
!= EXPAND_SUM
)
8241 result
= force_operand (result
, target
);
8245 /* Pass FALSE as the last argument to get_inner_reference although
8246 we are expanding to RTL. The rationale is that we know how to
8247 handle "aligning nodes" here: we can just bypass them because
8248 they won't change the final object whose address will be returned
8249 (they actually exist only for that purpose). */
8250 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8251 &unsignedp
, &reversep
, &volatilep
);
8255 /* We must have made progress. */
8256 gcc_assert (inner
!= exp
);
8258 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8259 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8260 inner alignment, force the inner to be sufficiently aligned. */
8261 if (CONSTANT_CLASS_P (inner
)
8262 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8264 inner
= copy_node (inner
);
8265 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8266 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8267 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8269 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8275 if (modifier
!= EXPAND_NORMAL
)
8276 result
= force_operand (result
, NULL
);
8277 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8278 modifier
== EXPAND_INITIALIZER
8279 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8281 /* expand_expr is allowed to return an object in a mode other
8282 than TMODE. If it did, we need to convert. */
8283 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8284 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8285 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8286 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8287 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8289 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8290 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8293 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8294 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8295 1, OPTAB_LIB_WIDEN
);
8299 if (maybe_ne (bitpos
, 0))
8301 /* Someone beforehand should have rejected taking the address
8302 of an object that isn't byte-aligned. */
8303 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8304 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8305 result
= plus_constant (tmode
, result
, bytepos
);
8306 if (modifier
< EXPAND_SUM
)
8307 result
= force_operand (result
, target
);
8313 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8314 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8317 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8318 enum expand_modifier modifier
)
8320 addr_space_t as
= ADDR_SPACE_GENERIC
;
8321 scalar_int_mode address_mode
= Pmode
;
8322 scalar_int_mode pointer_mode
= ptr_mode
;
8326 /* Target mode of VOIDmode says "whatever's natural". */
8327 if (tmode
== VOIDmode
)
8328 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8330 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8332 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8333 address_mode
= targetm
.addr_space
.address_mode (as
);
8334 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8337 /* We can get called with some Weird Things if the user does silliness
8338 like "(short) &a". In that case, convert_memory_address won't do
8339 the right thing, so ignore the given target mode. */
8340 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8344 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8345 new_tmode
, modifier
, as
);
8347 /* Despite expand_expr claims concerning ignoring TMODE when not
8348 strictly convenient, stuff breaks if we don't honor it. Note
8349 that combined with the above, we only do this for pointer modes. */
8350 rmode
= GET_MODE (result
);
8351 if (rmode
== VOIDmode
)
8353 if (rmode
!= new_tmode
)
8354 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8359 /* Generate code for computing CONSTRUCTOR EXP.
8360 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8361 is TRUE, instead of creating a temporary variable in memory
8362 NULL is returned and the caller needs to handle it differently. */
8365 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8366 bool avoid_temp_mem
)
8368 tree type
= TREE_TYPE (exp
);
8369 machine_mode mode
= TYPE_MODE (type
);
8371 /* Try to avoid creating a temporary at all. This is possible
8372 if all of the initializer is zero.
8373 FIXME: try to handle all [0..255] initializers we can handle
8375 if (TREE_STATIC (exp
)
8376 && !TREE_ADDRESSABLE (exp
)
8377 && target
!= 0 && mode
== BLKmode
8378 && all_zeros_p (exp
))
8380 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8384 /* All elts simple constants => refer to a constant in memory. But
8385 if this is a non-BLKmode mode, let it store a field at a time
8386 since that should make a CONST_INT, CONST_WIDE_INT or
8387 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8388 use, it is best to store directly into the target unless the type
8389 is large enough that memcpy will be used. If we are making an
8390 initializer and all operands are constant, put it in memory as
8393 FIXME: Avoid trying to fill vector constructors piece-meal.
8394 Output them with output_constant_def below unless we're sure
8395 they're zeros. This should go away when vector initializers
8396 are treated like VECTOR_CST instead of arrays. */
8397 if ((TREE_STATIC (exp
)
8398 && ((mode
== BLKmode
8399 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8400 || TREE_ADDRESSABLE (exp
)
8401 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8402 && (! can_move_by_pieces
8403 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8405 && ! mostly_zeros_p (exp
))))
8406 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8407 && TREE_CONSTANT (exp
)))
8414 constructor
= expand_expr_constant (exp
, 1, modifier
);
8416 if (modifier
!= EXPAND_CONST_ADDRESS
8417 && modifier
!= EXPAND_INITIALIZER
8418 && modifier
!= EXPAND_SUM
)
8419 constructor
= validize_mem (constructor
);
8424 /* Handle calls that pass values in multiple non-contiguous
8425 locations. The Irix 6 ABI has examples of this. */
8426 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8427 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
8428 /* Also make a temporary if the store is to volatile memory, to
8429 avoid individual accesses to aggregate members. */
8430 || (GET_CODE (target
) == MEM
8431 && MEM_VOLATILE_P (target
)
8432 && !TREE_ADDRESSABLE (TREE_TYPE (exp
))))
8437 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8440 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8445 /* expand_expr: generate code for computing expression EXP.
8446 An rtx for the computed value is returned. The value is never null.
8447 In the case of a void EXP, const0_rtx is returned.
8449 The value may be stored in TARGET if TARGET is nonzero.
8450 TARGET is just a suggestion; callers must assume that
8451 the rtx returned may not be the same as TARGET.
8453 If TARGET is CONST0_RTX, it means that the value will be ignored.
8455 If TMODE is not VOIDmode, it suggests generating the
8456 result in mode TMODE. But this is done only when convenient.
8457 Otherwise, TMODE is ignored and the value generated in its natural mode.
8458 TMODE is just a suggestion; callers must assume that
8459 the rtx returned may not have mode TMODE.
8461 Note that TARGET may have neither TMODE nor MODE. In that case, it
8462 probably will not be used.
8464 If MODIFIER is EXPAND_SUM then when EXP is an addition
8465 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8466 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8467 products as above, or REG or MEM, or constant.
8468 Ordinarily in such cases we would output mul or add instructions
8469 and then return a pseudo reg containing the sum.
8471 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8472 it also marks a label as absolutely required (it can't be dead).
8473 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8474 This is used for outputting expressions used in initializers.
8476 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8477 with a constant address even if that address is not normally legitimate.
8478 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8480 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8481 a call parameter. Such targets require special care as we haven't yet
8482 marked TARGET so that it's safe from being trashed by libcalls. We
8483 don't want to use TARGET for anything but the final result;
8484 Intermediate values must go elsewhere. Additionally, calls to
8485 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8487 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8488 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8489 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8490 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8492 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8493 then *ALT_RTL is set to TARGET (before legitimziation).
8495 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8496 In this case, we don't adjust a returned MEM rtx that wouldn't be
8497 sufficiently aligned for its mode; instead, it's up to the caller
8498 to deal with it afterwards. This is used to make sure that unaligned
8499 base objects for which out-of-bounds accesses are supported, for
8500 example record types with trailing arrays, aren't realigned behind
8501 the back of the caller.
8502 The normal operating mode is to pass FALSE for this parameter. */
8505 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8506 enum expand_modifier modifier
, rtx
*alt_rtl
,
8507 bool inner_reference_p
)
8511 /* Handle ERROR_MARK before anybody tries to access its type. */
8512 if (TREE_CODE (exp
) == ERROR_MARK
8513 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8515 ret
= CONST0_RTX (tmode
);
8516 return ret
? ret
: const0_rtx
;
8519 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8524 /* Try to expand the conditional expression which is represented by
8525 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8526 return the rtl reg which represents the result. Otherwise return
8530 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8531 tree treeop1 ATTRIBUTE_UNUSED
,
8532 tree treeop2 ATTRIBUTE_UNUSED
)
8535 rtx op00
, op01
, op1
, op2
;
8536 enum rtx_code comparison_code
;
8537 machine_mode comparison_mode
;
8540 tree type
= TREE_TYPE (treeop1
);
8541 int unsignedp
= TYPE_UNSIGNED (type
);
8542 machine_mode mode
= TYPE_MODE (type
);
8543 machine_mode orig_mode
= mode
;
8544 static bool expanding_cond_expr_using_cmove
= false;
8546 /* Conditional move expansion can end up TERing two operands which,
8547 when recursively hitting conditional expressions can result in
8548 exponential behavior if the cmove expansion ultimatively fails.
8549 It's hardly profitable to TER a cmove into a cmove so avoid doing
8550 that by failing early if we end up recursing. */
8551 if (expanding_cond_expr_using_cmove
)
8554 /* If we cannot do a conditional move on the mode, try doing it
8555 with the promoted mode. */
8556 if (!can_conditionally_move_p (mode
))
8558 mode
= promote_mode (type
, mode
, &unsignedp
);
8559 if (!can_conditionally_move_p (mode
))
8561 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8564 temp
= assign_temp (type
, 0, 1);
8566 expanding_cond_expr_using_cmove
= true;
8568 expand_operands (treeop1
, treeop2
,
8569 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8571 if (TREE_CODE (treeop0
) == SSA_NAME
8572 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8574 type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8575 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8576 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8577 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8578 comparison_mode
= TYPE_MODE (type
);
8579 unsignedp
= TYPE_UNSIGNED (type
);
8580 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8582 else if (COMPARISON_CLASS_P (treeop0
))
8584 type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8585 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8586 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8587 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8588 unsignedp
= TYPE_UNSIGNED (type
);
8589 comparison_mode
= TYPE_MODE (type
);
8590 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8594 op00
= expand_normal (treeop0
);
8596 comparison_code
= NE
;
8597 comparison_mode
= GET_MODE (op00
);
8598 if (comparison_mode
== VOIDmode
)
8599 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8601 expanding_cond_expr_using_cmove
= false;
8603 if (GET_MODE (op1
) != mode
)
8604 op1
= gen_lowpart (mode
, op1
);
8606 if (GET_MODE (op2
) != mode
)
8607 op2
= gen_lowpart (mode
, op2
);
8609 /* Try to emit the conditional move. */
8610 insn
= emit_conditional_move (temp
, comparison_code
,
8611 op00
, op01
, comparison_mode
,
8615 /* If we could do the conditional move, emit the sequence,
8619 rtx_insn
*seq
= get_insns ();
8622 return convert_modes (orig_mode
, mode
, temp
, 0);
8625 /* Otherwise discard the sequence and fall back to code with
8631 /* A helper function for expand_expr_real_2 to be used with a
8632 misaligned mem_ref TEMP. Assume an unsigned type if UNSIGNEDP
8633 is nonzero, with alignment ALIGN in bits.
8634 Store the value at TARGET if possible (if TARGET is nonzero).
8635 Regardless of TARGET, we return the rtx for where the value is placed.
8636 If the result can be stored at TARGET, and ALT_RTL is non-NULL,
8637 then *ALT_RTL is set to TARGET (before legitimziation). */
8640 expand_misaligned_mem_ref (rtx temp
, machine_mode mode
, int unsignedp
,
8641 unsigned int align
, rtx target
, rtx
*alt_rtl
)
8643 enum insn_code icode
;
8645 if ((icode
= optab_handler (movmisalign_optab
, mode
))
8646 != CODE_FOR_nothing
)
8648 class expand_operand ops
[2];
8650 /* We've already validated the memory, and we're creating a
8651 new pseudo destination. The predicates really can't fail,
8652 nor can the generator. */
8653 create_output_operand (&ops
[0], NULL_RTX
, mode
);
8654 create_fixed_operand (&ops
[1], temp
);
8655 expand_insn (icode
, 2, ops
);
8656 temp
= ops
[0].value
;
8658 else if (targetm
.slow_unaligned_access (mode
, align
))
8659 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
8660 0, unsignedp
, target
,
8661 mode
, mode
, false, alt_rtl
);
8666 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8667 enum expand_modifier modifier
)
8669 rtx op0
, op1
, op2
, temp
;
8670 rtx_code_label
*lab
;
8674 scalar_int_mode int_mode
;
8675 enum tree_code code
= ops
->code
;
8677 rtx subtarget
, original_target
;
8679 bool reduce_bit_field
;
8680 location_t loc
= ops
->location
;
8681 tree treeop0
, treeop1
, treeop2
;
8682 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8683 ? reduce_to_bit_field_precision ((expr), \
8689 mode
= TYPE_MODE (type
);
8690 unsignedp
= TYPE_UNSIGNED (type
);
8696 /* We should be called only on simple (binary or unary) expressions,
8697 exactly those that are valid in gimple expressions that aren't
8698 GIMPLE_SINGLE_RHS (or invalid). */
8699 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8700 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8701 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8703 ignore
= (target
== const0_rtx
8704 || ((CONVERT_EXPR_CODE_P (code
)
8705 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8706 && TREE_CODE (type
) == VOID_TYPE
));
8708 /* We should be called only if we need the result. */
8709 gcc_assert (!ignore
);
8711 /* An operation in what may be a bit-field type needs the
8712 result to be reduced to the precision of the bit-field type,
8713 which is narrower than that of the type's mode. */
8714 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8715 && !type_has_mode_precision_p (type
));
8717 if (reduce_bit_field
8718 && (modifier
== EXPAND_STACK_PARM
8719 || (target
&& GET_MODE (target
) != mode
)))
8722 /* Use subtarget as the target for operand 0 of a binary operation. */
8723 subtarget
= get_subtarget (target
);
8724 original_target
= target
;
8728 case NON_LVALUE_EXPR
:
8731 if (treeop0
== error_mark_node
)
8734 if (TREE_CODE (type
) == UNION_TYPE
)
8736 tree valtype
= TREE_TYPE (treeop0
);
8738 /* If both input and output are BLKmode, this conversion isn't doing
8739 anything except possibly changing memory attribute. */
8740 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8742 rtx result
= expand_expr (treeop0
, target
, tmode
,
8745 result
= copy_rtx (result
);
8746 set_mem_attributes (result
, type
, 0);
8752 if (TYPE_MODE (type
) != BLKmode
)
8753 target
= gen_reg_rtx (TYPE_MODE (type
));
8755 target
= assign_temp (type
, 1, 1);
8759 /* Store data into beginning of memory target. */
8760 store_expr (treeop0
,
8761 adjust_address (target
, TYPE_MODE (valtype
), 0),
8762 modifier
== EXPAND_STACK_PARM
,
8763 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8767 gcc_assert (REG_P (target
)
8768 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8770 /* Store this field into a union of the proper type. */
8771 poly_uint64 op0_size
8772 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8773 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8774 store_field (target
,
8775 /* The conversion must be constructed so that
8776 we know at compile time how many bits
8778 ordered_min (op0_size
, union_size
),
8779 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8783 /* Return the entire union. */
8787 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8789 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8792 /* If the signedness of the conversion differs and OP0 is
8793 a promoted SUBREG, clear that indication since we now
8794 have to do the proper extension. */
8795 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8796 && GET_CODE (op0
) == SUBREG
)
8797 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8799 return REDUCE_BIT_FIELD (op0
);
8802 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8803 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8804 if (GET_MODE (op0
) == mode
)
8807 /* If OP0 is a constant, just convert it into the proper mode. */
8808 else if (CONSTANT_P (op0
))
8810 tree inner_type
= TREE_TYPE (treeop0
);
8811 machine_mode inner_mode
= GET_MODE (op0
);
8813 if (inner_mode
== VOIDmode
)
8814 inner_mode
= TYPE_MODE (inner_type
);
8816 if (modifier
== EXPAND_INITIALIZER
)
8817 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8819 op0
= convert_modes (mode
, inner_mode
, op0
,
8820 TYPE_UNSIGNED (inner_type
));
8823 else if (modifier
== EXPAND_INITIALIZER
)
8824 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8825 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8827 else if (target
== 0)
8828 op0
= convert_to_mode (mode
, op0
,
8829 TYPE_UNSIGNED (TREE_TYPE
8833 convert_move (target
, op0
,
8834 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8838 return REDUCE_BIT_FIELD (op0
);
8840 case ADDR_SPACE_CONVERT_EXPR
:
8842 tree treeop0_type
= TREE_TYPE (treeop0
);
8844 gcc_assert (POINTER_TYPE_P (type
));
8845 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8847 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8848 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8850 /* Conversions between pointers to the same address space should
8851 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8852 gcc_assert (as_to
!= as_from
);
8854 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8856 /* Ask target code to handle conversion between pointers
8857 to overlapping address spaces. */
8858 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8859 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8861 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8865 /* For disjoint address spaces, converting anything but a null
8866 pointer invokes undefined behavior. We truncate or extend the
8867 value as if we'd converted via integers, which handles 0 as
8868 required, and all others as the programmer likely expects. */
8869 #ifndef POINTERS_EXTEND_UNSIGNED
8870 const int POINTERS_EXTEND_UNSIGNED
= 1;
8872 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8873 op0
, POINTERS_EXTEND_UNSIGNED
);
8879 case POINTER_PLUS_EXPR
:
8880 /* Even though the sizetype mode and the pointer's mode can be different
8881 expand is able to handle this correctly and get the correct result out
8882 of the PLUS_EXPR code. */
8883 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8884 if sizetype precision is smaller than pointer precision. */
8885 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8886 treeop1
= fold_convert_loc (loc
, type
,
8887 fold_convert_loc (loc
, ssizetype
,
8889 /* If sizetype precision is larger than pointer precision, truncate the
8890 offset to have matching modes. */
8891 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8892 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8896 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8897 something else, make sure we add the register to the constant and
8898 then to the other thing. This case can occur during strength
8899 reduction and doing it this way will produce better code if the
8900 frame pointer or argument pointer is eliminated.
8902 fold-const.c will ensure that the constant is always in the inner
8903 PLUS_EXPR, so the only case we need to do anything about is if
8904 sp, ap, or fp is our second argument, in which case we must swap
8905 the innermost first argument and our second argument. */
8907 if (TREE_CODE (treeop0
) == PLUS_EXPR
8908 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8910 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8911 || DECL_RTL (treeop1
) == stack_pointer_rtx
8912 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8917 /* If the result is to be ptr_mode and we are adding an integer to
8918 something, we might be forming a constant. So try to use
8919 plus_constant. If it produces a sum and we can't accept it,
8920 use force_operand. This allows P = &ARR[const] to generate
8921 efficient code on machines where a SYMBOL_REF is not a valid
8924 If this is an EXPAND_SUM call, always return the sum. */
8925 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8926 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8928 if (modifier
== EXPAND_STACK_PARM
)
8930 if (TREE_CODE (treeop0
) == INTEGER_CST
8931 && HWI_COMPUTABLE_MODE_P (mode
)
8932 && TREE_CONSTANT (treeop1
))
8936 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8938 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8940 /* Use wi::shwi to ensure that the constant is
8941 truncated according to the mode of OP1, then sign extended
8942 to a HOST_WIDE_INT. Using the constant directly can result
8943 in non-canonical RTL in a 64x32 cross compile. */
8944 wc
= TREE_INT_CST_LOW (treeop0
);
8946 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8947 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8948 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8949 op1
= force_operand (op1
, target
);
8950 return REDUCE_BIT_FIELD (op1
);
8953 else if (TREE_CODE (treeop1
) == INTEGER_CST
8954 && HWI_COMPUTABLE_MODE_P (mode
)
8955 && TREE_CONSTANT (treeop0
))
8959 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8961 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8962 (modifier
== EXPAND_INITIALIZER
8963 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8964 if (! CONSTANT_P (op0
))
8966 op1
= expand_expr (treeop1
, NULL_RTX
,
8967 VOIDmode
, modifier
);
8968 /* Return a PLUS if modifier says it's OK. */
8969 if (modifier
== EXPAND_SUM
8970 || modifier
== EXPAND_INITIALIZER
)
8971 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8974 /* Use wi::shwi to ensure that the constant is
8975 truncated according to the mode of OP1, then sign extended
8976 to a HOST_WIDE_INT. Using the constant directly can result
8977 in non-canonical RTL in a 64x32 cross compile. */
8978 wc
= TREE_INT_CST_LOW (treeop1
);
8980 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8981 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8982 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8983 op0
= force_operand (op0
, target
);
8984 return REDUCE_BIT_FIELD (op0
);
8988 /* Use TER to expand pointer addition of a negated value
8989 as pointer subtraction. */
8990 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8991 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8992 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8993 && TREE_CODE (treeop1
) == SSA_NAME
8994 && TYPE_MODE (TREE_TYPE (treeop0
))
8995 == TYPE_MODE (TREE_TYPE (treeop1
)))
8997 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
9000 treeop1
= gimple_assign_rhs1 (def
);
9006 /* No sense saving up arithmetic to be done
9007 if it's all in the wrong mode to form part of an address.
9008 And force_operand won't know whether to sign-extend or
9010 if (modifier
!= EXPAND_INITIALIZER
9011 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
9013 expand_operands (treeop0
, treeop1
,
9014 subtarget
, &op0
, &op1
, modifier
);
9015 if (op0
== const0_rtx
)
9017 if (op1
== const0_rtx
)
9022 expand_operands (treeop0
, treeop1
,
9023 subtarget
, &op0
, &op1
, modifier
);
9024 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
9027 case POINTER_DIFF_EXPR
:
9029 /* For initializers, we are allowed to return a MINUS of two
9030 symbolic constants. Here we handle all cases when both operands
9032 /* Handle difference of two symbolic constants,
9033 for the sake of an initializer. */
9034 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
9035 && really_constant_p (treeop0
)
9036 && really_constant_p (treeop1
))
9038 expand_operands (treeop0
, treeop1
,
9039 NULL_RTX
, &op0
, &op1
, modifier
);
9040 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
9043 /* No sense saving up arithmetic to be done
9044 if it's all in the wrong mode to form part of an address.
9045 And force_operand won't know whether to sign-extend or
9047 if (modifier
!= EXPAND_INITIALIZER
9048 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
9051 expand_operands (treeop0
, treeop1
,
9052 subtarget
, &op0
, &op1
, modifier
);
9054 /* Convert A - const to A + (-const). */
9055 if (CONST_INT_P (op1
))
9057 op1
= negate_rtx (mode
, op1
);
9058 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
9063 case WIDEN_MULT_PLUS_EXPR
:
9064 case WIDEN_MULT_MINUS_EXPR
:
9065 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9066 op2
= expand_normal (treeop2
);
9067 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9071 case WIDEN_PLUS_EXPR
:
9072 case WIDEN_MINUS_EXPR
:
9073 case WIDEN_MULT_EXPR
:
9074 /* If first operand is constant, swap them.
9075 Thus the following special case checks need only
9076 check the second operand. */
9077 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9078 std::swap (treeop0
, treeop1
);
9080 /* First, check if we have a multiplication of one signed and one
9081 unsigned operand. */
9082 if (TREE_CODE (treeop1
) != INTEGER_CST
9083 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
9084 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
9086 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
9087 this_optab
= usmul_widen_optab
;
9088 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9089 != CODE_FOR_nothing
)
9091 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9092 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9095 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
9097 /* op0 and op1 might still be constant, despite the above
9098 != INTEGER_CST check. Handle it. */
9099 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9101 op0
= convert_modes (mode
, innermode
, op0
, true);
9102 op1
= convert_modes (mode
, innermode
, op1
, false);
9103 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9104 target
, unsignedp
));
9109 /* Check for a multiplication with matching signedness. */
9110 else if ((TREE_CODE (treeop1
) == INTEGER_CST
9111 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
9112 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
9113 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
9115 tree op0type
= TREE_TYPE (treeop0
);
9116 machine_mode innermode
= TYPE_MODE (op0type
);
9117 bool zextend_p
= TYPE_UNSIGNED (op0type
);
9118 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
9119 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
9121 if (TREE_CODE (treeop0
) != INTEGER_CST
)
9123 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
9124 != CODE_FOR_nothing
)
9126 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
9128 /* op0 and op1 might still be constant, despite the above
9129 != INTEGER_CST check. Handle it. */
9130 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9133 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
9135 = convert_modes (mode
, innermode
, op1
,
9136 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
9137 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
9141 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
9142 unsignedp
, this_optab
);
9143 return REDUCE_BIT_FIELD (temp
);
9145 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
9147 && innermode
== word_mode
)
9150 op0
= expand_normal (treeop0
);
9151 op1
= expand_normal (treeop1
);
9152 /* op0 and op1 might be constants, despite the above
9153 != INTEGER_CST check. Handle it. */
9154 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
9155 goto widen_mult_const
;
9156 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
9157 unsignedp
, OPTAB_LIB_WIDEN
);
9158 hipart
= gen_highpart (word_mode
, temp
);
9159 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
9163 emit_move_insn (hipart
, htem
);
9164 return REDUCE_BIT_FIELD (temp
);
9168 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
9169 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
9170 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9171 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9174 /* If this is a fixed-point operation, then we cannot use the code
9175 below because "expand_mult" doesn't support sat/no-sat fixed-point
9177 if (ALL_FIXED_POINT_MODE_P (mode
))
9180 /* If first operand is constant, swap them.
9181 Thus the following special case checks need only
9182 check the second operand. */
9183 if (TREE_CODE (treeop0
) == INTEGER_CST
)
9184 std::swap (treeop0
, treeop1
);
9186 /* Attempt to return something suitable for generating an
9187 indexed address, for machines that support that. */
9189 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
9190 && tree_fits_shwi_p (treeop1
))
9192 tree exp1
= treeop1
;
9194 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
9198 op0
= force_operand (op0
, NULL_RTX
);
9200 op0
= copy_to_mode_reg (mode
, op0
);
9202 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
9203 gen_int_mode (tree_to_shwi (exp1
),
9204 TYPE_MODE (TREE_TYPE (exp1
)))));
9207 if (modifier
== EXPAND_STACK_PARM
)
9210 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9211 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
9213 case TRUNC_MOD_EXPR
:
9214 case FLOOR_MOD_EXPR
:
9216 case ROUND_MOD_EXPR
:
9218 case TRUNC_DIV_EXPR
:
9219 case FLOOR_DIV_EXPR
:
9221 case ROUND_DIV_EXPR
:
9222 case EXACT_DIV_EXPR
:
9224 /* If this is a fixed-point operation, then we cannot use the code
9225 below because "expand_divmod" doesn't support sat/no-sat fixed-point
9227 if (ALL_FIXED_POINT_MODE_P (mode
))
9230 if (modifier
== EXPAND_STACK_PARM
)
9232 /* Possible optimization: compute the dividend with EXPAND_SUM
9233 then if the divisor is constant can optimize the case
9234 where some terms of the dividend have coeffs divisible by it. */
9235 expand_operands (treeop0
, treeop1
,
9236 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9237 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
9238 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
9239 if (SCALAR_INT_MODE_P (mode
)
9241 && get_range_pos_neg (treeop0
) == 1
9242 && get_range_pos_neg (treeop1
) == 1)
9244 /* If both arguments are known to be positive when interpreted
9245 as signed, we can expand it as both signed and unsigned
9246 division or modulo. Choose the cheaper sequence in that case. */
9247 bool speed_p
= optimize_insn_for_speed_p ();
9248 do_pending_stack_adjust ();
9250 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
9251 rtx_insn
*uns_insns
= get_insns ();
9254 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
9255 rtx_insn
*sgn_insns
= get_insns ();
9257 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
9258 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
9260 /* If costs are the same then use as tie breaker the other
9262 if (uns_cost
== sgn_cost
)
9264 uns_cost
= seq_cost (uns_insns
, !speed_p
);
9265 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9268 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9270 emit_insn (uns_insns
);
9273 emit_insn (sgn_insns
);
9276 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9281 case MULT_HIGHPART_EXPR
:
9282 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9283 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9287 case FIXED_CONVERT_EXPR
:
9288 op0
= expand_normal (treeop0
);
9289 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9290 target
= gen_reg_rtx (mode
);
9292 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9293 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9294 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9295 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9297 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9300 case FIX_TRUNC_EXPR
:
9301 op0
= expand_normal (treeop0
);
9302 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9303 target
= gen_reg_rtx (mode
);
9304 expand_fix (target
, op0
, unsignedp
);
9308 op0
= expand_normal (treeop0
);
9309 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9310 target
= gen_reg_rtx (mode
);
9311 /* expand_float can't figure out what to do if FROM has VOIDmode.
9312 So give it the correct mode. With -O, cse will optimize this. */
9313 if (GET_MODE (op0
) == VOIDmode
)
9314 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9316 expand_float (target
, op0
,
9317 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9321 op0
= expand_expr (treeop0
, subtarget
,
9322 VOIDmode
, EXPAND_NORMAL
);
9323 if (modifier
== EXPAND_STACK_PARM
)
9325 temp
= expand_unop (mode
,
9326 optab_for_tree_code (NEGATE_EXPR
, type
,
9330 return REDUCE_BIT_FIELD (temp
);
9334 op0
= expand_expr (treeop0
, subtarget
,
9335 VOIDmode
, EXPAND_NORMAL
);
9336 if (modifier
== EXPAND_STACK_PARM
)
9339 /* ABS_EXPR is not valid for complex arguments. */
9340 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9341 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9343 /* Unsigned abs is simply the operand. Testing here means we don't
9344 risk generating incorrect code below. */
9345 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9348 return expand_abs (mode
, op0
, target
, unsignedp
,
9349 safe_from_p (target
, treeop0
, 1));
9353 target
= original_target
;
9355 || modifier
== EXPAND_STACK_PARM
9356 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9357 || GET_MODE (target
) != mode
9359 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9360 target
= gen_reg_rtx (mode
);
9361 expand_operands (treeop0
, treeop1
,
9362 target
, &op0
, &op1
, EXPAND_NORMAL
);
9364 /* First try to do it with a special MIN or MAX instruction.
9365 If that does not win, use a conditional jump to select the proper
9367 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9368 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9373 if (VECTOR_TYPE_P (type
))
9376 /* At this point, a MEM target is no longer useful; we will get better
9379 if (! REG_P (target
))
9380 target
= gen_reg_rtx (mode
);
9382 /* If op1 was placed in target, swap op0 and op1. */
9383 if (target
!= op0
&& target
== op1
)
9384 std::swap (op0
, op1
);
9386 /* We generate better code and avoid problems with op1 mentioning
9387 target by forcing op1 into a pseudo if it isn't a constant. */
9388 if (! CONSTANT_P (op1
))
9389 op1
= force_reg (mode
, op1
);
9392 enum rtx_code comparison_code
;
9395 if (code
== MAX_EXPR
)
9396 comparison_code
= unsignedp
? GEU
: GE
;
9398 comparison_code
= unsignedp
? LEU
: LE
;
9400 /* Canonicalize to comparisons against 0. */
9401 if (op1
== const1_rtx
)
9403 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9404 or (a != 0 ? a : 1) for unsigned.
9405 For MIN we are safe converting (a <= 1 ? a : 1)
9406 into (a <= 0 ? a : 1) */
9407 cmpop1
= const0_rtx
;
9408 if (code
== MAX_EXPR
)
9409 comparison_code
= unsignedp
? NE
: GT
;
9411 if (op1
== constm1_rtx
&& !unsignedp
)
9413 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9414 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9415 cmpop1
= const0_rtx
;
9416 if (code
== MIN_EXPR
)
9417 comparison_code
= LT
;
9420 /* Use a conditional move if possible. */
9421 if (can_conditionally_move_p (mode
))
9427 /* Try to emit the conditional move. */
9428 insn
= emit_conditional_move (target
, comparison_code
,
9433 /* If we could do the conditional move, emit the sequence,
9437 rtx_insn
*seq
= get_insns ();
9443 /* Otherwise discard the sequence and fall back to code with
9449 emit_move_insn (target
, op0
);
9451 lab
= gen_label_rtx ();
9452 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9453 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9454 profile_probability::uninitialized ());
9456 emit_move_insn (target
, op1
);
9461 op0
= expand_expr (treeop0
, subtarget
,
9462 VOIDmode
, EXPAND_NORMAL
);
9463 if (modifier
== EXPAND_STACK_PARM
)
9465 /* In case we have to reduce the result to bitfield precision
9466 for unsigned bitfield expand this as XOR with a proper constant
9468 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9470 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9471 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9472 false, GET_MODE_PRECISION (int_mode
));
9474 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9475 immed_wide_int_const (mask
, int_mode
),
9476 target
, 1, OPTAB_LIB_WIDEN
);
9479 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9483 /* ??? Can optimize bitwise operations with one arg constant.
9484 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9485 and (a bitwise1 b) bitwise2 b (etc)
9486 but that is probably not worth while. */
9495 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9496 || type_has_mode_precision_p (type
));
9502 /* If this is a fixed-point operation, then we cannot use the code
9503 below because "expand_shift" doesn't support sat/no-sat fixed-point
9505 if (ALL_FIXED_POINT_MODE_P (mode
))
9508 if (! safe_from_p (subtarget
, treeop1
, 1))
9510 if (modifier
== EXPAND_STACK_PARM
)
9512 op0
= expand_expr (treeop0
, subtarget
,
9513 VOIDmode
, EXPAND_NORMAL
);
9515 /* Left shift optimization when shifting across word_size boundary.
9517 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9518 there isn't native instruction to support this wide mode
9519 left shift. Given below scenario:
9521 Type A = (Type) B << C
9524 | dest_high | dest_low |
9528 If the shift amount C caused we shift B to across the word
9529 size boundary, i.e part of B shifted into high half of
9530 destination register, and part of B remains in the low
9531 half, then GCC will use the following left shift expand
9534 1. Initialize dest_low to B.
9535 2. Initialize every bit of dest_high to the sign bit of B.
9536 3. Logic left shift dest_low by C bit to finalize dest_low.
9537 The value of dest_low before this shift is kept in a temp D.
9538 4. Logic left shift dest_high by C.
9539 5. Logic right shift D by (word_size - C).
9540 6. Or the result of 4 and 5 to finalize dest_high.
9542 While, by checking gimple statements, if operand B is
9543 coming from signed extension, then we can simplify above
9546 1. dest_high = src_low >> (word_size - C).
9547 2. dest_low = src_low << C.
9549 We can use one arithmetic right shift to finish all the
9550 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9551 needed from 6 into 2.
9553 The case is similar for zero extension, except that we
9554 initialize dest_high to zero rather than copies of the sign
9555 bit from B. Furthermore, we need to use a logical right shift
9558 The choice of sign-extension versus zero-extension is
9559 determined entirely by whether or not B is signed and is
9560 independent of the current setting of unsignedp. */
9563 if (code
== LSHIFT_EXPR
9566 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9568 && TREE_CONSTANT (treeop1
)
9569 && TREE_CODE (treeop0
) == SSA_NAME
)
9571 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9572 if (is_gimple_assign (def
)
9573 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9575 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9576 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9578 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9579 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9580 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9581 >= GET_MODE_BITSIZE (word_mode
)))
9583 rtx_insn
*seq
, *seq_old
;
9584 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9586 bool extend_unsigned
9587 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9588 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9589 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9590 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9591 int_mode
, high_off
);
9592 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9593 - TREE_INT_CST_LOW (treeop1
));
9594 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9597 /* dest_high = src_low >> (word_size - C). */
9598 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9601 if (temp
!= dest_high
)
9602 emit_move_insn (dest_high
, temp
);
9604 /* dest_low = src_low << C. */
9605 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9606 treeop1
, dest_low
, unsignedp
);
9607 if (temp
!= dest_low
)
9608 emit_move_insn (dest_low
, temp
);
9614 if (have_insn_for (ASHIFT
, int_mode
))
9616 bool speed_p
= optimize_insn_for_speed_p ();
9618 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9623 seq_old
= get_insns ();
9625 if (seq_cost (seq
, speed_p
)
9626 >= seq_cost (seq_old
, speed_p
))
9637 if (temp
== NULL_RTX
)
9638 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9640 if (code
== LSHIFT_EXPR
)
9641 temp
= REDUCE_BIT_FIELD (temp
);
9645 /* Could determine the answer when only additive constants differ. Also,
9646 the addition of one can be handled by changing the condition. */
9653 case UNORDERED_EXPR
:
9662 temp
= do_store_flag (ops
,
9663 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9664 tmode
!= VOIDmode
? tmode
: mode
);
9668 /* Use a compare and a jump for BLKmode comparisons, or for function
9669 type comparisons is have_canonicalize_funcptr_for_compare. */
9672 || modifier
== EXPAND_STACK_PARM
9673 || ! safe_from_p (target
, treeop0
, 1)
9674 || ! safe_from_p (target
, treeop1
, 1)
9675 /* Make sure we don't have a hard reg (such as function's return
9676 value) live across basic blocks, if not optimizing. */
9677 || (!optimize
&& REG_P (target
)
9678 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9679 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9681 emit_move_insn (target
, const0_rtx
);
9683 rtx_code_label
*lab1
= gen_label_rtx ();
9684 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9685 profile_probability::uninitialized ());
9687 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9688 emit_move_insn (target
, constm1_rtx
);
9690 emit_move_insn (target
, const1_rtx
);
9696 /* Get the rtx code of the operands. */
9697 op0
= expand_normal (treeop0
);
9698 op1
= expand_normal (treeop1
);
9701 target
= gen_reg_rtx (TYPE_MODE (type
));
9703 /* If target overlaps with op1, then either we need to force
9704 op1 into a pseudo (if target also overlaps with op0),
9705 or write the complex parts in reverse order. */
9706 switch (GET_CODE (target
))
9709 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9711 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9713 complex_expr_force_op1
:
9714 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9715 emit_move_insn (temp
, op1
);
9719 complex_expr_swap_order
:
9720 /* Move the imaginary (op1) and real (op0) parts to their
9722 write_complex_part (target
, op1
, true);
9723 write_complex_part (target
, op0
, false);
9729 temp
= adjust_address_nv (target
,
9730 GET_MODE_INNER (GET_MODE (target
)), 0);
9731 if (reg_overlap_mentioned_p (temp
, op1
))
9733 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9734 temp
= adjust_address_nv (target
, imode
,
9735 GET_MODE_SIZE (imode
));
9736 if (reg_overlap_mentioned_p (temp
, op0
))
9737 goto complex_expr_force_op1
;
9738 goto complex_expr_swap_order
;
9742 if (reg_overlap_mentioned_p (target
, op1
))
9744 if (reg_overlap_mentioned_p (target
, op0
))
9745 goto complex_expr_force_op1
;
9746 goto complex_expr_swap_order
;
9751 /* Move the real (op0) and imaginary (op1) parts to their location. */
9752 write_complex_part (target
, op0
, false);
9753 write_complex_part (target
, op1
, true);
9757 case WIDEN_SUM_EXPR
:
9759 tree oprnd0
= treeop0
;
9760 tree oprnd1
= treeop1
;
9762 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9763 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9768 case VEC_UNPACK_HI_EXPR
:
9769 case VEC_UNPACK_LO_EXPR
:
9770 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9771 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9773 op0
= expand_normal (treeop0
);
9774 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9780 case VEC_UNPACK_FLOAT_HI_EXPR
:
9781 case VEC_UNPACK_FLOAT_LO_EXPR
:
9783 op0
= expand_normal (treeop0
);
9784 /* The signedness is determined from input operand. */
9785 temp
= expand_widen_pattern_expr
9786 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9787 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9793 case VEC_WIDEN_PLUS_HI_EXPR
:
9794 case VEC_WIDEN_PLUS_LO_EXPR
:
9795 case VEC_WIDEN_MINUS_HI_EXPR
:
9796 case VEC_WIDEN_MINUS_LO_EXPR
:
9797 case VEC_WIDEN_MULT_HI_EXPR
:
9798 case VEC_WIDEN_MULT_LO_EXPR
:
9799 case VEC_WIDEN_MULT_EVEN_EXPR
:
9800 case VEC_WIDEN_MULT_ODD_EXPR
:
9801 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9802 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9803 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9804 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9806 gcc_assert (target
);
9809 case VEC_PACK_SAT_EXPR
:
9810 case VEC_PACK_FIX_TRUNC_EXPR
:
9811 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9814 case VEC_PACK_TRUNC_EXPR
:
9815 if (VECTOR_BOOLEAN_TYPE_P (type
)
9816 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
9817 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
9818 && SCALAR_INT_MODE_P (mode
))
9820 class expand_operand eops
[4];
9821 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
9822 expand_operands (treeop0
, treeop1
,
9823 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9824 this_optab
= vec_pack_sbool_trunc_optab
;
9825 enum insn_code icode
= optab_handler (this_optab
, imode
);
9826 create_output_operand (&eops
[0], target
, mode
);
9827 create_convert_operand_from (&eops
[1], op0
, imode
, false);
9828 create_convert_operand_from (&eops
[2], op1
, imode
, false);
9829 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
9830 create_input_operand (&eops
[3], temp
, imode
);
9831 expand_insn (icode
, 4, eops
);
9832 return eops
[0].value
;
9834 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9837 case VEC_PACK_FLOAT_EXPR
:
9838 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9839 expand_operands (treeop0
, treeop1
,
9840 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9841 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9843 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9844 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9846 gcc_assert (target
);
9851 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9852 vec_perm_builder sel
;
9853 if (TREE_CODE (treeop2
) == VECTOR_CST
9854 && tree_to_vec_perm_builder (&sel
, treeop2
))
9856 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9857 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9862 op2
= expand_normal (treeop2
);
9863 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9871 tree oprnd0
= treeop0
;
9872 tree oprnd1
= treeop1
;
9873 tree oprnd2
= treeop2
;
9875 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9876 op2
= expand_normal (oprnd2
);
9877 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9884 tree oprnd0
= treeop0
;
9885 tree oprnd1
= treeop1
;
9886 tree oprnd2
= treeop2
;
9888 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9889 op2
= expand_normal (oprnd2
);
9890 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9895 case REALIGN_LOAD_EXPR
:
9897 tree oprnd0
= treeop0
;
9898 tree oprnd1
= treeop1
;
9899 tree oprnd2
= treeop2
;
9901 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9902 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9903 op2
= expand_normal (oprnd2
);
9904 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9912 /* A COND_EXPR with its type being VOID_TYPE represents a
9913 conditional jump and is handled in
9914 expand_gimple_cond_expr. */
9915 gcc_assert (!VOID_TYPE_P (type
));
9917 /* Note that COND_EXPRs whose type is a structure or union
9918 are required to be constructed to contain assignments of
9919 a temporary variable, so that we can evaluate them here
9920 for side effect only. If type is void, we must do likewise. */
9922 gcc_assert (!TREE_ADDRESSABLE (type
)
9924 && TREE_TYPE (treeop1
) != void_type_node
9925 && TREE_TYPE (treeop2
) != void_type_node
);
9927 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9931 /* If we are not to produce a result, we have no target. Otherwise,
9932 if a target was specified use it; it will not be used as an
9933 intermediate target unless it is safe. If no target, use a
9936 if (modifier
!= EXPAND_STACK_PARM
9938 && safe_from_p (original_target
, treeop0
, 1)
9939 && GET_MODE (original_target
) == mode
9940 && !MEM_P (original_target
))
9941 temp
= original_target
;
9943 temp
= assign_temp (type
, 0, 1);
9945 do_pending_stack_adjust ();
9947 rtx_code_label
*lab0
= gen_label_rtx ();
9948 rtx_code_label
*lab1
= gen_label_rtx ();
9949 jumpifnot (treeop0
, lab0
,
9950 profile_probability::uninitialized ());
9951 store_expr (treeop1
, temp
,
9952 modifier
== EXPAND_STACK_PARM
,
9955 emit_jump_insn (targetm
.gen_jump (lab1
));
9958 store_expr (treeop2
, temp
,
9959 modifier
== EXPAND_STACK_PARM
,
9967 case VEC_DUPLICATE_EXPR
:
9968 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9969 target
= expand_vector_broadcast (mode
, op0
);
9970 gcc_assert (target
);
9973 case VEC_SERIES_EXPR
:
9974 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9975 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9977 case BIT_INSERT_EXPR
:
9979 unsigned bitpos
= tree_to_uhwi (treeop2
);
9981 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9982 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9984 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9985 op0
= expand_normal (treeop0
);
9986 op1
= expand_normal (treeop1
);
9987 rtx dst
= gen_reg_rtx (mode
);
9988 emit_move_insn (dst
, op0
);
9989 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9990 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9998 /* Here to do an ordinary binary operator. */
10000 expand_operands (treeop0
, treeop1
,
10001 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
10003 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
10005 if (modifier
== EXPAND_STACK_PARM
)
10007 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
10008 unsignedp
, OPTAB_LIB_WIDEN
);
10010 /* Bitwise operations do not need bitfield reduction as we expect their
10011 operands being properly truncated. */
10012 if (code
== BIT_XOR_EXPR
10013 || code
== BIT_AND_EXPR
10014 || code
== BIT_IOR_EXPR
)
10016 return REDUCE_BIT_FIELD (temp
);
10018 #undef REDUCE_BIT_FIELD
10021 /* Return TRUE if expression STMT is suitable for replacement.
10022 Never consider memory loads as replaceable, because those don't ever lead
10023 into constant expressions. */
10026 stmt_is_replaceable_p (gimple
*stmt
)
10028 if (ssa_is_replaceable_p (stmt
))
10030 /* Don't move around loads. */
10031 if (!gimple_assign_single_p (stmt
)
10032 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
10039 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
10040 enum expand_modifier modifier
, rtx
*alt_rtl
,
10041 bool inner_reference_p
)
10043 rtx op0
, op1
, temp
, decl_rtl
;
10046 machine_mode mode
, dmode
;
10047 enum tree_code code
= TREE_CODE (exp
);
10048 rtx subtarget
, original_target
;
10051 bool reduce_bit_field
;
10052 location_t loc
= EXPR_LOCATION (exp
);
10053 struct separate_ops ops
;
10054 tree treeop0
, treeop1
, treeop2
;
10055 tree ssa_name
= NULL_TREE
;
10058 type
= TREE_TYPE (exp
);
10059 mode
= TYPE_MODE (type
);
10060 unsignedp
= TYPE_UNSIGNED (type
);
10062 treeop0
= treeop1
= treeop2
= NULL_TREE
;
10063 if (!VL_EXP_CLASS_P (exp
))
10064 switch (TREE_CODE_LENGTH (code
))
10067 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
10068 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
10069 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
10077 ops
.location
= loc
;
10079 ignore
= (target
== const0_rtx
10080 || ((CONVERT_EXPR_CODE_P (code
)
10081 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
10082 && TREE_CODE (type
) == VOID_TYPE
));
10084 /* An operation in what may be a bit-field type needs the
10085 result to be reduced to the precision of the bit-field type,
10086 which is narrower than that of the type's mode. */
10087 reduce_bit_field
= (!ignore
10088 && INTEGRAL_TYPE_P (type
)
10089 && !type_has_mode_precision_p (type
));
10091 /* If we are going to ignore this result, we need only do something
10092 if there is a side-effect somewhere in the expression. If there
10093 is, short-circuit the most common cases here. Note that we must
10094 not call expand_expr with anything but const0_rtx in case this
10095 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
10099 if (! TREE_SIDE_EFFECTS (exp
))
10102 /* Ensure we reference a volatile object even if value is ignored, but
10103 don't do this if all we are doing is taking its address. */
10104 if (TREE_THIS_VOLATILE (exp
)
10105 && TREE_CODE (exp
) != FUNCTION_DECL
10106 && mode
!= VOIDmode
&& mode
!= BLKmode
10107 && modifier
!= EXPAND_CONST_ADDRESS
)
10109 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
10111 copy_to_reg (temp
);
10115 if (TREE_CODE_CLASS (code
) == tcc_unary
10116 || code
== BIT_FIELD_REF
10117 || code
== COMPONENT_REF
10118 || code
== INDIRECT_REF
)
10119 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
10122 else if (TREE_CODE_CLASS (code
) == tcc_binary
10123 || TREE_CODE_CLASS (code
) == tcc_comparison
10124 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
10126 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
10127 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
10134 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
10137 /* Use subtarget as the target for operand 0 of a binary operation. */
10138 subtarget
= get_subtarget (target
);
10139 original_target
= target
;
10145 tree function
= decl_function_context (exp
);
10147 temp
= label_rtx (exp
);
10148 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
10150 if (function
!= current_function_decl
10152 LABEL_REF_NONLOCAL_P (temp
) = 1;
10154 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
10159 /* ??? ivopts calls expander, without any preparation from
10160 out-of-ssa. So fake instructions as if this was an access to the
10161 base variable. This unnecessarily allocates a pseudo, see how we can
10162 reuse it, if partition base vars have it set already. */
10163 if (!currently_expanding_to_rtl
)
10165 tree var
= SSA_NAME_VAR (exp
);
10166 if (var
&& DECL_RTL_SET_P (var
))
10167 return DECL_RTL (var
);
10168 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
10169 LAST_VIRTUAL_REGISTER
+ 1);
10172 g
= get_gimple_for_ssa_name (exp
);
10173 /* For EXPAND_INITIALIZER try harder to get something simpler. */
10175 && modifier
== EXPAND_INITIALIZER
10176 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
10177 && (optimize
|| !SSA_NAME_VAR (exp
)
10178 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
10179 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
10180 g
= SSA_NAME_DEF_STMT (exp
);
10184 location_t saved_loc
= curr_insn_location ();
10185 loc
= gimple_location (g
);
10186 if (loc
!= UNKNOWN_LOCATION
)
10187 set_curr_insn_location (loc
);
10188 ops
.code
= gimple_assign_rhs_code (g
);
10189 switch (get_gimple_rhs_class (ops
.code
))
10191 case GIMPLE_TERNARY_RHS
:
10192 ops
.op2
= gimple_assign_rhs3 (g
);
10194 case GIMPLE_BINARY_RHS
:
10195 ops
.op1
= gimple_assign_rhs2 (g
);
10197 /* Try to expand conditonal compare. */
10198 if (targetm
.gen_ccmp_first
)
10200 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
10201 r
= expand_ccmp_expr (g
, mode
);
10206 case GIMPLE_UNARY_RHS
:
10207 ops
.op0
= gimple_assign_rhs1 (g
);
10208 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
10209 ops
.location
= loc
;
10210 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
10212 case GIMPLE_SINGLE_RHS
:
10214 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
10215 tmode
, modifier
, alt_rtl
,
10216 inner_reference_p
);
10220 gcc_unreachable ();
10222 set_curr_insn_location (saved_loc
);
10223 if (REG_P (r
) && !REG_EXPR (r
))
10224 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
10229 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
10230 exp
= SSA_NAME_VAR (ssa_name
);
10231 goto expand_decl_rtl
;
10235 /* If a static var's type was incomplete when the decl was written,
10236 but the type is complete now, lay out the decl now. */
10237 if (DECL_SIZE (exp
) == 0
10238 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
10239 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
10240 layout_decl (exp
, 0);
10244 case FUNCTION_DECL
:
10246 decl_rtl
= DECL_RTL (exp
);
10248 gcc_assert (decl_rtl
);
10250 /* DECL_MODE might change when TYPE_MODE depends on attribute target
10251 settings for VECTOR_TYPE_P that might switch for the function. */
10252 if (currently_expanding_to_rtl
10253 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
10254 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
10255 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
10257 decl_rtl
= copy_rtx (decl_rtl
);
10259 /* Record writes to register variables. */
10260 if (modifier
== EXPAND_WRITE
10261 && REG_P (decl_rtl
)
10262 && HARD_REGISTER_P (decl_rtl
))
10263 add_to_hard_reg_set (&crtl
->asm_clobbers
,
10264 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
10266 /* Ensure variable marked as used even if it doesn't go through
10267 a parser. If it hasn't be used yet, write out an external
10270 TREE_USED (exp
) = 1;
10272 /* Show we haven't gotten RTL for this yet. */
10275 /* Variables inherited from containing functions should have
10276 been lowered by this point. */
10278 context
= decl_function_context (exp
);
10280 || SCOPE_FILE_SCOPE_P (context
)
10281 || context
== current_function_decl
10282 || TREE_STATIC (exp
)
10283 || DECL_EXTERNAL (exp
)
10284 /* ??? C++ creates functions that are not TREE_STATIC. */
10285 || TREE_CODE (exp
) == FUNCTION_DECL
);
10287 /* This is the case of an array whose size is to be determined
10288 from its initializer, while the initializer is still being parsed.
10289 ??? We aren't parsing while expanding anymore. */
10291 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10292 temp
= validize_mem (decl_rtl
);
10294 /* If DECL_RTL is memory, we are in the normal case and the
10295 address is not valid, get the address into a register. */
10297 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10300 *alt_rtl
= decl_rtl
;
10301 decl_rtl
= use_anchored_address (decl_rtl
);
10302 if (modifier
!= EXPAND_CONST_ADDRESS
10303 && modifier
!= EXPAND_SUM
10304 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10305 : GET_MODE (decl_rtl
),
10306 XEXP (decl_rtl
, 0),
10307 MEM_ADDR_SPACE (decl_rtl
)))
10308 temp
= replace_equiv_address (decl_rtl
,
10309 copy_rtx (XEXP (decl_rtl
, 0)));
10312 /* If we got something, return it. But first, set the alignment
10313 if the address is a register. */
10316 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10317 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10319 else if (MEM_P (decl_rtl
))
10325 && modifier
!= EXPAND_WRITE
10326 && modifier
!= EXPAND_MEMORY
10327 && modifier
!= EXPAND_INITIALIZER
10328 && modifier
!= EXPAND_CONST_ADDRESS
10329 && modifier
!= EXPAND_SUM
10330 && !inner_reference_p
10332 && MEM_ALIGN (temp
) < GET_MODE_ALIGNMENT (mode
))
10333 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10334 MEM_ALIGN (temp
), NULL_RTX
, NULL
);
10340 dmode
= DECL_MODE (exp
);
10342 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10344 /* If the mode of DECL_RTL does not match that of the decl,
10345 there are two cases: we are dealing with a BLKmode value
10346 that is returned in a register, or we are dealing with
10347 a promoted value. In the latter case, return a SUBREG
10348 of the wanted mode, but mark it so that we know that it
10349 was already extended. */
10350 if (REG_P (decl_rtl
)
10351 && dmode
!= BLKmode
10352 && GET_MODE (decl_rtl
) != dmode
)
10354 machine_mode pmode
;
10356 /* Get the signedness to be used for this variable. Ensure we get
10357 the same mode we got when the variable was declared. */
10358 if (code
!= SSA_NAME
)
10359 pmode
= promote_decl_mode (exp
, &unsignedp
);
10360 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10361 && gimple_code (g
) == GIMPLE_CALL
10362 && !gimple_call_internal_p (g
))
10363 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10364 gimple_call_fntype (g
),
10367 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10368 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10370 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10371 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10372 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10380 /* Given that TYPE_PRECISION (type) is not always equal to
10381 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10382 the former to the latter according to the signedness of the
10384 scalar_int_mode int_mode
= SCALAR_INT_TYPE_MODE (type
);
10385 temp
= immed_wide_int_const
10386 (wi::to_wide (exp
, GET_MODE_PRECISION (int_mode
)), int_mode
);
10392 tree tmp
= NULL_TREE
;
10393 if (VECTOR_MODE_P (mode
))
10394 return const_vector_from_tree (exp
);
10395 scalar_int_mode int_mode
;
10396 if (is_int_mode (mode
, &int_mode
))
10398 tree type_for_mode
= lang_hooks
.types
.type_for_mode (int_mode
, 1);
10400 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10401 type_for_mode
, exp
);
10405 vec
<constructor_elt
, va_gc
> *v
;
10406 /* Constructors need to be fixed-length. FIXME. */
10407 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10408 vec_alloc (v
, nunits
);
10409 for (unsigned int i
= 0; i
< nunits
; ++i
)
10410 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10411 tmp
= build_constructor (type
, v
);
10413 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10418 if (modifier
== EXPAND_WRITE
)
10420 /* Writing into CONST_DECL is always invalid, but handle it
10422 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10423 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10424 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10425 EXPAND_NORMAL
, as
);
10426 op0
= memory_address_addr_space (mode
, op0
, as
);
10427 temp
= gen_rtx_MEM (mode
, op0
);
10428 set_mem_addr_space (temp
, as
);
10431 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10434 /* If optimized, generate immediate CONST_DOUBLE
10435 which will be turned into memory by reload if necessary.
10437 We used to force a register so that loop.c could see it. But
10438 this does not allow gen_* patterns to perform optimizations with
10439 the constants. It also produces two insns in cases like "x = 1.0;".
10440 On most machines, floating-point constants are not permitted in
10441 many insns, so we'd end up copying it to a register in any case.
10443 Now, we do the copying in expand_binop, if appropriate. */
10444 return const_double_from_real_value (TREE_REAL_CST (exp
),
10445 TYPE_MODE (TREE_TYPE (exp
)));
10448 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10449 TYPE_MODE (TREE_TYPE (exp
)));
10452 /* Handle evaluating a complex constant in a CONCAT target. */
10453 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10457 mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10458 rtarg
= XEXP (original_target
, 0);
10459 itarg
= XEXP (original_target
, 1);
10461 /* Move the real and imaginary parts separately. */
10462 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10463 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10466 emit_move_insn (rtarg
, op0
);
10468 emit_move_insn (itarg
, op1
);
10470 return original_target
;
10476 temp
= expand_expr_constant (exp
, 1, modifier
);
10478 /* temp contains a constant address.
10479 On RISC machines where a constant address isn't valid,
10480 make some insns to get that address into a register. */
10481 if (modifier
!= EXPAND_CONST_ADDRESS
10482 && modifier
!= EXPAND_INITIALIZER
10483 && modifier
!= EXPAND_SUM
10484 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10485 MEM_ADDR_SPACE (temp
)))
10486 return replace_equiv_address (temp
,
10487 copy_rtx (XEXP (temp
, 0)));
10491 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10495 tree val
= treeop0
;
10496 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10497 inner_reference_p
);
10499 if (!SAVE_EXPR_RESOLVED_P (exp
))
10501 /* We can indeed still hit this case, typically via builtin
10502 expanders calling save_expr immediately before expanding
10503 something. Assume this means that we only have to deal
10504 with non-BLKmode values. */
10505 gcc_assert (GET_MODE (ret
) != BLKmode
);
10507 val
= build_decl (curr_insn_location (),
10508 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10509 DECL_ARTIFICIAL (val
) = 1;
10510 DECL_IGNORED_P (val
) = 1;
10512 TREE_OPERAND (exp
, 0) = treeop0
;
10513 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10515 if (!CONSTANT_P (ret
))
10516 ret
= copy_to_reg (ret
);
10517 SET_DECL_RTL (val
, ret
);
10525 /* If we don't need the result, just ensure we evaluate any
10529 unsigned HOST_WIDE_INT idx
;
10532 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10533 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10538 return expand_constructor (exp
, target
, modifier
, false);
10540 case TARGET_MEM_REF
:
10543 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10544 unsigned int align
;
10546 op0
= addr_for_mem_ref (exp
, as
, true);
10547 op0
= memory_address_addr_space (mode
, op0
, as
);
10548 temp
= gen_rtx_MEM (mode
, op0
);
10549 set_mem_attributes (temp
, exp
, 0);
10550 set_mem_addr_space (temp
, as
);
10551 align
= get_object_alignment (exp
);
10552 if (modifier
!= EXPAND_WRITE
10553 && modifier
!= EXPAND_MEMORY
10555 && align
< GET_MODE_ALIGNMENT (mode
))
10556 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
,
10557 align
, NULL_RTX
, NULL
);
10563 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10565 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10566 machine_mode address_mode
;
10567 tree base
= TREE_OPERAND (exp
, 0);
10570 /* Handle expansion of non-aliased memory with non-BLKmode. That
10571 might end up in a register. */
10572 if (mem_ref_refers_to_non_mem_p (exp
))
10574 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10575 base
= TREE_OPERAND (base
, 0);
10576 poly_uint64 type_size
;
10577 if (known_eq (offset
, 0)
10579 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10580 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10581 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10582 target
, tmode
, modifier
);
10583 if (TYPE_MODE (type
) == BLKmode
)
10585 temp
= assign_stack_temp (DECL_MODE (base
),
10586 GET_MODE_SIZE (DECL_MODE (base
)));
10587 store_expr (base
, temp
, 0, false, false);
10588 temp
= adjust_address (temp
, BLKmode
, offset
);
10589 set_mem_size (temp
, int_size_in_bytes (type
));
10592 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10593 bitsize_int (offset
* BITS_PER_UNIT
));
10594 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10595 return expand_expr (exp
, target
, tmode
, modifier
);
10597 address_mode
= targetm
.addr_space
.address_mode (as
);
10598 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10600 tree mask
= gimple_assign_rhs2 (def_stmt
);
10601 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10602 gimple_assign_rhs1 (def_stmt
), mask
);
10603 TREE_OPERAND (exp
, 0) = base
;
10605 align
= get_object_alignment (exp
);
10606 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10607 op0
= memory_address_addr_space (mode
, op0
, as
);
10608 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10610 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10611 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10612 op0
= memory_address_addr_space (mode
, op0
, as
);
10614 temp
= gen_rtx_MEM (mode
, op0
);
10615 set_mem_attributes (temp
, exp
, 0);
10616 set_mem_addr_space (temp
, as
);
10617 if (TREE_THIS_VOLATILE (exp
))
10618 MEM_VOLATILE_P (temp
) = 1;
10619 if (modifier
!= EXPAND_WRITE
10620 && modifier
!= EXPAND_MEMORY
10621 && !inner_reference_p
10623 && align
< GET_MODE_ALIGNMENT (mode
))
10624 temp
= expand_misaligned_mem_ref (temp
, mode
, unsignedp
, align
,
10625 modifier
== EXPAND_STACK_PARM
10626 ? NULL_RTX
: target
, alt_rtl
);
10628 && modifier
!= EXPAND_MEMORY
10629 && modifier
!= EXPAND_WRITE
)
10630 temp
= flip_storage_order (mode
, temp
);
10637 tree array
= treeop0
;
10638 tree index
= treeop1
;
10641 /* Fold an expression like: "foo"[2].
10642 This is not done in fold so it won't happen inside &.
10643 Don't fold if this is for wide characters since it's too
10644 difficult to do correctly and this is a very rare case. */
10646 if (modifier
!= EXPAND_CONST_ADDRESS
10647 && modifier
!= EXPAND_INITIALIZER
10648 && modifier
!= EXPAND_MEMORY
)
10650 tree t
= fold_read_from_constant_string (exp
);
10653 return expand_expr (t
, target
, tmode
, modifier
);
10656 /* If this is a constant index into a constant array,
10657 just get the value from the array. Handle both the cases when
10658 we have an explicit constructor and when our operand is a variable
10659 that was declared const. */
10661 if (modifier
!= EXPAND_CONST_ADDRESS
10662 && modifier
!= EXPAND_INITIALIZER
10663 && modifier
!= EXPAND_MEMORY
10664 && TREE_CODE (array
) == CONSTRUCTOR
10665 && ! TREE_SIDE_EFFECTS (array
)
10666 && TREE_CODE (index
) == INTEGER_CST
)
10668 unsigned HOST_WIDE_INT ix
;
10671 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10673 if (tree_int_cst_equal (field
, index
))
10675 if (!TREE_SIDE_EFFECTS (value
))
10676 return expand_expr (fold (value
), target
, tmode
, modifier
);
10681 else if (optimize
>= 1
10682 && modifier
!= EXPAND_CONST_ADDRESS
10683 && modifier
!= EXPAND_INITIALIZER
10684 && modifier
!= EXPAND_MEMORY
10685 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10686 && TREE_CODE (index
) == INTEGER_CST
10687 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10688 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10690 if (init
== NULL_TREE
)
10692 tree value
= build_zero_cst (type
);
10693 if (TREE_CODE (value
) == CONSTRUCTOR
)
10695 /* If VALUE is a CONSTRUCTOR, this optimization is only
10696 useful if this doesn't store the CONSTRUCTOR into
10697 memory. If it does, it is more efficient to just
10698 load the data from the array directly. */
10699 rtx ret
= expand_constructor (value
, target
,
10701 if (ret
== NULL_RTX
)
10706 return expand_expr (value
, target
, tmode
, modifier
);
10708 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10710 unsigned HOST_WIDE_INT ix
;
10713 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10715 if (tree_int_cst_equal (field
, index
))
10717 if (TREE_SIDE_EFFECTS (value
))
10720 if (TREE_CODE (value
) == CONSTRUCTOR
)
10722 /* If VALUE is a CONSTRUCTOR, this
10723 optimization is only useful if
10724 this doesn't store the CONSTRUCTOR
10725 into memory. If it does, it is more
10726 efficient to just load the data from
10727 the array directly. */
10728 rtx ret
= expand_constructor (value
, target
,
10730 if (ret
== NULL_RTX
)
10735 expand_expr (fold (value
), target
, tmode
, modifier
);
10738 else if (TREE_CODE (init
) == STRING_CST
)
10740 tree low_bound
= array_ref_low_bound (exp
);
10741 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10743 /* Optimize the special case of a zero lower bound.
10745 We convert the lower bound to sizetype to avoid problems
10746 with constant folding. E.g. suppose the lower bound is
10747 1 and its mode is QI. Without the conversion
10748 (ARRAY + (INDEX - (unsigned char)1))
10750 (ARRAY + (-(unsigned char)1) + INDEX)
10752 (ARRAY + 255 + INDEX). Oops! */
10753 if (!integer_zerop (low_bound
))
10754 index1
= size_diffop_loc (loc
, index1
,
10755 fold_convert_loc (loc
, sizetype
,
10758 if (tree_fits_uhwi_p (index1
)
10759 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10761 tree char_type
= TREE_TYPE (TREE_TYPE (init
));
10762 scalar_int_mode char_mode
;
10764 if (is_int_mode (TYPE_MODE (char_type
), &char_mode
)
10765 && GET_MODE_SIZE (char_mode
) == 1)
10766 return gen_int_mode (TREE_STRING_POINTER (init
)
10767 [TREE_INT_CST_LOW (index1
)],
10773 goto normal_inner_ref
;
10775 case COMPONENT_REF
:
10776 /* If the operand is a CONSTRUCTOR, we can just extract the
10777 appropriate field if it is present. */
10778 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10780 unsigned HOST_WIDE_INT idx
;
10782 scalar_int_mode field_mode
;
10784 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10786 if (field
== treeop1
10787 /* We can normally use the value of the field in the
10788 CONSTRUCTOR. However, if this is a bitfield in
10789 an integral mode that we can fit in a HOST_WIDE_INT,
10790 we must mask only the number of bits in the bitfield,
10791 since this is done implicitly by the constructor. If
10792 the bitfield does not meet either of those conditions,
10793 we can't do this optimization. */
10794 && (! DECL_BIT_FIELD (field
)
10795 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10796 && (GET_MODE_PRECISION (field_mode
)
10797 <= HOST_BITS_PER_WIDE_INT
))))
10799 if (DECL_BIT_FIELD (field
)
10800 && modifier
== EXPAND_STACK_PARM
)
10802 op0
= expand_expr (value
, target
, tmode
, modifier
);
10803 if (DECL_BIT_FIELD (field
))
10805 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10806 scalar_int_mode imode
10807 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10809 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10811 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10813 op0
= expand_and (imode
, op0
, op1
, target
);
10817 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10819 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10821 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10829 goto normal_inner_ref
;
10831 case BIT_FIELD_REF
:
10832 case ARRAY_RANGE_REF
:
10835 machine_mode mode1
, mode2
;
10836 poly_int64 bitsize
, bitpos
, bytepos
;
10838 int reversep
, volatilep
= 0, must_force_mem
;
10840 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10841 &unsignedp
, &reversep
, &volatilep
);
10842 rtx orig_op0
, memloc
;
10843 bool clear_mem_expr
= false;
10845 /* If we got back the original object, something is wrong. Perhaps
10846 we are evaluating an expression too early. In any event, don't
10847 infinitely recurse. */
10848 gcc_assert (tem
!= exp
);
10850 /* If TEM's type is a union of variable size, pass TARGET to the inner
10851 computation, since it will need a temporary and TARGET is known
10852 to have to do. This occurs in unchecked conversion in Ada. */
10854 = expand_expr_real (tem
,
10855 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10856 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10857 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10859 && modifier
!= EXPAND_STACK_PARM
10860 ? target
: NULL_RTX
),
10862 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10865 /* If the field has a mode, we want to access it in the
10866 field's mode, not the computed mode.
10867 If a MEM has VOIDmode (external with incomplete type),
10868 use BLKmode for it instead. */
10871 if (mode1
!= VOIDmode
)
10872 op0
= adjust_address (op0
, mode1
, 0);
10873 else if (GET_MODE (op0
) == VOIDmode
)
10874 op0
= adjust_address (op0
, BLKmode
, 0);
10878 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10880 /* Make sure bitpos is not negative, it can wreak havoc later. */
10881 if (maybe_lt (bitpos
, 0))
10883 gcc_checking_assert (offset
== NULL_TREE
);
10884 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10885 bitpos
= num_trailing_bits (bitpos
);
10888 /* If we have either an offset, a BLKmode result, or a reference
10889 outside the underlying object, we must force it to memory.
10890 Such a case can occur in Ada if we have unchecked conversion
10891 of an expression from a scalar type to an aggregate type or
10892 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10893 passed a partially uninitialized object or a view-conversion
10894 to a larger size. */
10895 must_force_mem
= (offset
10896 || mode1
== BLKmode
10897 || (mode
== BLKmode
10898 && !int_mode_for_size (bitsize
, 1).exists ())
10899 || maybe_gt (bitpos
+ bitsize
,
10900 GET_MODE_BITSIZE (mode2
)));
10902 /* Handle CONCAT first. */
10903 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10905 if (known_eq (bitpos
, 0)
10906 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10907 && COMPLEX_MODE_P (mode1
)
10908 && COMPLEX_MODE_P (GET_MODE (op0
))
10909 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10910 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10913 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10914 if (mode1
!= GET_MODE (op0
))
10917 for (int i
= 0; i
< 2; i
++)
10919 rtx op
= read_complex_part (op0
, i
!= 0);
10920 if (GET_CODE (op
) == SUBREG
)
10921 op
= force_reg (GET_MODE (op
), op
);
10922 temp
= gen_lowpart_common (GET_MODE_INNER (mode1
), op
);
10927 if (!REG_P (op
) && !MEM_P (op
))
10928 op
= force_reg (GET_MODE (op
), op
);
10929 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10933 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10937 if (known_eq (bitpos
, 0)
10938 && known_eq (bitsize
,
10939 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10940 && maybe_ne (bitsize
, 0))
10942 op0
= XEXP (op0
, 0);
10943 mode2
= GET_MODE (op0
);
10945 else if (known_eq (bitpos
,
10946 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10947 && known_eq (bitsize
,
10948 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10949 && maybe_ne (bitpos
, 0)
10950 && maybe_ne (bitsize
, 0))
10952 op0
= XEXP (op0
, 1);
10954 mode2
= GET_MODE (op0
);
10957 /* Otherwise force into memory. */
10958 must_force_mem
= 1;
10961 /* If this is a constant, put it in a register if it is a legitimate
10962 constant and we don't need a memory reference. */
10963 if (CONSTANT_P (op0
)
10964 && mode2
!= BLKmode
10965 && targetm
.legitimate_constant_p (mode2
, op0
)
10966 && !must_force_mem
)
10967 op0
= force_reg (mode2
, op0
);
10969 /* Otherwise, if this is a constant, try to force it to the constant
10970 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10971 is a legitimate constant. */
10972 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10973 op0
= validize_mem (memloc
);
10975 /* Otherwise, if this is a constant or the object is not in memory
10976 and need be, put it there. */
10977 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10979 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10980 emit_move_insn (memloc
, op0
);
10982 clear_mem_expr
= true;
10987 machine_mode address_mode
;
10988 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10991 gcc_assert (MEM_P (op0
));
10993 address_mode
= get_address_mode (op0
);
10994 if (GET_MODE (offset_rtx
) != address_mode
)
10996 /* We cannot be sure that the RTL in offset_rtx is valid outside
10997 of a memory address context, so force it into a register
10998 before attempting to convert it to the desired mode. */
10999 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
11000 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
11003 /* See the comment in expand_assignment for the rationale. */
11004 if (mode1
!= VOIDmode
11005 && maybe_ne (bitpos
, 0)
11006 && maybe_gt (bitsize
, 0)
11007 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11008 && multiple_p (bitpos
, bitsize
)
11009 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
11010 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
11012 op0
= adjust_address (op0
, mode1
, bytepos
);
11016 op0
= offset_address (op0
, offset_rtx
,
11017 highest_pow2_factor (offset
));
11020 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
11021 record its alignment as BIGGEST_ALIGNMENT. */
11023 && known_eq (bitpos
, 0)
11025 && is_aligning_offset (offset
, tem
))
11026 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
11028 /* Don't forget about volatility even if this is a bitfield. */
11029 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
11031 if (op0
== orig_op0
)
11032 op0
= copy_rtx (op0
);
11034 MEM_VOLATILE_P (op0
) = 1;
11037 if (MEM_P (op0
) && TREE_CODE (tem
) == FUNCTION_DECL
)
11039 if (op0
== orig_op0
)
11040 op0
= copy_rtx (op0
);
11042 set_mem_align (op0
, BITS_PER_UNIT
);
11045 /* In cases where an aligned union has an unaligned object
11046 as a field, we might be extracting a BLKmode value from
11047 an integer-mode (e.g., SImode) object. Handle this case
11048 by doing the extract into an object as wide as the field
11049 (which we know to be the width of a basic mode), then
11050 storing into memory, and changing the mode to BLKmode. */
11051 if (mode1
== VOIDmode
11052 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
11053 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
11054 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
11055 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
11056 && modifier
!= EXPAND_CONST_ADDRESS
11057 && modifier
!= EXPAND_INITIALIZER
11058 && modifier
!= EXPAND_MEMORY
)
11059 /* If the bitfield is volatile and the bitsize
11060 is narrower than the access size of the bitfield,
11061 we need to extract bitfields from the access. */
11062 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
11063 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
11064 && mode1
!= BLKmode
11065 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
11066 /* If the field isn't aligned enough to fetch as a memref,
11067 fetch it as a bit field. */
11068 || (mode1
!= BLKmode
11070 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
11071 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
11072 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
11073 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
11074 && modifier
!= EXPAND_MEMORY
11075 && ((modifier
== EXPAND_CONST_ADDRESS
11076 || modifier
== EXPAND_INITIALIZER
)
11078 : targetm
.slow_unaligned_access (mode1
,
11080 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
11081 /* If the type and the field are a constant size and the
11082 size of the type isn't the same size as the bitfield,
11083 we must use bitfield operations. */
11084 || (known_size_p (bitsize
)
11085 && TYPE_SIZE (TREE_TYPE (exp
))
11086 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
11087 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
11090 machine_mode ext_mode
= mode
;
11092 if (ext_mode
== BLKmode
11093 && ! (target
!= 0 && MEM_P (op0
)
11095 && multiple_p (bitpos
, BITS_PER_UNIT
)))
11096 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
11098 if (ext_mode
== BLKmode
)
11101 target
= assign_temp (type
, 1, 1);
11103 /* ??? Unlike the similar test a few lines below, this one is
11104 very likely obsolete. */
11105 if (known_eq (bitsize
, 0))
11108 /* In this case, BITPOS must start at a byte boundary and
11109 TARGET, if specified, must be a MEM. */
11110 gcc_assert (MEM_P (op0
)
11111 && (!target
|| MEM_P (target
)));
11113 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
11114 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
11115 emit_block_move (target
,
11116 adjust_address (op0
, VOIDmode
, bytepos
),
11117 gen_int_mode (bytesize
, Pmode
),
11118 (modifier
== EXPAND_STACK_PARM
11119 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
11124 /* If we have nothing to extract, the result will be 0 for targets
11125 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
11126 return 0 for the sake of consistency, as reading a zero-sized
11127 bitfield is valid in Ada and the value is fully specified. */
11128 if (known_eq (bitsize
, 0))
11131 op0
= validize_mem (op0
);
11133 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
11134 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11136 /* If the result has aggregate type and the extraction is done in
11137 an integral mode, then the field may be not aligned on a byte
11138 boundary; in this case, if it has reverse storage order, it
11139 needs to be extracted as a scalar field with reverse storage
11140 order and put back into memory order afterwards. */
11141 if (AGGREGATE_TYPE_P (type
)
11142 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
11143 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
11145 gcc_checking_assert (known_ge (bitpos
, 0));
11146 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
11147 (modifier
== EXPAND_STACK_PARM
11148 ? NULL_RTX
: target
),
11149 ext_mode
, ext_mode
, reversep
, alt_rtl
);
11151 /* If the result has aggregate type and the mode of OP0 is an
11152 integral mode then, if BITSIZE is narrower than this mode
11153 and this is for big-endian data, we must put the field
11154 into the high-order bits. And we must also put it back
11155 into memory order if it has been previously reversed. */
11156 scalar_int_mode op0_mode
;
11157 if (AGGREGATE_TYPE_P (type
)
11158 && is_int_mode (GET_MODE (op0
), &op0_mode
))
11160 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
11162 gcc_checking_assert (known_le (bitsize
, size
));
11163 if (maybe_lt (bitsize
, size
)
11164 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
11165 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
11166 size
- bitsize
, op0
, 1);
11169 op0
= flip_storage_order (op0_mode
, op0
);
11172 /* If the result type is BLKmode, store the data into a temporary
11173 of the appropriate type, but with the mode corresponding to the
11174 mode for the data we have (op0's mode). */
11175 if (mode
== BLKmode
)
11178 = assign_stack_temp_for_type (ext_mode
,
11179 GET_MODE_BITSIZE (ext_mode
),
11181 emit_move_insn (new_rtx
, op0
);
11182 op0
= copy_rtx (new_rtx
);
11183 PUT_MODE (op0
, BLKmode
);
11189 /* If the result is BLKmode, use that to access the object
11191 if (mode
== BLKmode
)
11194 /* Get a reference to just this component. */
11195 bytepos
= bits_to_bytes_round_down (bitpos
);
11196 if (modifier
== EXPAND_CONST_ADDRESS
11197 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
11198 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
11200 op0
= adjust_address (op0
, mode1
, bytepos
);
11202 if (op0
== orig_op0
)
11203 op0
= copy_rtx (op0
);
11205 /* Don't set memory attributes if the base expression is
11206 SSA_NAME that got expanded as a MEM or a CONSTANT. In that case,
11207 we should just honor its original memory attributes. */
11208 if (!(TREE_CODE (tem
) == SSA_NAME
11209 && (MEM_P (orig_op0
) || CONSTANT_P (orig_op0
))))
11210 set_mem_attributes (op0
, exp
, 0);
11212 if (REG_P (XEXP (op0
, 0)))
11213 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11215 /* If op0 is a temporary because the original expressions was forced
11216 to memory, clear MEM_EXPR so that the original expression cannot
11217 be marked as addressable through MEM_EXPR of the temporary. */
11218 if (clear_mem_expr
)
11219 set_mem_expr (op0
, NULL_TREE
);
11221 MEM_VOLATILE_P (op0
) |= volatilep
;
11224 && modifier
!= EXPAND_MEMORY
11225 && modifier
!= EXPAND_WRITE
)
11226 op0
= flip_storage_order (mode1
, op0
);
11228 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
11229 || modifier
== EXPAND_CONST_ADDRESS
11230 || modifier
== EXPAND_INITIALIZER
)
11234 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
11236 convert_move (target
, op0
, unsignedp
);
11241 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
11244 /* All valid uses of __builtin_va_arg_pack () are removed during
11246 if (CALL_EXPR_VA_ARG_PACK (exp
))
11247 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
11249 tree fndecl
= get_callee_fndecl (exp
), attr
;
11252 /* Don't diagnose the error attribute in thunks, those are
11253 artificially created. */
11254 && !CALL_FROM_THUNK_P (exp
)
11255 && (attr
= lookup_attribute ("error",
11256 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11258 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11259 error ("%Kcall to %qs declared with attribute error: %s", exp
,
11260 identifier_to_locale (ident
),
11261 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11264 /* Don't diagnose the warning attribute in thunks, those are
11265 artificially created. */
11266 && !CALL_FROM_THUNK_P (exp
)
11267 && (attr
= lookup_attribute ("warning",
11268 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11270 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11271 warning_at (tree_nonartificial_location (exp
),
11272 OPT_Wattribute_warning
,
11273 "%Kcall to %qs declared with attribute warning: %s",
11274 exp
, identifier_to_locale (ident
),
11275 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11278 /* Check for a built-in function. */
11279 if (fndecl
&& fndecl_built_in_p (fndecl
))
11281 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11282 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11285 return expand_call (exp
, target
, ignore
);
11287 case VIEW_CONVERT_EXPR
:
11290 /* If we are converting to BLKmode, try to avoid an intermediate
11291 temporary by fetching an inner memory reference. */
11292 if (mode
== BLKmode
11293 && poly_int_tree_p (TYPE_SIZE (type
))
11294 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11295 && handled_component_p (treeop0
))
11297 machine_mode mode1
;
11298 poly_int64 bitsize
, bitpos
, bytepos
;
11300 int reversep
, volatilep
= 0;
11302 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11303 &unsignedp
, &reversep
, &volatilep
);
11305 /* ??? We should work harder and deal with non-zero offsets. */
11307 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11309 && known_size_p (bitsize
)
11310 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11312 /* See the normal_inner_ref case for the rationale. */
11314 = expand_expr_real (tem
,
11315 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11316 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11318 && modifier
!= EXPAND_STACK_PARM
11319 ? target
: NULL_RTX
),
11321 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11324 if (MEM_P (orig_op0
))
11328 /* Get a reference to just this component. */
11329 if (modifier
== EXPAND_CONST_ADDRESS
11330 || modifier
== EXPAND_SUM
11331 || modifier
== EXPAND_INITIALIZER
)
11332 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11334 op0
= adjust_address (op0
, mode
, bytepos
);
11336 if (op0
== orig_op0
)
11337 op0
= copy_rtx (op0
);
11339 set_mem_attributes (op0
, treeop0
, 0);
11340 if (REG_P (XEXP (op0
, 0)))
11341 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11343 MEM_VOLATILE_P (op0
) |= volatilep
;
11349 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11350 NULL
, inner_reference_p
);
11352 /* If the input and output modes are both the same, we are done. */
11353 if (mode
== GET_MODE (op0
))
11355 /* If neither mode is BLKmode, and both modes are the same size
11356 then we can use gen_lowpart. */
11357 else if (mode
!= BLKmode
11358 && GET_MODE (op0
) != BLKmode
11359 && known_eq (GET_MODE_PRECISION (mode
),
11360 GET_MODE_PRECISION (GET_MODE (op0
)))
11361 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11363 if (GET_CODE (op0
) == SUBREG
)
11364 op0
= force_reg (GET_MODE (op0
), op0
);
11365 temp
= gen_lowpart_common (mode
, op0
);
11370 if (!REG_P (op0
) && !MEM_P (op0
))
11371 op0
= force_reg (GET_MODE (op0
), op0
);
11372 op0
= gen_lowpart (mode
, op0
);
11375 /* If both types are integral, convert from one mode to the other. */
11376 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11377 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11378 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11379 /* If the output type is a bit-field type, do an extraction. */
11380 else if (reduce_bit_field
)
11381 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11382 TYPE_UNSIGNED (type
), NULL_RTX
,
11383 mode
, mode
, false, NULL
);
11384 /* As a last resort, spill op0 to memory, and reload it in a
11386 else if (!MEM_P (op0
))
11388 /* If the operand is not a MEM, force it into memory. Since we
11389 are going to be changing the mode of the MEM, don't call
11390 force_const_mem for constants because we don't allow pool
11391 constants to change mode. */
11392 tree inner_type
= TREE_TYPE (treeop0
);
11394 gcc_assert (!TREE_ADDRESSABLE (exp
));
11396 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11398 = assign_stack_temp_for_type
11399 (TYPE_MODE (inner_type
),
11400 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11402 emit_move_insn (target
, op0
);
11406 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11407 output type is such that the operand is known to be aligned, indicate
11408 that it is. Otherwise, we need only be concerned about alignment for
11409 non-BLKmode results. */
11412 enum insn_code icode
;
11414 if (modifier
!= EXPAND_WRITE
11415 && modifier
!= EXPAND_MEMORY
11416 && !inner_reference_p
11418 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11420 /* If the target does have special handling for unaligned
11421 loads of mode then use them. */
11422 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11423 != CODE_FOR_nothing
)
11427 op0
= adjust_address (op0
, mode
, 0);
11428 /* We've already validated the memory, and we're creating a
11429 new pseudo destination. The predicates really can't
11431 reg
= gen_reg_rtx (mode
);
11433 /* Nor can the insn generator. */
11434 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11438 else if (STRICT_ALIGNMENT
)
11440 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11441 poly_uint64 temp_size
= mode_size
;
11442 if (GET_MODE (op0
) != BLKmode
)
11443 temp_size
= upper_bound (temp_size
,
11444 GET_MODE_SIZE (GET_MODE (op0
)));
11446 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11447 rtx new_with_op0_mode
11448 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11450 gcc_assert (!TREE_ADDRESSABLE (exp
));
11452 if (GET_MODE (op0
) == BLKmode
)
11454 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11455 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11456 (modifier
== EXPAND_STACK_PARM
11457 ? BLOCK_OP_CALL_PARM
11458 : BLOCK_OP_NORMAL
));
11461 emit_move_insn (new_with_op0_mode
, op0
);
11467 op0
= adjust_address (op0
, mode
, 0);
11474 tree lhs
= treeop0
;
11475 tree rhs
= treeop1
;
11476 gcc_assert (ignore
);
11478 /* Check for |= or &= of a bitfield of size one into another bitfield
11479 of size 1. In this case, (unless we need the result of the
11480 assignment) we can do this more efficiently with a
11481 test followed by an assignment, if necessary.
11483 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11484 things change so we do, this code should be enhanced to
11486 if (TREE_CODE (lhs
) == COMPONENT_REF
11487 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11488 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11489 && TREE_OPERAND (rhs
, 0) == lhs
11490 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11491 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11492 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11494 rtx_code_label
*label
= gen_label_rtx ();
11495 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11496 profile_probability prob
= profile_probability::uninitialized ();
11498 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
11500 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
11501 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11503 do_pending_stack_adjust ();
11504 emit_label (label
);
11508 expand_assignment (lhs
, rhs
, false);
11513 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11515 case REALPART_EXPR
:
11516 op0
= expand_normal (treeop0
);
11517 return read_complex_part (op0
, false);
11519 case IMAGPART_EXPR
:
11520 op0
= expand_normal (treeop0
);
11521 return read_complex_part (op0
, true);
11528 /* Expanded in cfgexpand.c. */
11529 gcc_unreachable ();
11531 case TRY_CATCH_EXPR
:
11533 case EH_FILTER_EXPR
:
11534 case TRY_FINALLY_EXPR
:
11536 /* Lowered by tree-eh.c. */
11537 gcc_unreachable ();
11539 case WITH_CLEANUP_EXPR
:
11540 case CLEANUP_POINT_EXPR
:
11542 case CASE_LABEL_EXPR
:
11547 case COMPOUND_EXPR
:
11548 case PREINCREMENT_EXPR
:
11549 case PREDECREMENT_EXPR
:
11550 case POSTINCREMENT_EXPR
:
11551 case POSTDECREMENT_EXPR
:
11554 case COMPOUND_LITERAL_EXPR
:
11555 /* Lowered by gimplify.c. */
11556 gcc_unreachable ();
11559 /* Function descriptors are not valid except for as
11560 initialization constants, and should not be expanded. */
11561 gcc_unreachable ();
11563 case WITH_SIZE_EXPR
:
11564 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11565 have pulled out the size to use in whatever context it needed. */
11566 return expand_expr_real (treeop0
, original_target
, tmode
,
11567 modifier
, alt_rtl
, inner_reference_p
);
11570 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11574 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11575 signedness of TYPE), possibly returning the result in TARGET.
11576 TYPE is known to be a partial integer type. */
11578 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11580 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
11581 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11582 gcc_assert ((GET_MODE (exp
) == VOIDmode
|| GET_MODE (exp
) == mode
)
11583 && (!target
|| GET_MODE (target
) == mode
));
11585 /* For constant values, reduce using wide_int_to_tree. */
11586 if (poly_int_rtx_p (exp
))
11588 auto value
= wi::to_poly_wide (exp
, mode
);
11589 tree t
= wide_int_to_tree (type
, value
);
11590 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11592 else if (TYPE_UNSIGNED (type
))
11594 rtx mask
= immed_wide_int_const
11595 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11596 return expand_and (mode
, exp
, mask
, target
);
11600 int count
= GET_MODE_PRECISION (mode
) - prec
;
11601 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11602 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11606 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11607 when applied to the address of EXP produces an address known to be
11608 aligned more than BIGGEST_ALIGNMENT. */
11611 is_aligning_offset (const_tree offset
, const_tree exp
)
11613 /* Strip off any conversions. */
11614 while (CONVERT_EXPR_P (offset
))
11615 offset
= TREE_OPERAND (offset
, 0);
11617 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11618 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11619 if (TREE_CODE (offset
) != BIT_AND_EXPR
11620 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11621 || compare_tree_int (TREE_OPERAND (offset
, 1),
11622 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11623 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11626 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11627 It must be NEGATE_EXPR. Then strip any more conversions. */
11628 offset
= TREE_OPERAND (offset
, 0);
11629 while (CONVERT_EXPR_P (offset
))
11630 offset
= TREE_OPERAND (offset
, 0);
11632 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11635 offset
= TREE_OPERAND (offset
, 0);
11636 while (CONVERT_EXPR_P (offset
))
11637 offset
= TREE_OPERAND (offset
, 0);
11639 /* This must now be the address of EXP. */
11640 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11643 /* Return a STRING_CST corresponding to ARG's constant initializer either
11644 if it's a string constant, or, when VALREP is set, any other constant,
11646 On success, set *PTR_OFFSET to the (possibly non-constant) byte offset
11647 within the byte string that ARG is references. If nonnull set *MEM_SIZE
11648 to the size of the byte string. If nonnull, set *DECL to the constant
11649 declaration ARG refers to. */
11652 constant_byte_string (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
,
11653 bool valrep
= false)
11655 tree dummy
= NULL_TREE
;
11659 /* Store the type of the original expression before conversions
11660 via NOP_EXPR or POINTER_PLUS_EXPR to other types have been
11662 tree argtype
= TREE_TYPE (arg
);
11667 /* Non-constant index into the character array in an ARRAY_REF
11668 expression or null. */
11669 tree varidx
= NULL_TREE
;
11671 poly_int64 base_off
= 0;
11673 if (TREE_CODE (arg
) == ADDR_EXPR
)
11675 arg
= TREE_OPERAND (arg
, 0);
11677 if (TREE_CODE (arg
) == ARRAY_REF
)
11679 tree idx
= TREE_OPERAND (arg
, 1);
11680 if (TREE_CODE (idx
) != INTEGER_CST
)
11682 /* From a pointer (but not array) argument extract the variable
11683 index to prevent get_addr_base_and_unit_offset() from failing
11684 due to it. Use it later to compute the non-constant offset
11685 into the string and return it to the caller. */
11687 ref
= TREE_OPERAND (arg
, 0);
11689 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11692 if (!integer_zerop (array_ref_low_bound (arg
)))
11695 if (!integer_onep (array_ref_element_size (arg
)))
11699 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11701 || (TREE_CODE (array
) != VAR_DECL
11702 && TREE_CODE (array
) != CONST_DECL
11703 && TREE_CODE (array
) != STRING_CST
))
11706 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11708 tree arg0
= TREE_OPERAND (arg
, 0);
11709 tree arg1
= TREE_OPERAND (arg
, 1);
11712 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
11715 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
11721 /* Avoid pointers to arrays (see bug 86622). */
11722 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11723 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11724 && !(decl
&& !*decl
)
11725 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11726 && tree_fits_uhwi_p (*mem_size
)
11727 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11730 tree type
= TREE_TYPE (offset
);
11731 arg1
= fold_convert (type
, arg1
);
11732 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11737 else if (TREE_CODE (arg
) == SSA_NAME
)
11739 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
11740 if (!is_gimple_assign (stmt
))
11743 tree rhs1
= gimple_assign_rhs1 (stmt
);
11744 tree_code code
= gimple_assign_rhs_code (stmt
);
11745 if (code
== ADDR_EXPR
)
11746 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
11747 else if (code
!= POINTER_PLUS_EXPR
)
11751 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
11753 /* Avoid pointers to arrays (see bug 86622). */
11754 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
11755 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
11756 && !(decl
&& !*decl
)
11757 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11758 && tree_fits_uhwi_p (*mem_size
)
11759 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11762 tree rhs2
= gimple_assign_rhs2 (stmt
);
11763 tree type
= TREE_TYPE (offset
);
11764 rhs2
= fold_convert (type
, rhs2
);
11765 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
11770 else if (DECL_P (arg
))
11775 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11778 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11781 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11782 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11783 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11786 offset
= fold_convert (sizetype
, varidx
);
11789 if (TREE_CODE (array
) == STRING_CST
)
11791 *ptr_offset
= fold_convert (sizetype
, offset
);
11792 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11795 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
11796 >= TREE_STRING_LENGTH (array
));
11800 tree init
= ctor_for_folding (array
);
11801 if (!init
|| init
== error_mark_node
)
11806 HOST_WIDE_INT cstoff
;
11807 if (!base_off
.is_constant (&cstoff
))
11810 /* Check that the host and target are sane. */
11811 if (CHAR_BIT
!= 8 || BITS_PER_UNIT
!= 8)
11814 HOST_WIDE_INT typesz
= int_size_in_bytes (TREE_TYPE (init
));
11815 if (typesz
<= 0 || (int) typesz
!= typesz
)
11818 HOST_WIDE_INT size
= typesz
;
11820 && DECL_SIZE_UNIT (array
)
11821 && tree_fits_shwi_p (DECL_SIZE_UNIT (array
)))
11823 size
= tree_to_shwi (DECL_SIZE_UNIT (array
));
11824 gcc_checking_assert (size
>= typesz
);
11827 /* If value representation was requested convert the initializer
11828 for the whole array or object into a string of bytes forming
11829 its value representation and return it. */
11830 unsigned char *bytes
= XNEWVEC (unsigned char, size
);
11831 int r
= native_encode_initializer (init
, bytes
, size
);
11834 XDELETEVEC (bytes
);
11839 memset (bytes
+ r
, '\0', size
- r
);
11841 const char *p
= reinterpret_cast<const char *>(bytes
);
11842 init
= build_string_literal (size
, p
, char_type_node
);
11843 init
= TREE_OPERAND (init
, 0);
11844 init
= TREE_OPERAND (init
, 0);
11847 *mem_size
= size_int (TREE_STRING_LENGTH (init
));
11848 *ptr_offset
= wide_int_to_tree (ssizetype
, base_off
);
11856 if (TREE_CODE (init
) == CONSTRUCTOR
)
11858 /* Convert the 64-bit constant offset to a wider type to avoid
11859 overflow and use it to obtain the initializer for the subobject
11862 if (!base_off
.is_constant (&wioff
))
11865 wioff
*= BITS_PER_UNIT
;
11866 if (!wi::fits_uhwi_p (wioff
))
11869 base_off
= wioff
.to_uhwi ();
11870 unsigned HOST_WIDE_INT fieldoff
= 0;
11871 init
= fold_ctor_reference (TREE_TYPE (arg
), init
, base_off
, 0, array
,
11873 if (!init
|| init
== error_mark_node
)
11876 HOST_WIDE_INT cstoff
;
11877 if (!base_off
.is_constant (&cstoff
))
11880 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11881 tree off
= build_int_cst (sizetype
, cstoff
);
11883 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11888 *ptr_offset
= offset
;
11890 tree inittype
= TREE_TYPE (init
);
11892 if (TREE_CODE (init
) == INTEGER_CST
11893 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
11894 || TYPE_MAIN_VARIANT (inittype
) == char_type_node
))
11896 /* Check that the host and target are sane. */
11897 if (CHAR_BIT
!= 8 || BITS_PER_UNIT
!= 8)
11900 /* For a reference to (address of) a single constant character,
11901 store the native representation of the character in CHARBUF.
11902 If the reference is to an element of an array or a member
11903 of a struct, only consider narrow characters until ctors
11904 for wide character arrays are transformed to STRING_CSTs
11905 like those for narrow arrays. */
11906 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
11907 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
11910 /* Construct a string literal with elements of INITTYPE and
11911 the representation above. Then strip
11912 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11913 init
= build_string_literal (len
, (char *)charbuf
, inittype
);
11914 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
11918 tree initsize
= TYPE_SIZE_UNIT (inittype
);
11920 if (TREE_CODE (init
) == CONSTRUCTOR
&& initializer_zerop (init
))
11922 /* Fold an empty/zero constructor for an implicitly initialized
11923 object or subobject into the empty string. */
11925 /* Determine the character type from that of the original
11927 tree chartype
= argtype
;
11928 if (POINTER_TYPE_P (chartype
))
11929 chartype
= TREE_TYPE (chartype
);
11930 while (TREE_CODE (chartype
) == ARRAY_TYPE
)
11931 chartype
= TREE_TYPE (chartype
);
11933 if (INTEGRAL_TYPE_P (chartype
)
11934 && TYPE_PRECISION (chartype
) == TYPE_PRECISION (char_type_node
))
11936 /* Convert a char array to an empty STRING_CST having an array
11937 of the expected type and size. */
11939 initsize
= integer_zero_node
;
11941 unsigned HOST_WIDE_INT size
= tree_to_uhwi (initsize
);
11942 if (size
> (unsigned HOST_WIDE_INT
) INT_MAX
)
11945 init
= build_string_literal (size
, NULL
, chartype
, size
);
11946 init
= TREE_OPERAND (init
, 0);
11947 init
= TREE_OPERAND (init
, 0);
11949 *ptr_offset
= integer_zero_node
;
11956 if (TREE_CODE (init
) != STRING_CST
)
11959 *mem_size
= initsize
;
11961 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
11966 /* Return STRING_CST if an ARG corresponds to a string constant or zero
11967 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11968 non-constant) offset in bytes within the string that ARG is accessing.
11969 If MEM_SIZE is non-zero the storage size of the memory is returned.
11970 If DECL is non-zero the constant declaration is returned if available. */
11973 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11975 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, false);
11978 /* Similar to string_constant, return a STRING_CST corresponding
11979 to the value representation of the first argument if it's
11983 byte_representation (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11985 return constant_byte_string (arg
, ptr_offset
, mem_size
, decl
, true);
11988 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11989 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11990 for C2 > 0 to x & C3 == C2
11991 for C2 < 0 to x & C3 == (C2 & C3). */
11993 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11995 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11996 tree treeop0
= gimple_assign_rhs1 (stmt
);
11997 tree treeop1
= gimple_assign_rhs2 (stmt
);
11998 tree type
= TREE_TYPE (*arg0
);
11999 scalar_int_mode mode
;
12000 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
12002 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
12003 || TYPE_PRECISION (type
) <= 1
12004 || TYPE_UNSIGNED (type
)
12005 /* Signed x % c == 0 should have been optimized into unsigned modulo
12007 || integer_zerop (*arg1
)
12008 /* If c is known to be non-negative, modulo will be expanded as unsigned
12010 || get_range_pos_neg (treeop0
) == 1)
12013 /* x % c == d where d < 0 && d <= -c should be always false. */
12014 if (tree_int_cst_sgn (*arg1
) == -1
12015 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
12018 int prec
= TYPE_PRECISION (type
);
12019 wide_int w
= wi::to_wide (treeop1
) - 1;
12020 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
12021 tree c3
= wide_int_to_tree (type
, w
);
12023 if (tree_int_cst_sgn (*arg1
) == -1)
12024 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
12026 rtx op0
= expand_normal (treeop0
);
12027 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12029 bool speed_p
= optimize_insn_for_speed_p ();
12031 do_pending_stack_adjust ();
12033 location_t loc
= gimple_location (stmt
);
12034 struct separate_ops ops
;
12035 ops
.code
= TRUNC_MOD_EXPR
;
12036 ops
.location
= loc
;
12037 ops
.type
= TREE_TYPE (treeop0
);
12040 ops
.op2
= NULL_TREE
;
12042 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12044 rtx_insn
*moinsns
= get_insns ();
12047 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12048 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12049 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12051 ops
.code
= BIT_AND_EXPR
;
12052 ops
.location
= loc
;
12053 ops
.type
= TREE_TYPE (treeop0
);
12056 ops
.op2
= NULL_TREE
;
12058 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12060 rtx_insn
*muinsns
= get_insns ();
12063 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12064 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
12065 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
12067 if (mocost
<= mucost
)
12069 emit_insn (moinsns
);
12070 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12074 emit_insn (muinsns
);
12075 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
12080 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
12082 (X - C2) * C3 <= C4 (or >), where
12083 C3 is modular multiplicative inverse of C1 and 1<<prec and
12084 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
12085 if C2 > ((1<<prec) - 1) % C1).
12086 If C1 is even, S = ctz (C1) and C2 is 0, use
12087 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
12088 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
12090 For signed (X % C1) == 0 if C1 is odd to (all operations in it
12092 (X * C3) + C4 <= 2 * C4, where
12093 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
12094 C4 is ((1<<(prec - 1) - 1) / C1).
12095 If C1 is even, S = ctz(C1), use
12096 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
12097 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
12098 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
12100 See the Hacker's Delight book, section 10-17. */
12102 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12104 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
12105 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
12110 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
12114 tree treeop0
= gimple_assign_rhs1 (stmt
);
12115 tree treeop1
= gimple_assign_rhs2 (stmt
);
12116 if (TREE_CODE (treeop0
) != SSA_NAME
12117 || TREE_CODE (treeop1
) != INTEGER_CST
12118 /* Don't optimize the undefined behavior case x % 0;
12119 x % 1 should have been optimized into zero, punt if
12120 it makes it here for whatever reason;
12121 x % -c should have been optimized into x % c. */
12122 || compare_tree_int (treeop1
, 2) <= 0
12123 /* Likewise x % c == d where d >= c should be always false. */
12124 || tree_int_cst_le (treeop1
, *arg1
))
12127 /* Unsigned x % pow2 is handled right already, for signed
12128 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
12129 if (integer_pow2p (treeop1
))
12130 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
12132 tree type
= TREE_TYPE (*arg0
);
12133 scalar_int_mode mode
;
12134 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
12136 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
12137 || TYPE_PRECISION (type
) <= 1)
12140 signop sgn
= UNSIGNED
;
12141 /* If both operands are known to have the sign bit clear, handle
12142 even the signed modulo case as unsigned. treeop1 is always
12143 positive >= 2, checked above. */
12144 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
12147 if (!TYPE_UNSIGNED (type
))
12149 if (tree_int_cst_sgn (*arg1
) == -1)
12151 type
= unsigned_type_for (type
);
12152 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
12156 int prec
= TYPE_PRECISION (type
);
12157 wide_int w
= wi::to_wide (treeop1
);
12158 int shift
= wi::ctz (w
);
12159 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
12160 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
12161 If C1 is odd, we can handle all cases by subtracting
12162 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
12163 e.g. by testing for overflow on the subtraction, punt on that for now
12165 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
12169 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
12170 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
12174 imm_use_iterator imm_iter
;
12175 use_operand_p use_p
;
12176 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
12178 gimple
*use_stmt
= USE_STMT (use_p
);
12179 /* Punt if treeop0 is used in the same bb in a division
12180 or another modulo with the same divisor. We should expect
12181 the division and modulo combined together. */
12182 if (use_stmt
== stmt
12183 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
12185 if (!is_gimple_assign (use_stmt
)
12186 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
12187 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
12189 if (gimple_assign_rhs1 (use_stmt
) != treeop0
12190 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
12195 w
= wi::lrshift (w
, shift
);
12196 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
12197 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
12198 wide_int m
= wide_int::from (wi::mod_inv (a
, b
), prec
, UNSIGNED
);
12199 tree c3
= wide_int_to_tree (type
, m
);
12200 tree c5
= NULL_TREE
;
12202 if (sgn
== UNSIGNED
)
12204 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
12205 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
12206 otherwise use < or subtract one from C4. E.g. for
12207 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
12208 x % 3U == 1 already needs to be
12209 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
12210 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
12213 d
= wi::lrshift (d
, shift
);
12217 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
12219 d
= wi::lshift (e
, 1);
12222 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
12223 d
= wi::lrshift (e
, shift
- 1);
12225 c5
= wide_int_to_tree (type
, e
);
12227 tree c4
= wide_int_to_tree (type
, d
);
12229 rtx op0
= expand_normal (treeop0
);
12230 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
12232 bool speed_p
= optimize_insn_for_speed_p ();
12234 do_pending_stack_adjust ();
12236 location_t loc
= gimple_location (stmt
);
12237 struct separate_ops ops
;
12238 ops
.code
= TRUNC_MOD_EXPR
;
12239 ops
.location
= loc
;
12240 ops
.type
= TREE_TYPE (treeop0
);
12243 ops
.op2
= NULL_TREE
;
12245 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
12247 rtx_insn
*moinsns
= get_insns ();
12250 unsigned mocost
= seq_cost (moinsns
, speed_p
);
12251 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
12252 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
12254 tree t
= fold_convert_loc (loc
, type
, treeop0
);
12255 if (!integer_zerop (*arg1
))
12256 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
12257 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
12259 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
12262 tree s
= build_int_cst (NULL_TREE
, shift
);
12263 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
12267 rtx mur
= expand_normal (t
);
12268 rtx_insn
*muinsns
= get_insns ();
12271 unsigned mucost
= seq_cost (muinsns
, speed_p
);
12272 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
12273 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
12275 if (mocost
<= mucost
)
12277 emit_insn (moinsns
);
12278 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
12282 emit_insn (muinsns
);
12283 *arg0
= make_tree (type
, mur
);
12285 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
12288 /* Optimize x - y < 0 into x < 0 if x - y has undefined overflow. */
12291 maybe_optimize_sub_cmp_0 (enum tree_code code
, tree
*arg0
, tree
*arg1
)
12293 gcc_checking_assert (code
== GT_EXPR
|| code
== GE_EXPR
12294 || code
== LT_EXPR
|| code
== LE_EXPR
);
12295 gcc_checking_assert (integer_zerop (*arg1
));
12300 gimple
*stmt
= get_def_for_expr (*arg0
, MINUS_EXPR
);
12304 tree treeop0
= gimple_assign_rhs1 (stmt
);
12305 tree treeop1
= gimple_assign_rhs2 (stmt
);
12306 if (!TYPE_OVERFLOW_UNDEFINED (TREE_TYPE (treeop0
)))
12309 if (issue_strict_overflow_warning (WARN_STRICT_OVERFLOW_COMPARISON
))
12310 warning_at (gimple_location (stmt
), OPT_Wstrict_overflow
,
12311 "assuming signed overflow does not occur when "
12312 "simplifying %<X - Y %s 0%> to %<X %s Y%>",
12313 op_symbol_code (code
), op_symbol_code (code
));
12319 /* Generate code to calculate OPS, and exploded expression
12320 using a store-flag instruction and return an rtx for the result.
12321 OPS reflects a comparison.
12323 If TARGET is nonzero, store the result there if convenient.
12325 Return zero if there is no suitable set-flag instruction
12326 available on this machine.
12328 Once expand_expr has been called on the arguments of the comparison,
12329 we are committed to doing the store flag, since it is not safe to
12330 re-evaluate the expression. We emit the store-flag insn by calling
12331 emit_store_flag, but only expand the arguments if we have a reason
12332 to believe that emit_store_flag will be successful. If we think that
12333 it will, but it isn't, we have to simulate the store-flag with a
12334 set/jump/set sequence. */
12337 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
12339 enum rtx_code code
;
12340 tree arg0
, arg1
, type
;
12341 machine_mode operand_mode
;
12344 rtx subtarget
= target
;
12345 location_t loc
= ops
->location
;
12350 /* Don't crash if the comparison was erroneous. */
12351 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
12354 type
= TREE_TYPE (arg0
);
12355 operand_mode
= TYPE_MODE (type
);
12356 unsignedp
= TYPE_UNSIGNED (type
);
12358 /* We won't bother with BLKmode store-flag operations because it would mean
12359 passing a lot of information to emit_store_flag. */
12360 if (operand_mode
== BLKmode
)
12363 /* We won't bother with store-flag operations involving function pointers
12364 when function pointers must be canonicalized before comparisons. */
12365 if (targetm
.have_canonicalize_funcptr_for_compare ()
12366 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
12367 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
12368 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
12369 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
12375 /* For vector typed comparisons emit code to generate the desired
12376 all-ones or all-zeros mask. */
12377 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
12379 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
12380 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
12381 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
12382 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
12384 gcc_unreachable ();
12387 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12388 into (x - C2) * C3 < C4. */
12389 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
12390 && TREE_CODE (arg0
) == SSA_NAME
12391 && TREE_CODE (arg1
) == INTEGER_CST
)
12393 enum tree_code new_code
= maybe_optimize_mod_cmp (ops
->code
,
12395 if (new_code
!= ops
->code
)
12397 struct separate_ops nops
= *ops
;
12398 nops
.code
= ops
->code
= new_code
;
12401 nops
.type
= TREE_TYPE (arg0
);
12402 return do_store_flag (&nops
, target
, mode
);
12406 /* Optimize (x - y) < 0 into x < y if x - y has undefined overflow. */
12408 && (ops
->code
== LT_EXPR
|| ops
->code
== LE_EXPR
12409 || ops
->code
== GT_EXPR
|| ops
->code
== GE_EXPR
)
12410 && integer_zerop (arg1
)
12411 && TREE_CODE (arg0
) == SSA_NAME
)
12412 maybe_optimize_sub_cmp_0 (ops
->code
, &arg0
, &arg1
);
12414 /* Get the rtx comparison code to use. We know that EXP is a comparison
12415 operation of some type. Some comparisons against 1 and -1 can be
12416 converted to comparisons with zero. Do so here so that the tests
12417 below will be aware that we have a comparison with zero. These
12418 tests will not catch constants in the first operand, but constants
12419 are rarely passed as the first operand. */
12430 if (integer_onep (arg1
))
12431 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
12433 code
= unsignedp
? LTU
: LT
;
12436 if (! unsignedp
&& integer_all_onesp (arg1
))
12437 arg1
= integer_zero_node
, code
= LT
;
12439 code
= unsignedp
? LEU
: LE
;
12442 if (! unsignedp
&& integer_all_onesp (arg1
))
12443 arg1
= integer_zero_node
, code
= GE
;
12445 code
= unsignedp
? GTU
: GT
;
12448 if (integer_onep (arg1
))
12449 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
12451 code
= unsignedp
? GEU
: GE
;
12454 case UNORDERED_EXPR
:
12480 gcc_unreachable ();
12483 /* Put a constant second. */
12484 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
12485 || TREE_CODE (arg0
) == FIXED_CST
)
12487 std::swap (arg0
, arg1
);
12488 code
= swap_condition (code
);
12491 /* If this is an equality or inequality test of a single bit, we can
12492 do this by shifting the bit being tested to the low-order bit and
12493 masking the result with the constant 1. If the condition was EQ,
12494 we xor it with 1. This does not require an scc insn and is faster
12495 than an scc insn even if we have it.
12497 The code to make this transformation was moved into fold_single_bit_test,
12498 so we just call into the folder and expand its result. */
12500 if ((code
== NE
|| code
== EQ
)
12501 && integer_zerop (arg1
)
12502 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12504 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12506 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12508 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12509 type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12510 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12511 gimple_assign_rhs1 (srcstmt
),
12512 gimple_assign_rhs2 (srcstmt
));
12513 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12515 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12519 if (! get_subtarget (target
)
12520 || GET_MODE (subtarget
) != operand_mode
)
12523 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12526 target
= gen_reg_rtx (mode
);
12528 /* Try a cstore if possible. */
12529 return emit_store_flag_force (target
, code
, op0
, op1
,
12530 operand_mode
, unsignedp
,
12531 (TYPE_PRECISION (ops
->type
) == 1
12532 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12535 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12536 0 otherwise (i.e. if there is no casesi instruction).
12538 DEFAULT_PROBABILITY is the probability of jumping to the default
12541 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12542 rtx table_label
, rtx default_label
, rtx fallback_label
,
12543 profile_probability default_probability
)
12545 class expand_operand ops
[5];
12546 scalar_int_mode index_mode
= SImode
;
12547 rtx op1
, op2
, index
;
12549 if (! targetm
.have_casesi ())
12552 /* The index must be some form of integer. Convert it to SImode. */
12553 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12554 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12556 rtx rangertx
= expand_normal (range
);
12558 /* We must handle the endpoints in the original mode. */
12559 index_expr
= build2 (MINUS_EXPR
, index_type
,
12560 index_expr
, minval
);
12561 minval
= integer_zero_node
;
12562 index
= expand_normal (index_expr
);
12564 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12565 omode
, 1, default_label
,
12566 default_probability
);
12567 /* Now we can safely truncate. */
12568 index
= convert_to_mode (index_mode
, index
, 0);
12572 if (omode
!= index_mode
)
12574 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12575 index_expr
= fold_convert (index_type
, index_expr
);
12578 index
= expand_normal (index_expr
);
12581 do_pending_stack_adjust ();
12583 op1
= expand_normal (minval
);
12584 op2
= expand_normal (range
);
12586 create_input_operand (&ops
[0], index
, index_mode
);
12587 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12588 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12589 create_fixed_operand (&ops
[3], table_label
);
12590 create_fixed_operand (&ops
[4], (default_label
12592 : fallback_label
));
12593 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12597 /* Attempt to generate a tablejump instruction; same concept. */
12598 /* Subroutine of the next function.
12600 INDEX is the value being switched on, with the lowest value
12601 in the table already subtracted.
12602 MODE is its expected mode (needed if INDEX is constant).
12603 RANGE is the length of the jump table.
12604 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12606 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12607 index value is out of range.
12608 DEFAULT_PROBABILITY is the probability of jumping to
12609 the default label. */
12612 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12613 rtx default_label
, profile_probability default_probability
)
12617 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12618 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12620 /* Do an unsigned comparison (in the proper mode) between the index
12621 expression and the value which represents the length of the range.
12622 Since we just finished subtracting the lower bound of the range
12623 from the index expression, this comparison allows us to simultaneously
12624 check that the original index expression value is both greater than
12625 or equal to the minimum value of the range and less than or equal to
12626 the maximum value of the range. */
12629 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12630 default_label
, default_probability
);
12632 /* If index is in range, it must fit in Pmode.
12633 Convert to Pmode so we can index with it. */
12636 unsigned int width
;
12638 /* We know the value of INDEX is between 0 and RANGE. If we have a
12639 sign-extended subreg, and RANGE does not have the sign bit set, then
12640 we have a value that is valid for both sign and zero extension. In
12641 this case, we get better code if we sign extend. */
12642 if (GET_CODE (index
) == SUBREG
12643 && SUBREG_PROMOTED_VAR_P (index
)
12644 && SUBREG_PROMOTED_SIGNED_P (index
)
12645 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12646 <= HOST_BITS_PER_WIDE_INT
)
12647 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12648 index
= convert_to_mode (Pmode
, index
, 0);
12650 index
= convert_to_mode (Pmode
, index
, 1);
12653 /* Don't let a MEM slip through, because then INDEX that comes
12654 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12655 and break_out_memory_refs will go to work on it and mess it up. */
12656 #ifdef PIC_CASE_VECTOR_ADDRESS
12657 if (flag_pic
&& !REG_P (index
))
12658 index
= copy_to_mode_reg (Pmode
, index
);
12661 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12662 GET_MODE_SIZE, because this indicates how large insns are. The other
12663 uses should all be Pmode, because they are addresses. This code
12664 could fail if addresses and insns are not the same size. */
12665 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12666 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12668 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12669 gen_rtx_LABEL_REF (Pmode
, table_label
));
12671 #ifdef PIC_CASE_VECTOR_ADDRESS
12673 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12676 index
= memory_address (CASE_VECTOR_MODE
, index
);
12677 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12678 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12679 convert_move (temp
, vector
, 0);
12681 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12683 /* If we are generating PIC code or if the table is PC-relative, the
12684 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12685 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12690 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12691 rtx table_label
, rtx default_label
,
12692 profile_probability default_probability
)
12696 if (! targetm
.have_tablejump ())
12699 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12700 fold_convert (index_type
, index_expr
),
12701 fold_convert (index_type
, minval
));
12702 index
= expand_normal (index_expr
);
12703 do_pending_stack_adjust ();
12705 do_tablejump (index
, TYPE_MODE (index_type
),
12706 convert_modes (TYPE_MODE (index_type
),
12707 TYPE_MODE (TREE_TYPE (range
)),
12708 expand_normal (range
),
12709 TYPE_UNSIGNED (TREE_TYPE (range
))),
12710 table_label
, default_label
, default_probability
);
12714 /* Return a CONST_VECTOR rtx representing vector mask for
12715 a VECTOR_CST of booleans. */
12717 const_vector_mask_from_tree (tree exp
)
12719 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12720 machine_mode inner
= GET_MODE_INNER (mode
);
12722 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12723 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12724 unsigned int count
= builder
.encoded_nelts ();
12725 for (unsigned int i
= 0; i
< count
; ++i
)
12727 tree elt
= VECTOR_CST_ELT (exp
, i
);
12728 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12729 if (integer_zerop (elt
))
12730 builder
.quick_push (CONST0_RTX (inner
));
12731 else if (integer_onep (elt
)
12732 || integer_minus_onep (elt
))
12733 builder
.quick_push (CONSTM1_RTX (inner
));
12735 gcc_unreachable ();
12737 return builder
.build ();
12740 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12742 const_vector_from_tree (tree exp
)
12744 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12746 if (initializer_zerop (exp
))
12747 return CONST0_RTX (mode
);
12749 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12750 return const_vector_mask_from_tree (exp
);
12752 machine_mode inner
= GET_MODE_INNER (mode
);
12754 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12755 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12756 unsigned int count
= builder
.encoded_nelts ();
12757 for (unsigned int i
= 0; i
< count
; ++i
)
12759 tree elt
= VECTOR_CST_ELT (exp
, i
);
12760 if (TREE_CODE (elt
) == REAL_CST
)
12761 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12763 else if (TREE_CODE (elt
) == FIXED_CST
)
12764 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12767 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12770 return builder
.build ();
12773 /* Build a decl for a personality function given a language prefix. */
12776 build_personality_function (const char *lang
)
12778 const char *unwind_and_version
;
12782 switch (targetm_common
.except_unwind_info (&global_options
))
12787 unwind_and_version
= "_sj0";
12791 unwind_and_version
= "_v0";
12794 unwind_and_version
= "_seh0";
12797 gcc_unreachable ();
12800 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12802 type
= build_function_type_list (unsigned_type_node
,
12803 integer_type_node
, integer_type_node
,
12804 long_long_unsigned_type_node
,
12805 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12806 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12807 get_identifier (name
), type
);
12808 DECL_ARTIFICIAL (decl
) = 1;
12809 DECL_EXTERNAL (decl
) = 1;
12810 TREE_PUBLIC (decl
) = 1;
12812 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12813 are the flags assigned by targetm.encode_section_info. */
12814 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12819 /* Extracts the personality function of DECL and returns the corresponding
12823 get_personality_function (tree decl
)
12825 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12826 enum eh_personality_kind pk
;
12828 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12829 if (pk
== eh_personality_none
)
12833 && pk
== eh_personality_any
)
12834 personality
= lang_hooks
.eh_personality ();
12836 if (pk
== eh_personality_lang
)
12837 gcc_assert (personality
!= NULL_TREE
);
12839 return XEXP (DECL_RTL (personality
), 0);
12842 /* Returns a tree for the size of EXP in bytes. */
12845 tree_expr_size (const_tree exp
)
12848 && DECL_SIZE_UNIT (exp
) != 0)
12849 return DECL_SIZE_UNIT (exp
);
12851 return size_in_bytes (TREE_TYPE (exp
));
12854 /* Return an rtx for the size in bytes of the value of EXP. */
12857 expr_size (tree exp
)
12861 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12862 size
= TREE_OPERAND (exp
, 1);
12865 size
= tree_expr_size (exp
);
12867 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12870 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12873 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12874 if the size can vary or is larger than an integer. */
12876 static HOST_WIDE_INT
12877 int_expr_size (tree exp
)
12881 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12882 size
= TREE_OPERAND (exp
, 1);
12885 size
= tree_expr_size (exp
);
12889 if (size
== 0 || !tree_fits_shwi_p (size
))
12892 return tree_to_shwi (size
);