1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num
= 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num
;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num
;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers
;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl
[GR_MAX
];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
101 REAL_VALUE_TYPE dconst0
;
102 REAL_VALUE_TYPE dconst1
;
103 REAL_VALUE_TYPE dconst2
;
104 REAL_VALUE_TYPE dconstm1
;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab
;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn
;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 static rtx make_jump_insn_raw
PARAMS ((rtx
));
174 static rtx make_call_insn_raw
PARAMS ((rtx
));
175 static rtx find_line_note
PARAMS ((rtx
));
176 static void mark_sequence_stack
PARAMS ((struct sequence_stack
*));
177 static void unshare_all_rtl_1
PARAMS ((rtx
));
178 static void unshare_all_decls
PARAMS ((tree
));
179 static void reset_used_decls
PARAMS ((tree
));
180 static void mark_label_nuses
PARAMS ((rtx
));
181 static hashval_t const_int_htab_hash
PARAMS ((const void *));
182 static int const_int_htab_eq
PARAMS ((const void *,
184 static int rtx_htab_mark_1
PARAMS ((void **, void *));
185 static void rtx_htab_mark
PARAMS ((void *));
188 /* Returns a hash code for X (which is a really a CONST_INT). */
191 const_int_htab_hash (x
)
194 return (hashval_t
) INTVAL ((const struct rtx_def
*) x
);
197 /* Returns non-zero if the value represented by X (which is really a
198 CONST_INT) is the same as that given by Y (which is really a
202 const_int_htab_eq (x
, y
)
206 return (INTVAL ((const struct rtx_def
*) x
) == *((const HOST_WIDE_INT
*) y
));
209 /* Mark the hash-table element X (which is really a pointer to an
213 rtx_htab_mark_1 (x
, data
)
215 void *data ATTRIBUTE_UNUSED
;
221 /* Mark all the elements of HTAB (which is really an htab_t full of
228 htab_traverse (*((htab_t
*) htab
), rtx_htab_mark_1
, NULL
);
231 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
232 don't attempt to share with the various global pieces of rtl (such as
233 frame_pointer_rtx). */
236 gen_raw_REG (mode
, regno
)
237 enum machine_mode mode
;
240 rtx x
= gen_rtx_raw_REG (mode
, regno
);
241 ORIGINAL_REGNO (x
) = regno
;
245 /* There are some RTL codes that require special attention; the generation
246 functions do the raw handling. If you add to this list, modify
247 special_rtx in gengenrtl.c as well. */
250 gen_rtx_CONST_INT (mode
, arg
)
251 enum machine_mode mode ATTRIBUTE_UNUSED
;
256 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
257 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
261 return const_true_rtx
;
264 /* Look up the CONST_INT in the hash table. */
265 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
266 (hashval_t
) arg
, INSERT
);
268 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
273 /* CONST_DOUBLEs needs special handling because their length is known
277 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
)
278 enum machine_mode mode
;
280 HOST_WIDE_INT arg1
, arg2
;
282 rtx r
= rtx_alloc (CONST_DOUBLE
);
287 X0EXP (r
, 1) = NULL_RTX
;
291 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 3; --i
)
298 gen_rtx_REG (mode
, regno
)
299 enum machine_mode mode
;
302 /* In case the MD file explicitly references the frame pointer, have
303 all such references point to the same frame pointer. This is
304 used during frame pointer elimination to distinguish the explicit
305 references to these registers from pseudos that happened to be
308 If we have eliminated the frame pointer or arg pointer, we will
309 be using it as a normal register, for example as a spill
310 register. In such cases, we might be accessing it in a mode that
311 is not Pmode and therefore cannot use the pre-allocated rtx.
313 Also don't do this when we are making new REGs in reload, since
314 we don't want to get confused with the real pointers. */
316 if (mode
== Pmode
&& !reload_in_progress
)
318 if (regno
== FRAME_POINTER_REGNUM
)
319 return frame_pointer_rtx
;
320 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
321 if (regno
== HARD_FRAME_POINTER_REGNUM
)
322 return hard_frame_pointer_rtx
;
324 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
325 if (regno
== ARG_POINTER_REGNUM
)
326 return arg_pointer_rtx
;
328 #ifdef RETURN_ADDRESS_POINTER_REGNUM
329 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
330 return return_address_pointer_rtx
;
332 if (regno
== STACK_POINTER_REGNUM
)
333 return stack_pointer_rtx
;
336 return gen_raw_REG (mode
, regno
);
340 gen_rtx_MEM (mode
, addr
)
341 enum machine_mode mode
;
344 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
346 /* This field is not cleared by the mere allocation of the rtx, so
348 MEM_ALIAS_SET (rt
) = 0;
354 gen_rtx_SUBREG (mode
, reg
, offset
)
355 enum machine_mode mode
;
359 /* This is the most common failure type.
360 Catch it early so we can see who does it. */
361 if ((offset
% GET_MODE_SIZE (mode
)) != 0)
364 /* This check isn't usable right now because combine will
365 throw arbitrary crap like a CALL into a SUBREG in
366 gen_lowpart_for_combine so we must just eat it. */
368 /* Check for this too. */
369 if (offset
>= GET_MODE_SIZE (GET_MODE (reg
)))
372 return gen_rtx_fmt_ei (SUBREG
, mode
, reg
, offset
);
375 /* Generate a SUBREG representing the least-significant part
376 * of REG if MODE is smaller than mode of REG, otherwise
377 * paradoxical SUBREG. */
379 gen_lowpart_SUBREG (mode
, reg
)
380 enum machine_mode mode
;
383 enum machine_mode inmode
;
385 inmode
= GET_MODE (reg
);
386 if (inmode
== VOIDmode
)
388 return gen_rtx_SUBREG (mode
, reg
,
389 subreg_lowpart_offset (mode
, inmode
));
392 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
394 ** This routine generates an RTX of the size specified by
395 ** <code>, which is an RTX code. The RTX structure is initialized
396 ** from the arguments <element1> through <elementn>, which are
397 ** interpreted according to the specific RTX type's format. The
398 ** special machine mode associated with the rtx (if any) is specified
401 ** gen_rtx can be invoked in a way which resembles the lisp-like
402 ** rtx it will generate. For example, the following rtx structure:
404 ** (plus:QI (mem:QI (reg:SI 1))
405 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
407 ** ...would be generated by the following C code:
409 ** gen_rtx (PLUS, QImode,
410 ** gen_rtx (MEM, QImode,
411 ** gen_rtx (REG, SImode, 1)),
412 ** gen_rtx (MEM, QImode,
413 ** gen_rtx (PLUS, SImode,
414 ** gen_rtx (REG, SImode, 2),
415 ** gen_rtx (REG, SImode, 3)))),
420 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
422 #ifndef ANSI_PROTOTYPES
424 enum machine_mode mode
;
427 register int i
; /* Array indices... */
428 register const char *fmt
; /* Current rtx's format... */
429 register rtx rt_val
; /* RTX to return to caller... */
433 #ifndef ANSI_PROTOTYPES
434 code
= va_arg (p
, enum rtx_code
);
435 mode
= va_arg (p
, enum machine_mode
);
441 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
446 rtx arg0
= va_arg (p
, rtx
);
447 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
448 HOST_WIDE_INT arg2
= va_arg (p
, HOST_WIDE_INT
);
449 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
);
454 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
458 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
462 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
463 rt_val
->mode
= mode
; /* Store the machine mode... */
465 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
466 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
470 case '0': /* Unused field. */
473 case 'i': /* An integer? */
474 XINT (rt_val
, i
) = va_arg (p
, int);
477 case 'w': /* A wide integer? */
478 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
481 case 's': /* A string? */
482 XSTR (rt_val
, i
) = va_arg (p
, char *);
485 case 'e': /* An expression? */
486 case 'u': /* An insn? Same except when printing. */
487 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
490 case 'E': /* An RTX vector? */
491 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
494 case 'b': /* A bitmap? */
495 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
498 case 't': /* A tree? */
499 XTREE (rt_val
, i
) = va_arg (p
, tree
);
513 /* gen_rtvec (n, [rt1, ..., rtn])
515 ** This routine creates an rtvec and stores within it the
516 ** pointers to rtx's which are its arguments.
521 gen_rtvec
VPARAMS ((int n
, ...))
523 #ifndef ANSI_PROTOTYPES
532 #ifndef ANSI_PROTOTYPES
537 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
539 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
541 for (i
= 0; i
< n
; i
++)
542 vector
[i
] = va_arg (p
, rtx
);
545 return gen_rtvec_v (n
, vector
);
549 gen_rtvec_v (n
, argp
)
554 register rtvec rt_val
;
557 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
559 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
561 for (i
= 0; i
< n
; i
++)
562 rt_val
->elem
[i
] = *argp
++;
568 /* Generate a REG rtx for a new pseudo register of mode MODE.
569 This pseudo is assigned the next sequential register number. */
573 enum machine_mode mode
;
575 struct function
*f
= cfun
;
578 /* Don't let anything called after initial flow analysis create new
583 if (generating_concat_p
584 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
585 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
587 /* For complex modes, don't make a single pseudo.
588 Instead, make a CONCAT of two pseudos.
589 This allows noncontiguous allocation of the real and imaginary parts,
590 which makes much better code. Besides, allocating DCmode
591 pseudos overstrains reload on some machines like the 386. */
592 rtx realpart
, imagpart
;
593 int size
= GET_MODE_UNIT_SIZE (mode
);
594 enum machine_mode partmode
595 = mode_for_size (size
* BITS_PER_UNIT
,
596 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
597 ? MODE_FLOAT
: MODE_INT
),
600 realpart
= gen_reg_rtx (partmode
);
601 imagpart
= gen_reg_rtx (partmode
);
602 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
605 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
606 to have an element for this pseudo reg number. */
608 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
610 int old_size
= f
->emit
->regno_pointer_align_length
;
613 new = xrealloc (f
->emit
->regno_pointer_align
, old_size
* 2);
614 memset (new + old_size
, 0, old_size
);
615 f
->emit
->regno_pointer_align
= (unsigned char *) new;
617 new1
= (rtx
*) xrealloc (f
->emit
->x_regno_reg_rtx
,
618 old_size
* 2 * sizeof (rtx
));
619 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
620 regno_reg_rtx
= new1
;
622 f
->emit
->regno_pointer_align_length
= old_size
* 2;
625 val
= gen_raw_REG (mode
, reg_rtx_no
);
626 regno_reg_rtx
[reg_rtx_no
++] = val
;
630 /* Identify REG (which may be a CONCAT) as a user register. */
636 if (GET_CODE (reg
) == CONCAT
)
638 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
639 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
641 else if (GET_CODE (reg
) == REG
)
642 REG_USERVAR_P (reg
) = 1;
647 /* Identify REG as a probable pointer register and show its alignment
648 as ALIGN, if nonzero. */
651 mark_reg_pointer (reg
, align
)
655 if (! REG_POINTER (reg
))
657 REG_POINTER (reg
) = 1;
660 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
662 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
663 /* We can no-longer be sure just how aligned this pointer is */
664 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
667 /* Return 1 plus largest pseudo reg number used in the current function. */
675 /* Return 1 + the largest label number used so far in the current function. */
680 if (last_label_num
&& label_num
== base_label_num
)
681 return last_label_num
;
685 /* Return first label number used in this function (if any were used). */
688 get_first_label_num ()
690 return first_label_num
;
693 /* Return the final regno of X, which is a SUBREG of a hard
696 subreg_hard_regno (x
, check_mode
)
700 enum machine_mode mode
= GET_MODE (x
);
701 unsigned int byte_offset
, base_regno
, final_regno
;
702 rtx reg
= SUBREG_REG (x
);
704 /* This is where we attempt to catch illegal subregs
705 created by the compiler. */
706 if (GET_CODE (x
) != SUBREG
707 || GET_CODE (reg
) != REG
)
709 base_regno
= REGNO (reg
);
710 if (base_regno
>= FIRST_PSEUDO_REGISTER
)
712 if (check_mode
&& ! HARD_REGNO_MODE_OK (base_regno
, GET_MODE (reg
)))
715 /* Catch non-congruent offsets too. */
716 byte_offset
= SUBREG_BYTE (x
);
717 if ((byte_offset
% GET_MODE_SIZE (mode
)) != 0)
720 final_regno
= subreg_regno (x
);
725 /* Return a value representing some low-order bits of X, where the number
726 of low-order bits is given by MODE. Note that no conversion is done
727 between floating-point and fixed-point values, rather, the bit
728 representation is returned.
730 This function handles the cases in common between gen_lowpart, below,
731 and two variants in cse.c and combine.c. These are the cases that can
732 be safely handled at all points in the compilation.
734 If this is not a case we can handle, return 0. */
737 gen_lowpart_common (mode
, x
)
738 enum machine_mode mode
;
741 int msize
= GET_MODE_SIZE (mode
);
742 int xsize
= GET_MODE_SIZE (GET_MODE (x
));
745 if (GET_MODE (x
) == mode
)
748 /* MODE must occupy no more words than the mode of X. */
749 if (GET_MODE (x
) != VOIDmode
750 && ((msize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
751 > ((xsize
+ (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
754 offset
= subreg_lowpart_offset (mode
, GET_MODE (x
));
756 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
757 && (GET_MODE_CLASS (mode
) == MODE_INT
758 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
760 /* If we are getting the low-order part of something that has been
761 sign- or zero-extended, we can either just use the object being
762 extended or make a narrower extension. If we want an even smaller
763 piece than the size of the object being extended, call ourselves
766 This case is used mostly by combine and cse. */
768 if (GET_MODE (XEXP (x
, 0)) == mode
)
770 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
771 return gen_lowpart_common (mode
, XEXP (x
, 0));
772 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
773 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
775 else if (GET_CODE (x
) == SUBREG
|| GET_CODE (x
) == REG
776 || GET_CODE (x
) == CONCAT
)
777 return simplify_gen_subreg (mode
, x
, GET_MODE (x
), offset
);
778 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
779 from the low-order part of the constant. */
780 else if ((GET_MODE_CLASS (mode
) == MODE_INT
781 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
782 && GET_MODE (x
) == VOIDmode
783 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
785 /* If MODE is twice the host word size, X is already the desired
786 representation. Otherwise, if MODE is wider than a word, we can't
787 do this. If MODE is exactly a word, return just one CONST_INT. */
789 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
791 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
793 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
794 return (GET_CODE (x
) == CONST_INT
? x
795 : GEN_INT (CONST_DOUBLE_LOW (x
)));
798 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
799 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
800 : CONST_DOUBLE_LOW (x
));
802 /* Sign extend to HOST_WIDE_INT. */
803 val
= trunc_int_for_mode (val
, mode
);
805 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
810 #ifndef REAL_ARITHMETIC
811 /* If X is an integral constant but we want it in floating-point, it
812 must be the case that we have a union of an integer and a floating-point
813 value. If the machine-parameters allow it, simulate that union here
814 and return the result. The two-word and single-word cases are
817 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
818 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
819 || flag_pretend_float
)
820 && GET_MODE_CLASS (mode
) == MODE_FLOAT
821 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
822 && GET_CODE (x
) == CONST_INT
823 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
825 union {HOST_WIDE_INT i
; float d
; } u
;
828 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
830 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
831 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
832 || flag_pretend_float
)
833 && GET_MODE_CLASS (mode
) == MODE_FLOAT
834 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
835 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
836 && GET_MODE (x
) == VOIDmode
837 && (sizeof (double) * HOST_BITS_PER_CHAR
838 == 2 * HOST_BITS_PER_WIDE_INT
))
840 union {HOST_WIDE_INT i
[2]; double d
; } u
;
841 HOST_WIDE_INT low
, high
;
843 if (GET_CODE (x
) == CONST_INT
)
844 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
846 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
848 #ifdef HOST_WORDS_BIG_ENDIAN
849 u
.i
[0] = high
, u
.i
[1] = low
;
851 u
.i
[0] = low
, u
.i
[1] = high
;
854 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
857 /* Similarly, if this is converting a floating-point value into a
858 single-word integer. Only do this is the host and target parameters are
861 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
862 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
863 || flag_pretend_float
)
864 && (GET_MODE_CLASS (mode
) == MODE_INT
865 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
866 && GET_CODE (x
) == CONST_DOUBLE
867 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
868 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
869 return constant_subword (x
, (offset
/ UNITS_PER_WORD
), GET_MODE (x
));
871 /* Similarly, if this is converting a floating-point value into a
872 two-word integer, we can do this one word at a time and make an
873 integer. Only do this is the host and target parameters are
876 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
877 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
878 || flag_pretend_float
)
879 && (GET_MODE_CLASS (mode
) == MODE_INT
880 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
881 && GET_CODE (x
) == CONST_DOUBLE
882 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
883 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
885 rtx lowpart
, highpart
;
887 lowpart
= constant_subword (x
,
888 (offset
/ UNITS_PER_WORD
) + WORDS_BIG_ENDIAN
,
890 highpart
= constant_subword (x
,
891 (offset
/ UNITS_PER_WORD
) + (! WORDS_BIG_ENDIAN
),
893 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
894 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
895 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
897 #else /* ifndef REAL_ARITHMETIC */
899 /* When we have a FP emulator, we can handle all conversions between
900 FP and integer operands. This simplifies reload because it
901 doesn't have to deal with constructs like (subreg:DI
902 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
904 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
905 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
906 && GET_CODE (x
) == CONST_INT
)
912 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
913 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
915 else if (GET_MODE_CLASS (mode
) == MODE_FLOAT
916 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
917 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
918 && GET_MODE (x
) == VOIDmode
)
922 HOST_WIDE_INT low
, high
;
924 if (GET_CODE (x
) == CONST_INT
)
927 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
931 low
= CONST_DOUBLE_LOW (x
);
932 high
= CONST_DOUBLE_HIGH (x
);
935 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
937 if (WORDS_BIG_ENDIAN
)
938 i
[0] = high
, i
[1] = low
;
940 i
[0] = low
, i
[1] = high
;
942 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
943 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
945 else if ((GET_MODE_CLASS (mode
) == MODE_INT
946 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
947 && GET_CODE (x
) == CONST_DOUBLE
948 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
951 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
952 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
954 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
955 switch (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
)
958 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[endian
]);
962 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
);
965 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
969 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
975 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
977 #if HOST_BITS_PER_WIDE_INT == 32
978 return immed_double_const (i
[endian
], i
[1 - endian
], mode
);
983 if (HOST_BITS_PER_WIDE_INT
!= 64)
986 for (c
= 0; c
< 4; c
++)
989 switch (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
)
993 return immed_double_const (((unsigned long) i
[endian
]) |
994 (((HOST_WIDE_INT
) i
[1-endian
]) << 32),
998 return immed_double_const (((unsigned long) i
[endian
*3]) |
999 (((HOST_WIDE_INT
) i
[1+endian
]) << 32),
1000 ((unsigned long) i
[2-endian
]) |
1001 (((HOST_WIDE_INT
) i
[3-endian
*3]) << 32),
1009 #endif /* ifndef REAL_ARITHMETIC */
1011 /* Otherwise, we can't do this. */
1015 /* Return the real part (which has mode MODE) of a complex value X.
1016 This always comes at the low address in memory. */
1019 gen_realpart (mode
, x
)
1020 enum machine_mode mode
;
1023 if (WORDS_BIG_ENDIAN
1024 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1026 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1028 ("Can't access real part of complex value in hard register");
1029 else if (WORDS_BIG_ENDIAN
)
1030 return gen_highpart (mode
, x
);
1032 return gen_lowpart (mode
, x
);
1035 /* Return the imaginary part (which has mode MODE) of a complex value X.
1036 This always comes at the high address in memory. */
1039 gen_imagpart (mode
, x
)
1040 enum machine_mode mode
;
1043 if (WORDS_BIG_ENDIAN
)
1044 return gen_lowpart (mode
, x
);
1045 else if (! WORDS_BIG_ENDIAN
1046 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1048 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1050 ("can't access imaginary part of complex value in hard register");
1052 return gen_highpart (mode
, x
);
1055 /* Return 1 iff X, assumed to be a SUBREG,
1056 refers to the real part of the complex value in its containing reg.
1057 Complex values are always stored with the real part in the first word,
1058 regardless of WORDS_BIG_ENDIAN. */
1061 subreg_realpart_p (x
)
1064 if (GET_CODE (x
) != SUBREG
)
1067 return ((unsigned int) SUBREG_BYTE (x
)
1068 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1071 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1072 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1073 least-significant part of X.
1074 MODE specifies how big a part of X to return;
1075 it usually should not be larger than a word.
1076 If X is a MEM whose address is a QUEUED, the value may be so also. */
1079 gen_lowpart (mode
, x
)
1080 enum machine_mode mode
;
1083 rtx result
= gen_lowpart_common (mode
, x
);
1087 else if (GET_CODE (x
) == REG
)
1089 /* Must be a hard reg that's not valid in MODE. */
1090 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1095 else if (GET_CODE (x
) == MEM
)
1097 /* The only additional case we can do is MEM. */
1098 register int offset
= 0;
1099 if (WORDS_BIG_ENDIAN
)
1100 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1101 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1103 if (BYTES_BIG_ENDIAN
)
1104 /* Adjust the address so that the address-after-the-data
1106 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1107 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1109 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1111 else if (GET_CODE (x
) == ADDRESSOF
)
1112 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1117 /* Like `gen_lowpart', but refer to the most significant part.
1118 This is used to access the imaginary part of a complex number. */
1121 gen_highpart (mode
, x
)
1122 enum machine_mode mode
;
1125 unsigned int msize
= GET_MODE_SIZE (mode
);
1128 /* This case loses if X is a subreg. To catch bugs early,
1129 complain if an invalid MODE is used even in other cases. */
1130 if (msize
> UNITS_PER_WORD
1131 && msize
!= GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1134 result
= simplify_gen_subreg (mode
, x
, GET_MODE (x
),
1135 subreg_highpart_offset (mode
, GET_MODE (x
)));
1140 /* Return offset in bytes to get OUTERMODE low part
1141 of the value in mode INNERMODE stored in memory in target format. */
1144 subreg_lowpart_offset (outermode
, innermode
)
1145 enum machine_mode outermode
, innermode
;
1147 unsigned int offset
= 0;
1148 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1152 if (WORDS_BIG_ENDIAN
)
1153 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1154 if (BYTES_BIG_ENDIAN
)
1155 offset
+= difference
% UNITS_PER_WORD
;
1161 /* Return offset in bytes to get OUTERMODE high part
1162 of the value in mode INNERMODE stored in memory in target format. */
1164 subreg_highpart_offset (outermode
, innermode
)
1165 enum machine_mode outermode
, innermode
;
1167 unsigned int offset
= 0;
1168 int difference
= (GET_MODE_SIZE (innermode
) - GET_MODE_SIZE (outermode
));
1170 if (GET_MODE_SIZE (innermode
) < GET_MODE_SIZE (outermode
))
1175 if (! WORDS_BIG_ENDIAN
)
1176 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
1177 if (! BYTES_BIG_ENDIAN
)
1178 offset
+= difference
% UNITS_PER_WORD
;
1184 /* Return 1 iff X, assumed to be a SUBREG,
1185 refers to the least significant part of its containing reg.
1186 If X is not a SUBREG, always return 1 (it is its own low part!). */
1189 subreg_lowpart_p (x
)
1192 if (GET_CODE (x
) != SUBREG
)
1194 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1197 return (subreg_lowpart_offset (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)))
1198 == SUBREG_BYTE (x
));
1202 /* Helper routine for all the constant cases of operand_subword.
1203 Some places invoke this directly. */
1206 constant_subword (op
, offset
, mode
)
1209 enum machine_mode mode
;
1211 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1214 /* If OP is already an integer word, return it. */
1215 if (GET_MODE_CLASS (mode
) == MODE_INT
1216 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1219 #ifdef REAL_ARITHMETIC
1220 /* The output is some bits, the width of the target machine's word.
1221 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1223 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1224 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1225 && GET_MODE_BITSIZE (mode
) == 64
1226 && GET_CODE (op
) == CONST_DOUBLE
)
1231 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1232 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1234 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1235 which the words are written depends on the word endianness.
1236 ??? This is a potential portability problem and should
1237 be fixed at some point.
1239 We must excercise caution with the sign bit. By definition there
1240 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1241 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1242 So we explicitly mask and sign-extend as necessary. */
1243 if (BITS_PER_WORD
== 32)
1246 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1247 return GEN_INT (val
);
1249 #if HOST_BITS_PER_WIDE_INT >= 64
1250 else if (BITS_PER_WORD
>= 64 && offset
== 0)
1252 val
= k
[! WORDS_BIG_ENDIAN
];
1253 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1254 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1255 return GEN_INT (val
);
1258 else if (BITS_PER_WORD
== 16)
1260 val
= k
[offset
>> 1];
1261 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1263 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1264 return GEN_INT (val
);
1269 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1270 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1271 && GET_MODE_BITSIZE (mode
) > 64
1272 && GET_CODE (op
) == CONST_DOUBLE
)
1277 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1278 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1280 if (BITS_PER_WORD
== 32)
1283 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1284 return GEN_INT (val
);
1286 #if HOST_BITS_PER_WIDE_INT >= 64
1287 else if (BITS_PER_WORD
>= 64 && offset
<= 1)
1289 val
= k
[offset
* 2 + ! WORDS_BIG_ENDIAN
];
1290 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1291 val
|= (HOST_WIDE_INT
) k
[offset
* 2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1292 return GEN_INT (val
);
1298 #else /* no REAL_ARITHMETIC */
1299 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1300 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1301 || flag_pretend_float
)
1302 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1303 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1304 && GET_CODE (op
) == CONST_DOUBLE
)
1306 /* The constant is stored in the host's word-ordering,
1307 but we want to access it in the target's word-ordering. Some
1308 compilers don't like a conditional inside macro args, so we have two
1309 copies of the return. */
1310 #ifdef HOST_WORDS_BIG_ENDIAN
1311 return GEN_INT (offset
== WORDS_BIG_ENDIAN
1312 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1314 return GEN_INT (offset
!= WORDS_BIG_ENDIAN
1315 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1318 #endif /* no REAL_ARITHMETIC */
1320 /* Single word float is a little harder, since single- and double-word
1321 values often do not have the same high-order bits. We have already
1322 verified that we want the only defined word of the single-word value. */
1323 #ifdef REAL_ARITHMETIC
1324 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1325 && GET_MODE_BITSIZE (mode
) == 32
1326 && GET_CODE (op
) == CONST_DOUBLE
)
1331 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1332 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1334 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1336 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1338 if (BITS_PER_WORD
== 16)
1340 if ((offset
& 1) == ! WORDS_BIG_ENDIAN
)
1342 val
= ((val
& 0xffff) ^ 0x8000) - 0x8000;
1345 return GEN_INT (val
);
1348 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1349 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1350 || flag_pretend_float
)
1351 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1352 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1353 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1354 && GET_CODE (op
) == CONST_DOUBLE
)
1357 union {float f
; HOST_WIDE_INT i
; } u
;
1359 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1362 return GEN_INT (u
.i
);
1364 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1365 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1366 || flag_pretend_float
)
1367 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1368 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1369 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1370 && GET_CODE (op
) == CONST_DOUBLE
)
1373 union {double d
; HOST_WIDE_INT i
; } u
;
1375 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1378 return GEN_INT (u
.i
);
1380 #endif /* no REAL_ARITHMETIC */
1382 /* The only remaining cases that we can handle are integers.
1383 Convert to proper endianness now since these cases need it.
1384 At this point, offset == 0 means the low-order word.
1386 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1387 in general. However, if OP is (const_int 0), we can just return
1390 if (op
== const0_rtx
)
1393 if (GET_MODE_CLASS (mode
) != MODE_INT
1394 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1395 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1398 if (WORDS_BIG_ENDIAN
)
1399 offset
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - offset
;
1401 /* Find out which word on the host machine this value is in and get
1402 it from the constant. */
1403 val
= (offset
/ size_ratio
== 0
1404 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1405 : (GET_CODE (op
) == CONST_INT
1406 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1408 /* Get the value we want into the low bits of val. */
1409 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1410 val
= ((val
>> ((offset
% size_ratio
) * BITS_PER_WORD
)));
1412 val
= trunc_int_for_mode (val
, word_mode
);
1414 return GEN_INT (val
);
1417 /* Return subword OFFSET of operand OP.
1418 The word number, OFFSET, is interpreted as the word number starting
1419 at the low-order address. OFFSET 0 is the low-order word if not
1420 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1422 If we cannot extract the required word, we return zero. Otherwise,
1423 an rtx corresponding to the requested word will be returned.
1425 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1426 reload has completed, a valid address will always be returned. After
1427 reload, if a valid address cannot be returned, we return zero.
1429 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1430 it is the responsibility of the caller.
1432 MODE is the mode of OP in case it is a CONST_INT.
1434 ??? This is still rather broken for some cases. The problem for the
1435 moment is that all callers of this thing provide no 'goal mode' to
1436 tell us to work with. This exists because all callers were written
1437 in a word based SUBREG world.
1438 Now use of this function can be deprecated by simplify_subreg in most
1443 operand_subword (op
, offset
, validate_address
, mode
)
1445 unsigned int offset
;
1446 int validate_address
;
1447 enum machine_mode mode
;
1449 if (mode
== VOIDmode
)
1450 mode
= GET_MODE (op
);
1452 if (mode
== VOIDmode
)
1455 /* If OP is narrower than a word, fail. */
1457 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1460 /* If we want a word outside OP, return zero. */
1462 && (offset
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1465 /* Form a new MEM at the requested address. */
1466 if (GET_CODE (op
) == MEM
)
1468 rtx addr
= plus_constant (XEXP (op
, 0), (offset
* UNITS_PER_WORD
));
1471 if (validate_address
)
1473 if (reload_completed
)
1475 if (! strict_memory_address_p (word_mode
, addr
))
1479 addr
= memory_address (word_mode
, addr
);
1482 new = gen_rtx_MEM (word_mode
, addr
);
1483 MEM_COPY_ATTRIBUTES (new, op
);
1487 /* Rest can be handled by simplify_subreg. */
1488 return simplify_gen_subreg (word_mode
, op
, mode
, (offset
* UNITS_PER_WORD
));
1491 /* Similar to `operand_subword', but never return 0. If we can't extract
1492 the required subword, put OP into a register and try again. If that fails,
1493 abort. We always validate the address in this case.
1495 MODE is the mode of OP, in case it is CONST_INT. */
1498 operand_subword_force (op
, offset
, mode
)
1500 unsigned int offset
;
1501 enum machine_mode mode
;
1503 rtx result
= operand_subword (op
, offset
, 1, mode
);
1508 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1510 /* If this is a register which can not be accessed by words, copy it
1511 to a pseudo register. */
1512 if (GET_CODE (op
) == REG
)
1513 op
= copy_to_reg (op
);
1515 op
= force_reg (mode
, op
);
1518 result
= operand_subword (op
, offset
, 1, mode
);
1525 /* Given a compare instruction, swap the operands.
1526 A test instruction is changed into a compare of 0 against the operand. */
1529 reverse_comparison (insn
)
1532 rtx body
= PATTERN (insn
);
1535 if (GET_CODE (body
) == SET
)
1536 comp
= SET_SRC (body
);
1538 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1540 if (GET_CODE (comp
) == COMPARE
)
1542 rtx op0
= XEXP (comp
, 0);
1543 rtx op1
= XEXP (comp
, 1);
1544 XEXP (comp
, 0) = op1
;
1545 XEXP (comp
, 1) = op0
;
1549 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1550 CONST0_RTX (GET_MODE (comp
)), comp
);
1551 if (GET_CODE (body
) == SET
)
1552 SET_SRC (body
) = new;
1554 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1558 /* Return a memory reference like MEMREF, but with its mode changed
1559 to MODE and its address changed to ADDR.
1560 (VOIDmode means don't change the mode.
1561 NULL for ADDR means don't change the address.) */
1564 change_address (memref
, mode
, addr
)
1566 enum machine_mode mode
;
1571 if (GET_CODE (memref
) != MEM
)
1573 if (mode
== VOIDmode
)
1574 mode
= GET_MODE (memref
);
1576 addr
= XEXP (memref
, 0);
1578 /* If reload is in progress or has completed, ADDR must be valid.
1579 Otherwise, we can call memory_address to make it valid. */
1580 if (reload_completed
|| reload_in_progress
)
1582 if (! memory_address_p (mode
, addr
))
1586 addr
= memory_address (mode
, addr
);
1588 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1591 new = gen_rtx_MEM (mode
, addr
);
1592 MEM_COPY_ATTRIBUTES (new, memref
);
1596 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1603 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1604 NULL_RTX
, label_num
++, NULL
, NULL
);
1606 LABEL_NUSES (label
) = 0;
1607 LABEL_ALTERNATE_NAME (label
) = NULL
;
1611 /* For procedure integration. */
1613 /* Install new pointers to the first and last insns in the chain.
1614 Also, set cur_insn_uid to one higher than the last in use.
1615 Used for an inline-procedure after copying the insn chain. */
1618 set_new_first_and_last_insn (first
, last
)
1627 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1628 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1633 /* Set the range of label numbers found in the current function.
1634 This is used when belatedly compiling an inline function. */
1637 set_new_first_and_last_label_num (first
, last
)
1640 base_label_num
= label_num
;
1641 first_label_num
= first
;
1642 last_label_num
= last
;
1645 /* Set the last label number found in the current function.
1646 This is used when belatedly compiling an inline function. */
1649 set_new_last_label_num (last
)
1652 base_label_num
= label_num
;
1653 last_label_num
= last
;
1656 /* Restore all variables describing the current status from the structure *P.
1657 This is used after a nested function. */
1660 restore_emit_status (p
)
1661 struct function
*p ATTRIBUTE_UNUSED
;
1664 clear_emit_caches ();
1667 /* Clear out all parts of the state in F that can safely be discarded
1668 after the function has been compiled, to let garbage collection
1669 reclaim the memory. */
1672 free_emit_status (f
)
1675 free (f
->emit
->x_regno_reg_rtx
);
1676 free (f
->emit
->regno_pointer_align
);
1681 /* Go through all the RTL insn bodies and copy any invalid shared
1682 structure. This routine should only be called once. */
1685 unshare_all_rtl (fndecl
, insn
)
1691 /* Make sure that virtual parameters are not shared. */
1692 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
1693 SET_DECL_RTL (decl
, copy_rtx_if_shared (DECL_RTL (decl
)));
1695 /* Make sure that virtual stack slots are not shared. */
1696 unshare_all_decls (DECL_INITIAL (fndecl
));
1698 /* Unshare just about everything else. */
1699 unshare_all_rtl_1 (insn
);
1701 /* Make sure the addresses of stack slots found outside the insn chain
1702 (such as, in DECL_RTL of a variable) are not shared
1703 with the insn chain.
1705 This special care is necessary when the stack slot MEM does not
1706 actually appear in the insn chain. If it does appear, its address
1707 is unshared from all else at that point. */
1708 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
1711 /* Go through all the RTL insn bodies and copy any invalid shared
1712 structure, again. This is a fairly expensive thing to do so it
1713 should be done sparingly. */
1716 unshare_all_rtl_again (insn
)
1722 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1725 reset_used_flags (PATTERN (p
));
1726 reset_used_flags (REG_NOTES (p
));
1727 reset_used_flags (LOG_LINKS (p
));
1730 /* Make sure that virtual stack slots are not shared. */
1731 reset_used_decls (DECL_INITIAL (cfun
->decl
));
1733 /* Make sure that virtual parameters are not shared. */
1734 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
1735 reset_used_flags (DECL_RTL (decl
));
1737 reset_used_flags (stack_slot_list
);
1739 unshare_all_rtl (cfun
->decl
, insn
);
1742 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1743 Assumes the mark bits are cleared at entry. */
1746 unshare_all_rtl_1 (insn
)
1749 for (; insn
; insn
= NEXT_INSN (insn
))
1752 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1753 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1754 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1758 /* Go through all virtual stack slots of a function and copy any
1759 shared structure. */
1761 unshare_all_decls (blk
)
1766 /* Copy shared decls. */
1767 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
1768 if (DECL_RTL_SET_P (t
))
1769 SET_DECL_RTL (t
, copy_rtx_if_shared (DECL_RTL (t
)));
1771 /* Now process sub-blocks. */
1772 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
1773 unshare_all_decls (t
);
1776 /* Go through all virtual stack slots of a function and mark them as
1779 reset_used_decls (blk
)
1785 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
1786 if (DECL_RTL_SET_P (t
))
1787 reset_used_flags (DECL_RTL (t
));
1789 /* Now process sub-blocks. */
1790 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
1791 reset_used_decls (t
);
1794 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1795 Recursively does the same for subexpressions. */
1798 copy_rtx_if_shared (orig
)
1801 register rtx x
= orig
;
1803 register enum rtx_code code
;
1804 register const char *format_ptr
;
1810 code
= GET_CODE (x
);
1812 /* These types may be freely shared. */
1825 /* SCRATCH must be shared because they represent distinct values. */
1829 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1830 a LABEL_REF, it isn't sharable. */
1831 if (GET_CODE (XEXP (x
, 0)) == PLUS
1832 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1833 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1842 /* The chain of insns is not being copied. */
1846 /* A MEM is allowed to be shared if its address is constant.
1848 We used to allow sharing of MEMs which referenced
1849 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1850 that can lose. instantiate_virtual_regs will not unshare
1851 the MEMs, and combine may change the structure of the address
1852 because it looks safe and profitable in one context, but
1853 in some other context it creates unrecognizable RTL. */
1854 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
1863 /* This rtx may not be shared. If it has already been seen,
1864 replace it with a copy of itself. */
1870 copy
= rtx_alloc (code
);
1872 (sizeof (*copy
) - sizeof (copy
->fld
)
1873 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1879 /* Now scan the subexpressions recursively.
1880 We can store any replaced subexpressions directly into X
1881 since we know X is not shared! Any vectors in X
1882 must be copied if X was copied. */
1884 format_ptr
= GET_RTX_FORMAT (code
);
1886 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1888 switch (*format_ptr
++)
1891 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1895 if (XVEC (x
, i
) != NULL
)
1898 int len
= XVECLEN (x
, i
);
1900 if (copied
&& len
> 0)
1901 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
1902 for (j
= 0; j
< len
; j
++)
1903 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1911 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1912 to look for shared sub-parts. */
1915 reset_used_flags (x
)
1919 register enum rtx_code code
;
1920 register const char *format_ptr
;
1925 code
= GET_CODE (x
);
1927 /* These types may be freely shared so we needn't do any resetting
1948 /* The chain of insns is not being copied. */
1957 format_ptr
= GET_RTX_FORMAT (code
);
1958 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1960 switch (*format_ptr
++)
1963 reset_used_flags (XEXP (x
, i
));
1967 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1968 reset_used_flags (XVECEXP (x
, i
, j
));
1974 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1975 Return X or the rtx for the pseudo reg the value of X was copied into.
1976 OTHER must be valid as a SET_DEST. */
1979 make_safe_from (x
, other
)
1983 switch (GET_CODE (other
))
1986 other
= SUBREG_REG (other
);
1988 case STRICT_LOW_PART
:
1991 other
= XEXP (other
, 0);
1997 if ((GET_CODE (other
) == MEM
1999 && GET_CODE (x
) != REG
2000 && GET_CODE (x
) != SUBREG
)
2001 || (GET_CODE (other
) == REG
2002 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2003 || reg_mentioned_p (other
, x
))))
2005 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2006 emit_move_insn (temp
, x
);
2012 /* Emission of insns (adding them to the doubly-linked list). */
2014 /* Return the first insn of the current sequence or current function. */
2022 /* Return the last insn emitted in current sequence or current function. */
2030 /* Specify a new insn as the last in the chain. */
2033 set_last_insn (insn
)
2036 if (NEXT_INSN (insn
) != 0)
2041 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2044 get_last_insn_anywhere ()
2046 struct sequence_stack
*stack
;
2049 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2050 if (stack
->last
!= 0)
2055 /* Return a number larger than any instruction's uid in this function. */
2060 return cur_insn_uid
;
2063 /* Renumber instructions so that no instruction UIDs are wasted. */
2066 renumber_insns (stream
)
2071 /* If we're not supposed to renumber instructions, don't. */
2072 if (!flag_renumber_insns
)
2075 /* If there aren't that many instructions, then it's not really
2076 worth renumbering them. */
2077 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2082 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2085 fprintf (stream
, "Renumbering insn %d to %d\n",
2086 INSN_UID (insn
), cur_insn_uid
);
2087 INSN_UID (insn
) = cur_insn_uid
++;
2091 /* Return the next insn. If it is a SEQUENCE, return the first insn
2100 insn
= NEXT_INSN (insn
);
2101 if (insn
&& GET_CODE (insn
) == INSN
2102 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2103 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2109 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2113 previous_insn (insn
)
2118 insn
= PREV_INSN (insn
);
2119 if (insn
&& GET_CODE (insn
) == INSN
2120 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2121 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2127 /* Return the next insn after INSN that is not a NOTE. This routine does not
2128 look inside SEQUENCEs. */
2131 next_nonnote_insn (insn
)
2136 insn
= NEXT_INSN (insn
);
2137 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2144 /* Return the previous insn before INSN that is not a NOTE. This routine does
2145 not look inside SEQUENCEs. */
2148 prev_nonnote_insn (insn
)
2153 insn
= PREV_INSN (insn
);
2154 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2161 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2162 or 0, if there is none. This routine does not look inside
2166 next_real_insn (insn
)
2171 insn
= NEXT_INSN (insn
);
2172 if (insn
== 0 || GET_CODE (insn
) == INSN
2173 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2180 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2181 or 0, if there is none. This routine does not look inside
2185 prev_real_insn (insn
)
2190 insn
= PREV_INSN (insn
);
2191 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2192 || GET_CODE (insn
) == JUMP_INSN
)
2199 /* Find the next insn after INSN that really does something. This routine
2200 does not look inside SEQUENCEs. Until reload has completed, this is the
2201 same as next_real_insn. */
2204 active_insn_p (insn
)
2207 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2208 || (GET_CODE (insn
) == INSN
2209 && (! reload_completed
2210 || (GET_CODE (PATTERN (insn
)) != USE
2211 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2215 next_active_insn (insn
)
2220 insn
= NEXT_INSN (insn
);
2221 if (insn
== 0 || active_insn_p (insn
))
2228 /* Find the last insn before INSN that really does something. This routine
2229 does not look inside SEQUENCEs. Until reload has completed, this is the
2230 same as prev_real_insn. */
2233 prev_active_insn (insn
)
2238 insn
= PREV_INSN (insn
);
2239 if (insn
== 0 || active_insn_p (insn
))
2246 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2254 insn
= NEXT_INSN (insn
);
2255 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2262 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2270 insn
= PREV_INSN (insn
);
2271 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2279 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2280 and REG_CC_USER notes so we can find it. */
2283 link_cc0_insns (insn
)
2286 rtx user
= next_nonnote_insn (insn
);
2288 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2289 user
= XVECEXP (PATTERN (user
), 0, 0);
2291 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2293 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2296 /* Return the next insn that uses CC0 after INSN, which is assumed to
2297 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2298 applied to the result of this function should yield INSN).
2300 Normally, this is simply the next insn. However, if a REG_CC_USER note
2301 is present, it contains the insn that uses CC0.
2303 Return 0 if we can't find the insn. */
2306 next_cc0_user (insn
)
2309 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2312 return XEXP (note
, 0);
2314 insn
= next_nonnote_insn (insn
);
2315 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2316 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2318 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2324 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2325 note, it is the previous insn. */
2328 prev_cc0_setter (insn
)
2331 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2334 return XEXP (note
, 0);
2336 insn
= prev_nonnote_insn (insn
);
2337 if (! sets_cc0_p (PATTERN (insn
)))
2344 /* Increment the label uses for all labels present in rtx. */
2350 register enum rtx_code code
;
2352 register const char *fmt
;
2354 code
= GET_CODE (x
);
2355 if (code
== LABEL_REF
)
2356 LABEL_NUSES (XEXP (x
, 0))++;
2358 fmt
= GET_RTX_FORMAT (code
);
2359 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2362 mark_label_nuses (XEXP (x
, i
));
2363 else if (fmt
[i
] == 'E')
2364 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2365 mark_label_nuses (XVECEXP (x
, i
, j
));
2370 /* Try splitting insns that can be split for better scheduling.
2371 PAT is the pattern which might split.
2372 TRIAL is the insn providing PAT.
2373 LAST is non-zero if we should return the last insn of the sequence produced.
2375 If this routine succeeds in splitting, it returns the first or last
2376 replacement insn depending on the value of LAST. Otherwise, it
2377 returns TRIAL. If the insn to be returned can be split, it will be. */
2380 try_split (pat
, trial
, last
)
2384 rtx before
= PREV_INSN (trial
);
2385 rtx after
= NEXT_INSN (trial
);
2386 rtx seq
= split_insns (pat
, trial
);
2387 int has_barrier
= 0;
2390 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2391 We may need to handle this specially. */
2392 if (after
&& GET_CODE (after
) == BARRIER
)
2395 after
= NEXT_INSN (after
);
2400 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2401 The latter case will normally arise only when being done so that
2402 it, in turn, will be split (SFmode on the 29k is an example). */
2403 if (GET_CODE (seq
) == SEQUENCE
)
2408 /* Avoid infinite loop if any insn of the result matches
2409 the original pattern. */
2410 for (i
= 0; i
< XVECLEN (seq
, 0); i
++)
2411 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
2412 && rtx_equal_p (PATTERN (XVECEXP (seq
, 0, i
)), pat
))
2416 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2417 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2418 mark_jump_label (PATTERN (XVECEXP (seq
, 0, i
)),
2419 XVECEXP (seq
, 0, i
), 0, 0);
2421 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2422 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2423 if (GET_CODE (trial
) == CALL_INSN
)
2424 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2425 if (GET_CODE (XVECEXP (seq
, 0, i
)) == CALL_INSN
)
2426 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq
, 0, i
))
2427 = CALL_INSN_FUNCTION_USAGE (trial
);
2429 /* Copy EH notes. */
2430 if ((eh_note
= find_reg_note (trial
, REG_EH_REGION
, NULL_RTX
)))
2431 for (i
= 0; i
< XVECLEN (seq
, 0); i
++)
2433 rtx insn
= XVECEXP (seq
, 0, i
);
2434 if (GET_CODE (insn
) == CALL_INSN
2435 || (flag_non_call_exceptions
2436 && may_trap_p (PATTERN (insn
))))
2438 = gen_rtx_EXPR_LIST (REG_EH_REGION
, XEXP (eh_note
, 0),
2442 /* If there are LABELS inside the split insns increment the
2443 usage count so we don't delete the label. */
2444 if (GET_CODE (trial
) == INSN
)
2445 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2446 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
)
2447 mark_label_nuses (PATTERN (XVECEXP (seq
, 0, i
)));
2449 tem
= emit_insn_after (seq
, before
);
2451 delete_insn (trial
);
2453 emit_barrier_after (tem
);
2455 /* Recursively call try_split for each new insn created; by the
2456 time control returns here that insn will be fully split, so
2457 set LAST and continue from the insn after the one returned.
2458 We can't use next_active_insn here since AFTER may be a note.
2459 Ignore deleted insns, which can be occur if not optimizing. */
2460 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
2461 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
2462 tem
= try_split (PATTERN (tem
), tem
, 1);
2464 /* Avoid infinite loop if the result matches the original pattern. */
2465 else if (rtx_equal_p (seq
, pat
))
2469 PATTERN (trial
) = seq
;
2470 INSN_CODE (trial
) = -1;
2471 try_split (seq
, trial
, last
);
2474 /* Return either the first or the last insn, depending on which was
2477 ? (after
? prev_active_insn (after
) : last_insn
)
2478 : next_active_insn (before
);
2484 /* Make and return an INSN rtx, initializing all its slots.
2485 Store PATTERN in the pattern slots. */
2488 make_insn_raw (pattern
)
2493 insn
= rtx_alloc (INSN
);
2495 INSN_UID (insn
) = cur_insn_uid
++;
2496 PATTERN (insn
) = pattern
;
2497 INSN_CODE (insn
) = -1;
2498 LOG_LINKS (insn
) = NULL
;
2499 REG_NOTES (insn
) = NULL
;
2501 #ifdef ENABLE_RTL_CHECKING
2504 && (returnjump_p (insn
)
2505 || (GET_CODE (insn
) == SET
2506 && SET_DEST (insn
) == pc_rtx
)))
2508 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2516 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2519 make_jump_insn_raw (pattern
)
2524 insn
= rtx_alloc (JUMP_INSN
);
2525 INSN_UID (insn
) = cur_insn_uid
++;
2527 PATTERN (insn
) = pattern
;
2528 INSN_CODE (insn
) = -1;
2529 LOG_LINKS (insn
) = NULL
;
2530 REG_NOTES (insn
) = NULL
;
2531 JUMP_LABEL (insn
) = NULL
;
2536 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2539 make_call_insn_raw (pattern
)
2544 insn
= rtx_alloc (CALL_INSN
);
2545 INSN_UID (insn
) = cur_insn_uid
++;
2547 PATTERN (insn
) = pattern
;
2548 INSN_CODE (insn
) = -1;
2549 LOG_LINKS (insn
) = NULL
;
2550 REG_NOTES (insn
) = NULL
;
2551 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2556 /* Add INSN to the end of the doubly-linked list.
2557 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2563 PREV_INSN (insn
) = last_insn
;
2564 NEXT_INSN (insn
) = 0;
2566 if (NULL
!= last_insn
)
2567 NEXT_INSN (last_insn
) = insn
;
2569 if (NULL
== first_insn
)
2575 /* Add INSN into the doubly-linked list after insn AFTER. This and
2576 the next should be the only functions called to insert an insn once
2577 delay slots have been filled since only they know how to update a
2581 add_insn_after (insn
, after
)
2584 rtx next
= NEXT_INSN (after
);
2586 if (optimize
&& INSN_DELETED_P (after
))
2589 NEXT_INSN (insn
) = next
;
2590 PREV_INSN (insn
) = after
;
2594 PREV_INSN (next
) = insn
;
2595 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2596 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2598 else if (last_insn
== after
)
2602 struct sequence_stack
*stack
= seq_stack
;
2603 /* Scan all pending sequences too. */
2604 for (; stack
; stack
= stack
->next
)
2605 if (after
== stack
->last
)
2615 NEXT_INSN (after
) = insn
;
2616 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2618 rtx sequence
= PATTERN (after
);
2619 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2623 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2624 the previous should be the only functions called to insert an insn once
2625 delay slots have been filled since only they know how to update a
2629 add_insn_before (insn
, before
)
2632 rtx prev
= PREV_INSN (before
);
2634 if (optimize
&& INSN_DELETED_P (before
))
2637 PREV_INSN (insn
) = prev
;
2638 NEXT_INSN (insn
) = before
;
2642 NEXT_INSN (prev
) = insn
;
2643 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2645 rtx sequence
= PATTERN (prev
);
2646 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2649 else if (first_insn
== before
)
2653 struct sequence_stack
*stack
= seq_stack
;
2654 /* Scan all pending sequences too. */
2655 for (; stack
; stack
= stack
->next
)
2656 if (before
== stack
->first
)
2658 stack
->first
= insn
;
2666 PREV_INSN (before
) = insn
;
2667 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2668 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2671 /* Remove an insn from its doubly-linked list. This function knows how
2672 to handle sequences. */
2677 rtx next
= NEXT_INSN (insn
);
2678 rtx prev
= PREV_INSN (insn
);
2681 NEXT_INSN (prev
) = next
;
2682 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2684 rtx sequence
= PATTERN (prev
);
2685 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
2688 else if (first_insn
== insn
)
2692 struct sequence_stack
*stack
= seq_stack
;
2693 /* Scan all pending sequences too. */
2694 for (; stack
; stack
= stack
->next
)
2695 if (insn
== stack
->first
)
2697 stack
->first
= next
;
2707 PREV_INSN (next
) = prev
;
2708 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2709 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
2711 else if (last_insn
== insn
)
2715 struct sequence_stack
*stack
= seq_stack
;
2716 /* Scan all pending sequences too. */
2717 for (; stack
; stack
= stack
->next
)
2718 if (insn
== stack
->last
)
2729 /* Delete all insns made since FROM.
2730 FROM becomes the new last instruction. */
2733 delete_insns_since (from
)
2739 NEXT_INSN (from
) = 0;
2743 /* This function is deprecated, please use sequences instead.
2745 Move a consecutive bunch of insns to a different place in the chain.
2746 The insns to be moved are those between FROM and TO.
2747 They are moved to a new position after the insn AFTER.
2748 AFTER must not be FROM or TO or any insn in between.
2750 This function does not know about SEQUENCEs and hence should not be
2751 called after delay-slot filling has been done. */
2754 reorder_insns (from
, to
, after
)
2755 rtx from
, to
, after
;
2757 /* Splice this bunch out of where it is now. */
2758 if (PREV_INSN (from
))
2759 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2761 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2762 if (last_insn
== to
)
2763 last_insn
= PREV_INSN (from
);
2764 if (first_insn
== from
)
2765 first_insn
= NEXT_INSN (to
);
2767 /* Make the new neighbors point to it and it to them. */
2768 if (NEXT_INSN (after
))
2769 PREV_INSN (NEXT_INSN (after
)) = to
;
2771 NEXT_INSN (to
) = NEXT_INSN (after
);
2772 PREV_INSN (from
) = after
;
2773 NEXT_INSN (after
) = from
;
2774 if (after
== last_insn
)
2778 /* Return the line note insn preceding INSN. */
2781 find_line_note (insn
)
2784 if (no_line_numbers
)
2787 for (; insn
; insn
= PREV_INSN (insn
))
2788 if (GET_CODE (insn
) == NOTE
2789 && NOTE_LINE_NUMBER (insn
) >= 0)
2795 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2796 of the moved insns when debugging. This may insert a note between AFTER
2797 and FROM, and another one after TO. */
2800 reorder_insns_with_line_notes (from
, to
, after
)
2801 rtx from
, to
, after
;
2803 rtx from_line
= find_line_note (from
);
2804 rtx after_line
= find_line_note (after
);
2806 reorder_insns (from
, to
, after
);
2808 if (from_line
== after_line
)
2812 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2813 NOTE_LINE_NUMBER (from_line
),
2816 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2817 NOTE_LINE_NUMBER (after_line
),
2821 /* Remove unnecessary notes from the instruction stream. */
2824 remove_unnecessary_notes ()
2826 rtx block_stack
= NULL_RTX
;
2827 rtx eh_stack
= NULL_RTX
;
2832 /* We must not remove the first instruction in the function because
2833 the compiler depends on the first instruction being a note. */
2834 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
2836 /* Remember what's next. */
2837 next
= NEXT_INSN (insn
);
2839 /* We're only interested in notes. */
2840 if (GET_CODE (insn
) != NOTE
)
2843 switch (NOTE_LINE_NUMBER (insn
))
2845 case NOTE_INSN_DELETED
:
2849 case NOTE_INSN_EH_REGION_BEG
:
2850 eh_stack
= alloc_INSN_LIST (insn
, eh_stack
);
2853 case NOTE_INSN_EH_REGION_END
:
2854 /* Too many end notes. */
2855 if (eh_stack
== NULL_RTX
)
2857 /* Mismatched nesting. */
2858 if (NOTE_EH_HANDLER (XEXP (eh_stack
, 0)) != NOTE_EH_HANDLER (insn
))
2861 eh_stack
= XEXP (eh_stack
, 1);
2862 free_INSN_LIST_node (tmp
);
2865 case NOTE_INSN_BLOCK_BEG
:
2866 /* By now, all notes indicating lexical blocks should have
2867 NOTE_BLOCK filled in. */
2868 if (NOTE_BLOCK (insn
) == NULL_TREE
)
2870 block_stack
= alloc_INSN_LIST (insn
, block_stack
);
2873 case NOTE_INSN_BLOCK_END
:
2874 /* Too many end notes. */
2875 if (block_stack
== NULL_RTX
)
2877 /* Mismatched nesting. */
2878 if (NOTE_BLOCK (XEXP (block_stack
, 0)) != NOTE_BLOCK (insn
))
2881 block_stack
= XEXP (block_stack
, 1);
2882 free_INSN_LIST_node (tmp
);
2884 /* Scan back to see if there are any non-note instructions
2885 between INSN and the beginning of this block. If not,
2886 then there is no PC range in the generated code that will
2887 actually be in this block, so there's no point in
2888 remembering the existence of the block. */
2889 for (tmp
= PREV_INSN (insn
); tmp
; tmp
= PREV_INSN (tmp
))
2891 /* This block contains a real instruction. Note that we
2892 don't include labels; if the only thing in the block
2893 is a label, then there are still no PC values that
2894 lie within the block. */
2898 /* We're only interested in NOTEs. */
2899 if (GET_CODE (tmp
) != NOTE
)
2902 if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_BEG
)
2904 /* We just verified that this BLOCK matches us
2905 with the block_stack check above. */
2906 if (debug_ignore_block (NOTE_BLOCK (insn
)))
2913 else if (NOTE_LINE_NUMBER (tmp
) == NOTE_INSN_BLOCK_END
)
2914 /* There's a nested block. We need to leave the
2915 current block in place since otherwise the debugger
2916 wouldn't be able to show symbols from our block in
2917 the nested block. */
2923 /* Too many begin notes. */
2924 if (block_stack
|| eh_stack
)
2929 /* Emit an insn of given code and pattern
2930 at a specified place within the doubly-linked list. */
2932 /* Make an instruction with body PATTERN
2933 and output it before the instruction BEFORE. */
2936 emit_insn_before (pattern
, before
)
2937 register rtx pattern
, before
;
2939 register rtx insn
= before
;
2941 if (GET_CODE (pattern
) == SEQUENCE
)
2945 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2947 insn
= XVECEXP (pattern
, 0, i
);
2948 add_insn_before (insn
, before
);
2953 insn
= make_insn_raw (pattern
);
2954 add_insn_before (insn
, before
);
2960 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2963 emit_block_insn_before (pattern
, before
, block
)
2964 rtx pattern
, before
;
2967 rtx prev
= PREV_INSN (before
);
2968 rtx r
= emit_insn_before (pattern
, before
);
2969 if (block
&& block
->head
== before
)
2970 block
->head
= NEXT_INSN (prev
);
2974 /* Make an instruction with body PATTERN and code JUMP_INSN
2975 and output it before the instruction BEFORE. */
2978 emit_jump_insn_before (pattern
, before
)
2979 register rtx pattern
, before
;
2983 if (GET_CODE (pattern
) == SEQUENCE
)
2984 insn
= emit_insn_before (pattern
, before
);
2987 insn
= make_jump_insn_raw (pattern
);
2988 add_insn_before (insn
, before
);
2994 /* Make an instruction with body PATTERN and code CALL_INSN
2995 and output it before the instruction BEFORE. */
2998 emit_call_insn_before (pattern
, before
)
2999 register rtx pattern
, before
;
3003 if (GET_CODE (pattern
) == SEQUENCE
)
3004 insn
= emit_insn_before (pattern
, before
);
3007 insn
= make_call_insn_raw (pattern
);
3008 add_insn_before (insn
, before
);
3009 PUT_CODE (insn
, CALL_INSN
);
3015 /* Make an insn of code BARRIER
3016 and output it before the insn BEFORE. */
3019 emit_barrier_before (before
)
3020 register rtx before
;
3022 register rtx insn
= rtx_alloc (BARRIER
);
3024 INSN_UID (insn
) = cur_insn_uid
++;
3026 add_insn_before (insn
, before
);
3030 /* Emit the label LABEL before the insn BEFORE. */
3033 emit_label_before (label
, before
)
3036 /* This can be called twice for the same label as a result of the
3037 confusion that follows a syntax error! So make it harmless. */
3038 if (INSN_UID (label
) == 0)
3040 INSN_UID (label
) = cur_insn_uid
++;
3041 add_insn_before (label
, before
);
3047 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3050 emit_note_before (subtype
, before
)
3054 register rtx note
= rtx_alloc (NOTE
);
3055 INSN_UID (note
) = cur_insn_uid
++;
3056 NOTE_SOURCE_FILE (note
) = 0;
3057 NOTE_LINE_NUMBER (note
) = subtype
;
3059 add_insn_before (note
, before
);
3063 /* Make an insn of code INSN with body PATTERN
3064 and output it after the insn AFTER. */
3067 emit_insn_after (pattern
, after
)
3068 register rtx pattern
, after
;
3070 register rtx insn
= after
;
3072 if (GET_CODE (pattern
) == SEQUENCE
)
3076 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3078 insn
= XVECEXP (pattern
, 0, i
);
3079 add_insn_after (insn
, after
);
3085 insn
= make_insn_raw (pattern
);
3086 add_insn_after (insn
, after
);
3092 /* Similar to emit_insn_after, except that line notes are to be inserted so
3093 as to act as if this insn were at FROM. */
3096 emit_insn_after_with_line_notes (pattern
, after
, from
)
3097 rtx pattern
, after
, from
;
3099 rtx from_line
= find_line_note (from
);
3100 rtx after_line
= find_line_note (after
);
3101 rtx insn
= emit_insn_after (pattern
, after
);
3104 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3105 NOTE_LINE_NUMBER (from_line
),
3109 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3110 NOTE_LINE_NUMBER (after_line
),
3114 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3117 emit_block_insn_after (pattern
, after
, block
)
3121 rtx r
= emit_insn_after (pattern
, after
);
3122 if (block
&& block
->end
== after
)
3127 /* Make an insn of code JUMP_INSN with body PATTERN
3128 and output it after the insn AFTER. */
3131 emit_jump_insn_after (pattern
, after
)
3132 register rtx pattern
, after
;
3136 if (GET_CODE (pattern
) == SEQUENCE
)
3137 insn
= emit_insn_after (pattern
, after
);
3140 insn
= make_jump_insn_raw (pattern
);
3141 add_insn_after (insn
, after
);
3147 /* Make an insn of code BARRIER
3148 and output it after the insn AFTER. */
3151 emit_barrier_after (after
)
3154 register rtx insn
= rtx_alloc (BARRIER
);
3156 INSN_UID (insn
) = cur_insn_uid
++;
3158 add_insn_after (insn
, after
);
3162 /* Emit the label LABEL after the insn AFTER. */
3165 emit_label_after (label
, after
)
3168 /* This can be called twice for the same label
3169 as a result of the confusion that follows a syntax error!
3170 So make it harmless. */
3171 if (INSN_UID (label
) == 0)
3173 INSN_UID (label
) = cur_insn_uid
++;
3174 add_insn_after (label
, after
);
3180 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3183 emit_note_after (subtype
, after
)
3187 register rtx note
= rtx_alloc (NOTE
);
3188 INSN_UID (note
) = cur_insn_uid
++;
3189 NOTE_SOURCE_FILE (note
) = 0;
3190 NOTE_LINE_NUMBER (note
) = subtype
;
3191 add_insn_after (note
, after
);
3195 /* Emit a line note for FILE and LINE after the insn AFTER. */
3198 emit_line_note_after (file
, line
, after
)
3205 if (no_line_numbers
&& line
> 0)
3211 note
= rtx_alloc (NOTE
);
3212 INSN_UID (note
) = cur_insn_uid
++;
3213 NOTE_SOURCE_FILE (note
) = file
;
3214 NOTE_LINE_NUMBER (note
) = line
;
3215 add_insn_after (note
, after
);
3219 /* Make an insn of code INSN with pattern PATTERN
3220 and add it to the end of the doubly-linked list.
3221 If PATTERN is a SEQUENCE, take the elements of it
3222 and emit an insn for each element.
3224 Returns the last insn emitted. */
3230 rtx insn
= last_insn
;
3232 if (GET_CODE (pattern
) == SEQUENCE
)
3236 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3238 insn
= XVECEXP (pattern
, 0, i
);
3244 insn
= make_insn_raw (pattern
);
3251 /* Emit the insns in a chain starting with INSN.
3252 Return the last insn emitted. */
3262 rtx next
= NEXT_INSN (insn
);
3271 /* Emit the insns in a chain starting with INSN and place them in front of
3272 the insn BEFORE. Return the last insn emitted. */
3275 emit_insns_before (insn
, before
)
3283 rtx next
= NEXT_INSN (insn
);
3284 add_insn_before (insn
, before
);
3292 /* Emit the insns in a chain starting with FIRST and place them in back of
3293 the insn AFTER. Return the last insn emitted. */
3296 emit_insns_after (first
, after
)
3301 register rtx after_after
;
3309 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3312 after_after
= NEXT_INSN (after
);
3314 NEXT_INSN (after
) = first
;
3315 PREV_INSN (first
) = after
;
3316 NEXT_INSN (last
) = after_after
;
3318 PREV_INSN (after_after
) = last
;
3320 if (after
== last_insn
)
3325 /* Make an insn of code JUMP_INSN with pattern PATTERN
3326 and add it to the end of the doubly-linked list. */
3329 emit_jump_insn (pattern
)
3332 if (GET_CODE (pattern
) == SEQUENCE
)
3333 return emit_insn (pattern
);
3336 register rtx insn
= make_jump_insn_raw (pattern
);
3342 /* Make an insn of code CALL_INSN with pattern PATTERN
3343 and add it to the end of the doubly-linked list. */
3346 emit_call_insn (pattern
)
3349 if (GET_CODE (pattern
) == SEQUENCE
)
3350 return emit_insn (pattern
);
3353 register rtx insn
= make_call_insn_raw (pattern
);
3355 PUT_CODE (insn
, CALL_INSN
);
3360 /* Add the label LABEL to the end of the doubly-linked list. */
3366 /* This can be called twice for the same label
3367 as a result of the confusion that follows a syntax error!
3368 So make it harmless. */
3369 if (INSN_UID (label
) == 0)
3371 INSN_UID (label
) = cur_insn_uid
++;
3377 /* Make an insn of code BARRIER
3378 and add it to the end of the doubly-linked list. */
3383 register rtx barrier
= rtx_alloc (BARRIER
);
3384 INSN_UID (barrier
) = cur_insn_uid
++;
3389 /* Make an insn of code NOTE
3390 with data-fields specified by FILE and LINE
3391 and add it to the end of the doubly-linked list,
3392 but only if line-numbers are desired for debugging info. */
3395 emit_line_note (file
, line
)
3399 set_file_and_line_for_stmt (file
, line
);
3402 if (no_line_numbers
)
3406 return emit_note (file
, line
);
3409 /* Make an insn of code NOTE
3410 with data-fields specified by FILE and LINE
3411 and add it to the end of the doubly-linked list.
3412 If it is a line-number NOTE, omit it if it matches the previous one. */
3415 emit_note (file
, line
)
3423 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3424 && line
== last_linenum
)
3426 last_filename
= file
;
3427 last_linenum
= line
;
3430 if (no_line_numbers
&& line
> 0)
3436 note
= rtx_alloc (NOTE
);
3437 INSN_UID (note
) = cur_insn_uid
++;
3438 NOTE_SOURCE_FILE (note
) = file
;
3439 NOTE_LINE_NUMBER (note
) = line
;
3444 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3447 emit_line_note_force (file
, line
)
3452 return emit_line_note (file
, line
);
3455 /* Cause next statement to emit a line note even if the line number
3456 has not changed. This is used at the beginning of a function. */
3459 force_next_line_note ()
3464 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3465 note of this type already exists, remove it first. */
3468 set_unique_reg_note (insn
, kind
, datum
)
3473 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
3475 /* First remove the note if there already is one. */
3477 remove_note (insn
, note
);
3479 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
3482 /* Return an indication of which type of insn should have X as a body.
3483 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3489 if (GET_CODE (x
) == CODE_LABEL
)
3491 if (GET_CODE (x
) == CALL
)
3493 if (GET_CODE (x
) == RETURN
)
3495 if (GET_CODE (x
) == SET
)
3497 if (SET_DEST (x
) == pc_rtx
)
3499 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3504 if (GET_CODE (x
) == PARALLEL
)
3507 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3508 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3510 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3511 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3513 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3514 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3520 /* Emit the rtl pattern X as an appropriate kind of insn.
3521 If X is a label, it is simply added into the insn chain. */
3527 enum rtx_code code
= classify_insn (x
);
3529 if (code
== CODE_LABEL
)
3530 return emit_label (x
);
3531 else if (code
== INSN
)
3532 return emit_insn (x
);
3533 else if (code
== JUMP_INSN
)
3535 register rtx insn
= emit_jump_insn (x
);
3536 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
3537 return emit_barrier ();
3540 else if (code
== CALL_INSN
)
3541 return emit_call_insn (x
);
3546 /* Begin emitting insns to a sequence which can be packaged in an
3547 RTL_EXPR. If this sequence will contain something that might cause
3548 the compiler to pop arguments to function calls (because those
3549 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3550 details), use do_pending_stack_adjust before calling this function.
3551 That will ensure that the deferred pops are not accidentally
3552 emitted in the middle of this sequence. */
3557 struct sequence_stack
*tem
;
3559 tem
= (struct sequence_stack
*) xmalloc (sizeof (struct sequence_stack
));
3561 tem
->next
= seq_stack
;
3562 tem
->first
= first_insn
;
3563 tem
->last
= last_insn
;
3564 tem
->sequence_rtl_expr
= seq_rtl_expr
;
3572 /* Similarly, but indicate that this sequence will be placed in T, an
3573 RTL_EXPR. See the documentation for start_sequence for more
3574 information about how to use this function. */
3577 start_sequence_for_rtl_expr (t
)
3585 /* Set up the insn chain starting with FIRST as the current sequence,
3586 saving the previously current one. See the documentation for
3587 start_sequence for more information about how to use this function. */
3590 push_to_sequence (first
)
3597 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3603 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3606 push_to_full_sequence (first
, last
)
3612 /* We really should have the end of the insn chain here. */
3613 if (last
&& NEXT_INSN (last
))
3617 /* Set up the outer-level insn chain
3618 as the current sequence, saving the previously current one. */
3621 push_topmost_sequence ()
3623 struct sequence_stack
*stack
, *top
= NULL
;
3627 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3630 first_insn
= top
->first
;
3631 last_insn
= top
->last
;
3632 seq_rtl_expr
= top
->sequence_rtl_expr
;
3635 /* After emitting to the outer-level insn chain, update the outer-level
3636 insn chain, and restore the previous saved state. */
3639 pop_topmost_sequence ()
3641 struct sequence_stack
*stack
, *top
= NULL
;
3643 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3646 top
->first
= first_insn
;
3647 top
->last
= last_insn
;
3648 /* ??? Why don't we save seq_rtl_expr here? */
3653 /* After emitting to a sequence, restore previous saved state.
3655 To get the contents of the sequence just made, you must call
3656 `gen_sequence' *before* calling here.
3658 If the compiler might have deferred popping arguments while
3659 generating this sequence, and this sequence will not be immediately
3660 inserted into the instruction stream, use do_pending_stack_adjust
3661 before calling gen_sequence. That will ensure that the deferred
3662 pops are inserted into this sequence, and not into some random
3663 location in the instruction stream. See INHIBIT_DEFER_POP for more
3664 information about deferred popping of arguments. */
3669 struct sequence_stack
*tem
= seq_stack
;
3671 first_insn
= tem
->first
;
3672 last_insn
= tem
->last
;
3673 seq_rtl_expr
= tem
->sequence_rtl_expr
;
3674 seq_stack
= tem
->next
;
3679 /* This works like end_sequence, but records the old sequence in FIRST
3683 end_full_sequence (first
, last
)
3686 *first
= first_insn
;
3691 /* Return 1 if currently emitting into a sequence. */
3696 return seq_stack
!= 0;
3699 /* Generate a SEQUENCE rtx containing the insns already emitted
3700 to the current sequence.
3702 This is how the gen_... function from a DEFINE_EXPAND
3703 constructs the SEQUENCE that it returns. */
3713 /* Count the insns in the chain. */
3715 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3718 /* If only one insn, return it rather than a SEQUENCE.
3719 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3720 the case of an empty list.)
3721 We only return the pattern of an insn if its code is INSN and it
3722 has no notes. This ensures that no information gets lost. */
3724 && ! RTX_FRAME_RELATED_P (first_insn
)
3725 && GET_CODE (first_insn
) == INSN
3726 /* Don't throw away any reg notes. */
3727 && REG_NOTES (first_insn
) == 0)
3728 return PATTERN (first_insn
);
3730 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
3732 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3733 XVECEXP (result
, 0, i
) = tem
;
3738 /* Put the various virtual registers into REGNO_REG_RTX. */
3741 init_virtual_regs (es
)
3742 struct emit_status
*es
;
3744 rtx
*ptr
= es
->x_regno_reg_rtx
;
3745 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3746 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3747 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3748 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3749 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
3753 clear_emit_caches ()
3757 /* Clear the start_sequence/gen_sequence cache. */
3758 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3759 sequence_result
[i
] = 0;
3763 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3764 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
3765 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
3766 static int copy_insn_n_scratches
;
3768 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3769 copied an ASM_OPERANDS.
3770 In that case, it is the original input-operand vector. */
3771 static rtvec orig_asm_operands_vector
;
3773 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3774 copied an ASM_OPERANDS.
3775 In that case, it is the copied input-operand vector. */
3776 static rtvec copy_asm_operands_vector
;
3778 /* Likewise for the constraints vector. */
3779 static rtvec orig_asm_constraints_vector
;
3780 static rtvec copy_asm_constraints_vector
;
3782 /* Recursively create a new copy of an rtx for copy_insn.
3783 This function differs from copy_rtx in that it handles SCRATCHes and
3784 ASM_OPERANDs properly.
3785 Normally, this function is not used directly; use copy_insn as front end.
3786 However, you could first copy an insn pattern with copy_insn and then use
3787 this function afterwards to properly copy any REG_NOTEs containing
3796 register RTX_CODE code
;
3797 register const char *format_ptr
;
3799 code
= GET_CODE (orig
);
3815 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
3816 if (copy_insn_scratch_in
[i
] == orig
)
3817 return copy_insn_scratch_out
[i
];
3821 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3822 a LABEL_REF, it isn't sharable. */
3823 if (GET_CODE (XEXP (orig
, 0)) == PLUS
3824 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
3825 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
3829 /* A MEM with a constant address is not sharable. The problem is that
3830 the constant address may need to be reloaded. If the mem is shared,
3831 then reloading one copy of this mem will cause all copies to appear
3832 to have been reloaded. */
3838 copy
= rtx_alloc (code
);
3840 /* Copy the various flags, and other information. We assume that
3841 all fields need copying, and then clear the fields that should
3842 not be copied. That is the sensible default behavior, and forces
3843 us to explicitly document why we are *not* copying a flag. */
3844 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
3846 /* We do not copy the USED flag, which is used as a mark bit during
3847 walks over the RTL. */
3850 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3851 if (GET_RTX_CLASS (code
) == 'i')
3855 copy
->frame_related
= 0;
3858 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
3860 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
3862 copy
->fld
[i
] = orig
->fld
[i
];
3863 switch (*format_ptr
++)
3866 if (XEXP (orig
, i
) != NULL
)
3867 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
3872 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
3873 XVEC (copy
, i
) = copy_asm_constraints_vector
;
3874 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
3875 XVEC (copy
, i
) = copy_asm_operands_vector
;
3876 else if (XVEC (orig
, i
) != NULL
)
3878 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
3879 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
3880 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
3891 /* These are left unchanged. */
3899 if (code
== SCRATCH
)
3901 i
= copy_insn_n_scratches
++;
3902 if (i
>= MAX_RECOG_OPERANDS
)
3904 copy_insn_scratch_in
[i
] = orig
;
3905 copy_insn_scratch_out
[i
] = copy
;
3907 else if (code
== ASM_OPERANDS
)
3909 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
3910 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
3911 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
3912 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
3918 /* Create a new copy of an rtx.
3919 This function differs from copy_rtx in that it handles SCRATCHes and
3920 ASM_OPERANDs properly.
3921 INSN doesn't really have to be a full INSN; it could be just the
3927 copy_insn_n_scratches
= 0;
3928 orig_asm_operands_vector
= 0;
3929 orig_asm_constraints_vector
= 0;
3930 copy_asm_operands_vector
= 0;
3931 copy_asm_constraints_vector
= 0;
3932 return copy_insn_1 (insn
);
3935 /* Initialize data structures and variables in this file
3936 before generating rtl for each function. */
3941 struct function
*f
= cfun
;
3943 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
3946 seq_rtl_expr
= NULL
;
3948 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
3951 first_label_num
= label_num
;
3955 clear_emit_caches ();
3957 /* Init the tables that describe all the pseudo regs. */
3959 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
3961 f
->emit
->regno_pointer_align
3962 = (unsigned char *) xcalloc (f
->emit
->regno_pointer_align_length
,
3963 sizeof (unsigned char));
3966 = (rtx
*) xcalloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
),
3969 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3970 init_virtual_regs (f
->emit
);
3972 /* Indicate that the virtual registers and stack locations are
3974 REG_POINTER (stack_pointer_rtx
) = 1;
3975 REG_POINTER (frame_pointer_rtx
) = 1;
3976 REG_POINTER (hard_frame_pointer_rtx
) = 1;
3977 REG_POINTER (arg_pointer_rtx
) = 1;
3979 REG_POINTER (virtual_incoming_args_rtx
) = 1;
3980 REG_POINTER (virtual_stack_vars_rtx
) = 1;
3981 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
3982 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
3983 REG_POINTER (virtual_cfa_rtx
) = 1;
3985 #ifdef STACK_BOUNDARY
3986 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
3987 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
3988 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
3989 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
3991 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
3992 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
3993 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
3994 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
3995 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
3998 #ifdef INIT_EXPANDERS
4003 /* Mark SS for GC. */
4006 mark_sequence_stack (ss
)
4007 struct sequence_stack
*ss
;
4011 ggc_mark_rtx (ss
->first
);
4012 ggc_mark_tree (ss
->sequence_rtl_expr
);
4017 /* Mark ES for GC. */
4020 mark_emit_status (es
)
4021 struct emit_status
*es
;
4029 for (i
= es
->regno_pointer_align_length
, r
= es
->x_regno_reg_rtx
;
4033 mark_sequence_stack (es
->sequence_stack
);
4034 ggc_mark_tree (es
->sequence_rtl_expr
);
4035 ggc_mark_rtx (es
->x_first_insn
);
4038 /* Create some permanent unique rtl objects shared between all functions.
4039 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4042 init_emit_once (line_numbers
)
4046 enum machine_mode mode
;
4047 enum machine_mode double_mode
;
4049 /* Initialize the CONST_INT hash table. */
4050 const_int_htab
= htab_create (37, const_int_htab_hash
,
4051 const_int_htab_eq
, NULL
);
4052 ggc_add_root (&const_int_htab
, 1, sizeof (const_int_htab
),
4055 no_line_numbers
= ! line_numbers
;
4057 /* Compute the word and byte modes. */
4059 byte_mode
= VOIDmode
;
4060 word_mode
= VOIDmode
;
4061 double_mode
= VOIDmode
;
4063 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4064 mode
= GET_MODE_WIDER_MODE (mode
))
4066 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
4067 && byte_mode
== VOIDmode
)
4070 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
4071 && word_mode
== VOIDmode
)
4075 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4076 mode
= GET_MODE_WIDER_MODE (mode
))
4078 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
4079 && double_mode
== VOIDmode
)
4083 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
4085 /* Assign register numbers to the globally defined register rtx.
4086 This must be done at runtime because the register number field
4087 is in a union and some compilers can't initialize unions. */
4089 pc_rtx
= gen_rtx (PC
, VOIDmode
);
4090 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
4091 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
4092 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
4093 if (hard_frame_pointer_rtx
== 0)
4094 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
4095 HARD_FRAME_POINTER_REGNUM
);
4096 if (arg_pointer_rtx
== 0)
4097 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
4098 virtual_incoming_args_rtx
=
4099 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
4100 virtual_stack_vars_rtx
=
4101 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
4102 virtual_stack_dynamic_rtx
=
4103 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
4104 virtual_outgoing_args_rtx
=
4105 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
4106 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
4108 /* These rtx must be roots if GC is enabled. */
4109 ggc_add_rtx_root (global_rtl
, GR_MAX
);
4111 #ifdef INIT_EXPANDERS
4112 /* This is to initialize {init|mark|free}_machine_status before the first
4113 call to push_function_context_to. This is needed by the Chill front
4114 end which calls push_function_context_to before the first cal to
4115 init_function_start. */
4119 /* Create the unique rtx's for certain rtx codes and operand values. */
4121 /* Don't use gen_rtx here since gen_rtx in this case
4122 tries to use these variables. */
4123 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
4124 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
4125 gen_rtx_raw_CONST_INT (VOIDmode
, i
);
4126 ggc_add_rtx_root (const_int_rtx
, 2 * MAX_SAVED_CONST_INT
+ 1);
4128 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
4129 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
4130 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
4132 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
4134 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
4135 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
4136 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
4137 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
4139 for (i
= 0; i
<= 2; i
++)
4141 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4142 mode
= GET_MODE_WIDER_MODE (mode
))
4144 rtx tem
= rtx_alloc (CONST_DOUBLE
);
4145 union real_extract u
;
4147 /* Zero any holes in a structure. */
4148 memset ((char *) &u
, 0, sizeof u
);
4149 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
4151 /* Avoid trailing garbage in the rtx. */
4152 if (sizeof (u
) < sizeof (HOST_WIDE_INT
))
4153 CONST_DOUBLE_LOW (tem
) = 0;
4154 if (sizeof (u
) < 2 * sizeof (HOST_WIDE_INT
))
4155 CONST_DOUBLE_HIGH (tem
) = 0;
4157 memcpy (&CONST_DOUBLE_LOW (tem
), &u
, sizeof u
);
4158 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
4159 CONST_DOUBLE_CHAIN (tem
) = NULL_RTX
;
4160 PUT_MODE (tem
, mode
);
4162 const_tiny_rtx
[i
][(int) mode
] = tem
;
4165 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
4167 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4168 mode
= GET_MODE_WIDER_MODE (mode
))
4169 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4171 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
4173 mode
= GET_MODE_WIDER_MODE (mode
))
4174 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4177 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
4178 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
4179 const_tiny_rtx
[0][i
] = const0_rtx
;
4181 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
4182 if (STORE_FLAG_VALUE
== 1)
4183 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
4185 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4186 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4187 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4188 ggc_add_rtx_root ((rtx
*) const_tiny_rtx
, sizeof const_tiny_rtx
/ sizeof (rtx
));
4189 ggc_add_rtx_root (&const_true_rtx
, 1);
4191 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4192 return_address_pointer_rtx
4193 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
4197 struct_value_rtx
= STRUCT_VALUE
;
4199 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
4202 #ifdef STRUCT_VALUE_INCOMING
4203 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
4205 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4206 struct_value_incoming_rtx
4207 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
4209 struct_value_incoming_rtx
= struct_value_rtx
;
4213 #ifdef STATIC_CHAIN_REGNUM
4214 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
4216 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4217 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
4218 static_chain_incoming_rtx
4219 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
4222 static_chain_incoming_rtx
= static_chain_rtx
;
4226 static_chain_rtx
= STATIC_CHAIN
;
4228 #ifdef STATIC_CHAIN_INCOMING
4229 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
4231 static_chain_incoming_rtx
= static_chain_rtx
;
4235 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
4236 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
4238 ggc_add_rtx_root (&pic_offset_table_rtx
, 1);
4239 ggc_add_rtx_root (&struct_value_rtx
, 1);
4240 ggc_add_rtx_root (&struct_value_incoming_rtx
, 1);
4241 ggc_add_rtx_root (&static_chain_rtx
, 1);
4242 ggc_add_rtx_root (&static_chain_incoming_rtx
, 1);
4243 ggc_add_rtx_root (&return_address_pointer_rtx
, 1);
4246 /* Query and clear/ restore no_line_numbers. This is used by the
4247 switch / case handling in stmt.c to give proper line numbers in
4248 warnings about unreachable code. */
4251 force_line_numbers ()
4253 int old
= no_line_numbers
;
4255 no_line_numbers
= 0;
4257 force_next_line_note ();
4262 restore_line_number_status (old_value
)
4265 no_line_numbers
= old_value
;