1 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
4 * lra-constraints.cc (lra_constraints): Copy substituted
6 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
8 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
10 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
11 return statement in the varying case.
13 2023-09-25 Xi Ruoyao <xry111@xry111.site>
15 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
17 2023-09-25 Andrew Pinski <apinski@marvell.com>
19 PR tree-optimization/110386
20 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
22 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
27 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
30 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
33 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
36 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
37 target_option_default_node when the callee has no option
38 attributes, also simplify the existing code accordingly.
40 2023-09-25 Guo Jie <guojie@loongson.cn>
42 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
43 pattern for vector construction.
44 (vec_set<mode>_internal): Ditto.
45 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
46 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
47 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
48 Optimized the implementation of vector construction.
49 (loongarch_expand_vector_init_same): New function.
50 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
51 pattern for vector construction.
52 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
54 (vec_concatv2df): Ditto.
55 (vec_concatv4sf): Ditto.
57 2023-09-24 Pan Li <pan2.li@intel.com>
60 * config/riscv/riscv-v.cc
61 (expand_vector_init_merge_repeating_sequence): Bugfix
63 2023-09-24 Andrew Pinski <apinski@marvell.com>
65 PR tree-optimization/111543
66 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
68 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
70 * config/riscv/autovec-opt.md: Extend VLS modes
71 * config/riscv/vector-iterators.md: Ditto.
73 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
75 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
77 2023-09-23 Pan Li <pan2.li@intel.com>
79 * config/riscv/autovec.md (floor<mode>2): New pattern.
80 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
81 (enum insn_type): Ditto.
82 (expand_vec_floor): New function decl.
83 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
84 (expand_vec_floor): Ditto.
86 2023-09-22 Pan Li <pan2.li@intel.com>
88 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
89 (emit_vec_float_cmp_mask): Rename.
90 (expand_vec_copysign): Ditto.
91 (emit_vec_copysign): Ditto.
92 (emit_vec_abs): New function impl.
93 (emit_vec_cvt_x_f): Ditto.
94 (emit_vec_cvt_f_x): Ditto.
95 (expand_vec_ceil): Ditto.
97 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
99 * config/riscv/vector-iterators.md: Extend VLS modes.
101 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
103 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
104 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
105 (vec_duplicate<mode>): Ditto.
107 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
109 * config/riscv/autovec.md: Add VLS conditional patterns.
110 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
111 (expand_cond_binop): Ditto.
112 (expand_cond_ternop): Ditto.
113 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
114 (expand_cond_binop): Ditto.
115 (expand_cond_ternop): Ditto.
117 2023-09-22 xuli <xuli1@eswincomputing.com>
120 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
121 into vrgatherei16.vv.
123 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
125 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
126 New combine patterns.
127 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
129 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
131 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
132 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
134 2023-09-22 Pan Li <pan2.li@intel.com>
136 * config/riscv/autovec.md (ceil<mode>2): New pattern.
137 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
138 (enum insn_type): Ditto.
139 (expand_vec_ceil): New function decl.
140 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
141 (expand_vec_float_cmp_mask): Ditto.
142 (expand_vec_copysign): Ditto.
143 (expand_vec_ceil): Ditto.
144 * config/riscv/vector.md: Add VLS mode support.
146 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
148 * config/riscv/autovec.md: Extend VLS modes.
150 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
152 * config/riscv/vector-iterators.md: Extend VLS modes.
154 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
155 Robin Dapp <rdapp.gcc@gmail.com>
157 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
158 (emit_nonvlmax_insn): Adjust comments.
159 (emit_vlmax_insn_lra): Adjust comments.
161 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
163 * config.gcc (*linux*): Set rust target_objs, and
164 target_has_targetrustm,
165 * config/t-linux (linux-rust.o): New rule.
166 * config/linux-rust.cc: New file.
168 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
170 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
171 rust_target_objs and target_has_targetrustm.
172 * config/t-winnt (winnt-rust.o): New rule.
173 * config/winnt-rust.cc: New file.
175 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
177 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
178 and target_has_targetrustm.
179 * config/fuchsia-rust.cc: New file.
180 * config/t-fuchsia: New file.
182 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
184 * config.gcc (*-*-vxworks*): Set rust_target_objs and
185 target_has_targetrustm.
186 * config/t-vxworks (vxworks-rust.o): New rule.
187 * config/vxworks-rust.cc: New file.
189 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
191 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
192 target_has_targetrustm.
193 * config/t-dragonfly (dragonfly-rust.o): New rule.
194 * config/dragonfly-rust.cc: New file.
196 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
198 * config.gcc (*-*-solaris2*): Set rust_target_objs and
199 target_has_targetrustm.
200 * config/t-sol2 (sol2-rust.o): New rule.
201 * config/sol2-rust.cc: New file.
203 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
205 * config.gcc (*-*-openbsd*): Set rust_target_objs and
206 target_has_targetrustm.
207 * config/t-openbsd (openbsd-rust.o): New rule.
208 * config/openbsd-rust.cc: New file.
210 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
212 * config.gcc (*-*-netbsd*): Set rust_target_objs and
213 target_has_targetrustm.
214 * config/t-netbsd (netbsd-rust.o): New rule.
215 * config/netbsd-rust.cc: New file.
217 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
219 * config.gcc (*-*-freebsd*): Set rust_target_objs and
220 target_has_targetrustm.
221 * config/t-freebsd (freebsd-rust.o): New rule.
222 * config/freebsd-rust.cc: New file.
224 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
226 * config.gcc (*-*-darwin*): Set rust_target_objs and
227 target_has_targetrustm.
228 * config/t-darwin (darwin-rust.o): New rule.
229 * config/darwin-rust.cc: New file.
231 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
233 * config/i386/t-i386 (i386-rust.o): New rule.
234 * config/i386/i386-rust.cc: New file.
235 * config/i386/i386-rust.h: New file.
237 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
239 * doc/tm.texi: Regenerate.
240 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
242 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
244 * doc/tm.texi: Regenerate.
245 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
246 TARGET_RUST_CPU_INFO.
248 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
250 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
251 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
252 (tm_rust.h, cs-tm_rust.h, default-rust.o,
253 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
254 (s-tm-texi): Also check timestamp on rust-target.def.
255 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
256 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
257 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
259 * configure: Regenerate.
260 * configure.ac (tm_rust_file_list, tm_rust_include_list,
261 rust_target_objs): Add substitutes.
262 * doc/tm.texi: Regenerate.
263 * doc/tm.texi.in (targetrustm): Document.
264 (target_has_targetrustm): Document.
265 * genhooks.cc: Include rust/rust-target.def.
266 * config/default-rust.cc: New file.
268 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
271 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
272 * config/riscv/predicates.md (autovec_else_operand): New predicate.
273 * config/riscv/riscv-v.cc (get_else_operand): New function.
274 (expand_cond_len_unop): Adapt ELSE value.
275 (expand_cond_len_binop): Ditto.
276 (expand_cond_len_ternop): Ditto.
277 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
278 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
280 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
283 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
285 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
287 PR tree-optimization/111355
288 * match.pd ((X + C) / N): Update pattern.
290 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
292 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
294 2023-09-21 xuli <xuli1@eswincomputing.com>
297 * config/riscv/constraints.md (c01): const_int 1.
301 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
302 (vector_eew16_stride_operand): Ditto.
303 (vector_eew32_stride_operand): Ditto.
304 (vector_eew64_stride_operand): Ditto.
305 * config/riscv/vector-iterators.md: New iterator for stride operand.
306 * config/riscv/vector.md: Add stride = element width constraint.
308 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
310 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
311 (const_1_or_4_operand): Ditto.
312 (vector_gs_scale_operand_16): Ditto.
313 (vector_gs_scale_operand_32): Ditto.
314 * config/riscv/vector-iterators.md: Adjust.
316 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
318 * config/riscv/autovec.md: Extend VLS modes.
319 * config/riscv/vector-iterators.md: Ditto.
320 * config/riscv/vector.md: Ditto.
322 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
324 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
326 (ssa_cache::dump): Don't print GLOBAL RANGE header.
327 (ssa_lazy_cache::merge_range): Adjust return value meaning.
328 (ranger_cache::dump): Print GLOBAL RANGE header.
330 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
332 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
334 (foperator_unordered_gt::fold_range): Same.
335 (foperator_unordered_lt::fold_range): Same.
336 (foperator_unordered_le::fold_range): Same.
338 2023-09-20 Jakub Jelinek <jakub@redhat.com>
340 * builtins.h (type_to_class): Declare.
341 * builtins.cc (type_to_class): No longer static. Return
342 int rather than enum.
343 * doc/extend.texi (__builtin_classify_type): Document.
345 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
348 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
349 * optabs.cc (maybe_legitimize_operand): Ditto.
350 (can_reuse_operands_p): Ditto.
351 * optabs.h (enum expand_operand_type): Ditto.
352 (create_undefined_input_operand): Ditto.
354 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
356 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
357 'omp allocate' variables; move stack cleanup after other
359 (omp_notice_variable): Process original decl when decl
360 of the value-expression for a 'omp allocate' variable is passed.
361 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
363 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
365 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
366 support simplifying vector int not only scalar int.
368 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
370 * config/riscv/vector-iterators.md: Extend VLS floating-point.
372 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
374 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
376 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
379 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
380 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
382 2023-09-20 Richard Biener <rguenther@suse.de>
384 PR tree-optimization/111489
385 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
387 2023-09-20 Richard Biener <rguenther@suse.de>
389 PR tree-optimization/111489
390 * doc/invoke.texi (--param uninit-max-chain-len): Document.
391 (--param uninit-max-num-chains): Likewise.
392 * params.opt (-param=uninit-max-chain-len=): New.
393 (-param=uninit-max-num-chains=): Likewise.
394 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
395 param_uninit_max_num_chains.
396 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
397 (uninit_analysis::init_use_preds): Avoid VLA.
398 (uninit_analysis::init_from_phi_def): Likewise.
399 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
402 2023-09-20 Jakub Jelinek <jakub@redhat.com>
404 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
405 GET_MODE_PRECISION of TImode or DImode depending on whether
406 TImode is supported scalar mode.
407 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
408 * expr.cc (expand_expr_real_1): Likewise.
409 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
410 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
412 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
414 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
415 (*n<optab><mode>): Ditto.
416 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
417 (*<any_shiftrt:optab>trunc<mode>): Ditto.
418 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
419 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
420 (*single_widen_mult<any_extend:su><mode>): Ditto.
421 (*single_widen_mul<any_extend:su><mode>): Ditto.
422 (*single_widen_mult<mode>): Ditto.
423 (*single_widen_mul<mode>): Ditto.
424 (*dual_widen_fma<mode>): Ditto.
425 (*dual_widen_fma<su><mode>): Ditto.
426 (*single_widen_fma<mode>): Ditto.
427 (*single_widen_fma<su><mode>): Ditto.
428 (*dual_fma<mode>): Ditto.
429 (*single_fma<mode>): Ditto.
430 (*dual_fnma<mode>): Ditto.
431 (*dual_widen_fnma<mode>): Ditto.
432 (*single_fnma<mode>): Ditto.
433 (*single_widen_fnma<mode>): Ditto.
434 (*dual_fms<mode>): Ditto.
435 (*dual_widen_fms<mode>): Ditto.
436 (*single_fms<mode>): Ditto.
437 (*single_widen_fms<mode>): Ditto.
438 (*dual_fnms<mode>): Ditto.
439 (*dual_widen_fnms<mode>): Ditto.
440 (*single_fnms<mode>): Ditto.
441 (*single_widen_fnms<mode>): Ditto.
443 2023-09-20 Jakub Jelinek <jakub@redhat.com>
446 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
447 on vars or function decls if -fopenmp or -fopenmp-simd.
449 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
452 * config/riscv/autovec-opt.md: Add missed operand.
454 2023-09-20 Omar Sandoval <osandov@osandov.com>
457 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
458 dwarf_split_debug_info.
460 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
462 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
463 (vectorize_related_mode): Add VLS related modes.
464 * config/riscv/vector-iterators.md: Extend VLS modes.
466 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
468 PR rtl-optimization/110071
469 * ira-color.cc (improve_allocation): Consider cost of callee
472 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
473 Xi Ruoyao <xry111@xry111.site>
475 * configure: Regenerate.
476 * configure.ac: Checking assembler for -mno-relax support.
477 Disable relaxation when probing leb128 support.
479 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
481 * config.in: Regenerate.
482 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
483 mrelax. And set the initial value of explicit-relocs according to the
485 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
486 --no-relax option to the linker.
487 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
488 -mno-relax, pass the -mno-relax option to the assembler.
489 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
490 * config/loongarch/loongarch.opt: Regenerate.
491 * configure: Regenerate.
492 * configure.ac: Add detection of support for binutils relax function.
494 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
496 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
497 -fdeps-target= flags.
498 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
499 only -fdeps-format= is specified.
500 * json.h: Add a TODO item to refactor out to share with
503 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
504 Jason Merrill <jason@redhat.com>
506 * gcc.cc (join_spec_func): Add a spec function to join all
509 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
511 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
512 src_op_0 var to avoid rtl check error.
514 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
516 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
518 (operator_not_equal::fold_range): Handle VREL_EQ.
519 (operator_lt::fold_range): Remove special casing for VREL_EQ.
520 (operator_gt::fold_range): Same.
521 (foperator_unordered_equal::fold_range): Same.
523 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
525 * doc/extend.texi: Document attributes hot, cold on C++ types.
527 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
529 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
530 modulo instruction is disabled.
531 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
532 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
533 (define_expand umod<mode>3): New.
534 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
535 instruction is disabled.
536 (umodti3, modti3): Check if the modulo instruction is disabled.
538 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
540 * doc/gm2.texi (fdebug-builtins): Correct description.
542 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
544 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
545 * config/iq2000/iq2000.md (rotrsi3): Use it.
547 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
549 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
550 (operator_lt::op2_range): Same.
551 (operator_le::op1_range): Same.
552 (operator_le::op2_range): Same.
553 (operator_gt::op1_range): Same.
554 (operator_gt::op2_range): Same.
555 (operator_ge::op1_range): Same.
556 (operator_ge::op2_range): Same.
557 (foperator_unordered_lt::op1_range): Same.
558 (foperator_unordered_lt::op2_range): Same.
559 (foperator_unordered_le::op1_range): Same.
560 (foperator_unordered_le::op2_range): Same.
561 (foperator_unordered_gt::op1_range): Same.
562 (foperator_unordered_gt::op2_range): Same.
563 (foperator_unordered_ge::op1_range): Same.
564 (foperator_unordered_ge::op2_range): Same.
566 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
568 * value-range.h (frange::update_nan): New.
570 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
572 * range-op-float.cc (operator_not_equal::op2_range): New.
573 * range-op-mixed.h: Add operator_not_equal::op2_range.
575 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
577 PR tree-optimization/110080
578 PR tree-optimization/110249
579 * tree-vrp.cc (remove_unreachable::final_p): New.
580 (remove_unreachable::maybe_register): Rename from
581 maybe_register_block and call early or final routine.
582 (fully_replaceable): New.
583 (remove_unreachable::handle_early): New.
584 (remove_unreachable::remove_and_update_globals): Remove
585 non-final processing.
586 (rvrp_folder::rvrp_folder): Add final flag to constructor.
587 (rvrp_folder::post_fold_bb): Remove unreachable registration.
588 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
589 (execute_ranger_vrp): Adjust some call parameters.
591 2023-09-19 Richard Biener <rguenther@suse.de>
594 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
596 * tree-pretty-print.cc (op_symbol): Likewise.
597 (op_symbol_code): Print TDF_GIMPLE variant if requested.
598 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
600 (dump_gimple_cond): Likewise.
602 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
603 Pan Li <pan2.li@intel.com>
605 * tree-streamer.h (bp_unpack_machine_mode): If
606 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
608 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
610 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
612 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
614 * config/riscv/autovec.md: Extend VLS modes.
615 * config/riscv/vector.md: Ditto.
617 2023-09-19 Richard Biener <rguenther@suse.de>
619 PR tree-optimization/111465
620 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
621 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
623 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
625 * config/riscv/autovec.md: Extend VLS floating-point modes.
626 * config/riscv/vector.md: Ditto.
628 2023-09-19 Jakub Jelinek <jakub@redhat.com>
630 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
631 nor check type_has_mode_precision_p for width larger than [TD]Imode
633 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
634 to type. Use boolean_true_node instead of
635 constant_boolean_node (true, boolean_type_node). Formatting fixes.
637 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
639 * config/riscv/autovec.md: Add VLS modes.
640 * config/riscv/vector.md: Ditto.
642 2023-09-19 Jakub Jelinek <jakub@redhat.com>
644 * tree.cc (build_bitint_type): Assert precision is not 0, or
646 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
647 of unsigned _BitInt(1).
649 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
651 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
652 Removed old combine patterns.
653 (*single_<optab>mult_plus<mode>): Ditto.
654 (*double_<optab>mult_plus<mode>): Ditto.
655 (*sign_zero_extend_fma): Ditto.
656 (*zero_sign_extend_fma): Ditto.
657 (*double_widen_fma<mode>): Ditto.
658 (*single_widen_fma<mode>): Ditto.
659 (*double_widen_fnma<mode>): Ditto.
660 (*single_widen_fnma<mode>): Ditto.
661 (*double_widen_fms<mode>): Ditto.
662 (*single_widen_fms<mode>): Ditto.
663 (*double_widen_fnms<mode>): Ditto.
664 (*single_widen_fnms<mode>): Ditto.
665 (*reduc_plus_scal_<mode>): Adjust name.
666 (*widen_reduc_plus_scal_<mode>): Adjust name.
667 (*dual_widen_fma<mode>): New combine pattern.
668 (*dual_widen_fmasu<mode>): Ditto.
669 (*dual_widen_fmaus<mode>): Ditto.
670 (*dual_fma<mode>): Ditto.
671 (*single_fma<mode>): Ditto.
672 (*dual_fnma<mode>): Ditto.
673 (*single_fnma<mode>): Ditto.
674 (*dual_fms<mode>): Ditto.
675 (*single_fms<mode>): Ditto.
676 (*dual_fnms<mode>): Ditto.
677 (*single_fnms<mode>): Ditto.
678 * config/riscv/autovec.md (fma<mode>4):
679 Reafctor fma pattern.
680 (*fma<VI:mode><P:mode>): Removed.
681 (fnma<mode>4): Reafctor.
682 (*fnma<VI:mode><P:mode>): Removed.
683 (*fma<VF:mode><P:mode>): Removed.
684 (*fnma<VF:mode><P:mode>): Removed.
685 (fms<mode>4): Reafctor.
686 (*fms<VF:mode><P:mode>): Removed.
687 (fnms<mode>4): Reafctor.
688 (*fnms<VF:mode><P:mode>): Removed.
689 * config/riscv/riscv-protos.h (prepare_ternary_operands):
691 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
692 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
693 (*pred_mul_plus<mode>): Removed.
694 (*pred_mul_plus<mode>_scalar): Removed.
695 (*pred_mul_plus<mode>_extended_scalar): Removed.
696 (*pred_minus_mul<mode>_undef): New pattern.
697 (*pred_minus_mul<mode>): Removed.
698 (*pred_minus_mul<mode>_scalar): Removed.
699 (*pred_minus_mul<mode>_extended_scalar): Removed.
700 (*pred_mul_<optab><mode>_undef): New pattern.
701 (*pred_mul_<optab><mode>): Removed.
702 (*pred_mul_<optab><mode>_scalar): Removed.
703 (*pred_mul_neg_<optab><mode>_undef): New pattern.
704 (*pred_mul_neg_<optab><mode>): Removed.
705 (*pred_mul_neg_<optab><mode>_scalar): Removed.
707 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
709 * config/riscv/riscv-vector-builtins.cc
710 (builtin_decl, expand_builtin): Replace SVE with RVV.
712 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
714 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
715 riscv-cmo.def and riscv-scalar-crypto.def.
717 2023-09-18 Pan Li <pan2.li@intel.com>
719 * config/riscv/autovec.md: Extend to vls mode.
721 2023-09-18 Pan Li <pan2.li@intel.com>
723 * config/riscv/autovec.md: Bugfix.
724 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
726 2023-09-18 Andrew Pinski <apinski@marvell.com>
728 PR tree-optimization/111442
729 * match.pd (zero_one_valued_p): Have the bit_and match not be
732 2023-09-18 Andrew Pinski <apinski@marvell.com>
734 PR tree-optimization/111435
735 * match.pd (zero_one_valued_p): Don't do recursion
738 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
740 * config/darwin-protos.h (enum darwin_external_toolchain): New.
741 * config/darwin.cc (DSYMUTIL_VERSION): New.
742 (darwin_override_options): Choose the default debug DWARF version
743 depending on the configured dsymutil version.
745 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
747 * configure: Regenerate.
748 * configure.ac: Handle explict disable of stdlib option, set
751 2023-09-18 Andrew Pinski <apinski@marvell.com>
753 PR tree-optimization/111431
754 * match.pd (`(a == CST) & a`): New pattern.
756 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
758 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
759 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
761 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
764 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
765 Add support for immediates using shifted ORR/BIC.
766 (aarch64_split_dimode_const_store): Apply if we save one instruction.
767 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
770 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
772 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
773 (neoverse-v1): Place before zeus.
774 (neoverse-v2): Place before demeter.
775 * config/aarch64/aarch64-tune.md: Regenerate.
777 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
779 * config/riscv/autovec.md: Add VLS modes.
780 * config/riscv/vector-iterators.md: Ditto.
781 * config/riscv/vector.md: Ditto.
783 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
785 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
786 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
788 2023-09-18 Richard Biener <rguenther@suse.de>
790 PR tree-optimization/111294
791 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
793 (back_threader::find_paths_to_names): Adjust.
794 (back_threader::maybe_thread_block): Likewise.
795 (back_threader_profitability::possibly_profitable_path_p): Remove
796 code applying extra costs to copies PHIs.
798 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
800 * config/riscv/autovec.md: Extend VLS modes.
801 * config/riscv/vector.md: Ditto.
803 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
805 * config/riscv/vector.md (mov<mode>): New pattern.
806 (*mov<mode>_mem_to_mem): Ditto.
808 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
809 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
810 (*mov<mode>_vls): Ditto.
811 (movmisalign<mode>): Ditto.
812 (@vec_duplicate<mode>): Ditto.
813 * config/riscv/autovec-vls.md: Removed.
815 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
818 * config/riscv/autovec.md: Add VLS modes.
820 2023-09-18 Jason Merrill <jason@redhat.com>
822 * doc/gty.texi: Add discussion of cache vs. deletable.
824 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
826 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
827 (copysign<mode>3): Ditto.
828 (xorsign<mode>3): Ditto.
829 (<optab><mode>2): Ditto.
830 * config/riscv/autovec.md: Extend VLS modes.
832 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
835 * match.pd ((t * 2) / 2): Update pattern.
837 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
839 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
841 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
844 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
845 (vec_extract<mode><vel>): Ditto.
846 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
847 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
848 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
850 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
852 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
853 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
854 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
855 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
857 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
858 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
859 (*riscv_<sha256_op>_si): New raw instruction for RV32.
860 (*riscv_<sm3_op>_si): Ditto.
861 (*riscv_<sm4_op>_si): Ditto.
862 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
863 (riscv_<sm3_op>_di_extended): Ditto.
864 (riscv_<sm4_op>_di_extended): Ditto.
865 (riscv_<sha256_op>_si): New common instruction expansion.
866 (riscv_<sm3_op>_si): Ditto.
867 (riscv_<sm4_op>_si): Ditto.
868 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
869 "crypto_zksh" and "crypto_zksed". Remove availability
870 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
871 * config/riscv/riscv-ftypes.def: Remove unused function type.
872 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
873 intrinsics to operate on uint32_t.
875 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
877 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
878 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
879 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
880 Removed as no longer used.
881 (RISCV_ATYPE_UDI): New for uint64_t.
882 * config/riscv/riscv-cmo.def: Make types unsigned for not working
883 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
884 argument/return types.
885 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
886 number and shift amount types unsigned.
887 * config/riscv/riscv-scalar-crypto.def: Ditto.
889 2023-09-16 Pan Li <pan2.li@intel.com>
891 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
893 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
895 * config/riscv/predicates.md: Restrict predicate
898 2023-09-15 Andrew Pinski <apinski@marvell.com>
900 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
901 Also match `a & zero_one_valued_p` too.
903 2023-09-15 Andrew Pinski <apinski@marvell.com>
905 PR tree-optimization/111414
906 * match.pd (`(1 >> X) != 0`): Check to see if
907 the integer_onep was an integral type (not a vector type).
909 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
911 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
912 run phi analysis, and do it before loop analysis.
914 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
916 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
919 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
921 PR tree-optimization/111407
922 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
923 when one of the operands is subject to abnormal coalescing.
925 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
927 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
928 (enum insn_type): Ditto.
929 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
930 (emit_vlmax_insn): Adjust.
931 (emit_nonvlmax_insn): Adjust.
932 (emit_vlmax_insn_lra): Adjust.
934 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
936 * config/riscv/autovec-opt.md: Adjust.
937 * config/riscv/autovec.md: Ditto.
938 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
939 (expand_reduction): Adjust expand_reduction prototype.
940 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
941 (expand_reduction): Refactor expand_reduction.
943 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
946 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
947 the lower memory access to a mem-pair operand.
949 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
951 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
952 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
953 before the driver canonicalization routines.
954 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
955 to loongarch-driver.h
956 * config/loongarch/t-linux: Move multilib-related definitions to
958 * config/loongarch/t-multilib: New file. Inject library build
959 options obtained from --with-multilib-list.
960 * config/loongarch/t-loongarch: Same.
962 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
965 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
967 (*fold_left_widen_plus_<mode>): Ditto.
968 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
969 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
970 Change from define_expand to define_insn_and_split.
971 (fold_left_plus_<mode>): Ditto.
972 (mask_len_fold_left_plus_<mode>): Ditto.
973 * config/riscv/riscv-v.cc (expand_reduction):
974 Support widen reduction.
975 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
976 Add new iterators and attrs.
978 2023-09-14 David Malcolm <dmalcolm@redhat.com>
980 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
981 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
982 (sarif_thread_flow::sarif_thread_flow): New.
983 (sarif_builder::make_code_flow_object): Reimplement, creating
984 per-thread threadFlow objects, populating them with the relevant
986 (sarif_builder::make_thread_flow_object): Delete, moving the
987 code into sarif_builder::make_code_flow_object.
988 (sarif_builder::make_thread_flow_location_object): Add
989 "path_event_idx" param. Use it to set "executionOrder"
991 * diagnostic-path.h (diagnostic_event::get_thread_id): New
993 (class diagnostic_thread): New.
994 (diagnostic_path::num_threads): New pure-virtual vfunc.
995 (diagnostic_path::get_thread): New pure-virtual vfunc.
996 (diagnostic_path::multithreaded_p): New decl.
997 (simple_diagnostic_event::simple_diagnostic_event): Add optional
999 (simple_diagnostic_event::get_thread_id): New accessor.
1000 (simple_diagnostic_event::m_thread_id): New.
1001 (class simple_diagnostic_thread): New.
1002 (simple_diagnostic_path::simple_diagnostic_path): Move definition
1004 (simple_diagnostic_path::num_threads): New.
1005 (simple_diagnostic_path::get_thread): New.
1006 (simple_diagnostic_path::add_thread): New.
1007 (simple_diagnostic_path::add_thread_event): New.
1008 (simple_diagnostic_path::m_threads): New.
1009 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
1010 param for overriding the context's printer.
1011 (diagnostic_show_locus): Likwise.
1012 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
1013 Move here from diagnostic-path.h. Add main thread.
1014 (simple_diagnostic_path::num_threads): New.
1015 (simple_diagnostic_path::get_thread): New.
1016 (simple_diagnostic_path::add_thread): New.
1017 (simple_diagnostic_path::add_thread_event): New.
1018 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
1019 param and use it to initialize m_thread_id. Reformat.
1020 * diagnostic.h: Add pretty_printer param for overriding the
1022 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
1023 (can_consolidate_events): Compare thread ids.
1024 (class per_thread_summary): New.
1025 (event_range::event_range): Add per_thread_summary arg.
1026 (event_range::print): Add "pp" param and use it rather than dc's
1028 (event_range::m_thread_id): New field.
1029 (event_range::m_per_thread_summary): New field.
1030 (path_summary::multithreaded_p): New.
1031 (path_summary::get_events_for_thread_id): New.
1032 (path_summary::m_per_thread_summary): New field.
1033 (path_summary::m_thread_id_to_events): New field.
1034 (path_summary::get_or_create_events_for_thread_id): New.
1035 (path_summary::path_summary): Create per_thread_summary instances
1036 as needed and associate the event_range instances with them.
1037 (base_indent): Move here from print_path_summary_as_text.
1038 (per_frame_indent): Likewise.
1039 (class thread_event_printer): New, adapted from parts of
1040 print_path_summary_as_text.
1041 (print_path_summary_as_text): Make static. Reimplement to
1042 moving most of existing code to class thread_event_printer,
1043 capturing state as per-thread as appropriate.
1044 (default_tree_diagnostic_path_printer): Add missing 'break' on
1047 2023-09-14 David Malcolm <dmalcolm@redhat.com>
1049 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
1050 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
1051 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
1052 clearing the deletable gcc_root_tab_t.
1053 (ggc_common_finalize): New.
1054 * ggc.h (ggc_common_finalize): New decl.
1055 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
1056 ggc_common_finalize.
1058 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
1060 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
1061 unsigned comparisons.
1062 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
1063 generation of salt/saltu instructions.
1064 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
1065 * config/xtensa/xtensa.md (salt, saltu): New instruction
1068 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
1070 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
1073 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
1075 * config/riscv/autovec.md: Change rtx code to unspec.
1076 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
1077 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
1078 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
1080 (class widen_freducop): Removed.
1081 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
1082 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
1083 (@pred_<reduc_op><mode>): New name.
1084 (@pred_widen_reduc_plus<v_su><mode>): Change name.
1085 (@pred_reduc_plus<order><mode>): Change name.
1086 (@pred_widen_reduc_plus<order><mode>): Change name.
1088 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
1090 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
1091 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
1092 * config/riscv/vector-iterators.md: New iterators and attrs.
1093 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
1095 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
1096 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
1097 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
1098 (@pred_reduc_<reduc><mode>): Added.
1099 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
1100 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
1101 (@pred_widen_reduc_plus<v_su><mode>): Added.
1102 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
1103 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
1104 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
1105 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
1106 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
1107 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
1108 (@pred_reduc_plus<order><mode>): Added.
1109 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
1110 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
1111 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
1112 (@pred_widen_reduc_plus<order><mode>): Added.
1114 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
1116 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
1117 Move WHILELO handling to...
1118 (aarch64_vector_costs::finish_cost): ...here. Check whether the
1119 vectorizer has decided to use a predicated loop.
1121 2023-09-14 Andrew Pinski <apinski@marvell.com>
1123 PR tree-optimization/106164
1124 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
1125 Expand to support constants that are off by one.
1127 2023-09-14 Andrew Pinski <apinski@marvell.com>
1129 * genmatch.cc (parser::parse_result): For an else clause
1130 of an if statement inside a switch, error out explictly.
1132 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1134 * config/riscv/autovec-opt.md: Add VLS mask modes.
1135 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
1136 (vcond_mask_<mode><vm>): Add VLS mask modes.
1137 * config/riscv/vector.md: Ditto.
1139 2023-09-14 Richard Biener <rguenther@suse.de>
1141 PR tree-optimization/111294
1142 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
1143 operands that eventually become dead and use simple_dce_from_worklist
1144 to remove their definitions if they did so.
1146 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
1148 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
1149 Accept all nonimmediate_operands, but keep the existing constraints.
1150 If the instruction is split before RA, load invalid addresses into
1151 a temporary register.
1152 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
1154 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1157 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
1158 (vector_insn_info::global_merge): Ditto.
1159 (vector_insn_info::get_avl_or_vl_reg): Ditto.
1161 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1163 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
1165 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
1167 * config/loongarch/loongarch-def.c: Modify the default value of
1170 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
1172 * config/xtensa/xtensa.cc (xtensa_expand_scc):
1173 Revert the changes from the last patch, as the work in the RTL
1174 expansion pass is too far to determine the physical registers.
1175 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
1176 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
1178 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
1181 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
1183 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1185 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
1186 (@vec_extract<mode><vel>): Ditto.
1187 * config/riscv/vector.md: Ditto
1189 2023-09-13 Andrew Pinski <apinski@marvell.com>
1191 * match.pd (`X <= MAX(X, Y)`):
1192 Move before `MIN (X, C1) < C2` pattern.
1194 2023-09-13 Andrew Pinski <apinski@marvell.com>
1196 PR tree-optimization/111364
1197 * match.pd (`MIN (X, Y) == X`): Extend
1198 to min/lt, min/ge, max/gt, max/le.
1200 2023-09-13 Andrew Pinski <apinski@marvell.com>
1202 PR tree-optimization/111345
1203 * match.pd (`Y > (X % Y)`): Merge
1205 (`(X % Y) < Y`): Pattern by adding `:c`
1208 2023-09-13 Richard Biener <rguenther@suse.de>
1210 PR tree-optimization/111387
1211 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
1212 EDGE_DFS_BACK when doing BB vectorization.
1213 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
1214 to compute RPO and mark backedges.
1216 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
1218 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
1219 New combine pattern.
1220 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
1221 (<mulh_table><mode>3_highpart): Merged pattern.
1222 (umul<mode>3_highpart): Mrege smul and umul.
1223 * config/riscv/vector-iterators.md (umul): New iterators.
1224 (UNSPEC_VMULHU): New iterators.
1226 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
1228 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
1229 New combine pattern.
1230 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
1232 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
1234 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
1235 (*cond_copysign<mode>): New combine pattern.
1236 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
1238 2023-09-13 Richard Biener <rguenther@suse.de>
1240 PR tree-optimization/111397
1241 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
1242 argument to specify whether the PHI destination doesn't flow in
1243 from an abnormal PHI.
1244 (propagate_value): Adjust.
1245 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
1247 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
1249 (process_bb): Likewise.
1251 2023-09-13 Pan Li <pan2.li@intel.com>
1254 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
1256 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
1258 PR tree-optimization/111303
1259 * match.pd ((X - N * M) / N): Add undefined_p checking.
1260 ((X + N * M) / N): Likewise.
1261 ((X + C) div_rshift N): Likewise.
1263 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1266 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
1268 2023-09-12 Martin Jambor <mjambor@suse.cz>
1270 * dbgcnt.def (form_fma): New.
1271 * tree-ssa-math-opts.cc: Include dbgcnt.h.
1272 (convert_mult_to_fma): Bail out if the debug counter say so.
1274 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
1276 * config/riscv/autovec-opt.md: Update type
1277 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
1279 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1281 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
1283 (aarch64_layout_frame): Use it to decide whether locals should
1284 go above or below the saved registers.
1285 (aarch64_expand_prologue): Update stack layout comment.
1286 Emit a stack tie after the final adjustment.
1288 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1290 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
1291 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
1292 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
1294 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1296 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
1297 (aarch64_frame::hard_fp_save_and_probe): New fields.
1298 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
1299 Rather than asserting that a leaf function saves LR, instead assert
1300 that a leaf function saves something.
1301 (aarch64_get_separate_components): Prevent the chosen probe
1302 registers from being individually shrink-wrapped.
1303 (aarch64_allocate_and_probe_stack_space): Remove workaround for
1304 probe registers that aren't at the bottom of the previous allocation.
1306 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1308 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
1309 Always probe the residual allocation at offset 1024, asserting
1310 that that is in range.
1312 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1314 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
1315 the LR save slot is in the first 16 bytes of the register save area.
1316 Only form STP/LDP push/pop candidates if both registers are valid.
1317 (aarch64_allocate_and_probe_stack_space): Remove workaround for
1318 when LR was not in the first 16 bytes.
1320 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1322 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
1323 Don't probe final allocations that are exactly 1KiB in size (after
1324 unprobed space above the final allocation has been deducted).
1326 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1328 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
1329 calculation of initial_adjust for frames in which all saves
1332 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1334 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
1335 the allocation of the top of the frame.
1337 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1339 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
1341 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
1342 from the bottom of the frame, rather than the bottom of the saved
1343 register area. Measure reg_offset from the bottom of the frame
1344 rather than the bottom of the saved register area.
1345 (aarch64_save_callee_saves): Update accordingly.
1346 (aarch64_restore_callee_saves): Likewise.
1347 (aarch64_get_separate_components): Likewise.
1348 (aarch64_process_components): Likewise.
1350 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1352 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
1354 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1356 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
1358 (aarch64_frame::bytes_above_hard_fp): ...this.
1359 * config/aarch64/aarch64.cc (aarch64_layout_frame)
1360 (aarch64_expand_prologue): Update accordingly.
1361 (aarch64_initial_elimination_offset): Likewise.
1363 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1365 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
1366 (aarch64_frame::bytes_above_locals): ...this.
1367 * config/aarch64/aarch64.cc (aarch64_layout_frame)
1368 (aarch64_initial_elimination_offset): Update accordingly.
1370 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1372 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
1373 calculation of chain_offset into the emit_frame_chain block.
1375 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1377 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
1378 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
1379 callee_offset handling.
1380 (aarch64_save_callee_saves): Replace the start_offset parameter
1381 with a bytes_below_sp parameter.
1382 (aarch64_restore_callee_saves): Likewise.
1383 (aarch64_expand_prologue): Update accordingly.
1384 (aarch64_expand_epilogue): Likewise.
1386 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1388 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
1390 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
1391 (aarch64_expand_epilogue): Use it instead of
1392 below_hard_fp_saved_regs_size.
1394 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1396 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
1398 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
1399 and use it instead of crtl->outgoing_args_size.
1400 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
1401 of outgoing_args_size.
1402 (aarch64_process_components): Likewise.
1404 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1406 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
1407 allocate the frame in one go if there are no saved registers.
1409 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1411 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
1412 chain_offset rather than callee_offset.
1414 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
1416 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
1417 a local shorthand for cfun->machine->frame.
1418 (aarch64_restore_callee_saves, aarch64_get_separate_components):
1419 (aarch64_process_components): Likewise.
1420 (aarch64_allocate_and_probe_stack_space): Likewise.
1421 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
1422 (aarch64_layout_frame): Use existing shorthand for one more case.
1424 2023-09-12 Andrew Pinski <apinski@marvell.com>
1426 PR tree-optimization/107881
1427 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
1428 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
1430 2023-09-12 Pan Li <pan2.li@intel.com>
1432 * config/riscv/riscv-vector-costs.h (struct range): Removed.
1434 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1436 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
1437 (compute_nregs_for_mode): Ditto.
1438 (live_range_conflict_p): Ditto.
1439 (max_number_of_live_regs): Ditto.
1440 (compute_lmul): Ditto.
1441 (costs::prefer_new_lmul_p): Ditto.
1442 (costs::better_main_loop_than_p): Ditto.
1443 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
1444 (struct var_live_range): Ditto.
1445 (struct autovec_info): Ditto.
1446 * config/riscv/t-riscv: Update makefile for COST model.
1448 2023-09-12 Jakub Jelinek <jakub@redhat.com>
1450 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
1453 2023-09-12 Jakub Jelinek <jakub@redhat.com>
1455 PR middle-end/111338
1456 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
1458 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
1459 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
1460 optimization if type's precision is too large for
1461 vn_walk_cb_data::bufsize.
1463 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
1465 * doc/gm2.texi (Compiler options): Document new option
1468 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
1470 * doc/sourcebuild.texi (stack_size): Update.
1472 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
1474 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
1475 (<optab>_not<mode>3): Likewise.
1476 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
1478 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
1480 (GEN_EMIT_HELPER2): Likewise.
1481 (emit_strcmp_scalar_compare_byte): New function.
1482 (emit_strcmp_scalar_compare_subword): Likewise.
1483 (emit_strcmp_scalar_compare_word): Likewise.
1484 (emit_strcmp_scalar_load_and_compare): Likewise.
1485 (emit_strcmp_scalar_call_to_libc): Likewise.
1486 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
1487 (emit_strcmp_scalar_result_calculation): Likewise.
1488 (riscv_expand_strcmp_scalar): Likewise.
1489 (riscv_expand_strcmp): Likewise.
1490 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
1492 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
1493 (cmpstrnsi): Invoke expansion function for str(n)cmp.
1494 (cmpstrsi): Likewise.
1495 * config/riscv/riscv.opt: Add new parameter
1496 '-mstring-compare-inline-limit'.
1497 * doc/invoke.texi: Document new parameter
1498 '-mstring-compare-inline-limit'.
1500 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
1502 * config.gcc: Add new object riscv-string.o.
1504 * config/riscv/riscv-protos.h (riscv_expand_strlen):
1506 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
1507 * config/riscv/riscv.opt: New flag 'minline-strlen'.
1508 * config/riscv/t-riscv: Add new object riscv-string.o.
1509 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
1510 (th_rev<mode>2): Likewise.
1511 (th_tstnbz<mode>2): New INSN.
1512 * doc/invoke.texi: Document '-minline-strlen'.
1513 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
1514 (emit_unlikely_jump_insn): Likewise.
1515 * rtl.h (emit_likely_jump_insn): New prototype.
1516 (emit_unlikely_jump_insn): Likewise.
1517 * config/riscv/riscv-string.cc: New file.
1519 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
1521 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
1522 (TARGET_SUPPORTS_ALIASES): Define.
1524 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
1526 * doc/sourcebuild.texi (check-function-bodies): Update.
1528 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
1530 * gimplify.cc (gimplify_bind_expr): Check for
1531 insertion after variable cleanup. Convert 'omp allocate'
1532 var-decl attribute to GOMP_alloc/GOMP_free calls.
1534 2023-09-12 xuli <xuli1@eswincomputing.com>
1536 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
1537 parameter e and replace NULL_RTX with gcc_unreachable.
1539 2023-09-12 xuli <xuli1@eswincomputing.com>
1541 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
1543 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
1544 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
1545 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
1547 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
1548 * config/riscv/riscv-vector-builtins.cc: Add args type.
1550 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
1552 * config/riscv/riscv.cc
1553 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
1554 riscv_avoid_shrink_wrapping_separate.
1555 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
1557 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
1559 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
1561 * shrink-wrap.cc (try_shrink_wrapping_separate):call
1562 use_shrink_wrapping_separate.
1563 (use_shrink_wrapping_separate): wrap the condition
1564 check in use_shrink_wrapping_separate.
1565 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
1567 2023-09-11 Andrew Pinski <apinski@marvell.com>
1569 PR tree-optimization/111348
1570 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
1571 the cmp part of the pattern.
1573 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
1576 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
1577 Call output_addr_const for CASE_CONST_SCALAR_INT.
1579 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1581 * config/riscv/thead.md: Update types
1583 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1585 * config/riscv/riscv.md: Update types
1587 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1589 * config/riscv/riscv.md: Add "zicond" type
1590 * config/riscv/zicond.md: Update types
1592 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1594 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
1595 * config/riscv/zc.md: Update types
1597 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
1599 * config/riscv/autovec-opt.md: Update types
1600 * config/riscv/autovec.md: likewise
1602 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1604 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
1606 (s390_vec_unsigned_flt): Ditto.
1607 (s390_vec_revb_flt): Ditto.
1608 (s390_vec_reve_flt): Ditto.
1609 (s390_vclfnhs): Fix operand flags.
1610 (s390_vclfnls): Ditto.
1611 (s390_vcrnfs): Ditto.
1615 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1617 * config/s390/s390-builtins.def (O_U64): New.
1622 (O_M12): Change bit position.
1633 (OB_DEF_VAR): Add operand constraints.
1635 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
1638 2023-09-11 Andrew Pinski <apinski@marvell.com>
1640 PR tree-optimization/111349
1641 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
1642 the cmp part of the pattern.
1644 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1647 * config/riscv/riscv.opt: Set default as scalable vectorization.
1649 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1651 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
1652 (get_all_successors): Ditto.
1653 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
1654 (get_all_successors): Ditto.
1656 2023-09-11 Jakub Jelinek <jakub@redhat.com>
1658 PR middle-end/111329
1659 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
1660 function. For printing values which don't fit into digit_buffer
1661 use out-of-line function.
1662 * wide-int-print.h (pp_wide_int_large): Declare.
1663 * wide-int-print.cc: Include pretty-print.h.
1664 (pp_wide_int_large): Define.
1666 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1668 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
1669 Use dominance analysis.
1670 (pass_vsetvl::init): Ditto.
1671 (pass_vsetvl::done): Ditto.
1673 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1676 * config/riscv/autovec.md: Add VLS modes.
1677 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
1678 (cmp_lmul_gt_one): Ditto.
1679 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
1680 (cmp_lmul_gt_one): Ditto.
1681 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
1682 (riscv_vectorize_vec_perm_const): Ditto.
1683 * config/riscv/vector-iterators.md: Ditto.
1684 * config/riscv/vector.md: Ditto.
1686 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1688 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
1689 * config/riscv/vector-iterators.md: New iterator
1691 2023-09-11 Andrew Pinski <apinski@marvell.com>
1693 PR tree-optimization/111346
1694 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
1697 2023-09-11 liuhongt <hongtao.liu@intel.com>
1701 * config/i386/sse.md (int_comm): New int_attr.
1702 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
1703 Remove % for Complex conjugate operations since they're not
1705 (fma_<complexpairopname>_<mode>_pair): Ditto.
1706 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
1707 (cmul<conj_op><mode>3): Ditto.
1709 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1711 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
1712 fixed-vlmax/vls vector permutation.
1714 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1716 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
1718 2023-09-10 Andrew Pinski <apinski@marvell.com>
1720 PR tree-optimization/111331
1721 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
1722 Fix the LE/GE comparison to the correct value.
1723 * tree-ssa-phiopt.cc (minmax_replacement):
1724 Fix the LE/GE comparison for the
1725 `(a CMP CST1) ? max<a,CST2> : a` optimization.
1727 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
1729 * config/darwin.cc (darwin_function_section): Place unlikely
1730 executed global init code into the standard cold section.
1732 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1735 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
1736 (pass_vsetvl::pre_vsetvl): Ditto.
1737 (pass_vsetvl::init): Ditto.
1738 (pass_vsetvl::lazy_vsetvl): Ditto.
1740 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
1742 * config/loongarch/loongarch.md (mulsidi3_64bit):
1743 Field unsigned extension support.
1744 (<u>muldi3_highpart): Modify template name.
1745 (<u>mulsi3_highpart): Likewise.
1746 (<u>mulsidi3_64bit): Field unsigned extension support.
1747 (<su>muldi3_highpart): Modify muldi3_highpart to
1749 (<su>mulsi3_highpart): Modify mulsi3_highpart to
1752 2023-09-09 Xi Ruoyao <xry111@xry111.site>
1754 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
1755 Check precondition (delta must be a power of 2) and use
1756 popcount_hwi instead of a homebrew loop.
1758 2023-09-09 Xi Ruoyao <xry111@xry111.site>
1760 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
1761 Define to the maximum amount of bytes able to be loaded or
1762 stored with one machine instruction.
1763 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
1764 New static function.
1765 (loongarch_block_move_straight): Call
1766 loongarch_mode_for_move_size for machine_mode to be moved.
1767 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
1768 instead of UNITS_PER_WORD.
1770 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1772 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
1774 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
1776 * fold-const.cc (can_min_p): New function.
1777 (poly_int_binop): Try fold MIN_EXPR.
1779 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
1781 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
1782 case VREL_EQ nor call frelop_early_resolve.
1784 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
1786 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
1788 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
1789 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
1791 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
1793 * config/riscv/thead.md: Use more appropriate mode attributes
1796 2023-09-08 Guo Jie <guojie@loongson.cn>
1798 * common/config/loongarch/loongarch-common.cc:
1799 (default_options loongarch_option_optimization_table):
1800 Default to -fsched-pressure.
1802 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
1804 * config.gcc: remove non-POSIX syntax "<<<".
1806 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
1808 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
1809 Rename postfix to _bitmanip.
1810 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
1811 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
1813 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1815 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
1817 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1819 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
1821 2023-09-07 liuhongt <hongtao.liu@intel.com>
1823 * config/i386/sse.md
1824 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
1825 (VHFBF_AVX512VL): New mode iterator.
1826 (VI2HFBF_AVX512VL): New mode iterator.
1828 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
1830 * value-range.h (contains_zero_p): Return false for undefined ranges.
1831 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
1832 contains_zero_p change above.
1833 (operator_ge::op1_op2_relation): Same.
1834 (operator_equal::op1_op2_relation): Same.
1835 (operator_not_equal::op1_op2_relation): Same.
1836 (operator_lt::op1_op2_relation): Same.
1837 (operator_le::op1_op2_relation): Same.
1838 (operator_ge::op1_op2_relation): Same.
1839 * range-op.cc (operator_equal::op1_op2_relation): Same.
1840 (operator_not_equal::op1_op2_relation): Same.
1841 (operator_lt::op1_op2_relation): Same.
1842 (operator_le::op1_op2_relation): Same.
1843 (operator_cast::op1_range): Same.
1844 (set_nonzero_range_from_mask): Same.
1845 (operator_bitwise_xor::op1_range): Same.
1846 (operator_addr_expr::fold_range): Same.
1847 (operator_addr_expr::op1_range): Same.
1849 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
1851 PR tree-optimization/110875
1852 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
1853 cache-prefilling routine when the ssa-name has no global value.
1855 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
1858 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
1859 (process_alt_operands): Set up the flag. Clear flag for chosen
1860 alternative with special memory constraints.
1861 (process_alt_operands): Set up used insn alternative depending on the flag.
1863 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1865 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
1866 * config/riscv/riscv.md: Ditto.
1867 * config/riscv/vector-iterators.md: Ditto.
1868 * config/riscv/vector.md: Ditto.
1870 2023-09-07 David Malcolm <dmalcolm@redhat.com>
1872 * diagnostic-core.h (error_meta): New decl.
1873 * diagnostic.cc (error_meta): New.
1875 2023-09-07 Jakub Jelinek <jakub@redhat.com>
1878 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
1879 inside gcc_assert, as later code relies on it filling info variable.
1880 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
1881 clear_padding_type): Likewise.
1882 * varasm.cc (output_constant): Likewise.
1883 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
1884 * stor-layout.cc (finish_bitfield_representative, layout_type):
1886 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
1888 2023-09-07 Xi Ruoyao <xry111@xry111.site>
1891 * config/loongarch/loongarch-protos.h
1892 (loongarch_pre_reload_split): Declare new function.
1893 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
1894 * config/loongarch/loongarch.cc
1895 (loongarch_pre_reload_split): Implement.
1896 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
1897 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
1899 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
1900 New define_insn_and_split.
1901 (bstrins_<mode>_for_ior_mask): Likewise.
1902 (define_peephole2): Further optimize code sequence produced by
1903 bstrins_<mode>_for_ior_mask if possible.
1905 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
1907 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
1908 rather than gen_rtx_PLUS.
1910 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
1913 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
1914 (pass_vsetvl::df_post_optimization): Remove incorrect function.
1916 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
1918 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
1919 Parse 'XVentanaCondOps' extension.
1920 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
1921 (TARGET_XVENTANACONDOPS): Ditto.
1922 (TARGET_ZICOND_LIKE): New to represent targets with conditional
1923 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
1924 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
1925 with TARGET_ZICOND_LIKE.
1926 (riscv_expand_conditional_move): Ditto.
1927 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
1929 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
1930 * config/riscv/zicond.md: Modify description.
1931 (eqz_ventana): New to match corresponding czero instructions.
1932 (nez_ventana): Ditto.
1933 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
1934 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
1935 (*czero.<eqz>.<GPR><X>): Ditto.
1936 (*czero.eqz.<GPR><X>.opt1): Ditto.
1937 (*czero.nez.<GPR><X>.opt2): Ditto.
1939 2023-09-06 Ian Lance Taylor <iant@golang.org>
1942 * godump.cc (go_format_type): Handle BITINT_TYPE.
1944 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1947 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
1950 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1953 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
1954 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
1955 rather than make_edge, initialize bb->count.
1957 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1960 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
1961 Document general rules for _BitInt support library functions
1962 and document __mulbitint3 and __divmodbitint4.
1963 (Conversion functions): Document __fix{s,d,x,t}fbitint,
1964 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
1965 __bid_floatbitint{s,d,t}d.
1967 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1970 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
1973 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1976 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
1977 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
1978 check if all padding bits up to mode precision are zeros or sign
1979 bit copies and if not, jump to DO_ERROR.
1980 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
1981 Adjust expand_ubsan_result_store callers.
1982 * ubsan.cc: Include target.h and langhooks.h.
1983 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
1984 size converted to pointer sized integer, pass BITINT_TYPE values
1985 which fit into TImode (if supported) or DImode as those integer types
1986 or otherwise for now punt (pass 0).
1987 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
1988 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
1989 TImode/DImode precision rather than TK_Unknown used otherwise for
1990 large/huge BITINT_TYPEs.
1991 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
1992 they don't have mode precision.
1993 * ubsan.h (enum ubsan_print_style): New enumerator.
1995 2023-09-06 Jakub Jelinek <jakub@redhat.com>
1998 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
1999 (ix86_bitint_type_info): New function.
2000 (TARGET_C_BITINT_TYPE_INFO): Redefine.
2002 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2005 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
2006 * passes.def: Add pass_lower_bitint after pass_lower_complex and
2007 pass_lower_bitint_O0 after pass_lower_complex_O0.
2008 * tree-pass.h (PROP_gimple_lbitint): Define.
2009 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
2010 * gimple-lower-bitint.h: New file.
2011 * tree-ssa-live.h (struct _var_map): Add bitint member.
2012 (init_var_map): Adjust declaration.
2013 (region_contains_p): Handle map->bitint like map->outofssa_p.
2014 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
2015 map->bitint and set map->outofssa_p to false if it is non-NULL.
2016 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
2017 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
2019 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
2020 not in that bitmap, and allow res without default def.
2021 (compute_optimized_partition_bases): In map->bitint mode try hard to
2022 coalesce any SSA_NAMEs with the same size.
2023 (coalesce_bitint): New function.
2024 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
2025 used_in_copies and call coalesce_bitint.
2026 * gimple-lower-bitint.cc: New file.
2028 2023-09-06 Jakub Jelinek <jakub@redhat.com>
2031 * tree.def (BITINT_TYPE): New type.
2032 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
2033 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
2035 (BITINT_TYPE_P): Define.
2036 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
2037 they have BITINT_TYPE type.
2038 (tree_check6, tree_not_check6): New inline functions.
2039 (any_integral_type_check): Include BITINT_TYPE.
2040 (build_bitint_type): Declare.
2041 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
2042 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
2043 type_hash_canon): Handle BITINT_TYPE.
2044 (bitint_type_cache): New variable.
2045 (build_bitint_type): New function.
2046 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
2048 (tree_cc_finalize): Free bitint_type_cache.
2049 * builtins.cc (type_to_class): Handle BITINT_TYPE.
2050 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
2051 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
2053 * convert.cc (convert_to_pointer_1, convert_to_real_1,
2054 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
2055 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
2056 GET_MODE_PRECISION (TYPE_MODE (type)).
2057 * doc/generic.texi (BITINT_TYPE): Document.
2058 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
2059 * doc/tm.texi: Regenerated.
2060 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
2061 gen_type_die_with_usage): Handle BITINT_TYPE.
2062 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
2063 handle those which fit into shwi.
2064 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
2065 to bitfield precision reads from BITINT_TYPE vars, parameters or
2066 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
2068 * fold-const.cc (fold_convert_loc, make_range_step): Handle
2070 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
2071 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
2072 (native_encode_int, native_interpret_int, native_interpret_expr):
2074 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
2075 to some other integral type or vice versa conversions non-useless.
2076 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
2077 (clear_padding_unit): Mention in comment that _BitInt types don't need
2079 (clear_padding_bitint_needs_padding_p): New function.
2080 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
2081 (clear_padding_type): Likewise.
2082 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
2083 precision operands force pos_neg? to 1.
2084 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
2085 expand_BITINTTOFLOAT): New functions.
2086 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
2087 BITINTTOFLOAT): New internal functions.
2088 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
2089 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
2090 * match.pd (non-equality compare simplifications from fold_binary):
2091 Punt if TYPE_MODE (arg1_type) is BLKmode.
2092 * pretty-print.h (pp_wide_int): Handle printing of large precision
2093 wide_ints which would buffer overflow digit_buffer.
2094 * stor-layout.cc (finish_bitfield_representative): For bit-fields
2095 with BITINT_TYPE, prefer representatives with precisions in
2096 multiple of limb precision.
2097 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
2098 element type and assert it is BITINT_TYPE.
2099 * target.def (bitint_type_info): New C target hook.
2100 * target.h (struct bitint_info): New type.
2101 * targhooks.cc (default_bitint_type_info): New function.
2102 * targhooks.h (default_bitint_type_info): Declare.
2103 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
2104 Handle printing large wide_ints which would buffer overflow
2106 * tree-ssa-sccvn.cc: Include target.h.
2107 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
2109 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
2110 64-bit BITINT_TYPE subtract low bound from expression and cast to
2111 64-bit integer type both the controlling expression and case labels.
2112 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
2113 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
2114 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
2116 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
2117 unsigned_type_for rather than build_nonstandard_integer_type.
2119 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2122 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
2123 tieable for RVV modes.
2125 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2128 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
2130 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2132 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
2134 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
2136 * config/xtensa/xtensa.cc (xtensa_expand_scc):
2137 Add code for particular constants (only 0 and INT_MIN for now)
2138 for EQ/NE boolean evaluation in SImode.
2139 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
2140 implementation has been integrated into the above.
2142 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2145 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
2147 (*pred_widen_mulsu<mode>): Delete.
2148 (*pred_single_widen_mul<mode>): Delete.
2149 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
2150 Add new combine patterns.
2151 (*single_widen_sub<any_extend:su><mode>): Ditto.
2152 (*single_widen_add<any_extend:su><mode>): Ditto.
2153 (*single_widen_mult<any_extend:su><mode>): Ditto.
2154 (*dual_widen_mulsu<mode>): Ditto.
2155 (*dual_widen_mulus<mode>): Ditto.
2156 (*dual_widen_<optab><mode>): Ditto.
2157 (*single_widen_add<mode>): Ditto.
2158 (*single_widen_sub<mode>): Ditto.
2159 (*single_widen_mult<mode>): Ditto.
2160 * config/riscv/autovec.md (<optab><mode>3):
2161 Change define_expand to define_insn_and_split.
2162 (<optab><mode>2): Ditto.
2163 (abs<mode>2): Ditto.
2164 (smul<mode>3_highpart): Ditto.
2165 (umul<mode>3_highpart): Ditto.
2167 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2169 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
2170 (riscv_asm_output_alias): Ditto.
2171 (riscv_asm_output_external): Ditto.
2172 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
2173 Output .variant_cc directive for vector function.
2174 (riscv_declare_function_name): Ditto.
2175 (riscv_asm_output_alias): Ditto.
2176 (riscv_asm_output_external): Ditto.
2177 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
2178 Implement ASM_DECLARE_FUNCTION_NAME.
2179 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
2180 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
2182 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2184 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
2185 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
2186 (riscv_frame_info::reset): Reset new fileds.
2187 (riscv_call_tls_get_addr): Pass riscv_cc.
2188 (riscv_function_arg): Return riscv_cc for call patterm.
2189 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
2190 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
2191 (riscv_save_reg_p): Add vector callee-saved check.
2192 (riscv_stack_align): Add vector save area comment.
2193 (riscv_compute_frame_info): Ditto.
2194 (riscv_restore_reg): Update for type change.
2195 (riscv_for_each_saved_v_reg): New function save vector registers.
2196 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
2197 (riscv_expand_prologue): Ditto.
2198 (riscv_expand_epilogue): Ditto.
2199 (riscv_output_mi_thunk): Pass riscv_cc.
2200 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
2201 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
2202 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
2204 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2206 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
2207 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
2208 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
2209 (riscv_init_cumulative_args): Setup variant_cc field.
2210 (riscv_vector_type_p): New function for checking vector type.
2211 (riscv_hard_regno_nregs): Hoist declare.
2212 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
2213 (riscv_get_arg_info): Support vector cc.
2214 (riscv_function_arg_advance): Update cum.
2215 (riscv_pass_by_reference): Handle vector args.
2216 (riscv_v_abi): New function return vector abi.
2217 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
2218 (riscv_arguments_is_vector_type_p): New function for check vector returns.
2219 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
2220 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
2221 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
2222 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
2223 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
2224 (V_ARG_FIRST): Ditto.
2225 (V_ARG_LAST): Ditto.
2226 (enum riscv_cc): Define all RISCV_CC variants.
2227 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
2229 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
2231 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
2232 Add sqrt + vcond_mask combine pattern.
2233 * config/riscv/autovec.md (<optab><mode>2):
2234 Change define_expand to define_insn_and_split.
2236 2023-09-06 Jason Merrill <jason@redhat.com>
2238 * common.opt: Update -fabi-version=19.
2240 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
2242 * config/riscv/zicond.md: Add closing parent to a comment.
2244 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
2246 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
2247 large constant cons/alt into a register.
2249 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
2251 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
2252 require one zero bit in the upper 32 bits for LI+RORI synthesis.
2254 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
2256 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
2258 2023-09-05 Andrew Pinski <apinski@marvell.com>
2260 PR tree-optimization/98710
2261 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
2262 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
2264 2023-09-05 Andrew Pinski <apinski@marvell.com>
2266 PR tree-optimization/103536
2267 * match.pd (`(x | y) & (x & z)`,
2268 `(x & y) | (x | z)`): New patterns.
2270 2023-09-05 Andrew Pinski <apinski@marvell.com>
2272 PR tree-optimization/107137
2273 * match.pd (`(nop_convert)-(convert)a`): New pattern.
2275 2023-09-05 Andrew Pinski <apinski@marvell.com>
2277 PR tree-optimization/96694
2278 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
2280 2023-09-05 Andrew Pinski <apinski@marvell.com>
2282 PR tree-optimization/105832
2283 * match.pd (`(1 >> X) != 0`): New pattern
2285 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
2287 * config/riscv/riscv.md: Update/Add types
2289 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
2291 * config/riscv/pic.md: Update types
2293 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
2295 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
2296 synthesis with rotate-right for XTheadBb.
2298 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
2300 * config/riscv/zicond.md: Fix op2 pattern.
2302 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
2304 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
2306 2023-09-05 Xi Ruoyao <xry111@xry111.site>
2308 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
2309 Define to 0 if not defined yet.
2311 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
2313 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
2314 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
2316 2023-09-05 Pan Li <pan2.li@intel.com>
2318 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
2319 * config/riscv/vector.md: Extend iterator for VLS.
2321 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2323 * config.gcc: Export the header file lasxintrin.h.
2324 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
2325 Add Loongson ASX builtin functions support.
2327 (LASX_BUILTIN): Ditto.
2328 (LASX_NO_TARGET_BUILTIN): Ditto.
2329 (LASX_BUILTIN_TEST_BRANCH): Ditto.
2330 (CODE_FOR_lasx_xvsadd_b): Ditto.
2331 (CODE_FOR_lasx_xvsadd_h): Ditto.
2332 (CODE_FOR_lasx_xvsadd_w): Ditto.
2333 (CODE_FOR_lasx_xvsadd_d): Ditto.
2334 (CODE_FOR_lasx_xvsadd_bu): Ditto.
2335 (CODE_FOR_lasx_xvsadd_hu): Ditto.
2336 (CODE_FOR_lasx_xvsadd_wu): Ditto.
2337 (CODE_FOR_lasx_xvsadd_du): Ditto.
2338 (CODE_FOR_lasx_xvadd_b): Ditto.
2339 (CODE_FOR_lasx_xvadd_h): Ditto.
2340 (CODE_FOR_lasx_xvadd_w): Ditto.
2341 (CODE_FOR_lasx_xvadd_d): Ditto.
2342 (CODE_FOR_lasx_xvaddi_bu): Ditto.
2343 (CODE_FOR_lasx_xvaddi_hu): Ditto.
2344 (CODE_FOR_lasx_xvaddi_wu): Ditto.
2345 (CODE_FOR_lasx_xvaddi_du): Ditto.
2346 (CODE_FOR_lasx_xvand_v): Ditto.
2347 (CODE_FOR_lasx_xvandi_b): Ditto.
2348 (CODE_FOR_lasx_xvbitsel_v): Ditto.
2349 (CODE_FOR_lasx_xvseqi_b): Ditto.
2350 (CODE_FOR_lasx_xvseqi_h): Ditto.
2351 (CODE_FOR_lasx_xvseqi_w): Ditto.
2352 (CODE_FOR_lasx_xvseqi_d): Ditto.
2353 (CODE_FOR_lasx_xvslti_b): Ditto.
2354 (CODE_FOR_lasx_xvslti_h): Ditto.
2355 (CODE_FOR_lasx_xvslti_w): Ditto.
2356 (CODE_FOR_lasx_xvslti_d): Ditto.
2357 (CODE_FOR_lasx_xvslti_bu): Ditto.
2358 (CODE_FOR_lasx_xvslti_hu): Ditto.
2359 (CODE_FOR_lasx_xvslti_wu): Ditto.
2360 (CODE_FOR_lasx_xvslti_du): Ditto.
2361 (CODE_FOR_lasx_xvslei_b): Ditto.
2362 (CODE_FOR_lasx_xvslei_h): Ditto.
2363 (CODE_FOR_lasx_xvslei_w): Ditto.
2364 (CODE_FOR_lasx_xvslei_d): Ditto.
2365 (CODE_FOR_lasx_xvslei_bu): Ditto.
2366 (CODE_FOR_lasx_xvslei_hu): Ditto.
2367 (CODE_FOR_lasx_xvslei_wu): Ditto.
2368 (CODE_FOR_lasx_xvslei_du): Ditto.
2369 (CODE_FOR_lasx_xvdiv_b): Ditto.
2370 (CODE_FOR_lasx_xvdiv_h): Ditto.
2371 (CODE_FOR_lasx_xvdiv_w): Ditto.
2372 (CODE_FOR_lasx_xvdiv_d): Ditto.
2373 (CODE_FOR_lasx_xvdiv_bu): Ditto.
2374 (CODE_FOR_lasx_xvdiv_hu): Ditto.
2375 (CODE_FOR_lasx_xvdiv_wu): Ditto.
2376 (CODE_FOR_lasx_xvdiv_du): Ditto.
2377 (CODE_FOR_lasx_xvfadd_s): Ditto.
2378 (CODE_FOR_lasx_xvfadd_d): Ditto.
2379 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
2380 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
2381 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
2382 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
2383 (CODE_FOR_lasx_xvffint_s_w): Ditto.
2384 (CODE_FOR_lasx_xvffint_d_l): Ditto.
2385 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
2386 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
2387 (CODE_FOR_lasx_xvfsub_s): Ditto.
2388 (CODE_FOR_lasx_xvfsub_d): Ditto.
2389 (CODE_FOR_lasx_xvfmul_s): Ditto.
2390 (CODE_FOR_lasx_xvfmul_d): Ditto.
2391 (CODE_FOR_lasx_xvfdiv_s): Ditto.
2392 (CODE_FOR_lasx_xvfdiv_d): Ditto.
2393 (CODE_FOR_lasx_xvfmax_s): Ditto.
2394 (CODE_FOR_lasx_xvfmax_d): Ditto.
2395 (CODE_FOR_lasx_xvfmin_s): Ditto.
2396 (CODE_FOR_lasx_xvfmin_d): Ditto.
2397 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
2398 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
2399 (CODE_FOR_lasx_xvflogb_s): Ditto.
2400 (CODE_FOR_lasx_xvflogb_d): Ditto.
2401 (CODE_FOR_lasx_xvmax_b): Ditto.
2402 (CODE_FOR_lasx_xvmax_h): Ditto.
2403 (CODE_FOR_lasx_xvmax_w): Ditto.
2404 (CODE_FOR_lasx_xvmax_d): Ditto.
2405 (CODE_FOR_lasx_xvmaxi_b): Ditto.
2406 (CODE_FOR_lasx_xvmaxi_h): Ditto.
2407 (CODE_FOR_lasx_xvmaxi_w): Ditto.
2408 (CODE_FOR_lasx_xvmaxi_d): Ditto.
2409 (CODE_FOR_lasx_xvmax_bu): Ditto.
2410 (CODE_FOR_lasx_xvmax_hu): Ditto.
2411 (CODE_FOR_lasx_xvmax_wu): Ditto.
2412 (CODE_FOR_lasx_xvmax_du): Ditto.
2413 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
2414 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
2415 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
2416 (CODE_FOR_lasx_xvmaxi_du): Ditto.
2417 (CODE_FOR_lasx_xvmin_b): Ditto.
2418 (CODE_FOR_lasx_xvmin_h): Ditto.
2419 (CODE_FOR_lasx_xvmin_w): Ditto.
2420 (CODE_FOR_lasx_xvmin_d): Ditto.
2421 (CODE_FOR_lasx_xvmini_b): Ditto.
2422 (CODE_FOR_lasx_xvmini_h): Ditto.
2423 (CODE_FOR_lasx_xvmini_w): Ditto.
2424 (CODE_FOR_lasx_xvmini_d): Ditto.
2425 (CODE_FOR_lasx_xvmin_bu): Ditto.
2426 (CODE_FOR_lasx_xvmin_hu): Ditto.
2427 (CODE_FOR_lasx_xvmin_wu): Ditto.
2428 (CODE_FOR_lasx_xvmin_du): Ditto.
2429 (CODE_FOR_lasx_xvmini_bu): Ditto.
2430 (CODE_FOR_lasx_xvmini_hu): Ditto.
2431 (CODE_FOR_lasx_xvmini_wu): Ditto.
2432 (CODE_FOR_lasx_xvmini_du): Ditto.
2433 (CODE_FOR_lasx_xvmod_b): Ditto.
2434 (CODE_FOR_lasx_xvmod_h): Ditto.
2435 (CODE_FOR_lasx_xvmod_w): Ditto.
2436 (CODE_FOR_lasx_xvmod_d): Ditto.
2437 (CODE_FOR_lasx_xvmod_bu): Ditto.
2438 (CODE_FOR_lasx_xvmod_hu): Ditto.
2439 (CODE_FOR_lasx_xvmod_wu): Ditto.
2440 (CODE_FOR_lasx_xvmod_du): Ditto.
2441 (CODE_FOR_lasx_xvmul_b): Ditto.
2442 (CODE_FOR_lasx_xvmul_h): Ditto.
2443 (CODE_FOR_lasx_xvmul_w): Ditto.
2444 (CODE_FOR_lasx_xvmul_d): Ditto.
2445 (CODE_FOR_lasx_xvclz_b): Ditto.
2446 (CODE_FOR_lasx_xvclz_h): Ditto.
2447 (CODE_FOR_lasx_xvclz_w): Ditto.
2448 (CODE_FOR_lasx_xvclz_d): Ditto.
2449 (CODE_FOR_lasx_xvnor_v): Ditto.
2450 (CODE_FOR_lasx_xvor_v): Ditto.
2451 (CODE_FOR_lasx_xvori_b): Ditto.
2452 (CODE_FOR_lasx_xvnori_b): Ditto.
2453 (CODE_FOR_lasx_xvpcnt_b): Ditto.
2454 (CODE_FOR_lasx_xvpcnt_h): Ditto.
2455 (CODE_FOR_lasx_xvpcnt_w): Ditto.
2456 (CODE_FOR_lasx_xvpcnt_d): Ditto.
2457 (CODE_FOR_lasx_xvxor_v): Ditto.
2458 (CODE_FOR_lasx_xvxori_b): Ditto.
2459 (CODE_FOR_lasx_xvsll_b): Ditto.
2460 (CODE_FOR_lasx_xvsll_h): Ditto.
2461 (CODE_FOR_lasx_xvsll_w): Ditto.
2462 (CODE_FOR_lasx_xvsll_d): Ditto.
2463 (CODE_FOR_lasx_xvslli_b): Ditto.
2464 (CODE_FOR_lasx_xvslli_h): Ditto.
2465 (CODE_FOR_lasx_xvslli_w): Ditto.
2466 (CODE_FOR_lasx_xvslli_d): Ditto.
2467 (CODE_FOR_lasx_xvsra_b): Ditto.
2468 (CODE_FOR_lasx_xvsra_h): Ditto.
2469 (CODE_FOR_lasx_xvsra_w): Ditto.
2470 (CODE_FOR_lasx_xvsra_d): Ditto.
2471 (CODE_FOR_lasx_xvsrai_b): Ditto.
2472 (CODE_FOR_lasx_xvsrai_h): Ditto.
2473 (CODE_FOR_lasx_xvsrai_w): Ditto.
2474 (CODE_FOR_lasx_xvsrai_d): Ditto.
2475 (CODE_FOR_lasx_xvsrl_b): Ditto.
2476 (CODE_FOR_lasx_xvsrl_h): Ditto.
2477 (CODE_FOR_lasx_xvsrl_w): Ditto.
2478 (CODE_FOR_lasx_xvsrl_d): Ditto.
2479 (CODE_FOR_lasx_xvsrli_b): Ditto.
2480 (CODE_FOR_lasx_xvsrli_h): Ditto.
2481 (CODE_FOR_lasx_xvsrli_w): Ditto.
2482 (CODE_FOR_lasx_xvsrli_d): Ditto.
2483 (CODE_FOR_lasx_xvsub_b): Ditto.
2484 (CODE_FOR_lasx_xvsub_h): Ditto.
2485 (CODE_FOR_lasx_xvsub_w): Ditto.
2486 (CODE_FOR_lasx_xvsub_d): Ditto.
2487 (CODE_FOR_lasx_xvsubi_bu): Ditto.
2488 (CODE_FOR_lasx_xvsubi_hu): Ditto.
2489 (CODE_FOR_lasx_xvsubi_wu): Ditto.
2490 (CODE_FOR_lasx_xvsubi_du): Ditto.
2491 (CODE_FOR_lasx_xvpackod_d): Ditto.
2492 (CODE_FOR_lasx_xvpackev_d): Ditto.
2493 (CODE_FOR_lasx_xvpickod_d): Ditto.
2494 (CODE_FOR_lasx_xvpickev_d): Ditto.
2495 (CODE_FOR_lasx_xvrepli_b): Ditto.
2496 (CODE_FOR_lasx_xvrepli_h): Ditto.
2497 (CODE_FOR_lasx_xvrepli_w): Ditto.
2498 (CODE_FOR_lasx_xvrepli_d): Ditto.
2499 (CODE_FOR_lasx_xvandn_v): Ditto.
2500 (CODE_FOR_lasx_xvorn_v): Ditto.
2501 (CODE_FOR_lasx_xvneg_b): Ditto.
2502 (CODE_FOR_lasx_xvneg_h): Ditto.
2503 (CODE_FOR_lasx_xvneg_w): Ditto.
2504 (CODE_FOR_lasx_xvneg_d): Ditto.
2505 (CODE_FOR_lasx_xvbsrl_v): Ditto.
2506 (CODE_FOR_lasx_xvbsll_v): Ditto.
2507 (CODE_FOR_lasx_xvfmadd_s): Ditto.
2508 (CODE_FOR_lasx_xvfmadd_d): Ditto.
2509 (CODE_FOR_lasx_xvfmsub_s): Ditto.
2510 (CODE_FOR_lasx_xvfmsub_d): Ditto.
2511 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
2512 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
2513 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
2514 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
2515 (CODE_FOR_lasx_xvpermi_q): Ditto.
2516 (CODE_FOR_lasx_xvpermi_d): Ditto.
2517 (CODE_FOR_lasx_xbnz_v): Ditto.
2518 (CODE_FOR_lasx_xbz_v): Ditto.
2519 (CODE_FOR_lasx_xvssub_b): Ditto.
2520 (CODE_FOR_lasx_xvssub_h): Ditto.
2521 (CODE_FOR_lasx_xvssub_w): Ditto.
2522 (CODE_FOR_lasx_xvssub_d): Ditto.
2523 (CODE_FOR_lasx_xvssub_bu): Ditto.
2524 (CODE_FOR_lasx_xvssub_hu): Ditto.
2525 (CODE_FOR_lasx_xvssub_wu): Ditto.
2526 (CODE_FOR_lasx_xvssub_du): Ditto.
2527 (CODE_FOR_lasx_xvabsd_b): Ditto.
2528 (CODE_FOR_lasx_xvabsd_h): Ditto.
2529 (CODE_FOR_lasx_xvabsd_w): Ditto.
2530 (CODE_FOR_lasx_xvabsd_d): Ditto.
2531 (CODE_FOR_lasx_xvabsd_bu): Ditto.
2532 (CODE_FOR_lasx_xvabsd_hu): Ditto.
2533 (CODE_FOR_lasx_xvabsd_wu): Ditto.
2534 (CODE_FOR_lasx_xvabsd_du): Ditto.
2535 (CODE_FOR_lasx_xvavg_b): Ditto.
2536 (CODE_FOR_lasx_xvavg_h): Ditto.
2537 (CODE_FOR_lasx_xvavg_w): Ditto.
2538 (CODE_FOR_lasx_xvavg_d): Ditto.
2539 (CODE_FOR_lasx_xvavg_bu): Ditto.
2540 (CODE_FOR_lasx_xvavg_hu): Ditto.
2541 (CODE_FOR_lasx_xvavg_wu): Ditto.
2542 (CODE_FOR_lasx_xvavg_du): Ditto.
2543 (CODE_FOR_lasx_xvavgr_b): Ditto.
2544 (CODE_FOR_lasx_xvavgr_h): Ditto.
2545 (CODE_FOR_lasx_xvavgr_w): Ditto.
2546 (CODE_FOR_lasx_xvavgr_d): Ditto.
2547 (CODE_FOR_lasx_xvavgr_bu): Ditto.
2548 (CODE_FOR_lasx_xvavgr_hu): Ditto.
2549 (CODE_FOR_lasx_xvavgr_wu): Ditto.
2550 (CODE_FOR_lasx_xvavgr_du): Ditto.
2551 (CODE_FOR_lasx_xvmuh_b): Ditto.
2552 (CODE_FOR_lasx_xvmuh_h): Ditto.
2553 (CODE_FOR_lasx_xvmuh_w): Ditto.
2554 (CODE_FOR_lasx_xvmuh_d): Ditto.
2555 (CODE_FOR_lasx_xvmuh_bu): Ditto.
2556 (CODE_FOR_lasx_xvmuh_hu): Ditto.
2557 (CODE_FOR_lasx_xvmuh_wu): Ditto.
2558 (CODE_FOR_lasx_xvmuh_du): Ditto.
2559 (CODE_FOR_lasx_xvssran_b_h): Ditto.
2560 (CODE_FOR_lasx_xvssran_h_w): Ditto.
2561 (CODE_FOR_lasx_xvssran_w_d): Ditto.
2562 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
2563 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
2564 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
2565 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
2566 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
2567 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
2568 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
2569 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
2570 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
2571 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
2572 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
2573 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
2574 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
2575 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
2576 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
2577 (CODE_FOR_lasx_xvftint_w_s): Ditto.
2578 (CODE_FOR_lasx_xvftint_l_d): Ditto.
2579 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
2580 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
2581 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
2582 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
2583 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
2584 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
2585 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
2586 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
2587 (CODE_FOR_lasx_xvsat_b): Ditto.
2588 (CODE_FOR_lasx_xvsat_h): Ditto.
2589 (CODE_FOR_lasx_xvsat_w): Ditto.
2590 (CODE_FOR_lasx_xvsat_d): Ditto.
2591 (CODE_FOR_lasx_xvsat_bu): Ditto.
2592 (CODE_FOR_lasx_xvsat_hu): Ditto.
2593 (CODE_FOR_lasx_xvsat_wu): Ditto.
2594 (CODE_FOR_lasx_xvsat_du): Ditto.
2595 (loongarch_builtin_vectorized_function): Ditto.
2596 (loongarch_expand_builtin_insn): Ditto.
2597 (loongarch_expand_builtin): Ditto.
2598 * config/loongarch/loongarch-ftypes.def (1): Ditto.
2602 * config/loongarch/lasxintrin.h: New file.
2604 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2606 * config/loongarch/loongarch-modes.def
2607 (VECTOR_MODES): Add Loongson ASX instruction support.
2608 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
2609 (loongarch_split_256bit_move_p): Ditto.
2610 (loongarch_expand_vector_group_init): Ditto.
2611 (loongarch_expand_vec_perm_1): Ditto.
2612 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
2613 (loongarch_valid_offset_p): Ditto.
2614 (loongarch_address_insns): Ditto.
2615 (loongarch_const_insns): Ditto.
2616 (loongarch_legitimize_move): Ditto.
2617 (loongarch_builtin_vectorization_cost): Ditto.
2618 (loongarch_split_move_p): Ditto.
2619 (loongarch_split_move): Ditto.
2620 (loongarch_output_move_index_float): Ditto.
2621 (loongarch_split_256bit_move_p): Ditto.
2622 (loongarch_split_256bit_move): Ditto.
2623 (loongarch_output_move): Ditto.
2624 (loongarch_print_operand_reloc): Ditto.
2625 (loongarch_print_operand): Ditto.
2626 (loongarch_hard_regno_mode_ok_uncached): Ditto.
2627 (loongarch_hard_regno_nregs): Ditto.
2628 (loongarch_class_max_nregs): Ditto.
2629 (loongarch_can_change_mode_class): Ditto.
2630 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
2631 (loongarch_vector_mode_supported_p): Ditto.
2632 (loongarch_preferred_simd_mode): Ditto.
2633 (loongarch_autovectorize_vector_modes): Ditto.
2634 (loongarch_lsx_output_division): Ditto.
2635 (loongarch_expand_lsx_shuffle): Ditto.
2636 (loongarch_expand_vec_perm): Ditto.
2637 (loongarch_expand_vec_perm_interleave): Ditto.
2638 (loongarch_try_expand_lsx_vshuf_const): Ditto.
2639 (loongarch_expand_vec_perm_even_odd_1): Ditto.
2640 (loongarch_expand_vec_perm_even_odd): Ditto.
2641 (loongarch_expand_vec_perm_1): Ditto.
2642 (loongarch_expand_vec_perm_const_2): Ditto.
2643 (loongarch_is_quad_duplicate): Ditto.
2644 (loongarch_is_double_duplicate): Ditto.
2645 (loongarch_is_odd_extraction): Ditto.
2646 (loongarch_is_even_extraction): Ditto.
2647 (loongarch_is_extraction_permutation): Ditto.
2648 (loongarch_is_center_extraction): Ditto.
2649 (loongarch_is_reversing_permutation): Ditto.
2650 (loongarch_is_di_misalign_extract): Ditto.
2651 (loongarch_is_si_misalign_extract): Ditto.
2652 (loongarch_is_lasx_lowpart_interleave): Ditto.
2653 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
2654 (COMPARE_SELECTOR): Ditto.
2655 (loongarch_is_lasx_lowpart_extract): Ditto.
2656 (loongarch_is_lasx_highpart_interleave): Ditto.
2657 (loongarch_is_lasx_highpart_interleave_2): Ditto.
2658 (loongarch_is_elem_duplicate): Ditto.
2659 (loongarch_is_op_reverse_perm): Ditto.
2660 (loongarch_is_single_op_perm): Ditto.
2661 (loongarch_is_divisible_perm): Ditto.
2662 (loongarch_is_triple_stride_extract): Ditto.
2663 (loongarch_vectorize_vec_perm_const): Ditto.
2664 (loongarch_cpu_sched_reassociation_width): Ditto.
2665 (loongarch_expand_vector_extract): Ditto.
2666 (emit_reduc_half): Ditto.
2667 (loongarch_expand_vec_unpack): Ditto.
2668 (loongarch_expand_vector_group_init): Ditto.
2669 (loongarch_expand_vector_init): Ditto.
2670 (loongarch_expand_lsx_cmp): Ditto.
2671 (loongarch_builtin_support_vector_misalignment): Ditto.
2672 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
2673 (BITS_PER_LASX_REG): Ditto.
2674 (STRUCTURE_SIZE_BOUNDARY): Ditto.
2675 (LASX_REG_FIRST): Ditto.
2676 (LASX_REG_LAST): Ditto.
2677 (LASX_REG_NUM): Ditto.
2678 (LASX_REG_P): Ditto.
2679 (LASX_REG_RTX_P): Ditto.
2680 (LASX_SUPPORTED_MODE_P): Ditto.
2681 * config/loongarch/loongarch.md: Ditto.
2682 * config/loongarch/lasx.md: New file.
2684 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
2686 * config.gcc: Export the header file lsxintrin.h.
2687 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
2688 (enum loongarch_builtin_type): Ditto.
2690 (LARCH_BUILTIN): Ditto.
2691 (LSX_BUILTIN): Ditto.
2692 (LSX_BUILTIN_TEST_BRANCH): Ditto.
2693 (LSX_NO_TARGET_BUILTIN): Ditto.
2694 (CODE_FOR_lsx_vsadd_b): Ditto.
2695 (CODE_FOR_lsx_vsadd_h): Ditto.
2696 (CODE_FOR_lsx_vsadd_w): Ditto.
2697 (CODE_FOR_lsx_vsadd_d): Ditto.
2698 (CODE_FOR_lsx_vsadd_bu): Ditto.
2699 (CODE_FOR_lsx_vsadd_hu): Ditto.
2700 (CODE_FOR_lsx_vsadd_wu): Ditto.
2701 (CODE_FOR_lsx_vsadd_du): Ditto.
2702 (CODE_FOR_lsx_vadd_b): Ditto.
2703 (CODE_FOR_lsx_vadd_h): Ditto.
2704 (CODE_FOR_lsx_vadd_w): Ditto.
2705 (CODE_FOR_lsx_vadd_d): Ditto.
2706 (CODE_FOR_lsx_vaddi_bu): Ditto.
2707 (CODE_FOR_lsx_vaddi_hu): Ditto.
2708 (CODE_FOR_lsx_vaddi_wu): Ditto.
2709 (CODE_FOR_lsx_vaddi_du): Ditto.
2710 (CODE_FOR_lsx_vand_v): Ditto.
2711 (CODE_FOR_lsx_vandi_b): Ditto.
2712 (CODE_FOR_lsx_bnz_v): Ditto.
2713 (CODE_FOR_lsx_bz_v): Ditto.
2714 (CODE_FOR_lsx_vbitsel_v): Ditto.
2715 (CODE_FOR_lsx_vseqi_b): Ditto.
2716 (CODE_FOR_lsx_vseqi_h): Ditto.
2717 (CODE_FOR_lsx_vseqi_w): Ditto.
2718 (CODE_FOR_lsx_vseqi_d): Ditto.
2719 (CODE_FOR_lsx_vslti_b): Ditto.
2720 (CODE_FOR_lsx_vslti_h): Ditto.
2721 (CODE_FOR_lsx_vslti_w): Ditto.
2722 (CODE_FOR_lsx_vslti_d): Ditto.
2723 (CODE_FOR_lsx_vslti_bu): Ditto.
2724 (CODE_FOR_lsx_vslti_hu): Ditto.
2725 (CODE_FOR_lsx_vslti_wu): Ditto.
2726 (CODE_FOR_lsx_vslti_du): Ditto.
2727 (CODE_FOR_lsx_vslei_b): Ditto.
2728 (CODE_FOR_lsx_vslei_h): Ditto.
2729 (CODE_FOR_lsx_vslei_w): Ditto.
2730 (CODE_FOR_lsx_vslei_d): Ditto.
2731 (CODE_FOR_lsx_vslei_bu): Ditto.
2732 (CODE_FOR_lsx_vslei_hu): Ditto.
2733 (CODE_FOR_lsx_vslei_wu): Ditto.
2734 (CODE_FOR_lsx_vslei_du): Ditto.
2735 (CODE_FOR_lsx_vdiv_b): Ditto.
2736 (CODE_FOR_lsx_vdiv_h): Ditto.
2737 (CODE_FOR_lsx_vdiv_w): Ditto.
2738 (CODE_FOR_lsx_vdiv_d): Ditto.
2739 (CODE_FOR_lsx_vdiv_bu): Ditto.
2740 (CODE_FOR_lsx_vdiv_hu): Ditto.
2741 (CODE_FOR_lsx_vdiv_wu): Ditto.
2742 (CODE_FOR_lsx_vdiv_du): Ditto.
2743 (CODE_FOR_lsx_vfadd_s): Ditto.
2744 (CODE_FOR_lsx_vfadd_d): Ditto.
2745 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
2746 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
2747 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
2748 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
2749 (CODE_FOR_lsx_vffint_s_w): Ditto.
2750 (CODE_FOR_lsx_vffint_d_l): Ditto.
2751 (CODE_FOR_lsx_vffint_s_wu): Ditto.
2752 (CODE_FOR_lsx_vffint_d_lu): Ditto.
2753 (CODE_FOR_lsx_vfsub_s): Ditto.
2754 (CODE_FOR_lsx_vfsub_d): Ditto.
2755 (CODE_FOR_lsx_vfmul_s): Ditto.
2756 (CODE_FOR_lsx_vfmul_d): Ditto.
2757 (CODE_FOR_lsx_vfdiv_s): Ditto.
2758 (CODE_FOR_lsx_vfdiv_d): Ditto.
2759 (CODE_FOR_lsx_vfmax_s): Ditto.
2760 (CODE_FOR_lsx_vfmax_d): Ditto.
2761 (CODE_FOR_lsx_vfmin_s): Ditto.
2762 (CODE_FOR_lsx_vfmin_d): Ditto.
2763 (CODE_FOR_lsx_vfsqrt_s): Ditto.
2764 (CODE_FOR_lsx_vfsqrt_d): Ditto.
2765 (CODE_FOR_lsx_vflogb_s): Ditto.
2766 (CODE_FOR_lsx_vflogb_d): Ditto.
2767 (CODE_FOR_lsx_vmax_b): Ditto.
2768 (CODE_FOR_lsx_vmax_h): Ditto.
2769 (CODE_FOR_lsx_vmax_w): Ditto.
2770 (CODE_FOR_lsx_vmax_d): Ditto.
2771 (CODE_FOR_lsx_vmaxi_b): Ditto.
2772 (CODE_FOR_lsx_vmaxi_h): Ditto.
2773 (CODE_FOR_lsx_vmaxi_w): Ditto.
2774 (CODE_FOR_lsx_vmaxi_d): Ditto.
2775 (CODE_FOR_lsx_vmax_bu): Ditto.
2776 (CODE_FOR_lsx_vmax_hu): Ditto.
2777 (CODE_FOR_lsx_vmax_wu): Ditto.
2778 (CODE_FOR_lsx_vmax_du): Ditto.
2779 (CODE_FOR_lsx_vmaxi_bu): Ditto.
2780 (CODE_FOR_lsx_vmaxi_hu): Ditto.
2781 (CODE_FOR_lsx_vmaxi_wu): Ditto.
2782 (CODE_FOR_lsx_vmaxi_du): Ditto.
2783 (CODE_FOR_lsx_vmin_b): Ditto.
2784 (CODE_FOR_lsx_vmin_h): Ditto.
2785 (CODE_FOR_lsx_vmin_w): Ditto.
2786 (CODE_FOR_lsx_vmin_d): Ditto.
2787 (CODE_FOR_lsx_vmini_b): Ditto.
2788 (CODE_FOR_lsx_vmini_h): Ditto.
2789 (CODE_FOR_lsx_vmini_w): Ditto.
2790 (CODE_FOR_lsx_vmini_d): Ditto.
2791 (CODE_FOR_lsx_vmin_bu): Ditto.
2792 (CODE_FOR_lsx_vmin_hu): Ditto.
2793 (CODE_FOR_lsx_vmin_wu): Ditto.
2794 (CODE_FOR_lsx_vmin_du): Ditto.
2795 (CODE_FOR_lsx_vmini_bu): Ditto.
2796 (CODE_FOR_lsx_vmini_hu): Ditto.
2797 (CODE_FOR_lsx_vmini_wu): Ditto.
2798 (CODE_FOR_lsx_vmini_du): Ditto.
2799 (CODE_FOR_lsx_vmod_b): Ditto.
2800 (CODE_FOR_lsx_vmod_h): Ditto.
2801 (CODE_FOR_lsx_vmod_w): Ditto.
2802 (CODE_FOR_lsx_vmod_d): Ditto.
2803 (CODE_FOR_lsx_vmod_bu): Ditto.
2804 (CODE_FOR_lsx_vmod_hu): Ditto.
2805 (CODE_FOR_lsx_vmod_wu): Ditto.
2806 (CODE_FOR_lsx_vmod_du): Ditto.
2807 (CODE_FOR_lsx_vmul_b): Ditto.
2808 (CODE_FOR_lsx_vmul_h): Ditto.
2809 (CODE_FOR_lsx_vmul_w): Ditto.
2810 (CODE_FOR_lsx_vmul_d): Ditto.
2811 (CODE_FOR_lsx_vclz_b): Ditto.
2812 (CODE_FOR_lsx_vclz_h): Ditto.
2813 (CODE_FOR_lsx_vclz_w): Ditto.
2814 (CODE_FOR_lsx_vclz_d): Ditto.
2815 (CODE_FOR_lsx_vnor_v): Ditto.
2816 (CODE_FOR_lsx_vor_v): Ditto.
2817 (CODE_FOR_lsx_vori_b): Ditto.
2818 (CODE_FOR_lsx_vnori_b): Ditto.
2819 (CODE_FOR_lsx_vpcnt_b): Ditto.
2820 (CODE_FOR_lsx_vpcnt_h): Ditto.
2821 (CODE_FOR_lsx_vpcnt_w): Ditto.
2822 (CODE_FOR_lsx_vpcnt_d): Ditto.
2823 (CODE_FOR_lsx_vxor_v): Ditto.
2824 (CODE_FOR_lsx_vxori_b): Ditto.
2825 (CODE_FOR_lsx_vsll_b): Ditto.
2826 (CODE_FOR_lsx_vsll_h): Ditto.
2827 (CODE_FOR_lsx_vsll_w): Ditto.
2828 (CODE_FOR_lsx_vsll_d): Ditto.
2829 (CODE_FOR_lsx_vslli_b): Ditto.
2830 (CODE_FOR_lsx_vslli_h): Ditto.
2831 (CODE_FOR_lsx_vslli_w): Ditto.
2832 (CODE_FOR_lsx_vslli_d): Ditto.
2833 (CODE_FOR_lsx_vsra_b): Ditto.
2834 (CODE_FOR_lsx_vsra_h): Ditto.
2835 (CODE_FOR_lsx_vsra_w): Ditto.
2836 (CODE_FOR_lsx_vsra_d): Ditto.
2837 (CODE_FOR_lsx_vsrai_b): Ditto.
2838 (CODE_FOR_lsx_vsrai_h): Ditto.
2839 (CODE_FOR_lsx_vsrai_w): Ditto.
2840 (CODE_FOR_lsx_vsrai_d): Ditto.
2841 (CODE_FOR_lsx_vsrl_b): Ditto.
2842 (CODE_FOR_lsx_vsrl_h): Ditto.
2843 (CODE_FOR_lsx_vsrl_w): Ditto.
2844 (CODE_FOR_lsx_vsrl_d): Ditto.
2845 (CODE_FOR_lsx_vsrli_b): Ditto.
2846 (CODE_FOR_lsx_vsrli_h): Ditto.
2847 (CODE_FOR_lsx_vsrli_w): Ditto.
2848 (CODE_FOR_lsx_vsrli_d): Ditto.
2849 (CODE_FOR_lsx_vsub_b): Ditto.
2850 (CODE_FOR_lsx_vsub_h): Ditto.
2851 (CODE_FOR_lsx_vsub_w): Ditto.
2852 (CODE_FOR_lsx_vsub_d): Ditto.
2853 (CODE_FOR_lsx_vsubi_bu): Ditto.
2854 (CODE_FOR_lsx_vsubi_hu): Ditto.
2855 (CODE_FOR_lsx_vsubi_wu): Ditto.
2856 (CODE_FOR_lsx_vsubi_du): Ditto.
2857 (CODE_FOR_lsx_vpackod_d): Ditto.
2858 (CODE_FOR_lsx_vpackev_d): Ditto.
2859 (CODE_FOR_lsx_vpickod_d): Ditto.
2860 (CODE_FOR_lsx_vpickev_d): Ditto.
2861 (CODE_FOR_lsx_vrepli_b): Ditto.
2862 (CODE_FOR_lsx_vrepli_h): Ditto.
2863 (CODE_FOR_lsx_vrepli_w): Ditto.
2864 (CODE_FOR_lsx_vrepli_d): Ditto.
2865 (CODE_FOR_lsx_vsat_b): Ditto.
2866 (CODE_FOR_lsx_vsat_h): Ditto.
2867 (CODE_FOR_lsx_vsat_w): Ditto.
2868 (CODE_FOR_lsx_vsat_d): Ditto.
2869 (CODE_FOR_lsx_vsat_bu): Ditto.
2870 (CODE_FOR_lsx_vsat_hu): Ditto.
2871 (CODE_FOR_lsx_vsat_wu): Ditto.
2872 (CODE_FOR_lsx_vsat_du): Ditto.
2873 (CODE_FOR_lsx_vavg_b): Ditto.
2874 (CODE_FOR_lsx_vavg_h): Ditto.
2875 (CODE_FOR_lsx_vavg_w): Ditto.
2876 (CODE_FOR_lsx_vavg_d): Ditto.
2877 (CODE_FOR_lsx_vavg_bu): Ditto.
2878 (CODE_FOR_lsx_vavg_hu): Ditto.
2879 (CODE_FOR_lsx_vavg_wu): Ditto.
2880 (CODE_FOR_lsx_vavg_du): Ditto.
2881 (CODE_FOR_lsx_vavgr_b): Ditto.
2882 (CODE_FOR_lsx_vavgr_h): Ditto.
2883 (CODE_FOR_lsx_vavgr_w): Ditto.
2884 (CODE_FOR_lsx_vavgr_d): Ditto.
2885 (CODE_FOR_lsx_vavgr_bu): Ditto.
2886 (CODE_FOR_lsx_vavgr_hu): Ditto.
2887 (CODE_FOR_lsx_vavgr_wu): Ditto.
2888 (CODE_FOR_lsx_vavgr_du): Ditto.
2889 (CODE_FOR_lsx_vssub_b): Ditto.
2890 (CODE_FOR_lsx_vssub_h): Ditto.
2891 (CODE_FOR_lsx_vssub_w): Ditto.
2892 (CODE_FOR_lsx_vssub_d): Ditto.
2893 (CODE_FOR_lsx_vssub_bu): Ditto.
2894 (CODE_FOR_lsx_vssub_hu): Ditto.
2895 (CODE_FOR_lsx_vssub_wu): Ditto.
2896 (CODE_FOR_lsx_vssub_du): Ditto.
2897 (CODE_FOR_lsx_vabsd_b): Ditto.
2898 (CODE_FOR_lsx_vabsd_h): Ditto.
2899 (CODE_FOR_lsx_vabsd_w): Ditto.
2900 (CODE_FOR_lsx_vabsd_d): Ditto.
2901 (CODE_FOR_lsx_vabsd_bu): Ditto.
2902 (CODE_FOR_lsx_vabsd_hu): Ditto.
2903 (CODE_FOR_lsx_vabsd_wu): Ditto.
2904 (CODE_FOR_lsx_vabsd_du): Ditto.
2905 (CODE_FOR_lsx_vftint_w_s): Ditto.
2906 (CODE_FOR_lsx_vftint_l_d): Ditto.
2907 (CODE_FOR_lsx_vftint_wu_s): Ditto.
2908 (CODE_FOR_lsx_vftint_lu_d): Ditto.
2909 (CODE_FOR_lsx_vandn_v): Ditto.
2910 (CODE_FOR_lsx_vorn_v): Ditto.
2911 (CODE_FOR_lsx_vneg_b): Ditto.
2912 (CODE_FOR_lsx_vneg_h): Ditto.
2913 (CODE_FOR_lsx_vneg_w): Ditto.
2914 (CODE_FOR_lsx_vneg_d): Ditto.
2915 (CODE_FOR_lsx_vshuf4i_d): Ditto.
2916 (CODE_FOR_lsx_vbsrl_v): Ditto.
2917 (CODE_FOR_lsx_vbsll_v): Ditto.
2918 (CODE_FOR_lsx_vfmadd_s): Ditto.
2919 (CODE_FOR_lsx_vfmadd_d): Ditto.
2920 (CODE_FOR_lsx_vfmsub_s): Ditto.
2921 (CODE_FOR_lsx_vfmsub_d): Ditto.
2922 (CODE_FOR_lsx_vfnmadd_s): Ditto.
2923 (CODE_FOR_lsx_vfnmadd_d): Ditto.
2924 (CODE_FOR_lsx_vfnmsub_s): Ditto.
2925 (CODE_FOR_lsx_vfnmsub_d): Ditto.
2926 (CODE_FOR_lsx_vmuh_b): Ditto.
2927 (CODE_FOR_lsx_vmuh_h): Ditto.
2928 (CODE_FOR_lsx_vmuh_w): Ditto.
2929 (CODE_FOR_lsx_vmuh_d): Ditto.
2930 (CODE_FOR_lsx_vmuh_bu): Ditto.
2931 (CODE_FOR_lsx_vmuh_hu): Ditto.
2932 (CODE_FOR_lsx_vmuh_wu): Ditto.
2933 (CODE_FOR_lsx_vmuh_du): Ditto.
2934 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
2935 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
2936 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
2937 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
2938 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
2939 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
2940 (CODE_FOR_lsx_vssran_b_h): Ditto.
2941 (CODE_FOR_lsx_vssran_h_w): Ditto.
2942 (CODE_FOR_lsx_vssran_w_d): Ditto.
2943 (CODE_FOR_lsx_vssran_bu_h): Ditto.
2944 (CODE_FOR_lsx_vssran_hu_w): Ditto.
2945 (CODE_FOR_lsx_vssran_wu_d): Ditto.
2946 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
2947 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
2948 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
2949 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
2950 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
2951 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
2952 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
2953 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
2954 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
2955 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
2956 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
2957 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
2958 (loongarch_builtin_vector_type): Ditto.
2959 (loongarch_build_cvpointer_type): Ditto.
2960 (LARCH_ATYPE_CVPOINTER): Ditto.
2961 (LARCH_ATYPE_BOOLEAN): Ditto.
2962 (LARCH_ATYPE_V2SF): Ditto.
2963 (LARCH_ATYPE_V2HI): Ditto.
2964 (LARCH_ATYPE_V2SI): Ditto.
2965 (LARCH_ATYPE_V4QI): Ditto.
2966 (LARCH_ATYPE_V4HI): Ditto.
2967 (LARCH_ATYPE_V8QI): Ditto.
2968 (LARCH_ATYPE_V2DI): Ditto.
2969 (LARCH_ATYPE_V4SI): Ditto.
2970 (LARCH_ATYPE_V8HI): Ditto.
2971 (LARCH_ATYPE_V16QI): Ditto.
2972 (LARCH_ATYPE_V2DF): Ditto.
2973 (LARCH_ATYPE_V4SF): Ditto.
2974 (LARCH_ATYPE_V4DI): Ditto.
2975 (LARCH_ATYPE_V8SI): Ditto.
2976 (LARCH_ATYPE_V16HI): Ditto.
2977 (LARCH_ATYPE_V32QI): Ditto.
2978 (LARCH_ATYPE_V4DF): Ditto.
2979 (LARCH_ATYPE_V8SF): Ditto.
2980 (LARCH_ATYPE_UV2DI): Ditto.
2981 (LARCH_ATYPE_UV4SI): Ditto.
2982 (LARCH_ATYPE_UV8HI): Ditto.
2983 (LARCH_ATYPE_UV16QI): Ditto.
2984 (LARCH_ATYPE_UV4DI): Ditto.
2985 (LARCH_ATYPE_UV8SI): Ditto.
2986 (LARCH_ATYPE_UV16HI): Ditto.
2987 (LARCH_ATYPE_UV32QI): Ditto.
2988 (LARCH_ATYPE_UV2SI): Ditto.
2989 (LARCH_ATYPE_UV4HI): Ditto.
2990 (LARCH_ATYPE_UV8QI): Ditto.
2991 (loongarch_builtin_vectorized_function): Ditto.
2992 (LARCH_GET_BUILTIN): Ditto.
2993 (loongarch_expand_builtin_insn): Ditto.
2994 (loongarch_expand_builtin_lsx_test_branch): Ditto.
2995 (loongarch_expand_builtin): Ditto.
2996 * config/loongarch/loongarch-ftypes.def (1): Ditto.
3000 * config/loongarch/lsxintrin.h: New file.
3002 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
3004 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
3024 * config/loongarch/genopts/loongarch.opt.in: Ditto.
3025 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
3026 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
3027 (VECTOR_MODE): Ditto.
3029 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
3030 (loongarch_split_move_insn): Ditto.
3031 (loongarch_split_128bit_move): Ditto.
3032 (loongarch_split_128bit_move_p): Ditto.
3033 (loongarch_split_lsx_copy_d): Ditto.
3034 (loongarch_split_lsx_insert_d): Ditto.
3035 (loongarch_split_lsx_fill_d): Ditto.
3036 (loongarch_expand_vec_cmp): Ditto.
3037 (loongarch_const_vector_same_val_p): Ditto.
3038 (loongarch_const_vector_same_bytes_p): Ditto.
3039 (loongarch_const_vector_same_int_p): Ditto.
3040 (loongarch_const_vector_shuffle_set_p): Ditto.
3041 (loongarch_const_vector_bitimm_set_p): Ditto.
3042 (loongarch_const_vector_bitimm_clr_p): Ditto.
3043 (loongarch_lsx_vec_parallel_const_half): Ditto.
3044 (loongarch_gen_const_int_vector): Ditto.
3045 (loongarch_lsx_output_division): Ditto.
3046 (loongarch_expand_vector_init): Ditto.
3047 (loongarch_expand_vec_unpack): Ditto.
3048 (loongarch_expand_vec_perm): Ditto.
3049 (loongarch_expand_vector_extract): Ditto.
3050 (loongarch_expand_vector_reduc): Ditto.
3051 (loongarch_ldst_scaled_shift): Ditto.
3052 (loongarch_expand_vec_cond_expr): Ditto.
3053 (loongarch_expand_vec_cond_mask_expr): Ditto.
3054 (loongarch_builtin_vectorized_function): Ditto.
3055 (loongarch_gen_const_int_vector_shuffle): Ditto.
3056 (loongarch_build_signbit_mask): Ditto.
3057 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
3058 (loongarch_setup_incoming_varargs): Ditto.
3059 (loongarch_emit_move): Ditto.
3060 (loongarch_const_vector_bitimm_set_p): Ditto.
3061 (loongarch_const_vector_bitimm_clr_p): Ditto.
3062 (loongarch_const_vector_same_val_p): Ditto.
3063 (loongarch_const_vector_same_bytes_p): Ditto.
3064 (loongarch_const_vector_same_int_p): Ditto.
3065 (loongarch_const_vector_shuffle_set_p): Ditto.
3066 (loongarch_symbol_insns): Ditto.
3067 (loongarch_cannot_force_const_mem): Ditto.
3068 (loongarch_valid_offset_p): Ditto.
3069 (loongarch_valid_index_p): Ditto.
3070 (loongarch_classify_address): Ditto.
3071 (loongarch_address_insns): Ditto.
3072 (loongarch_ldst_scaled_shift): Ditto.
3073 (loongarch_const_insns): Ditto.
3074 (loongarch_split_move_insn_p): Ditto.
3075 (loongarch_subword_at_byte): Ditto.
3076 (loongarch_legitimize_move): Ditto.
3077 (loongarch_builtin_vectorization_cost): Ditto.
3078 (loongarch_split_move_p): Ditto.
3079 (loongarch_split_move): Ditto.
3080 (loongarch_split_move_insn): Ditto.
3081 (loongarch_output_move_index_float): Ditto.
3082 (loongarch_split_128bit_move_p): Ditto.
3083 (loongarch_split_128bit_move): Ditto.
3084 (loongarch_split_lsx_copy_d): Ditto.
3085 (loongarch_split_lsx_insert_d): Ditto.
3086 (loongarch_split_lsx_fill_d): Ditto.
3087 (loongarch_output_move): Ditto.
3088 (loongarch_extend_comparands): Ditto.
3089 (loongarch_print_operand_reloc): Ditto.
3090 (loongarch_print_operand): Ditto.
3091 (loongarch_hard_regno_mode_ok_uncached): Ditto.
3092 (loongarch_hard_regno_call_part_clobbered): Ditto.
3093 (loongarch_hard_regno_nregs): Ditto.
3094 (loongarch_class_max_nregs): Ditto.
3095 (loongarch_can_change_mode_class): Ditto.
3096 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
3097 (loongarch_secondary_reload): Ditto.
3098 (loongarch_vector_mode_supported_p): Ditto.
3099 (loongarch_preferred_simd_mode): Ditto.
3100 (loongarch_autovectorize_vector_modes): Ditto.
3101 (loongarch_lsx_output_division): Ditto.
3102 (loongarch_option_override_internal): Ditto.
3103 (loongarch_hard_regno_caller_save_mode): Ditto.
3104 (MAX_VECT_LEN): Ditto.
3105 (loongarch_spill_class): Ditto.
3106 (struct expand_vec_perm_d): Ditto.
3107 (loongarch_promote_function_mode): Ditto.
3108 (loongarch_expand_vselect): Ditto.
3109 (loongarch_starting_frame_offset): Ditto.
3110 (loongarch_expand_vselect_vconcat): Ditto.
3111 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
3112 (TARGET_OPTION_OVERRIDE): Ditto.
3113 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
3114 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
3115 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
3116 (loongarch_expand_lsx_shuffle): Ditto.
3117 (TARGET_SCHED_INIT): Ditto.
3118 (TARGET_SCHED_REORDER): Ditto.
3119 (TARGET_SCHED_REORDER2): Ditto.
3120 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
3121 (TARGET_SCHED_ADJUST_COST): Ditto.
3122 (TARGET_SCHED_ISSUE_RATE): Ditto.
3123 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
3124 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
3125 (TARGET_VALID_POINTER_MODE): Ditto.
3126 (TARGET_REGISTER_MOVE_COST): Ditto.
3127 (TARGET_MEMORY_MOVE_COST): Ditto.
3128 (TARGET_RTX_COSTS): Ditto.
3129 (TARGET_ADDRESS_COST): Ditto.
3130 (TARGET_IN_SMALL_DATA_P): Ditto.
3131 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
3132 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
3133 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
3134 (loongarch_expand_vec_perm): Ditto.
3135 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
3136 (TARGET_RETURN_IN_MEMORY): Ditto.
3137 (TARGET_FUNCTION_VALUE): Ditto.
3138 (TARGET_LIBCALL_VALUE): Ditto.
3139 (loongarch_try_expand_lsx_vshuf_const): Ditto.
3140 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
3141 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
3142 (TARGET_PRINT_OPERAND): Ditto.
3143 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
3144 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
3145 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
3146 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
3147 (TARGET_MUST_PASS_IN_STACK): Ditto.
3148 (TARGET_PASS_BY_REFERENCE): Ditto.
3149 (TARGET_ARG_PARTIAL_BYTES): Ditto.
3150 (TARGET_FUNCTION_ARG): Ditto.
3151 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
3152 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
3153 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
3154 (TARGET_INIT_BUILTINS): Ditto.
3155 (loongarch_expand_vec_perm_const_1): Ditto.
3156 (loongarch_expand_vec_perm_const_2): Ditto.
3157 (loongarch_vectorize_vec_perm_const): Ditto.
3158 (loongarch_cpu_sched_reassociation_width): Ditto.
3159 (loongarch_sched_reassociation_width): Ditto.
3160 (loongarch_expand_vector_extract): Ditto.
3161 (emit_reduc_half): Ditto.
3162 (loongarch_expand_vector_reduc): Ditto.
3163 (loongarch_expand_vec_unpack): Ditto.
3164 (loongarch_lsx_vec_parallel_const_half): Ditto.
3165 (loongarch_constant_elt_p): Ditto.
3166 (loongarch_gen_const_int_vector_shuffle): Ditto.
3167 (loongarch_expand_vector_init): Ditto.
3168 (loongarch_expand_lsx_cmp): Ditto.
3169 (loongarch_expand_vec_cond_expr): Ditto.
3170 (loongarch_expand_vec_cond_mask_expr): Ditto.
3171 (loongarch_expand_vec_cmp): Ditto.
3172 (loongarch_case_values_threshold): Ditto.
3173 (loongarch_build_const_vector): Ditto.
3174 (loongarch_build_signbit_mask): Ditto.
3175 (loongarch_builtin_support_vector_misalignment): Ditto.
3176 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
3177 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
3178 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
3179 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
3180 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
3181 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
3182 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
3183 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
3184 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
3185 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
3186 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
3187 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
3188 (UNITS_PER_LSX_REG): Ditto.
3189 (BITS_PER_LSX_REG): Ditto.
3190 (BIGGEST_ALIGNMENT): Ditto.
3191 (LSX_REG_FIRST): Ditto.
3192 (LSX_REG_LAST): Ditto.
3193 (LSX_REG_NUM): Ditto.
3195 (LSX_REG_RTX_P): Ditto.
3196 (IMM13_OPERAND): Ditto.
3197 (LSX_SUPPORTED_MODE_P): Ditto.
3198 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
3199 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
3200 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
3207 * config/loongarch/loongarch.opt: Ditto.
3208 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
3209 (const_uimm3_operand): Ditto.
3210 (const_8_to_11_operand): Ditto.
3211 (const_12_to_15_operand): Ditto.
3212 (const_uimm4_operand): Ditto.
3213 (const_uimm6_operand): Ditto.
3214 (const_uimm7_operand): Ditto.
3215 (const_uimm8_operand): Ditto.
3216 (const_imm5_operand): Ditto.
3217 (const_imm10_operand): Ditto.
3218 (const_imm13_operand): Ditto.
3219 (reg_imm10_operand): Ditto.
3220 (aq8b_operand): Ditto.
3221 (aq8h_operand): Ditto.
3222 (aq8w_operand): Ditto.
3223 (aq8d_operand): Ditto.
3224 (aq10b_operand): Ditto.
3225 (aq10h_operand): Ditto.
3226 (aq10w_operand): Ditto.
3227 (aq10d_operand): Ditto.
3228 (aq12b_operand): Ditto.
3229 (aq12h_operand): Ditto.
3230 (aq12w_operand): Ditto.
3231 (aq12d_operand): Ditto.
3232 (const_m1_operand): Ditto.
3233 (reg_or_m1_operand): Ditto.
3234 (const_exp_2_operand): Ditto.
3235 (const_exp_4_operand): Ditto.
3236 (const_exp_8_operand): Ditto.
3237 (const_exp_16_operand): Ditto.
3238 (const_exp_32_operand): Ditto.
3239 (const_0_or_1_operand): Ditto.
3240 (const_0_to_3_operand): Ditto.
3241 (const_0_to_7_operand): Ditto.
3242 (const_2_or_3_operand): Ditto.
3243 (const_4_to_7_operand): Ditto.
3244 (const_8_to_15_operand): Ditto.
3245 (const_16_to_31_operand): Ditto.
3246 (qi_mask_operand): Ditto.
3247 (hi_mask_operand): Ditto.
3248 (si_mask_operand): Ditto.
3250 (db4_operand): Ditto.
3251 (db7_operand): Ditto.
3252 (db8_operand): Ditto.
3253 (ib3_operand): Ditto.
3254 (sb4_operand): Ditto.
3255 (sb5_operand): Ditto.
3256 (sb8_operand): Ditto.
3257 (sd8_operand): Ditto.
3258 (ub4_operand): Ditto.
3259 (ub8_operand): Ditto.
3260 (uh4_operand): Ditto.
3261 (uw4_operand): Ditto.
3262 (uw5_operand): Ditto.
3263 (uw6_operand): Ditto.
3264 (uw8_operand): Ditto.
3265 (addiur2_operand): Ditto.
3266 (addiusp_operand): Ditto.
3267 (andi16_operand): Ditto.
3268 (movep_src_register): Ditto.
3269 (movep_src_operand): Ditto.
3270 (fcc_reload_operand): Ditto.
3271 (muldiv_target_operand): Ditto.
3272 (const_vector_same_val_operand): Ditto.
3273 (const_vector_same_simm5_operand): Ditto.
3274 (const_vector_same_uimm5_operand): Ditto.
3275 (const_vector_same_ximm5_operand): Ditto.
3276 (const_vector_same_uimm6_operand): Ditto.
3277 (par_const_vector_shf_set_operand): Ditto.
3278 (reg_or_vector_same_val_operand): Ditto.
3279 (reg_or_vector_same_simm5_operand): Ditto.
3280 (reg_or_vector_same_uimm5_operand): Ditto.
3281 (reg_or_vector_same_ximm5_operand): Ditto.
3282 (reg_or_vector_same_uimm6_operand): Ditto.
3283 * doc/md.texi: Ditto.
3284 * config/loongarch/lsx.md: New file.
3286 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3288 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
3289 (get_all_predecessors): New function.
3290 (get_all_successors): Ditto.
3291 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
3292 (get_all_successors): Ditto.
3293 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
3294 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
3296 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
3298 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
3299 (split_addsi): Likewise.
3300 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
3301 'N', 'x', and 'J' code letters.
3302 (arc_output_addsi): Make it static.
3303 (split_addsi): Remove it.
3304 * config/arc/arc.h (UNSIGNED_INT*): New defines.
3305 (SINNED_INT*): Likewise.
3306 * config/arc/arc.md (type): Add add, sub, bxor types.
3307 (tst_movb): Change code letter from 's' to 'x'.
3308 (andsi3_i): Likewise.
3309 (addsi3_mixed): Refurbish the pattern.
3310 (call_i): Change code letter from 'S' to 'J'.
3311 * config/arc/arc700.md: Add newly introduced types.
3312 * config/arc/arcHS.md: Likewsie.
3313 * config/arc/arcHS4x.md: Likewise.
3314 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
3315 (CM4): Update description.
3316 (CP4, C6u, C6n, CIs, C4p): New constraint.
3318 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
3320 * common/config/arc/arc-common.cc (arc_option_optimization_table):
3321 Remove mbbit_peephole.
3322 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
3323 (store_direct): Likewise.
3324 (BBIT peephole2): Likewise.
3325 * config/arc/arc.opt (mbbit-peephole): Ignore option.
3326 * doc/invoke.texi (mbbit-peephole): Update document.
3328 2023-09-05 Jakub Jelinek <jakub@redhat.com>
3330 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
3333 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3335 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
3336 options passed from driver to gnat1 as explicit for multilib.
3338 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3340 * config.gcc: add loongarch*-elf target.
3341 * config/loongarch/elf.h: New file.
3342 Link against newlib by default.
3344 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3346 * config.gcc: use -mstrict-align for building libraries
3347 if --with-strict-align-lib is given.
3348 * doc/install.texi: likewise.
3350 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3352 * config/loongarch/loongarch-c.cc: Export macros
3353 "__loongarch_{arch,tune}" in the preprocessor.
3355 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
3357 * config.gcc: Make --with-abi= obsolete, decide the default ABI
3358 with target triplet. Allow specifying multilib library build
3359 options with --with-multilib-list and --with-multilib-default.
3360 * config/loongarch/t-linux: Likewise.
3361 * config/loongarch/genopts/loongarch-strings: Likewise.
3362 * config/loongarch/loongarch-str.h: Likewise.
3363 * doc/install.texi: Likewise.
3364 * config/loongarch/genopts/loongarch.opt.in: Introduce
3365 -m[no-]l[a]sx options. Only process -m*-float and
3366 -m[no-]l[a]sx in the GCC driver.
3367 * config/loongarch/loongarch.opt: Likewise.
3368 * config/loongarch/la464.md: Likewise.
3369 * config/loongarch/loongarch-c.cc: Likewise.
3370 * config/loongarch/loongarch-cpu.cc: Likewise.
3371 * config/loongarch/loongarch-cpu.h: Likewise.
3372 * config/loongarch/loongarch-def.c: Likewise.
3373 * config/loongarch/loongarch-def.h: Likewise.
3374 * config/loongarch/loongarch-driver.cc: Likewise.
3375 * config/loongarch/loongarch-driver.h: Likewise.
3376 * config/loongarch/loongarch-opts.cc: Likewise.
3377 * config/loongarch/loongarch-opts.h: Likewise.
3378 * config/loongarch/loongarch.cc: Likewise.
3379 * doc/invoke.texi: Likewise.
3381 2023-09-05 liuhongt <hongtao.liu@intel.com>
3383 * config/i386/sse.md: (V8BFH_128): Renamed to ..
3384 (VHFBF_128): .. this.
3385 (V16BFH_256): Renamed to ..
3386 (VHFBF_256): .. this.
3387 (avx512f_mov<mode>): Extend to V_128.
3388 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
3389 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
3390 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
3391 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
3392 * config/i386/i386-expand.cc (expand_vec_perm_blend):
3393 Canonicalize vec_merge.
3395 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3397 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
3398 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
3399 (autovectorize_vector_modes): Ditto.
3400 (vectorize_related_mode): Ditto.
3402 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
3404 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
3405 all 32b Darwin PowerPC cases.
3407 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
3409 * config/darwin-sections.def (static_init_section): Add the
3410 __TEXT,__StaticInit section.
3411 * config/darwin.cc (darwin_function_section): Use the static init
3412 section for global initializers, to match other platform toolchains.
3414 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
3416 * config/darwin-sections.def (darwin_exception_section): Move to
3418 * config/darwin.cc (darwin_emit_except_table_label): Align before
3419 the exception table label.
3420 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
3421 relative 4byte relocs.
3423 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
3425 * config/darwin.cc (dump_machopic_symref_flags): New.
3426 (debug_machopic_symref_flags): New.
3428 2023-09-04 Pan Li <pan2.li@intel.com>
3430 * config/riscv/riscv-vector-builtins-types.def
3431 (vfloat16mf4_t): Add FP16 intrinsic def.
3432 (vfloat16mf2_t): Ditto.
3433 (vfloat16m1_t): Ditto.
3434 (vfloat16m2_t): Ditto.
3435 (vfloat16m4_t): Ditto.
3436 (vfloat16m8_t): Ditto.
3438 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
3440 PR tree-optimization/108757
3441 * match.pd ((X - N * M) / N): New pattern.
3442 ((X + N * M) / N): New pattern.
3443 ((X + C) div_rshift N): New pattern.
3445 2023-09-04 Guo Jie <guojie@loongson.cn>
3447 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
3448 movsf_hardfloat and movdf_hardfloat.
3450 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
3452 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
3453 In unsigned QImode test, check for sign extended subreg and/or
3454 constant operands, and do a sign extension in that case.
3455 * config/loongarch/loongarch.md (TARGET_64BIT): Define
3456 template cbranchqi4.
3458 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
3460 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
3461 from memory into floating-point registers.
3463 2023-09-03 Pan Li <pan2.li@intel.com>
3465 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
3467 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
3469 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
3471 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
3472 pointer before overwriting it.
3474 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
3476 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
3477 Associate the __float128 type to float128_type_node so that it can
3478 be recognized by the compiler.
3479 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
3480 Add the flag "FLOAT128_TYPE" to gcc and associate a function
3481 with the suffix "q" to "f128".
3482 * doc/extend.texi:Added support for 128-bit floating-point functions on
3483 the LoongArch architecture.
3485 2023-09-01 Jakub Jelinek <jakub@redhat.com>
3488 * common.opt (fabi-version=): Document version 19.
3489 * doc/invoke.texi (-fabi-version=): Likewise.
3491 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3493 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
3494 New combine pattern.
3495 (*cond_<float_cvt><vconvert><mode>): Ditto.
3496 (*cond_<optab><vnconvert><mode>): Ditto.
3497 (*cond_<float_cvt><vnconvert><mode>): Ditto.
3498 (*cond_<optab><mode><vnconvert>): Ditto.
3499 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
3500 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
3501 (<float_cvt><vconvert><mode>2): Adjust.
3502 (<optab><vnconvert><mode>2): Adjust.
3503 (<float_cvt><vnconvert><mode>2): Adjust.
3504 (<optab><mode><vnconvert>2): Adjust.
3505 (<float_cvt><mode><vnconvert>2): Adjust.
3506 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
3508 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3510 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
3511 New combine pattern.
3512 (*cond_trunc<mode><v_double_trunc>): Ditto.
3513 * config/riscv/autovec.md: Adjust.
3514 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
3516 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3518 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
3519 New combine pattern.
3520 (*cond_<optab><v_quad_trunc><mode>): Ditto.
3521 (*cond_<optab><v_oct_trunc><mode>): Ditto.
3522 (*cond_trunc<mode><v_double_trunc>): Ditto.
3523 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
3524 (<optab><v_oct_trunc><mode>2): Ditto.
3526 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
3528 * config/riscv/autovec.md: Adjust.
3529 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
3530 (expand_cond_len_binop): Ditto.
3531 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
3532 (expand_cond_len_op): Ditto.
3533 (expand_cond_len_unop): Ditto.
3534 (expand_cond_len_binop): Ditto.
3535 (expand_cond_len_ternop): Ditto.
3537 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3539 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
3540 VECT_COMPARE_COSTS by default.
3542 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
3544 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
3546 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3548 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
3550 * config/riscv/riscv.opt: Add dynamic compile option.
3552 2023-09-01 Pan Li <pan2.li@intel.com>
3554 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
3555 vls floating-point autovec.
3556 * config/riscv/vector-iterators.md: New iterator for
3557 floating-point V and VLS.
3558 * config/riscv/vector.md: Add VLS to floating-point binop.
3560 2023-09-01 Andrew Pinski <apinski@marvell.com>
3562 PR tree-optimization/19832
3563 * match.pd: Add pattern to optimize
3564 `(a != b) ? a OP b : c`.
3566 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
3567 Guo Jie <guojie@loongson.cn>
3570 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
3571 frame_pointer_needed to determine whether to use the $fp register.
3573 2023-08-31 Andrew Pinski <apinski@marvell.com>
3575 PR tree-optimization/110915
3576 * match.pd (min_value, max_value): Extend to vector constants.
3578 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
3580 * config.in: Regenerate.
3581 * config/darwin-c.cc: Change spelling to macOS.
3582 * config/darwin-driver.cc: Likewise.
3583 * config/darwin.h: Likewise.
3584 * configure.ac: Likewise.
3585 * doc/contrib.texi: Likewise.
3586 * doc/extend.texi: Likewise.
3587 * doc/invoke.texi: Likewise.
3588 * doc/plugins.texi: Likewise.
3589 * doc/tm.texi: Regenerate.
3590 * doc/tm.texi.in: Change spelling to macOS.
3591 * plugin.cc: Likewise.
3593 2023-08-31 Pan Li <pan2.li@intel.com>
3595 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
3596 * config/riscv/autovec.md: Ditto.
3598 2023-08-31 Pan Li <pan2.li@intel.com>
3600 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
3601 * config/riscv/autovec.md: Ditto.
3603 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
3605 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
3606 rather than a call. List each possible destination register
3607 in the call pattern.
3609 2023-08-31 Pan Li <pan2.li@intel.com>
3611 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
3612 * config/riscv/autovec.md: Ditto.
3614 2023-08-31 Pan Li <pan2.li@intel.com>
3615 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
3617 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
3618 * config/riscv/autovec.md: Ditto.
3619 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
3621 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
3623 * config/riscv/autovec.md (shifts): Use
3624 vector_scalar_shift_operand.
3625 * config/riscv/predicates.md (vector_scalar_shift_operand): New
3628 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3630 * config.gcc: Add vector cost model framework for RVV.
3631 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
3632 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
3633 * config/riscv/t-riscv: Ditto.
3634 * config/riscv/riscv-vector-costs.cc: New file.
3635 * config/riscv/riscv-vector-costs.h: New file.
3637 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
3640 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
3641 AltiVec address operands.
3642 (define_insn_and_split movxo): Likewise.
3643 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
3644 redundant mode size check.
3646 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
3648 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
3649 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
3650 Change to default policy.
3651 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
3652 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
3653 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
3655 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
3657 * config/riscv/autovec-opt.md: Adjust.
3658 * config/riscv/autovec-vls.md: Ditto.
3659 * config/riscv/autovec.md: Ditto.
3660 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
3661 (enum insn_flags): Add insn flags.
3662 (emit_vlmax_insn): Adjust.
3663 (emit_vlmax_fp_insn): Delete.
3664 (emit_vlmax_ternary_insn): Delete.
3665 (emit_vlmax_fp_ternary_insn): Delete.
3666 (emit_nonvlmax_insn): Adjust.
3667 (emit_vlmax_slide_insn): Delete.
3668 (emit_nonvlmax_slide_tu_insn): Delete.
3669 (emit_vlmax_merge_insn): Delete.
3670 (emit_vlmax_cmp_insn): Delete.
3671 (emit_vlmax_cmp_mu_insn): Delete.
3672 (emit_vlmax_masked_mu_insn): Delete.
3673 (emit_scalar_move_insn): Delete.
3674 (emit_nonvlmax_integer_move_insn): Delete.
3675 (emit_vlmax_insn_lra): Add.
3676 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
3677 (emit_vlmax_insn): Adjust.
3678 (emit_nonvlmax_insn): Adjust.
3679 (emit_vlmax_insn_lra): Add.
3680 (emit_vlmax_fp_insn): Delete.
3681 (emit_vlmax_ternary_insn): Delete.
3682 (emit_vlmax_fp_ternary_insn): Delete.
3683 (emit_vlmax_slide_insn): Delete.
3684 (emit_nonvlmax_slide_tu_insn): Delete.
3685 (emit_nonvlmax_slide_insn): Delete.
3686 (emit_vlmax_merge_insn): Delete.
3687 (emit_vlmax_cmp_insn): Delete.
3688 (emit_vlmax_cmp_mu_insn): Delete.
3689 (emit_vlmax_masked_insn): Delete.
3690 (emit_nonvlmax_masked_insn): Delete.
3691 (emit_vlmax_masked_store_insn): Delete.
3692 (emit_nonvlmax_masked_store_insn): Delete.
3693 (emit_vlmax_masked_mu_insn): Delete.
3694 (emit_vlmax_masked_fp_mu_insn): Delete.
3695 (emit_nonvlmax_tu_insn): Delete.
3696 (emit_nonvlmax_fp_tu_insn): Delete.
3697 (emit_nonvlmax_tumu_insn): Delete.
3698 (emit_nonvlmax_fp_tumu_insn): Delete.
3699 (emit_scalar_move_insn): Delete.
3700 (emit_cpop_insn): Delete.
3701 (emit_vlmax_integer_move_insn): Delete.
3702 (emit_nonvlmax_integer_move_insn): Delete.
3703 (emit_vlmax_gather_insn): Delete.
3704 (emit_vlmax_masked_gather_mu_insn): Delete.
3705 (emit_vlmax_compress_insn): Delete.
3706 (emit_nonvlmax_compress_insn): Delete.
3707 (emit_vlmax_reduction_insn): Delete.
3708 (emit_vlmax_fp_reduction_insn): Delete.
3709 (emit_nonvlmax_fp_reduction_insn): Delete.
3710 (expand_vec_series): Adjust.
3711 (expand_const_vector): Adjust.
3712 (legitimize_move): Adjust.
3713 (sew64_scalar_helper): Adjust.
3714 (expand_tuple_move): Adjust.
3715 (expand_vector_init_insert_elems): Adjust.
3716 (expand_vector_init_merge_repeating_sequence): Adjust.
3717 (expand_vec_cmp): Adjust.
3718 (expand_vec_cmp_float): Adjust.
3719 (expand_vec_perm): Adjust.
3720 (shuffle_merge_patterns): Adjust.
3721 (shuffle_compress_patterns): Adjust.
3722 (shuffle_decompress_patterns): Adjust.
3723 (expand_load_store): Adjust.
3724 (expand_cond_len_op): Adjust.
3725 (expand_cond_len_unop): Adjust.
3726 (expand_cond_len_binop): Adjust.
3727 (expand_gather_scatter): Adjust.
3728 (expand_cond_len_ternop): Adjust.
3729 (expand_reduction): Adjust.
3730 (expand_lanes_load_store): Adjust.
3731 (expand_fold_extract_last): Adjust.
3732 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
3733 * config/riscv/vector.md: Adjust.
3735 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
3738 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
3739 load/store with length only on 64-bit Power10.
3741 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
3743 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
3744 SWAP option is enabled.
3745 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
3747 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
3749 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
3750 Use common insn for signed and unsigned front-end definitions.
3751 * config/arm/arm_mve_builtins.def
3752 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
3753 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
3754 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
3757 (mve_rot): Likewise.
3759 (VxCADDQ_M): Likewise.
3760 * config/arm/unspecs.md (unspec): Likewise.
3761 * config/arm/mve.md: Fix minor typo.
3763 2023-08-31 liuhongt <hongtao.liu@intel.com>
3765 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
3766 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
3767 (VF_AVX512HFBF16): Renamed to VHFBF.
3768 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
3769 (VF_AVX512FP16): Removed.
3770 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
3771 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
3772 (rsqrt<mode>2): Ditto.
3773 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
3774 (vcond<mode><code>): Ditto.
3775 (vcond<sseintvecmodelower><mode>): Ditto.
3776 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
3777 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
3778 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
3779 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
3780 (cmla<conj_op><mode>4): Ditto.
3781 (fma_<mode>_fadd_fmul): Ditto.
3782 (fma_<mode>_fadd_fcmul): Ditto.
3783 (fma_<complexopname>_<mode>_fma_zero): Ditto.
3784 (fma_<mode>_fmaddc_bcst): Ditto.
3785 (fma_<mode>_fcmaddc_bcst): Ditto.
3786 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
3787 (cmul<conj_op><mode>3): Ditto.
3788 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
3790 (vec_unpacks_lo_<mode>): Ditto.
3791 (vec_unpacks_hi_<mode>): Ditto.
3792 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
3793 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
3794 (*vec_extract<mode>_0): Ditto.
3795 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
3797 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
3800 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
3802 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
3804 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
3805 (operator_minus::overflow_free_p): New declare.
3806 (operator_mult::overflow_free_p): New declare.
3807 * range-op.cc (range_op_handler::overflow_free_p): New function.
3808 (range_operator::overflow_free_p): New default function.
3809 (operator_plus::overflow_free_p): New function.
3810 (operator_minus::overflow_free_p): New function.
3811 (operator_mult::overflow_free_p): New function.
3812 * range-op.h (range_op_handler::overflow_free_p): New declare.
3813 (range_operator::overflow_free_p): New declare.
3814 * value-range.cc (irange::nonnegative_p): New function.
3815 (irange::nonpositive_p): New function.
3816 * value-range.h (irange::nonnegative_p): New declare.
3817 (irange::nonpositive_p): New declare.
3819 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
3822 * config/pru/predicates.md (const_0_operand): New predicate.
3823 (pru_cstore_comparison_operator): Ditto.
3824 * config/pru/pru.md (cstore<mode>4): New pattern.
3827 2023-08-30 Richard Biener <rguenther@suse.de>
3829 PR tree-optimization/111228
3830 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
3831 New simplifications.
3833 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3835 * config/riscv/autovec.md (movmisalign<mode>): Delete.
3837 2023-08-30 Die Li <lidie@eswincomputing.com>
3838 Fei Gao <gaofei@eswincomputing.com>
3840 * config/riscv/peephole.md: New pattern.
3841 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
3842 (zcmp_mv_sreg_operand): New predicate.
3843 * config/riscv/riscv.md: New predicate.
3844 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
3845 (*mvsa01<X:mode>): New pattern.
3847 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
3849 * config/riscv/riscv.cc
3850 (riscv_zcmp_can_use_popretz): true if popretz can be used
3851 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
3852 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
3853 * config/riscv/riscv.md: define A0_REGNUM
3854 * config/riscv/zc.md
3855 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
3856 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
3857 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
3858 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
3859 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
3860 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
3861 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
3862 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
3863 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
3864 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
3865 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
3866 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
3868 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
3870 * config/riscv/iterators.md
3871 (slot0_offset): slot 0 offset in stack GPRs area in bytes
3872 (slot1_offset): slot 1 offset in stack GPRs area in bytes
3873 (slot2_offset): likewise
3874 (slot3_offset): likewise
3875 (slot4_offset): likewise
3876 (slot5_offset): likewise
3877 (slot6_offset): likewise
3878 (slot7_offset): likewise
3879 (slot8_offset): likewise
3880 (slot9_offset): likewise
3881 (slot10_offset): likewise
3882 (slot11_offset): likewise
3883 (slot12_offset): likewise
3884 * config/riscv/predicates.md
3885 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
3886 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
3887 (stack_push_up_to_s1_operand): likewise
3888 (stack_push_up_to_s2_operand): likewise
3889 (stack_push_up_to_s3_operand): likewise
3890 (stack_push_up_to_s4_operand): likewise
3891 (stack_push_up_to_s5_operand): likewise
3892 (stack_push_up_to_s6_operand): likewise
3893 (stack_push_up_to_s7_operand): likewise
3894 (stack_push_up_to_s8_operand): likewise
3895 (stack_push_up_to_s9_operand): likewise
3896 (stack_push_up_to_s11_operand): likewise
3897 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
3898 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
3899 (stack_pop_up_to_s1_operand): likewise
3900 (stack_pop_up_to_s2_operand): likewise
3901 (stack_pop_up_to_s3_operand): likewise
3902 (stack_pop_up_to_s4_operand): likewise
3903 (stack_pop_up_to_s5_operand): likewise
3904 (stack_pop_up_to_s6_operand): likewise
3905 (stack_pop_up_to_s7_operand): likewise
3906 (stack_pop_up_to_s8_operand): likewise
3907 (stack_pop_up_to_s9_operand): likewise
3908 (stack_pop_up_to_s11_operand): likewise
3909 * config/riscv/riscv-protos.h
3910 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
3911 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
3912 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
3913 (riscv_use_multi_push): true if multi push is used
3914 (riscv_multi_push_sregs_count): num of sregs in multi-push
3915 (riscv_multi_push_regs_count): num of regs in multi-push
3916 (riscv_16bytes_align): align to 16 bytes
3917 (riscv_stack_align): moved to a better place
3918 (riscv_save_libcall_count): no functional change
3919 (riscv_compute_frame_info): add zcmp frame info
3920 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
3921 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
3922 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
3923 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
3924 (riscv_expand_prologue): allocate stack by cm.push
3925 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
3926 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
3927 (zcmp_base_adj): calculate stack adjustment base size
3928 (zcmp_additional_adj): calculate stack adjustment additional size
3929 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
3930 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
3941 (S10_MASK): likewise
3942 (S11_MASK): likewise
3943 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
3944 (ZCMP_MAX_SPIMM): max spimm value
3945 (ZCMP_SP_INC_STEP): zcmp sp increment step
3946 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
3947 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
3948 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
3949 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
3950 * config/riscv/riscv.md: include zc.md
3951 * config/riscv/zc.md: New file. machine description for zcmp
3953 2023-08-30 Jakub Jelinek <jakub@redhat.com>
3955 PR tree-optimization/110914
3956 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
3957 adjust_last_stmt unless len is known constant.
3959 2023-08-30 Jakub Jelinek <jakub@redhat.com>
3961 PR tree-optimization/111015
3962 * gimple-ssa-store-merging.cc
3963 (imm_store_chain_info::output_merged_store): Use wi::mask and
3964 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
3965 build_int_cst to build BIT_AND_EXPR mask.
3967 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3969 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
3970 (call_may_clobber_ref_p_1): Ditto.
3971 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
3972 (get_alias_ptr_type_for_ptr_address): Ditto.
3974 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3976 * config/riscv/riscv-vsetvl.cc
3977 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
3979 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3981 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
3982 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
3985 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
3987 * config/riscv/zicond.md: New splitters to rewrite single bit
3988 sign extension as the condition to a czero in the desired form.
3990 2023-08-29 David Malcolm <dmalcolm@redhat.com>
3993 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
3995 2023-08-29 David Malcolm <dmalcolm@redhat.com>
3998 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
4000 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
4002 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
4003 zvfh can generate zfa extended instruction fli.h, just like zfh.
4005 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
4006 Vineet Gupta <vineetg@rivosinc.com>
4008 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
4009 __riscv_unaligned_avoid with value 1 or
4010 __riscv_unaligned_slow with value 1 or
4011 __riscv_unaligned_fast with value 1
4012 * config/riscv/riscv.cc (riscv_option_override): Define
4013 riscv_user_wants_strict_align. Set
4014 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
4015 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
4017 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
4019 * config/riscv/autovec-vls.md: Update types
4020 * config/riscv/riscv.md: Add vector placeholder type
4021 * config/riscv/vector.md: Update types
4023 2023-08-29 Carl Love <cel@us.ibm.com>
4025 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
4026 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
4027 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
4028 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
4029 New buit-in definitions.
4030 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
4031 overloaded definition.
4032 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
4034 2023-08-29 Pan Li <pan2.li@intel.com>
4035 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
4037 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
4038 (riscv_legitimize_const_move): Handle ref plus const poly.
4040 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
4042 * common/config/riscv/riscv-common.cc
4043 (riscv_implied_info): Add implications from unprivileged extensions.
4044 (riscv_ext_version_table): Add stub support for all unprivileged
4045 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
4047 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
4049 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
4050 Add stub support for all vendor extensions supported by Binutils.
4052 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
4054 * common/config/riscv/riscv-common.cc
4055 (riscv_implied_info): Add implications from privileged extensions.
4056 (riscv_ext_version_table): Add stub support for all privileged
4057 extensions supported by Binutils.
4059 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
4061 * config/riscv/autovec.md: Adjust
4062 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
4063 (get_vlmax_rtx): Exported.
4064 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
4065 (emit_vlmax_masked_gather_mu_insn): Adjust.
4066 (get_vlmax_rtx): New func.
4067 (expand_load_store): Adjust.
4068 (expand_cond_len_unop): Call expand_cond_len_op.
4069 (expand_cond_len_op): New subroutine.
4070 (expand_cond_len_binop): Call expand_cond_len_op.
4071 (expand_cond_len_ternop): Call expand_cond_len_op.
4072 (expand_lanes_load_store): Adjust.
4074 2023-08-29 Jakub Jelinek <jakub@redhat.com>
4077 PR middle-end/111209
4078 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
4079 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
4080 carry-out on higher limb. Don't match it though if it could be
4081 matched later on 4 argument addition/subtraction.
4083 2023-08-29 Andrew Pinski <apinski@marvell.com>
4085 PR tree-optimization/111147
4086 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
4087 instead of matching bit_not.
4089 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
4091 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
4094 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4096 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
4097 (pass_vsetvl::compute_local_properties): Fix bug.
4098 (pass_vsetvl::commit_vsetvls): Ditto.
4099 * config/riscv/riscv-vsetvl.h: New function.
4101 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
4104 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
4106 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
4107 force_reg mem target operand.
4108 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
4109 (*pred_mov<mode>): Remove imm -> reg pattern.
4110 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
4112 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
4114 * common/config/loongarch/loongarch-common.cc:
4115 Enable '-free' on O2 and above.
4116 * doc/invoke.texi: Modify the description information
4117 of the '-free' compilation option and add the LoongArch
4120 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
4122 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
4124 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
4126 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
4127 Implement the 'Zihintpause' extension, version 2.0.
4128 (riscv_ext_flag_table) Add 'Zihintpause' handling.
4129 * config/riscv/riscv-builtins.cc: Remove availability predicate
4130 "always" and add "hint_pause".
4131 (riscv_builtins) : Add "pause" extension.
4132 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
4133 * config/riscv/riscv.md (riscv_pause): Adjust output based on
4136 2023-08-28 Andrew Pinski <apinski@marvell.com>
4138 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
4139 instead of specifically checking for ~X.
4141 2023-08-28 Andrew Pinski <apinski@marvell.com>
4143 PR tree-optimization/111146
4144 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
4147 2023-08-28 Andrew Pinski <apinski@marvell.com>
4149 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
4150 when resimplify returns true.
4151 (match_simplify_replacement): Print only if accepted the match-and-simplify
4152 result rather than the full sequence.
4154 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4156 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
4158 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
4160 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4162 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
4164 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4166 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
4167 (vmulltq_poly): New.
4168 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
4169 (vmulltq_poly): New.
4170 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
4171 (vmulltq_poly): New.
4172 * config/arm/arm_mve.h (vmulltq_poly): Remove.
4173 (vmullbq_poly): Remove.
4174 (vmullbq_poly_m): Remove.
4175 (vmulltq_poly_m): Remove.
4176 (vmullbq_poly_x): Remove.
4177 (vmulltq_poly_x): Remove.
4178 (vmulltq_poly_p8): Remove.
4179 (vmullbq_poly_p8): Remove.
4180 (vmulltq_poly_p16): Remove.
4181 (vmullbq_poly_p16): Remove.
4182 (vmullbq_poly_m_p8): Remove.
4183 (vmullbq_poly_m_p16): Remove.
4184 (vmulltq_poly_m_p8): Remove.
4185 (vmulltq_poly_m_p16): Remove.
4186 (vmullbq_poly_x_p8): Remove.
4187 (vmullbq_poly_x_p16): Remove.
4188 (vmulltq_poly_x_p8): Remove.
4189 (vmulltq_poly_x_p16): Remove.
4190 (__arm_vmulltq_poly_p8): Remove.
4191 (__arm_vmullbq_poly_p8): Remove.
4192 (__arm_vmulltq_poly_p16): Remove.
4193 (__arm_vmullbq_poly_p16): Remove.
4194 (__arm_vmullbq_poly_m_p8): Remove.
4195 (__arm_vmullbq_poly_m_p16): Remove.
4196 (__arm_vmulltq_poly_m_p8): Remove.
4197 (__arm_vmulltq_poly_m_p16): Remove.
4198 (__arm_vmullbq_poly_x_p8): Remove.
4199 (__arm_vmullbq_poly_x_p16): Remove.
4200 (__arm_vmulltq_poly_x_p8): Remove.
4201 (__arm_vmulltq_poly_x_p16): Remove.
4202 (__arm_vmulltq_poly): Remove.
4203 (__arm_vmullbq_poly): Remove.
4204 (__arm_vmullbq_poly_m): Remove.
4205 (__arm_vmulltq_poly_m): Remove.
4206 (__arm_vmullbq_poly_x): Remove.
4207 (__arm_vmulltq_poly_x): Remove.
4209 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4211 * config/arm/arm-mve-builtins-functions.h (class
4212 unspec_mve_function_exact_insn_vmull_poly): New.
4214 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4216 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
4217 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
4219 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4221 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
4222 support for 'U' and 'p' format specifiers.
4224 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4226 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
4228 (TYPES_poly_8_16): New.
4230 * config/arm/arm-mve-builtins.def (p8): New type suffix.
4232 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
4234 (struct type_suffix_info): Add poly_p field.
4236 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4238 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
4240 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
4242 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
4244 * config/arm/arm_mve.h (vmulltq_int): Remove.
4245 (vmullbq_int): Remove.
4246 (vmullbq_int_m): Remove.
4247 (vmulltq_int_m): Remove.
4248 (vmullbq_int_x): Remove.
4249 (vmulltq_int_x): Remove.
4250 (vmulltq_int_u8): Remove.
4251 (vmullbq_int_u8): Remove.
4252 (vmulltq_int_s8): Remove.
4253 (vmullbq_int_s8): Remove.
4254 (vmulltq_int_u16): Remove.
4255 (vmullbq_int_u16): Remove.
4256 (vmulltq_int_s16): Remove.
4257 (vmullbq_int_s16): Remove.
4258 (vmulltq_int_u32): Remove.
4259 (vmullbq_int_u32): Remove.
4260 (vmulltq_int_s32): Remove.
4261 (vmullbq_int_s32): Remove.
4262 (vmullbq_int_m_s8): Remove.
4263 (vmullbq_int_m_s32): Remove.
4264 (vmullbq_int_m_s16): Remove.
4265 (vmullbq_int_m_u8): Remove.
4266 (vmullbq_int_m_u32): Remove.
4267 (vmullbq_int_m_u16): Remove.
4268 (vmulltq_int_m_s8): Remove.
4269 (vmulltq_int_m_s32): Remove.
4270 (vmulltq_int_m_s16): Remove.
4271 (vmulltq_int_m_u8): Remove.
4272 (vmulltq_int_m_u32): Remove.
4273 (vmulltq_int_m_u16): Remove.
4274 (vmullbq_int_x_s8): Remove.
4275 (vmullbq_int_x_s16): Remove.
4276 (vmullbq_int_x_s32): Remove.
4277 (vmullbq_int_x_u8): Remove.
4278 (vmullbq_int_x_u16): Remove.
4279 (vmullbq_int_x_u32): Remove.
4280 (vmulltq_int_x_s8): Remove.
4281 (vmulltq_int_x_s16): Remove.
4282 (vmulltq_int_x_s32): Remove.
4283 (vmulltq_int_x_u8): Remove.
4284 (vmulltq_int_x_u16): Remove.
4285 (vmulltq_int_x_u32): Remove.
4286 (__arm_vmulltq_int_u8): Remove.
4287 (__arm_vmullbq_int_u8): Remove.
4288 (__arm_vmulltq_int_s8): Remove.
4289 (__arm_vmullbq_int_s8): Remove.
4290 (__arm_vmulltq_int_u16): Remove.
4291 (__arm_vmullbq_int_u16): Remove.
4292 (__arm_vmulltq_int_s16): Remove.
4293 (__arm_vmullbq_int_s16): Remove.
4294 (__arm_vmulltq_int_u32): Remove.
4295 (__arm_vmullbq_int_u32): Remove.
4296 (__arm_vmulltq_int_s32): Remove.
4297 (__arm_vmullbq_int_s32): Remove.
4298 (__arm_vmullbq_int_m_s8): Remove.
4299 (__arm_vmullbq_int_m_s32): Remove.
4300 (__arm_vmullbq_int_m_s16): Remove.
4301 (__arm_vmullbq_int_m_u8): Remove.
4302 (__arm_vmullbq_int_m_u32): Remove.
4303 (__arm_vmullbq_int_m_u16): Remove.
4304 (__arm_vmulltq_int_m_s8): Remove.
4305 (__arm_vmulltq_int_m_s32): Remove.
4306 (__arm_vmulltq_int_m_s16): Remove.
4307 (__arm_vmulltq_int_m_u8): Remove.
4308 (__arm_vmulltq_int_m_u32): Remove.
4309 (__arm_vmulltq_int_m_u16): Remove.
4310 (__arm_vmullbq_int_x_s8): Remove.
4311 (__arm_vmullbq_int_x_s16): Remove.
4312 (__arm_vmullbq_int_x_s32): Remove.
4313 (__arm_vmullbq_int_x_u8): Remove.
4314 (__arm_vmullbq_int_x_u16): Remove.
4315 (__arm_vmullbq_int_x_u32): Remove.
4316 (__arm_vmulltq_int_x_s8): Remove.
4317 (__arm_vmulltq_int_x_s16): Remove.
4318 (__arm_vmulltq_int_x_s32): Remove.
4319 (__arm_vmulltq_int_x_u8): Remove.
4320 (__arm_vmulltq_int_x_u16): Remove.
4321 (__arm_vmulltq_int_x_u32): Remove.
4322 (__arm_vmulltq_int): Remove.
4323 (__arm_vmullbq_int): Remove.
4324 (__arm_vmullbq_int_m): Remove.
4325 (__arm_vmulltq_int_m): Remove.
4326 (__arm_vmullbq_int_x): Remove.
4327 (__arm_vmulltq_int_x): Remove.
4329 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4331 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
4332 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
4334 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4336 * config/arm/arm-mve-builtins-functions.h (class
4337 unspec_mve_function_exact_insn_vmull): New.
4339 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4341 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
4342 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
4344 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
4346 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
4347 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
4348 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
4349 (mve_vmulltq_int_<supf><mode>): Merge into ...
4350 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
4351 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
4352 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
4353 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
4354 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
4355 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
4356 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
4358 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4360 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
4363 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
4365 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
4366 (binary_acca_int64): Likewise.
4368 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
4370 * range-op-float.cc (fold_range): Handle relations.
4372 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
4374 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
4375 Optimize the function implementation.
4377 2023-08-28 liuhongt <hongtao.liu@intel.com>
4380 * config/i386/sse.md (V48_AVX2): Rename to ..
4381 (V48_128_256): .. this.
4382 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
4383 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
4384 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
4385 integral modes when TARGET_AVX2 is not available.
4386 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
4387 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
4389 (maskstore<mode><sseintvecmodelower>): Ditto.
4391 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4393 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
4395 (after_or_same_p): Ditto.
4396 (find_reg_killed_by): Delete.
4397 (has_vsetvl_killed_avl_p): Ditto.
4398 (anticipatable_occurrence_p): Refactor.
4399 (any_set_in_bb_p): Delete.
4400 (count_regno_occurrences): Ditto.
4401 (backward_propagate_worthwhile_p): Ditto.
4402 (demands_can_be_fused_p): Ditto.
4403 (earliest_pred_can_be_fused_p): New function.
4404 (vsetvl_dominated_by_p): Ditto.
4405 (vector_insn_info::parse_insn): Refactor.
4406 (vector_insn_info::merge): Refactor.
4407 (vector_insn_info::dump): Refactor.
4408 (vector_infos_manager::vector_infos_manager): Refactor.
4409 (vector_infos_manager::all_empty_predecessor_p): Delete.
4410 (vector_infos_manager::all_same_avl_p): Ditto.
4411 (vector_infos_manager::create_bitmap_vectors): Refactor.
4412 (vector_infos_manager::free_bitmap_vectors): Refactor.
4413 (vector_infos_manager::dump): Refactor.
4414 (pass_vsetvl::update_block_info): New function.
4415 (enum fusion_type): Ditto.
4416 (pass_vsetvl::get_backward_fusion_type): Delete.
4417 (pass_vsetvl::hard_empty_block_p): Ditto.
4418 (pass_vsetvl::backward_demand_fusion): Ditto.
4419 (pass_vsetvl::forward_demand_fusion): Ditto.
4420 (pass_vsetvl::demand_fusion): Ditto.
4421 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
4422 (pass_vsetvl::compute_local_properties): Ditto.
4423 (pass_vsetvl::earliest_fusion): New function.
4424 (pass_vsetvl::vsetvl_fusion): Ditto.
4425 (pass_vsetvl::commit_vsetvls): Refactor.
4426 (get_first_vsetvl_before_rvv_insns): Ditto.
4427 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
4428 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
4429 (pass_vsetvl::df_post_optimization): Refactor.
4430 (pass_vsetvl::lazy_vsetvl): Ditto.
4431 * config/riscv/riscv-vsetvl.h: Ditto.
4433 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4435 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
4436 * config/riscv/riscv-protos.h (enum insn_type): New enum.
4437 (expand_fold_extract_last): New function.
4438 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
4439 (emit_cpop_insn): Ditto.
4440 (emit_nonvlmax_compress_insn): Ditto.
4441 (expand_fold_extract_last): Ditto.
4442 * config/riscv/vector.md: Fix vcpop.m ratio demand.
4444 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
4446 * config/riscv/sync-rvwmo.md: updated types to "multi" or
4447 "atomic" based on number of assembly lines generated
4448 * config/riscv/sync-ztso.md: likewise
4449 * config/riscv/sync.md: likewise
4451 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
4453 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
4455 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
4456 instructions FLI.H/S/D can load.
4457 * config/riscv/iterators.md (ceil): New.
4458 * config/riscv/riscv-opts.h (MASK_ZFA): New.
4460 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
4461 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
4462 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
4464 (riscv_const_insns): Likewise.
4465 (riscv_legitimize_const_move): Likewise.
4466 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
4468 (riscv_split_doubleword_move): Likewise.
4469 (riscv_output_move): Output the mov instructions in zfa extension.
4470 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
4472 (riscv_secondary_memory_needed): Likewise.
4473 * config/riscv/riscv.md (fminm<mode>3): New.
4474 (fmaxm<mode>3): New.
4475 (movsidf2_low_rv32): New.
4476 (movsidf2_high_rv32): New.
4477 (movdfsisi3_rv32): New.
4478 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
4479 * config/riscv/riscv.opt: New.
4481 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
4484 * omp-general.cc (omp_runtime_api_procname): New.
4485 (omp_runtime_api_call): Moved here from omp-low.cc, and make
4487 * omp-general.h: Include omp-api.h.
4488 * omp-low.cc (omp_runtime_api_call): Delete this copy.
4490 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
4492 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
4493 * doc/gimple.texi (GIMPLE instruction set): Add
4494 GIMPLE_OMP_STRUCTURED_BLOCK.
4495 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
4496 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
4497 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
4498 GIMPLE_OMP_STRUCTURED_BLOCK.
4499 (pp_gimple_stmt_1): Likewise.
4500 * gimple-walk.cc (walk_gimple_stmt): Likewise.
4501 * gimple.cc (gimple_build_omp_structured_block): New.
4502 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
4503 * gimple.h (gimple_build_omp_structured_block): Declare.
4504 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
4505 (CASE_GIMPLE_OMP): Likewise.
4506 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
4507 (gimplify_expr): Likewise.
4508 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
4509 GIMPLE_OMP_STRUCTURED_BLOCK.
4510 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
4511 (lower_omp_1): Likewise.
4512 (diagnose_sb_1): Likewise.
4513 (diagnose_sb_2): Likewise.
4514 * tree-inline.cc (remap_gimple_stmt): Handle
4515 GIMPLE_OMP_STRUCTURED_BLOCK.
4516 (estimate_num_insns): Likewise.
4517 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
4518 (convert_local_reference_stmt): Likewise.
4519 (convert_gimple_call): Likewise.
4520 * tree-pretty-print.cc (dump_generic_node): Handle
4521 OMP_STRUCTURED_BLOCK.
4522 * tree.def (OMP_STRUCTURED_BLOCK): New.
4523 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
4525 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
4527 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
4528 cost. Add some comments about different constants handling.
4530 2023-08-25 Andrew Pinski <apinski@marvell.com>
4532 * match.pd (`a ? one_zero : one_zero`): Move
4533 below detection of minmax.
4535 2023-08-25 Andrew Pinski <apinski@marvell.com>
4537 * match.pd (`a | C -> C`): New pattern.
4539 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
4541 * caller-save.cc (new_saved_hard_reg):
4542 Rename TRUE/FALSE to true/false.
4543 (setup_save_areas): Ditto.
4544 * gcc.cc (set_collect_gcc_options): Ditto.
4545 (driver::build_multilib_strings): Ditto.
4546 (print_multilib_info): Ditto.
4547 * genautomata.cc (gen_cpu_unit): Ditto.
4548 (gen_query_cpu_unit): Ditto.
4549 (gen_bypass): Ditto.
4550 (gen_excl_set): Ditto.
4551 (gen_presence_absence_set): Ditto.
4552 (gen_presence_set): Ditto.
4553 (gen_final_presence_set): Ditto.
4554 (gen_absence_set): Ditto.
4555 (gen_final_absence_set): Ditto.
4556 (gen_automaton): Ditto.
4557 (gen_regexp_repeat): Ditto.
4558 (gen_regexp_allof): Ditto.
4559 (gen_regexp_oneof): Ditto.
4560 (gen_regexp_sequence): Ditto.
4561 (process_decls): Ditto.
4562 (reserv_sets_are_intersected): Ditto.
4563 (initiate_excl_sets): Ditto.
4564 (form_reserv_sets_list): Ditto.
4565 (check_presence_pattern_sets): Ditto.
4566 (check_absence_pattern_sets): Ditto.
4567 (check_regexp_units_distribution): Ditto.
4568 (check_unit_distributions_to_automata): Ditto.
4569 (create_ainsns): Ditto.
4570 (output_insn_code_cases): Ditto.
4571 (output_internal_dead_lock_func): Ditto.
4572 (form_important_insn_automata_lists): Ditto.
4573 * gengtype-state.cc (read_state_files_list): Ditto.
4574 * gengtype.cc (main): Ditto.
4575 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
4577 * gimple.cc (gimple_build_call_from_tree): Ditto.
4578 (preprocess_case_label_vec_for_gimple): Ditto.
4579 * gimplify.cc (gimplify_call_expr): Ditto.
4580 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
4582 2023-08-25 Richard Biener <rguenther@suse.de>
4584 PR tree-optimization/111137
4585 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
4586 Properly handle grouped stores from other SLP instances.
4588 2023-08-25 Richard Biener <rguenther@suse.de>
4590 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
4591 Split out from vect_slp_analyze_node_dependences, remove
4593 (vect_slp_analyze_load_dependences): Split out from
4594 vect_slp_analyze_node_dependences, adjust comments. Process
4595 queued stores before any disambiguation.
4596 (vect_slp_analyze_node_dependences): Remove.
4597 (vect_slp_analyze_instance_dependence): Adjust.
4599 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
4601 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
4603 (operator_not_equal::fold_range): Adjust for relations.
4604 (operator_lt::fold_range): Same.
4605 (operator_gt::fold_range): Same.
4606 (foperator_unordered_equal::fold_range): Same.
4607 (foperator_unordered_lt::fold_range): Same.
4608 (foperator_unordered_le::fold_range): Same.
4609 (foperator_unordered_gt::fold_range): Same.
4610 (foperator_unordered_ge::fold_range): Same.
4612 2023-08-25 Richard Biener <rguenther@suse.de>
4614 PR tree-optimization/111136
4615 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
4616 stores force STMT_VINFO_STRIDED_P and also duplicate that
4619 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4621 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
4624 2023-08-25 liuhongt <hongtao.liu@intel.com>
4626 * config/i386/sse.md (vec_set<mode>): Removed.
4627 (V_128H): Merge into ..
4629 (V_256H): Merge into ..
4631 (V_512): Add V32HF, V32BF.
4632 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
4634 (vcond<mode><sseintvecmodelower>): Removed
4635 (vcondu<mode><sseintvecmodelower>): Removed.
4636 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
4638 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
4641 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
4642 Adjust paramter order.
4644 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
4647 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
4649 2023-08-24 David Malcolm <dmalcolm@redhat.com>
4652 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
4653 list of functions known to the analyzer.
4655 2023-08-24 Richard Biener <rguenther@suse.de>
4657 PR tree-optimization/111123
4658 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
4659 remove indirect clobbers here ...
4660 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
4661 (remove_indirect_clobbers): New function.
4663 2023-08-24 Jan Hubicka <jh@suse.cz>
4665 * cfg.h (struct control_flow_graph): New field full_profile.
4666 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
4667 * cfg.cc (init_flow): Set full_profile to false.
4668 * graphite.cc (graphite_transform_loops): Set full_profile to false.
4669 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
4670 * predict.cc (pass_profile::execute): Set full_profile to true.
4671 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
4672 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
4673 if full_profile is set.
4674 * tree-inline.cc (initialize_cfun): Initialize full_profile.
4675 (expand_call_inline): Combine full_profile.
4677 2023-08-24 Richard Biener <rguenther@suse.de>
4679 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
4680 load_p to ldst_p, fix mistakes and rely on
4681 STMT_VINFO_DATA_REF.
4683 2023-08-24 Jan Hubicka <jh@suse.cz>
4685 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
4686 of newly build trap bb.
4688 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4690 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
4691 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
4692 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
4694 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
4696 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
4697 * config/riscv/riscv.cc (riscv_option_override): Set sched
4700 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
4702 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
4704 2023-08-24 Richard Biener <rguenther@suse.de>
4706 PR tree-optimization/111125
4707 * tree-vect-slp.cc (vect_slp_function): Split at novector
4708 loop entry, do not push blocks in novector loops.
4710 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
4712 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
4714 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4716 * genmatch.cc (decision_tree::gen): Support
4717 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
4718 * gimple-match-exports.cc (gimple_simplify): Ditto.
4719 (gimple_resimplify6): New function.
4720 (gimple_resimplify7): New function.
4721 (gimple_match_op::resimplify): Support
4722 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
4723 (convert_conditional_op): Ditto.
4724 (build_call_internal): Ditto.
4725 (try_conditional_simplification): Ditto.
4726 (gimple_extract): Ditto.
4727 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
4728 * internal-fn.cc (CASE): Ditto.
4730 2023-08-24 Richard Biener <rguenther@suse.de>
4732 PR tree-optimization/111115
4733 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
4734 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
4736 * tree-vect-slp.cc (arg3_arg2_map): New.
4737 (vect_get_operand_map): Handle IFN_MASK_STORE.
4738 (vect_slp_child_index_for_operand): New function.
4739 (vect_build_slp_tree_1): Handle statements with no LHS,
4741 (vect_remove_slp_scalar_calls): Likewise.
4742 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
4743 SLP child corresponding to the ifn value index.
4744 (vectorizable_store): Likewise for the mask index. Support
4746 (vectorizable_load): Lookup the SLP child corresponding to the
4749 2023-08-24 Richard Biener <rguenther@suse.de>
4751 PR tree-optimization/111125
4752 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
4753 for the remain_defs processing.
4755 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
4757 * config/aarch64/aarch64.cc: Include ssa.h.
4758 (aarch64_multiply_add_p): Require the second operand of an
4759 Advanced SIMD subtraction to be a multiplication. Assume that
4760 such an operation won't be fused if the second operand is used
4761 multiple times and if the first operand is also a multiplication.
4763 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4765 * tree-vect-loop.cc (vectorizable_reduction): Apply
4766 LEN_FOLD_EXTRACT_LAST.
4767 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
4769 2023-08-24 Richard Biener <rguenther@suse.de>
4771 PR tree-optimization/111128
4772 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
4773 Emit external shift operand inline if we promoted it with
4774 another pattern stmt.
4776 2023-08-24 Pan Li <pan2.li@intel.com>
4778 * config/riscv/autovec.md: Fix typo.
4780 2023-08-24 Pan Li <pan2.li@intel.com>
4782 * config/riscv/riscv-vector-builtins-bases.cc
4783 (class binop_frm): Removed.
4784 (class reverse_binop_frm): Ditto.
4785 (class widen_binop_frm): Ditto.
4786 (class vfmacc_frm): Ditto.
4787 (class vfnmacc_frm): Ditto.
4788 (class vfmsac_frm): Ditto.
4789 (class vfnmsac_frm): Ditto.
4790 (class vfmadd_frm): Ditto.
4791 (class vfnmadd_frm): Ditto.
4792 (class vfmsub_frm): Ditto.
4793 (class vfnmsub_frm): Ditto.
4794 (class vfwmacc_frm): Ditto.
4795 (class vfwnmacc_frm): Ditto.
4796 (class vfwmsac_frm): Ditto.
4797 (class vfwnmsac_frm): Ditto.
4798 (class unop_frm): Ditto.
4799 (class vfrec7_frm): Ditto.
4800 (class binop): Add frm_op_type template arg.
4801 (class unop): Ditto.
4802 (class widen_binop): Ditto.
4803 (class widen_binop_fp): Ditto.
4804 (class reverse_binop): Ditto.
4805 (class vfmacc): Ditto.
4806 (class vfnmsac): Ditto.
4807 (class vfmadd): Ditto.
4808 (class vfnmsub): Ditto.
4809 (class vfnmacc): Ditto.
4810 (class vfmsac): Ditto.
4811 (class vfnmadd): Ditto.
4812 (class vfmsub): Ditto.
4813 (class vfwmacc): Ditto.
4814 (class vfwnmacc): Ditto.
4815 (class vfwmsac): Ditto.
4816 (class vfwnmsac): Ditto.
4817 (class float_misc): Ditto.
4819 2023-08-24 Andrew Pinski <apinski@marvell.com>
4821 PR tree-optimization/111109
4822 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
4823 Add check to make sure cmp and icmp are inverse.
4825 2023-08-24 Andrew Pinski <apinski@marvell.com>
4827 PR tree-optimization/95929
4828 * match.pd (convert?(-a)): New pattern
4829 for 1bit integer types.
4831 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4834 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4836 * common/config/i386/cpuinfo.h (get_available_features):
4837 Add avx10_set and version and detect avx10.1.
4838 (cpu_indicator_init): Handle avx10.1-512.
4839 * common/config/i386/i386-common.cc
4840 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
4841 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
4842 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
4843 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
4844 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
4845 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
4847 * common/config/i386/i386-cpuinfo.h (enum processor_features):
4848 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
4849 FEATURE_AVX10_512BIT.
4850 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
4851 AVX10_512BIT, AVX10_1 and AVX10_1_512.
4852 * config/i386/constraints.md (Yk): Add AVX10_1.
4855 * config/i386/cpuid.h (bit_AVX10): New.
4856 (bit_AVX10_256): Ditto.
4857 (bit_AVX10_512): Ditto.
4858 * config/i386/i386-c.cc (ix86_target_macros_internal):
4859 Define AVX10_512BIT and AVX10_1.
4860 * config/i386/i386-isa.def
4861 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
4862 (AVX10_1): Add DEF_PTA(AVX10_1).
4863 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
4864 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
4866 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
4867 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
4868 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
4869 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
4870 (ix86_conditional_register_usage): Ditto.
4871 (ix86_hard_regno_mode_ok): Ditto.
4872 (ix86_rtx_costs): Ditto.
4873 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
4874 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
4876 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
4877 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
4878 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
4881 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4884 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4886 * common/config/i386/i386-common.cc
4887 (ix86_check_avx10): New function to check isa_flags and
4888 isa_flags_explicit to emit warning when AVX10 is enabled
4890 (ix86_check_avx512): New function to check isa_flags and
4891 isa_flags_explicit to emit warning when AVX512 is enabled
4893 (ix86_handle_option): Do not change the flags when warning
4895 * config/i386/driver-i386.cc (host_detect_local_cpu):
4896 Do not append -mno-avx10.1 for -march=native.
4898 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4901 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4903 * common/config/i386/i386-common.cc
4904 (ix86_check_avx10_vector_width): New function to check isa_flags
4905 to emit a warning when there is a conflict in AVX10 options for
4907 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
4908 * config/i386/driver-i386.cc (host_detect_local_cpu):
4909 Do not append -mno-avx10-max-512bit for -march=native.
4911 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4914 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4916 * config/i386/avx512vldqintrin.h: Remove target attribute.
4917 * config/i386/i386-builtin.def (BDESC):
4918 Add OPTION_MASK_ISA2_AVX10_1.
4919 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
4920 * config/i386/i386-expand.cc
4921 (ix86_check_builtin_isa_match): Ditto.
4922 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
4923 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
4924 and avx10_1_or_avx512vl.
4925 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
4926 (VF1_128_256VLDQ_AVX10_1): Ditto.
4927 (VI8_AVX512VLDQ_AVX10_1): Ditto.
4928 (<sse>_andnot<mode>3<mask_name>):
4929 Add TARGET_AVX10_1 and change isa attr from avx512dq to
4930 avx10_1_or_avx512dq.
4931 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
4932 avx512vl to avx10_1_or_avx512vl.
4933 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
4934 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
4935 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
4937 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
4939 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
4940 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
4941 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
4943 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
4944 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
4945 Remove target check.
4946 (avx512dq_mul<mode>3<mask_name>): Ditto.
4947 (*avx512dq_mul<mode>3<mask_name>): Ditto.
4948 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
4949 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
4950 Remove target check.
4951 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
4952 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
4953 Remove target check.
4954 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
4955 (mask_avx512vl_condition): Ditto.
4958 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
4961 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
4963 * config/i386/avx512vldqintrin.h: Remove target attribute.
4964 * config/i386/i386-builtin.def (BDESC):
4965 Add OPTION_MASK_ISA2_AVX10_1.
4966 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
4967 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
4968 (VI48_AVX512VLDQ_AVX10_1): Ditto.
4969 (VF2_AVX512VL): Remove.
4970 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
4972 (*<code><mode>3<mask_name>): Change isa attribute to
4973 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
4974 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
4975 to avx10_1_or_avx512vl.
4976 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
4977 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
4978 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
4980 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
4981 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
4982 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
4984 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
4985 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
4986 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
4987 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
4988 (float<floatunssuffix>v4div4sf2<mask_name>):
4990 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
4991 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
4992 (float<floatunssuffix>v2div2sf2): Ditto.
4993 (float<floatunssuffix>v2div2sf2_mask): Ditto.
4994 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
4995 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
4996 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
4997 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
4998 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
4999 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
5000 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
5001 Change when constraint is enabled.
5003 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5006 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5008 * config/i386/avx512vldqintrin.h: Remove target attribute.
5009 * config/i386/i386-builtin.def (BDESC):
5010 Add OPTION_MASK_ISA2_AVX10_1.
5011 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
5012 (VFH_AVX512VLDQ_AVX10_1): Ditto.
5013 (VF1_AVX512VLDQ_AVX10_1): Ditto.
5014 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
5015 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5016 (vec_pack<floatprefix>_float_<mode>): Change iterator to
5017 VI8_AVX512VLDQ_AVX10_1. Remove target check.
5018 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
5019 VF1_AVX512VLDQ_AVX10_1. Remove target check.
5020 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
5021 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
5022 (avx512vl_vextractf128<mode>): Change iterator to
5023 VI48F_256_DQVL_AVX10_1. Remove target check.
5024 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
5025 (vec_extract_hi_<mode>): Ditto.
5026 (avx512vl_vinsert<mode>): Ditto.
5027 (vec_set_lo_<mode><mask_name>): Ditto.
5028 (vec_set_hi_<mode><mask_name>): Ditto.
5029 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
5030 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
5031 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
5032 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5033 * config/i386/subst.md (mask_avx512dq_condition): Add
5035 (mask_scalar_merge): Ditto.
5037 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
5040 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
5043 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
5046 2023-08-24 Richard Biener <rguenther@suse.de>
5049 * dwarf2out.cc (prune_unused_types_walk): Handle
5050 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
5051 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
5052 and DW_TAG_dynamic_type as to only output them when referenced.
5054 2023-08-24 liuhongt <hongtao.liu@intel.com>
5056 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
5059 2023-08-24 liuhongt <hongtao.liu@intel.com>
5061 * common/config/i386/i386-common.cc (processor_names): Add new
5062 member graniterapids-s and arrowlake-s.
5063 * config/i386/i386-options.cc (processor_alias_table): Update
5064 table with PROCESSOR_ARROWLAKE_S and
5065 PROCESSOR_GRANITERAPIDS_D.
5066 (m_GRANITERAPID_D): New macro.
5067 (m_ARROWLAKE_S): Ditto.
5068 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
5069 (processor_cost_table): Add icelake_cost for
5070 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
5071 PROCESSOR_ARROWLAKE_S.
5072 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
5074 * config/i386/i386.h (enum processor_type): Add new member
5075 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
5076 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
5077 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
5079 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
5081 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
5082 to help simplify code further.
5084 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
5086 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
5087 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
5088 Initialize using a range instead of value and edge.
5089 (phi_group::calculate_using_modifier): Use initializer value and
5090 process for relations after trying for iteration convergence.
5091 (phi_group::refine_using_relation): Use initializer range.
5092 (phi_group::dump): Rework the dump output.
5093 (phi_analyzer::process_phi): Allow multiple constant initilizers.
5094 Dump groups immediately as created.
5095 (phi_analyzer::dump): Tweak output.
5096 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
5097 (phi_group::initial_value): Delete.
5098 (phi_group::refine_using_relation): Adjust prototype.
5099 (phi_group::m_initial_value): Delete.
5100 (phi_group::m_initial_edge): Delete.
5101 (phi_group::m_vr): Use int_range_max.
5102 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
5104 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
5106 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
5107 no group was created.
5108 (phi_analyzer::process_phi): Do not create groups of one phi node.
5110 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
5112 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
5113 CODE, CMP_CODE and BIT_CODE arguments.
5114 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
5115 (aarch64_gen_ccmp_next): Likewise.
5116 * doc/tm.texi: Regenerated.
5118 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
5120 * coretypes.h (rtx_code): Add forward declaration.
5121 * rtl.h (rtx_code): Make compatible with forward declaration.
5123 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
5126 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
5127 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
5128 DWIH mode iterator. Disable (=&r,m,m) alternative for
5130 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
5131 alternative for 32-bit targets.
5133 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
5135 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
5136 appropriate type attribute.
5138 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
5140 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
5141 (*copysign<mode>_neg): Ditto.
5142 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
5143 (<optab><mode>2): Ditto.
5144 (cond_<optab><mode>): New.
5145 (cond_len_<optab><mode>): Ditto.
5146 * config/riscv/riscv-protos.h (enum insn_type): New.
5147 (expand_cond_len_unop): New helper func.
5148 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
5149 (expand_cond_len_unop): New helper func.
5151 2023-08-23 Jan Hubicka <jh@suse.cz>
5153 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
5154 (should_duplicate_loop_header_p): Fix return value for static exits.
5155 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
5157 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
5159 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
5160 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
5161 and update the final nest accordingly.
5163 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
5165 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
5166 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
5167 and update the final nest accordingly.
5169 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
5171 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
5172 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
5173 gvec_oprnds with auto_delete_vec.
5175 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5177 * config/riscv/riscv-vsetvl.cc
5178 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
5180 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5182 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
5184 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
5186 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5188 * config/riscv/vector.md: Add attribute.
5190 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5192 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
5193 (vector_infos_manager::all_same_ratio_p): Ditto.
5194 (vector_infos_manager::all_same_avl_p): Ditto.
5195 (pass_vsetvl::refine_vsetvls): Ditto.
5196 (pass_vsetvl::cleanup_vsetvls): Ditto.
5197 (pass_vsetvl::commit_vsetvls): Ditto.
5198 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
5199 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
5200 (pass_vsetvl::compute_probabilities): Ditto.
5202 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5204 * config/riscv/t-riscv: Add riscv-vsetvl.def
5206 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
5208 * config/riscv/riscv.opt: Add --param names
5209 riscv-autovec-preference and riscv-autovec-lmul
5211 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
5213 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
5215 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
5217 * tree-core.h (enum omp_clause_defaultmap_kind): Add
5218 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
5219 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
5220 * tree-pretty-print.cc (dump_omp_clause): Likewise.
5222 2023-08-22 Jakub Jelinek <jakub@redhat.com>
5225 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
5226 types aren't supported in C++.
5228 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5230 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
5231 * internal-fn.cc (fold_len_extract_direct): Ditto.
5232 (expand_fold_len_extract_optab_fn): Ditto.
5233 (direct_fold_len_extract_optab_supported_p): Ditto.
5234 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
5235 * optabs.def (OPTAB_D): Ditto.
5237 2023-08-22 Richard Biener <rguenther@suse.de>
5239 * tree-vect-stmts.cc (vectorizable_store): Do not bump
5240 DR_GROUP_STORE_COUNT here. Remove early out.
5241 (vect_transform_stmt): Only call vectorizable_store on
5242 the last element of an interleaving chain.
5244 2023-08-22 Richard Biener <rguenther@suse.de>
5246 PR tree-optimization/94864
5247 PR tree-optimization/94865
5248 PR tree-optimization/93080
5249 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
5250 for vector insertion from vector extraction.
5252 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5253 Kewen.Lin <linkw@linux.ibm.com>
5255 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
5256 (vectorizable_live_operation): Add live vectorization for length loop
5259 2023-08-22 David Malcolm <dmalcolm@redhat.com>
5262 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
5264 2023-08-22 Pan Li <pan2.li@intel.com>
5266 * config/riscv/riscv-vector-builtins-bases.cc
5267 (vfwredusum_frm_obj): New declaration.
5269 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5270 * config/riscv/riscv-vector-builtins-functions.def
5271 (vfwredusum_frm): New intrinsic function def.
5273 2023-08-21 David Faust <david.faust@oracle.com>
5275 * config/bpf/bpf.md (neg): Second operand must be a register.
5277 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
5279 * config/riscv/bitmanip.md: Added bitmanip type to insns
5280 that are missing types.
5282 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
5284 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
5287 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
5289 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
5290 Fix format specifier.
5292 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
5294 * value-range.cc (frange::union_nans): Return false if nothing
5296 (range_tests_floats): New test.
5298 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
5300 PR tree-optimization/111048
5301 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
5303 (fold_vec_perm_cst): Remove workaround and again call
5304 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
5305 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
5307 2023-08-21 Richard Biener <rguenther@suse.de>
5309 PR tree-optimization/111082
5310 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
5311 pun operations that can overflow.
5313 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5315 * lcm.cc (compute_antinout_edge): Export as global use.
5316 (compute_earliest): Ditto.
5317 (compute_rev_insert_delete): Ditto.
5318 * lcm.h (compute_antinout_edge): Ditto.
5319 (compute_earliest): Ditto.
5321 2023-08-21 Richard Biener <rguenther@suse.de>
5323 PR tree-optimization/111070
5324 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
5325 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
5327 2023-08-21 Andrew Pinski <apinski@marvell.com>
5329 PR tree-optimization/111002
5330 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
5332 2023-08-21 liuhongt <hongtao.liu@intel.com>
5334 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
5336 * common/config/i386/i386-common.cc (alias_table): Support
5337 -march=gracemont as an alias of -march=alderlake.
5339 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
5341 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
5342 instead of src in the call to ix86_expand_sse_cmp.
5343 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
5344 force operands[1] to a register.
5345 (<any_extend:insn>v4hiv4si2): Ditto.
5346 (<any_extend:insn>v2siv2di2): Ditto.
5348 2023-08-20 Andrew Pinski <apinski@marvell.com>
5350 PR tree-optimization/111006
5351 PR tree-optimization/110986
5352 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
5354 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
5357 * Makefile.in: improve error message when /usr/include is
5360 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
5362 PR middle-end/111017
5363 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
5364 to expand_omp_build_cond for 'factor != 0' condition, resulting
5365 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
5367 2023-08-19 Guo Jie <guojie@loongson.cn>
5368 Lulu Cheng <chenglulu@loongson.cn>
5370 * config/loongarch/t-loongarch: Add loongarch-driver.h into
5371 TM_H. Add loongarch-def.h and loongarch-tune.h into
5374 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
5377 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
5378 Also handle V2QImode.
5379 (ix86_expand_sse_extend): New function.
5380 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
5381 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
5382 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
5383 (<any_extend:insn>v2hiv2si2): Ditto.
5384 (<any_extend:insn>v2qiv2hi2): Ditto.
5385 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
5386 (<any_extend:insn>v4hiv4si2): Ditto.
5387 (<any_extend:insn>v2siv2di2): Ditto.
5389 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
5392 * value-range.cc (irange::union_bitmask): Return FALSE if updated
5393 bitmask is semantically equivalent to the original mask.
5394 (irange::intersect_bitmask): Same.
5395 (irange::get_bitmask): Add comment.
5397 2023-08-18 Richard Biener <rguenther@suse.de>
5399 PR tree-optimization/111019
5400 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
5401 also scrap base and offset in case the ref is indirect.
5403 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
5405 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
5407 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
5410 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
5412 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
5414 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
5416 (vectorizable_store): ... here.
5418 2023-08-18 Richard Biener <rguenther@suse.de>
5420 PR tree-optimization/111048
5421 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
5424 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
5427 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
5430 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
5432 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
5433 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
5434 and update the final nest accordingly.
5436 2023-08-18 Andrew Pinski <apinski@marvell.com>
5438 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
5439 cond_len_neg and cond_len_one_cmpl.
5441 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
5443 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
5444 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
5445 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
5446 (*local_pic_load_32d<ANYF:mode>): Ditto.
5447 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
5448 (*local_pic_store<ANYF:mode>): Ditto.
5449 (*local_pic_store<ANYLSF:mode>): Ditto.
5450 (*local_pic_store_32d<ANYF:mode>): Ditto.
5451 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
5453 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
5454 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
5456 * config/riscv/predicates.md (vector_const_0_operand): New.
5457 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
5459 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
5461 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
5464 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
5466 PR tree-optimization/111009
5467 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
5469 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
5471 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
5472 slots_num initialization from here ...
5473 (lra_spill): ... to here before the 1st call of
5474 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
5477 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
5480 * doc/invoke.texi (Option Summary): Mention
5481 -Wcompare-distinct-pointer-types under `Warning Options'.
5482 (Warning Options): Document -Wcompare-distinct-pointer-types.
5484 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
5486 * recog.cc (memory_address_addr_space_p): Mark possibly unused
5489 2023-08-17 Richard Biener <rguenther@suse.de>
5491 PR tree-optimization/111039
5492 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
5493 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
5495 2023-08-17 Alex Coplan <alex.coplan@arm.com>
5497 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
5499 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
5502 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
5503 `naked' function attribute.
5504 (bpf_warn_func_return): New function.
5505 (TARGET_WARN_FUNC_RETURN): Define.
5506 (bpf_expand_prologue): Add preventive comment.
5507 (bpf_expand_epilogue): Likewise.
5508 * doc/extend.texi (BPF Function Attributes): Document the `naked'
5511 2023-08-17 Richard Biener <rguenther@suse.de>
5513 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
5514 !needs_fold_left_reduction_p to decide whether we can
5515 handle the reduction with association.
5516 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
5517 reductions perform all arithmetic in an unsigned type.
5519 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
5521 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
5523 * configure: Regenerate.
5525 2023-08-17 Pan Li <pan2.li@intel.com>
5527 * config/riscv/riscv-vector-builtins-bases.cc
5528 (widen_freducop): Add frm_opt_type template arg.
5529 (vfwredosum_frm_obj): New declaration.
5531 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5532 * config/riscv/riscv-vector-builtins-functions.def
5533 (vfwredosum_frm): New intrinsic function def.
5535 2023-08-17 Pan Li <pan2.li@intel.com>
5537 * config/riscv/riscv-vector-builtins-bases.cc
5538 (vfredosum_frm_obj): New declaration.
5540 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5541 * config/riscv/riscv-vector-builtins-functions.def
5542 (vfredosum_frm): New intrinsic function def.
5544 2023-08-17 Pan Li <pan2.li@intel.com>
5546 * config/riscv/riscv-vector-builtins-bases.cc
5547 (class freducop): Add frm_op_type template arg.
5548 (vfredusum_frm_obj): New declaration.
5550 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5551 * config/riscv/riscv-vector-builtins-functions.def
5552 (vfredusum_frm): New intrinsic function def.
5553 * config/riscv/riscv-vector-builtins-shapes.cc
5554 (struct reduc_alu_frm_def): New class for frm shape.
5555 (SHAPE): New declaration.
5556 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
5558 2023-08-17 Pan Li <pan2.li@intel.com>
5560 * config/riscv/riscv-vector-builtins-bases.cc
5561 (class vfncvt_f): Add frm_op_type template arg.
5562 (vfncvt_f_frm_obj): New declaration.
5564 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5565 * config/riscv/riscv-vector-builtins-functions.def
5566 (vfncvt_f_frm): New intrinsic function def.
5568 2023-08-17 Pan Li <pan2.li@intel.com>
5570 * config/riscv/riscv-vector-builtins-bases.cc
5571 (vfncvt_xu_frm_obj): New declaration.
5573 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5574 * config/riscv/riscv-vector-builtins-functions.def
5575 (vfncvt_xu_frm): New intrinsic function def.
5577 2023-08-17 Pan Li <pan2.li@intel.com>
5579 * config/riscv/riscv-vector-builtins-bases.cc
5580 (class vfncvt_x): Add frm_op_type template arg.
5581 (BASE): New declaration.
5582 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5583 * config/riscv/riscv-vector-builtins-functions.def
5584 (vfncvt_x_frm): New intrinsic function def.
5585 * config/riscv/riscv-vector-builtins-shapes.cc
5586 (struct narrow_alu_frm_def): New shape function for frm.
5587 (SHAPE): New declaration.
5588 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
5590 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5592 * config/i386/avx512vldqintrin.h: Remove target attribute.
5593 * config/i386/i386-builtin.def (BDESC):
5594 Add OPTION_MASK_ISA2_AVX10_1.
5595 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
5596 (VFH_AVX512VLDQ_AVX10_1): Ditto.
5597 (VF1_AVX512VLDQ_AVX10_1): Ditto.
5598 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
5599 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5600 (vec_pack<floatprefix>_float_<mode>): Change iterator to
5601 VI8_AVX512VLDQ_AVX10_1. Remove target check.
5602 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
5603 VF1_AVX512VLDQ_AVX10_1. Remove target check.
5604 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
5605 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
5606 (avx512vl_vextractf128<mode>): Change iterator to
5607 VI48F_256_DQVL_AVX10_1. Remove target check.
5608 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
5609 (vec_extract_hi_<mode>): Ditto.
5610 (avx512vl_vinsert<mode>): Ditto.
5611 (vec_set_lo_<mode><mask_name>): Ditto.
5612 (vec_set_hi_<mode><mask_name>): Ditto.
5613 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
5614 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
5615 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
5616 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
5617 * config/i386/subst.md (mask_avx512dq_condition): Add
5619 (mask_scalar_merge): Ditto.
5621 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5623 * config/i386/avx512vldqintrin.h: Remove target attribute.
5624 * config/i386/i386-builtin.def (BDESC):
5625 Add OPTION_MASK_ISA2_AVX10_1.
5626 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
5627 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
5628 (VI48_AVX512VLDQ_AVX10_1): Ditto.
5629 (VF2_AVX512VL): Remove.
5630 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
5632 (*<code><mode>3<mask_name>): Change isa attribute to
5633 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
5634 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
5635 to avx10_1_or_avx512vl.
5636 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
5637 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5638 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
5640 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
5641 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
5642 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
5644 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
5645 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5646 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
5647 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5648 (float<floatunssuffix>v4div4sf2<mask_name>):
5650 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5651 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
5652 (float<floatunssuffix>v2div2sf2): Ditto.
5653 (float<floatunssuffix>v2div2sf2_mask): Ditto.
5654 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
5655 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
5656 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
5657 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
5658 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
5659 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
5660 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
5661 Change when constraint is enabled.
5663 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5666 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
5667 (second_sew_less_than_first_sew_p): Fix bug.
5668 (first_sew_less_than_second_sew_p): Ditto.
5670 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5672 * config/i386/avx512vldqintrin.h: Remove target attribute.
5673 * config/i386/i386-builtin.def (BDESC):
5674 Add OPTION_MASK_ISA2_AVX10_1.
5675 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
5676 * config/i386/i386-expand.cc
5677 (ix86_check_builtin_isa_match): Ditto.
5678 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
5679 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
5680 and avx10_1_or_avx512vl.
5681 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
5682 (VF1_128_256VLDQ_AVX10_1): Ditto.
5683 (VI8_AVX512VLDQ_AVX10_1): Ditto.
5684 (<sse>_andnot<mode>3<mask_name>):
5685 Add TARGET_AVX10_1 and change isa attr from avx512dq to
5686 avx10_1_or_avx512dq.
5687 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
5688 avx512vl to avx10_1_or_avx512vl.
5689 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
5690 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
5691 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5693 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
5695 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
5696 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
5697 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
5699 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
5700 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
5701 Remove target check.
5702 (avx512dq_mul<mode>3<mask_name>): Ditto.
5703 (*avx512dq_mul<mode>3<mask_name>): Ditto.
5704 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5705 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
5706 Remove target check.
5707 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
5708 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
5709 Remove target check.
5710 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
5711 (mask_avx512vl_condition): Ditto.
5714 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5716 * common/config/i386/i386-common.cc
5717 (ix86_check_avx10_vector_width): New function to check isa_flags
5718 to emit a warning when there is a conflict in AVX10 options for
5720 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
5721 * config/i386/driver-i386.cc (host_detect_local_cpu):
5722 Do not append -mno-avx10-max-512bit for -march=native.
5724 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5726 * common/config/i386/i386-common.cc
5727 (ix86_check_avx10): New function to check isa_flags and
5728 isa_flags_explicit to emit warning when AVX10 is enabled
5730 (ix86_check_avx512): New function to check isa_flags and
5731 isa_flags_explicit to emit warning when AVX512 is enabled
5733 (ix86_handle_option): Do not change the flags when warning
5735 * config/i386/driver-i386.cc (host_detect_local_cpu):
5736 Do not append -mno-avx10.1 for -march=native.
5738 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
5740 * common/config/i386/cpuinfo.h (get_available_features):
5741 Add avx10_set and version and detect avx10.1.
5742 (cpu_indicator_init): Handle avx10.1-512.
5743 * common/config/i386/i386-common.cc
5744 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
5745 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
5746 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
5747 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
5748 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
5749 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
5751 * common/config/i386/i386-cpuinfo.h (enum processor_features):
5752 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
5753 FEATURE_AVX10_512BIT.
5754 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
5755 AVX10_512BIT, AVX10_1 and AVX10_1_512.
5756 * config/i386/constraints.md (Yk): Add AVX10_1.
5759 * config/i386/cpuid.h (bit_AVX10): New.
5760 (bit_AVX10_256): Ditto.
5761 (bit_AVX10_512): Ditto.
5762 * config/i386/i386-c.cc (ix86_target_macros_internal):
5763 Define AVX10_512BIT and AVX10_1.
5764 * config/i386/i386-isa.def
5765 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
5766 (AVX10_1): Add DEF_PTA(AVX10_1).
5767 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
5768 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
5770 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
5771 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
5772 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
5773 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
5774 (ix86_conditional_register_usage): Ditto.
5775 (ix86_hard_regno_mode_ok): Ditto.
5776 (ix86_rtx_costs): Ditto.
5777 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
5778 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
5780 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
5781 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
5782 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
5785 2023-08-17 Sergei Trofimovich <siarheit@google.com>
5787 * flag-types.h (vrp_mode): Remove unused.
5789 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
5791 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
5794 2023-08-17 Andrew Pinski <apinski@marvell.com>
5796 * internal-fn.def (COND_NOT): New internal function.
5797 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
5799 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
5800 into conditional not.
5801 * optabs.def (cond_one_cmpl): New optab.
5802 (cond_len_one_cmpl): Likewise.
5804 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
5806 PR rtl-optimization/110254
5807 * ira-color.cc (improve_allocation): Update array
5808 allocated_hard_reg_p.
5810 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
5812 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
5813 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
5814 (lra_update_fp2sp_elimination): Ditto.
5815 (update_reg_eliminate): Adjust spill_pseudos call.
5816 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
5817 in lra_update_fp2sp_elimination.
5819 2023-08-16 Richard Ball <richard.ball@arm.com>
5821 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
5822 * config/aarch64/aarch64-tune.md: Regenerate.
5823 * doc/invoke.texi: Document Cortex-A720 CPU.
5825 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
5827 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
5829 (<u>avg<v_double_trunc>3_ceil): Ditto.
5830 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
5833 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
5835 * internal-fn.cc (vec_extract_direct): Change type argument
5837 (expand_vec_extract_optab_fn): Call convert_optab_fn.
5838 (direct_vec_extract_optab_supported_p): Use
5839 convert_optab_supported_p.
5841 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
5842 Richard Sandiford <richard.sandiford@arm.com>
5844 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
5845 (valid_mask_for_fold_vec_perm_cst_p): New function.
5846 (fold_vec_perm_cst): Likewise.
5847 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
5848 (test_fold_vec_perm_cst): New namespace.
5849 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
5850 (test_fold_vec_perm_cst::validate_res): Likewise.
5851 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
5852 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
5853 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
5854 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
5855 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
5856 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
5857 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
5858 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
5859 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
5860 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
5861 (test_fold_vec_perm_cst::test): Likewise.
5862 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
5864 2023-08-16 Pan Li <pan2.li@intel.com>
5866 * config/riscv/riscv-vector-builtins-bases.cc
5867 (BASE): New declaration.
5868 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5869 * config/riscv/riscv-vector-builtins-functions.def
5870 (vfwcvt_xu_frm): New intrinsic function def.
5872 2023-08-16 Pan Li <pan2.li@intel.com>
5874 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
5876 2023-08-16 Pan Li <pan2.li@intel.com>
5878 * config/riscv/riscv-vector-builtins-bases.cc
5879 (BASE): New declaration.
5880 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5881 * config/riscv/riscv-vector-builtins-functions.def
5882 (vfwcvt_x_frm): New intrinsic function def.
5884 2023-08-16 Pan Li <pan2.li@intel.com>
5886 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
5887 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5888 * config/riscv/riscv-vector-builtins-functions.def
5889 (vfcvt_f_frm): New intrinsic function def.
5891 2023-08-16 Pan Li <pan2.li@intel.com>
5893 * config/riscv/riscv-vector-builtins-bases.cc
5894 (BASE): New declaration.
5895 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5896 * config/riscv/riscv-vector-builtins-functions.def
5897 (vfcvt_xu_frm): New intrinsic function def..
5899 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
5902 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
5903 extract when the element is 7 on BE while 8 on LE for byte or 3 on
5904 BE while 4 on LE for halfword.
5906 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
5909 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
5911 (vsx_extract_v4si): New expand for V4SI extraction.
5912 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
5913 word 1 from BE order.
5914 (*mfvsrwz): New insn pattern for mfvsrwz.
5915 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
5916 word 1 from BE order.
5917 (*vsx_extract_si): Remove.
5918 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
5921 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5923 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
5925 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
5926 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
5927 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
5928 (expand_lanes_load_store): New function.
5929 * config/riscv/vector-iterators.md: New iterator.
5931 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5933 * internal-fn.cc (internal_load_fn_p): Apply
5934 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
5935 (internal_store_fn_p): Ditto.
5936 (internal_fn_len_index): Ditto.
5937 (internal_fn_mask_index): Ditto.
5938 (internal_fn_stored_value_index): Ditto.
5939 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
5940 (vect_load_lanes_supported): Ditto.
5941 * tree-vect-loop.cc: Ditto.
5942 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
5943 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
5944 (get_group_load_store_type): Ditto.
5945 (vectorizable_store): Ditto.
5946 (vectorizable_load): Ditto.
5947 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
5948 (vect_load_lanes_supported): Ditto.
5950 2023-08-16 Pan Li <pan2.li@intel.com>
5952 * config/riscv/riscv-vector-builtins-bases.cc
5953 (enum frm_op_type): New type for frm.
5954 (BASE): New declaration.
5955 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
5956 * config/riscv/riscv-vector-builtins-functions.def
5957 (vfcvt_x_frm): New intrinsic function def.
5959 2023-08-16 liuhongt <hongtao.liu@intel.com>
5961 * config/i386/i386-builtins.cc
5962 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
5963 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
5964 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
5965 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
5966 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
5967 for use_scatter_8parts
5968 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
5969 (TARGET_USE_GATHER_8PARTS): .. this.
5970 (TARGET_USE_SCATTER): Rename to ..
5971 (TARGET_USE_SCATTER_8PARTS): .. this.
5972 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
5973 (X86_TUNE_USE_GATHER_8PARTS): .. this.
5974 (X86_TUNE_USE_SCATTER): Rename to
5975 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
5976 * config/i386/i386.opt: Add new options mgather, mscatter.
5978 2023-08-16 liuhongt <hongtao.liu@intel.com>
5980 * config/i386/i386-options.cc (m_GDS): New macro.
5981 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
5983 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
5984 (X86_TUNE_USE_GATHER): Ditto.
5986 2023-08-16 liuhongt <hongtao.liu@intel.com>
5988 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
5989 vmovsd when moving DFmode between SSE_REGS.
5990 (movhi_internal): Generate vmovdqa instead of vmovsh when
5991 moving HImode between SSE_REGS.
5992 (mov<mode>_internal): Use vmovaps instead of vmovsh when
5993 moving HF/BFmode between SSE_REGS.
5995 2023-08-15 David Faust <david.faust@oracle.com>
5997 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
5999 2023-08-15 David Faust <david.faust@oracle.com>
6002 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
6003 for any mode 32-bits or smaller, not just SImode.
6005 2023-08-15 Martin Jambor <mjambor@suse.cz>
6009 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
6010 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
6011 (ipcp_transform_function): Do not deallocate transformation info.
6012 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
6014 (vn_reference_lookup_2): When hitting default-def vuse, query
6015 IPA-CP transformation info for any known constants.
6017 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
6018 Thomas Schwinge <thomas@codesourcery.com>
6020 * gimplify.cc (oacc_region_type_name): New function.
6021 (oacc_default_clause): If no 'default' clause appears on this
6022 compute construct, see if one appears on a lexically containing
6024 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
6025 ctx->oacc_default_clause_ctx to current context.
6027 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6030 * config/riscv/predicates.md: Fix predicate.
6032 2023-08-15 Richard Biener <rguenther@suse.de>
6034 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
6035 slp_inst_kind_ctor handling.
6036 (vect_analyze_slp): Simplify.
6037 (vect_build_slp_instance): Dump when we analyze a CTOR.
6038 (vect_slp_check_for_constructors): Rename to ...
6039 (vect_slp_check_for_roots): ... this. Register a
6040 slp_root for CONSTRUCTORs instead of shoving them to
6041 the set of grouped stores.
6042 (vect_slp_analyze_bb_1): Adjust.
6044 2023-08-15 Richard Biener <rguenther@suse.de>
6046 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
6048 (_slp_instance::remain_defs): ... this.
6049 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
6050 (SLP_INSTANCE_REMAIN_DEFS): ... this.
6051 (slp_root::remain): New.
6052 (slp_root::slp_root): Adjust.
6053 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
6054 (vect_build_slp_instance): Get extra remain parameter,
6055 adjust former handling of a cut off stmt.
6056 (vect_analyze_slp_instance): Adjust.
6057 (vect_analyze_slp): Likewise.
6058 (_bb_vec_info::~_bb_vec_info): Likewise.
6059 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
6060 (vect_slp_check_for_constructors): Handle non-internal
6061 defs as remain defs of a reduction.
6062 (vectorize_slp_instance_root_stmt): Adjust.
6064 2023-08-15 Richard Biener <rguenther@suse.de>
6066 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
6067 (canonicalize_loop_induction_variables): Use find_loop_location.
6069 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
6072 * config/cris/cris-protos.h: Revert recent change.
6073 * config/cris/cris.cc (cris_legitimate_address_p): Remove
6074 code_helper unused parameter.
6075 (cris_legitimate_address_p_hook): New wrapper function.
6076 (TARGET_LEGITIMATE_ADDRESS_P): Change to
6077 cris_legitimate_address_p_hook.
6079 2023-08-15 Richard Biener <rguenther@suse.de>
6081 PR tree-optimization/110963
6082 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
6083 a PHI node when the expression is available on all edges
6084 and we insert at most one copy from a constant.
6086 2023-08-15 Richard Biener <rguenther@suse.de>
6088 PR tree-optimization/110991
6089 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
6090 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
6091 that will end up constant.
6093 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
6096 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
6098 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
6100 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
6101 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
6102 and update the final nest accordingly.
6104 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
6106 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
6109 2023-08-15 Pan Li <pan2.li@intel.com>
6111 * mode-switching.cc (create_pre_exit): Add SET insn check.
6113 2023-08-15 Pan Li <pan2.li@intel.com>
6115 * config/riscv/riscv-vector-builtins-bases.cc
6116 (class vfrec7_frm): New class for frm.
6117 (vfrec7_frm_obj): New declaration.
6119 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6120 * config/riscv/riscv-vector-builtins-functions.def
6121 (vfrec7_frm): New intrinsic function definition.
6122 * config/riscv/vector-iterators.md
6123 (VFMISC): Remove VFREC7.
6125 (float_insn_type): Ditto.
6126 (VFMISC_FRM): New int iterator.
6127 (misc_frm_op): New op for frm.
6128 (float_frm_insn_type): New type for frm.
6129 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
6130 New pattern for misc frm.
6132 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
6134 * lra-constraints.cc (curr_insn_transform): Process output stack
6135 pointer reloads before emitting reload insns.
6137 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
6140 * doc/invoke.texi: Add documentation of
6141 fanalyzer-show-events-in-system-headers
6143 2023-08-14 Jan Hubicka <jh@suse.cz>
6145 PR gcov-profile/110988
6146 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
6148 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
6150 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
6151 Enable compressed builtins when ZC* extensions enabled.
6152 * config/riscv/riscv-shorten-memrefs.cc:
6153 Enable shorten_memrefs pass when ZC* extensions enabled.
6154 * config/riscv/riscv.cc (riscv_compressed_reg_p):
6155 Enable compressible registers when ZC* extensions enabled.
6156 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
6157 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
6158 (riscv_first_stack_step): Allow compression of the register saves
6159 without adding extra instructions.
6160 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
6161 to 16 bits when ZC* extensions enabled.
6163 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
6165 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
6166 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
6173 (TARGET_ZCA): New target.
6174 (TARGET_ZCB): Ditto.
6175 (TARGET_ZCE): Ditto.
6176 (TARGET_ZCF): Ditto.
6177 (TARGET_ZCD): Ditto.
6178 (TARGET_ZCMP): Ditto.
6179 (TARGET_ZCMT): Ditto.
6180 * config/riscv/riscv.opt: New target variable.
6182 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6185 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
6187 * genrecog.cc (print_nonbool_test): Fix type error of
6188 switch (SUBREG_BYTE (op))'.
6190 2023-08-14 Richard Biener <rguenther@suse.de>
6192 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
6194 2023-08-14 Pan Li <pan2.li@intel.com>
6196 * config/riscv/riscv-vector-builtins-bases.cc
6197 (class unop_frm): New class for frm.
6198 (vfsqrt_frm_obj): New declaration.
6200 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6201 * config/riscv/riscv-vector-builtins-functions.def
6202 (vfsqrt_frm): New intrinsic function definition.
6204 2023-08-14 Pan Li <pan2.li@intel.com>
6206 * config/riscv/riscv-vector-builtins-bases.cc
6207 (class vfwnmsac_frm): New class for frm.
6208 (vfwnmsac_frm_obj): New declaration.
6210 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6211 * config/riscv/riscv-vector-builtins-functions.def
6212 (vfwnmsac_frm): New intrinsic function definition.
6214 2023-08-14 Pan Li <pan2.li@intel.com>
6216 * config/riscv/riscv-vector-builtins-bases.cc
6217 (class vfwmsac_frm): New class for frm.
6218 (vfwmsac_frm_obj): New declaration.
6220 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6221 * config/riscv/riscv-vector-builtins-functions.def
6222 (vfwmsac_frm): New intrinsic function definition.
6224 2023-08-14 Pan Li <pan2.li@intel.com>
6226 * config/riscv/riscv-vector-builtins-bases.cc
6227 (class vfwnmacc_frm): New class for frm.
6228 (vfwnmacc_frm_obj): New declaration.
6230 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6231 * config/riscv/riscv-vector-builtins-functions.def
6232 (vfwnmacc_frm): New intrinsic function definition.
6234 2023-08-14 Cui, Lili <lili.cui@intel.com>
6236 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
6239 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6241 * config/mmix/predicates.md (mmix_address_operand): Use
6242 lra_in_progress, not reload_in_progress.
6244 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6246 * config/mmix/mmix.cc: Re-enable LRA.
6248 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6250 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
6251 when lra_in_progress.
6253 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
6255 * config/mmix/mmix.cc: Disable LRA for MMIX.
6257 2023-08-14 Pan Li <pan2.li@intel.com>
6259 * config/riscv/riscv-vector-builtins-bases.cc
6260 (class vfwmacc_frm): New class for vfwmacc frm.
6261 (vfwmacc_frm_obj): New declaration.
6263 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6264 * config/riscv/riscv-vector-builtins-functions.def
6265 (vfwmacc_frm): Function definition for vfwmacc.
6266 * config/riscv/riscv-vector-builtins.cc
6267 (function_expander::use_widen_ternop_insn): Add frm support.
6269 2023-08-14 Pan Li <pan2.li@intel.com>
6271 * config/riscv/riscv-vector-builtins-bases.cc
6272 (class vfnmsub_frm): New class for vfnmsub frm.
6273 (vfnmsub_frm): New declaration.
6275 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6276 * config/riscv/riscv-vector-builtins-functions.def
6277 (vfnmsub_frm): New function declaration.
6279 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
6281 * lra-constraints.cc (curr_insn_transform): Set done_p up and
6282 check it on true after processing output stack pointer reload.
6284 2023-08-12 Jakub Jelinek <jakub@redhat.com>
6286 * Makefile.in (USER_H): Add stdckdint.h.
6287 * ginclude/stdckdint.h: New file.
6289 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6292 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
6294 2023-08-12 Patrick Palka <ppalka@redhat.com>
6296 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
6297 Delimit output with braces.
6299 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6302 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
6304 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6306 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
6307 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
6308 * config/riscv/vector.md: Ditto.
6310 2023-08-11 David Malcolm <dmalcolm@redhat.com>
6313 * doc/analyzer.texi (__analyzer_get_strlen): New.
6314 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
6316 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
6318 * config/rx/rx.md (subdi3): Fix test for borrow.
6320 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6322 PR middle-end/110989
6323 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
6324 (vectorizable_load): Ditto.
6326 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
6328 * config/bpf/bpf.md (allocate_stack): Define.
6329 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
6330 stack pointer register.
6331 (FIXED_REGISTERS): Adjust accordingly.
6332 (CALL_USED_REGISTERS): Likewise.
6333 (REG_CLASS_CONTENTS): Likewise.
6334 (REGISTER_NAMES): Likewise.
6335 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
6336 space for callee-saved registers.
6337 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
6338 (bpf_expand_epilogue): Do not restore callee-saved registers in
6341 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
6343 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
6344 about too many arguments if function is always inlined.
6346 2023-08-11 Patrick Palka <ppalka@redhat.com>
6348 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
6349 Don't call component_ref_field_offset if the RHS isn't a decl.
6351 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
6354 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
6356 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
6358 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
6359 (process_alt_operands): Set the flag.
6360 (curr_insn_transform): Modify stack pointer offsets if output
6361 stack pointer reload is generated.
6363 2023-08-11 Joseph Myers <joseph@codesourcery.com>
6365 * configure: Regenerate.
6367 2023-08-11 Richard Biener <rguenther@suse.de>
6369 PR tree-optimization/110979
6370 * tree-vect-loop.cc (vectorizable_reduction): For
6371 FOLD_LEFT_REDUCTION without target support make sure
6372 we don't need to honor signed zeros and sign dependent rounding.
6374 2023-08-11 Richard Biener <rguenther@suse.de>
6376 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
6377 subgraph entries. Dump the used vector size based on the
6378 SLP subgraph entry root vector type.
6380 2023-08-11 Pan Li <pan2.li@intel.com>
6382 * config/riscv/riscv-vector-builtins-bases.cc
6383 (class vfmsub_frm): New class for vfmsub frm.
6384 (vfmsub_frm): New declaration.
6386 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6387 * config/riscv/riscv-vector-builtins-functions.def
6388 (vfmsub_frm): New function declaration.
6390 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6392 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
6393 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
6394 (expand_partial_store_optab_fn): Ditto.
6395 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
6396 (MASK_LEN_STORE_LANES): Ditto.
6397 * optabs.def (OPTAB_CD): Ditto.
6399 2023-08-11 Pan Li <pan2.li@intel.com>
6401 * config/riscv/riscv-vector-builtins-bases.cc
6402 (class vfnmadd_frm): New class for vfnmadd frm.
6403 (vfnmadd_frm): New declaration.
6405 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6406 * config/riscv/riscv-vector-builtins-functions.def
6407 (vfnmadd_frm): New function declaration.
6409 2023-08-11 Drew Ross <drross@redhat.com>
6410 Jakub Jelinek <jakub@redhat.com>
6412 PR tree-optimization/109938
6413 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
6415 2023-08-11 Pan Li <pan2.li@intel.com>
6417 * config/riscv/riscv-vector-builtins-bases.cc
6418 (class vfmadd_frm): New class for vfmadd frm.
6419 (vfmadd_frm_obj): New declaration.
6421 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6422 * config/riscv/riscv-vector-builtins-functions.def
6423 (vfmadd_frm): New function definition.
6425 2023-08-11 Pan Li <pan2.li@intel.com>
6427 * config/riscv/riscv-vector-builtins-bases.cc
6428 (class vfnmsac_frm): New class for vfnmsac frm.
6429 (vfnmsac_frm_obj): New declaration.
6431 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6432 * config/riscv/riscv-vector-builtins-functions.def
6433 (vfnmsac_frm): New function definition.
6435 2023-08-11 Jakub Jelinek <jakub@redhat.com>
6437 * doc/extend.texi (Typeof): Document typeof_unqual
6438 and __typeof_unqual__.
6440 2023-08-11 Andrew Pinski <apinski@marvell.com>
6442 PR tree-optimization/110954
6443 * generic-match-head.cc (bitwise_inverted_equal_p): Add
6444 wascmp argument and set it accordingly.
6445 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
6446 wascmp argument to the macro.
6447 (gimple_bitwise_inverted_equal_p): Add
6448 wascmp argument and set it accordingly.
6449 * match.pd (`a & ~a`, `a ^| ~a`): Update call
6450 to bitwise_inverted_equal_p and handle wascmp case.
6451 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
6452 call to bitwise_inverted_equal_p and check to see
6453 if was !wascmp or if precision was 1.
6455 2023-08-11 Martin Uecker <uecker@tugraz.at>
6458 * doc/invoke.texi: Update.
6460 2023-08-11 Pan Li <pan2.li@intel.com>
6462 * config/riscv/riscv-vector-builtins-bases.cc
6463 (class vfmsac_frm): New class for vfmsac frm.
6464 (vfmsac_frm_obj): New declaration.
6466 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6467 * config/riscv/riscv-vector-builtins-functions.def
6468 (vfmsac_frm): New function definition
6470 2023-08-10 Jan Hubicka <jh@suse.cz>
6472 PR middle-end/110923
6473 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
6475 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
6477 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
6478 dependent on 'a' extension.
6479 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
6480 (TARGET_ZTSO): New target.
6481 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
6483 (riscv_memmodel_needs_amo_release): Add Ztso case.
6484 (riscv_print_operand): Add Ztso case for LR/SC annotations.
6485 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
6486 * config/riscv/riscv.opt: Add Ztso target variable.
6487 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
6489 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
6490 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
6491 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
6492 specific load/store/fence mappings.
6493 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
6494 specific load/store/fence mappings.
6496 2023-08-10 Jan Hubicka <jh@suse.cz>
6498 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
6501 2023-08-10 Jan Hubicka <jh@suse.cz>
6503 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
6505 2023-08-10 Jan Hubicka <jh@suse.cz>
6507 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
6508 handling of undefined values.
6510 2023-08-10 Jakub Jelinek <jakub@redhat.com>
6513 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
6514 return virtual phis and return NULL if there is a virtual phi
6515 where the arguments from E0 and E1 edges aren't equal.
6517 2023-08-10 Richard Biener <rguenther@suse.de>
6519 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
6520 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
6522 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6525 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
6527 2023-08-10 Pan Li <pan2.li@intel.com>
6529 * config/riscv/riscv-vector-builtins-bases.cc
6530 (class vfnmacc_frm): New class for vfnmacc.
6531 (vfnmacc_frm_obj): New declaration.
6533 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6534 * config/riscv/riscv-vector-builtins-functions.def
6535 (vfnmacc_frm): New function definition.
6537 2023-08-10 Pan Li <pan2.li@intel.com>
6539 * config/riscv/riscv-vector-builtins-bases.cc
6540 (class vfmacc_frm): New class for vfmacc frm.
6541 (vfmacc_frm_obj): New declaration.
6543 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
6544 * config/riscv/riscv-vector-builtins-functions.def
6545 (vfmacc_frm): New function definition.
6547 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6550 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
6552 2023-08-10 Richard Biener <rguenther@suse.de>
6554 * tree-vectorizer.h (vectorizable_live_operation): Remove
6555 gimple_stmt_iterator * argument.
6556 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
6557 Adjust plumbing around vect_get_loop_mask.
6558 (vect_analyze_loop_operations): Adjust.
6559 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
6560 (vect_bb_slp_mark_live_stmts): Likewise.
6561 (vect_schedule_slp_node): Likewise.
6562 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
6563 Remove gimple_stmt_iterator * argument.
6564 (vect_transform_stmt): Adjust.
6566 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6568 * config/riscv/vector-iterators.md: Add missing modes.
6570 2023-08-10 Jakub Jelinek <jakub@redhat.com>
6573 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
6574 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
6576 2023-08-10 Jakub Jelinek <jakub@redhat.com>
6579 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
6580 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
6583 2023-08-10 liuhongt <hongtao.liu@intel.com>
6586 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
6587 sanitize upper part of V4HFmode register with
6589 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
6591 (<insn>v2hf3): Ditto.
6593 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
6594 register with -fno-trapping-math.
6596 2023-08-10 Pan Li <pan2.li@intel.com>
6597 Kito Cheng <kito.cheng@sifive.com>
6599 * config/riscv/riscv-protos.h
6600 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
6601 (get_frm_mode): New declaration.
6602 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
6603 * config/riscv/riscv-vector-builtins.cc
6604 (function_expander::use_ternop_insn): Take care of frm reg.
6605 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
6606 (riscv_emit_frm_mode_set): Ditto.
6607 (riscv_emit_mode_set): Ditto.
6608 (riscv_frm_adjust_mode_after_call): Ditto.
6609 (riscv_frm_mode_needed): Ditto.
6610 (riscv_frm_mode_after): Ditto.
6611 (riscv_mode_entry): Ditto.
6612 (riscv_mode_exit): Ditto.
6613 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
6614 * config/riscv/vector.md
6615 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
6616 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
6618 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6620 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
6621 incorrect anticipate info.
6623 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
6625 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
6626 Remove 'Zve32d' from the version list.
6628 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
6630 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
6631 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
6632 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
6633 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
6635 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
6637 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
6638 (mem_shadd_or_shadd_rtx_p): New function.
6640 2023-08-09 Andrew Pinski <apinski@marvell.com>
6642 PR tree-optimization/110937
6643 PR tree-optimization/100798
6644 * match.pd (`a ? ~b : b`): Handle this
6647 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
6649 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
6651 2023-08-09 Richard Ball <richard.ball@arm.com>
6653 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
6654 * config/aarch64/aarch64-tune.md: Regenerate.
6655 * doc/invoke.texi: Document Cortex-A520 CPU.
6657 2023-08-09 Carl Love <cel@us.ibm.com>
6659 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
6660 Move definitions to Altivec stanza.
6661 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
6664 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6667 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
6668 stepped vector support.
6670 2023-08-09 liuhongt <hongtao.liu@intel.com>
6672 * common/config/i386/cpuinfo.h (get_available_features):
6673 Rename local variable subleaf_level to max_subleaf_level.
6675 2023-08-09 Richard Biener <rguenther@suse.de>
6677 PR rtl-optimization/110587
6678 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
6680 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
6682 PR tree-optimization/110248
6683 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
6684 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
6685 legitimate when outer code is PLUS.
6687 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
6689 PR tree-optimization/110248
6690 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
6691 type code_helper and pass it to targetm.addr_space.legitimate_address_p
6692 instead of ERROR_MARK.
6693 (offsettable_address_addr_space_p): Update one function pointer with
6694 one more argument of type code_helper as its assignees
6695 memory_address_addr_space_p and strict_memory_address_addr_space_p
6696 have been adjusted, and adjust some call sites with ERROR_MARK.
6697 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
6698 (memory_address_addr_space_p): Adjust with one more unnamed argument
6699 of type code_helper with default ERROR_MARK.
6700 (strict_memory_address_addr_space_p): Likewise.
6701 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
6702 argument of type code_helper.
6703 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
6704 type code_helper and pass it to memory_address_addr_space_p.
6705 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
6706 one more unnamed argument of type code_helper with default value
6708 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
6709 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
6710 pass it to all valid_mem_ref_p calls.
6712 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
6714 PR tree-optimization/110248
6715 * coretypes.h (class code_helper): Add forward declaration.
6716 * doc/tm.texi: Regenerate.
6717 * lra-constraints.cc (valid_address_p): Call target hook
6718 targetm.addr_space.legitimate_address_p with an extra parameter
6719 ERROR_MARK as its prototype changes.
6720 * recog.cc (memory_address_addr_space_p): Likewise.
6721 * reload.cc (strict_memory_address_addr_space_p): Likewise.
6722 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
6723 Extend with one more argument of type code_helper, update the
6724 documentation accordingly.
6725 * targhooks.cc (default_legitimate_address_p): Adjust for the
6726 new code_helper argument.
6727 (default_addr_space_legitimate_address_p): Likewise.
6728 * targhooks.h (default_legitimate_address_p): Likewise.
6729 (default_addr_space_legitimate_address_p): Likewise.
6730 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
6731 with extra unnamed code_helper argument with default ERROR_MARK.
6732 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
6733 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
6734 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
6735 (tree.h): New include for tree_code ERROR_MARK.
6736 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
6737 unnamed code_helper argument with default ERROR_MARK.
6738 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
6739 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
6740 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
6741 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
6742 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
6743 (tree.h): New include for tree_code ERROR_MARK.
6744 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
6745 unnamed code_helper argument with default ERROR_MARK.
6746 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
6747 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
6749 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
6750 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
6751 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
6752 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
6753 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
6754 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
6755 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
6756 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
6757 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
6759 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
6760 (m32c_addr_space_legitimate_address_p): Likewise.
6761 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
6762 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
6763 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
6764 * config/microblaze/microblaze-protos.h (tree.h): New include for
6765 tree_code ERROR_MARK.
6766 (microblaze_legitimate_address_p): Adjust with extra unnamed
6767 code_helper argument with default ERROR_MARK.
6768 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
6770 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
6771 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
6772 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
6773 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
6774 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
6775 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
6776 argument with default ERROR_MARK and adjust the call to function
6777 msp430_legitimate_address_p.
6778 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
6779 unnamed code_helper argument with default ERROR_MARK.
6780 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
6781 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
6782 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
6783 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
6784 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
6785 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
6786 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
6787 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
6788 (tree.h): New include for tree_code ERROR_MARK.
6789 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
6790 extra unnamed code_helper argument with default ERROR_MARK.
6791 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
6792 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
6793 argument and adjust the call to function rs6000_legitimate_address_p.
6794 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
6795 unnamed code_helper argument with default ERROR_MARK.
6796 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
6797 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
6798 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
6799 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
6800 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
6801 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
6802 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
6803 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
6805 (tree.h): New include for tree_code ERROR_MARK.
6806 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
6807 Adjust with extra unnamed code_helper argument with default
6810 2023-08-09 liuhongt <hongtao.liu@intel.com>
6812 * common/config/i386/cpuinfo.h (get_available_features): Check
6813 EAX for valid subleaf before use CPUID.
6815 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
6817 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
6818 for the temporary when canonicalizing the condition.
6820 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
6822 * config/bpf/core-builtins.cc: Cleaned include headers.
6823 (struct cr_builtins): Added GTY.
6824 (cr_builtins_ref): Created.
6825 (builtins_data) Changed to GC root.
6826 (allocate_builtin_data): Changed.
6827 Included gt-core-builtins.h.
6828 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
6829 (bpf_core_extra_ref): Created.
6830 (bpf_comment_info): Changed to GC root.
6831 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
6833 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
6836 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
6837 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
6838 upper part of V2SFmode register with -fno-trapping-math.
6839 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
6841 (<smaxmin:code>v2sf3): Ditto.
6843 (*mmx_haddv2sf3_low): Ditto.
6844 (*mmx_hsubv2sf3_low): Ditto.
6845 (vec_addsubv2sf3): Ditto.
6846 (vec_cmpv2sfv2si): Ditto.
6847 (vcond<V2FI:mode>v2sf): Ditto.
6852 (fix_truncv2sfv2si2): Ditto.
6853 (fixuns_truncv2sfv2si2): Ditto.
6854 (floatv2siv2sf2): Ditto.
6855 (floatunsv2siv2sf2): Ditto.
6856 (nearbyintv2sf2): Ditto.
6858 (lrintv2sfv2si2): Ditto.
6860 (lceilv2sfv2si2): Ditto.
6861 (floorv2sf2): Ditto.
6862 (lfloorv2sfv2si2): Ditto.
6863 (btruncv2sf2): Ditto.
6864 (roundv2sf2): Ditto.
6865 (lroundv2sfv2si2): Ditto.
6866 * doc/invoke.texi (x86 Options): Document
6867 -mpartial-vector-fp-math option.
6869 2023-08-08 Andrew Pinski <apinski@marvell.com>
6871 PR tree-optimization/103281
6872 PR tree-optimization/28794
6873 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
6875 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
6876 (simplify_using_ranges::simplify_casted_cond): Rename to ...
6877 (simplify_using_ranges::simplify_casted_compare): This
6878 and change arguments to take op0 and op1.
6879 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
6880 (simplify_using_ranges::simplify): For tcc_comparison assignments call
6881 simplify_compare_assign_using_ranges_1.
6882 * vr-values.h (simplify_using_ranges): Add
6883 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
6884 Rename simplify_casted_cond and simplify_casted_compare and
6885 update argument types.
6887 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
6889 * genmatch.cc: Log line numbers indirectly.
6891 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
6893 * genmatch.cc: Make sinfo map ordered.
6894 * Makefile.in: Require the ordered map header for genmatch.o.
6896 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
6898 * ordered-hash-map.h: Add get_or_insert.
6899 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
6901 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6903 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
6904 (cond_len_<optab><mode>): Ditto.
6905 (cond_fma<mode>): Ditto.
6906 (cond_len_fma<mode>): Ditto.
6907 (cond_fnma<mode>): Ditto.
6908 (cond_len_fnma<mode>): Ditto.
6909 (cond_fms<mode>): Ditto.
6910 (cond_len_fms<mode>): Ditto.
6911 (cond_fnms<mode>): Ditto.
6912 (cond_len_fnms<mode>): Ditto.
6913 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
6915 (enum insn_type): Add new enum type.
6916 (prepare_ternary_operands): New function.
6917 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
6918 (emit_nonvlmax_tumu_insn): Ditto.
6919 (emit_nonvlmax_fp_tumu_insn): Ditto.
6920 (expand_cond_len_binop): Add condtional operations.
6921 (expand_cond_len_ternop): Ditto.
6922 (prepare_ternary_operands): New function.
6923 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
6924 riscv_get_v_regno_alignment as global scope.
6925 * config/riscv/vector.md: Fix ternary bugs.
6927 2023-08-08 Richard Biener <rguenther@suse.de>
6929 PR tree-optimization/49955
6930 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
6931 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
6932 * tree-vect-slp.cc (vect_free_slp_instance): Release
6933 SLP_INSTANCE_REMAIN_STMTS.
6934 (vect_build_slp_instance): Make the number of lanes of
6935 a BB reduction even.
6936 (vectorize_slp_instance_root_stmt): Handle unvectorized
6937 defs of a BB reduction.
6939 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
6941 * internal-fn.cc (get_len_internal_fn): New function.
6942 (DEF_INTERNAL_COND_FN): Ditto.
6943 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
6944 * internal-fn.h (get_len_internal_fn): Ditto.
6945 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
6947 2023-08-08 Richard Biener <rguenther@suse.de>
6949 PR tree-optimization/110924
6950 * tree-ssa-live.h (virtual_operand_live): Update comment.
6951 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
6952 optimization, look at each predecessor.
6953 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
6955 2023-08-08 yulong <shiyulong@iscas.ac.cn>
6957 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
6959 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6961 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
6962 * config/riscv/vector.md: Ditto.
6964 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6966 * config/riscv/autovec.md: Add VLS shift.
6968 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6970 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
6971 * config/riscv/vector-iterators.md: Ditto.
6972 * config/riscv/vector.md: Ditto.
6974 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
6976 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
6978 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
6980 * configure: Regenerate.
6982 2023-08-07 John Ericson <git@JohnEricson.me>
6984 * configure: Regenerate.
6986 2023-08-07 Alan Modra <amodra@gmail.com>
6988 * configure: Regenerate.
6990 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
6992 * configure: Regenerate.
6994 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
6996 * configure: Regenerate.
6998 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
7000 * configure: Regenerate.
7002 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
7004 * configure: Regenerate.
7006 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
7008 * configure: Regenerate.
7010 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
7012 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
7013 VOIDmode operands to conditional before canonicalization.
7015 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
7017 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
7018 (find_oldest_value_reg): Inline stack_pointer_rtx check.
7019 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
7021 2023-08-07 Martin Jambor <mjambor@suse.cz>
7024 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
7025 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
7026 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
7027 (ptr_parm_has_nonarg_uses): Likewise.
7028 * ipa-param-manipulation.cc
7029 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
7030 (ipa_param_body_adjustments::mark_dead_statements): Move initial
7031 checks to get_ddef_if_exists_and_is_used.
7032 (ipa_param_body_adjustments::mark_clobbers_dead): New.
7033 (ipa_param_body_adjustments::common_initialization): Call
7034 mark_clobbers_dead when splitting.
7036 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
7038 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
7039 as an argument and pass it to riscv_emit_int_order_test.
7040 (riscv_expand_conditional_move): Handle cases where the condition
7041 is not EQ/NE or the second argument to the conditional is not
7043 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
7044 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7046 2023-08-07 Andrew Pinski <apinski@marvell.com>
7048 PR tree-optimization/109959
7049 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
7052 2023-08-07 Richard Biener <rguenther@suse.de>
7054 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
7055 calculate post-dominators. Calculate RPO on the inverted
7056 graph and process blocks in that order.
7058 2023-08-07 liuhongt <hongtao.liu@intel.com>
7061 * config/i386/i386-protos.h
7062 (vpternlog_redundant_operand_mask): Adjust parameter type.
7063 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
7064 INTVAL instead of XINT, also adjust parameter type from rtx*
7065 to rtx since the function only needs operands[4] in vpternlog
7067 (substitute_vpternlog_operands): Pass operands[4] instead of
7068 operands to vpternlog_redundant_operand_mask.
7069 * config/i386/sse.md: Ditto.
7071 2023-08-07 Richard Biener <rguenther@suse.de>
7073 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
7074 around dumping code.
7076 2023-08-07 liuhongt <hongtao.liu@intel.com>
7079 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
7080 to define_expand and break into ..
7081 (<insn>v4hf3): .. this.
7082 (divv4hf3): .. this.
7083 (<insn>v2hf3): .. this.
7084 (divv2hf3): .. this.
7085 (movd_v2hf_to_sse): New define_expand.
7086 (movq_<mode>_to_sse): Extend to V4HFmode.
7087 (mmxdoublevecmode): Ditto.
7088 (V2FI_V4HF): New mode iterator.
7089 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
7090 by using mode iterator V4SF_V8HF, renamed to ..
7091 (*vec_concat<mode>): .. this.
7092 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
7093 iterator V4SF_V8HF, renamed to ..
7094 (*vec_concat<mode>_0): .. this.
7095 (*vec_concatv8hf_movss): New define_insn.
7096 (V4SF_V8HF): New mode iterator.
7098 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7100 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
7102 2023-08-07 Jan Beulich <jbeulich@suse.com>
7104 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
7105 (*mmx_pinsrb): Likewise.
7106 (*mmx_pextrb): Likewise.
7107 (*mmx_pextrb_zext): Likewise.
7108 (mmx_pshufbv8qi3): Likewise.
7109 (mmx_pshufbv4qi3): Likewise.
7110 (mmx_pswapdv2si2): Likewise.
7111 (*pinsrb): Likewise.
7112 (*pextrb): Likewise.
7113 (*pextrb_zext): Likewise.
7114 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
7115 (*sse2_eq<mode>3): Likewise.
7116 (*sse2_gt<mode>3): Likewise.
7117 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
7118 (*vec_extract<mode>): Likewise.
7119 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
7120 (*vec_extractv16qi_zext): Likewise.
7121 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
7122 (ssse3_pmaddubsw128): Likewise.
7123 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
7124 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
7125 (<ssse3_avx2>_psign<mode>3): Likewise.
7126 (<ssse3_avx2>_palignr<mode>): Likewise.
7127 (*abs<mode>2): Likewise.
7128 (sse4_2_pcmpestr): Likewise.
7129 (sse4_2_pcmpestri): Likewise.
7130 (sse4_2_pcmpestrm): Likewise.
7131 (sse4_2_pcmpestr_cconly): Likewise.
7132 (sse4_2_pcmpistr): Likewise.
7133 (sse4_2_pcmpistri): Likewise.
7134 (sse4_2_pcmpistrm): Likewise.
7135 (sse4_2_pcmpistr_cconly): Likewise.
7136 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
7137 (vgf2p8affineqb_<mode><mask_name>): Likewise.
7138 (vgf2p8mulb_<mode><mask_name>): Likewise.
7139 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
7141 (*<code>v16qi3 [umaxmin]): Likewise.
7143 2023-08-07 Jan Beulich <jbeulich@suse.com>
7145 * config/i386/i386.md (sse4_1_round<mode>2): Make
7146 "length_immediate" uniformly 1.
7147 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
7148 (mmx_pblendvb_<mode>): Likewise.
7150 2023-08-07 Jan Beulich <jbeulich@suse.com>
7152 * config/i386/sse.md
7153 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
7155 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
7158 2023-08-07 Jan Beulich <jbeulich@suse.com>
7160 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
7161 "prefix_extra", and "mode" attributes.
7162 (xop_phadd<u>bd): Likewise.
7163 (xop_phadd<u>bq): Likewise.
7164 (xop_phadd<u>wd): Likewise.
7165 (xop_phadd<u>wq): Likewise.
7166 (xop_phadd<u>dq): Likewise.
7167 (xop_phsubbw): Likewise.
7168 (xop_phsubwd): Likewise.
7169 (xop_phsubdq): Likewise.
7170 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
7171 (xop_rotr<mode>3): Likewise.
7172 (xop_frcz<mode>2): Likewise.
7173 (*xop_vmfrcz<mode>2): Likewise.
7174 (xop_vrotl<mode>3): Add "prefix" attribute. Change
7175 "prefix_extra" to 1.
7176 (xop_sha<mode>3): Likewise.
7177 (xop_shl<mode>3): Likewise.
7179 2023-08-07 Jan Beulich <jbeulich@suse.com>
7181 * config/i386/sse.md
7182 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
7184 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
7185 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
7186 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
7187 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
7188 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
7189 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
7190 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
7191 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
7192 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
7193 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
7194 (vec_extract_lo_v64qi): Likewise.
7195 (vec_extract_hi_v64qi): Likewise.
7196 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
7197 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
7198 (*avx512f_<code><mode>3<mask_name>): Likewise.
7199 (*vec_extractv4ti): Likewise.
7200 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
7201 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
7202 Add "length_immediate".
7204 2023-08-07 Jan Beulich <jbeulich@suse.com>
7206 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
7208 (@rdseed<mode>): Likewise.
7209 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
7210 Adjust "prefix_extra".
7211 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
7212 (*sse4_1_<code><mode>3<mask_name>): Likewise.
7213 (*avx2_eq<mode>3): Likewise.
7214 (avx2_gt<mode>3): Likewise.
7215 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
7216 (*vec_extract<mode>): Likewise.
7217 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
7219 2023-08-07 Jan Beulich <jbeulich@suse.com>
7221 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
7222 "prefix_rep". Drop "prefix_extra".
7223 (wr<fsgs>base<mode>): Likewise.
7224 (ptwrite<mode>): Likewise.
7226 2023-08-07 Jan Beulich <jbeulich@suse.com>
7228 * config/i386/i386.md (isa): Move up.
7229 (length_immediate): Handle "fma4".
7230 (prefix): Handle "ssemuladd".
7231 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
7232 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
7234 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
7235 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
7236 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
7238 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
7239 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
7240 (*fma_fnmadd_<mode>): Likewise.
7241 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
7243 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
7244 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
7245 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
7247 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
7248 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
7249 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
7251 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
7252 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
7253 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
7255 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
7256 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
7257 (*fmai_fmadd_<mode>): Likewise.
7258 (*fmai_fmsub_<mode>): Likewise.
7259 (*fmai_fnmadd_<mode><round_name>): Likewise.
7260 (*fmai_fnmsub_<mode><round_name>): Likewise.
7261 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
7262 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
7263 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
7264 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
7265 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
7266 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
7267 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
7268 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
7269 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
7270 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
7271 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
7272 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
7273 (*fma4i_vmfmadd_<mode>): Likewise.
7274 (*fma4i_vmfmsub_<mode>): Likewise.
7275 (*fma4i_vmfnmadd_<mode>): Likewise.
7276 (*fma4i_vmfnmsub_<mode>): Likewise.
7277 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
7278 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
7279 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
7281 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
7282 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
7283 (xop_p<macs>dql): Likewise.
7284 (xop_p<macs>dqh): Likewise.
7285 (xop_p<macs>wd): Likewise.
7286 (xop_p<madcs>wd): Likewise.
7287 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
7289 2023-08-07 Jan Beulich <jbeulich@suse.com>
7291 * config/i386/i386.md (length_immediate): Handle "sse4arg".
7293 (*xop_pcmov_<mode>): Add "mode" attribute.
7294 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
7295 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
7296 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
7297 (*xop_pcmov_<mode>): Add "mode" attribute.
7298 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
7300 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
7301 "prefix_extra", and "length_immediate" attributes.
7302 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
7303 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
7304 and "length_immediate" attributes. Switch "type" to "sse4arg".
7305 (xop_pcom_tf<mode>3): Likewise.
7306 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
7308 2023-08-07 Jan Beulich <jbeulich@suse.com>
7310 * config/i386/i386.md (prefix_extra): Correct comment. Fold
7311 cases yielding 2 into ones yielding 1.
7313 2023-08-07 Jan Hubicka <jh@suse.cz>
7315 PR tree-optimization/106293
7316 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
7317 * tree-vect-loop.cc (vect_transform_loop): Likewise.
7319 2023-08-07 Andrew Pinski <apinski@marvell.com>
7321 PR tree-optimization/96695
7322 * match.pd (min_value, max_value): Extend to
7325 2023-08-06 Jan Hubicka <jh@suse.cz>
7327 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
7328 __builtin_expect that CPU likely supports cpuid.
7330 2023-08-06 Jan Hubicka <jh@suse.cz>
7332 * tree-loop-distribution.cc (loop_distribution::execute): Disable
7333 distribution for loops with estimated iterations 0.
7335 2023-08-06 Jan Hubicka <jh@suse.cz>
7337 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
7339 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
7341 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
7342 more Zicond patterns. Fix whitespace typo.
7343 (riscv_rtx_costs): Remove accidental code duplication.
7344 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7346 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
7349 * config/i386/i386-protos.h
7350 (vpternlog_redundant_operand_mask): Declare.
7351 (substitute_vpternlog_operands): Declare.
7352 * config/i386/i386.cc
7353 (vpternlog_redundant_operand_mask): New helper.
7354 (substitute_vpternlog_operands): New function. Use them...
7355 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
7357 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
7359 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
7360 value of -1 is equivalent to don't care.
7361 (extract_integral_bit_field): Indicate that we don't require
7362 the most significant word to be zero extended, if we're about
7364 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
7365 of -1 is equivalent to don't care. Don't clear the most
7366 significant bits with AND mask when UNSIGNEDP is -1.
7368 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
7370 * config/i386/sse.md (define_split): Convert highpart:DF extract
7371 from V2DFmode register into a sse2_storehpd instruction.
7372 (define_split): Likewise, convert lowpart:DF extract from V2DF
7373 register into a sse2_storelpd instruction.
7375 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
7377 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
7380 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
7382 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
7383 against early clobber hard regs.
7385 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7387 * doc/extend.texi: Document it.
7389 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7392 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
7393 vec_widen_<sur>shiftl_hi_<mode>): Remove.
7394 (aarch64_<sur>shll<mode>_internal): Renamed to...
7395 (aarch64_<su>shll<mode>): .. This.
7396 (aarch64_<sur>shll2<mode>_internal): Renamed to...
7397 (aarch64_<su>shll2<mode>): .. This.
7398 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
7400 * config/aarch64/constraints.md (D2, DL): New.
7401 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
7403 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7405 * gensupport.cc (conlist): Support length 0 attribute.
7407 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7409 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
7410 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
7412 2023-08-04 Tamar Christina <tamar.christina@arm.com>
7414 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
7416 (aarch64_adjust_stmt_cost): Use it.
7417 (aarch64_vector_costs::count_ops): Likewise.
7418 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
7419 aarch64_adjust_stmt_cost.
7421 2023-08-04 Richard Biener <rguenther@suse.de>
7423 PR tree-optimization/110838
7424 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
7425 Fix right-shift value sanitizing. Properly emit external
7426 def mangling in the preheader rather than in the pattern
7427 def sequence where it will fail vectorizing.
7429 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
7431 PR middle-end/110316
7433 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
7434 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
7435 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
7436 (timer::validate_phases): Use integral arithmetic to check
7438 (timer::print_row, timer::print): Convert from integral
7439 nanoseconds to floating point seconds before printing.
7440 (timer::all_zero): Change limit to nanosec count instead of
7441 fractional count of seconds.
7442 (make_json_for_timevar_time_def): Convert from integral
7443 nanoseconds to floating point seconds before recording.
7444 * timevar.h (struct timevar_time_def): Update all measurements
7445 to use uint64_t nanoseconds rather than seconds stored in a
7448 2023-08-04 Richard Biener <rguenther@suse.de>
7450 PR tree-optimization/110838
7451 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
7452 the arithmetic right-shift case to non-negative operands.
7454 2023-08-04 Pan Li <pan2.li@intel.com>
7457 2023-08-04 Pan Li <pan2.li@intel.com>
7459 * config/riscv/riscv-vector-builtins-bases.cc
7460 (class vfmacc_frm): New class for vfmacc frm.
7461 (vfmacc_frm_obj): New declaration.
7463 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7464 * config/riscv/riscv-vector-builtins-functions.def
7465 (vfmacc_frm): New function definition.
7466 * config/riscv/riscv-vector-builtins.cc
7467 (function_expander::use_ternop_insn): Add frm operand support.
7468 * config/riscv/vector.md: Add vfmuladd to frm_mode.
7470 2023-08-04 Pan Li <pan2.li@intel.com>
7473 2023-08-04 Pan Li <pan2.li@intel.com>
7475 * config/riscv/riscv-vector-builtins-bases.cc
7476 (class vfnmacc_frm): New class for vfnmacc.
7477 (vfnmacc_frm_obj): New declaration.
7479 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7480 * config/riscv/riscv-vector-builtins-functions.def
7481 (vfnmacc_frm): New function definition.
7483 2023-08-04 Pan Li <pan2.li@intel.com>
7486 2023-08-04 Pan Li <pan2.li@intel.com>
7488 * config/riscv/riscv-vector-builtins-bases.cc
7489 (class vfmsac_frm): New class for vfmsac frm.
7490 (vfmsac_frm_obj): New declaration.
7492 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7493 * config/riscv/riscv-vector-builtins-functions.def
7494 (vfmsac_frm): New function definition.
7496 2023-08-04 Pan Li <pan2.li@intel.com>
7499 2023-08-04 Pan Li <pan2.li@intel.com>
7501 * config/riscv/riscv-vector-builtins-bases.cc
7502 (class vfnmsac_frm): New class for vfnmsac frm.
7503 (vfnmsac_frm_obj): New declaration.
7505 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7506 * config/riscv/riscv-vector-builtins-functions.def
7507 (vfnmsac_frm): New function definition.
7509 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
7511 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
7512 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
7513 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
7514 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
7515 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
7516 (attiny102, attiny104): New devices.
7517 * doc/avr-mmcu.texi: Regenerate.
7519 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
7521 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
7522 and PM_OFFSET entries.
7524 2023-08-04 Andrew Pinski <apinski@marvell.com>
7526 PR tree-optimization/110874
7527 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
7528 (gimple_maybe_cmp): Likewise.
7529 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
7530 and gimple_maybe_cmp instead of being recursive.
7531 * match.pd (bit_not_with_nop): New match pattern.
7532 (maybe_cmp): Likewise.
7534 2023-08-04 Drew Ross <drross@redhat.com>
7536 PR middle-end/101955
7537 * match.pd ((signed x << c) >> c): New canonicalization.
7539 2023-08-04 Pan Li <pan2.li@intel.com>
7541 * config/riscv/riscv-vector-builtins-bases.cc
7542 (class vfnmsac_frm): New class for vfnmsac frm.
7543 (vfnmsac_frm_obj): New declaration.
7545 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7546 * config/riscv/riscv-vector-builtins-functions.def
7547 (vfnmsac_frm): New function definition.
7549 2023-08-04 Pan Li <pan2.li@intel.com>
7551 * config/riscv/riscv-vector-builtins-bases.cc
7552 (class vfmsac_frm): New class for vfmsac frm.
7553 (vfmsac_frm_obj): New declaration.
7555 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7556 * config/riscv/riscv-vector-builtins-functions.def
7557 (vfmsac_frm): New function definition.
7559 2023-08-04 Pan Li <pan2.li@intel.com>
7561 * config/riscv/riscv-vector-builtins-bases.cc
7562 (class vfnmacc_frm): New class for vfnmacc.
7563 (vfnmacc_frm_obj): New declaration.
7565 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7566 * config/riscv/riscv-vector-builtins-functions.def
7567 (vfnmacc_frm): New function definition.
7569 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
7572 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
7573 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
7575 2023-08-04 Pan Li <pan2.li@intel.com>
7577 * config/riscv/riscv-vector-builtins-bases.cc
7578 (class vfmacc_frm): New class for vfmacc frm.
7579 (vfmacc_frm_obj): New declaration.
7581 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
7582 * config/riscv/riscv-vector-builtins-functions.def
7583 (vfmacc_frm): New function definition.
7584 * config/riscv/riscv-vector-builtins.cc
7585 (function_expander::use_ternop_insn): Add frm operand support.
7586 * config/riscv/vector.md: Add vfmuladd to frm_mode.
7588 2023-08-04 Pan Li <pan2.li@intel.com>
7590 * config/riscv/riscv-vector-builtins-bases.cc
7591 (vfwmul_frm_obj): New declaration.
7592 (vfwmul_frm): Ditto.
7593 * config/riscv/riscv-vector-builtins-bases.h:
7594 (vfwmul_frm): Ditto.
7595 * config/riscv/riscv-vector-builtins-functions.def
7596 (vfwmul_frm): New function definition.
7597 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
7599 2023-08-04 Pan Li <pan2.li@intel.com>
7601 * config/riscv/riscv-vector-builtins-bases.cc
7602 (binop_frm): New declaration.
7603 (reverse_binop_frm): Likewise.
7605 * config/riscv/riscv-vector-builtins-bases.h:
7606 (vfdiv_frm): New extern declaration.
7607 (vfrdiv_frm): Likewise.
7608 * config/riscv/riscv-vector-builtins-functions.def
7609 (vfdiv_frm): New function definition.
7610 (vfrdiv_frm): Likewise.
7611 * config/riscv/vector.md: Add vfdiv to frm_mode.
7613 2023-08-03 Jan Hubicka <jh@suse.cz>
7615 * tree-cfg.cc (print_loop_info): Print entry count.
7617 2023-08-03 Jan Hubicka <jh@suse.cz>
7619 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
7621 2023-08-03 Jan Hubicka <jh@suse.cz>
7624 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
7625 unadjusted_exit_count.
7627 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
7629 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
7632 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
7634 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
7635 various Zicond patterns.
7636 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
7637 sfb_alu_operand for both arms of the conditional move.
7638 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7640 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
7646 * config.gcc: Added core-builtins.cc and .o files.
7647 * config/bpf/bpf-passes.def: Removed file.
7648 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
7649 bpf_replace_core_move_operands): New prototypes.
7650 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
7651 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
7652 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
7653 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
7654 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
7656 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
7657 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
7658 (mov_reloc_core<mode>): Added.
7659 * config/bpf/core-builtins.cc (struct cr_builtin, enum
7660 cr_decision struct cr_local, struct cr_final, struct
7661 core_builtin_helpers, enum bpf_plugin_states): Added types.
7662 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
7664 (allocate_builtin_data, get_builtin-data, search_builtin_data,
7665 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
7666 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
7667 bpf_core_get_index, compute_field_expr,
7668 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
7669 process_field_expr, pack_enum_value, process_enum_value, pack_type,
7670 process_type, bpf_require_core_support, make_core_relo, read_kind,
7671 kind_access_index, kind_preserve_field_info, kind_enum_value,
7672 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
7673 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
7674 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
7675 bpf_expand_core_builtin, bpf_add_core_reloc,
7676 bpf_replace_core_move_operands): Added functions.
7677 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
7678 (bpf_init_core_builtins, bpf_expand_core_builtin,
7679 bpf_resolve_overloaded_core_builtin): Added functions.
7680 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
7681 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
7682 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
7683 * config/bpf/t-bpf: Added core-builtins.o.
7684 * doc/extend.texi: Added documentation for new BPF builtins.
7686 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
7688 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
7689 ranges to the call to relation_fold_and_or.
7690 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
7691 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
7692 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
7693 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
7694 a varying op1 and op2 to call.
7695 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
7696 (operator_equal::op1_op2_relation): New float version.
7697 (operator_not_equal::op1_op2_relation): Ditto.
7698 (operator_lt::op1_op2_relation): Ditto.
7699 (operator_le::op1_op2_relation): Ditto.
7700 (operator_gt::op1_op2_relation): Ditto.
7701 (operator_ge::op1_op2_relation) Ditto.
7702 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
7704 (operator_not_equal::op1_op2_relation): Ditto.
7705 (operator_lt::op1_op2_relation): Ditto.
7706 (operator_le::op1_op2_relation): Ditto.
7707 (operator_gt::op1_op2_relation): Ditto.
7708 (operator_ge::op1_op2_relation): Ditto.
7709 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
7711 (range_operator::op1_op2_relation): Add extra params.
7712 (operator_equal::op1_op2_relation): Ditto.
7713 (operator_not_equal::op1_op2_relation): Ditto.
7714 (operator_lt::op1_op2_relation): Ditto.
7715 (operator_le::op1_op2_relation): Ditto.
7716 (operator_gt::op1_op2_relation): Ditto.
7717 (operator_ge::op1_op2_relation): Ditto.
7718 * range-op.h (range_operator): New prototypes.
7719 (range_op_handler): Ditto.
7721 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
7723 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
7724 Use identity relation.
7725 (gori_compute::compute_operand2_range): Ditto.
7726 * value-relation.cc (get_identity_relation): New.
7727 * value-relation.h (get_identity_relation): New prototype.
7729 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
7731 * value-range.h (Value_Range::set_varying): Set the type.
7732 (Value_Range::set_zero): Ditto.
7733 (Value_Range::set_nonzero): Ditto.
7735 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
7737 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
7740 2023-08-03 Pan Li <pan2.li@intel.com>
7742 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
7744 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
7746 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
7748 2023-08-03 Richard Biener <rguenther@suse.de>
7750 PR tree-optimization/110838
7751 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
7752 Adjust the shift operand of RSHIFT_EXPRs.
7754 2023-08-03 Richard Biener <rguenther@suse.de>
7756 PR tree-optimization/110702
7757 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
7758 we created a NULL pointer based access rewrite that to
7761 2023-08-03 Richard Biener <rguenther@suse.de>
7763 * tree-ssa-sink.cc: Include tree-ssa-live.h.
7764 (pass_sink_code::execute): Instantiate virtual_operand_live
7766 (sink_code_in_bb): Pass down virtual_operand_live.
7767 (statement_sink_location): Get virtual_operand_live and
7768 verify we are not sinking loads across stores by looking up
7769 the live virtual operand at the sink location.
7771 2023-08-03 Richard Biener <rguenther@suse.de>
7773 * tree-ssa-live.h (class virtual_operand_live): New.
7774 * tree-ssa-live.cc (virtual_operand_live::init): New.
7775 (virtual_operand_live::get_live_in): Likewise.
7776 (virtual_operand_live::get_live_out): Likewise.
7778 2023-08-03 Richard Biener <rguenther@suse.de>
7780 * passes.def: Exchange loop splitting and final value
7783 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7785 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
7786 New function which handles bswap patterns for vec_perm_const.
7787 (vectorize_vec_perm_const_1): Call new function.
7788 * config/s390/vector.md (*bswap<mode>): Fix operands in output
7790 (*vstbr<mode>): New insn.
7792 2023-08-03 Alexandre Oliva <oliva@adacore.com>
7794 * config/vxworks-smp.opt: New. Introduce -msmp.
7795 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
7796 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
7797 lib_smp when -msmp is present in the command line.
7798 * doc/invoke.texi: Document it.
7800 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
7802 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
7803 when enabling -mno-omit-leaf-frame-pointer
7804 (riscv_option_override): Override omit-frame-pointer.
7805 (riscv_frame_pointer_required): Save s0 for non-leaf function
7806 (TARGET_FRAME_POINTER_REQUIRED): Override defination
7807 * config/riscv/riscv.opt: Add option support.
7809 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
7812 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
7813 place operand in a register before gen_<insn>64ti2_doubleword.
7814 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
7815 operand in a register before gen_<insn>32di2_doubleword.
7816 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
7817 (<any_rotate>64ti2_doubleword): Likewise.
7819 2023-08-03 Pan Li <pan2.li@intel.com>
7821 * config/riscv/riscv-vector-builtins-bases.cc
7822 (vfmul_frm_obj): New declaration.
7824 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
7825 * config/riscv/riscv-vector-builtins-functions.def
7826 (vfmul_frm): New function definition.
7827 * config/riscv/vector.md: Add vfmul to frm_mode.
7829 2023-08-03 Andrew Pinski <apinski@marvell.com>
7831 * match.pd (`~X & X`): Check that the types match.
7832 (`~x | x`, `~x ^ x`): Likewise.
7834 2023-08-03 Pan Li <pan2.li@intel.com>
7836 * config/riscv/riscv-vector-builtins-bases.h: Remove
7837 redudant declaration.
7839 2023-08-03 Pan Li <pan2.li@intel.com>
7841 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
7843 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
7844 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
7845 Add vfwsub function definitions.
7847 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
7849 PR rtl-optimization/110867
7850 * combine.cc (simplify_compare_const): Try the optimization only
7851 in case the constant fits into the comparison mode.
7853 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
7855 * config/riscv/zicond.md: Remove incorrect zicond patterns and
7856 renumber/rename them.
7857 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
7859 2023-08-02 Richard Biener <rguenther@suse.de>
7861 * tree-phinodes.h (add_phi_node_to_bb): Remove.
7862 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
7864 2023-08-02 Jan Beulich <jbeulich@suse.com>
7866 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
7867 two of the alternatives.
7869 2023-08-02 Richard Biener <rguenther@suse.de>
7871 PR tree-optimization/92335
7872 * tree-ssa-sink.cc (select_best_block): Before loop
7873 optimizations avoid sinking unconditional loads/stores
7874 in innermost loops to conditional executed places.
7876 2023-08-02 Andrew Pinski <apinski@marvell.com>
7878 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
7879 the comparison operands before comparing them.
7881 2023-08-02 Andrew Pinski <apinski@marvell.com>
7883 * match.pd (`~X & X`, `~X | X`): Move over to
7884 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
7885 handles that already.
7886 Remove range test simplifications to true/false as they
7887 are now handled by these patterns.
7889 2023-08-02 Andrew Pinski <apinski@marvell.com>
7891 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
7892 statement's lhs and rhs to check if trivial dead.
7893 Rename inserted_exprs to exprs_maybe_dce; also move it so
7894 bitmap is not allocated if not needed.
7896 2023-08-02 Pan Li <pan2.li@intel.com>
7898 * config/riscv/riscv-vector-builtins-bases.cc
7899 (class widen_binop_frm): New class for binop frm.
7900 (BASE): Add vfwadd_frm.
7901 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
7902 * config/riscv/riscv-vector-builtins-functions.def
7903 (vfwadd_frm): New function definition.
7904 * config/riscv/riscv-vector-builtins-shapes.cc
7905 (BASE_NAME_MAX_LEN): New macro.
7906 (struct alu_frm_def): Leverage new base class.
7907 (struct build_frm_base): New build base for frm.
7908 (struct widen_alu_frm_def): New struct for widen alu frm.
7909 (SHAPE): Add widen_alu_frm shape.
7910 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
7911 * config/riscv/vector.md (frm_mode): Add vfwalu type.
7913 2023-08-02 Jan Hubicka <jh@suse.cz>
7915 * cfgloop.h (loop_count_in): Declare.
7916 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
7917 (loop_count_in): Move here from ...
7918 * cfgloopmanip.cc (loop_count_in): ... here.
7919 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
7921 2023-08-02 Jan Hubicka <jh@suse.cz>
7923 * cfg.cc (scale_strictly_dominated_blocks): New function.
7924 * cfg.h (scale_strictly_dominated_blocks): Declare.
7925 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
7927 2023-08-02 Richard Biener <rguenther@suse.de>
7929 PR rtl-optimization/110587
7930 * lra-spills.cc (return_regno_p): Remove.
7931 (regno_in_use_p): Likewise.
7932 (lra_final_code_change): Do not remove noop moves
7933 between hard registers.
7935 2023-08-02 liuhongt <hongtao.liu@intel.com>
7938 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
7939 HFmode, use mode iterator VFH instead.
7940 (vec_fmsubadd<mode>4): Ditto.
7941 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
7942 Remove scalar mode from iterator, use VFH_AVX512VL instead.
7943 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
7946 2023-08-02 liuhongt <hongtao.liu@intel.com>
7948 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
7949 pre_reload define_insn_and_split.
7951 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
7953 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
7954 using Zicond to implement some conditional moves.
7956 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
7958 * config/riscv/zicond.md: Use the X iterator instead of ANYI
7959 on the comparison input operands.
7961 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
7963 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
7965 (case SET): For INSNs that just set a REG, take the cost from the
7967 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
7969 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
7971 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
7972 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
7973 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
7974 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
7975 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
7976 (OPTION_MASK_ISA_ABM_SET):
7977 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
7979 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
7981 * config/s390/s390.cc (s390_encode_section_info): Assume external
7982 symbols without explicit alignment to be unaligned if
7983 -munaligned-symbols has been specified.
7984 * config/s390/s390.opt (-munaligned-symbols): New option.
7986 2023-08-01 Richard Ball <richard.ball@arm.com>
7988 * gimple-fold.cc (fold_ctor_reference):
7989 Add support for poly_int.
7991 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
7994 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
7995 LABEL_NUSES of new conditional branch instruction.
7997 2023-08-01 Jan Hubicka <jh@suse.cz>
7999 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
8000 constant prologue peeling.
8002 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
8004 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
8006 2023-08-01 Pan Li <pan2.li@intel.com>
8007 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8009 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
8010 (STATIC_FRM_P): Ditto.
8011 (struct mode_switching_info): New struct for mode switching.
8012 (struct machine_function): Add new field mode switching.
8013 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
8014 (riscv_frm_adjust_mode_after_call): New function for call mode.
8015 (riscv_frm_emit_after_call_in_bb_end): New function for emit
8016 insn when call as the end of bb.
8017 (riscv_frm_mode_needed): New function for frm mode needed.
8018 (frm_unknown_dynamic_p): Remove call check.
8019 (riscv_mode_needed): Extrac function for frm.
8020 (riscv_frm_mode_after): Add DYN_CALL after.
8021 (riscv_mode_entry): Remove backup rtl initialization.
8022 * config/riscv/vector.md (frm_mode): Add dyn_call.
8023 (fsrmsi_restore_exit): Rename to _volatile.
8024 (fsrmsi_restore_volatile): Likewise.
8026 2023-08-01 Pan Li <pan2.li@intel.com>
8028 * config/riscv/riscv-vector-builtins-bases.cc
8029 (class reverse_binop_frm): Add new template for reversed frm.
8030 (vfsub_frm_obj): New obj.
8031 (vfrsub_frm_obj): Likewise.
8032 * config/riscv/riscv-vector-builtins-bases.h:
8033 (vfsub_frm): New declaration.
8034 (vfrsub_frm): Likewise.
8035 * config/riscv/riscv-vector-builtins-functions.def
8036 (vfsub_frm): New function define.
8037 (vfrsub_frm): Likewise.
8039 2023-08-01 Andrew Pinski <apinski@marvell.com>
8041 PR tree-optimization/93044
8042 * match.pd (nested int casts): A truncation (to the same size or smaller)
8043 can always remove the inner cast.
8045 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
8048 * doc/invoke.texi (-Wmissing-variable-declarations): Document
8051 2023-07-31 Andrew Pinski <apinski@marvell.com>
8053 PR tree-optimization/106164
8054 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
8055 `a == b | a < b`, `a == b | a > b`): Handle these cases
8058 2023-07-31 Andrew Pinski <apinski@marvell.com>
8060 PR tree-optimization/106164
8061 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
8062 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
8064 2023-07-31 Andrew Pinski <apinski@marvell.com>
8066 PR tree-optimization/100864
8067 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
8068 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
8069 (gimple_bitwise_inverted_equal_p): New function.
8070 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
8071 instead of direct matching bit_not.
8073 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
8076 * gcc-ar.cc (main): Expand argv and use
8077 temporary response file to call ar if any
8078 expansions were made.
8080 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
8082 PR tree-optimization/110582
8083 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
8084 range vector for non-ssa names.
8086 2023-07-31 David Malcolm <dmalcolm@redhat.com>
8089 * diagnostic-client-data-hooks.h (class sarif_object): New forward
8091 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
8093 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
8094 (class sarif_invocation): Inherit from sarif_object rather than
8096 (class sarif_result): Likewise.
8097 (class sarif_ice_notification): Likewise.
8098 (sarif_object::get_or_create_properties): New.
8099 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
8100 to call the context's add_sarif_invocation_properties hook.
8101 (sarif_builder::flush_to_file): Pass m_context to
8102 sarif_invocation::prepare_to_flush.
8103 * diagnostic-format-sarif.h: New header.
8104 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
8105 writes to stderr. Document that if SARIF diagnostic output is
8106 requested then any timing information is written in JSON form as
8107 part of the SARIF output, rather than to stderr.
8108 * timevar.cc: Include "json.h".
8109 (timer::named_items::m_hash_map): Split out type into...
8110 (timer::named_items::hash_map_t): ...this new typedef.
8111 (timer::named_items::make_json): New function.
8112 (timevar_diff): New function.
8113 (make_json_for_timevar_time_def): New function.
8114 (timer::timevar_def::make_json): New function.
8115 (timer::make_json): New function.
8116 * timevar.h (class json::value): New forward decl.
8117 (timer::make_json): New decl.
8118 (timer::timevar_def::make_json): New decl.
8119 * tree-diagnostic-client-data-hooks.cc: Include
8120 "diagnostic-format-sarif.h" and "timevar.h".
8121 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
8124 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8126 * combine.cc (simplify_compare_const): Narrow comparison of
8127 memory and constant.
8128 (try_combine): Adapt new function signature.
8129 (simplify_comparison): Adapt new function signature.
8131 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
8133 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
8135 (expand_vector_init_insert_elems): Ditto.
8137 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
8140 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
8141 single_defuse_cycle while counting reduction_latency.
8143 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8145 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
8146 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
8167 (COND_LEN_ADD): Ditto.
8168 (COND_LEN_SUB): Ditto.
8169 (COND_LEN_MUL): Ditto.
8170 (COND_LEN_DIV): Ditto.
8171 (COND_LEN_MOD): Ditto.
8172 (COND_LEN_RDIV): Ditto.
8173 (COND_LEN_MIN): Ditto.
8174 (COND_LEN_MAX): Ditto.
8175 (COND_LEN_FMIN): Ditto.
8176 (COND_LEN_FMAX): Ditto.
8177 (COND_LEN_AND): Ditto.
8178 (COND_LEN_IOR): Ditto.
8179 (COND_LEN_XOR): Ditto.
8180 (COND_LEN_SHL): Ditto.
8181 (COND_LEN_SHR): Ditto.
8182 (COND_LEN_FMA): Ditto.
8183 (COND_LEN_FMS): Ditto.
8184 (COND_LEN_FNMA): Ditto.
8185 (COND_LEN_FNMS): Ditto.
8186 (COND_LEN_NEG): Ditto.
8187 (ADD): New macro define.
8208 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
8211 * config/i386/i386-features.cc (compute_convert_gain): Check
8212 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
8213 and V4SImode rotates in STV.
8214 (general_scalar_chain::convert_rotate): Likewise.
8216 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
8218 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
8219 * config/riscv/riscv-protos.h (get_mask_mode): Update return
8221 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
8223 (emit_vlmax_insn): Ditto.
8224 (emit_vlmax_fp_insn): Ditto.
8225 (emit_vlmax_ternary_insn): Ditto.
8226 (emit_vlmax_fp_ternary_insn): Ditto.
8227 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
8228 (emit_nonvlmax_insn): Ditto.
8229 (emit_vlmax_slide_insn): Ditto.
8230 (emit_nonvlmax_slide_tu_insn): Ditto.
8231 (emit_vlmax_merge_insn): Ditto.
8232 (emit_vlmax_masked_insn): Ditto.
8233 (emit_nonvlmax_masked_insn): Ditto.
8234 (emit_vlmax_masked_store_insn): Ditto.
8235 (emit_nonvlmax_masked_store_insn): Ditto.
8236 (emit_vlmax_masked_mu_insn): Ditto.
8237 (emit_nonvlmax_tu_insn): Ditto.
8238 (emit_nonvlmax_fp_tu_insn): Ditto.
8239 (emit_scalar_move_insn): Ditto.
8240 (emit_vlmax_compress_insn): Ditto.
8241 (emit_vlmax_reduction_insn): Ditto.
8242 (emit_vlmax_fp_reduction_insn): Ditto.
8243 (emit_nonvlmax_fp_reduction_insn): Ditto.
8244 (expand_vec_series): Ditto.
8245 (expand_vector_init_merge_repeating_sequence): Ditto.
8246 (expand_vec_perm): Ditto.
8247 (shuffle_merge_patterns): Ditto.
8248 (shuffle_compress_patterns): Ditto.
8249 (shuffle_decompress_patterns): Ditto.
8250 (expand_reduction): Ditto.
8251 (get_mask_mode): Update return type.
8252 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
8253 is valid, and use new get_mask_mode interface.
8255 2023-07-31 Pan Li <pan2.li@intel.com>
8257 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
8258 Move rm suffix before mask.
8260 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8262 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
8263 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
8266 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
8269 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
8270 (extzv<mode>): Likewise.
8271 (insv<mode>): Likewise.
8272 (*testqi_ext_3): Likewise.
8273 (*btr<mode>_2): Likewise.
8274 (define_split): Likewise.
8275 (*btsq_imm): Likewise.
8276 (*btrq_imm): Likewise.
8277 (*btcq_imm): Likewise.
8278 (define_peephole2 x3): Likewise.
8279 (*bt<mode>): Likewise
8280 (*bt<mode>_mask): New define_insn_and_split.
8281 (*jcc_bt<mode>): Use QImode for offsets.
8282 (*jcc_bt<mode>_1): Delete obsolete pattern.
8283 (*jcc_bt<mode>_mask): Use QImode offsets.
8284 (*jcc_bt<mode>_mask_1): Likewise.
8285 (define_split): Likewise.
8286 (*bt<mode>_setcqi): Likewise.
8287 (*bt<mode>_setncqi): Likewise.
8288 (*bt<mode>_setnc<mode>): Likewise.
8289 (*bt<mode>_setncqi_2): Likewise.
8290 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
8291 (bmi2_bzhi_<mode>3): Use QImode offsets.
8292 (*bmi2_bzhi_<mode>3): Likewise.
8293 (*bmi2_bzhi_<mode>3_1): Likewise.
8294 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
8295 (@tbm_bextri_<mode>): Likewise.
8297 2023-07-29 Jan Hubicka <jh@suse.cz>
8299 * profile-count.cc (profile_probability::sqrt): New member function.
8300 (profile_probability::pow): Likewise.
8301 * profile-count.h: (profile_probability::sqrt): Declare
8302 (profile_probability::pow): Likewise.
8303 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
8305 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
8307 * gimple-range-cache.cc (ssa_cache::merge_range): New.
8308 (ssa_lazy_cache::merge_range): New.
8309 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
8310 (class ssa_lazy_cache): Ditto.
8311 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
8313 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
8315 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
8316 Move from value-query.cc.
8317 (substitute_and_fold_engine::value_of_stmt): Ditto.
8318 (substitute_and_fold_engine::range_of_expr): New.
8319 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
8320 range_query. New prototypes.
8321 * value-query.cc (value_query::value_on_edge): Relocate.
8322 (value_query::value_of_stmt): Ditto.
8323 * value-query.h (class value_query): Remove.
8324 (class range_query): Remove base class. Adjust prototypes.
8326 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
8328 PR tree-optimization/110205
8329 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
8330 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
8332 * range-op.cc (operator_lshift): Add missing final overrides.
8333 (operator_rshift): Ditto.
8335 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
8337 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
8338 optimizations in BPF target.
8340 2023-07-28 Honza <jh@ryzen4.suse.cz>
8342 * cfgloopmanip.cc (loop_count_in): Break out from ...
8343 (loop_exit_for_scaling): Break out from ...
8344 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
8345 add more sanity check and debug info.
8346 (scale_loop_profile): ... here.
8347 (create_empty_loop_on_edge): Fix whitespac.
8348 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
8349 * loop-unroll.cc (unroll_loop_constant_iterations): Use
8350 update_loop_exit_probability_scale_dom_bbs.
8351 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
8352 (tree_transform_and_unroll_loop): Use
8353 update_loop_exit_probability_scale_dom_bbs.
8354 * tree-ssa-loop-split.cc (split_loop): Use
8355 update_loop_exit_probability_scale_dom_bbs.
8357 2023-07-28 Jan Hubicka <jh@suse.cz>
8360 * tree-ssa-loop-split.cc: Include value-query.h.
8361 (split_at_bb_p): Analyze cases where EQ/NE can be turned
8362 into LT/LE/GT/GE; return updated guard code.
8363 (split_loop): Use guard code.
8365 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
8366 Richard Biener <rguenther@suse.de>
8369 PR rtl-optimization/110587
8370 * expr.cc (emit_group_load_1): Simplify logic for calling
8371 force_reg on ORIG_SRC, to avoid making a copy if the source
8372 is already in a pseudo register.
8374 2023-07-28 Jan Hubicka <jh@suse.cz>
8376 PR middle-end/106923
8377 * tree-ssa-loop-split.cc (connect_loops): Change probability
8378 of the test preconditioning second loop to very_likely.
8379 (fix_loop_bb_probability): Handle correctly case where
8380 on of the arms of the conditional is empty.
8381 (split_loop): Fold the test guarding first condition to
8382 see if it is constant true; Set correct entry block
8383 probabilities of the split loops; determine correct loop
8386 2023-07-28 xuli <xuli1@eswincomputing.com>
8388 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
8389 vsadd[u] and vssub[u].
8390 * config/riscv/vector.md: Ditto.
8392 2023-07-28 Jan Hubicka <jh@suse.cz>
8394 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
8395 loops when IV test is not overflowing.
8397 2023-07-28 liuhongt <hongtao.liu@intel.com>
8400 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
8402 (avx512cd_maskw_vec_dup<mode>): Ditto.
8404 2023-07-27 David Faust <david.faust@oracle.com>
8408 * config/bpf/bpf.opt (msmov): New option.
8409 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
8410 * config/bpf/bpf.md (*extendsidi2): New.
8416 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
8417 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
8418 also enables -msmov.
8420 2023-07-27 David Faust <david.faust@oracle.com>
8422 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
8423 Add -mbswap and -msdiv eBPF options.
8424 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
8425 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
8428 2023-07-27 David Faust <david.faust@oracle.com>
8430 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
8431 in pseudo-C dialect output template.
8432 (sub<AM:mode>3): Likewise.
8434 2023-07-27 Jan Hubicka <jh@suse.cz>
8436 * tree-vect-loop.cc (optimize_mask_stores): Make store
8439 2023-07-27 Jan Hubicka <jh@suse.cz>
8441 * cfgloop.h (single_dom_exit): Declare.
8442 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
8443 * cfgrtl.cc (struct cfg_hooks): Fix comment.
8444 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
8445 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
8446 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
8448 (tree_transform_and_unroll_loop): ... here;
8450 2023-07-27 Jan Hubicka <jh@suse.cz>
8452 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
8453 tree-ssa-loop-manip.cc and avoid recursion.
8454 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
8455 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
8457 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
8458 (scale_dominated_blocks_in_loop): Declare.
8459 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
8460 (change_edge_frequency): Remove.
8461 * predict.h (change_edge_frequency): Remove.
8462 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
8464 (niter_for_unrolled_loop): Remove.
8465 (tree_transform_and_unroll_loop): Fix profile update.
8467 2023-07-27 Jan Hubicka <jh@suse.cz>
8469 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
8470 to guessed; fix count of new_bb.
8472 2023-07-27 Jan Hubicka <jh@suse.cz>
8474 * profile-count.h (profile_count::apply_probability): Fix
8475 handling of uninitialized probabilities, optimize scaling
8478 2023-07-27 Richard Biener <rguenther@suse.de>
8480 PR tree-optimization/91838
8481 * gimple-match-head.cc: Include attribs.h and asan.h.
8482 * generic-match-head.cc: Likewise.
8483 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
8485 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8487 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
8488 (ADJUST_ALIGNMENT): Ditto.
8489 (ADJUST_PRECISION): Ditto.
8491 (VECTOR_MODE_WITH_PREFIX): Ditto.
8492 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
8493 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
8494 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
8495 (legitimize_move): Enable basic VLS modes support.
8498 (get_vector_mode): Ditto.
8499 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
8500 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
8501 (VLS_ENTRY): New macro.
8502 (riscv_v_ext_mode_p): Add vls modes.
8503 (riscv_get_v_regno_alignment): New function.
8504 (riscv_print_operand): Add vls modes.
8505 (riscv_hard_regno_nregs): Ditto.
8506 (riscv_hard_regno_mode_ok): Ditto.
8507 (riscv_regmode_natural_size): Ditto.
8508 (riscv_vectorize_preferred_vector_alignment): Ditto.
8509 * config/riscv/riscv.md: Ditto.
8510 * config/riscv/vector-iterators.md: Ditto.
8511 * config/riscv/vector.md: Ditto.
8512 * config/riscv/autovec-vls.md: New file.
8514 2023-07-27 Pan Li <pan2.li@intel.com>
8516 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
8518 (vwrite_csr): Ditto.
8520 2023-07-27 demin.han <demin.han@starfivetech.com>
8522 * config/riscv/autovec.md: Delete which_alternative use in split
8524 2023-07-27 Richard Biener <rguenther@suse.de>
8526 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
8528 (pass_sink_code::execute): ... in the caller.
8530 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
8531 Richard Biener <rguenther@suse.de>
8533 PR tree-optimization/110776
8534 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
8537 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
8539 * config/riscv/riscv.md: Include zicond.md
8540 * config/riscv/zicond.md: New file.
8542 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
8544 * common/config/riscv/riscv-common.cc: New extension.
8545 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
8546 (TARGET_ZICOND): New target.
8548 2023-07-26 Carl Love <cel@us.ibm.com>
8550 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
8551 specifies the number of built-in arguments to check.
8552 (altivec_resolve_overloaded_builtin): Update calls to find_instance
8553 to pass the number of built-in arguments to be checked.
8555 2023-07-26 David Faust <david.faust@oracle.com>
8557 * config/bpf/bpf.opt (mv3-atomics): New option.
8558 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
8559 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
8560 (REG_CLASS_NAMES): Likewise.
8561 (REG_CLASS_CONTENTS): Likewise.
8562 (REGNO_REG_CLASS): Handle R0.
8563 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
8564 (UNSPEC_AAND): New unspec.
8565 (UNSPEC_AOR): Likewise.
8566 (UNSPEC_AXOR): Likewise.
8567 (UNSPEC_AFADD): Likewise.
8568 (UNSPEC_AFAND): Likewise.
8569 (UNSPEC_AFOR): Likewise.
8570 (UNSPEC_AFXOR): Likewise.
8571 (UNSPEC_AXCHG): Likewise.
8572 (UNSPEC_ACMPX): Likewise.
8573 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
8575 * config/bpf/atomic.md: ...Here. New file.
8576 * config/bpf/constraints.md (t): New constraint for R0.
8577 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
8579 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
8581 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
8584 2023-07-26 Carl Love <cel@us.ibm.com>
8586 * config/rs6000/rs6000-builtins.def: Rename
8587 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
8588 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
8589 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
8590 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
8591 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
8592 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
8593 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
8594 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
8595 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
8596 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
8597 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
8598 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
8599 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
8600 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
8601 * config/rs6000/rs6000-c.cc (find_instance): Add case
8602 RS6000_OVLD_VEC_REPLACE_UN.
8603 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
8604 Fix first argument type. Rename VREPLACE_UN_UV4SI as
8605 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
8606 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
8607 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
8608 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
8609 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
8610 REPLACE_ELT_V for vector modes.
8611 (REPLACE_ELT): New scalar mode iterator.
8612 (REPLACE_ELT_char): Add scalar attributes.
8613 (vreplace_un_<mode>): Change iterator and mode attribute.
8615 2023-07-26 David Malcolm <dmalcolm@redhat.com>
8618 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
8620 2023-07-26 Richard Biener <rguenther@suse.de>
8622 PR tree-optimization/106081
8623 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
8624 Assign layout -1 to splats.
8626 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8628 * range-op-mixed.h (class operator_cast): Add update_bitmask.
8629 * range-op.cc (operator_cast::update_bitmask): New.
8630 (operator_cast::fold_range): Call update_bitmask.
8632 2023-07-26 Li Xu <xuli1@eswincomputing.com>
8634 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
8635 scalar type to float16, eliminate warning.
8636 (vfloat16mf4x3_t): Ditto.
8637 (vfloat16mf4x4_t): Ditto.
8638 (vfloat16mf4x5_t): Ditto.
8639 (vfloat16mf4x6_t): Ditto.
8640 (vfloat16mf4x7_t): Ditto.
8641 (vfloat16mf4x8_t): Ditto.
8642 (vfloat16mf2x2_t): Ditto.
8643 (vfloat16mf2x3_t): Ditto.
8644 (vfloat16mf2x4_t): Ditto.
8645 (vfloat16mf2x5_t): Ditto.
8646 (vfloat16mf2x6_t): Ditto.
8647 (vfloat16mf2x7_t): Ditto.
8648 (vfloat16mf2x8_t): Ditto.
8649 (vfloat16m1x2_t): Ditto.
8650 (vfloat16m1x3_t): Ditto.
8651 (vfloat16m1x4_t): Ditto.
8652 (vfloat16m1x5_t): Ditto.
8653 (vfloat16m1x6_t): Ditto.
8654 (vfloat16m1x7_t): Ditto.
8655 (vfloat16m1x8_t): Ditto.
8656 (vfloat16m2x2_t): Ditto.
8657 (vfloat16m2x3_t): Ditto.
8658 (vfloat16m2x4_t): Ditto.
8659 (vfloat16m4x2_t): Ditto.
8660 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
8661 * config/riscv/vector.md: add tuple mode in attr sew.
8663 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
8666 * config/i386/i386.md (plusminusmult): New code iterator.
8667 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
8668 (movq_<mode>_to_sse): New expander.
8669 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
8670 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
8671 as a wrapper around V4SFmode operation.
8672 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
8673 nonimmediate_operand.
8674 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
8675 operand 2 predicates to nonimmediate_operand.
8676 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
8677 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
8678 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
8679 operand 2 predicates to nonimmediate_operand.
8680 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
8681 nonimmediate_operand.
8682 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
8683 operand 2 predicates to nonimmediate_operand.
8684 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
8685 (<smaxmin:code>v2sf3): Ditto.
8686 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
8687 predicates to nonimmediate_operand.
8688 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
8689 operand 1 and operand 2 predicates to nonimmediate_operand.
8690 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
8691 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
8692 (*mmx_haddv2sf3_low): Ditto.
8693 (*mmx_hsubv2sf3_low): Ditto.
8694 (vec_addsubv2sf3): Ditto.
8695 (*mmx_maskcmpv2sf3_comm): Remove.
8696 (*mmx_maskcmpv2sf3): Remove.
8697 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
8698 (vcond<V2FI:mode>v2sf): Ditto.
8703 (fix_truncv2sfv2si2): Ditto.
8704 (fixuns_truncv2sfv2si2): Ditto.
8705 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
8706 Change operand 1 predicate to nonimmediate_operand.
8707 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
8708 (floatunsv2siv2sf2): Ditto.
8709 (mmx_floatv2siv2sf2): Remove SSE alternatives.
8710 Change operand 1 predicate to nonimmediate_operand.
8711 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
8713 (lrintv2sfv2si2): Ditto.
8715 (lceilv2sfv2si2): Ditto.
8716 (floorv2sf2): Ditto.
8717 (lfloorv2sfv2si2): Ditto.
8718 (btruncv2sf2): Ditto.
8719 (roundv2sf2): Ditto.
8720 (lroundv2sfv2si2): Ditto.
8721 (*mmx_roundv2sf2): Remove.
8723 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
8725 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
8727 2023-07-26 Richard Biener <rguenther@suse.de>
8729 PR tree-optimization/110799
8730 * tree-ssa-pre.cc (compute_avail): More thoroughly match
8731 up TBAA behavior of redundant loads.
8733 2023-07-26 Jakub Jelinek <jakub@redhat.com>
8735 PR tree-optimization/110755
8736 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
8737 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
8738 it is exact op1 + (-op1) or op1 - op1.
8740 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
8743 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
8744 operands output with "x".
8746 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8748 * range-op.cc (class operator_absu): Add update_bitmask.
8749 (operator_absu::update_bitmask): New.
8751 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8753 * range-op-mixed.h (class operator_abs): Add update_bitmask.
8754 * range-op.cc (operator_abs::update_bitmask): New.
8756 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8758 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
8759 * range-op.cc (operator_bitwise_not::update_bitmask): New.
8761 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8763 * range-op.cc (update_known_bitmask): Handle unary operators.
8765 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
8767 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
8769 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
8771 * config/riscv/riscv.md: Likewise.
8773 2023-07-26 Jan Hubicka <jh@suse.cz>
8775 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
8776 if we divide by zero.
8778 2023-07-25 David Faust <david.faust@oracle.com>
8780 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
8781 enclosing parentheses for pseudo-C dialect.
8782 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
8783 operands of pseudo-C dialect output templates where needed.
8784 (zero_extendqidi2): Likewise.
8785 (zero_extendsidi2): Likewise.
8786 (*mov<MM:mode>): Likewise.
8788 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
8790 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
8791 (bit_value_mult_const): Same.
8792 (get_individual_bits): Same.
8794 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
8797 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
8798 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
8799 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
8800 (minmax_op): New int attribute.
8801 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
8802 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
8803 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
8805 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
8807 2023-07-24 David Faust <david.faust@oracle.com>
8809 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
8811 2023-07-24 Drew Ross <drross@redhat.com>
8812 Jakub Jelinek <jakub@redhat.com>
8814 PR middle-end/109986
8815 * generic-match-head.cc (bitwise_equal_p): New macro.
8816 * gimple-match-head.cc (bitwise_equal_p): New macro.
8817 (gimple_nop_convert): Declare.
8818 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
8819 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
8821 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
8823 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
8824 single quote rather than backquote in diagnostic.
8826 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
8829 * config/bpf/bpf.opt: New command-line option -msdiv.
8830 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
8831 * config/bpf/bpf.cc (bpf_option_override): Initialize
8833 * doc/invoke.texi (eBPF Options): Document -msdiv.
8835 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
8837 * config/riscv/riscv.cc (riscv_option_override): Spell out
8838 greater than and use cannot in diagnostic string.
8840 2023-07-24 Richard Biener <rguenther@suse.de>
8842 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
8843 (_slp_tree::vec_stmts): Remove.
8844 (SLP_TREE_VEC_STMTS): Remove.
8845 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
8846 (_slp_tree::_slp_tree): Adjust.
8847 (_slp_tree::~_slp_tree): Likewise.
8848 (vect_get_slp_vect_def): Simplify.
8849 (vect_get_slp_defs): Likewise.
8850 (vect_transform_slp_perm_load_1): Adjust.
8851 (vect_add_slp_permutation): Likewise.
8852 (vect_schedule_slp_node): Likewise.
8853 (vectorize_slp_instance_root_stmt): Likewise.
8854 (vect_schedule_scc): Likewise.
8855 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
8856 (vectorizable_call): Likewise.
8857 (vectorizable_call): Likewise.
8858 (vect_create_vectorized_demotion_stmts): Likewise.
8859 (vectorizable_conversion): Likewise.
8860 (vectorizable_assignment): Likewise.
8861 (vectorizable_shift): Likewise.
8862 (vectorizable_operation): Likewise.
8863 (vectorizable_load): Likewise.
8864 (vectorizable_condition): Likewise.
8865 (vectorizable_comparison): Likewise.
8866 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
8867 (vectorize_fold_left_reduction): Use push_vec_def.
8868 (vect_transform_reduction): Likewise.
8869 (vect_transform_cycle_phi): Likewise.
8870 (vectorizable_lc_phi): Likewise.
8871 (vectorizable_phi): Likewise.
8872 (vectorizable_recurr): Likewise.
8873 (vectorizable_induction): Likewise.
8874 (vectorizable_live_operation): Likewise.
8876 2023-07-24 Richard Biener <rguenther@suse.de>
8878 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
8880 2023-07-24 Richard Biener <rguenther@suse.de>
8882 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
8883 * config/i386/i386-expand.cc: Likewise.
8884 * config/i386/i386-features.cc: Likewise.
8885 * config/i386/i386-options.cc: Likewise.
8887 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
8889 * tree-vect-stmts.cc (vectorizable_conversion): Handle
8890 more demotion/promotion for modifier == NONE.
8892 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
8897 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
8898 (extzv<mode>): Likewise.
8899 (insv<mode>): Likewise.
8900 (*testqi_ext_3): Likewise.
8901 (*btr<mode>_2): Likewise.
8902 (define_split): Likewise.
8903 (*btsq_imm): Likewise.
8904 (*btrq_imm): Likewise.
8905 (*btcq_imm): Likewise.
8906 (define_peephole2 x3): Likewise.
8907 (*bt<mode>): Likewise
8908 (*bt<mode>_mask): New define_insn_and_split.
8909 (*jcc_bt<mode>): Use QImode for offsets.
8910 (*jcc_bt<mode>_1): Delete obsolete pattern.
8911 (*jcc_bt<mode>_mask): Use QImode offsets.
8912 (*jcc_bt<mode>_mask_1): Likewise.
8913 (define_split): Likewise.
8914 (*bt<mode>_setcqi): Likewise.
8915 (*bt<mode>_setncqi): Likewise.
8916 (*bt<mode>_setnc<mode>): Likewise.
8917 (*bt<mode>_setncqi_2): Likewise.
8918 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
8919 (bmi2_bzhi_<mode>3): Use QImode offsets.
8920 (*bmi2_bzhi_<mode>3): Likewise.
8921 (*bmi2_bzhi_<mode>3_1): Likewise.
8922 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
8923 (@tbm_bextri_<mode>): Likewise.
8925 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
8927 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
8928 * config/bpf/bpf.opt (mkernel): Remove option.
8929 * config/bpf/bpf.cc (bpf_target_macros): Do not define
8930 BPF_KERNEL_VERSION_CODE.
8932 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
8935 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
8936 (mbswap): New option.
8937 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
8938 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
8939 * config/bpf/bpf.md: Use bswap instructions if available for
8940 bswap* insn, and fix constraint.
8941 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
8943 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8945 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
8946 (mask_len_fold_left_plus_<mode>): Ditto.
8947 * config/riscv/riscv-protos.h (enum insn_type): New enum.
8948 (enum reduction_type): Ditto.
8949 (expand_reduction): Add in-order reduction.
8950 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
8951 (expand_reduction): Add in-order reduction.
8953 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8955 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
8956 (vectorize_fold_left_reduction): Ditto.
8957 (vectorizable_reduction): Ditto.
8958 (vect_transform_reduction): Ditto.
8960 2023-07-24 Richard Biener <rguenther@suse.de>
8962 PR tree-optimization/110777
8963 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
8964 Avoid propagating abnormals.
8966 2023-07-24 Richard Biener <rguenther@suse.de>
8968 PR tree-optimization/110766
8969 * tree-scalar-evolution.cc
8970 (analyze_and_compute_bitwise_induction_effect): Check the PHI
8971 is defined in the loop header.
8973 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
8975 PR tree-optimization/110740
8976 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
8977 loop with a single scalar iteration.
8979 2023-07-24 Pan Li <pan2.li@intel.com>
8981 * config/riscv/riscv-vector-builtins-shapes.cc
8982 (struct alu_frm_def): Take range check.
8984 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
8987 * config/riscv/predicates.md (const_0_operand): Add back
8990 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
8992 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
8993 64-bit insertions into TImode optimizations with -O0, unless
8994 the function has the "naked" attribute (for PR target/110533).
8996 2023-07-22 Andrew Pinski <apinski@marvell.com>
8999 * rtl.h (extended_count): Change last argument type
9002 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
9004 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
9005 (extzv<mode>): Likewise.
9006 (insv<mode>): Likewise.
9007 (*testqi_ext_3): Likewise.
9008 (*btr<mode>_2): Likewise.
9009 (define_split): Likewise.
9010 (*btsq_imm): Likewise.
9011 (*btrq_imm): Likewise.
9012 (*btcq_imm): Likewise.
9013 (define_peephole2 x3): Likewise.
9014 (*bt<mode>): Likewise
9015 (*bt<mode>_mask): New define_insn_and_split.
9016 (*jcc_bt<mode>): Use QImode for offsets.
9017 (*jcc_bt<mode>_1): Delete obsolete pattern.
9018 (*jcc_bt<mode>_mask): Use QImode offsets.
9019 (*jcc_bt<mode>_mask_1): Likewise.
9020 (define_split): Likewise.
9021 (*bt<mode>_setcqi): Likewise.
9022 (*bt<mode>_setncqi): Likewise.
9023 (*bt<mode>_setnc<mode>): Likewise.
9024 (*bt<mode>_setncqi_2): Likewise.
9025 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
9026 (bmi2_bzhi_<mode>3): Use QImode offsets.
9027 (*bmi2_bzhi_<mode>3): Likewise.
9028 (*bmi2_bzhi_<mode>3_1): Likewise.
9029 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
9030 (@tbm_bextri_<mode>): Likewise.
9032 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
9034 * config/bfin/bfin.md (ones): Fix length computation.
9036 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
9038 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
9039 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
9040 instead of FRAME_POINTER_REGNUM to spill pseudos.
9042 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
9043 Richard Biener <rguenther@suse.de>
9046 * gimplify.cc (gimplify_compound_lval): If the array's type
9047 is error_mark_node then return GS_ERROR.
9049 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
9052 * config/bpf/bpf.opt: Added option -masm=<dialect>.
9053 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
9054 * config/bpf/bpf.cc (bpf_print_register): New function.
9055 (bpf_print_register): Support pseudo-c syntax for registers.
9056 (bpf_print_operand_address): Likewise.
9057 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
9058 (ASSEMBLER_DIALECT): Define.
9059 * config/bpf/bpf.md: Added pseudo-c templates.
9060 * doc/invoke.texi (-masm=): New eBPF option item.
9062 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
9064 * config/bpf/bpf.md: fixed template for neg instruction.
9066 2023-07-21 Jan Hubicka <jh@suse.cz>
9069 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
9070 profiles by vectorization factor.
9071 (vect_transform_loop): Check for flat profiles.
9073 2023-07-21 Jan Hubicka <jh@suse.cz>
9075 * cfgloop.h (maybe_flat_loop_profile): Declare
9076 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
9077 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
9079 2023-07-21 Jan Hubicka <jh@suse.cz>
9081 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
9082 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
9083 * predict.cc (estimate_bb_frequencies): Likewise.
9084 * profile.cc (branch_prob): Likewise.
9085 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
9087 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
9089 * config.in: Regenerate.
9090 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
9091 (LINK_COMMAND_SPEC_A): Add demangle handling.
9092 * configure: Regenerate.
9093 * configure.ac: Detect linker support for '-demangle'.
9095 2023-07-21 Jan Hubicka <jh@suse.cz>
9097 * sreal.cc (sreal::to_nearest_int): New.
9098 (sreal_verify_basics): Verify also to_nearest_int.
9099 (verify_aritmetics): Likewise.
9100 (sreal_verify_conversions): New.
9101 (sreal_cc_tests): Call sreal_verify_conversions.
9102 * sreal.h: (sreal::to_nearest_int): Declare
9104 2023-07-21 Jan Hubicka <jh@suse.cz>
9106 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
9107 (should_duplicate_loop_header_p): Return info on profitability.
9108 (do_while_loop_p): Watch for constant conditionals.
9109 (update_profile_after_ch): Do not sanity check that all
9110 static exits are taken.
9111 (ch_base::copy_headers): Run on all loops.
9112 (pass_ch::process_loop_p): Improve heuristics by handling also
9113 do_while loop and duplicating shortest sequence containing all
9116 2023-07-21 Jan Hubicka <jh@suse.cz>
9118 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
9119 tests first; update finite_p flag.
9121 2023-07-21 Jan Hubicka <jh@suse.cz>
9123 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
9124 * cfgloop.h (print_loop_info): Declare.
9125 * tree-cfg.cc (print_loop_info): Break out from ...; add
9126 printing of missing fields and profile
9127 (print_loop): ... here.
9129 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9131 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
9133 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9135 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
9136 (vectorizable_operation): Ditto.
9138 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9140 * config/riscv/autovec.md: Align order of mask and len.
9141 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
9142 (expand_gather_scatter): Ditto.
9143 * doc/md.texi: Ditto.
9144 * internal-fn.cc (add_len_and_mask_args): Ditto.
9145 (add_mask_and_len_args): Ditto.
9146 (expand_partial_load_optab_fn): Ditto.
9147 (expand_partial_store_optab_fn): Ditto.
9148 (expand_scatter_store_optab_fn): Ditto.
9149 (expand_gather_load_optab_fn): Ditto.
9150 (internal_fn_len_index): Ditto.
9151 (internal_fn_mask_index): Ditto.
9152 (internal_len_load_store_bias): Ditto.
9153 * tree-vect-stmts.cc (vectorizable_store): Ditto.
9154 (vectorizable_load): Ditto.
9156 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9158 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
9159 (mask_len_load<mode><vm>): Ditto.
9160 (len_maskstore<mode><vm>): Ditto.
9161 (mask_len_store<mode><vm>): Ditto.
9162 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
9163 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
9164 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
9165 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
9166 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
9167 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
9168 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
9169 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
9170 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
9171 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
9172 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
9173 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
9174 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
9175 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
9176 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
9177 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
9178 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
9179 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
9180 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
9181 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
9182 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
9183 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
9184 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
9185 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
9186 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
9187 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
9188 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
9189 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
9190 * doc/md.texi: Ditto.
9191 * genopinit.cc (main): Ditto.
9192 (CMP_NAME): Ditto. Ditto.
9193 * gimple-fold.cc (arith_overflowed_p): Ditto.
9194 (gimple_fold_partial_load_store_mem_ref): Ditto.
9195 (gimple_fold_call): Ditto.
9196 * internal-fn.cc (len_maskload_direct): Ditto.
9197 (mask_len_load_direct): Ditto.
9198 (len_maskstore_direct): Ditto.
9199 (mask_len_store_direct): Ditto.
9200 (expand_call_mem_ref): Ditto.
9201 (expand_len_maskload_optab_fn): Ditto.
9202 (expand_mask_len_load_optab_fn): Ditto.
9203 (expand_len_maskstore_optab_fn): Ditto.
9204 (expand_mask_len_store_optab_fn): Ditto.
9205 (direct_len_maskload_optab_supported_p): Ditto.
9206 (direct_mask_len_load_optab_supported_p): Ditto.
9207 (direct_len_maskstore_optab_supported_p): Ditto.
9208 (direct_mask_len_store_optab_supported_p): Ditto.
9209 (internal_load_fn_p): Ditto.
9210 (internal_store_fn_p): Ditto.
9211 (internal_gather_scatter_fn_p): Ditto.
9212 (internal_fn_len_index): Ditto.
9213 (internal_fn_mask_index): Ditto.
9214 (internal_fn_stored_value_index): Ditto.
9215 (internal_len_load_store_bias): Ditto.
9216 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
9217 (MASK_LEN_GATHER_LOAD): Ditto.
9218 (LEN_MASK_LOAD): Ditto.
9219 (MASK_LEN_LOAD): Ditto.
9220 (LEN_MASK_SCATTER_STORE): Ditto.
9221 (MASK_LEN_SCATTER_STORE): Ditto.
9222 (LEN_MASK_STORE): Ditto.
9223 (MASK_LEN_STORE): Ditto.
9224 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
9225 (supports_vec_scatter_store_p): Ditto.
9226 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
9227 (target_supports_len_load_store_p): Ditto.
9228 * optabs.def (OPTAB_CD): Ditto.
9229 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
9230 (call_may_clobber_ref_p_1): Ditto.
9231 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
9232 (dse_optimize_stmt): Ditto.
9233 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
9234 (get_alias_ptr_type_for_ptr_address): Ditto.
9235 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
9236 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
9237 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
9238 (vect_get_strided_load_store_ops): Ditto.
9239 (vectorizable_store): Ditto.
9240 (vectorizable_load): Ditto.
9242 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
9244 * config/i386/i386.opt: Fix a typo.
9246 2023-07-21 Richard Biener <rguenther@suse.de>
9248 PR tree-optimization/88540
9249 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
9250 with NaNs but handle the simple case by if-converting to a
9253 2023-07-21 Andrew Pinski <apinski@marvell.com>
9255 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
9258 2023-07-21 Richard Biener <rguenther@suse.de>
9260 PR tree-optimization/110742
9261 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
9262 Do not materialize an edge permutation in an external node with
9264 (vect_slp_analyze_node_operations_1): Guard purely internal
9267 2023-07-21 Jan Hubicka <jh@suse.cz>
9269 * cfgloop.cc: Include sreal.h.
9270 (flow_loop_dump): Dump sreal iteration exsitmate.
9271 (get_estimated_loop_iterations): Update.
9272 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
9273 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
9274 (expected_loop_iterations_unbounded): Use new API.
9275 * cfgloopmanip.cc (scale_loop_profile): Use
9276 expected_loop_iterations_by_profile
9277 * predict.cc (pass_profile::execute): Likewise.
9278 * profile.cc (branch_prob): Likewise.
9279 * tree-ssa-loop-niter.cc: Include sreal.h.
9280 (estimate_numbers_of_iterations): Likewise
9282 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
9284 PR tree-optimization/110744
9285 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
9286 operand for ifn IFN_LEN_STORE.
9288 2023-07-21 liuhongt <hongtao.liu@intel.com>
9291 * common.opt: (fcf-protection=): Add EnumSet attribute to
9292 support combination of params.
9294 2023-07-21 David Malcolm <dmalcolm@redhat.com>
9296 PR middle-end/110612
9297 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
9299 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
9300 (table_geometry::table_y_to_canvas_y): Likewise.
9301 * text-art/table.h (table_geometry::m_table): Drop unused field.
9302 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
9305 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
9308 * config/i386/i386-features.cc
9309 (general_scalar_chain::compute_convert_gain): Calculate gain
9310 for extend higpart case.
9311 (general_scalar_chain::convert_op): Handle
9312 ASHIFTRT/ASHIFT combined RTX.
9313 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
9314 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
9315 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
9316 New define_insn_and_split pattern.
9317 (*extendv2di2_highpart_stv): Ditto.
9319 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
9321 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
9324 2023-07-20 Andrew Pinski <apinski@marvell.com>
9326 * combine.cc (dump_combine_stats): Remove.
9327 (dump_combine_total_stats): Remove.
9328 (total_attempts, total_merges, total_extras,
9329 total_successes): Remove.
9330 (combine_instructions): Don't increment total stats
9331 instead use statistics_counter_event.
9332 * dumpfile.cc (print_combine_total_stats): Remove.
9333 * dumpfile.h (print_combine_total_stats): Remove.
9334 (dump_combine_total_stats): Remove.
9335 * passes.cc (finish_optimization_passes):
9336 Don't call print_combine_total_stats.
9337 * rtl.h (dump_combine_total_stats): Remove.
9338 (dump_combine_stats): Remove.
9340 2023-07-20 Jan Hubicka <jh@suse.cz>
9342 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
9345 2023-07-20 Martin Jambor <mjambor@suse.cz>
9347 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
9348 (analyzer-text-art-ideal-canvas-width): Likewise.
9349 (analyzer-text-art-string-ellipsis-head-len): Likewise.
9350 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
9352 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9354 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
9355 Refine code structure.
9357 2023-07-20 Jan Hubicka <jh@suse.cz>
9359 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
9360 (get_range_query): ... this one; do
9361 (static_loop_exit): Add query parametr, turn ranger to reference.
9362 (loop_static_stmt_p): New function.
9363 (loop_static_op_p): New function.
9364 (loop_iv_derived_p): Remove.
9365 (loop_combined_static_and_iv_p): New function.
9366 (should_duplicate_loop_header_p): Discover combined onditionals;
9367 do not track iv derived; improve dumps.
9368 (pass_ch::execute): Fix whitespace.
9370 2023-07-20 Richard Biener <rguenther@suse.de>
9372 PR tree-optimization/110204
9373 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
9374 Look through copies generated by PRE.
9376 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
9378 * tree-vect-stmts.cc (get_group_load_store_type): Account for
9379 `gap` when checking if need to peel twice.
9381 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
9384 * doc/extend.texi: Document iseqsig builtin.
9385 * builtins.cc (fold_builtin_iseqsig): New function.
9386 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
9387 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
9388 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
9390 2023-07-20 Pan Li <pan2.li@intel.com>
9392 * config/riscv/vector.md: Fix incorrect match_operand.
9394 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
9396 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
9397 force_reg, to use SUBREG rather than create a new pseudo when
9398 inserting DFmode fields into TImode with insvti_{high,low}part.
9399 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
9400 define_insn_and_split...
9401 (*concatditi3_3): 64-bit implementation. Provide alternative
9402 that allows register allocation to use SSE registers that is
9403 split into vec_concatv2di after reload.
9404 (*concatsidi3_3): 32-bit implementation.
9406 2023-07-20 Richard Biener <rguenther@suse.de>
9409 * internal-fn.cc (expand_vec_cond_optab_fn): When the
9410 value operands are equal to the original comparison operands
9411 preserve that equality by re-using the comparison expansion.
9412 * optabs.cc (emit_conditional_move): When the value operands
9413 are equal to the comparison operands and would be forced to
9414 a register by prepare_cmp_insn do so earlier, preserving the
9417 2023-07-20 Pan Li <pan2.li@intel.com>
9419 * config/riscv/vector.md: Align pattern format.
9421 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
9423 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
9424 Granite Rapids{, D} from documentation.
9426 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9428 * config/riscv/autovec.md
9429 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
9430 Refactor RVV machine modes.
9431 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
9432 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
9433 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
9434 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
9435 (len_mask_gather_load<mode><mode>): Ditto.
9436 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
9437 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
9438 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
9439 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
9440 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
9441 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
9442 (len_mask_scatter_store<mode><mode>): Ditto.
9443 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
9444 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
9445 (ADJUST_NUNITS): Ditto.
9446 (ADJUST_ALIGNMENT): Ditto.
9447 (ADJUST_BYTESIZE): Ditto.
9448 (ADJUST_PRECISION): Ditto.
9450 (RVV_WHOLE_MODES): Ditto.
9451 (RVV_FRACT_MODE): Ditto.
9452 (RVV_NF8_MODES): Ditto.
9453 (RVV_NF4_MODES): Ditto.
9454 (VECTOR_MODES_WITH_PREFIX): Ditto.
9455 (VECTOR_MODE_WITH_PREFIX): Ditto.
9456 (RVV_TUPLE_MODES): Ditto.
9457 (RVV_NF2_MODES): Ditto.
9458 (RVV_TUPLE_PARTIAL_MODES): Ditto.
9459 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
9461 (TUPLE_ENTRY): Ditto.
9465 (preferred_simd_mode): Ditto.
9466 (autovectorize_vector_modes): Ditto.
9467 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
9468 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
9476 (vint8mf8_t): Ditto.
9477 (vuint8mf8_t): Ditto.
9478 (vint8mf4_t): Ditto.
9479 (vuint8mf4_t): Ditto.
9480 (vint8mf2_t): Ditto.
9481 (vuint8mf2_t): Ditto.
9483 (vuint8m1_t): Ditto.
9485 (vuint8m2_t): Ditto.
9487 (vuint8m4_t): Ditto.
9489 (vuint8m8_t): Ditto.
9490 (vint16mf4_t): Ditto.
9491 (vuint16mf4_t): Ditto.
9492 (vint16mf2_t): Ditto.
9493 (vuint16mf2_t): Ditto.
9494 (vint16m1_t): Ditto.
9495 (vuint16m1_t): Ditto.
9496 (vint16m2_t): Ditto.
9497 (vuint16m2_t): Ditto.
9498 (vint16m4_t): Ditto.
9499 (vuint16m4_t): Ditto.
9500 (vint16m8_t): Ditto.
9501 (vuint16m8_t): Ditto.
9502 (vint32mf2_t): Ditto.
9503 (vuint32mf2_t): Ditto.
9504 (vint32m1_t): Ditto.
9505 (vuint32m1_t): Ditto.
9506 (vint32m2_t): Ditto.
9507 (vuint32m2_t): Ditto.
9508 (vint32m4_t): Ditto.
9509 (vuint32m4_t): Ditto.
9510 (vint32m8_t): Ditto.
9511 (vuint32m8_t): Ditto.
9512 (vint64m1_t): Ditto.
9513 (vuint64m1_t): Ditto.
9514 (vint64m2_t): Ditto.
9515 (vuint64m2_t): Ditto.
9516 (vint64m4_t): Ditto.
9517 (vuint64m4_t): Ditto.
9518 (vint64m8_t): Ditto.
9519 (vuint64m8_t): Ditto.
9520 (vfloat16mf4_t): Ditto.
9521 (vfloat16mf2_t): Ditto.
9522 (vfloat16m1_t): Ditto.
9523 (vfloat16m2_t): Ditto.
9524 (vfloat16m4_t): Ditto.
9525 (vfloat16m8_t): Ditto.
9526 (vfloat32mf2_t): Ditto.
9527 (vfloat32m1_t): Ditto.
9528 (vfloat32m2_t): Ditto.
9529 (vfloat32m4_t): Ditto.
9530 (vfloat32m8_t): Ditto.
9531 (vfloat64m1_t): Ditto.
9532 (vfloat64m2_t): Ditto.
9533 (vfloat64m4_t): Ditto.
9534 (vfloat64m8_t): Ditto.
9535 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
9536 (TUPLE_ENTRY): Ditto.
9537 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
9538 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
9539 (riscv_v_adjust_nunits): Ditto.
9540 (riscv_v_adjust_bytesize): Ditto.
9541 (riscv_v_adjust_precision): Ditto.
9542 (riscv_convert_vector_bits): Ditto.
9543 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
9544 * config/riscv/riscv.md: Ditto.
9545 * config/riscv/vector-iterators.md: Ditto.
9546 * config/riscv/vector.md
9547 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
9548 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
9549 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
9550 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
9551 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
9552 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
9553 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
9554 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
9555 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
9556 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
9557 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
9558 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
9559 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
9560 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
9561 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
9562 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
9563 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
9564 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
9565 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
9566 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
9567 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
9568 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
9569 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
9570 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
9571 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
9572 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
9573 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
9574 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
9575 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
9576 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
9577 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
9578 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
9579 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
9581 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
9583 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
9584 (lra_asm_insn_error): New prototype.
9585 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
9587 (lra_spill): Call lra_update_fp2sp_elimination.
9588 * lra-eliminations.cc: Remove trailing spaces.
9589 (elimination_fp2sp_occured_p): New static flag.
9590 (lra_eliminate_regs_1): Set the flag up.
9591 (update_reg_eliminate): Modify the assert for stack to frame
9592 pointer elimination.
9593 (lra_update_fp2sp_elimination): New function.
9594 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
9596 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
9598 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
9600 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
9601 dependencies from target pragmas.
9602 * config/aarch64/arm_fp16.h (target): Likewise.
9603 * config/aarch64/arm_neon.h (target): Likewise.
9605 2023-07-19 Andrew Pinski <apinski@marvell.com>
9607 PR tree-optimization/110252
9608 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
9609 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
9610 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
9611 (match_simplify_replacement): Temporarily
9612 remove the flow sensitive info on the two statements that might
9615 2023-07-19 Andrew Pinski <apinski@marvell.com>
9617 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
9618 with flow_sensitive_info_storage.
9619 (follow_outer_ssa_edges): Update how to save off the flow
9621 (maybe_fold_comparisons_from_match_pd): Update restoring
9622 of flow sensitive info.
9623 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
9624 (flow_sensitive_info_storage::restore): New method.
9625 (flow_sensitive_info_storage::save_and_clear): New method.
9626 (flow_sensitive_info_storage::clear_storage): New method.
9627 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
9629 2023-07-19 Andrew Pinski <apinski@marvell.com>
9631 PR tree-optimization/110726
9632 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
9633 Add checks to make sure the type was one bit precision
9636 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9638 * doc/md.texi: Add mask_len_fold_left_plus.
9639 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
9640 (expand_mask_len_fold_left_optab_fn): Ditto.
9641 (direct_mask_len_fold_left_optab_supported_p): Ditto.
9642 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
9643 * optabs.def (OPTAB_D): Ditto.
9645 2023-07-19 Jakub Jelinek <jakub@redhat.com>
9647 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
9649 2023-07-19 Jakub Jelinek <jakub@redhat.com>
9651 PR tree-optimization/110731
9652 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
9653 divisor as UNSIGNED regardless of sgn.
9655 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
9657 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
9658 (standard_extensions_p): Add check.
9659 (riscv_subset_list::add): Just return NULL if it failed before.
9660 (riscv_subset_list::parse_std_ext): Continue parse when find a error
9661 (riscv_subset_list::parse): Just return NULL if it failed before.
9662 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
9664 2023-07-19 Jan Beulich <jbeulich@suse.com>
9666 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
9668 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
9670 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
9671 gen_vec_interleave_low. Rename local variable.
9673 2023-07-19 Jan Beulich <jbeulich@suse.com>
9675 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
9676 alternative. Move AVX512VL part of condition to new "enabled"
9679 2023-07-19 liuhongt <hongtao.liu@intel.com>
9682 * config/i386/i386-builtins.cc
9683 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
9684 (ix86_register_bf16_builtin_type): Ditto.
9685 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
9686 isn't available, undef the macros which are used to check the
9687 backend support of the _Float16/__bf16 types when building
9688 libstdc++ and libgcc.
9689 * config/i386/i386.cc (construct_container): Issue errors for
9690 HFmode/BFmode when TARGET_SSE2 is not available.
9691 (function_value_32): Ditto.
9692 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
9693 (ix86_libgcc_floating_mode_supported_p): Ditto.
9694 (ix86_emit_support_tinfos): Adjust codes.
9695 (ix86_invalid_conversion): Return diagnostic message string
9696 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
9697 (ix86_invalid_unary_op): New function.
9698 (ix86_invalid_binary_op): Ditto.
9699 (TARGET_INVALID_UNARY_OP): Define.
9700 (TARGET_INVALID_BINARY_OP): Define.
9701 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
9702 related instrinsics header files.
9703 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
9705 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
9707 * dwarf2asm.cc: Change FALSE to false.
9708 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
9709 * dwarf2out.cc (matches_main_base): Change return type from
9710 int to bool. Change "last_match" variable to bool.
9711 (dump_struct_debug): Change return type from int to bool.
9712 Change "matches" and "result" function arguments to bool.
9713 (is_pseudo_reg): Change return type from int to bool.
9714 (is_tagged_type): Ditto.
9715 (same_loc_p): Ditto.
9716 (same_dw_val_p): Change return type from int to bool and adjust
9717 function body accordingly.
9718 (same_attr_p): Ditto.
9719 (same_die_p): Ditto.
9720 (is_type_die): Ditto.
9721 (is_declaration_die): Ditto.
9722 (should_move_die_to_comdat): Ditto.
9723 (is_base_type): Ditto.
9724 (is_based_loc): Ditto.
9725 (local_scope_p): Ditto.
9726 (class_scope_p): Ditto.
9727 (class_or_namespace_scope_p): Ditto.
9728 (is_tagged_type): Ditto.
9729 (is_rust): Use void argument.
9730 (is_nested_in_subprogram): Change return type from int to bool.
9731 (contains_subprogram_definition): Ditto.
9732 (gen_struct_or_union_type_die): Change "nested", "complete"
9733 and "ns_decl" variables to bool.
9734 (is_naming_typedef_decl): Change FALSE to false.
9736 2023-07-18 Jan Hubicka <jh@suse.cz>
9738 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
9739 for queries not in headers.
9740 (static_loop_exit): Add basic blck parameter; update use of
9742 (should_duplicate_loop_header_p): Add ranger and static_exits
9743 parameter. Do not account statements that will be optimized
9744 out after duplicaiton in overall size. Add ranger query to
9746 (update_profile_after_ch): Take static_exits has set instead of
9747 single eliminated_edge.
9748 (ch_base::copy_headers): Do all analysis in the first pass;
9749 remember invariant_exits and static_exits.
9751 2023-07-18 Jason Merrill <jason@redhat.com>
9753 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
9755 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
9757 * doc/gm2.texi (Semantic checking): Change example testwithptr
9760 2023-07-18 Richard Biener <rguenther@suse.de>
9762 PR middle-end/105715
9763 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
9764 (pass_gimple_isel::execute): ... this. Duplicate
9765 comparison defs of COND_EXPRs.
9767 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9769 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
9770 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
9771 (riscv_convert_vector_bits): Ditto.
9773 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9775 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
9776 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
9778 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
9780 * config/s390/vx-builtins.md: New vsel pattern.
9782 2023-07-18 liuhongt <hongtao.liu@intel.com>
9785 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
9786 Remove # from assemble output.
9788 2023-07-18 liuhongt <hongtao.liu@intel.com>
9791 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
9792 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
9793 3 define_peephole2 after the pattern.
9795 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
9797 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
9799 2023-07-18 Pan Li <pan2.li@intel.com>
9800 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9802 * config/riscv/riscv.cc (struct machine_function): Add new field.
9803 (riscv_static_frm_mode_p): New function.
9804 (riscv_emit_frm_mode_set): New function for emit FRM.
9805 (riscv_emit_mode_set): Extract function for FRM.
9806 (riscv_mode_needed): Fix the TODO.
9807 (riscv_mode_entry): Initial dynamic frm RTL.
9808 (riscv_mode_exit): Return DYN_EXIT.
9809 * config/riscv/riscv.md: Add rdfrm.
9810 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
9811 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
9813 (fsrmsi_backup): New pattern for swap.
9814 (fsrmsi_restore): New pattern for restore.
9815 (fsrmsi_restore_exit): New pattern for restore exit.
9816 (frrmsi): New pattern for backup.
9818 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
9820 * doc/extend.texi: Add @cindex on __auto_type.
9822 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
9824 * combine-stack-adj.cc (stack_memref_p): Change return type from
9825 int to bool and adjust function body accordingly.
9826 (rest_of_handle_stack_adjustments): Change return type to void.
9828 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
9830 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
9831 (cant_combine_insn_p): Change return type from int to bool and adjust
9832 function body accordingly.
9833 (can_combine_p): Ditto.
9834 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
9835 function arguments from int to bool.
9836 (contains_muldiv): Change return type from int to bool and adjust
9837 function body accordingly.
9838 (try_combine): Ditto. Change "new_direct_jump" pointer function
9839 argument from int to bool. Change "substed_i2", "substed_i1",
9840 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
9841 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
9842 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
9843 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
9844 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
9845 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
9847 (subst): Change "in_dest", "in_cond" and "unique_copy" function
9848 arguments from int to bool.
9849 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
9850 arguments from int to bool.
9851 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
9852 function argument from int to bool.
9853 (force_int_to_mode): Change "just_select" function argument
9854 from int to bool. Change "next_select" variable to bool.
9855 (rtx_equal_for_field_assignment_p): Change return type from
9856 int to bool and adjust function body accordingly.
9857 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
9858 argument from int to bool.
9859 (get_last_value_validate): Change return type from int to bool
9860 and adjust function body accordingly.
9861 (reg_dead_at_p): Ditto.
9862 (reg_bitfield_target_p): Ditto.
9863 (combine_instructions): Ditto. Change "new_direct_jump"
9865 (can_combine_p): Change return type from int to bool
9866 and adjust function body accordingly.
9867 (likely_spilled_retval_p): Ditto.
9868 (can_change_dest_mode): Change "added_sets" function argument
9870 (find_split_point): Change "unsignedp" variable to bool.
9871 (simplify_if_then_else): Change "comparison_p" and "swapped"
9873 (simplify_set): Change "other_changed" variable to bool.
9874 (expand_compound_operation): Change "unsignedp" variable to bool.
9875 (force_to_mode): Change "just_select" function argument
9876 from int to bool. Change "next_select" variable to bool.
9877 (extended_count): Change "unsignedp" function argument to bool.
9878 (simplify_shift_const_1): Change "complement_p" variable to bool.
9879 (simplify_comparison): Change "changed" variable to bool.
9880 (rest_of_handle_combine): Change return type to void.
9882 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
9885 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
9887 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
9889 * ira.cc (setup_reg_class_relations): Continue
9890 if regclass cl3 is hard_reg_set_empty_p.
9892 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9894 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
9896 2023-07-17 Martin Jambor <mjambor@suse.cz>
9898 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
9901 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
9903 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
9905 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
9908 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
9909 recur add all implied extensions.
9910 (riscv_subset_list::check_implied_ext): Add new method.
9911 (riscv_subset_list::parse): Call checker check_implied_ext.
9912 * config/riscv/riscv-subset.h: Add new method.
9914 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9916 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
9917 (reduc_smax_scal_<mode>): Ditto.
9918 (reduc_umax_scal_<mode>): Ditto.
9919 (reduc_smin_scal_<mode>): Ditto.
9920 (reduc_umin_scal_<mode>): Ditto.
9921 (reduc_and_scal_<mode>): Ditto.
9922 (reduc_ior_scal_<mode>): Ditto.
9923 (reduc_xor_scal_<mode>): Ditto.
9924 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
9925 (expand_reduction): New function.
9926 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
9927 (emit_vlmax_fp_reduction_insn): Ditto.
9928 (get_m1_mode): Ditto.
9929 (expand_cond_len_binop): Fix name.
9930 (expand_reduction): New function
9931 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
9932 (validate_change_or_fail): New function.
9933 (change_insn): Fix VSETVL BUG.
9934 (change_vsetvl_insn): Ditto.
9935 (pass_vsetvl::backward_demand_fusion): Ditto.
9936 (pass_vsetvl::df_post_optimization): Ditto.
9938 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
9940 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
9942 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
9944 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
9945 Remove parameter name from declaration of unused parameter.
9947 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
9949 PR tree-optimization/110652
9950 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
9953 2023-07-17 Richard Biener <rguenther@suse.de>
9955 PR tree-optimization/110669
9956 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
9957 Check we matched a header PHI.
9959 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
9961 * tree-ssanames.cc (set_bitmask): New.
9962 * tree-ssanames.h (set_bitmask): New.
9964 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
9966 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
9968 * value-range.h (irange_bitmask::union_): Normalize beforehand.
9969 (irange_bitmask::intersect): Same.
9971 2023-07-17 Andrew Pinski <apinski@marvell.com>
9973 PR tree-optimization/95923
9974 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
9976 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
9978 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
9979 to the std::sort comparison lambda function const.
9981 2023-07-17 Andrew Pinski <apinski@marvell.com>
9983 PR tree-optimization/110666
9984 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
9986 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
9988 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
9989 Arrow Lake and Arrow Lake S.
9990 * common/config/i386/i386-common.cc:
9991 (processor_name): Add arrowlake.
9992 (processor_alias_table): Add arrow lake, arrow lake s and lunar
9994 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
9995 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
9996 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
9997 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
9999 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
10001 * config/i386/i386-options.cc (m_ARROWLAKE): New.
10002 (processor_cost_table): Add arrowlake.
10003 * config/i386/i386.h (enum processor_type):
10004 Add PROCESSOR_ARROWLAKE.
10005 * config/i386/x86-tune.def: Add m_ARROWLAKE.
10006 * doc/extend.texi: Add arrowlake and arrowlake-s.
10007 * doc/invoke.texi: Ditto.
10009 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10011 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
10012 have the same iterator. Also renaming all the occurence to
10014 (usdot_prod<mode>): New define_expand.
10015 (udot_prod<mode>): Ditto.
10017 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10019 * common/config/i386/cpuinfo.h (get_available_features):
10021 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
10022 OPTION_MASK_ISA2_SM4_UNSET): New.
10023 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
10024 (ix86_handle_option): Handle -msm4.
10025 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10027 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10029 * config.gcc: Add sm4intrin.h.
10030 * config/i386/cpuid.h (bit_SM4): New.
10031 * config/i386/i386-builtin.def (BDESC): Add new builtins.
10032 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10034 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
10035 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
10036 (ix86_valid_target_attribute_inner_p): Handle sm4.
10037 * config/i386/i386.opt: Add option -msm4.
10038 * config/i386/immintrin.h: Include sm4intrin.h
10039 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
10040 (vsm4rnds4_<mode>): Ditto.
10041 * doc/extend.texi: Document sm4.
10042 * doc/invoke.texi: Document -msm4.
10043 * doc/sourcebuild.texi: Document target sm4.
10044 * config/i386/sm4intrin.h: New file.
10046 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10048 * common/config/i386/cpuinfo.h (get_available_features):
10050 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
10051 OPTION_MASK_ISA2_SHA512_UNSET): New.
10052 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
10053 (ix86_handle_option): Handle -msha512.
10054 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10055 Add FEATURE_SHA512.
10056 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10058 * config.gcc: Add sha512intrin.h.
10059 * config/i386/cpuid.h (bit_SHA512): New.
10060 * config/i386/i386-builtin-types.def:
10061 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
10062 * config/i386/i386-builtin.def (BDESC): Add new builtins.
10063 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10065 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
10066 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
10067 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
10068 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
10069 (ix86_valid_target_attribute_inner_p): Handle sha512.
10070 * config/i386/i386.opt: Add option -msha512.
10071 * config/i386/immintrin.h: Include sha512intrin.h.
10072 * config/i386/sse.md (vsha512msg1): New define insn.
10073 (vsha512msg2): Ditto.
10074 (vsha512rnds2): Ditto.
10075 * doc/extend.texi: Document sha512.
10076 * doc/invoke.texi: Document -msha512.
10077 * doc/sourcebuild.texi: Document target sha512.
10078 * config/i386/sha512intrin.h: New file.
10080 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
10082 * common/config/i386/cpuinfo.h (get_available_features):
10084 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
10085 OPTION_MASK_ISA2_SM3_UNSET): New.
10086 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
10087 (ix86_handle_option): Handle -msm3.
10088 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10090 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10092 * config.gcc: Add sm3intrin.h
10093 * config/i386/cpuid.h (bit_SM3): New.
10094 * config/i386/i386-builtin-types.def:
10095 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
10096 * config/i386/i386-builtin.def (BDESC): Add new builtins.
10097 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10099 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
10100 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
10101 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
10102 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
10103 (ix86_valid_target_attribute_inner_p): Handle sm3.
10104 * config/i386/i386.opt: Add option -msm3.
10105 * config/i386/immintrin.h: Include sm3intrin.h.
10106 * config/i386/sse.md (vsm3msg1): New define insn.
10108 (vsm3rnds2): Ditto.
10109 * doc/extend.texi: Document sm3.
10110 * doc/invoke.texi: Document -msm3.
10111 * doc/sourcebuild.texi: Document target sm3.
10112 * config/i386/sm3intrin.h: New file.
10114 2023-07-17 Kong Lingling <lingling.kong@intel.com>
10115 Haochen Jiang <haochen.jiang@intel.com>
10117 * common/config/i386/cpuinfo.h (get_available_features): Detect
10119 * common/config/i386/i386-common.cc
10120 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
10121 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
10122 (ix86_handle_option): Handle -mavxvnniint16.
10123 * common/config/i386/i386-cpuinfo.h (enum processor_features):
10124 Add FEATURE_AVXVNNIINT16.
10125 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
10127 * config.gcc: Add avxvnniint16.h.
10128 * config/i386/avxvnniint16intrin.h: New file.
10129 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
10130 * config/i386/i386-builtin.def: Add new builtins.
10131 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
10133 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
10134 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
10135 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
10136 * config/i386/i386.opt: Add option -mavxvnniint16.
10137 * config/i386/immintrin.h: Include avxvnniint16.h.
10138 * config/i386/sse.md
10139 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
10140 * doc/extend.texi: Document avxvnniint16.
10141 * doc/invoke.texi: Document -mavxvnniint16.
10142 * doc/sourcebuild.texi: Document target avxvnniint16.
10144 2023-07-16 Jan Hubicka <jh@suse.cz>
10146 PR middle-end/110649
10147 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
10148 (vect_transform_loop): Move scale_profile_for_vect_loop after
10149 upper bound updates.
10151 2023-07-16 Jan Hubicka <jh@suse.cz>
10153 PR tree-optimization/110649
10154 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
10155 probability of the if-then-else construct.
10157 2023-07-16 Jan Hubicka <jh@suse.cz>
10159 PR middle-end/110649
10160 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
10162 2023-07-15 Andrew Pinski <apinski@marvell.com>
10164 * doc/contrib.texi: Update my entry.
10166 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
10168 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
10170 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
10171 (tld_load): Likewise.
10172 (tgd_load_pic): Change to expander.
10173 (tld_load_pic, tld_offset_load, tp_load): Likewise.
10174 (tie_load_pic, tle_load): Likewise.
10175 (tgd_load_picsi, tgd_load_picdi): New.
10176 (tld_load_picsi, tld_load_picdi): New.
10177 (tld_offset_load<P:mode>): New.
10178 (tp_load<P:mode>): New.
10179 (tie_load_picsi, tie_load_picdi): New.
10180 (tle_load<P:mode>): New.
10182 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10184 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
10185 (vcmlaq_rot180, vcmlaq_rot270): New.
10186 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
10187 (vcmlaq_rot180, vcmlaq_rot270): New.
10188 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
10189 (vcmlaq_rot180, vcmlaq_rot270): New.
10190 * config/arm/arm-mve-builtins.cc
10191 (function_instance::has_inactive_argument): Handle vcmlaq,
10192 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
10193 * config/arm/arm_mve.h (vcmlaq): Delete.
10194 (vcmlaq_rot180): Delete.
10195 (vcmlaq_rot270): Delete.
10196 (vcmlaq_rot90): Delete.
10197 (vcmlaq_m): Delete.
10198 (vcmlaq_rot180_m): Delete.
10199 (vcmlaq_rot270_m): Delete.
10200 (vcmlaq_rot90_m): Delete.
10201 (vcmlaq_f16): Delete.
10202 (vcmlaq_rot180_f16): Delete.
10203 (vcmlaq_rot270_f16): Delete.
10204 (vcmlaq_rot90_f16): Delete.
10205 (vcmlaq_f32): Delete.
10206 (vcmlaq_rot180_f32): Delete.
10207 (vcmlaq_rot270_f32): Delete.
10208 (vcmlaq_rot90_f32): Delete.
10209 (vcmlaq_m_f32): Delete.
10210 (vcmlaq_m_f16): Delete.
10211 (vcmlaq_rot180_m_f32): Delete.
10212 (vcmlaq_rot180_m_f16): Delete.
10213 (vcmlaq_rot270_m_f32): Delete.
10214 (vcmlaq_rot270_m_f16): Delete.
10215 (vcmlaq_rot90_m_f32): Delete.
10216 (vcmlaq_rot90_m_f16): Delete.
10217 (__arm_vcmlaq_f16): Delete.
10218 (__arm_vcmlaq_rot180_f16): Delete.
10219 (__arm_vcmlaq_rot270_f16): Delete.
10220 (__arm_vcmlaq_rot90_f16): Delete.
10221 (__arm_vcmlaq_f32): Delete.
10222 (__arm_vcmlaq_rot180_f32): Delete.
10223 (__arm_vcmlaq_rot270_f32): Delete.
10224 (__arm_vcmlaq_rot90_f32): Delete.
10225 (__arm_vcmlaq_m_f32): Delete.
10226 (__arm_vcmlaq_m_f16): Delete.
10227 (__arm_vcmlaq_rot180_m_f32): Delete.
10228 (__arm_vcmlaq_rot180_m_f16): Delete.
10229 (__arm_vcmlaq_rot270_m_f32): Delete.
10230 (__arm_vcmlaq_rot270_m_f16): Delete.
10231 (__arm_vcmlaq_rot90_m_f32): Delete.
10232 (__arm_vcmlaq_rot90_m_f16): Delete.
10233 (__arm_vcmlaq): Delete.
10234 (__arm_vcmlaq_rot180): Delete.
10235 (__arm_vcmlaq_rot270): Delete.
10236 (__arm_vcmlaq_rot90): Delete.
10237 (__arm_vcmlaq_m): Delete.
10238 (__arm_vcmlaq_rot180_m): Delete.
10239 (__arm_vcmlaq_rot270_m): Delete.
10240 (__arm_vcmlaq_rot90_m): Delete.
10242 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10244 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
10245 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
10246 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
10247 (mve_insn): Add vcmla.
10248 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
10250 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
10252 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
10253 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
10254 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
10255 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
10257 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
10259 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10261 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
10262 (vcmulq_rot180, vcmulq_rot270): New.
10263 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
10264 (vcmulq_rot180, vcmulq_rot270): New.
10265 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
10266 (vcmulq_rot180, vcmulq_rot270): New.
10267 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
10268 (vcmulq_rot270): Delete.
10269 (vcmulq_rot180): Delete.
10271 (vcmulq_m): Delete.
10272 (vcmulq_rot180_m): Delete.
10273 (vcmulq_rot270_m): Delete.
10274 (vcmulq_rot90_m): Delete.
10275 (vcmulq_x): Delete.
10276 (vcmulq_rot90_x): Delete.
10277 (vcmulq_rot180_x): Delete.
10278 (vcmulq_rot270_x): Delete.
10279 (vcmulq_rot90_f16): Delete.
10280 (vcmulq_rot270_f16): Delete.
10281 (vcmulq_rot180_f16): Delete.
10282 (vcmulq_f16): Delete.
10283 (vcmulq_rot90_f32): Delete.
10284 (vcmulq_rot270_f32): Delete.
10285 (vcmulq_rot180_f32): Delete.
10286 (vcmulq_f32): Delete.
10287 (vcmulq_m_f32): Delete.
10288 (vcmulq_m_f16): Delete.
10289 (vcmulq_rot180_m_f32): Delete.
10290 (vcmulq_rot180_m_f16): Delete.
10291 (vcmulq_rot270_m_f32): Delete.
10292 (vcmulq_rot270_m_f16): Delete.
10293 (vcmulq_rot90_m_f32): Delete.
10294 (vcmulq_rot90_m_f16): Delete.
10295 (vcmulq_x_f16): Delete.
10296 (vcmulq_x_f32): Delete.
10297 (vcmulq_rot90_x_f16): Delete.
10298 (vcmulq_rot90_x_f32): Delete.
10299 (vcmulq_rot180_x_f16): Delete.
10300 (vcmulq_rot180_x_f32): Delete.
10301 (vcmulq_rot270_x_f16): Delete.
10302 (vcmulq_rot270_x_f32): Delete.
10303 (__arm_vcmulq_rot90_f16): Delete.
10304 (__arm_vcmulq_rot270_f16): Delete.
10305 (__arm_vcmulq_rot180_f16): Delete.
10306 (__arm_vcmulq_f16): Delete.
10307 (__arm_vcmulq_rot90_f32): Delete.
10308 (__arm_vcmulq_rot270_f32): Delete.
10309 (__arm_vcmulq_rot180_f32): Delete.
10310 (__arm_vcmulq_f32): Delete.
10311 (__arm_vcmulq_m_f32): Delete.
10312 (__arm_vcmulq_m_f16): Delete.
10313 (__arm_vcmulq_rot180_m_f32): Delete.
10314 (__arm_vcmulq_rot180_m_f16): Delete.
10315 (__arm_vcmulq_rot270_m_f32): Delete.
10316 (__arm_vcmulq_rot270_m_f16): Delete.
10317 (__arm_vcmulq_rot90_m_f32): Delete.
10318 (__arm_vcmulq_rot90_m_f16): Delete.
10319 (__arm_vcmulq_x_f16): Delete.
10320 (__arm_vcmulq_x_f32): Delete.
10321 (__arm_vcmulq_rot90_x_f16): Delete.
10322 (__arm_vcmulq_rot90_x_f32): Delete.
10323 (__arm_vcmulq_rot180_x_f16): Delete.
10324 (__arm_vcmulq_rot180_x_f32): Delete.
10325 (__arm_vcmulq_rot270_x_f16): Delete.
10326 (__arm_vcmulq_rot270_x_f32): Delete.
10327 (__arm_vcmulq_rot90): Delete.
10328 (__arm_vcmulq_rot270): Delete.
10329 (__arm_vcmulq_rot180): Delete.
10330 (__arm_vcmulq): Delete.
10331 (__arm_vcmulq_m): Delete.
10332 (__arm_vcmulq_rot180_m): Delete.
10333 (__arm_vcmulq_rot270_m): Delete.
10334 (__arm_vcmulq_rot90_m): Delete.
10335 (__arm_vcmulq_x): Delete.
10336 (__arm_vcmulq_rot90_x): Delete.
10337 (__arm_vcmulq_rot180_x): Delete.
10338 (__arm_vcmulq_rot270_x): Delete.
10340 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10342 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
10343 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
10344 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
10345 (MVE_VCADDQ_VCMULQ_M): New.
10346 (mve_insn): Add vcmul.
10347 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
10350 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
10352 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
10353 @mve_<mve_insn>q<mve_rot>_f<mode>.
10354 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
10355 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
10356 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
10358 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10360 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
10361 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
10362 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
10363 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
10364 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
10365 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
10366 * config/arm/arm-mve-builtins-functions.h (class
10367 unspec_mve_function_exact_insn_rot): New.
10368 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
10369 (vcaddq_rot270): Delete.
10370 (vhcaddq_rot90): Delete.
10371 (vhcaddq_rot270): Delete.
10372 (vcaddq_rot270_m): Delete.
10373 (vcaddq_rot90_m): Delete.
10374 (vhcaddq_rot270_m): Delete.
10375 (vhcaddq_rot90_m): Delete.
10376 (vcaddq_rot90_x): Delete.
10377 (vcaddq_rot270_x): Delete.
10378 (vhcaddq_rot90_x): Delete.
10379 (vhcaddq_rot270_x): Delete.
10380 (vcaddq_rot90_u8): Delete.
10381 (vcaddq_rot270_u8): Delete.
10382 (vhcaddq_rot90_s8): Delete.
10383 (vhcaddq_rot270_s8): Delete.
10384 (vcaddq_rot90_s8): Delete.
10385 (vcaddq_rot270_s8): Delete.
10386 (vcaddq_rot90_u16): Delete.
10387 (vcaddq_rot270_u16): Delete.
10388 (vhcaddq_rot90_s16): Delete.
10389 (vhcaddq_rot270_s16): Delete.
10390 (vcaddq_rot90_s16): Delete.
10391 (vcaddq_rot270_s16): Delete.
10392 (vcaddq_rot90_u32): Delete.
10393 (vcaddq_rot270_u32): Delete.
10394 (vhcaddq_rot90_s32): Delete.
10395 (vhcaddq_rot270_s32): Delete.
10396 (vcaddq_rot90_s32): Delete.
10397 (vcaddq_rot270_s32): Delete.
10398 (vcaddq_rot90_f16): Delete.
10399 (vcaddq_rot270_f16): Delete.
10400 (vcaddq_rot90_f32): Delete.
10401 (vcaddq_rot270_f32): Delete.
10402 (vcaddq_rot270_m_s8): Delete.
10403 (vcaddq_rot270_m_s32): Delete.
10404 (vcaddq_rot270_m_s16): Delete.
10405 (vcaddq_rot270_m_u8): Delete.
10406 (vcaddq_rot270_m_u32): Delete.
10407 (vcaddq_rot270_m_u16): Delete.
10408 (vcaddq_rot90_m_s8): Delete.
10409 (vcaddq_rot90_m_s32): Delete.
10410 (vcaddq_rot90_m_s16): Delete.
10411 (vcaddq_rot90_m_u8): Delete.
10412 (vcaddq_rot90_m_u32): Delete.
10413 (vcaddq_rot90_m_u16): Delete.
10414 (vhcaddq_rot270_m_s8): Delete.
10415 (vhcaddq_rot270_m_s32): Delete.
10416 (vhcaddq_rot270_m_s16): Delete.
10417 (vhcaddq_rot90_m_s8): Delete.
10418 (vhcaddq_rot90_m_s32): Delete.
10419 (vhcaddq_rot90_m_s16): Delete.
10420 (vcaddq_rot270_m_f32): Delete.
10421 (vcaddq_rot270_m_f16): Delete.
10422 (vcaddq_rot90_m_f32): Delete.
10423 (vcaddq_rot90_m_f16): Delete.
10424 (vcaddq_rot90_x_s8): Delete.
10425 (vcaddq_rot90_x_s16): Delete.
10426 (vcaddq_rot90_x_s32): Delete.
10427 (vcaddq_rot90_x_u8): Delete.
10428 (vcaddq_rot90_x_u16): Delete.
10429 (vcaddq_rot90_x_u32): Delete.
10430 (vcaddq_rot270_x_s8): Delete.
10431 (vcaddq_rot270_x_s16): Delete.
10432 (vcaddq_rot270_x_s32): Delete.
10433 (vcaddq_rot270_x_u8): Delete.
10434 (vcaddq_rot270_x_u16): Delete.
10435 (vcaddq_rot270_x_u32): Delete.
10436 (vhcaddq_rot90_x_s8): Delete.
10437 (vhcaddq_rot90_x_s16): Delete.
10438 (vhcaddq_rot90_x_s32): Delete.
10439 (vhcaddq_rot270_x_s8): Delete.
10440 (vhcaddq_rot270_x_s16): Delete.
10441 (vhcaddq_rot270_x_s32): Delete.
10442 (vcaddq_rot90_x_f16): Delete.
10443 (vcaddq_rot90_x_f32): Delete.
10444 (vcaddq_rot270_x_f16): Delete.
10445 (vcaddq_rot270_x_f32): Delete.
10446 (__arm_vcaddq_rot90_u8): Delete.
10447 (__arm_vcaddq_rot270_u8): Delete.
10448 (__arm_vhcaddq_rot90_s8): Delete.
10449 (__arm_vhcaddq_rot270_s8): Delete.
10450 (__arm_vcaddq_rot90_s8): Delete.
10451 (__arm_vcaddq_rot270_s8): Delete.
10452 (__arm_vcaddq_rot90_u16): Delete.
10453 (__arm_vcaddq_rot270_u16): Delete.
10454 (__arm_vhcaddq_rot90_s16): Delete.
10455 (__arm_vhcaddq_rot270_s16): Delete.
10456 (__arm_vcaddq_rot90_s16): Delete.
10457 (__arm_vcaddq_rot270_s16): Delete.
10458 (__arm_vcaddq_rot90_u32): Delete.
10459 (__arm_vcaddq_rot270_u32): Delete.
10460 (__arm_vhcaddq_rot90_s32): Delete.
10461 (__arm_vhcaddq_rot270_s32): Delete.
10462 (__arm_vcaddq_rot90_s32): Delete.
10463 (__arm_vcaddq_rot270_s32): Delete.
10464 (__arm_vcaddq_rot270_m_s8): Delete.
10465 (__arm_vcaddq_rot270_m_s32): Delete.
10466 (__arm_vcaddq_rot270_m_s16): Delete.
10467 (__arm_vcaddq_rot270_m_u8): Delete.
10468 (__arm_vcaddq_rot270_m_u32): Delete.
10469 (__arm_vcaddq_rot270_m_u16): Delete.
10470 (__arm_vcaddq_rot90_m_s8): Delete.
10471 (__arm_vcaddq_rot90_m_s32): Delete.
10472 (__arm_vcaddq_rot90_m_s16): Delete.
10473 (__arm_vcaddq_rot90_m_u8): Delete.
10474 (__arm_vcaddq_rot90_m_u32): Delete.
10475 (__arm_vcaddq_rot90_m_u16): Delete.
10476 (__arm_vhcaddq_rot270_m_s8): Delete.
10477 (__arm_vhcaddq_rot270_m_s32): Delete.
10478 (__arm_vhcaddq_rot270_m_s16): Delete.
10479 (__arm_vhcaddq_rot90_m_s8): Delete.
10480 (__arm_vhcaddq_rot90_m_s32): Delete.
10481 (__arm_vhcaddq_rot90_m_s16): Delete.
10482 (__arm_vcaddq_rot90_x_s8): Delete.
10483 (__arm_vcaddq_rot90_x_s16): Delete.
10484 (__arm_vcaddq_rot90_x_s32): Delete.
10485 (__arm_vcaddq_rot90_x_u8): Delete.
10486 (__arm_vcaddq_rot90_x_u16): Delete.
10487 (__arm_vcaddq_rot90_x_u32): Delete.
10488 (__arm_vcaddq_rot270_x_s8): Delete.
10489 (__arm_vcaddq_rot270_x_s16): Delete.
10490 (__arm_vcaddq_rot270_x_s32): Delete.
10491 (__arm_vcaddq_rot270_x_u8): Delete.
10492 (__arm_vcaddq_rot270_x_u16): Delete.
10493 (__arm_vcaddq_rot270_x_u32): Delete.
10494 (__arm_vhcaddq_rot90_x_s8): Delete.
10495 (__arm_vhcaddq_rot90_x_s16): Delete.
10496 (__arm_vhcaddq_rot90_x_s32): Delete.
10497 (__arm_vhcaddq_rot270_x_s8): Delete.
10498 (__arm_vhcaddq_rot270_x_s16): Delete.
10499 (__arm_vhcaddq_rot270_x_s32): Delete.
10500 (__arm_vcaddq_rot90_f16): Delete.
10501 (__arm_vcaddq_rot270_f16): Delete.
10502 (__arm_vcaddq_rot90_f32): Delete.
10503 (__arm_vcaddq_rot270_f32): Delete.
10504 (__arm_vcaddq_rot270_m_f32): Delete.
10505 (__arm_vcaddq_rot270_m_f16): Delete.
10506 (__arm_vcaddq_rot90_m_f32): Delete.
10507 (__arm_vcaddq_rot90_m_f16): Delete.
10508 (__arm_vcaddq_rot90_x_f16): Delete.
10509 (__arm_vcaddq_rot90_x_f32): Delete.
10510 (__arm_vcaddq_rot270_x_f16): Delete.
10511 (__arm_vcaddq_rot270_x_f32): Delete.
10512 (__arm_vcaddq_rot90): Delete.
10513 (__arm_vcaddq_rot270): Delete.
10514 (__arm_vhcaddq_rot90): Delete.
10515 (__arm_vhcaddq_rot270): Delete.
10516 (__arm_vcaddq_rot270_m): Delete.
10517 (__arm_vcaddq_rot90_m): Delete.
10518 (__arm_vhcaddq_rot270_m): Delete.
10519 (__arm_vhcaddq_rot90_m): Delete.
10520 (__arm_vcaddq_rot90_x): Delete.
10521 (__arm_vcaddq_rot270_x): Delete.
10522 (__arm_vhcaddq_rot90_x): Delete.
10523 (__arm_vhcaddq_rot270_x): Delete.
10525 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
10527 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
10528 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
10529 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
10530 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
10531 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
10532 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
10534 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
10535 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
10536 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
10537 VHCADDQ_ROT270_M_S.
10538 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
10539 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
10540 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
10541 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
10542 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
10543 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
10545 (VCADDQ_ROT270_M): Delete.
10546 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
10547 (VCADDQ_ROT90_M): Delete.
10548 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
10549 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
10551 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
10552 (mve_vcaddq<mve_rot><mode>): Rename into ...
10553 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
10554 (mve_vcaddq_rot270_m_<supf><mode>)
10555 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
10556 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
10557 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
10558 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
10560 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
10562 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
10565 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
10566 preparation statement over braces for a single statement.
10567 (*bt<mode>_setncqi): Likewise.
10568 (*bt<mode>_setncqi_2): New define_insn_and_split.
10570 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
10572 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
10573 case inserting of 64-bit values into a TImode register, to handle
10574 both DImode and DFmode using either *insvti_lowpart_1
10575 or *isnvti_highpart_1.
10577 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
10580 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
10581 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
10582 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
10583 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
10584 when the original source contains a paradoxical subreg.
10586 2023-07-14 Jan Hubicka <jh@suse.cz>
10588 * passes.cc (execute_function_todo): Remove
10589 TODO_rebuild_frequencies
10590 * passes.def: Add rebuild_frequencies pass.
10591 * predict.cc (estimate_bb_frequencies): Drop
10593 (tree_estimate_probability): Update call of
10594 estimate_bb_frequencies.
10595 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
10596 first and do not rebuild if not necessary.
10597 (class pass_rebuild_frequencies): New.
10598 (make_pass_rebuild_frequencies): New.
10599 * profile-count.h: Add profile_count::very_large_p.
10600 * tree-inline.cc (optimize_inline_calls): Do not return
10601 TODO_rebuild_frequencies
10602 * tree-pass.h (TODO_rebuild_frequencies): Remove.
10603 (make_pass_rebuild_frequencies): Declare.
10605 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10607 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
10608 * config/riscv/riscv-protos.h (enum insn_type): New enum.
10609 (expand_cond_len_ternop): New function.
10610 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
10611 (expand_cond_len_ternop): Ditto.
10613 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
10616 * config/bpf/bpf.md: Enable instruction scheduling.
10618 2023-07-14 Tamar Christina <tamar.christina@arm.com>
10620 PR tree-optimization/109154
10621 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
10622 (struct bb_predicate): Add no_predicate_stmts.
10623 (set_bb_predicate): Increase predicate count.
10624 (set_bb_predicate_gimplified_stmts): Conditionally initialize
10625 no_predicate_stmts.
10626 (get_bb_num_predicate_stmts): New.
10627 (init_bb_predicate): Initialzie no_predicate_stmts.
10628 (release_bb_predicate): Cleanup no_predicate_stmts.
10629 (insert_gimplified_predicates): Preserve no_predicate_stmts.
10631 2023-07-14 Tamar Christina <tamar.christina@arm.com>
10633 PR tree-optimization/109154
10634 * tree-if-conv.cc (gen_simplified_condition,
10635 gen_phi_nest_statement): New.
10636 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
10638 2023-07-14 Richard Biener <rguenther@suse.de>
10640 * gimple.h (gimple_phi_arg): New const overload.
10641 (gimple_phi_arg_def): Make gimple arg const.
10642 (gimple_phi_arg_def_from_edge): New inline function.
10643 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
10645 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
10646 new inline function.
10647 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
10649 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
10651 * common/config/riscv/riscv-common.cc:
10652 (riscv_implied_info): Add zihintntl item.
10653 (riscv_ext_version_table): Ditto.
10654 (riscv_ext_flag_table): Ditto.
10655 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
10656 (TARGET_ZIHINTNTL): Ditto.
10658 2023-07-14 Die Li <lidie@eswincomputing.com>
10660 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
10662 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
10665 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
10666 used by the address of the following memory operand.
10668 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
10671 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
10672 deallocate alloca-only frame.
10674 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
10677 * config/darwin.h (DARWIN_PLATFORM_ID): New.
10678 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
10679 and SDK data to the static linker.
10681 2023-07-13 Carl Love <cel@us.ibm.com>
10683 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
10684 built-in definition return type.
10685 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
10686 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
10687 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
10688 argument to return FPSCR fields.
10689 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
10690 the return value. Add description for
10691 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
10693 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
10696 * config/alpha/alpha.cc (alpha_emit_set_long_const):
10697 Always use DImode when constructing long const.
10699 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
10701 * haifa-sched.cc: Change TRUE/FALSE to true/false.
10703 * lra-assigns.cc: Ditto.
10704 * lra-constraints.cc: Ditto.
10705 * sel-sched.cc: Ditto.
10707 2023-07-13 Andrew Pinski <apinski@marvell.com>
10709 PR tree-optimization/110293
10710 PR tree-optimization/110539
10711 * match.pd: Expand the `x != (typeof x)(x == 0)`
10712 pattern to handle where the inner and outer comparsions
10713 are either `!=` or `==` and handle other constants
10716 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
10718 PR middle-end/109520
10719 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
10720 (lra_asm_insn_error): New prototype.
10721 * lra.cc: Include rtl_error.h.
10722 (lra_set_insn_recog_data): Initialize asm_reloads_num.
10723 (lra_asm_insn_error): New func whose code is taken from ...
10724 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
10725 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
10727 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10729 * genmatch.cc (commutative_op): Add COND_LEN_*
10730 * internal-fn.cc (first_commutative_argument): Ditto.
10732 (get_unconditional_internal_fn): Ditto.
10733 (can_interpret_as_conditional_op_p): Ditto.
10734 (internal_fn_len_index): Ditto.
10735 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
10736 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
10737 (convert_mult_to_fma): Ditto.
10738 (math_opts_dom_walker::after_dom_children): Ditto.
10740 2023-07-13 Pan Li <pan2.li@intel.com>
10742 * config/riscv/riscv.cc (vxrm_rtx): New static var.
10744 (global_state_unknown_p): Removed.
10745 (riscv_entity_mode_after): Removed.
10746 (asm_insn_p): New function.
10747 (vxrm_unknown_p): New function for fixed-point.
10748 (riscv_vxrm_mode_after): Ditto.
10749 (frm_unknown_dynamic_p): New function for floating-point.
10750 (riscv_frm_mode_after): Ditto.
10751 (riscv_mode_after): Leverage new functions.
10753 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10755 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
10756 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
10757 calling vect_model_load_cost.
10759 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10761 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
10762 handle memory_access_type VMAT_CONTIGUOUS, remove some
10763 VMAT_CONTIGUOUS_PERMUTE related handlings.
10764 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
10765 without calling vect_model_load_cost.
10767 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10769 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
10770 VMAT_CONTIGUOUS_REVERSE any more.
10771 (vectorizable_load): Adjust the costing handling on
10772 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
10774 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10776 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
10777 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
10778 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
10779 assert it will never get VMAT_LOAD_STORE_LANES.
10781 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10783 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
10784 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
10785 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
10786 remove VMAT_GATHER_SCATTER related handlings and the related parameter
10789 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10791 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
10792 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
10793 vect_model_load_cost.
10794 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
10795 VMAT_STRIDED_SLP any more, and remove their related handlings.
10797 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10799 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
10800 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
10801 hoisting decision and without calling vect_model_load_cost.
10802 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
10803 and remove VMAT_INVARIANT related handlings.
10805 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10807 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
10808 on costing with one extra argument cost_vec.
10809 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
10810 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
10811 gs_info.decl set any more.
10813 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10815 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
10816 to vect_model_load_cost down to some different transform paths
10817 according to the handlings of different vect_memory_access_types.
10819 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
10821 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
10823 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10825 * config/riscv/autovec.md
10826 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
10827 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
10828 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
10829 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
10830 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10831 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10832 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10833 (len_mask_gather_load<mode><mode>): Ditto.
10834 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
10835 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
10836 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
10837 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
10838 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10839 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
10840 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
10841 (len_mask_scatter_store<mode><mode>): Ditto.
10842 * config/riscv/predicates.md (const_1_operand): New predicate.
10843 (vector_gs_scale_operand_16): Ditto.
10844 (vector_gs_scale_operand_32): Ditto.
10845 (vector_gs_scale_operand_64): Ditto.
10846 (vector_gs_extension_operand): Ditto.
10847 (vector_gs_scale_operand_16_rv32): Ditto.
10848 (vector_gs_scale_operand_32_rv32): Ditto.
10849 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
10850 (expand_gather_scatter): New function.
10851 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
10852 (emit_vlmax_masked_store_insn): New function.
10853 (emit_nonvlmax_masked_store_insn): Ditto.
10854 (modulo_sel_indices): Ditto.
10855 (expand_vec_perm): Fix SLP for gather/scatter.
10856 (prepare_gather_scatter): New function.
10857 (expand_gather_scatter): Ditto.
10858 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
10859 (subreg:SI (DI CONST_POLY_INT)).
10860 * config/riscv/vector-iterators.md: Add gather/scatter.
10861 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
10862 (@vec_duplicate<mode>): Ditto.
10863 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
10865 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
10867 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10869 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
10870 * config/riscv/riscv-protos.h (enum insn_type): New enum.
10871 (expand_cond_len_binop): New function.
10872 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
10873 (emit_nonvlmax_fp_tu_insn): Ditto.
10874 (need_fp_rounding_p): Ditto.
10875 (expand_cond_len_binop): Ditto.
10876 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
10877 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
10879 2023-07-12 Jan Hubicka <jh@suse.cz>
10881 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
10882 (gimple_duplicate_seme_region): ... this; break out profile updating
10884 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
10885 (ch_base::copy_headers): Update.
10886 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
10887 (gimple_duplicate_seme_region): ... this.
10889 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
10891 PR tree-optimization/107043
10892 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
10894 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
10896 PR tree-optimization/107053
10897 * gimple-range-op.cc (cfn_popcount): Use known set bits.
10899 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
10901 * ira.cc (equiv_init_varies_p): Change return type from int to bool
10902 and adjust function body accordingly.
10903 (equiv_init_movable_p): Ditto.
10904 (memref_used_between_p): Ditto.
10905 * lra-constraints.cc (valid_address_p): Ditto.
10907 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
10909 * range-op.cc (irange_to_masked_value): Remove.
10910 (update_known_bitmask): Update irange value/mask pair instead of
10911 only updating nonzero bits.
10913 2023-07-12 Jan Hubicka <jh@suse.cz>
10915 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
10916 parameter and rewrite profile updating code to handle edges elimination.
10917 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
10918 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
10919 (loop_iv_derived_p): New function.
10920 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
10921 of PHIs and propagation of IV derived variables.
10922 (ch_base::copy_headers): Pass around the invariant edges hash set.
10924 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
10926 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
10927 (last_active_insn): Change "skip_use_p" function argument to bool.
10928 (noce_operand_ok): Change return type from int to bool.
10929 (find_cond_trap): Ditto.
10930 (block_jumps_and_fallthru_p): Change "fallthru_p" and
10931 "jump_p" variables to bool.
10932 (noce_find_if_block): Change return type from int to bool.
10933 (cond_exec_find_if_block): Ditto.
10934 (find_if_case_1): Ditto.
10935 (find_if_case_2): Ditto.
10936 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
10937 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
10938 (cond_exec_process_insns): Change return type from int to bool.
10939 Change "mod_ok" function arg to bool.
10940 (cond_exec_process_if_block): Change return type from int to bool.
10941 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
10943 (noce_emit_store_flag): Change return type from int to bool.
10944 Change "reversep" function arg to bool. Change "cond_complex"
10946 (noce_try_move): Change return type from int to bool.
10947 (noce_try_ifelse_collapse): Ditto.
10948 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
10949 (noce_try_addcc): Change return type from int to bool. Change
10950 "subtract" variable to bool.
10951 (noce_try_store_flag_constants): Change return type from int to bool.
10952 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
10953 (noce_try_cmove): Change return type from int to bool.
10954 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
10955 (noce_try_minmax): Change return type from int to bool. Change
10956 "unsignedp" variable to bool.
10957 (noce_try_abs): Change return type from int to bool. Change
10958 "negate" variable to bool.
10959 (noce_try_sign_mask): Change return type from int to bool.
10960 (noce_try_move): Ditto.
10961 (noce_try_store_flag_constants): Ditto.
10962 (noce_try_cmove): Ditto.
10963 (noce_try_cmove_arith): Ditto.
10964 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
10965 (noce_try_bitop): Change return type from int to bool.
10966 (noce_operand_ok): Ditto.
10967 (noce_convert_multiple_sets): Ditto.
10968 (noce_convert_multiple_sets_1): Ditto.
10969 (noce_process_if_block): Ditto.
10970 (check_cond_move_block): Ditto.
10971 (cond_move_process_if_block): Ditto. Change "success_p"
10973 (rest_of_handle_if_conversion): Change return type to void.
10975 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10977 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
10979 (get_conditional_len_internal_fn): New function.
10980 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
10981 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
10984 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
10987 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
10989 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
10992 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
10993 define_insn_and_split derived from *add<dwi>3_doubleword_concat
10994 and *add<dwi>3_doubleword_zext.
10996 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
10999 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
11000 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
11001 (peephole2): Simplify rega = 0; rega op= rega cases.
11003 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
11005 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
11006 testing a TImode SUBREG of a 128-bit vector register against
11007 zero, use a PTEST instruction instead of first moving it to
11008 a pair of scalar registers.
11010 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
11012 * genopinit.cc (main): Adjust maximal number of optabs and
11014 * gensupport.cc (find_optab): Shift optab by 20 and mode by
11016 * optabs-query.h (optab_handler): Ditto.
11017 (convert_optab_handler): Ditto.
11019 2023-07-12 Richard Biener <rguenther@suse.de>
11021 PR tree-optimization/110630
11022 * tree-vect-slp.cc (vect_add_slp_permutation): New
11023 offset parameter, honor that for the extract code generation.
11024 (vectorizable_slp_permutation_1): Handle offsetted identities.
11026 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11028 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
11029 (umul<mode>3_highpart): Ditto.
11031 2023-07-12 Jan Beulich <jbeulich@suse.com>
11033 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
11034 alternative. Adjust original last alternative's "prefix"
11035 attribute to maybe_evex.
11037 2023-07-12 Jan Beulich <jbeulich@suse.com>
11039 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
11040 vbroadcastss for AVX2. New AVX512F alternative.
11041 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
11042 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
11044 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11046 * config/riscv/peephole.md: Remove XThead* peephole passes.
11047 * config/riscv/thead.md: Include thead-peephole.md.
11048 * config/riscv/thead-peephole.md: New file.
11050 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11052 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
11054 (riscv_index_reg_class): Likewise.
11055 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
11056 (riscv_index_reg_class): New function.
11057 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
11058 riscv_index_reg_class().
11059 (REGNO_OK_FOR_INDEX_P): Call new function
11060 riscv_regno_ok_for_index_p().
11062 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11064 * config/riscv/riscv-protos.h (enum riscv_address_type):
11065 New location of type definition.
11066 (struct riscv_address_info): Likewise.
11067 * config/riscv/riscv.cc (enum riscv_address_type):
11068 Old location of type definition.
11069 (struct riscv_address_info): Likewise.
11071 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11073 * config/riscv/riscv.h (Xmode): New macro.
11075 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11077 * config/riscv/riscv.cc (riscv_print_operand_address): Use
11078 output_addr_const rather than riscv_print_operand.
11080 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11082 * config/riscv/thead.md: Adjust constraints of th_addsl.
11084 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11086 * config/riscv/thead.cc (th_mempair_operands_p):
11087 Fix documentation of th_mempair_order_operands().
11089 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11091 * config/riscv/thead.cc (th_mempair_save_regs):
11092 Emit REG_FRAME_RELATED_EXPR notes in prologue.
11094 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
11096 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
11097 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
11098 New XThead extension INSN.
11099 (*zero_extendsidi2_th_extu): New XThead extension INSN.
11100 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
11102 2023-07-12 liuhongt <hongtao.liu@intel.com>
11106 * config/i386/predicates.md
11107 (int_float_vector_all_ones_operand): New predicate.
11108 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
11110 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
11112 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
11114 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
11115 define_insn_and_split to avoid false dependence.
11116 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
11117 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
11118 of operands 1 to '0' to avoid false dependence.
11119 (*andnot<mode>3): Ditto.
11120 (iornot<mode>3): Ditto.
11121 (*<nlogic><mode>3): Ditto.
11123 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
11125 * common/config/i386/cpuinfo.h
11126 (get_intel_cpu): Handle Granite Rapids D.
11127 * common/config/i386/i386-common.cc:
11128 (processor_alias_table): Add graniterapids-d.
11129 * common/config/i386/i386-cpuinfo.h
11130 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
11131 * config.gcc: Add -march=graniterapids-d.
11132 * config/i386/driver-i386.cc (host_detect_local_cpu):
11133 Handle graniterapids-d.
11134 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
11135 * doc/extend.texi: Add graniterapids-d.
11136 * doc/invoke.texi: Ditto.
11138 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
11140 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
11141 Add OPTION_MASK_ISA_AVX512VL.
11142 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
11145 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11147 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
11148 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
11149 (shuffle_compress_patterns): Ditto.
11150 (expand_vec_perm_const_1): Ditto.
11152 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
11154 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
11155 * cfghooks.h (struct cfg_hooks): Change return type of
11156 verify_flow_info from integer to bool.
11157 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
11158 (can_delete_label_p): Ditto.
11159 (rtl_verify_flow_info): Change return type from int to bool
11160 and adjust function body accordingly. Change "err" variable to bool.
11161 (rtl_verify_flow_info_1): Ditto.
11162 (free_bb_for_insn): Change return type to void.
11163 (rtl_merge_blocks): Change "b_empty" variable to bool.
11164 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
11165 (verify_hot_cold_block_grouping): Change return type from int to bool.
11166 Change "err" variable to bool.
11167 (rtl_verify_edges): Ditto.
11168 (rtl_verify_bb_insns): Ditto.
11169 (rtl_verify_bb_pointers): Ditto.
11170 (rtl_verify_bb_insn_chain): Ditto.
11171 (rtl_verify_fallthru): Ditto.
11172 (rtl_verify_bb_layout): Ditto.
11173 (purge_all_dead_edges): Change "purged" variable to bool.
11174 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
11175 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
11176 (load_killed_in_block_p): Change return type from int to bool
11177 and adjust function body accordingly.
11178 (oprs_unchanged_p): Return true/false.
11179 (rest_of_handle_gcse2): Change return type to void.
11180 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
11181 int to bool. Change "err" variable to bool.
11183 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
11185 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
11187 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11189 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
11190 * internal-fn.cc (cond_len_unary_direct): Ditto.
11191 (cond_len_binary_direct): Ditto.
11192 (cond_len_ternary_direct): Ditto.
11193 (expand_cond_len_unary_optab_fn): Ditto.
11194 (expand_cond_len_binary_optab_fn): Ditto.
11195 (expand_cond_len_ternary_optab_fn): Ditto.
11196 (direct_cond_len_unary_optab_supported_p): Ditto.
11197 (direct_cond_len_binary_optab_supported_p): Ditto.
11198 (direct_cond_len_ternary_optab_supported_p): Ditto.
11199 * internal-fn.def (COND_LEN_ADD): Ditto.
11200 (COND_LEN_SUB): Ditto.
11201 (COND_LEN_MUL): Ditto.
11202 (COND_LEN_DIV): Ditto.
11203 (COND_LEN_MOD): Ditto.
11204 (COND_LEN_RDIV): Ditto.
11205 (COND_LEN_MIN): Ditto.
11206 (COND_LEN_MAX): Ditto.
11207 (COND_LEN_FMIN): Ditto.
11208 (COND_LEN_FMAX): Ditto.
11209 (COND_LEN_AND): Ditto.
11210 (COND_LEN_IOR): Ditto.
11211 (COND_LEN_XOR): Ditto.
11212 (COND_LEN_SHL): Ditto.
11213 (COND_LEN_SHR): Ditto.
11214 (COND_LEN_FMA): Ditto.
11215 (COND_LEN_FMS): Ditto.
11216 (COND_LEN_FNMA): Ditto.
11217 (COND_LEN_FNMS): Ditto.
11218 (COND_LEN_NEG): Ditto.
11219 * optabs.def (OPTAB_D): Ditto.
11221 2023-07-11 Richard Biener <rguenther@suse.de>
11223 PR tree-optimization/110614
11224 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
11225 SLP splats are not suitable for re-align ops.
11227 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
11229 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
11231 (vsx_quad_dform_memory_operand): Likewise.
11233 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
11235 * reorg.cc (stop_search_p): Change return type from int to bool
11236 and adjust function body accordingly.
11237 (resource_conflicts_p): Ditto.
11238 (insn_references_resource_p): Change return type from int to bool.
11239 (insn_sets_resource_p): Ditto.
11240 (redirect_with_delay_slots_safe_p): Ditto.
11241 (condition_dominates_p): Change return type from int to bool
11242 and adjust function body accordingly.
11243 (redirect_with_delay_list_safe_p): Ditto.
11244 (check_annul_list_true_false): Ditto. Change "annul_true_p"
11245 function argument to bool.
11246 (steal_delay_list_from_target): Change "pannul_p" function
11247 argument to bool pointer. Change "must_annul" and "used_annul"
11248 variables from int to bool.
11249 (steal_delay_list_from_fallthrough): Ditto.
11250 (own_thread_p): Change return type from int to bool and adjust
11251 function body accordingly. Change "allow_fallthrough" function
11253 (reorg_redirect_jump): Change return type from int to bool.
11254 (fill_simple_delay_slots): Change "non_jumps_p" function
11255 argument from int to bool. Change "maybe_never" varible to bool.
11256 (fill_slots_from_thread): Change "likely", "thread_if_true" and
11257 "own_thread" function arguments to bool. Change "lose" and
11258 "must_annul" variables to bool.
11259 (delete_from_delay_slot): Change "had_barrier" variable to bool.
11260 (try_merge_delay_insns): Change "annul_p" variable to bool.
11261 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
11263 (rest_of_handle_delay_slots): Change return type from int to void
11264 and adjust function body accordingly.
11266 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
11268 * doc/extend.texi (RISC-V Operand Modifiers): New.
11270 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11272 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
11273 (insert_insn_end_basic_block): Ditto.
11274 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
11275 * gcse.cc (insert_insn_end_basic_block): Export as global function.
11276 * gcse.h (insert_insn_end_basic_block): Ditto.
11278 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
11281 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
11282 (arm_builtin_decl): Hahndle MVE builtins.
11283 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
11284 (add_unique_function): Fix handling of
11285 __ARM_MVE_PRESERVE_USER_NAMESPACE.
11286 (add_overloaded_function): Likewise.
11287 * config/arm/arm-protos.h (builtin_decl): New declaration.
11289 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
11291 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
11293 2023-07-10 Xi Ruoyao <xry111@xry111.site>
11295 PR tree-optimization/110557
11296 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
11297 Ensure the output sign-extended if necessary.
11299 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
11301 * config/i386/i386.md (peephole2): Transform xchg insn with a
11302 REG_UNUSED note to a (simple) move.
11303 (*insvti_lowpart_1): New define_insn_and_split.
11304 (*insvdi_lowpart_1): Likewise.
11306 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
11308 * config/i386/i386-features.cc (compute_convert_gain): Tweak
11309 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
11310 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
11311 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
11313 2023-07-10 liuhongt <hongtao.liu@intel.com>
11316 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
11317 splitter to detect fp max pattern.
11318 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
11320 2023-07-09 Jan Hubicka <jh@suse.cz>
11322 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
11323 (dump_edge_info): Likewise.
11324 (dump_bb_info): Likewise.
11325 * profile-count.cc (profile_count::dump): Add comma between quality and
11328 2023-07-08 Jan Hubicka <jh@suse.cz>
11330 PR tree-optimization/110600
11331 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
11333 2023-07-08 Jan Hubicka <jh@suse.cz>
11335 PR middle-end/110590
11336 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
11337 inner loops and be more careful about inconsistent profiles.
11338 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
11339 exit is followed by other exit.
11341 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
11343 * cprop.cc (reg_available_p): Change return type from int to bool.
11344 (reg_not_set_p): Ditto.
11345 (try_replace_reg): Ditto. Change "success" variable to bool.
11346 (cprop_jump): Change return type from int to void
11347 and adjust function body accordingly.
11348 (constprop_register): Ditto.
11349 (cprop_insn): Ditto. Change "changed" variable to bool.
11350 (local_cprop_pass): Change return type from int to void
11351 and adjust function body accordingly.
11352 (bypass_block): Ditto. Change "change", "may_be_loop_header"
11353 and "removed_p" variables to bool.
11354 (bypass_conditional_jumps): Change return type from int to void
11355 and adjust function body accordingly. Change "changed"
11357 (one_cprop_pass): Ditto.
11359 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
11361 * gcse.cc (expr_equiv_p): Change return type from int to bool.
11362 (oprs_unchanged_p): Change return type from int to void
11363 and adjust function body accordingly.
11364 (oprs_anticipatable_p): Ditto.
11365 (oprs_available_p): Ditto.
11366 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
11367 arguments to bool. Change "found" variable to bool.
11368 (load_killed_in_block_p): Change return type from int to void and
11369 adjust function body accordingly. Change "avail_p" argument to bool.
11370 (pre_expr_reaches_here_p): Change return type from int to void
11371 and adjust function body accordingly.
11372 (pre_delete): Ditto. Change "changed" variable to bool.
11373 (pre_gcse): Change return type from int to void
11374 and adjust function body accordingly. Change "did_insert" and
11375 "changed" variables to bool.
11376 (one_pre_gcse_pass): Change return type from int to void
11377 and adjust function body accordingly. Change "changed" variable
11379 (should_hoist_expr_to_dom): Change return type from int to void
11380 and adjust function body accordingly. Change
11381 "visited_allocated_locally" variable to bool.
11382 (hoist_code): Change return type from int to void and adjust
11383 function body accordingly. Change "changed" variable to bool.
11384 (one_code_hoisting_pass): Ditto.
11385 (pre_edge_insert): Change return type from int to void and adjust
11386 function body accordingly. Change "did_insert" variable to bool.
11387 (pre_expr_reaches_here_p_work): Change return type from int to void
11388 and adjust function body accordingly.
11389 (simple_mem): Ditto.
11390 (want_to_gcse_p): Change return type from int to void
11391 and adjust function body accordingly.
11392 (can_assign_to_reg_without_clobbers_p): Update function body
11393 for bool return type.
11394 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
11395 (pre_insert_copies): Change "added_copy" variable to bool.
11397 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
11401 * doc/invoke.texi (Warning Options): Fix typos.
11403 2023-07-07 Jan Hubicka <jh@suse.cz>
11405 * profile-count.cc (profile_count::dump): Add FUN
11406 parameter; print relative frequency.
11407 (profile_count::debug): Update.
11408 * profile-count.h (profile_count::dump): Update
11411 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
11415 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
11416 TImode destinations from paradoxical SUBREGs (setting the lowpart)
11417 into explicit zero extensions. Use *insvti_highpart_1 instruction
11418 to set the highpart of a TImode destination.
11420 2023-07-07 Jan Hubicka <jh@suse.cz>
11422 * predict.cc (force_edge_cold): Use
11423 set_edge_probability_and_rescale_others; improve dumps.
11425 2023-07-07 Jan Hubicka <jh@suse.cz>
11427 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
11429 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
11432 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
11434 * config/s390/s390.cc (vec_init): Fix default case
11436 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
11438 * lra-assigns.cc (assign_by_spills): Add reload insns involving
11439 reload pseudos with non-refined class to be processed on the next
11441 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
11442 (in_class_p): Use it.
11443 (print_curr_insn_alt): New func.
11444 (process_alt_operands): Use it. Improve debug info.
11445 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
11446 pseudo class if it is not refined yet.
11448 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
11450 * value-range.cc (irange::get_bitmask_from_range): Return all the
11451 known bits for a singleton.
11452 (irange::set_range_from_bitmask): Set a range of a singleton when
11453 all bits are known.
11455 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
11457 * value-range.cc (irange::intersect): Leave normalization to
11460 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
11462 * data-streamer-in.cc (streamer_read_value_range): Adjust for
11464 * data-streamer-out.cc (streamer_write_vrange): Same.
11465 * range-op.cc (operator_cast::fold_range): Same.
11466 * value-range-pretty-print.cc
11467 (vrange_printer::print_irange_bitmasks): Same.
11468 * value-range-storage.cc (irange_storage::write_lengths_address):
11470 (irange_storage::set_irange): Same.
11471 (irange_storage::get_irange): Same.
11472 (irange_storage::size): Same.
11473 (irange_storage::dump): Same.
11474 * value-range-storage.h: Same.
11475 * value-range.cc (debug): New.
11476 (irange_bitmask::dump): New.
11477 (add_vrange): Adjust for value/mask.
11478 (irange::operator=): Same.
11479 (irange::set): Same.
11480 (irange::verify_range): Same.
11481 (irange::operator==): Same.
11482 (irange::contains_p): Same.
11483 (irange::irange_single_pair_union): Same.
11484 (irange::union_): Same.
11485 (irange::intersect): Same.
11486 (irange::invert): Same.
11487 (irange::get_nonzero_bits_from_range): Rename to...
11488 (irange::get_bitmask_from_range): ...this.
11489 (irange::set_range_from_nonzero_bits): Rename to...
11490 (irange::set_range_from_bitmask): ...this.
11491 (irange::set_nonzero_bits): Rename to...
11492 (irange::update_bitmask): ...this.
11493 (irange::get_nonzero_bits): Rename to...
11494 (irange::get_bitmask): ...this.
11495 (irange::intersect_nonzero_bits): Rename to...
11496 (irange::intersect_bitmask): ...this.
11497 (irange::union_nonzero_bits): Rename to...
11498 (irange::union_bitmask): ...this.
11499 (irange_bitmask::verify_mask): New.
11500 * value-range.h (class irange_bitmask): New.
11501 (irange_bitmask::set_unknown): New.
11502 (irange_bitmask::unknown_p): New.
11503 (irange_bitmask::irange_bitmask): New.
11504 (irange_bitmask::get_precision): New.
11505 (irange_bitmask::get_nonzero_bits): New.
11506 (irange_bitmask::set_nonzero_bits): New.
11507 (irange_bitmask::operator==): New.
11508 (irange_bitmask::union_): New.
11509 (irange_bitmask::intersect): New.
11510 (class irange): Friend vrange_printer.
11511 (irange::varying_compatible_p): Adjust for bitmask.
11512 (irange::set_varying): Same.
11513 (irange::set_nonzero): Same.
11515 2023-07-07 Jan Beulich <jbeulich@suse.com>
11517 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
11519 2023-07-07 Jan Beulich <jbeulich@suse.com>
11521 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
11522 alternative. Switch new last alternative's "isa" attribute to
11524 (vec_extract_hi_v32qi): Likewise.
11526 2023-07-07 Pan Li <pan2.li@intel.com>
11527 Robin Dapp <rdapp@ventanamicro.com>
11529 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
11531 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
11532 (riscv_mode_exit): Likewise for exit mode.
11533 (riscv_mode_needed): Likewise for needed mode.
11534 (riscv_mode_after): Likewise for after mode.
11536 2023-07-07 Pan Li <pan2.li@intel.com>
11538 * config/riscv/vector.md: Fix typo.
11540 2023-07-06 Jan Hubicka <jh@suse.cz>
11542 PR middle-end/25623
11543 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
11544 of iterations determined.
11545 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
11547 2023-07-06 Jan Hubicka <jh@suse.cz>
11549 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
11550 probability update to be safe on loops with subloops.
11551 Make bound parameter to be iteration bound.
11552 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
11553 of scale_loop_profile.
11554 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
11556 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
11558 PR tree-optimization/110449
11559 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
11560 vec_loop for the unrolled loop.
11562 2023-07-06 Jan Hubicka <jh@suse.cz>
11564 * cfg.cc (set_edge_probability_and_rescale_others): New function.
11565 (update_bb_profile_for_threading): Use it; simplify the rest.
11566 * cfg.h (set_edge_probability_and_rescale_others): Declare.
11567 * profile-count.h (profile_probability::apply_scale): New.
11569 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
11571 * doc/extend.texi (ARC Built-in Functions): Update documentation
11572 with missing builtins.
11574 2023-07-06 Richard Biener <rguenther@suse.de>
11576 PR tree-optimization/110556
11577 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
11578 assign code and all operands of non-stores.
11580 2023-07-06 Richard Biener <rguenther@suse.de>
11582 PR tree-optimization/110563
11583 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
11584 Remove second argument.
11585 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
11586 Remove for_epilogue_p argument. Merge assert ...
11587 (vect_analyze_loop_2): ... with check done before determining
11588 partial vectors by moving it after.
11589 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
11591 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11593 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
11594 few things re 'reorder' option and strings.
11595 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
11597 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11599 * gengtype-parse.cc: Clean up obsolete parametrized structs
11601 * gengtype.cc: Likewise.
11602 * gengtype.h: Likewise.
11604 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11606 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
11609 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11611 * gengtype-parse.cc (token_names): Add '"user"'.
11612 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
11613 'FIRST_TOKEN_WITH_VALUE'.
11615 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11617 * doc/gty.texi (GTY Options) <string_length>: Enhance.
11619 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11621 * gengtype.cc (write_root, write_roots): Explicitly reject
11622 'string_length' option.
11623 * doc/gty.texi (GTY Options) <string_length>: Document.
11625 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
11627 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
11628 (ggc_pch_write_object): Remove 'bool is_string' argument.
11629 * ggc-common.cc: Adjust.
11630 * ggc-page.cc: Likewise.
11632 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
11634 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
11636 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
11638 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
11639 and add description for inling of function with arch and tune
11642 2023-07-06 Richard Biener <rguenther@suse.de>
11644 PR tree-optimization/110515
11645 * tree-ssa-pre.cc (compute_avail): Make code dealing
11646 with hoisting loads with different alias-sets more
11649 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11651 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
11653 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
11655 * config/i386/i386.cc (ix86_can_inline_p): If callee has
11656 default arch=x86-64 and tune=generic, do not block the
11657 inlining to its caller. Also allow callee with different
11658 arch= to be inlined if it has always_inline attribute and
11659 it's ISA is subset of caller's.
11661 2023-07-06 liuhongt <hongtao.liu@intel.com>
11663 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
11664 DF/SFmode AND/IOR/XOR/ANDN operations.
11666 2023-07-06 Andrew Pinski <apinski@marvell.com>
11668 PR middle-end/110554
11669 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
11670 just build using boolean_type_node instead of the cond_type.
11671 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
11672 that will feed into the COND_EXPR.
11674 2023-07-06 liuhongt <hongtao.liu@intel.com>
11677 * config/i386/i386.md (movdf_internal): Disparage slightly for
11678 2 alternatives (r,v) and (v,r) by adding constraint modifier
11681 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
11684 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
11685 initialization of new_addr.
11687 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
11689 PR tree-optimization/110474
11690 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
11691 unroll factor while selecting the epilog vect loop VF.
11693 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11695 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
11698 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11700 * gimple-range-gori.cc (compute_operand_range): After calling
11701 compute_operand2_range, recursively call self if needed.
11702 (compute_operand2_range): Turn into a leaf function.
11703 (gori_compute::compute_operand1_and_operand2_range): Finish
11704 operand2 calculation.
11705 * gimple-range-gori.h (compute_operand2_range): Remove name param.
11707 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11709 * gimple-range-gori.cc (compute_operand_range): After calling
11710 compute_operand1_range, recursively call self if needed.
11711 (compute_operand1_range): Turn into a leaf function.
11712 (gori_compute::compute_operand1_and_operand2_range): Finish
11713 operand1 calculation.
11714 * gimple-range-gori.h (compute_operand1_range): Remove name param.
11716 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11718 * gimple-range-gori.cc (compute_operand_range): Check for
11719 operand interdependence when both op1 and op2 are computed.
11720 (compute_operand1_and_operand2_range): No checks required now.
11722 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
11724 * gimple-range-gori.cc (compute_operand_range): Check for
11725 a relation between op1 and op2 and use that instead.
11726 (compute_operand1_range): Don't look for a relation override.
11727 (compute_operand2_range): Ditto.
11729 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
11731 * doc/contrib.texi (Contributors): Update my entry.
11733 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
11735 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
11738 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
11740 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
11741 scehdule_more_p and contributes_to_priority indirect frunction
11742 type from int to bool.
11743 (no_real_insns_p): Change return type from int to bool.
11744 (contributes_to_priority): Ditto.
11745 * haifa-sched.cc (no_real_insns_p): Change return type from
11746 int to bool and adjust function body accordingly.
11747 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
11748 variable type from int to bool.
11749 (ps_insn_advance_column): Change return type from int to bool.
11750 (ps_has_conflicts): Ditto. Change "has_conflicts"
11751 variable type from int to bool.
11752 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
11753 (conditions_mutex_p): Ditto.
11754 * sched-ebb.cc (schedule_more_p): Ditto.
11755 (ebb_contributes_to_priority): Change return type from
11756 int to bool and adjust function body accordingly.
11757 * sched-rgn.cc (is_cfg_nonregular): Ditto.
11758 (check_live_1): Ditto.
11760 (find_conditional_protection): Ditto.
11761 (is_conditionally_protected): Ditto.
11762 (is_prisky): Ditto.
11763 (is_exception_free): Ditto.
11764 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
11765 variables from int to bool.
11766 (extend_rgns): Change "rescan" variable from int to bool.
11767 (check_live): Change return type from
11768 int to bool and adjust function body accordingly.
11769 (can_schedule_ready_p): Ditto.
11770 (schedule_more_p): Ditto.
11771 (contributes_to_priority): Ditto.
11773 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11775 * doc/md.texi: Document that vec_set and vec_extract must not
11777 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
11778 (gimple_expand_vec_set_extract_expr): ...to this.
11779 (gimple_expand_vec_exprs): Call renamed function.
11780 * internal-fn.cc (vec_extract_direct): Add.
11781 (expand_vec_extract_optab_fn): New function to expand
11783 (direct_vec_extract_optab_supported_p): Add.
11784 * internal-fn.def (VEC_EXTRACT): Add.
11785 * optabs.cc (can_vec_extract_var_idx_p): New function.
11786 * optabs.h (can_vec_extract_var_idx_p): Declare.
11788 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11790 * config/riscv/autovec.md: Add gen_lowpart.
11792 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11794 * config/riscv/autovec.md: Allow register index operand.
11796 2023-07-05 Pan Li <pan2.li@intel.com>
11798 * config/riscv/riscv-vector-builtins.cc
11799 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
11801 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11803 * config/riscv/autovec.md: Use float_truncate.
11805 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11807 * internal-fn.cc (internal_fn_len_index): Apply
11808 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
11809 (internal_fn_mask_index): Ditto.
11810 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
11811 (supports_vec_scatter_store_p): Ditto.
11812 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
11813 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
11814 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
11815 (vect_get_strided_load_store_ops): Ditto.
11816 (vectorizable_store): Ditto.
11817 (vectorizable_load): Ditto.
11819 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
11820 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11822 * simplify-rtx.cc (native_encode_rtx): Ditto.
11823 (native_decode_vector_rtx): Ditto.
11824 (simplify_const_vector_byte_offset): Ditto.
11825 (simplify_const_vector_subreg): Ditto.
11826 * tree.cc (build_truth_vector_type_for_mode): Ditto.
11827 * varasm.cc (output_constant_pool_2): Ditto.
11829 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
11831 * config/mips/mips.cc (mips_expand_block_move): don't expand for
11832 r6 with -mno-unaligned-access option if one or both of src and
11833 dest are unaligned. restruct: return directly if length is not const.
11834 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
11836 2023-07-05 Jan Beulich <jbeulich@suse.com>
11839 * config/i386/sse.md: New splitters to simplify
11840 not;vec_duplicate as a singular vpternlog.
11841 (one_cmpl<mode>2): Allow broadcast for operand 1.
11842 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
11844 2023-07-05 Jan Beulich <jbeulich@suse.com>
11847 * config/i386/sse.md: New splitters to simplify
11848 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
11850 2023-07-05 Jan Beulich <jbeulich@suse.com>
11853 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
11854 form of splitter for PR target/100711.
11856 2023-07-05 Richard Biener <rguenther@suse.de>
11858 PR middle-end/110541
11859 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
11862 2023-07-05 Jan Beulich <jbeulich@suse.com>
11865 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
11866 for memory form operand 1.
11868 2023-07-05 Jan Beulich <jbeulich@suse.com>
11871 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
11872 bitwise vector operations.
11873 * config/i386/sse.md (*iornot<mode>3): New insn.
11874 (*xnor<mode>3): Likewise.
11875 (*<nlogic><mode>3): Likewise.
11876 (andor): New code iterator.
11877 (nlogic): New code attribute.
11878 (ternlog_nlogic): Likewise.
11880 2023-07-05 Richard Biener <rguenther@suse.de>
11882 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
11884 2023-07-05 yulong <shiyulong@iscas.ac.cn>
11886 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
11888 2023-07-05 yulong <shiyulong@iscas.ac.cn>
11890 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
11891 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
11892 (ADJUST_ALIGNMENT): Ditto.
11893 (RVV_TUPLE_PARTIAL_MODES): Ditto.
11894 (ADJUST_NUNITS): Ditto.
11895 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
11897 (vfloat16mf4x3_t): Ditto.
11898 (vfloat16mf4x4_t): Ditto.
11899 (vfloat16mf4x5_t): Ditto.
11900 (vfloat16mf4x6_t): Ditto.
11901 (vfloat16mf4x7_t): Ditto.
11902 (vfloat16mf4x8_t): Ditto.
11903 (vfloat16mf2x2_t): Ditto.
11904 (vfloat16mf2x3_t): Ditto.
11905 (vfloat16mf2x4_t): Ditto.
11906 (vfloat16mf2x5_t): Ditto.
11907 (vfloat16mf2x6_t): Ditto.
11908 (vfloat16mf2x7_t): Ditto.
11909 (vfloat16mf2x8_t): Ditto.
11910 (vfloat16m1x2_t): Ditto.
11911 (vfloat16m1x3_t): Ditto.
11912 (vfloat16m1x4_t): Ditto.
11913 (vfloat16m1x5_t): Ditto.
11914 (vfloat16m1x6_t): Ditto.
11915 (vfloat16m1x7_t): Ditto.
11916 (vfloat16m1x8_t): Ditto.
11917 (vfloat16m2x2_t): Ditto.
11918 (vfloat16m2x3_t): Ditto.
11919 (vfloat16m2x4_t): Ditto.
11920 (vfloat16m4x2_t): Ditto.
11921 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
11922 (vfloat16mf4x3_t): Ditto.
11923 (vfloat16mf4x4_t): Ditto.
11924 (vfloat16mf4x5_t): Ditto.
11925 (vfloat16mf4x6_t): Ditto.
11926 (vfloat16mf4x7_t): Ditto.
11927 (vfloat16mf4x8_t): Ditto.
11928 (vfloat16mf2x2_t): Ditto.
11929 (vfloat16mf2x3_t): Ditto.
11930 (vfloat16mf2x4_t): Ditto.
11931 (vfloat16mf2x5_t): Ditto.
11932 (vfloat16mf2x6_t): Ditto.
11933 (vfloat16mf2x7_t): Ditto.
11934 (vfloat16mf2x8_t): Ditto.
11935 (vfloat16m1x2_t): Ditto.
11936 (vfloat16m1x3_t): Ditto.
11937 (vfloat16m1x4_t): Ditto.
11938 (vfloat16m1x5_t): Ditto.
11939 (vfloat16m1x6_t): Ditto.
11940 (vfloat16m1x7_t): Ditto.
11941 (vfloat16m1x8_t): Ditto.
11942 (vfloat16m2x2_t): Ditto.
11943 (vfloat16m2x3_t): Ditto.
11944 (vfloat16m2x4_t): Ditto.
11945 (vfloat16m4x2_t): Ditto.
11946 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
11947 * config/riscv/riscv.md: New.
11948 * config/riscv/vector-iterators.md: New.
11950 2023-07-04 Andrew Pinski <apinski@marvell.com>
11952 PR tree-optimization/110487
11953 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
11954 build a nonstandard integer and use that.
11956 2023-07-04 Andrew Pinski <apinski@marvell.com>
11958 * match.pd (a?-1:0): Cast type an integer type
11959 rather the type before the negative.
11960 (a?0:-1): Likewise.
11962 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
11964 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
11965 Change to use HARD_REG_BIT and its macros.
11966 * config/xtensa/xtensa.md
11967 (peephole2: regmove elimination during DFmode input reload):
11970 2023-07-04 Richard Biener <rguenther@suse.de>
11972 PR tree-optimization/110491
11973 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
11974 whether the PHI args are possibly undefined before folding
11977 2023-07-04 Pan Li <pan2.li@intel.com>
11978 Thomas Schwinge <thomas@codesourcery.com>
11980 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
11981 bits for machine mode table.
11982 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
11983 HOST machine mode bits.
11984 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
11985 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
11987 * tree-streamer.h (streamer_mode_table): Ditto.
11988 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
11989 as the packing limit.
11990 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
11992 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
11994 * lto-streamer.h (class lto_input_block): Capture
11995 'lto_file_decl_data *file_data' instead of just
11996 'unsigned char *mode_table'.
11997 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
11998 * ipa-fnsummary.cc (inline_read_section): Likewise.
11999 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
12000 * ipa-modref.cc (read_section): Likewise.
12001 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
12003 * ipa-sra.cc (isra_read_summary_section): Likewise.
12004 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
12005 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
12006 * lto-streamer-in.cc (lto_read_body_or_constructor)
12007 (lto_input_toplevel_asms): Likewise.
12008 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
12010 2023-07-04 Richard Biener <rguenther@suse.de>
12012 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
12013 (empty_bb_or_one_feeding_into_p): Check for them.
12014 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
12015 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
12017 2023-07-04 Richard Biener <rguenther@suse.de>
12019 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
12020 check guarding scalar_niter underflow.
12022 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
12024 PR tree-optimization/110531
12025 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
12026 slp_done_for_suggested_uf to false.
12028 2023-07-04 Richard Biener <rguenther@suse.de>
12030 PR tree-optimization/110228
12031 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
12032 Mark SSA may-undefs.
12033 (bb_no_side_effects_p): Check stmt uses for undefs.
12035 2023-07-04 Richard Biener <rguenther@suse.de>
12037 PR tree-optimization/110436
12038 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
12039 force live but not relevant pattern stmts relevant.
12041 2023-07-04 Lili Cui <lili.cui@intel.com>
12043 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
12044 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
12046 2023-07-04 Richard Biener <rguenther@suse.de>
12048 PR middle-end/110495
12049 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
12050 since we do not set TREE_OVERFLOW on those since the
12051 introduction of VL vectors.
12052 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
12053 at TREE_OVERFLOW to determine validity of association.
12055 2023-07-04 Richard Biener <rguenther@suse.de>
12057 PR tree-optimization/110310
12058 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
12059 Move costing part ...
12060 (vect_analyze_loop_costing): ... here. Integrate better
12061 estimate for epilogues from ...
12062 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
12063 with actual epilogue status.
12064 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
12065 avoid cancelling epilogue vectorization.
12066 (vect_update_epilogue_niters): Remove. No longer update
12067 epilogue LOOP_VINFO_NITERS.
12069 2023-07-04 Pan Li <pan2.li@intel.com>
12072 2023-07-03 Pan Li <pan2.li@intel.com>
12074 * config/riscv/vector.md: Fix typo.
12076 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12078 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
12079 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
12080 (expand_gather_load_optab_fn): Ditto.
12081 (internal_load_fn_p): Ditto.
12082 (internal_store_fn_p): Ditto.
12083 (internal_gather_scatter_fn_p): Ditto.
12084 (internal_fn_len_index): Ditto.
12085 (internal_fn_mask_index): Ditto.
12086 (internal_fn_stored_value_index): Ditto.
12087 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
12088 (LEN_MASK_SCATTER_STORE): Ditto.
12089 * optabs.def (OPTAB_CD): Ditto.
12091 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12093 * config/riscv/riscv-vsetvl.cc
12094 (vector_insn_info::parse_insn): Add early break.
12096 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
12098 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
12099 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
12101 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
12103 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
12105 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
12107 * common/config/riscv/riscv-common.cc: Add support for zvbb,
12108 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
12109 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
12110 * config/riscv/arch-canonicalize: Add canonicalization info for
12111 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
12112 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
12113 (MASK_ZVBC): Likewise.
12114 (TARGET_ZVBB): Likewise.
12115 (TARGET_ZVBC): Likewise.
12116 (MASK_ZVKG): Likewise.
12117 (MASK_ZVKNED): Likewise.
12118 (MASK_ZVKNHA): Likewise.
12119 (MASK_ZVKNHB): Likewise.
12120 (MASK_ZVKSED): Likewise.
12121 (MASK_ZVKSH): Likewise.
12122 (MASK_ZVKN): Likewise.
12123 (MASK_ZVKNC): Likewise.
12124 (MASK_ZVKNG): Likewise.
12125 (MASK_ZVKS): Likewise.
12126 (MASK_ZVKSC): Likewise.
12127 (MASK_ZVKSG): Likewise.
12128 (MASK_ZVKT): Likewise.
12129 (TARGET_ZVKG): Likewise.
12130 (TARGET_ZVKNED): Likewise.
12131 (TARGET_ZVKNHA): Likewise.
12132 (TARGET_ZVKNHB): Likewise.
12133 (TARGET_ZVKSED): Likewise.
12134 (TARGET_ZVKSH): Likewise.
12135 (TARGET_ZVKN): Likewise.
12136 (TARGET_ZVKNC): Likewise.
12137 (TARGET_ZVKNG): Likewise.
12138 (TARGET_ZVKS): Likewise.
12139 (TARGET_ZVKSC): Likewise.
12140 (TARGET_ZVKSG): Likewise.
12141 (TARGET_ZVKT): Likewise.
12142 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
12144 2023-07-03 Andrew Pinski <apinski@marvell.com>
12146 PR middle-end/110510
12147 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
12149 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
12151 * config/darwin.h: Avoid duplicate multiply_defined specs on
12152 earlier Darwin versions with shared libgcc.
12154 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
12156 * tree.h (tree_int_cst_equal): Change return type from int to bool.
12157 (operand_equal_for_phi_arg_p): Ditto.
12158 (tree_map_base_marked_p): Ditto.
12159 * tree.cc (contains_placeholder_p): Update function body
12160 for bool return type.
12161 (type_cache_hasher::equal): Ditto.
12162 (tree_map_base_hash): Change return type
12163 from int to void and adjust function body accordingly.
12164 (tree_int_cst_equal): Ditto.
12165 (operand_equal_for_phi_arg_p): Ditto.
12166 (get_narrower): Change "first" variable to bool.
12167 (cl_option_hasher::equal): Update function body for bool return type.
12168 * ggc.h (ggc_set_mark): Change return type from int to bool.
12169 (ggc_marked_p): Ditto.
12170 * ggc-page.cc (gt_ggc_mx): Change return type
12171 from int to void and adjust function body accordingly.
12172 (ggc_set_mark): Ditto.
12174 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12176 * config/riscv/autovec.md: Change order of
12177 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12178 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
12179 * doc/md.texi: Ditto.
12180 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
12181 * internal-fn.cc (len_maskload_direct): Ditto.
12182 (len_maskstore_direct): Ditto.
12183 (add_len_and_mask_args): New function.
12184 (expand_partial_load_optab_fn): Change order of
12185 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12186 (expand_partial_store_optab_fn): Ditto.
12187 (internal_fn_len_index): New function.
12188 (internal_fn_mask_index): Change order of
12189 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12190 (internal_fn_stored_value_index): Ditto.
12191 (internal_len_load_store_bias): Ditto.
12192 * internal-fn.h (internal_fn_len_index): New function.
12193 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
12194 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
12195 * tree-vect-stmts.cc (vectorizable_store): Ditto.
12196 (vectorizable_load): Ditto.
12198 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
12201 * doc/gm2.texi (Semantic checking): Include examples using
12202 -Wuninit-variable-checking.
12204 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12206 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
12207 (*single_widen_fnma<mode>): Ditto.
12208 (*double_widen_fms<mode>): Ditto.
12209 (*single_widen_fms<mode>): Ditto.
12210 (*double_widen_fnms<mode>): Ditto.
12211 (*single_widen_fnms<mode>): Ditto.
12213 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12215 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
12216 into "*" in pattern name which simplifies build files.
12217 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
12218 (*pred_single_widen_mul<mode>): New pattern.
12220 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
12222 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
12223 the index to be 0 or 1.
12225 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
12228 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12230 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
12231 (*single_widen_fnma<mode>): Ditto.
12232 (*double_widen_fms<mode>): Ditto.
12233 (*single_widen_fms<mode>): Ditto.
12234 (*double_widen_fnms<mode>): Ditto.
12235 (*single_widen_fnms<mode>): Ditto.
12237 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12239 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
12240 (*single_widen_fnma<mode>): Ditto.
12241 (*double_widen_fms<mode>): Ditto.
12242 (*single_widen_fms<mode>): Ditto.
12243 (*double_widen_fnms<mode>): Ditto.
12244 (*single_widen_fnms<mode>): Ditto.
12246 2023-07-03 Pan Li <pan2.li@intel.com>
12248 * config/riscv/vector.md: Fix typo.
12250 2023-07-03 Richard Biener <rguenther@suse.de>
12252 PR tree-optimization/110506
12253 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
12254 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
12256 2023-07-03 Richard Biener <rguenther@suse.de>
12258 PR tree-optimization/110506
12259 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
12260 type before relying on TYPE_PRECISION to produce a nonzero mask.
12262 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12264 * config/mips/mips.md(*and<mode>3_mips16): Generates
12265 ZEB/ZEH instructions.
12267 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12269 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
12270 address register to M16_REGS for MIPS16.
12271 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
12272 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
12273 (AVAIL_NON_MIPS16 (cache..)): Update to
12274 AVAIL_MIPS16E2_OR_NON_MIPS16.
12275 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
12276 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
12278 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12280 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
12281 for ISA_HAS_MIPS16E2.
12282 (ISA_HAS_SYNC): Same as above.
12283 (ISA_HAS_LL_SC): Same as above.
12285 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12287 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
12288 Add logics for generating instruction.
12289 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
12290 * config/mips/mips.md(mov_<load>l): Generates instructions.
12291 (mov_<load>r): Same as above.
12292 (mov_<store>l): Adjusted for the conditions above.
12293 (mov_<store>r): Same as above.
12294 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
12295 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
12297 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12299 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
12300 (mips_const_insns): Same as above.
12301 (mips_output_move): Same as above.
12302 (mips_output_function_prologue): Same as above.
12303 * config/mips/mips.md: Same as above
12305 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12307 * config/mips/constraints.md(Yz): New constraints for mips16e2.
12308 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
12309 (mips_bit_clear_info): Same as above.
12310 * config/mips/mips.cc(mips_bit_clear_info): New function for
12311 generating instructions.
12312 (mips_bit_clear_p): Same as above.
12313 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
12314 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
12315 (*and<mode>3): Generates INS instruction.
12316 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
12317 (ior<mode>3): Add logics for ORI instruction.
12318 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
12319 (*ior<mode>3_mips16): Add logics for XORI instruction.
12320 (*xor<mode>3_mips16): Generates XORI instrucion.
12321 (*extzv<mode>): Add logics for EXT instruction.
12322 (*insv<mode>): Add logics for INS instruction.
12323 * config/mips/predicates.md(bit_clear_operand): New predicate for
12324 generating bitwise instructions.
12325 (and_reg_operand): Add logics for generating bitwise instructions.
12327 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12329 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
12330 that uses global pointer register.
12331 (mips16_unextended_reference_p): Same as above.
12332 (mips_pic_base_register): Same as above.
12333 (mips_init_relocs): Same as above.
12334 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
12335 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
12336 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
12337 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
12339 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12341 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
12342 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
12343 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
12344 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
12345 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
12346 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
12348 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
12350 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
12352 * config/mips/mips.h(__mips_mips16e2): Defined a new
12354 (ISA_HAS_MIPS16E2): Defined a new macro.
12355 (ASM_SPEC): Pass mmips16e2 to the assembler.
12356 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
12357 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
12358 * doc/invoke.texi: Add -m(no-)mips16e2 option..
12360 2023-07-02 Jakub Jelinek <jakub@redhat.com>
12362 PR tree-optimization/110508
12363 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
12364 REALPART_EXPR opf nlhs if re2 is non-NULL.
12366 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12368 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
12370 * config/xtensa/xtensa.md (*xtensa_clamps):
12371 Add TARGET_MINMAX to the condition.
12373 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
12375 * config/xtensa/xtensa.md (*eqne_INT_MIN):
12376 Add missing ":SI" to the match_operator.
12378 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
12381 * config/darwin.opt: Add fconstant-cfstrings alias to
12382 mconstant-cfstrings.
12383 * doc/invoke.texi: Amend invocation descriptions to reflect
12384 that the fconstant-cfstrings is a target-option alias and to
12385 add the missing mconstant-cfstrings option description to the
12388 2023-07-01 Jan Hubicka <jh@suse.cz>
12390 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
12391 parmaeter; update profile.
12392 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
12393 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
12394 (static_loop_exit): ... this; return the edge to be elliminated.
12395 (ch_base::copy_headers): Handle profile updating for eliminated exits.
12397 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
12399 * config/i386/i386-features.cc (compute_convert_gain): Provide
12400 gains/costs for ROTATE and ROTATERT (by an integer constant).
12401 (general_scalar_chain::convert_rotate): New helper function to
12402 convert a DImode or SImode rotation by an integer constant into
12404 (general_scalar_chain::convert_insn): Call the new convert_rotate
12405 for ROTATE and ROTATERT.
12406 (general_scalar_to_vector_candidate_p): Consider ROTATE and
12407 ROTATERT to be candidates if the second operand is an integer
12408 constant, valid for a rotation (or shift) in the given mode.
12409 * config/i386/i386-features.h (general_scalar_chain): Add new
12410 helper method convert_rotate.
12412 2023-07-01 Jan Hubicka <jh@suse.cz>
12414 PR tree-optimization/103680
12415 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
12416 make message clearer.
12418 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
12420 PR tree-optimization/101832
12421 * tree-object-size.cc (addr_object_size): Handle structure/union type
12422 when it has flexible size.
12424 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
12426 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
12427 (fold_nonarray_ctor_reference): Likewise. Specifically deal
12428 with integral bit-fields.
12429 (fold_ctor_reference): Make sure that the constructor uses the
12430 native storage order.
12432 2023-06-30 Jan Hubicka <jh@suse.cz>
12434 PR middle-end/109849
12435 * predict.cc (estimate_bb_frequencies): Turn to static function.
12436 (expr_expected_value_1): Fix handling of binary expressions with
12438 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
12439 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
12441 * predict.h (estimate_bb_frequencies): No longer declare it.
12443 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
12445 * fold-const.h (multiple_of_p): Change return type from int to bool.
12446 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
12447 neg_conp_p and neg_var_p variables to bool.
12448 (const_binop): Change sat_p variable to bool.
12449 (merge_ranges): Change no_overlap variable to bool.
12450 (extract_muldiv_1): Change same_p variable to bool.
12451 (tree_swap_operands_p): Update function body for bool return type.
12452 (fold_truth_andor): Change commutative variable to bool.
12453 (multiple_of_p): Change return type
12454 from int to void and adjust function body accordingly.
12455 * optabs.h (expand_twoval_unop): Change return type from int to bool.
12456 (expand_twoval_binop): Ditto.
12457 (can_compare_p): Ditto.
12458 (have_add2_insn): Ditto.
12459 (have_addptr3_insn): Ditto.
12460 (have_sub2_insn): Ditto.
12461 (have_insn_for): Ditto.
12462 * optabs.cc (add_equal_note): Ditto.
12463 (widen_operand): Change no_extend argument from int to bool.
12464 (expand_binop): Ditto.
12465 (expand_twoval_unop): Change return type
12466 from int to void and adjust function body accordingly.
12467 (expand_twoval_binop): Ditto.
12468 (can_compare_p): Ditto.
12469 (have_add2_insn): Ditto.
12470 (have_addptr3_insn): Ditto.
12471 (have_sub2_insn): Ditto.
12472 (have_insn_for): Ditto.
12474 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
12476 * config/aarch64/aarch64-simd.md
12477 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
12478 Expansions for abd vec widen optabs.
12479 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
12480 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
12481 that give the appropriate extend RTL for the max RTL.
12483 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
12485 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
12486 * optabs.def (vec_widen_sabd_optab,
12487 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
12488 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
12489 vec_widen_uabd_optab,
12490 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
12491 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
12493 * doc/md.texi: Document them.
12494 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
12495 to build a VEC_WIDEN_ABD call if the input precision is smaller
12496 than the precision of the output.
12497 (vect_recog_widen_abd_pattern): Should an ABD expression be
12498 found preceeding an extension, replace the two with a
12501 2023-06-30 Pan Li <pan2.li@intel.com>
12503 * config/riscv/vector.md: Refactor the common condition.
12505 2023-06-30 Richard Biener <rguenther@suse.de>
12507 PR tree-optimization/110496
12508 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
12509 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
12511 2023-06-30 Richard Biener <rguenther@suse.de>
12513 PR middle-end/110489
12514 * statistics.cc (curr_statistics_hash): Add argument
12515 indicating whether we should allocate the hash.
12516 (statistics_fini_pass): If the hash isn't allocated
12517 only print the summary header.
12519 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
12520 Thomas Schwinge <thomas@codesourcery.com>
12522 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
12524 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
12527 * config/mips/mips.cc (mips_function_arg_alignment): Returns
12528 the alignment of function argument. In case of typedef type,
12529 it returns the aligment of the aliased type.
12530 (mips_function_arg_boundary): Relocated calculation of the
12531 aligment of function arguments.
12533 2023-06-29 Jan Hubicka <jh@suse.cz>
12535 PR tree-optimization/109849
12536 * ipa-fnsummary.cc (decompose_param_expr): Skip
12537 functions returning its parameter.
12538 (set_cond_stmt_execution_predicate): Return early
12539 if predicate was constructed.
12541 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
12544 * doc/extend.texi: Document GCC extension on a structure containing
12545 a flexible array member to be a member of another structure.
12547 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
12549 * print-tree.cc (print_node): Print new bit type_include_flexarray.
12550 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
12551 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
12552 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
12553 in bit no_named_args_stdarg_p properly for its corresponding type.
12554 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
12555 out bit no_named_args_stdarg_p properly for its corresponding type.
12556 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
12558 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
12560 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
12561 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
12562 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
12564 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
12566 * value-range.cc (frange::set): Do not call verify_range.
12567 (frange::normalize_kind): Verify range.
12568 (frange::union_nans): Do not call verify_range.
12569 (frange::union_): Same.
12570 (frange::intersect): Same.
12571 (irange::irange_single_pair_union): Call normalize_kind if
12573 (irange::union_): Same.
12574 (irange::intersect): Same.
12575 (irange::set_range_from_nonzero_bits): Verify range.
12576 (irange::set_nonzero_bits): Call normalize_kind if necessary.
12577 (irange::get_nonzero_bits): Tweak comment.
12578 (irange::intersect_nonzero_bits): Call normalize_kind if
12580 (irange::union_nonzero_bits): Same.
12581 * value-range.h (irange::normalize_kind): Verify range.
12583 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
12585 * cselib.h (rtx_equal_for_cselib_1):
12586 Change return type from int to bool.
12587 (references_value_p): Ditto.
12588 (rtx_equal_for_cselib_p): Ditto.
12589 * expr.h (can_store_by_pieces): Ditto.
12590 (try_casesi): Ditto.
12591 (try_tablejump): Ditto.
12592 (safe_from_p): Ditto.
12593 * sbitmap.h (bitmap_equal_p): Ditto.
12594 * cselib.cc (references_value_p): Change return type
12595 from int to void and adjust function body accordingly.
12596 (rtx_equal_for_cselib_1): Ditto.
12597 * expr.cc (is_aligning_offset): Ditto.
12598 (can_store_by_pieces): Ditto.
12599 (mostly_zeros_p): Ditto.
12600 (all_zeros_p): Ditto.
12601 (safe_from_p): Ditto.
12602 (is_aligning_offset): Ditto.
12603 (try_casesi): Ditto.
12604 (try_tablejump): Ditto.
12605 (store_constructor): Change "need_to_clear" and
12606 "const_bounds_p" variables to bool.
12607 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
12609 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
12611 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
12614 2023-06-29 Richard Biener <rguenther@suse.de>
12616 PR tree-optimization/110460
12617 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
12618 Only allow integral, pointer and scalar float type scalar_type.
12620 2023-06-29 Lili Cui <lili.cui@intel.com>
12622 PR tree-optimization/110148
12623 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
12624 ops in this function.
12626 2023-06-29 Richard Biener <rguenther@suse.de>
12628 PR middle-end/110452
12629 * expr.cc (store_constructor): Handle uniform boolean
12630 vectors with integer mode specially.
12632 2023-06-29 Richard Biener <rguenther@suse.de>
12634 PR middle-end/110461
12635 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
12638 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
12640 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
12641 (array_slice): Relax va_gc constructor to handle all vectors
12642 with a vl_embed layout.
12644 2023-06-29 Pan Li <pan2.li@intel.com>
12646 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
12647 (riscv_mode_needed): Likewise.
12648 (riscv_entity_mode_after): Likewise.
12649 (riscv_mode_after): Likewise.
12650 (riscv_mode_entry): Likewise.
12651 (riscv_mode_exit): Likewise.
12652 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
12654 * config/riscv/riscv.md: Add FRM register.
12655 * config/riscv/vector-iterators.md: Add FRM type.
12656 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
12657 (fsrm): Define new insn for fsrm instruction.
12659 2023-06-29 Pan Li <pan2.li@intel.com>
12661 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
12662 Add macro for static frm min and max.
12663 * config/riscv/riscv-vector-builtins-bases.cc
12664 (class binop_frm): New class for floating-point with frm.
12665 (BASE): Add vfadd for frm.
12666 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
12667 * config/riscv/riscv-vector-builtins-functions.def
12668 (vfadd_frm): Likewise.
12669 * config/riscv/riscv-vector-builtins-shapes.cc
12670 (struct alu_frm_def): New struct for alu with frm.
12671 (SHAPE): Add alu with frm.
12672 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
12673 * config/riscv/riscv-vector-builtins.cc
12674 (function_checker::report_out_of_range_and_not): New function
12675 for report out of range and not val.
12676 (function_checker::require_immediate_range_or): New function
12677 for checking in range or one val.
12678 * config/riscv/riscv-vector-builtins.h: Add function decl.
12680 2023-06-29 Cui, Lili <lili.cui@intel.com>
12682 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
12683 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
12685 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
12688 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
12689 to insn before validating it.
12691 2023-06-28 Jan Hubicka <jh@suse.cz>
12693 PR middle-end/110334
12694 * ipa-fnsummary.h (ipa_fn_summary): Add
12695 safe_to_inline_to_always_inline.
12696 * ipa-inline.cc (can_early_inline_edge_p): ICE
12697 if SSA is not built; do cycle checking for
12698 always_inline functions.
12699 (inline_always_inline_functions): Be recrusive;
12700 watch for cycles; do not updat overall summary.
12701 (early_inliner): Do not give up on always_inlines.
12702 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
12705 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
12707 * output.h (leaf_function_p): Change return type from int to bool.
12708 (final_forward_branch_p): Ditto.
12709 (only_leaf_regs_used): Ditto.
12710 (maybe_assemble_visibility): Ditto.
12711 * varasm.h (supports_one_only): Ditto.
12712 * rtl.h (compute_alignments): Change return type from int to void.
12713 * final.cc (app_on): Change return type from int to bool.
12714 (compute_alignments): Change return type from int to void
12715 and adjust function body accordingly.
12716 (shorten_branches): Change "something_changed" variable
12717 type from int to bool.
12718 (leaf_function_p): Change return type from int to bool
12719 and adjust function body accordingly.
12720 (final_forward_branch_p): Ditto.
12721 (only_leaf_regs_used): Ditto.
12722 * varasm.cc (contains_pointers_p): Change return type from
12723 int to bool and adjust function body accordingly.
12724 (compare_constant): Ditto.
12725 (maybe_assemble_visibility): Ditto.
12726 (supports_one_only): Ditto.
12728 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
12731 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
12732 (maybe_copy_reg_attrs): New function.
12733 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
12734 (copyprop_hardreg_forward_1): Ditto.
12736 2023-06-28 Richard Biener <rguenther@suse.de>
12738 PR tree-optimization/110434
12739 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
12740 VAR we replace with <retval>.
12742 2023-06-28 Richard Biener <rguenther@suse.de>
12744 PR tree-optimization/110451
12745 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
12746 tcc_comparison are expensive.
12748 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
12750 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
12751 for TImode comparisons on 32-bit architectures.
12752 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
12753 SWIM1248x to exclude/avoid TImode being conditional on -m64.
12754 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
12755 and/or with TARGET_SSE4_1.
12756 * config/i386/predicates.md (ix86_timode_comparison_operator):
12757 New predicate that depends upon TARGET_64BIT.
12758 (ix86_timode_comparison_operand): Likewise.
12760 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
12763 * config/i386/i386-features.cc (compute_convert_gain): Provide
12764 more accurate gains for conversion of scalar comparisons to
12767 2023-06-28 Richard Biener <rguenther@suse.de>
12769 PR tree-optimization/110443
12770 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
12773 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
12775 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
12776 (peephole2 for move_and_compare): New.
12777 (mode_iterator WORD): New. Set the mode to SI/DImode by
12779 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
12780 (split pattern for compare_and_move): Likewise.
12782 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12784 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
12785 (*single_widen_fma<mode>): Ditto.
12787 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
12790 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
12792 (altivec_vupkhs<VU_char>_direct): ...this.
12793 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
12794 predicate to test if a constant can be loaded with vspltisw and
12796 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
12797 a vector constant can be synthesized with a vspltisw and a vupkhsw.
12798 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
12800 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
12801 function to return true if OP mode is V2DI and can be synthesized
12802 with vupkhsw and vspltisw.
12803 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
12804 constants with vspltisw and vupkhsw.
12806 2023-06-28 Jan Hubicka <jh@suse.cz>
12808 PR tree-optimization/110377
12809 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
12811 (ipa_analyze_node): Enable ranger.
12813 2023-06-28 Richard Biener <rguenther@suse.de>
12815 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
12816 (TYPE_PRECISION_RAW): Provide raw access to the precision
12818 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
12819 (gimple_canonical_types_compatible_p): Likewise.
12820 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
12821 Stream TYPE_PRECISION_RAW.
12822 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
12824 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
12826 2023-06-28 Alexandre Oliva <oliva@adacore.com>
12828 * doc/extend.texi (zero-call-used-regs): Document leafy and
12830 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
12831 LEAFY and variants.
12832 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
12833 functions in leafy mode.
12834 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
12836 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12838 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
12839 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
12841 (@pred_single_widen_add<mode>): New pattern.
12842 (@pred_single_widen_sub<mode>): New pattern.
12844 2023-06-28 liuhongt <hongtao.liu@intel.com>
12846 * config/i386/i386.cc (ix86_invalid_conversion): New function.
12847 (TARGET_INVALID_CONVERSION): Define as
12848 ix86_invalid_conversion.
12850 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12852 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
12854 (<float_cvt><vnconvert><mode>2): Ditto.
12855 (<optab><mode><vnconvert>2): Ditto.
12856 (<float_cvt><mode><vnconvert>2): Ditto.
12857 * config/riscv/vector-iterators.md: Add vnconvert.
12859 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12861 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
12863 (extend<v_quad_trunc><mode>2): Ditto.
12864 (trunc<mode><v_double_trunc>2): Ditto.
12865 (trunc<mode><v_quad_trunc>2): Ditto.
12866 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
12867 V_QUAD_TRUNC and v_quad_trunc.
12869 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12871 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
12874 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12876 * config/riscv/autovec.md (copysign<mode>3): Add expander.
12877 (xorsign<mode>3): Ditto.
12878 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
12880 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
12884 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
12885 (@pred_ncopysign<mode>_scalar): Ditto.
12887 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12889 * config/riscv/autovec.md: VF_AUTO -> VF.
12890 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
12891 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
12893 * config/riscv/vector.md: Use new iterators.
12895 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
12897 * match.pd: Use element_mode and check if target supports
12898 operation with new type.
12900 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
12902 * config/aarch64/aarch64-sve-builtins-base.cc
12903 (svdupq_impl::fold_nonconst_dupq): New method.
12904 (svdupq_impl::fold): Call fold_nonconst_dupq.
12906 2023-06-27 Andrew Pinski <apinski@marvell.com>
12908 PR middle-end/110420
12909 PR middle-end/103979
12910 PR middle-end/98619
12911 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
12913 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
12915 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
12916 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
12918 (set_switch_stmt_execution_predicate): Same.
12919 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
12921 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
12923 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
12924 ipa_vr instead of value_range.
12927 (ipa_get_value_range): Same.
12928 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
12932 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
12934 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
12935 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
12936 (ipa_set_jfunc_vr): Take a range.
12937 (ipa_compute_jump_functions_for_edge): Pass range to
12939 (ipa_write_jump_function): Call streamer write helper.
12940 (ipa_read_jump_function): Call streamer read helper.
12941 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
12943 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
12945 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
12946 as a probable initializer rather than a probable complete statement.
12948 2023-06-27 Richard Biener <rguenther@suse.de>
12950 PR tree-optimization/96208
12951 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
12952 a non-grouped load if it is the same for all lanes.
12953 (vect_build_slp_tree_2): Handle not grouped loads.
12954 (vect_optimize_slp_pass::remove_redundant_permutations):
12956 (vect_transform_slp_perm_load_1): Likewise.
12957 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
12958 (get_group_load_store_type): Likewise. Handle
12959 invariant accesses.
12960 (vectorizable_load): Likewise.
12962 2023-06-27 liuhongt <hongtao.liu@intel.com>
12964 PR rtl-optimization/110237
12965 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
12967 (maskstore<mode><avx512fmaskmodelower): Ditto.
12968 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
12969 from original <avx512>_store<mode>_mask.
12971 2023-06-27 liuhongt <hongtao.liu@intel.com>
12973 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
12974 Move flag_expensive_optimizations && !optimize_size to ..
12975 * config/i386/i386-options.cc (ix86_option_override_internal):
12976 .. this, it makes -mvzeroupper independent of optimization
12977 level, but still keeps the behavior of architecture
12978 tuning(emit_vzeroupper) unchanged.
12980 2023-06-27 liuhongt <hongtao.liu@intel.com>
12983 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
12984 vzeroupper for vzeroupper call_insn.
12986 2023-06-27 Andrew Pinski <apinski@marvell.com>
12988 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
12991 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12993 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
12996 2023-06-26 Andrew Pinski <apinski@marvell.com>
12998 * doc/extend.texi (access attribute): Add
13000 (interrupt/interrupt_handler attribute):
13003 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13005 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
13006 Use <DWI> instead of <V2XWIDE>.
13007 (aarch64_sqrshrun_n<mode>): Likewise.
13009 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13011 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
13013 (aarch64_rnd_imm_p): ... This.
13014 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
13016 (aarch64_int_rnd_operand): ... This.
13017 (aarch64_simd_rshrn_imm_vec): Delete.
13018 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
13019 Adjust for the above.
13020 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
13021 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
13022 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
13023 (aarch64_sqrshrun_n<mode>_insn): Likewise.
13024 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
13025 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
13026 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
13027 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
13028 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
13030 (aarch64_rnd_imm_p): ... This.
13032 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
13034 * config/s390/s390.cc (s390_encode_section_info): Set
13035 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
13038 2023-06-26 Jan Hubicka <jh@suse.cz>
13040 PR tree-optimization/109849
13041 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
13042 count of newly constructed forwarder block.
13044 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
13046 * doc/optinfo.texi: Fix "steam" -> "stream".
13048 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13050 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
13052 (dse_optimize_stmt): Add LEN_MASK_STORE.
13054 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13056 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
13057 fold of LOAD/STORE with length.
13059 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
13061 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
13062 Check for interdependence between operands 1 and 2.
13064 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
13066 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
13067 into account when costing non-widening/truncating conversions.
13069 2023-06-26 Richard Biener <rguenther@suse.de>
13071 PR tree-optimization/110381
13072 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
13073 Materialize permutes before fold-left reductions.
13075 2023-06-26 Pan Li <pan2.li@intel.com>
13077 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
13079 2023-06-26 Richard Biener <rguenther@suse.de>
13081 * varasm.cc (initializer_constant_valid_p_1): Also
13082 constrain the type of value to be scalar integral
13083 before dispatching to narrowing_initializer_constant_valid_p.
13085 2023-06-26 Richard Biener <rguenther@suse.de>
13087 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
13088 Use element_precision.
13090 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13092 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
13094 (vcondu<V:mode><VI:mode>): Ditto.
13095 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
13096 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
13098 2023-06-26 Richard Biener <rguenther@suse.de>
13100 PR tree-optimization/110392
13101 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
13102 Do early exits on true/false predicate only after normalization.
13104 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13106 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
13109 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
13111 * config/i386/i386.md (peephole2): Simplify zeroing a register
13112 followed by an IOR, XOR or PLUS operation on it, into a move.
13113 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
13114 eliminate (and hide from reload) unnecessary word to doubleword
13115 extensions that are followed by left shifts by sufficiently large,
13116 but valid, bit counts.
13118 2023-06-26 liuhongt <hongtao.liu@intel.com>
13120 PR tree-optimization/110371
13121 PR tree-optimization/110018
13122 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
13123 save intermediate type operand instead of "subtle" vec_dest
13126 2023-06-26 liuhongt <hongtao.liu@intel.com>
13128 PR tree-optimization/110371
13129 PR tree-optimization/110018
13130 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
13131 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
13133 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
13135 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
13136 Override tune_string with arch_string if tune_string is not
13137 explicitly specified.
13139 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13141 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
13143 * config/riscv/riscv-vsetvl.h: New function.
13145 2023-06-25 Li Xu <xuli1@eswincomputing.com>
13147 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
13150 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13152 * config/riscv/autovec.md (len_load_<mode>): Remove.
13153 (len_maskload<mode><vm>): Remove.
13154 (len_store_<mode>): New pattern.
13155 (len_maskstore<mode><vm>): New pattern.
13156 * config/riscv/predicates.md (autovec_length_operand): New predicate.
13157 * config/riscv/riscv-protos.h (enum insn_type): New enum.
13158 (expand_load_store): New function.
13159 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
13160 (emit_nonvlmax_masked_insn): Ditto.
13161 (expand_load_store): Ditto.
13162 * config/riscv/riscv-vector-builtins.cc
13163 (function_expander::use_contiguous_store_insn): Add avl_type operand
13165 * config/riscv/vector.md: Ditto.
13167 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13169 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
13172 2023-06-25 Pan Li <pan2.li@intel.com>
13174 * config/riscv/vector.md: Revert.
13176 2023-06-25 Pan Li <pan2.li@intel.com>
13178 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
13179 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
13180 (ADJUST_ALIGNMENT): Ditto.
13181 (RVV_TUPLE_PARTIAL_MODES): Ditto.
13182 (ADJUST_NUNITS): Ditto.
13183 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
13184 (vfloat16mf4x3_t): Ditto.
13185 (vfloat16mf4x4_t): Ditto.
13186 (vfloat16mf4x5_t): Ditto.
13187 (vfloat16mf4x6_t): Ditto.
13188 (vfloat16mf4x7_t): Ditto.
13189 (vfloat16mf4x8_t): Ditto.
13190 (vfloat16mf2x2_t): Ditto.
13191 (vfloat16mf2x3_t): Ditto.
13192 (vfloat16mf2x4_t): Ditto.
13193 (vfloat16mf2x5_t): Ditto.
13194 (vfloat16mf2x6_t): Ditto.
13195 (vfloat16mf2x7_t): Ditto.
13196 (vfloat16mf2x8_t): Ditto.
13197 (vfloat16m1x2_t): Ditto.
13198 (vfloat16m1x3_t): Ditto.
13199 (vfloat16m1x4_t): Ditto.
13200 (vfloat16m1x5_t): Ditto.
13201 (vfloat16m1x6_t): Ditto.
13202 (vfloat16m1x7_t): Ditto.
13203 (vfloat16m1x8_t): Ditto.
13204 (vfloat16m2x2_t): Ditto.
13205 (vfloat16m2x3_t): Diito.
13206 (vfloat16m2x4_t): Diito.
13207 (vfloat16m4x2_t): Diito.
13208 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
13209 (vfloat16mf4x3_t): Ditto.
13210 (vfloat16mf4x4_t): Ditto.
13211 (vfloat16mf4x5_t): Ditto.
13212 (vfloat16mf4x6_t): Ditto.
13213 (vfloat16mf4x7_t): Ditto.
13214 (vfloat16mf4x8_t): Ditto.
13215 (vfloat16mf2x2_t): Ditto.
13216 (vfloat16mf2x3_t): Ditto.
13217 (vfloat16mf2x4_t): Ditto.
13218 (vfloat16mf2x5_t): Ditto.
13219 (vfloat16mf2x6_t): Ditto.
13220 (vfloat16mf2x7_t): Ditto.
13221 (vfloat16mf2x8_t): Ditto.
13222 (vfloat16m1x2_t): Ditto.
13223 (vfloat16m1x3_t): Ditto.
13224 (vfloat16m1x4_t): Ditto.
13225 (vfloat16m1x5_t): Ditto.
13226 (vfloat16m1x6_t): Ditto.
13227 (vfloat16m1x7_t): Ditto.
13228 (vfloat16m1x8_t): Ditto.
13229 (vfloat16m2x2_t): Ditto.
13230 (vfloat16m2x3_t): Ditto.
13231 (vfloat16m2x4_t): Ditto.
13232 (vfloat16m4x2_t): Ditto.
13233 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
13234 * config/riscv/riscv.md: Ditto.
13235 * config/riscv/vector-iterators.md: Ditto.
13237 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13239 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
13240 (gimple_fold_partial_load_store_mem_ref): Ditto.
13241 (gimple_fold_partial_store): Ditto.
13242 (gimple_fold_call): Ditto.
13244 2023-06-25 liuhongt <hongtao.liu@intel.com>
13247 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
13248 Refine pattern with UNSPEC_MASKLOAD.
13249 (maskload<mode><avx512fmaskmodelower>): Ditto.
13250 (*<avx512>_load<mode>_mask): Extend mode iterator to
13252 (*<avx512>_load<mode>): Ditto.
13254 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13256 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
13258 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13260 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
13261 LEN_MASK_{LOAD,STORE}
13263 2023-06-25 yulong <shiyulong@iscas.ac.cn>
13265 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
13267 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
13269 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
13271 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13273 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
13274 (*fma<VI:mode><P:mode>): Ditto.
13275 (*fnma<mode>): Ditto.
13276 (*fnma<VI:mode><P:mode>): Ditto.
13278 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13280 * config/riscv/autovec.md (fma<mode>4): New pattern.
13281 (*fma<mode>): Ditto.
13282 (fnma<mode>4): Ditto.
13283 (*fnma<mode>): Ditto.
13284 (fms<mode>4): Ditto.
13285 (*fms<mode>): Ditto.
13286 (fnms<mode>4): Ditto.
13287 (*fnms<mode>): Ditto.
13288 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
13290 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
13291 * config/riscv/vector.md: Fix attribute bug.
13293 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13295 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
13296 Apply LEN_MASK_{LOAD,STORE}.
13298 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13300 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
13301 Add LEN_MASK_{LOAD,STORE}.
13303 2023-06-24 David Malcolm <dmalcolm@redhat.com>
13305 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
13306 * diagnostic.cc: Likewise.
13307 * text-art/box-drawing.cc: Likewise.
13308 * text-art/canvas.cc: Likewise.
13309 * text-art/ruler.cc: Likewise.
13310 * text-art/selftests.cc: Likewise.
13311 * text-art/selftests.h (text_art::canvas): New forward decl.
13312 * text-art/style.cc: Add #define INCLUDE_VECTOR.
13313 * text-art/styled-string.cc: Likewise.
13314 * text-art/table.cc: Likewise.
13315 * text-art/table.h: Remove #include <vector>.
13316 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
13317 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
13318 Remove #include of <vector> and <string>.
13319 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
13320 * text-art/widget.h: Remove #include <vector>.
13322 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13324 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
13325 (internal_load_fn_p): Add LEN_MASK_LOAD.
13326 (internal_store_fn_p): Add LEN_MASK_STORE.
13327 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
13328 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
13329 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
13330 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
13331 (get_len_load_store_mode): Ditto.
13332 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
13333 (get_len_load_store_mode): Ditto.
13334 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
13335 (get_all_ones_mask): New function.
13336 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
13337 (vectorizable_load): Ditto.
13339 2023-06-23 Marek Polacek <polacek@redhat.com>
13341 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
13342 -std=gnu++26. Document that for C++23, its value is 202302L.
13343 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
13344 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
13345 (gen_compile_unit_die): Likewise.
13347 2023-06-23 Jan Hubicka <jh@suse.cz>
13349 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
13351 (pass_phiprop::execute): Do not compute it here; return
13352 update_ssa_only_virtuals if something changed.
13353 (pass_data_phiprop): Remove TODO_update_ssa from todos.
13355 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
13356 Aaron Sawdey <acsawdey@linux.ibm.com>
13359 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
13360 allowed prefixed lwa to be generated.
13361 * config/rs6000/fusion.md: Regenerate.
13362 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
13363 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
13364 plus compare immediate fused insns.
13365 (maybe_prefixed): Likewise.
13367 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
13369 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
13370 of ASHIFT to const0_rtx with sufficiently large shift count.
13371 Optimize highpart SUBREGs of ASHIFT as the shift operand when
13372 the shift count is the correct offset. Optimize SUBREGs of
13373 multi-word logic operations if the SUBREGs of both operands
13376 2023-06-23 Richard Biener <rguenther@suse.de>
13378 * varasm.cc (initializer_constant_valid_p_1): Only
13379 allow conversions between scalar floating point types.
13381 2023-06-23 Richard Biener <rguenther@suse.de>
13383 * tree-vect-stmts.cc (vectorizable_assignment):
13384 Properly handle non-integral operands when analyzing
13387 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13389 PR tree-optimization/110280
13390 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
13391 using build_vector_from_val with the element of input operand, and
13392 mask's type if operand and mask's types don't match.
13394 2023-06-23 Richard Biener <rguenther@suse.de>
13396 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
13397 the truth_value_p case with !VECTOR_TYPE_P.
13399 2023-06-23 Richard Biener <rguenther@suse.de>
13401 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
13402 Exit early when the type isn't scalar integral.
13404 2023-06-23 Richard Biener <rguenther@suse.de>
13406 * match.pd ((outertype)((innertype0)a+(innertype1)b)
13407 -> ((newtype)a+(newtype)b)): Use element_precision
13410 2023-06-23 Richard Biener <rguenther@suse.de>
13412 * fold-const.cc (fold_binary_loc): Use element_precision
13413 when trying (double)float1 CMP (double)float2 to
13414 float1 CMP float2 simplification.
13415 * match.pd: Likewise.
13417 2023-06-23 Richard Biener <rguenther@suse.de>
13419 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
13420 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
13422 2023-06-23 Richard Biener <rguenther@suse.de>
13424 * tree-vect-stmts.cc (vector_vector_composition_type):
13425 Handle composition of a vector from a number of elements that
13426 happens to match its number of lanes.
13428 2023-06-22 Marek Polacek <polacek@redhat.com>
13430 * configure.ac (--enable-host-bind-now): New check. Add
13431 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
13432 * configure: Regenerate.
13433 * doc/install.texi: Document --enable-host-bind-now.
13435 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
13437 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
13439 2023-06-22 Richard Biener <rguenther@suse.de>
13441 PR tree-optimization/110332
13442 * tree-ssa-phiprop.cc (propagate_with_phi): Always
13443 check aliasing with edge inserted loads.
13445 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
13446 Uros Bizjak <ubizjak@gmail.com>
13448 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
13449 expansion of ptestc with equal operands as producing const1_rtx.
13450 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
13451 estimates of UNSPEC_PTEST, where the ptest performs the PAND
13452 or PAND of its operands.
13453 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
13454 of reg_equal_p operands into an x86_stc instruction.
13455 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
13456 (define_split): Similar to above for strict_low_part destinations.
13457 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
13459 2023-06-22 David Malcolm <dmalcolm@redhat.com>
13462 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
13463 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
13465 (fanalyzer-debug-text-art): New.
13467 2023-06-22 David Malcolm <dmalcolm@redhat.com>
13469 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
13470 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
13471 text-art/style.o, text-art/styled-string.o, text-art/table.o,
13472 text-art/theme.o, and text-art/widget.o.
13473 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
13474 (COLOR_FG_BRIGHT_RED): New.
13475 (COLOR_FG_BRIGHT_GREEN): New.
13476 (COLOR_FG_BRIGHT_YELLOW): New.
13477 (COLOR_FG_BRIGHT_BLUE): New.
13478 (COLOR_FG_BRIGHT_MAGENTA): New.
13479 (COLOR_FG_BRIGHT_CYAN): New.
13480 (COLOR_FG_BRIGHT_WHITE): New.
13481 (COLOR_BG_BRIGHT_BLACK): New.
13482 (COLOR_BG_BRIGHT_RED): New.
13483 (COLOR_BG_BRIGHT_GREEN): New.
13484 (COLOR_BG_BRIGHT_YELLOW): New.
13485 (COLOR_BG_BRIGHT_BLUE): New.
13486 (COLOR_BG_BRIGHT_MAGENTA): New.
13487 (COLOR_BG_BRIGHT_CYAN): New.
13488 (COLOR_BG_BRIGHT_WHITE): New.
13489 * common.opt (fdiagnostics-text-art-charset=): New option.
13490 (diagnostic-text-art.h): New SourceInclude.
13491 (diagnostic_text_art_charset) New Enum and EnumValues.
13492 * configure: Regenerate.
13493 * configure.ac (gccdepdir): Add text-art to loop.
13494 * diagnostic-diagram.h: New file.
13495 * diagnostic-format-json.cc (json_emit_diagram): New.
13496 (diagnostic_output_format_init_json): Wire it up to
13497 context->m_diagrams.m_emission_cb.
13498 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
13499 "text-art/canvas.h".
13500 (sarif_result::on_nested_diagnostic): Move code to...
13501 (sarif_result::add_related_location): ...this new function.
13502 (sarif_result::on_diagram): New.
13503 (sarif_builder::emit_diagram): New.
13504 (sarif_builder::make_message_object_for_diagram): New.
13505 (sarif_emit_diagram): New.
13506 (diagnostic_output_format_init_sarif): Set
13507 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
13508 * diagnostic-text-art.h: New file.
13509 * diagnostic.cc: Include "diagnostic-text-art.h",
13510 "diagnostic-diagram.h", and "text-art/theme.h".
13511 (diagnostic_initialize): Initialize context->m_diagrams and
13512 call diagnostics_text_art_charset_init.
13513 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
13514 (diagnostic_emit_diagram): New.
13515 (diagnostics_text_art_charset_init): New.
13516 * diagnostic.h (text_art::theme): New forward decl.
13517 (class diagnostic_diagram): Likewise.
13518 (diagnostic_context::m_diagrams): New field.
13519 (diagnostic_emit_diagram): New decl.
13520 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
13521 -fdiagnostics-text-art-charset=.
13522 (-fdiagnostics-plain-output): Add
13523 -fdiagnostics-text-art-charset=none.
13524 * gcc.cc: Include "diagnostic-text-art.h".
13525 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
13526 * opts-common.cc (decode_cmdline_options_to_array): Add
13527 "-fdiagnostics-text-art-charset=none" to expanded_args for
13528 -fdiagnostics-plain-output.
13529 * opts.cc: Include "diagnostic-text-art.h".
13530 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
13531 * pretty-print.cc (pp_unicode_character): New.
13532 * pretty-print.h (pp_unicode_character): New decl.
13533 * selftest-run-tests.cc: Include "text-art/selftests.h".
13534 (selftest::run_tests): Call text_art_tests.
13535 * text-art/box-drawing-chars.inc: New file, generated by
13536 contrib/unicode/gen-box-drawing-chars.py.
13537 * text-art/box-drawing.cc: New file.
13538 * text-art/box-drawing.h: New file.
13539 * text-art/canvas.cc: New file.
13540 * text-art/canvas.h: New file.
13541 * text-art/ruler.cc: New file.
13542 * text-art/ruler.h: New file.
13543 * text-art/selftests.cc: New file.
13544 * text-art/selftests.h: New file.
13545 * text-art/style.cc: New file.
13546 * text-art/styled-string.cc: New file.
13547 * text-art/table.cc: New file.
13548 * text-art/table.h: New file.
13549 * text-art/theme.cc: New file.
13550 * text-art/theme.h: New file.
13551 * text-art/types.h: New file.
13552 * text-art/widget.cc: New file.
13553 * text-art/widget.h: New file.
13555 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
13557 * function.h (emit_initial_value_sets):
13558 Change return type from int to void.
13559 (aggregate_value_p): Change return type from int to bool.
13560 (prologue_contains): Ditto.
13561 (epilogue_contains): Ditto.
13562 (prologue_epilogue_contains): Ditto.
13563 * function.cc (temp_slot): Make "in_use" variable bool.
13564 (make_slot_available): Update for changed "in_use" variable.
13565 (assign_stack_temp_for_type): Ditto.
13566 (emit_initial_value_sets): Change return type from int to void
13567 and update function body accordingly.
13568 (instantiate_virtual_regs): Ditto.
13569 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
13570 (safe_insn_predicate): Change return type from int to bool.
13571 (aggregate_value_p): Change return type from int to bool
13572 and update function body accordingly.
13573 (prologue_contains): Change return type from int to bool.
13574 (prologue_epilogue_contains): Ditto.
13576 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
13578 * common.opt (fp_contract_mode) [on]: Remove fallback.
13579 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
13580 * doc/invoke.texi (-ffp-contract): Update.
13581 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
13583 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13585 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13586 Add alternatives to prefer to avoid same input and output Z register.
13587 (mask_gather_load<mode><v_int_container>): Likewise.
13588 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13589 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13590 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13591 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13593 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13595 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13596 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13597 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13598 <SVE_2BHSI:mode>_sxtw): Likewise.
13599 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13600 <SVE_2BHSI:mode>_uxtw): Likewise.
13601 (@aarch64_ldff1_gather<mode>): Likewise.
13602 (@aarch64_ldff1_gather<mode>): Likewise.
13603 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13604 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13605 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13606 <VNx4_NARROW:mode>): Likewise.
13607 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13608 <VNx2_NARROW:mode>): Likewise.
13609 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13610 <VNx2_NARROW:mode>_sxtw): Likewise.
13611 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13612 <VNx2_NARROW:mode>_uxtw): Likewise.
13613 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13614 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13615 <SVE_PARTIAL_I:mode>): Likewise.
13617 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13619 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13620 Convert to compact alternatives syntax.
13621 (mask_gather_load<mode><v_int_container>): Likewise.
13622 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13623 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13624 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13625 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13627 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13629 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13630 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13631 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13632 <SVE_2BHSI:mode>_sxtw): Likewise.
13633 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13634 <SVE_2BHSI:mode>_uxtw): Likewise.
13635 (@aarch64_ldff1_gather<mode>): Likewise.
13636 (@aarch64_ldff1_gather<mode>): Likewise.
13637 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13638 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13639 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13640 <VNx4_NARROW:mode>): Likewise.
13641 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13642 <VNx2_NARROW:mode>): Likewise.
13643 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13644 <VNx2_NARROW:mode>_sxtw): Likewise.
13645 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13646 <VNx2_NARROW:mode>_uxtw): Likewise.
13647 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13648 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13649 <SVE_PARTIAL_I:mode>): Likewise.
13651 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13654 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13656 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13657 Convert to compact alternatives syntax.
13658 (mask_gather_load<mode><v_int_container>): Likewise.
13659 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13660 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13661 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13662 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13664 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13666 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13667 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13668 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13669 <SVE_2BHSI:mode>_sxtw): Likewise.
13670 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13671 <SVE_2BHSI:mode>_uxtw): Likewise.
13672 (@aarch64_ldff1_gather<mode>): Likewise.
13673 (@aarch64_ldff1_gather<mode>): Likewise.
13674 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13675 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13676 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13677 <VNx4_NARROW:mode>): Likewise.
13678 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13679 <VNx2_NARROW:mode>): Likewise.
13680 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13681 <VNx2_NARROW:mode>_sxtw): Likewise.
13682 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13683 <VNx2_NARROW:mode>_uxtw): Likewise.
13684 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13685 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13686 <SVE_PARTIAL_I:mode>): Likewise.
13688 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13690 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
13691 (get_len_load_store_mode): Ditto.
13692 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
13693 (get_len_load_store_mode): Ditto.
13694 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
13695 (get_len_load_store_mode): Ditto.
13696 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
13697 (get_len_load_store_mode): Ditto.
13698 * tree-if-conv.cc: include optabs-tree instead of optabs-query
13700 2023-06-21 Richard Biener <rguenther@suse.de>
13702 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
13703 split_constant_offset for the POINTER_PLUS_EXPR case.
13705 2023-06-21 Richard Biener <rguenther@suse.de>
13707 * tree-ssa-loop-ivopts.cc (record_group_use): Use
13708 split_constant_offset.
13710 2023-06-21 Richard Biener <rguenther@suse.de>
13712 * tree-loop-distribution.cc (classify_builtin_st): Use
13713 split_constant_offset.
13714 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
13715 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
13717 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13719 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
13720 Convert to compact alternatives syntax.
13721 (mask_gather_load<mode><v_int_container>): Likewise.
13722 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
13723 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
13724 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
13725 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
13727 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
13729 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13730 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
13731 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13732 <SVE_2BHSI:mode>_sxtw): Likewise.
13733 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
13734 <SVE_2BHSI:mode>_uxtw): Likewise.
13735 (@aarch64_ldff1_gather<mode>): Likewise.
13736 (@aarch64_ldff1_gather<mode>): Likewise.
13737 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
13738 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
13739 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
13740 <VNx4_NARROW:mode>): Likewise.
13741 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13742 <VNx2_NARROW:mode>): Likewise.
13743 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13744 <VNx2_NARROW:mode>_sxtw): Likewise.
13745 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
13746 <VNx2_NARROW:mode>_uxtw): Likewise.
13747 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
13748 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
13749 <SVE_PARTIAL_I:mode>): Likewise.
13751 2023-06-21 Tamar Christina <tamar.christina@arm.com>
13754 * doc/md.texi: Replace backslashchar.
13756 2023-06-21 Richard Biener <rguenther@suse.de>
13758 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
13759 Overload. For masked main loops make sure the vectorization
13760 factor isn't more than double the number of iterations.
13762 2023-06-21 Jan Beulich <jbeulich@suse.com>
13764 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
13765 value duplication by ix86_build_signbit_mask() when AVX512F and
13767 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
13768 2-alternative form. Adjust "mode" attribute. Add "enabled"
13770 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
13771 && !TARGET_PREFER_AVX256.
13772 (*<avx512>_vpternlog<mode>_2): Likewise.
13773 (*<avx512>_vpternlog<mode>_3): Likewise.
13775 2023-06-21 liuhongt <hongtao.liu@intel.com>
13778 * tree-vect-stmts.cc (vectorizable_conversion): Use
13779 intermiediate integer type for float_expr/fix_trunc_expr when
13780 direct optab is not existed.
13782 2023-06-20 Tamar Christina <tamar.christina@arm.com>
13784 PR bootstrap/110324
13785 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
13787 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
13789 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
13790 register operand to the stack pointer. Require the second register
13791 operand to have the number specified in a separate const_int operand.
13792 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
13793 (aarch64_allocate_and_probe_stack_space): Use it.
13794 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
13795 (aarch64_expand_epilogue): Likewise.
13797 2023-06-20 Jakub Jelinek <jakub@redhat.com>
13799 PR middle-end/79173
13800 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
13801 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
13804 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
13806 * calls.h (setjmp_call_p): Change return type from int to bool.
13807 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
13808 (store_one_arg): Change return type from int to bool
13809 and adjust function body accordingly. Change "sibcall_failure"
13811 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
13812 argument to bool. Change "partial_seen" variable to bool.
13813 (load_register_parameters): Change *sibcall_failure
13814 pointer argument to bool.
13815 (check_sibcall_argument_overlap_1): Change return type from int to bool
13816 and adjust function body accordingly.
13817 (check_sibcall_argument_overlap): Ditto. Change
13818 "mark_stored_args_map" argument to bool.
13819 (emit_call_1): Change "already_popped" variable to bool.
13820 (setjmp_call_p): Change return type from int to bool
13821 and adjust function body accordingly.
13822 (initialize_argument_information): Change *must_preallocate
13823 pointer argument to bool.
13824 (expand_call): Change "pcc_struct_value", "must_preallocate"
13825 and "sibcall_failure" variables to bool.
13826 (emit_library_call_value_1): Change "pcc_struct_value"
13829 2023-06-20 Martin Jambor <mjambor@suse.cz>
13832 * ipa-sra.cc (struct caller_issues): New field there_is_one.
13833 (check_for_caller_issues): Set it.
13834 (check_all_callers_for_issues): Check it.
13836 2023-06-20 Martin Jambor <mjambor@suse.cz>
13838 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
13839 (struct ipcp_transformation): Rearrange members according to
13840 C++ class coding convention, add m_uid_to_idx,
13841 get_param_index and maybe_create_parm_idx_map.
13842 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
13843 (compare_uids): Likewise.
13844 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
13845 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
13846 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
13847 (ipcp_update_vr): Likewise.
13848 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
13849 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
13851 2023-06-20 Carl Love <cel@us.ibm.com>
13853 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
13854 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
13855 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
13856 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
13857 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
13858 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
13859 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
13860 * config/rs6000/rs6000-builtins.def
13861 (__builtin_vsx_scalar_extract_exp_to_vec,
13862 __builtin_vsx_scalar_extract_sig_to_vec,
13863 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
13864 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
13865 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
13866 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
13867 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
13868 overloaded instance. Update comments.
13869 * config/rs6000/rs6000-overload.def
13870 (__builtin_vec_scalar_insert_exp): Add new overload definition with
13872 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
13873 overloaded definitions.
13874 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
13875 (DI_to_TI): New mode attribute.
13876 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
13877 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
13878 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
13879 * doc/extend.texi (scalar_extract_exp_to_vec,
13880 scalar_extract_sig_to_vec): Add documentation for new builtins.
13881 (scalar_insert_exp): Add new overloaded builtin definition.
13883 2023-06-20 Li Xu <xuli1@eswincomputing.com>
13885 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
13886 size of vector mask mode to one rvv register.
13888 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13890 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
13892 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
13894 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
13897 2023-06-20 Richard Biener <rguenther@suse.de>
13899 * tree-ssa-dse.cc (dse_classify_store): When we found
13900 no defs and the basic-block with the original definition
13901 ends in __builtin_unreachable[_trap] the store is dead.
13903 2023-06-20 Richard Biener <rguenther@suse.de>
13905 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
13906 keep the virtual SSA form up-to-date.
13908 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
13910 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
13911 New define_insn_and_split.
13913 2023-06-20 Tamar Christina <tamar.christina@arm.com>
13915 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
13917 2023-06-20 Jan Beulich <jbeulich@suse.com>
13919 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
13920 constraint. Add new AVX512F alternative.
13922 2023-06-20 Richard Biener <rguenther@suse.de>
13925 * dwarf2out.cc (process_scope_var): Continue processing
13926 the decl after setting a parent in case the existing DIE
13929 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
13931 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
13932 (riscv_arg_has_vector): Simplify.
13933 (riscv_pass_in_vector_p): Adjust warning message.
13935 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
13937 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
13938 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
13939 * config/riscv/riscv.md (riscv_frcsr): New patterns.
13940 (riscv_fscsr): Likewise.
13942 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
13944 PR rtl-optimization/110305
13945 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
13946 Handle HONOR_SNANS for x + 0.0.
13948 2023-06-19 Jan Hubicka <jh@suse.cz>
13950 PR tree-optimization/109811
13951 PR tree-optimization/109849
13952 * passes.def: Add phiprop to early optimization passes.
13953 * tree-ssa-phiprop.cc: Allow clonning.
13955 2023-06-19 Tamar Christina <tamar.christina@arm.com>
13957 * config/aarch64/aarch64.md (arches): Add nosimd.
13958 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
13961 2023-06-19 Tamar Christina <tamar.christina@arm.com>
13962 Omar Tahir <Omar.Tahir2@arm.com>
13964 * gensupport.cc (class conlist, add_constraints, add_attributes,
13965 skip_spaces, expect_char, preprocess_compact_syntax,
13966 parse_section_layout, parse_section, convert_syntax): New.
13967 (process_rtx): Check for conversion.
13968 * genoutput.cc (process_template): Check for unresolved iterators.
13969 (class data): Add compact_syntax_p.
13970 (gen_insn): Use it.
13971 * gensupport.h (compact_syntax): New.
13972 (hash-set.h): Include.
13973 * doc/md.texi: Document it.
13975 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
13977 * recog.h (check_asm_operands): Change return type from int to bool.
13978 (insn_invalid_p): Ditto.
13979 (verify_changes): Ditto.
13980 (apply_change_group): Ditto.
13981 (constrain_operands): Ditto.
13982 (constrain_operands_cached): Ditto.
13983 (validate_replace_rtx_subexp): Ditto.
13984 (validate_replace_rtx): Ditto.
13985 (validate_replace_rtx_part): Ditto.
13986 (validate_replace_rtx_part_nosimplify): Ditto.
13987 (added_clobbers_hard_reg_p): Ditto.
13988 (peep2_regno_dead_p): Ditto.
13989 (peep2_reg_dead_p): Ditto.
13990 (store_data_bypass_p): Ditto.
13991 (if_test_bypass_p): Ditto.
13992 * rtl.h (split_all_insns_noflow): Change
13993 return type from unsigned int to void.
13994 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
13995 of generated added_clobbers_hard_reg_p from int to bool and adjust
13996 function body accordingly. Change "used" variable type from
13998 * recog.cc (check_asm_operands): Change return type
13999 from int to bool and adjust function body accordingly.
14000 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
14001 (verify_changes): Change return type from int to bool.
14002 (apply_change_group): Change return type from int to bool
14003 and adjust function body accordingly.
14004 (validate_replace_rtx_subexp): Change return type from int to bool.
14005 (validate_replace_rtx): Ditto.
14006 (validate_replace_rtx_part): Ditto.
14007 (validate_replace_rtx_part_nosimplify): Ditto.
14008 (constrain_operands_cached): Ditto.
14009 (constrain_operands): Ditto. Change "lose" and "win"
14010 variables type from int to bool.
14011 (split_all_insns_noflow): Change return type from unsigned int
14012 to void and adjust function body accordingly.
14013 (peep2_regno_dead_p): Change return type from int to bool.
14014 (peep2_reg_dead_p): Ditto.
14015 (peep2_find_free_register): Change "success"
14016 variable type from int to bool
14017 (store_data_bypass_p_1): Change return type from int to bool.
14018 (store_data_bypass_p): Ditto.
14020 2023-06-19 Li Xu <xuli1@eswincomputing.com>
14022 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
14025 2023-06-19 Pan Li <pan2.li@intel.com>
14028 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
14030 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
14031 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
14032 VF_ZVE63 and VF_ZVE32.
14033 * config/riscv/vector.md
14034 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
14035 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
14036 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
14037 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
14038 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
14039 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
14040 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
14041 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
14042 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
14043 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
14045 2023-06-19 Pan Li <pan2.li@intel.com>
14048 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
14050 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
14051 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
14052 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
14053 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
14054 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
14055 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
14056 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
14057 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
14058 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
14059 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
14060 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
14061 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
14062 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
14063 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
14065 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
14067 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
14068 (gcn_init_libfuncs): Add div and mod functions for all modes.
14069 Add placeholders for divmod functions.
14070 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
14072 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
14074 * tree-vect-generic.cc: Include optabs-libfuncs.h.
14075 (get_compute_type): Check optab_libfunc.
14076 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
14077 (vectorizable_operation): Check optab_libfunc.
14079 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
14081 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
14082 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
14083 (V_MOV, V_MOV_ALT): Likewise.
14084 (scalar_mode, SCALAR_MODE): Add TImode.
14085 (vnsi, VnSI, vndi, VnDI): Likewise.
14086 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
14087 (mov<mode>, mov<mode>_unspec): Use V_MOV.
14088 (*mov<mode>_4reg): New insn.
14089 (mov<mode>_exec): New 4reg variant.
14090 (mov<mode>_sgprbase): Likewise.
14091 (reload_in<mode>, reload_out<mode>): Use V_MOV.
14092 (vec_set<mode>): Likewise.
14093 (vec_duplicate<mode><exec>): New 4reg variant.
14094 (vec_extract<mode><scalar_mode>): Likewise.
14095 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
14096 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
14097 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
14098 (fold_extract_last_<mode>): Use V_MOV.
14099 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
14100 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
14101 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
14102 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
14103 gather<mode>_insn_2offsets<exec>): Use V_MOV.
14104 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
14105 scatter<mode>_insn_1offset<exec_scatter>,
14106 scatter<mode>_insn_1offset_ds<exec_scatter>,
14107 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
14108 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
14109 mask_scatter_store<mode><vnsi>): Likewise.
14110 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
14111 (gcn_hard_regno_mode_ok): Likewise.
14112 (GEN_VNM): Add TImode support.
14113 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
14114 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
14115 V8TImode, and V2TImode.
14116 (print_operand): Add 'J' and 'K' print codes.
14118 2023-06-19 Richard Biener <rguenther@suse.de>
14120 PR tree-optimization/110298
14121 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
14122 Clear number of iterations info before cleaning up the CFG.
14124 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14126 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
14127 Simplify vec_concat of lowpart subreg and high part vec_select.
14129 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
14131 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
14133 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
14135 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
14136 Handle null niters_skip.
14138 2023-06-19 Richard Biener <rguenther@suse.de>
14140 * config/aarch64/aarch64.cc
14141 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
14142 to LOOP_VINFO_MASKS.
14144 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
14147 * common/config/avr/avr-common.cc: Remove setting
14148 of OPT_fdelete_null_pointer_checks.
14149 * config/avr/avr.cc (avr_option_override): Clear
14150 flag_delete_null_pointer_checks if zero_address_valid.
14151 (avr_addr_space_zero_address_valid): New function.
14152 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
14155 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14156 Robin Dapp <rdapp.gcc@gmail.com>
14158 * doc/md.texi: Add len_mask{load,store}.
14159 * genopinit.cc (main): Ditto.
14161 * internal-fn.cc (len_maskload_direct): Ditto.
14162 (len_maskstore_direct): Ditto.
14163 (expand_call_mem_ref): Ditto.
14164 (expand_partial_load_optab_fn): Ditto.
14165 (expand_len_maskload_optab_fn): Ditto.
14166 (expand_partial_store_optab_fn): Ditto.
14167 (expand_len_maskstore_optab_fn): Ditto.
14168 (direct_len_maskload_optab_supported_p): Ditto.
14169 (direct_len_maskstore_optab_supported_p): Ditto.
14170 * internal-fn.def (LEN_MASK_LOAD): Ditto.
14171 (LEN_MASK_STORE): Ditto.
14172 * optabs.def (OPTAB_CD): Ditto.
14174 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14176 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
14178 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14180 * config/riscv/autovec.md (<optab><mode>3): Implement binop
14182 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
14183 (enum vxrm_field_enum): Rename this...
14184 (enum fixed_point_rounding_mode): ...to this.
14185 (enum frm_field_enum): Rename this...
14186 (enum floating_point_rounding_mode): ...to this.
14187 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
14188 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
14190 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
14191 (riscv_excess_precision): Do not convert to float for ZVFH.
14192 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
14194 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14196 * config/riscv/vector-iterators.md: Add VI_QH iterator.
14197 * config/riscv/autovec-opt.md
14198 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
14199 that includes sign extension.
14200 (@pred_extract_first_sextsi<mode>): Dito for SImode.
14202 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
14204 * config/riscv/autovec.md (vec_set<mode>): Implement.
14205 (vec_extract<mode><vel>): Implement.
14206 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
14207 (emit_vlmax_slide_insn): Declare.
14208 (emit_nonvlmax_slide_tu_insn): Declare.
14209 (emit_scalar_move_insn): Export.
14210 (emit_nonvlmax_integer_move_insn): Export.
14211 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
14212 (emit_nonvlmax_slide_tu_insn): New function.
14213 (emit_vlmax_masked_mu_insn): No change.
14214 (emit_vlmax_integer_move_insn): Export.
14216 2023-06-19 Richard Biener <rguenther@suse.de>
14218 * tree-vectorizer.h (enum vect_partial_vector_style): New.
14219 (_loop_vec_info::partial_vector_style): Likewise.
14220 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
14221 (rgroup_controls::compare_type): Add.
14222 (vec_loop_masks): Change from a typedef to auto_vec<>
14224 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
14225 Adjust. Convert niters_skip to compare_type.
14226 (vect_set_loop_condition_partial_vectors_avx512): New function
14227 implementing the AVX512 partial vector codegen.
14228 (vect_set_loop_condition): Dispatch to the correct
14229 vect_set_loop_condition_partial_vectors_* function based on
14230 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
14231 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
14232 in the original niter type.
14233 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
14234 partial_vector_style.
14235 (can_produce_all_loop_masks_p): Adjust.
14236 (vect_verify_full_masking): Produce the rgroup_controls vector
14237 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
14238 (vect_verify_full_masking_avx512): New function implementing
14239 verification of AVX512 style masking.
14240 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
14241 (vect_analyze_loop_2): Also try AVX512 style masking.
14243 (vect_estimate_min_profitable_iters): Implement AVX512 style
14244 mask producing cost.
14245 (vect_record_loop_mask): Do not build the rgroup_controls
14246 vector here but record masks in a hash-set.
14247 (vect_get_loop_mask): Implement AVX512 style mask query,
14248 complementing the existing while_ult style.
14250 2023-06-19 Richard Biener <rguenther@suse.de>
14252 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
14254 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
14255 (vectorize_fold_left_reduction): Adjust.
14256 (vect_transform_reduction): Likewise.
14257 (vectorizable_live_operation): Likewise.
14258 * tree-vect-stmts.cc (vectorizable_call): Likewise.
14259 (vectorizable_operation): Likewise.
14260 (vectorizable_store): Likewise.
14261 (vectorizable_load): Likewise.
14262 (vectorizable_condition): Likewise.
14264 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
14267 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
14268 Add Optimization option property.
14270 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14272 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
14273 Add new pattern for the abovementioned case.
14275 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
14277 * config/xtensa/xtensa.cc
14278 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
14280 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
14282 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
14284 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
14286 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
14288 2023-06-19 liuhongt <hongtao.liu@intel.com>
14291 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
14293 (sse2_packsswb<mask_name>): .. this, ..
14294 (avx2_packsswb<mask_name>): .. this and ..
14295 (avx512bw_packsswb<mask_name>): .. this.
14296 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
14297 (sse2_packssdw<mask_name>): .. this, ..
14298 (avx2_packssdw<mask_name>): .. this and ..
14299 (avx512bw_packssdw<mask_name>): .. this.
14301 2023-06-19 liuhongt <hongtao.liu@intel.com>
14304 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
14305 UNSPEC_US_TRUNCATE instead of original us_truncate for
14307 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
14309 (mmx_packsswb): .. this and ..
14310 (mmx_packuswb): .. this.
14311 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
14313 (s_trunsuffix): Removed code iterator.
14314 (any_s_truncate): Ditto.
14315 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
14316 UNSPEC_US_TRUNCATE instead of original us_truncate.
14317 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
14318 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
14320 2023-06-18 Pan Li <pan2.li@intel.com>
14322 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
14324 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
14326 * rtl.h (*rtx_equal_p_callback_function):
14327 Change return type from int to bool.
14328 (rtx_equal_p): Ditto.
14329 (*hash_rtx_callback_function): Ditto.
14330 * rtl.cc (rtx_equal_p): Change return type from int to bool
14331 and adjust function body accordingly.
14332 * early-remat.cc (scratch_equal): Ditto.
14333 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
14334 (hash_with_unspec_callback): Ditto.
14336 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
14338 * config/arc/arc.md (movqi_insn): Allow certain constants to
14339 be stored into memory in the pattern's condition.
14340 (movsf_insn): Similarly.
14342 2023-06-18 Honza <jh@ryzen3.suse.cz>
14344 PR tree-optimization/109849
14345 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
14346 ES; handle ipa_predicate::not_sra_candidate.
14347 (evaluate_properties_for_edge): Pass es to
14348 evaluate_conditions_for_known_args.
14349 (ipa_fn_summary_t::duplicate): Handle sra candidates.
14350 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
14351 (load_or_store_of_ptr_parameter): New function.
14352 (points_to_possible_sra_candidate_p): New function.
14353 (analyze_function_body): Initialize points_to_possible_sra_candidate;
14354 determine sra predicates.
14355 (estimate_ipcp_clone_size_and_time): Update call of
14356 evaluate_conditions_for_known_args.
14357 (remap_edge_params): Update points_to_possible_sra_candidate.
14358 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
14359 (write_ipa_call_summary): Likewise.
14360 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
14361 (dump_condition): Dump it.
14362 * ipa-predicate.h (struct inline_param_summary): Add
14363 points_to_possible_sra_candidate.
14365 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
14367 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
14368 function for setting the carry flag.
14369 (ix86_expand_builtin) <handlecarry>: Use it here.
14370 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
14371 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
14372 (usubc<mode>5): Likewise.
14374 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
14376 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
14377 for the immediate constant shift count.
14378 (*concat<mode><dwi>3_2): Likewise.
14379 (*concat<mode><dwi>3_3): Likewise.
14380 (*concat<mode><dwi>3_4): Likewise.
14381 (*concat<mode><dwi>3_5): Likewise.
14382 (*concat<mode><dwi>3_6): Likewise.
14384 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
14386 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
14387 (hash_rtx): Remove.
14388 * early-remat.cc (remat_candidate_hasher::equal): Update
14389 to call rtx_equal_p with rtx_equal_p_callback_function argument.
14390 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
14391 (rtx_equal_p): Remove.
14392 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
14393 argument with NULL default value.
14394 (rtx_equal_p_cb): Remove function declaration.
14395 (hash_rtx_cb): Ditto.
14396 (hash_rtx): Add hash_rtx_callback_function argument
14397 with NULL default value.
14398 * sel-sched-ir.cc (free_nop_pool): Update function comment.
14399 (skip_unspecs_callback): Ditto.
14400 (vinsn_init): Update to call hash_rtx with
14401 hash_rtx_callback_function argument.
14402 (vinsn_equal_p): Ditto.
14404 2023-06-18 yulong <shiyulong@iscas.ac.cn>
14406 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
14407 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
14408 (ADJUST_ALIGNMENT): Ditto.
14409 (RVV_TUPLE_PARTIAL_MODES): Ditto.
14410 (ADJUST_NUNITS): Ditto.
14411 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
14413 (vfloat16mf4x3_t): Ditto.
14414 (vfloat16mf4x4_t): Ditto.
14415 (vfloat16mf4x5_t): Ditto.
14416 (vfloat16mf4x6_t): Ditto.
14417 (vfloat16mf4x7_t): Ditto.
14418 (vfloat16mf4x8_t): Ditto.
14419 (vfloat16mf2x2_t): Ditto.
14420 (vfloat16mf2x3_t): Ditto.
14421 (vfloat16mf2x4_t): Ditto.
14422 (vfloat16mf2x5_t): Ditto.
14423 (vfloat16mf2x6_t): Ditto.
14424 (vfloat16mf2x7_t): Ditto.
14425 (vfloat16mf2x8_t): Ditto.
14426 (vfloat16m1x2_t): Ditto.
14427 (vfloat16m1x3_t): Ditto.
14428 (vfloat16m1x4_t): Ditto.
14429 (vfloat16m1x5_t): Ditto.
14430 (vfloat16m1x6_t): Ditto.
14431 (vfloat16m1x7_t): Ditto.
14432 (vfloat16m1x8_t): Ditto.
14433 (vfloat16m2x2_t): Ditto.
14434 (vfloat16m2x3_t): Ditto.
14435 (vfloat16m2x4_t): Ditto.
14436 (vfloat16m4x2_t): Ditto.
14437 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
14438 (vfloat16mf4x3_t): Ditto.
14439 (vfloat16mf4x4_t): Ditto.
14440 (vfloat16mf4x5_t): Ditto.
14441 (vfloat16mf4x6_t): Ditto.
14442 (vfloat16mf4x7_t): Ditto.
14443 (vfloat16mf4x8_t): Ditto.
14444 (vfloat16mf2x2_t): Ditto.
14445 (vfloat16mf2x3_t): Ditto.
14446 (vfloat16mf2x4_t): Ditto.
14447 (vfloat16mf2x5_t): Ditto.
14448 (vfloat16mf2x6_t): Ditto.
14449 (vfloat16mf2x7_t): Ditto.
14450 (vfloat16mf2x8_t): Ditto.
14451 (vfloat16m1x2_t): Ditto.
14452 (vfloat16m1x3_t): Ditto.
14453 (vfloat16m1x4_t): Ditto.
14454 (vfloat16m1x5_t): Ditto.
14455 (vfloat16m1x6_t): Ditto.
14456 (vfloat16m1x7_t): Ditto.
14457 (vfloat16m1x8_t): Ditto.
14458 (vfloat16m2x2_t): Ditto.
14459 (vfloat16m2x3_t): Ditto.
14460 (vfloat16m2x4_t): Ditto.
14461 (vfloat16m4x2_t): Ditto.
14462 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
14463 * config/riscv/riscv.md: New.
14464 * config/riscv/vector-iterators.md: New.
14466 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
14468 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
14469 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
14470 Generalize special case for converting TImode to V1TImode to handle
14471 all 128-bit vector conversions.
14473 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
14475 * gcc-ar.cc (main): Refactor to slightly reduce code
14476 duplication. Avoid unnecessary elements in nargv.
14478 2023-06-16 Pan Li <pan2.li@intel.com>
14481 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
14482 integer reduction expand.
14483 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
14484 and the LMUL1 attr respectively.
14485 * config/riscv/vector.md
14486 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
14487 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
14488 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
14489 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
14490 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
14491 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
14492 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
14494 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14497 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
14499 2023-06-16 Jakub Jelinek <jakub@redhat.com>
14501 PR middle-end/79173
14502 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
14503 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
14504 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
14506 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
14507 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
14508 * builtins.cc (fold_builtin_addc_subc): New function.
14509 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
14510 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
14512 2023-06-16 Jakub Jelinek <jakub@redhat.com>
14514 PR tree-optimization/110271
14515 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
14516 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
14517 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
14519 2023-06-16 Martin Jambor <mjambor@suse.cz>
14521 * configure: Regenerate.
14523 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
14524 Uros Bizjak <ubizjak@gmail.com>
14527 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
14528 define_insn_and_split combine *add<dwi>3_doubleword with
14529 a *concat<mode><dwi>3 for more efficient lowering after reload.
14531 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
14533 * ira-lives.cc: Include except.h.
14534 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
14535 when the pseudo does not live at the exception landing pad.
14537 2023-06-16 Alex Coplan <alex.coplan@arm.com>
14539 * doc/invoke.texi: Document -Welaborated-enum-base.
14541 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14543 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
14544 (ushrn2_n): ... This.
14545 (sqshrn2_n): Rename builtins to...
14546 (ssqshrn2_n): ... This.
14547 (uqshrn2_n): Rename builtins to...
14548 (uqushrn2_n): ... This.
14549 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
14550 (vqshrn_high_n_s32): Likewise.
14551 (vqshrn_high_n_s64): Likewise.
14552 (vqshrn_high_n_u16): Likewise.
14553 (vqshrn_high_n_u32): Likewise.
14554 (vqshrn_high_n_u64): Likewise.
14555 (vshrn_high_n_s16): Likewise.
14556 (vshrn_high_n_s32): Likewise.
14557 (vshrn_high_n_s64): Likewise.
14558 (vshrn_high_n_u16): Likewise.
14559 (vshrn_high_n_u32): Likewise.
14560 (vshrn_high_n_u64): Likewise.
14561 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
14563 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
14564 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
14565 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
14566 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
14567 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
14568 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
14569 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
14570 Update expander for the above.
14572 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14574 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
14575 (shrn2_n): ... This.
14576 (rshrn2): Rename builtins to...
14577 (rshrn2_n): ... This.
14578 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
14579 (vrshrn_high_n_s32): Likewise.
14580 (vrshrn_high_n_s64): Likewise.
14581 (vrshrn_high_n_u16): Likewise.
14582 (vrshrn_high_n_u32): Likewise.
14583 (vrshrn_high_n_u64): Likewise.
14584 (vshrn_high_n_s16): Likewise.
14585 (vshrn_high_n_s32): Likewise.
14586 (vshrn_high_n_s64): Likewise.
14587 (vshrn_high_n_u16): Likewise.
14588 (vshrn_high_n_u32): Likewise.
14589 (vshrn_high_n_u64): Likewise.
14590 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
14592 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
14593 (aarch64_shrn2<mode>_insn_le): Likewise.
14594 (aarch64_shrn2<mode>_insn_be): Likewise.
14595 (aarch64_shrn2<mode>): Likewise.
14596 (aarch64_rshrn2<mode>_insn_le): Likewise.
14597 (aarch64_rshrn2<mode>_insn_be): Likewise.
14598 (aarch64_rshrn2<mode>): Likewise.
14599 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
14600 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
14601 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
14602 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
14603 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
14604 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
14605 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
14606 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
14607 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
14608 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
14609 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
14610 (aarch64_sqshrun2_n<mode>): New define_expand.
14611 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
14612 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
14613 (aarch64_sqrshrun2_n<mode>): New define_expand.
14614 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
14615 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
14616 Delete unspec values.
14617 (VQSHRN_N): Delete int iterator.
14619 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14621 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
14622 * config/aarch64/aarch64-simd.md
14623 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
14624 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
14625 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
14626 * config/aarch64/iterators.md (shrn_s): New code attribute.
14628 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14630 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
14632 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
14633 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
14634 (aarch64_sqrshrun_n<mode>_insn): Likewise.
14635 (aarch64_sqshrun_n<mode>_insn): Likewise.
14636 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
14637 (aarch64_sqshrun_n<mode>): Likewise.
14638 (aarch64_sqrshrun_n<mode>): Likewise.
14639 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
14641 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14643 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
14644 (shrn_n): ... This.
14645 (rshrn): Rename builtins to...
14646 (rshrn_n): ... This.
14647 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
14648 (vshrn_n_s32): Likewise.
14649 (vshrn_n_s64): Likewise.
14650 (vshrn_n_u16): Likewise.
14651 (vshrn_n_u32): Likewise.
14652 (vshrn_n_u64): Likewise.
14653 (vrshrn_n_s16): Likewise.
14654 (vrshrn_n_s32): Likewise.
14655 (vrshrn_n_s64): Likewise.
14656 (vrshrn_n_u16): Likewise.
14657 (vrshrn_n_u32): Likewise.
14658 (vrshrn_n_u64): Likewise.
14659 * config/aarch64/aarch64-simd.md
14660 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
14661 (aarch64_shrn<mode>): Likewise.
14662 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
14663 (aarch64_rshrn<mode>): Likewise.
14664 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
14665 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
14666 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
14667 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
14668 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
14669 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
14670 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
14671 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
14672 (aarch64_sqshrun_n<mode>): Likewise.
14673 (aarch64_sqrshrun_n<mode>): Likewise.
14674 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
14675 (TRUNCEXTEND): New code attribute.
14676 (TRUNC_SHIFT): Likewise.
14677 (shrn_op): Likewise.
14678 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
14681 2023-06-16 Pan Li <pan2.li@intel.com>
14683 * config/riscv/riscv-vsetvl.cc
14684 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
14686 2023-06-16 Richard Biener <rguenther@suse.de>
14688 PR tree-optimization/110278
14689 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
14690 (x != (typeof x)(x == 0) -> true): Likewise.
14692 2023-06-16 Pali Rohár <pali@kernel.org>
14694 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
14695 (REAL_LIBGCC_SPEC): New define.
14696 * config/i386/mingw.opt: Add mcrtdll=
14697 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
14698 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
14699 (STARTFILE_SPEC): Adjust for -mcrtdll=.
14700 * doc/invoke.texi: Add mcrtdll= documentation.
14702 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
14704 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
14705 (mips_handle_code_readable_attr):New static function.
14706 (mips_get_code_readable_attr):New static enum function.
14707 (mips_set_current_function):Set the code_readable mode.
14708 (mips_option_override):Same as above.
14709 * doc/extend.texi:Document code_readable.
14711 2023-06-16 Richard Biener <rguenther@suse.de>
14713 PR tree-optimization/110269
14714 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
14715 with tree_expr_nonzero_p ...
14716 * match.pd (cmp (convert? addr@0) integer_zerop): With this
14719 2023-06-15 Marek Polacek <polacek@redhat.com>
14721 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
14722 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
14723 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
14724 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
14725 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
14727 * configure: Regenerate.
14728 * doc/install.texi: Document --enable-host-pie.
14730 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
14732 * regcprop.cc (maybe_mode_change): Enable stack pointer
14735 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
14737 PR tree-optimization/110266
14738 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
14740 (adjust_realpart_expr): Ditto.
14742 2023-06-15 Jan Beulich <jbeulich@suse.com>
14744 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
14747 2023-06-15 Jan Beulich <jbeulich@suse.com>
14749 * config/i386/constraints.md: Mention k and r for B.
14751 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
14752 Andrew Pinski <apinski@marvell.com>
14755 * config/loongarch/loongarch.md: Modify the register constraints for template
14756 "jumptable" and "indirect_jump" from "r" to "e".
14758 2023-06-15 Xi Ruoyao <xry111@xry111.site>
14760 * config/loongarch/loongarch-tune.h (loongarch_align): New
14762 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
14764 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
14766 * config/loongarch/loongarch.cc
14767 (loongarch_option_override_internal): Set the value of
14768 -falign-functions= if -falign-functions is enabled but no value
14769 is given. Likewise for -falign-labels=.
14771 2023-06-15 Jakub Jelinek <jakub@redhat.com>
14773 PR middle-end/79173
14774 * internal-fn.def (UADDC, USUBC): New internal functions.
14775 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
14776 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
14777 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
14778 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
14779 match_uaddc_usubc): New functions.
14780 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
14781 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
14782 other optimizations have been successful for those.
14783 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
14784 * fold-const-call.cc (fold_const_call): Likewise.
14785 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
14786 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
14787 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
14789 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
14790 define_expand patterns.
14791 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
14792 into NOTE_INSN_DELETED note rather than nop instruction.
14793 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
14796 2023-06-15 Jakub Jelinek <jakub@redhat.com>
14798 PR middle-end/79173
14799 * config/i386/i386.md (subborrow<mode>): Add alternative with
14800 memory destination and add for it define_peephole2
14801 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
14802 destination in these patterns.
14804 2023-06-15 Jakub Jelinek <jakub@redhat.com>
14806 PR middle-end/79173
14807 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
14808 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
14809 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
14810 using memory destination in these patterns.
14812 2023-06-15 Jakub Jelinek <jakub@redhat.com>
14814 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
14815 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
14816 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
14817 * fold-const-call.cc (fold_const_call): ... here.
14819 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
14821 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
14822 Rename to <su>abd<mode>3.
14823 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
14826 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
14828 * doc/md.texi (sabd, uabd): Document them.
14829 * internal-fn.def (ABD): Use new optab.
14830 * optabs.def (sabd_optab, uabd_optab): New optabs,
14831 * tree-vect-patterns.cc (vect_recog_absolute_difference):
14832 Recognize the following idiom abs (a - b).
14833 (vect_recog_sad_pattern): Refactor to use
14834 vect_recog_absolute_difference.
14835 (vect_recog_abd_pattern): Use patterns found by
14836 vect_recog_absolute_difference to build a new ABD
14839 2023-06-15 chenxiaolong <chenxl04200420@163.com>
14841 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
14842 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
14844 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14846 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
14847 (expand_vec_perm_const_1): Add merge optmization.
14849 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
14852 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
14853 (riscv_pass_by_reference): Return true for vector mode
14855 2023-06-15 Pan Li <pan2.li@intel.com>
14857 * config/riscv/autovec-opt.md: Align the predictor sytle.
14858 * config/riscv/autovec.md: Ditto.
14860 2023-06-15 Pan Li <pan2.li@intel.com>
14862 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
14863 Take elen instead of scalar BITS_PER_WORD.
14864 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
14865 instead of scaler BITS_PER_WORD.
14867 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
14869 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
14871 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14873 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
14874 Fix signed comparison warning in loop from npats to enelts.
14876 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
14878 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
14879 to offloading compilation.
14880 * config/gcn/mkoffload.cc (main): Adjust.
14881 * config/nvptx/mkoffload.cc (main): Likewise.
14882 * doc/invoke.texi (foffload-options): Update example.
14884 2023-06-14 liuhongt <hongtao.liu@intel.com>
14887 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
14888 for alternative 2 since there's no evex version for vpcmpeqd
14891 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
14893 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
14895 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
14897 * config/sh/divtab.cc: Remove.
14899 2023-06-13 Jakub Jelinek <jakub@redhat.com>
14901 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
14902 superfluous spaces around \t for vpcmpeqd.
14904 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
14906 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
14907 clearing vectors with only a single element. Set CLEARED if the
14908 vector was initialized to zero.
14910 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
14912 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
14915 (TUPLE_ENTRY): Undef.
14917 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14919 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
14920 (shuffle_generic_patterns): Ditto.
14921 (expand_vec_perm_const_1): Ditto.
14923 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14925 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
14926 (shuffle_decompress_patterns): Ditto.
14928 2023-06-13 Richard Biener <rguenther@suse.de>
14930 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
14932 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
14933 Kito Cheng <kito.cheng@sifive.com>
14935 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
14936 warning flag if func is not builtin
14937 * config/riscv/riscv.cc
14938 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
14939 (riscv_arg_has_vector): Determine whether the arg is vector type.
14940 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
14941 (riscv_init_cumulative_args): The same as header.
14942 (riscv_get_arg_info): Add the checking.
14943 (riscv_function_value): Check the func return and set warning flag
14944 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
14945 determine whether warning psabi or not.
14947 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14949 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
14950 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
14951 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
14952 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
14954 (arm_output_load_tpidr): Define.
14955 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
14956 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
14958 (reload_tp_hard): Likewise.
14959 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
14961 * doc/invoke.texi (Arm Options, mtp): Document new values.
14963 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14966 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
14967 AARCH64_TPIDRRO_EL0 value.
14968 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
14969 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
14970 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
14971 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
14973 2023-06-13 Alexandre Oliva <oliva@adacore.com>
14975 * range-op-float.cc (frange_nextafter): Drop inline.
14976 (frelop_early_resolve): Add static.
14977 (frange_float): Likewise.
14979 2023-06-13 Richard Biener <rguenther@suse.de>
14981 PR middle-end/110232
14982 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
14983 to check whether the buffer covers the whole vector.
14985 2023-06-13 Richard Biener <rguenther@suse.de>
14987 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
14988 .MASK_LOAD and friends set the size of the access to unknown.
14990 2023-06-13 Tejas Belagod <tbelagod@arm.com>
14993 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
14994 calls that have a constant input predicate vector.
14995 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
14996 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
14997 (svlast_impl::vect_all_same): Check if all vector elements are equal.
14999 2023-06-13 Andi Kleen <ak@linux.intel.com>
15001 * config/i386/gcc-auto-profile: Regenerate.
15003 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15005 * config/riscv/vector-iterators.md: Fix requirement.
15007 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15009 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
15010 (shuffle_decompress_patterns): New function.
15011 (expand_vec_perm_const_1): Add decompress optimization.
15013 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
15015 PR rtl-optimization/101188
15016 * postreload.cc (reload_cse_move2add_invalidate): New function,
15018 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
15020 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15022 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
15023 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
15024 and if maxv == 1, use constant element for duplicating into register.
15026 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
15028 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
15029 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
15030 (gimplify_adjust_omp_clauses): Change
15031 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
15032 GOMP_MAP_FORCE_PRESENT.
15033 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
15034 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
15035 to/from clauses with present modifier.
15037 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15039 PR tree-optimization/110205
15040 * range-op-float.cc (range_operator::fold_range): Add default FII
15042 * range-op-mixed.h (class operator_gt): Add missing final overrides.
15043 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
15044 (operator_lshift ::update_bitmask): Add final override.
15045 (operator_rshift ::update_bitmask): Add final override.
15046 * range-op.h (range_operator::fold_range): Add FII prototype.
15048 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15050 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
15051 Use range_op_handler directly.
15052 * range-op.cc (range_op_handler::range_op_handler): Unsigned
15053 param instead of tree-code.
15054 (ptr_op_widen_plus_signed): Delete.
15055 (ptr_op_widen_plus_unsigned): Delete.
15056 (ptr_op_widen_mult_signed): Delete.
15057 (ptr_op_widen_mult_unsigned): Delete.
15058 (range_op_table::initialize_integral_ops): Add new opcodes.
15059 * range-op.h (range_op_handler): Use unsigned.
15060 (OP_WIDEN_MULT_SIGNED): New.
15061 (OP_WIDEN_MULT_UNSIGNED): New.
15062 (OP_WIDEN_PLUS_SIGNED): New.
15063 (OP_WIDEN_PLUS_UNSIGNED): New.
15064 (RANGE_OP_TABLE_SIZE): New.
15065 (range_op_table::operator []): Use unsigned.
15066 (range_op_table::set): Use unsigned.
15067 (m_range_tree): Make unsigned.
15068 (ptr_op_widen_mult_signed): Remove.
15069 (ptr_op_widen_mult_unsigned): Remove.
15070 (ptr_op_widen_plus_signed): Remove.
15071 (ptr_op_widen_plus_unsigned): Remove.
15073 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15075 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
15076 manually as there is no access to the default operator.
15077 (cfn_copysign::fold_range): Don't check for validity.
15078 (cfn_ubsan::fold_range): Ditto.
15079 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
15080 * range-op.cc (default_operator): New.
15081 (range_op_handler::range_op_handler): Use default_operator
15083 (range_op_handler::operator bool): Move from header, compare
15084 against default operator.
15085 (range_op_handler::range_op): New.
15086 * range-op.h (range_op_handler::operator bool): Move.
15088 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15090 * range-op.cc (unified_table): Delete.
15091 (range_op_table operator_table): Instantiate.
15092 (range_op_table::range_op_table): Rename from unified_table.
15093 (range_op_handler::range_op_handler): Use range_op_table.
15094 * range-op.h (range_op_table::operator []): Inline.
15095 (range_op_table::set): Inline.
15097 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15099 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
15101 * gimple-range-op.cc (get_code): Rename from get_code_and_type
15103 (gimple_range_op_handler::supported_p): No need for type.
15104 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
15105 (cfn_copysign::fold_range): Ditto.
15106 (cfn_ubsan::fold_range): Ditto.
15107 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
15108 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
15109 * range-op-float.cc (operator_plus::op1_range): Ditto.
15110 (operator_mult::op1_range): Ditto.
15111 (range_op_float_tests): Ditto.
15112 * range-op.cc (get_op_handler): Remove.
15113 (range_op_handler::set_op_handler): Remove.
15114 (operator_plus::op1_range): No need for type.
15115 (operator_minus::op1_range): Ditto.
15116 (operator_mult::op1_range): Ditto.
15117 (operator_exact_divide::op1_range): Ditto.
15118 (operator_cast::op1_range): Ditto.
15119 (perator_bitwise_not::fold_range): Ditto.
15120 (operator_negate::fold_range): Ditto.
15121 * range-op.h (range_op_handler::range_op_handler): Remove type param.
15122 (range_cast): No need for type.
15123 (range_op_table::operator[]): Check for enum_code >= 0.
15124 * tree-data-ref.cc (compute_distributive_range): No need for type.
15125 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
15126 * value-query.cc (range_query::get_tree_range): Ditto.
15127 * value-relation.cc (relation_oracle::validate_relation): Ditto.
15128 * vr-values.cc (range_of_var_in_loop): Ditto.
15129 (simplify_using_ranges::fold_cond_with_ops): Ditto.
15131 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15133 * range-op-mixed.h (operator_max): Remove final.
15134 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
15135 (pointer_table::pointer_table): Remove.
15136 (class hybrid_max_operator): New.
15137 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
15138 * range-op.cc (pointer_tree_table): Remove.
15139 (unified_table::unified_table): Comment out MAX_EXPR.
15140 (get_op_handler): Remove check of pointer table.
15141 * range-op.h (class pointer_table): Remove.
15143 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15145 * range-op-mixed.h (operator_min): Remove final.
15146 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
15147 (class hybrid_min_operator): New.
15148 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
15149 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
15151 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15153 * range-op-mixed.h (operator_bitwise_or): Remove final.
15154 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
15155 (class hybrid_or_operator): New.
15156 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
15157 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
15159 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15161 * range-op-mixed.h (operator_bitwise_and): Remove final.
15162 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
15163 (class hybrid_and_operator): New.
15164 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
15165 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
15167 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15169 * Makefile.in (OBJS): Add range-op-ptr.o.
15170 * range-op-mixed.h (update_known_bitmask): Move prototype here.
15171 (minus_op1_op2_relation_effect): Move prototype here.
15172 (wi_includes_zero_p): Move function to here.
15173 (wi_zero_p): Ditto.
15174 * range-op.cc (update_known_bitmask): Remove static.
15175 (wi_includes_zero_p): Move to header.
15176 (wi_zero_p): Move to header.
15177 (minus_op1_op2_relation_effect): Remove static.
15178 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
15179 (pointer_plus_operator): Ditto.
15180 (pointer_min_max_operator): Ditto.
15181 (pointer_and_operator): Ditto.
15182 (pointer_or_operator): Ditto.
15183 (pointer_table): Ditto.
15184 (range_op_table::initialize_pointer_ops): Ditto.
15185 * range-op-ptr.cc: New.
15187 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15189 * range-op-mixed.h (class operator_max): Move from...
15190 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
15191 (get_op_handler): Remove the integral table.
15192 (class operator_max): Move from here.
15193 (integral_table::integral_table): Delete.
15194 * range-op.h (class integral_table): Delete.
15196 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15198 * range-op-mixed.h (class operator_min): Move from...
15199 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
15200 (class operator_min): Move from here.
15201 (integral_table::integral_table): Remove MIN_EXPR.
15203 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15205 * range-op-mixed.h (class operator_bitwise_or): Move from...
15206 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
15207 (class operator_bitwise_or): Move from here.
15208 (integral_table::integral_table): Remove BIT_IOR_EXPR.
15210 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15212 * range-op-mixed.h (class operator_bitwise_and): Move from...
15213 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
15214 (get_op_handler): Check for a pointer table entry first.
15215 (class operator_bitwise_and): Move from here.
15216 (integral_table::integral_table): Remove BIT_AND_EXPR.
15218 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15220 * range-op-mixed.h (class operator_bitwise_xor): Move from...
15221 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
15222 (class operator_bitwise_xor): Move from here.
15223 (integral_table::integral_table): Remove BIT_XOR_EXPR.
15224 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
15226 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15228 * range-op-mixed.h (class operator_bitwise_not): Move from...
15229 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
15230 (class operator_bitwise_not): Move from here.
15231 (integral_table::integral_table): Remove BIT_NOT_EXPR.
15232 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
15234 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
15236 * range-op-mixed.h (class operator_addr_expr): Move from...
15237 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
15238 (class operator_addr_expr): Move from here.
15239 (integral_table::integral_table): Remove ADDR_EXPR.
15240 (pointer_table::pointer_table): Remove ADDR_EXPR.
15242 2023-06-12 Pan Li <pan2.li@intel.com>
15244 * config/riscv/riscv-vector-builtins-types.def
15245 (vfloat16m1_t): Add type to lmul1 ops.
15246 (vfloat16m2_t): Likewise.
15247 (vfloat16m4_t): Likewise.
15249 2023-06-12 Richard Biener <rguenther@suse.de>
15251 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
15252 .MASK_STORE and friend set the size of the access to
15255 2023-06-12 Tamar Christina <tamar.christina@arm.com>
15257 * config.in: Regenerate.
15258 * configure: Regenerate.
15259 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
15261 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15263 * config/riscv/autovec-opt.md
15264 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
15265 (*<any_shiftrt:optab>trunc<mode>): Ditto.
15266 * config/riscv/autovec.md (<optab><mode>3): Change to
15267 define_insn_and_split.
15268 (v<optab><mode>3): Ditto.
15269 (trunc<mode><v_double_trunc>2): Ditto.
15271 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15273 * simplify-rtx.cc (simplify_const_unary_operation):
15274 Handle US_TRUNCATE, SS_TRUNCATE.
15276 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
15279 * doc/gm2.texi (Standard procedures): Fix Next link.
15281 2023-06-12 Tamar Christina <tamar.christina@arm.com>
15283 * config.in: Regenerate.
15285 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
15287 PR middle-end/110142
15288 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
15289 subtype to vect_widened_op_tree and remove subtype parameter, also
15290 remove superfluous overloaded function definition.
15291 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
15292 to call to vect_recog_widen_op_pattern.
15293 (vect_recog_widen_minus_pattern): Likewise.
15295 2023-06-12 liuhongt <hongtao.liu@intel.com>
15297 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
15298 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
15299 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
15300 (vec_unpacks_lo_<mode>): Ditto.
15301 (vec_unpacks_hi_<mode>): Ditto.
15302 (sse_movlhps_<mode>): New define_insn.
15303 (ssse3_palignr<mode>_perm): Extend to V_128H.
15304 (V_128H): New mode iterator.
15305 (ssepackPHmode): New mode attribute.
15306 (vunpck_extract_mode): Ditto.
15307 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
15308 (vpckfloat_temp_mode): Ditto.
15309 (vpckfloat_op_mode): Ditto.
15310 (vunpckfixt_mode): Extend to VxHF.
15311 (vunpckfixt_model): Ditto.
15312 (vunpckfixt_extract_mode): Ditto.
15314 2023-06-12 Richard Biener <rguenther@suse.de>
15316 PR middle-end/110200
15317 * genmatch.cc (expr::gen_transform): Put braces around
15318 the if arm for the (convert ...) short-cut.
15320 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
15323 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
15324 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
15326 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
15329 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
15330 floating constant itself for real_to_target call.
15332 2023-06-12 Pan Li <pan2.li@intel.com>
15334 * config/riscv/riscv-vector-builtins-types.def
15335 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
15336 (vfloat16mf2_t): Ditto.
15337 (vfloat16m1_t): Ditto.
15338 (vfloat16m2_t): Ditto.
15339 (vfloat16m4_t): Ditto.
15341 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
15343 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
15344 Do not require a stack frame when debugging is enabled for AIX.
15346 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
15348 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
15349 Remove attribute values.
15350 (insv_notbit): New post-reload insn.
15351 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
15352 (*insv.not-bit.0_split, *insv.not-bit.7_split)
15353 (*insv.xor-extract_split): Split to insv_notbit.
15354 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
15355 (*insv.xor-extract): Remove post-reload insns.
15356 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
15357 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
15358 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
15359 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
15361 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
15364 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
15365 (MSB, SIZE): New mode attributes.
15366 (any_shift): New code iterator.
15367 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
15368 (*lshr<mode>3_const_split): Add constraint alternative for
15369 the case of shift-offset = MSB. Ditch "length" attribute.
15370 (extzv<mode): New. replaces extzv. Adjust following patterns.
15371 Use avr_out_extr, avr_out_extr_not to print asm.
15372 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
15373 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
15374 * config/avr/constraints.md (C15, C23, C31, Yil): New
15375 * config/avr/predicates.md (reg_or_low_io_operand)
15376 (const7_operand, reg_or_low_io_operand)
15377 (const15_operand, const_0_to_15_operand)
15378 (const23_operand, const_0_to_23_operand)
15379 (const31_operand, const_0_to_31_operand): New.
15380 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
15381 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
15382 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
15383 MSB case to new insn constraint "r" for operands[1].
15384 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
15385 Handle these cases.
15386 (avr_rtx_costs_1): Adjust cost for a new pattern.
15388 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15390 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
15391 (vector_insn_info::parse_insn): Add rtx_insn parse.
15392 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
15393 (get_first_vsetvl): New function.
15394 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
15395 (pass_vsetvl::cleanup_insns): Remove it.
15396 (pass_vsetvl::ssa_post_optimization): New function.
15397 (has_no_uses): Ditto.
15398 (pass_vsetvl::propagate_avl): Remove it.
15399 (pass_vsetvl::df_post_optimization): New function.
15400 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
15401 * config/riscv/riscv-vsetvl.h: Adapt declaration.
15403 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
15405 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
15406 (ipcp_vr_lattice::print): Call dump method.
15407 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
15409 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
15410 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
15412 (initialize_node_lattices): Pass type when appropriate.
15413 (ipa_vr_operation_and_type_effects): Make type agnostic.
15414 (ipa_value_range_from_jfunc): Same.
15415 (propagate_vr_across_jump_function): Same.
15416 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
15417 (evaluate_properties_for_edge): Same.
15418 * ipa-prop.cc (ipa_vr::get_vrange): Same.
15419 (ipcp_update_vr): Same.
15420 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
15421 (ipa_range_set_and_normalize): Same.
15423 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
15427 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
15428 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
15429 (avr_pass_data_ifelse): New pass_data for it.
15430 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
15431 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
15432 (avr_out_cmp_ext): New functions.
15433 (compare_condtition): Make sure REG_CC dies in the branch insn.
15434 (avr_rtx_costs_1): Add computation of cbranch costs.
15435 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
15436 [ADJUST_LEN_CMP_SEXT]Handle them.
15437 (TARGET_CANONICALIZE_COMPARISON): New define.
15438 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
15439 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
15440 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
15441 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
15442 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
15443 (avr_out_cmp_zext): New Protos
15444 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
15445 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
15446 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
15447 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
15448 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
15449 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
15450 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
15451 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
15452 (adjust_len) [add_set_ZN, cmp_zext]: New.
15453 (QIPSI): New mode iterator.
15454 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
15455 (gelt): New code iterator.
15456 (gelt_eqne): New code attribute.
15457 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
15458 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
15459 (*cmpqi_sign_extend): Remove insns.
15460 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
15461 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
15462 * config/avr/predicates.md (scratch_or_d_register_operand): New.
15463 * config/avr/constraints.md (Yxx): New constraint.
15465 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15467 * config/riscv/autovec.md (select_vl<mode>): New pattern.
15468 * config/riscv/riscv-protos.h (expand_select_vl): New function.
15469 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
15471 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15473 * range-op-float.cc (foperator_mult_div_base): Delete.
15474 (foperator_mult_div_base::find_range): Make static local function.
15475 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
15476 (operator_mult::op1_range): Rename from foperator_mult.
15477 (operator_mult::op2_range): Ditto.
15478 (operator_mult::rv_fold): Ditto.
15479 (float_table::float_table): Remove MULT_EXPR.
15480 (class foperator_div): Inherit from range_operator.
15481 (float_table::float_table): Delete.
15482 * range-op-mixed.h (class operator_mult): Combined from integer
15484 * range-op.cc (float_tree_table): Delete.
15485 (op_mult): New object.
15486 (unified_table::unified_table): Add MULT_EXPR.
15487 (get_op_handler): Do not check float table any longer.
15488 (class cross_product_operator): Move to range-op-mixed.h.
15489 (class operator_mult): Move to range-op-mixed.h.
15490 (integral_table::integral_table): Remove MULT_EXPR.
15491 (pointer_table::pointer_table): Remove MULT_EXPR.
15492 * range-op.h (float_table): Remove.
15494 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15496 * range-op-float.cc (foperator_negate): Remove. Move prototypes
15497 to range-op-mixed.h
15498 (operator_negate::fold_range): Rename from foperator_negate.
15499 (operator_negate::op1_range): Ditto.
15500 (float_table::float_table): Remove NEGATE_EXPR.
15501 * range-op-mixed.h (class operator_negate): Combined from integer
15503 * range-op.cc (op_negate): New object.
15504 (unified_table::unified_table): Add NEGATE_EXPR.
15505 (class operator_negate): Move to range-op-mixed.h.
15506 (integral_table::integral_table): Remove NEGATE_EXPR.
15507 (pointer_table::pointer_table): Remove NEGATE_EXPR.
15509 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15511 * range-op-float.cc (foperator_minus): Remove. Move prototypes
15512 to range-op-mixed.h
15513 (operator_minus::fold_range): Rename from foperator_minus.
15514 (operator_minus::op1_range): Ditto.
15515 (operator_minus::op2_range): Ditto.
15516 (operator_minus::rv_fold): Ditto.
15517 (float_table::float_table): Remove MINUS_EXPR.
15518 * range-op-mixed.h (class operator_minus): Combined from integer
15520 * range-op.cc (op_minus): New object.
15521 (unified_table::unified_table): Add MINUS_EXPR.
15522 (class operator_minus): Move to range-op-mixed.h.
15523 (integral_table::integral_table): Remove MINUS_EXPR.
15524 (pointer_table::pointer_table): Remove MINUS_EXPR.
15526 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15528 * range-op-float.cc (foperator_abs): Remove. Move prototypes
15529 to range-op-mixed.h
15530 (operator_abs::fold_range): Rename from foperator_abs.
15531 (operator_abs::op1_range): Ditto.
15532 (float_table::float_table): Remove ABS_EXPR.
15533 * range-op-mixed.h (class operator_abs): Combined from integer
15535 * range-op.cc (op_abs): New object.
15536 (unified_table::unified_table): Add ABS_EXPR.
15537 (class operator_abs): Move to range-op-mixed.h.
15538 (integral_table::integral_table): Remove ABS_EXPR.
15539 (pointer_table::pointer_table): Remove ABS_EXPR.
15541 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15543 * range-op-float.cc (foperator_plus): Remove. Move prototypes
15544 to range-op-mixed.h
15545 (operator_plus::fold_range): Rename from foperator_plus.
15546 (operator_plus::op1_range): Ditto.
15547 (operator_plus::op2_range): Ditto.
15548 (operator_plus::rv_fold): Ditto.
15549 (float_table::float_table): Remove PLUS_EXPR.
15550 * range-op-mixed.h (class operator_plus): Combined from integer
15552 * range-op.cc (op_plus): New object.
15553 (unified_table::unified_table): Add PLUS_EXPR.
15554 (class operator_plus): Move to range-op-mixed.h.
15555 (integral_table::integral_table): Remove PLUS_EXPR.
15556 (pointer_table::pointer_table): Remove PLUS_EXPR.
15558 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15560 * range-op-mixed.h (class operator_cast): Combined from integer
15562 * range-op.cc (op_cast): New object.
15563 (unified_table::unified_table): Add op_cast
15564 (class operator_cast): Move to range-op-mixed.h.
15565 (integral_table::integral_table): Remove op_cast
15566 (pointer_table::pointer_table): Remove op_cast.
15568 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15570 * range-op-float.cc (operator_cst::fold_range): New.
15571 * range-op-mixed.h (class operator_cst): Move from integer file.
15572 * range-op.cc (op_cst): New object.
15573 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
15574 (class operator_cst): Move to range-op-mixed.h.
15575 (integral_table::integral_table): Remove op_cst.
15576 (pointer_table::pointer_table): Remove op_cst.
15578 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15580 * range-op-float.cc (foperator_identity): Remove. Move prototypes
15581 to range-op-mixed.h
15582 (operator_identity::fold_range): Rename from foperator_identity.
15583 (operator_identity::op1_range): Ditto.
15584 (float_table::float_table): Remove fop_identity.
15585 * range-op-mixed.h (class operator_identity): Combined from integer
15587 * range-op.cc (op_identity): New object.
15588 (unified_table::unified_table): Add op_identity.
15589 (class operator_identity): Move to range-op-mixed.h.
15590 (integral_table::integral_table): Remove identity.
15591 (pointer_table::pointer_table): Remove identity.
15593 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15595 * range-op-float.cc (foperator_ge): Remove. Move prototypes
15596 to range-op-mixed.h
15597 (operator_ge::fold_range): Rename from foperator_ge.
15598 (operator_ge::op1_range): Ditto.
15599 (float_table::float_table): Remove GE_EXPR.
15600 * range-op-mixed.h (class operator_ge): Combined from integer
15602 * range-op.cc (op_ge): New object.
15603 (unified_table::unified_table): Add GE_EXPR.
15604 (class operator_ge): Move to range-op-mixed.h.
15605 (ge_op1_op2_relation): Fold into
15606 operator_ge::op1_op2_relation.
15607 (integral_table::integral_table): Remove GE_EXPR.
15608 (pointer_table::pointer_table): Remove GE_EXPR.
15609 * range-op.h (ge_op1_op2_relation): Delete.
15611 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15613 * range-op-float.cc (foperator_gt): Remove. Move prototypes
15614 to range-op-mixed.h
15615 (operator_gt::fold_range): Rename from foperator_gt.
15616 (operator_gt::op1_range): Ditto.
15617 (float_table::float_table): Remove GT_EXPR.
15618 * range-op-mixed.h (class operator_gt): Combined from integer
15620 * range-op.cc (op_gt): New object.
15621 (unified_table::unified_table): Add GT_EXPR.
15622 (class operator_gt): Move to range-op-mixed.h.
15623 (gt_op1_op2_relation): Fold into
15624 operator_gt::op1_op2_relation.
15625 (integral_table::integral_table): Remove GT_EXPR.
15626 (pointer_table::pointer_table): Remove GT_EXPR.
15627 * range-op.h (gt_op1_op2_relation): Delete.
15629 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15631 * range-op-float.cc (foperator_le): Remove. Move prototypes
15632 to range-op-mixed.h
15633 (operator_le::fold_range): Rename from foperator_le.
15634 (operator_le::op1_range): Ditto.
15635 (float_table::float_table): Remove LE_EXPR.
15636 * range-op-mixed.h (class operator_le): Combined from integer
15638 * range-op.cc (op_le): New object.
15639 (unified_table::unified_table): Add LE_EXPR.
15640 (class operator_le): Move to range-op-mixed.h.
15641 (le_op1_op2_relation): Fold into
15642 operator_le::op1_op2_relation.
15643 (integral_table::integral_table): Remove LE_EXPR.
15644 (pointer_table::pointer_table): Remove LE_EXPR.
15645 * range-op.h (le_op1_op2_relation): Delete.
15647 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15649 * range-op-float.cc (foperator_lt): Remove. Move prototypes
15650 to range-op-mixed.h
15651 (operator_lt::fold_range): Rename from foperator_lt.
15652 (operator_lt::op1_range): Ditto.
15653 (float_table::float_table): Remove LT_EXPR.
15654 * range-op-mixed.h (class operator_lt): Combined from integer
15656 * range-op.cc (op_lt): New object.
15657 (unified_table::unified_table): Add LT_EXPR.
15658 (class operator_lt): Move to range-op-mixed.h.
15659 (lt_op1_op2_relation): Fold into
15660 operator_lt::op1_op2_relation.
15661 (integral_table::integral_table): Remove LT_EXPR.
15662 (pointer_table::pointer_table): Remove LT_EXPR.
15663 * range-op.h (lt_op1_op2_relation): Delete.
15665 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15667 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
15668 to range-op-mixed.h
15669 (operator_equal::fold_range): Rename from foperator_not_equal.
15670 (operator_equal::op1_range): Ditto.
15671 (float_table::float_table): Remove NE_EXPR.
15672 * range-op-mixed.h (class operator_not_equal): Combined from integer
15674 * range-op.cc (op_equal): New object.
15675 (unified_table::unified_table): Add NE_EXPR.
15676 (class operator_not_equal): Move to range-op-mixed.h.
15677 (not_equal_op1_op2_relation): Fold into
15678 operator_not_equal::op1_op2_relation.
15679 (integral_table::integral_table): Remove NE_EXPR.
15680 (pointer_table::pointer_table): Remove NE_EXPR.
15681 * range-op.h (not_equal_op1_op2_relation): Delete.
15683 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15685 * range-op-float.cc (foperator_equal): Remove. Move prototypes
15686 to range-op-mixed.h
15687 (operator_equal::fold_range): Rename from foperator_equal.
15688 (operator_equal::op1_range): Ditto.
15689 (float_table::float_table): Remove EQ_EXPR.
15690 * range-op-mixed.h (class operator_equal): Combined from integer
15692 * range-op.cc (op_equal): New object.
15693 (unified_table::unified_table): Add EQ_EXPR.
15694 (class operator_equal): Move to range-op-mixed.h.
15695 (equal_op1_op2_relation): Fold into
15696 operator_equal::op1_op2_relation.
15697 (integral_table::integral_table): Remove EQ_EXPR.
15698 (pointer_table::pointer_table): Remove EQ_EXPR.
15699 * range-op.h (equal_op1_op2_relation): Delete.
15701 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
15703 * range-op-float.cc (class float_table): Move to header.
15704 (float_table::float_table): Move float only operators to...
15705 (range_op_table::initialize_float_ops): Here.
15706 * range-op-mixed.h: New.
15707 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
15709 (float_tree_table): Moved from range-op-float.cc.
15710 (unified_tree_table): New.
15711 (unified_table::unified_table): New. Call initialize routines.
15712 (get_op_handler): Check unified table first.
15713 (range_op_handler::range_op_handler): Handle no type constructor.
15714 (integral_table::integral_table): Move integral only operators to...
15715 (range_op_table::initialize_integral_ops): Here.
15716 (pointer_table::pointer_table): Move pointer only operators to...
15717 (range_op_table::initialize_pointer_ops): Here.
15718 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
15719 (get_bool_state): Ditto.
15720 (empty_range_varying): Ditto.
15721 (relop_early_resolve): Ditto.
15722 (class range_op_table): Add new init methods for range types.
15723 (class integral_table): Move declaration to here.
15724 (class pointer_table): Move declaration to here.
15725 (class float_table): Move declaration to here.
15727 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15728 Richard Sandiford <richard.sandiford@arm.com>
15729 Richard Biener <rguenther@suse.de>
15731 * doc/md.texi: Add SELECT_VL support.
15732 * internal-fn.def (SELECT_VL): Ditto.
15733 * optabs.def (OPTAB_D): Ditto.
15734 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
15735 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
15736 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
15737 (vectorizable_store): Ditto.
15738 (vectorizable_load): Ditto.
15739 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
15741 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
15744 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
15747 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
15749 * range-op.cc (range_cast): Move to...
15750 * range-op.h (range_cast): Here and add generic a version.
15752 2023-06-09 Marek Polacek <polacek@redhat.com>
15756 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
15757 warn about designated initializers in C only.
15759 2023-06-09 Andrew Pinski <apinski@marvell.com>
15761 PR tree-optimization/97711
15762 PR tree-optimization/110155
15763 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
15764 ((zero_one != 0) ? z <op> y : y): Likewise.
15766 2023-06-09 Andrew Pinski <apinski@marvell.com>
15768 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
15769 multiply rather than negation/bit_and.
15771 2023-06-09 Andrew Pinski <apinski@marvell.com>
15773 * match.pd (`X & -Y -> X * Y`): Allow for truncation
15774 and the same type for unsigned types.
15776 2023-06-09 Andrew Pinski <apinski@marvell.com>
15778 PR tree-optimization/110165
15779 PR tree-optimization/110166
15780 * match.pd (zero_one_valued_p): Don't accept
15781 signed 1-bit integers.
15783 2023-06-09 Richard Biener <rguenther@suse.de>
15785 * match.pd (two conversions in a row): Use element_precision
15786 to DTRT for VECTOR_TYPE.
15788 2023-06-09 Pan Li <pan2.li@intel.com>
15790 * config/riscv/riscv.md (enabled): Move to another place, and
15791 add fp_vector_disabled to the cond.
15792 (fp_vector_disabled): New attr defined for disabling fp.
15793 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
15795 2023-06-09 Pan Li <pan2.li@intel.com>
15797 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
15800 2023-06-09 liuhongt <hongtao.liu@intel.com>
15803 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
15804 view_convert_expr mask to signed type when folding pblendvb
15807 2023-06-09 liuhongt <hongtao.liu@intel.com>
15810 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
15811 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
15812 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
15814 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
15815 real codename for __builtin_ia32_pabs{b,w,d}.
15817 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
15819 * gimple-range-op.cc
15820 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
15821 (gimple_range_op_handler::maybe_builtin_call): Adjust.
15822 * gimple-range-op.h (operand1, operand2): Use m_operator.
15823 * range-op.cc (integral_table, pointer_table): Relocate.
15824 (get_op_handler): Rename from get_handler and handle all types.
15825 (range_op_handler::range_op_handler): Relocate.
15826 (range_op_handler::set_op_handler): Relocate and adjust.
15827 (range_op_handler::range_op_handler): Relocate.
15828 (dispatch_trio): New.
15829 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
15830 (range_op_handler::dispatch_kind): New.
15831 (range_op_handler::fold_range): Relocate and Use new dispatch value.
15832 (range_op_handler::op1_range): Ditto.
15833 (range_op_handler::op2_range): Ditto.
15834 (range_op_handler::lhs_op1_relation): Ditto.
15835 (range_op_handler::lhs_op2_relation): Ditto.
15836 (range_op_handler::op1_op2_relation): Ditto.
15837 (range_op_handler::set_op_handler): Use m_operator member.
15838 * range-op.h (range_op_handler::operator bool): Use m_operator.
15839 (range_op_handler::dispatch_kind): New.
15840 (range_op_handler::m_valid): Delete.
15841 (range_op_handler::m_int): Delete
15842 (range_op_handler::m_float): Delete
15843 (range_op_handler::m_operator): New.
15844 (range_op_table::operator[]): Relocate from .cc file.
15845 (range_op_table::set): Ditto.
15846 * value-range.h (class vrange): Make range_op_handler a friend.
15848 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
15850 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
15851 (cfn_pass_through_arg1): Adjust using statemenmt.
15852 (cfn_signbit): Change base class, adjust using statement.
15853 (cfn_copysign): Ditto.
15855 (cfn_sincos): Ditto.
15856 * range-op-float.cc (fold_range): Change class to range_operator.
15860 (lhs_op1_relation): Ditto.
15861 (lhs_op2_relation): Ditto.
15862 (op1_op2_relation): Ditto.
15863 (foperator_*): Ditto.
15864 (class float_table): New. Inherit from range_op_table.
15865 (floating_tree_table) Change to range_op_table pointer.
15866 (class floating_op_table): Delete.
15867 * range-op.cc (operator_equal): Adjust using statement.
15868 (operator_not_equal): Ditto.
15869 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
15870 (operator_minus, operator_cast): Ditto.
15871 (operator_bitwise_and, pointer_plus_operator): Ditto.
15872 (get_float_handle): Change return type.
15873 * range-op.h (range_operator_float): Delete. Relocate all methods
15874 into class range_operator.
15875 (range_op_handler::m_float): Change type to range_operator.
15876 (floating_op_table): Delete.
15877 (floating_tree_table): Change type.
15879 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
15881 * range-op.cc (range_operator::fold_range): Call virtual routine.
15882 (range_operator::update_bitmask): New.
15883 (operator_equal::update_bitmask): New.
15884 (operator_not_equal::update_bitmask): New.
15885 (operator_lt::update_bitmask): New.
15886 (operator_le::update_bitmask): New.
15887 (operator_gt::update_bitmask): New.
15888 (operator_ge::update_bitmask): New.
15889 (operator_ge::update_bitmask): New.
15890 (operator_plus::update_bitmask): New.
15891 (operator_minus::update_bitmask): New.
15892 (operator_pointer_diff::update_bitmask): New.
15893 (operator_min::update_bitmask): New.
15894 (operator_max::update_bitmask): New.
15895 (operator_mult::update_bitmask): New.
15896 (operator_div:operator_div):New.
15897 (operator_div::update_bitmask): New.
15898 (operator_div::m_code): New member.
15899 (operator_exact_divide::operator_exact_divide): New constructor.
15900 (operator_lshift::update_bitmask): New.
15901 (operator_rshift::update_bitmask): New.
15902 (operator_bitwise_and::update_bitmask): New.
15903 (operator_bitwise_or::update_bitmask): New.
15904 (operator_bitwise_xor::update_bitmask): New.
15905 (operator_trunc_mod::update_bitmask): New.
15906 (op_ident, op_unknown, op_ptr_min_max): New.
15907 (op_nop, op_convert): Delete.
15908 (op_ssa, op_paren, op_obj_type): Delete.
15909 (op_realpart, op_imagpart): Delete.
15910 (op_ptr_min, op_ptr_max): Delete.
15911 (pointer_plus_operator:update_bitmask): New.
15912 (range_op_table::set): Do not use m_code.
15913 (integral_table::integral_table): Adjust to single instances.
15914 * range-op.h (range_operator::range_operator): Delete.
15915 (range_operator::m_code): Delete.
15916 (range_operator::update_bitmask): New.
15918 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
15920 * range-op-float.cc (range_operator_float::fold_range): Return
15921 NAN of the result type.
15923 2023-06-08 Jakub Jelinek <jakub@redhat.com>
15925 * optabs.cc (expand_ffs): Add forward declaration.
15926 (expand_doubleword_clz): Rename to ...
15927 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
15928 handle also doubleword CTZ and FFS in addition to CLZ.
15929 (expand_unop): Adjust caller. Also call it for doubleword
15930 ctz_optab and ffs_optab.
15932 2023-06-08 Jakub Jelinek <jakub@redhat.com>
15935 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
15936 n_words == 2 recurse with mmx_ok as first argument rather than false.
15938 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
15940 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
15941 avoid sign extension/undefined behaviour when setting each bit.
15943 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
15944 Uros Bizjak <ubizjak@gmail.com>
15946 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
15947 Use new x86_stc instruction when the carry flag must be set.
15948 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
15949 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
15950 * config/i386/i386.h (TARGET_SLOW_STC): New define.
15951 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
15952 (x86_stc): New define_insn.
15953 (define_peephole2): Convert x86_stc into alternate implementation
15954 on pentium4 without -Os when a QImode register is available.
15955 (*x86_cmc): New define_insn.
15956 (define_peephole2): Convert *x86_cmc into alternate implementation
15957 on pentium4 without -Os when a QImode register is available.
15958 (*setccc): New define_insn_and_split for a no-op CCCmode move.
15959 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
15960 recognize (and eliminate) the carry flag being copied to itself.
15961 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
15962 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
15964 2023-06-07 Andrew Pinski <apinski@marvell.com>
15966 * match.pd: Fix comment for the
15967 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
15969 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
15970 Jeff Law <jlaw@ventanamicro.com>
15972 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
15973 (rotrsi3_sext): Expose generator.
15974 (rotlsi3 pattern): Hide generator.
15975 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
15977 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
15978 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
15979 (mulsi3, <optab>si3): Likewise.
15980 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
15981 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
15982 (<u>mulsidi3): Likewise.
15983 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
15984 (mulsi3_extended, <optab>si3_extended): Likewise.
15985 (splitter for shadd feeding divison): Update RTL pattern to account
15986 for changes in how 32 bit ops are expanded for TARGET_64BIT.
15987 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
15989 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
15992 * config/riscv/riscv.cc (riscv_print_operand): Calculate
15993 memmodel only when it is valid.
15995 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
15997 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
15998 for constant element of a vector.
16000 2023-06-07 Jakub Jelinek <jakub@redhat.com>
16002 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
16003 instead compare tree_nonzero_bits <= 1U rather than just == 1.
16005 2023-06-07 Alex Coplan <alex.coplan@arm.com>
16008 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
16010 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
16011 names for builtins.
16012 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
16013 setup if in_lto_p, just like we do for SVE.
16014 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
16015 (__arm_st64b): Delete.
16016 (__arm_st64bv): Delete.
16017 (__arm_st64bv0): Delete.
16019 2023-06-07 Alex Coplan <alex.coplan@arm.com>
16022 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
16023 Use input operand for the destination address.
16024 * config/aarch64/aarch64.md (st64b): Fix constraint on address
16027 2023-06-07 Alex Coplan <alex.coplan@arm.com>
16030 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
16031 Replace eight consecutive spaces with tabs.
16032 (aarch64_init_ls64_builtins): Likewise.
16033 (aarch64_expand_builtin_ls64): Likewise.
16034 * config/aarch64/aarch64.md (ld64b): Likewise.
16037 (st64bv0): Likewise.
16039 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
16041 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
16042 offset table pseudo to a general reg subset.
16044 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16046 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
16048 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
16050 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
16051 (aarch64_sqxtun2<mode>_le): Likewise.
16052 (aarch64_sqxtun2<mode>_be): Likewise.
16053 (aarch64_sqxtun2<mode>): Adjust for the above.
16054 (aarch64_sqmovun<mode>): New define_expand.
16055 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
16056 (half_mask): New mode attribute.
16057 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
16060 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16062 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
16064 (aarch64_addp<mode>_insn): ... This...
16065 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
16066 (aarch64_addp<mode>): New define_expand.
16068 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16070 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
16071 * config/riscv/riscv-v.cc
16072 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
16074 (rvv_builder::single_step_npatterns_p): New function.
16075 (rvv_builder::npatterns_all_equal_p): Ditto.
16076 (const_vec_all_in_range_p): Support POLY handling.
16077 (gen_const_vector_dup): Ditto.
16078 (emit_vlmax_gather_insn): Add vrgatherei16.
16079 (emit_vlmax_masked_gather_mu_insn): Ditto.
16080 (expand_const_vector): Add VLA SLP const vector support.
16081 (expand_vec_perm): Support POLY.
16082 (struct expand_vec_perm_d): New struct.
16083 (shuffle_generic_patterns): New function.
16084 (expand_vec_perm_const_1): Ditto.
16085 (expand_vec_perm_const): Ditto.
16086 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
16087 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
16089 2023-06-07 Andrew Pinski <apinski@marvell.com>
16091 PR middle-end/110117
16092 * expr.cc (expand_single_bit_test): Handle
16093 const_int from expand_expr.
16095 2023-06-07 Andrew Pinski <apinski@marvell.com>
16097 * expr.cc (do_store_flag): Rearrange the
16098 TER code so that it overrides the nonzero bits
16099 info if we had `a & POW2`.
16101 2023-06-07 Andrew Pinski <apinski@marvell.com>
16103 PR tree-optimization/110134
16104 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
16106 (-A CMP CST -> B CMP (-CST)): Likewise.
16108 2023-06-07 Andrew Pinski <apinski@marvell.com>
16110 PR tree-optimization/89263
16111 PR tree-optimization/99069
16112 PR tree-optimization/20083
16113 PR tree-optimization/94898
16114 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
16115 one of the operands are constant.
16117 2023-06-07 Andrew Pinski <apinski@marvell.com>
16119 * match.pd (zero_one_valued_p): Match 0 integer constant
16122 2023-06-07 Pan Li <pan2.li@intel.com>
16124 * config/riscv/riscv-vector-builtins-types.def
16125 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
16126 (vfloat32m1_t): Ditto.
16127 (vfloat32m2_t): Ditto.
16128 (vfloat32m4_t): Ditto.
16129 (vfloat32m8_t): Ditto.
16130 (vint16mf4_t): Ditto.
16131 (vint16mf2_t): Ditto.
16132 (vint16m1_t): Ditto.
16133 (vint16m2_t): Ditto.
16134 (vint16m4_t): Ditto.
16135 (vint16m8_t): Ditto.
16136 (vuint16mf4_t): Ditto.
16137 (vuint16mf2_t): Ditto.
16138 (vuint16m1_t): Ditto.
16139 (vuint16m2_t): Ditto.
16140 (vuint16m4_t): Ditto.
16141 (vuint16m8_t): Ditto.
16142 (vint32mf2_t): Ditto.
16143 (vint32m1_t): Ditto.
16144 (vint32m2_t): Ditto.
16145 (vint32m4_t): Ditto.
16146 (vint32m8_t): Ditto.
16147 (vuint32mf2_t): Ditto.
16148 (vuint32m1_t): Ditto.
16149 (vuint32m2_t): Ditto.
16150 (vuint32m4_t): Ditto.
16151 (vuint32m8_t): Ditto.
16153 2023-06-07 Jason Merrill <jason@redhat.com>
16156 * doc/invoke.texi: Document it.
16158 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
16160 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
16161 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
16162 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
16163 NOT (BITREVERSE x) as BITREVERSE (NOT x).
16164 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
16165 Optimize PARITY (BITREVERSE x) as PARITY x.
16166 Optimize BITREVERSE (BITREVERSE x) as x.
16167 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
16168 BITREVERSE of a constant integer at compile-time.
16169 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
16170 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
16171 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
16172 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
16173 Optimize COPYSIGN (x, ABS y) as ABS x.
16174 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
16175 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
16176 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
16177 arguments at compile-time.
16179 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
16181 * rtl.h (function_invariant_p): Change return type from int to bool.
16182 * reload1.cc (function_invariant_p): Change return type from
16183 int to bool and adjust function body accordingly.
16185 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16187 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
16188 (*single_<optab>mult_plus<mode>): Ditto.
16189 (*double_<optab>mult_plus<mode>): Ditto.
16190 (*sign_zero_extend_fma): Ditto.
16191 (*zero_sign_extend_fma): Ditto.
16192 * config/riscv/riscv-protos.h (enum insn_type): New enum.
16194 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
16195 Tobias Burnus <tobias@codesourcery.com>
16197 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
16198 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
16200 (omp_get_attachment): Handle map clauses with 'present' modifier.
16201 (omp_group_base): Likewise.
16202 (gimplify_scan_omp_clauses): Reorder present maps to come first.
16203 Set GOVD flags for present defaultmaps.
16204 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
16205 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
16207 (lower_omp_target): Handle map clauses with 'present' modifier.
16208 Handle 'to' and 'from' clauses with 'present'.
16209 * tree-core.h (enum omp_clause_defaultmap_kind): Add
16210 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
16211 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
16212 'from' clauses with 'present' modifier. Handle present defaultmap.
16213 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
16215 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
16217 * config/rs6000/genfusion.pl: Delete some dead code.
16219 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
16221 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
16223 (gen_ld_cmpi_p10): ... this.
16225 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
16228 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
16229 duplicate expression.
16231 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16233 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
16234 Handle unsigned reduc_plus_scal_ builtins.
16235 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
16236 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
16237 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
16238 __builtin_aarch64_reduc_plus_scal_v2di.
16239 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
16241 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16243 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
16244 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
16245 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
16247 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16249 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
16250 (aarch64_shrn<mode>_insn_be): Delete.
16251 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
16252 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
16253 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
16254 (aarch64_rshrn<mode>_insn_le): Delete.
16255 (aarch64_rshrn<mode>_insn_be): Delete.
16256 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
16257 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
16259 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16261 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
16263 (aarch64_pars_overlap_p): Likewise.
16264 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
16265 Express in terms of UNSPEC_ADDV.
16266 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
16267 (*aarch64_<su>addlv<mode>_reduction): Define.
16268 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
16269 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
16270 (aarch64_pars_overlap_p): Likewise.
16271 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
16272 (VQUADW): New mode attribute.
16273 (VWIDE2X_S): Likewise.
16275 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
16276 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
16278 2023-06-06 Richard Biener <rguenther@suse.de>
16280 PR middle-end/110055
16281 * gimplify.cc (gimplify_target_expr): Do not emit
16282 CLOBBERs for variables which have static storage duration
16283 after gimplifying their initializers.
16285 2023-06-06 Richard Biener <rguenther@suse.de>
16287 PR tree-optimization/109143
16288 * tree-ssa-structalias.cc (solution_set_expand): Avoid
16289 one bitmap iteration and optimize bit range setting.
16291 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
16293 PR bootstrap/110120
16294 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
16295 XVECEXP, not XEXP, to access first item of a PARALLEL.
16297 2023-06-06 Pan Li <pan2.li@intel.com>
16299 * config/riscv/riscv-vector-builtins-types.def
16300 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
16301 (vfloat16mf2_t): Likewise.
16302 (vfloat16m1_t): Likewise.
16303 (vfloat16m2_t): Likewise.
16304 (vfloat16m4_t): Likewise.
16305 (vfloat16m8_t): Likewise.
16306 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
16307 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
16309 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
16311 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
16312 for cfi reg/mem machmode
16313 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
16315 2023-06-06 Li Xu <xuli1@eswincomputing.com>
16317 * config/riscv/vector-iterators.md:
16318 Fix 'REQUIREMENT' for machine_mode 'MODE'.
16319 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
16320 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
16321 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
16323 2023-06-06 Pan Li <pan2.li@intel.com>
16325 * config/riscv/vector-iterators.md: Fix typo in mode attr.
16327 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
16328 Joel Hutton <joel.hutton@arm.com>
16330 * doc/generic.texi: Remove old tree codes.
16331 * expr.cc (expand_expr_real_2): Remove old tree code cases.
16332 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
16333 * optabs-tree.cc (optab_for_tree_code): Likewise.
16334 (supportable_half_widening_operation): Likewise.
16335 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
16336 * tree-inline.cc (estimate_operator_cost): Likewise.
16337 (op_symbol_code): Likewise.
16338 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
16339 (vect_analyze_data_ref_accesses): Likewise.
16340 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
16341 * cfgexpand.cc (expand_debug_expr): Likewise.
16342 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
16343 (supportable_widening_operation): Likewise.
16344 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
16346 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
16347 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
16348 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
16349 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
16350 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
16351 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
16352 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
16353 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
16355 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
16356 Joel Hutton <joel.hutton@arm.com>
16357 Tamar Christina <tamar.christina@arm.com>
16359 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
16361 (vec_widen_<su>add_lo_<mode>): ... to this.
16362 (vec_widen_<su>addl_hi_<mode>): Rename this ...
16363 (vec_widen_<su>add_hi_<mode>): ... to this.
16364 (vec_widen_<su>subl_lo_<mode>): Rename this ...
16365 (vec_widen_<su>sub_lo_<mode>): ... to this.
16366 (vec_widen_<su>subl_hi_<mode>): Rename this ...
16367 (vec_widen_<su>sub_hi_<mode>): ...to this.
16368 * doc/generic.texi: Document new IFN codes.
16369 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
16370 (commutative_binary_fn_p): Add widen_plus fn's.
16371 (widening_fn_p): New function.
16372 (narrowing_fn_p): New function.
16373 (direct_internal_fn_optab): Change visibility.
16374 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
16375 internal_fn that expands into multiple internal_fns for widening.
16376 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
16377 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
16378 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
16379 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
16380 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
16381 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
16382 (lookup_hilo_internal_fn): Likewise.
16383 (widening_fn_p): Likewise.
16384 (Narrowing_fn_p): Likewise.
16385 * optabs.cc (commutative_optab_p): Add widening plus optabs.
16386 * optabs.def (OPTAB_D): Define widen add, sub optabs.
16387 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
16388 patterns with a hi/lo or even/odd split.
16389 (vect_recog_sad_pattern): Refactor to use new IFN codes.
16390 (vect_recog_widen_plus_pattern): Likewise.
16391 (vect_recog_widen_minus_pattern): Likewise.
16392 (vect_recog_average_pattern): Likewise.
16393 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
16395 (supportable_widening_operation): Likewise.
16396 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
16398 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
16399 Joel Hutton <joel.hutton@arm.com>
16401 * tree-vect-patterns.cc: Add include for gimple-iterator.
16402 (vect_recog_widen_op_pattern): Refactor to use code_helper.
16403 (vect_gimple_build): New function.
16404 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
16406 (vectorizable_call): Likewise.
16407 (vect_gen_widened_results_half): Likewise.
16408 (vect_create_vectorized_demotion_stmts): Likewise.
16409 (vect_create_vectorized_promotion_stmts): Likewise.
16410 (vect_create_half_widening_stmts): Likewise.
16411 (vectorizable_conversion): Likewise.
16412 (supportable_widening_operation): Likewise.
16413 (supportable_narrowing_operation): Likewise.
16414 * tree-vectorizer.h (supportable_widening_operation): Change
16415 prototype to use code_helper.
16416 (supportable_narrowing_operation): Likewise.
16417 (vect_gimple_build): New function prototype.
16418 * tree.h (code_helper::safe_as_tree_code): New function.
16419 (code_helper::safe_as_fn_code): New function.
16421 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
16423 * wide-int.cc (wi::bitreverse_large): New function implementing
16424 bit reversal of an integer.
16425 * wide-int.h (wi::bitreverse): New (template) function prototype.
16426 (bitreverse_large): Prototype helper function/implementation.
16427 (wi::bitreverse): New template wrapper around bitreverse_large.
16429 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
16431 * rtl.h (print_rtl_single): Change return type from int to void.
16432 (print_rtl_single_with_indent): Ditto.
16433 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
16434 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
16435 (rtx_writer::print_rtx_operand_code_0): Ditto.
16436 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
16437 (rtx_writer::print_rtx_operand_code_i): Ditto.
16438 (rtx_writer::print_rtx_operand_code_u): Ditto.
16439 (rtx_writer::print_rtx_operand): Ditto.
16440 (rtx_writer::print_rtx): Ditto.
16441 (rtx_writer::finish_directive): Ditto.
16442 (print_rtl_single): Change return type from int to void
16443 and adjust function body accordingly.
16444 (rtx_writer::print_rtl_single_with_indent): Ditto.
16446 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
16448 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
16449 (reg_class_subset_p): Ditto.
16450 * reginfo.cc (reg_classes_intersect_p): Ditto.
16451 (reg_class_subset_p): Ditto.
16453 2023-06-05 Pan Li <pan2.li@intel.com>
16455 * config/riscv/riscv-vector-builtins-types.def
16456 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
16457 (vfloat32m1_t): Ditto.
16458 (vfloat32m2_t): Ditto.
16459 (vfloat32m4_t): Ditto.
16460 (vfloat32m8_t): Ditto.
16461 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
16462 (vint16mf2_t): Ditto.
16463 (vint16m1_t): Ditto.
16464 (vint16m2_t): Ditto.
16465 (vint16m4_t): Ditto.
16466 (vint16m8_t): Ditto.
16467 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
16468 (vuint16mf2_t): Ditto.
16469 (vuint16m1_t): Ditto.
16470 (vuint16m2_t): Ditto.
16471 (vuint16m4_t): Ditto.
16472 (vuint16m8_t): Ditto.
16473 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
16474 (vint32m1_t): Ditto.
16475 (vint32m2_t): Ditto.
16476 (vint32m4_t): Ditto.
16477 (vint32m8_t): Ditto.
16478 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
16479 (vuint32m1_t): Ditto.
16480 (vuint32m2_t): Ditto.
16481 (vuint32m4_t): Ditto.
16482 (vuint32m8_t): Ditto.
16483 * config/riscv/vector-iterators.md: Add FP=16 support for V,
16484 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
16486 2023-06-05 Andrew Pinski <apinski@marvell.com>
16488 PR bootstrap/110085
16489 * Makefile.in (clean): Remove the removing of
16490 MULTILIB_DIR/MULTILIB_OPTIONS directories.
16492 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
16494 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
16496 * config/mips/mips.cc (speculation_barrier_libfunc): New static
16498 (mips_init_libfuncs): Initialize it.
16499 (mips_emit_speculation_barrier): New function.
16500 * config/mips/mips.md (speculation_barrier): Call
16501 mips_emit_speculation_barrier.
16503 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16505 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
16506 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
16507 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
16508 (rvv_builder::get_merged_repeating_sequence): Ditto.
16509 (rvv_builder::get_merge_scalar_mask): Ditto.
16510 (emit_scalar_move_insn): Ditto.
16511 (emit_vlmax_integer_move_insn): Ditto.
16512 (emit_nonvlmax_integer_move_insn): Ditto.
16513 (emit_vlmax_gather_insn): Ditto.
16514 (emit_vlmax_masked_gather_mu_insn): Ditto.
16515 (get_repeating_sequence_dup_machine_mode): Ditto.
16517 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16519 * config/riscv/autovec.md: Split arguments.
16520 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
16521 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
16523 2023-06-04 Andrew Pinski <apinski@marvell.com>
16525 * expr.cc (do_store_flag): Improve for single bit testing
16526 not against zero but against that single bit.
16528 2023-06-04 Andrew Pinski <apinski@marvell.com>
16530 * expr.cc (do_store_flag): Extend the one bit checking case
16531 to handle the case where we don't have an and but rather still
16532 one bit is known to be non-zero.
16534 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
16536 * config/h8300/constraints.md (Zz): Make this a normal
16538 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
16539 * config/h8300/logical.md (H8/SX bit patterns): Remove.
16541 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16543 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
16544 New insn_and_split patterns.
16546 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16549 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
16550 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
16551 (@vlmul_extx4<mode>): Ditto.
16552 (@vlmul_extx8<mode>): Ditto.
16553 (@vlmul_extx16<mode>): Ditto.
16554 (@vlmul_extx32<mode>): Ditto.
16555 (@vlmul_extx64<mode>): Ditto.
16556 (*vlmul_extx2<mode>): Ditto.
16557 (*vlmul_extx4<mode>): Ditto.
16558 (*vlmul_extx8<mode>): Ditto.
16559 (*vlmul_extx16<mode>): Ditto.
16560 (*vlmul_extx32<mode>): Ditto.
16561 (*vlmul_extx64<mode>): Ditto.
16563 2023-06-04 Pan Li <pan2.li@intel.com>
16565 * config/riscv/riscv-vector-builtins-types.def
16566 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
16567 (vfloat32m1_t): Likewise.
16568 (vfloat32m2_t): Likewise.
16569 (vfloat32m4_t): Likewise.
16570 (vfloat32m8_t): Likewise.
16571 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
16572 * config/riscv/vector-iterators.md: Add single to half machine
16575 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16577 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
16578 (*n<optab><mode>): Ditto.
16579 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
16580 (*n<optab><mode>): Ditto.
16581 * config/riscv/vector.md: Ditto.
16583 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
16586 * config/i386/i386-features.cc (scalar_chain::convert_compare):
16587 Update or delete REG_EQUAL notes, converting CONST_INT and
16588 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
16590 2023-06-04 Jason Merrill <jason@redhat.com>
16593 * tree-eh.cc (lower_resx): Pass the exception pointer to the
16595 * except.h: Tweak comment.
16597 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
16599 * postreload.cc (move2add_use_add2_insn): Handle
16600 trivial single_sets. Rename variable PAT to SET.
16601 (move2add_use_add3_insn, reload_cse_move2add): Similar.
16603 2023-06-04 Pan Li <pan2.li@intel.com>
16605 * config/riscv/riscv-vector-builtins-types.def
16606 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
16607 (vfloat16mf2_t): Likewise.
16608 (vfloat16m1_t): Likewise.
16609 (vfloat16m2_t): Likewise.
16610 (vfloat16m4_t): Likewise.
16611 (vfloat16m8_t): Likewise.
16612 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
16613 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
16614 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
16615 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
16618 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
16620 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
16623 2023-06-03 Die Li <lidie@eswincomputing.com>
16625 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
16627 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16629 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
16631 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16633 * config/riscv/vector.md: Add vector-opt.md.
16634 * config/riscv/autovec-opt.md: New file.
16636 2023-06-03 liuhongt <hongtao.liu@intel.com>
16638 PR tree-optimization/110067
16639 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
16640 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
16642 2023-06-03 liuhongt <hongtao.liu@intel.com>
16645 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
16646 (truncv2si<mode>2): Ditto.
16648 2023-06-02 Andrew Pinski <apinski@marvell.com>
16650 PR rtl-optimization/102733
16651 * dse.cc (store_info): Add addrspace field.
16652 (record_store): Record the address space
16653 and check to make sure they are the same.
16655 2023-06-02 Andrew Pinski <apinski@marvell.com>
16657 PR rtl-optimization/110042
16658 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
16659 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
16661 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
16664 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
16665 Make sure that we do not have a cap on field alignment before altering
16666 the struct layout based on the type alignment of the first entry.
16668 2023-06-02 David Faust <david.faust@oracle.com>
16671 * btfout.cc (btf_absolute_func_id): New function.
16672 (btf_asm_func_type): Call it here. Change index parameter from
16673 size_t to ctf_id_t. Use PRIu64 formatter.
16675 2023-06-02 Alex Coplan <alex.coplan@arm.com>
16677 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
16678 (btf_asm_datasec_type): Likewise.
16680 2023-06-02 Carl Love <cel@us.ibm.com>
16682 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
16683 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
16685 2023-06-02 Jason Merrill <jason@redhat.com>
16689 * tree.h (DECL_MERGEABLE): New.
16690 * tree-core.h (struct tree_decl_common): Mention it.
16691 * gimplify.cc (gimplify_init_constructor): Check it.
16692 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
16693 * varasm.cc (categorize_decl_for_section): Likewise.
16695 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
16697 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
16698 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
16699 (stack_regs_mentioned_p): Change return type from int to bool
16700 and adjust function body accordingly.
16701 (stack_regs_mentioned): Ditto.
16702 (check_asm_stack_operands): Ditto. Change "malformed_asm"
16704 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
16705 (swap_rtx_condition_1): Change return type from int to bool
16706 and adjust function body accordingly. Change "r" variable to bool.
16707 (swap_rtx_condition): Change return type from int to bool
16708 and adjust function body accordingly.
16709 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
16710 (subst_stack_regs): Ditto.
16711 (convert_regs_entry): Change return type from int to bool and adjust
16712 function body accordingly. Change "inserted" variable to bool.
16713 (convert_regs_1): Recode handling of control_flow_insn_deleted.
16714 (convert_regs_2): Recode handling of cfg_altered.
16715 (convert_regs): Ditto. Change "inserted" variable to bool.
16717 2023-06-02 Jason Merrill <jason@redhat.com>
16720 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
16721 (initializer_constant_valid_p_1): Compare float precision.
16723 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
16725 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
16728 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16730 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
16731 (vect_set_loop_condition_partial_vectors): Ditto.
16733 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
16736 * config/avr/avr.md: Add an RTL peephole to optimize operations on
16737 non-LD_REGS after a move from LD_REGS.
16738 (piaop): New code iterator.
16740 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
16743 * doc/install.texi: Document (optional) Perl usage for parallel
16744 testing of libgomp.
16746 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
16749 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
16752 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16753 KuanLin Chen <best124612@gmail.com>
16755 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
16756 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
16758 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16760 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
16762 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16764 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
16766 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16768 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
16770 (DEF_RVV_FRM_ENUM): Ditto.
16772 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16774 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
16775 intrinsic API expander
16776 * config/riscv/vector.md
16777 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
16778 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
16779 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
16781 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16783 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
16784 * config/riscv/predicates.md (vector_perm_operand): New predicate.
16785 * config/riscv/riscv-protos.h (enum insn_type): New enum.
16786 (expand_vec_perm): New function.
16787 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
16788 (gen_const_vector_dup): Ditto.
16789 (emit_vlmax_gather_insn): Ditto.
16790 (emit_vlmax_masked_gather_mu_insn): Ditto.
16791 (expand_vec_perm): Ditto.
16793 2023-06-01 Jason Merrill <jason@redhat.com>
16795 * doc/invoke.texi (-Wpedantic): Improve clarity.
16797 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
16799 * rtl.h (exp_equiv_p): Change return type from int to bool.
16800 * cse.cc (mention_regs): Change return type from int to bool
16801 and adjust function body accordingly.
16802 (exp_equiv_p): Ditto.
16803 (insert_regs): Ditto. Change "modified" function argument to bool
16804 and update usage accordingly.
16805 (record_jump_cond): Remove always zero "reversed_nonequality"
16806 function argument and update usage accordingly.
16807 (fold_rtx): Change "changed" variable to bool.
16808 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
16809 (is_dead_reg): Change return type from int to bool.
16811 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16813 * config/xtensa/xtensa.md (adddi3, subdi3):
16814 New RTL generation patterns implemented according to the instruc-
16815 tion idioms described in the Xtensa ISA reference manual (p. 600).
16817 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
16818 Uros Bizjak <ubizjak@gmail.com>
16821 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
16822 CODE_for_sse4_1_ptestzv2di.
16823 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
16824 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
16825 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
16826 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
16827 when expanding UNSPEC_PTEST to compare against zero.
16828 * config/i386/i386-features.cc (scalar_chain::convert_compare):
16829 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
16830 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
16831 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
16832 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
16833 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
16834 check for suitable matching modes for the UNSPEC_PTEST pattern.
16835 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
16836 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
16837 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
16838 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
16839 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
16840 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
16841 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
16843 (*ptest<mode>_and): Specify CCZ to only perform this optimization
16844 when only the Z flag is required.
16846 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
16849 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
16851 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16853 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
16854 Add =r,m and =r,m alternatives.
16855 (load_pair<DREG:mode><DREG2:mode>): Likewise.
16856 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
16858 2023-06-01 Pan Li <pan2.li@intel.com>
16860 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
16862 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
16863 (main): Disable FP16 tuple.
16864 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
16865 (TARGET_VECTOR_ELEN_FP_16): Ditto.
16866 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
16868 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
16869 (vfloat16mf2_t): Ditto.
16870 (vfloat16m1_t): Ditto.
16871 (vfloat16m2_t): Ditto.
16872 (vfloat16m4_t): Ditto.
16873 (vfloat16m8_t): Ditto.
16874 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
16876 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
16877 machine mode based on TARGET_VECTOR_ELEN_FP_16.
16879 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16881 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
16882 (DEF_RVV_FRM_ENUM): New macro.
16883 (handle_pragma_vector): Add FRM enum
16884 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
16891 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
16892 Richard Sandiford <richard.sandiford@arm.com>
16894 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
16895 Update call to wi::bswap.
16896 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
16897 Update call to wi::bswap.
16898 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
16899 Update calls to wi::bswap.
16900 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
16901 (wi::bswap_large): New function, with revised API.
16902 * wide-int.h (wi::bswap): New (template) function prototype.
16903 (wide_int_storage::bswap): Remove method.
16904 (sext_large, zext_large): Consistent indentation/line wrapping.
16905 (bswap_large): Prototype helper function containing implementation.
16906 (wi::bswap): New template wrapper around bswap_large.
16908 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16911 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
16912 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
16913 (usdot_prod<vsi2qi>): Rename to...
16914 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
16915 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
16916 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
16917 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
16918 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
16919 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
16920 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
16923 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16926 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
16927 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
16928 (aarch64_sq<r>dmulh_n<mode>): Rename to...
16929 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
16930 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
16931 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
16932 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
16933 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
16934 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
16935 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
16936 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
16937 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
16938 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
16939 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
16941 2023-05-31 David Faust <david.faust@oracle.com>
16943 * btfout.cc (btf_kind_names): New.
16944 (btf_kind_name): New.
16945 (btf_absolute_var_id): New utility function.
16946 (btf_relative_var_id): Likewise.
16947 (btf_relative_func_id): Likewise.
16948 (btf_absolute_datasec_id): Likewise.
16949 (btf_asm_type_ref): New.
16950 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
16951 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
16952 (btf_asm_varent): Likewise.
16953 (btf_asm_func_arg): Likewise.
16954 (btf_asm_datasec_entry): Likewise.
16955 (btf_asm_datasec_type): Likewise.
16956 (btf_asm_func_type): Likewise. Add index parameter.
16957 (btf_asm_enum_const): Likewise.
16958 (btf_asm_sou_member): Likewise.
16959 (output_btf_vars): Update btf_asm_* call accordingly.
16960 (output_asm_btf_sou_fields): Likewise.
16961 (output_asm_btf_enum_list): Likewise.
16962 (output_asm_btf_func_args_list): Likewise.
16963 (output_asm_btf_vlen_bytes): Likewise.
16964 (output_btf_func_types): Add ctf_container_ref parameter.
16965 Pass it to btf_asm_func_type.
16966 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
16967 (btf_output): Update output_btf_func_types call similarly.
16969 2023-05-31 David Faust <david.faust@oracle.com>
16971 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
16972 and BTF_KIND_FWD which do not use the size/type field at all.
16974 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
16976 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
16977 (active_insn_p): Ditto.
16978 (in_sequence_p): Ditto.
16979 (unshare_all_rtl): Change return type from int to void.
16980 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
16981 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
16982 and adjust function body accordingly.
16983 (mem_expr_equal_p): Ditto.
16984 (unshare_all_rtl): Change return type from int to void
16985 and adjust function body accordingly.
16986 (verify_rtx_sharing): Remove unneeded return.
16987 (active_insn_p): Change return type from int to bool
16988 and adjust function body accordingly.
16989 (in_sequence_p): Ditto.
16991 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
16993 * rtl.h (true_dependence): Change return type from int to bool.
16994 (canon_true_dependence): Ditto.
16995 (read_dependence): Ditto.
16996 (anti_dependence): Ditto.
16997 (canon_anti_dependence): Ditto.
16998 (output_dependence): Ditto.
16999 (canon_output_dependence): Ditto.
17000 (may_alias_p): Ditto.
17001 * alias.h (alias_sets_conflict_p): Ditto.
17002 (alias_sets_must_conflict_p): Ditto.
17003 (objects_must_conflict_p): Ditto.
17004 (nonoverlapping_memrefs_p): Ditto.
17005 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
17006 (record_set): Ditto.
17007 (base_alias_check): Ditto.
17008 (find_base_value): Ditto.
17009 (mems_in_disjoint_alias_sets_p): Ditto.
17010 (get_alias_set_entry): Ditto.
17011 (decl_for_component_ref): Ditto.
17012 (write_dependence_p): Ditto.
17013 (memory_modified_1): Ditto.
17014 (mems_in_disjoint_alias_set_p): Change return type from int to bool
17015 and adjust function body accordingly.
17016 (alias_sets_conflict_p): Ditto.
17017 (alias_sets_must_conflict_p): Ditto.
17018 (objects_must_conflict_p): Ditto.
17019 (rtx_equal_for_memref_p): Ditto.
17020 (base_alias_check): Ditto.
17021 (read_dependence): Ditto.
17022 (nonoverlapping_memrefs_p): Ditto.
17023 (true_dependence_1): Ditto.
17024 (true_dependence): Ditto.
17025 (canon_true_dependence): Ditto.
17026 (write_dependence_p): Ditto.
17027 (anti_dependence): Ditto.
17028 (canon_anti_dependence): Ditto.
17029 (output_dependence): Ditto.
17030 (canon_output_dependence): Ditto.
17031 (may_alias_p): Ditto.
17032 (init_alias_analysis): Change "changed" variable to bool.
17034 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17036 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
17037 expand into define_insn_and_split.
17039 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17041 * config/riscv/vector.md: Remove FRM.
17043 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17045 * config/riscv/vector.md: Remove FRM.
17047 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17049 * config/riscv/vector.md: Remove FRM.
17051 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
17054 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
17057 2023-05-31 Richard Biener <rguenther@suse.de>
17060 PR tree-optimization/109143
17061 * tree-ssa-structalias.cc (struct topo_info): Remove.
17062 (init_topo_info): Likewise.
17063 (free_topo_info): Likewise.
17064 (compute_topo_order): Simplify API, put the component
17065 with ESCAPED last so it's processed first.
17066 (topo_visit): Adjust.
17067 (solve_graph): Likewise.
17069 2023-05-31 Richard Biener <rguenther@suse.de>
17071 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
17073 (add_graph_edge): Count redundant edges we avoid to create.
17074 (dump_sa_stats): Dump them.
17075 (ipa_pta_execute): Do not dump generating constraints when
17076 we are not dumping them.
17078 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17080 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
17081 output template to avoid explicit switch on which_alternative.
17082 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
17083 (and<mode>3): Likewise.
17084 (ior<mode>3): Likewise.
17085 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
17087 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17089 * config/xtensa/predicates.md (xtensa_bit_join_operator):
17091 * config/xtensa/xtensa.md (ior_op): Remove.
17092 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
17093 insn_and_split pattern of the same name to express and capture
17094 the bit-combining operation with both sides swapped.
17095 In addition, replace use of code iterator with new operator
17097 (*shlrd_const, *shlrd_per_byte):
17098 Likewise regarding the code iterator.
17100 2023-05-31 Cui, Lili <lili.cui@intel.com>
17102 PR tree-optimization/110038
17103 * params.opt: Add a limit on tree-reassoc-width.
17104 * tree-ssa-reassoc.cc
17105 (rewrite_expr_tree_parallel): Add width limit.
17107 2023-05-31 Pan Li <pan2.li@intel.com>
17109 * common/config/riscv/riscv-common.cc:
17110 (riscv_implied_info): Add zvfh item.
17111 (riscv_ext_version_table): Ditto.
17112 (riscv_ext_flag_table): Ditto.
17113 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
17114 (TARGET_ZVFH): Ditto.
17116 2023-05-30 liuhongt <hongtao.liu@intel.com>
17118 PR tree-optimization/108804
17119 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
17120 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
17121 Add new parameter narrow_src_p.
17122 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
17123 vectorization by truncating to lower precision.
17124 * tree-vectorizer.h (vect_get_range_info): New declare.
17126 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
17128 * lra-int.h (lra_update_sp_offset): Add the prototype.
17129 * lra.cc (setup_sp_offset): Change the return type. Use
17130 lra_update_sp_offset.
17131 * lra-eliminations.cc (lra_update_sp_offset): New function.
17132 (lra_process_new_insns): Push the current insn to reprocess if the
17133 input reload changes sp offset.
17135 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
17138 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
17139 Fix misleading identation.
17141 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
17143 * rtl.h (comparison_dominates_p): Change return type from int to bool.
17144 (condjump_p): Ditto.
17145 (any_condjump_p): Ditto.
17146 (any_uncondjump_p): Ditto.
17147 (simplejump_p): Ditto.
17148 (returnjump_p): Ditto.
17149 (eh_returnjump_p): Ditto.
17150 (onlyjump_p): Ditto.
17151 (invert_jump_1): Ditto.
17152 (invert_jump): Ditto.
17153 (rtx_renumbered_equal_p): Ditto.
17154 (redirect_jump_1): Ditto.
17155 (redirect_jump): Ditto.
17156 (condjump_in_parallel_p): Ditto.
17157 * jump.cc (invert_exp_1): Adjust forward declaration.
17158 (comparison_dominates_p): Change return type from int to bool
17159 and adjust function body accordingly.
17160 (simplejump_p): Ditto.
17161 (condjump_p): Ditto.
17162 (condjump_in_parallel_p): Ditto.
17163 (any_uncondjump_p): Ditto.
17164 (any_condjump_p): Ditto.
17165 (returnjump_p): Ditto.
17166 (eh_returnjump_p): Ditto.
17167 (onlyjump_p): Ditto.
17168 (redirect_jump_1): Ditto.
17169 (redirect_jump): Ditto.
17170 (invert_exp_1): Ditto.
17171 (invert_jump_1): Ditto.
17172 (invert_jump): Ditto.
17173 (rtx_renumbered_equal_p): Ditto.
17175 2023-05-30 Andrew Pinski <apinski@marvell.com>
17177 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
17178 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
17179 Add ne as a possible cmp.
17180 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
17182 2023-05-30 Andrew Pinski <apinski@marvell.com>
17184 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
17187 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
17189 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
17190 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
17191 (and (extend X) C) as (zero_extend (and X C)), to also optimize
17192 modes wider than HOST_WIDE_INT.
17194 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
17197 * simplify-rtx.cc (simplify_const_relational_operation): Return
17198 early if we have a MODE_CC comparison that isn't a COMPARE against
17201 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
17203 * config/riscv/riscv.cc (riscv_const_insns): Allow
17204 const_vec_duplicates.
17206 2023-05-30 liuhongt <hongtao.liu@intel.com>
17208 PR middle-end/108938
17209 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
17210 function, cut from original find_bswap_or_nop function.
17211 (find_bswap_or_nop): Add a new parameter, detect bswap +
17212 rotate and save rotate result in the new parameter.
17213 (bswap_replace): Add a new parameter to indicate rotate and
17214 generate rotate stmt if needed.
17215 (maybe_optimize_vector_constructor): Adjust for new rotate
17216 parameter in the upper 2 functions.
17217 (pass_optimize_bswap::execute): Ditto.
17218 (imm_store_chain_info::output_merged_store): Ditto.
17220 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17222 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
17223 (aarch64_<su>adalp<mode>): New define_expand.
17224 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
17225 (aarch64_<su>addlp<mode>): Convert to define_expand.
17226 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
17227 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
17229 (USADDLP): Likewise.
17230 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
17232 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17234 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
17235 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
17236 srhadd, urhadd builtin codes for standard optab ones.
17237 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
17238 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
17240 (<u>avg<mode>3_ceil): Rename to...
17241 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
17243 (aarch64_<su>hsub<mode>): New define_expand.
17244 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
17245 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
17246 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
17248 2023-05-30 Andreas Schwab <schwab@suse.de>
17251 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
17252 match libsanitizer.
17254 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17256 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
17257 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
17259 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
17260 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
17261 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
17262 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
17263 (aarch64_<sra_op>sra_n<mode>): New define_expand.
17264 (aarch64_<sra_op>rsra_n<mode>): Likewise.
17265 (aarch64_<sur>sra_n<mode>): Rename to...
17266 (aarch64_<sur>sra_ndi): ... This.
17267 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
17268 any_target_p argument.
17269 (aarch64_extract_vec_duplicate_wide_int): Define.
17270 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
17271 (aarch64_const_vec_rnd_cst_p): Likewise.
17272 (aarch64_vector_mode_supported_any_target_p): Likewise.
17273 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
17274 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
17275 (VSRA): Adjust for the above.
17277 (V2XWIDE): New mode_attr.
17278 (vec_or_offset): Likewise.
17279 (SHIFTEXTEND): Likewise.
17280 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
17282 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
17283 clarify that it applies to current target options.
17284 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
17285 * doc/tm.texi.in: Regenerate.
17286 * stor-layout.cc (mode_for_vector): Check
17287 vector_mode_supported_any_target_p when iterating through vector modes.
17288 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
17289 clarify that it applies to current target options.
17290 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
17292 2023-05-30 Lili Cui <lili.cui@intel.com>
17294 PR tree-optimization/98350
17295 * tree-ssa-reassoc.cc
17296 (rewrite_expr_tree_parallel): Rewrite this function.
17297 (rank_ops_for_fma): New.
17298 (reassociate_bb): Handle new function.
17300 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
17302 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
17303 (rtx_unstable_p): Ditto.
17304 (reg_mentioned_p): Ditto.
17305 (reg_referenced_p): Ditto.
17306 (reg_used_between_p): Ditto.
17307 (reg_set_between_p): Ditto.
17308 (modified_between_p): Ditto.
17309 (no_labels_between_p): Ditto.
17310 (modified_in_p): Ditto.
17311 (reg_set_p): Ditto.
17312 (multiple_sets): Ditto.
17313 (set_noop_p): Ditto.
17314 (noop_move_p): Ditto.
17315 (reg_overlap_mentioned_p): Ditto.
17316 (dead_or_set_p): Ditto.
17317 (dead_or_set_regno_p): Ditto.
17318 (find_reg_fusage): Ditto.
17319 (find_regno_fusage): Ditto.
17320 (side_effects_p): Ditto.
17321 (volatile_refs_p): Ditto.
17322 (volatile_insn_p): Ditto.
17323 (may_trap_p_1): Ditto.
17324 (may_trap_p): Ditto.
17325 (may_trap_or_fault_p): Ditto.
17326 (computed_jump_p): Ditto.
17327 (auto_inc_p): Ditto.
17328 (loc_mentioned_in_p): Ditto.
17329 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
17330 (rtx_unstable_p): Change return type from int to bool
17331 and adjust function body accordingly.
17332 (rtx_addr_can_trap_p): Ditto.
17333 (reg_mentioned_p): Ditto.
17334 (no_labels_between_p): Ditto.
17335 (reg_used_between_p): Ditto.
17336 (reg_referenced_p): Ditto.
17337 (reg_set_between_p): Ditto.
17338 (reg_set_p): Ditto.
17339 (modified_between_p): Ditto.
17340 (modified_in_p): Ditto.
17341 (multiple_sets): Ditto.
17342 (set_noop_p): Ditto.
17343 (noop_move_p): Ditto.
17344 (reg_overlap_mentioned_p): Ditto.
17345 (dead_or_set_p): Ditto.
17346 (dead_or_set_regno_p): Ditto.
17347 (find_reg_fusage): Ditto.
17348 (find_regno_fusage): Ditto.
17349 (remove_node_from_insn_list): Ditto.
17350 (volatile_insn_p): Ditto.
17351 (volatile_refs_p): Ditto.
17352 (side_effects_p): Ditto.
17353 (may_trap_p_1): Ditto.
17354 (may_trap_p): Ditto.
17355 (may_trap_or_fault_p): Ditto.
17356 (computed_jump_p): Ditto.
17357 (auto_inc_p): Ditto.
17358 (loc_mentioned_in_p): Ditto.
17359 * combine.cc (can_combine_p): Update indirect function.
17361 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17363 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
17364 * config/riscv/iterators.md: New attribute.
17365 * config/riscv/vector-iterators.md: New attribute.
17367 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
17369 * config/riscv/riscv.md: Fix signed and unsigned comparison
17372 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17374 * config/riscv/autovec.md (fnma<mode>4): New pattern.
17375 (*fnma<mode>): Ditto.
17377 2023-05-29 Die Li <lidie@eswincomputing.com>
17379 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
17381 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
17382 process for TARGET_XTHEADCONDMOV
17384 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
17387 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
17388 TARGET_AVX512BW to generate truncv16hiv16qi2.
17390 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
17392 * config/riscv/riscv.md (and<mode>3): New expander.
17393 (*and<mode>3) New pattern.
17394 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
17397 2023-05-29 Pan Li <pan2.li@intel.com>
17399 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
17400 comments and rename local variables.
17401 (emit_nonvlmax_insn): Diito.
17402 (emit_vlmax_merge_insn): Ditto.
17403 (emit_vlmax_cmp_insn): Ditto.
17404 (emit_vlmax_cmp_mu_insn): Ditto.
17405 (emit_scalar_move_insn): Ditto.
17407 2023-05-29 Pan Li <pan2.li@intel.com>
17409 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
17411 (emit_nonvlmax_insn): Ditto.
17412 (emit_vlmax_merge_insn): Ditto.
17413 (emit_vlmax_cmp_insn): Ditto.
17414 (emit_vlmax_cmp_mu_insn): Ditto.
17415 (expand_vec_series): Ditto.
17417 2023-05-29 Pan Li <pan2.li@intel.com>
17419 * config/riscv/riscv-protos.h (enum insn_type): New type.
17420 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
17421 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
17423 (rvv_builder::get_merged_repeating_sequence): Ditto.
17424 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
17425 to evaluate the optimization cost.
17426 (rvv_builder::get_merge_scalar_mask): New function to get the merge
17428 (emit_scalar_move_insn): New function to emit vmv.s.x.
17429 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
17430 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
17432 (get_repeating_sequence_dup_machine_mode): New function to get the dup
17434 (expand_vector_init_merge_repeating_sequence): New function to perform
17436 (expand_vec_init): Add this vector init optimization.
17437 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
17439 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
17441 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
17442 put onto the increment when it is inserted after the position.
17444 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
17446 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
17449 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17451 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
17453 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17455 * config/riscv/autovec.md (fma<mode>4): New pattern.
17456 (*fma<mode>): Ditto.
17457 * config/riscv/riscv-protos.h (enum insn_type): New enum.
17458 (emit_vlmax_ternary_insn): New function.
17459 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
17461 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17463 * config/riscv/vector.md: Fix vimuladd instruction bug.
17465 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17467 * config/riscv/riscv.cc (global_state_unknown_p): New function.
17468 (riscv_mode_after): Fix incorrect VXM.
17470 2023-05-29 Pan Li <pan2.li@intel.com>
17472 * common/config/riscv/riscv-common.cc:
17473 (riscv_implied_info): Add zvfhmin item.
17474 (riscv_ext_version_table): Ditto.
17475 (riscv_ext_flag_table): Ditto.
17476 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
17477 (TARGET_ZFHMIN): Align indent.
17478 (TARGET_ZFH): Ditto.
17479 (TARGET_ZVFHMIN): New macro.
17481 2023-05-27 liuhongt <hongtao.liu@intel.com>
17484 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
17485 to VI_AVX2 to cover more modes.
17487 2023-05-27 liuhongt <hongtao.liu@intel.com>
17489 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
17490 Remove ATOM and ICELAKE(and later) core processors.
17492 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
17494 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
17496 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
17498 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
17501 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
17502 Juzhe Zhong <juzhe.zhong@rivai.ai>
17504 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
17506 (<optab><v_quad_trunc><mode>2): Dito.
17507 (<optab><v_oct_trunc><mode>2): Dito.
17508 (trunc<mode><v_double_trunc>2): Dito.
17509 (trunc<mode><v_quad_trunc>2): Dito.
17510 (trunc<mode><v_oct_trunc>2): Dito.
17511 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
17512 (autovectorize_vector_modes): Define.
17513 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
17515 (autovectorize_vector_modes): Implement hook.
17516 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
17517 Implement target hook.
17518 (riscv_vectorize_related_mode): Implement target hook.
17519 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
17520 (TARGET_VECTORIZE_RELATED_MODE): Define.
17521 * config/riscv/vector-iterators.md: Add lowercase versions of
17522 mode_attr iterators.
17524 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
17525 Tobias Burnus <tobias@codesourcery.com>
17527 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
17528 (ASM_SPEC): Use XNACKOPT.
17529 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
17530 (enum hsaco_attr_type): ... this, and generalize the names.
17531 (TARGET_XNACK): New macro.
17532 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
17534 (output_file_start): Update xnack handling.
17535 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
17536 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
17537 (sram_ecc_type): Rename to ...
17538 (hsaco_attr_type: ... this.)
17539 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
17540 (TEST_XNACK): Delete.
17541 (TEST_XNACK_ANY): New macro.
17542 (TEST_XNACK_ON): New macro.
17543 (main): Support the new -mxnack=on/off/any syntax.
17544 * doc/invoke.texi (-mxnack): Update for new syntax.
17546 2023-05-26 Andrew Pinski <apinski@marvell.com>
17548 * genmatch.cc (emit_debug_printf): New function.
17549 (dt_simplify::gen_1): Emit printf into the code
17550 before the `return true` or returning the folded result
17551 instead of emitting it always.
17553 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17555 * config/xtensa/xtensa-protos.h
17556 (xtensa_expand_block_set_unrolled_loop,
17557 xtensa_expand_block_set_small_loop): Remove.
17558 (xtensa_expand_block_set): New prototype.
17559 * config/xtensa/xtensa.cc
17560 (xtensa_expand_block_set_libcall): New subfunction.
17561 (xtensa_expand_block_set_unrolled_loop,
17562 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
17563 (xtensa_expand_block_set): New function that calls the above
17565 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
17566 xtensa_expand_block_set().
17568 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17570 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
17572 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
17574 * config/xtensa/constraints.md (O):
17575 Change to use the above function.
17576 * config/xtensa/xtensa.md (*subsi3_from_const):
17577 New insn_and_split pattern.
17579 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17581 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
17582 Retract excessive line folding, and correct the value of
17583 the "length" insn attribute related to TARGET_DENSITY.
17584 (*extzvsi-1bit_addsubx): Ditto.
17586 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
17588 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
17589 Do not disable call to ix86_expand_vecop_qihi2.
17591 2023-05-26 liuhongt <hongtao.liu@intel.com>
17595 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
17596 calculation when !hard_regno_mode_ok for GENERAL_REGS and
17597 mode, otherwise still use GENERAL_REGS.
17599 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17601 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
17602 explict VL and drop VL in ops.
17604 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
17606 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
17607 in different BB blocks.
17609 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
17611 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
17612 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
17613 instructions when available. Emulate truncation via
17614 ix86_expand_vec_perm_const_1 when native truncate insn
17616 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
17617 when available. Trivially rename some variables.
17618 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
17619 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
17620 calculation of V*QImode emulations to account for generation of
17621 2x-wider mode instructions.
17622 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
17623 emulations to account for generation of 2x-wider mode instructions.
17625 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
17628 * config/avr/avr.cc (avr_can_inline_p): New static function.
17629 (TARGET_CAN_INLINE_P): Define to that function.
17631 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
17634 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
17635 Handle any bit position and use mode QISI.
17636 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
17637 of 2 insns for bit-transfer of respective style.
17639 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
17641 * config/arm/iterators.md (MVE_6): Remove.
17642 * config/arm/mve.md: Replace MVE_6 with MVE_5.
17644 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17645 Richard Sandiford <richard.sandiford@arm.com>
17647 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
17649 (vect_set_loop_controls_directly): Add decrement IV support.
17650 (vect_set_loop_condition_partial_vectors): Ditto.
17651 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
17653 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
17656 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17659 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
17660 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
17661 Fix canonicalization of PLUS operands.
17662 (aarch64_fcmla<rot><mode>): Rename to...
17663 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
17664 Fix canonicalization of PLUS operands.
17665 (aarch64_fcmla_lane<rot><mode>): Rename to...
17666 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
17667 Fix canonicalization of PLUS operands.
17668 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
17669 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
17670 Fix canonicalization of PLUS operands.
17671 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
17673 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
17675 * config/arm/arm.md (rbitsi2): Rename to...
17676 (arm_rbit): ... This.
17677 (ctzsi2): Adjust for the above.
17678 (arm_rev16si2): Convert to define_expand.
17679 (arm_rev16si2_alt1): New pattern.
17680 (arm_rev16si2_alt): Rename to...
17681 (*arm_rev16si2_alt2): ... This.
17682 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
17683 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
17684 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
17685 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
17687 2023-05-25 Alex Coplan <alex.coplan@arm.com>
17690 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
17692 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
17693 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
17694 DFmode as an rvalue.
17696 2023-05-25 Richard Biener <rguenther@suse.de>
17699 * tree-vect-stmts.cc (vectorizable_condition): For
17700 embedded comparisons also handle the case when the target
17701 only provides vec_cmp and vcond_mask.
17703 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
17705 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
17708 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
17710 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
17711 (seq_cost_ignoring_scalar_moves): Likewise.
17712 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
17714 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17716 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
17717 (vcage_f32): Likewise.
17718 (vcages_f32): Likewise.
17719 (vcageq_f32): Likewise.
17720 (vcaged_f64): Likewise.
17721 (vcageq_f64): Likewise.
17722 (vcagts_f32): Likewise.
17723 (vcagt_f32): Likewise.
17724 (vcagt_f64): Likewise.
17725 (vcagtq_f32): Likewise.
17726 (vcagtd_f64): Likewise.
17727 (vcagtq_f64): Likewise.
17728 (vcale_f32): Likewise.
17729 (vcale_f64): Likewise.
17730 (vcaled_f64): Likewise.
17731 (vcales_f32): Likewise.
17732 (vcaleq_f32): Likewise.
17733 (vcaleq_f64): Likewise.
17734 (vcalt_f32): Likewise.
17735 (vcalt_f64): Likewise.
17736 (vcaltd_f64): Likewise.
17737 (vcaltq_f32): Likewise.
17738 (vcaltq_f64): Likewise.
17739 (vcalts_f32): Likewise.
17741 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
17745 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
17746 int to const int or const int to const unsigned int.
17747 (_mm512_mask_srli_epi16): Ditto.
17748 (_mm512_slli_epi16): Ditto.
17749 (_mm512_mask_slli_epi16): Ditto.
17750 (_mm512_maskz_slli_epi16): Ditto.
17751 (_mm512_srai_epi16): Ditto.
17752 (_mm512_mask_srai_epi16): Ditto.
17753 (_mm512_maskz_srai_epi16): Ditto.
17754 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
17755 (_mm512_mask_slli_epi64): Ditto.
17756 (_mm512_maskz_slli_epi64): Ditto.
17757 (_mm512_srli_epi64): Ditto.
17758 (_mm512_mask_srli_epi64): Ditto.
17759 (_mm512_maskz_srli_epi64): Ditto.
17760 (_mm512_srai_epi64): Ditto.
17761 (_mm512_mask_srai_epi64): Ditto.
17762 (_mm512_maskz_srai_epi64): Ditto.
17763 (_mm512_slli_epi32): Ditto.
17764 (_mm512_mask_slli_epi32): Ditto.
17765 (_mm512_maskz_slli_epi32): Ditto.
17766 (_mm512_srli_epi32): Ditto.
17767 (_mm512_mask_srli_epi32): Ditto.
17768 (_mm512_maskz_srli_epi32): Ditto.
17769 (_mm512_srai_epi32): Ditto.
17770 (_mm512_mask_srai_epi32): Ditto.
17771 (_mm512_maskz_srai_epi32): Ditto.
17772 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
17773 (_mm256_maskz_srai_epi16): Ditto.
17774 (_mm_mask_srai_epi16): Ditto.
17775 (_mm_maskz_srai_epi16): Ditto.
17776 (_mm256_mask_slli_epi16): Ditto.
17777 (_mm256_maskz_slli_epi16): Ditto.
17778 (_mm_mask_slli_epi16): Ditto.
17779 (_mm_maskz_slli_epi16): Ditto.
17780 (_mm_maskz_srli_epi16): Ditto.
17781 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
17782 (_mm256_maskz_srli_epi32): Ditto.
17783 (_mm_mask_srli_epi32): Ditto.
17784 (_mm_maskz_srli_epi32): Ditto.
17785 (_mm256_mask_srli_epi64): Ditto.
17786 (_mm256_maskz_srli_epi64): Ditto.
17787 (_mm_mask_srli_epi64): Ditto.
17788 (_mm_maskz_srli_epi64): Ditto.
17789 (_mm256_mask_srai_epi32): Ditto.
17790 (_mm256_maskz_srai_epi32): Ditto.
17791 (_mm_mask_srai_epi32): Ditto.
17792 (_mm_maskz_srai_epi32): Ditto.
17793 (_mm256_srai_epi64): Ditto.
17794 (_mm256_mask_srai_epi64): Ditto.
17795 (_mm256_maskz_srai_epi64): Ditto.
17796 (_mm_srai_epi64): Ditto.
17797 (_mm_mask_srai_epi64): Ditto.
17798 (_mm_maskz_srai_epi64): Ditto.
17799 (_mm_mask_slli_epi32): Ditto.
17800 (_mm_maskz_slli_epi32): Ditto.
17801 (_mm_mask_slli_epi64): Ditto.
17802 (_mm_maskz_slli_epi64): Ditto.
17803 (_mm256_mask_slli_epi32): Ditto.
17804 (_mm256_maskz_slli_epi32): Ditto.
17805 (_mm256_mask_slli_epi64): Ditto.
17806 (_mm256_maskz_slli_epi64): Ditto.
17808 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17810 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
17813 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
17815 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
17816 * data-streamer-out.cc (streamer_write_vrange): Same.
17817 * value-range.h (class vrange): Make streamer_write_vrange a friend.
17819 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
17821 * value-query.cc (range_query::get_tree_range): Set NAN directly
17823 * value-range.cc (frange::set): Assert that bounds are not NAN.
17825 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
17827 * value-range.cc (add_vrange): Handle known NANs.
17829 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
17831 * value-range.h (frange::set_nan): New.
17833 2023-05-25 Alexandre Oliva <oliva@adacore.com>
17836 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
17837 requires stricter alignment than MEM's.
17839 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17841 PR tree-optimization/107822
17842 PR tree-optimization/107986
17843 * Makefile.in (OBJS): Add gimple-range-phi.o.
17844 * gimple-range-cache.h (ranger_cache::m_estimate): New
17845 phi_analyzer pointer member.
17846 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
17847 phi_analyzer if no loop info is available.
17848 * gimple-range-phi.cc: New file.
17849 * gimple-range-phi.h: New file.
17850 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
17852 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17854 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
17856 (fold_range): Add range_query parameter.
17857 (fur_relation::fur_relation): New.
17858 (fur_relation::trio): New.
17859 (fur_relation::register_relation): New.
17860 (fold_relations): New.
17861 * gimple-range-fold.h (fold_range): Adjust prototypes.
17862 (fold_relations): New.
17864 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17866 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
17867 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
17868 (ranger_cache::const_query): New.
17869 * gimple-range.cc (gimple_ranger::const_query): New.
17870 * gimple-range.h (gimple_ranger::const_query): New prototype.
17872 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17874 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
17875 (ssa_cache::dump_range_query): Delete.
17876 (ssa_lazy_cache::dump_range_query): Delete.
17877 (ssa_lazy_cache::get_range): Move from header file.
17878 (ssa_lazy_cache::clear_range): ditto.
17879 (ssa_lazy_cache::clear): Ditto.
17880 * gimple-range-cache.h (class ssa_cache): Virtualize.
17881 (class ssa_lazy_cache): Inherit and virtualize.
17883 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
17885 * value-range.h (vrange::kind): Remove.
17887 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
17889 PR middle-end/109840
17890 * match.pd <popcount optimizations>: Preserve zero-extension when
17891 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
17892 popcount((T)x), so the popcount's argument keeps the same type.
17893 <parity optimizations>: Likewise preserve extensions when
17894 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
17895 parity((T)x), so that the parity's argument type is the same.
17897 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
17899 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
17900 (ipcp_store_vr_results): Same.
17901 * ipa-prop.cc (ipa_vr::ipa_vr): New.
17902 (ipa_vr::get_vrange): New.
17903 (ipa_vr::set_unknown): New.
17904 (ipa_vr::streamer_read): New.
17905 (ipa_vr::streamer_write): New.
17906 (write_ipcp_transformation_info): Use new ipa_vr API.
17907 (read_ipcp_transformation_info): Same.
17908 (ipa_vr::nonzero_p): Delete.
17909 (ipcp_update_vr): Use new ipa_vr API.
17910 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
17911 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
17913 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
17915 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
17916 silence overflow warnings later on.
17918 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
17920 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
17921 Remove handling of V8QImode.
17922 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
17923 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
17924 (v<insn>v4qi3): Ditto.
17925 * config/i386/sse.md (v<insn>v8qi3): Remove.
17927 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17930 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
17931 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
17932 (aarch64_simd_ashr<mode>): Rename to...
17933 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
17934 (aarch64_simd_imm_shl<mode>): Rename to...
17935 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
17936 (aarch64_simd_reg_sshl<mode>): Rename to...
17937 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
17938 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
17939 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
17940 (aarch64_simd_reg_shl<mode>_signed): Rename to...
17941 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
17942 (vec_shr_<mode>): Rename to...
17943 (vec_shr_<mode><vczle><vczbe>): ... This.
17944 (aarch64_<sur>shl<mode>): Rename to...
17945 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
17946 (aarch64_<sur>q<r>shl<mode>): Rename to...
17947 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
17949 2023-05-24 Richard Biener <rguenther@suse.de>
17952 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
17953 Perform final vector composition using
17954 ix86_expand_vector_init_general instead of setting
17955 the highpart and lowpart which causes spilling.
17957 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17959 PR tree-optimization/109695
17960 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
17962 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
17963 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
17964 flag to set_global_range.
17965 (gimple_ranger::prefill_stmt_dependencies): Ditto.
17967 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17969 PR tree-optimization/109695
17970 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
17972 (temporal_cache::current_p): Check always_current method.
17973 (temporal_cache::set_always_current): Add param and set value
17975 (temporal_cache::always_current_p): New.
17976 (ranger_cache::get_global_range): Adjust.
17977 (ranger_cache::set_global_range): set always current first.
17979 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
17981 PR tree-optimization/109695
17982 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
17983 fold_range with global query to choose an initial value.
17985 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17987 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
17990 2023-05-24 Richard Biener <rguenther@suse.de>
17992 PR tree-optimization/109849
17993 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
17994 expressions but take the first sets.
17996 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
17999 * doc/gm2.texi (High procedure function): New node.
18000 (Using): New menu entry for High procedure function.
18002 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
18004 PR rtl-optimization/109940
18005 * early-remat.cc (postorder_index): Rename to...
18006 (rpo_index): ...this.
18007 (compare_candidates): Sort by decreasing rpo_index rather than
18008 increasing postorder_index.
18009 (early_remat::sort_candidates): Calculate the forward RPO from
18011 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
18012 rather than DF_BACKWARD in reverse.
18014 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18017 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
18018 qualifier_none for the return operand.
18020 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18022 * config/riscv/autovec.md (<optab><mode>3): New pattern.
18023 (one_cmpl<mode>2): Ditto.
18024 (*<optab>not<mode>): Ditto.
18025 (*n<optab><mode>): Ditto.
18026 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
18029 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
18031 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
18032 calculation on n_perms by considering nvectors_per_build.
18034 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18035 Richard Sandiford <richard.sandiford@arm.com>
18037 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
18038 (vec_cmp<mode><vm>): New pattern.
18039 (vec_cmpu<mode><vm>): New pattern.
18040 (vcond<V:mode><VI:mode>): New pattern.
18041 (vcondu<V:mode><VI:mode>): New pattern.
18042 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
18043 (emit_vlmax_merge_insn): New function.
18044 (emit_vlmax_cmp_insn): Ditto.
18045 (emit_vlmax_cmp_mu_insn): Ditto.
18046 (expand_vec_cmp): Ditto.
18047 (expand_vec_cmp_float): Ditto.
18048 (expand_vcond): Ditto.
18049 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
18050 (emit_vlmax_cmp_insn): Ditto.
18051 (emit_vlmax_cmp_mu_insn): Ditto.
18052 (get_cmp_insn_code): Ditto.
18053 (expand_vec_cmp): Ditto.
18054 (expand_vec_cmp_float): Ditto.
18055 (expand_vcond): Ditto.
18057 2023-05-24 Pan Li <pan2.li@intel.com>
18059 * config/riscv/genrvv-type-indexer.cc (main): Add
18060 unsigned_eew*_lmul1_interpret for indexer.
18061 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
18062 Register vuint*m1_t interpret function.
18063 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
18064 New macro for vuint8m1_t.
18065 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18066 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18067 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18068 (vbool1_t): Add to unsigned_eew*_interpret_ops.
18069 (vbool2_t): Likewise.
18070 (vbool4_t): Likewise.
18071 (vbool8_t): Likewise.
18072 (vbool16_t): Likewise.
18073 (vbool32_t): Likewise.
18074 (vbool64_t): Likewise.
18075 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
18076 New macro for vuint*m1_t.
18077 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18078 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18079 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18080 (required_extensions_p): Add vuint*m1_t interpret case.
18081 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
18082 Add vuint*m1_t interpret to base type.
18083 (unsigned_eew16_lmul1_interpret): Likewise.
18084 (unsigned_eew32_lmul1_interpret): Likewise.
18085 (unsigned_eew64_lmul1_interpret): Likewise.
18087 2023-05-24 Pan Li <pan2.li@intel.com>
18089 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
18090 for the eew size list.
18091 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
18092 (main): Add signed_eew*_lmul1_interpret for indexer.
18093 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
18094 Register vint*m1_t interpret function.
18095 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
18096 New macro for vint8m1_t.
18097 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18098 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18099 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18100 (vbool1_t): Add to signed_eew*_interpret_ops.
18101 (vbool2_t): Likewise.
18102 (vbool4_t): Likewise.
18103 (vbool8_t): Likewise.
18104 (vbool16_t): Likewise.
18105 (vbool32_t): Likewise.
18106 (vbool64_t): Likewise.
18107 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
18108 New macro for vint*m1_t.
18109 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
18110 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
18111 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
18112 (required_extensions_p): Add vint8m1_t interpret case.
18113 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
18114 Add vint*m1_t interpret to base type.
18115 (signed_eew16_lmul1_interpret): Likewise.
18116 (signed_eew32_lmul1_interpret): Likewise.
18117 (signed_eew64_lmul1_interpret): Likewise.
18119 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18121 * config/riscv/autovec.md: Adjust for new interface.
18122 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
18123 (emit_nonvlmax_insn): Add AVL operand.
18124 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
18125 (emit_nonvlmax_insn): Add AVL operand.
18126 (sew64_scalar_helper): Adjust for new interface.
18127 (expand_tuple_move): Ditto.
18128 * config/riscv/vector.md: Ditto.
18130 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18132 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
18133 (expand_const_vector): Ditto.
18134 (legitimize_move): Ditto.
18135 (sew64_scalar_helper): Ditto.
18136 (expand_tuple_move): Ditto.
18137 (expand_vector_init_insert_elems): Ditto.
18138 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
18140 2023-05-24 liuhongt <hongtao.liu@intel.com>
18143 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
18144 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
18145 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
18146 (ix86_masked_all_ones): Handle 64-bit mask.
18147 * config/i386/i386-builtin.def: Replace icode of related
18148 non-mask simd abs builtins with CODE_FOR_nothing.
18150 2023-05-23 Martin Uecker <uecker@tugraz.at>
18153 * function.cc (gimplify_parm_type): Remove function.
18154 (gimplify_parameters): Call gimplify_type_sizes.
18156 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18158 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
18159 and change to also accept '*subx' pattern.
18162 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
18164 * config/xtensa/predicates.md (addsub_operator): New.
18165 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
18166 *extzvsi-1bit_addsubx): New insn_and_split patterns.
18167 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
18168 Add a special case about ifcvt 'noce_try_cmove()' to handle
18169 constant loads that do not fit into signed 12 bits in the
18170 patterns added above.
18172 2023-05-23 Richard Biener <rguenther@suse.de>
18174 PR tree-optimization/109747
18175 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
18176 the SLP node only once to the cost hook.
18178 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
18180 * config/avr/avr.cc (avr_insn_cost): New static function.
18181 (TARGET_INSN_COST): Define to that function.
18183 2023-05-23 Richard Biener <rguenther@suse.de>
18186 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
18187 For vector construction or splats apply GPR->XMM move
18188 costing. QImode memory can be handled directly only
18189 with SSE4.1 pinsrb.
18191 2023-05-23 Richard Biener <rguenther@suse.de>
18193 PR tree-optimization/108752
18194 * tree-vect-stmts.cc (vectorizable_operation): For bit
18195 operations with generic word_mode vectors do not cost
18196 an extra stmt. For plus, minus and negate also cost the
18197 constant materialization.
18199 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
18201 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
18202 Call ix86_expand_vec_shift_qihi_constant for shifts
18203 with constant count operand.
18204 * config/i386/i386.cc (ix86_shift_rotate_cost):
18205 Handle V4QImode and V8QImode.
18206 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
18207 (<insn>v4qi3): Ditto.
18209 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18211 * config/riscv/vector.md: Add mode.
18213 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
18215 PR tree-optimization/109934
18216 * value-range.cc (irange::invert): Remove buggy special case.
18218 2023-05-23 Richard Biener <rguenther@suse.de>
18220 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
18223 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
18226 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
18227 subregs between any scalars that are 64 bits or smaller.
18228 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
18229 (bits_etype): New int attribute.
18230 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
18231 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
18232 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
18234 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
18236 * doc/md.texi: Document that <FOO> can be used to refer to the
18237 numerical value of an int iterator FOO. Tweak other parts of
18238 the int iterator documentation.
18239 * read-rtl.cc (iterator_group::has_self_attr): New field.
18240 (map_attr_string): When has_self_attr is true, make <FOO>
18241 expand to the current value of iterator FOO.
18242 (initialize_iterators): Set has_self_attr for int iterators.
18244 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18246 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
18247 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
18248 (RVV_UNOP_NUM): New macro.
18249 (RVV_BINOP_NUM): Ditto.
18250 (legitimize_move): Refactor the framework of RVV auto-vectorization.
18251 (emit_vlmax_op): Ditto.
18252 (emit_vlmax_reg_op): Ditto.
18253 (emit_len_op): Ditto.
18254 (emit_len_binop): Ditto.
18255 (emit_vlmax_tany_many): Ditto.
18256 (emit_nonvlmax_tany_many): Ditto.
18257 (sew64_scalar_helper): Ditto.
18258 (expand_tuple_move): Ditto.
18259 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
18260 (emit_pred_binop): Ditto.
18261 (emit_vlmax_op): Ditto.
18262 (emit_vlmax_tany_many): New function.
18263 (emit_len_op): Remove.
18264 (emit_nonvlmax_tany_many): New function.
18265 (emit_vlmax_reg_op): Remove.
18266 (emit_len_binop): Ditto.
18267 (emit_index_op): Ditto.
18268 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
18269 (expand_const_vector): Ditto.
18270 (legitimize_move): Ditto.
18271 (sew64_scalar_helper): Ditto.
18272 (expand_tuple_move): Ditto.
18273 (expand_vector_init_insert_elems): Ditto.
18274 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
18275 * config/riscv/vector.md: Ditto.
18277 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18280 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
18281 and constraint for operand 0.
18282 (add_vec_concat_subst_be): Likewise.
18284 2023-05-23 Richard Biener <rguenther@suse.de>
18286 PR tree-optimization/109849
18287 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
18288 and use that to determine what to hoist.
18290 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
18292 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
18293 specific treatment for bit-fields only if they have an integral type
18294 and filter out non-integral bit-fields that do not start and end on
18297 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
18299 PR tree-optimization/109920
18300 * value-range.h (RESIZABLE>::~int_range): Use delete[].
18302 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
18304 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
18305 calcuation of integer vector mode costs to reflect generated
18306 instruction sequences of different integer vector modes and
18307 different target ABIs. Remove "speed" function argument.
18308 (ix86_rtx_costs): Update call for removed function argument.
18309 (ix86_vector_costs::add_stmt_cost): Ditto.
18311 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
18313 * value-range.h (class Value_Range): Implement set_zero,
18314 set_nonzero, and nonzero_p.
18316 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
18318 * config/i386/i386.cc (ix86_multiplication_cost): Add
18319 the cost of a memory read to the cost of V?QImode sequences.
18321 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18323 * config/riscv/riscv-v.cc: Add "m_" prefix.
18325 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18327 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
18328 multiple-rgroup of length.
18329 * tree-vect-stmts.cc (vectorizable_store): Ditto.
18330 (vectorizable_load): Ditto.
18331 * tree-vectorizer.h (vect_get_loop_len): Ditto.
18333 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18335 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
18338 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
18340 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
18341 handling for the case index == count.
18343 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
18346 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
18347 Don't fold to XOR / AND / XOR if just one bit is copied to the
18350 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
18352 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
18353 builtin for bit reversal using brev instruction.
18354 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
18355 NVPTX_BUILTIN_BREVLL.
18356 (nvptx_init_builtins): Define "brev" and "brevll".
18357 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
18358 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
18359 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
18360 section, document __builtin_nvptx_brev{,ll}.
18362 2023-05-21 Jakub Jelinek <jakub@redhat.com>
18364 PR tree-optimization/109505
18365 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
18366 Combine successive equal operations with constants,
18367 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
18368 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
18371 2023-05-21 Andrew Pinski <apinski@marvell.com>
18373 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
18375 2023-05-21 Pan Li <pan2.li@intel.com>
18377 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
18378 rest bool size, aka 2, 4, 8, 16, 32, 64.
18379 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
18380 Register vbool[2|4|8|16|32|64] interpret function.
18381 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
18382 New macro for vbool2_t.
18383 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
18384 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
18385 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
18386 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
18387 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
18388 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
18389 (vint16m1_t): Likewise.
18390 (vint32m1_t): Likewise.
18391 (vint64m1_t): Likewise.
18392 (vuint8m1_t): Likewise.
18393 (vuint16m1_t): Likewise.
18394 (vuint32m1_t): Likewise.
18395 (vuint64m1_t): Likewise.
18396 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
18397 New macro for vbool2_t.
18398 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
18399 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
18400 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
18401 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
18402 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
18403 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
18404 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
18405 vbool2_t interprect to base type.
18406 (bool4_interpret): Likewise.
18407 (bool8_interpret): Likewise.
18408 (bool16_interpret): Likewise.
18409 (bool32_interpret): Likewise.
18410 (bool64_interpret): Likewise.
18412 2023-05-21 Andrew Pinski <apinski@marvell.com>
18414 PR middle-end/109919
18415 * expr.cc (expand_single_bit_test): Don't use the
18416 target for expand_expr.
18418 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
18420 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
18423 2023-05-20 Pan Li <pan2.li@intel.com>
18425 * mode-switching.cc (entity_map): Initialize the array to zero.
18428 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
18431 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
18432 Remove superfluous "parallel" in insn pattern.
18433 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
18434 printing error text to assembly.
18436 2023-05-20 Andrew Pinski <apinski@marvell.com>
18438 * expr.cc (fold_single_bit_test): Rename to ...
18439 (expand_single_bit_test): This and expand directly.
18440 (do_store_flag): Update for the rename function.
18442 2023-05-20 Andrew Pinski <apinski@marvell.com>
18444 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
18445 instead of shift/and.
18447 2023-05-20 Andrew Pinski <apinski@marvell.com>
18449 * expr.cc (fold_single_bit_test): Add an assert
18450 and simplify based on code being NE_EXPR or EQ_EXPR.
18452 2023-05-20 Andrew Pinski <apinski@marvell.com>
18454 * expr.cc (fold_single_bit_test): Take inner and bitnum
18455 instead of arg0 and arg1. Update the code.
18456 (do_store_flag): Don't create a tree when calling
18457 fold_single_bit_test instead just call it with the bitnum
18458 and the inner tree.
18460 2023-05-20 Andrew Pinski <apinski@marvell.com>
18462 * expr.cc (fold_single_bit_test): Use get_def_for_expr
18463 instead of checking the inner's code.
18465 2023-05-20 Andrew Pinski <apinski@marvell.com>
18467 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
18468 (fold_single_bit_test): This and simplify.
18470 2023-05-20 Andrew Pinski <apinski@marvell.com>
18472 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
18474 (fold_single_bit_test): Likewise.
18475 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
18476 (fold_single_bit_test): Likewise and make static.
18477 * fold-const.h (fold_single_bit_test): Remove declaration.
18479 2023-05-20 Die Li <lidie@eswincomputing.com>
18481 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
18484 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
18486 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
18488 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
18491 * config/riscv/bitmanip.md
18492 (<bitmanip_optab>disi2): Match with any_extend.
18493 (<bitmanip_optab>disi2_sext): New pattern to match
18494 with sign extend using an ANDI instruction.
18496 2023-05-19 Nathan Sidwell <nathan@acm.org>
18499 * opts.h (handle_deferred_dump_options): Declare.
18500 * opts-global.cc (handle_common_deferred_options): Do not handle
18502 (handle_deferred_dump_options): New.
18503 * toplev.cc (toplev::main): Call it after plugin init.
18505 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
18507 * config/riscv/constraints.md (DsS, DsD): Restore agreement
18508 with shiftm1 mode attribute.
18510 2023-05-19 Andrew Pinski <apinski@marvell.com>
18513 * gcc.cc (default_compilers["@c-header"]): Add %w
18514 after the --output-pch.
18516 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
18518 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
18519 to hival, ASHIFT the corresponding regs.
18521 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
18523 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
18525 2023-05-19 Jakub Jelinek <jakub@redhat.com>
18527 PR tree-optimization/105776
18528 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
18529 non-NULL, allow division statement to have a cast as single imm use
18530 rather than comparison/condition.
18531 (match_arith_overflow): In that case remove the cast stmt in addition
18532 to the division statement.
18534 2023-05-19 Jakub Jelinek <jakub@redhat.com>
18536 PR tree-optimization/101856
18537 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
18538 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
18539 support it but umul_highpart_optab does.
18541 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
18543 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
18544 of tree_to_shwi on array indices. Minor tweaks.
18546 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18548 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
18549 * attribs.cc (diag_attr_exclusions): Ditto.
18550 (decl_attributes): Ditto.
18551 (build_type_attribute_qual_variant): Ditto.
18552 * builtins.cc (fold_builtin_carg): Ditto.
18553 (fold_builtin_next_arg): Ditto.
18554 (do_mpc_arg2): Ditto.
18555 * cfgexpand.cc (expand_return): Ditto.
18556 * cgraph.h (decl_in_symtab_p): Ditto.
18557 (symtab_node::get_create): Ditto.
18558 * dwarf2out.cc (base_type_die): Ditto.
18559 (implicit_ptr_descriptor): Ditto.
18560 (gen_array_type_die): Ditto.
18561 (gen_type_die_with_usage): Ditto.
18562 (optimize_location_into_implicit_ptr): Ditto.
18563 * expr.cc (do_store_flag): Ditto.
18564 * fold-const.cc (negate_expr_p): Ditto.
18565 (fold_negate_expr_1): Ditto.
18566 (fold_convert_const): Ditto.
18567 (fold_convert_loc): Ditto.
18568 (constant_boolean_node): Ditto.
18569 (fold_binary_op_with_conditional_arg): Ditto.
18570 (build_fold_addr_expr_with_type_loc): Ditto.
18571 (fold_comparison): Ditto.
18572 (fold_checksum_tree): Ditto.
18573 (tree_unary_nonnegative_warnv_p): Ditto.
18574 (integer_valued_real_unary_p): Ditto.
18575 (fold_read_from_constant_string): Ditto.
18576 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
18577 * gimple-expr.cc (useless_type_conversion_p): Ditto.
18578 (is_gimple_reg): Ditto.
18579 (is_gimple_asm_val): Ditto.
18580 (mark_addressable): Ditto.
18581 * gimple-expr.h (is_gimple_variable): Ditto.
18582 (virtual_operand_p): Ditto.
18583 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
18584 * gimplify.cc (gimplify_bind_expr): Ditto.
18585 (gimplify_return_expr): Ditto.
18586 (gimple_add_padding_init_for_auto_var): Ditto.
18587 (gimplify_addr_expr): Ditto.
18588 (omp_add_variable): Ditto.
18589 (omp_notice_variable): Ditto.
18590 (omp_get_base_pointer): Ditto.
18591 (omp_strip_components_and_deref): Ditto.
18592 (omp_strip_indirections): Ditto.
18593 (omp_accumulate_sibling_list): Ditto.
18594 (omp_build_struct_sibling_lists): Ditto.
18595 (gimplify_adjust_omp_clauses_1): Ditto.
18596 (gimplify_adjust_omp_clauses): Ditto.
18597 (gimplify_omp_for): Ditto.
18598 (goa_lhs_expr_p): Ditto.
18599 (gimplify_one_sizepos): Ditto.
18600 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
18601 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
18602 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
18603 (propagate_controlled_uses): Ditto.
18604 * ipa-sra.cc (type_prevails_p): Ditto.
18605 (scan_expr_access): Ditto.
18606 * optabs-tree.cc (optab_for_tree_code): Ditto.
18607 * toplev.cc (wrapup_global_declaration_1): Ditto.
18608 * trans-mem.cc (transaction_invariant_address_p): Ditto.
18609 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
18610 (verify_gimple_comparison): Ditto.
18611 (verify_gimple_assign_binary): Ditto.
18612 (verify_gimple_assign_single): Ditto.
18613 * tree-complex.cc (get_component_ssa_name): Ditto.
18614 * tree-emutls.cc (lower_emutls_2): Ditto.
18615 * tree-inline.cc (copy_tree_body_r): Ditto.
18616 (estimate_move_cost): Ditto.
18617 (copy_decl_for_dup_finish): Ditto.
18618 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
18619 (note_nonlocal_vla_type): Ditto.
18620 (convert_local_omp_clauses): Ditto.
18621 (remap_vla_decls): Ditto.
18622 (fixup_vla_decls): Ditto.
18623 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
18624 * tree-pretty-print.cc (print_declaration): Ditto.
18625 (print_call_name): Ditto.
18626 * tree-sra.cc (compare_access_positions): Ditto.
18627 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
18628 * tree-ssa-ccp.cc (get_default_value): Ditto.
18629 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
18630 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
18631 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
18632 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
18633 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
18634 * tree-ssa-sink.cc (statement_sink_location): Ditto.
18635 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
18636 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
18637 * tree-ssa-uninit.cc (warn_uninit): Ditto.
18638 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
18639 (non_rewritable_mem_ref_base): Ditto.
18640 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
18641 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
18642 * tree-vect-generic.cc (do_binop): Ditto.
18644 * tree-vect-stmts.cc (vect_init_vector): Ditto.
18645 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
18646 * tree.cc (sign_mask_for): Ditto.
18647 (verify_type_variant): Ditto.
18648 (gimple_canonical_types_compatible_p): Ditto.
18649 (verify_type): Ditto.
18650 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
18651 * var-tracking.cc (prepare_call_arguments): Ditto.
18652 (vt_add_function_parameters): Ditto.
18653 * varasm.cc (decode_addr_const): Ditto.
18655 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18657 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
18658 (lower_reduction_clauses): Ditto.
18659 (lower_send_clauses): Ditto.
18660 (lower_omp_task_reductions): Ditto.
18661 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
18662 (worker_single_copy): Ditto.
18663 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
18664 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
18666 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18668 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
18670 (lto_read_body_or_constructor): Ditto.
18671 * lto-streamer-out.cc (tree_is_indexable): Ditto.
18672 (lto_output_var_decl_ref): Ditto.
18673 (DFS::DFS_write_tree_body): Ditto.
18674 (wrap_refs): Ditto.
18675 (write_symbol_extension_info): Ditto.
18677 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
18679 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
18680 defines from tree.h.
18681 (aarch64_mangle_type): Ditto.
18682 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
18683 (alpha_gimplify_va_arg_1): Ditto.
18684 * config/arc/arc.cc (arc_encode_section_info): Ditto.
18685 (arc_is_aux_reg_p): Ditto.
18686 (arc_is_uncached_mem_p): Ditto.
18687 (arc_handle_aux_attribute): Ditto.
18688 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
18689 (arm_handle_cmse_nonsecure_call): Ditto.
18690 (arm_set_default_type_attributes): Ditto.
18691 (arm_is_segment_info_known): Ditto.
18692 (arm_mangle_type): Ditto.
18693 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
18694 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
18695 (avr_decl_absdata_p): Ditto.
18696 (avr_insert_attributes): Ditto.
18697 (avr_section_type_flags): Ditto.
18698 (avr_encode_section_info): Ditto.
18699 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
18700 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
18701 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
18702 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
18703 (csky_mangle_type): Ditto.
18704 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
18705 * config/darwin.cc (is_objc_metadata): Ditto.
18706 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
18707 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
18708 * config/frv/frv.cc (frv_emit_movsi): Ditto.
18709 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
18710 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
18711 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
18712 * config/i386/i386-expand.cc: Ditto.
18713 * config/i386/i386.cc (type_natural_mode): Ditto.
18714 (ix86_function_arg): Ditto.
18715 (ix86_data_alignment): Ditto.
18716 (ix86_local_alignment): Ditto.
18717 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
18718 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
18719 (i386_pe_type_dllexport_p): Ditto.
18720 (i386_pe_adjust_class_at_definition): Ditto.
18721 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
18722 (i386_pe_binds_local_p): Ditto.
18723 (i386_pe_section_type_flags): Ditto.
18724 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
18725 (ia64_gimplify_va_arg): Ditto.
18726 (ia64_in_small_data_p): Ditto.
18727 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
18728 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
18729 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
18730 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
18731 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
18732 (mcore_encode_section_info): Ditto.
18733 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
18734 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
18735 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
18736 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
18737 (pass_in_memory): Ditto.
18738 (nvptx_generate_vector_shuffle): Ditto.
18739 (nvptx_lockless_update): Ditto.
18740 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
18741 (pa_function_value): Ditto.
18742 (pa_function_arg): Ditto.
18743 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
18744 (TEXT_SPACE_P): Ditto.
18745 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
18746 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
18747 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
18748 (riscv_mangle_type): Ditto.
18749 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
18750 (rl78_addsi3_internal): Ditto.
18751 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
18752 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
18753 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
18754 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
18755 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
18756 (rs6000_function_arg_advance_1): Ditto.
18757 (rs6000_function_arg): Ditto.
18758 (rs6000_pass_by_reference): Ditto.
18759 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
18760 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
18761 (rs6000_set_default_type_attributes): Ditto.
18762 (rs6000_elf_in_small_data_p): Ditto.
18763 (IN_NAMED_SECTION): Ditto.
18764 (rs6000_xcoff_encode_section_info): Ditto.
18765 (rs6000_function_value): Ditto.
18766 (invalid_arg_for_unprototyped_fn): Ditto.
18767 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
18768 (s390_vec_n_elem): Ditto.
18769 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
18770 (s390_function_arg_integer): Ditto.
18771 (s390_return_in_memory): Ditto.
18772 (s390_encode_section_info): Ditto.
18773 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
18774 (sh_function_value): Ditto.
18775 * config/sol2.cc (solaris_insert_attributes): Ditto.
18776 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
18777 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
18778 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
18779 (xstormy16_handle_below100_attribute): Ditto.
18780 * config/v850/v850.cc (v850_encode_section_info): Ditto.
18781 (v850_insert_attributes): Ditto.
18782 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
18783 (visium_return_in_memory): Ditto.
18784 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
18786 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
18788 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
18789 (ix86_expand_vecop_qihi): Add op2vec bool variable.
18790 Do not set REG_EQUAL note.
18791 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
18793 * config/i386/i386.cc (ix86_multiplication_cost): Handle
18794 V4QImode and V8QImode.
18795 * config/i386/mmx.md (mulv8qi3): New expander.
18797 * config/i386/sse.md (mulv8qi3): Remove.
18799 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
18801 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
18803 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
18805 PR bootstrap/105831
18806 * config.gcc: Use = operator instead of ==.
18808 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
18810 PR bootstrap/105831
18811 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
18812 * configure.ac: Likewise.
18813 * configure: Regenerate.
18815 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18817 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
18818 (__ARM_mve_coerce1): Remove.
18819 (__ARM_mve_coerce2): Remove.
18820 (__ARM_mve_coerce3): Remove.
18821 (__ARM_mve_coerce_i_scalar): New.
18822 (__ARM_mve_coerce_s8_ptr): New.
18823 (__ARM_mve_coerce_u8_ptr): New.
18824 (__ARM_mve_coerce_s16_ptr): New.
18825 (__ARM_mve_coerce_u16_ptr): New.
18826 (__ARM_mve_coerce_s32_ptr): New.
18827 (__ARM_mve_coerce_u32_ptr): New.
18828 (__ARM_mve_coerce_s64_ptr): New.
18829 (__ARM_mve_coerce_u64_ptr): New.
18830 (__ARM_mve_coerce_f_scalar): New.
18831 (__ARM_mve_coerce_f16_ptr): New.
18832 (__ARM_mve_coerce_f32_ptr): New.
18833 (__arm_vst4q): Change _coerce_ overloads.
18834 (__arm_vbicq): Change _coerce_ overloads.
18835 (__arm_vld1q): Change _coerce_ overloads.
18836 (__arm_vld1q_z): Change _coerce_ overloads.
18837 (__arm_vld2q): Change _coerce_ overloads.
18838 (__arm_vld4q): Change _coerce_ overloads.
18839 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
18840 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
18841 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
18842 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
18843 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
18844 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
18845 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
18846 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
18847 (__arm_vst1q_p): Change _coerce_ overloads.
18848 (__arm_vst2q): Change _coerce_ overloads.
18849 (__arm_vst1q): Change _coerce_ overloads.
18850 (__arm_vstrhq): Change _coerce_ overloads.
18851 (__arm_vstrhq_p): Change _coerce_ overloads.
18852 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
18853 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
18854 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
18855 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
18856 (__arm_vstrwq_p): Change _coerce_ overloads.
18857 (__arm_vstrwq): Change _coerce_ overloads.
18858 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
18859 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
18860 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
18861 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
18862 (__arm_vsetq_lane): Change _coerce_ overloads.
18863 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
18864 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
18865 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
18866 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
18867 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
18868 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
18869 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
18870 (__arm_vidupq_x_u8): Change _coerce_ overloads.
18871 (__arm_vddupq_x_u8): Change _coerce_ overloads.
18872 (__arm_vidupq_x_u16): Change _coerce_ overloads.
18873 (__arm_vddupq_x_u16): Change _coerce_ overloads.
18874 (__arm_vidupq_x_u32): Change _coerce_ overloads.
18875 (__arm_vddupq_x_u32): Change _coerce_ overloads.
18876 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
18877 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
18878 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
18879 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
18880 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
18881 (__arm_vidupq_u16): Change _coerce_ overloads.
18882 (__arm_vidupq_u32): Change _coerce_ overloads.
18883 (__arm_vidupq_u8): Change _coerce_ overloads.
18884 (__arm_vddupq_u16): Change _coerce_ overloads.
18885 (__arm_vddupq_u32): Change _coerce_ overloads.
18886 (__arm_vddupq_u8): Change _coerce_ overloads.
18887 (__arm_viwdupq_m): Change _coerce_ overloads.
18888 (__arm_viwdupq_u16): Change _coerce_ overloads.
18889 (__arm_viwdupq_u32): Change _coerce_ overloads.
18890 (__arm_viwdupq_u8): Change _coerce_ overloads.
18891 (__arm_vdwdupq_m): Change _coerce_ overloads.
18892 (__arm_vdwdupq_u16): Change _coerce_ overloads.
18893 (__arm_vdwdupq_u32): Change _coerce_ overloads.
18894 (__arm_vdwdupq_u8): Change _coerce_ overloads.
18895 (__arm_vstrbq): Change _coerce_ overloads.
18896 (__arm_vstrbq_p): Change _coerce_ overloads.
18897 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
18898 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
18899 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
18900 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
18901 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
18903 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18905 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
18908 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18910 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
18911 (__arm_vadcq_u32): Likewise.
18912 (__arm_vadcq_m_s32): Likewise.
18913 (__arm_vadcq_m_u32): Likewise.
18914 (__arm_vsbcq_s32): Likewise.
18915 (__arm_vsbcq_u32): Likewise.
18916 (__arm_vsbcq_m_s32): Likewise.
18917 (__arm_vsbcq_m_u32): Likewise.
18918 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
18920 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
18922 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
18923 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
18924 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
18925 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
18926 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
18927 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
18928 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
18929 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
18930 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
18931 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
18932 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
18933 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
18934 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
18935 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
18936 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
18937 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
18938 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
18939 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
18940 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
18941 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
18942 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
18943 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
18944 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
18945 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
18946 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
18947 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
18948 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
18949 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
18950 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
18951 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
18952 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
18953 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
18954 (mve_vorrq_m_f<mode>)
18955 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
18956 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
18957 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
18958 capitalization in the emitted asm.
18960 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
18962 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
18964 (Ri): Move constraint definition from predicates.md.
18965 (Rl): Define new constraint.
18966 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
18967 missing constraint.
18968 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
18969 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
18970 op 2. Fix asm output spacing.
18971 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
18972 * config/arm/predicates.md (Ri) Move constraint to constraints.md
18973 (mve_vldrd_immediate): Move it from
18975 (mve_vstrw_immediate): New predicate.
18977 2023-05-18 Pan Li <pan2.li@intel.com>
18978 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
18979 Kito Cheng <kito.cheng@sifive.com>
18980 Richard Biener <rguenther@suse.de>
18981 Richard Sandiford <richard.sandiford@arm.com>
18983 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
18984 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
18985 (struct table_elt): Extend machine_mode to 16 bits.
18986 (struct set): Ditto.
18987 * genmodes.cc (emit_mode_wider): Extend type from char to short.
18988 (emit_mode_complex): Ditto.
18989 (emit_mode_inner): Ditto.
18990 (emit_class_narrowest_mode): Ditto.
18991 * genopinit.cc (main): Extend the machine_mode limit.
18992 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
18993 re-ordered the struct fields for padding.
18994 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
18995 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
18996 (get_mode_alignment): Extend type from char to short.
18997 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
18998 removed the ATTRIBUTE_PACKED.
18999 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
19000 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
19001 m_kind to 2 bits and remove m_spare.
19002 * rtl.h (RTX_CODE_BITSIZE): New macro.
19003 (struct rtx_def): Swap both the bit size and location between the
19004 rtx_code and the machine_mode.
19005 (subreg_shape::unique_id): Extend the machine_mode limit.
19006 * rtlanal.h: Extend machine_mode to 16 bits.
19007 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
19008 bits and re-ordered the struct fields for padding.
19009 (struct tree_decl_common): Extend machine_mode to 16 bits.
19011 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
19013 * genrecog.cc (print_nonbool_test): Fix type error of
19014 switch (SUBREG_BYTE (op))'.
19016 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
19018 * common/config/riscv/riscv-common.cc: Remove
19019 trailing spaces on lines.
19020 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
19021 * config/riscv/riscv.h (enum reg_class): Likewise.
19022 * config/riscv/riscv.md: Likewise.
19024 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
19026 * config/pa/pa.md (clear_cache): New.
19028 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
19030 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
19031 parenthesis. Fix misnamed index entry.
19032 <concept>: Fix misnamed index entry.
19034 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
19036 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
19038 (*<optab>si3_mask, *<optab>di3_mask): Here.
19039 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
19040 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
19042 (*<bitmanip_optab>si3_sext_mask): Likewise.
19043 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
19044 and const_di_mask_operand.
19045 (bitmanip_rotate): New iterator.
19046 (bitmanip_optab): Add rotates.
19047 * config/riscv/predicates.md (const_si_mask_operand): Renamed
19048 from const31_operand. Generalize to handle more mask constants.
19049 (const_di_mask_operand): Similarly.
19051 2023-05-17 Jakub Jelinek <jakub@redhat.com>
19054 * config/i386/i386-builtin-types.def (FLOAT128): Use
19055 float128t_type_node rather than float128_type_node.
19057 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
19059 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
19060 FP_CONTRACT_FAST (no functional change).
19062 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
19064 * config/i386/i386.cc (ix86_multiplication_cost): Correct
19065 calcuation of integer vector mode costs to reflect generated
19066 instruction sequences of different integer vector modes and
19067 different target ABIs.
19069 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19071 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
19072 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
19073 (riscv_mode_needed): Ditto.
19074 (riscv_mode_after): Ditto.
19075 (riscv_mode_entry): Ditto.
19076 (riscv_mode_exit): Ditto.
19077 (riscv_mode_priority): Ditto.
19078 (TARGET_MODE_EMIT): New target hook.
19079 (TARGET_MODE_NEEDED): Ditto.
19080 (TARGET_MODE_AFTER): Ditto.
19081 (TARGET_MODE_ENTRY): Ditto.
19082 (TARGET_MODE_EXIT): Ditto.
19083 (TARGET_MODE_PRIORITY): Ditto.
19084 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
19085 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
19086 * config/riscv/riscv.md: Add csrwvxrm.
19087 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
19088 (vxrmsi): New pattern.
19090 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19092 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
19093 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
19094 (struct narrow_alu_def): Ditto.
19095 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
19096 (function_expander::use_exact_insn): Ditto.
19097 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
19098 (function_base::has_rounding_mode_operand_p): New function.
19100 2023-05-17 Andrew Pinski <apinski@marvell.com>
19102 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
19103 against 0 instead of calling integer_zerop.
19105 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19107 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
19108 (DEF_RVV_VXRM_ENUM): New macro.
19109 (handle_pragma_vector): Add vxrm enum register.
19110 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
19116 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
19118 * value-range.h (Value_Range::operator=): New.
19120 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
19122 * value-range.cc (vrange::operator=): Add a stub to copy
19123 unsupported ranges.
19124 * value-range.h (is_a <unsupported_range>): New.
19125 (Value_Range::operator=): Support copying unsupported ranges.
19127 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
19129 * data-streamer-in.cc (streamer_read_real_value): New.
19130 (streamer_read_value_range): New.
19131 * data-streamer-out.cc (streamer_write_real_value): New.
19132 (streamer_write_vrange): New.
19133 * data-streamer.h (streamer_write_vrange): New.
19134 (streamer_read_value_range): New.
19136 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
19139 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
19140 is ignored for a fixed underlying type.
19141 (C++ Dialect Options): Likewise for -fstrict-enums.
19143 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
19145 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
19148 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19150 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
19152 (s390_atomic_align_for_mode): New.
19154 2023-05-17 Jakub Jelinek <jakub@redhat.com>
19156 * wide-int.cc (wi::from_array): Add missing closing paren in function
19159 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
19161 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
19162 suggested unroll factor once the previous analysis fails.
19164 2023-05-17 Pan Li <pan2.li@intel.com>
19166 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
19168 (main): Add bool1 to the type indexer.
19169 * config/riscv/riscv-vector-builtins-functions.def
19170 (vreinterpret): Register vbool1 interpret function.
19171 * config/riscv/riscv-vector-builtins-types.def
19172 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
19173 (vint8m1_t): Add the type to bool1_interpret_ops.
19174 (vint16m1_t): Ditto.
19175 (vint32m1_t): Ditto.
19176 (vint64m1_t): Ditto.
19177 (vuint8m1_t): Ditto.
19178 (vuint16m1_t): Ditto.
19179 (vuint32m1_t): Ditto.
19180 (vuint64m1_t): Ditto.
19181 * config/riscv/riscv-vector-builtins.cc
19182 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
19183 (required_extensions_p): Add bool1 interpret case.
19184 * config/riscv/riscv-vector-builtins.def
19185 (bool1_interpret): Add bool1 interpret to base type.
19186 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
19187 with VB dest for vreinterpret.
19189 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
19192 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
19193 constants through "lis; xoris".
19195 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
19197 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
19198 default rs6000 target pass for O2 and above.
19199 * doc/invoke.texi: Document -free
19201 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
19203 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
19204 Fix wrong select_kind...
19206 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19208 * config/s390/s390-protos.h (s390_expand_setmem): Change
19209 function signature.
19210 * config/s390/s390.cc (s390_expand_setmem): For memset's less
19211 than or equal to 256 byte do not perform a libc call.
19212 * config/s390/s390.md: Change expander into a version which
19215 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19217 * config/s390/s390-protos.h (s390_expand_movmem): New.
19218 * config/s390/s390.cc (s390_expand_movmem): New.
19219 * config/s390/s390.md (movmem<mode>): New.
19223 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
19225 * config/s390/s390-protos.h (s390_expand_cpymem): Change
19226 function signature.
19227 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
19228 than or equal to 256 byte do not perform a libc call.
19229 (s390_expand_insv): Adapt new function signature of
19230 s390_expand_cpymem.
19231 * config/s390/s390.md: Change expander into a version which
19234 2023-05-16 Andrew Pinski <apinski@marvell.com>
19236 PR tree-optimization/109424
19237 * match.pd: Add patterns for min/max of zero_one_valued
19240 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19242 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
19243 * config/riscv/riscv-vector-builtins.cc
19244 (function_expander::use_ternop_insn): Add default rounding mode.
19245 (function_expander::use_widen_ternop_insn): Ditto.
19246 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
19247 (riscv_hard_regno_mode_ok): Ditto.
19248 (riscv_conditional_register_usage): Ditto.
19249 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
19250 (FRM_REG_P): Ditto.
19251 (RISCV_DWARF_FRM): Ditto.
19252 * config/riscv/riscv.md: Ditto.
19253 * config/riscv/vector-iterators.md: split no frm and has frm operations.
19254 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
19255 (@pred_<optab><mode>): Ditto.
19257 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
19259 PR tree-optimization/109695
19260 * value-range.cc (irange::operator=): Resize range.
19261 (irange::union_): Same.
19262 (irange::intersect): Same.
19263 (irange::invert): Same.
19264 (int_range_max): Default to 3 sub-ranges and resize as needed.
19265 * value-range.h (irange::maybe_resize): New.
19267 (int_range::int_range): Adjust for resizing.
19268 (int_range::operator=): Same.
19270 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
19272 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
19274 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
19275 when range changed.
19277 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19279 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
19280 * config/riscv/riscv-vector-builtins.cc
19281 (function_expander::use_exact_insn): Add default rounding mode operand.
19282 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
19283 (riscv_hard_regno_mode_ok): Ditto.
19284 (riscv_conditional_register_usage): Ditto.
19285 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
19286 (VXRM_REG_P): Ditto.
19287 (RISCV_DWARF_VXRM): Ditto.
19288 * config/riscv/riscv.md: Ditto.
19289 * config/riscv/vector.md: Ditto
19291 2023-05-15 Pan Li <pan2.li@intel.com>
19293 * optabs.cc (maybe_gen_insn): Add case to generate instruction
19294 that has 11 operands.
19296 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19298 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
19299 logic for vector modes.
19301 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19304 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
19305 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
19306 (aarch64_cmtst<mode>): Rename to...
19307 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
19308 (*aarch64_cmtst_same_<mode>): Rename to...
19309 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
19310 (*aarch64_cmtstdi): Rename to...
19311 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
19312 (aarch64_fac<optab><mode>): Rename to...
19313 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
19315 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19318 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
19319 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
19321 2023-05-15 Pan Li <pan2.li@intel.com>
19322 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19323 kito-cheng <kito.cheng@sifive.com>
19325 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
19326 deciding the mode is constant or not.
19327 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
19329 2023-05-15 Richard Biener <rguenther@suse.de>
19331 PR tree-optimization/109848
19332 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
19333 TARGET_MEM_REF address preparation before the store, not
19336 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19338 * config/riscv/riscv.cc
19339 (riscv_vectorize_preferred_vector_alignment): New function.
19340 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
19342 2023-05-14 Andrew Pinski <apinski@marvell.com>
19344 PR tree-optimization/109829
19345 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
19347 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
19350 * config/i386/i386.cc: Revert the 2023-05-11 change.
19351 (ix86_widen_mult_cost): Return high value instead of
19352 ICEing for unsupported modes.
19354 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
19356 * config/i386/i386.cc (x86_function_profiler): Take
19357 ix86_direct_extern_access into account when generating calls
19360 2023-05-14 Pan Li <pan2.li@intel.com>
19362 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
19363 Refactor the or pattern to switch cases.
19365 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
19367 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
19368 aarch64_expand_vector_init to this, and remove interleaving case.
19369 Recursively call aarch64_expand_vector_init_fallback, instead of
19370 aarch64_expand_vector_init.
19371 (aarch64_unzip_vector_init): New function.
19372 (aarch64_expand_vector_init): Likewise.
19374 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
19376 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
19377 Pull out function call from the gcc_assert.
19379 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
19381 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
19382 (policy_to_str): New.
19383 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
19385 2023-05-13 Andrew Pinski <apinski@marvell.com>
19387 PR tree-optimization/109834
19388 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
19389 (popcount(rotate(x,y))->popcount(x)): Likewise.
19391 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
19393 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
19394 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
19395 gen_extend_insn to generate zero/sign extension instructions.
19397 (ix86_expand_vecop_qihi): Initialize interleave functions
19398 for MULT code only. Fix comments.
19400 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
19403 * config/i386/mmx.md (mulv2si3): Remove expander.
19404 (mulv2si3): Rename insn pattern from *mulv2si.
19406 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
19408 PR libstdc++/109816
19409 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
19410 '!lto_stream_offload_p'.
19412 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
19413 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19416 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
19417 (local_avl_compatible_p): New.
19418 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
19419 for LCM, rewrite as a backward algorithm.
19420 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
19421 interface, handle a BB at once.
19423 2023-05-12 Richard Biener <rguenther@suse.de>
19425 PR tree-optimization/64731
19426 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
19427 handle TARGET_MEM_REF destinations of stores from vector
19430 2023-05-12 Richard Biener <rguenther@suse.de>
19432 PR tree-optimization/109791
19433 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
19435 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
19438 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19440 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
19441 * config/arm/arm-mve-builtins-base.def (vsriq): New.
19442 * config/arm/arm-mve-builtins-base.h (vsriq): New.
19443 * config/arm/arm-mve-builtins.cc
19444 (function_instance::has_inactive_argument): Handle vsriq.
19445 * config/arm/arm_mve.h (vsriq): Remove.
19447 (vsriq_n_u8): Remove.
19448 (vsriq_n_s8): Remove.
19449 (vsriq_n_u16): Remove.
19450 (vsriq_n_s16): Remove.
19451 (vsriq_n_u32): Remove.
19452 (vsriq_n_s32): Remove.
19453 (vsriq_m_n_s8): Remove.
19454 (vsriq_m_n_u8): Remove.
19455 (vsriq_m_n_s16): Remove.
19456 (vsriq_m_n_u16): Remove.
19457 (vsriq_m_n_s32): Remove.
19458 (vsriq_m_n_u32): Remove.
19459 (__arm_vsriq_n_u8): Remove.
19460 (__arm_vsriq_n_s8): Remove.
19461 (__arm_vsriq_n_u16): Remove.
19462 (__arm_vsriq_n_s16): Remove.
19463 (__arm_vsriq_n_u32): Remove.
19464 (__arm_vsriq_n_s32): Remove.
19465 (__arm_vsriq_m_n_s8): Remove.
19466 (__arm_vsriq_m_n_u8): Remove.
19467 (__arm_vsriq_m_n_s16): Remove.
19468 (__arm_vsriq_m_n_u16): Remove.
19469 (__arm_vsriq_m_n_s32): Remove.
19470 (__arm_vsriq_m_n_u32): Remove.
19471 (__arm_vsriq): Remove.
19472 (__arm_vsriq_m): Remove.
19474 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19476 * config/arm/iterators.md (mve_insn): Add vsri.
19477 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
19478 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
19479 (mve_vsriq_m_n_<supf><mode>): Rename into ...
19480 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19482 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19484 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
19485 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
19487 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19489 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
19490 * config/arm/arm-mve-builtins-base.def (vsliq): New.
19491 * config/arm/arm-mve-builtins-base.h (vsliq): New.
19492 * config/arm/arm-mve-builtins.cc
19493 (function_instance::has_inactive_argument): Handle vsliq.
19494 * config/arm/arm_mve.h (vsliq): Remove.
19496 (vsliq_n_u8): Remove.
19497 (vsliq_n_s8): Remove.
19498 (vsliq_n_u16): Remove.
19499 (vsliq_n_s16): Remove.
19500 (vsliq_n_u32): Remove.
19501 (vsliq_n_s32): Remove.
19502 (vsliq_m_n_s8): Remove.
19503 (vsliq_m_n_s32): Remove.
19504 (vsliq_m_n_s16): Remove.
19505 (vsliq_m_n_u8): Remove.
19506 (vsliq_m_n_u32): Remove.
19507 (vsliq_m_n_u16): Remove.
19508 (__arm_vsliq_n_u8): Remove.
19509 (__arm_vsliq_n_s8): Remove.
19510 (__arm_vsliq_n_u16): Remove.
19511 (__arm_vsliq_n_s16): Remove.
19512 (__arm_vsliq_n_u32): Remove.
19513 (__arm_vsliq_n_s32): Remove.
19514 (__arm_vsliq_m_n_s8): Remove.
19515 (__arm_vsliq_m_n_s32): Remove.
19516 (__arm_vsliq_m_n_s16): Remove.
19517 (__arm_vsliq_m_n_u8): Remove.
19518 (__arm_vsliq_m_n_u32): Remove.
19519 (__arm_vsliq_m_n_u16): Remove.
19520 (__arm_vsliq): Remove.
19521 (__arm_vsliq_m): Remove.
19523 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19525 * config/arm/iterators.md (mve_insn>): Add vsli.
19526 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
19527 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19528 (mve_vsliq_m_n_<supf><mode>): Rename into ...
19529 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19531 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19533 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
19534 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
19536 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19538 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
19539 * config/arm/arm-mve-builtins-base.def (vpselq): New.
19540 * config/arm/arm-mve-builtins-base.h (vpselq): New.
19541 * config/arm/arm_mve.h (vpselq): Remove.
19542 (vpselq_u8): Remove.
19543 (vpselq_s8): Remove.
19544 (vpselq_u16): Remove.
19545 (vpselq_s16): Remove.
19546 (vpselq_u32): Remove.
19547 (vpselq_s32): Remove.
19548 (vpselq_u64): Remove.
19549 (vpselq_s64): Remove.
19550 (vpselq_f16): Remove.
19551 (vpselq_f32): Remove.
19552 (__arm_vpselq_u8): Remove.
19553 (__arm_vpselq_s8): Remove.
19554 (__arm_vpselq_u16): Remove.
19555 (__arm_vpselq_s16): Remove.
19556 (__arm_vpselq_u32): Remove.
19557 (__arm_vpselq_s32): Remove.
19558 (__arm_vpselq_u64): Remove.
19559 (__arm_vpselq_s64): Remove.
19560 (__arm_vpselq_f16): Remove.
19561 (__arm_vpselq_f32): Remove.
19562 (__arm_vpselq): Remove.
19564 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19566 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
19567 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
19569 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19571 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
19573 * config/arm/iterators.md (MVE_VPSELQ_F): New.
19574 (mve_insn): Add vpsel.
19575 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
19576 (@mve_<mve_insn>q_<supf><mode>): ... this.
19577 (@mve_vpselq_f<mode>): Rename into ...
19578 (@mve_<mve_insn>q_f<mode>): ... this.
19580 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19582 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
19583 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
19584 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
19585 * config/arm/arm-mve-builtins.cc
19586 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
19588 * config/arm/arm_mve.h (vfmaq): Remove.
19592 (vfmasq_m): Remove.
19594 (vfmaq_f16): Remove.
19595 (vfmaq_n_f16): Remove.
19596 (vfmasq_n_f16): Remove.
19597 (vfmsq_f16): Remove.
19598 (vfmaq_f32): Remove.
19599 (vfmaq_n_f32): Remove.
19600 (vfmasq_n_f32): Remove.
19601 (vfmsq_f32): Remove.
19602 (vfmaq_m_f32): Remove.
19603 (vfmaq_m_f16): Remove.
19604 (vfmaq_m_n_f32): Remove.
19605 (vfmaq_m_n_f16): Remove.
19606 (vfmasq_m_n_f32): Remove.
19607 (vfmasq_m_n_f16): Remove.
19608 (vfmsq_m_f32): Remove.
19609 (vfmsq_m_f16): Remove.
19610 (__arm_vfmaq_f16): Remove.
19611 (__arm_vfmaq_n_f16): Remove.
19612 (__arm_vfmasq_n_f16): Remove.
19613 (__arm_vfmsq_f16): Remove.
19614 (__arm_vfmaq_f32): Remove.
19615 (__arm_vfmaq_n_f32): Remove.
19616 (__arm_vfmasq_n_f32): Remove.
19617 (__arm_vfmsq_f32): Remove.
19618 (__arm_vfmaq_m_f32): Remove.
19619 (__arm_vfmaq_m_f16): Remove.
19620 (__arm_vfmaq_m_n_f32): Remove.
19621 (__arm_vfmaq_m_n_f16): Remove.
19622 (__arm_vfmasq_m_n_f32): Remove.
19623 (__arm_vfmasq_m_n_f16): Remove.
19624 (__arm_vfmsq_m_f32): Remove.
19625 (__arm_vfmsq_m_f16): Remove.
19626 (__arm_vfmaq): Remove.
19627 (__arm_vfmasq): Remove.
19628 (__arm_vfmsq): Remove.
19629 (__arm_vfmaq_m): Remove.
19630 (__arm_vfmasq_m): Remove.
19631 (__arm_vfmsq_m): Remove.
19633 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19635 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
19637 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
19638 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
19639 (mve_insn): Add vfma, vfmas, vfms.
19640 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
19642 (@mve_<mve_insn>q_f<mode>): ... this.
19643 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
19644 (@mve_<mve_insn>q_n_f<mode>): ... this.
19645 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
19646 @mve_<mve_insn>q_m_f<mode>.
19647 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
19648 @mve_<mve_insn>q_m_n_f<mode>.
19650 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19652 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
19653 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
19655 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19657 * config/arm/arm-mve-builtins-base.cc
19658 (FUNCTION_WITH_RTX_M_N_NO_F): New.
19660 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
19661 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
19662 * config/arm/arm_mve.h (vmvnq): Remove.
19665 (vmvnq_s8): Remove.
19666 (vmvnq_s16): Remove.
19667 (vmvnq_s32): Remove.
19668 (vmvnq_n_s16): Remove.
19669 (vmvnq_n_s32): Remove.
19670 (vmvnq_u8): Remove.
19671 (vmvnq_u16): Remove.
19672 (vmvnq_u32): Remove.
19673 (vmvnq_n_u16): Remove.
19674 (vmvnq_n_u32): Remove.
19675 (vmvnq_m_u8): Remove.
19676 (vmvnq_m_s8): Remove.
19677 (vmvnq_m_u16): Remove.
19678 (vmvnq_m_s16): Remove.
19679 (vmvnq_m_u32): Remove.
19680 (vmvnq_m_s32): Remove.
19681 (vmvnq_m_n_s16): Remove.
19682 (vmvnq_m_n_u16): Remove.
19683 (vmvnq_m_n_s32): Remove.
19684 (vmvnq_m_n_u32): Remove.
19685 (vmvnq_x_s8): Remove.
19686 (vmvnq_x_s16): Remove.
19687 (vmvnq_x_s32): Remove.
19688 (vmvnq_x_u8): Remove.
19689 (vmvnq_x_u16): Remove.
19690 (vmvnq_x_u32): Remove.
19691 (vmvnq_x_n_s16): Remove.
19692 (vmvnq_x_n_s32): Remove.
19693 (vmvnq_x_n_u16): Remove.
19694 (vmvnq_x_n_u32): Remove.
19695 (__arm_vmvnq_s8): Remove.
19696 (__arm_vmvnq_s16): Remove.
19697 (__arm_vmvnq_s32): Remove.
19698 (__arm_vmvnq_n_s16): Remove.
19699 (__arm_vmvnq_n_s32): Remove.
19700 (__arm_vmvnq_u8): Remove.
19701 (__arm_vmvnq_u16): Remove.
19702 (__arm_vmvnq_u32): Remove.
19703 (__arm_vmvnq_n_u16): Remove.
19704 (__arm_vmvnq_n_u32): Remove.
19705 (__arm_vmvnq_m_u8): Remove.
19706 (__arm_vmvnq_m_s8): Remove.
19707 (__arm_vmvnq_m_u16): Remove.
19708 (__arm_vmvnq_m_s16): Remove.
19709 (__arm_vmvnq_m_u32): Remove.
19710 (__arm_vmvnq_m_s32): Remove.
19711 (__arm_vmvnq_m_n_s16): Remove.
19712 (__arm_vmvnq_m_n_u16): Remove.
19713 (__arm_vmvnq_m_n_s32): Remove.
19714 (__arm_vmvnq_m_n_u32): Remove.
19715 (__arm_vmvnq_x_s8): Remove.
19716 (__arm_vmvnq_x_s16): Remove.
19717 (__arm_vmvnq_x_s32): Remove.
19718 (__arm_vmvnq_x_u8): Remove.
19719 (__arm_vmvnq_x_u16): Remove.
19720 (__arm_vmvnq_x_u32): Remove.
19721 (__arm_vmvnq_x_n_s16): Remove.
19722 (__arm_vmvnq_x_n_s32): Remove.
19723 (__arm_vmvnq_x_n_u16): Remove.
19724 (__arm_vmvnq_x_n_u32): Remove.
19725 (__arm_vmvnq): Remove.
19726 (__arm_vmvnq_m): Remove.
19727 (__arm_vmvnq_x): Remove.
19729 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19731 * config/arm/iterators.md (mve_insn): Add vmvn.
19732 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
19733 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19734 (mve_vmvnq_m_<supf><mode>): Rename into ...
19735 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
19736 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
19737 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19739 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19741 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
19742 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
19744 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19746 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
19747 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
19748 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
19749 * config/arm/arm_mve.h (vbrsrq): Remove.
19750 (vbrsrq_m): Remove.
19751 (vbrsrq_x): Remove.
19752 (vbrsrq_n_f16): Remove.
19753 (vbrsrq_n_f32): Remove.
19754 (vbrsrq_n_u8): Remove.
19755 (vbrsrq_n_s8): Remove.
19756 (vbrsrq_n_u16): Remove.
19757 (vbrsrq_n_s16): Remove.
19758 (vbrsrq_n_u32): Remove.
19759 (vbrsrq_n_s32): Remove.
19760 (vbrsrq_m_n_s8): Remove.
19761 (vbrsrq_m_n_s32): Remove.
19762 (vbrsrq_m_n_s16): Remove.
19763 (vbrsrq_m_n_u8): Remove.
19764 (vbrsrq_m_n_u32): Remove.
19765 (vbrsrq_m_n_u16): Remove.
19766 (vbrsrq_m_n_f32): Remove.
19767 (vbrsrq_m_n_f16): Remove.
19768 (vbrsrq_x_n_s8): Remove.
19769 (vbrsrq_x_n_s16): Remove.
19770 (vbrsrq_x_n_s32): Remove.
19771 (vbrsrq_x_n_u8): Remove.
19772 (vbrsrq_x_n_u16): Remove.
19773 (vbrsrq_x_n_u32): Remove.
19774 (vbrsrq_x_n_f16): Remove.
19775 (vbrsrq_x_n_f32): Remove.
19776 (__arm_vbrsrq_n_u8): Remove.
19777 (__arm_vbrsrq_n_s8): Remove.
19778 (__arm_vbrsrq_n_u16): Remove.
19779 (__arm_vbrsrq_n_s16): Remove.
19780 (__arm_vbrsrq_n_u32): Remove.
19781 (__arm_vbrsrq_n_s32): Remove.
19782 (__arm_vbrsrq_m_n_s8): Remove.
19783 (__arm_vbrsrq_m_n_s32): Remove.
19784 (__arm_vbrsrq_m_n_s16): Remove.
19785 (__arm_vbrsrq_m_n_u8): Remove.
19786 (__arm_vbrsrq_m_n_u32): Remove.
19787 (__arm_vbrsrq_m_n_u16): Remove.
19788 (__arm_vbrsrq_x_n_s8): Remove.
19789 (__arm_vbrsrq_x_n_s16): Remove.
19790 (__arm_vbrsrq_x_n_s32): Remove.
19791 (__arm_vbrsrq_x_n_u8): Remove.
19792 (__arm_vbrsrq_x_n_u16): Remove.
19793 (__arm_vbrsrq_x_n_u32): Remove.
19794 (__arm_vbrsrq_n_f16): Remove.
19795 (__arm_vbrsrq_n_f32): Remove.
19796 (__arm_vbrsrq_m_n_f32): Remove.
19797 (__arm_vbrsrq_m_n_f16): Remove.
19798 (__arm_vbrsrq_x_n_f16): Remove.
19799 (__arm_vbrsrq_x_n_f32): Remove.
19800 (__arm_vbrsrq): Remove.
19801 (__arm_vbrsrq_m): Remove.
19802 (__arm_vbrsrq_x): Remove.
19804 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19806 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
19807 (mve_insn): Add vbrsr.
19808 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
19809 (@mve_<mve_insn>q_n_f<mode>): ... this.
19810 (mve_vbrsrq_n_<supf><mode>): Rename into ...
19811 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19812 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
19813 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19814 (mve_vbrsrq_m_n_f<mode>): Rename into ...
19815 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
19817 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19819 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
19820 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
19822 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19824 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
19825 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
19826 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
19827 * config/arm/arm_mve.h (vqshluq): Remove.
19828 (vqshluq_m): Remove.
19829 (vqshluq_n_s8): Remove.
19830 (vqshluq_n_s16): Remove.
19831 (vqshluq_n_s32): Remove.
19832 (vqshluq_m_n_s8): Remove.
19833 (vqshluq_m_n_s16): Remove.
19834 (vqshluq_m_n_s32): Remove.
19835 (__arm_vqshluq_n_s8): Remove.
19836 (__arm_vqshluq_n_s16): Remove.
19837 (__arm_vqshluq_n_s32): Remove.
19838 (__arm_vqshluq_m_n_s8): Remove.
19839 (__arm_vqshluq_m_n_s16): Remove.
19840 (__arm_vqshluq_m_n_s32): Remove.
19841 (__arm_vqshluq): Remove.
19842 (__arm_vqshluq_m): Remove.
19844 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19846 * config/arm/iterators.md (mve_insn): Add vqshlu.
19847 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
19848 (VQSHLUQ_M_N, VQSHLUQ_N): New.
19849 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
19850 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19851 (mve_vqshluq_m_n_s<mode>): Change name into ...
19852 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19854 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19856 * config/arm/arm-mve-builtins-shapes.cc
19857 (binary_lshift_unsigned): New.
19858 * config/arm/arm-mve-builtins-shapes.h
19859 (binary_lshift_unsigned): New.
19861 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19863 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
19864 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
19865 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
19866 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
19867 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
19868 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
19869 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
19870 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
19871 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
19872 (vrmlaldavhaxq): Remove.
19873 (vrmlsldavhaq): Remove.
19874 (vrmlsldavhaxq): Remove.
19875 (vrmlaldavhaq_p): Remove.
19876 (vrmlaldavhaxq_p): Remove.
19877 (vrmlsldavhaq_p): Remove.
19878 (vrmlsldavhaxq_p): Remove.
19879 (vrmlaldavhaq_s32): Remove.
19880 (vrmlaldavhaq_u32): Remove.
19881 (vrmlaldavhaxq_s32): Remove.
19882 (vrmlsldavhaq_s32): Remove.
19883 (vrmlsldavhaxq_s32): Remove.
19884 (vrmlaldavhaq_p_s32): Remove.
19885 (vrmlaldavhaq_p_u32): Remove.
19886 (vrmlaldavhaxq_p_s32): Remove.
19887 (vrmlsldavhaq_p_s32): Remove.
19888 (vrmlsldavhaxq_p_s32): Remove.
19889 (__arm_vrmlaldavhaq_s32): Remove.
19890 (__arm_vrmlaldavhaq_u32): Remove.
19891 (__arm_vrmlaldavhaxq_s32): Remove.
19892 (__arm_vrmlsldavhaq_s32): Remove.
19893 (__arm_vrmlsldavhaxq_s32): Remove.
19894 (__arm_vrmlaldavhaq_p_s32): Remove.
19895 (__arm_vrmlaldavhaq_p_u32): Remove.
19896 (__arm_vrmlaldavhaxq_p_s32): Remove.
19897 (__arm_vrmlsldavhaq_p_s32): Remove.
19898 (__arm_vrmlsldavhaxq_p_s32): Remove.
19899 (__arm_vrmlaldavhaq): Remove.
19900 (__arm_vrmlaldavhaxq): Remove.
19901 (__arm_vrmlsldavhaq): Remove.
19902 (__arm_vrmlsldavhaxq): Remove.
19903 (__arm_vrmlaldavhaq_p): Remove.
19904 (__arm_vrmlaldavhaxq_p): Remove.
19905 (__arm_vrmlsldavhaq_p): Remove.
19906 (__arm_vrmlsldavhaxq_p): Remove.
19908 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19910 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
19911 (MVE_VRMLxLDAVHAxQ_P): New.
19912 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
19914 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
19915 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
19917 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
19918 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
19919 (mve_vrmlsldavhaq_sv4si): Merge into ...
19920 (@mve_<mve_insn>q_<supf>v4si): ... this.
19921 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
19922 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
19923 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
19924 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
19926 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19928 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
19929 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
19931 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
19932 * config/arm/arm_mve.h (vqdmulltq): Remove.
19933 (vqdmullbq): Remove.
19934 (vqdmullbq_m): Remove.
19935 (vqdmulltq_m): Remove.
19936 (vqdmulltq_s16): Remove.
19937 (vqdmulltq_n_s16): Remove.
19938 (vqdmullbq_s16): Remove.
19939 (vqdmullbq_n_s16): Remove.
19940 (vqdmulltq_s32): Remove.
19941 (vqdmulltq_n_s32): Remove.
19942 (vqdmullbq_s32): Remove.
19943 (vqdmullbq_n_s32): Remove.
19944 (vqdmullbq_m_n_s32): Remove.
19945 (vqdmullbq_m_n_s16): Remove.
19946 (vqdmullbq_m_s32): Remove.
19947 (vqdmullbq_m_s16): Remove.
19948 (vqdmulltq_m_n_s32): Remove.
19949 (vqdmulltq_m_n_s16): Remove.
19950 (vqdmulltq_m_s32): Remove.
19951 (vqdmulltq_m_s16): Remove.
19952 (__arm_vqdmulltq_s16): Remove.
19953 (__arm_vqdmulltq_n_s16): Remove.
19954 (__arm_vqdmullbq_s16): Remove.
19955 (__arm_vqdmullbq_n_s16): Remove.
19956 (__arm_vqdmulltq_s32): Remove.
19957 (__arm_vqdmulltq_n_s32): Remove.
19958 (__arm_vqdmullbq_s32): Remove.
19959 (__arm_vqdmullbq_n_s32): Remove.
19960 (__arm_vqdmullbq_m_n_s32): Remove.
19961 (__arm_vqdmullbq_m_n_s16): Remove.
19962 (__arm_vqdmullbq_m_s32): Remove.
19963 (__arm_vqdmullbq_m_s16): Remove.
19964 (__arm_vqdmulltq_m_n_s32): Remove.
19965 (__arm_vqdmulltq_m_n_s16): Remove.
19966 (__arm_vqdmulltq_m_s32): Remove.
19967 (__arm_vqdmulltq_m_s16): Remove.
19968 (__arm_vqdmulltq): Remove.
19969 (__arm_vqdmullbq): Remove.
19970 (__arm_vqdmullbq_m): Remove.
19971 (__arm_vqdmulltq_m): Remove.
19973 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19975 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
19976 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
19977 (mve_insn): Add vqdmullb, vqdmullt.
19978 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
19979 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
19981 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
19982 (mve_vqdmulltq_n_s<mode>): Merge into ...
19983 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
19984 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
19985 (@mve_<mve_insn>q_<supf><mode>): ... this.
19986 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
19988 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
19989 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
19990 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
19992 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
19994 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
19995 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
19997 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
19999 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
20000 Drop unused parameter.
20001 (riscv_select_multilib): Ditto.
20002 (riscv_compute_multilib): Update call site of
20003 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
20005 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
20007 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
20008 * config/riscv/riscv-protos.h (expand_vec_init): New function.
20009 * config/riscv/riscv-v.cc (class rvv_builder): New class.
20010 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
20011 (rvv_builder::get_merged_repeating_sequence): Ditto.
20012 (expand_vector_init_insert_elems): Ditto.
20013 (expand_vec_init): Ditto.
20014 * config/riscv/vector-iterators.md: New attribute.
20016 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
20018 * config/rs6000/rs6000-builtins.def
20019 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
20021 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
20022 xsiexpdpf to xsiexpdpf_di.
20023 * config/rs6000/vsx.md (xsiexpdp): Rename to...
20024 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
20025 replace TARGET_64BIT with TARGET_POWERPC64.
20026 (xsiexpdpf): Rename to...
20027 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
20028 replace TARGET_64BIT with TARGET_POWERPC64.
20030 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
20032 * config/rs6000/rs6000-builtins.def
20033 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
20035 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
20038 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
20040 * config/rs6000/rs6000-builtins.def
20041 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
20042 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
20044 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
20045 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
20046 TARGET_64BIT check.
20047 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
20048 requirement when it has a 64-bit argument.
20050 2023-05-12 Pan Li <pan2.li@intel.com>
20051 Richard Sandiford <richard.sandiford@arm.com>
20052 Richard Biener <rguenther@suse.de>
20053 Jakub Jelinek <jakub@redhat.com>
20055 * mux-utils.h: Add overload operator == and != for pointer_mux.
20056 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
20057 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
20058 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
20059 (dv_as_decl): Ditto.
20060 (dv_as_opaque): Removed due to unnecessary.
20061 (struct variable_hasher): Take decl_or_value as compare_type.
20062 (variable_hasher::equal): Diito.
20063 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
20064 (dv_from_value): Ditto.
20065 (attrs_list_member): Ditto.
20066 (vars_copy): Ditto.
20067 (var_reg_decl_set): Ditto.
20068 (var_reg_delete_and_set): Ditto.
20069 (find_loc_in_1pdv): Ditto.
20070 (canonicalize_values_star): Ditto.
20071 (variable_post_merge_new_vals): Ditto.
20072 (dump_onepart_variable_differences): Ditto.
20073 (variable_different_p): Ditto.
20074 (set_slot_part): Ditto.
20075 (clobber_slot_part): Ditto.
20076 (clobber_variable_part): Ditto.
20078 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
20080 * match.pd: simplify vector shift + bit_and + multiply.
20082 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20084 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
20085 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
20086 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
20087 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
20088 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
20089 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
20090 * config/arm/arm-mve-builtins.cc
20091 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
20092 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
20093 * config/arm/arm_mve.h (vqrdmlashq): Remove.
20094 (vqrdmlahq): Remove.
20095 (vqdmlashq): Remove.
20096 (vqdmlahq): Remove.
20100 (vmlasq_m): Remove.
20101 (vqdmlashq_m): Remove.
20102 (vqdmlahq_m): Remove.
20103 (vqrdmlahq_m): Remove.
20104 (vqrdmlashq_m): Remove.
20105 (vmlasq_n_u8): Remove.
20106 (vmlaq_n_u8): Remove.
20107 (vqrdmlashq_n_s8): Remove.
20108 (vqrdmlahq_n_s8): Remove.
20109 (vqdmlahq_n_s8): Remove.
20110 (vqdmlashq_n_s8): Remove.
20111 (vmlasq_n_s8): Remove.
20112 (vmlaq_n_s8): Remove.
20113 (vmlasq_n_u16): Remove.
20114 (vmlaq_n_u16): Remove.
20115 (vqrdmlashq_n_s16): Remove.
20116 (vqrdmlahq_n_s16): Remove.
20117 (vqdmlashq_n_s16): Remove.
20118 (vqdmlahq_n_s16): Remove.
20119 (vmlasq_n_s16): Remove.
20120 (vmlaq_n_s16): Remove.
20121 (vmlasq_n_u32): Remove.
20122 (vmlaq_n_u32): Remove.
20123 (vqrdmlashq_n_s32): Remove.
20124 (vqrdmlahq_n_s32): Remove.
20125 (vqdmlashq_n_s32): Remove.
20126 (vqdmlahq_n_s32): Remove.
20127 (vmlasq_n_s32): Remove.
20128 (vmlaq_n_s32): Remove.
20129 (vmlaq_m_n_s8): Remove.
20130 (vmlaq_m_n_s32): Remove.
20131 (vmlaq_m_n_s16): Remove.
20132 (vmlaq_m_n_u8): Remove.
20133 (vmlaq_m_n_u32): Remove.
20134 (vmlaq_m_n_u16): Remove.
20135 (vmlasq_m_n_s8): Remove.
20136 (vmlasq_m_n_s32): Remove.
20137 (vmlasq_m_n_s16): Remove.
20138 (vmlasq_m_n_u8): Remove.
20139 (vmlasq_m_n_u32): Remove.
20140 (vmlasq_m_n_u16): Remove.
20141 (vqdmlashq_m_n_s8): Remove.
20142 (vqdmlashq_m_n_s32): Remove.
20143 (vqdmlashq_m_n_s16): Remove.
20144 (vqdmlahq_m_n_s8): Remove.
20145 (vqdmlahq_m_n_s32): Remove.
20146 (vqdmlahq_m_n_s16): Remove.
20147 (vqrdmlahq_m_n_s8): Remove.
20148 (vqrdmlahq_m_n_s32): Remove.
20149 (vqrdmlahq_m_n_s16): Remove.
20150 (vqrdmlashq_m_n_s8): Remove.
20151 (vqrdmlashq_m_n_s32): Remove.
20152 (vqrdmlashq_m_n_s16): Remove.
20153 (__arm_vmlasq_n_u8): Remove.
20154 (__arm_vmlaq_n_u8): Remove.
20155 (__arm_vqrdmlashq_n_s8): Remove.
20156 (__arm_vqdmlashq_n_s8): Remove.
20157 (__arm_vqrdmlahq_n_s8): Remove.
20158 (__arm_vqdmlahq_n_s8): Remove.
20159 (__arm_vmlasq_n_s8): Remove.
20160 (__arm_vmlaq_n_s8): Remove.
20161 (__arm_vmlasq_n_u16): Remove.
20162 (__arm_vmlaq_n_u16): Remove.
20163 (__arm_vqrdmlashq_n_s16): Remove.
20164 (__arm_vqdmlashq_n_s16): Remove.
20165 (__arm_vqrdmlahq_n_s16): Remove.
20166 (__arm_vqdmlahq_n_s16): Remove.
20167 (__arm_vmlasq_n_s16): Remove.
20168 (__arm_vmlaq_n_s16): Remove.
20169 (__arm_vmlasq_n_u32): Remove.
20170 (__arm_vmlaq_n_u32): Remove.
20171 (__arm_vqrdmlashq_n_s32): Remove.
20172 (__arm_vqdmlashq_n_s32): Remove.
20173 (__arm_vqrdmlahq_n_s32): Remove.
20174 (__arm_vqdmlahq_n_s32): Remove.
20175 (__arm_vmlasq_n_s32): Remove.
20176 (__arm_vmlaq_n_s32): Remove.
20177 (__arm_vmlaq_m_n_s8): Remove.
20178 (__arm_vmlaq_m_n_s32): Remove.
20179 (__arm_vmlaq_m_n_s16): Remove.
20180 (__arm_vmlaq_m_n_u8): Remove.
20181 (__arm_vmlaq_m_n_u32): Remove.
20182 (__arm_vmlaq_m_n_u16): Remove.
20183 (__arm_vmlasq_m_n_s8): Remove.
20184 (__arm_vmlasq_m_n_s32): Remove.
20185 (__arm_vmlasq_m_n_s16): Remove.
20186 (__arm_vmlasq_m_n_u8): Remove.
20187 (__arm_vmlasq_m_n_u32): Remove.
20188 (__arm_vmlasq_m_n_u16): Remove.
20189 (__arm_vqdmlahq_m_n_s8): Remove.
20190 (__arm_vqdmlahq_m_n_s32): Remove.
20191 (__arm_vqdmlahq_m_n_s16): Remove.
20192 (__arm_vqrdmlahq_m_n_s8): Remove.
20193 (__arm_vqrdmlahq_m_n_s32): Remove.
20194 (__arm_vqrdmlahq_m_n_s16): Remove.
20195 (__arm_vqrdmlashq_m_n_s8): Remove.
20196 (__arm_vqrdmlashq_m_n_s32): Remove.
20197 (__arm_vqrdmlashq_m_n_s16): Remove.
20198 (__arm_vqdmlashq_m_n_s8): Remove.
20199 (__arm_vqdmlashq_m_n_s16): Remove.
20200 (__arm_vqdmlashq_m_n_s32): Remove.
20201 (__arm_vmlasq): Remove.
20202 (__arm_vmlaq): Remove.
20203 (__arm_vqrdmlashq): Remove.
20204 (__arm_vqdmlashq): Remove.
20205 (__arm_vqrdmlahq): Remove.
20206 (__arm_vqdmlahq): Remove.
20207 (__arm_vmlaq_m): Remove.
20208 (__arm_vmlasq_m): Remove.
20209 (__arm_vqdmlahq_m): Remove.
20210 (__arm_vqrdmlahq_m): Remove.
20211 (__arm_vqrdmlashq_m): Remove.
20212 (__arm_vqdmlashq_m): Remove.
20214 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20216 * config/arm/iterators.md (MVE_VMLxQ_N): New.
20217 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
20219 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
20221 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
20222 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
20223 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
20224 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
20225 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
20227 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20229 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
20230 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
20232 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20234 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
20235 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
20236 (vqrdmlsdhxq): New.
20237 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
20238 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
20239 (vqrdmlsdhxq): New.
20240 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
20241 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
20242 (vqrdmlsdhxq): New.
20243 * config/arm/arm-mve-builtins.cc
20244 (function_instance::has_inactive_argument): Handle vqrdmladhq,
20245 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
20246 vqdmlsdhq, vqdmlsdhxq.
20247 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
20248 (vqrdmlsdhq): Remove.
20249 (vqrdmladhxq): Remove.
20250 (vqrdmladhq): Remove.
20251 (vqdmlsdhxq): Remove.
20252 (vqdmlsdhq): Remove.
20253 (vqdmladhxq): Remove.
20254 (vqdmladhq): Remove.
20255 (vqdmladhq_m): Remove.
20256 (vqdmladhxq_m): Remove.
20257 (vqdmlsdhq_m): Remove.
20258 (vqdmlsdhxq_m): Remove.
20259 (vqrdmladhq_m): Remove.
20260 (vqrdmladhxq_m): Remove.
20261 (vqrdmlsdhq_m): Remove.
20262 (vqrdmlsdhxq_m): Remove.
20263 (vqrdmlsdhxq_s8): Remove.
20264 (vqrdmlsdhq_s8): Remove.
20265 (vqrdmladhxq_s8): Remove.
20266 (vqrdmladhq_s8): Remove.
20267 (vqdmlsdhxq_s8): Remove.
20268 (vqdmlsdhq_s8): Remove.
20269 (vqdmladhxq_s8): Remove.
20270 (vqdmladhq_s8): Remove.
20271 (vqrdmlsdhxq_s16): Remove.
20272 (vqrdmlsdhq_s16): Remove.
20273 (vqrdmladhxq_s16): Remove.
20274 (vqrdmladhq_s16): Remove.
20275 (vqdmlsdhxq_s16): Remove.
20276 (vqdmlsdhq_s16): Remove.
20277 (vqdmladhxq_s16): Remove.
20278 (vqdmladhq_s16): Remove.
20279 (vqrdmlsdhxq_s32): Remove.
20280 (vqrdmlsdhq_s32): Remove.
20281 (vqrdmladhxq_s32): Remove.
20282 (vqrdmladhq_s32): Remove.
20283 (vqdmlsdhxq_s32): Remove.
20284 (vqdmlsdhq_s32): Remove.
20285 (vqdmladhxq_s32): Remove.
20286 (vqdmladhq_s32): Remove.
20287 (vqdmladhq_m_s8): Remove.
20288 (vqdmladhq_m_s32): Remove.
20289 (vqdmladhq_m_s16): Remove.
20290 (vqdmladhxq_m_s8): Remove.
20291 (vqdmladhxq_m_s32): Remove.
20292 (vqdmladhxq_m_s16): Remove.
20293 (vqdmlsdhq_m_s8): Remove.
20294 (vqdmlsdhq_m_s32): Remove.
20295 (vqdmlsdhq_m_s16): Remove.
20296 (vqdmlsdhxq_m_s8): Remove.
20297 (vqdmlsdhxq_m_s32): Remove.
20298 (vqdmlsdhxq_m_s16): Remove.
20299 (vqrdmladhq_m_s8): Remove.
20300 (vqrdmladhq_m_s32): Remove.
20301 (vqrdmladhq_m_s16): Remove.
20302 (vqrdmladhxq_m_s8): Remove.
20303 (vqrdmladhxq_m_s32): Remove.
20304 (vqrdmladhxq_m_s16): Remove.
20305 (vqrdmlsdhq_m_s8): Remove.
20306 (vqrdmlsdhq_m_s32): Remove.
20307 (vqrdmlsdhq_m_s16): Remove.
20308 (vqrdmlsdhxq_m_s8): Remove.
20309 (vqrdmlsdhxq_m_s32): Remove.
20310 (vqrdmlsdhxq_m_s16): Remove.
20311 (__arm_vqrdmlsdhxq_s8): Remove.
20312 (__arm_vqrdmlsdhq_s8): Remove.
20313 (__arm_vqrdmladhxq_s8): Remove.
20314 (__arm_vqrdmladhq_s8): Remove.
20315 (__arm_vqdmlsdhxq_s8): Remove.
20316 (__arm_vqdmlsdhq_s8): Remove.
20317 (__arm_vqdmladhxq_s8): Remove.
20318 (__arm_vqdmladhq_s8): Remove.
20319 (__arm_vqrdmlsdhxq_s16): Remove.
20320 (__arm_vqrdmlsdhq_s16): Remove.
20321 (__arm_vqrdmladhxq_s16): Remove.
20322 (__arm_vqrdmladhq_s16): Remove.
20323 (__arm_vqdmlsdhxq_s16): Remove.
20324 (__arm_vqdmlsdhq_s16): Remove.
20325 (__arm_vqdmladhxq_s16): Remove.
20326 (__arm_vqdmladhq_s16): Remove.
20327 (__arm_vqrdmlsdhxq_s32): Remove.
20328 (__arm_vqrdmlsdhq_s32): Remove.
20329 (__arm_vqrdmladhxq_s32): Remove.
20330 (__arm_vqrdmladhq_s32): Remove.
20331 (__arm_vqdmlsdhxq_s32): Remove.
20332 (__arm_vqdmlsdhq_s32): Remove.
20333 (__arm_vqdmladhxq_s32): Remove.
20334 (__arm_vqdmladhq_s32): Remove.
20335 (__arm_vqdmladhq_m_s8): Remove.
20336 (__arm_vqdmladhq_m_s32): Remove.
20337 (__arm_vqdmladhq_m_s16): Remove.
20338 (__arm_vqdmladhxq_m_s8): Remove.
20339 (__arm_vqdmladhxq_m_s32): Remove.
20340 (__arm_vqdmladhxq_m_s16): Remove.
20341 (__arm_vqdmlsdhq_m_s8): Remove.
20342 (__arm_vqdmlsdhq_m_s32): Remove.
20343 (__arm_vqdmlsdhq_m_s16): Remove.
20344 (__arm_vqdmlsdhxq_m_s8): Remove.
20345 (__arm_vqdmlsdhxq_m_s32): Remove.
20346 (__arm_vqdmlsdhxq_m_s16): Remove.
20347 (__arm_vqrdmladhq_m_s8): Remove.
20348 (__arm_vqrdmladhq_m_s32): Remove.
20349 (__arm_vqrdmladhq_m_s16): Remove.
20350 (__arm_vqrdmladhxq_m_s8): Remove.
20351 (__arm_vqrdmladhxq_m_s32): Remove.
20352 (__arm_vqrdmladhxq_m_s16): Remove.
20353 (__arm_vqrdmlsdhq_m_s8): Remove.
20354 (__arm_vqrdmlsdhq_m_s32): Remove.
20355 (__arm_vqrdmlsdhq_m_s16): Remove.
20356 (__arm_vqrdmlsdhxq_m_s8): Remove.
20357 (__arm_vqrdmlsdhxq_m_s32): Remove.
20358 (__arm_vqrdmlsdhxq_m_s16): Remove.
20359 (__arm_vqrdmlsdhxq): Remove.
20360 (__arm_vqrdmlsdhq): Remove.
20361 (__arm_vqrdmladhxq): Remove.
20362 (__arm_vqrdmladhq): Remove.
20363 (__arm_vqdmlsdhxq): Remove.
20364 (__arm_vqdmlsdhq): Remove.
20365 (__arm_vqdmladhxq): Remove.
20366 (__arm_vqdmladhq): Remove.
20367 (__arm_vqdmladhq_m): Remove.
20368 (__arm_vqdmladhxq_m): Remove.
20369 (__arm_vqdmlsdhq_m): Remove.
20370 (__arm_vqdmlsdhxq_m): Remove.
20371 (__arm_vqrdmladhq_m): Remove.
20372 (__arm_vqrdmladhxq_m): Remove.
20373 (__arm_vqrdmlsdhq_m): Remove.
20374 (__arm_vqrdmlsdhxq_m): Remove.
20376 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20378 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
20379 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
20380 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
20381 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
20382 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
20383 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
20384 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
20385 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
20386 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
20387 (mve_vqdmladhq_s<mode>): Merge into ...
20388 (@mve_<mve_insn>q_<supf><mode>): ... this.
20390 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20392 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
20393 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
20395 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20397 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
20398 (vmlsldavaq, vmlsldavaxq): New.
20399 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
20400 (vmlsldavaq, vmlsldavaxq): New.
20401 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
20402 (vmlsldavaq, vmlsldavaxq): New.
20403 * config/arm/arm_mve.h (vmlaldavaq): Remove.
20404 (vmlaldavaxq): Remove.
20405 (vmlsldavaq): Remove.
20406 (vmlsldavaxq): Remove.
20407 (vmlaldavaq_p): Remove.
20408 (vmlaldavaxq_p): Remove.
20409 (vmlsldavaq_p): Remove.
20410 (vmlsldavaxq_p): Remove.
20411 (vmlaldavaq_s16): Remove.
20412 (vmlaldavaxq_s16): Remove.
20413 (vmlsldavaq_s16): Remove.
20414 (vmlsldavaxq_s16): Remove.
20415 (vmlaldavaq_u16): Remove.
20416 (vmlaldavaq_s32): Remove.
20417 (vmlaldavaxq_s32): Remove.
20418 (vmlsldavaq_s32): Remove.
20419 (vmlsldavaxq_s32): Remove.
20420 (vmlaldavaq_u32): Remove.
20421 (vmlaldavaq_p_s32): Remove.
20422 (vmlaldavaq_p_s16): Remove.
20423 (vmlaldavaq_p_u32): Remove.
20424 (vmlaldavaq_p_u16): Remove.
20425 (vmlaldavaxq_p_s32): Remove.
20426 (vmlaldavaxq_p_s16): Remove.
20427 (vmlsldavaq_p_s32): Remove.
20428 (vmlsldavaq_p_s16): Remove.
20429 (vmlsldavaxq_p_s32): Remove.
20430 (vmlsldavaxq_p_s16): Remove.
20431 (__arm_vmlaldavaq_s16): Remove.
20432 (__arm_vmlaldavaxq_s16): Remove.
20433 (__arm_vmlsldavaq_s16): Remove.
20434 (__arm_vmlsldavaxq_s16): Remove.
20435 (__arm_vmlaldavaq_u16): Remove.
20436 (__arm_vmlaldavaq_s32): Remove.
20437 (__arm_vmlaldavaxq_s32): Remove.
20438 (__arm_vmlsldavaq_s32): Remove.
20439 (__arm_vmlsldavaxq_s32): Remove.
20440 (__arm_vmlaldavaq_u32): Remove.
20441 (__arm_vmlaldavaq_p_s32): Remove.
20442 (__arm_vmlaldavaq_p_s16): Remove.
20443 (__arm_vmlaldavaq_p_u32): Remove.
20444 (__arm_vmlaldavaq_p_u16): Remove.
20445 (__arm_vmlaldavaxq_p_s32): Remove.
20446 (__arm_vmlaldavaxq_p_s16): Remove.
20447 (__arm_vmlsldavaq_p_s32): Remove.
20448 (__arm_vmlsldavaq_p_s16): Remove.
20449 (__arm_vmlsldavaxq_p_s32): Remove.
20450 (__arm_vmlsldavaxq_p_s16): Remove.
20451 (__arm_vmlaldavaq): Remove.
20452 (__arm_vmlaldavaxq): Remove.
20453 (__arm_vmlsldavaq): Remove.
20454 (__arm_vmlsldavaxq): Remove.
20455 (__arm_vmlaldavaq_p): Remove.
20456 (__arm_vmlaldavaxq_p): Remove.
20457 (__arm_vmlsldavaq_p): Remove.
20458 (__arm_vmlsldavaxq_p): Remove.
20460 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20462 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
20464 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
20465 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
20466 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
20467 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
20468 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
20469 (mve_vmlaldavaxq_s<mode>): Merge into ...
20470 (@mve_<mve_insn>q_<supf><mode>): ... this.
20471 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
20472 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
20474 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20476 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20478 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
20479 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
20481 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20483 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
20484 (vrmlsldavhq, vrmlsldavhxq): New.
20485 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
20486 (vrmlsldavhq, vrmlsldavhxq): New.
20487 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
20488 (vrmlsldavhq, vrmlsldavhxq): New.
20489 * config/arm/arm-mve-builtins-functions.h
20490 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
20491 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
20492 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
20493 (vrmlsldavhxq): Remove.
20494 (vrmlsldavhq): Remove.
20495 (vrmlaldavhxq): Remove.
20496 (vrmlaldavhq_p): Remove.
20497 (vrmlaldavhxq_p): Remove.
20498 (vrmlsldavhq_p): Remove.
20499 (vrmlsldavhxq_p): Remove.
20500 (vrmlaldavhq_u32): Remove.
20501 (vrmlsldavhxq_s32): Remove.
20502 (vrmlsldavhq_s32): Remove.
20503 (vrmlaldavhxq_s32): Remove.
20504 (vrmlaldavhq_s32): Remove.
20505 (vrmlaldavhq_p_s32): Remove.
20506 (vrmlaldavhxq_p_s32): Remove.
20507 (vrmlsldavhq_p_s32): Remove.
20508 (vrmlsldavhxq_p_s32): Remove.
20509 (vrmlaldavhq_p_u32): Remove.
20510 (__arm_vrmlaldavhq_u32): Remove.
20511 (__arm_vrmlsldavhxq_s32): Remove.
20512 (__arm_vrmlsldavhq_s32): Remove.
20513 (__arm_vrmlaldavhxq_s32): Remove.
20514 (__arm_vrmlaldavhq_s32): Remove.
20515 (__arm_vrmlaldavhq_p_s32): Remove.
20516 (__arm_vrmlaldavhxq_p_s32): Remove.
20517 (__arm_vrmlsldavhq_p_s32): Remove.
20518 (__arm_vrmlsldavhxq_p_s32): Remove.
20519 (__arm_vrmlaldavhq_p_u32): Remove.
20520 (__arm_vrmlaldavhq): Remove.
20521 (__arm_vrmlsldavhxq): Remove.
20522 (__arm_vrmlsldavhq): Remove.
20523 (__arm_vrmlaldavhxq): Remove.
20524 (__arm_vrmlaldavhq_p): Remove.
20525 (__arm_vrmlaldavhxq_p): Remove.
20526 (__arm_vrmlsldavhq_p): Remove.
20527 (__arm_vrmlsldavhxq_p): Remove.
20529 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20531 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
20533 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
20534 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
20535 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
20536 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
20537 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
20538 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
20539 (@mve_<mve_insn>q_<supf>v4si): ... this.
20540 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
20541 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
20543 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
20545 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20547 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
20548 (vmlsldavq, vmlsldavxq): New.
20549 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
20550 (vmlsldavq, vmlsldavxq): New.
20551 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
20552 (vmlsldavq, vmlsldavxq): New.
20553 * config/arm/arm_mve.h (vmlaldavq): Remove.
20554 (vmlsldavxq): Remove.
20555 (vmlsldavq): Remove.
20556 (vmlaldavxq): Remove.
20557 (vmlaldavq_p): Remove.
20558 (vmlaldavxq_p): Remove.
20559 (vmlsldavq_p): Remove.
20560 (vmlsldavxq_p): Remove.
20561 (vmlaldavq_u16): Remove.
20562 (vmlsldavxq_s16): Remove.
20563 (vmlsldavq_s16): Remove.
20564 (vmlaldavxq_s16): Remove.
20565 (vmlaldavq_s16): Remove.
20566 (vmlaldavq_u32): Remove.
20567 (vmlsldavxq_s32): Remove.
20568 (vmlsldavq_s32): Remove.
20569 (vmlaldavxq_s32): Remove.
20570 (vmlaldavq_s32): Remove.
20571 (vmlaldavq_p_s16): Remove.
20572 (vmlaldavxq_p_s16): Remove.
20573 (vmlsldavq_p_s16): Remove.
20574 (vmlsldavxq_p_s16): Remove.
20575 (vmlaldavq_p_u16): Remove.
20576 (vmlaldavq_p_s32): Remove.
20577 (vmlaldavxq_p_s32): Remove.
20578 (vmlsldavq_p_s32): Remove.
20579 (vmlsldavxq_p_s32): Remove.
20580 (vmlaldavq_p_u32): Remove.
20581 (__arm_vmlaldavq_u16): Remove.
20582 (__arm_vmlsldavxq_s16): Remove.
20583 (__arm_vmlsldavq_s16): Remove.
20584 (__arm_vmlaldavxq_s16): Remove.
20585 (__arm_vmlaldavq_s16): Remove.
20586 (__arm_vmlaldavq_u32): Remove.
20587 (__arm_vmlsldavxq_s32): Remove.
20588 (__arm_vmlsldavq_s32): Remove.
20589 (__arm_vmlaldavxq_s32): Remove.
20590 (__arm_vmlaldavq_s32): Remove.
20591 (__arm_vmlaldavq_p_s16): Remove.
20592 (__arm_vmlaldavxq_p_s16): Remove.
20593 (__arm_vmlsldavq_p_s16): Remove.
20594 (__arm_vmlsldavxq_p_s16): Remove.
20595 (__arm_vmlaldavq_p_u16): Remove.
20596 (__arm_vmlaldavq_p_s32): Remove.
20597 (__arm_vmlaldavxq_p_s32): Remove.
20598 (__arm_vmlsldavq_p_s32): Remove.
20599 (__arm_vmlsldavxq_p_s32): Remove.
20600 (__arm_vmlaldavq_p_u32): Remove.
20601 (__arm_vmlaldavq): Remove.
20602 (__arm_vmlsldavxq): Remove.
20603 (__arm_vmlsldavq): Remove.
20604 (__arm_vmlaldavxq): Remove.
20605 (__arm_vmlaldavq_p): Remove.
20606 (__arm_vmlaldavxq_p): Remove.
20607 (__arm_vmlsldavq_p): Remove.
20608 (__arm_vmlsldavxq_p): Remove.
20610 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20612 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
20613 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
20614 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
20615 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
20616 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
20617 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
20618 (mve_vmlsldavxq_s<mode>): Merge into ...
20619 (@mve_<mve_insn>q_<supf><mode>): ... this.
20620 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
20621 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
20623 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20625 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20627 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
20628 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
20630 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20632 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
20633 * config/arm/arm-mve-builtins-base.def (vabavq): New.
20634 * config/arm/arm-mve-builtins-base.h (vabavq): New.
20635 * config/arm/arm_mve.h (vabavq): Remove.
20636 (vabavq_p): Remove.
20637 (vabavq_s8): Remove.
20638 (vabavq_s16): Remove.
20639 (vabavq_s32): Remove.
20640 (vabavq_u8): Remove.
20641 (vabavq_u16): Remove.
20642 (vabavq_u32): Remove.
20643 (vabavq_p_s8): Remove.
20644 (vabavq_p_u8): Remove.
20645 (vabavq_p_s16): Remove.
20646 (vabavq_p_u16): Remove.
20647 (vabavq_p_s32): Remove.
20648 (vabavq_p_u32): Remove.
20649 (__arm_vabavq_s8): Remove.
20650 (__arm_vabavq_s16): Remove.
20651 (__arm_vabavq_s32): Remove.
20652 (__arm_vabavq_u8): Remove.
20653 (__arm_vabavq_u16): Remove.
20654 (__arm_vabavq_u32): Remove.
20655 (__arm_vabavq_p_s8): Remove.
20656 (__arm_vabavq_p_u8): Remove.
20657 (__arm_vabavq_p_s16): Remove.
20658 (__arm_vabavq_p_u16): Remove.
20659 (__arm_vabavq_p_s32): Remove.
20660 (__arm_vabavq_p_u32): Remove.
20661 (__arm_vabavq): Remove.
20662 (__arm_vabavq_p): Remove.
20664 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20666 * config/arm/iterators.md (mve_insn): Add vabav.
20667 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
20668 (@mve_<mve_insn>q_<supf><mode>): ... this,.
20669 (mve_vabavq_p_<supf><mode>): Rename into ...
20670 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
20672 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20674 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
20675 (vmlsdavaq, vmlsdavaxq): New.
20676 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
20677 (vmlsdavaq, vmlsdavaxq): New.
20678 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
20679 (vmlsdavaq, vmlsdavaxq): New.
20680 * config/arm/arm_mve.h (vmladavaq): Remove.
20681 (vmlsdavaxq): Remove.
20682 (vmlsdavaq): Remove.
20683 (vmladavaxq): Remove.
20684 (vmladavaq_p): Remove.
20685 (vmladavaxq_p): Remove.
20686 (vmlsdavaq_p): Remove.
20687 (vmlsdavaxq_p): Remove.
20688 (vmladavaq_u8): Remove.
20689 (vmlsdavaxq_s8): Remove.
20690 (vmlsdavaq_s8): Remove.
20691 (vmladavaxq_s8): Remove.
20692 (vmladavaq_s8): Remove.
20693 (vmladavaq_u16): Remove.
20694 (vmlsdavaxq_s16): Remove.
20695 (vmlsdavaq_s16): Remove.
20696 (vmladavaxq_s16): Remove.
20697 (vmladavaq_s16): Remove.
20698 (vmladavaq_u32): Remove.
20699 (vmlsdavaxq_s32): Remove.
20700 (vmlsdavaq_s32): Remove.
20701 (vmladavaxq_s32): Remove.
20702 (vmladavaq_s32): Remove.
20703 (vmladavaq_p_s8): Remove.
20704 (vmladavaq_p_s32): Remove.
20705 (vmladavaq_p_s16): Remove.
20706 (vmladavaq_p_u8): Remove.
20707 (vmladavaq_p_u32): Remove.
20708 (vmladavaq_p_u16): Remove.
20709 (vmladavaxq_p_s8): Remove.
20710 (vmladavaxq_p_s32): Remove.
20711 (vmladavaxq_p_s16): Remove.
20712 (vmlsdavaq_p_s8): Remove.
20713 (vmlsdavaq_p_s32): Remove.
20714 (vmlsdavaq_p_s16): Remove.
20715 (vmlsdavaxq_p_s8): Remove.
20716 (vmlsdavaxq_p_s32): Remove.
20717 (vmlsdavaxq_p_s16): Remove.
20718 (__arm_vmladavaq_u8): Remove.
20719 (__arm_vmlsdavaxq_s8): Remove.
20720 (__arm_vmlsdavaq_s8): Remove.
20721 (__arm_vmladavaxq_s8): Remove.
20722 (__arm_vmladavaq_s8): Remove.
20723 (__arm_vmladavaq_u16): Remove.
20724 (__arm_vmlsdavaxq_s16): Remove.
20725 (__arm_vmlsdavaq_s16): Remove.
20726 (__arm_vmladavaxq_s16): Remove.
20727 (__arm_vmladavaq_s16): Remove.
20728 (__arm_vmladavaq_u32): Remove.
20729 (__arm_vmlsdavaxq_s32): Remove.
20730 (__arm_vmlsdavaq_s32): Remove.
20731 (__arm_vmladavaxq_s32): Remove.
20732 (__arm_vmladavaq_s32): Remove.
20733 (__arm_vmladavaq_p_s8): Remove.
20734 (__arm_vmladavaq_p_s32): Remove.
20735 (__arm_vmladavaq_p_s16): Remove.
20736 (__arm_vmladavaq_p_u8): Remove.
20737 (__arm_vmladavaq_p_u32): Remove.
20738 (__arm_vmladavaq_p_u16): Remove.
20739 (__arm_vmladavaxq_p_s8): Remove.
20740 (__arm_vmladavaxq_p_s32): Remove.
20741 (__arm_vmladavaxq_p_s16): Remove.
20742 (__arm_vmlsdavaq_p_s8): Remove.
20743 (__arm_vmlsdavaq_p_s32): Remove.
20744 (__arm_vmlsdavaq_p_s16): Remove.
20745 (__arm_vmlsdavaxq_p_s8): Remove.
20746 (__arm_vmlsdavaxq_p_s32): Remove.
20747 (__arm_vmlsdavaxq_p_s16): Remove.
20748 (__arm_vmladavaq): Remove.
20749 (__arm_vmlsdavaxq): Remove.
20750 (__arm_vmlsdavaq): Remove.
20751 (__arm_vmladavaxq): Remove.
20752 (__arm_vmladavaq_p): Remove.
20753 (__arm_vmladavaxq_p): Remove.
20754 (__arm_vmlsdavaq_p): Remove.
20755 (__arm_vmlsdavaxq_p): Remove.
20757 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20759 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
20760 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
20762 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20764 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
20765 (vmlsdavq, vmlsdavxq): New.
20766 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
20767 (vmlsdavq, vmlsdavxq): New.
20768 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
20769 (vmlsdavq, vmlsdavxq): New.
20770 * config/arm/arm_mve.h (vmladavq): Remove.
20771 (vmlsdavxq): Remove.
20772 (vmlsdavq): Remove.
20773 (vmladavxq): Remove.
20774 (vmladavq_p): Remove.
20775 (vmlsdavxq_p): Remove.
20776 (vmlsdavq_p): Remove.
20777 (vmladavxq_p): Remove.
20778 (vmladavq_u8): Remove.
20779 (vmlsdavxq_s8): Remove.
20780 (vmlsdavq_s8): Remove.
20781 (vmladavxq_s8): Remove.
20782 (vmladavq_s8): Remove.
20783 (vmladavq_u16): Remove.
20784 (vmlsdavxq_s16): Remove.
20785 (vmlsdavq_s16): Remove.
20786 (vmladavxq_s16): Remove.
20787 (vmladavq_s16): Remove.
20788 (vmladavq_u32): Remove.
20789 (vmlsdavxq_s32): Remove.
20790 (vmlsdavq_s32): Remove.
20791 (vmladavxq_s32): Remove.
20792 (vmladavq_s32): Remove.
20793 (vmladavq_p_u8): Remove.
20794 (vmlsdavxq_p_s8): Remove.
20795 (vmlsdavq_p_s8): Remove.
20796 (vmladavxq_p_s8): Remove.
20797 (vmladavq_p_s8): Remove.
20798 (vmladavq_p_u16): Remove.
20799 (vmlsdavxq_p_s16): Remove.
20800 (vmlsdavq_p_s16): Remove.
20801 (vmladavxq_p_s16): Remove.
20802 (vmladavq_p_s16): Remove.
20803 (vmladavq_p_u32): Remove.
20804 (vmlsdavxq_p_s32): Remove.
20805 (vmlsdavq_p_s32): Remove.
20806 (vmladavxq_p_s32): Remove.
20807 (vmladavq_p_s32): Remove.
20808 (__arm_vmladavq_u8): Remove.
20809 (__arm_vmlsdavxq_s8): Remove.
20810 (__arm_vmlsdavq_s8): Remove.
20811 (__arm_vmladavxq_s8): Remove.
20812 (__arm_vmladavq_s8): Remove.
20813 (__arm_vmladavq_u16): Remove.
20814 (__arm_vmlsdavxq_s16): Remove.
20815 (__arm_vmlsdavq_s16): Remove.
20816 (__arm_vmladavxq_s16): Remove.
20817 (__arm_vmladavq_s16): Remove.
20818 (__arm_vmladavq_u32): Remove.
20819 (__arm_vmlsdavxq_s32): Remove.
20820 (__arm_vmlsdavq_s32): Remove.
20821 (__arm_vmladavxq_s32): Remove.
20822 (__arm_vmladavq_s32): Remove.
20823 (__arm_vmladavq_p_u8): Remove.
20824 (__arm_vmlsdavxq_p_s8): Remove.
20825 (__arm_vmlsdavq_p_s8): Remove.
20826 (__arm_vmladavxq_p_s8): Remove.
20827 (__arm_vmladavq_p_s8): Remove.
20828 (__arm_vmladavq_p_u16): Remove.
20829 (__arm_vmlsdavxq_p_s16): Remove.
20830 (__arm_vmlsdavq_p_s16): Remove.
20831 (__arm_vmladavxq_p_s16): Remove.
20832 (__arm_vmladavq_p_s16): Remove.
20833 (__arm_vmladavq_p_u32): Remove.
20834 (__arm_vmlsdavxq_p_s32): Remove.
20835 (__arm_vmlsdavq_p_s32): Remove.
20836 (__arm_vmladavxq_p_s32): Remove.
20837 (__arm_vmladavq_p_s32): Remove.
20838 (__arm_vmladavq): Remove.
20839 (__arm_vmlsdavxq): Remove.
20840 (__arm_vmlsdavq): Remove.
20841 (__arm_vmladavxq): Remove.
20842 (__arm_vmladavq_p): Remove.
20843 (__arm_vmlsdavxq_p): Remove.
20844 (__arm_vmlsdavq_p): Remove.
20845 (__arm_vmladavxq_p): Remove.
20847 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20849 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
20850 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
20851 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
20852 vmlsdavax, vmlsdav, vmlsdavx.
20853 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
20854 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
20855 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
20857 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
20858 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
20859 (mve_vmlsdavxq_s<mode>): Merge into ...
20860 (@mve_<mve_insn>q_<supf><mode>): ... this.
20861 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
20862 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
20864 (@mve_<mve_insn>q_<supf><mode>): ... this.
20865 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
20866 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
20867 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20868 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
20869 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
20871 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
20873 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20875 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
20876 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
20878 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20880 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
20881 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
20882 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
20883 * config/arm/arm_mve.h (vaddlvaq): Remove.
20884 (vaddlvaq_p): Remove.
20885 (vaddlvaq_u32): Remove.
20886 (vaddlvaq_s32): Remove.
20887 (vaddlvaq_p_s32): Remove.
20888 (vaddlvaq_p_u32): Remove.
20889 (__arm_vaddlvaq_u32): Remove.
20890 (__arm_vaddlvaq_s32): Remove.
20891 (__arm_vaddlvaq_p_s32): Remove.
20892 (__arm_vaddlvaq_p_u32): Remove.
20893 (__arm_vaddlvaq): Remove.
20894 (__arm_vaddlvaq_p): Remove.
20896 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20898 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
20899 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
20901 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20903 * config/arm/iterators.md (mve_insn): Add vaddlva.
20904 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
20905 (@mve_<mve_insn>q_<supf>v4si): ... this.
20906 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
20907 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
20909 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
20912 * config/i386/i386.cc (ix86_widen_mult_cost):
20913 Handle V4HImode and V2SImode.
20915 2023-05-11 Andrew Pinski <apinski@marvell.com>
20917 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
20918 defined by a phi node with more than one uses, allow for the
20919 only uses are in that same defining statement.
20921 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
20923 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
20926 2023-05-11 Pan Li <pan2.li@intel.com>
20928 * config/riscv/vector.md: Add comments for simplifying to vmset.
20930 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
20932 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
20934 (v<optab><mode>3): Add vector shift pattern.
20935 * config/riscv/vector-iterators.md: New iterator.
20937 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
20939 * config/riscv/autovec.md: Use renamed functions.
20940 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
20941 (emit_vlmax_reg_op): To this.
20942 (emit_nonvlmax_op): Rename.
20943 (emit_len_op): To this.
20944 (emit_nonvlmax_binop): Rename.
20945 (emit_len_binop): To this.
20946 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
20947 (emit_pred_binop): Remove vlmax_p.
20948 (emit_vlmax_op): Rename.
20949 (emit_vlmax_reg_op): To this.
20950 (emit_nonvlmax_op): Rename.
20951 (emit_len_op): To this.
20952 (emit_nonvlmax_binop): Rename.
20953 (emit_len_binop): To this.
20954 (sew64_scalar_helper): Use renamed functions.
20955 (expand_tuple_move): Use renamed functions.
20956 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
20958 * config/riscv/vector.md: Use renamed functions.
20960 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
20961 Michael Collison <collison@rivosinc.com>
20963 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
20964 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
20965 * config/riscv/riscv-v.cc (emit_pred_op): New function.
20966 (set_expander_dest_and_mask): New function.
20967 (emit_pred_binop): New function.
20968 (emit_nonvlmax_binop): New function.
20970 2023-05-11 Pan Li <pan2.li@intel.com>
20972 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
20973 * gimple-loop-interchange.cc
20974 (tree_loop_interchange::map_inductions_to_loop): Ditto.
20975 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
20976 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
20977 * tree-ssa-loop-manip.cc (create_iv): Ditto.
20978 (tree_transform_and_unroll_loop): Ditto.
20979 (canonicalize_loop_ivs): Ditto.
20980 * tree-ssa-loop-manip.h (create_iv): Ditto.
20981 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
20982 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
20984 (vect_set_loop_condition_normal): Ditto.
20985 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
20986 * tree-vect-stmts.cc (vectorizable_store): Ditto.
20987 (vectorizable_load): Ditto.
20989 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
20991 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
20992 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
20993 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
20994 * config/arm/arm_mve.h (vmovlbq): Remove.
20996 (vmovlbq_m): Remove.
20997 (vmovltq_m): Remove.
20998 (vmovlbq_x): Remove.
20999 (vmovltq_x): Remove.
21000 (vmovlbq_s8): Remove.
21001 (vmovlbq_s16): Remove.
21002 (vmovltq_s8): Remove.
21003 (vmovltq_s16): Remove.
21004 (vmovltq_u8): Remove.
21005 (vmovltq_u16): Remove.
21006 (vmovlbq_u8): Remove.
21007 (vmovlbq_u16): Remove.
21008 (vmovlbq_m_s8): Remove.
21009 (vmovltq_m_s8): Remove.
21010 (vmovlbq_m_u8): Remove.
21011 (vmovltq_m_u8): Remove.
21012 (vmovlbq_m_s16): Remove.
21013 (vmovltq_m_s16): Remove.
21014 (vmovlbq_m_u16): Remove.
21015 (vmovltq_m_u16): Remove.
21016 (vmovlbq_x_s8): Remove.
21017 (vmovlbq_x_s16): Remove.
21018 (vmovlbq_x_u8): Remove.
21019 (vmovlbq_x_u16): Remove.
21020 (vmovltq_x_s8): Remove.
21021 (vmovltq_x_s16): Remove.
21022 (vmovltq_x_u8): Remove.
21023 (vmovltq_x_u16): Remove.
21024 (__arm_vmovlbq_s8): Remove.
21025 (__arm_vmovlbq_s16): Remove.
21026 (__arm_vmovltq_s8): Remove.
21027 (__arm_vmovltq_s16): Remove.
21028 (__arm_vmovltq_u8): Remove.
21029 (__arm_vmovltq_u16): Remove.
21030 (__arm_vmovlbq_u8): Remove.
21031 (__arm_vmovlbq_u16): Remove.
21032 (__arm_vmovlbq_m_s8): Remove.
21033 (__arm_vmovltq_m_s8): Remove.
21034 (__arm_vmovlbq_m_u8): Remove.
21035 (__arm_vmovltq_m_u8): Remove.
21036 (__arm_vmovlbq_m_s16): Remove.
21037 (__arm_vmovltq_m_s16): Remove.
21038 (__arm_vmovlbq_m_u16): Remove.
21039 (__arm_vmovltq_m_u16): Remove.
21040 (__arm_vmovlbq_x_s8): Remove.
21041 (__arm_vmovlbq_x_s16): Remove.
21042 (__arm_vmovlbq_x_u8): Remove.
21043 (__arm_vmovlbq_x_u16): Remove.
21044 (__arm_vmovltq_x_s8): Remove.
21045 (__arm_vmovltq_x_s16): Remove.
21046 (__arm_vmovltq_x_u8): Remove.
21047 (__arm_vmovltq_x_u16): Remove.
21048 (__arm_vmovlbq): Remove.
21049 (__arm_vmovltq): Remove.
21050 (__arm_vmovlbq_m): Remove.
21051 (__arm_vmovltq_m): Remove.
21052 (__arm_vmovlbq_x): Remove.
21053 (__arm_vmovltq_x): Remove.
21055 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21057 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
21058 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
21060 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21062 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
21063 (VMOVLBQ, VMOVLTQ): Merge into ...
21064 (VMOVLxQ): ... this.
21065 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
21066 (VMOVLxQ_M): ... this.
21067 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
21068 (mve_vmovlbq_<supf><mode>): Merge into ...
21069 (@mve_<mve_insn>q_<supf><mode>): ... this.
21070 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
21072 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
21074 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21076 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
21077 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
21078 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
21079 * config/arm/arm-mve-builtins-functions.h
21080 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
21081 * config/arm/arm_mve.h (vaddlvq): Remove.
21082 (vaddlvq_p): Remove.
21083 (vaddlvq_s32): Remove.
21084 (vaddlvq_u32): Remove.
21085 (vaddlvq_p_s32): Remove.
21086 (vaddlvq_p_u32): Remove.
21087 (__arm_vaddlvq_s32): Remove.
21088 (__arm_vaddlvq_u32): Remove.
21089 (__arm_vaddlvq_p_s32): Remove.
21090 (__arm_vaddlvq_p_u32): Remove.
21091 (__arm_vaddlvq): Remove.
21092 (__arm_vaddlvq_p): Remove.
21094 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21096 * config/arm/iterators.md (mve_insn): Add vaddlv.
21097 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
21098 (@mve_<mve_insn>q_<supf>v4si): ... this.
21099 (mve_vaddlvq_p_<supf>v4si): Rename into ...
21100 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
21102 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21104 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
21105 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
21107 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21109 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
21110 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
21111 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
21112 * config/arm/arm_mve.h (vaddvaq): Remove.
21113 (vaddvaq_p): Remove.
21114 (vaddvaq_u8): Remove.
21115 (vaddvaq_s8): Remove.
21116 (vaddvaq_u16): Remove.
21117 (vaddvaq_s16): Remove.
21118 (vaddvaq_u32): Remove.
21119 (vaddvaq_s32): Remove.
21120 (vaddvaq_p_u8): Remove.
21121 (vaddvaq_p_s8): Remove.
21122 (vaddvaq_p_u16): Remove.
21123 (vaddvaq_p_s16): Remove.
21124 (vaddvaq_p_u32): Remove.
21125 (vaddvaq_p_s32): Remove.
21126 (__arm_vaddvaq_u8): Remove.
21127 (__arm_vaddvaq_s8): Remove.
21128 (__arm_vaddvaq_u16): Remove.
21129 (__arm_vaddvaq_s16): Remove.
21130 (__arm_vaddvaq_u32): Remove.
21131 (__arm_vaddvaq_s32): Remove.
21132 (__arm_vaddvaq_p_u8): Remove.
21133 (__arm_vaddvaq_p_s8): Remove.
21134 (__arm_vaddvaq_p_u16): Remove.
21135 (__arm_vaddvaq_p_s16): Remove.
21136 (__arm_vaddvaq_p_u32): Remove.
21137 (__arm_vaddvaq_p_s32): Remove.
21138 (__arm_vaddvaq): Remove.
21139 (__arm_vaddvaq_p): Remove.
21141 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21143 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
21144 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
21146 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21148 * config/arm/iterators.md (mve_insn): Add vaddva.
21149 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
21150 (@mve_<mve_insn>q_<supf><mode>): ... this.
21151 (mve_vaddvaq_p_<supf><mode>): Rename into ...
21152 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21154 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21156 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
21157 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
21158 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
21159 * config/arm/arm_mve.h (vaddvq): Remove.
21160 (vaddvq_p): Remove.
21161 (vaddvq_s8): Remove.
21162 (vaddvq_s16): Remove.
21163 (vaddvq_s32): Remove.
21164 (vaddvq_u8): Remove.
21165 (vaddvq_u16): Remove.
21166 (vaddvq_u32): Remove.
21167 (vaddvq_p_u8): Remove.
21168 (vaddvq_p_s8): Remove.
21169 (vaddvq_p_u16): Remove.
21170 (vaddvq_p_s16): Remove.
21171 (vaddvq_p_u32): Remove.
21172 (vaddvq_p_s32): Remove.
21173 (__arm_vaddvq_s8): Remove.
21174 (__arm_vaddvq_s16): Remove.
21175 (__arm_vaddvq_s32): Remove.
21176 (__arm_vaddvq_u8): Remove.
21177 (__arm_vaddvq_u16): Remove.
21178 (__arm_vaddvq_u32): Remove.
21179 (__arm_vaddvq_p_u8): Remove.
21180 (__arm_vaddvq_p_s8): Remove.
21181 (__arm_vaddvq_p_u16): Remove.
21182 (__arm_vaddvq_p_s16): Remove.
21183 (__arm_vaddvq_p_u32): Remove.
21184 (__arm_vaddvq_p_s32): Remove.
21185 (__arm_vaddvq): Remove.
21186 (__arm_vaddvq_p): Remove.
21188 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21190 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
21191 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
21193 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21195 * config/arm/iterators.md (mve_insn): Add vaddv.
21196 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
21197 (@mve_<mve_insn>q_<supf><mode>): ... this.
21198 (mve_vaddvq_p_<supf><mode>): Rename into ...
21199 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
21200 * config/arm/vec-common.md: Use gen_mve_q instead of
21203 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21205 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
21207 * config/arm/arm-mve-builtins-base.def (vdupq): New.
21208 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
21209 * config/arm/arm_mve.h (vdupq_n): Remove.
21211 (vdupq_n_f16): Remove.
21212 (vdupq_n_f32): Remove.
21213 (vdupq_n_s8): Remove.
21214 (vdupq_n_s16): Remove.
21215 (vdupq_n_s32): Remove.
21216 (vdupq_n_u8): Remove.
21217 (vdupq_n_u16): Remove.
21218 (vdupq_n_u32): Remove.
21219 (vdupq_m_n_u8): Remove.
21220 (vdupq_m_n_s8): Remove.
21221 (vdupq_m_n_u16): Remove.
21222 (vdupq_m_n_s16): Remove.
21223 (vdupq_m_n_u32): Remove.
21224 (vdupq_m_n_s32): Remove.
21225 (vdupq_m_n_f16): Remove.
21226 (vdupq_m_n_f32): Remove.
21227 (vdupq_x_n_s8): Remove.
21228 (vdupq_x_n_s16): Remove.
21229 (vdupq_x_n_s32): Remove.
21230 (vdupq_x_n_u8): Remove.
21231 (vdupq_x_n_u16): Remove.
21232 (vdupq_x_n_u32): Remove.
21233 (vdupq_x_n_f16): Remove.
21234 (vdupq_x_n_f32): Remove.
21235 (__arm_vdupq_n_s8): Remove.
21236 (__arm_vdupq_n_s16): Remove.
21237 (__arm_vdupq_n_s32): Remove.
21238 (__arm_vdupq_n_u8): Remove.
21239 (__arm_vdupq_n_u16): Remove.
21240 (__arm_vdupq_n_u32): Remove.
21241 (__arm_vdupq_m_n_u8): Remove.
21242 (__arm_vdupq_m_n_s8): Remove.
21243 (__arm_vdupq_m_n_u16): Remove.
21244 (__arm_vdupq_m_n_s16): Remove.
21245 (__arm_vdupq_m_n_u32): Remove.
21246 (__arm_vdupq_m_n_s32): Remove.
21247 (__arm_vdupq_x_n_s8): Remove.
21248 (__arm_vdupq_x_n_s16): Remove.
21249 (__arm_vdupq_x_n_s32): Remove.
21250 (__arm_vdupq_x_n_u8): Remove.
21251 (__arm_vdupq_x_n_u16): Remove.
21252 (__arm_vdupq_x_n_u32): Remove.
21253 (__arm_vdupq_n_f16): Remove.
21254 (__arm_vdupq_n_f32): Remove.
21255 (__arm_vdupq_m_n_f16): Remove.
21256 (__arm_vdupq_m_n_f32): Remove.
21257 (__arm_vdupq_x_n_f16): Remove.
21258 (__arm_vdupq_x_n_f32): Remove.
21259 (__arm_vdupq_n): Remove.
21260 (__arm_vdupq_m): Remove.
21262 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21264 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
21265 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
21267 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21269 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
21270 (MVE_FP_N_VDUPQ_ONLY): New.
21271 (mve_insn): Add vdupq.
21272 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
21273 (@mve_<mve_insn>q_n_f<mode>): ... this.
21274 (mve_vdupq_n_<supf><mode>): Rename into ...
21275 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
21276 (mve_vdupq_m_n_<supf><mode>): Rename into ...
21277 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
21278 (mve_vdupq_m_n_f<mode>): Rename into ...
21279 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
21281 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21283 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
21285 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
21287 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
21289 * config/arm/arm_mve.h (vrev16q): Remove.
21292 (vrev64q_m): Remove.
21293 (vrev16q_m): Remove.
21294 (vrev32q_m): Remove.
21295 (vrev16q_x): Remove.
21296 (vrev32q_x): Remove.
21297 (vrev64q_x): Remove.
21298 (vrev64q_f16): Remove.
21299 (vrev64q_f32): Remove.
21300 (vrev32q_f16): Remove.
21301 (vrev16q_s8): Remove.
21302 (vrev32q_s8): Remove.
21303 (vrev32q_s16): Remove.
21304 (vrev64q_s8): Remove.
21305 (vrev64q_s16): Remove.
21306 (vrev64q_s32): Remove.
21307 (vrev64q_u8): Remove.
21308 (vrev64q_u16): Remove.
21309 (vrev64q_u32): Remove.
21310 (vrev32q_u8): Remove.
21311 (vrev32q_u16): Remove.
21312 (vrev16q_u8): Remove.
21313 (vrev64q_m_u8): Remove.
21314 (vrev64q_m_s8): Remove.
21315 (vrev64q_m_u16): Remove.
21316 (vrev64q_m_s16): Remove.
21317 (vrev64q_m_u32): Remove.
21318 (vrev64q_m_s32): Remove.
21319 (vrev16q_m_s8): Remove.
21320 (vrev32q_m_f16): Remove.
21321 (vrev16q_m_u8): Remove.
21322 (vrev32q_m_s8): Remove.
21323 (vrev64q_m_f16): Remove.
21324 (vrev32q_m_u8): Remove.
21325 (vrev32q_m_s16): Remove.
21326 (vrev64q_m_f32): Remove.
21327 (vrev32q_m_u16): Remove.
21328 (vrev16q_x_s8): Remove.
21329 (vrev16q_x_u8): Remove.
21330 (vrev32q_x_s8): Remove.
21331 (vrev32q_x_s16): Remove.
21332 (vrev32q_x_u8): Remove.
21333 (vrev32q_x_u16): Remove.
21334 (vrev64q_x_s8): Remove.
21335 (vrev64q_x_s16): Remove.
21336 (vrev64q_x_s32): Remove.
21337 (vrev64q_x_u8): Remove.
21338 (vrev64q_x_u16): Remove.
21339 (vrev64q_x_u32): Remove.
21340 (vrev32q_x_f16): Remove.
21341 (vrev64q_x_f16): Remove.
21342 (vrev64q_x_f32): Remove.
21343 (__arm_vrev16q_s8): Remove.
21344 (__arm_vrev32q_s8): Remove.
21345 (__arm_vrev32q_s16): Remove.
21346 (__arm_vrev64q_s8): Remove.
21347 (__arm_vrev64q_s16): Remove.
21348 (__arm_vrev64q_s32): Remove.
21349 (__arm_vrev64q_u8): Remove.
21350 (__arm_vrev64q_u16): Remove.
21351 (__arm_vrev64q_u32): Remove.
21352 (__arm_vrev32q_u8): Remove.
21353 (__arm_vrev32q_u16): Remove.
21354 (__arm_vrev16q_u8): Remove.
21355 (__arm_vrev64q_m_u8): Remove.
21356 (__arm_vrev64q_m_s8): Remove.
21357 (__arm_vrev64q_m_u16): Remove.
21358 (__arm_vrev64q_m_s16): Remove.
21359 (__arm_vrev64q_m_u32): Remove.
21360 (__arm_vrev64q_m_s32): Remove.
21361 (__arm_vrev16q_m_s8): Remove.
21362 (__arm_vrev16q_m_u8): Remove.
21363 (__arm_vrev32q_m_s8): Remove.
21364 (__arm_vrev32q_m_u8): Remove.
21365 (__arm_vrev32q_m_s16): Remove.
21366 (__arm_vrev32q_m_u16): Remove.
21367 (__arm_vrev16q_x_s8): Remove.
21368 (__arm_vrev16q_x_u8): Remove.
21369 (__arm_vrev32q_x_s8): Remove.
21370 (__arm_vrev32q_x_s16): Remove.
21371 (__arm_vrev32q_x_u8): Remove.
21372 (__arm_vrev32q_x_u16): Remove.
21373 (__arm_vrev64q_x_s8): Remove.
21374 (__arm_vrev64q_x_s16): Remove.
21375 (__arm_vrev64q_x_s32): Remove.
21376 (__arm_vrev64q_x_u8): Remove.
21377 (__arm_vrev64q_x_u16): Remove.
21378 (__arm_vrev64q_x_u32): Remove.
21379 (__arm_vrev64q_f16): Remove.
21380 (__arm_vrev64q_f32): Remove.
21381 (__arm_vrev32q_f16): Remove.
21382 (__arm_vrev32q_m_f16): Remove.
21383 (__arm_vrev64q_m_f16): Remove.
21384 (__arm_vrev64q_m_f32): Remove.
21385 (__arm_vrev32q_x_f16): Remove.
21386 (__arm_vrev64q_x_f16): Remove.
21387 (__arm_vrev64q_x_f32): Remove.
21388 (__arm_vrev16q): Remove.
21389 (__arm_vrev32q): Remove.
21390 (__arm_vrev64q): Remove.
21391 (__arm_vrev64q_m): Remove.
21392 (__arm_vrev16q_m): Remove.
21393 (__arm_vrev32q_m): Remove.
21394 (__arm_vrev16q_x): Remove.
21395 (__arm_vrev32q_x): Remove.
21396 (__arm_vrev64q_x): Remove.
21398 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21400 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
21401 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
21402 (MVE_FP_M_VREV32Q_ONLY): New iterators.
21403 (mve_insn): Add vrev16q, vrev32q, vrev64q.
21404 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
21405 (@mve_<mve_insn>q_f<mode>): ... this
21406 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
21407 (mve_vrev64q_<supf><mode>): Rename into ...
21408 (@mve_<mve_insn>q_<supf><mode>): ... this.
21409 (mve_vrev32q_<supf><mode>): Rename into
21410 @mve_<mve_insn>q_<supf><mode>.
21411 (mve_vrev16q_<supf>v16qi): Rename into
21412 @mve_<mve_insn>q_<supf><mode>.
21413 (mve_vrev64q_m_<supf><mode>): Rename into
21414 @mve_<mve_insn>q_m_<supf><mode>.
21415 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
21416 (mve_vrev32q_m_<supf><mode>): Rename into
21417 @mve_<mve_insn>q_m_<supf><mode>.
21418 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
21419 (mve_vrev16q_m_<supf>v16qi): Rename into
21420 @mve_<mve_insn>q_m_<supf><mode>.
21422 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21424 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
21425 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
21426 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
21427 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
21428 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
21429 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
21430 * config/arm/arm-mve-builtins-functions.h (class
21431 unspec_based_mve_function_exact_insn_vcmp): New.
21432 * config/arm/arm-mve-builtins.cc
21433 (function_instance::has_inactive_argument): Handle vcmp.
21434 * config/arm/arm_mve.h (vcmpneq): Remove.
21442 (vcmpneq_m): Remove.
21443 (vcmphiq_m): Remove.
21444 (vcmpeqq_m): Remove.
21445 (vcmpcsq_m): Remove.
21446 (vcmpcsq_m_n): Remove.
21447 (vcmpltq_m): Remove.
21448 (vcmpleq_m): Remove.
21449 (vcmpgtq_m): Remove.
21450 (vcmpgeq_m): Remove.
21451 (vcmpneq_s8): Remove.
21452 (vcmpneq_s16): Remove.
21453 (vcmpneq_s32): Remove.
21454 (vcmpneq_u8): Remove.
21455 (vcmpneq_u16): Remove.
21456 (vcmpneq_u32): Remove.
21457 (vcmpneq_n_u8): Remove.
21458 (vcmphiq_u8): Remove.
21459 (vcmphiq_n_u8): Remove.
21460 (vcmpeqq_u8): Remove.
21461 (vcmpeqq_n_u8): Remove.
21462 (vcmpcsq_u8): Remove.
21463 (vcmpcsq_n_u8): Remove.
21464 (vcmpneq_n_s8): Remove.
21465 (vcmpltq_s8): Remove.
21466 (vcmpltq_n_s8): Remove.
21467 (vcmpleq_s8): Remove.
21468 (vcmpleq_n_s8): Remove.
21469 (vcmpgtq_s8): Remove.
21470 (vcmpgtq_n_s8): Remove.
21471 (vcmpgeq_s8): Remove.
21472 (vcmpgeq_n_s8): Remove.
21473 (vcmpeqq_s8): Remove.
21474 (vcmpeqq_n_s8): Remove.
21475 (vcmpneq_n_u16): Remove.
21476 (vcmphiq_u16): Remove.
21477 (vcmphiq_n_u16): Remove.
21478 (vcmpeqq_u16): Remove.
21479 (vcmpeqq_n_u16): Remove.
21480 (vcmpcsq_u16): Remove.
21481 (vcmpcsq_n_u16): Remove.
21482 (vcmpneq_n_s16): Remove.
21483 (vcmpltq_s16): Remove.
21484 (vcmpltq_n_s16): Remove.
21485 (vcmpleq_s16): Remove.
21486 (vcmpleq_n_s16): Remove.
21487 (vcmpgtq_s16): Remove.
21488 (vcmpgtq_n_s16): Remove.
21489 (vcmpgeq_s16): Remove.
21490 (vcmpgeq_n_s16): Remove.
21491 (vcmpeqq_s16): Remove.
21492 (vcmpeqq_n_s16): Remove.
21493 (vcmpneq_n_u32): Remove.
21494 (vcmphiq_u32): Remove.
21495 (vcmphiq_n_u32): Remove.
21496 (vcmpeqq_u32): Remove.
21497 (vcmpeqq_n_u32): Remove.
21498 (vcmpcsq_u32): Remove.
21499 (vcmpcsq_n_u32): Remove.
21500 (vcmpneq_n_s32): Remove.
21501 (vcmpltq_s32): Remove.
21502 (vcmpltq_n_s32): Remove.
21503 (vcmpleq_s32): Remove.
21504 (vcmpleq_n_s32): Remove.
21505 (vcmpgtq_s32): Remove.
21506 (vcmpgtq_n_s32): Remove.
21507 (vcmpgeq_s32): Remove.
21508 (vcmpgeq_n_s32): Remove.
21509 (vcmpeqq_s32): Remove.
21510 (vcmpeqq_n_s32): Remove.
21511 (vcmpneq_n_f16): Remove.
21512 (vcmpneq_f16): Remove.
21513 (vcmpltq_n_f16): Remove.
21514 (vcmpltq_f16): Remove.
21515 (vcmpleq_n_f16): Remove.
21516 (vcmpleq_f16): Remove.
21517 (vcmpgtq_n_f16): Remove.
21518 (vcmpgtq_f16): Remove.
21519 (vcmpgeq_n_f16): Remove.
21520 (vcmpgeq_f16): Remove.
21521 (vcmpeqq_n_f16): Remove.
21522 (vcmpeqq_f16): Remove.
21523 (vcmpneq_n_f32): Remove.
21524 (vcmpneq_f32): Remove.
21525 (vcmpltq_n_f32): Remove.
21526 (vcmpltq_f32): Remove.
21527 (vcmpleq_n_f32): Remove.
21528 (vcmpleq_f32): Remove.
21529 (vcmpgtq_n_f32): Remove.
21530 (vcmpgtq_f32): Remove.
21531 (vcmpgeq_n_f32): Remove.
21532 (vcmpgeq_f32): Remove.
21533 (vcmpeqq_n_f32): Remove.
21534 (vcmpeqq_f32): Remove.
21535 (vcmpeqq_m_f16): Remove.
21536 (vcmpeqq_m_f32): Remove.
21537 (vcmpneq_m_u8): Remove.
21538 (vcmpneq_m_n_u8): Remove.
21539 (vcmphiq_m_u8): Remove.
21540 (vcmphiq_m_n_u8): Remove.
21541 (vcmpeqq_m_u8): Remove.
21542 (vcmpeqq_m_n_u8): Remove.
21543 (vcmpcsq_m_u8): Remove.
21544 (vcmpcsq_m_n_u8): Remove.
21545 (vcmpneq_m_s8): Remove.
21546 (vcmpneq_m_n_s8): Remove.
21547 (vcmpltq_m_s8): Remove.
21548 (vcmpltq_m_n_s8): Remove.
21549 (vcmpleq_m_s8): Remove.
21550 (vcmpleq_m_n_s8): Remove.
21551 (vcmpgtq_m_s8): Remove.
21552 (vcmpgtq_m_n_s8): Remove.
21553 (vcmpgeq_m_s8): Remove.
21554 (vcmpgeq_m_n_s8): Remove.
21555 (vcmpeqq_m_s8): Remove.
21556 (vcmpeqq_m_n_s8): Remove.
21557 (vcmpneq_m_u16): Remove.
21558 (vcmpneq_m_n_u16): Remove.
21559 (vcmphiq_m_u16): Remove.
21560 (vcmphiq_m_n_u16): Remove.
21561 (vcmpeqq_m_u16): Remove.
21562 (vcmpeqq_m_n_u16): Remove.
21563 (vcmpcsq_m_u16): Remove.
21564 (vcmpcsq_m_n_u16): Remove.
21565 (vcmpneq_m_s16): Remove.
21566 (vcmpneq_m_n_s16): Remove.
21567 (vcmpltq_m_s16): Remove.
21568 (vcmpltq_m_n_s16): Remove.
21569 (vcmpleq_m_s16): Remove.
21570 (vcmpleq_m_n_s16): Remove.
21571 (vcmpgtq_m_s16): Remove.
21572 (vcmpgtq_m_n_s16): Remove.
21573 (vcmpgeq_m_s16): Remove.
21574 (vcmpgeq_m_n_s16): Remove.
21575 (vcmpeqq_m_s16): Remove.
21576 (vcmpeqq_m_n_s16): Remove.
21577 (vcmpneq_m_u32): Remove.
21578 (vcmpneq_m_n_u32): Remove.
21579 (vcmphiq_m_u32): Remove.
21580 (vcmphiq_m_n_u32): Remove.
21581 (vcmpeqq_m_u32): Remove.
21582 (vcmpeqq_m_n_u32): Remove.
21583 (vcmpcsq_m_u32): Remove.
21584 (vcmpcsq_m_n_u32): Remove.
21585 (vcmpneq_m_s32): Remove.
21586 (vcmpneq_m_n_s32): Remove.
21587 (vcmpltq_m_s32): Remove.
21588 (vcmpltq_m_n_s32): Remove.
21589 (vcmpleq_m_s32): Remove.
21590 (vcmpleq_m_n_s32): Remove.
21591 (vcmpgtq_m_s32): Remove.
21592 (vcmpgtq_m_n_s32): Remove.
21593 (vcmpgeq_m_s32): Remove.
21594 (vcmpgeq_m_n_s32): Remove.
21595 (vcmpeqq_m_s32): Remove.
21596 (vcmpeqq_m_n_s32): Remove.
21597 (vcmpeqq_m_n_f16): Remove.
21598 (vcmpgeq_m_f16): Remove.
21599 (vcmpgeq_m_n_f16): Remove.
21600 (vcmpgtq_m_f16): Remove.
21601 (vcmpgtq_m_n_f16): Remove.
21602 (vcmpleq_m_f16): Remove.
21603 (vcmpleq_m_n_f16): Remove.
21604 (vcmpltq_m_f16): Remove.
21605 (vcmpltq_m_n_f16): Remove.
21606 (vcmpneq_m_f16): Remove.
21607 (vcmpneq_m_n_f16): Remove.
21608 (vcmpeqq_m_n_f32): Remove.
21609 (vcmpgeq_m_f32): Remove.
21610 (vcmpgeq_m_n_f32): Remove.
21611 (vcmpgtq_m_f32): Remove.
21612 (vcmpgtq_m_n_f32): Remove.
21613 (vcmpleq_m_f32): Remove.
21614 (vcmpleq_m_n_f32): Remove.
21615 (vcmpltq_m_f32): Remove.
21616 (vcmpltq_m_n_f32): Remove.
21617 (vcmpneq_m_f32): Remove.
21618 (vcmpneq_m_n_f32): Remove.
21619 (__arm_vcmpneq_s8): Remove.
21620 (__arm_vcmpneq_s16): Remove.
21621 (__arm_vcmpneq_s32): Remove.
21622 (__arm_vcmpneq_u8): Remove.
21623 (__arm_vcmpneq_u16): Remove.
21624 (__arm_vcmpneq_u32): Remove.
21625 (__arm_vcmpneq_n_u8): Remove.
21626 (__arm_vcmphiq_u8): Remove.
21627 (__arm_vcmphiq_n_u8): Remove.
21628 (__arm_vcmpeqq_u8): Remove.
21629 (__arm_vcmpeqq_n_u8): Remove.
21630 (__arm_vcmpcsq_u8): Remove.
21631 (__arm_vcmpcsq_n_u8): Remove.
21632 (__arm_vcmpneq_n_s8): Remove.
21633 (__arm_vcmpltq_s8): Remove.
21634 (__arm_vcmpltq_n_s8): Remove.
21635 (__arm_vcmpleq_s8): Remove.
21636 (__arm_vcmpleq_n_s8): Remove.
21637 (__arm_vcmpgtq_s8): Remove.
21638 (__arm_vcmpgtq_n_s8): Remove.
21639 (__arm_vcmpgeq_s8): Remove.
21640 (__arm_vcmpgeq_n_s8): Remove.
21641 (__arm_vcmpeqq_s8): Remove.
21642 (__arm_vcmpeqq_n_s8): Remove.
21643 (__arm_vcmpneq_n_u16): Remove.
21644 (__arm_vcmphiq_u16): Remove.
21645 (__arm_vcmphiq_n_u16): Remove.
21646 (__arm_vcmpeqq_u16): Remove.
21647 (__arm_vcmpeqq_n_u16): Remove.
21648 (__arm_vcmpcsq_u16): Remove.
21649 (__arm_vcmpcsq_n_u16): Remove.
21650 (__arm_vcmpneq_n_s16): Remove.
21651 (__arm_vcmpltq_s16): Remove.
21652 (__arm_vcmpltq_n_s16): Remove.
21653 (__arm_vcmpleq_s16): Remove.
21654 (__arm_vcmpleq_n_s16): Remove.
21655 (__arm_vcmpgtq_s16): Remove.
21656 (__arm_vcmpgtq_n_s16): Remove.
21657 (__arm_vcmpgeq_s16): Remove.
21658 (__arm_vcmpgeq_n_s16): Remove.
21659 (__arm_vcmpeqq_s16): Remove.
21660 (__arm_vcmpeqq_n_s16): Remove.
21661 (__arm_vcmpneq_n_u32): Remove.
21662 (__arm_vcmphiq_u32): Remove.
21663 (__arm_vcmphiq_n_u32): Remove.
21664 (__arm_vcmpeqq_u32): Remove.
21665 (__arm_vcmpeqq_n_u32): Remove.
21666 (__arm_vcmpcsq_u32): Remove.
21667 (__arm_vcmpcsq_n_u32): Remove.
21668 (__arm_vcmpneq_n_s32): Remove.
21669 (__arm_vcmpltq_s32): Remove.
21670 (__arm_vcmpltq_n_s32): Remove.
21671 (__arm_vcmpleq_s32): Remove.
21672 (__arm_vcmpleq_n_s32): Remove.
21673 (__arm_vcmpgtq_s32): Remove.
21674 (__arm_vcmpgtq_n_s32): Remove.
21675 (__arm_vcmpgeq_s32): Remove.
21676 (__arm_vcmpgeq_n_s32): Remove.
21677 (__arm_vcmpeqq_s32): Remove.
21678 (__arm_vcmpeqq_n_s32): Remove.
21679 (__arm_vcmpneq_m_u8): Remove.
21680 (__arm_vcmpneq_m_n_u8): Remove.
21681 (__arm_vcmphiq_m_u8): Remove.
21682 (__arm_vcmphiq_m_n_u8): Remove.
21683 (__arm_vcmpeqq_m_u8): Remove.
21684 (__arm_vcmpeqq_m_n_u8): Remove.
21685 (__arm_vcmpcsq_m_u8): Remove.
21686 (__arm_vcmpcsq_m_n_u8): Remove.
21687 (__arm_vcmpneq_m_s8): Remove.
21688 (__arm_vcmpneq_m_n_s8): Remove.
21689 (__arm_vcmpltq_m_s8): Remove.
21690 (__arm_vcmpltq_m_n_s8): Remove.
21691 (__arm_vcmpleq_m_s8): Remove.
21692 (__arm_vcmpleq_m_n_s8): Remove.
21693 (__arm_vcmpgtq_m_s8): Remove.
21694 (__arm_vcmpgtq_m_n_s8): Remove.
21695 (__arm_vcmpgeq_m_s8): Remove.
21696 (__arm_vcmpgeq_m_n_s8): Remove.
21697 (__arm_vcmpeqq_m_s8): Remove.
21698 (__arm_vcmpeqq_m_n_s8): Remove.
21699 (__arm_vcmpneq_m_u16): Remove.
21700 (__arm_vcmpneq_m_n_u16): Remove.
21701 (__arm_vcmphiq_m_u16): Remove.
21702 (__arm_vcmphiq_m_n_u16): Remove.
21703 (__arm_vcmpeqq_m_u16): Remove.
21704 (__arm_vcmpeqq_m_n_u16): Remove.
21705 (__arm_vcmpcsq_m_u16): Remove.
21706 (__arm_vcmpcsq_m_n_u16): Remove.
21707 (__arm_vcmpneq_m_s16): Remove.
21708 (__arm_vcmpneq_m_n_s16): Remove.
21709 (__arm_vcmpltq_m_s16): Remove.
21710 (__arm_vcmpltq_m_n_s16): Remove.
21711 (__arm_vcmpleq_m_s16): Remove.
21712 (__arm_vcmpleq_m_n_s16): Remove.
21713 (__arm_vcmpgtq_m_s16): Remove.
21714 (__arm_vcmpgtq_m_n_s16): Remove.
21715 (__arm_vcmpgeq_m_s16): Remove.
21716 (__arm_vcmpgeq_m_n_s16): Remove.
21717 (__arm_vcmpeqq_m_s16): Remove.
21718 (__arm_vcmpeqq_m_n_s16): Remove.
21719 (__arm_vcmpneq_m_u32): Remove.
21720 (__arm_vcmpneq_m_n_u32): Remove.
21721 (__arm_vcmphiq_m_u32): Remove.
21722 (__arm_vcmphiq_m_n_u32): Remove.
21723 (__arm_vcmpeqq_m_u32): Remove.
21724 (__arm_vcmpeqq_m_n_u32): Remove.
21725 (__arm_vcmpcsq_m_u32): Remove.
21726 (__arm_vcmpcsq_m_n_u32): Remove.
21727 (__arm_vcmpneq_m_s32): Remove.
21728 (__arm_vcmpneq_m_n_s32): Remove.
21729 (__arm_vcmpltq_m_s32): Remove.
21730 (__arm_vcmpltq_m_n_s32): Remove.
21731 (__arm_vcmpleq_m_s32): Remove.
21732 (__arm_vcmpleq_m_n_s32): Remove.
21733 (__arm_vcmpgtq_m_s32): Remove.
21734 (__arm_vcmpgtq_m_n_s32): Remove.
21735 (__arm_vcmpgeq_m_s32): Remove.
21736 (__arm_vcmpgeq_m_n_s32): Remove.
21737 (__arm_vcmpeqq_m_s32): Remove.
21738 (__arm_vcmpeqq_m_n_s32): Remove.
21739 (__arm_vcmpneq_n_f16): Remove.
21740 (__arm_vcmpneq_f16): Remove.
21741 (__arm_vcmpltq_n_f16): Remove.
21742 (__arm_vcmpltq_f16): Remove.
21743 (__arm_vcmpleq_n_f16): Remove.
21744 (__arm_vcmpleq_f16): Remove.
21745 (__arm_vcmpgtq_n_f16): Remove.
21746 (__arm_vcmpgtq_f16): Remove.
21747 (__arm_vcmpgeq_n_f16): Remove.
21748 (__arm_vcmpgeq_f16): Remove.
21749 (__arm_vcmpeqq_n_f16): Remove.
21750 (__arm_vcmpeqq_f16): Remove.
21751 (__arm_vcmpneq_n_f32): Remove.
21752 (__arm_vcmpneq_f32): Remove.
21753 (__arm_vcmpltq_n_f32): Remove.
21754 (__arm_vcmpltq_f32): Remove.
21755 (__arm_vcmpleq_n_f32): Remove.
21756 (__arm_vcmpleq_f32): Remove.
21757 (__arm_vcmpgtq_n_f32): Remove.
21758 (__arm_vcmpgtq_f32): Remove.
21759 (__arm_vcmpgeq_n_f32): Remove.
21760 (__arm_vcmpgeq_f32): Remove.
21761 (__arm_vcmpeqq_n_f32): Remove.
21762 (__arm_vcmpeqq_f32): Remove.
21763 (__arm_vcmpeqq_m_f16): Remove.
21764 (__arm_vcmpeqq_m_f32): Remove.
21765 (__arm_vcmpeqq_m_n_f16): Remove.
21766 (__arm_vcmpgeq_m_f16): Remove.
21767 (__arm_vcmpgeq_m_n_f16): Remove.
21768 (__arm_vcmpgtq_m_f16): Remove.
21769 (__arm_vcmpgtq_m_n_f16): Remove.
21770 (__arm_vcmpleq_m_f16): Remove.
21771 (__arm_vcmpleq_m_n_f16): Remove.
21772 (__arm_vcmpltq_m_f16): Remove.
21773 (__arm_vcmpltq_m_n_f16): Remove.
21774 (__arm_vcmpneq_m_f16): Remove.
21775 (__arm_vcmpneq_m_n_f16): Remove.
21776 (__arm_vcmpeqq_m_n_f32): Remove.
21777 (__arm_vcmpgeq_m_f32): Remove.
21778 (__arm_vcmpgeq_m_n_f32): Remove.
21779 (__arm_vcmpgtq_m_f32): Remove.
21780 (__arm_vcmpgtq_m_n_f32): Remove.
21781 (__arm_vcmpleq_m_f32): Remove.
21782 (__arm_vcmpleq_m_n_f32): Remove.
21783 (__arm_vcmpltq_m_f32): Remove.
21784 (__arm_vcmpltq_m_n_f32): Remove.
21785 (__arm_vcmpneq_m_f32): Remove.
21786 (__arm_vcmpneq_m_n_f32): Remove.
21787 (__arm_vcmpneq): Remove.
21788 (__arm_vcmphiq): Remove.
21789 (__arm_vcmpeqq): Remove.
21790 (__arm_vcmpcsq): Remove.
21791 (__arm_vcmpltq): Remove.
21792 (__arm_vcmpleq): Remove.
21793 (__arm_vcmpgtq): Remove.
21794 (__arm_vcmpgeq): Remove.
21795 (__arm_vcmpneq_m): Remove.
21796 (__arm_vcmphiq_m): Remove.
21797 (__arm_vcmpeqq_m): Remove.
21798 (__arm_vcmpcsq_m): Remove.
21799 (__arm_vcmpltq_m): Remove.
21800 (__arm_vcmpleq_m): Remove.
21801 (__arm_vcmpgtq_m): Remove.
21802 (__arm_vcmpgeq_m): Remove.
21804 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21806 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
21807 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
21809 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
21811 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
21812 (MVE_CMP_M_N_F, mve_cmp_op1): New.
21815 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
21816 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
21817 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
21818 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
21819 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
21820 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
21821 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
21822 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
21823 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
21824 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
21826 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
21827 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
21828 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
21829 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
21830 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
21832 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
21833 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
21834 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
21835 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
21836 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
21838 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
21840 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
21841 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
21842 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
21845 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
21847 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
21848 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
21849 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
21850 Simplify parity(rotate(x,y)) as parity(x).
21852 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21854 * config/riscv/autovec.md (@vec_series<mode>): New pattern
21855 * config/riscv/riscv-protos.h (expand_vec_series): New function.
21856 * config/riscv/riscv-v.cc (emit_binop): Ditto.
21857 (emit_index_op): Ditto.
21858 (expand_vec_series): Ditto.
21859 (expand_const_vector): Add series vector handling.
21860 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
21862 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
21864 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
21865 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
21866 (*concat<mode><dwi>3_2): Likewise.
21867 (*concat<mode><dwi>3_3): Likewise.
21868 (*concat<mode><dwi>3_4): Likewise.
21869 (*concat<mode><dwi>3_5): Likewise.
21870 (*concat<mode><dwi>3_6): Likewise.
21871 (*concat<mode><dwi>3_7): Likewise.
21873 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
21876 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
21877 (<insn>v4qiv4hi2): New expander.
21878 (<insn>v2hiv2si2): Ditto.
21879 (<insn>v2qiv2si2): Ditto.
21880 (<insn>v2qiv2hi2): Ditto.
21882 2023-05-10 Jeff Law <jlaw@ventanamicro>
21884 * config/h8300/constraints.md (Q): Make this a special memory
21888 2023-05-10 Jakub Jelinek <jakub@redhat.com>
21891 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
21892 if t is void_list_node.
21894 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21896 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
21897 (aarch64_sqmovun<mode>_insn_be): Delete.
21898 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
21899 (aarch64_sqmovun<mode>): Delete expander.
21901 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21904 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
21906 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
21907 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
21908 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
21910 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21913 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
21915 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
21916 (aarch64_<sur>qadd<mode>): Rename to...
21917 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
21919 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21921 * config/aarch64/aarch64-simd.md
21922 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
21923 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
21924 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
21925 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
21927 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21930 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
21931 (aarch64_xtn<mode>_insn_be): Likewise.
21932 (trunc<mode><Vnarrowq>2): Rename to...
21933 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
21934 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
21935 (aarch64_<su>qmovn<mode>): Likewise.
21936 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
21937 (aarch64_<su>qmovn<mode>_insn_le): Delete.
21938 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
21940 2023-05-10 Li Xu <xuli1@eswincomputing.com>
21942 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
21943 intruction replace null avl with (const_int 0).
21945 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21947 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
21950 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21953 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
21954 (source_equal_p): Fix dead loop in vsetvl avl checking.
21956 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
21958 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
21959 of modeadjusted_dccr.
21961 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
21963 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
21964 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
21965 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
21966 * config/arm/arm-mve-builtins.cc
21967 (function_instance::has_inactive_argument): Handle vmaxaq and
21969 * config/arm/arm_mve.h (vminaq): Remove.
21971 (vminaq_m): Remove.
21972 (vmaxaq_m): Remove.
21973 (vminaq_s8): Remove.
21974 (vmaxaq_s8): Remove.
21975 (vminaq_s16): Remove.
21976 (vmaxaq_s16): Remove.
21977 (vminaq_s32): Remove.
21978 (vmaxaq_s32): Remove.
21979 (vminaq_m_s8): Remove.
21980 (vmaxaq_m_s8): Remove.
21981 (vminaq_m_s16): Remove.
21982 (vmaxaq_m_s16): Remove.
21983 (vminaq_m_s32): Remove.
21984 (vmaxaq_m_s32): Remove.
21985 (__arm_vminaq_s8): Remove.
21986 (__arm_vmaxaq_s8): Remove.
21987 (__arm_vminaq_s16): Remove.
21988 (__arm_vmaxaq_s16): Remove.
21989 (__arm_vminaq_s32): Remove.
21990 (__arm_vmaxaq_s32): Remove.
21991 (__arm_vminaq_m_s8): Remove.
21992 (__arm_vmaxaq_m_s8): Remove.
21993 (__arm_vminaq_m_s16): Remove.
21994 (__arm_vmaxaq_m_s16): Remove.
21995 (__arm_vminaq_m_s32): Remove.
21996 (__arm_vmaxaq_m_s32): Remove.
21997 (__arm_vminaq): Remove.
21998 (__arm_vmaxaq): Remove.
21999 (__arm_vminaq_m): Remove.
22000 (__arm_vmaxaq_m): Remove.
22002 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22004 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
22006 (mve_insn): Add vmaxa, vmina.
22007 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
22008 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
22010 (@mve_<mve_insn>q_<supf><mode>): ... this.
22011 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
22012 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22014 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22016 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
22017 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
22019 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22021 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
22022 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
22023 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
22024 * config/arm/arm-mve-builtins.cc
22025 (function_instance::has_inactive_argument): Handle vmaxnmaq and
22027 * config/arm/arm_mve.h (vminnmaq): Remove.
22028 (vmaxnmaq): Remove.
22029 (vmaxnmaq_m): Remove.
22030 (vminnmaq_m): Remove.
22031 (vminnmaq_f16): Remove.
22032 (vmaxnmaq_f16): Remove.
22033 (vminnmaq_f32): Remove.
22034 (vmaxnmaq_f32): Remove.
22035 (vmaxnmaq_m_f16): Remove.
22036 (vminnmaq_m_f16): Remove.
22037 (vmaxnmaq_m_f32): Remove.
22038 (vminnmaq_m_f32): Remove.
22039 (__arm_vminnmaq_f16): Remove.
22040 (__arm_vmaxnmaq_f16): Remove.
22041 (__arm_vminnmaq_f32): Remove.
22042 (__arm_vmaxnmaq_f32): Remove.
22043 (__arm_vmaxnmaq_m_f16): Remove.
22044 (__arm_vminnmaq_m_f16): Remove.
22045 (__arm_vmaxnmaq_m_f32): Remove.
22046 (__arm_vminnmaq_m_f32): Remove.
22047 (__arm_vminnmaq): Remove.
22048 (__arm_vmaxnmaq): Remove.
22049 (__arm_vmaxnmaq_m): Remove.
22050 (__arm_vminnmaq_m): Remove.
22052 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22054 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
22055 (MVE_VMAXNMA_VMINNMAQ_M): New.
22056 (mve_insn): Add vmaxnma, vminnma.
22057 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
22059 (@mve_<mve_insn>q_f<mode>): ... this.
22060 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
22061 (@mve_<mve_insn>q_m_f<mode>): ... this.
22063 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22065 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
22066 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
22067 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
22068 (vminnmavq, vminnmvq): New.
22069 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
22070 (vminnmavq, vminnmvq): New.
22071 * config/arm/arm_mve.h (vminnmvq): Remove.
22072 (vminnmavq): Remove.
22073 (vmaxnmvq): Remove.
22074 (vmaxnmavq): Remove.
22075 (vmaxnmavq_p): Remove.
22076 (vmaxnmvq_p): Remove.
22077 (vminnmavq_p): Remove.
22078 (vminnmvq_p): Remove.
22079 (vminnmvq_f16): Remove.
22080 (vminnmavq_f16): Remove.
22081 (vmaxnmvq_f16): Remove.
22082 (vmaxnmavq_f16): Remove.
22083 (vminnmvq_f32): Remove.
22084 (vminnmavq_f32): Remove.
22085 (vmaxnmvq_f32): Remove.
22086 (vmaxnmavq_f32): Remove.
22087 (vmaxnmavq_p_f16): Remove.
22088 (vmaxnmvq_p_f16): Remove.
22089 (vminnmavq_p_f16): Remove.
22090 (vminnmvq_p_f16): Remove.
22091 (vmaxnmavq_p_f32): Remove.
22092 (vmaxnmvq_p_f32): Remove.
22093 (vminnmavq_p_f32): Remove.
22094 (vminnmvq_p_f32): Remove.
22095 (__arm_vminnmvq_f16): Remove.
22096 (__arm_vminnmavq_f16): Remove.
22097 (__arm_vmaxnmvq_f16): Remove.
22098 (__arm_vmaxnmavq_f16): Remove.
22099 (__arm_vminnmvq_f32): Remove.
22100 (__arm_vminnmavq_f32): Remove.
22101 (__arm_vmaxnmvq_f32): Remove.
22102 (__arm_vmaxnmavq_f32): Remove.
22103 (__arm_vmaxnmavq_p_f16): Remove.
22104 (__arm_vmaxnmvq_p_f16): Remove.
22105 (__arm_vminnmavq_p_f16): Remove.
22106 (__arm_vminnmvq_p_f16): Remove.
22107 (__arm_vmaxnmavq_p_f32): Remove.
22108 (__arm_vmaxnmvq_p_f32): Remove.
22109 (__arm_vminnmavq_p_f32): Remove.
22110 (__arm_vminnmvq_p_f32): Remove.
22111 (__arm_vminnmvq): Remove.
22112 (__arm_vminnmavq): Remove.
22113 (__arm_vmaxnmvq): Remove.
22114 (__arm_vmaxnmavq): Remove.
22115 (__arm_vmaxnmavq_p): Remove.
22116 (__arm_vmaxnmvq_p): Remove.
22117 (__arm_vminnmavq_p): Remove.
22118 (__arm_vminnmvq_p): Remove.
22119 (__arm_vmaxnmavq_m): Remove.
22120 (__arm_vmaxnmvq_m): Remove.
22122 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22124 * config/arm/arm-mve-builtins-functions.h
22125 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
22127 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22129 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
22130 (MVE_VMAXNMxV_MINNMxVQ_P): New.
22131 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
22132 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
22133 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
22134 (@mve_<mve_insn>q_f<mode>): ... this.
22135 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
22136 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
22137 (@mve_<mve_insn>q_p_f<mode>): ... this.
22139 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22141 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
22142 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
22143 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
22144 * config/arm/arm_mve.h (vminnmq): Remove.
22146 (vmaxnmq_m): Remove.
22147 (vminnmq_m): Remove.
22148 (vminnmq_x): Remove.
22149 (vmaxnmq_x): Remove.
22150 (vminnmq_f16): Remove.
22151 (vmaxnmq_f16): Remove.
22152 (vminnmq_f32): Remove.
22153 (vmaxnmq_f32): Remove.
22154 (vmaxnmq_m_f32): Remove.
22155 (vmaxnmq_m_f16): Remove.
22156 (vminnmq_m_f32): Remove.
22157 (vminnmq_m_f16): Remove.
22158 (vminnmq_x_f16): Remove.
22159 (vminnmq_x_f32): Remove.
22160 (vmaxnmq_x_f16): Remove.
22161 (vmaxnmq_x_f32): Remove.
22162 (__arm_vminnmq_f16): Remove.
22163 (__arm_vmaxnmq_f16): Remove.
22164 (__arm_vminnmq_f32): Remove.
22165 (__arm_vmaxnmq_f32): Remove.
22166 (__arm_vmaxnmq_m_f32): Remove.
22167 (__arm_vmaxnmq_m_f16): Remove.
22168 (__arm_vminnmq_m_f32): Remove.
22169 (__arm_vminnmq_m_f16): Remove.
22170 (__arm_vminnmq_x_f16): Remove.
22171 (__arm_vminnmq_x_f32): Remove.
22172 (__arm_vmaxnmq_x_f16): Remove.
22173 (__arm_vmaxnmq_x_f32): Remove.
22174 (__arm_vminnmq): Remove.
22175 (__arm_vmaxnmq): Remove.
22176 (__arm_vmaxnmq_m): Remove.
22177 (__arm_vminnmq_m): Remove.
22178 (__arm_vminnmq_x): Remove.
22179 (__arm_vmaxnmq_x): Remove.
22181 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22183 * config/arm/iterators.md (MAX_MIN_F): New.
22184 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
22185 (mve_insn): Add vmaxnm, vminnm.
22186 (max_min_f_str): New.
22187 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
22189 (@mve_<max_min_f_str>q_f<mode>): ... this.
22190 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
22191 (@mve_<mve_insn>q_m_f<mode>): ... this.
22193 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22195 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
22196 (smax<mode>3): Likewise.
22198 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22200 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
22201 (FUNCTION_PRED_P_S): New.
22202 (vmaxavq, vminavq, vmaxvq, vminvq): New.
22203 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
22205 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
22207 * config/arm/arm_mve.h (vminvq): Remove.
22209 (vminvq_p): Remove.
22210 (vmaxvq_p): Remove.
22211 (vminvq_u8): Remove.
22212 (vmaxvq_u8): Remove.
22213 (vminvq_s8): Remove.
22214 (vmaxvq_s8): Remove.
22215 (vminvq_u16): Remove.
22216 (vmaxvq_u16): Remove.
22217 (vminvq_s16): Remove.
22218 (vmaxvq_s16): Remove.
22219 (vminvq_u32): Remove.
22220 (vmaxvq_u32): Remove.
22221 (vminvq_s32): Remove.
22222 (vmaxvq_s32): Remove.
22223 (vminvq_p_u8): Remove.
22224 (vmaxvq_p_u8): Remove.
22225 (vminvq_p_s8): Remove.
22226 (vmaxvq_p_s8): Remove.
22227 (vminvq_p_u16): Remove.
22228 (vmaxvq_p_u16): Remove.
22229 (vminvq_p_s16): Remove.
22230 (vmaxvq_p_s16): Remove.
22231 (vminvq_p_u32): Remove.
22232 (vmaxvq_p_u32): Remove.
22233 (vminvq_p_s32): Remove.
22234 (vmaxvq_p_s32): Remove.
22235 (__arm_vminvq_u8): Remove.
22236 (__arm_vmaxvq_u8): Remove.
22237 (__arm_vminvq_s8): Remove.
22238 (__arm_vmaxvq_s8): Remove.
22239 (__arm_vminvq_u16): Remove.
22240 (__arm_vmaxvq_u16): Remove.
22241 (__arm_vminvq_s16): Remove.
22242 (__arm_vmaxvq_s16): Remove.
22243 (__arm_vminvq_u32): Remove.
22244 (__arm_vmaxvq_u32): Remove.
22245 (__arm_vminvq_s32): Remove.
22246 (__arm_vmaxvq_s32): Remove.
22247 (__arm_vminvq_p_u8): Remove.
22248 (__arm_vmaxvq_p_u8): Remove.
22249 (__arm_vminvq_p_s8): Remove.
22250 (__arm_vmaxvq_p_s8): Remove.
22251 (__arm_vminvq_p_u16): Remove.
22252 (__arm_vmaxvq_p_u16): Remove.
22253 (__arm_vminvq_p_s16): Remove.
22254 (__arm_vmaxvq_p_s16): Remove.
22255 (__arm_vminvq_p_u32): Remove.
22256 (__arm_vmaxvq_p_u32): Remove.
22257 (__arm_vminvq_p_s32): Remove.
22258 (__arm_vmaxvq_p_s32): Remove.
22259 (__arm_vminvq): Remove.
22260 (__arm_vmaxvq): Remove.
22261 (__arm_vminvq_p): Remove.
22262 (__arm_vmaxvq_p): Remove.
22265 (vminavq_p): Remove.
22266 (vmaxavq_p): Remove.
22267 (vminavq_s8): Remove.
22268 (vmaxavq_s8): Remove.
22269 (vminavq_s16): Remove.
22270 (vmaxavq_s16): Remove.
22271 (vminavq_s32): Remove.
22272 (vmaxavq_s32): Remove.
22273 (vminavq_p_s8): Remove.
22274 (vmaxavq_p_s8): Remove.
22275 (vminavq_p_s16): Remove.
22276 (vmaxavq_p_s16): Remove.
22277 (vminavq_p_s32): Remove.
22278 (vmaxavq_p_s32): Remove.
22279 (__arm_vminavq_s8): Remove.
22280 (__arm_vmaxavq_s8): Remove.
22281 (__arm_vminavq_s16): Remove.
22282 (__arm_vmaxavq_s16): Remove.
22283 (__arm_vminavq_s32): Remove.
22284 (__arm_vmaxavq_s32): Remove.
22285 (__arm_vminavq_p_s8): Remove.
22286 (__arm_vmaxavq_p_s8): Remove.
22287 (__arm_vminavq_p_s16): Remove.
22288 (__arm_vmaxavq_p_s16): Remove.
22289 (__arm_vminavq_p_s32): Remove.
22290 (__arm_vmaxavq_p_s32): Remove.
22291 (__arm_vminavq): Remove.
22292 (__arm_vmaxavq): Remove.
22293 (__arm_vminavq_p): Remove.
22294 (__arm_vmaxavq_p): Remove.
22296 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22298 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
22299 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
22300 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
22301 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
22302 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
22303 (@mve_<mve_insn>q_<supf><mode>): ... this.
22304 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
22305 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
22306 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
22308 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22310 * config/arm/arm-mve-builtins-functions.h (class
22311 unspec_mve_function_exact_insn_pred_p): New.
22313 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22315 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
22316 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
22318 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22320 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
22321 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
22323 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
22325 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
22327 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
22328 (ADJUST_REG_ALLOC_ORDER): Likewise.
22329 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
22331 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
22332 Upa rather than Upl for unpredicated movprfx alternatives.
22334 2023-05-09 Jeff Law <jlaw@ventanamicro>
22336 * config/h8300/testcompare.md: Add peephole2 which uses a memory
22337 load to set flags, thus eliminating a compare against zero.
22339 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22341 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
22342 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
22343 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
22344 * config/arm/arm_mve.h (vshlltq): Remove.
22346 (vshllbq_m): Remove.
22347 (vshlltq_m): Remove.
22348 (vshllbq_x): Remove.
22349 (vshlltq_x): Remove.
22350 (vshlltq_n_u8): Remove.
22351 (vshllbq_n_u8): Remove.
22352 (vshlltq_n_s8): Remove.
22353 (vshllbq_n_s8): Remove.
22354 (vshlltq_n_u16): Remove.
22355 (vshllbq_n_u16): Remove.
22356 (vshlltq_n_s16): Remove.
22357 (vshllbq_n_s16): Remove.
22358 (vshllbq_m_n_s8): Remove.
22359 (vshllbq_m_n_s16): Remove.
22360 (vshllbq_m_n_u8): Remove.
22361 (vshllbq_m_n_u16): Remove.
22362 (vshlltq_m_n_s8): Remove.
22363 (vshlltq_m_n_s16): Remove.
22364 (vshlltq_m_n_u8): Remove.
22365 (vshlltq_m_n_u16): Remove.
22366 (vshllbq_x_n_s8): Remove.
22367 (vshllbq_x_n_s16): Remove.
22368 (vshllbq_x_n_u8): Remove.
22369 (vshllbq_x_n_u16): Remove.
22370 (vshlltq_x_n_s8): Remove.
22371 (vshlltq_x_n_s16): Remove.
22372 (vshlltq_x_n_u8): Remove.
22373 (vshlltq_x_n_u16): Remove.
22374 (__arm_vshlltq_n_u8): Remove.
22375 (__arm_vshllbq_n_u8): Remove.
22376 (__arm_vshlltq_n_s8): Remove.
22377 (__arm_vshllbq_n_s8): Remove.
22378 (__arm_vshlltq_n_u16): Remove.
22379 (__arm_vshllbq_n_u16): Remove.
22380 (__arm_vshlltq_n_s16): Remove.
22381 (__arm_vshllbq_n_s16): Remove.
22382 (__arm_vshllbq_m_n_s8): Remove.
22383 (__arm_vshllbq_m_n_s16): Remove.
22384 (__arm_vshllbq_m_n_u8): Remove.
22385 (__arm_vshllbq_m_n_u16): Remove.
22386 (__arm_vshlltq_m_n_s8): Remove.
22387 (__arm_vshlltq_m_n_s16): Remove.
22388 (__arm_vshlltq_m_n_u8): Remove.
22389 (__arm_vshlltq_m_n_u16): Remove.
22390 (__arm_vshllbq_x_n_s8): Remove.
22391 (__arm_vshllbq_x_n_s16): Remove.
22392 (__arm_vshllbq_x_n_u8): Remove.
22393 (__arm_vshllbq_x_n_u16): Remove.
22394 (__arm_vshlltq_x_n_s8): Remove.
22395 (__arm_vshlltq_x_n_s16): Remove.
22396 (__arm_vshlltq_x_n_u8): Remove.
22397 (__arm_vshlltq_x_n_u16): Remove.
22398 (__arm_vshlltq): Remove.
22399 (__arm_vshllbq): Remove.
22400 (__arm_vshllbq_m): Remove.
22401 (__arm_vshlltq_m): Remove.
22402 (__arm_vshllbq_x): Remove.
22403 (__arm_vshlltq_x): Remove.
22405 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22407 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
22408 (VSHLLBQ_N, VSHLLTQ_N): Remove.
22410 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
22411 (VSHLLxQ_M_N): New.
22412 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
22413 (mve_vshlltq_n_<supf><mode>): Merge into ...
22414 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22415 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
22417 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22419 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22421 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
22422 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
22424 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22426 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
22427 (vqmovntq, vqmovunbq, vqmovuntq): New.
22428 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
22429 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
22430 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
22431 (vqmovntq, vqmovunbq, vqmovuntq): New.
22432 * config/arm/arm-mve-builtins.cc
22433 (function_instance::has_inactive_argument): Handle vmovnbq,
22434 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
22435 * config/arm/arm_mve.h (vqmovntq): Remove.
22436 (vqmovnbq): Remove.
22437 (vqmovnbq_m): Remove.
22438 (vqmovntq_m): Remove.
22439 (vqmovntq_u16): Remove.
22440 (vqmovnbq_u16): Remove.
22441 (vqmovntq_s16): Remove.
22442 (vqmovnbq_s16): Remove.
22443 (vqmovntq_u32): Remove.
22444 (vqmovnbq_u32): Remove.
22445 (vqmovntq_s32): Remove.
22446 (vqmovnbq_s32): Remove.
22447 (vqmovnbq_m_s16): Remove.
22448 (vqmovntq_m_s16): Remove.
22449 (vqmovnbq_m_u16): Remove.
22450 (vqmovntq_m_u16): Remove.
22451 (vqmovnbq_m_s32): Remove.
22452 (vqmovntq_m_s32): Remove.
22453 (vqmovnbq_m_u32): Remove.
22454 (vqmovntq_m_u32): Remove.
22455 (__arm_vqmovntq_u16): Remove.
22456 (__arm_vqmovnbq_u16): Remove.
22457 (__arm_vqmovntq_s16): Remove.
22458 (__arm_vqmovnbq_s16): Remove.
22459 (__arm_vqmovntq_u32): Remove.
22460 (__arm_vqmovnbq_u32): Remove.
22461 (__arm_vqmovntq_s32): Remove.
22462 (__arm_vqmovnbq_s32): Remove.
22463 (__arm_vqmovnbq_m_s16): Remove.
22464 (__arm_vqmovntq_m_s16): Remove.
22465 (__arm_vqmovnbq_m_u16): Remove.
22466 (__arm_vqmovntq_m_u16): Remove.
22467 (__arm_vqmovnbq_m_s32): Remove.
22468 (__arm_vqmovntq_m_s32): Remove.
22469 (__arm_vqmovnbq_m_u32): Remove.
22470 (__arm_vqmovntq_m_u32): Remove.
22471 (__arm_vqmovntq): Remove.
22472 (__arm_vqmovnbq): Remove.
22473 (__arm_vqmovnbq_m): Remove.
22474 (__arm_vqmovntq_m): Remove.
22477 (vmovnbq_m): Remove.
22478 (vmovntq_m): Remove.
22479 (vmovntq_u16): Remove.
22480 (vmovnbq_u16): Remove.
22481 (vmovntq_s16): Remove.
22482 (vmovnbq_s16): Remove.
22483 (vmovntq_u32): Remove.
22484 (vmovnbq_u32): Remove.
22485 (vmovntq_s32): Remove.
22486 (vmovnbq_s32): Remove.
22487 (vmovnbq_m_s16): Remove.
22488 (vmovntq_m_s16): Remove.
22489 (vmovnbq_m_u16): Remove.
22490 (vmovntq_m_u16): Remove.
22491 (vmovnbq_m_s32): Remove.
22492 (vmovntq_m_s32): Remove.
22493 (vmovnbq_m_u32): Remove.
22494 (vmovntq_m_u32): Remove.
22495 (__arm_vmovntq_u16): Remove.
22496 (__arm_vmovnbq_u16): Remove.
22497 (__arm_vmovntq_s16): Remove.
22498 (__arm_vmovnbq_s16): Remove.
22499 (__arm_vmovntq_u32): Remove.
22500 (__arm_vmovnbq_u32): Remove.
22501 (__arm_vmovntq_s32): Remove.
22502 (__arm_vmovnbq_s32): Remove.
22503 (__arm_vmovnbq_m_s16): Remove.
22504 (__arm_vmovntq_m_s16): Remove.
22505 (__arm_vmovnbq_m_u16): Remove.
22506 (__arm_vmovntq_m_u16): Remove.
22507 (__arm_vmovnbq_m_s32): Remove.
22508 (__arm_vmovntq_m_s32): Remove.
22509 (__arm_vmovnbq_m_u32): Remove.
22510 (__arm_vmovntq_m_u32): Remove.
22511 (__arm_vmovntq): Remove.
22512 (__arm_vmovnbq): Remove.
22513 (__arm_vmovnbq_m): Remove.
22514 (__arm_vmovntq_m): Remove.
22515 (vqmovuntq): Remove.
22516 (vqmovunbq): Remove.
22517 (vqmovunbq_m): Remove.
22518 (vqmovuntq_m): Remove.
22519 (vqmovuntq_s16): Remove.
22520 (vqmovunbq_s16): Remove.
22521 (vqmovuntq_s32): Remove.
22522 (vqmovunbq_s32): Remove.
22523 (vqmovunbq_m_s16): Remove.
22524 (vqmovuntq_m_s16): Remove.
22525 (vqmovunbq_m_s32): Remove.
22526 (vqmovuntq_m_s32): Remove.
22527 (__arm_vqmovuntq_s16): Remove.
22528 (__arm_vqmovunbq_s16): Remove.
22529 (__arm_vqmovuntq_s32): Remove.
22530 (__arm_vqmovunbq_s32): Remove.
22531 (__arm_vqmovunbq_m_s16): Remove.
22532 (__arm_vqmovuntq_m_s16): Remove.
22533 (__arm_vqmovunbq_m_s32): Remove.
22534 (__arm_vqmovuntq_m_s32): Remove.
22535 (__arm_vqmovuntq): Remove.
22536 (__arm_vqmovunbq): Remove.
22537 (__arm_vqmovunbq_m): Remove.
22538 (__arm_vqmovuntq_m): Remove.
22540 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22542 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
22543 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
22546 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
22548 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
22549 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
22550 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
22551 (mve_vqmovuntq_s<mode>): Merge into ...
22552 (@mve_<mve_insn>q_<supf><mode>): ... this.
22553 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
22554 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
22555 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
22556 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22558 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22560 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
22561 (binary_move_narrow_unsigned): New.
22562 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
22563 (binary_move_narrow_unsigned): New.
22565 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22567 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
22568 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
22569 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
22570 (vrndpq, vrndq, vrndxq): New.
22571 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
22572 (vrndpq, vrndq, vrndxq): New.
22573 * config/arm/arm_mve.h (vrndxq): Remove.
22579 (vrndaq_m): Remove.
22580 (vrndmq_m): Remove.
22581 (vrndnq_m): Remove.
22582 (vrndpq_m): Remove.
22584 (vrndxq_m): Remove.
22586 (vrndnq_x): Remove.
22587 (vrndmq_x): Remove.
22588 (vrndpq_x): Remove.
22589 (vrndaq_x): Remove.
22590 (vrndxq_x): Remove.
22591 (vrndxq_f16): Remove.
22592 (vrndxq_f32): Remove.
22593 (vrndq_f16): Remove.
22594 (vrndq_f32): Remove.
22595 (vrndpq_f16): Remove.
22596 (vrndpq_f32): Remove.
22597 (vrndnq_f16): Remove.
22598 (vrndnq_f32): Remove.
22599 (vrndmq_f16): Remove.
22600 (vrndmq_f32): Remove.
22601 (vrndaq_f16): Remove.
22602 (vrndaq_f32): Remove.
22603 (vrndaq_m_f16): Remove.
22604 (vrndmq_m_f16): Remove.
22605 (vrndnq_m_f16): Remove.
22606 (vrndpq_m_f16): Remove.
22607 (vrndq_m_f16): Remove.
22608 (vrndxq_m_f16): Remove.
22609 (vrndaq_m_f32): Remove.
22610 (vrndmq_m_f32): Remove.
22611 (vrndnq_m_f32): Remove.
22612 (vrndpq_m_f32): Remove.
22613 (vrndq_m_f32): Remove.
22614 (vrndxq_m_f32): Remove.
22615 (vrndq_x_f16): Remove.
22616 (vrndq_x_f32): Remove.
22617 (vrndnq_x_f16): Remove.
22618 (vrndnq_x_f32): Remove.
22619 (vrndmq_x_f16): Remove.
22620 (vrndmq_x_f32): Remove.
22621 (vrndpq_x_f16): Remove.
22622 (vrndpq_x_f32): Remove.
22623 (vrndaq_x_f16): Remove.
22624 (vrndaq_x_f32): Remove.
22625 (vrndxq_x_f16): Remove.
22626 (vrndxq_x_f32): Remove.
22627 (__arm_vrndxq_f16): Remove.
22628 (__arm_vrndxq_f32): Remove.
22629 (__arm_vrndq_f16): Remove.
22630 (__arm_vrndq_f32): Remove.
22631 (__arm_vrndpq_f16): Remove.
22632 (__arm_vrndpq_f32): Remove.
22633 (__arm_vrndnq_f16): Remove.
22634 (__arm_vrndnq_f32): Remove.
22635 (__arm_vrndmq_f16): Remove.
22636 (__arm_vrndmq_f32): Remove.
22637 (__arm_vrndaq_f16): Remove.
22638 (__arm_vrndaq_f32): Remove.
22639 (__arm_vrndaq_m_f16): Remove.
22640 (__arm_vrndmq_m_f16): Remove.
22641 (__arm_vrndnq_m_f16): Remove.
22642 (__arm_vrndpq_m_f16): Remove.
22643 (__arm_vrndq_m_f16): Remove.
22644 (__arm_vrndxq_m_f16): Remove.
22645 (__arm_vrndaq_m_f32): Remove.
22646 (__arm_vrndmq_m_f32): Remove.
22647 (__arm_vrndnq_m_f32): Remove.
22648 (__arm_vrndpq_m_f32): Remove.
22649 (__arm_vrndq_m_f32): Remove.
22650 (__arm_vrndxq_m_f32): Remove.
22651 (__arm_vrndq_x_f16): Remove.
22652 (__arm_vrndq_x_f32): Remove.
22653 (__arm_vrndnq_x_f16): Remove.
22654 (__arm_vrndnq_x_f32): Remove.
22655 (__arm_vrndmq_x_f16): Remove.
22656 (__arm_vrndmq_x_f32): Remove.
22657 (__arm_vrndpq_x_f16): Remove.
22658 (__arm_vrndpq_x_f32): Remove.
22659 (__arm_vrndaq_x_f16): Remove.
22660 (__arm_vrndaq_x_f32): Remove.
22661 (__arm_vrndxq_x_f16): Remove.
22662 (__arm_vrndxq_x_f32): Remove.
22663 (__arm_vrndxq): Remove.
22664 (__arm_vrndq): Remove.
22665 (__arm_vrndpq): Remove.
22666 (__arm_vrndnq): Remove.
22667 (__arm_vrndmq): Remove.
22668 (__arm_vrndaq): Remove.
22669 (__arm_vrndaq_m): Remove.
22670 (__arm_vrndmq_m): Remove.
22671 (__arm_vrndnq_m): Remove.
22672 (__arm_vrndpq_m): Remove.
22673 (__arm_vrndq_m): Remove.
22674 (__arm_vrndxq_m): Remove.
22675 (__arm_vrndq_x): Remove.
22676 (__arm_vrndnq_x): Remove.
22677 (__arm_vrndmq_x): Remove.
22678 (__arm_vrndpq_x): Remove.
22679 (__arm_vrndaq_x): Remove.
22680 (__arm_vrndxq_x): Remove.
22682 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22684 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
22685 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
22686 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
22687 (vclzq, vqabsq, vqnegq): New.
22688 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
22689 (vqabsq, vqnegq): New.
22690 * config/arm/arm_mve.h (vabsq): Remove.
22693 (vabsq_f16): Remove.
22694 (vabsq_f32): Remove.
22695 (vabsq_s8): Remove.
22696 (vabsq_s16): Remove.
22697 (vabsq_s32): Remove.
22698 (vabsq_m_s8): Remove.
22699 (vabsq_m_s16): Remove.
22700 (vabsq_m_s32): Remove.
22701 (vabsq_m_f16): Remove.
22702 (vabsq_m_f32): Remove.
22703 (vabsq_x_s8): Remove.
22704 (vabsq_x_s16): Remove.
22705 (vabsq_x_s32): Remove.
22706 (vabsq_x_f16): Remove.
22707 (vabsq_x_f32): Remove.
22708 (__arm_vabsq_s8): Remove.
22709 (__arm_vabsq_s16): Remove.
22710 (__arm_vabsq_s32): Remove.
22711 (__arm_vabsq_m_s8): Remove.
22712 (__arm_vabsq_m_s16): Remove.
22713 (__arm_vabsq_m_s32): Remove.
22714 (__arm_vabsq_x_s8): Remove.
22715 (__arm_vabsq_x_s16): Remove.
22716 (__arm_vabsq_x_s32): Remove.
22717 (__arm_vabsq_f16): Remove.
22718 (__arm_vabsq_f32): Remove.
22719 (__arm_vabsq_m_f16): Remove.
22720 (__arm_vabsq_m_f32): Remove.
22721 (__arm_vabsq_x_f16): Remove.
22722 (__arm_vabsq_x_f32): Remove.
22723 (__arm_vabsq): Remove.
22724 (__arm_vabsq_m): Remove.
22725 (__arm_vabsq_x): Remove.
22729 (vnegq_f16): Remove.
22730 (vnegq_f32): Remove.
22731 (vnegq_s8): Remove.
22732 (vnegq_s16): Remove.
22733 (vnegq_s32): Remove.
22734 (vnegq_m_s8): Remove.
22735 (vnegq_m_s16): Remove.
22736 (vnegq_m_s32): Remove.
22737 (vnegq_m_f16): Remove.
22738 (vnegq_m_f32): Remove.
22739 (vnegq_x_s8): Remove.
22740 (vnegq_x_s16): Remove.
22741 (vnegq_x_s32): Remove.
22742 (vnegq_x_f16): Remove.
22743 (vnegq_x_f32): Remove.
22744 (__arm_vnegq_s8): Remove.
22745 (__arm_vnegq_s16): Remove.
22746 (__arm_vnegq_s32): Remove.
22747 (__arm_vnegq_m_s8): Remove.
22748 (__arm_vnegq_m_s16): Remove.
22749 (__arm_vnegq_m_s32): Remove.
22750 (__arm_vnegq_x_s8): Remove.
22751 (__arm_vnegq_x_s16): Remove.
22752 (__arm_vnegq_x_s32): Remove.
22753 (__arm_vnegq_f16): Remove.
22754 (__arm_vnegq_f32): Remove.
22755 (__arm_vnegq_m_f16): Remove.
22756 (__arm_vnegq_m_f32): Remove.
22757 (__arm_vnegq_x_f16): Remove.
22758 (__arm_vnegq_x_f32): Remove.
22759 (__arm_vnegq): Remove.
22760 (__arm_vnegq_m): Remove.
22761 (__arm_vnegq_x): Remove.
22765 (vclsq_s8): Remove.
22766 (vclsq_s16): Remove.
22767 (vclsq_s32): Remove.
22768 (vclsq_m_s8): Remove.
22769 (vclsq_m_s16): Remove.
22770 (vclsq_m_s32): Remove.
22771 (vclsq_x_s8): Remove.
22772 (vclsq_x_s16): Remove.
22773 (vclsq_x_s32): Remove.
22774 (__arm_vclsq_s8): Remove.
22775 (__arm_vclsq_s16): Remove.
22776 (__arm_vclsq_s32): Remove.
22777 (__arm_vclsq_m_s8): Remove.
22778 (__arm_vclsq_m_s16): Remove.
22779 (__arm_vclsq_m_s32): Remove.
22780 (__arm_vclsq_x_s8): Remove.
22781 (__arm_vclsq_x_s16): Remove.
22782 (__arm_vclsq_x_s32): Remove.
22783 (__arm_vclsq): Remove.
22784 (__arm_vclsq_m): Remove.
22785 (__arm_vclsq_x): Remove.
22789 (vclzq_s8): Remove.
22790 (vclzq_s16): Remove.
22791 (vclzq_s32): Remove.
22792 (vclzq_u8): Remove.
22793 (vclzq_u16): Remove.
22794 (vclzq_u32): Remove.
22795 (vclzq_m_u8): Remove.
22796 (vclzq_m_s8): Remove.
22797 (vclzq_m_u16): Remove.
22798 (vclzq_m_s16): Remove.
22799 (vclzq_m_u32): Remove.
22800 (vclzq_m_s32): Remove.
22801 (vclzq_x_s8): Remove.
22802 (vclzq_x_s16): Remove.
22803 (vclzq_x_s32): Remove.
22804 (vclzq_x_u8): Remove.
22805 (vclzq_x_u16): Remove.
22806 (vclzq_x_u32): Remove.
22807 (__arm_vclzq_s8): Remove.
22808 (__arm_vclzq_s16): Remove.
22809 (__arm_vclzq_s32): Remove.
22810 (__arm_vclzq_u8): Remove.
22811 (__arm_vclzq_u16): Remove.
22812 (__arm_vclzq_u32): Remove.
22813 (__arm_vclzq_m_u8): Remove.
22814 (__arm_vclzq_m_s8): Remove.
22815 (__arm_vclzq_m_u16): Remove.
22816 (__arm_vclzq_m_s16): Remove.
22817 (__arm_vclzq_m_u32): Remove.
22818 (__arm_vclzq_m_s32): Remove.
22819 (__arm_vclzq_x_s8): Remove.
22820 (__arm_vclzq_x_s16): Remove.
22821 (__arm_vclzq_x_s32): Remove.
22822 (__arm_vclzq_x_u8): Remove.
22823 (__arm_vclzq_x_u16): Remove.
22824 (__arm_vclzq_x_u32): Remove.
22825 (__arm_vclzq): Remove.
22826 (__arm_vclzq_m): Remove.
22827 (__arm_vclzq_x): Remove.
22830 (vqnegq_m): Remove.
22831 (vqabsq_m): Remove.
22832 (vqabsq_s8): Remove.
22833 (vqabsq_s16): Remove.
22834 (vqabsq_s32): Remove.
22835 (vqnegq_s8): Remove.
22836 (vqnegq_s16): Remove.
22837 (vqnegq_s32): Remove.
22838 (vqnegq_m_s8): Remove.
22839 (vqabsq_m_s8): Remove.
22840 (vqnegq_m_s16): Remove.
22841 (vqabsq_m_s16): Remove.
22842 (vqnegq_m_s32): Remove.
22843 (vqabsq_m_s32): Remove.
22844 (__arm_vqabsq_s8): Remove.
22845 (__arm_vqabsq_s16): Remove.
22846 (__arm_vqabsq_s32): Remove.
22847 (__arm_vqnegq_s8): Remove.
22848 (__arm_vqnegq_s16): Remove.
22849 (__arm_vqnegq_s32): Remove.
22850 (__arm_vqnegq_m_s8): Remove.
22851 (__arm_vqabsq_m_s8): Remove.
22852 (__arm_vqnegq_m_s16): Remove.
22853 (__arm_vqabsq_m_s16): Remove.
22854 (__arm_vqnegq_m_s32): Remove.
22855 (__arm_vqabsq_m_s32): Remove.
22856 (__arm_vqabsq): Remove.
22857 (__arm_vqnegq): Remove.
22858 (__arm_vqnegq_m): Remove.
22859 (__arm_vqabsq_m): Remove.
22861 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22863 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
22864 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
22865 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
22866 vrndm, vrndn, vrndp, vrnd, vrndx.
22867 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
22868 VQABSQ_M_S, VQNEGQ_M_S.
22870 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
22871 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
22872 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
22873 (@mve_<mve_insn>q_f<mode>): ... this.
22874 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
22875 (mve_v<absneg_str>q_f<mode>): ... this.
22876 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
22877 (mve_v<absneg_str>q_s<mode>): ... this.
22878 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
22879 (@mve_<mve_insn>q_<supf><mode>): ... this.
22880 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
22881 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
22882 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
22883 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
22884 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
22885 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
22886 (mve_vrndxq_m_f<mode>): Merge into ...
22887 (@mve_<mve_insn>q_m_f<mode>): ... this.
22889 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
22891 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
22892 * config/arm/arm-mve-builtins-shapes.h (unary): New.
22894 2023-05-09 Jakub Jelinek <jakub@redhat.com>
22896 * mux-utils.h: Fix comment typo, avoides -> avoids.
22898 2023-05-09 Jakub Jelinek <jakub@redhat.com>
22900 PR tree-optimization/109778
22901 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
22902 wi::zext (x, width) rather than x if width != precision, rather
22903 than using wi::zext (right, width) after the shift.
22904 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
22905 of wi::lrotate or wi::rrotate.
22907 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
22909 * genmatch.cc (get_out_file): Make static and rename to ...
22910 (choose_output): ... this. Reimplement. Update all uses ...
22911 (decision_tree::gen): ... here and ...
22914 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
22916 * genmatch.cc (showUsage): Reimplement as ...
22917 (usage): ...this. Adjust all uses.
22918 (main): Print usage when no arguments. Add missing 'return 1'.
22920 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
22922 * genmatch.cc (header_file): Make static.
22923 (emit_func): Rename to...
22924 (fp_decl): ... this. Adjust all uses.
22925 (fp_decl_done): New function. Use it...
22926 (decision_tree::gen): ... here and...
22927 (write_predicate): ... here.
22930 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
22932 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
22935 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
22936 Uros Bizjak <ubizjak@gmail.com>
22938 * config/i386/i386.md (any_or_plus): Move definition earlier.
22939 (*insvti_highpart_1): New define_insn_and_split to overwrite
22940 (insv) the highpart of a TImode register/memory.
22942 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
22944 * auto-profile.cc (auto_profile): Check todo from early_inline
22945 to see if cleanup_tree_vfg needs to be called.
22946 (early_inline): Return todo from early_inliner.
22948 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
22950 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
22952 (pass_vsetvl::get_block_info): New.
22953 (pass_vsetvl::update_vector_info): New.
22954 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
22955 (pass_vsetvl::compute_local_backward_infos): Ditto.
22956 (pass_vsetvl::transfer_before): Ditto.
22957 (pass_vsetvl::transfer_after): Ditto.
22958 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
22959 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
22960 (pass_vsetvl::cleanup_insns): Ditto.
22961 (pass_vsetvl::compute_local_backward_infos): Use
22962 update_vector_info.
22964 2023-05-08 Jeff Law <jlaw@ventanamicro>
22966 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
22968 2023-05-08 Richard Biener <rguenther@suse.de>
22969 Michael Meissner <meissner@linux.ibm.com>
22971 PR middle-end/108623
22972 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
22973 Align bit fields > 1 bit to at least an 8-bit boundary.
22975 2023-05-08 Andrew Pinski <apinski@marvell.com>
22977 PR tree-optimization/109424
22978 PR tree-optimization/59424
22979 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
22980 (factor_out_conditional_operation): This and add support for all unary
22982 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
22983 to call factor_out_conditional_operation instead.
22985 2023-05-08 Andrew Pinski <apinski@marvell.com>
22987 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
22988 over factor_out_conditional_conversion.
22990 2023-05-08 Andrew Pinski <apinski@marvell.com>
22992 PR tree-optimization/49959
22993 PR tree-optimization/103771
22994 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
22995 Diamond shapped bb form for factor_out_conditional_conversion.
22997 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22999 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
23000 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
23001 (riscv_vector_get_mask_mode): Ditto.
23002 (get_mask_policy_no_pred): Ditto.
23003 (get_tail_policy_no_pred): Ditto.
23004 (get_mask_mode): New function.
23005 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
23006 (get_tail_policy_no_pred): Ditto.
23007 (riscv_vector_mask_mode_p): Ditto.
23008 (riscv_vector_get_mask_mode): Ditto.
23009 (get_mask_mode): New function.
23010 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
23012 (get_tail_policy_for_pred): Ditto.
23013 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
23014 (get_mask_policy_for_pred): Ditto
23015 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
23017 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
23019 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
23020 (riscv_select_multilib): New.
23021 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
23022 also handle select_by_abi.
23023 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
23024 to select_by_abi_arch_cmodel from 1.
23025 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
23026 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
23028 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
23030 * Makefile.in: (gimple-match-head.o-warn): Remove.
23031 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
23032 gimple-match-exports.cc.
23033 (gimple-match-auto.h): Only depend on s-gimple-match.
23034 (generic-match-auto.h): Likewise.
23036 2023-05-08 Andrew Pinski <apinski@marvell.com>
23038 PR tree-optimization/109691
23039 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
23041 If the removed statement can throw, have need_eh_cleanup
23042 include the bb of that statement.
23043 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
23044 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
23046 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
23047 Initialize dceworklist instead of stmts_to_remove.
23048 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
23049 Destore dceworklist instead of stmts_to_remove.
23050 (substitute_and_fold_dom_walker::before_dom_children):
23051 Set dceworklist instead of adding to stmts_to_remove.
23052 (substitute_and_fold_engine::substitute_and_fold):
23053 Call simple_dce_from_worklist instead of poping
23055 Don't update the stat on removal statements.
23057 2023-05-07 Andrew Pinski <apinski@marvell.com>
23060 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
23061 Change argument type to aarch64_feature_flags.
23062 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
23063 constructor argument type to aarch64_feature_flags.
23064 Change m_old_asm_isa_flags to be aarch64_feature_flags.
23066 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
23068 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
23069 more parallel code if can_create_pseudo_p.
23071 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
23074 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
23075 immediately before moving a multi-word register by parts.
23077 2023-05-06 Jeff Law <jlaw@ventanamicro>
23079 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
23081 2023-05-06 Michael Collison <collison@rivosinc.com>
23083 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
23084 Check that GET_MODE_NUNITS is a multiple of 2.
23086 2023-05-06 Michael Collison <collison@rivosinc.com>
23088 * config/riscv/riscv.cc
23089 (riscv_estimated_poly_value): Implement
23090 TARGET_ESTIMATED_POLY_VALUE.
23091 (riscv_preferred_simd_mode): Implement
23092 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
23093 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
23094 (riscv_empty_mask_is_expensive): Implement
23095 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
23096 (riscv_vectorize_create_costs): Implement
23097 TARGET_VECTORIZE_CREATE_COSTS.
23098 (riscv_support_vector_misalignment): Implement
23099 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
23100 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
23101 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
23102 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
23103 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
23105 2023-05-06 Jeff Law <jlaw@ventanamicro>
23107 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
23108 duplicate definition.
23110 2023-05-06 Michael Collison <collison@rivosinc.com>
23112 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
23113 (riscv_vector_preferred_simd_mode): Ditto.
23114 (get_mask_policy_no_pred): Ditto.
23115 (get_tail_policy_no_pred): Ditto.
23116 (riscv_vector_mask_mode_p): Ditto.
23117 (riscv_vector_get_mask_mode): Ditto.
23119 2023-05-06 Michael Collison <collison@rivosinc.com>
23121 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
23122 Remove static declaration to to make externally visible.
23123 (get_mask_policy_for_pred): Ditto.
23124 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
23125 New external declaration.
23126 (get_mask_policy_for_pred): Ditto.
23128 2023-05-06 Michael Collison <collison@rivosinc.com>
23130 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
23131 (riscv_vector_get_mask_mode): Ditto.
23132 (get_mask_policy_no_pred): Ditto.
23133 (get_tail_policy_no_pred): Ditto.
23135 2023-05-06 Xi Ruoyao <xry111@xry111.site>
23137 * config/loongarch/loongarch.h (struct machine_function): Add
23138 reg_is_wrapped_separately array for register wrapping
23140 * config/loongarch/loongarch.cc
23141 (loongarch_get_separate_components): New function.
23142 (loongarch_components_for_bb): Likewise.
23143 (loongarch_disqualify_components): Likewise.
23144 (loongarch_process_components): Likewise.
23145 (loongarch_emit_prologue_components): Likewise.
23146 (loongarch_emit_epilogue_components): Likewise.
23147 (loongarch_set_handled_components): Likewise.
23148 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
23149 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
23150 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
23151 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
23152 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
23153 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
23154 (loongarch_for_each_saved_reg): Skip registers that are wrapped
23157 2023-05-06 Xi Ruoyao <xry111@xry111.site>
23160 * Makefile.in (s-macro_list): Pass -nostdinc to
23163 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23165 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
23166 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
23167 (preferred_simd_mode): Ditto.
23168 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
23169 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
23170 (riscv_preferred_simd_mode): New function.
23171 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
23172 * config/riscv/vector.md: Add autovec.md.
23173 * config/riscv/autovec.md: New file.
23175 2023-05-06 Jakub Jelinek <jakub@redhat.com>
23177 * real.h (dconst_pi): Define.
23178 (dconst_e_ptr): Formatting fix.
23179 (dconst_pi_ptr): Declare.
23180 * real.cc (dconst_pi_ptr): New function.
23181 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
23182 boundaries range with range computed from sin/cos of the particular
23183 bounds if the argument range is shorter than 2*pi.
23184 (cfn_sincos::op1_range): Take bulps into account when determining
23185 which result ranges are always invalid or behave like known NAN.
23187 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
23189 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
23190 pass type to vrange_storage::equal_p.
23191 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
23192 (irange_storage::equal_p): Same.
23193 (frange_storage::equal_p): Same.
23194 * value-range-storage.h (class frange_storage): Same.
23196 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
23199 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
23200 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
23202 2023-05-06 liuhongt <hongtao.liu@intel.com>
23204 * combine.cc (maybe_swap_commutative_operands): Canonicalize
23205 vec_merge when mask is constant.
23206 * doc/md.texi: Document vec_merge canonicalization.
23208 2023-05-06 Jakub Jelinek <jakub@redhat.com>
23210 * value-range.h (frange_arithmetic): Declare.
23211 * range-op-float.cc (frange_arithmetic): No longer static.
23212 * gimple-range-op.cc (frange_mpfr_arg1): New function.
23213 (cfn_sqrt::fold_range): Intersect the generic boundaries range
23214 with range computed from sqrt of the particular bounds.
23215 (cfn_sqrt::op1_range): Intersect the generic boundaries range
23216 with range computed from squared particular bounds.
23218 2023-05-06 Jakub Jelinek <jakub@redhat.com>
23220 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
23221 earlier with helper variables also renamed.
23222 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
23223 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
23224 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
23226 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
23228 * config/cris/cris.md (splitop): Add PLUS.
23229 * config/cris/cris.cc (cris_split_constant): Also handle
23230 PLUS when a split into two insns may be useful.
23232 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
23234 * config/cris/cris.md (movandsplit1): New define_peephole2.
23236 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
23238 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
23240 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
23242 * doc/md.texi (define_peephole2): Document order of scanning.
23244 2023-05-05 Pan Li <pan2.li@intel.com>
23245 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
23247 * config/riscv/vector.md: Allow const as the operand of RVV
23248 indexed load/store.
23250 2023-05-05 Pan Li <pan2.li@intel.com>
23252 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
23253 consumed by simplify_rtx.
23255 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23257 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
23258 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
23259 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
23260 * config/arm/arm_mve.h (vshrq): Remove.
23262 (vrshrq_m): Remove.
23264 (vrshrq_x): Remove.
23266 (vshrq_n_s8): Remove.
23267 (vshrq_n_s16): Remove.
23268 (vshrq_n_s32): Remove.
23269 (vshrq_n_u8): Remove.
23270 (vshrq_n_u16): Remove.
23271 (vshrq_n_u32): Remove.
23272 (vrshrq_n_u8): Remove.
23273 (vrshrq_n_s8): Remove.
23274 (vrshrq_n_u16): Remove.
23275 (vrshrq_n_s16): Remove.
23276 (vrshrq_n_u32): Remove.
23277 (vrshrq_n_s32): Remove.
23278 (vrshrq_m_n_s8): Remove.
23279 (vrshrq_m_n_s32): Remove.
23280 (vrshrq_m_n_s16): Remove.
23281 (vrshrq_m_n_u8): Remove.
23282 (vrshrq_m_n_u32): Remove.
23283 (vrshrq_m_n_u16): Remove.
23284 (vshrq_m_n_s8): Remove.
23285 (vshrq_m_n_s32): Remove.
23286 (vshrq_m_n_s16): Remove.
23287 (vshrq_m_n_u8): Remove.
23288 (vshrq_m_n_u32): Remove.
23289 (vshrq_m_n_u16): Remove.
23290 (vrshrq_x_n_s8): Remove.
23291 (vrshrq_x_n_s16): Remove.
23292 (vrshrq_x_n_s32): Remove.
23293 (vrshrq_x_n_u8): Remove.
23294 (vrshrq_x_n_u16): Remove.
23295 (vrshrq_x_n_u32): Remove.
23296 (vshrq_x_n_s8): Remove.
23297 (vshrq_x_n_s16): Remove.
23298 (vshrq_x_n_s32): Remove.
23299 (vshrq_x_n_u8): Remove.
23300 (vshrq_x_n_u16): Remove.
23301 (vshrq_x_n_u32): Remove.
23302 (__arm_vshrq_n_s8): Remove.
23303 (__arm_vshrq_n_s16): Remove.
23304 (__arm_vshrq_n_s32): Remove.
23305 (__arm_vshrq_n_u8): Remove.
23306 (__arm_vshrq_n_u16): Remove.
23307 (__arm_vshrq_n_u32): Remove.
23308 (__arm_vrshrq_n_u8): Remove.
23309 (__arm_vrshrq_n_s8): Remove.
23310 (__arm_vrshrq_n_u16): Remove.
23311 (__arm_vrshrq_n_s16): Remove.
23312 (__arm_vrshrq_n_u32): Remove.
23313 (__arm_vrshrq_n_s32): Remove.
23314 (__arm_vrshrq_m_n_s8): Remove.
23315 (__arm_vrshrq_m_n_s32): Remove.
23316 (__arm_vrshrq_m_n_s16): Remove.
23317 (__arm_vrshrq_m_n_u8): Remove.
23318 (__arm_vrshrq_m_n_u32): Remove.
23319 (__arm_vrshrq_m_n_u16): Remove.
23320 (__arm_vshrq_m_n_s8): Remove.
23321 (__arm_vshrq_m_n_s32): Remove.
23322 (__arm_vshrq_m_n_s16): Remove.
23323 (__arm_vshrq_m_n_u8): Remove.
23324 (__arm_vshrq_m_n_u32): Remove.
23325 (__arm_vshrq_m_n_u16): Remove.
23326 (__arm_vrshrq_x_n_s8): Remove.
23327 (__arm_vrshrq_x_n_s16): Remove.
23328 (__arm_vrshrq_x_n_s32): Remove.
23329 (__arm_vrshrq_x_n_u8): Remove.
23330 (__arm_vrshrq_x_n_u16): Remove.
23331 (__arm_vrshrq_x_n_u32): Remove.
23332 (__arm_vshrq_x_n_s8): Remove.
23333 (__arm_vshrq_x_n_s16): Remove.
23334 (__arm_vshrq_x_n_s32): Remove.
23335 (__arm_vshrq_x_n_u8): Remove.
23336 (__arm_vshrq_x_n_u16): Remove.
23337 (__arm_vshrq_x_n_u32): Remove.
23338 (__arm_vshrq): Remove.
23339 (__arm_vrshrq): Remove.
23340 (__arm_vrshrq_m): Remove.
23341 (__arm_vshrq_m): Remove.
23342 (__arm_vrshrq_x): Remove.
23343 (__arm_vshrq_x): Remove.
23345 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23347 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
23348 (mve_insn): Add vrshr, vshr.
23349 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
23350 (mve_vrshrq_n_<supf><mode>): Merge into ...
23351 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23352 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
23354 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23356 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23358 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
23359 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
23361 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23363 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
23364 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
23365 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
23366 (vqrshrunbq, vqrshruntq): New.
23367 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
23368 (vqrshrunbq, vqrshruntq): New.
23369 * config/arm/arm-mve-builtins.cc
23370 (function_instance::has_inactive_argument): Handle vqshrunbq,
23371 vqshruntq, vqrshrunbq, vqrshruntq.
23372 * config/arm/arm_mve.h (vqrshrunbq): Remove.
23373 (vqrshruntq): Remove.
23374 (vqrshrunbq_m): Remove.
23375 (vqrshruntq_m): Remove.
23376 (vqrshrunbq_n_s16): Remove.
23377 (vqrshrunbq_n_s32): Remove.
23378 (vqrshruntq_n_s16): Remove.
23379 (vqrshruntq_n_s32): Remove.
23380 (vqrshrunbq_m_n_s32): Remove.
23381 (vqrshrunbq_m_n_s16): Remove.
23382 (vqrshruntq_m_n_s32): Remove.
23383 (vqrshruntq_m_n_s16): Remove.
23384 (__arm_vqrshrunbq_n_s16): Remove.
23385 (__arm_vqrshrunbq_n_s32): Remove.
23386 (__arm_vqrshruntq_n_s16): Remove.
23387 (__arm_vqrshruntq_n_s32): Remove.
23388 (__arm_vqrshrunbq_m_n_s32): Remove.
23389 (__arm_vqrshrunbq_m_n_s16): Remove.
23390 (__arm_vqrshruntq_m_n_s32): Remove.
23391 (__arm_vqrshruntq_m_n_s16): Remove.
23392 (__arm_vqrshrunbq): Remove.
23393 (__arm_vqrshruntq): Remove.
23394 (__arm_vqrshrunbq_m): Remove.
23395 (__arm_vqrshruntq_m): Remove.
23396 (vqshrunbq): Remove.
23397 (vqshruntq): Remove.
23398 (vqshrunbq_m): Remove.
23399 (vqshruntq_m): Remove.
23400 (vqshrunbq_n_s16): Remove.
23401 (vqshruntq_n_s16): Remove.
23402 (vqshrunbq_n_s32): Remove.
23403 (vqshruntq_n_s32): Remove.
23404 (vqshrunbq_m_n_s32): Remove.
23405 (vqshrunbq_m_n_s16): Remove.
23406 (vqshruntq_m_n_s32): Remove.
23407 (vqshruntq_m_n_s16): Remove.
23408 (__arm_vqshrunbq_n_s16): Remove.
23409 (__arm_vqshruntq_n_s16): Remove.
23410 (__arm_vqshrunbq_n_s32): Remove.
23411 (__arm_vqshruntq_n_s32): Remove.
23412 (__arm_vqshrunbq_m_n_s32): Remove.
23413 (__arm_vqshrunbq_m_n_s16): Remove.
23414 (__arm_vqshruntq_m_n_s32): Remove.
23415 (__arm_vqshruntq_m_n_s16): Remove.
23416 (__arm_vqshrunbq): Remove.
23417 (__arm_vqshruntq): Remove.
23418 (__arm_vqshrunbq_m): Remove.
23419 (__arm_vqshruntq_m): Remove.
23421 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23423 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
23424 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
23425 (MVE_SHRN_M_N): Likewise.
23426 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
23427 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
23429 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
23430 (mve_vqrshruntq_n_s<mode>): Remove.
23431 (mve_vqshrunbq_n_s<mode>): Remove.
23432 (mve_vqshruntq_n_s<mode>): Remove.
23433 (mve_vqrshrunbq_m_n_s<mode>): Remove.
23434 (mve_vqrshruntq_m_n_s<mode>): Remove.
23435 (mve_vqshrunbq_m_n_s<mode>): Remove.
23436 (mve_vqshruntq_m_n_s<mode>): Remove.
23438 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23440 * config/arm/arm-mve-builtins-shapes.cc
23441 (binary_rshift_narrow_unsigned): New.
23442 * config/arm/arm-mve-builtins-shapes.h
23443 (binary_rshift_narrow_unsigned): New.
23445 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23447 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
23448 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
23449 (vqrshrnbq, vqrshrntq): New.
23450 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
23451 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
23453 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
23454 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
23455 * config/arm/arm-mve-builtins.cc
23456 (function_instance::has_inactive_argument): Handle vshrnbq,
23457 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
23459 * config/arm/arm_mve.h (vshrnbq): Remove.
23461 (vshrnbq_m): Remove.
23462 (vshrntq_m): Remove.
23463 (vshrnbq_n_s16): Remove.
23464 (vshrntq_n_s16): Remove.
23465 (vshrnbq_n_u16): Remove.
23466 (vshrntq_n_u16): Remove.
23467 (vshrnbq_n_s32): Remove.
23468 (vshrntq_n_s32): Remove.
23469 (vshrnbq_n_u32): Remove.
23470 (vshrntq_n_u32): Remove.
23471 (vshrnbq_m_n_s32): Remove.
23472 (vshrnbq_m_n_s16): Remove.
23473 (vshrnbq_m_n_u32): Remove.
23474 (vshrnbq_m_n_u16): Remove.
23475 (vshrntq_m_n_s32): Remove.
23476 (vshrntq_m_n_s16): Remove.
23477 (vshrntq_m_n_u32): Remove.
23478 (vshrntq_m_n_u16): Remove.
23479 (__arm_vshrnbq_n_s16): Remove.
23480 (__arm_vshrntq_n_s16): Remove.
23481 (__arm_vshrnbq_n_u16): Remove.
23482 (__arm_vshrntq_n_u16): Remove.
23483 (__arm_vshrnbq_n_s32): Remove.
23484 (__arm_vshrntq_n_s32): Remove.
23485 (__arm_vshrnbq_n_u32): Remove.
23486 (__arm_vshrntq_n_u32): Remove.
23487 (__arm_vshrnbq_m_n_s32): Remove.
23488 (__arm_vshrnbq_m_n_s16): Remove.
23489 (__arm_vshrnbq_m_n_u32): Remove.
23490 (__arm_vshrnbq_m_n_u16): Remove.
23491 (__arm_vshrntq_m_n_s32): Remove.
23492 (__arm_vshrntq_m_n_s16): Remove.
23493 (__arm_vshrntq_m_n_u32): Remove.
23494 (__arm_vshrntq_m_n_u16): Remove.
23495 (__arm_vshrnbq): Remove.
23496 (__arm_vshrntq): Remove.
23497 (__arm_vshrnbq_m): Remove.
23498 (__arm_vshrntq_m): Remove.
23499 (vrshrnbq): Remove.
23500 (vrshrntq): Remove.
23501 (vrshrnbq_m): Remove.
23502 (vrshrntq_m): Remove.
23503 (vrshrnbq_n_s16): Remove.
23504 (vrshrntq_n_s16): Remove.
23505 (vrshrnbq_n_u16): Remove.
23506 (vrshrntq_n_u16): Remove.
23507 (vrshrnbq_n_s32): Remove.
23508 (vrshrntq_n_s32): Remove.
23509 (vrshrnbq_n_u32): Remove.
23510 (vrshrntq_n_u32): Remove.
23511 (vrshrnbq_m_n_s32): Remove.
23512 (vrshrnbq_m_n_s16): Remove.
23513 (vrshrnbq_m_n_u32): Remove.
23514 (vrshrnbq_m_n_u16): Remove.
23515 (vrshrntq_m_n_s32): Remove.
23516 (vrshrntq_m_n_s16): Remove.
23517 (vrshrntq_m_n_u32): Remove.
23518 (vrshrntq_m_n_u16): Remove.
23519 (__arm_vrshrnbq_n_s16): Remove.
23520 (__arm_vrshrntq_n_s16): Remove.
23521 (__arm_vrshrnbq_n_u16): Remove.
23522 (__arm_vrshrntq_n_u16): Remove.
23523 (__arm_vrshrnbq_n_s32): Remove.
23524 (__arm_vrshrntq_n_s32): Remove.
23525 (__arm_vrshrnbq_n_u32): Remove.
23526 (__arm_vrshrntq_n_u32): Remove.
23527 (__arm_vrshrnbq_m_n_s32): Remove.
23528 (__arm_vrshrnbq_m_n_s16): Remove.
23529 (__arm_vrshrnbq_m_n_u32): Remove.
23530 (__arm_vrshrnbq_m_n_u16): Remove.
23531 (__arm_vrshrntq_m_n_s32): Remove.
23532 (__arm_vrshrntq_m_n_s16): Remove.
23533 (__arm_vrshrntq_m_n_u32): Remove.
23534 (__arm_vrshrntq_m_n_u16): Remove.
23535 (__arm_vrshrnbq): Remove.
23536 (__arm_vrshrntq): Remove.
23537 (__arm_vrshrnbq_m): Remove.
23538 (__arm_vrshrntq_m): Remove.
23539 (vqshrnbq): Remove.
23540 (vqshrntq): Remove.
23541 (vqshrnbq_m): Remove.
23542 (vqshrntq_m): Remove.
23543 (vqshrnbq_n_s16): Remove.
23544 (vqshrntq_n_s16): Remove.
23545 (vqshrnbq_n_u16): Remove.
23546 (vqshrntq_n_u16): Remove.
23547 (vqshrnbq_n_s32): Remove.
23548 (vqshrntq_n_s32): Remove.
23549 (vqshrnbq_n_u32): Remove.
23550 (vqshrntq_n_u32): Remove.
23551 (vqshrnbq_m_n_s32): Remove.
23552 (vqshrnbq_m_n_s16): Remove.
23553 (vqshrnbq_m_n_u32): Remove.
23554 (vqshrnbq_m_n_u16): Remove.
23555 (vqshrntq_m_n_s32): Remove.
23556 (vqshrntq_m_n_s16): Remove.
23557 (vqshrntq_m_n_u32): Remove.
23558 (vqshrntq_m_n_u16): Remove.
23559 (__arm_vqshrnbq_n_s16): Remove.
23560 (__arm_vqshrntq_n_s16): Remove.
23561 (__arm_vqshrnbq_n_u16): Remove.
23562 (__arm_vqshrntq_n_u16): Remove.
23563 (__arm_vqshrnbq_n_s32): Remove.
23564 (__arm_vqshrntq_n_s32): Remove.
23565 (__arm_vqshrnbq_n_u32): Remove.
23566 (__arm_vqshrntq_n_u32): Remove.
23567 (__arm_vqshrnbq_m_n_s32): Remove.
23568 (__arm_vqshrnbq_m_n_s16): Remove.
23569 (__arm_vqshrnbq_m_n_u32): Remove.
23570 (__arm_vqshrnbq_m_n_u16): Remove.
23571 (__arm_vqshrntq_m_n_s32): Remove.
23572 (__arm_vqshrntq_m_n_s16): Remove.
23573 (__arm_vqshrntq_m_n_u32): Remove.
23574 (__arm_vqshrntq_m_n_u16): Remove.
23575 (__arm_vqshrnbq): Remove.
23576 (__arm_vqshrntq): Remove.
23577 (__arm_vqshrnbq_m): Remove.
23578 (__arm_vqshrntq_m): Remove.
23579 (vqrshrnbq): Remove.
23580 (vqrshrntq): Remove.
23581 (vqrshrnbq_m): Remove.
23582 (vqrshrntq_m): Remove.
23583 (vqrshrnbq_n_s16): Remove.
23584 (vqrshrnbq_n_u16): Remove.
23585 (vqrshrnbq_n_s32): Remove.
23586 (vqrshrnbq_n_u32): Remove.
23587 (vqrshrntq_n_s16): Remove.
23588 (vqrshrntq_n_u16): Remove.
23589 (vqrshrntq_n_s32): Remove.
23590 (vqrshrntq_n_u32): Remove.
23591 (vqrshrnbq_m_n_s32): Remove.
23592 (vqrshrnbq_m_n_s16): Remove.
23593 (vqrshrnbq_m_n_u32): Remove.
23594 (vqrshrnbq_m_n_u16): Remove.
23595 (vqrshrntq_m_n_s32): Remove.
23596 (vqrshrntq_m_n_s16): Remove.
23597 (vqrshrntq_m_n_u32): Remove.
23598 (vqrshrntq_m_n_u16): Remove.
23599 (__arm_vqrshrnbq_n_s16): Remove.
23600 (__arm_vqrshrnbq_n_u16): Remove.
23601 (__arm_vqrshrnbq_n_s32): Remove.
23602 (__arm_vqrshrnbq_n_u32): Remove.
23603 (__arm_vqrshrntq_n_s16): Remove.
23604 (__arm_vqrshrntq_n_u16): Remove.
23605 (__arm_vqrshrntq_n_s32): Remove.
23606 (__arm_vqrshrntq_n_u32): Remove.
23607 (__arm_vqrshrnbq_m_n_s32): Remove.
23608 (__arm_vqrshrnbq_m_n_s16): Remove.
23609 (__arm_vqrshrnbq_m_n_u32): Remove.
23610 (__arm_vqrshrnbq_m_n_u16): Remove.
23611 (__arm_vqrshrntq_m_n_s32): Remove.
23612 (__arm_vqrshrntq_m_n_s16): Remove.
23613 (__arm_vqrshrntq_m_n_u32): Remove.
23614 (__arm_vqrshrntq_m_n_u16): Remove.
23615 (__arm_vqrshrnbq): Remove.
23616 (__arm_vqrshrntq): Remove.
23617 (__arm_vqrshrnbq_m): Remove.
23618 (__arm_vqrshrntq_m): Remove.
23620 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23622 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
23623 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
23624 vrshrnt, vshrnb, vshrnt.
23626 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
23627 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
23628 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
23629 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
23630 (mve_vshrntq_n_<supf><mode>): Merge into ...
23631 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23632 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
23633 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
23634 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
23635 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
23637 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23639 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23641 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
23643 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
23645 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23647 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
23648 (vmaxq, vminq): New.
23649 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
23650 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
23651 * config/arm/arm_mve.h (vminq): Remove.
23657 (vminq_u8): Remove.
23658 (vmaxq_u8): Remove.
23659 (vminq_s8): Remove.
23660 (vmaxq_s8): Remove.
23661 (vminq_u16): Remove.
23662 (vmaxq_u16): Remove.
23663 (vminq_s16): Remove.
23664 (vmaxq_s16): Remove.
23665 (vminq_u32): Remove.
23666 (vmaxq_u32): Remove.
23667 (vminq_s32): Remove.
23668 (vmaxq_s32): Remove.
23669 (vmaxq_m_s8): Remove.
23670 (vmaxq_m_s32): Remove.
23671 (vmaxq_m_s16): Remove.
23672 (vmaxq_m_u8): Remove.
23673 (vmaxq_m_u32): Remove.
23674 (vmaxq_m_u16): Remove.
23675 (vminq_m_s8): Remove.
23676 (vminq_m_s32): Remove.
23677 (vminq_m_s16): Remove.
23678 (vminq_m_u8): Remove.
23679 (vminq_m_u32): Remove.
23680 (vminq_m_u16): Remove.
23681 (vminq_x_s8): Remove.
23682 (vminq_x_s16): Remove.
23683 (vminq_x_s32): Remove.
23684 (vminq_x_u8): Remove.
23685 (vminq_x_u16): Remove.
23686 (vminq_x_u32): Remove.
23687 (vmaxq_x_s8): Remove.
23688 (vmaxq_x_s16): Remove.
23689 (vmaxq_x_s32): Remove.
23690 (vmaxq_x_u8): Remove.
23691 (vmaxq_x_u16): Remove.
23692 (vmaxq_x_u32): Remove.
23693 (__arm_vminq_u8): Remove.
23694 (__arm_vmaxq_u8): Remove.
23695 (__arm_vminq_s8): Remove.
23696 (__arm_vmaxq_s8): Remove.
23697 (__arm_vminq_u16): Remove.
23698 (__arm_vmaxq_u16): Remove.
23699 (__arm_vminq_s16): Remove.
23700 (__arm_vmaxq_s16): Remove.
23701 (__arm_vminq_u32): Remove.
23702 (__arm_vmaxq_u32): Remove.
23703 (__arm_vminq_s32): Remove.
23704 (__arm_vmaxq_s32): Remove.
23705 (__arm_vmaxq_m_s8): Remove.
23706 (__arm_vmaxq_m_s32): Remove.
23707 (__arm_vmaxq_m_s16): Remove.
23708 (__arm_vmaxq_m_u8): Remove.
23709 (__arm_vmaxq_m_u32): Remove.
23710 (__arm_vmaxq_m_u16): Remove.
23711 (__arm_vminq_m_s8): Remove.
23712 (__arm_vminq_m_s32): Remove.
23713 (__arm_vminq_m_s16): Remove.
23714 (__arm_vminq_m_u8): Remove.
23715 (__arm_vminq_m_u32): Remove.
23716 (__arm_vminq_m_u16): Remove.
23717 (__arm_vminq_x_s8): Remove.
23718 (__arm_vminq_x_s16): Remove.
23719 (__arm_vminq_x_s32): Remove.
23720 (__arm_vminq_x_u8): Remove.
23721 (__arm_vminq_x_u16): Remove.
23722 (__arm_vminq_x_u32): Remove.
23723 (__arm_vmaxq_x_s8): Remove.
23724 (__arm_vmaxq_x_s16): Remove.
23725 (__arm_vmaxq_x_s32): Remove.
23726 (__arm_vmaxq_x_u8): Remove.
23727 (__arm_vmaxq_x_u16): Remove.
23728 (__arm_vmaxq_x_u32): Remove.
23729 (__arm_vminq): Remove.
23730 (__arm_vmaxq): Remove.
23731 (__arm_vmaxq_m): Remove.
23732 (__arm_vminq_m): Remove.
23733 (__arm_vminq_x): Remove.
23734 (__arm_vmaxq_x): Remove.
23736 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23738 * config/arm/iterators.md (MAX_MIN_SU): New.
23739 (max_min_su_str): New.
23740 (max_min_supf): New.
23741 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
23742 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
23743 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
23745 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23747 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
23748 (vqshlq, vshlq): New.
23749 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
23750 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
23751 * config/arm/arm_mve.h (vshlq): Remove.
23754 (vshlq_m_r): Remove.
23756 (vshlq_m_n): Remove.
23758 (vshlq_x_n): Remove.
23759 (vshlq_s8): Remove.
23760 (vshlq_s16): Remove.
23761 (vshlq_s32): Remove.
23762 (vshlq_u8): Remove.
23763 (vshlq_u16): Remove.
23764 (vshlq_u32): Remove.
23765 (vshlq_r_u8): Remove.
23766 (vshlq_n_u8): Remove.
23767 (vshlq_r_s8): Remove.
23768 (vshlq_n_s8): Remove.
23769 (vshlq_r_u16): Remove.
23770 (vshlq_n_u16): Remove.
23771 (vshlq_r_s16): Remove.
23772 (vshlq_n_s16): Remove.
23773 (vshlq_r_u32): Remove.
23774 (vshlq_n_u32): Remove.
23775 (vshlq_r_s32): Remove.
23776 (vshlq_n_s32): Remove.
23777 (vshlq_m_r_u8): Remove.
23778 (vshlq_m_r_s8): Remove.
23779 (vshlq_m_r_u16): Remove.
23780 (vshlq_m_r_s16): Remove.
23781 (vshlq_m_r_u32): Remove.
23782 (vshlq_m_r_s32): Remove.
23783 (vshlq_m_u8): Remove.
23784 (vshlq_m_s8): Remove.
23785 (vshlq_m_u16): Remove.
23786 (vshlq_m_s16): Remove.
23787 (vshlq_m_u32): Remove.
23788 (vshlq_m_s32): Remove.
23789 (vshlq_m_n_s8): Remove.
23790 (vshlq_m_n_s32): Remove.
23791 (vshlq_m_n_s16): Remove.
23792 (vshlq_m_n_u8): Remove.
23793 (vshlq_m_n_u32): Remove.
23794 (vshlq_m_n_u16): Remove.
23795 (vshlq_x_s8): Remove.
23796 (vshlq_x_s16): Remove.
23797 (vshlq_x_s32): Remove.
23798 (vshlq_x_u8): Remove.
23799 (vshlq_x_u16): Remove.
23800 (vshlq_x_u32): Remove.
23801 (vshlq_x_n_s8): Remove.
23802 (vshlq_x_n_s16): Remove.
23803 (vshlq_x_n_s32): Remove.
23804 (vshlq_x_n_u8): Remove.
23805 (vshlq_x_n_u16): Remove.
23806 (vshlq_x_n_u32): Remove.
23807 (__arm_vshlq_s8): Remove.
23808 (__arm_vshlq_s16): Remove.
23809 (__arm_vshlq_s32): Remove.
23810 (__arm_vshlq_u8): Remove.
23811 (__arm_vshlq_u16): Remove.
23812 (__arm_vshlq_u32): Remove.
23813 (__arm_vshlq_r_u8): Remove.
23814 (__arm_vshlq_n_u8): Remove.
23815 (__arm_vshlq_r_s8): Remove.
23816 (__arm_vshlq_n_s8): Remove.
23817 (__arm_vshlq_r_u16): Remove.
23818 (__arm_vshlq_n_u16): Remove.
23819 (__arm_vshlq_r_s16): Remove.
23820 (__arm_vshlq_n_s16): Remove.
23821 (__arm_vshlq_r_u32): Remove.
23822 (__arm_vshlq_n_u32): Remove.
23823 (__arm_vshlq_r_s32): Remove.
23824 (__arm_vshlq_n_s32): Remove.
23825 (__arm_vshlq_m_r_u8): Remove.
23826 (__arm_vshlq_m_r_s8): Remove.
23827 (__arm_vshlq_m_r_u16): Remove.
23828 (__arm_vshlq_m_r_s16): Remove.
23829 (__arm_vshlq_m_r_u32): Remove.
23830 (__arm_vshlq_m_r_s32): Remove.
23831 (__arm_vshlq_m_u8): Remove.
23832 (__arm_vshlq_m_s8): Remove.
23833 (__arm_vshlq_m_u16): Remove.
23834 (__arm_vshlq_m_s16): Remove.
23835 (__arm_vshlq_m_u32): Remove.
23836 (__arm_vshlq_m_s32): Remove.
23837 (__arm_vshlq_m_n_s8): Remove.
23838 (__arm_vshlq_m_n_s32): Remove.
23839 (__arm_vshlq_m_n_s16): Remove.
23840 (__arm_vshlq_m_n_u8): Remove.
23841 (__arm_vshlq_m_n_u32): Remove.
23842 (__arm_vshlq_m_n_u16): Remove.
23843 (__arm_vshlq_x_s8): Remove.
23844 (__arm_vshlq_x_s16): Remove.
23845 (__arm_vshlq_x_s32): Remove.
23846 (__arm_vshlq_x_u8): Remove.
23847 (__arm_vshlq_x_u16): Remove.
23848 (__arm_vshlq_x_u32): Remove.
23849 (__arm_vshlq_x_n_s8): Remove.
23850 (__arm_vshlq_x_n_s16): Remove.
23851 (__arm_vshlq_x_n_s32): Remove.
23852 (__arm_vshlq_x_n_u8): Remove.
23853 (__arm_vshlq_x_n_u16): Remove.
23854 (__arm_vshlq_x_n_u32): Remove.
23855 (__arm_vshlq): Remove.
23856 (__arm_vshlq_r): Remove.
23857 (__arm_vshlq_n): Remove.
23858 (__arm_vshlq_m_r): Remove.
23859 (__arm_vshlq_m): Remove.
23860 (__arm_vshlq_m_n): Remove.
23861 (__arm_vshlq_x): Remove.
23862 (__arm_vshlq_x_n): Remove.
23864 (vqshlq_r): Remove.
23865 (vqshlq_n): Remove.
23866 (vqshlq_m_r): Remove.
23867 (vqshlq_m_n): Remove.
23868 (vqshlq_m): Remove.
23869 (vqshlq_u8): Remove.
23870 (vqshlq_r_u8): Remove.
23871 (vqshlq_n_u8): Remove.
23872 (vqshlq_s8): Remove.
23873 (vqshlq_r_s8): Remove.
23874 (vqshlq_n_s8): Remove.
23875 (vqshlq_u16): Remove.
23876 (vqshlq_r_u16): Remove.
23877 (vqshlq_n_u16): Remove.
23878 (vqshlq_s16): Remove.
23879 (vqshlq_r_s16): Remove.
23880 (vqshlq_n_s16): Remove.
23881 (vqshlq_u32): Remove.
23882 (vqshlq_r_u32): Remove.
23883 (vqshlq_n_u32): Remove.
23884 (vqshlq_s32): Remove.
23885 (vqshlq_r_s32): Remove.
23886 (vqshlq_n_s32): Remove.
23887 (vqshlq_m_r_u8): Remove.
23888 (vqshlq_m_r_s8): Remove.
23889 (vqshlq_m_r_u16): Remove.
23890 (vqshlq_m_r_s16): Remove.
23891 (vqshlq_m_r_u32): Remove.
23892 (vqshlq_m_r_s32): Remove.
23893 (vqshlq_m_n_s8): Remove.
23894 (vqshlq_m_n_s32): Remove.
23895 (vqshlq_m_n_s16): Remove.
23896 (vqshlq_m_n_u8): Remove.
23897 (vqshlq_m_n_u32): Remove.
23898 (vqshlq_m_n_u16): Remove.
23899 (vqshlq_m_s8): Remove.
23900 (vqshlq_m_s32): Remove.
23901 (vqshlq_m_s16): Remove.
23902 (vqshlq_m_u8): Remove.
23903 (vqshlq_m_u32): Remove.
23904 (vqshlq_m_u16): Remove.
23905 (__arm_vqshlq_u8): Remove.
23906 (__arm_vqshlq_r_u8): Remove.
23907 (__arm_vqshlq_n_u8): Remove.
23908 (__arm_vqshlq_s8): Remove.
23909 (__arm_vqshlq_r_s8): Remove.
23910 (__arm_vqshlq_n_s8): Remove.
23911 (__arm_vqshlq_u16): Remove.
23912 (__arm_vqshlq_r_u16): Remove.
23913 (__arm_vqshlq_n_u16): Remove.
23914 (__arm_vqshlq_s16): Remove.
23915 (__arm_vqshlq_r_s16): Remove.
23916 (__arm_vqshlq_n_s16): Remove.
23917 (__arm_vqshlq_u32): Remove.
23918 (__arm_vqshlq_r_u32): Remove.
23919 (__arm_vqshlq_n_u32): Remove.
23920 (__arm_vqshlq_s32): Remove.
23921 (__arm_vqshlq_r_s32): Remove.
23922 (__arm_vqshlq_n_s32): Remove.
23923 (__arm_vqshlq_m_r_u8): Remove.
23924 (__arm_vqshlq_m_r_s8): Remove.
23925 (__arm_vqshlq_m_r_u16): Remove.
23926 (__arm_vqshlq_m_r_s16): Remove.
23927 (__arm_vqshlq_m_r_u32): Remove.
23928 (__arm_vqshlq_m_r_s32): Remove.
23929 (__arm_vqshlq_m_n_s8): Remove.
23930 (__arm_vqshlq_m_n_s32): Remove.
23931 (__arm_vqshlq_m_n_s16): Remove.
23932 (__arm_vqshlq_m_n_u8): Remove.
23933 (__arm_vqshlq_m_n_u32): Remove.
23934 (__arm_vqshlq_m_n_u16): Remove.
23935 (__arm_vqshlq_m_s8): Remove.
23936 (__arm_vqshlq_m_s32): Remove.
23937 (__arm_vqshlq_m_s16): Remove.
23938 (__arm_vqshlq_m_u8): Remove.
23939 (__arm_vqshlq_m_u32): Remove.
23940 (__arm_vqshlq_m_u16): Remove.
23941 (__arm_vqshlq): Remove.
23942 (__arm_vqshlq_r): Remove.
23943 (__arm_vqshlq_n): Remove.
23944 (__arm_vqshlq_m_r): Remove.
23945 (__arm_vqshlq_m_n): Remove.
23946 (__arm_vqshlq_m): Remove.
23948 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23950 * config/arm/arm-mve-builtins-functions.h (class
23951 unspec_mve_function_exact_insn_vshl): New.
23953 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23955 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
23956 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
23958 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23960 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
23961 (finish_opt_n_resolution): Handle MODE_r.
23962 * config/arm/arm-mve-builtins.def (r): New mode.
23964 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23966 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
23967 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
23969 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
23971 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
23973 * config/arm/arm-mve-builtins-base.def (vabdq): New.
23974 * config/arm/arm-mve-builtins-base.h (vabdq): New.
23975 * config/arm/arm_mve.h (vabdq): Remove.
23978 (vabdq_u8): Remove.
23979 (vabdq_s8): Remove.
23980 (vabdq_u16): Remove.
23981 (vabdq_s16): Remove.
23982 (vabdq_u32): Remove.
23983 (vabdq_s32): Remove.
23984 (vabdq_f16): Remove.
23985 (vabdq_f32): Remove.
23986 (vabdq_m_s8): Remove.
23987 (vabdq_m_s32): Remove.
23988 (vabdq_m_s16): Remove.
23989 (vabdq_m_u8): Remove.
23990 (vabdq_m_u32): Remove.
23991 (vabdq_m_u16): Remove.
23992 (vabdq_m_f32): Remove.
23993 (vabdq_m_f16): Remove.
23994 (vabdq_x_s8): Remove.
23995 (vabdq_x_s16): Remove.
23996 (vabdq_x_s32): Remove.
23997 (vabdq_x_u8): Remove.
23998 (vabdq_x_u16): Remove.
23999 (vabdq_x_u32): Remove.
24000 (vabdq_x_f16): Remove.
24001 (vabdq_x_f32): Remove.
24002 (__arm_vabdq_u8): Remove.
24003 (__arm_vabdq_s8): Remove.
24004 (__arm_vabdq_u16): Remove.
24005 (__arm_vabdq_s16): Remove.
24006 (__arm_vabdq_u32): Remove.
24007 (__arm_vabdq_s32): Remove.
24008 (__arm_vabdq_m_s8): Remove.
24009 (__arm_vabdq_m_s32): Remove.
24010 (__arm_vabdq_m_s16): Remove.
24011 (__arm_vabdq_m_u8): Remove.
24012 (__arm_vabdq_m_u32): Remove.
24013 (__arm_vabdq_m_u16): Remove.
24014 (__arm_vabdq_x_s8): Remove.
24015 (__arm_vabdq_x_s16): Remove.
24016 (__arm_vabdq_x_s32): Remove.
24017 (__arm_vabdq_x_u8): Remove.
24018 (__arm_vabdq_x_u16): Remove.
24019 (__arm_vabdq_x_u32): Remove.
24020 (__arm_vabdq_f16): Remove.
24021 (__arm_vabdq_f32): Remove.
24022 (__arm_vabdq_m_f32): Remove.
24023 (__arm_vabdq_m_f16): Remove.
24024 (__arm_vabdq_x_f16): Remove.
24025 (__arm_vabdq_x_f32): Remove.
24026 (__arm_vabdq): Remove.
24027 (__arm_vabdq_m): Remove.
24028 (__arm_vabdq_x): Remove.
24030 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24032 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
24033 (MVE_FP_VABDQ_ONLY): New.
24034 (mve_insn): Add vabd.
24035 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
24036 (@mve_<mve_insn>q_f<mode>): ... this.
24037 (mve_vabdq_m_f<mode>): Remove.
24039 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24041 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
24042 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
24043 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
24044 * config/arm/arm_mve.h (vqrdmulhq): Remove.
24045 (vqrdmulhq_m): Remove.
24046 (vqrdmulhq_s8): Remove.
24047 (vqrdmulhq_n_s8): Remove.
24048 (vqrdmulhq_s16): Remove.
24049 (vqrdmulhq_n_s16): Remove.
24050 (vqrdmulhq_s32): Remove.
24051 (vqrdmulhq_n_s32): Remove.
24052 (vqrdmulhq_m_n_s8): Remove.
24053 (vqrdmulhq_m_n_s32): Remove.
24054 (vqrdmulhq_m_n_s16): Remove.
24055 (vqrdmulhq_m_s8): Remove.
24056 (vqrdmulhq_m_s32): Remove.
24057 (vqrdmulhq_m_s16): Remove.
24058 (__arm_vqrdmulhq_s8): Remove.
24059 (__arm_vqrdmulhq_n_s8): Remove.
24060 (__arm_vqrdmulhq_s16): Remove.
24061 (__arm_vqrdmulhq_n_s16): Remove.
24062 (__arm_vqrdmulhq_s32): Remove.
24063 (__arm_vqrdmulhq_n_s32): Remove.
24064 (__arm_vqrdmulhq_m_n_s8): Remove.
24065 (__arm_vqrdmulhq_m_n_s32): Remove.
24066 (__arm_vqrdmulhq_m_n_s16): Remove.
24067 (__arm_vqrdmulhq_m_s8): Remove.
24068 (__arm_vqrdmulhq_m_s32): Remove.
24069 (__arm_vqrdmulhq_m_s16): Remove.
24070 (__arm_vqrdmulhq): Remove.
24071 (__arm_vqrdmulhq_m): Remove.
24073 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24075 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
24076 (MVE_SHIFT_N, MVE_SHIFT_R): New.
24077 (mve_insn): Add vqshl, vshl.
24078 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
24079 (mve_vshlq_n_<supf><mode>): Merge into ...
24080 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24081 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
24083 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
24084 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
24086 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
24087 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
24089 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24090 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
24092 (@mve_<mve_insn>q_<supf><mode>): ... this.
24094 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24096 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
24097 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
24098 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
24099 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
24101 * config/arm/arm_mve.h (vrshlq): Remove.
24102 (vrshlq_m_n): Remove.
24103 (vrshlq_m): Remove.
24104 (vrshlq_x): Remove.
24105 (vrshlq_u8): Remove.
24106 (vrshlq_n_u8): Remove.
24107 (vrshlq_s8): Remove.
24108 (vrshlq_n_s8): Remove.
24109 (vrshlq_u16): Remove.
24110 (vrshlq_n_u16): Remove.
24111 (vrshlq_s16): Remove.
24112 (vrshlq_n_s16): Remove.
24113 (vrshlq_u32): Remove.
24114 (vrshlq_n_u32): Remove.
24115 (vrshlq_s32): Remove.
24116 (vrshlq_n_s32): Remove.
24117 (vrshlq_m_n_u8): Remove.
24118 (vrshlq_m_n_s8): Remove.
24119 (vrshlq_m_n_u16): Remove.
24120 (vrshlq_m_n_s16): Remove.
24121 (vrshlq_m_n_u32): Remove.
24122 (vrshlq_m_n_s32): Remove.
24123 (vrshlq_m_s8): Remove.
24124 (vrshlq_m_s32): Remove.
24125 (vrshlq_m_s16): Remove.
24126 (vrshlq_m_u8): Remove.
24127 (vrshlq_m_u32): Remove.
24128 (vrshlq_m_u16): Remove.
24129 (vrshlq_x_s8): Remove.
24130 (vrshlq_x_s16): Remove.
24131 (vrshlq_x_s32): Remove.
24132 (vrshlq_x_u8): Remove.
24133 (vrshlq_x_u16): Remove.
24134 (vrshlq_x_u32): Remove.
24135 (__arm_vrshlq_u8): Remove.
24136 (__arm_vrshlq_n_u8): Remove.
24137 (__arm_vrshlq_s8): Remove.
24138 (__arm_vrshlq_n_s8): Remove.
24139 (__arm_vrshlq_u16): Remove.
24140 (__arm_vrshlq_n_u16): Remove.
24141 (__arm_vrshlq_s16): Remove.
24142 (__arm_vrshlq_n_s16): Remove.
24143 (__arm_vrshlq_u32): Remove.
24144 (__arm_vrshlq_n_u32): Remove.
24145 (__arm_vrshlq_s32): Remove.
24146 (__arm_vrshlq_n_s32): Remove.
24147 (__arm_vrshlq_m_n_u8): Remove.
24148 (__arm_vrshlq_m_n_s8): Remove.
24149 (__arm_vrshlq_m_n_u16): Remove.
24150 (__arm_vrshlq_m_n_s16): Remove.
24151 (__arm_vrshlq_m_n_u32): Remove.
24152 (__arm_vrshlq_m_n_s32): Remove.
24153 (__arm_vrshlq_m_s8): Remove.
24154 (__arm_vrshlq_m_s32): Remove.
24155 (__arm_vrshlq_m_s16): Remove.
24156 (__arm_vrshlq_m_u8): Remove.
24157 (__arm_vrshlq_m_u32): Remove.
24158 (__arm_vrshlq_m_u16): Remove.
24159 (__arm_vrshlq_x_s8): Remove.
24160 (__arm_vrshlq_x_s16): Remove.
24161 (__arm_vrshlq_x_s32): Remove.
24162 (__arm_vrshlq_x_u8): Remove.
24163 (__arm_vrshlq_x_u16): Remove.
24164 (__arm_vrshlq_x_u32): Remove.
24165 (__arm_vrshlq): Remove.
24166 (__arm_vrshlq_m_n): Remove.
24167 (__arm_vrshlq_m): Remove.
24168 (__arm_vrshlq_x): Remove.
24170 (vqrshlq_m_n): Remove.
24171 (vqrshlq_m): Remove.
24172 (vqrshlq_u8): Remove.
24173 (vqrshlq_n_u8): Remove.
24174 (vqrshlq_s8): Remove.
24175 (vqrshlq_n_s8): Remove.
24176 (vqrshlq_u16): Remove.
24177 (vqrshlq_n_u16): Remove.
24178 (vqrshlq_s16): Remove.
24179 (vqrshlq_n_s16): Remove.
24180 (vqrshlq_u32): Remove.
24181 (vqrshlq_n_u32): Remove.
24182 (vqrshlq_s32): Remove.
24183 (vqrshlq_n_s32): Remove.
24184 (vqrshlq_m_n_u8): Remove.
24185 (vqrshlq_m_n_s8): Remove.
24186 (vqrshlq_m_n_u16): Remove.
24187 (vqrshlq_m_n_s16): Remove.
24188 (vqrshlq_m_n_u32): Remove.
24189 (vqrshlq_m_n_s32): Remove.
24190 (vqrshlq_m_s8): Remove.
24191 (vqrshlq_m_s32): Remove.
24192 (vqrshlq_m_s16): Remove.
24193 (vqrshlq_m_u8): Remove.
24194 (vqrshlq_m_u32): Remove.
24195 (vqrshlq_m_u16): Remove.
24196 (__arm_vqrshlq_u8): Remove.
24197 (__arm_vqrshlq_n_u8): Remove.
24198 (__arm_vqrshlq_s8): Remove.
24199 (__arm_vqrshlq_n_s8): Remove.
24200 (__arm_vqrshlq_u16): Remove.
24201 (__arm_vqrshlq_n_u16): Remove.
24202 (__arm_vqrshlq_s16): Remove.
24203 (__arm_vqrshlq_n_s16): Remove.
24204 (__arm_vqrshlq_u32): Remove.
24205 (__arm_vqrshlq_n_u32): Remove.
24206 (__arm_vqrshlq_s32): Remove.
24207 (__arm_vqrshlq_n_s32): Remove.
24208 (__arm_vqrshlq_m_n_u8): Remove.
24209 (__arm_vqrshlq_m_n_s8): Remove.
24210 (__arm_vqrshlq_m_n_u16): Remove.
24211 (__arm_vqrshlq_m_n_s16): Remove.
24212 (__arm_vqrshlq_m_n_u32): Remove.
24213 (__arm_vqrshlq_m_n_s32): Remove.
24214 (__arm_vqrshlq_m_s8): Remove.
24215 (__arm_vqrshlq_m_s32): Remove.
24216 (__arm_vqrshlq_m_s16): Remove.
24217 (__arm_vqrshlq_m_u8): Remove.
24218 (__arm_vqrshlq_m_u32): Remove.
24219 (__arm_vqrshlq_m_u16): Remove.
24220 (__arm_vqrshlq): Remove.
24221 (__arm_vqrshlq_m_n): Remove.
24222 (__arm_vqrshlq_m): Remove.
24224 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24226 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
24227 (mve_insn): Add vqrshl, vrshl.
24228 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
24229 (mve_vrshlq_n_<supf><mode>): Merge into ...
24230 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24231 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
24233 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24235 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
24237 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
24238 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
24240 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
24243 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
24244 denegrate PHI optmization.
24246 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
24248 * config/i386/predicates.md (register_no_SP_operand):
24249 Rename from index_register_operand.
24250 (call_register_operand): Update for rename.
24251 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
24253 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24256 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
24257 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
24258 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
24259 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
24260 (s-match): Split into s-generic-match and s-gimple-match.
24261 * configure.ac (with-matchpd-partitions,
24262 DEFAULT_MATCHPD_PARTITIONS): New.
24263 * configure: Regenerate.
24265 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24268 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
24269 (decision_tree::gen): Accept list of files instead of single and update
24270 to write function definition to header and main file.
24271 (write_predicate): Likewise.
24272 (write_header): Emit pragmas and new includes.
24273 (main): Create file buffers and cleanup.
24274 (showUsage, write_header_includes): New.
24276 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24279 * Makefile.in (OBJS): Add gimple-match-exports.o.
24280 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
24281 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
24282 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
24283 gimple_resimplify5, constant_for_folding, convert_conditional_op,
24284 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
24285 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
24286 do_valueize, try_conditional_simplification, gimple_extract,
24287 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
24288 commutative_ternary_op_p, first_commutative_argument,
24289 associative_binary_op_p, directly_supported_p,
24290 get_conditional_internal_fn): Moved to gimple-match-exports.cc
24291 * gimple-match-exports.cc: New file.
24293 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24296 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
24298 (dt_simplify::gen_1): Use it.
24300 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24303 * genmatch.cc (output_line_directive): Only emit commented directive
24306 2023-05-05 Tamar Christina <tamar.christina@arm.com>
24309 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
24311 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
24313 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
24314 unused in_mode/in_n variables.
24316 2023-05-05 Richard Biener <rguenther@suse.de>
24318 PR tree-optimization/109735
24319 * tree-vect-stmts.cc (vectorizable_operation): Perform
24320 conversion for POINTER_DIFF_EXPR unconditionally.
24322 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
24324 * config/i386/mmx.md (mulv2si3): New expander.
24325 (*mulv2si3): New insn pattern.
24327 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
24328 Thomas Schwinge <thomas@codesourcery.com>
24331 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
24332 alongside reverse-offload function table to prevent NULL values
24333 of the function addresses.
24335 2023-05-05 Jakub Jelinek <jakub@redhat.com>
24337 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
24339 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
24341 2023-05-05 Andrew Pinski <apinski@marvell.com>
24343 PR tree-optimization/109732
24344 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
24345 of the argtrue/argfalse.
24347 2023-05-05 Andrew Pinski <apinski@marvell.com>
24349 PR tree-optimization/109722
24350 * match.pd: Extend the `ABS<a> == 0` pattern
24351 to cover `ABSU<a> == 0` too.
24353 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
24356 * config/i386/predicates.md (index_reg_operand): New predicate.
24357 * config/i386/i386.md (ashift to lea spliter): Use
24358 general_reg_operand and index_reg_operand predicates.
24360 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24362 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
24363 Rename and reimplement with RTL codes to...
24364 (aarch64_<optab>hn2<mode>_insn_le): .. This.
24365 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
24366 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
24368 (aarch64_<optab>hn2<mode>_insn_be): ... This.
24369 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
24370 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
24371 (aarch64_<optab>hn2<mode>): ... This.
24372 (aarch64_r<optab>hn2<mode>): New expander.
24373 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
24374 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
24375 (ADDSUBHN): Delete.
24376 (sur): Remove handling of the above.
24377 (addsub): Likewise.
24379 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24381 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
24383 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
24384 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
24385 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
24386 (aarch64_<sur><addsub>hn<mode>): Delete.
24387 (aarch64_<optab>hn<mode>): New define_expand.
24388 (aarch64_r<optab>hn<mode>): Likewise.
24389 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
24392 2023-05-04 Andrew Pinski <apinski@marvell.com>
24394 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
24395 diamond form bb with forwarder only empty blocks better.
24397 2023-05-04 Andrew Pinski <apinski@marvell.com>
24399 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
24400 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
24401 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
24402 of an inline version of it.
24403 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
24404 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
24406 2023-05-04 Andrew Pinski <apinski@marvell.com>
24408 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
24409 the default argument value for dce_ssa_names to nullptr.
24410 Check to make sure dce_ssa_names is a non-nullptr before
24411 calling simple_dce_from_worklist.
24413 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
24415 * config/i386/predicates.md (index_register_operand): Reject
24416 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
24417 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
24418 (call_register_no_elim_operand): Rewrite as ...
24419 (call_register_operand): ... this.
24420 (call_insn_operand): Use call_register_operand predicate.
24422 2023-05-04 Richard Biener <rguenther@suse.de>
24424 PR tree-optimization/109721
24425 * tree-vect-stmts.cc (vectorizable_operation): Make sure
24426 to test word_mode for all !target_support_p operations.
24428 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24431 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
24432 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
24433 (aarch64_mla<mode>): Rename to...
24434 (aarch64_mla<mode><vczle><vczbe>): ... This.
24435 (*aarch64_mla_elt<mode>): Rename to...
24436 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
24437 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
24438 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
24439 (aarch64_mla_n<mode>): Rename to...
24440 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
24441 (aarch64_mls<mode>): Rename to...
24442 (aarch64_mls<mode><vczle><vczbe>): ... This.
24443 (*aarch64_mls_elt<mode>): Rename to...
24444 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
24445 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
24446 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
24447 (aarch64_mls_n<mode>): Rename to...
24448 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
24449 (fma<mode>4): Rename to...
24450 (fma<mode>4<vczle><vczbe>): ... This.
24451 (*aarch64_fma4_elt<mode>): Rename to...
24452 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
24453 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
24454 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
24455 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
24456 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
24457 (fnma<mode>4): Rename to...
24458 (fnma<mode>4<vczle><vczbe>): ... This.
24459 (*aarch64_fnma4_elt<mode>): Rename to...
24460 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
24461 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
24462 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
24463 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
24464 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
24465 (aarch64_simd_bsl<mode>_internal): Rename to...
24466 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
24467 (*aarch64_simd_bsl<mode>_alt): Rename to...
24468 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
24470 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
24473 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
24474 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
24475 (fabd<mode>3): Rename to...
24476 (fabd<mode>3<vczle><vczbe>): ... This.
24477 (aarch64_<optab>p<mode>): Rename to...
24478 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
24479 (aarch64_faddp<mode>): Rename to...
24480 (aarch64_faddp<mode><vczle><vczbe>): ... This.
24482 2023-05-04 Martin Liska <mliska@suse.cz>
24484 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
24485 (print_version): Use it.
24486 (generate_results): Likewise.
24488 2023-05-04 Richard Biener <rguenther@suse.de>
24490 * tree-cfg.h (last_stmt): Rename to ...
24491 (last_nondebug_stmt): ... this.
24492 * tree-cfg.cc (last_stmt): Rename to ...
24493 (last_nondebug_stmt): ... this.
24494 (assign_discriminators): Adjust.
24495 (group_case_labels_stmt): Likewise.
24496 (gimple_can_duplicate_bb_p): Likewise.
24497 (execute_fixup_cfg): Likewise.
24498 * auto-profile.cc (afdo_propagate_circuit): Likewise.
24499 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
24500 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
24501 (determine_parallel_type): Likewise.
24502 (adjust_context_and_scope): Likewise.
24503 (expand_task_call): Likewise.
24504 (remove_exit_barrier): Likewise.
24505 (expand_omp_taskreg): Likewise.
24506 (expand_omp_for_init_counts): Likewise.
24507 (expand_omp_for_init_vars): Likewise.
24508 (expand_omp_for_static_chunk): Likewise.
24509 (expand_omp_simd): Likewise.
24510 (expand_oacc_for): Likewise.
24511 (expand_omp_for): Likewise.
24512 (expand_omp_sections): Likewise.
24513 (expand_omp_atomic_fetch_op): Likewise.
24514 (expand_omp_atomic_cas): Likewise.
24515 (expand_omp_atomic): Likewise.
24516 (expand_omp_target): Likewise.
24517 (expand_omp): Likewise.
24518 (omp_make_gimple_edges): Likewise.
24519 * trans-mem.cc (tm_region_init): Likewise.
24520 * tree-inline.cc (redirect_all_calls): Likewise.
24521 * tree-parloops.cc (gen_parallel_loop): Likewise.
24522 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
24523 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
24525 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
24526 (may_eliminate_iv): Likewise.
24527 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
24528 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
24530 (estimate_numbers_of_iterations): Likewise.
24531 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
24532 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
24533 (set_predicates_for_bb): Likewise.
24534 (init_loop_unswitch_info): Likewise.
24535 (hoist_guard): Likewise.
24536 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
24537 (minmax_replacement): Likewise.
24538 * tree-ssa-reassoc.cc (update_range_test): Likewise.
24539 (optimize_range_tests_to_bit_test): Likewise.
24540 (optimize_range_tests_var_bound): Likewise.
24541 (optimize_range_tests): Likewise.
24542 (no_side_effect_bb): Likewise.
24543 (suitable_cond_bb): Likewise.
24544 (maybe_optimize_range_tests): Likewise.
24545 (reassociate_bb): Likewise.
24546 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
24548 2023-05-04 Jakub Jelinek <jakub@redhat.com>
24551 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
24552 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
24553 for it only if it still has TImode. Don't decide whether to call
24554 fix_debug_reg_uses based on whether SRC is ever set or not.
24556 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
24558 * config/cris/cris.cc (cris_split_constant): New function.
24559 * config/cris/cris.md (splitop): New iterator.
24560 (opsplit1): New define_peephole2.
24561 * config/cris/cris-protos.h (cris_split_constant): Declare.
24562 (cris_splittable_constant_p): New macro.
24564 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
24566 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
24569 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
24571 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
24572 lra_in_progress, not reload_in_progress.
24573 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
24574 * config/cris/constraints.md ("Q"): Ditto.
24576 2023-05-03 Andrew Pinski <apinski@marvell.com>
24578 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
24579 stats on removed number of statements and phis.
24581 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
24583 PR tree-optimization/109711
24584 * value-range.cc (irange::verify_range): Allow types of
24587 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
24590 * calls.cc (can_implement_as_sibling_call_p): Reject calls
24591 to __sanitizer_cov_trace_pc.
24593 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
24596 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
24597 a new ABI break parameter for GCC 14. Set it to the alignment
24598 of enums that have an underlying type. Take the true alignment
24599 of such enums from the TYPE_ALIGN of the underlying type's
24601 (aarch64_function_arg_boundary): Update accordingly.
24602 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
24603 Warn about ABI differences.
24605 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
24608 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
24609 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
24610 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
24611 (aarch64_gimplify_va_arg_expr): Likewise.
24613 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
24615 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
24616 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
24617 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
24619 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
24620 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
24621 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
24622 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
24623 * config/arm/arm_mve.h (vhsubq): Remove.
24625 (vhaddq_m): Remove.
24626 (vhsubq_m): Remove.
24627 (vhaddq_x): Remove.
24628 (vhsubq_x): Remove.
24629 (vhsubq_u8): Remove.
24630 (vhsubq_n_u8): Remove.
24631 (vhaddq_u8): Remove.
24632 (vhaddq_n_u8): Remove.
24633 (vhsubq_s8): Remove.
24634 (vhsubq_n_s8): Remove.
24635 (vhaddq_s8): Remove.
24636 (vhaddq_n_s8): Remove.
24637 (vhsubq_u16): Remove.
24638 (vhsubq_n_u16): Remove.
24639 (vhaddq_u16): Remove.
24640 (vhaddq_n_u16): Remove.
24641 (vhsubq_s16): Remove.
24642 (vhsubq_n_s16): Remove.
24643 (vhaddq_s16): Remove.
24644 (vhaddq_n_s16): Remove.
24645 (vhsubq_u32): Remove.
24646 (vhsubq_n_u32): Remove.
24647 (vhaddq_u32): Remove.
24648 (vhaddq_n_u32): Remove.
24649 (vhsubq_s32): Remove.
24650 (vhsubq_n_s32): Remove.
24651 (vhaddq_s32): Remove.
24652 (vhaddq_n_s32): Remove.
24653 (vhaddq_m_n_s8): Remove.
24654 (vhaddq_m_n_s32): Remove.
24655 (vhaddq_m_n_s16): Remove.
24656 (vhaddq_m_n_u8): Remove.
24657 (vhaddq_m_n_u32): Remove.
24658 (vhaddq_m_n_u16): Remove.
24659 (vhaddq_m_s8): Remove.
24660 (vhaddq_m_s32): Remove.
24661 (vhaddq_m_s16): Remove.
24662 (vhaddq_m_u8): Remove.
24663 (vhaddq_m_u32): Remove.
24664 (vhaddq_m_u16): Remove.
24665 (vhsubq_m_n_s8): Remove.
24666 (vhsubq_m_n_s32): Remove.
24667 (vhsubq_m_n_s16): Remove.
24668 (vhsubq_m_n_u8): Remove.
24669 (vhsubq_m_n_u32): Remove.
24670 (vhsubq_m_n_u16): Remove.
24671 (vhsubq_m_s8): Remove.
24672 (vhsubq_m_s32): Remove.
24673 (vhsubq_m_s16): Remove.
24674 (vhsubq_m_u8): Remove.
24675 (vhsubq_m_u32): Remove.
24676 (vhsubq_m_u16): Remove.
24677 (vhaddq_x_n_s8): Remove.
24678 (vhaddq_x_n_s16): Remove.
24679 (vhaddq_x_n_s32): Remove.
24680 (vhaddq_x_n_u8): Remove.
24681 (vhaddq_x_n_u16): Remove.
24682 (vhaddq_x_n_u32): Remove.
24683 (vhaddq_x_s8): Remove.
24684 (vhaddq_x_s16): Remove.
24685 (vhaddq_x_s32): Remove.
24686 (vhaddq_x_u8): Remove.
24687 (vhaddq_x_u16): Remove.
24688 (vhaddq_x_u32): Remove.
24689 (vhsubq_x_n_s8): Remove.
24690 (vhsubq_x_n_s16): Remove.
24691 (vhsubq_x_n_s32): Remove.
24692 (vhsubq_x_n_u8): Remove.
24693 (vhsubq_x_n_u16): Remove.
24694 (vhsubq_x_n_u32): Remove.
24695 (vhsubq_x_s8): Remove.
24696 (vhsubq_x_s16): Remove.
24697 (vhsubq_x_s32): Remove.
24698 (vhsubq_x_u8): Remove.
24699 (vhsubq_x_u16): Remove.
24700 (vhsubq_x_u32): Remove.
24701 (__arm_vhsubq_u8): Remove.
24702 (__arm_vhsubq_n_u8): Remove.
24703 (__arm_vhaddq_u8): Remove.
24704 (__arm_vhaddq_n_u8): Remove.
24705 (__arm_vhsubq_s8): Remove.
24706 (__arm_vhsubq_n_s8): Remove.
24707 (__arm_vhaddq_s8): Remove.
24708 (__arm_vhaddq_n_s8): Remove.
24709 (__arm_vhsubq_u16): Remove.
24710 (__arm_vhsubq_n_u16): Remove.
24711 (__arm_vhaddq_u16): Remove.
24712 (__arm_vhaddq_n_u16): Remove.
24713 (__arm_vhsubq_s16): Remove.
24714 (__arm_vhsubq_n_s16): Remove.
24715 (__arm_vhaddq_s16): Remove.
24716 (__arm_vhaddq_n_s16): Remove.
24717 (__arm_vhsubq_u32): Remove.
24718 (__arm_vhsubq_n_u32): Remove.
24719 (__arm_vhaddq_u32): Remove.
24720 (__arm_vhaddq_n_u32): Remove.
24721 (__arm_vhsubq_s32): Remove.
24722 (__arm_vhsubq_n_s32): Remove.
24723 (__arm_vhaddq_s32): Remove.
24724 (__arm_vhaddq_n_s32): Remove.
24725 (__arm_vhaddq_m_n_s8): Remove.
24726 (__arm_vhaddq_m_n_s32): Remove.
24727 (__arm_vhaddq_m_n_s16): Remove.
24728 (__arm_vhaddq_m_n_u8): Remove.
24729 (__arm_vhaddq_m_n_u32): Remove.
24730 (__arm_vhaddq_m_n_u16): Remove.
24731 (__arm_vhaddq_m_s8): Remove.
24732 (__arm_vhaddq_m_s32): Remove.
24733 (__arm_vhaddq_m_s16): Remove.
24734 (__arm_vhaddq_m_u8): Remove.
24735 (__arm_vhaddq_m_u32): Remove.
24736 (__arm_vhaddq_m_u16): Remove.
24737 (__arm_vhsubq_m_n_s8): Remove.
24738 (__arm_vhsubq_m_n_s32): Remove.
24739 (__arm_vhsubq_m_n_s16): Remove.
24740 (__arm_vhsubq_m_n_u8): Remove.
24741 (__arm_vhsubq_m_n_u32): Remove.
24742 (__arm_vhsubq_m_n_u16): Remove.
24743 (__arm_vhsubq_m_s8): Remove.
24744 (__arm_vhsubq_m_s32): Remove.
24745 (__arm_vhsubq_m_s16): Remove.
24746 (__arm_vhsubq_m_u8): Remove.
24747 (__arm_vhsubq_m_u32): Remove.
24748 (__arm_vhsubq_m_u16): Remove.
24749 (__arm_vhaddq_x_n_s8): Remove.
24750 (__arm_vhaddq_x_n_s16): Remove.
24751 (__arm_vhaddq_x_n_s32): Remove.
24752 (__arm_vhaddq_x_n_u8): Remove.
24753 (__arm_vhaddq_x_n_u16): Remove.
24754 (__arm_vhaddq_x_n_u32): Remove.
24755 (__arm_vhaddq_x_s8): Remove.
24756 (__arm_vhaddq_x_s16): Remove.
24757 (__arm_vhaddq_x_s32): Remove.
24758 (__arm_vhaddq_x_u8): Remove.
24759 (__arm_vhaddq_x_u16): Remove.
24760 (__arm_vhaddq_x_u32): Remove.
24761 (__arm_vhsubq_x_n_s8): Remove.
24762 (__arm_vhsubq_x_n_s16): Remove.
24763 (__arm_vhsubq_x_n_s32): Remove.
24764 (__arm_vhsubq_x_n_u8): Remove.
24765 (__arm_vhsubq_x_n_u16): Remove.
24766 (__arm_vhsubq_x_n_u32): Remove.
24767 (__arm_vhsubq_x_s8): Remove.
24768 (__arm_vhsubq_x_s16): Remove.
24769 (__arm_vhsubq_x_s32): Remove.
24770 (__arm_vhsubq_x_u8): Remove.
24771 (__arm_vhsubq_x_u16): Remove.
24772 (__arm_vhsubq_x_u32): Remove.
24773 (__arm_vhsubq): Remove.
24774 (__arm_vhaddq): Remove.
24775 (__arm_vhaddq_m): Remove.
24776 (__arm_vhsubq_m): Remove.
24777 (__arm_vhaddq_x): Remove.
24778 (__arm_vhsubq_x): Remove.
24780 (vmulhq_m): Remove.
24781 (vmulhq_x): Remove.
24782 (vmulhq_u8): Remove.
24783 (vmulhq_s8): Remove.
24784 (vmulhq_u16): Remove.
24785 (vmulhq_s16): Remove.
24786 (vmulhq_u32): Remove.
24787 (vmulhq_s32): Remove.
24788 (vmulhq_m_s8): Remove.
24789 (vmulhq_m_s32): Remove.
24790 (vmulhq_m_s16): Remove.
24791 (vmulhq_m_u8): Remove.
24792 (vmulhq_m_u32): Remove.
24793 (vmulhq_m_u16): Remove.
24794 (vmulhq_x_s8): Remove.
24795 (vmulhq_x_s16): Remove.
24796 (vmulhq_x_s32): Remove.
24797 (vmulhq_x_u8): Remove.
24798 (vmulhq_x_u16): Remove.
24799 (vmulhq_x_u32): Remove.
24800 (__arm_vmulhq_u8): Remove.
24801 (__arm_vmulhq_s8): Remove.
24802 (__arm_vmulhq_u16): Remove.
24803 (__arm_vmulhq_s16): Remove.
24804 (__arm_vmulhq_u32): Remove.
24805 (__arm_vmulhq_s32): Remove.
24806 (__arm_vmulhq_m_s8): Remove.
24807 (__arm_vmulhq_m_s32): Remove.
24808 (__arm_vmulhq_m_s16): Remove.
24809 (__arm_vmulhq_m_u8): Remove.
24810 (__arm_vmulhq_m_u32): Remove.
24811 (__arm_vmulhq_m_u16): Remove.
24812 (__arm_vmulhq_x_s8): Remove.
24813 (__arm_vmulhq_x_s16): Remove.
24814 (__arm_vmulhq_x_s32): Remove.
24815 (__arm_vmulhq_x_u8): Remove.
24816 (__arm_vmulhq_x_u16): Remove.
24817 (__arm_vmulhq_x_u32): Remove.
24818 (__arm_vmulhq): Remove.
24819 (__arm_vmulhq_m): Remove.
24820 (__arm_vmulhq_x): Remove.
24823 (vqaddq_m): Remove.
24824 (vqsubq_m): Remove.
24825 (vqsubq_u8): Remove.
24826 (vqsubq_n_u8): Remove.
24827 (vqaddq_u8): Remove.
24828 (vqaddq_n_u8): Remove.
24829 (vqsubq_s8): Remove.
24830 (vqsubq_n_s8): Remove.
24831 (vqaddq_s8): Remove.
24832 (vqaddq_n_s8): Remove.
24833 (vqsubq_u16): Remove.
24834 (vqsubq_n_u16): Remove.
24835 (vqaddq_u16): Remove.
24836 (vqaddq_n_u16): Remove.
24837 (vqsubq_s16): Remove.
24838 (vqsubq_n_s16): Remove.
24839 (vqaddq_s16): Remove.
24840 (vqaddq_n_s16): Remove.
24841 (vqsubq_u32): Remove.
24842 (vqsubq_n_u32): Remove.
24843 (vqaddq_u32): Remove.
24844 (vqaddq_n_u32): Remove.
24845 (vqsubq_s32): Remove.
24846 (vqsubq_n_s32): Remove.
24847 (vqaddq_s32): Remove.
24848 (vqaddq_n_s32): Remove.
24849 (vqaddq_m_n_s8): Remove.
24850 (vqaddq_m_n_s32): Remove.
24851 (vqaddq_m_n_s16): Remove.
24852 (vqaddq_m_n_u8): Remove.
24853 (vqaddq_m_n_u32): Remove.
24854 (vqaddq_m_n_u16): Remove.
24855 (vqaddq_m_s8): Remove.
24856 (vqaddq_m_s32): Remove.
24857 (vqaddq_m_s16): Remove.
24858 (vqaddq_m_u8): Remove.
24859 (vqaddq_m_u32): Remove.
24860 (vqaddq_m_u16): Remove.
24861 (vqsubq_m_n_s8): Remove.
24862 (vqsubq_m_n_s32): Remove.
24863 (vqsubq_m_n_s16): Remove.
24864 (vqsubq_m_n_u8): Remove.
24865 (vqsubq_m_n_u32): Remove.
24866 (vqsubq_m_n_u16): Remove.
24867 (vqsubq_m_s8): Remove.
24868 (vqsubq_m_s32): Remove.
24869 (vqsubq_m_s16): Remove.
24870 (vqsubq_m_u8): Remove.
24871 (vqsubq_m_u32): Remove.
24872 (vqsubq_m_u16): Remove.
24873 (__arm_vqsubq_u8): Remove.
24874 (__arm_vqsubq_n_u8): Remove.
24875 (__arm_vqaddq_u8): Remove.
24876 (__arm_vqaddq_n_u8): Remove.
24877 (__arm_vqsubq_s8): Remove.
24878 (__arm_vqsubq_n_s8): Remove.
24879 (__arm_vqaddq_s8): Remove.
24880 (__arm_vqaddq_n_s8): Remove.
24881 (__arm_vqsubq_u16): Remove.
24882 (__arm_vqsubq_n_u16): Remove.
24883 (__arm_vqaddq_u16): Remove.
24884 (__arm_vqaddq_n_u16): Remove.
24885 (__arm_vqsubq_s16): Remove.
24886 (__arm_vqsubq_n_s16): Remove.
24887 (__arm_vqaddq_s16): Remove.
24888 (__arm_vqaddq_n_s16): Remove.
24889 (__arm_vqsubq_u32): Remove.
24890 (__arm_vqsubq_n_u32): Remove.
24891 (__arm_vqaddq_u32): Remove.
24892 (__arm_vqaddq_n_u32): Remove.
24893 (__arm_vqsubq_s32): Remove.
24894 (__arm_vqsubq_n_s32): Remove.
24895 (__arm_vqaddq_s32): Remove.
24896 (__arm_vqaddq_n_s32): Remove.
24897 (__arm_vqaddq_m_n_s8): Remove.
24898 (__arm_vqaddq_m_n_s32): Remove.
24899 (__arm_vqaddq_m_n_s16): Remove.
24900 (__arm_vqaddq_m_n_u8): Remove.
24901 (__arm_vqaddq_m_n_u32): Remove.
24902 (__arm_vqaddq_m_n_u16): Remove.
24903 (__arm_vqaddq_m_s8): Remove.
24904 (__arm_vqaddq_m_s32): Remove.
24905 (__arm_vqaddq_m_s16): Remove.
24906 (__arm_vqaddq_m_u8): Remove.
24907 (__arm_vqaddq_m_u32): Remove.
24908 (__arm_vqaddq_m_u16): Remove.
24909 (__arm_vqsubq_m_n_s8): Remove.
24910 (__arm_vqsubq_m_n_s32): Remove.
24911 (__arm_vqsubq_m_n_s16): Remove.
24912 (__arm_vqsubq_m_n_u8): Remove.
24913 (__arm_vqsubq_m_n_u32): Remove.
24914 (__arm_vqsubq_m_n_u16): Remove.
24915 (__arm_vqsubq_m_s8): Remove.
24916 (__arm_vqsubq_m_s32): Remove.
24917 (__arm_vqsubq_m_s16): Remove.
24918 (__arm_vqsubq_m_u8): Remove.
24919 (__arm_vqsubq_m_u32): Remove.
24920 (__arm_vqsubq_m_u16): Remove.
24921 (__arm_vqsubq): Remove.
24922 (__arm_vqaddq): Remove.
24923 (__arm_vqaddq_m): Remove.
24924 (__arm_vqsubq_m): Remove.
24925 (vqdmulhq): Remove.
24926 (vqdmulhq_m): Remove.
24927 (vqdmulhq_s8): Remove.
24928 (vqdmulhq_n_s8): Remove.
24929 (vqdmulhq_s16): Remove.
24930 (vqdmulhq_n_s16): Remove.
24931 (vqdmulhq_s32): Remove.
24932 (vqdmulhq_n_s32): Remove.
24933 (vqdmulhq_m_n_s8): Remove.
24934 (vqdmulhq_m_n_s32): Remove.
24935 (vqdmulhq_m_n_s16): Remove.
24936 (vqdmulhq_m_s8): Remove.
24937 (vqdmulhq_m_s32): Remove.
24938 (vqdmulhq_m_s16): Remove.
24939 (__arm_vqdmulhq_s8): Remove.
24940 (__arm_vqdmulhq_n_s8): Remove.
24941 (__arm_vqdmulhq_s16): Remove.
24942 (__arm_vqdmulhq_n_s16): Remove.
24943 (__arm_vqdmulhq_s32): Remove.
24944 (__arm_vqdmulhq_n_s32): Remove.
24945 (__arm_vqdmulhq_m_n_s8): Remove.
24946 (__arm_vqdmulhq_m_n_s32): Remove.
24947 (__arm_vqdmulhq_m_n_s16): Remove.
24948 (__arm_vqdmulhq_m_s8): Remove.
24949 (__arm_vqdmulhq_m_s32): Remove.
24950 (__arm_vqdmulhq_m_s16): Remove.
24951 (__arm_vqdmulhq): Remove.
24952 (__arm_vqdmulhq_m): Remove.
24954 (vrhaddq_m): Remove.
24955 (vrhaddq_x): Remove.
24956 (vrhaddq_u8): Remove.
24957 (vrhaddq_s8): Remove.
24958 (vrhaddq_u16): Remove.
24959 (vrhaddq_s16): Remove.
24960 (vrhaddq_u32): Remove.
24961 (vrhaddq_s32): Remove.
24962 (vrhaddq_m_s8): Remove.
24963 (vrhaddq_m_s32): Remove.
24964 (vrhaddq_m_s16): Remove.
24965 (vrhaddq_m_u8): Remove.
24966 (vrhaddq_m_u32): Remove.
24967 (vrhaddq_m_u16): Remove.
24968 (vrhaddq_x_s8): Remove.
24969 (vrhaddq_x_s16): Remove.
24970 (vrhaddq_x_s32): Remove.
24971 (vrhaddq_x_u8): Remove.
24972 (vrhaddq_x_u16): Remove.
24973 (vrhaddq_x_u32): Remove.
24974 (__arm_vrhaddq_u8): Remove.
24975 (__arm_vrhaddq_s8): Remove.
24976 (__arm_vrhaddq_u16): Remove.
24977 (__arm_vrhaddq_s16): Remove.
24978 (__arm_vrhaddq_u32): Remove.
24979 (__arm_vrhaddq_s32): Remove.
24980 (__arm_vrhaddq_m_s8): Remove.
24981 (__arm_vrhaddq_m_s32): Remove.
24982 (__arm_vrhaddq_m_s16): Remove.
24983 (__arm_vrhaddq_m_u8): Remove.
24984 (__arm_vrhaddq_m_u32): Remove.
24985 (__arm_vrhaddq_m_u16): Remove.
24986 (__arm_vrhaddq_x_s8): Remove.
24987 (__arm_vrhaddq_x_s16): Remove.
24988 (__arm_vrhaddq_x_s32): Remove.
24989 (__arm_vrhaddq_x_u8): Remove.
24990 (__arm_vrhaddq_x_u16): Remove.
24991 (__arm_vrhaddq_x_u32): Remove.
24992 (__arm_vrhaddq): Remove.
24993 (__arm_vrhaddq_m): Remove.
24994 (__arm_vrhaddq_x): Remove.
24996 (vrmulhq_m): Remove.
24997 (vrmulhq_x): Remove.
24998 (vrmulhq_u8): Remove.
24999 (vrmulhq_s8): Remove.
25000 (vrmulhq_u16): Remove.
25001 (vrmulhq_s16): Remove.
25002 (vrmulhq_u32): Remove.
25003 (vrmulhq_s32): Remove.
25004 (vrmulhq_m_s8): Remove.
25005 (vrmulhq_m_s32): Remove.
25006 (vrmulhq_m_s16): Remove.
25007 (vrmulhq_m_u8): Remove.
25008 (vrmulhq_m_u32): Remove.
25009 (vrmulhq_m_u16): Remove.
25010 (vrmulhq_x_s8): Remove.
25011 (vrmulhq_x_s16): Remove.
25012 (vrmulhq_x_s32): Remove.
25013 (vrmulhq_x_u8): Remove.
25014 (vrmulhq_x_u16): Remove.
25015 (vrmulhq_x_u32): Remove.
25016 (__arm_vrmulhq_u8): Remove.
25017 (__arm_vrmulhq_s8): Remove.
25018 (__arm_vrmulhq_u16): Remove.
25019 (__arm_vrmulhq_s16): Remove.
25020 (__arm_vrmulhq_u32): Remove.
25021 (__arm_vrmulhq_s32): Remove.
25022 (__arm_vrmulhq_m_s8): Remove.
25023 (__arm_vrmulhq_m_s32): Remove.
25024 (__arm_vrmulhq_m_s16): Remove.
25025 (__arm_vrmulhq_m_u8): Remove.
25026 (__arm_vrmulhq_m_u32): Remove.
25027 (__arm_vrmulhq_m_u16): Remove.
25028 (__arm_vrmulhq_x_s8): Remove.
25029 (__arm_vrmulhq_x_s16): Remove.
25030 (__arm_vrmulhq_x_s32): Remove.
25031 (__arm_vrmulhq_x_u8): Remove.
25032 (__arm_vrmulhq_x_u16): Remove.
25033 (__arm_vrmulhq_x_u32): Remove.
25034 (__arm_vrmulhq): Remove.
25035 (__arm_vrmulhq_m): Remove.
25036 (__arm_vrmulhq_x): Remove.
25038 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25040 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
25041 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
25042 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
25043 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
25044 * config/arm/mve.md (mve_vabdq_<supf><mode>)
25045 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
25046 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
25047 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
25048 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
25049 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
25050 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
25052 (@mve_<mve_insn>q_<supf><mode>): ... this.
25053 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
25054 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
25055 gen_mve_vhaddq / gen_mve_vrhaddq.
25057 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25059 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
25060 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
25061 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
25062 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
25063 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
25064 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
25065 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
25066 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
25067 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
25068 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
25069 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
25070 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
25071 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25073 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25075 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
25076 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
25078 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
25079 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
25080 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
25081 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
25082 (mve_vqsubq_n_<supf><mode>): Merge into ...
25083 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25085 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25087 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
25088 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
25089 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
25090 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
25091 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
25092 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
25093 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
25094 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
25095 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
25096 (mve_vshlq_m_<supf><mode>): Merged into
25097 @mve_<mve_insn>q_m_<supf><mode>.
25098 (mve_vabdq_m_<supf><mode>): Likewise.
25099 (mve_vhaddq_m_<supf><mode>): Likewise.
25100 (mve_vhsubq_m_<supf><mode>): Likewise.
25101 (mve_vmaxq_m_<supf><mode>): Likewise.
25102 (mve_vminq_m_<supf><mode>): Likewise.
25103 (mve_vmulhq_m_<supf><mode>): Likewise.
25104 (mve_vqaddq_m_<supf><mode>): Likewise.
25105 (mve_vqrshlq_m_<supf><mode>): Likewise.
25106 (mve_vqshlq_m_<supf><mode>): Likewise.
25107 (mve_vqsubq_m_<supf><mode>): Likewise.
25108 (mve_vrhaddq_m_<supf><mode>): Likewise.
25109 (mve_vrmulhq_m_<supf><mode>): Likewise.
25110 (mve_vrshlq_m_<supf><mode>): Likewise.
25111 (mve_vqdmladhq_m_s<mode>): Likewise.
25112 (mve_vqdmladhxq_m_s<mode>): Likewise.
25113 (mve_vqdmlsdhq_m_s<mode>): Likewise.
25114 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
25115 (mve_vqdmulhq_m_s<mode>): Likewise.
25116 (mve_vqrdmladhq_m_s<mode>): Likewise.
25117 (mve_vqrdmladhxq_m_s<mode>): Likewise.
25118 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
25119 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
25120 (mve_vqrdmulhq_m_s<mode>): Likewise.
25122 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25124 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
25125 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
25126 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
25127 * config/arm/arm_mve.h (vcreateq_f16): Remove.
25128 (vcreateq_f32): Remove.
25129 (vcreateq_u8): Remove.
25130 (vcreateq_u16): Remove.
25131 (vcreateq_u32): Remove.
25132 (vcreateq_u64): Remove.
25133 (vcreateq_s8): Remove.
25134 (vcreateq_s16): Remove.
25135 (vcreateq_s32): Remove.
25136 (vcreateq_s64): Remove.
25137 (__arm_vcreateq_u8): Remove.
25138 (__arm_vcreateq_u16): Remove.
25139 (__arm_vcreateq_u32): Remove.
25140 (__arm_vcreateq_u64): Remove.
25141 (__arm_vcreateq_s8): Remove.
25142 (__arm_vcreateq_s16): Remove.
25143 (__arm_vcreateq_s32): Remove.
25144 (__arm_vcreateq_s64): Remove.
25145 (__arm_vcreateq_f16): Remove.
25146 (__arm_vcreateq_f32): Remove.
25148 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25150 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
25151 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
25152 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
25153 (@mve_<mve_insn>q_f<mode>): ... this.
25154 (mve_vcreateq_<supf><mode>): Rename into ...
25155 (@mve_<mve_insn>q_<supf><mode>): ... this.
25157 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25159 * config/arm/arm-mve-builtins-shapes.cc (create): New.
25160 * config/arm/arm-mve-builtins-shapes.h: (create): New.
25162 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25164 * config/arm/arm-mve-builtins-functions.h (class
25165 unspec_mve_function_exact_insn): New.
25167 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25169 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
25171 * config/arm/arm-mve-builtins-base.def (vorrq): New.
25172 * config/arm/arm-mve-builtins-base.h (vorrq): New.
25173 * config/arm/arm-mve-builtins.cc
25174 (function_instance::has_inactive_argument): Handle vorrq.
25175 * config/arm/arm_mve.h (vorrq): Remove.
25176 (vorrq_m_n): Remove.
25179 (vorrq_u8): Remove.
25180 (vorrq_s8): Remove.
25181 (vorrq_u16): Remove.
25182 (vorrq_s16): Remove.
25183 (vorrq_u32): Remove.
25184 (vorrq_s32): Remove.
25185 (vorrq_n_u16): Remove.
25186 (vorrq_f16): Remove.
25187 (vorrq_n_s16): Remove.
25188 (vorrq_n_u32): Remove.
25189 (vorrq_f32): Remove.
25190 (vorrq_n_s32): Remove.
25191 (vorrq_m_n_s16): Remove.
25192 (vorrq_m_n_u16): Remove.
25193 (vorrq_m_n_s32): Remove.
25194 (vorrq_m_n_u32): Remove.
25195 (vorrq_m_s8): Remove.
25196 (vorrq_m_s32): Remove.
25197 (vorrq_m_s16): Remove.
25198 (vorrq_m_u8): Remove.
25199 (vorrq_m_u32): Remove.
25200 (vorrq_m_u16): Remove.
25201 (vorrq_m_f32): Remove.
25202 (vorrq_m_f16): Remove.
25203 (vorrq_x_s8): Remove.
25204 (vorrq_x_s16): Remove.
25205 (vorrq_x_s32): Remove.
25206 (vorrq_x_u8): Remove.
25207 (vorrq_x_u16): Remove.
25208 (vorrq_x_u32): Remove.
25209 (vorrq_x_f16): Remove.
25210 (vorrq_x_f32): Remove.
25211 (__arm_vorrq_u8): Remove.
25212 (__arm_vorrq_s8): Remove.
25213 (__arm_vorrq_u16): Remove.
25214 (__arm_vorrq_s16): Remove.
25215 (__arm_vorrq_u32): Remove.
25216 (__arm_vorrq_s32): Remove.
25217 (__arm_vorrq_n_u16): Remove.
25218 (__arm_vorrq_n_s16): Remove.
25219 (__arm_vorrq_n_u32): Remove.
25220 (__arm_vorrq_n_s32): Remove.
25221 (__arm_vorrq_m_n_s16): Remove.
25222 (__arm_vorrq_m_n_u16): Remove.
25223 (__arm_vorrq_m_n_s32): Remove.
25224 (__arm_vorrq_m_n_u32): Remove.
25225 (__arm_vorrq_m_s8): Remove.
25226 (__arm_vorrq_m_s32): Remove.
25227 (__arm_vorrq_m_s16): Remove.
25228 (__arm_vorrq_m_u8): Remove.
25229 (__arm_vorrq_m_u32): Remove.
25230 (__arm_vorrq_m_u16): Remove.
25231 (__arm_vorrq_x_s8): Remove.
25232 (__arm_vorrq_x_s16): Remove.
25233 (__arm_vorrq_x_s32): Remove.
25234 (__arm_vorrq_x_u8): Remove.
25235 (__arm_vorrq_x_u16): Remove.
25236 (__arm_vorrq_x_u32): Remove.
25237 (__arm_vorrq_f16): Remove.
25238 (__arm_vorrq_f32): Remove.
25239 (__arm_vorrq_m_f32): Remove.
25240 (__arm_vorrq_m_f16): Remove.
25241 (__arm_vorrq_x_f16): Remove.
25242 (__arm_vorrq_x_f32): Remove.
25243 (__arm_vorrq): Remove.
25244 (__arm_vorrq_m_n): Remove.
25245 (__arm_vorrq_m): Remove.
25246 (__arm_vorrq_x): Remove.
25248 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25250 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
25251 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
25252 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
25253 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
25255 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25257 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
25258 (vandq,veorq): New.
25259 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
25260 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
25261 * config/arm/arm_mve.h (vandq): Remove.
25264 (vandq_u8): Remove.
25265 (vandq_s8): Remove.
25266 (vandq_u16): Remove.
25267 (vandq_s16): Remove.
25268 (vandq_u32): Remove.
25269 (vandq_s32): Remove.
25270 (vandq_f16): Remove.
25271 (vandq_f32): Remove.
25272 (vandq_m_s8): Remove.
25273 (vandq_m_s32): Remove.
25274 (vandq_m_s16): Remove.
25275 (vandq_m_u8): Remove.
25276 (vandq_m_u32): Remove.
25277 (vandq_m_u16): Remove.
25278 (vandq_m_f32): Remove.
25279 (vandq_m_f16): Remove.
25280 (vandq_x_s8): Remove.
25281 (vandq_x_s16): Remove.
25282 (vandq_x_s32): Remove.
25283 (vandq_x_u8): Remove.
25284 (vandq_x_u16): Remove.
25285 (vandq_x_u32): Remove.
25286 (vandq_x_f16): Remove.
25287 (vandq_x_f32): Remove.
25288 (__arm_vandq_u8): Remove.
25289 (__arm_vandq_s8): Remove.
25290 (__arm_vandq_u16): Remove.
25291 (__arm_vandq_s16): Remove.
25292 (__arm_vandq_u32): Remove.
25293 (__arm_vandq_s32): Remove.
25294 (__arm_vandq_m_s8): Remove.
25295 (__arm_vandq_m_s32): Remove.
25296 (__arm_vandq_m_s16): Remove.
25297 (__arm_vandq_m_u8): Remove.
25298 (__arm_vandq_m_u32): Remove.
25299 (__arm_vandq_m_u16): Remove.
25300 (__arm_vandq_x_s8): Remove.
25301 (__arm_vandq_x_s16): Remove.
25302 (__arm_vandq_x_s32): Remove.
25303 (__arm_vandq_x_u8): Remove.
25304 (__arm_vandq_x_u16): Remove.
25305 (__arm_vandq_x_u32): Remove.
25306 (__arm_vandq_f16): Remove.
25307 (__arm_vandq_f32): Remove.
25308 (__arm_vandq_m_f32): Remove.
25309 (__arm_vandq_m_f16): Remove.
25310 (__arm_vandq_x_f16): Remove.
25311 (__arm_vandq_x_f32): Remove.
25312 (__arm_vandq): Remove.
25313 (__arm_vandq_m): Remove.
25314 (__arm_vandq_x): Remove.
25317 (veorq_u8): Remove.
25318 (veorq_s8): Remove.
25319 (veorq_u16): Remove.
25320 (veorq_s16): Remove.
25321 (veorq_u32): Remove.
25322 (veorq_s32): Remove.
25323 (veorq_f16): Remove.
25324 (veorq_f32): Remove.
25325 (veorq_m_s8): Remove.
25326 (veorq_m_s32): Remove.
25327 (veorq_m_s16): Remove.
25328 (veorq_m_u8): Remove.
25329 (veorq_m_u32): Remove.
25330 (veorq_m_u16): Remove.
25331 (veorq_m_f32): Remove.
25332 (veorq_m_f16): Remove.
25333 (veorq_x_s8): Remove.
25334 (veorq_x_s16): Remove.
25335 (veorq_x_s32): Remove.
25336 (veorq_x_u8): Remove.
25337 (veorq_x_u16): Remove.
25338 (veorq_x_u32): Remove.
25339 (veorq_x_f16): Remove.
25340 (veorq_x_f32): Remove.
25341 (__arm_veorq_u8): Remove.
25342 (__arm_veorq_s8): Remove.
25343 (__arm_veorq_u16): Remove.
25344 (__arm_veorq_s16): Remove.
25345 (__arm_veorq_u32): Remove.
25346 (__arm_veorq_s32): Remove.
25347 (__arm_veorq_m_s8): Remove.
25348 (__arm_veorq_m_s32): Remove.
25349 (__arm_veorq_m_s16): Remove.
25350 (__arm_veorq_m_u8): Remove.
25351 (__arm_veorq_m_u32): Remove.
25352 (__arm_veorq_m_u16): Remove.
25353 (__arm_veorq_x_s8): Remove.
25354 (__arm_veorq_x_s16): Remove.
25355 (__arm_veorq_x_s32): Remove.
25356 (__arm_veorq_x_u8): Remove.
25357 (__arm_veorq_x_u16): Remove.
25358 (__arm_veorq_x_u32): Remove.
25359 (__arm_veorq_f16): Remove.
25360 (__arm_veorq_f32): Remove.
25361 (__arm_veorq_m_f32): Remove.
25362 (__arm_veorq_m_f16): Remove.
25363 (__arm_veorq_x_f16): Remove.
25364 (__arm_veorq_x_f32): Remove.
25365 (__arm_veorq): Remove.
25366 (__arm_veorq_m): Remove.
25367 (__arm_veorq_x): Remove.
25369 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25371 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
25372 (MVE_FP_M_BINARY_LOGIC): New.
25373 (MVE_INT_M_N_BINARY_LOGIC): New.
25374 (MVE_INT_N_BINARY_LOGIC): New.
25375 (mve_insn): Add vand, veor, vorr, vbic.
25376 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
25377 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
25378 (mve_vbicq_m_<supf><mode>): Merge into ...
25379 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
25380 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
25381 (mve_vbicq_m_f<mode>): Merge into ...
25382 (@mve_<mve_insn>q_m_f<mode>): ... this.
25383 (mve_vorrq_n_<supf><mode>)
25384 (mve_vbicq_n_<supf><mode>): Merge into ...
25385 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25386 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
25388 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25390 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25392 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
25393 * config/arm/arm-mve-builtins-shapes.h (binary): New.
25395 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25397 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
25399 (vaddq, vmulq, vsubq): New.
25400 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
25401 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
25402 * config/arm/arm_mve.h (vaddq): Remove.
25405 (vaddq_n_u8): Remove.
25406 (vaddq_n_s8): Remove.
25407 (vaddq_n_u16): Remove.
25408 (vaddq_n_s16): Remove.
25409 (vaddq_n_u32): Remove.
25410 (vaddq_n_s32): Remove.
25411 (vaddq_n_f16): Remove.
25412 (vaddq_n_f32): Remove.
25413 (vaddq_m_n_s8): Remove.
25414 (vaddq_m_n_s32): Remove.
25415 (vaddq_m_n_s16): Remove.
25416 (vaddq_m_n_u8): Remove.
25417 (vaddq_m_n_u32): Remove.
25418 (vaddq_m_n_u16): Remove.
25419 (vaddq_m_s8): Remove.
25420 (vaddq_m_s32): Remove.
25421 (vaddq_m_s16): Remove.
25422 (vaddq_m_u8): Remove.
25423 (vaddq_m_u32): Remove.
25424 (vaddq_m_u16): Remove.
25425 (vaddq_m_f32): Remove.
25426 (vaddq_m_f16): Remove.
25427 (vaddq_m_n_f32): Remove.
25428 (vaddq_m_n_f16): Remove.
25429 (vaddq_s8): Remove.
25430 (vaddq_s16): Remove.
25431 (vaddq_s32): Remove.
25432 (vaddq_u8): Remove.
25433 (vaddq_u16): Remove.
25434 (vaddq_u32): Remove.
25435 (vaddq_f16): Remove.
25436 (vaddq_f32): Remove.
25437 (vaddq_x_s8): Remove.
25438 (vaddq_x_s16): Remove.
25439 (vaddq_x_s32): Remove.
25440 (vaddq_x_n_s8): Remove.
25441 (vaddq_x_n_s16): Remove.
25442 (vaddq_x_n_s32): Remove.
25443 (vaddq_x_u8): Remove.
25444 (vaddq_x_u16): Remove.
25445 (vaddq_x_u32): Remove.
25446 (vaddq_x_n_u8): Remove.
25447 (vaddq_x_n_u16): Remove.
25448 (vaddq_x_n_u32): Remove.
25449 (vaddq_x_f16): Remove.
25450 (vaddq_x_f32): Remove.
25451 (vaddq_x_n_f16): Remove.
25452 (vaddq_x_n_f32): Remove.
25453 (__arm_vaddq_n_u8): Remove.
25454 (__arm_vaddq_n_s8): Remove.
25455 (__arm_vaddq_n_u16): Remove.
25456 (__arm_vaddq_n_s16): Remove.
25457 (__arm_vaddq_n_u32): Remove.
25458 (__arm_vaddq_n_s32): Remove.
25459 (__arm_vaddq_m_n_s8): Remove.
25460 (__arm_vaddq_m_n_s32): Remove.
25461 (__arm_vaddq_m_n_s16): Remove.
25462 (__arm_vaddq_m_n_u8): Remove.
25463 (__arm_vaddq_m_n_u32): Remove.
25464 (__arm_vaddq_m_n_u16): Remove.
25465 (__arm_vaddq_m_s8): Remove.
25466 (__arm_vaddq_m_s32): Remove.
25467 (__arm_vaddq_m_s16): Remove.
25468 (__arm_vaddq_m_u8): Remove.
25469 (__arm_vaddq_m_u32): Remove.
25470 (__arm_vaddq_m_u16): Remove.
25471 (__arm_vaddq_s8): Remove.
25472 (__arm_vaddq_s16): Remove.
25473 (__arm_vaddq_s32): Remove.
25474 (__arm_vaddq_u8): Remove.
25475 (__arm_vaddq_u16): Remove.
25476 (__arm_vaddq_u32): Remove.
25477 (__arm_vaddq_x_s8): Remove.
25478 (__arm_vaddq_x_s16): Remove.
25479 (__arm_vaddq_x_s32): Remove.
25480 (__arm_vaddq_x_n_s8): Remove.
25481 (__arm_vaddq_x_n_s16): Remove.
25482 (__arm_vaddq_x_n_s32): Remove.
25483 (__arm_vaddq_x_u8): Remove.
25484 (__arm_vaddq_x_u16): Remove.
25485 (__arm_vaddq_x_u32): Remove.
25486 (__arm_vaddq_x_n_u8): Remove.
25487 (__arm_vaddq_x_n_u16): Remove.
25488 (__arm_vaddq_x_n_u32): Remove.
25489 (__arm_vaddq_n_f16): Remove.
25490 (__arm_vaddq_n_f32): Remove.
25491 (__arm_vaddq_m_f32): Remove.
25492 (__arm_vaddq_m_f16): Remove.
25493 (__arm_vaddq_m_n_f32): Remove.
25494 (__arm_vaddq_m_n_f16): Remove.
25495 (__arm_vaddq_f16): Remove.
25496 (__arm_vaddq_f32): Remove.
25497 (__arm_vaddq_x_f16): Remove.
25498 (__arm_vaddq_x_f32): Remove.
25499 (__arm_vaddq_x_n_f16): Remove.
25500 (__arm_vaddq_x_n_f32): Remove.
25501 (__arm_vaddq): Remove.
25502 (__arm_vaddq_m): Remove.
25503 (__arm_vaddq_x): Remove.
25507 (vmulq_u8): Remove.
25508 (vmulq_n_u8): Remove.
25509 (vmulq_s8): Remove.
25510 (vmulq_n_s8): Remove.
25511 (vmulq_u16): Remove.
25512 (vmulq_n_u16): Remove.
25513 (vmulq_s16): Remove.
25514 (vmulq_n_s16): Remove.
25515 (vmulq_u32): Remove.
25516 (vmulq_n_u32): Remove.
25517 (vmulq_s32): Remove.
25518 (vmulq_n_s32): Remove.
25519 (vmulq_n_f16): Remove.
25520 (vmulq_f16): Remove.
25521 (vmulq_n_f32): Remove.
25522 (vmulq_f32): Remove.
25523 (vmulq_m_n_s8): Remove.
25524 (vmulq_m_n_s32): Remove.
25525 (vmulq_m_n_s16): Remove.
25526 (vmulq_m_n_u8): Remove.
25527 (vmulq_m_n_u32): Remove.
25528 (vmulq_m_n_u16): Remove.
25529 (vmulq_m_s8): Remove.
25530 (vmulq_m_s32): Remove.
25531 (vmulq_m_s16): Remove.
25532 (vmulq_m_u8): Remove.
25533 (vmulq_m_u32): Remove.
25534 (vmulq_m_u16): Remove.
25535 (vmulq_m_f32): Remove.
25536 (vmulq_m_f16): Remove.
25537 (vmulq_m_n_f32): Remove.
25538 (vmulq_m_n_f16): Remove.
25539 (vmulq_x_s8): Remove.
25540 (vmulq_x_s16): Remove.
25541 (vmulq_x_s32): Remove.
25542 (vmulq_x_n_s8): Remove.
25543 (vmulq_x_n_s16): Remove.
25544 (vmulq_x_n_s32): Remove.
25545 (vmulq_x_u8): Remove.
25546 (vmulq_x_u16): Remove.
25547 (vmulq_x_u32): Remove.
25548 (vmulq_x_n_u8): Remove.
25549 (vmulq_x_n_u16): Remove.
25550 (vmulq_x_n_u32): Remove.
25551 (vmulq_x_f16): Remove.
25552 (vmulq_x_f32): Remove.
25553 (vmulq_x_n_f16): Remove.
25554 (vmulq_x_n_f32): Remove.
25555 (__arm_vmulq_u8): Remove.
25556 (__arm_vmulq_n_u8): Remove.
25557 (__arm_vmulq_s8): Remove.
25558 (__arm_vmulq_n_s8): Remove.
25559 (__arm_vmulq_u16): Remove.
25560 (__arm_vmulq_n_u16): Remove.
25561 (__arm_vmulq_s16): Remove.
25562 (__arm_vmulq_n_s16): Remove.
25563 (__arm_vmulq_u32): Remove.
25564 (__arm_vmulq_n_u32): Remove.
25565 (__arm_vmulq_s32): Remove.
25566 (__arm_vmulq_n_s32): Remove.
25567 (__arm_vmulq_m_n_s8): Remove.
25568 (__arm_vmulq_m_n_s32): Remove.
25569 (__arm_vmulq_m_n_s16): Remove.
25570 (__arm_vmulq_m_n_u8): Remove.
25571 (__arm_vmulq_m_n_u32): Remove.
25572 (__arm_vmulq_m_n_u16): Remove.
25573 (__arm_vmulq_m_s8): Remove.
25574 (__arm_vmulq_m_s32): Remove.
25575 (__arm_vmulq_m_s16): Remove.
25576 (__arm_vmulq_m_u8): Remove.
25577 (__arm_vmulq_m_u32): Remove.
25578 (__arm_vmulq_m_u16): Remove.
25579 (__arm_vmulq_x_s8): Remove.
25580 (__arm_vmulq_x_s16): Remove.
25581 (__arm_vmulq_x_s32): Remove.
25582 (__arm_vmulq_x_n_s8): Remove.
25583 (__arm_vmulq_x_n_s16): Remove.
25584 (__arm_vmulq_x_n_s32): Remove.
25585 (__arm_vmulq_x_u8): Remove.
25586 (__arm_vmulq_x_u16): Remove.
25587 (__arm_vmulq_x_u32): Remove.
25588 (__arm_vmulq_x_n_u8): Remove.
25589 (__arm_vmulq_x_n_u16): Remove.
25590 (__arm_vmulq_x_n_u32): Remove.
25591 (__arm_vmulq_n_f16): Remove.
25592 (__arm_vmulq_f16): Remove.
25593 (__arm_vmulq_n_f32): Remove.
25594 (__arm_vmulq_f32): Remove.
25595 (__arm_vmulq_m_f32): Remove.
25596 (__arm_vmulq_m_f16): Remove.
25597 (__arm_vmulq_m_n_f32): Remove.
25598 (__arm_vmulq_m_n_f16): Remove.
25599 (__arm_vmulq_x_f16): Remove.
25600 (__arm_vmulq_x_f32): Remove.
25601 (__arm_vmulq_x_n_f16): Remove.
25602 (__arm_vmulq_x_n_f32): Remove.
25603 (__arm_vmulq): Remove.
25604 (__arm_vmulq_m): Remove.
25605 (__arm_vmulq_x): Remove.
25609 (vsubq_n_f16): Remove.
25610 (vsubq_n_f32): Remove.
25611 (vsubq_u8): Remove.
25612 (vsubq_n_u8): Remove.
25613 (vsubq_s8): Remove.
25614 (vsubq_n_s8): Remove.
25615 (vsubq_u16): Remove.
25616 (vsubq_n_u16): Remove.
25617 (vsubq_s16): Remove.
25618 (vsubq_n_s16): Remove.
25619 (vsubq_u32): Remove.
25620 (vsubq_n_u32): Remove.
25621 (vsubq_s32): Remove.
25622 (vsubq_n_s32): Remove.
25623 (vsubq_f16): Remove.
25624 (vsubq_f32): Remove.
25625 (vsubq_m_s8): Remove.
25626 (vsubq_m_u8): Remove.
25627 (vsubq_m_s16): Remove.
25628 (vsubq_m_u16): Remove.
25629 (vsubq_m_s32): Remove.
25630 (vsubq_m_u32): Remove.
25631 (vsubq_m_n_s8): Remove.
25632 (vsubq_m_n_s32): Remove.
25633 (vsubq_m_n_s16): Remove.
25634 (vsubq_m_n_u8): Remove.
25635 (vsubq_m_n_u32): Remove.
25636 (vsubq_m_n_u16): Remove.
25637 (vsubq_m_f32): Remove.
25638 (vsubq_m_f16): Remove.
25639 (vsubq_m_n_f32): Remove.
25640 (vsubq_m_n_f16): Remove.
25641 (vsubq_x_s8): Remove.
25642 (vsubq_x_s16): Remove.
25643 (vsubq_x_s32): Remove.
25644 (vsubq_x_n_s8): Remove.
25645 (vsubq_x_n_s16): Remove.
25646 (vsubq_x_n_s32): Remove.
25647 (vsubq_x_u8): Remove.
25648 (vsubq_x_u16): Remove.
25649 (vsubq_x_u32): Remove.
25650 (vsubq_x_n_u8): Remove.
25651 (vsubq_x_n_u16): Remove.
25652 (vsubq_x_n_u32): Remove.
25653 (vsubq_x_f16): Remove.
25654 (vsubq_x_f32): Remove.
25655 (vsubq_x_n_f16): Remove.
25656 (vsubq_x_n_f32): Remove.
25657 (__arm_vsubq_u8): Remove.
25658 (__arm_vsubq_n_u8): Remove.
25659 (__arm_vsubq_s8): Remove.
25660 (__arm_vsubq_n_s8): Remove.
25661 (__arm_vsubq_u16): Remove.
25662 (__arm_vsubq_n_u16): Remove.
25663 (__arm_vsubq_s16): Remove.
25664 (__arm_vsubq_n_s16): Remove.
25665 (__arm_vsubq_u32): Remove.
25666 (__arm_vsubq_n_u32): Remove.
25667 (__arm_vsubq_s32): Remove.
25668 (__arm_vsubq_n_s32): Remove.
25669 (__arm_vsubq_m_s8): Remove.
25670 (__arm_vsubq_m_u8): Remove.
25671 (__arm_vsubq_m_s16): Remove.
25672 (__arm_vsubq_m_u16): Remove.
25673 (__arm_vsubq_m_s32): Remove.
25674 (__arm_vsubq_m_u32): Remove.
25675 (__arm_vsubq_m_n_s8): Remove.
25676 (__arm_vsubq_m_n_s32): Remove.
25677 (__arm_vsubq_m_n_s16): Remove.
25678 (__arm_vsubq_m_n_u8): Remove.
25679 (__arm_vsubq_m_n_u32): Remove.
25680 (__arm_vsubq_m_n_u16): Remove.
25681 (__arm_vsubq_x_s8): Remove.
25682 (__arm_vsubq_x_s16): Remove.
25683 (__arm_vsubq_x_s32): Remove.
25684 (__arm_vsubq_x_n_s8): Remove.
25685 (__arm_vsubq_x_n_s16): Remove.
25686 (__arm_vsubq_x_n_s32): Remove.
25687 (__arm_vsubq_x_u8): Remove.
25688 (__arm_vsubq_x_u16): Remove.
25689 (__arm_vsubq_x_u32): Remove.
25690 (__arm_vsubq_x_n_u8): Remove.
25691 (__arm_vsubq_x_n_u16): Remove.
25692 (__arm_vsubq_x_n_u32): Remove.
25693 (__arm_vsubq_n_f16): Remove.
25694 (__arm_vsubq_n_f32): Remove.
25695 (__arm_vsubq_f16): Remove.
25696 (__arm_vsubq_f32): Remove.
25697 (__arm_vsubq_m_f32): Remove.
25698 (__arm_vsubq_m_f16): Remove.
25699 (__arm_vsubq_m_n_f32): Remove.
25700 (__arm_vsubq_m_n_f16): Remove.
25701 (__arm_vsubq_x_f16): Remove.
25702 (__arm_vsubq_x_f32): Remove.
25703 (__arm_vsubq_x_n_f16): Remove.
25704 (__arm_vsubq_x_n_f32): Remove.
25705 (__arm_vsubq): Remove.
25706 (__arm_vsubq_m): Remove.
25707 (__arm_vsubq_x): Remove.
25708 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
25710 (vmulq_u, vmulq_s, vmulq_f): Remove.
25711 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
25712 (mve_vmulq_<supf><mode>): Remove.
25714 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25716 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
25717 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
25718 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
25720 * config/arm/mve.md
25721 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
25723 (@mve_<mve_insn>q_n_f<mode>): ... this.
25724 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
25725 (mve_vsubq_n_<supf><mode>): Factorize into ...
25726 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25727 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
25729 (mve_<mve_addsubmul>q<mode>): ... this.
25730 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
25732 (mve_<mve_addsubmul>q_f<mode>): ... this.
25733 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
25734 (mve_vsubq_m_<supf><mode>): Factorize into ...
25735 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
25736 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
25737 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
25738 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25739 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
25741 (@mve_<mve_insn>q_m_f<mode>): ... this.
25742 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
25743 (mve_vsubq_m_n_f<mode>): Factorize into ...
25744 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
25746 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25748 * config/arm/arm-mve-builtins-functions.h (class
25749 unspec_based_mve_function_base): New.
25750 (class unspec_based_mve_function_exact_insn): New.
25752 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
25754 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
25755 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
25757 2023-05-03 Murray Steele <murray.steele@arm.com>
25758 Christophe Lyon <christophe.lyon@arm.com>
25760 * config/arm/arm-mve-builtins-base.cc (class
25761 vuninitializedq_impl): New.
25762 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
25763 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
25765 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
25766 * config/arm/arm-mve-builtins-shapes.h (inherent): New
25768 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
25769 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
25770 (__arm_vuninitializedq_u8): Remove.
25771 (__arm_vuninitializedq_u16): Remove.
25772 (__arm_vuninitializedq_u32): Remove.
25773 (__arm_vuninitializedq_u64): Remove.
25774 (__arm_vuninitializedq_s8): Remove.
25775 (__arm_vuninitializedq_s16): Remove.
25776 (__arm_vuninitializedq_s32): Remove.
25777 (__arm_vuninitializedq_s64): Remove.
25778 (__arm_vuninitializedq_f16): Remove.
25779 (__arm_vuninitializedq_f32): Remove.
25781 2023-05-03 Murray Steele <murray.steele@arm.com>
25782 Christophe Lyon <christophe.lyon@arm.com>
25784 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
25785 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
25786 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
25787 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
25788 (parse_type): Likewise.
25789 (parse_signature): Likewise.
25790 (build_one): Likewise.
25791 (build_all): Likewise.
25792 (overloaded_base): New struct.
25793 (unary_convert_def): Likewise.
25794 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
25795 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
25797 (TYPES_reinterpret_unsigned1): Likewise.
25798 (TYPES_reinterpret_integer): Likewise.
25799 (TYPES_reinterpret_integer1): Likewise.
25800 (TYPES_reinterpret_float1): Likewise.
25801 (TYPES_reinterpret_float): Likewise.
25802 (reinterpret_integer): New.
25803 (reinterpret_float): New.
25804 (handle_arm_mve_h): Register builtins.
25805 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
25806 (vreinterpretq_s32): Likewise.
25807 (vreinterpretq_s64): Likewise.
25808 (vreinterpretq_s8): Likewise.
25809 (vreinterpretq_u16): Likewise.
25810 (vreinterpretq_u32): Likewise.
25811 (vreinterpretq_u64): Likewise.
25812 (vreinterpretq_u8): Likewise.
25813 (vreinterpretq_f16): Likewise.
25814 (vreinterpretq_f32): Likewise.
25815 (vreinterpretq_s16_s32): Likewise.
25816 (vreinterpretq_s16_s64): Likewise.
25817 (vreinterpretq_s16_s8): Likewise.
25818 (vreinterpretq_s16_u16): Likewise.
25819 (vreinterpretq_s16_u32): Likewise.
25820 (vreinterpretq_s16_u64): Likewise.
25821 (vreinterpretq_s16_u8): Likewise.
25822 (vreinterpretq_s32_s16): Likewise.
25823 (vreinterpretq_s32_s64): Likewise.
25824 (vreinterpretq_s32_s8): Likewise.
25825 (vreinterpretq_s32_u16): Likewise.
25826 (vreinterpretq_s32_u32): Likewise.
25827 (vreinterpretq_s32_u64): Likewise.
25828 (vreinterpretq_s32_u8): Likewise.
25829 (vreinterpretq_s64_s16): Likewise.
25830 (vreinterpretq_s64_s32): Likewise.
25831 (vreinterpretq_s64_s8): Likewise.
25832 (vreinterpretq_s64_u16): Likewise.
25833 (vreinterpretq_s64_u32): Likewise.
25834 (vreinterpretq_s64_u64): Likewise.
25835 (vreinterpretq_s64_u8): Likewise.
25836 (vreinterpretq_s8_s16): Likewise.
25837 (vreinterpretq_s8_s32): Likewise.
25838 (vreinterpretq_s8_s64): Likewise.
25839 (vreinterpretq_s8_u16): Likewise.
25840 (vreinterpretq_s8_u32): Likewise.
25841 (vreinterpretq_s8_u64): Likewise.
25842 (vreinterpretq_s8_u8): Likewise.
25843 (vreinterpretq_u16_s16): Likewise.
25844 (vreinterpretq_u16_s32): Likewise.
25845 (vreinterpretq_u16_s64): Likewise.
25846 (vreinterpretq_u16_s8): Likewise.
25847 (vreinterpretq_u16_u32): Likewise.
25848 (vreinterpretq_u16_u64): Likewise.
25849 (vreinterpretq_u16_u8): Likewise.
25850 (vreinterpretq_u32_s16): Likewise.
25851 (vreinterpretq_u32_s32): Likewise.
25852 (vreinterpretq_u32_s64): Likewise.
25853 (vreinterpretq_u32_s8): Likewise.
25854 (vreinterpretq_u32_u16): Likewise.
25855 (vreinterpretq_u32_u64): Likewise.
25856 (vreinterpretq_u32_u8): Likewise.
25857 (vreinterpretq_u64_s16): Likewise.
25858 (vreinterpretq_u64_s32): Likewise.
25859 (vreinterpretq_u64_s64): Likewise.
25860 (vreinterpretq_u64_s8): Likewise.
25861 (vreinterpretq_u64_u16): Likewise.
25862 (vreinterpretq_u64_u32): Likewise.
25863 (vreinterpretq_u64_u8): Likewise.
25864 (vreinterpretq_u8_s16): Likewise.
25865 (vreinterpretq_u8_s32): Likewise.
25866 (vreinterpretq_u8_s64): Likewise.
25867 (vreinterpretq_u8_s8): Likewise.
25868 (vreinterpretq_u8_u16): Likewise.
25869 (vreinterpretq_u8_u32): Likewise.
25870 (vreinterpretq_u8_u64): Likewise.
25871 (vreinterpretq_s32_f16): Likewise.
25872 (vreinterpretq_s32_f32): Likewise.
25873 (vreinterpretq_u16_f16): Likewise.
25874 (vreinterpretq_u16_f32): Likewise.
25875 (vreinterpretq_u32_f16): Likewise.
25876 (vreinterpretq_u32_f32): Likewise.
25877 (vreinterpretq_u64_f16): Likewise.
25878 (vreinterpretq_u64_f32): Likewise.
25879 (vreinterpretq_u8_f16): Likewise.
25880 (vreinterpretq_u8_f32): Likewise.
25881 (vreinterpretq_f16_f32): Likewise.
25882 (vreinterpretq_f16_s16): Likewise.
25883 (vreinterpretq_f16_s32): Likewise.
25884 (vreinterpretq_f16_s64): Likewise.
25885 (vreinterpretq_f16_s8): Likewise.
25886 (vreinterpretq_f16_u16): Likewise.
25887 (vreinterpretq_f16_u32): Likewise.
25888 (vreinterpretq_f16_u64): Likewise.
25889 (vreinterpretq_f16_u8): Likewise.
25890 (vreinterpretq_f32_f16): Likewise.
25891 (vreinterpretq_f32_s16): Likewise.
25892 (vreinterpretq_f32_s32): Likewise.
25893 (vreinterpretq_f32_s64): Likewise.
25894 (vreinterpretq_f32_s8): Likewise.
25895 (vreinterpretq_f32_u16): Likewise.
25896 (vreinterpretq_f32_u32): Likewise.
25897 (vreinterpretq_f32_u64): Likewise.
25898 (vreinterpretq_f32_u8): Likewise.
25899 (vreinterpretq_s16_f16): Likewise.
25900 (vreinterpretq_s16_f32): Likewise.
25901 (vreinterpretq_s64_f16): Likewise.
25902 (vreinterpretq_s64_f32): Likewise.
25903 (vreinterpretq_s8_f16): Likewise.
25904 (vreinterpretq_s8_f32): Likewise.
25905 (__arm_vreinterpretq_f16): Likewise.
25906 (__arm_vreinterpretq_f32): Likewise.
25907 (__arm_vreinterpretq_s16): Likewise.
25908 (__arm_vreinterpretq_s32): Likewise.
25909 (__arm_vreinterpretq_s64): Likewise.
25910 (__arm_vreinterpretq_s8): Likewise.
25911 (__arm_vreinterpretq_u16): Likewise.
25912 (__arm_vreinterpretq_u32): Likewise.
25913 (__arm_vreinterpretq_u64): Likewise.
25914 (__arm_vreinterpretq_u8): Likewise.
25915 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
25916 (__arm_vreinterpretq_s16_s64): Likewise.
25917 (__arm_vreinterpretq_s16_s8): Likewise.
25918 (__arm_vreinterpretq_s16_u16): Likewise.
25919 (__arm_vreinterpretq_s16_u32): Likewise.
25920 (__arm_vreinterpretq_s16_u64): Likewise.
25921 (__arm_vreinterpretq_s16_u8): Likewise.
25922 (__arm_vreinterpretq_s32_s16): Likewise.
25923 (__arm_vreinterpretq_s32_s64): Likewise.
25924 (__arm_vreinterpretq_s32_s8): Likewise.
25925 (__arm_vreinterpretq_s32_u16): Likewise.
25926 (__arm_vreinterpretq_s32_u32): Likewise.
25927 (__arm_vreinterpretq_s32_u64): Likewise.
25928 (__arm_vreinterpretq_s32_u8): Likewise.
25929 (__arm_vreinterpretq_s64_s16): Likewise.
25930 (__arm_vreinterpretq_s64_s32): Likewise.
25931 (__arm_vreinterpretq_s64_s8): Likewise.
25932 (__arm_vreinterpretq_s64_u16): Likewise.
25933 (__arm_vreinterpretq_s64_u32): Likewise.
25934 (__arm_vreinterpretq_s64_u64): Likewise.
25935 (__arm_vreinterpretq_s64_u8): Likewise.
25936 (__arm_vreinterpretq_s8_s16): Likewise.
25937 (__arm_vreinterpretq_s8_s32): Likewise.
25938 (__arm_vreinterpretq_s8_s64): Likewise.
25939 (__arm_vreinterpretq_s8_u16): Likewise.
25940 (__arm_vreinterpretq_s8_u32): Likewise.
25941 (__arm_vreinterpretq_s8_u64): Likewise.
25942 (__arm_vreinterpretq_s8_u8): Likewise.
25943 (__arm_vreinterpretq_u16_s16): Likewise.
25944 (__arm_vreinterpretq_u16_s32): Likewise.
25945 (__arm_vreinterpretq_u16_s64): Likewise.
25946 (__arm_vreinterpretq_u16_s8): Likewise.
25947 (__arm_vreinterpretq_u16_u32): Likewise.
25948 (__arm_vreinterpretq_u16_u64): Likewise.
25949 (__arm_vreinterpretq_u16_u8): Likewise.
25950 (__arm_vreinterpretq_u32_s16): Likewise.
25951 (__arm_vreinterpretq_u32_s32): Likewise.
25952 (__arm_vreinterpretq_u32_s64): Likewise.
25953 (__arm_vreinterpretq_u32_s8): Likewise.
25954 (__arm_vreinterpretq_u32_u16): Likewise.
25955 (__arm_vreinterpretq_u32_u64): Likewise.
25956 (__arm_vreinterpretq_u32_u8): Likewise.
25957 (__arm_vreinterpretq_u64_s16): Likewise.
25958 (__arm_vreinterpretq_u64_s32): Likewise.
25959 (__arm_vreinterpretq_u64_s64): Likewise.
25960 (__arm_vreinterpretq_u64_s8): Likewise.
25961 (__arm_vreinterpretq_u64_u16): Likewise.
25962 (__arm_vreinterpretq_u64_u32): Likewise.
25963 (__arm_vreinterpretq_u64_u8): Likewise.
25964 (__arm_vreinterpretq_u8_s16): Likewise.
25965 (__arm_vreinterpretq_u8_s32): Likewise.
25966 (__arm_vreinterpretq_u8_s64): Likewise.
25967 (__arm_vreinterpretq_u8_s8): Likewise.
25968 (__arm_vreinterpretq_u8_u16): Likewise.
25969 (__arm_vreinterpretq_u8_u32): Likewise.
25970 (__arm_vreinterpretq_u8_u64): Likewise.
25971 (__arm_vreinterpretq_s32_f16): Likewise.
25972 (__arm_vreinterpretq_s32_f32): Likewise.
25973 (__arm_vreinterpretq_s16_f16): Likewise.
25974 (__arm_vreinterpretq_s16_f32): Likewise.
25975 (__arm_vreinterpretq_s64_f16): Likewise.
25976 (__arm_vreinterpretq_s64_f32): Likewise.
25977 (__arm_vreinterpretq_s8_f16): Likewise.
25978 (__arm_vreinterpretq_s8_f32): Likewise.
25979 (__arm_vreinterpretq_u16_f16): Likewise.
25980 (__arm_vreinterpretq_u16_f32): Likewise.
25981 (__arm_vreinterpretq_u32_f16): Likewise.
25982 (__arm_vreinterpretq_u32_f32): Likewise.
25983 (__arm_vreinterpretq_u64_f16): Likewise.
25984 (__arm_vreinterpretq_u64_f32): Likewise.
25985 (__arm_vreinterpretq_u8_f16): Likewise.
25986 (__arm_vreinterpretq_u8_f32): Likewise.
25987 (__arm_vreinterpretq_f16_f32): Likewise.
25988 (__arm_vreinterpretq_f16_s16): Likewise.
25989 (__arm_vreinterpretq_f16_s32): Likewise.
25990 (__arm_vreinterpretq_f16_s64): Likewise.
25991 (__arm_vreinterpretq_f16_s8): Likewise.
25992 (__arm_vreinterpretq_f16_u16): Likewise.
25993 (__arm_vreinterpretq_f16_u32): Likewise.
25994 (__arm_vreinterpretq_f16_u64): Likewise.
25995 (__arm_vreinterpretq_f16_u8): Likewise.
25996 (__arm_vreinterpretq_f32_f16): Likewise.
25997 (__arm_vreinterpretq_f32_s16): Likewise.
25998 (__arm_vreinterpretq_f32_s32): Likewise.
25999 (__arm_vreinterpretq_f32_s64): Likewise.
26000 (__arm_vreinterpretq_f32_s8): Likewise.
26001 (__arm_vreinterpretq_f32_u16): Likewise.
26002 (__arm_vreinterpretq_f32_u32): Likewise.
26003 (__arm_vreinterpretq_f32_u64): Likewise.
26004 (__arm_vreinterpretq_f32_u8): Likewise.
26005 (__arm_vreinterpretq_s16): Likewise.
26006 (__arm_vreinterpretq_s32): Likewise.
26007 (__arm_vreinterpretq_s64): Likewise.
26008 (__arm_vreinterpretq_s8): Likewise.
26009 (__arm_vreinterpretq_u16): Likewise.
26010 (__arm_vreinterpretq_u32): Likewise.
26011 (__arm_vreinterpretq_u64): Likewise.
26012 (__arm_vreinterpretq_u8): Likewise.
26013 (__arm_vreinterpretq_f16): Likewise.
26014 (__arm_vreinterpretq_f32): Likewise.
26015 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
26016 * config/arm/unspecs.md: (REINTERPRET): New unspec.
26018 2023-05-03 Murray Steele <murray.steele@arm.com>
26019 Christophe Lyon <christophe.lyon@arm.com>
26020 Christophe Lyon <christophe.lyon@arm.com
26022 * config.gcc: Add arm-mve-builtins-base.o and
26023 arm-mve-builtins-shapes.o to extra_objs.
26024 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
26026 (arm_expand_builtin): Likewise
26027 (arm_check_builtin_call): Likewise
26028 (arm_describe_resolver): Likewise.
26029 * config/arm/arm-builtins.h (enum resolver_ident): Add
26031 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
26032 (arm_resolve_overloaded_builtin): Handle MVE builtins.
26033 (arm_register_target_pragmas): Register arm_check_builtin_call.
26034 * config/arm/arm-mve-builtins.cc (class registered_function): New
26036 (struct registered_function_hasher): New struct.
26037 (pred_suffixes): New table.
26038 (mode_suffixes): New table.
26039 (type_suffix_info): New table.
26040 (TYPES_float16): New.
26041 (TYPES_all_float): New.
26042 (TYPES_integer_8): New.
26043 (TYPES_integer_8_16): New.
26044 (TYPES_integer_16_32): New.
26045 (TYPES_integer_32): New.
26046 (TYPES_signed_16_32): New.
26047 (TYPES_signed_32): New.
26048 (TYPES_all_signed): New.
26049 (TYPES_all_unsigned): New.
26050 (TYPES_all_integer): New.
26051 (TYPES_all_integer_with_64): New.
26052 (DEF_VECTOR_TYPE): New.
26053 (DEF_DOUBLE_TYPE): New.
26054 (DEF_MVE_TYPES_ARRAY): New.
26055 (all_integer): New.
26056 (all_integer_with_64): New.
26060 (all_unsigned): New.
26062 (integer_8_16): New.
26063 (integer_16_32): New.
26065 (signed_16_32): New.
26067 (register_vector_type): Use void_type_node for mve.fp-only types when
26068 mve.fp is not enabled.
26069 (register_builtin_tuple_types): Likewise.
26070 (handle_arm_mve_h): New function..
26071 (matches_type_p): Likewise..
26072 (report_out_of_range): Likewise.
26073 (report_not_enum): Likewise.
26074 (report_missing_float): Likewise.
26075 (report_non_ice): Likewise.
26076 (check_requires_float): Likewise.
26077 (function_instance::hash): Likewise
26078 (function_instance::call_properties): Likewise.
26079 (function_instance::reads_global_state_p): Likewise.
26080 (function_instance::modifies_global_state_p): Likewise.
26081 (function_instance::could_trap_p): Likewise.
26082 (function_instance::has_inactive_argument): Likewise.
26083 (registered_function_hasher::hash): Likewise.
26084 (registered_function_hasher::equal): Likewise.
26085 (function_builder::function_builder): Likewise.
26086 (function_builder::~function_builder): Likewise.
26087 (function_builder::append_name): Likewise.
26088 (function_builder::finish_name): Likewise.
26089 (function_builder::get_name): Likewise.
26090 (add_attribute): Likewise.
26091 (function_builder::get_attributes): Likewise.
26092 (function_builder::add_function): Likewise.
26093 (function_builder::add_unique_function): Likewise.
26094 (function_builder::add_overloaded_function): Likewise.
26095 (function_builder::add_overloaded_functions): Likewise.
26096 (function_builder::register_function_group): Likewise.
26097 (function_call_info::function_call_info): Likewise.
26098 (function_resolver::function_resolver): Likewise.
26099 (function_resolver::get_vector_type): Likewise.
26100 (function_resolver::get_scalar_type_name): Likewise.
26101 (function_resolver::get_argument_type): Likewise.
26102 (function_resolver::scalar_argument_p): Likewise.
26103 (function_resolver::report_no_such_form): Likewise.
26104 (function_resolver::lookup_form): Likewise.
26105 (function_resolver::resolve_to): Likewise.
26106 (function_resolver::infer_vector_or_tuple_type): Likewise.
26107 (function_resolver::infer_vector_type): Likewise.
26108 (function_resolver::require_vector_or_scalar_type): Likewise.
26109 (function_resolver::require_vector_type): Likewise.
26110 (function_resolver::require_matching_vector_type): Likewise.
26111 (function_resolver::require_derived_vector_type): Likewise.
26112 (function_resolver::require_derived_scalar_type): Likewise.
26113 (function_resolver::require_integer_immediate): Likewise.
26114 (function_resolver::require_scalar_type): Likewise.
26115 (function_resolver::check_num_arguments): Likewise.
26116 (function_resolver::check_gp_argument): Likewise.
26117 (function_resolver::finish_opt_n_resolution): Likewise.
26118 (function_resolver::resolve_unary): Likewise.
26119 (function_resolver::resolve_unary_n): Likewise.
26120 (function_resolver::resolve_uniform): Likewise.
26121 (function_resolver::resolve_uniform_opt_n): Likewise.
26122 (function_resolver::resolve): Likewise.
26123 (function_checker::function_checker): Likewise.
26124 (function_checker::argument_exists_p): Likewise.
26125 (function_checker::require_immediate): Likewise.
26126 (function_checker::require_immediate_enum): Likewise.
26127 (function_checker::require_immediate_range): Likewise.
26128 (function_checker::check): Likewise.
26129 (gimple_folder::gimple_folder): Likewise.
26130 (gimple_folder::fold): Likewise.
26131 (function_expander::function_expander): Likewise.
26132 (function_expander::direct_optab_handler): Likewise.
26133 (function_expander::get_fallback_value): Likewise.
26134 (function_expander::get_reg_target): Likewise.
26135 (function_expander::add_output_operand): Likewise.
26136 (function_expander::add_input_operand): Likewise.
26137 (function_expander::add_integer_operand): Likewise.
26138 (function_expander::generate_insn): Likewise.
26139 (function_expander::use_exact_insn): Likewise.
26140 (function_expander::use_unpred_insn): Likewise.
26141 (function_expander::use_pred_x_insn): Likewise.
26142 (function_expander::use_cond_insn): Likewise.
26143 (function_expander::map_to_rtx_codes): Likewise.
26144 (function_expander::expand): Likewise.
26145 (resolve_overloaded_builtin): Likewise.
26146 (check_builtin_call): Likewise.
26147 (gimple_fold_builtin): Likewise.
26148 (expand_builtin): Likewise.
26149 (gt_ggc_mx): Likewise.
26150 (gt_pch_nx): Likewise.
26151 (gt_pch_nx): Likewise.
26152 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
26163 (offset): New mode.
26164 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
26165 (CP_READ_FPCR): Likewise.
26166 (CP_RAISE_FP_EXCEPTIONS): Likewise.
26167 (CP_READ_MEMORY): Likewise.
26168 (CP_WRITE_MEMORY): Likewise.
26169 (enum units_index): New enum.
26170 (enum predication_index): New.
26171 (enum type_class_index): New.
26172 (enum mode_suffix_index): New enum.
26173 (enum type_suffix_index): New.
26174 (struct mode_suffix_info): New struct.
26175 (struct type_suffix_info): New.
26176 (struct function_group_info): Likewise.
26177 (class function_instance): Likewise.
26178 (class registered_function): Likewise.
26179 (class function_builder): Likewise.
26180 (class function_call_info): Likewise.
26181 (class function_resolver): Likewise.
26182 (class function_checker): Likewise.
26183 (class gimple_folder): Likewise.
26184 (class function_expander): Likewise.
26185 (get_mve_pred16_t): Likewise.
26186 (find_mode_suffix): New function.
26187 (class function_base): Likewise.
26188 (class function_shape): Likewise.
26189 (function_instance::operator==): New function.
26190 (function_instance::operator!=): Likewise.
26191 (function_instance::vectors_per_tuple): Likewise.
26192 (function_instance::mode_suffix): Likewise.
26193 (function_instance::type_suffix): Likewise.
26194 (function_instance::scalar_type): Likewise.
26195 (function_instance::vector_type): Likewise.
26196 (function_instance::tuple_type): Likewise.
26197 (function_instance::vector_mode): Likewise.
26198 (function_call_info::function_returns_void_p): Likewise.
26199 (function_base::call_properties): Likewise.
26200 * config/arm/arm-protos.h (enum arm_builtin_class): Add
26202 (handle_arm_mve_h): New.
26203 (resolve_overloaded_builtin): New.
26204 (check_builtin_call): New.
26205 (gimple_fold_builtin): New.
26206 (expand_builtin): New.
26207 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
26208 arm_gimple_fold_builtin.
26209 (arm_gimple_fold_builtin): New function.
26210 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
26211 * config/arm/predicates.md (arm_any_register_operand): New predicate.
26212 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
26213 (arm-mve-builtins-shapes.o): New target.
26214 (arm-mve-builtins-base.o): New target.
26215 * config/arm/arm-mve-builtins-base.cc: New file.
26216 * config/arm/arm-mve-builtins-base.def: New file.
26217 * config/arm/arm-mve-builtins-base.h: New file.
26218 * config/arm/arm-mve-builtins-functions.h: New file.
26219 * config/arm/arm-mve-builtins-shapes.cc: New file.
26220 * config/arm/arm-mve-builtins-shapes.h: New file.
26222 2023-05-03 Murray Steele <murray.steele@arm.com>
26223 Christophe Lyon <christophe.lyon@arm.com>
26224 Christophe Lyon <christophe.lyon@arm.com>
26226 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
26228 (arm_init_builtin): Use arm_general_add_builtin_function instead
26229 of arm_add_builtin_function.
26230 (arm_init_acle_builtins): Likewise.
26231 (arm_init_mve_builtins): Likewise.
26232 (arm_init_crypto_builtins): Likewise.
26233 (arm_init_builtins): Likewise.
26234 (arm_general_builtin_decl): New function.
26235 (arm_builtin_decl): Defer to numberspace-specialized functions.
26236 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
26237 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
26238 (arm_general_expand_builtin_1): ... specialize for general builtins.
26239 (arm_expand_acle_builtin): Use arm_general_expand_builtin
26240 instead of arm_expand_builtin.
26241 (arm_expand_mve_builtin): Likewise.
26242 (arm_expand_neon_builtin): Likewise.
26243 (arm_expand_vfp_builtin): Likewise.
26244 (arm_general_expand_builtin): New function.
26245 (arm_expand_builtin): Specialize for general builtins.
26246 (arm_general_check_builtin_call): New function.
26247 (arm_check_builtin_call): Specialize for general builtins.
26248 (arm_describe_resolver): Validate numberspace.
26249 (arm_cde_end_args): Likewise.
26250 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
26251 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
26253 2023-05-03 Martin Liska <mliska@suse.cz>
26256 * config/riscv/sync.md: Add gcc_unreachable to a switch.
26258 2023-05-03 Richard Biener <rguenther@suse.de>
26260 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
26261 (patch_loop_exit): Likewise.
26262 (connect_loops): Likewise.
26263 (split_loop): Likewise.
26264 (control_dep_semi_invariant_p): Likewise.
26265 (do_split_loop_on_cond): Likewise.
26266 (split_loop_on_cond): Likewise.
26267 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
26269 (simplify_loop_version): Likewise.
26270 (evaluate_bbs): Likewise.
26271 (find_loop_guard): Likewise.
26272 (clean_up_after_unswitching): Likewise.
26273 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
26275 (optimize_spaceship): Take a gcond * argument, avoid
26277 (math_opts_dom_walker::after_dom_children): Adjust call to
26278 optimize_spaceship.
26279 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
26280 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
26283 2023-05-03 Andreas Schwab <schwab@suse.de>
26285 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
26287 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26289 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
26291 (class vlseg): New class.
26292 (class vsseg): Ditto.
26293 (class vlsseg): Ditto.
26294 (class vssseg): Ditto.
26295 (class seg_indexed_load): Ditto.
26296 (class seg_indexed_store): Ditto.
26297 (class vlsegff): Ditto.
26299 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
26300 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
26310 * config/riscv/riscv-vector-builtins-shapes.cc (struct
26311 seg_loadstore_def): Ditto.
26312 (struct seg_indexed_loadstore_def): Ditto.
26313 (struct seg_fault_load_def): Ditto.
26315 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
26316 * config/riscv/riscv-vector-builtins.cc
26317 (function_builder::append_nf): New function.
26318 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
26319 Change ptr from double into float.
26320 (vfloat32m1x3_t): Ditto.
26321 (vfloat32m1x4_t): Ditto.
26322 (vfloat32m1x5_t): Ditto.
26323 (vfloat32m1x6_t): Ditto.
26324 (vfloat32m1x7_t): Ditto.
26325 (vfloat32m1x8_t): Ditto.
26326 (vfloat32m2x2_t): Ditto.
26327 (vfloat32m2x3_t): Ditto.
26328 (vfloat32m2x4_t): Ditto.
26329 (vfloat32m4x2_t): Ditto.
26330 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
26331 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
26333 * config/riscv/riscv.md: Add segment instructions.
26334 * config/riscv/vector-iterators.md: Support segment intrinsics.
26335 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
26337 (@pred_unit_strided_store<mode>): Ditto.
26338 (@pred_strided_load<mode>): Ditto.
26339 (@pred_strided_store<mode>): Ditto.
26340 (@pred_fault_load<mode>): Ditto.
26341 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
26342 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
26343 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
26344 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
26345 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
26346 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
26347 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
26348 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
26349 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
26350 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
26351 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
26352 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
26353 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
26354 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
26356 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26358 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
26359 tuple type support.
26361 (floattype): Ditto.
26363 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
26364 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
26366 (vget): Add tuple type vget.
26367 * config/riscv/riscv-vector-builtins-types.def
26368 (DEF_RVV_TUPLE_OPS): New macro.
26369 (vint8mf8x2_t): Ditto.
26370 (vuint8mf8x2_t): Ditto.
26371 (vint8mf8x3_t): Ditto.
26372 (vuint8mf8x3_t): Ditto.
26373 (vint8mf8x4_t): Ditto.
26374 (vuint8mf8x4_t): Ditto.
26375 (vint8mf8x5_t): Ditto.
26376 (vuint8mf8x5_t): Ditto.
26377 (vint8mf8x6_t): Ditto.
26378 (vuint8mf8x6_t): Ditto.
26379 (vint8mf8x7_t): Ditto.
26380 (vuint8mf8x7_t): Ditto.
26381 (vint8mf8x8_t): Ditto.
26382 (vuint8mf8x8_t): Ditto.
26383 (vint8mf4x2_t): Ditto.
26384 (vuint8mf4x2_t): Ditto.
26385 (vint8mf4x3_t): Ditto.
26386 (vuint8mf4x3_t): Ditto.
26387 (vint8mf4x4_t): Ditto.
26388 (vuint8mf4x4_t): Ditto.
26389 (vint8mf4x5_t): Ditto.
26390 (vuint8mf4x5_t): Ditto.
26391 (vint8mf4x6_t): Ditto.
26392 (vuint8mf4x6_t): Ditto.
26393 (vint8mf4x7_t): Ditto.
26394 (vuint8mf4x7_t): Ditto.
26395 (vint8mf4x8_t): Ditto.
26396 (vuint8mf4x8_t): Ditto.
26397 (vint8mf2x2_t): Ditto.
26398 (vuint8mf2x2_t): Ditto.
26399 (vint8mf2x3_t): Ditto.
26400 (vuint8mf2x3_t): Ditto.
26401 (vint8mf2x4_t): Ditto.
26402 (vuint8mf2x4_t): Ditto.
26403 (vint8mf2x5_t): Ditto.
26404 (vuint8mf2x5_t): Ditto.
26405 (vint8mf2x6_t): Ditto.
26406 (vuint8mf2x6_t): Ditto.
26407 (vint8mf2x7_t): Ditto.
26408 (vuint8mf2x7_t): Ditto.
26409 (vint8mf2x8_t): Ditto.
26410 (vuint8mf2x8_t): Ditto.
26411 (vint8m1x2_t): Ditto.
26412 (vuint8m1x2_t): Ditto.
26413 (vint8m1x3_t): Ditto.
26414 (vuint8m1x3_t): Ditto.
26415 (vint8m1x4_t): Ditto.
26416 (vuint8m1x4_t): Ditto.
26417 (vint8m1x5_t): Ditto.
26418 (vuint8m1x5_t): Ditto.
26419 (vint8m1x6_t): Ditto.
26420 (vuint8m1x6_t): Ditto.
26421 (vint8m1x7_t): Ditto.
26422 (vuint8m1x7_t): Ditto.
26423 (vint8m1x8_t): Ditto.
26424 (vuint8m1x8_t): Ditto.
26425 (vint8m2x2_t): Ditto.
26426 (vuint8m2x2_t): Ditto.
26427 (vint8m2x3_t): Ditto.
26428 (vuint8m2x3_t): Ditto.
26429 (vint8m2x4_t): Ditto.
26430 (vuint8m2x4_t): Ditto.
26431 (vint8m4x2_t): Ditto.
26432 (vuint8m4x2_t): Ditto.
26433 (vint16mf4x2_t): Ditto.
26434 (vuint16mf4x2_t): Ditto.
26435 (vint16mf4x3_t): Ditto.
26436 (vuint16mf4x3_t): Ditto.
26437 (vint16mf4x4_t): Ditto.
26438 (vuint16mf4x4_t): Ditto.
26439 (vint16mf4x5_t): Ditto.
26440 (vuint16mf4x5_t): Ditto.
26441 (vint16mf4x6_t): Ditto.
26442 (vuint16mf4x6_t): Ditto.
26443 (vint16mf4x7_t): Ditto.
26444 (vuint16mf4x7_t): Ditto.
26445 (vint16mf4x8_t): Ditto.
26446 (vuint16mf4x8_t): Ditto.
26447 (vint16mf2x2_t): Ditto.
26448 (vuint16mf2x2_t): Ditto.
26449 (vint16mf2x3_t): Ditto.
26450 (vuint16mf2x3_t): Ditto.
26451 (vint16mf2x4_t): Ditto.
26452 (vuint16mf2x4_t): Ditto.
26453 (vint16mf2x5_t): Ditto.
26454 (vuint16mf2x5_t): Ditto.
26455 (vint16mf2x6_t): Ditto.
26456 (vuint16mf2x6_t): Ditto.
26457 (vint16mf2x7_t): Ditto.
26458 (vuint16mf2x7_t): Ditto.
26459 (vint16mf2x8_t): Ditto.
26460 (vuint16mf2x8_t): Ditto.
26461 (vint16m1x2_t): Ditto.
26462 (vuint16m1x2_t): Ditto.
26463 (vint16m1x3_t): Ditto.
26464 (vuint16m1x3_t): Ditto.
26465 (vint16m1x4_t): Ditto.
26466 (vuint16m1x4_t): Ditto.
26467 (vint16m1x5_t): Ditto.
26468 (vuint16m1x5_t): Ditto.
26469 (vint16m1x6_t): Ditto.
26470 (vuint16m1x6_t): Ditto.
26471 (vint16m1x7_t): Ditto.
26472 (vuint16m1x7_t): Ditto.
26473 (vint16m1x8_t): Ditto.
26474 (vuint16m1x8_t): Ditto.
26475 (vint16m2x2_t): Ditto.
26476 (vuint16m2x2_t): Ditto.
26477 (vint16m2x3_t): Ditto.
26478 (vuint16m2x3_t): Ditto.
26479 (vint16m2x4_t): Ditto.
26480 (vuint16m2x4_t): Ditto.
26481 (vint16m4x2_t): Ditto.
26482 (vuint16m4x2_t): Ditto.
26483 (vint32mf2x2_t): Ditto.
26484 (vuint32mf2x2_t): Ditto.
26485 (vint32mf2x3_t): Ditto.
26486 (vuint32mf2x3_t): Ditto.
26487 (vint32mf2x4_t): Ditto.
26488 (vuint32mf2x4_t): Ditto.
26489 (vint32mf2x5_t): Ditto.
26490 (vuint32mf2x5_t): Ditto.
26491 (vint32mf2x6_t): Ditto.
26492 (vuint32mf2x6_t): Ditto.
26493 (vint32mf2x7_t): Ditto.
26494 (vuint32mf2x7_t): Ditto.
26495 (vint32mf2x8_t): Ditto.
26496 (vuint32mf2x8_t): Ditto.
26497 (vint32m1x2_t): Ditto.
26498 (vuint32m1x2_t): Ditto.
26499 (vint32m1x3_t): Ditto.
26500 (vuint32m1x3_t): Ditto.
26501 (vint32m1x4_t): Ditto.
26502 (vuint32m1x4_t): Ditto.
26503 (vint32m1x5_t): Ditto.
26504 (vuint32m1x5_t): Ditto.
26505 (vint32m1x6_t): Ditto.
26506 (vuint32m1x6_t): Ditto.
26507 (vint32m1x7_t): Ditto.
26508 (vuint32m1x7_t): Ditto.
26509 (vint32m1x8_t): Ditto.
26510 (vuint32m1x8_t): Ditto.
26511 (vint32m2x2_t): Ditto.
26512 (vuint32m2x2_t): Ditto.
26513 (vint32m2x3_t): Ditto.
26514 (vuint32m2x3_t): Ditto.
26515 (vint32m2x4_t): Ditto.
26516 (vuint32m2x4_t): Ditto.
26517 (vint32m4x2_t): Ditto.
26518 (vuint32m4x2_t): Ditto.
26519 (vint64m1x2_t): Ditto.
26520 (vuint64m1x2_t): Ditto.
26521 (vint64m1x3_t): Ditto.
26522 (vuint64m1x3_t): Ditto.
26523 (vint64m1x4_t): Ditto.
26524 (vuint64m1x4_t): Ditto.
26525 (vint64m1x5_t): Ditto.
26526 (vuint64m1x5_t): Ditto.
26527 (vint64m1x6_t): Ditto.
26528 (vuint64m1x6_t): Ditto.
26529 (vint64m1x7_t): Ditto.
26530 (vuint64m1x7_t): Ditto.
26531 (vint64m1x8_t): Ditto.
26532 (vuint64m1x8_t): Ditto.
26533 (vint64m2x2_t): Ditto.
26534 (vuint64m2x2_t): Ditto.
26535 (vint64m2x3_t): Ditto.
26536 (vuint64m2x3_t): Ditto.
26537 (vint64m2x4_t): Ditto.
26538 (vuint64m2x4_t): Ditto.
26539 (vint64m4x2_t): Ditto.
26540 (vuint64m4x2_t): Ditto.
26541 (vfloat32mf2x2_t): Ditto.
26542 (vfloat32mf2x3_t): Ditto.
26543 (vfloat32mf2x4_t): Ditto.
26544 (vfloat32mf2x5_t): Ditto.
26545 (vfloat32mf2x6_t): Ditto.
26546 (vfloat32mf2x7_t): Ditto.
26547 (vfloat32mf2x8_t): Ditto.
26548 (vfloat32m1x2_t): Ditto.
26549 (vfloat32m1x3_t): Ditto.
26550 (vfloat32m1x4_t): Ditto.
26551 (vfloat32m1x5_t): Ditto.
26552 (vfloat32m1x6_t): Ditto.
26553 (vfloat32m1x7_t): Ditto.
26554 (vfloat32m1x8_t): Ditto.
26555 (vfloat32m2x2_t): Ditto.
26556 (vfloat32m2x3_t): Ditto.
26557 (vfloat32m2x4_t): Ditto.
26558 (vfloat32m4x2_t): Ditto.
26559 (vfloat64m1x2_t): Ditto.
26560 (vfloat64m1x3_t): Ditto.
26561 (vfloat64m1x4_t): Ditto.
26562 (vfloat64m1x5_t): Ditto.
26563 (vfloat64m1x6_t): Ditto.
26564 (vfloat64m1x7_t): Ditto.
26565 (vfloat64m1x8_t): Ditto.
26566 (vfloat64m2x2_t): Ditto.
26567 (vfloat64m2x3_t): Ditto.
26568 (vfloat64m2x4_t): Ditto.
26569 (vfloat64m4x2_t): Ditto.
26570 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
26572 (DEF_RVV_TYPE_INDEX): Ditto.
26573 (rvv_arg_type_info::get_tuple_subpart_type): New function.
26574 (DEF_RVV_TUPLE_TYPE): New macro.
26575 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
26576 Adapt for tuple vget/vset support.
26577 (vint8mf4_t): Ditto.
26578 (vuint8mf4_t): Ditto.
26579 (vint8mf2_t): Ditto.
26580 (vuint8mf2_t): Ditto.
26581 (vint8m1_t): Ditto.
26582 (vuint8m1_t): Ditto.
26583 (vint8m2_t): Ditto.
26584 (vuint8m2_t): Ditto.
26585 (vint8m4_t): Ditto.
26586 (vuint8m4_t): Ditto.
26587 (vint8m8_t): Ditto.
26588 (vuint8m8_t): Ditto.
26589 (vint16mf4_t): Ditto.
26590 (vuint16mf4_t): Ditto.
26591 (vint16mf2_t): Ditto.
26592 (vuint16mf2_t): Ditto.
26593 (vint16m1_t): Ditto.
26594 (vuint16m1_t): Ditto.
26595 (vint16m2_t): Ditto.
26596 (vuint16m2_t): Ditto.
26597 (vint16m4_t): Ditto.
26598 (vuint16m4_t): Ditto.
26599 (vint16m8_t): Ditto.
26600 (vuint16m8_t): Ditto.
26601 (vint32mf2_t): Ditto.
26602 (vuint32mf2_t): Ditto.
26603 (vint32m1_t): Ditto.
26604 (vuint32m1_t): Ditto.
26605 (vint32m2_t): Ditto.
26606 (vuint32m2_t): Ditto.
26607 (vint32m4_t): Ditto.
26608 (vuint32m4_t): Ditto.
26609 (vint32m8_t): Ditto.
26610 (vuint32m8_t): Ditto.
26611 (vint64m1_t): Ditto.
26612 (vuint64m1_t): Ditto.
26613 (vint64m2_t): Ditto.
26614 (vuint64m2_t): Ditto.
26615 (vint64m4_t): Ditto.
26616 (vuint64m4_t): Ditto.
26617 (vint64m8_t): Ditto.
26618 (vuint64m8_t): Ditto.
26619 (vfloat32mf2_t): Ditto.
26620 (vfloat32m1_t): Ditto.
26621 (vfloat32m2_t): Ditto.
26622 (vfloat32m4_t): Ditto.
26623 (vfloat32m8_t): Ditto.
26624 (vfloat64m1_t): Ditto.
26625 (vfloat64m2_t): Ditto.
26626 (vfloat64m4_t): Ditto.
26627 (vfloat64m8_t): Ditto.
26628 (tuple_subpart): Add tuple subpart base type.
26629 * config/riscv/riscv-vector-builtins.h (struct
26630 rvv_arg_type_info): Ditto.
26631 (tuple_type_field): New function.
26633 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26635 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
26636 (RVV_TUPLE_PARTIAL_MODES): Ditto.
26637 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
26640 (get_subpart_mode): Ditto.
26641 (get_tuple_mode): Ditto.
26642 (expand_tuple_move): Ditto.
26643 * config/riscv/riscv-v.cc (ENTRY): New macro.
26644 (TUPLE_ENTRY): Ditto.
26645 (get_nf): New function.
26646 (get_subpart_mode): Ditto.
26647 (get_tuple_mode): Ditto.
26648 (expand_tuple_move): Ditto.
26649 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
26651 (register_tuple_type): New function
26652 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
26654 (vint8mf8x2_t): New macro.
26655 (vuint8mf8x2_t): Ditto.
26656 (vint8mf8x3_t): Ditto.
26657 (vuint8mf8x3_t): Ditto.
26658 (vint8mf8x4_t): Ditto.
26659 (vuint8mf8x4_t): Ditto.
26660 (vint8mf8x5_t): Ditto.
26661 (vuint8mf8x5_t): Ditto.
26662 (vint8mf8x6_t): Ditto.
26663 (vuint8mf8x6_t): Ditto.
26664 (vint8mf8x7_t): Ditto.
26665 (vuint8mf8x7_t): Ditto.
26666 (vint8mf8x8_t): Ditto.
26667 (vuint8mf8x8_t): Ditto.
26668 (vint8mf4x2_t): Ditto.
26669 (vuint8mf4x2_t): Ditto.
26670 (vint8mf4x3_t): Ditto.
26671 (vuint8mf4x3_t): Ditto.
26672 (vint8mf4x4_t): Ditto.
26673 (vuint8mf4x4_t): Ditto.
26674 (vint8mf4x5_t): Ditto.
26675 (vuint8mf4x5_t): Ditto.
26676 (vint8mf4x6_t): Ditto.
26677 (vuint8mf4x6_t): Ditto.
26678 (vint8mf4x7_t): Ditto.
26679 (vuint8mf4x7_t): Ditto.
26680 (vint8mf4x8_t): Ditto.
26681 (vuint8mf4x8_t): Ditto.
26682 (vint8mf2x2_t): Ditto.
26683 (vuint8mf2x2_t): Ditto.
26684 (vint8mf2x3_t): Ditto.
26685 (vuint8mf2x3_t): Ditto.
26686 (vint8mf2x4_t): Ditto.
26687 (vuint8mf2x4_t): Ditto.
26688 (vint8mf2x5_t): Ditto.
26689 (vuint8mf2x5_t): Ditto.
26690 (vint8mf2x6_t): Ditto.
26691 (vuint8mf2x6_t): Ditto.
26692 (vint8mf2x7_t): Ditto.
26693 (vuint8mf2x7_t): Ditto.
26694 (vint8mf2x8_t): Ditto.
26695 (vuint8mf2x8_t): Ditto.
26696 (vint8m1x2_t): Ditto.
26697 (vuint8m1x2_t): Ditto.
26698 (vint8m1x3_t): Ditto.
26699 (vuint8m1x3_t): Ditto.
26700 (vint8m1x4_t): Ditto.
26701 (vuint8m1x4_t): Ditto.
26702 (vint8m1x5_t): Ditto.
26703 (vuint8m1x5_t): Ditto.
26704 (vint8m1x6_t): Ditto.
26705 (vuint8m1x6_t): Ditto.
26706 (vint8m1x7_t): Ditto.
26707 (vuint8m1x7_t): Ditto.
26708 (vint8m1x8_t): Ditto.
26709 (vuint8m1x8_t): Ditto.
26710 (vint8m2x2_t): Ditto.
26711 (vuint8m2x2_t): Ditto.
26712 (vint8m2x3_t): Ditto.
26713 (vuint8m2x3_t): Ditto.
26714 (vint8m2x4_t): Ditto.
26715 (vuint8m2x4_t): Ditto.
26716 (vint8m4x2_t): Ditto.
26717 (vuint8m4x2_t): Ditto.
26718 (vint16mf4x2_t): Ditto.
26719 (vuint16mf4x2_t): Ditto.
26720 (vint16mf4x3_t): Ditto.
26721 (vuint16mf4x3_t): Ditto.
26722 (vint16mf4x4_t): Ditto.
26723 (vuint16mf4x4_t): Ditto.
26724 (vint16mf4x5_t): Ditto.
26725 (vuint16mf4x5_t): Ditto.
26726 (vint16mf4x6_t): Ditto.
26727 (vuint16mf4x6_t): Ditto.
26728 (vint16mf4x7_t): Ditto.
26729 (vuint16mf4x7_t): Ditto.
26730 (vint16mf4x8_t): Ditto.
26731 (vuint16mf4x8_t): Ditto.
26732 (vint16mf2x2_t): Ditto.
26733 (vuint16mf2x2_t): Ditto.
26734 (vint16mf2x3_t): Ditto.
26735 (vuint16mf2x3_t): Ditto.
26736 (vint16mf2x4_t): Ditto.
26737 (vuint16mf2x4_t): Ditto.
26738 (vint16mf2x5_t): Ditto.
26739 (vuint16mf2x5_t): Ditto.
26740 (vint16mf2x6_t): Ditto.
26741 (vuint16mf2x6_t): Ditto.
26742 (vint16mf2x7_t): Ditto.
26743 (vuint16mf2x7_t): Ditto.
26744 (vint16mf2x8_t): Ditto.
26745 (vuint16mf2x8_t): Ditto.
26746 (vint16m1x2_t): Ditto.
26747 (vuint16m1x2_t): Ditto.
26748 (vint16m1x3_t): Ditto.
26749 (vuint16m1x3_t): Ditto.
26750 (vint16m1x4_t): Ditto.
26751 (vuint16m1x4_t): Ditto.
26752 (vint16m1x5_t): Ditto.
26753 (vuint16m1x5_t): Ditto.
26754 (vint16m1x6_t): Ditto.
26755 (vuint16m1x6_t): Ditto.
26756 (vint16m1x7_t): Ditto.
26757 (vuint16m1x7_t): Ditto.
26758 (vint16m1x8_t): Ditto.
26759 (vuint16m1x8_t): Ditto.
26760 (vint16m2x2_t): Ditto.
26761 (vuint16m2x2_t): Ditto.
26762 (vint16m2x3_t): Ditto.
26763 (vuint16m2x3_t): Ditto.
26764 (vint16m2x4_t): Ditto.
26765 (vuint16m2x4_t): Ditto.
26766 (vint16m4x2_t): Ditto.
26767 (vuint16m4x2_t): Ditto.
26768 (vint32mf2x2_t): Ditto.
26769 (vuint32mf2x2_t): Ditto.
26770 (vint32mf2x3_t): Ditto.
26771 (vuint32mf2x3_t): Ditto.
26772 (vint32mf2x4_t): Ditto.
26773 (vuint32mf2x4_t): Ditto.
26774 (vint32mf2x5_t): Ditto.
26775 (vuint32mf2x5_t): Ditto.
26776 (vint32mf2x6_t): Ditto.
26777 (vuint32mf2x6_t): Ditto.
26778 (vint32mf2x7_t): Ditto.
26779 (vuint32mf2x7_t): Ditto.
26780 (vint32mf2x8_t): Ditto.
26781 (vuint32mf2x8_t): Ditto.
26782 (vint32m1x2_t): Ditto.
26783 (vuint32m1x2_t): Ditto.
26784 (vint32m1x3_t): Ditto.
26785 (vuint32m1x3_t): Ditto.
26786 (vint32m1x4_t): Ditto.
26787 (vuint32m1x4_t): Ditto.
26788 (vint32m1x5_t): Ditto.
26789 (vuint32m1x5_t): Ditto.
26790 (vint32m1x6_t): Ditto.
26791 (vuint32m1x6_t): Ditto.
26792 (vint32m1x7_t): Ditto.
26793 (vuint32m1x7_t): Ditto.
26794 (vint32m1x8_t): Ditto.
26795 (vuint32m1x8_t): Ditto.
26796 (vint32m2x2_t): Ditto.
26797 (vuint32m2x2_t): Ditto.
26798 (vint32m2x3_t): Ditto.
26799 (vuint32m2x3_t): Ditto.
26800 (vint32m2x4_t): Ditto.
26801 (vuint32m2x4_t): Ditto.
26802 (vint32m4x2_t): Ditto.
26803 (vuint32m4x2_t): Ditto.
26804 (vint64m1x2_t): Ditto.
26805 (vuint64m1x2_t): Ditto.
26806 (vint64m1x3_t): Ditto.
26807 (vuint64m1x3_t): Ditto.
26808 (vint64m1x4_t): Ditto.
26809 (vuint64m1x4_t): Ditto.
26810 (vint64m1x5_t): Ditto.
26811 (vuint64m1x5_t): Ditto.
26812 (vint64m1x6_t): Ditto.
26813 (vuint64m1x6_t): Ditto.
26814 (vint64m1x7_t): Ditto.
26815 (vuint64m1x7_t): Ditto.
26816 (vint64m1x8_t): Ditto.
26817 (vuint64m1x8_t): Ditto.
26818 (vint64m2x2_t): Ditto.
26819 (vuint64m2x2_t): Ditto.
26820 (vint64m2x3_t): Ditto.
26821 (vuint64m2x3_t): Ditto.
26822 (vint64m2x4_t): Ditto.
26823 (vuint64m2x4_t): Ditto.
26824 (vint64m4x2_t): Ditto.
26825 (vuint64m4x2_t): Ditto.
26826 (vfloat32mf2x2_t): Ditto.
26827 (vfloat32mf2x3_t): Ditto.
26828 (vfloat32mf2x4_t): Ditto.
26829 (vfloat32mf2x5_t): Ditto.
26830 (vfloat32mf2x6_t): Ditto.
26831 (vfloat32mf2x7_t): Ditto.
26832 (vfloat32mf2x8_t): Ditto.
26833 (vfloat32m1x2_t): Ditto.
26834 (vfloat32m1x3_t): Ditto.
26835 (vfloat32m1x4_t): Ditto.
26836 (vfloat32m1x5_t): Ditto.
26837 (vfloat32m1x6_t): Ditto.
26838 (vfloat32m1x7_t): Ditto.
26839 (vfloat32m1x8_t): Ditto.
26840 (vfloat32m2x2_t): Ditto.
26841 (vfloat32m2x3_t): Ditto.
26842 (vfloat32m2x4_t): Ditto.
26843 (vfloat32m4x2_t): Ditto.
26844 (vfloat64m1x2_t): Ditto.
26845 (vfloat64m1x3_t): Ditto.
26846 (vfloat64m1x4_t): Ditto.
26847 (vfloat64m1x5_t): Ditto.
26848 (vfloat64m1x6_t): Ditto.
26849 (vfloat64m1x7_t): Ditto.
26850 (vfloat64m1x8_t): Ditto.
26851 (vfloat64m2x2_t): Ditto.
26852 (vfloat64m2x3_t): Ditto.
26853 (vfloat64m2x4_t): Ditto.
26854 (vfloat64m4x2_t): Ditto.
26855 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
26857 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
26858 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
26860 (TUPLE_ENTRY): Ditto.
26861 (riscv_v_ext_mode_p): New function.
26862 (riscv_v_adjust_nunits): Add tuple mode adjustment.
26863 (riscv_classify_address): Ditto.
26864 (riscv_binary_cost): Ditto.
26865 (riscv_rtx_costs): Ditto.
26866 (riscv_secondary_memory_needed): Ditto.
26867 (riscv_hard_regno_nregs): Ditto.
26868 (riscv_hard_regno_mode_ok): Ditto.
26869 (riscv_vector_mode_supported_p): Ditto.
26870 (riscv_regmode_natural_size): Ditto.
26871 (riscv_array_mode): New function.
26872 (TARGET_ARRAY_MODE): New target hook.
26873 * config/riscv/riscv.md: Add tuple modes.
26874 * config/riscv/vector-iterators.md: Ditto.
26875 * config/riscv/vector.md (mov<mode>): Add tuple modes data
26877 (*mov<VT:mode>_<P:mode>): Ditto.
26879 2023-05-03 Richard Biener <rguenther@suse.de>
26881 * cse.cc (cse_insn): Track an equivalence to the destination
26882 separately and delay using src_related for it.
26884 2023-05-03 Richard Biener <rguenther@suse.de>
26886 * cse.cc (HASH): Turn into inline function and mix
26887 in another HASH_SHIFT bits.
26888 (SAFE_HASH): Likewise.
26890 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26893 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
26894 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
26896 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
26899 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
26900 (add<mode>3<vczle><vczbe>): ... This.
26901 (sub<mode>3): Rename to...
26902 (sub<mode>3<vczle><vczbe>): ... This.
26903 (mul<mode>3): Rename to...
26904 (mul<mode>3<vczle><vczbe>): ... This.
26905 (*div<mode>3): Rename to...
26906 (*div<mode>3<vczle><vczbe>): ... This.
26907 (neg<mode>2): Rename to...
26908 (neg<mode>2<vczle><vczbe>): ... This.
26909 (abs<mode>2): Rename to...
26910 (abs<mode>2<vczle><vczbe>): ... This.
26911 (<frint_pattern><mode>2): Rename to...
26912 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
26913 (<fmaxmin><mode>3): Rename to...
26914 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
26915 (*sqrt<mode>2): Rename to...
26916 (*sqrt<mode>2<vczle><vczbe>): ... This.
26918 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
26920 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
26922 2023-05-03 Martin Liska <mliska@suse.cz>
26924 PR tree-optimization/109693
26925 * value-range-storage.cc (vrange_allocator::vrange_allocator):
26926 Remove unused field.
26927 * value-range-storage.h: Likewise.
26929 2023-05-02 Andrew Pinski <apinski@marvell.com>
26931 * tree-ssa-phiopt.cc (move_stmt): New function.
26932 (match_simplify_replacement): Use move_stmt instead
26933 of the inlined version.
26935 2023-05-02 Andrew Pinski <apinski@marvell.com>
26937 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
26940 2023-05-02 Andrew Pinski <apinski@marvell.com>
26942 PR tree-optimization/109702
26943 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
26944 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
26946 2023-05-02 Andrew Pinski <apinski@marvell.com>
26949 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
26950 insn_and_split pattern.
26952 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26954 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
26957 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26959 * config/riscv/sync.md (mem_thread_fence_1): Change fence
26960 depending on the given memory model.
26962 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26964 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
26965 riscv_union_memmodels function to sync.md.
26966 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
26967 get the union of two memmodels in sync.md.
26968 (riscv_print_operand): Add %I and %J flags that output the
26969 optimal LR/SC flag bits for a given memory model.
26970 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
26971 bits on SC op and replace with optimized %I, %J flags.
26973 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26975 * config/riscv/riscv.cc
26976 (riscv_memmodel_needs_amo_release): Change function name.
26977 (riscv_print_operand): Remove unneeded %F case.
26978 * config/riscv/sync.md: Remove unneeded fences.
26980 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26983 * config/riscv/sync.md (atomic_store<mode>): Use simple store
26984 instruction in combination with fence(s).
26986 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26988 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
26989 of %A to include release bits.
26991 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26993 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
26994 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
26997 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
26999 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
27000 sequentially consistent LR.aqrl/SC.rl pairs.
27002 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
27004 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
27005 sanitize memmodel input with memmodel_base.
27007 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
27008 Pan Li <pan2.li@intel.com>
27011 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
27013 2023-05-02 Romain Naour <romain.naour@gmail.com>
27015 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
27018 2023-05-02 Martin Liska <mliska@suse.cz>
27020 * doc/invoke.texi: Update documentation based on param.opt file.
27022 2023-05-02 Richard Biener <rguenther@suse.de>
27024 PR tree-optimization/109672
27025 * tree-vect-stmts.cc (vectorizable_operation): For plus,
27026 minus and negate always check the vector mode is word mode.
27028 2023-05-01 Andrew Pinski <apinski@marvell.com>
27030 * tree-ssa-phiopt.cc: Update comment about
27031 how the transformation are implemented.
27033 2023-05-01 Jeff Law <jlaw@ventanamicro>
27035 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
27037 2023-05-01 Jeff Law <jlaw@ventanamicro>
27039 * config/cris/cris.cc (TARGET_LRA_P): Remove.
27040 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
27041 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
27042 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
27043 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
27044 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
27046 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
27048 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
27049 * print-tree.cc (print_decl_identifier): Implement it.
27050 * toplev.cc (output_stack_usage_1): Use it.
27052 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27054 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
27057 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27059 * value-range.h (irange::set_nonzero): Inline.
27061 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27063 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
27065 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
27066 invalid_range, as it is an inverse range.
27067 * tree-vrp.cc (find_case_label_range): Avoid trees.
27068 * value-range.cc (irange::irange_set): Delete.
27069 (irange::irange_set_1bit_anti_range): Delete.
27070 (irange::irange_set_anti_range): Delete.
27071 (irange::set): Cleanup.
27072 * value-range.h (class irange): Remove irange_set,
27073 irange_set_anti_range, irange_set_1bit_anti_range.
27074 (irange::set_undefined): Remove set to m_type.
27076 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27078 * range-op.cc (update_known_bitmask): Adjust for irange containing
27079 wide_ints internally.
27080 * tree-ssanames.cc (set_nonzero_bits): Same.
27081 * tree-ssanames.h (set_nonzero_bits): Same.
27082 * value-range-storage.cc (irange_storage::set_irange): Same.
27083 (irange_storage::get_irange): Same.
27084 * value-range.cc (irange::operator=): Same.
27085 (irange::irange_set): Same.
27086 (irange::irange_set_1bit_anti_range): Same.
27087 (irange::irange_set_anti_range): Same.
27088 (irange::set): Same.
27089 (irange::verify_range): Same.
27090 (irange::contains_p): Same.
27091 (irange::irange_single_pair_union): Same.
27092 (irange::union_): Same.
27093 (irange::irange_contains_p): Same.
27094 (irange::intersect): Same.
27095 (irange::invert): Same.
27096 (irange::set_range_from_nonzero_bits): Same.
27097 (irange::set_nonzero_bits): Same.
27098 (mask_to_wi): Same.
27099 (irange::intersect_nonzero_bits): Same.
27100 (irange::union_nonzero_bits): Same.
27103 (tree_range): Same.
27104 (range_tests_strict_enum): Same.
27105 (range_tests_misc): Same.
27106 (range_tests_nonzero_bits): Same.
27107 * value-range.h (irange::type): Same.
27108 (irange::varying_compatible_p): Same.
27109 (irange::irange): Same.
27110 (int_range::int_range): Same.
27111 (irange::set_undefined): Same.
27112 (irange::set_varying): Same.
27113 (irange::lower_bound): Same.
27114 (irange::upper_bound): Same.
27116 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27118 * gimple-range-fold.cc (tree_lower_bound): Delete.
27119 (tree_upper_bound): Delete.
27120 (vrp_val_max): Delete.
27121 (vrp_val_min): Delete.
27122 (fold_using_range::range_of_ssa_name_with_loop_info): Call
27123 range_of_var_in_loop.
27124 * vr-values.cc (valid_value_p): Delete.
27125 (fix_overflow): Delete.
27126 (get_scev_info): New.
27127 (bounds_of_var_in_loop): Refactor into...
27128 (induction_variable_may_overflow_p): ...this,
27129 (range_from_loop_direction): ...and this,
27130 (range_of_var_in_loop): ...and this.
27131 * vr-values.h (bounds_of_var_in_loop): Delete.
27132 (range_of_var_in_loop): New.
27134 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27136 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
27138 (vrp_val_max): New.
27139 (vrp_val_min): New.
27140 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
27141 * range-op.cc (max_limit): Same.
27143 (plus_minus_ranges): Same.
27144 (operator_rshift::op1_range): Same.
27145 (operator_cast::inside_domain_p): Same.
27146 * value-range.cc (vrp_val_is_max): Delete.
27147 (vrp_val_is_min): Delete.
27148 (range_tests_misc): Use irange_val_*.
27149 * value-range.h (vrp_val_is_min): Delete.
27150 (vrp_val_is_max): Delete.
27151 (vrp_val_max): Delete.
27152 (irange_val_min): New.
27153 (vrp_val_min): Delete.
27154 (irange_val_max): New.
27155 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
27157 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27159 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
27160 * gimple-fold.cc (size_must_be_zero_p): Same.
27161 * gimple-loop-versioning.cc
27162 (loop_versioning::prune_loop_conditions): Same.
27163 * gimple-range-edge.cc (gcond_edge_range): Same.
27164 (gimple_outgoing_range::calc_switch_ranges): Same.
27165 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
27166 (adjust_realpart_expr): Same.
27167 (fold_using_range::range_of_address): Same.
27168 (fold_using_range::relation_fold_and_or): Same.
27169 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
27170 (range_is_either_true_or_false): Same.
27171 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
27172 (cfn_clz::fold_range): Same.
27173 (cfn_ctz::fold_range): Same.
27174 * gimple-range-tests.cc (class test_expr_eval): Same.
27175 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
27176 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
27177 (propagate_vr_across_jump_function): Same.
27178 (decide_whether_version_node): Same.
27179 * ipa-prop.cc (ipa_get_value_range): Same.
27180 * ipa-prop.h (ipa_range_set_and_normalize): Same.
27181 * range-op.cc (get_shift_range): Same.
27182 (value_range_from_overflowed_bounds): Same.
27183 (value_range_with_overflow): Same.
27184 (create_possibly_reversed_range): Same.
27185 (equal_op1_op2_relation): Same.
27186 (not_equal_op1_op2_relation): Same.
27187 (lt_op1_op2_relation): Same.
27188 (le_op1_op2_relation): Same.
27189 (gt_op1_op2_relation): Same.
27190 (ge_op1_op2_relation): Same.
27191 (operator_mult::op1_range): Same.
27192 (operator_exact_divide::op1_range): Same.
27193 (operator_lshift::op1_range): Same.
27194 (operator_rshift::op1_range): Same.
27195 (operator_cast::op1_range): Same.
27196 (operator_logical_and::fold_range): Same.
27197 (set_nonzero_range_from_mask): Same.
27198 (operator_bitwise_or::op1_range): Same.
27199 (operator_bitwise_xor::op1_range): Same.
27200 (operator_addr_expr::fold_range): Same.
27201 (pointer_plus_operator::wi_fold): Same.
27202 (pointer_or_operator::op1_range): Same.
27209 (range_op_cast_tests): Same.
27210 (range_op_lshift_tests): Same.
27211 (range_op_rshift_tests): Same.
27212 (range_op_bitwise_and_tests): Same.
27213 (range_relational_tests): Same.
27214 * range.cc (range_zero): Same.
27215 (range_nonzero): Same.
27216 * range.h (range_true): Same.
27217 (range_false): Same.
27218 (range_true_and_false): Same.
27219 * tree-data-ref.cc (split_constant_offset_1): Same.
27220 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
27221 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
27222 (find_unswitching_predicates_for_bb): Same.
27223 * tree-ssa-phiopt.cc (value_replacement): Same.
27224 * tree-ssa-threadbackward.cc
27225 (back_threader::find_taken_edge_cond): Same.
27226 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
27227 * tree-vrp.cc (find_case_label_range): Same.
27228 * value-query.cc (range_query::get_tree_range): Same.
27229 * value-range.cc (irange::set_nonnegative): Same.
27230 (frange::contains_p): Same.
27231 (frange::singleton_p): Same.
27232 (frange::internal_singleton_p): Same.
27233 (irange::irange_set): Same.
27234 (irange::irange_set_1bit_anti_range): Same.
27235 (irange::irange_set_anti_range): Same.
27236 (irange::set): Same.
27237 (irange::operator==): Same.
27238 (irange::singleton_p): Same.
27239 (irange::contains_p): Same.
27240 (irange::set_range_from_nonzero_bits): Same.
27241 (DEFINE_INT_RANGE_INSTANCE): Same.
27251 (range_uint128): New.
27252 (range_uchar): New.
27254 (build_range3): Convert to irange wide_int API.
27255 (range_tests_irange3): Same.
27256 (range_tests_int_range_max): Same.
27257 (range_tests_strict_enum): Same.
27258 (range_tests_misc): Same.
27259 (range_tests_nonzero_bits): Same.
27260 (range_tests_nan): Same.
27261 (range_tests_signed_zeros): Same.
27262 * value-range.h (Value_Range::Value_Range): Same.
27263 (irange::set): Same.
27264 (irange::nonzero_p): Same.
27265 (irange::contains_p): Same.
27266 (range_includes_zero_p): Same.
27267 (irange::set_nonzero): Same.
27268 (irange::set_zero): Same.
27269 (contains_zero_p): Same.
27270 (frange::contains_p): Same.
27272 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
27273 (bounds_of_var_in_loop): Same.
27274 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
27276 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27278 * value-range.cc (irange::irange_union): Rename to...
27279 (irange::union_): ...this.
27280 (irange::irange_intersect): Rename to...
27281 (irange::intersect): ...this.
27282 * value-range.h (irange::union_): Delete.
27283 (irange::intersect): Delete.
27285 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27287 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
27289 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27291 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
27293 (compare_ranges): Delete.
27294 (compare_range_with_value): Delete.
27295 (bounds_of_var_in_loop): Tidy up by using ranger API.
27296 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
27297 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
27298 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
27299 strict_overflow_p and only_ranges.
27300 (simplify_using_ranges::legacy_fold_cond): Adjust call to
27301 legacy_fold_cond_overflow.
27302 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
27304 (range_fits_type_p): Rename value_range to irange.
27305 * vr-values.h (range_fits_type_p): Adjust prototype.
27307 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27309 * value-range.cc (irange::irange_set_anti_range): Remove uses of
27310 tree_lower_bound and tree_upper_bound.
27311 (irange::verify_range): Same.
27312 (irange::operator==): Same.
27313 (irange::singleton_p): Same.
27314 * value-range.h (irange::tree_lower_bound): Delete.
27315 (irange::tree_upper_bound): Delete.
27316 (irange::lower_bound): Delete.
27317 (irange::upper_bound): Delete.
27318 (irange::zero_p): Remove uses of tree_lower_bound and
27321 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27323 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
27325 (determine_value_range): Same.
27326 (record_nonwrapping_iv): Same.
27327 (infer_loop_bounds_from_signedness): Same.
27328 (scev_var_range_cant_overflow): Same.
27329 * tree-vrp.cc (operand_less_p): Delete.
27330 * tree-vrp.h (operand_less_p): Delete.
27331 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
27332 (irange::value_inside_range): Delete.
27333 * value-range.h (vrange::kind): Delete.
27334 (irange::num_pairs): Remove check of m_kind.
27335 (irange::min): Delete.
27336 (irange::max): Delete.
27338 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
27340 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
27341 for vrange_storage.
27342 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
27343 (sbr_vector::grow): Same.
27344 (sbr_vector::set_bb_range): Same.
27345 (sbr_vector::get_bb_range): Same.
27346 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
27347 (sbr_sparse_bitmap::set_bb_range): Same.
27348 (sbr_sparse_bitmap::get_bb_range): Same.
27349 (block_range_cache::block_range_cache): Same.
27350 (ssa_global_cache::ssa_global_cache): Same.
27351 (ssa_global_cache::get_global_range): Same.
27352 (ssa_global_cache::set_global_range): Same.
27353 * gimple-range-cache.h: Same.
27354 * gimple-range-edge.cc
27355 (gimple_outgoing_range::gimple_outgoing_range): Same.
27356 (gimple_outgoing_range::switch_edge_range): Same.
27357 (gimple_outgoing_range::calc_switch_ranges): Same.
27358 * gimple-range-edge.h: Same.
27359 * gimple-range-infer.cc
27360 (infer_range_manager::infer_range_manager): Same.
27361 (infer_range_manager::get_nonzero): Same.
27362 (infer_range_manager::maybe_adjust_range): Same.
27363 (infer_range_manager::add_range): Same.
27364 * gimple-range-infer.h: Rename obstack_vrange_allocator to
27366 * tree-core.h (struct irange_storage_slot): Remove.
27367 (struct tree_ssa_name): Remove irange_info and frange_info. Make
27368 range_info a pointer to vrange_storage.
27369 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
27370 (range_info_alloc): Same.
27371 (range_info_free): Same.
27372 (range_info_get_range): Same.
27373 (range_info_set_range): Same.
27374 (get_nonzero_bits): Same.
27375 * value-query.cc (get_ssa_name_range_info): Same.
27376 * value-range-storage.cc (class vrange_internal_alloc): New.
27377 (class vrange_obstack_alloc): New.
27378 (class vrange_ggc_alloc): New.
27379 (vrange_allocator::vrange_allocator): New.
27380 (vrange_allocator::~vrange_allocator): New.
27381 (vrange_storage::alloc_slot): New.
27382 (vrange_allocator::alloc): New.
27383 (vrange_allocator::free): New.
27384 (vrange_allocator::clone): New.
27385 (vrange_allocator::clone_varying): New.
27386 (vrange_allocator::clone_undefined): New.
27387 (vrange_storage::alloc): New.
27388 (vrange_storage::set_vrange): Remove slot argument.
27389 (vrange_storage::get_vrange): Same.
27390 (vrange_storage::fits_p): Same.
27391 (vrange_storage::equal_p): New.
27392 (irange_storage::write_lengths_address): New.
27393 (irange_storage::lengths_address): New.
27394 (irange_storage_slot::alloc_slot): Remove.
27395 (irange_storage::alloc): New.
27396 (irange_storage_slot::irange_storage_slot): Remove.
27397 (irange_storage::irange_storage): New.
27398 (write_wide_int): New.
27399 (irange_storage_slot::set_irange): Remove.
27400 (irange_storage::set_irange): New.
27401 (read_wide_int): New.
27402 (irange_storage_slot::get_irange): Remove.
27403 (irange_storage::get_irange): New.
27404 (irange_storage_slot::size): Remove.
27405 (irange_storage::equal_p): New.
27406 (irange_storage_slot::num_wide_ints_needed): Remove.
27407 (irange_storage::size): New.
27408 (irange_storage_slot::fits_p): Remove.
27409 (irange_storage::fits_p): New.
27410 (irange_storage_slot::dump): Remove.
27411 (irange_storage::dump): New.
27412 (frange_storage_slot::alloc_slot): Remove.
27413 (frange_storage::alloc): New.
27414 (frange_storage_slot::set_frange): Remove.
27415 (frange_storage::set_frange): New.
27416 (frange_storage_slot::get_frange): Remove.
27417 (frange_storage::get_frange): New.
27418 (frange_storage_slot::fits_p): Remove.
27419 (frange_storage::equal_p): New.
27420 (frange_storage::fits_p): New.
27421 (ggc_vrange_allocator): New.
27422 (ggc_alloc_vrange_storage): New.
27423 * value-range-storage.h (class vrange_storage): Rewrite.
27424 (class irange_storage): Rewrite.
27425 (class frange_storage): Rewrite.
27426 (class obstack_vrange_allocator): Remove.
27427 (class ggc_vrange_allocator): Remove.
27428 (vrange_allocator::alloc_vrange): Remove.
27429 (vrange_allocator::alloc_irange): Remove.
27430 (vrange_allocator::alloc_frange): Remove.
27431 (ggc_alloc_vrange_storage): New.
27432 * value-range.h (class irange): Rename vrange_allocator to
27434 (class frange): Same.
27436 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
27438 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
27439 inc to avoid clobbering the carry flag.
27441 2023-04-30 Andrew Pinski <apinski@marvell.com>
27443 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
27444 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
27446 2023-04-30 Andrew Pinski <apinski@marvell.com>
27448 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
27449 Allow some builtin/internal function calls which
27450 are known not to trap/throw.
27451 (phiopt_worker::match_simplify_replacement):
27452 Use name instead of getting the lhs again.
27454 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
27456 * configure: Regenerate.
27457 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
27459 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
27461 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
27462 emit_insn_if_valid_for_reload.
27463 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
27464 to be recognized, also try emitting a parallel that clobbers
27465 TARGET_FLAGS_REGNUM, as applicable.
27467 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
27469 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
27471 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
27472 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
27474 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
27476 * config/stormy16/stormy16.md (any_lshift): New code iterator.
27477 (any_or_plus): Likewise.
27478 (any_rotate): Likewise.
27479 (*<any_lshift>_and_internal): New define_insn_and_split to
27480 recognize a logical shift followed by an AND, and split it
27481 again after reload.
27482 (*swpn): New define_insn matching xstormy16's swpn.
27483 (*swpn_zext): New define_insn recognizing swpn followed by
27484 zero_extendqihi2, i.e. with the high byte set to zero.
27485 (*swpn_sext): Likewise, for swpn followed by cbw.
27486 (*swpn_sext_2): Likewise, for an alternate RTL form.
27487 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
27488 sequence is split in the correct place to recognize the *swpn_zext
27489 followed by any_or_plus (ior, xor or plus) instruction.
27491 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
27494 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
27495 (lm32-*-uclinux*): Likewise.
27497 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
27499 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
27500 for riscv_use_save_libcall.
27501 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
27502 (riscv_compute_frame_info): restructure to decouple stack allocation
27503 for rv32e w/o save-restore.
27505 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
27507 * doc/install.texi: Fix documentation typo
27509 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
27511 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
27512 (u): Add div/udiv cases.
27513 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
27514 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
27516 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
27517 (thead_c906_tune_info): Likewise.
27518 (optimize_size_tune_info): Likewise.
27519 (riscv_use_divmod_expander): New function.
27520 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
27522 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
27524 * config/riscv/bitmanip.md: Added clmulr instruction.
27525 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
27526 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
27528 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
27529 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
27530 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
27531 functions to riscv-cmo.def.
27532 * config/riscv/generic.md: Add clmul to list of instructions
27533 using the generic_imul reservation.
27535 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
27537 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
27539 2023-04-28 Andrew Pinski <apinski@marvell.com>
27541 PR tree-optimization/100958
27542 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
27543 (pass_phiopt::execute): Don't call two_value_replacement.
27544 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
27545 handle what two_value_replacement did.
27547 2023-04-28 Andrew Pinski <apinski@marvell.com>
27549 * match.pd: Add patterns for
27550 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
27552 2023-04-28 Andrew Pinski <apinski@marvell.com>
27554 * match.pd: Factor out the deciding the min/max from
27555 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
27557 * fold-const.cc (minmax_from_comparison): this new function.
27558 * fold-const.h (minmax_from_comparison): New prototype.
27560 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
27562 PR rtl-optimization/109476
27563 * lower-subreg.cc: Include explow.h for force_reg.
27564 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
27565 If decomposing a suitable LSHIFTRT and we're not splitting
27566 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
27567 instead of setting a high part SUBREG to zero, which helps combine.
27568 (decompose_multiword_subregs): Update call to resolve_shift_zext.
27570 2023-04-28 Richard Biener <rguenther@suse.de>
27572 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
27574 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
27575 gather-scatter info and cost emulated scatters accordingly.
27576 (get_load_store_type): Support emulated scatters.
27577 (vectorizable_store): Likewise. Emulate them by extracting
27578 scalar offsets and data, doing scalar stores.
27580 2023-04-28 Richard Biener <rguenther@suse.de>
27582 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
27583 Tame down element extracts and scalar loads for gather/scatter
27584 similar to elementwise strided accesses.
27586 2023-04-28 Pan Li <pan2.li@intel.com>
27587 kito-cheng <kito.cheng@sifive.com>
27589 * config/riscv/vector.md: Add new define split to perform
27590 the simplification.
27592 2023-04-28 Richard Biener <rguenther@suse.de>
27595 * ipa-param-manipulation.cc
27596 (ipa_param_body_adjustments::modify_expression): Allow
27597 conversion of a register to a non-register type. Elide
27598 conversions inside BIT_FIELD_REFs.
27600 2023-04-28 Richard Biener <rguenther@suse.de>
27602 PR tree-optimization/109644
27603 * tree-cfg.cc (verify_types_in_gimple_reference): Check
27604 register constraints on the outermost VIEW_CONVERT_EXPR
27605 only. Do not allow register or invariant bases on
27606 multi-level or possibly variable index handled components.
27608 2023-04-28 Richard Biener <rguenther@suse.de>
27610 * gimplify.cc (gimplify_compound_lval): When there's a
27611 non-register type produced by one of the handled component
27612 operations make sure we get a non-register base.
27614 2023-04-28 Richard Biener <rguenther@suse.de>
27616 PR tree-optimization/108752
27617 * tree-vect-generic.cc (build_replicated_const): Rename
27618 to build_replicated_int_cst and move to tree.{h,cc}.
27619 (do_plus_minus): Adjust.
27620 (do_negate): Likewise.
27621 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
27622 arithmetic vector operations in lowered form.
27623 * tree.h (build_replicated_int_cst): Declare.
27624 * tree.cc (build_replicated_int_cst): Moved from
27625 tree-vect-generic.cc build_replicated_const.
27627 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27630 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
27631 (aarch64_rbit<mode><vczle><vczbe>): ... This.
27632 (neg<mode>2): Rename to...
27633 (neg<mode>2<vczle><vczbe>): ... This.
27634 (abs<mode>2): Rename to...
27635 (abs<mode>2<vczle><vczbe>): ... This.
27636 (aarch64_abs<mode>): Rename to...
27637 (aarch64_abs<mode><vczle><vczbe>): ... This.
27638 (one_cmpl<mode>2): Rename to...
27639 (one_cmpl<mode>2<vczle><vczbe>): ... This.
27640 (clrsb<mode>2): Rename to...
27641 (clrsb<mode>2<vczle><vczbe>): ... This.
27642 (clz<mode>2): Rename to...
27643 (clz<mode>2<vczle><vczbe>): ... This.
27644 (popcount<mode>2): Rename to...
27645 (popcount<mode>2<vczle><vczbe>): ... This.
27647 2023-04-28 Jakub Jelinek <jakub@redhat.com>
27649 * gimple-range-op.cc (class cfn_sqrt): New type.
27650 (op_cfn_sqrt): New variable.
27651 (gimple_range_op_handler::maybe_builtin_call): Handle
27652 CASE_CFN_SQRT{,_FN}.
27654 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
27655 Jakub Jelinek <jakub@redhat.com>
27657 * value-range.h (frange_nextafter): Declare.
27658 * gimple-range-op.cc (class cfn_sincos): New.
27659 (op_cfn_sin, op_cfn_cos): New variables.
27660 (gimple_range_op_handler::maybe_builtin_call): Handle
27661 CASE_CFN_{SIN,COS}{,_FN}.
27663 2023-04-28 Jakub Jelinek <jakub@redhat.com>
27665 * target.def (libm_function_max_error): New target hook.
27666 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
27667 * doc/tm.texi: Regenerated.
27668 * targhooks.h (default_libm_function_max_error,
27669 glibc_linux_libm_function_max_error): Declare.
27670 * targhooks.cc: Include case-cfn-macros.h.
27671 (default_libm_function_max_error,
27672 glibc_linux_libm_function_max_error): New functions.
27673 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27674 * config/linux-protos.h (linux_libm_function_max_error): Declare.
27675 * config/linux.cc: Include target.h and targhooks.h.
27676 (linux_libm_function_max_error): New function.
27677 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
27678 (arc_libm_function_max_error): New function.
27679 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27680 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
27681 (ix86_libm_function_max_error): New function.
27682 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27683 * config/rs6000/rs6000-protos.h
27684 (rs6000_linux_libm_function_max_error): Declare.
27685 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
27686 and case-cfn-macros.h.
27687 (rs6000_linux_libm_function_max_error): New function.
27688 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27689 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27690 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
27691 (or1k_libm_function_max_error): New function.
27692 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
27694 2023-04-28 Alexandre Oliva <oliva@adacore.com>
27696 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
27697 Move detach value calls...
27698 (pass_harden_conditional_branches::execute): ... here.
27699 (pass_harden_compares::execute): Detach values before
27702 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
27704 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
27705 (cml<addsub_as><mode>4): Likewise.
27706 (vec_addsub<mode>3): Likewise.
27707 (cadd<rot><mode>3): Likewise.
27708 (vec_fmaddsub<mode>4): Likewise.
27709 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
27711 2023-04-27 Andrew Pinski <apinski@marvell.com>
27713 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
27714 up to 2 min/max expressions in the sequence/match code.
27716 2023-04-27 Andrew Pinski <apinski@marvell.com>
27718 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
27720 * tree-eh.cc (operation_could_trap_helper_p): Treate
27721 MIN_EXPR/MAX_EXPR similar as other comparisons.
27723 2023-04-27 Andrew Pinski <apinski@marvell.com>
27725 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
27727 (cond_if_else_store_replacement): Likewise.
27728 (get_non_trapping): Likewise.
27729 (store_elim_worker): Move into ...
27730 (pass_cselim::execute): This.
27732 2023-04-27 Andrew Pinski <apinski@marvell.com>
27734 * tree-ssa-phiopt.cc (two_value_replacement): Remove
27736 (match_simplify_replacement): Likewise.
27737 (factor_out_conditional_conversion): Likewise.
27738 (value_replacement): Likewise.
27739 (minmax_replacement): Likewise.
27740 (spaceship_replacement): Likewise.
27741 (cond_removal_in_builtin_zero_pattern): Likewise.
27742 (hoist_adjacent_loads): Likewise.
27743 (tree_ssa_phiopt_worker): Move into ...
27744 (pass_phiopt::execute): this.
27746 2023-04-27 Andrew Pinski <apinski@marvell.com>
27748 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
27749 do_store_elim argument and split that part out to ...
27750 (store_elim_worker): This new function.
27751 (pass_cselim::execute): Call store_elim_worker.
27752 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
27754 2023-04-27 Jan Hubicka <jh@suse.cz>
27756 * cfgloopmanip.h (unloop_loops): Export.
27757 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
27758 that no longer loop.
27759 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
27760 vectors of loops to unloop.
27761 (canonicalize_induction_variables): Free vectors here.
27762 (tree_unroll_loops_completely): Free vectors here.
27764 2023-04-27 Richard Biener <rguenther@suse.de>
27766 PR tree-optimization/109170
27767 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
27768 Handle __builtin_expect and similar via cfn_pass_through_arg1
27769 and inspecting the calls fnspec.
27770 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
27771 and BUILT_IN_EXPECT_WITH_PROBABILITY.
27773 2023-04-27 Alexandre Oliva <oliva@adacore.com>
27775 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
27777 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
27779 PR tree-optimization/109639
27780 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
27781 (propagate_vr_across_jump_function): Same.
27782 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
27783 * ipa-prop.h (ipa_range_set_and_normalize): New.
27784 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
27786 2023-04-27 Richard Biener <rguenther@suse.de>
27788 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
27789 create a CTOR operand in the result when simplifying GIMPLE.
27791 2023-04-27 Richard Biener <rguenther@suse.de>
27793 * gimplify.cc (gimplify_compound_lval): When the base
27794 gimplified to a register make sure to split up chains
27797 2023-04-27 Richard Biener <rguenther@suse.de>
27800 * ipa-param-manipulation.h
27801 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
27803 * ipa-param-manipulation.cc
27804 (ipa_param_body_adjustments::modify_expression): Likewise.
27805 When we need a conversion and the replacement is a register
27806 split the conversion out.
27807 (ipa_param_body_adjustments::modify_assignment): Pass
27808 extra_stmts to RHS modify_expression.
27810 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
27812 * doc/extend.texi (Zero Length): Describe example.
27814 2023-04-27 Richard Biener <rguenther@suse.de>
27816 PR tree-optimization/109594
27817 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
27818 what we rewrite to a register based on the above.
27820 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
27822 * config/riscv/riscv.cc: Fix whitespace.
27823 * config/riscv/sync.md: Fix whitespace.
27825 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27827 PR tree-optimization/108697
27828 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
27829 not clear the vector on an out of range query.
27830 (ssa_cache::dump): Use dump_range_query instead of get_range.
27831 (ssa_cache::dump_range_query): New.
27832 (ssa_lazy_cache::dump_range_query): New.
27833 (ssa_lazy_cache::set_range): New.
27834 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
27835 (class ssa_lazy_cache): New.
27836 (ssa_lazy_cache::ssa_lazy_cache): New.
27837 (ssa_lazy_cache::~ssa_lazy_cache): New.
27838 (ssa_lazy_cache::get_range): New.
27839 (ssa_lazy_cache::clear_range): New.
27840 (ssa_lazy_cache::clear): New.
27841 (ssa_lazy_cache::dump): New.
27842 * gimple-range-path.cc (path_range_query::path_range_query): Do
27843 not allocate a ssa_cache object nor has_cache bitmap.
27844 (path_range_query::~path_range_query): Do not free objects.
27845 (path_range_query::clear_cache): Remove.
27846 (path_range_query::get_cache): Adjust.
27847 (path_range_query::set_cache): Remove.
27848 (path_range_query::dump): Don't call through a pointer.
27849 (path_range_query::internal_range_of_expr): Set cache directly.
27850 (path_range_query::reset_path): Clear cache directly.
27851 (path_range_query::ssa_range_in_phi): Fold with globals only.
27852 (path_range_query::compute_ranges_in_phis): Simply set range.
27853 (path_range_query::compute_ranges_in_block): Call cache directly.
27854 * gimple-range-path.h (class path_range_query): Replace bitmap
27855 and cache pointer with lazy cache object.
27856 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
27858 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27860 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
27861 (ssa_cache::~ssa_cache): Rename.
27862 (ssa_cache::has_range): New.
27863 (ssa_cache::get_range): Rename.
27864 (ssa_cache::set_range): Rename.
27865 (ssa_cache::clear_range): Rename.
27866 (ssa_cache::clear): Rename.
27867 (ssa_cache::dump): Rename and use get_range.
27868 (ranger_cache::get_global_range): Use get_range and set_range.
27869 (ranger_cache::range_of_def): Use get_range.
27870 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
27871 (class ranger_cache): Use ssa_cache.
27872 * gimple-range-path.cc (path_range_query::path_range_query): Use
27874 (path_range_query::get_cache): Use get_range.
27875 (path_range_query::set_cache): Use set_range.
27876 * gimple-range-path.h (class path_range_query): Use ssa_cache.
27877 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
27878 (assume_query::range_of_expr): Use get_range.
27879 (assume_query::assume_query): Use set_range.
27880 (assume_query::calculate_op): Use get_range and set_range.
27881 * gimple-range.h (class assume_query): Use ssa_cache.
27883 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27885 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
27886 and local to optionally zero memory.
27887 (br_vector::grow): Only zero memory if flag is set.
27888 (class sbr_lazy_vector): New.
27889 (sbr_lazy_vector::sbr_lazy_vector): New.
27890 (sbr_lazy_vector::set_bb_range): New.
27891 (sbr_lazy_vector::get_bb_range): New.
27892 (sbr_lazy_vector::bb_range_p): New.
27893 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
27894 * gimple-range-gori.cc (gori_map::calculate_gori): Use
27895 param_vrp_switch_limit.
27896 (gori_compute::gori_compute): Use param_vrp_switch_limit.
27897 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
27898 (vrp_switch_limit): Rename from evrp_switch_limit.
27899 (vrp_vector_threshold): New.
27901 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27903 * value-relation.cc (dom_oracle::query_relation): Check early for lack
27905 * value-relation.h (equiv_oracle::has_equiv_p): New.
27907 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
27909 PR tree-optimization/109417
27910 * gimple-range-gori.cc (range_def_chain::register_dependency):
27911 Save the ssa version number, not the pointer.
27912 (gori_compute::may_recompute_p): No need to check if a dependency
27913 is in the free list.
27914 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
27915 fields to be unsigned int instead of trees.
27916 (ange_def_chain::depend1): Adjust.
27917 (ange_def_chain::depend2): Adjust.
27918 * gimple-range.h: Include "ssa.h" to inline ssa_name().
27920 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
27922 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
27923 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
27924 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
27926 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
27929 * config/riscv/riscv-protos.h: Add helper function stubs.
27930 * config/riscv/riscv.cc: Add helper functions for subword masking.
27931 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
27932 -mno-inline-atomics.
27933 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
27934 fetch_and_nand, CAS, and exchange ops.
27935 * doc/invoke.texi: Add blurb regarding new command-line flags
27936 -minline-atomics and -mno-inline-atomics.
27938 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27940 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
27941 Reimplement using standard RTL codes instead of unspec.
27942 (aarch64_rshrn2<mode>_insn_be): Likewise.
27943 (aarch64_rshrn2<mode>): Adjust for the above.
27944 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
27946 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27948 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
27949 with standard RTL codes instead of an UNSPEC.
27950 (aarch64_rshrn<mode>_insn_be): Likewise.
27951 (aarch64_rshrn<mode>): Adjust for the above.
27952 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
27954 2023-04-26 Pan Li <pan2.li@intel.com>
27955 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
27957 * config/riscv/riscv.cc (riscv_classify_address): Allow
27958 const0_rtx for the RVV load/store.
27960 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
27962 * range-op.cc (range_op_cast_tests): Remove legacy support.
27963 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
27964 * value-range.cc (irange::operator=): Same.
27965 (get_legacy_range): Same.
27966 (irange::copy_legacy_to_multi_range): Delete.
27967 (irange::copy_to_legacy): Delete.
27968 (irange::irange_set_anti_range): Delete.
27969 (irange::set): Remove legacy support.
27970 (irange::verify_range): Same.
27971 (irange::legacy_lower_bound): Delete.
27972 (irange::legacy_upper_bound): Delete.
27973 (irange::legacy_equal_p): Delete.
27974 (irange::operator==): Remove legacy support.
27975 (irange::singleton_p): Same.
27976 (irange::value_inside_range): Same.
27977 (irange::contains_p): Same.
27978 (intersect_ranges): Delete.
27979 (irange::legacy_intersect): Delete.
27980 (union_ranges): Delete.
27981 (irange::legacy_union): Delete.
27982 (irange::legacy_verbose_union_): Delete.
27983 (irange::legacy_verbose_intersect): Delete.
27984 (irange::irange_union): Remove legacy support.
27985 (irange::irange_intersect): Same.
27986 (irange::intersect): Same.
27987 (irange::invert): Same.
27988 (ranges_from_anti_range): Delete.
27989 (gt_pch_nx): Adjust for legacy removal.
27991 (range_tests_legacy): Delete.
27992 (range_tests_misc): Adjust for legacy removal.
27993 (range_tests): Same.
27994 * value-range.h (class irange): Same.
27995 (irange::legacy_mode_p): Delete.
27996 (ranges_from_anti_range): Delete.
27997 (irange::nonzero_p): Adjust for legacy removal.
27998 (irange::lower_bound): Same.
27999 (irange::upper_bound): Same.
28000 (irange::union_): Same.
28001 (irange::intersect): Same.
28002 (irange::set_nonzero): Same.
28003 (irange::set_zero): Same.
28004 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
28006 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28008 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
28009 of range_has_numeric_bounds_p with irange API.
28010 (range_has_numeric_bounds_p): Delete.
28011 * value-range.h (range_has_numeric_bounds_p): Delete.
28013 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28015 * tree-data-ref.cc (compute_distributive_range): Replace uses of
28016 range_int_cst_p with irange API.
28017 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
28018 * tree-vrp.h (range_int_cst_p): Delete.
28019 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
28020 range_int_cst_p with irange API.
28021 (vr_set_zero_nonzero_bits): Same.
28022 (range_fits_type_p): Same.
28023 (simplify_using_ranges::simplify_casted_cond): Same.
28024 * tree-vrp.cc (range_int_cst_p): Remove.
28026 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28028 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
28030 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28032 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
28033 API uses to new API.
28034 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
28035 * internal-fn.cc (get_min_precision): Same.
28037 * tree-affine.cc (expr_to_aff_combination): Same.
28038 * tree-data-ref.cc (dr_step_indicator): Same.
28039 * tree-dfa.cc (get_ref_base_and_extent): Same.
28040 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
28041 * tree-ssa-phiopt.cc (two_value_replacement): Same.
28042 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
28043 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
28044 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
28045 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
28046 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
28047 * tree.cc (get_range_pos_neg): Same.
28049 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28051 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
28052 vrange::dump instead of ad-hoc dumper.
28053 * tree-ssa-strlen.cc (dump_strlen_info): Same.
28054 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
28057 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28059 * range-op.cc (operator_cast::op1_range): Use
28060 create_possibly_reversed_range.
28061 (operator_bitwise_and::simple_op1_range_solver): Same.
28062 * value-range.cc (swap_out_of_order_endpoints): Delete.
28063 (irange::set): Remove call to swap_out_of_order_endpoints.
28065 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28067 * builtins.cc (determine_block_size): Convert use of legacy API to
28069 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
28070 (array_bounds_checker::check_array_ref): Same.
28071 * gimple-ssa-warn-restrict.cc
28072 (builtin_memref::extend_offset_range): Same.
28073 * ipa-cp.cc (ipcp_store_vr_results): Same.
28074 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
28075 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
28076 (ipa_write_jump_function): Same.
28077 * pointer-query.cc (get_size_range): Same.
28078 * tree-data-ref.cc (split_constant_offset): Same.
28079 * tree-ssa-strlen.cc (get_range): Same.
28080 (maybe_diag_stxncpy_trunc): Same.
28081 (strlen_pass::get_len_or_size): Same.
28082 (strlen_pass::count_nonzero_bytes_addr): Same.
28083 * tree-vect-patterns.cc (vect_get_range_info): Same.
28084 * value-range.cc (irange::maybe_anti_range): Remove.
28085 (get_legacy_range): New.
28086 (irange::copy_to_legacy): Use get_legacy_range.
28087 (ranges_from_anti_range): Same.
28088 * value-range.h (class irange): Remove maybe_anti_range.
28089 (get_legacy_range): New.
28090 * vr-values.cc (check_for_binary_op_overflow): Convert use of
28091 legacy API to get_legacy_range.
28092 (compare_ranges): Same.
28093 (compare_range_with_value): Same.
28094 (bounds_of_var_in_loop): Same.
28095 (find_case_label_ranges): Same.
28096 (simplify_using_ranges::simplify_switch_using_ranges): Same.
28098 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28100 * value-range-pretty-print.cc (vrange_printer::visit): Remove
28102 * value-range.cc (irange::constant_p): Remove.
28103 (irange::get_nonzero_bits_from_range): Remove constant_p use.
28104 * value-range.h (class irange): Remove constant_p.
28105 (irange::num_pairs): Remove constant_p use.
28107 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28109 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
28111 (irange::set): Same.
28112 (irange::legacy_lower_bound): Same.
28113 (irange::legacy_upper_bound): Same.
28114 (irange::contains_p): Same.
28115 (range_tests_legacy): Same.
28116 (irange::normalize_addresses): Remove.
28117 (irange::normalize_symbolics): Remove.
28118 (irange::symbolic_p): Remove.
28119 * value-range.h (class irange): Remove symbolic_p,
28120 normalize_symbolics, and normalize_addresses.
28121 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
28122 Remove symbolics support.
28124 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28126 * value-range.cc (irange::may_contain_p): Remove.
28127 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
28128 usage with contains_p.
28129 * vr-values.cc (compare_range_with_value): Same.
28131 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28133 * tree-vrp.cc (supported_types_p): Remove.
28134 (defined_ranges_p): Remove.
28135 (range_fold_binary_expr): Remove.
28136 (range_fold_unary_expr): Remove.
28137 * tree-vrp.h (range_fold_unary_expr): Remove.
28138 (range_fold_binary_expr): Remove.
28140 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28142 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
28143 (ipa_value_range_from_jfunc): Same.
28144 (propagate_vr_across_jump_function): Same.
28145 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
28146 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
28147 * vr-values.cc (bounds_of_var_in_loop): Same.
28149 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28151 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
28152 Add irange argument.
28153 (check_out_of_bounds_and_warn): Remove check for vr.
28154 (array_bounds_checker::check_array_ref): Remove pointer qualifier
28155 for vr and adjust accordingly.
28156 * gimple-array-bounds.h (get_value_range): Add irange argument.
28157 * value-query.cc (class equiv_allocator): Delete.
28158 (range_query::get_value_range): Delete.
28159 (range_query::range_query): Remove allocator access.
28160 (range_query::~range_query): Same.
28161 * value-query.h (get_value_range): Delete.
28163 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
28164 call to get_value_range.
28165 (check_for_binary_op_overflow): Same.
28166 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
28167 (simplify_using_ranges::simplify_abs_using_ranges): Same.
28168 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
28169 (simplify_using_ranges::simplify_casted_cond): Same.
28170 (simplify_using_ranges::simplify_switch_using_ranges): Same.
28171 (simplify_using_ranges::two_valued_val_range_p): Same.
28173 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28176 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
28178 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
28179 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
28180 (simplify_using_ranges::legacy_fold_cond): ...this.
28181 (simplify_using_ranges::fold_cond): Rename
28182 vrp_evaluate_conditional_warnv_with_ops to
28183 legacy_fold_cond_overflow.
28184 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
28185 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
28186 legacy_fold_cond_overflow respectively.
28188 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
28190 * vr-values.cc (get_vr_for_comparison): Remove.
28191 (compare_name_with_value): Same.
28192 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
28193 compare_name_with_value.
28194 * vr-values.h: Remove compare_name_with_value.
28195 Remove get_vr_for_comparison.
28197 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
28199 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
28200 (bswapsi2): New define_insn.
28201 (swaphi): New define_insn to exchange two registers (swpw).
28202 (define_peephole2): Recognize exchange of registers as swaphi.
28204 2023-04-26 Richard Biener <rguenther@suse.de>
28206 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
28208 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
28209 * predict.cc (apply_return_prediction): Likewise.
28210 * sese.cc (set_ifsese_condition): Likewise. Simplify.
28211 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
28212 (make_edges_bb): Likewise.
28213 (make_cond_expr_edges): Likewise.
28214 (end_recording_case_labels): Likewise.
28215 (make_gimple_asm_edges): Likewise.
28216 (cleanup_dead_labels): Likewise.
28217 (group_case_labels): Likewise.
28218 (gimple_can_merge_blocks_p): Likewise.
28219 (gimple_merge_blocks): Likewise.
28220 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
28221 (gimple_duplicate_sese_tail): Avoid last_stmt.
28222 (find_loop_dist_alias): Likewise.
28223 (gimple_block_ends_with_condjump_p): Likewise.
28224 (gimple_purge_dead_eh_edges): Likewise.
28225 (gimple_purge_dead_abnormal_call_edges): Likewise.
28226 (pass_warn_function_return::execute): Likewise.
28227 (execute_fixup_cfg): Likewise.
28228 * tree-eh.cc (redirect_eh_edge_1): Likewise.
28229 (pass_lower_resx::execute): Likewise.
28230 (pass_lower_eh_dispatch::execute): Likewise.
28231 (cleanup_empty_eh): Likewise.
28232 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
28233 (predicate_bbs): Likewise.
28234 (ifcvt_split_critical_edges): Likewise.
28235 * tree-loop-distribution.cc (create_edge_for_control_dependence):
28237 (loop_distribution::transform_reduction_loop): Likewise.
28238 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
28239 (try_transform_to_exit_first_loop_alt): Likewise.
28240 (transform_to_exit_first_loop): Likewise.
28241 (create_parallel_loop): Likewise.
28242 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
28243 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
28244 (eliminate_unnecessary_stmts): Likewise.
28246 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
28248 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
28249 (pass_tree_ifcombine::execute): Likewise.
28250 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
28251 (should_duplicate_loop_header_p): Likewise.
28252 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
28253 (tree_estimate_loop_size): Likewise.
28254 (try_unroll_loop_completely): Likewise.
28255 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
28256 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
28257 (canonicalize_loop_ivs): Likewise.
28258 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
28259 (bound_difference): Likewise.
28260 (number_of_iterations_popcount): Likewise.
28261 (number_of_iterations_cltz): Likewise.
28262 (number_of_iterations_cltz_complement): Likewise.
28263 (simplify_using_initial_conditions): Likewise.
28264 (number_of_iterations_exit_assumptions): Likewise.
28265 (loop_niter_by_eval): Likewise.
28266 (estimate_numbers_of_iterations): Likewise.
28268 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28270 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
28272 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
28275 * config/rs6000/rs6000-builtins.def
28276 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
28277 __builtin_vsx_scalar_cmp_exp_qp_lt,
28278 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
28281 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
28284 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
28285 easy_vector_constant with const_vector_each_byte_same, add
28286 handlings in preparation for !easy_vector_constant, and update
28287 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
28288 * config/rs6000/predicates.md (const_vector_each_byte_same): New
28291 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28293 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
28294 (*pred_ltge<mode>_merge_tie_mask): Ditto.
28295 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
28296 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
28297 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
28298 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
28299 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
28301 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28303 * config/riscv/vector.md: Fix redundant vmv1r.v.
28305 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28307 * config/riscv/vector.md: Fix RA constraint.
28309 2023-04-26 Pan Li <pan2.li@intel.com>
28312 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
28313 check for vn_reference equal.
28315 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28317 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
28318 auto-vectorization preference.
28319 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
28320 auto-vectorization.
28321 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
28323 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
28325 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
28326 and bclridisi_nottwobits patterns.
28327 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
28328 predicate to avoid splitting arith constants.
28329 (const_nottwobits_not_arith_operand): New predicate.
28331 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
28333 * recog.cc (peep2_attempt, peep2_update_life): Correct
28334 head-comment description of parameter match_len.
28336 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
28338 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
28339 riscv_split_symbol() drop in_splitter arg.
28340 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
28341 riscv_split_symbol() drop in_splitter arg.
28342 riscv_force_temporary() drop in_splitter arg.
28343 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
28344 riscv_split_symbol() drop in_splitter arg.
28346 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
28348 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
28349 superfluous debug temporaries for single GIMPLE assignments.
28351 2023-04-25 Richard Biener <rguenther@suse.de>
28353 PR tree-optimization/109609
28354 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
28356 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
28357 the size given by arg_max_access_size_given_by_arg_p as
28358 maximum, not exact, size.
28360 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28363 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
28364 (orn<mode>3<vczle><vczbe>): ... This.
28365 (bic<mode>3): Rename to...
28366 (bic<mode>3<vczle><vczbe>): ... This.
28367 (<su><maxmin><mode>3): Rename to...
28368 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
28370 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28372 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
28373 * config/aarch64/iterators.md (VQDIV): New mode iterator.
28374 (vnx2di): New mode attribute.
28376 2023-04-25 Richard Biener <rguenther@suse.de>
28378 PR rtl-optimization/109585
28379 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
28381 2023-04-25 Jakub Jelinek <jakub@redhat.com>
28384 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
28385 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
28386 is larger than signed int maximum.
28388 2023-04-25 Martin Liska <mliska@suse.cz>
28390 * doc/gcov.texi: Document the new "calls" field and document
28391 the API bump. Mention also "block_ids" for lines.
28392 * gcov.cc (output_intermediate_json_line): Output info about
28393 calls and extend branches as well.
28394 (generate_results): Bump version to 2.
28395 (output_line_details): Use block ID instead of a non-sensual
28398 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
28400 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
28401 length attribute for the first (memory operand) alternative.
28403 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
28405 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
28406 * config/aarch64/constraints.md: Make "Umn" relaxed memory
28408 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
28410 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
28412 * value-range.cc (frange::set): Adjust constructor.
28413 * value-range.h (nan_state::nan_state): Replace default
28414 constructor with one taking an argument.
28416 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
28418 * ipa-cp.cc (ipa_range_contains_p): New.
28419 (decide_whether_version_node): Use it.
28421 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
28423 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
28424 simplify two successive VEC_PERM_EXPRs with same VLA mask,
28425 where mask chooses elements in reverse order.
28427 2023-04-24 Andrew Pinski <apinski@marvell.com>
28429 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
28430 and support diamond shaped basic block form.
28431 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
28433 2023-04-24 Andrew Pinski <apinski@marvell.com>
28435 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
28436 Instead of calling last_and_only_stmt, look for the last statement
28439 2023-04-24 Andrew Pinski <apinski@marvell.com>
28441 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
28443 (match_simplify_replacement): Call
28444 empty_bb_or_one_feeding_into_p instead of doing it inline.
28446 2023-04-24 Andrew Pinski <apinski@marvell.com>
28448 PR tree-optimization/68894
28449 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
28450 continue for the do_hoist_loads diamond case.
28452 2023-04-24 Andrew Pinski <apinski@marvell.com>
28454 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
28455 code for better code readability.
28457 2023-04-24 Andrew Pinski <apinski@marvell.com>
28459 PR tree-optimization/109604
28460 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
28461 diamond form check from ...
28462 (minmax_replacement): Here.
28464 2023-04-24 Patrick Palka <ppalka@redhat.com>
28466 * tree.cc (strip_array_types): Don't define here.
28467 (is_typedef_decl): Don't define here.
28468 (typedef_variant_p): Don't define here.
28469 * tree.h (strip_array_types): Define here.
28470 (is_typedef_decl): Define here.
28471 (typedef_variant_p): Define here.
28473 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
28475 * doc/generic.texi (OpenMP): Add != to allowed
28476 conditions and state that vars can be unsigned.
28477 * tree.def (OMP_FOR): Likewise.
28479 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28481 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
28483 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
28485 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
28486 Remove explicit Solaris 11 references.
28488 (Options specification, --with-gnu-as): as and gas always differ
28490 Remove /usr/ccs/bin reference.
28491 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
28492 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
28493 (*-*-solaris2*): ... here.
28494 Update bundled GCC versions.
28495 Don't refer to pre-built binaries.
28496 Remove /bin/sh warning.
28497 Update assembler, linker recommendations.
28498 Document GNAT bootstrap compiler.
28499 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
28500 (sparc64-*-solaris2*): Move content...
28501 (sparcv9-*-solaris2*): ...here.
28502 Add GDC for 64-bit bootstrap compilers.
28504 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28507 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
28509 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
28512 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28514 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
28515 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
28516 (aarch64_<su>abal2<mode>): New define_expand.
28517 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
28518 (aarch64_rtx_costs): Handle ABD rtxes.
28519 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
28520 * config/aarch64/iterators.md (ABAL2): Delete.
28521 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
28523 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28525 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
28526 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
28527 (<sur>sadv16qi): Rename to...
28528 (<su>sadv16qi): ... This. Adjust for the above.
28529 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
28530 (<su>sad<vsi2qi>): ... This. Adjust for the above.
28531 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
28532 * config/aarch64/iterators.md (ABAL): Delete.
28533 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
28535 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28537 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
28538 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
28539 (aarch64_<su>abdl2<mode>): New define_expand.
28540 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
28541 * config/aarch64/iterators.md (ABDL2): Delete.
28542 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
28544 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28546 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
28547 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
28549 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
28550 * config/aarch64/iterators.md (ABDL): Delete.
28551 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
28553 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28555 * config/aarch64/aarch64-simd.md
28556 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
28558 2023-04-24 Richard Biener <rguenther@suse.de>
28560 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
28562 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
28564 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
28565 (set_switch_stmt_execution_predicate): Likewise.
28566 (phi_result_unknown_predicate): Likewise.
28567 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
28568 (ipa_analyze_indirect_call_uses): Likewise.
28569 * predict.cc (predict_iv_comparison): Likewise.
28570 (predict_extra_loop_exits): Likewise.
28571 (predict_loops): Likewise.
28572 (tree_predict_by_opcode): Likewise.
28573 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
28575 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
28576 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
28577 (replace_phi_edge_with_variable): Likewise.
28578 (two_value_replacement): Likewise.
28579 (value_replacement): Likewise.
28580 (minmax_replacement): Likewise.
28581 (spaceship_replacement): Likewise.
28582 (cond_removal_in_builtin_zero_pattern): Likewise.
28583 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
28584 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
28585 (vn_phi_lookup): Likewise.
28586 (vn_phi_insert): Likewise.
28587 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
28588 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
28590 (back_threader_profitability::possibly_profitable_path_p):
28592 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
28594 * tree-switch-conversion.cc (pass_convert_switch::execute):
28596 (pass_lower_switch<O0>::execute): Likewise.
28597 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
28598 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
28599 * tree-vect-slp.cc (vect_slp_function): Likewise.
28600 * tree-vect-stmts.cc (cfun_returns): Likewise.
28601 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
28602 (vect_loop_dist_alias_call): Likewise.
28604 2023-04-24 Richard Biener <rguenther@suse.de>
28606 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
28608 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28610 * config/riscv/riscv-vsetvl.cc
28611 (vector_infos_manager::all_avail_in_compatible_p): New function.
28612 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
28613 * config/riscv/riscv-vsetvl.h: New function.
28615 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28617 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
28618 comment for cleanup_insns.
28620 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28622 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
28623 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
28624 with the fault first load property.
28626 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28628 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
28629 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
28631 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28634 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
28635 (aarch64_addp<mode><vczle><vczbe>): ... This.
28637 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
28639 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
28640 provide reasonable values for common arithmetic operations and
28641 immediate operands (in several machine modes).
28643 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
28645 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
28646 format specifier to output high_part register name of SImode reg.
28647 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
28648 (zero_extendqihi2): Fix lengths, consistent formatting and add
28649 "and Rx,#255" alternative, for documentation purposes.
28650 (zero_extendhisi2): New define_insn.
28652 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
28654 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
28655 SImode shifts by two by performing a single bit SImode shift twice.
28657 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
28659 PR tree-optimization/109593
28660 * value-range.cc (frange::operator==): Handle NANs.
28662 2023-04-23 liuhongt <hongtao.liu@intel.com>
28664 PR rtl-optimization/108707
28665 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
28666 GENERAL_REGS when preferred reg_class is not known.
28668 2023-04-22 Andrew Pinski <apinski@marvell.com>
28670 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
28671 Change the code around slightly to move diamond
28672 handling for do_store_elim/do_hoist_loads out of
28675 2023-04-22 Andrew Pinski <apinski@marvell.com>
28677 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
28678 Remove check on empty_block_p.
28680 2023-04-22 Jakub Jelinek <jakub@redhat.com>
28682 PR bootstrap/109589
28683 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
28684 * realmpfr.h (class auto_mpfr): Likewise.
28686 2023-04-22 Jakub Jelinek <jakub@redhat.com>
28688 PR tree-optimization/109583
28689 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
28690 if vec_mode is not VECTOR_MODE_P.
28692 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
28693 Ondrej Kubanek <kubanek0ondrej@gmail.com>
28695 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
28696 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
28697 loop profile and bounds after header duplication.
28698 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
28699 Break out from try_peel_loop; fix handling of 0 iterations.
28700 (try_peel_loop): Use adjust_loop_info_after_peeling.
28702 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
28704 PR tree-optimization/109546
28705 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
28706 not fold conditions with ADDR_EXPR early.
28708 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28710 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
28711 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
28713 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
28714 (*aarch64_<optab><mode>3_zero): Define.
28715 (*aarch64_<optab><mode>3_cssc): Likewise.
28716 * config/aarch64/iterators.md (maxminand): New code attribute.
28718 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28721 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
28722 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
28724 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
28725 (aarch64_override_options_internal): Handle the above.
28726 (aarch64_output_load_tp): New function.
28727 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
28728 aarch64_output_load_tp.
28729 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
28730 (mtp=): New option.
28731 * doc/invoke.texi (AArch64 Options): Document -mtp=.
28733 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
28736 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
28737 (add_vec_concat_subst_be): Likewise.
28740 (add<mode>3): Rename to...
28741 (add<mode>3<vczle><vczbe>): ... This.
28742 (sub<mode>3): Rename to...
28743 (sub<mode>3<vczle><vczbe>): ... This.
28744 (mul<mode>3): Rename to...
28745 (mul<mode>3<vczle><vczbe>): ... This.
28746 (and<mode>3): Rename to...
28747 (and<mode>3<vczle><vczbe>): ... This.
28748 (ior<mode>3): Rename to...
28749 (ior<mode>3<vczle><vczbe>): ... This.
28750 (xor<mode>3): Rename to...
28751 (xor<mode>3<vczle><vczbe>): ... This.
28752 * config/aarch64/iterators.md (VDZ): Define.
28754 2023-04-21 Patrick Palka <ppalka@redhat.com>
28756 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
28759 2023-04-21 Jan Hubicka <jh@suse.cz>
28761 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
28764 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
28766 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
28767 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
28769 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
28771 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
28772 force_reg instead of copy_to_mode_reg.
28773 (aarch64_expand_vector_init): Likewise.
28775 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
28777 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
28778 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
28779 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
28780 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
28781 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
28782 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
28783 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
28784 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
28785 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
28786 * config/i386/predicates.md (index_register_operand):
28787 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
28788 * config/i386/i386.cc (ix86_legitimate_address_p): Use
28789 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
28790 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
28792 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
28793 Ondrej Kubanek <kubanek0ondrej@gmail.com>
28795 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
28798 2023-04-21 Richard Biener <rguenther@suse.de>
28800 * is-a.h (safe_is_a): New.
28802 2023-04-21 Richard Biener <rguenther@suse.de>
28804 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
28805 (gphi_iterator::operator*): Likewise.
28807 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
28808 Michal Jires <michal@jires.eu>
28810 * ipa-inline.cc (class inline_badness): New class.
28811 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
28813 (update_edge_key): Update.
28814 (lookup_recursive_calls): Likewise.
28815 (recursive_inlining): Likewise.
28816 (add_new_edges_to_heap): Likewise.
28817 (inline_small_functions): Likewise.
28819 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
28821 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
28823 2023-04-21 Richard Biener <rguenther@suse.de>
28825 PR tree-optimization/109573
28826 * tree-vect-loop.cc (vectorizable_live_operation): Allow
28827 unhandled SSA copy as well. Demote assert to checking only.
28829 2023-04-21 Richard Biener <rguenther@suse.de>
28831 * df-core.cc (df_analyze): Compute RPO on the reverse graph
28832 for DF_BACKWARD problems.
28833 (loop_post_order_compute): Rename to ...
28834 (loop_rev_post_order_compute): ... this, compute a RPO.
28835 (loop_inverted_post_order_compute): Rename to ...
28836 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
28837 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
28838 problems, RPO on the inverted graph for DF_BACKWARD.
28840 2023-04-21 Richard Biener <rguenther@suse.de>
28842 * cfganal.h (inverted_rev_post_order_compute): Rename
28844 (inverted_post_order_compute): ... this. Add struct function
28845 argument, change allocation to a C array.
28846 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
28847 * lcm.cc (compute_antinout_edge): Adjust.
28848 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
28849 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
28850 * tree-ssa-pre.cc (compute_antic): Likewise.
28852 2023-04-21 Richard Biener <rguenther@suse.de>
28854 * df.h (df_d::postorder_inverted): Change back to int *,
28856 * df-core.cc (rest_of_handle_df_finish): Adjust.
28857 (df_analyze_1): Likewise.
28858 (df_analyze): For DF_FORWARD problems use RPO on the forward
28860 (loop_inverted_post_order_compute): Adjust API.
28861 (df_analyze_loop): Adjust.
28862 (df_get_n_blocks): Likewise.
28863 (df_get_postorder): Likewise.
28865 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28868 * config/riscv/riscv-vsetvl.cc
28869 (vector_infos_manager::all_empty_predecessor_p): New function.
28870 (pass_vsetvl::backward_demand_fusion): Ditto.
28871 * config/riscv/riscv-vsetvl.h: Ditto.
28873 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
28876 * config/riscv/generic.md: Change standard names to insn names.
28878 2023-04-21 Richard Biener <rguenther@suse.de>
28880 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
28881 (compute_laterin): Use RPO.
28882 (compute_available): Likewise.
28884 2023-04-21 Peng Fan <fanpeng@loongson.cn>
28886 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
28888 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28891 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
28892 (vector_insn_info::skip_avl_compatible_p): Ditto.
28893 (vector_insn_info::merge): Remove default value.
28894 (pass_vsetvl::compute_local_backward_infos): Ditto.
28895 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
28896 * config/riscv/riscv-vsetvl.h: Ditto.
28898 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
28900 * doc/extend.texi (Common Function Attributes): Remove duplicate
28903 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
28905 PR tree-optimization/109564
28906 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
28907 UNDEFINED range names when deciding if all PHI arguments are the same,
28909 2023-04-20 Jakub Jelinek <jakub@redhat.com>
28911 PR tree-optimization/109011
28912 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
28913 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
28914 .CTZ (X) = PREC - .POPCOUNT (X | -X).
28916 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
28918 * lra-constraints.cc (match_reload): Exclude some hard regs for
28919 multi-reg inout reload pseudos used in asm in different mode.
28921 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
28923 * config/arm/arm.cc (thumb1_legitimate_address_p):
28924 Use VIRTUAL_REGISTER_P predicate.
28925 (arm_eliminable_register): Ditto.
28926 * config/avr/avr.md (push<mode>_1): Ditto.
28927 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
28928 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
28929 * config/i386/predicates.md (register_no_elim_operand): Ditto.
28930 * config/iq2000/predicates.md (call_insn_operand): Ditto.
28931 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
28933 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
28936 * config/i386/predicates.md (extract_operator): New predicate.
28937 * config/i386/i386.md (any_extract): Remove code iterator.
28938 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
28939 (*cmpqi_ext<mode>_1): Ditto.
28940 (*cmpqi_ext<mode>_2): Ditto.
28941 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
28942 (*cmpqi_ext<mode>_3): Ditto.
28943 (*cmpqi_ext<mode>_4): Ditto.
28944 (*extzvqi_mem_rex64): Ditto.
28946 (*insvqi_2): Ditto.
28947 (*extendqi<SWI24:mode>_ext_1): Ditto.
28948 (*addqi_ext<mode>_0): Ditto.
28949 (*addqi_ext<mode>_1): Ditto.
28950 (*addqi_ext<mode>_2): Ditto.
28951 (*subqi_ext<mode>_0): Ditto.
28952 (*subqi_ext<mode>_2): Ditto.
28953 (*testqi_ext<mode>_1): Ditto.
28954 (*testqi_ext<mode>_2): Ditto.
28955 (*andqi_ext<mode>_0): Ditto.
28956 (*andqi_ext<mode>_1): Ditto.
28957 (*andqi_ext<mode>_1_cc): Ditto.
28958 (*andqi_ext<mode>_2): Ditto.
28959 (*<any_or:code>qi_ext<mode>_0): Ditto.
28960 (*<any_or:code>qi_ext<mode>_1): Ditto.
28961 (*<any_or:code>qi_ext<mode>_2): Ditto.
28962 (*xorqi_ext<mode>_1_cc): Ditto.
28963 (*negqi_ext<mode>_2): Ditto.
28964 (*ashlqi_ext<mode>_2): Ditto.
28965 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
28967 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
28970 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
28971 <bitmanip_insn> as the type to allow for fine grained control of
28972 scheduling these insns.
28973 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
28975 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
28976 pcnt, signed and unsigned min/max.
28978 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
28979 kito-cheng <kito.cheng@sifive.com>
28981 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
28983 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
28984 kito-cheng <kito.cheng@sifive.com>
28987 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
28988 (pass_vsetvl::cleanup_insns): Fix bug.
28990 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
28992 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
28993 (ldexp<mode>3): Delete.
28994 (ldexp<mode>3<exec>): Change "B" to "A".
28996 2023-04-20 Jakub Jelinek <jakub@redhat.com>
28997 Jonathan Wakely <jwakely@redhat.com>
28999 * tree.h (built_in_function_equal_p): New helper function.
29000 (fndecl_built_in_p): Turn into variadic template to support
29001 1 or more built_in_function arguments.
29002 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
29003 * gimplify.cc (goa_stabilize_expr): Likewise.
29004 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
29005 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
29006 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
29007 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
29008 cgraph_update_edges_for_call_stmt_node,
29009 cgraph_edge::verify_corresponds_to_fndecl,
29010 cgraph_node::verify_node): Likewise.
29011 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
29012 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
29013 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
29015 2023-04-20 Jakub Jelinek <jakub@redhat.com>
29017 PR tree-optimization/109011
29018 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
29019 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
29020 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
29021 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
29022 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
29024 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
29026 2023-04-20 Richard Biener <rguenther@suse.de>
29028 * df-core.cc (rest_of_handle_df_initialize): Remove
29029 computation of df->postorder, df->postorder_inverted and
29032 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29034 * common/config/i386/i386-common.cc
29035 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
29036 (ix86_handle_option): Set AVX flag for VAES.
29037 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
29038 Add OPTION_MASK_ISA2_VAES_UNSET.
29039 (def_builtin): Share builtin between AES and VAES.
29040 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
29042 * config/i386/i386.md (aes): New isa attribute.
29043 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
29044 (aesenclast): Ditto.
29046 (aesdeclast): Ditto.
29047 * config/i386/vaesintrin.h: Remove redundant avx target push.
29048 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
29049 (_mm_aesdeclast_si128): Ditto.
29050 (_mm_aesenc_si128): Ditto.
29051 (_mm_aesenclast_si128): Ditto.
29053 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
29055 * config/i386/avx2intrin.h
29056 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
29057 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
29058 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
29059 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
29060 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
29061 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
29062 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
29063 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
29064 (_mm_reduce_add_epi16): New instrinsics.
29065 (_mm_reduce_mul_epi16): Ditto.
29066 (_mm_reduce_and_epi16): Ditto.
29067 (_mm_reduce_or_epi16): Ditto.
29068 (_mm_reduce_max_epi16): Ditto.
29069 (_mm_reduce_max_epu16): Ditto.
29070 (_mm_reduce_min_epi16): Ditto.
29071 (_mm_reduce_min_epu16): Ditto.
29072 (_mm256_reduce_add_epi16): Ditto.
29073 (_mm256_reduce_mul_epi16): Ditto.
29074 (_mm256_reduce_and_epi16): Ditto.
29075 (_mm256_reduce_or_epi16): Ditto.
29076 (_mm256_reduce_max_epi16): Ditto.
29077 (_mm256_reduce_max_epu16): Ditto.
29078 (_mm256_reduce_min_epi16): Ditto.
29079 (_mm256_reduce_min_epu16): Ditto.
29080 (_mm_reduce_add_epi8): Ditto.
29081 (_mm_reduce_mul_epi8): Ditto.
29082 (_mm_reduce_and_epi8): Ditto.
29083 (_mm_reduce_or_epi8): Ditto.
29084 (_mm_reduce_max_epi8): Ditto.
29085 (_mm_reduce_max_epu8): Ditto.
29086 (_mm_reduce_min_epi8): Ditto.
29087 (_mm_reduce_min_epu8): Ditto.
29088 (_mm256_reduce_add_epi8): Ditto.
29089 (_mm256_reduce_mul_epi8): Ditto.
29090 (_mm256_reduce_and_epi8): Ditto.
29091 (_mm256_reduce_or_epi8): Ditto.
29092 (_mm256_reduce_max_epi8): Ditto.
29093 (_mm256_reduce_max_epu8): Ditto.
29094 (_mm256_reduce_min_epi8): Ditto.
29095 (_mm256_reduce_min_epu8): Ditto.
29096 * config/i386/avx512vlbwintrin.h:
29097 (_mm_mask_reduce_add_epi16): Ditto.
29098 (_mm_mask_reduce_mul_epi16): Ditto.
29099 (_mm_mask_reduce_and_epi16): Ditto.
29100 (_mm_mask_reduce_or_epi16): Ditto.
29101 (_mm_mask_reduce_max_epi16): Ditto.
29102 (_mm_mask_reduce_max_epu16): Ditto.
29103 (_mm_mask_reduce_min_epi16): Ditto.
29104 (_mm_mask_reduce_min_epu16): Ditto.
29105 (_mm256_mask_reduce_add_epi16): Ditto.
29106 (_mm256_mask_reduce_mul_epi16): Ditto.
29107 (_mm256_mask_reduce_and_epi16): Ditto.
29108 (_mm256_mask_reduce_or_epi16): Ditto.
29109 (_mm256_mask_reduce_max_epi16): Ditto.
29110 (_mm256_mask_reduce_max_epu16): Ditto.
29111 (_mm256_mask_reduce_min_epi16): Ditto.
29112 (_mm256_mask_reduce_min_epu16): Ditto.
29113 (_mm_mask_reduce_add_epi8): Ditto.
29114 (_mm_mask_reduce_mul_epi8): Ditto.
29115 (_mm_mask_reduce_and_epi8): Ditto.
29116 (_mm_mask_reduce_or_epi8): Ditto.
29117 (_mm_mask_reduce_max_epi8): Ditto.
29118 (_mm_mask_reduce_max_epu8): Ditto.
29119 (_mm_mask_reduce_min_epi8): Ditto.
29120 (_mm_mask_reduce_min_epu8): Ditto.
29121 (_mm256_mask_reduce_add_epi8): Ditto.
29122 (_mm256_mask_reduce_mul_epi8): Ditto.
29123 (_mm256_mask_reduce_and_epi8): Ditto.
29124 (_mm256_mask_reduce_or_epi8): Ditto.
29125 (_mm256_mask_reduce_max_epi8): Ditto.
29126 (_mm256_mask_reduce_max_epu8): Ditto.
29127 (_mm256_mask_reduce_min_epi8): Ditto.
29128 (_mm256_mask_reduce_min_epu8): Ditto.
29130 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29132 * common/config/i386/i386-common.cc
29133 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
29134 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
29135 (OPTION_MASK_ISA_AVX_UNSET):
29136 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
29137 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
29138 * config/i386/i386.md (vpclmulqdqvl): New.
29139 * config/i386/sse.md (pclmulqdq): Add evex encoding.
29140 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
29143 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29145 * config/i386/avx512vlbwintrin.h
29146 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
29147 (_mm_mask_blend_epi8): Ditto.
29148 (_mm256_mask_blend_epi16): Ditto.
29149 (_mm256_mask_blend_epi8): Ditto.
29150 * config/i386/avx512vlintrin.h
29151 (_mm256_mask_blend_pd): Ditto.
29152 (_mm256_mask_blend_ps): Ditto.
29153 (_mm256_mask_blend_epi64): Ditto.
29154 (_mm256_mask_blend_epi32): Ditto.
29155 (_mm_mask_blend_pd): Ditto.
29156 (_mm_mask_blend_ps): Ditto.
29157 (_mm_mask_blend_epi64): Ditto.
29158 (_mm_mask_blend_epi32): Ditto.
29159 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
29160 (VF_AVX512HFBFVL): Move it before the first usage.
29161 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
29162 to VF_AVX512HFBFVL.
29164 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29166 * common/config/i386/i386-common.cc
29167 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
29168 to OPTION_MASK_ISA_AVX512BW_SET.
29169 (OPTION_MASK_ISA_AVX512F_UNSET):
29170 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
29171 (OPTION_MASK_ISA_AVX512BW_UNSET):
29172 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
29173 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
29174 * config/i386/avx512vbmi2vlintrin.h: Ditto.
29175 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
29176 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
29177 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
29178 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
29180 (compressstore<mode>_mask): Ditto.
29181 (expand<mode>_mask): Ditto.
29182 (expand<mode>_maskz): Ditto.
29183 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
29184 VI12_VI48F_AVX512VL.
29186 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29188 * common/config/i386/i386-common.cc
29189 (OPTION_MASK_ISA_AVX512BITALG_SET):
29190 Change OPTION_MASK_ISA_AVX512F_SET
29191 to OPTION_MASK_ISA_AVX512BW_SET.
29192 (OPTION_MASK_ISA_AVX512F_UNSET):
29193 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
29194 (OPTION_MASK_ISA_AVX512BW_UNSET):
29195 Add OPTION_MASK_ISA_AVX512BITALG_SET.
29196 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
29197 * config/i386/i386-builtin.def:
29198 Remove redundant OPTION_MASK_ISA_AVX512BW.
29199 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
29200 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
29201 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
29203 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
29205 * config/i386/i386-expand.cc
29206 (ix86_check_builtin_isa_match): Correct wrong comments.
29207 Add a new macro SHARE_BUILTIN and refactor the current if
29210 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
29212 * config/i386/cpuid.h: Open a new section for Extended Features
29213 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
29216 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
29218 * config/i386/sse.md: Modify insn vperm{i,f}
29221 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
29223 * config/xtensa/xtensa-opts.h: New header.
29224 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
29225 xtensa_strict_align.
29226 * config/xtensa/xtensa.cc (xtensa_option_override): When
29227 -m[no-]strict-align is not specified in the command line set
29228 xtensa_strict_align to 0 if the hardware supports both unaligned
29229 loads and stores or to 1 otherwise.
29230 * config/xtensa/xtensa.opt (mstrict-align): New option.
29231 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
29233 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
29235 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
29238 2023-04-19 Andrew Pinski <apinski@marvell.com>
29240 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
29242 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
29244 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
29245 (VECTOR_BOOL_MODE): Ditto.
29246 (ADJUST_NUNITS): Ditto.
29247 (ADJUST_ALIGNMENT): Ditto.
29248 (ADJUST_BYTESIZE): Ditto.
29249 (ADJUST_PRECISION): Ditto.
29250 (RVV_MODES): Ditto.
29251 (VECTOR_MODE_WITH_PREFIX): Ditto.
29252 * config/riscv/riscv-v.cc (ENTRY): Ditto.
29253 (get_vlmul): Ditto.
29254 (get_ratio): Ditto.
29255 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
29256 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
29257 (vbool64_t): Ditto.
29258 (vbool32_t): Ditto.
29259 (vbool16_t): Ditto.
29264 (vint8mf8_t): Ditto.
29265 (vuint8mf8_t): Ditto.
29266 (vint8mf4_t): Ditto.
29267 (vuint8mf4_t): Ditto.
29268 (vint8mf2_t): Ditto.
29269 (vuint8mf2_t): Ditto.
29270 (vint8m1_t): Ditto.
29271 (vuint8m1_t): Ditto.
29272 (vint8m2_t): Ditto.
29273 (vuint8m2_t): Ditto.
29274 (vint8m4_t): Ditto.
29275 (vuint8m4_t): Ditto.
29276 (vint8m8_t): Ditto.
29277 (vuint8m8_t): Ditto.
29278 (vint16mf4_t): Ditto.
29279 (vuint16mf4_t): Ditto.
29280 (vint16mf2_t): Ditto.
29281 (vuint16mf2_t): Ditto.
29282 (vint16m1_t): Ditto.
29283 (vuint16m1_t): Ditto.
29284 (vint16m2_t): Ditto.
29285 (vuint16m2_t): Ditto.
29286 (vint16m4_t): Ditto.
29287 (vuint16m4_t): Ditto.
29288 (vint16m8_t): Ditto.
29289 (vuint16m8_t): Ditto.
29290 (vint32mf2_t): Ditto.
29291 (vuint32mf2_t): Ditto.
29292 (vint32m1_t): Ditto.
29293 (vuint32m1_t): Ditto.
29294 (vint32m2_t): Ditto.
29295 (vuint32m2_t): Ditto.
29296 (vint32m4_t): Ditto.
29297 (vuint32m4_t): Ditto.
29298 (vint32m8_t): Ditto.
29299 (vuint32m8_t): Ditto.
29300 (vint64m1_t): Ditto.
29301 (vuint64m1_t): Ditto.
29302 (vint64m2_t): Ditto.
29303 (vuint64m2_t): Ditto.
29304 (vint64m4_t): Ditto.
29305 (vuint64m4_t): Ditto.
29306 (vint64m8_t): Ditto.
29307 (vuint64m8_t): Ditto.
29308 (vfloat32mf2_t): Ditto.
29309 (vfloat32m1_t): Ditto.
29310 (vfloat32m2_t): Ditto.
29311 (vfloat32m4_t): Ditto.
29312 (vfloat32m8_t): Ditto.
29313 (vfloat64m1_t): Ditto.
29314 (vfloat64m2_t): Ditto.
29315 (vfloat64m4_t): Ditto.
29316 (vfloat64m8_t): Ditto.
29317 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
29318 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
29319 (riscv_convert_vector_bits): Ditto.
29320 * config/riscv/riscv.md:
29321 * config/riscv/vector-iterators.md:
29322 * config/riscv/vector.md
29323 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
29324 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
29325 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
29326 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
29327 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
29328 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
29329 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
29330 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
29331 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
29333 2023-04-19 Pan Li <pan2.li@intel.com>
29335 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
29336 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
29338 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
29342 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
29343 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
29344 for operand 0. Use any_extract code iterator.
29345 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
29346 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
29347 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
29348 (*cmpqi_ext<mode>_1): Use general_operand predicate
29349 for operand 1. Use any_extract code iterator.
29350 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
29351 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
29353 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29355 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
29356 (aarch64_uaddw2<mode>): Delete.
29357 (aarch64_ssubw2<mode>): Delete.
29358 (aarch64_usubw2<mode>): Delete.
29359 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
29361 2023-04-19 Richard Biener <rguenther@suse.de>
29363 * tree-ssa-structalias.cc (do_ds_constraint): Use
29364 solve_add_graph_edge.
29366 2023-04-19 Richard Biener <rguenther@suse.de>
29368 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
29370 (do_sd_constraint): ... here.
29372 2023-04-19 Richard Biener <rguenther@suse.de>
29374 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
29375 rejecting the merge when A contains only a non-local label.
29377 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
29379 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
29380 (VIRTUAL_REGISTER_NUM_P): Ditto.
29381 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
29382 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
29383 * function.cc (instantiate_decl_rtl): Ditto.
29384 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
29385 (nonzero_address_p): Ditto.
29386 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
29388 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
29390 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
29392 2023-04-19 Richard Biener <rguenther@suse.de>
29394 * system.h (auto_mpz::operator->()): New.
29395 * realmpfr.h (auto_mpfr::operator->()): New.
29396 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
29397 * real.cc (real_from_string): Likewise.
29398 (dconst_e_ptr): Likewise.
29399 (dconst_sqrt2_ptr): Likewise.
29400 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
29402 (bound_difference_of_offsetted_base): Likewise.
29403 (number_of_iterations_ne): Likewise.
29404 (number_of_iterations_lt_to_ne): Likewise.
29405 * ubsan.cc: Include realmpfr.h.
29406 (ubsan_instrument_float_cast): Use auto_mpfr.
29408 2023-04-19 Richard Biener <rguenther@suse.de>
29410 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
29411 edges, remove edges from escaped after special-casing them.
29413 2023-04-19 Richard Biener <rguenther@suse.de>
29415 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
29418 2023-04-19 Richard Biener <rguenther@suse.de>
29420 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
29421 to the LHS varinfo solution member.
29423 2023-04-19 Richard Biener <rguenther@suse.de>
29425 * tree-ssa-structalias.cc (topo_visit): Look at the real
29426 destination of edges.
29428 2023-04-19 Richard Biener <rguenther@suse.de>
29430 PR tree-optimization/44794
29431 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
29432 If an epilogue loop is required set its iteration upper bound.
29434 2023-04-19 Xi Ruoyao <xry111@xry111.site>
29437 * config/loongarch/loongarch-protos.h
29438 (loongarch_expand_block_move): Add a parameter as alignment RTX.
29439 * config/loongarch/loongarch.h:
29440 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
29441 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
29442 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
29443 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
29444 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
29445 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
29446 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
29447 Take the alignment from the parameter, but set it to
29448 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
29449 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
29450 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
29451 (loongarch_block_move_straight): When there are left-over bytes,
29452 half the mode size instead of falling back to byte mode at once.
29453 (loongarch_block_move_loop): Limit the length of loop body with
29454 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
29455 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
29456 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
29457 to loongarch_expand_block_move.
29459 2023-04-19 Xi Ruoyao <xry111@xry111.site>
29461 * config/loongarch/loongarch.cc
29462 (loongarch_setup_incoming_varargs): Don't save more GARs than
29463 cfun->va_list_gpr_size / UNITS_PER_WORD.
29465 2023-04-19 Richard Biener <rguenther@suse.de>
29467 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
29468 no epilogue condition.
29470 2023-04-19 Richard Biener <rguenther@suse.de>
29472 * gimple.h (gimple_assign_load): Outline...
29473 * gimple.cc (gimple_assign_load): ... here. Avoid
29474 get_base_address and instead just strip the outermost
29475 handled component, treating a remaining handled component
29478 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29480 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
29482 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
29484 2023-04-19 Jakub Jelinek <jakub@redhat.com>
29486 PR tree-optimization/109011
29487 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
29488 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
29489 CLZ, CTZ and FFS. Remove vargs variable, use
29490 gimple_build_call_internal rather than gimple_build_call_internal_vec.
29491 (vect_vect_recog_func_ptrs): Adjust popcount entry.
29493 2023-04-19 Jakub Jelinek <jakub@redhat.com>
29496 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
29497 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
29498 a new REG rather than the SUBREG.
29500 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
29502 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
29505 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29508 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
29509 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
29511 2023-04-19 Richard Biener <rguenther@suse.de>
29513 PR rtl-optimization/109237
29514 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
29515 TREE_VISITED on INSN_VAR_LOCATION_DECL.
29516 (delete_trivially_dead_insns): Maintain TREE_VISITED on
29517 active debug bind INSN_VAR_LOCATION_DECL.
29519 2023-04-19 Richard Biener <rguenther@suse.de>
29521 PR rtl-optimization/109237
29522 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
29524 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
29526 * doc/install.texi (enable-decimal-float): Add AArch64.
29528 2023-04-19 liuhongt <hongtao.liu@intel.com>
29530 PR rtl-optimization/109351
29531 * ira.cc (setup_class_subset_and_memory_move_costs): Check
29532 hard_regno_mode_ok before setting lowest memory move cost for
29533 the mode with different reg classes.
29535 2023-04-18 Jason Merrill <jason@redhat.com>
29537 * doc/invoke.texi: Remove stray @gol.
29539 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
29541 * ifcvt.cc (cond_move_process_if_block): Consider the result of
29542 targetm.noce_conversion_profitable_p() when replacing the original
29543 sequence with the converted one.
29545 2023-04-18 Mark Harmstone <mark@harmstone.com>
29547 * common.opt (gcodeview): Add new option.
29548 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
29549 * opts.cc (command_handle_option): Similarly.
29550 * doc/invoke.texi: Add documentation for -gcodeview.
29552 2023-04-18 Andrew Pinski <apinski@marvell.com>
29554 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
29555 (make_pass_phiopt): Make execute out of line.
29556 (tree_ssa_cs_elim): Move code into ...
29557 (pass_cselim::execute): here.
29559 2023-04-18 Sam James <sam@gentoo.org>
29561 * system.h: Drop unused INCLUDE_PTHREAD_H.
29563 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
29565 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
29568 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
29570 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
29571 (bswapdi2, bswapsi2): Similarly.
29573 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
29576 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
29577 Use CODE_FOR_sse4_1_insertps_v4sf.
29578 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
29579 (expand_vec_perm_1): Call expand_vec_per_insertps.
29580 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
29581 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
29582 (@sse4_1_insertps_<mode>): New insn pattern.
29583 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
29584 pattern from sse4_1_insertps using VI4F_128 mode iterator.
29586 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29588 * value-range.cc (gt_ggc_mx): New.
29590 * value-range.h (class vrange): Add GTY marker.
29591 (class frange): Same.
29592 (gt_ggc_mx): Remove.
29593 (gt_pch_nx): Remove.
29595 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
29597 * lra-constraints.cc (constraint_unique): New.
29598 (process_address_1): Apply constraint_unique test.
29599 * recog.cc (constrain_operands): Allow relaxed memory
29602 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
29604 * doc/extend.texi (Target Builtins): Add RISC-V Vector
29606 (RISC-V Vector Intrinsics): Document GCC implemented which
29607 version of RISC-V vector intrinsics and its reference.
29609 2023-04-18 Richard Biener <rguenther@suse.de>
29611 PR middle-end/108786
29612 * bitmap.h (bitmap_clear_first_set_bit): New.
29613 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
29614 bitmap_first_set_bit and add optional clearing of the bit.
29615 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
29616 (bitmap_clear_first_set_bit): Likewise.
29617 * df-core.cc (df_worklist_dataflow_doublequeue): Use
29618 bitmap_clear_first_set_bit.
29619 * graphite-scop-detection.cc (scop_detection::merge_sese):
29621 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
29622 (sanitize_asan_mark_poison): Likewise.
29623 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
29624 * tree-into-ssa.cc (rewrite_blocks): Likewise.
29625 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
29626 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
29628 2023-04-18 Richard Biener <rguenther@suse.de>
29630 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
29631 (dump_sa_points_to_info): ... this function.
29632 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
29633 and call dump_sa_stats guarded with TDF_STATS.
29634 (ipa_pta_execute): Likewise.
29635 (compute_may_aliases): Guard dump_alias_info with
29636 TDF_DETAILS|TDF_ALIAS.
29638 2023-04-18 Andrew Pinski <apinski@marvell.com>
29640 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
29641 the expression that is being tried when TDF_FOLDING
29643 (phiopt_worker::match_simplify_replacement): Dump
29644 the sequence which was created by gimple_simplify_phiopt
29645 when TDF_FOLDING is true.
29647 2023-04-18 Andrew Pinski <apinski@marvell.com>
29649 * tree-ssa-phiopt.cc (match_simplify_replacement):
29650 Simplify code that does the movement slightly.
29652 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29654 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
29656 (rev16<mode>2): Rename to...
29657 (aarch64_rev16<mode>2_alt1): ... This.
29658 (rev16<mode>2_alt): Rename to...
29659 (*aarch64_rev16<mode>2_alt2): ... This.
29661 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29663 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
29664 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
29666 * range-op-float.cc (zero_range): Use dconstm0.
29667 (zero_to_inf_range): Same.
29668 * real.h (dconstm0): New.
29669 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
29670 (frange::set_zero): Do not declare dconstm0.
29672 2023-04-18 Richard Biener <rguenther@suse.de>
29674 * system.h (class auto_mpz): New,
29675 * realmpfr.h (class auto_mpfr): Likewise.
29676 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
29677 (do_mpfr_arg2): Likewise.
29678 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
29680 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29682 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
29683 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
29685 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29687 * value-range.cc (frange::operator==): Adjust for NAN.
29688 (range_tests_nan): Remove some NAN tests.
29690 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29692 * inchash.cc (hash::add_real_value): New.
29693 * inchash.h (class hash): Add add_real_value.
29694 * value-range.cc (add_vrange): New.
29695 * value-range.h (inchash::add_vrange): New.
29697 2023-04-18 Richard Biener <rguenther@suse.de>
29699 PR tree-optimization/109539
29700 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
29701 Re-implement pointer relatedness for PHIs.
29703 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
29705 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
29706 (SV_FP): New iterator.
29707 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
29708 (recip<mode>2): Unify the two patterns using SV_FP.
29709 (div_scale<mode><exec_vcc>): New insn.
29710 (div_fmas<mode><exec>): New insn.
29711 (div_fixup<mode><exec>): New insn.
29712 (div<mode>3): Unify the two expanders and rewrite using hardfp.
29713 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
29714 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
29715 and UNSPEC_DIV_FIXUP.
29716 (vccwait): New attribute.
29718 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29720 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
29721 if the argument matches that.
29723 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
29725 * config/aarch64/atomics.md
29726 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
29727 Use SD_HSDI for destination mode iterator.
29729 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
29731 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
29732 of z-extensions and s-extensions.
29733 (riscv_subset_list::parse): Likewise.
29735 2023-04-18 Jakub Jelinek <jakub@redhat.com>
29737 PR tree-optimization/109240
29738 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
29739 first vec_perm operand and minus as second using fneg/fadd and
29740 minus as first vec_perm operand and plus as second using fneg/fsub.
29742 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29744 * data-streamer.cc (bp_pack_real_value): New.
29745 (bp_unpack_real_value): New.
29746 * data-streamer.h (bp_pack_real_value): New.
29747 (bp_unpack_real_value): New.
29748 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
29749 bp_unpack_real_value.
29750 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
29751 bp_pack_real_value.
29753 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29755 * wide-int.h (WIDE_INT_MAX_HWIS): New.
29756 (class fixed_wide_int_storage): Use it.
29757 (trailing_wide_ints <N>::set_precision): Use it.
29758 (trailing_wide_ints <N>::extra_size): Use it.
29760 2023-04-18 Xi Ruoyao <xry111@xry111.site>
29762 * config/loongarch/loongarch-protos.h
29763 (loongarch_addu16i_imm12_operand_p): New function prototype.
29764 (loongarch_split_plus_constant): Likewise.
29765 * config/loongarch/loongarch.cc
29766 (loongarch_addu16i_imm12_operand_p): New function.
29767 (loongarch_split_plus_constant): Likewise.
29768 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
29769 (DUAL_IMM12_OPERAND): Likewise.
29770 (DUAL_ADDU16I_OPERAND): Likewise.
29771 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
29773 * config/loongarch/predicates.md (const_dual_imm12_operand): New
29775 (const_addu16i_operand): Likewise.
29776 (const_addu16i_imm12_di_operand): Likewise.
29777 (const_addu16i_imm12_si_operand): Likewise.
29778 (plus_di_operand): Likewise.
29779 (plus_si_operand): Likewise.
29780 (plus_si_extend_operand): Likewise.
29781 * config/loongarch/loongarch.md (add<mode>3): Convert to
29782 define_insn_and_split. Use plus_<mode>_operand predicate
29783 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
29784 and Le constraints.
29785 (*addsi3_extended): Convert to define_insn_and_split. Use
29786 plus_si_extend_operand instead of arith_operand. Add
29787 alternatives for La and Le alternatives.
29789 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29791 * value-range.h (Value_Range::Value_Range): New.
29792 (Value_Range::contains_p): New.
29794 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
29796 * value-range.h (class vrange): Make m_discriminator const.
29797 (class irange): Make m_max_ranges const. Adjust constructors
29799 (class unsupported_range): Construct vrange appropriately.
29800 (class frange): Same.
29802 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
29804 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
29807 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
29809 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
29811 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
29813 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
29815 (riscv_expand_epilogue): Likewise.
29817 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
29819 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
29821 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
29823 2023-04-17 Andrew Pinski <apinski@marvell.com>
29825 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
29828 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
29830 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
29833 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
29835 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
29836 parameter remaining_size.
29837 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
29838 (riscv_expand_prologue): Likewise.
29839 (riscv_expand_epilogue): Likewise.
29841 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
29843 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
29844 roriw for constant counts.
29845 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
29846 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
29847 (simplify_context::simplify_binary_operation_1): Use it.
29848 * expmed.cc (expand_shift_1): Likewise.
29850 2023-04-17 Martin Jambor <mjambor@suse.cz>
29854 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
29855 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
29856 (ipa_zap_jf_refdesc): New function.
29857 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
29858 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
29859 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
29860 the new parameter of find_reference.
29861 (adjust_references_in_caller): Likewise. Make sure the constant jump
29862 function is not used to decrement a refdec counter again. Only
29863 decrement refdesc counters when the pass_through jump function allows
29864 it. Added a detailed dump when decrementing refdesc counters.
29865 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
29866 (ipa_set_jf_simple_pass_through): Initialize the new flag.
29867 (ipa_set_jf_unary_pass_through): Likewise.
29868 (ipa_set_jf_arith_pass_through): Likewise.
29869 (remove_described_reference): Provide a value for the new parameter of
29871 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
29872 the previous pass_through had a flag mandating that we do so.
29873 (propagate_controlled_uses): Likewise. Only decrement refdesc
29874 counters when the pass_through jump function allows it.
29875 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
29876 parameter of find_reference.
29877 (ipa_write_jump_function): Assert the new flag does not have to be
29879 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
29882 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
29883 Di Zhao <di.zhao@amperecomputing.com>
29885 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
29886 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
29887 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
29888 Check for the above tuning option when processing loads.
29890 2023-04-17 Richard Biener <rguenther@suse.de>
29892 PR tree-optimization/109524
29893 * tree-vrp.cc (remove_unreachable::m_list): Change to a
29894 vector of pairs of block indices.
29895 (remove_unreachable::maybe_register_block): Adjust.
29896 (remove_unreachable::remove_and_update_globals): Likewise.
29897 Deal with removed blocks.
29899 2023-04-16 Jeff Law <jlaw@ventanamicro>
29902 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
29903 TARGET_SFB_ALU, force the true arm into a register.
29905 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
29908 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
29909 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
29911 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
29912 (pa_function_arg_size): Change return type to int. Return zero
29913 for arguments larger than 1 GB. Update comments.
29915 2023-04-15 Jakub Jelinek <jakub@redhat.com>
29917 PR tree-optimization/109154
29918 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
29919 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
29921 2023-04-15 Jason Merrill <jason@redhat.com>
29924 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
29925 Overhaul lhs_ref.ref analysis.
29927 2023-04-14 Richard Biener <rguenther@suse.de>
29929 PR tree-optimization/109502
29930 * tree-vect-stmts.cc (vectorizable_assignment): Fix
29931 check for conversion between mask and non-mask types.
29933 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
29934 Jakub Jelinek <jakub@redhat.com>
29938 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
29939 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
29940 smaller than word_mode.
29941 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
29942 <case AND>: Likewise.
29944 2023-04-14 Jakub Jelinek <jakub@redhat.com>
29946 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
29949 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
29951 PR tree-optimization/108139
29952 PR tree-optimization/109462
29953 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
29954 equivalency check for PHI nodes.
29955 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
29956 does not dominate single-arg equivalency edges.
29958 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
29961 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
29962 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
29964 2023-04-13 Richard Biener <rguenther@suse.de>
29966 PR tree-optimization/109491
29967 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
29968 NULL operands test.
29970 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29973 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
29974 (vint16mf4_t): Ditto.
29975 (vint32mf2_t): Ditto.
29976 (vint64m1_t): Ditto.
29977 (vint64m2_t): Ditto.
29978 (vint64m4_t): Ditto.
29979 (vint64m8_t): Ditto.
29980 (vuint8mf8_t): Ditto.
29981 (vuint16mf4_t): Ditto.
29982 (vuint32mf2_t): Ditto.
29983 (vuint64m1_t): Ditto.
29984 (vuint64m2_t): Ditto.
29985 (vuint64m4_t): Ditto.
29986 (vuint64m8_t): Ditto.
29987 (vfloat32mf2_t): Ditto.
29988 (vbool64_t): Ditto.
29989 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
29990 (register_vector_type): Ditto.
29991 (check_required_extensions): Fix condition.
29992 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
29993 (RVV_REQUIRE_ELEN_64): New define.
29994 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
29995 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
29996 (TARGET_VECTOR_FP64): Ditto.
29997 (ENTRY): Fix predicate.
29998 * config/riscv/vector-iterators.md: Fix predicate.
30000 2023-04-12 Jakub Jelinek <jakub@redhat.com>
30002 PR tree-optimization/109410
30003 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
30004 block if first statement of the function is a call to returns_twice
30007 2023-04-12 Jakub Jelinek <jakub@redhat.com>
30010 * config/i386/i386.cc: Include rtl-error.h.
30011 (ix86_print_operand): For z modifier warning, use warning_for_asm
30012 if this_is_asm_operands. For Z modifier errors, use %c and code
30013 instead of hardcoded Z.
30015 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
30017 * config/i386/x-mingw32-utf8: Remove extrataneous $@
30019 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
30021 PR tree-optimization/109462
30022 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
30023 check for equivalences if NAME is a phi node.
30025 2023-04-12 Richard Biener <rguenther@suse.de>
30027 PR tree-optimization/109473
30028 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
30029 Convert scalar result to the computation type before performing
30030 the reduction adjustment.
30032 2023-04-12 Richard Biener <rguenther@suse.de>
30034 PR tree-optimization/109469
30035 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
30036 a returns-twice call.
30038 2023-04-12 Richard Biener <rguenther@suse.de>
30040 PR tree-optimization/109434
30041 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
30042 handle possibly throwing calls when processing the LHS
30043 and may-defs are not OK.
30045 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
30047 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
30048 predicate to avoid splitting arith constants.
30050 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
30051 Pan Li <pan2.li@intel.com>
30052 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30053 Kito Cheng <kito.cheng@sifive.com>
30056 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
30057 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
30058 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
30059 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
30060 (riscv_zero_call_used_regs): New.
30061 (TARGET_ZERO_CALL_USED_REGS): New.
30063 2023-04-11 Martin Liska <mliska@suse.cz>
30066 * opts.cc (finish_options): Drop also
30067 x_flag_var_tracking_assignments.
30069 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
30071 PR tree-optimization/108888
30072 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
30074 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
30077 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
30078 (vsx_sign_extend_v16qi_<mode>): ... this.
30079 (vsx_sign_extend_hi_<mode>): Rename to...
30080 (vsx_sign_extend_v8hi_<mode>): ... this.
30081 (vsx_sign_extend_si_v2di): Rename to...
30082 (vsx_sign_extend_v4si_v2di): ... this.
30083 (vsignextend_qi_<mode>): Remove.
30084 (vsignextend_hi_<mode>): Remove.
30085 (vsignextend_si_v2di): Remove.
30086 (vsignextend_v2di_v1ti): Remove.
30087 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
30088 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
30089 with gen_vsx_sign_extend_v16qi_v4si.
30090 * config/rs6000/rs6000.md (split for DI constant generation):
30091 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
30092 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
30093 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
30094 with gen_vsx_sign_extend_v16qi_si.
30095 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
30096 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
30097 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
30098 vsx_sign_extend_v16qi_v4si.
30099 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
30100 vsx_sign_extend_v8hi_v2di.
30101 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
30102 vsx_sign_extend_v8hi_v4si.
30103 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
30104 vsx_sign_extend_si_v2di.
30105 (__builtin_altivec_vsignext): Set bif-pattern to
30106 vsx_sign_extend_v2di_v1ti.
30107 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
30108 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
30109 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
30110 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
30112 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
30115 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
30116 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
30118 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
30120 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
30122 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
30124 * common/config/i386/cpuinfo.h (get_available_features):
30125 Detect AMX-COMPLEX.
30126 * common/config/i386/i386-common.cc
30127 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
30128 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
30129 (ix86_handle_option): Handle -mamx-complex.
30130 * common/config/i386/i386-cpuinfo.h (enum processor_features):
30131 Add FEATURE_AMX_COMPLEX.
30132 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
30134 * config.gcc: Add amxcomplexintrin.h.
30135 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
30136 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
30138 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
30139 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
30140 Handle amx-complex.
30141 * config/i386/i386.opt: Add option -mamx-complex.
30142 * config/i386/immintrin.h: Include amxcomplexintrin.h.
30143 * doc/extend.texi: Document amx-complex.
30144 * doc/invoke.texi: Document -mamx-complex.
30145 * doc/sourcebuild.texi: Document target amx-complex.
30146 * config/i386/amxcomplexintrin.h: New file.
30148 2023-04-08 Jakub Jelinek <jakub@redhat.com>
30150 PR tree-optimization/109392
30151 * tree-vect-generic.cc (tree_vec_extract): Handle failure
30152 of maybe_push_res_to_seq better.
30154 2023-04-08 Jakub Jelinek <jakub@redhat.com>
30156 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
30158 (SYSTEM_H): Depend on $(HASHTAB_H).
30159 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
30160 dependency on $(RTL_BASE_H), remove redundant dependency on
30163 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
30166 * config/arm/arm.cc (arm_effective_regno): New function.
30167 (mve_vector_mem_operand): Use it.
30169 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
30171 PR tree-optimization/109417
30172 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
30173 dependency is in SSA_NAME_FREE_LIST.
30175 2023-04-06 Andrew Pinski <apinski@marvell.com>
30177 PR tree-optimization/109427
30178 * params.opt (-param=vect-induction-float=):
30179 Fix option attribute typo for IntegerRange.
30181 2023-04-05 Jeff Law <jlaw@ventanamicro>
30184 * combine.cc (combine_instructions): Force re-recognition when
30185 after restoring the body of an insn to its original form.
30187 2023-04-05 Martin Jambor <mjambor@suse.cz>
30190 * ipa-sra.cc (zap_useless_ipcp_results): New function.
30191 (process_isra_node_results): Call it.
30193 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30195 * config/riscv/vector.md: Fix incorrect operand order.
30197 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30199 * config/riscv/riscv-vsetvl.cc
30200 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
30203 2023-04-05 Li Xu <xuli1@eswincomputing.com>
30205 * config/riscv/riscv-vector-builtins.def: Fix typo.
30206 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
30207 * config/riscv/vector-iterators.md: Ditto.
30209 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
30211 * doc/md.texi (Including Patterns): Fix page break.
30213 2023-04-04 Jakub Jelinek <jakub@redhat.com>
30215 PR tree-optimization/109386
30216 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
30217 foperator_le::op1_range, foperator_le::op2_range,
30218 foperator_gt::op1_range, foperator_gt::op2_range,
30219 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
30220 BRS_FALSE case even if the other op is maybe_isnan, not just
30222 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
30223 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
30224 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
30225 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
30226 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
30227 not just known_isnan.
30229 2023-04-04 Marek Polacek <polacek@redhat.com>
30231 PR sanitizer/109107
30232 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
30234 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
30236 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
30238 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
30239 (mve_vcreateq_f<mode>): Swap operands.
30241 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
30243 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
30245 2023-04-04 Jakub Jelinek <jakub@redhat.com>
30248 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
30249 Reword diagnostics about zfinx conflict with f, formatting fixes.
30251 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
30253 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
30255 2023-04-04 Richard Biener <rguenther@suse.de>
30257 PR tree-optimization/109304
30258 * tree-profile.cc (tree_profiling): Use symtab node
30259 availability to decide whether to skip adjusting calls.
30260 Do not adjust calls to internal functions.
30262 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
30265 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
30266 function for permutation control vector by considering big endianness.
30268 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
30271 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
30272 (rs6000_vprtyb<mode>2): ... this.
30273 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
30274 rs6000_vprtybv2di2.
30275 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
30276 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
30277 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
30278 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
30280 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
30281 Sandra Loosemore <sandra@codesourcery.com>
30283 * doc/md.texi (Insn Splitting): Tweak wording for readability.
30285 2023-04-03 Martin Jambor <mjambor@suse.cz>
30288 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
30289 offset + size will be representable in unsigned int.
30291 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
30293 * configure.ac (ZSTD_LIB): Move before zstd.h check.
30294 Unset gcc_cv_header_zstd_h without libzstd.
30295 * configure: Regenerate.
30297 2023-04-03 Martin Liska <mliska@suse.cz>
30299 * doc/invoke.texi: Document new param.
30301 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
30303 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
30304 new check_effective_target function.
30306 2023-04-03 Li Xu <xuli1@eswincomputing.com>
30308 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
30309 (vfloat32m8_t): Likewise
30311 2023-04-03 liuhongt <hongtao.liu@intel.com>
30313 * doc/md.texi: Document signbitm2.
30315 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30316 kito-cheng <kito.cheng@sifive.com>
30318 * config/riscv/vector.md: Fix RA constraint.
30320 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
30322 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
30323 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
30324 * config/riscv/vector.md: Fix scalar move bug.
30326 2023-04-01 Jakub Jelinek <jakub@redhat.com>
30328 * range-op-float.cc (foperator_equal::fold_range): If at least
30329 one of the op ranges is not singleton and neither is NaN and all
30330 4 bounds are zero, return [1, 1].
30331 (foperator_not_equal::fold_range): In the same case return [0, 0].
30333 2023-04-01 Jakub Jelinek <jakub@redhat.com>
30335 * range-op-float.cc (foperator_equal::fold_range): Perform the
30336 non-singleton handling regardless of maybe_isnan (op1, op2).
30337 (foperator_not_equal::fold_range): Likewise.
30338 (foperator_lt::fold_range, foperator_le::fold_range,
30339 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
30340 real_* comparison check which results in range_false (type)
30341 even if maybe_isnan (op1, op2). Simplify.
30342 (foperator_ltgt): New class.
30343 (fop_ltgt): New variable.
30344 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
30347 2023-04-01 Jakub Jelinek <jakub@redhat.com>
30350 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
30351 returns VOIDmode, handle it like if the register isn't used for
30352 passing arguments at all.
30353 (apply_result_size): If targetm.calls.get_raw_result_mode returns
30354 VOIDmode, handle it like if the register isn't used for returning
30356 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
30357 means to return VOIDmode.
30358 * doc/tm.texi: Regenerated.
30359 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
30360 TARGET_SVE for P0_REGNUM.
30361 (aarch64_function_arg_regno_p): Also return true for p0-p3.
30362 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
30364 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
30366 * lra-constraints.cc: (combine_reload_insn): New function.
30368 2023-03-31 Jakub Jelinek <jakub@redhat.com>
30370 PR tree-optimization/91645
30371 * range-op-float.cc (foperator_unordered_lt::fold_range,
30372 foperator_unordered_le::fold_range,
30373 foperator_unordered_gt::fold_range,
30374 foperator_unordered_ge::fold_range,
30375 foperator_unordered_equal::fold_range): Call the ordered
30376 fold_range on ranges with cleared NaNs.
30377 * value-query.cc (range_query::get_tree_range): Handle also
30378 COMPARISON_CLASS_P trees.
30380 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
30381 Andrew Pinski <pinskia@gmail.com>
30384 * config/riscv/t-riscv: Add missing dependencies.
30386 2023-03-31 liuhongt <hongtao.liu@intel.com>
30388 * config/i386/i386.cc (inline_memory_move_cost): Return 100
30389 for MASK_REGS when MODE_SIZE > 8.
30391 2023-03-31 liuhongt <hongtao.liu@intel.com>
30394 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
30395 ufloat/ufix to floatuns/fixuns.
30396 * config/i386/i386-expand.cc
30397 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
30398 * config/i386/sse.md
30399 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
30401 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
30402 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
30404 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
30406 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
30408 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
30409 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
30410 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
30411 (ufloatv2siv2df2<mask_name>): Renamed to ..
30412 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
30413 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
30415 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
30417 (ufix_notruncv2dfv2si2): Renamed to ..
30418 (fixuns_notruncv2dfv2si2):.. this.
30419 (ufix_notruncv2dfv2si2_mask): Renamed to ..
30420 (fixuns_notruncv2dfv2si2_mask): .. this.
30421 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
30422 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
30423 (ufix_truncv2dfv2si2): Renamed to ..
30424 (*fixuns_truncv2dfv2si2): .. this.
30425 (ufix_truncv2dfv2si2_mask): Renamed to ..
30426 (fixuns_truncv2dfv2si2_mask): .. this.
30427 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
30428 (*fixuns_truncv2dfv2si2_mask_1): .. this.
30429 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
30430 (fixuns_truncv4dfv4si2<mask_name>): .. this.
30431 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
30433 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
30435 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
30436 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
30439 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
30441 PR tree-optimization/109154
30442 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
30443 * gimple-range-gori.h (may_recompute_p): Add depth param.
30444 * params.opt (ranger-recompute-depth): New param.
30446 2023-03-30 Jason Merrill <jason@redhat.com>
30450 * cgraph.h: Move reset() from cgraph_node to symtab_node.
30451 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
30452 remove_from_same_comdat_group.
30454 2023-03-30 Richard Biener <rguenther@suse.de>
30456 PR tree-optimization/107561
30457 * gimple-ssa-warn-access.cc (get_size_range): Add flags
30458 argument and pass it on.
30459 (check_access): When querying for the size range pass
30460 SR_ALLOW_ZERO when the known destination size is zero.
30462 2023-03-30 Richard Biener <rguenther@suse.de>
30464 PR tree-optimization/109342
30465 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
30466 overload for edge. When that edge is a backedge use
30467 dominated_by_p directly.
30469 2023-03-30 liuhongt <hongtao.liu@intel.com>
30471 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
30472 vpblendd instead of vpblendw for V4SI under avx2.
30474 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
30476 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
30477 for many quick operands, for register-sized modes.
30479 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
30481 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
30484 2023-03-29 Martin Liska <mliska@suse.cz>
30486 PR bootstrap/109310
30487 * configure.ac: Emit a warning for deprecated option
30488 --enable-link-mutex.
30489 * configure: Regenerate.
30491 2023-03-29 Richard Biener <rguenther@suse.de>
30493 PR tree-optimization/109331
30494 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
30495 discover a taken edge make sure to cleanup the CFG.
30497 2023-03-29 Richard Biener <rguenther@suse.de>
30499 PR tree-optimization/109327
30500 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
30501 already removed stmts when draining to_remove.
30503 2023-03-29 Richard Biener <rguenther@suse.de>
30506 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
30507 so we can re-create the DIE for the type if required.
30509 2023-03-29 Jakub Jelinek <jakub@redhat.com>
30510 Richard Biener <rguenther@suse.de>
30512 PR tree-optimization/109301
30513 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
30514 properties_provided from PROP_gimple_opt_math to 0.
30515 (pass_data_expand_powcabs): Change properties_provided from 0 to
30516 PROP_gimple_opt_math.
30518 2023-03-29 Richard Biener <rguenther@suse.de>
30520 PR tree-optimization/109154
30521 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
30522 inverted condition specially by inverting at the caller.
30523 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
30525 2023-03-28 David Malcolm <dmalcolm@redhat.com>
30528 * diagnostic-show-locus.cc (column_range::column_range): Factor
30529 out assertion conditional into...
30530 (column_range::valid_p): ...this new function.
30531 (line_corrections::add_hint): Don't attempt to consolidate hints
30532 if it would lead to invalid column_range instances.
30534 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
30537 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
30538 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
30541 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
30543 PR rtl-optimization/109187
30544 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
30545 subtraction in three-way comparison.
30547 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
30549 PR tree-optimization/109265
30550 PR tree-optimization/109274
30551 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
30552 not create a relation record is op1 and op2 are the same symbol.
30553 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
30554 handler for this stmt, but create a new record only if this statement
30555 generates a relation based on the ranges.
30556 (gori_compute::compute_operand2_range): Ditto.
30557 * value-relation.h (value_relation::set_relation): Always create the
30558 record that is requested.
30560 2023-03-28 Richard Biener <rguenther@suse.de>
30562 PR tree-optimization/107087
30563 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
30564 executable regions to avoid useless work and to better
30565 propagate degenerate PHIs.
30567 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
30569 * config/i386/x-mingw32-utf8: update comments.
30571 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
30574 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
30575 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
30577 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
30579 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
30580 after inlining. Record which decls are loaded from. Fix handling
30581 of vops for loads and stores.
30582 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
30583 (aarch64_accesses_vector_load_decl_p): Likewise.
30584 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
30586 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
30587 that loads from a decl, treat vector stores to those decls as
30589 (aarch64_vector_costs::finish_cost): ...and in that case,
30590 if the vector code does nothing more than a store, give the
30591 prologue a zero cost as well.
30593 2023-03-28 Richard Biener <rguenther@suse.de>
30596 PR tree-optimization/108129
30597 * genmatch.cc (lower_for): For (match ...) delay
30598 substituting into the match operator if possible.
30599 (dt_operand::gen_gimple_expr): For user_id look at the
30600 first substitute for determining how to access operands.
30601 (dt_operand::gen_generic_expr): Likewise.
30602 (dt_node::gen_kids): Properly sort user_ids according
30603 to their substitutes.
30604 (dt_node::gen_kids_1): Code-generate user_id matching.
30606 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30607 Jonathan Wakely <jwakely@redhat.com>
30609 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
30610 Use subcommand rather than sub-command in function comments.
30612 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30614 PR tree-optimization/109154
30615 * value-range.h (frange::flush_denormals_to_zero): Make it public
30616 rather than private.
30617 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
30619 * range-op-float.cc (range_operator_float::fold_range): Call
30620 flush_denormals_to_zero.
30622 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30624 PR middle-end/106190
30625 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
30626 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
30628 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30630 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
30631 as 4th argument to set to avoid clear_nan and union_ calls.
30633 2023-03-28 Jakub Jelinek <jakub@redhat.com>
30636 * config/i386/i386.cc (assign_386_stack_local): For DImode
30637 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
30638 align 32 rather than 0 to assign_stack_local.
30640 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
30643 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
30644 on operand #3 to get the final condition code. Use std::swap.
30645 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
30646 (fucmp<gcond:code>8<P:mode>_vis): Move around.
30647 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
30648 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
30650 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
30652 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
30653 top-level sections.
30655 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
30657 * config.host: Pull in i386/x-mingw32-utf8 Makefile
30658 fragment and reference utf8rc-mingw32.o explicitly
30660 * config/i386/sym-mingw32.cc: prevent name mangling of
30662 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
30663 depend on manifest file explicitly.
30665 2023-03-28 Richard Biener <rguenther@suse.de>
30668 2023-03-27 Richard Biener <rguenther@suse.de>
30670 PR rtl-optimization/109237
30671 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
30673 2023-03-28 Richard Biener <rguenther@suse.de>
30675 * common.opt (gdwarf): Remove Negative(gdwarf-).
30677 2023-03-28 Richard Biener <rguenther@suse.de>
30679 * common.opt (gdwarf): Add RejectNegative.
30680 (gdwarf-): Likewise.
30684 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30686 * config/cris/constraints.md ("T"): Correct to
30687 define_memory_constraint.
30689 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30691 * config/cris/cris.md (BW2): New mode-iterator.
30692 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
30695 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30697 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
30698 for possible eliminable compares.
30700 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
30702 * config/cris/constraints.md ("R"): Remove unused constraint.
30704 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
30706 PR gcov-profile/109297
30707 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
30708 (merge_stream_usage): Likewise.
30709 (overlap_usage): Likewise.
30711 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
30714 * config/riscv/thead.md: Add missing mode specifiers.
30716 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
30717 Jiangning Liu <jiangning.liu@amperecomputing.com>
30718 Manolis Tsamis <manolis.tsamis@vrull.eu>
30720 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
30722 2023-03-27 Richard Biener <rguenther@suse.de>
30724 PR rtl-optimization/109237
30725 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
30727 2023-03-27 Richard Biener <rguenther@suse.de>
30730 * lto-wrapper.cc (run_gcc): Parse alternate debug options
30731 as well, they always enable debug.
30733 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
30736 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
30738 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
30740 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
30743 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
30744 than zero when calling vec_sld.
30745 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
30746 zero when calling vec_sld.
30747 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
30748 than zero when calling vec_sld.
30750 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
30752 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
30753 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
30754 loops are represented and which fields are vectors. Add
30755 documentation for OMP_FOR_PRE_BODY field. Document internal
30756 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
30757 * tree.def (OMP_FOR): Make documentation consistent with the
30758 Texinfo manual, to fill some gaps and correct errors.
30760 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
30763 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
30764 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
30765 (handle_move_double): Call it before handle_movsi.
30766 * config/m68k/m68k-protos.h: Declare it.
30768 2023-03-26 Jakub Jelinek <jakub@redhat.com>
30770 PR tree-optimization/109230
30771 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
30773 2023-03-26 Jakub Jelinek <jakub@redhat.com>
30776 * predict.cc (compute_function_frequency): Don't call
30777 warn_function_cold if function already has cold attribute.
30779 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
30781 * doc/install.texi: Remove anachronistic note
30782 related to languages built and separate source tarballs.
30784 2023-03-25 David Malcolm <dmalcolm@redhat.com>
30787 * diagnostic-format-sarif.cc (read_until_eof): Delete.
30788 (maybe_read_file): Delete.
30789 (sarif_builder::maybe_make_artifact_content_object): Use
30790 get_source_file_content rather than maybe_read_file.
30791 Reject it if it's not valid UTF-8.
30792 * input.cc (file_cache_slot::get_full_file_content): New.
30793 (get_source_file_content): New.
30794 (selftest::check_cpp_valid_utf8_p): New.
30795 (selftest::test_cpp_valid_utf8_p): New.
30796 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
30797 * input.h (get_source_file_content): New prototype.
30799 2023-03-24 David Malcolm <dmalcolm@redhat.com>
30801 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
30803 (Special Functions for Debugging the Analyzer): Convert to a
30804 table, and rewrite in places.
30805 (Other Debugging Techniques): Add notes on how to compare two
30806 different exploded graphs.
30808 2023-03-24 David Malcolm <dmalcolm@redhat.com>
30811 * json.cc: Update comments to indicate that we now preserve
30812 insertion order of keys within objects.
30813 (object::print): Traverse keys in insertion order.
30814 (object::set): Preserve insertion order of keys.
30815 (selftest::test_writing_objects): Add an additional key to verify
30816 that we preserve insertion order.
30817 * json.h (object::m_keys): New field.
30819 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
30821 PR tree-optimization/109238
30822 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
30823 predecessors which this block dominates.
30825 2023-03-24 Richard Biener <rguenther@suse.de>
30827 PR tree-optimization/106912
30828 * tree-profile.cc (tree_profiling): Update stmts only when
30829 profiling or testing coverage. Make sure to update calls
30830 fntype, stripping 'const' there.
30832 2023-03-24 Jakub Jelinek <jakub@redhat.com>
30834 PR middle-end/109258
30835 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
30836 if target == const0_rtx.
30838 2023-03-24 Alexandre Oliva <oliva@adacore.com>
30840 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
30841 Document options and effective targets.
30843 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
30845 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
30848 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
30850 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
30851 non-earlyclobber alternative.
30853 2023-03-23 Andrew Pinski <apinski@marvell.com>
30856 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
30859 2023-03-23 Richard Biener <rguenther@suse.de>
30861 PR tree-optimization/107569
30862 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
30863 Do not push SSA names with zero uses as available leader.
30864 (process_bb): Likewise.
30866 2023-03-23 Richard Biener <rguenther@suse.de>
30868 PR tree-optimization/109262
30869 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
30870 combining a piecewise complex load avoid touching loads
30871 that throw internally. Use fun, not cfun throughout.
30873 2023-03-23 Jakub Jelinek <jakub@redhat.com>
30875 * value-range.cc (irange::irange_union, irange::intersect): Fix
30876 comment spelling bugs.
30877 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
30878 * gimple-range-trace.h: Likewise.
30879 * gimple-range-edge.cc: Likewise.
30880 (gimple_outgoing_range_stmt_p,
30881 gimple_outgoing_range::switch_edge_range,
30882 gimple_outgoing_range::edge_range_p): Likewise.
30883 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
30884 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
30885 assume_query::assume_query, assume_query::calculate_phi): Likewise.
30886 * gimple-range-edge.h: Likewise.
30887 * value-range.h (Value_Range::set, Value_Range::lower_bound,
30888 Value_Range::upper_bound, frange::set_undefined): Likewise.
30889 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
30890 gori_compute): Likewise.
30891 * gimple-range-fold.h (fold_using_range): Likewise.
30892 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
30894 * gimple-range-gori.cc (range_def_chain::in_chain_p,
30895 range_def_chain::dump, gori_map::calculate_gori,
30896 gori_compute::compute_operand_range_switch,
30897 gori_compute::logical_combine, gori_compute::refine_using_relation,
30898 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
30900 * gimple-range.h: Likewise.
30901 (enable_ranger): Likewise.
30902 * range-op.h (empty_range_varying): Likewise.
30903 * value-query.h (value_query): Likewise.
30904 * gimple-range-cache.cc (block_range_cache::set_bb_range,
30905 block_range_cache::dump, ssa_global_cache::clear_global_range,
30906 temporal_cache::temporal_value, temporal_cache::current_p,
30907 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
30908 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
30910 * gimple-range-fold.cc (fur_edge::get_phi_operand,
30911 fur_stmt::get_operand, gimple_range_adjustment,
30912 fold_using_range::range_of_phi,
30913 fold_using_range::relation_fold_and_or): Likewise.
30914 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
30915 * value-query.cc (range_query::value_of_expr,
30916 range_query::value_on_edge, range_query::query_relation): Likewise.
30917 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
30918 intersect_range_with_nonzero_bits): Likewise.
30919 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
30920 exit_range): Likewise.
30921 * value-relation.h: Likewise.
30922 (equiv_oracle, relation_trio::relation_trio, value_relation,
30923 value_relation::value_relation, pe_min): Likewise.
30924 * range-op-float.cc (range_operator_float::rv_fold,
30925 frange_arithmetic, foperator_unordered_equal::op1_range,
30926 foperator_div::rv_fold): Likewise.
30927 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
30928 * value-relation.cc (equiv_oracle::query_relation,
30929 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
30930 value_relation::apply_transitive, relation_chain_head::find_relation,
30931 dom_oracle::query_relation, dom_oracle::find_relation_block,
30932 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
30933 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
30934 create_possibly_reversed_range, adjust_op1_for_overflow,
30935 operator_mult::wi_fold, operator_exact_divide::op1_range,
30936 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
30937 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
30938 range_op_lshift_tests): Likewise.
30940 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
30942 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
30943 (move_callee_saved_registers): Detect the bug condition early.
30945 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
30947 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
30948 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
30950 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
30951 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
30952 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
30953 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
30954 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
30956 2023-03-23 Jakub Jelinek <jakub@redhat.com>
30958 PR tree-optimization/109176
30959 * tree-vect-generic.cc (expand_vector_condition): If a has
30960 vector boolean type and is a comparison, also check if both
30961 the comparison and VEC_COND_EXPR could be successfully expanded
30964 2023-03-23 Pan Li <pan2.li@intel.com>
30965 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30969 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
30970 for vector mask modes.
30971 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
30972 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
30974 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
30976 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
30978 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30981 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
30982 (emit_vlmax_op): Ditto.
30983 * config/riscv/riscv-v.cc (get_sew): New function.
30984 (emit_vlmax_vsetvl): Adapt function.
30985 (emit_pred_op): Ditto.
30986 (emit_vlmax_op): Ditto.
30987 (emit_nonvlmax_op): Ditto.
30988 (legitimize_move): Fix LRA ICE.
30989 (gen_no_side_effects_vsetvl_rtx): Adapt function.
30990 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
30991 (@mov<VB:mode><P:mode>_lra): Ditto.
30992 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
30993 (*mov<VB:mode><P:mode>_lra): Ditto.
30995 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30998 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
30999 __riscv_vlenb support.
31001 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31002 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
31003 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
31005 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31006 * config/riscv/riscv-vector-builtins.cc: Ditto.
31008 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31009 kito-cheng <kito.cheng@sifive.com>
31011 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
31012 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
31013 (pass_vsetvl::need_vsetvl): Fix bugs.
31014 (pass_vsetvl::backward_demand_fusion): Fix bugs.
31015 (pass_vsetvl::demand_fusion): Fix bugs.
31016 (eliminate_insn): Fix bugs.
31017 (insert_vsetvl): Ditto.
31018 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
31019 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
31020 * config/riscv/vector.md: Ditto.
31022 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31023 kito-cheng <kito.cheng@sifive.com>
31025 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
31026 * config/riscv/vector-iterators.md (nmsac): Ditto.
31032 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
31033 (@pred_mul_plus<mode>): Ditto.
31034 (*pred_madd<mode>): Ditto.
31035 (*pred_macc<mode>): Ditto.
31036 (*pred_mul_plus<mode>): Ditto.
31037 (@pred_mul_plus<mode>_scalar): Ditto.
31038 (*pred_madd<mode>_scalar): Ditto.
31039 (*pred_macc<mode>_scalar): Ditto.
31040 (*pred_mul_plus<mode>_scalar): Ditto.
31041 (*pred_madd<mode>_extended_scalar): Ditto.
31042 (*pred_macc<mode>_extended_scalar): Ditto.
31043 (*pred_mul_plus<mode>_extended_scalar): Ditto.
31044 (@pred_minus_mul<mode>): Ditto.
31045 (*pred_<madd_nmsub><mode>): Ditto.
31046 (*pred_nmsub<mode>): Ditto.
31047 (*pred_<macc_nmsac><mode>): Ditto.
31048 (*pred_nmsac<mode>): Ditto.
31049 (*pred_mul_<optab><mode>): Ditto.
31050 (*pred_minus_mul<mode>): Ditto.
31051 (@pred_mul_<optab><mode>_scalar): Ditto.
31052 (@pred_minus_mul<mode>_scalar): Ditto.
31053 (*pred_<madd_nmsub><mode>_scalar): Ditto.
31054 (*pred_nmsub<mode>_scalar): Ditto.
31055 (*pred_<macc_nmsac><mode>_scalar): Ditto.
31056 (*pred_nmsac<mode>_scalar): Ditto.
31057 (*pred_mul_<optab><mode>_scalar): Ditto.
31058 (*pred_minus_mul<mode>_scalar): Ditto.
31059 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
31060 (*pred_nmsub<mode>_extended_scalar): Ditto.
31061 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
31062 (*pred_nmsac<mode>_extended_scalar): Ditto.
31063 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
31064 (*pred_minus_mul<mode>_extended_scalar): Ditto.
31065 (*pred_<madd_msub><mode>): Ditto.
31066 (*pred_<macc_msac><mode>): Ditto.
31067 (*pred_<madd_msub><mode>_scalar): Ditto.
31068 (*pred_<macc_msac><mode>_scalar): Ditto.
31069 (@pred_neg_mul_<optab><mode>): Ditto.
31070 (@pred_mul_neg_<optab><mode>): Ditto.
31071 (*pred_<nmadd_msub><mode>): Ditto.
31072 (*pred_<nmsub_nmadd><mode>): Ditto.
31073 (*pred_<nmacc_msac><mode>): Ditto.
31074 (*pred_<nmsac_nmacc><mode>): Ditto.
31075 (*pred_neg_mul_<optab><mode>): Ditto.
31076 (*pred_mul_neg_<optab><mode>): Ditto.
31077 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
31078 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
31079 (*pred_<nmadd_msub><mode>_scalar): Ditto.
31080 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
31081 (*pred_<nmacc_msac><mode>_scalar): Ditto.
31082 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
31083 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
31084 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
31085 (@pred_widen_neg_mul_<optab><mode>): Ditto.
31086 (@pred_widen_mul_neg_<optab><mode>): Ditto.
31087 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
31088 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
31090 2023-03-23 liuhongt <hongtao.liu@intel.com>
31092 * builtins.cc (builtin_memset_read_str): Replace
31093 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
31094 (builtin_memset_gen_str): Ditto.
31095 * config/i386/i386-expand.cc
31096 (ix86_convert_const_wide_int_to_broadcast): Replace
31097 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
31098 (ix86_expand_vector_move): Ditto.
31099 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
31101 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
31102 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
31103 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
31104 * doc/tm.texi.in: Ditto.
31105 * target.def: Ditto.
31107 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
31109 * lra.cc (lra): Do not repeat inheritance and live range splitting
31110 when asm error is found.
31112 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
31114 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
31115 (gcn_expand_dpp_distribute_even_insn)
31116 (gcn_expand_dpp_distribute_odd_insn): Declare.
31117 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
31118 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
31119 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
31120 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
31121 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
31122 (fms<mode>4_negop2): New patterns.
31123 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
31124 (gcn_expand_dpp_distribute_even_insn)
31125 (gcn_expand_dpp_distribute_odd_insn): New functions.
31126 * config/gcn/gcn.md: Add entries to unspec enum.
31128 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
31130 PR tree-optimization/109008
31131 * value-range.cc (frange::set): Add nan_state argument.
31132 * value-range.h (class nan_state): New.
31133 (frange::get_nan_state): New.
31135 2023-03-22 Martin Liska <mliska@suse.cz>
31137 * configure: Regenerate.
31139 2023-03-21 Joseph Myers <joseph@codesourcery.com>
31141 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
31144 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
31146 PR tree-optimization/109192
31147 * gimple-range-gori.cc (gori_compute::compute_operand_range):
31148 Terminate gori calculations if a relation is not relevant.
31149 * value-relation.h (value_relation::set_relation): Allow
31150 equality between op1 and op2 if they are the same.
31152 2023-03-21 Richard Biener <rguenther@suse.de>
31154 PR tree-optimization/109219
31155 * tree-vect-loop.cc (vectorizable_reduction): Check
31156 slp_node, not STMT_SLP_TYPE.
31157 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
31158 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
31159 Remove assertion on STMT_SLP_TYPE.
31161 2023-03-21 Jakub Jelinek <jakub@redhat.com>
31163 PR tree-optimization/109215
31164 * tree.h (enum special_array_member): Adjust comments for int_0
31166 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
31167 has zero sized element type and the array has variable number of
31168 elements or constant one or more elements.
31169 (component_ref_size): Adjust comments, formatting fix.
31171 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31173 * configure.ac: Add check for the Texinfo 6.8
31174 CONTENTS_OUTPUT_LOCATION customization variable and set it if
31176 * configure: Regenerate.
31177 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
31178 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
31179 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
31180 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
31182 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31184 * doc/extend.texi: Associate use_hazard_barrier_return index
31185 entry with its attribute.
31186 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
31189 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31191 * doc/implement-c.texi: Remove usage of @gol.
31192 * doc/invoke.texi: Ditto.
31193 * doc/sourcebuild.texi: Ditto.
31194 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
31195 texinfo.tex versions, the bug it was working around appears to
31198 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31200 * doc/include/texinfo.tex: Update to 2023-01-17.19.
31202 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31204 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
31205 @enddefbuiltin for defining built-in functions.
31206 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
31207 places where it should be used.
31209 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31211 * doc/extend.texi (Formatted Output Function Checking): New
31212 subsection for grouping together printf et al.
31213 (Exception handling) Fix missing @ sign before copyright
31214 header, which lead to the copyright line leaking into
31215 '(gcc)Exception handling'.
31216 * doc/gcc.texi: Set document language to en_US.
31217 (@copying): Wrap front cover texts in quotations, move in manual
31220 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
31222 * doc/gcc.texi: Add the Indices appendix, to make texinfo
31223 generate nice indices overview page.
31225 2023-03-21 Richard Biener <rguenther@suse.de>
31227 PR tree-optimization/109170
31228 * gimple-range-op.cc (cfn_pass_through_arg1): New.
31229 (gimple_range_op_handler::maybe_builtin_call): Handle
31230 __builtin_expect via cfn_pass_through_arg1.
31232 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
31235 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
31236 (init_float128_ieee): Delete code to switch complex multiply and divide
31238 (complex_multiply_builtin_code): New helper function.
31239 (complex_divide_builtin_code): Likewise.
31240 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
31241 of complex 128-bit multiply and divide built-in functions.
31243 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
31246 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
31248 2023-03-19 Jonny Grant <jg@jguk.org>
31250 * doc/extend.texi (Common Function Attributes) <nonnull>:
31253 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
31255 PR rtl-optimization/109179
31256 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
31257 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
31259 2023-03-17 Jakub Jelinek <jakub@redhat.com>
31262 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
31264 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
31265 to allocate_struct_function instead of false.
31266 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
31267 nor DECL_RESULT here. Pass true as ABSTRACT_P to
31268 push_struct_function. Call targetm.target_option.relayout_function
31270 (tree_function_versioning): Formatting fix.
31272 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
31274 * lra-constraints.cc: Include hooks.h.
31275 (combine_reload_insn): New function.
31276 (lra_constraints): Call it.
31278 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31279 kito-cheng <kito.cheng@sifive.com>
31281 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
31282 as legitimate value.
31283 * config/riscv/riscv-vector-builtins.cc
31284 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
31285 (function_expander::use_widen_ternop_insn): Ditto.
31286 * config/riscv/vector.md (@vundefined<mode>): New pattern.
31287 (pred_mul_<optab><mode>_undef_merge): Remove.
31288 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
31289 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
31290 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
31291 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
31293 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31296 * config/riscv/riscv.md: Fix subreg bug.
31298 2023-03-17 Jakub Jelinek <jakub@redhat.com>
31300 PR middle-end/108685
31301 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
31302 use its loop_father rather than BODY_BB's loop_father.
31303 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
31304 If broken_loop with ordered > collapse and at least one of those
31305 extra loops aren't guaranteed to have at least one iteration, change
31306 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
31307 loop_father to l0_bb's loop_father rather than l1_bb's.
31309 2023-03-17 Jakub Jelinek <jakub@redhat.com>
31312 * gdbhooks.py (TreePrinter.to_string): Wrap
31313 gdb.parse_and_eval('tree_code_type') in a try block, parse
31314 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
31315 raises exception. Update comments for the recent tree_code_type
31318 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
31320 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
31321 issues. Add more line breaks to example so it doesn't overflow
31324 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
31326 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
31327 line breaks in examples.
31328 <malloc>: Fix bad line breaks in running text, also copy-edit
31330 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
31331 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
31333 (C++ Dialect Options) <-fcontracts>: Add line break in example.
31334 <-Wctad-maybe-unsupported>: Likewise.
31335 <-Winvalid-constexpr>: Likewise.
31336 (Warning Options) <-Wdangling-pointer>: Likewise.
31337 <-Winterference-size>: Likewise.
31338 <-Wvla-parameter>: Likewise.
31339 (Static Analyzer Options): Fix bad line breaks in running text,
31340 plus add some missing markup.
31341 (Optimize Options) <openacc-privatization>: Fix more bad line
31342 breaks in running text.
31344 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
31346 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
31347 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
31348 (expand_vec_perm_2perm_pblendv): Ditto.
31350 2023-03-16 Martin Liska <mliska@suse.cz>
31352 PR middle-end/106133
31353 * gcc.cc (driver_handle_option): Use x_main_input_basename
31354 if x_dump_base_name is null.
31355 * opts.cc (common_handle_option): Likewise.
31357 2023-03-16 Richard Biener <rguenther@suse.de>
31359 PR tree-optimization/109123
31360 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
31361 Do not emit -Wuse-after-free late.
31362 (pass_waccess::check_call): Always check call pointer uses.
31364 2023-03-16 Richard Biener <rguenther@suse.de>
31366 PR tree-optimization/109141
31367 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
31368 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
31370 (renumber_gimple_stmt_uids): ... here and
31371 (renumber_gimple_stmt_uids_in_blocks): ... here.
31372 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
31373 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
31375 (pass_waccess::check_pointer_uses): Process all PHIs.
31377 2023-03-15 David Malcolm <dmalcolm@redhat.com>
31380 * diagnostic-format-sarif.cc (class sarif_invocation): New.
31381 (class sarif_ice_notification): New.
31382 (sarif_builder::m_invocation_obj): New field.
31383 (sarif_invocation::add_notification_for_ice): New.
31384 (sarif_invocation::prepare_to_flush): New.
31385 (sarif_ice_notification::sarif_ice_notification): New.
31386 (sarif_builder::sarif_builder): Add m_invocation_obj.
31387 (sarif_builder::end_diagnostic): Special-case DK_ICE and
31389 (sarif_builder::flush_to_file): Call prepare_to_flush on
31390 m_invocation_obj. Pass the latter to make_top_level_object.
31391 (sarif_builder::make_result_object): Move creation of "locations"
31393 (sarif_builder::make_locations_arr): ...this new function.
31394 (sarif_builder::make_top_level_object): Add "invocation_obj" param
31395 and pass it to make_run_object.
31396 (sarif_builder::make_run_object): Add "invocation_obj" param and
31398 (sarif_ice_handler): New callback.
31399 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
31400 * diagnostic.cc (diagnostic_initialize): Initialize new field
31402 (diagnostic_action_after_output): If it is set, make one attempt
31403 to call ice_handler_cb.
31404 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
31406 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
31408 * config/i386/i386-expand.cc (expand_vec_perm_blend):
31409 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
31410 and fix V2HImode handling.
31411 (expand_vec_perm_1): Try to emit BLEND instruction
31412 before MOVSS/MOVSD.
31413 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
31415 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
31417 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
31419 2023-03-15 Richard Biener <rguenther@suse.de>
31421 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
31422 Do not diagnose clobbers.
31424 2023-03-15 Richard Biener <rguenther@suse.de>
31426 PR tree-optimization/109139
31427 * tree-ssa-live.cc (remove_unused_locals): Look at the
31428 base address for unused decls on the LHS of .DEFERRED_INIT.
31430 2023-03-15 Xi Ruoyao <xry111@xry111.site>
31433 * builtins.cc (inline_string_cmp): Force the character
31434 difference into "result" pseudo-register, instead of reassign
31435 the pseudo-register.
31437 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31439 * config.gcc: Add thead.o to RISC-V extra_objs.
31440 * config/riscv/peephole.md: Add mempair peephole passes.
31441 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
31443 (th_mempair_operands_p): Likewise.
31444 (th_mempair_order_operands): Likewise.
31445 (th_mempair_prepare_save_restore_operands): Likewise.
31446 (th_mempair_save_restore_regs): Likewise.
31447 (th_mempair_output_move): Likewise.
31448 * config/riscv/riscv.cc (riscv_save_reg): Move code.
31449 (riscv_restore_reg): Move code.
31450 (riscv_for_each_saved_reg): Add code to emit mempair insns.
31451 * config/riscv/t-riscv: Add thead.cc.
31452 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
31454 (*th_mempair_store_<GPR:mode>2): Likewise.
31455 (*th_mempair_load_extendsidi2): Likewise.
31456 (*th_mempair_load_zero_extendsidi2): Likewise.
31457 * config/riscv/thead.cc: New file.
31459 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31461 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
31462 New constraint "th_f_fmv".
31463 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
31465 * config/riscv/riscv.cc (riscv_split_doubleword_move):
31466 Add split code for XTheadFmv.
31467 (riscv_secondary_memory_needed): XTheadFmv does not need
31469 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
31470 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
31471 movdf_hardfloat_rv32.
31472 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
31473 (th_fmv_x_w): New INSN.
31474 (th_fmv_x_hw): New INSN.
31476 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31478 * config/riscv/riscv.md (maddhisi4): New expand.
31479 (msubhisi4): New expand.
31480 * config/riscv/thead.md (*th_mula<mode>): New pattern.
31481 (*th_mulawsi): New pattern.
31482 (*th_mulawsi2): New pattern.
31483 (*th_maddhisi4): New pattern.
31484 (*th_sextw_maddhisi4): New pattern.
31485 (*th_muls<mode>): New pattern.
31486 (*th_mulswsi): New pattern.
31487 (*th_mulswsi2): New pattern.
31488 (*th_msubhisi4): New pattern.
31489 (*th_sextw_msubhisi4): New pattern.
31491 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31493 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
31494 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
31496 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
31498 (riscv_expand_conditional_move): New function.
31499 (riscv_expand_conditional_move_onesided): New function.
31500 * config/riscv/riscv.md: Add support for XTheadCondMov.
31501 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
31502 support for XTheadCondMov.
31503 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
31505 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31507 * config/riscv/bitmanip.md (clzdi2): New expand.
31508 (clzsi2): New expand.
31509 (ctz<mode>2): New expand.
31510 (popcount<mode>2): New expand.
31511 (<bitmanip_optab>si2): Rename INSN.
31512 (*<bitmanip_optab>si2): Hide INSN name.
31513 (<bitmanip_optab>di2): Rename INSN.
31514 (*<bitmanip_optab>di2): Hide INSN name.
31515 (rotrsi3): Remove INSN.
31516 (rotr<mode>3): Add expand.
31517 (*rotrsi3): New INSN.
31518 (rotrdi3): Rename INSN.
31519 (*rotrdi3): Hide INSN name.
31520 (rotrsi3_sext): Rename INSN.
31521 (*rotrsi3_sext): Hide INSN name.
31522 (bswap<mode>2): Remove INSN.
31523 (bswapdi2): Add expand.
31524 (bswapsi2): Add expand.
31525 (*bswap<mode>2): Hide INSN name.
31526 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
31528 * config/riscv/riscv.md (extv<mode>): New expand.
31529 (extzv<mode>): New expand.
31530 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
31531 (*th_ext<mode>): New INSN.
31532 (*th_extu<mode>): New INSN.
31533 (*th_clz<mode>2): New INSN.
31534 (*th_rev<mode>2): New INSN.
31536 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31538 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
31539 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
31541 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31543 * config/riscv/riscv.md: Include thead.md
31544 * config/riscv/thead.md: New file.
31546 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31548 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
31550 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
31552 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
31553 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
31554 (MASK_XTHEADBB): New.
31555 (MASK_XTHEADBS): New.
31556 (MASK_XTHEADCMO): New.
31557 (MASK_XTHEADCONDMOV): New.
31558 (MASK_XTHEADFMEMIDX): New.
31559 (MASK_XTHEADFMV): New.
31560 (MASK_XTHEADINT): New.
31561 (MASK_XTHEADMAC): New.
31562 (MASK_XTHEADMEMIDX): New.
31563 (MASK_XTHEADMEMPAIR): New.
31564 (MASK_XTHEADSYNC): New.
31565 (TARGET_XTHEADBA): New.
31566 (TARGET_XTHEADBB): New.
31567 (TARGET_XTHEADBS): New.
31568 (TARGET_XTHEADCMO): New.
31569 (TARGET_XTHEADCONDMOV): New.
31570 (TARGET_XTHEADFMEMIDX): New.
31571 (TARGET_XTHEADFMV): New.
31572 (TARGET_XTHEADINT): New.
31573 (TARGET_XTHEADMAC): New.
31574 (TARGET_XTHEADMEMIDX): New.
31575 (TARGET_XTHEADMEMPAIR): new.
31576 (TARGET_XTHEADSYNC): New.
31577 * config/riscv/riscv.opt: Add riscv_xthead_subext.
31579 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
31582 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
31583 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
31584 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
31586 2023-03-14 Jakub Jelinek <jakub@redhat.com>
31589 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
31590 when lo is equal to dhi and hi is a MEM which uses dlo register.
31592 2023-03-14 Martin Jambor <mjambor@suse.cz>
31595 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
31596 global0 instead of zeroing when it does not have as many counts as
31599 2023-03-14 Martin Jambor <mjambor@suse.cz>
31602 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
31603 ipa count, remove assert, lenient_count_portion_handling, dump
31604 also orig_node_count.
31606 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
31608 * config/i386/i386-expand.cc (expand_vec_perm_movs):
31609 Handle V2SImode for TARGET_MMX_WITH_SSE.
31610 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
31611 using V2FI mode iterator to handle both V2SI and V2SF modes.
31613 2023-03-14 Sam James <sam@gentoo.org>
31615 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
31616 including <sstream> earlier.
31617 * system.h: Add INCLUDE_SSTREAM.
31619 2023-03-14 Richard Biener <rguenther@suse.de>
31621 * tree-ssa-live.cc (remove_unused_locals): Do not treat
31622 the .DEFERRED_INIT of a variable as use, instead remove
31623 that if it is the only use.
31625 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
31627 PR rtl-optimization/107762
31628 * expr.cc (emit_group_store): Revert latest change.
31630 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
31632 PR tree-optimization/109005
31633 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
31634 aggregate type check.
31636 2023-03-14 Jakub Jelinek <jakub@redhat.com>
31638 PR tree-optimization/109115
31639 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
31640 r.upper_bound () on r.undefined_p () range.
31642 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
31644 PR tree-optimization/106896
31645 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
31646 implementatoin with probability_in; avoid some asserts.
31648 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
31650 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
31652 2023-03-13 Sean Bright <sean@seanbright.com>
31654 * doc/invoke.texi (Warning Options): Remove errant 'See'
31657 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
31659 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
31660 REG_OK_FOR_BASE_P): Remove.
31662 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31664 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
31665 (=vd,vd,vr,vr): Ditto.
31666 * config/riscv/vector.md: Ditto.
31668 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31670 * config/riscv/riscv-vector-builtins.cc
31671 (function_expander::use_compare_insn): Add operand predicate check.
31673 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31675 * config/riscv/vector.md: Fine tune RA constraints.
31677 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
31679 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
31680 hsaco assemble/link.
31682 2023-03-13 Richard Biener <rguenther@suse.de>
31684 PR tree-optimization/109046
31685 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
31686 piecewise complex loads.
31688 2023-03-12 Jakub Jelinek <jakub@redhat.com>
31690 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
31691 (aarch64_bf16_ptr_type_node): Adjust comment.
31692 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
31693 bfloat16_type_node rather than aarch64_bf16_type_node.
31694 (aarch64_libgcc_floating_mode_supported_p,
31695 aarch64_scalar_mode_supported_p): Also support BFmode.
31696 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
31697 (aarch64_invalid_binary_op): Remove BFmode related rejections.
31698 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
31699 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
31700 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
31701 aarch64_bf16_type_node.
31702 (aarch64_init_simd_builtin_types): Likewise.
31703 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
31704 which is created in tree.cc already.
31705 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
31707 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
31709 PR middle-end/109031
31710 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
31711 ensure that the type of x is as wide or wider than the type of a.
31713 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31716 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
31717 (*bitmask_shift_plus<mode>): New.
31718 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
31719 (@aarch64_bitmask_udiv<mode>3): Remove.
31720 * config/aarch64/aarch64.cc
31721 (aarch64_vectorize_can_special_div_by_constant,
31722 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
31723 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
31724 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
31726 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31729 * target.def (preferred_div_as_shifts_over_mult): New.
31730 * doc/tm.texi.in: Document it.
31731 * doc/tm.texi: Regenerate.
31732 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
31733 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
31734 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
31736 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31737 Richard Sandiford <richard.sandiford@arm.com>
31740 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
31743 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31744 Andrew MacLeod <amacleod@redhat.com>
31747 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
31748 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
31750 (gimple_range_op_handler::maybe_non_standard): New.
31751 * range-op.cc (class operator_widen_plus_signed,
31752 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
31753 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
31754 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
31755 operator_widen_mult_unsigned::wi_fold,
31756 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
31757 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
31758 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
31759 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
31761 2023-03-12 Tamar Christina <tamar.christina@arm.com>
31764 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
31765 * doc/tm.texi.in: Likewise.
31766 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
31767 * expmed.cc (expand_divmod): Likewise.
31768 * expmed.h (expand_divmod): Likewise.
31769 * expr.cc (force_operand, expand_expr_divmod): Likewise.
31770 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
31771 * target.def (can_special_div_by_const): Remove.
31772 * target.h: Remove tree-core.h include
31773 * targhooks.cc (default_can_special_div_by_const): Remove.
31774 * targhooks.h (default_can_special_div_by_const): Remove.
31775 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
31776 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
31777 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
31779 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
31781 * doc/install.texi2html: Fix issue number typo in comment.
31783 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
31785 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
31788 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
31790 * doc/invoke.texi (Optimize Options): Add markup to
31791 description of asan-kernel-mem-intrinsic-prefix, and clarify
31794 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
31796 * doc/extend.texi (Named Address Spaces): Drop a redundant link
31799 2023-03-11 Jeff Law <jlaw@ventanamicro>
31802 * doc/extend.texi: Clarify Attribute Syntax a bit.
31804 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
31806 * doc/install.texi (Prerequisites): Suggest using newer versions
31808 (Final install): Clean up and modernize discussion of how to
31809 build or obtain the GCC manuals.
31810 * doc/install.texi2html: Update comment to point to the PR instead
31811 of "makeinfo 4.7 brokenness" (it's not specific to that version).
31813 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31816 * optabs.cc (expand_fix): For conversions from BFmode to integral,
31817 use shifts to convert it to SFmode first and then convert SFmode
31820 2023-03-10 Andrew Pinski <apinski@marvell.com>
31822 * config/aarch64/aarch64.md: Add a new define_split
31825 2023-03-10 Richard Biener <rguenther@suse.de>
31827 * tree-ssa-structalias.cc (solve_graph): Immediately
31828 iterate self-cycles.
31830 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31832 PR tree-optimization/109008
31833 * range-op-float.cc (float_widen_lhs_range): If not
31834 -frounding-math and not IBM double double format, extend lhs
31835 range just by 0.5ulp rather than 1ulp in each direction.
31837 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31840 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
31842 * config/i386/t-cygwin-w64: Remove.
31844 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31847 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
31848 C++14, don't declare as extern const arrays.
31849 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
31850 static constexpr member arrays for C++11 or C++14.
31851 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
31852 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
31853 (TREE_CODE_LENGTH): For C++11 or C++14 use
31854 tree_code_length_tmpl <0>::tree_code_length instead of
31856 * tree.cc (tree_code_type, tree_code_length): Remove.
31858 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31861 * common.opt (fcanon-prefix-map): New option.
31862 * opts.cc: Include file-prefix-map.h.
31863 (flag_canon_prefix_map): New variable.
31864 (common_handle_option): Handle OPT_fcanon_prefix_map.
31865 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
31866 * file-prefix-map.h (flag_canon_prefix_map): Declare.
31867 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
31869 (add_prefix_map): Initialize canonicalize member from
31870 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
31871 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
31872 use lrealpath result only for map->canonicalize map entries.
31873 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
31874 * opts-global.cc (handle_common_deferred_options): Clear
31875 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
31876 * doc/invoke.texi (-fcanon-prefix-map): Document.
31877 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
31878 see also for -fcanon-prefix-map.
31879 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
31881 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31884 * cgraphunit.cc (check_global_declaration): Don't warn for unused
31885 variables which have OPT_Wunused_variable warning suppressed.
31887 2023-03-10 Jakub Jelinek <jakub@redhat.com>
31889 PR tree-optimization/109008
31890 * range-op-float.cc (float_widen_lhs_range): If lb is
31891 minimum representable finite number or ub is maximum
31892 representable finite number, instead of widening it to
31893 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
31894 Temporarily clear flag_finite_math_only when canonicalizing
31897 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31899 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
31900 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
31901 (gimple_fold_builtin): Ditto.
31902 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
31903 (class vleff): Ditto.
31905 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
31906 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
31908 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
31909 (struct fault_load_def): Ditto.
31911 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
31912 * config/riscv/riscv-vector-builtins.cc
31913 (rvv_arg_type_info::get_tree_type): Add size_ptr.
31914 (gimple_folder::gimple_folder): New class.
31915 (gimple_folder::fold): Ditto.
31916 (gimple_fold_builtin): New function.
31917 (get_read_vl_instance): Ditto.
31918 (get_read_vl_decl): Ditto.
31919 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
31920 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
31921 (get_read_vl_instance): New function.
31922 (get_read_vl_decl): Ditto.
31923 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
31924 (read_vl_insn_p): Ditto.
31925 (available_occurrence_p): Ditto.
31926 (backward_propagate_worthwhile_p): Ditto.
31927 (gen_vsetvl_pat): Adapt for vleff support.
31928 (get_forward_read_vl_insn): New function.
31929 (get_backward_fault_first_load_insn): Ditto.
31930 (source_equal_p): Adapt for vleff support.
31931 (first_ratio_invalid_for_second_sew_p): Remove.
31932 (first_ratio_invalid_for_second_lmul_p): Ditto.
31933 (first_lmul_less_than_second_lmul_p): Ditto.
31934 (first_ratio_less_than_second_ratio_p): Ditto.
31935 (support_relaxed_compatible_p): New function.
31936 (vector_insn_info::operator>): Remove.
31937 (vector_insn_info::operator>=): Refine.
31938 (vector_insn_info::parse_insn): Adapt for vleff support.
31939 (vector_insn_info::compatible_p): Ditto.
31940 (vector_insn_info::update_fault_first_load_avl): New function.
31941 (pass_vsetvl::transfer_after): Adapt for vleff support.
31942 (pass_vsetvl::demand_fusion): Ditto.
31943 (pass_vsetvl::cleanup_insns): Ditto.
31944 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
31945 redundant condtions.
31946 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
31947 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
31948 * config/riscv/riscv.md: Adapt for vleff support.
31949 * config/riscv/t-riscv: Ditto.
31950 * config/riscv/vector-iterators.md: New iterator.
31951 * config/riscv/vector.md (read_vlsi): New pattern.
31952 (read_vldi_zero_extend): Ditto.
31953 (@pred_fault_load<mode>): Ditto.
31955 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31957 * config/riscv/riscv-vector-builtins.cc
31958 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
31959 (function_expander::use_widen_ternop_insn): Ditto.
31960 * optabs.cc (maybe_gen_insn): Extend nops handling.
31962 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31964 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
31965 patterns according to RVV ISA.
31966 * config/riscv/vector-iterators.md: New iterators.
31967 * config/riscv/vector.md
31968 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
31969 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
31970 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
31971 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
31972 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
31973 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
31974 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
31975 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
31976 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
31977 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
31978 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
31979 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
31980 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
31981 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
31983 2023-03-10 Michael Collison <collison@rivosinc.com>
31985 * tree-vect-loop-manip.cc (vect_do_peeling): Use
31986 result of constant_lower_bound instead of vf for the lower
31987 bound of the epilog loop trip count.
31989 2023-03-09 Tamar Christina <tamar.christina@arm.com>
31991 * passes.cc (emergency_dump_function): Finish graph generation.
31993 2023-03-09 Tamar Christina <tamar.christina@arm.com>
31995 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
31996 and bottom bit only.
31998 2023-03-09 Andrew Pinski <apinski@marvell.com>
32000 PR tree-optimization/108980
32001 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
32002 Reorgnize the call to warning for not strict flexible arrays
32003 to be before the check of warned.
32005 2023-03-09 Jason Merrill <jason@redhat.com>
32007 * doc/extend.texi: Comment out __is_deducible docs.
32009 2023-03-09 Jason Merrill <jason@redhat.com>
32012 * doc/extend.texi (Type Traits):: Document __is_deducible.
32014 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
32017 * config.host: add object for x86_64-*-mingw*.
32018 * config/i386/sym-mingw32.cc: dummy file to attach
32020 * config/i386/utf8-mingw32.rc: windres resource file.
32021 * config/i386/winnt-utf8.manifest: XML manifest to
32023 * config/i386/x-mingw32: reference to x-mingw32-utf8.
32024 * config/i386/x-mingw32-utf8: Makefile fragment to
32025 embed UTF-8 manifest.
32027 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
32029 * lra-constraints.cc (process_alt_operands): Use operand modes for
32030 clobbered regs instead of the biggest access mode.
32032 2023-03-09 Richard Biener <rguenther@suse.de>
32034 PR middle-end/108995
32035 * fold-const.cc (extract_muldiv_1): Avoid folding
32036 (CST * b) / CST2 when sanitizing overflow and we rely on
32037 overflow being undefined.
32039 2023-03-09 Jakub Jelinek <jakub@redhat.com>
32040 Richard Biener <rguenther@suse.de>
32042 PR tree-optimization/109008
32043 * range-op-float.cc (float_widen_lhs_range): New function.
32044 (foperator_plus::op1_range, foperator_minus::op1_range,
32045 foperator_minus::op2_range, foperator_mult::op1_range,
32046 foperator_div::op1_range, foperator_div::op2_range): Use it.
32048 2023-03-07 Jonathan Grant <jg@jguk.org>
32051 * doc/invoke.texi (Instrumentation Options): Clarify
32052 LeakSanitizer behavior.
32054 2023-03-07 Benson Muite <benson_muite@emailplus.org>
32056 * doc/install.texi (Prerequisites): Add link to gmplib.org.
32058 2023-03-07 Pan Li <pan2.li@intel.com>
32059 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32063 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
32065 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
32066 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
32067 * genmodes.cc (adj_precision): New.
32068 (ADJUST_PRECISION): New.
32069 (emit_mode_adjustments): Handle ADJUST_PRECISION.
32071 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
32073 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
32075 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
32077 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
32078 {s|u}{max|min} in QI, HI and DI modes.
32079 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
32080 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
32081 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
32082 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
32085 2023-03-06 Richard Biener <rguenther@suse.de>
32087 PR tree-optimization/109025
32088 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
32089 the inner LC PHI use is the inner loop PHI latch definition
32090 before classifying an outer PHI as double reduction.
32092 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
32095 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
32097 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
32098 (X86_TUNE_USE_SCATTER): Likewise.
32100 2023-03-06 Xi Ruoyao <xry111@xry111.site>
32103 * config/loongarch/loongarch.h (FP_RETURN): Use
32104 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
32105 (UNITS_PER_FP_ARG): Likewise.
32107 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32109 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
32110 (pass_vsetvl::backward_demand_fusion): Ditto.
32112 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32113 SiYu Wu <siyu@isrc.iscas.ac.cn>
32115 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
32117 (riscv_sm3p1_<mode>): New.
32118 (riscv_sm4ed_<mode>): New.
32119 (riscv_sm4ks_<mode>): New.
32120 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
32121 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
32122 ZKSH's built-in functions.
32124 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32125 SiYu Wu <siyu@isrc.iscas.ac.cn>
32127 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
32128 (riscv_sha256sig1_<mode>): New.
32129 (riscv_sha256sum0_<mode>): New.
32130 (riscv_sha256sum1_<mode>): New.
32131 (riscv_sha512sig0h): New.
32132 (riscv_sha512sig0l): New.
32133 (riscv_sha512sig1h): New.
32134 (riscv_sha512sig1l): New.
32135 (riscv_sha512sum0r): New.
32136 (riscv_sha512sum1r): New.
32137 (riscv_sha512sig0): New.
32138 (riscv_sha512sig1): New.
32139 (riscv_sha512sum0): New.
32140 (riscv_sha512sum1): New.
32141 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
32142 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
32143 built-in functions.
32144 (DIRECT_BUILTIN): Add new.
32146 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32147 SiYu Wu <siyu@isrc.iscas.ac.cn>
32149 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
32151 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
32152 (riscv_aes32dsmi): New.
32153 (riscv_aes64ds): New.
32154 (riscv_aes64dsm): New.
32155 (riscv_aes64im): New.
32156 (riscv_aes64ks1i): New.
32157 (riscv_aes64ks2): New.
32158 (riscv_aes32esi): New.
32159 (riscv_aes32esmi): New.
32160 (riscv_aes64es): New.
32161 (riscv_aes64esm): New.
32162 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
32163 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
32164 ZKNE's built-in functions.
32166 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32167 SiYu Wu <siyu@isrc.iscas.ac.cn>
32169 * config/riscv/bitmanip.md: Add ZBKB's instructions.
32170 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
32171 * config/riscv/riscv.md: Add new type for crypto instructions.
32172 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
32174 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
32175 extension's built-in function file.
32177 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
32178 SiYu Wu <siyu@isrc.iscas.ac.cn>
32180 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
32181 (RISCV_FTYPE_NAME3): New.
32182 (RISCV_ATYPE_QI): New.
32183 (RISCV_ATYPE_HI): New.
32184 (RISCV_FTYPE_ATYPES2): New.
32185 (RISCV_FTYPE_ATYPES3): New.
32186 * config/riscv/riscv-ftypes.def (2): New.
32189 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
32191 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
32194 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32195 kito-cheng <kito.cheng@sifive.com>
32197 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
32198 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
32199 (riscv_register_pragmas): Add builtin function check call.
32200 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
32201 (check_builtin_call): New function.
32202 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
32203 (class vreinterpret): Ditto.
32204 (class vlmul_ext): Ditto.
32205 (class vlmul_trunc): Ditto.
32206 (class vset): Ditto.
32207 (class vget): Ditto.
32209 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32210 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
32226 (vundefined): Add new intrinsic.
32227 (vreinterpret): Ditto.
32228 (vlmul_ext): Ditto.
32229 (vlmul_trunc): Ditto.
32232 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
32233 (struct narrow_alu_def): Ditto.
32234 (struct reduc_alu_def): Ditto.
32235 (struct vundefined_def): Ditto.
32236 (struct misc_def): Ditto.
32237 (struct vset_def): Ditto.
32238 (struct vget_def): Ditto.
32240 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32241 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
32242 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
32243 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
32244 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
32245 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
32246 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
32247 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
32248 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
32249 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
32250 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
32251 (DEF_RVV_LMUL1_OPS): Ditto.
32252 (DEF_RVV_LMUL2_OPS): Ditto.
32253 (DEF_RVV_LMUL4_OPS): Ditto.
32254 (vint16mf4_t): Ditto.
32255 (vint16mf2_t): Ditto.
32256 (vint16m1_t): Ditto.
32257 (vint16m2_t): Ditto.
32258 (vint16m4_t): Ditto.
32259 (vint16m8_t): Ditto.
32260 (vint32mf2_t): Ditto.
32261 (vint32m1_t): Ditto.
32262 (vint32m2_t): Ditto.
32263 (vint32m4_t): Ditto.
32264 (vint32m8_t): Ditto.
32265 (vint64m1_t): Ditto.
32266 (vint64m2_t): Ditto.
32267 (vint64m4_t): Ditto.
32268 (vint64m8_t): Ditto.
32269 (vuint16mf4_t): Ditto.
32270 (vuint16mf2_t): Ditto.
32271 (vuint16m1_t): Ditto.
32272 (vuint16m2_t): Ditto.
32273 (vuint16m4_t): Ditto.
32274 (vuint16m8_t): Ditto.
32275 (vuint32mf2_t): Ditto.
32276 (vuint32m1_t): Ditto.
32277 (vuint32m2_t): Ditto.
32278 (vuint32m4_t): Ditto.
32279 (vuint32m8_t): Ditto.
32280 (vuint64m1_t): Ditto.
32281 (vuint64m2_t): Ditto.
32282 (vuint64m4_t): Ditto.
32283 (vuint64m8_t): Ditto.
32284 (vint8mf4_t): Ditto.
32285 (vint8mf2_t): Ditto.
32286 (vint8m1_t): Ditto.
32287 (vint8m2_t): Ditto.
32288 (vint8m4_t): Ditto.
32289 (vint8m8_t): Ditto.
32290 (vuint8mf4_t): Ditto.
32291 (vuint8mf2_t): Ditto.
32292 (vuint8m1_t): Ditto.
32293 (vuint8m2_t): Ditto.
32294 (vuint8m4_t): Ditto.
32295 (vuint8m8_t): Ditto.
32296 (vint8mf8_t): Ditto.
32297 (vuint8mf8_t): Ditto.
32298 (vfloat32mf2_t): Ditto.
32299 (vfloat32m1_t): Ditto.
32300 (vfloat32m2_t): Ditto.
32301 (vfloat32m4_t): Ditto.
32302 (vfloat64m1_t): Ditto.
32303 (vfloat64m2_t): Ditto.
32304 (vfloat64m4_t): Ditto.
32305 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
32306 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
32307 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
32308 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
32309 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
32310 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
32311 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
32312 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
32313 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
32314 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
32315 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
32316 (DEF_RVV_LMUL1_OPS): Ditto.
32317 (DEF_RVV_LMUL2_OPS): Ditto.
32318 (DEF_RVV_LMUL4_OPS): Ditto.
32319 (DEF_RVV_TYPE_INDEX): Ditto.
32320 (required_extensions_p): Adapt for new intrinsic support/
32321 (get_required_extensions): New function.
32322 (check_required_extensions): Ditto.
32323 (unsigned_base_type_p): Remove.
32324 (rvv_arg_type_info::get_scalar_ptr_type): New function.
32325 (get_mode_for_bitsize): Remove.
32326 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
32327 (rvv_arg_type_info::get_base_vector_type): Ditto.
32328 (rvv_arg_type_info::get_function_type_index): Ditto.
32329 (DEF_RVV_BASE_TYPE): New def.
32330 (function_builder::apply_predication): New class.
32331 (function_expander::mask_mode): Ditto.
32332 (function_checker::function_checker): Ditto.
32333 (function_checker::report_non_ice): Ditto.
32334 (function_checker::report_out_of_range): Ditto.
32335 (function_checker::require_immediate): Ditto.
32336 (function_checker::require_immediate_range): Ditto.
32337 (function_checker::check): Ditto.
32338 (check_builtin_call): Ditto.
32339 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
32340 (DEF_RVV_BASE_TYPE): Ditto.
32341 (DEF_RVV_TYPE_INDEX): Ditto.
32342 (vbool64_t): Ditto.
32343 (vbool32_t): Ditto.
32344 (vbool16_t): Ditto.
32349 (vuint8mf8_t): Ditto.
32350 (vuint8mf4_t): Ditto.
32351 (vuint8mf2_t): Ditto.
32352 (vuint8m1_t): Ditto.
32353 (vuint8m2_t): Ditto.
32354 (vint8m4_t): Ditto.
32355 (vuint8m4_t): Ditto.
32356 (vint8m8_t): Ditto.
32357 (vuint8m8_t): Ditto.
32358 (vint16mf4_t): Ditto.
32359 (vuint16mf2_t): Ditto.
32360 (vuint16m1_t): Ditto.
32361 (vuint16m2_t): Ditto.
32362 (vuint16m4_t): Ditto.
32363 (vuint16m8_t): Ditto.
32364 (vint32mf2_t): Ditto.
32365 (vuint32m1_t): Ditto.
32366 (vuint32m2_t): Ditto.
32367 (vuint32m4_t): Ditto.
32368 (vuint32m8_t): Ditto.
32369 (vuint64m1_t): Ditto.
32370 (vuint64m2_t): Ditto.
32371 (vuint64m4_t): Ditto.
32372 (vuint64m8_t): Ditto.
32373 (vfloat32mf2_t): Ditto.
32374 (vfloat32m1_t): Ditto.
32375 (vfloat32m2_t): Ditto.
32376 (vfloat32m4_t): Ditto.
32377 (vfloat32m8_t): Ditto.
32378 (vfloat64m1_t): Ditto.
32379 (vfloat64m4_t): Ditto.
32380 (vector): Move it def.
32383 (signed_vector): Ditto.
32384 (unsigned_vector): Ditto.
32385 (unsigned_scalar): Ditto.
32386 (vector_ptr): Ditto.
32387 (scalar_ptr): Ditto.
32388 (scalar_const_ptr): Ditto.
32392 (unsigned_long): Ditto.
32394 (eew8_index): Ditto.
32395 (eew16_index): Ditto.
32396 (eew32_index): Ditto.
32397 (eew64_index): Ditto.
32398 (shift_vector): Ditto.
32399 (double_trunc_vector): Ditto.
32400 (quad_trunc_vector): Ditto.
32401 (oct_trunc_vector): Ditto.
32402 (double_trunc_scalar): Ditto.
32403 (double_trunc_signed_vector): Ditto.
32404 (double_trunc_unsigned_vector): Ditto.
32405 (double_trunc_unsigned_scalar): Ditto.
32406 (double_trunc_float_vector): Ditto.
32407 (float_vector): Ditto.
32408 (lmul1_vector): Ditto.
32409 (widen_lmul1_vector): Ditto.
32410 (eew8_interpret): Ditto.
32411 (eew16_interpret): Ditto.
32412 (eew32_interpret): Ditto.
32413 (eew64_interpret): Ditto.
32414 (vlmul_ext_x2): Ditto.
32415 (vlmul_ext_x4): Ditto.
32416 (vlmul_ext_x8): Ditto.
32417 (vlmul_ext_x16): Ditto.
32418 (vlmul_ext_x32): Ditto.
32419 (vlmul_ext_x64): Ditto.
32420 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
32421 (struct function_type_info): New function.
32422 (struct rvv_arg_type_info): Ditto.
32423 (class function_checker): New class.
32424 (rvv_arg_type_info::get_scalar_type): New function.
32425 (rvv_arg_type_info::get_vector_type): Ditto.
32426 (function_expander::ret_mode): New function.
32427 (function_checker::arg_mode): Ditto.
32428 (function_checker::ret_mode): Ditto.
32429 * config/riscv/t-riscv: Add generator.
32430 * config/riscv/vector-iterators.md: New iterators.
32431 * config/riscv/vector.md (vundefined<mode>): New pattern.
32432 (@vundefined<mode>): Ditto.
32433 (@vreinterpret<mode>): Ditto.
32434 (@vlmul_extx2<mode>): Ditto.
32435 (@vlmul_extx4<mode>): Ditto.
32436 (@vlmul_extx8<mode>): Ditto.
32437 (@vlmul_extx16<mode>): Ditto.
32438 (@vlmul_extx32<mode>): Ditto.
32439 (@vlmul_extx64<mode>): Ditto.
32440 (*vlmul_extx2<mode>): Ditto.
32441 (*vlmul_extx4<mode>): Ditto.
32442 (*vlmul_extx8<mode>): Ditto.
32443 (*vlmul_extx16<mode>): Ditto.
32444 (*vlmul_extx32<mode>): Ditto.
32445 (*vlmul_extx64<mode>): Ditto.
32446 * config/riscv/genrvv-type-indexer.cc: New file.
32448 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32450 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
32451 (slide1_sew64_helper): New function.
32452 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
32453 (get_unknown_min_value): Ditto.
32454 (force_vector_length_operand): Ditto.
32455 (gen_no_side_effects_vsetvl_rtx): Ditto.
32456 (get_vl_x2_rtx): Ditto.
32457 (slide1_sew64_helper): Ditto.
32458 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
32459 (class vrgather): Ditto.
32460 (class vrgatherei16): Ditto.
32461 (class vcompress): Ditto.
32463 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32464 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
32465 (vslidedown): Ditto.
32466 (vslide1up): Ditto.
32467 (vslide1down): Ditto.
32468 (vfslide1up): Ditto.
32469 (vfslide1down): Ditto.
32471 (vrgatherei16): Ditto.
32472 (vcompress): Ditto.
32473 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
32474 (vint8mf8_t): Ditto.
32475 (vint8mf4_t): Ditto.
32476 (vint8mf2_t): Ditto.
32477 (vint8m1_t): Ditto.
32478 (vint8m2_t): Ditto.
32479 (vint8m4_t): Ditto.
32480 (vint16mf4_t): Ditto.
32481 (vint16mf2_t): Ditto.
32482 (vint16m1_t): Ditto.
32483 (vint16m2_t): Ditto.
32484 (vint16m4_t): Ditto.
32485 (vint16m8_t): Ditto.
32486 (vint32mf2_t): Ditto.
32487 (vint32m1_t): Ditto.
32488 (vint32m2_t): Ditto.
32489 (vint32m4_t): Ditto.
32490 (vint32m8_t): Ditto.
32491 (vint64m1_t): Ditto.
32492 (vint64m2_t): Ditto.
32493 (vint64m4_t): Ditto.
32494 (vint64m8_t): Ditto.
32495 (vuint8mf8_t): Ditto.
32496 (vuint8mf4_t): Ditto.
32497 (vuint8mf2_t): Ditto.
32498 (vuint8m1_t): Ditto.
32499 (vuint8m2_t): Ditto.
32500 (vuint8m4_t): Ditto.
32501 (vuint16mf4_t): Ditto.
32502 (vuint16mf2_t): Ditto.
32503 (vuint16m1_t): Ditto.
32504 (vuint16m2_t): Ditto.
32505 (vuint16m4_t): Ditto.
32506 (vuint16m8_t): Ditto.
32507 (vuint32mf2_t): Ditto.
32508 (vuint32m1_t): Ditto.
32509 (vuint32m2_t): Ditto.
32510 (vuint32m4_t): Ditto.
32511 (vuint32m8_t): Ditto.
32512 (vuint64m1_t): Ditto.
32513 (vuint64m2_t): Ditto.
32514 (vuint64m4_t): Ditto.
32515 (vuint64m8_t): Ditto.
32516 (vfloat32mf2_t): Ditto.
32517 (vfloat32m1_t): Ditto.
32518 (vfloat32m2_t): Ditto.
32519 (vfloat32m4_t): Ditto.
32520 (vfloat32m8_t): Ditto.
32521 (vfloat64m1_t): Ditto.
32522 (vfloat64m2_t): Ditto.
32523 (vfloat64m4_t): Ditto.
32524 (vfloat64m8_t): Ditto.
32525 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
32526 * config/riscv/riscv.md: Adjust RVV instruction types.
32527 * config/riscv/vector-iterators.md (down): New iterator.
32528 (=vd,vr): New attribute.
32529 (UNSPEC_VSLIDE1UP): New unspec.
32530 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
32531 (*pred_slide<ud><mode>): Ditto.
32532 (*pred_slide<ud><mode>_extended): Ditto.
32533 (@pred_gather<mode>): Ditto.
32534 (@pred_gather<mode>_scalar): Ditto.
32535 (@pred_gatherei16<mode>): Ditto.
32536 (@pred_compress<mode>): Ditto.
32538 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32540 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
32542 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32544 * config/riscv/constraints.md (Wb1): New constraint.
32545 * config/riscv/predicates.md
32546 (vector_least_significant_set_mask_operand): New predicate.
32547 (vector_broadcast_mask_operand): Ditto.
32548 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
32549 (gen_scalar_move_mask): New function.
32550 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
32551 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
32552 (class vmv_s): Ditto.
32554 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
32555 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
32559 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
32561 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
32562 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
32563 (function_expander::use_exact_insn): New function.
32564 (function_expander::use_contiguous_load_insn): New function.
32565 (function_expander::use_contiguous_store_insn): New function.
32566 (function_expander::use_ternop_insn): New function.
32567 (function_expander::use_widen_ternop_insn): New function.
32568 (function_expander::use_scalar_move_insn): New function.
32569 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
32570 * config/riscv/riscv-vector-builtins.h
32571 (function_expander::add_scalar_move_mask_operand): New class.
32572 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
32573 (scalar_move_insn_p): Ditto.
32574 (has_vsetvl_killed_avl_p): Ditto.
32575 (anticipatable_occurrence_p): Ditto.
32576 (insert_vsetvl): Ditto.
32577 (get_vl_vtype_info): Ditto.
32578 (calculate_sew): Ditto.
32579 (calculate_vlmul): Ditto.
32580 (incompatible_avl_p): Ditto.
32581 (different_sew_p): Ditto.
32582 (different_lmul_p): Ditto.
32583 (different_ratio_p): Ditto.
32584 (different_tail_policy_p): Ditto.
32585 (different_mask_policy_p): Ditto.
32586 (possible_zero_avl_p): Ditto.
32587 (first_ratio_invalid_for_second_sew_p): Ditto.
32588 (first_ratio_invalid_for_second_lmul_p): Ditto.
32589 (second_ratio_invalid_for_first_sew_p): Ditto.
32590 (second_ratio_invalid_for_first_lmul_p): Ditto.
32591 (second_sew_less_than_first_sew_p): Ditto.
32592 (first_sew_less_than_second_sew_p): Ditto.
32593 (compare_lmul): Ditto.
32594 (second_lmul_less_than_first_lmul_p): Ditto.
32595 (first_lmul_less_than_second_lmul_p): Ditto.
32596 (first_ratio_less_than_second_ratio_p): Ditto.
32597 (second_ratio_less_than_first_ratio_p): Ditto.
32598 (DEF_INCOMPATIBLE_COND): Ditto.
32599 (greatest_sew): Ditto.
32600 (first_sew): Ditto.
32601 (second_sew): Ditto.
32602 (first_vlmul): Ditto.
32603 (second_vlmul): Ditto.
32604 (first_ratio): Ditto.
32605 (second_ratio): Ditto.
32606 (vlmul_for_first_sew_second_ratio): Ditto.
32607 (ratio_for_second_sew_first_vlmul): Ditto.
32608 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
32609 (always_unavailable): Ditto.
32610 (avl_unavailable_p): Ditto.
32611 (sew_unavailable_p): Ditto.
32612 (lmul_unavailable_p): Ditto.
32613 (ge_sew_unavailable_p): Ditto.
32614 (ge_sew_lmul_unavailable_p): Ditto.
32615 (ge_sew_ratio_unavailable_p): Ditto.
32616 (DEF_UNAVAILABLE_COND): Ditto.
32617 (same_sew_lmul_demand_p): Ditto.
32618 (propagate_avl_across_demands_p): Ditto.
32619 (reg_available_p): Ditto.
32620 (avl_info::has_non_zero_avl): Ditto.
32621 (vl_vtype_info::has_non_zero_avl): Ditto.
32622 (vector_insn_info::operator>=): Refactor.
32623 (vector_insn_info::parse_insn): Adjust for scalar move.
32624 (vector_insn_info::demand_vl_vtype): Remove.
32625 (vector_insn_info::compatible_p): New function.
32626 (vector_insn_info::compatible_avl_p): Ditto.
32627 (vector_insn_info::compatible_vtype_p): Ditto.
32628 (vector_insn_info::available_p): Ditto.
32629 (vector_insn_info::merge): Ditto.
32630 (vector_insn_info::fuse_avl): Ditto.
32631 (vector_insn_info::fuse_sew_lmul): Ditto.
32632 (vector_insn_info::fuse_tail_policy): Ditto.
32633 (vector_insn_info::fuse_mask_policy): Ditto.
32634 (vector_insn_info::dump): Ditto.
32635 (vector_infos_manager::release): Ditto.
32636 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
32637 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
32638 (pass_vsetvl::hard_empty_block_p): Ditto.
32639 (pass_vsetvl::backward_demand_fusion): Ditto.
32640 (pass_vsetvl::forward_demand_fusion): Ditto.
32641 (pass_vsetvl::refine_vsetvls): Ditto.
32642 (pass_vsetvl::cleanup_vsetvls): Ditto.
32643 (pass_vsetvl::commit_vsetvls): Ditto.
32644 (pass_vsetvl::propagate_avl): Ditto.
32645 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
32646 (struct demands_pair): Ditto.
32647 (struct demands_cond): Ditto.
32648 (struct demands_fuse_rule): Ditto.
32649 * config/riscv/vector-iterators.md: New iterator.
32650 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
32651 (*pred_broadcast<mode>): Ditto.
32652 (*pred_broadcast<mode>_extended_scalar): Ditto.
32653 (@pred_extract_first<mode>): Ditto.
32654 (*pred_extract_first<mode>): Ditto.
32655 (@pred_extract_first_trunc<mode>): Ditto.
32656 * config/riscv/riscv-vsetvl.def: New file.
32658 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
32660 * config/riscv/bitmanip.md: allow 0 constant in max/min
32663 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
32665 * config/riscv/bitmanip.md: Fix wrong index in the check.
32667 2023-03-04 Jakub Jelinek <jakub@redhat.com>
32669 PR middle-end/109006
32670 * vec.cc (test_auto_alias): Adjust comment for removal of
32672 * read-rtl-function.cc (function_reader::parse_block): Likewise.
32673 * gdbhooks.py: Likewise.
32675 2023-03-04 Jakub Jelinek <jakub@redhat.com>
32677 PR testsuite/108973
32678 * selftest-diagnostic.cc
32679 (test_diagnostic_context::test_diagnostic_context): Set
32680 caret_max_width to 80.
32682 2023-03-03 Alexandre Oliva <oliva@adacore.com>
32684 * gimple-ssa-warn-access.cc
32685 (pass_waccess::check_dangling_stores): Skip non-stores.
32687 2023-03-03 Alexandre Oliva <oliva@adacore.com>
32689 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
32690 after vmsr and vmrs, and lower the case of P0.
32692 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
32694 PR middle-end/109006
32695 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
32697 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
32699 PR middle-end/109006
32700 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
32702 2023-03-03 Jakub Jelinek <jakub@redhat.com>
32705 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
32706 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
32707 suppressed on stmt. For [static %E] warning, print access_nelts
32708 rather than access_size. Fix up comment wording.
32710 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
32712 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
32713 arch14 instead of z16.
32715 2023-03-03 Anthony Green <green@moxielogic.com>
32717 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
32719 2023-03-03 Anthony Green <green@moxielogic.com>
32721 * config/moxie/constraints.md (A, B, W): Change
32722 define_constraint to define_memory_constraint.
32724 2023-03-03 Xi Ruoyao <xry111@xry111.site>
32726 * toplev.cc (process_options): Fix the spelling of
32727 "-fstack-clash-protection".
32729 2023-03-03 Richard Biener <rguenther@suse.de>
32731 PR tree-optimization/109002
32732 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
32733 PHI-translate ANTIC_IN.
32735 2023-03-03 Jakub Jelinek <jakub@redhat.com>
32737 PR tree-optimization/108988
32738 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
32739 size_type_node before passing it as argument to fwrite. Formatting
32742 2023-03-03 Richard Biener <rguenther@suse.de>
32745 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
32746 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
32747 * config/i386/i386-features.h (scalar_chain::max_visits): New.
32748 (scalar_chain::build): Add bitmap parameter, return boolean.
32749 (scalar_chain::add_insn): Likewise.
32750 (scalar_chain::analyze_register_chain): Likewise.
32751 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
32752 Initialize max_visits.
32753 (scalar_chain::analyze_register_chain): When we exhaust
32754 max_visits, abort. Also abort when running into any
32756 (scalar_chain::add_insn): Propagate abort.
32757 (scalar_chain::build): Likewise. When aborting amend
32758 the set of disallowed insn with the insns set.
32759 (convert_scalars_to_vector): Adjust. Do not convert aborted
32762 2023-03-03 Richard Biener <rguenther@suse.de>
32765 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
32766 generate a DIE for a function scope static.
32768 2023-03-03 Alexandre Oliva <oliva@adacore.com>
32770 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
32772 2023-03-02 Jakub Jelinek <jakub@redhat.com>
32775 * target.h (emit_support_tinfos_callback): New typedef.
32776 * targhooks.h (default_emit_support_tinfos): Declare.
32777 * targhooks.cc (default_emit_support_tinfos): New function.
32778 * target.def (emit_support_tinfos): New target hook.
32779 * doc/tm.texi.in (emit_support_tinfos): Document it.
32780 * doc/tm.texi: Regenerated.
32781 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
32782 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
32784 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
32786 * ira-costs.cc: Include print-rtl.h.
32787 (record_reg_classes, scan_one_insn): Add code to print debug info.
32788 (record_operand_costs): Find and use smaller cost for hard reg
32791 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
32792 Paul-Antoine Arras <pa@codesourcery.com>
32794 * builtins.cc (mathfn_built_in_explicit): New.
32795 * config/gcn/gcn.cc: Include case-cfn-macros.h.
32796 (mathfn_built_in_explicit): Add prototype.
32797 (gcn_vectorize_builtin_vectorized_function): New.
32798 (gcn_libc_has_function): New.
32799 (TARGET_LIBC_HAS_FUNCTION): Define.
32800 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
32802 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
32804 PR tree-optimization/108979
32805 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
32806 operations on invariants.
32808 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
32810 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
32811 * config/s390/s390.cc (s390_option_override_internal): Make
32812 partial vector usage the default from z13 on.
32813 * config/s390/vector.md (len_load_v16qi): Add.
32814 (len_store_v16qi): Add.
32816 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
32818 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
32819 of constant 0 offset.
32821 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
32823 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
32825 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
32827 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
32829 * config.gcc: add -with-{no-}msa build option.
32830 * config/mips/mips.h: Likewise.
32831 * doc/install.texi: Likewise.
32833 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
32835 PR tree-optimization/108603
32836 * explow.cc (convert_memory_address_addr_space_1): Only wrap
32837 the result of a recursive call in a CONST if no instructions
32840 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
32842 PR tree-optimization/108430
32843 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
32844 of inverted condition.
32846 2023-03-02 Jakub Jelinek <jakub@redhat.com>
32849 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
32850 comparison copy the bytes from ptr to a temporary buffer and clearing
32851 padding bits in there.
32853 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
32855 PR middle-end/108545
32856 * gimplify.cc (struct tree_operand_hash_no_se): New.
32857 (omp_index_mapping_groups_1, omp_index_mapping_groups,
32858 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
32859 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
32860 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
32861 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
32862 of tree_operand_hash.
32864 2023-03-01 LIU Hao <lh_mouse@126.com>
32867 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
32868 Remove the size limit `pch_VA_max_size`
32870 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
32872 PR middle-end/108546
32873 * omp-low.cc (lower_omp_target): Remove optional handling
32874 on the receiver side, i.e. inside target (data), for
32877 2023-03-01 Jakub Jelinek <jakub@redhat.com>
32880 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
32881 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
32883 2023-03-01 Richard Biener <rguenther@suse.de>
32885 PR tree-optimization/108970
32886 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
32887 Check we can copy the BBs.
32888 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
32890 (vect_do_peeling): Streamline error handling.
32892 2023-03-01 Richard Biener <rguenther@suse.de>
32894 PR tree-optimization/108950
32895 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
32896 Check oprnd0 is defined in the loop.
32897 * tree-vect-loop.cc (vectorizable_reduction): Record all
32898 operands vector types, compute that of invariants and
32899 properly update their SLP nodes.
32901 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
32904 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
32905 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
32907 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
32909 PR middle-end/107411
32910 PR middle-end/107411
32911 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
32913 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
32914 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
32916 2023-02-28 Jakub Jelinek <jakub@redhat.com>
32918 PR sanitizer/108894
32919 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
32920 comparison rather than index > bound.
32921 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
32922 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
32923 * doc/invoke.texi (-fsanitize=bounds): Document that whether
32924 flexible array member-like arrays are instrumented or not depends
32925 on -fstrict-flex-arrays* options of strict_flex_array attributes.
32926 (-fsanitize=bounds-strict): Document that flexible array members
32927 are not instrumented.
32929 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
32933 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
32934 (fmod<mode>3): Ditto.
32935 (fpremxf4_i387): Ditto.
32936 (reminderxf3): Ditto.
32937 (reminder<mode>3): Ditto.
32938 (fprem1xf4_i387): Ditto.
32940 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
32942 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
32943 generating FFS with mismatched operand and result modes, by using
32944 an explicit SIGN_EXTEND/ZERO_EXTEND.
32945 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
32946 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
32948 2023-02-27 Patrick Palka <ppalka@redhat.com>
32950 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
32951 * lra-int.h (lra_change_class): Likewise.
32952 * recog.h (which_op_alt): Likewise.
32953 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
32956 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32958 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
32960 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
32962 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
32963 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
32965 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
32967 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
32968 (xtensa_get_config_v3): New functions.
32970 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32972 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
32974 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
32976 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
32977 the macro to 0x1000000000.
32979 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
32982 * doc/gm2.texi (-fm2-pathname): New option documented.
32983 (-fm2-pathnameI): New option documented.
32984 (-fm2-prefix=): New option documented.
32985 (-fruntime-modules=): Update default module list.
32987 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
32990 * config/xtensa/xtensa-protos.h
32991 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
32992 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
32993 to xtensa_expand_call.
32994 (xtensa_expand_call): Emit the call and add a clobber expression
32995 for the static chain to it in case of windowed ABI.
32996 * config/xtensa/xtensa.md (call, call_value, sibcall)
32997 (sibcall_value): Call xtensa_expand_call and complete expansion
32998 right after that call.
33000 2023-02-24 Richard Biener <rguenther@suse.de>
33002 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
33003 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
33004 changing alignment of vec<T, A, vl_embed> and simplifying
33006 (vec<T, A, vl_embed>::address): Compute as this + 1.
33007 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
33008 vector instead of the offset of the m_vecdata member.
33009 (auto_vec<T, N>::m_data): Turn storage into
33010 uninitialized unsigned char.
33011 (auto_vec<T, N>::auto_vec): Allow allocation of one
33012 stack member. Initialize m_vec in a special way to
33013 avoid later stringop overflow diagnostics.
33014 * vec.cc (test_auto_alias): New.
33015 (vec_cc_tests): Call it.
33017 2023-02-24 Richard Biener <rguenther@suse.de>
33019 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
33020 take a const reference to the object, use address to
33022 (vec<T, A, vl_embed>::contains): Use address to access data.
33023 (vec<T, A, vl_embed>::operator[]): Use address instead of
33024 m_vecdata to access data.
33025 (vec<T, A, vl_embed>::iterate): Likewise.
33026 (vec<T, A, vl_embed>::copy): Likewise.
33027 (vec<T, A, vl_embed>::quick_push): Likewise.
33028 (vec<T, A, vl_embed>::pop): Likewise.
33029 (vec<T, A, vl_embed>::quick_insert): Likewise.
33030 (vec<T, A, vl_embed>::ordered_remove): Likewise.
33031 (vec<T, A, vl_embed>::unordered_remove): Likewise.
33032 (vec<T, A, vl_embed>::block_remove): Likewise.
33033 (vec<T, A, vl_heap>::address): Likewise.
33035 2023-02-24 Martin Liska <mliska@suse.cz>
33037 PR sanitizer/108834
33038 * asan.cc (asan_add_global): Use proper TU name for normal
33039 global variables (and aux_base_name for the artificial one).
33041 2023-02-24 Jakub Jelinek <jakub@redhat.com>
33043 * config/i386/i386-builtin.def: Update description of BDESC
33044 and BDESC_FIRST in file comment to include mask2.
33046 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33048 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
33050 2023-02-24 Jakub Jelinek <jakub@redhat.com>
33052 PR middle-end/108854
33053 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
33054 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
33055 nodes and adjust their DECL_CONTEXT.
33057 2023-02-24 Jakub Jelinek <jakub@redhat.com>
33060 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
33061 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
33062 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
33063 __builtin_ia32_cvtne2ps2bf16_v8bf,
33064 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
33065 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
33066 __builtin_ia32_cvtneps2bf16_v8sf_mask,
33067 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
33068 __builtin_ia32_cvtneps2bf16_v4sf_mask,
33069 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
33070 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
33071 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
33072 __builtin_ia32_dpbf16ps_v4sf_mask,
33073 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
33074 OPTION_MASK_ISA_AVX512VL.
33076 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
33078 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
33079 Add non-compact 32-bit multilibs.
33081 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
33083 * config/mips/mips.md (*clo<mode>2): New pattern.
33085 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
33087 * config/mips/mips.h (machine_function): New variable
33088 use_hazard_barrier_return_p.
33089 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
33090 (mips_hb_return_internal): New insn pattern.
33091 * config/mips/mips.cc (mips_attribute_table): Add attribute
33092 use_hazard_barrier_return.
33093 (mips_use_hazard_barrier_return_p): New static function.
33094 (mips_function_attr_inlinable_p): Likewise.
33095 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
33096 Emit error for unsupported architecture choice.
33097 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
33098 Return false for use_hazard_barrier_return.
33099 (mips_expand_epilogue): Emit hazard barrier return.
33100 * doc/extend.texi: Document use_hazard_barrier_return.
33102 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33104 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
33105 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
33106 for the gcc-internal headers.
33108 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33110 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
33111 and $(POSTCOMPILE) instead of manual dependency listing.
33112 * config/xtensa/xtensa-dynconfig.c: Rename to ...
33113 * config/xtensa/xtensa-dynconfig.cc: ... this.
33115 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
33117 * doc/cfg.texi: Reorder index entries around @items.
33118 * doc/cpp.texi: Ditto.
33119 * doc/cppenv.texi: Ditto.
33120 * doc/cppopts.texi: Ditto.
33121 * doc/generic.texi: Ditto.
33122 * doc/install.texi: Ditto.
33123 * doc/extend.texi: Ditto.
33124 * doc/invoke.texi: Ditto.
33125 * doc/md.texi: Ditto.
33126 * doc/rtl.texi: Ditto.
33127 * doc/tm.texi.in: Ditto.
33128 * doc/trouble.texi: Ditto.
33129 * doc/tm.texi: Regenerate.
33131 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33133 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
33134 the occurrence of general-purpose register used only once and for
33135 transferring intermediate value.
33137 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33139 * config/xtensa/xtensa.cc (machine_function): Add new member
33140 'eliminated_callee_saved_bmp'.
33141 (xtensa_can_eliminate_callee_saved_reg_p): New function to
33142 determine whether the register can be eliminated or not.
33143 (xtensa_expand_prologue): Add invoking the above function and
33144 elimination the use of callee-saved register by using its stack
33145 slot through the stack pointer (or the frame pointer if needed)
33147 (xtensa_expand_prologue): Modify to not emit register restoration
33148 insn from its stack slot if the register is already eliminated.
33150 2023-02-23 Jakub Jelinek <jakub@redhat.com>
33152 PR translation/108890
33153 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
33154 around fatal_error format strings.
33156 2023-02-23 Richard Biener <rguenther@suse.de>
33158 * tree-ssa-structalias.cc (handle_lhs_call): Do not
33159 re-create rhsc, only truncate it.
33161 2023-02-23 Jakub Jelinek <jakub@redhat.com>
33163 PR middle-end/106258
33164 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
33165 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
33167 2023-02-23 Richard Biener <rguenther@suse.de>
33169 * tree-if-conv.cc (tree_if_conversion): Properly manage
33170 memory of refs and the contained data references.
33172 2023-02-23 Richard Biener <rguenther@suse.de>
33174 PR tree-optimization/108888
33175 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
33176 calls to predicate.
33177 (predicate_statements): Only predicate calls with PLF_2.
33179 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33181 * config/xtensa/xtensa.md
33182 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
33183 Add missing "SI:" to PLUS RTXes.
33185 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33188 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
33189 Emit (use (reg:SI A0_REG)) at the end in the sibling call
33190 (i.e. the same place as (return) in the normal call).
33192 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
33195 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
33198 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
33200 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
33201 (sibcall_value, sibcall_value_internal): Add 'use' expression
33204 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
33206 * doc/cppdiropts.texi: Reorder @opindex commands to precede
33207 @items they relate to.
33208 * doc/cppopts.texi: Ditto.
33209 * doc/cppwarnopts.texi: Ditto.
33210 * doc/invoke.texi: Ditto.
33211 * doc/lto.texi: Ditto.
33213 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
33215 * internal-fn.cc (expand_MASK_CALL): New.
33216 * internal-fn.def (MASK_CALL): New.
33217 * internal-fn.h (expand_MASK_CALL): New prototype.
33218 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
33219 for mask arguments also.
33220 * tree-if-conv.cc: Include cgraph.h.
33221 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
33222 (predicate_statements): Convert functions to IFN_MASK_CALL.
33223 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
33224 IFN_MASK_CALL as a SIMD function call.
33225 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
33226 IFN_MASK_CALL as an inbranch SIMD function call.
33227 Generate the mask vector arguments.
33229 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33231 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
33232 (class widen_reducop): Ditto.
33233 (class freducop): Ditto.
33234 (class widen_freducop): Ditto.
33236 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33237 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
33246 (vwredsumu): Ditto.
33247 (vfredusum): Ditto.
33248 (vfredosum): Ditto.
33251 (vfwredosum): Ditto.
33252 (vfwredusum): Ditto.
33253 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
33255 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33256 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
33257 (DEF_RVV_WU_OPS): Ditto.
33258 (DEF_RVV_WF_OPS): Ditto.
33259 (vint8mf8_t): Ditto.
33260 (vint8mf4_t): Ditto.
33261 (vint8mf2_t): Ditto.
33262 (vint8m1_t): Ditto.
33263 (vint8m2_t): Ditto.
33264 (vint8m4_t): Ditto.
33265 (vint8m8_t): Ditto.
33266 (vint16mf4_t): Ditto.
33267 (vint16mf2_t): Ditto.
33268 (vint16m1_t): Ditto.
33269 (vint16m2_t): Ditto.
33270 (vint16m4_t): Ditto.
33271 (vint16m8_t): Ditto.
33272 (vint32mf2_t): Ditto.
33273 (vint32m1_t): Ditto.
33274 (vint32m2_t): Ditto.
33275 (vint32m4_t): Ditto.
33276 (vint32m8_t): Ditto.
33277 (vuint8mf8_t): Ditto.
33278 (vuint8mf4_t): Ditto.
33279 (vuint8mf2_t): Ditto.
33280 (vuint8m1_t): Ditto.
33281 (vuint8m2_t): Ditto.
33282 (vuint8m4_t): Ditto.
33283 (vuint8m8_t): Ditto.
33284 (vuint16mf4_t): Ditto.
33285 (vuint16mf2_t): Ditto.
33286 (vuint16m1_t): Ditto.
33287 (vuint16m2_t): Ditto.
33288 (vuint16m4_t): Ditto.
33289 (vuint16m8_t): Ditto.
33290 (vuint32mf2_t): Ditto.
33291 (vuint32m1_t): Ditto.
33292 (vuint32m2_t): Ditto.
33293 (vuint32m4_t): Ditto.
33294 (vuint32m8_t): Ditto.
33295 (vfloat32mf2_t): Ditto.
33296 (vfloat32m1_t): Ditto.
33297 (vfloat32m2_t): Ditto.
33298 (vfloat32m4_t): Ditto.
33299 (vfloat32m8_t): Ditto.
33300 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
33301 (DEF_RVV_WU_OPS): Ditto.
33302 (DEF_RVV_WF_OPS): Ditto.
33303 (required_extensions_p): Add reduction support.
33304 (rvv_arg_type_info::get_base_vector_type): Ditto.
33305 (rvv_arg_type_info::get_tree_type): Ditto.
33306 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
33307 * config/riscv/riscv.md: Ditto.
33308 * config/riscv/vector-iterators.md (minu): Ditto.
33309 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
33310 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
33311 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
33312 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
33313 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
33314 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
33315 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
33317 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33319 * config/riscv/iterators.md: New iterator.
33320 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
33321 (enum ternop_type): New enum.
33322 (class vmacc): New class.
33323 (class imac): Ditto.
33324 (class vnmsac): Ditto.
33325 (enum widen_ternop_type): New enum.
33326 (class vmadd): Ditto.
33327 (class vnmsub): Ditto.
33328 (class iwmac): Ditto.
33329 (class vwmacc): Ditto.
33330 (class vwmaccu): Ditto.
33331 (class vwmaccsu): Ditto.
33332 (class vwmaccus): Ditto.
33333 (class reverse_binop): Ditto.
33334 (class vfmacc): Ditto.
33335 (class vfnmsac): Ditto.
33336 (class vfmadd): Ditto.
33337 (class vfnmsub): Ditto.
33338 (class vfnmacc): Ditto.
33339 (class vfmsac): Ditto.
33340 (class vfnmadd): Ditto.
33341 (class vfmsub): Ditto.
33342 (class vfwmacc): Ditto.
33343 (class vfwnmacc): Ditto.
33344 (class vfwmsac): Ditto.
33345 (class vfwnmsac): Ditto.
33346 (class float_misc): Ditto.
33347 (class fcmp): Ditto.
33348 (class vfclass): Ditto.
33349 (class vfcvt_x): Ditto.
33350 (class vfcvt_rtz_x): Ditto.
33351 (class vfcvt_f): Ditto.
33352 (class vfwcvt_x): Ditto.
33353 (class vfwcvt_rtz_x): Ditto.
33354 (class vfwcvt_f): Ditto.
33355 (class vfncvt_x): Ditto.
33356 (class vfncvt_rtz_x): Ditto.
33357 (class vfncvt_f): Ditto.
33358 (class vfncvt_rod_f): Ditto.
33360 * config/riscv/riscv-vector-builtins-bases.h:
33361 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
33405 (vfcvt_rtz_x): Ditto.
33406 (vfcvt_rtz_xu): Ditto.
33409 (vfwcvt_xu): Ditto.
33410 (vfwcvt_rtz_x): Ditto.
33411 (vfwcvt_rtz_xu): Ditto.
33414 (vfncvt_xu): Ditto.
33415 (vfncvt_rtz_x): Ditto.
33416 (vfncvt_rtz_xu): Ditto.
33418 (vfncvt_rod_f): Ditto.
33419 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
33420 (struct move_def): Ditto.
33421 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
33422 (DEF_RVV_CONVERT_I_OPS): Ditto.
33423 (DEF_RVV_CONVERT_U_OPS): Ditto.
33424 (DEF_RVV_WCONVERT_I_OPS): Ditto.
33425 (DEF_RVV_WCONVERT_U_OPS): Ditto.
33426 (DEF_RVV_WCONVERT_F_OPS): Ditto.
33427 (vfloat64m1_t): Ditto.
33428 (vfloat64m2_t): Ditto.
33429 (vfloat64m4_t): Ditto.
33430 (vfloat64m8_t): Ditto.
33431 (vint32mf2_t): Ditto.
33432 (vint32m1_t): Ditto.
33433 (vint32m2_t): Ditto.
33434 (vint32m4_t): Ditto.
33435 (vint32m8_t): Ditto.
33436 (vint64m1_t): Ditto.
33437 (vint64m2_t): Ditto.
33438 (vint64m4_t): Ditto.
33439 (vint64m8_t): Ditto.
33440 (vuint32mf2_t): Ditto.
33441 (vuint32m1_t): Ditto.
33442 (vuint32m2_t): Ditto.
33443 (vuint32m4_t): Ditto.
33444 (vuint32m8_t): Ditto.
33445 (vuint64m1_t): Ditto.
33446 (vuint64m2_t): Ditto.
33447 (vuint64m4_t): Ditto.
33448 (vuint64m8_t): Ditto.
33449 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
33450 (DEF_RVV_CONVERT_U_OPS): Ditto.
33451 (DEF_RVV_WCONVERT_I_OPS): Ditto.
33452 (DEF_RVV_WCONVERT_U_OPS): Ditto.
33453 (DEF_RVV_WCONVERT_F_OPS): Ditto.
33454 (DEF_RVV_F_OPS): Ditto.
33455 (DEF_RVV_WEXTF_OPS): Ditto.
33456 (required_extensions_p): Adjust for floating-point support.
33457 (check_required_extensions): Ditto.
33458 (unsigned_base_type_p): Ditto.
33459 (get_mode_for_bitsize): Ditto.
33460 (rvv_arg_type_info::get_base_vector_type): Ditto.
33461 (rvv_arg_type_info::get_tree_type): Ditto.
33462 * config/riscv/riscv-vector-builtins.def (v_f): New define.
33465 (xu_v): New define.
33467 (xu_w): New define.
33468 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
33469 (function_expander::arg_mode): New function.
33470 * config/riscv/vector-iterators.md (sof): New iterator.
33476 (fixuns_trunc): Ditto.
33478 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
33479 (@pred_<optab><mode>): Ditto.
33480 (@pred_<optab><mode>_scalar): Ditto.
33481 (@pred_<optab><mode>_reverse_scalar): Ditto.
33482 (@pred_<copysign><mode>): Ditto.
33483 (@pred_<copysign><mode>_scalar): Ditto.
33484 (@pred_mul_<optab><mode>): Ditto.
33485 (pred_mul_<optab><mode>_undef_merge): Ditto.
33486 (*pred_<madd_nmsub><mode>): Ditto.
33487 (*pred_<macc_nmsac><mode>): Ditto.
33488 (*pred_mul_<optab><mode>): Ditto.
33489 (@pred_mul_<optab><mode>_scalar): Ditto.
33490 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
33491 (*pred_<madd_nmsub><mode>_scalar): Ditto.
33492 (*pred_<macc_nmsac><mode>_scalar): Ditto.
33493 (*pred_mul_<optab><mode>_scalar): Ditto.
33494 (@pred_neg_mul_<optab><mode>): Ditto.
33495 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
33496 (*pred_<nmadd_msub><mode>): Ditto.
33497 (*pred_<nmacc_msac><mode>): Ditto.
33498 (*pred_neg_mul_<optab><mode>): Ditto.
33499 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
33500 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
33501 (*pred_<nmadd_msub><mode>_scalar): Ditto.
33502 (*pred_<nmacc_msac><mode>_scalar): Ditto.
33503 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
33504 (@pred_<misc_op><mode>): Ditto.
33505 (@pred_class<mode>): Ditto.
33506 (@pred_dual_widen_<optab><mode>): Ditto.
33507 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
33508 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
33509 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
33510 (@pred_widen_mul_<optab><mode>): Ditto.
33511 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
33512 (@pred_widen_neg_mul_<optab><mode>): Ditto.
33513 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
33514 (@pred_cmp<mode>): Ditto.
33515 (*pred_cmp<mode>): Ditto.
33516 (*pred_cmp<mode>_narrow): Ditto.
33517 (@pred_cmp<mode>_scalar): Ditto.
33518 (*pred_cmp<mode>_scalar): Ditto.
33519 (*pred_cmp<mode>_scalar_narrow): Ditto.
33520 (@pred_eqne<mode>_scalar): Ditto.
33521 (*pred_eqne<mode>_scalar): Ditto.
33522 (*pred_eqne<mode>_scalar_narrow): Ditto.
33523 (@pred_merge<mode>_scalar): Ditto.
33524 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
33525 (@pred_<fix_cvt><mode>): Ditto.
33526 (@pred_<float_cvt><mode>): Ditto.
33527 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
33528 (@pred_widen_<fix_cvt><mode>): Ditto.
33529 (@pred_widen_<float_cvt><mode>): Ditto.
33530 (@pred_extend<mode>): Ditto.
33531 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
33532 (@pred_narrow_<fix_cvt><mode>): Ditto.
33533 (@pred_narrow_<float_cvt><mode>): Ditto.
33534 (@pred_trunc<mode>): Ditto.
33535 (@pred_rod_trunc<mode>): Ditto.
33537 2023-02-22 Jakub Jelinek <jakub@redhat.com>
33539 PR middle-end/106258
33540 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
33541 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
33542 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
33543 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
33545 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
33547 * common.opt (-Wcomplain-wrong-lang): New.
33548 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
33549 * opts-common.cc (prune_options): Handle it.
33550 * opts-global.cc (complain_wrong_lang): Use it.
33552 2023-02-21 David Malcolm <dmalcolm@redhat.com>
33555 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
33557 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
33560 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
33562 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
33563 (sibcall_value, sibcall_value_internal): Add 'use' expression
33566 2023-02-21 Richard Biener <rguenther@suse.de>
33568 PR tree-optimization/108691
33569 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
33570 assert about calls_setjmp not becoming true when it was false.
33572 2023-02-21 Richard Biener <rguenther@suse.de>
33574 PR tree-optimization/108793
33575 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
33576 Use convert operands to niter_type when computing num.
33578 2023-02-21 Richard Biener <rguenther@suse.de>
33581 2023-02-13 Richard Biener <rguenther@suse.de>
33583 PR tree-optimization/108691
33584 * tree-cfg.cc (notice_special_calls): When the CFG is built
33585 honor gimple_call_ctrl_altering_p.
33586 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
33587 temporarily if the call is not control-altering.
33588 * calls.cc (emit_call_1): Do not add REG_SETJMP if
33589 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
33591 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
33593 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
33594 true if register A0 (return address register) when -Og is specified.
33596 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
33598 * config/i386/predicates.md
33599 (general_x64constmem_operand): New predicate.
33600 * config/i386/i386.md (*cmpqi_ext<mode>_1):
33601 Use nonimm_x64constmem_operand.
33602 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
33603 (*addqi_ext<mode>_1): Ditto.
33604 (*testqi_ext<mode>_1): Ditto.
33605 (*andqi_ext<mode>_1): Ditto.
33606 (*andqi_ext<mode>_1_cc): Ditto.
33607 (*<any_or:code>qi_ext<mode>_1): Ditto.
33608 (*xorqi_ext<mode>_1_cc): Ditto.
33610 2023-02-20 Jakub Jelinek <jakub2redhat.com>
33613 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
33614 gen_umadddi4_highpart{,_le}.
33616 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
33618 * config/riscv/riscv.md (prefetch): Use r instead of p for the
33620 (riscv_prefetchi_<mode>): Ditto.
33622 2023-02-20 Richard Biener <rguenther@suse.de>
33624 PR tree-optimization/108816
33625 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
33626 versioning condition split prerequesite, assert required
33629 2023-02-20 Richard Biener <rguenther@suse.de>
33631 PR tree-optimization/108825
33632 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
33633 loop-local verfication only verify there's no pending SSA
33636 2023-02-20 Richard Biener <rguenther@suse.de>
33638 PR tree-optimization/108819
33639 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
33640 we have an SSA name as iv_2 as expected.
33642 2023-02-18 Jakub Jelinek <jakub@redhat.com>
33644 PR tree-optimization/108819
33645 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
33647 2023-02-18 Jakub Jelinek <jakub@redhat.com>
33650 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
33651 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
33653 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
33654 with ix86_replace_reg_with_reg.
33656 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
33658 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
33660 2023-02-18 Xi Ruoyao <xry111@xry111.site>
33662 * config.gcc (triplet_abi): Set its value based on $with_abi,
33663 instead of $target.
33664 (la_canonical_triplet): Set it after $triplet_abi is set
33666 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
33667 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
33670 2023-02-18 Andrew Pinski <apinski@marvell.com>
33672 * match.pd: Remove #if GIMPLE around the
33675 2023-02-18 Andrew Pinski <apinski@marvell.com>
33677 * value-query.h (get_range_query): Return the global ranges
33678 for a nullptr func.
33680 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
33682 * doc/invoke.texi (@item -Wall): Fix typo in
33685 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
33688 * config/i386/predicates.md
33689 (nonimm_x64constmem_operand): New predicate.
33690 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
33691 (*subqi_ext<mode>_0): Ditto.
33692 (*andqi_ext<mode>_0): Ditto.
33693 (*<any_or:code>qi_ext<mode>_0): Ditto.
33695 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
33698 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
33699 int_outermode instead of GET_MODE (tem) to prevent
33700 VOIDmode from entering simplify_gen_subreg.
33702 2023-02-17 Richard Biener <rguenther@suse.de>
33704 PR tree-optimization/108821
33705 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
33706 move volatile accesses.
33708 2023-02-17 Richard Biener <rguenther@suse.de>
33710 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
33711 called on virtual operands.
33712 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
33713 ssa_undefined_value_p calls.
33714 (vn_phi_insert): Likewise.
33715 (set_ssa_val_to): Likewise.
33716 (visit_phi): Avoid extra work with equivalences for
33717 virtual operand PHIs.
33719 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33721 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
33723 (class mask_nlogic): Ditto.
33724 (class mask_notlogic): Ditto.
33725 (class vmmv): Ditto.
33726 (class vmclr): Ditto.
33727 (class vmset): Ditto.
33728 (class vmnot): Ditto.
33729 (class vcpop): Ditto.
33730 (class vfirst): Ditto.
33731 (class mask_misc): Ditto.
33732 (class viota): Ditto.
33733 (class vid): Ditto.
33735 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
33736 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
33755 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
33756 (struct mask_alu_def): Ditto.
33758 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
33759 * config/riscv/riscv-vector-builtins.cc: Ditto.
33760 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
33761 for dest it scalar RVV intrinsics.
33762 * config/riscv/vector-iterators.md (sof): New iterator.
33763 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
33764 (@pred_<optab>not<mode>): New pattern.
33765 (@pred_popcount<VB:mode><P:mode>): New pattern.
33766 (@pred_ffs<VB:mode><P:mode>): New pattern.
33767 (@pred_<misc_op><mode>): New pattern.
33768 (@pred_iota<mode>): New pattern.
33769 (@pred_series<mode>): New pattern.
33771 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33773 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
33777 * config/riscv/riscv-vector-builtins.cc: Ditto.
33779 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33780 kito-cheng <kito.cheng@sifive.com>
33782 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
33783 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
33784 (sew64_scalar_helper): New function.
33785 * config/riscv/vector.md: Normalization.
33787 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33789 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
33851 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33853 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
33854 (@pred_<optab><mode>_scalar): Ditto.
33855 (*pred_<optab><mode>_scalar): Ditto.
33856 (*pred_<optab><mode>_extended_scalar): Ditto.
33858 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33860 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
33861 (init_builtins): Ditto.
33862 (mangle_builtin_type): Ditto.
33863 (verify_type_context): Ditto.
33864 (handle_pragma_vector): Ditto.
33865 (builtin_decl): Ditto.
33866 (expand_builtin): Ditto.
33867 (const_vec_all_same_in_range_p): Ditto.
33868 (legitimize_move): Ditto.
33869 (emit_vlmax_op): Ditto.
33870 (emit_nonvlmax_op): Ditto.
33871 (get_vlmul): Ditto.
33872 (get_ratio): Ditto.
33875 (get_avl_type): Ditto.
33876 (calculate_ratio): Ditto.
33877 (enum vlmul_type): Ditto.
33879 (neg_simm5_p): Ditto.
33880 (has_vi_variant_p): Ditto.
33882 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33884 * config/riscv/riscv-protos.h (simm32_p): Remove.
33885 * config/riscv/riscv-v.cc (simm32_p): Ditto.
33886 * config/riscv/vector.md: Use immediate_operand
33887 instead of riscv_vector::simm32_p.
33889 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
33891 * doc/invoke.texi (Optimize Options): Reword the explanation
33892 getting minimal, maximal and default values of a parameter.
33894 2023-02-16 Patrick Palka <ppalka@redhat.com>
33896 * addresses.h: Mechanically drop 'static' from 'static inline'
33897 functions via s/^static inline/inline/g.
33898 * asan.h: Likewise.
33899 * attribs.h: Likewise.
33900 * basic-block.h: Likewise.
33901 * bitmap.h: Likewise.
33902 * cfghooks.h: Likewise.
33903 * cfgloop.h: Likewise.
33904 * cgraph.h: Likewise.
33905 * cselib.h: Likewise.
33906 * data-streamer.h: Likewise.
33907 * debug.h: Likewise.
33909 * diagnostic.h: Likewise.
33910 * dominance.h: Likewise.
33911 * dumpfile.h: Likewise.
33912 * emit-rtl.h: Likewise.
33913 * except.h: Likewise.
33914 * expmed.h: Likewise.
33915 * expr.h: Likewise.
33916 * fixed-value.h: Likewise.
33917 * gengtype.h: Likewise.
33918 * gimple-expr.h: Likewise.
33919 * gimple-iterator.h: Likewise.
33920 * gimple-predict.h: Likewise.
33921 * gimple-range-fold.h: Likewise.
33922 * gimple-ssa.h: Likewise.
33923 * gimple.h: Likewise.
33924 * graphite.h: Likewise.
33925 * hard-reg-set.h: Likewise.
33926 * hash-map.h: Likewise.
33927 * hash-set.h: Likewise.
33928 * hash-table.h: Likewise.
33929 * hwint.h: Likewise.
33930 * input.h: Likewise.
33931 * insn-addr.h: Likewise.
33932 * internal-fn.h: Likewise.
33933 * ipa-fnsummary.h: Likewise.
33934 * ipa-icf-gimple.h: Likewise.
33935 * ipa-inline.h: Likewise.
33936 * ipa-modref.h: Likewise.
33937 * ipa-prop.h: Likewise.
33938 * ira-int.h: Likewise.
33940 * lra-int.h: Likewise.
33942 * lto-streamer.h: Likewise.
33943 * memmodel.h: Likewise.
33944 * omp-general.h: Likewise.
33945 * optabs-query.h: Likewise.
33946 * optabs.h: Likewise.
33947 * plugin.h: Likewise.
33948 * pretty-print.h: Likewise.
33949 * range.h: Likewise.
33950 * read-md.h: Likewise.
33951 * recog.h: Likewise.
33952 * regs.h: Likewise.
33953 * rtl-iter.h: Likewise.
33955 * sbitmap.h: Likewise.
33956 * sched-int.h: Likewise.
33957 * sel-sched-ir.h: Likewise.
33958 * sese.h: Likewise.
33959 * sparseset.h: Likewise.
33960 * ssa-iterators.h: Likewise.
33961 * system.h: Likewise.
33962 * target-globals.h: Likewise.
33963 * target.h: Likewise.
33964 * timevar.h: Likewise.
33965 * tree-chrec.h: Likewise.
33966 * tree-data-ref.h: Likewise.
33967 * tree-iterator.h: Likewise.
33968 * tree-outof-ssa.h: Likewise.
33969 * tree-phinodes.h: Likewise.
33970 * tree-scalar-evolution.h: Likewise.
33971 * tree-sra.h: Likewise.
33972 * tree-ssa-alias.h: Likewise.
33973 * tree-ssa-live.h: Likewise.
33974 * tree-ssa-loop-manip.h: Likewise.
33975 * tree-ssa-loop.h: Likewise.
33976 * tree-ssa-operands.h: Likewise.
33977 * tree-ssa-propagate.h: Likewise.
33978 * tree-ssa-sccvn.h: Likewise.
33979 * tree-ssa.h: Likewise.
33980 * tree-ssanames.h: Likewise.
33981 * tree-streamer.h: Likewise.
33982 * tree-switch-conversion.h: Likewise.
33983 * tree-vectorizer.h: Likewise.
33984 * tree.h: Likewise.
33985 * wide-int.h: Likewise.
33987 2023-02-16 Jakub Jelinek <jakub@redhat.com>
33989 PR tree-optimization/108657
33990 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
33991 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
33992 is a call to internal or builtin function.
33994 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
33996 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
33997 using-declaration to unhide functions.
33999 2023-02-16 Jakub Jelinek <jakub@redhat.com>
34001 PR tree-optimization/108783
34002 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
34003 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
34004 t to curr->op. Otherwise, punt if either newop1 or newop2 are
34005 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
34007 2023-02-16 Richard Biener <rguenther@suse.de>
34009 PR tree-optimization/108791
34010 * tree-ssa-forwprop.cc (optimize_vector_load): Build
34011 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
34014 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
34017 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
34018 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
34019 (ix86_expand_prologue): Likewise.
34021 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
34023 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
34025 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
34027 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
34028 int248_register_operand predicate in zero_extract sub-RTX.
34029 (*cmpqi_ext<mode>_2): Ditto.
34030 (*cmpqi_ext<mode>_3): Ditto.
34031 (*cmpqi_ext<mode>_4): Ditto.
34032 (*extzvqi_mem_rex64): Ditto.
34034 (*insvqi_1_mem_rex64): Ditto.
34035 (@insv<mode>_1): Ditto.
34036 (*insvqi_1): Ditto.
34037 (*insvqi_2): Ditto.
34038 (*insvqi_3): Ditto.
34039 (*extendqi<SWI24:mode>_ext_1): Ditto.
34040 (*addqi_ext<mode>_1): Ditto.
34041 (*addqi_ext<mode>_2): Ditto.
34042 (*subqi_ext<mode>_2): Ditto.
34043 (*testqi_ext<mode>_1): Ditto.
34044 (*testqi_ext<mode>_2): Ditto.
34045 (*andqi_ext<mode>_1): Ditto.
34046 (*andqi_ext<mode>_1_cc): Ditto.
34047 (*andqi_ext<mode>_2): Ditto.
34048 (*<any_or:code>qi_ext<mode>_1): Ditto.
34049 (*<any_or:code>qi_ext<mode>_2): Ditto.
34050 (*xorqi_ext<mode>_1_cc): Ditto.
34051 (*negqi_ext<mode>_2): Ditto.
34052 (*ashlqi_ext<mode>_2): Ditto.
34053 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
34055 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
34057 * config/i386/predicates.md (int248_register_operand):
34058 Rename from extr_register_operand.
34059 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
34060 (*extzx<mode>): Ditto.
34061 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
34062 (*ashl<mode>3_mask): Ditto.
34063 (*<any_shiftrt:insn><mode>3_mask): Ditto.
34064 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
34065 (*<any_rotate:insn><mode>3_mask): Ditto.
34066 (*<btsc><mode>_mask): Ditto.
34067 (*btr<mode>_mask): Ditto.
34068 (*jcc_bt<mode>_mask_1): Ditto.
34070 2023-02-15 Richard Biener <rguenther@suse.de>
34072 PR middle-end/26854
34073 * df-core.cc (df_worklist_propagate_forward): Put later
34074 blocks on worklist and only earlier blocks on pending.
34075 (df_worklist_propagate_backward): Likewise.
34076 (df_worklist_dataflow_doublequeue): Change the iteration
34077 to process new blocks in the same iteration if that
34078 maintains the iteration order.
34080 2023-02-15 Marek Polacek <polacek@redhat.com>
34082 PR middle-end/106080
34083 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
34086 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34088 * config/riscv/predicates.md: Refine codes.
34089 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
34090 * config/riscv/riscv-v.cc: Refine codes.
34091 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
34093 (class imac): New class.
34094 (enum widen_ternop_type): New enum.
34095 (class iwmac): New class.
34097 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34098 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
34106 * config/riscv/riscv-vector-builtins.cc
34107 (function_builder::apply_predication): Adjust for multiply-add support.
34108 (function_expander::add_vundef_operand): Refine codes.
34109 (function_expander::use_ternop_insn): New function.
34110 (function_expander::use_widen_ternop_insn): Ditto.
34111 * config/riscv/riscv-vector-builtins.h: New function.
34112 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
34113 (pred_mul_<optab><mode>_undef_merge): Ditto.
34114 (*pred_<madd_nmsub><mode>): Ditto.
34115 (*pred_<macc_nmsac><mode>): Ditto.
34116 (*pred_mul_<optab><mode>): Ditto.
34117 (@pred_mul_<optab><mode>_scalar): Ditto.
34118 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
34119 (*pred_<madd_nmsub><mode>_scalar): Ditto.
34120 (*pred_<macc_nmsac><mode>_scalar): Ditto.
34121 (*pred_mul_<optab><mode>_scalar): Ditto.
34122 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
34123 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
34124 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
34125 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
34126 (@pred_widen_mul_plus<su><mode>): Ditto.
34127 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
34128 (@pred_widen_mul_plussu<mode>): Ditto.
34129 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
34130 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
34132 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34134 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
34135 (vector_all_trues_mask_operand): New predicate.
34136 (vector_undef_operand): New predicate.
34137 (ltge_operator): New predicate.
34138 (comparison_except_ltge_operator): New predicate.
34139 (comparison_except_eqge_operator): New predicate.
34140 (ge_operator): New predicate.
34141 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
34142 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
34144 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34145 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
34155 * config/riscv/riscv-vector-builtins-shapes.cc
34156 (struct return_mask_def): Adjust for compare support.
34157 * config/riscv/riscv-vector-builtins.cc
34158 (function_expander::use_compare_insn): New function.
34159 * config/riscv/riscv-vector-builtins.h
34160 (function_expander::add_integer_operand): Ditto.
34161 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
34162 * config/riscv/riscv.md: Add vector min/max attributes.
34163 * config/riscv/vector-iterators.md (xnor): New iterator.
34164 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
34165 (*pred_cmp<mode>): Ditto.
34166 (*pred_cmp<mode>_narrow): Ditto.
34167 (@pred_ltge<mode>): Ditto.
34168 (*pred_ltge<mode>): Ditto.
34169 (*pred_ltge<mode>_narrow): Ditto.
34170 (@pred_cmp<mode>_scalar): Ditto.
34171 (*pred_cmp<mode>_scalar): Ditto.
34172 (*pred_cmp<mode>_scalar_narrow): Ditto.
34173 (@pred_eqne<mode>_scalar): Ditto.
34174 (*pred_eqne<mode>_scalar): Ditto.
34175 (*pred_eqne<mode>_scalar_narrow): Ditto.
34176 (*pred_cmp<mode>_extended_scalar): Ditto.
34177 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
34178 (*pred_eqne<mode>_extended_scalar): Ditto.
34179 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
34180 (@pred_ge<mode>_scalar): Ditto.
34181 (@pred_<optab><mode>): Ditto.
34182 (@pred_n<optab><mode>): Ditto.
34183 (@pred_<optab>n<mode>): Ditto.
34184 (@pred_not<mode>): Ditto.
34186 2023-02-15 Martin Jambor <mjambor@suse.cz>
34189 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
34190 creation of non-scalar replacements even if IPA-CP knows their
34193 2023-02-15 Jakub Jelinek <jakub@redhat.com>
34197 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
34198 expander, change operand 3 to be TImode, emit maddlddi4 and
34199 umadddi4_highpart{,_le} with its low half and finally add the high
34200 half to the result.
34202 2023-02-15 Martin Liska <mliska@suse.cz>
34204 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
34206 2023-02-15 Richard Biener <rguenther@suse.de>
34208 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
34209 for with_poison and alias worklist to it.
34210 (sanitize_asan_mark_poison): Likewise.
34212 2023-02-15 Richard Biener <rguenther@suse.de>
34215 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
34216 Combine bitmap test and set.
34217 (scalar_chain::add_insn): Likewise.
34218 (scalar_chain::analyze_register_chain): Remove redundant
34219 attempt to add to queue and instead strengthen assert.
34220 Sink common attempts to mark the def dual-mode.
34221 (scalar_chain::add_to_queue): Remove redundant insn bitmap
34224 2023-02-15 Richard Biener <rguenther@suse.de>
34227 * config/i386/i386-features.cc (convert_scalars_to_vector):
34228 Switch candidates bitmaps to tree view before building the chains.
34230 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
34232 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
34233 "failure trying to reload" call.
34235 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
34237 * gdbinit.in (phrs): New command.
34238 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
34239 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
34241 2023-02-14 David Faust <david.faust@oracle.com>
34244 * config/bpf/constraints.md (q): New memory constraint.
34245 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
34246 (zero_extendqidi2): Likewise.
34247 (zero_extendsidi2): Likewise.
34248 (*mov<MM:mode>): Likewise.
34250 2023-02-14 Andrew Pinski <apinski@marvell.com>
34252 PR tree-optimization/108355
34253 PR tree-optimization/96921
34254 * match.pd: Add pattern for "1 - bool_val".
34256 2023-02-14 Richard Biener <rguenther@suse.de>
34258 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
34259 basic block index hashing on the availability of ->cclhs.
34260 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
34261 rely on ->cclhs availability.
34262 (vn_phi_lookup): Set ->cclhs only when we are eventually
34263 going to CSE the PHI.
34264 (vn_phi_insert): Likewise.
34266 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
34268 * gimplify.cc (gimplify_save_expr): Add missing guard.
34270 2023-02-14 Richard Biener <rguenther@suse.de>
34272 PR tree-optimization/108782
34273 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
34274 Make sure we're not vectorizing an inner loop.
34276 2023-02-14 Jakub Jelinek <jakub@redhat.com>
34278 PR sanitizer/108777
34279 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
34280 * asan.h (asan_memfn_rtl): Declare.
34281 * asan.cc (asan_memfn_rtls): New variable.
34282 (asan_memfn_rtl): New function.
34283 * builtins.cc (expand_builtin): If
34284 param_asan_kernel_mem_intrinsic_prefix and function is
34285 kernel-{,hw}address sanitized, emit calls to
34286 __{,hw}asan_{memcpy,memmove,memset} rather than
34287 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
34288 instead of flag_sanitize & SANITIZE_ADDRESS to check if
34289 asan_intercepted_p functions shouldn't be expanded inline.
34291 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
34293 PR tree-optimization/96373
34294 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
34295 operations on the loop mask. Reject partial vectors if this isn't
34298 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
34300 PR rtl-optimization/108681
34301 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
34302 code to handle bare uses and clobbers.
34304 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
34306 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
34307 caller_save_p flag when clearing defined_p flag.
34308 (setup_reg_equiv): Ditto.
34309 * lra-constraints.cc (lra_constraints): Ditto.
34311 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
34314 * config/i386/predicates.md (extr_register_operand):
34315 New special predicate.
34316 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
34317 as operand 1 predicate.
34318 (*exzv<mode>): Ditto.
34319 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
34321 2023-02-13 Richard Biener <rguenther@suse.de>
34323 PR tree-optimization/28614
34324 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
34325 walking all edges in most cases.
34326 (vn_nary_op_insert_pieces_predicated): Avoid repeated
34327 calls to can_track_predicate_on_edge unless checking is
34329 (process_bb): Instead call it once here for each edge
34330 we register possibly multiple predicates on.
34332 2023-02-13 Richard Biener <rguenther@suse.de>
34334 PR tree-optimization/108691
34335 * tree-cfg.cc (notice_special_calls): When the CFG is built
34336 honor gimple_call_ctrl_altering_p.
34337 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
34338 temporarily if the call is not control-altering.
34339 * calls.cc (emit_call_1): Do not add REG_SETJMP if
34340 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
34342 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
34345 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
34346 (struct s390_sched_state): Initialise to zero.
34347 (s390_sched_variable_issue): For better debuggability also emit
34349 (s390_sched_init): Unconditionally reset scheduler state.
34351 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
34353 * ifcvt.h (noce_if_info::cond_inverted): New field.
34354 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
34355 values when cond_inverted is true.
34356 (noce_find_if_block): Allow the condition to be inverted when
34357 handling conditional moves.
34359 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
34361 * config/s390/predicates.md (execute_operation): Use
34362 constrain_operands instead of extract_constrain_insn in order to
34363 determine wheter there exists a valid alternative.
34365 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
34367 * common/config/arc/arc-common.cc (arc_option_optimization_table):
34368 Remove millicode from list.
34370 2023-02-13 Martin Liska <mliska@suse.cz>
34372 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
34374 2023-02-13 Richard Biener <rguenther@suse.de>
34376 PR tree-optimization/106722
34377 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
34378 whether we marked a stmt.
34379 (mark_control_dependent_edges_necessary): When
34380 mark_last_stmt_necessary didn't mark any stmt make sure
34381 to mark its control dependent edges.
34382 (propagate_necessity): Likewise.
34384 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
34386 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
34387 (DWARF_FRAME_REGISTERS): New.
34388 (DWARF_REG_TO_UNWIND_COLUMN): New.
34390 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
34392 * doc/sourcebuild.texi: Remove (broken) direct reference to
34393 "The GNU configure and build system".
34395 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
34397 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
34398 gen_add3_insn to gen_rtx_SET.
34399 (riscv_adjust_libcall_cfi_epilogue): Likewise.
34401 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34403 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
34404 (class vnclip): Ditto.
34406 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34407 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
34416 * config/riscv/vector-iterators.md (su): Add instruction.
34419 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
34420 (@pred_<sat_op><mode>_scalar): Ditto.
34421 (*pred_<sat_op><mode>_scalar): Ditto.
34422 (*pred_<sat_op><mode>_extended_scalar): Ditto.
34423 (@pred_narrow_clip<v_su><mode>): Ditto.
34424 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
34426 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34428 * config/riscv/constraints.md (Wbr): Remove unused constraint.
34429 * config/riscv/predicates.md: Fix move operand predicate.
34430 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
34431 (class vncvt_x): Ditto.
34432 (class vmerge): Ditto.
34433 (class vmv_v): Ditto.
34435 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34436 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
34443 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
34444 (struct move_def): Ditto.
34446 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34447 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
34448 (DEF_RVV_WEXTU_OPS): Ditto
34449 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
34454 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
34455 * config/riscv/vector-iterators.md (nmsac):New iterator.
34456 (nmsub): New iterator.
34457 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
34458 (@pred_merge<mode>_scalar): New pattern.
34459 (*pred_merge<mode>_scalar): New pattern.
34460 (*pred_merge<mode>_extended_scalar): New pattern.
34461 (@pred_narrow_<optab><mode>): New pattern.
34462 (@pred_narrow_<optab><mode>_scalar): New pattern.
34463 (@pred_trunc<mode>): New pattern.
34465 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34467 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
34468 (class vmsbc): Ditto.
34469 (BASE): Define new class.
34470 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34471 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
34473 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
34476 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34477 * config/riscv/riscv-vector-builtins.cc
34478 (function_expander::use_exact_insn): Adjust for new support
34479 * config/riscv/riscv-vector-builtins.h
34480 (function_base::has_merge_operand_p): New function.
34481 * config/riscv/vector-iterators.md: New iterator.
34482 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
34483 (@pred_msbc<mode>): Ditto.
34484 (@pred_madc<mode>_scalar): Ditto.
34485 (@pred_msbc<mode>_scalar): Ditto.
34486 (*pred_madc<mode>_scalar): Ditto.
34487 (*pred_madc<mode>_extended_scalar): Ditto.
34488 (*pred_msbc<mode>_scalar): Ditto.
34489 (*pred_msbc<mode>_extended_scalar): Ditto.
34490 (@pred_madc<mode>_overflow): Ditto.
34491 (@pred_msbc<mode>_overflow): Ditto.
34492 (@pred_madc<mode>_overflow_scalar): Ditto.
34493 (@pred_msbc<mode>_overflow_scalar): Ditto.
34494 (*pred_madc<mode>_overflow_scalar): Ditto.
34495 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
34496 (*pred_msbc<mode>_overflow_scalar): Ditto.
34497 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
34499 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34501 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
34502 * config/riscv/riscv-v.cc (simm32_p): Ditto.
34503 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
34504 (class vsbc): Ditto.
34506 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34507 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
34509 * config/riscv/riscv-vector-builtins-shapes.cc
34510 (struct no_mask_policy_def): Ditto.
34512 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34513 * config/riscv/riscv-vector-builtins.cc
34514 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
34515 (rvv_arg_type_info::get_tree_type): Ditto.
34516 (function_expander::use_exact_insn): Ditto.
34517 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
34518 (function_base::use_mask_predication_p): New function.
34519 * config/riscv/vector-iterators.md: New iterator.
34520 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
34521 (@pred_sbc<mode>): Ditto.
34522 (@pred_adc<mode>_scalar): Ditto.
34523 (@pred_sbc<mode>_scalar): Ditto.
34524 (*pred_adc<mode>_scalar): Ditto.
34525 (*pred_adc<mode>_extended_scalar): Ditto.
34526 (*pred_sbc<mode>_scalar): Ditto.
34527 (*pred_sbc<mode>_extended_scalar): Ditto.
34529 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34531 * config/riscv/vector.md: use "zero" reg.
34533 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34535 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
34537 (class vwmulsu): Ditto.
34538 (class vwcvt): Ditto.
34539 (BASE): Add integer widening support.
34540 * config/riscv/riscv-vector-builtins-bases.h: Ditto
34541 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
34542 (vwsub): New class.
34543 (vwmul): New class.
34544 (vwmulu): New class.
34545 (vwmulsu): New class.
34546 (vwaddu): New class.
34547 (vwsubu): New class.
34548 (vwcvt_x): New class.
34549 (vwcvtu_x): New class.
34550 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
34552 (struct widen_alu_def): New class.
34553 (SHAPE): New class.
34554 * config/riscv/riscv-vector-builtins-shapes.h: New class.
34555 * config/riscv/riscv-vector-builtins.cc
34556 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
34557 (rvv_arg_type_info::get_tree_type): Ditto.
34558 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
34560 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
34562 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
34563 * config/riscv/riscv.h (X0_REGNUM): New constant.
34564 * config/riscv/vector-iterators.md: New iterators.
34565 * config/riscv/vector.md
34566 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
34568 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
34570 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
34571 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
34573 (@pred_widen_mulsu<mode>): Ditto.
34574 (@pred_widen_mulsu<mode>_scalar): Ditto.
34575 (@pred_<optab><mode>): Ditto.
34577 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34578 kito-cheng <kito.cheng@sifive.com>
34580 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
34581 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
34583 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34584 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
34588 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
34590 (DEF_RVV_FULL_V_U_OPS): Ditto.
34591 (vint8mf8_t): Ditto.
34592 (vint8mf4_t): Ditto.
34593 (vint8mf2_t): Ditto.
34594 (vint8m1_t): Ditto.
34595 (vint8m2_t): Ditto.
34596 (vint8m4_t): Ditto.
34597 (vint8m8_t): Ditto.
34598 (vint16mf4_t): Ditto.
34599 (vint16mf2_t): Ditto.
34600 (vint16m1_t): Ditto.
34601 (vint16m2_t): Ditto.
34602 (vint16m4_t): Ditto.
34603 (vint16m8_t): Ditto.
34604 (vint32mf2_t): Ditto.
34605 (vint32m1_t): Ditto.
34606 (vint32m2_t): Ditto.
34607 (vint32m4_t): Ditto.
34608 (vint32m8_t): Ditto.
34609 (vint64m1_t): Ditto.
34610 (vint64m2_t): Ditto.
34611 (vint64m4_t): Ditto.
34612 (vint64m8_t): Ditto.
34613 (vuint8mf8_t): Ditto.
34614 (vuint8mf4_t): Ditto.
34615 (vuint8mf2_t): Ditto.
34616 (vuint8m1_t): Ditto.
34617 (vuint8m2_t): Ditto.
34618 (vuint8m4_t): Ditto.
34619 (vuint8m8_t): Ditto.
34620 (vuint16mf4_t): Ditto.
34621 (vuint16mf2_t): Ditto.
34622 (vuint16m1_t): Ditto.
34623 (vuint16m2_t): Ditto.
34624 (vuint16m4_t): Ditto.
34625 (vuint16m8_t): Ditto.
34626 (vuint32mf2_t): Ditto.
34627 (vuint32m1_t): Ditto.
34628 (vuint32m2_t): Ditto.
34629 (vuint32m4_t): Ditto.
34630 (vuint32m8_t): Ditto.
34631 (vuint64m1_t): Ditto.
34632 (vuint64m2_t): Ditto.
34633 (vuint64m4_t): Ditto.
34634 (vuint64m8_t): Ditto.
34635 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
34636 (DEF_RVV_FULL_V_U_OPS): Ditto.
34637 (check_required_extensions): Add vmulh support.
34638 (rvv_arg_type_info::get_tree_type): Ditto.
34639 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
34640 (enum rvv_base_type): Ditto.
34641 * config/riscv/riscv.opt: Add 'V' extension flag.
34642 * config/riscv/vector-iterators.md (su): New iterator.
34643 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
34644 (@pred_mulh<v_su><mode>_scalar): Ditto.
34645 (*pred_mulh<v_su><mode>_scalar): Ditto.
34646 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
34648 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34650 * config/riscv/iterators.md: Add sign_extend/zero_extend.
34651 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
34653 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
34654 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
34657 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
34658 for vsext/vzext support.
34659 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
34661 (DEF_RVV_QEXTI_OPS): Ditto.
34662 (DEF_RVV_OEXTI_OPS): Ditto.
34663 (DEF_RVV_WEXTU_OPS): Ditto.
34664 (DEF_RVV_QEXTU_OPS): Ditto.
34665 (DEF_RVV_OEXTU_OPS): Ditto.
34666 (vint16mf4_t): Ditto.
34667 (vint16mf2_t): Ditto.
34668 (vint16m1_t): Ditto.
34669 (vint16m2_t): Ditto.
34670 (vint16m4_t): Ditto.
34671 (vint16m8_t): Ditto.
34672 (vint32mf2_t): Ditto.
34673 (vint32m1_t): Ditto.
34674 (vint32m2_t): Ditto.
34675 (vint32m4_t): Ditto.
34676 (vint32m8_t): Ditto.
34677 (vint64m1_t): Ditto.
34678 (vint64m2_t): Ditto.
34679 (vint64m4_t): Ditto.
34680 (vint64m8_t): Ditto.
34681 (vuint16mf4_t): Ditto.
34682 (vuint16mf2_t): Ditto.
34683 (vuint16m1_t): Ditto.
34684 (vuint16m2_t): Ditto.
34685 (vuint16m4_t): Ditto.
34686 (vuint16m8_t): Ditto.
34687 (vuint32mf2_t): Ditto.
34688 (vuint32m1_t): Ditto.
34689 (vuint32m2_t): Ditto.
34690 (vuint32m4_t): Ditto.
34691 (vuint32m8_t): Ditto.
34692 (vuint64m1_t): Ditto.
34693 (vuint64m2_t): Ditto.
34694 (vuint64m4_t): Ditto.
34695 (vuint64m8_t): Ditto.
34696 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
34697 (DEF_RVV_QEXTI_OPS): Ditto.
34698 (DEF_RVV_OEXTI_OPS): Ditto.
34699 (DEF_RVV_WEXTU_OPS): Ditto.
34700 (DEF_RVV_QEXTU_OPS): Ditto.
34701 (DEF_RVV_OEXTU_OPS): Ditto.
34702 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
34704 (rvv_arg_type_info::get_tree_type): Ditto.
34705 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
34706 * config/riscv/vector-iterators.md (z): New attribute.
34707 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
34708 (@pred_<optab><mode>_vf4): Ditto.
34709 (@pred_<optab><mode>_vf8): Ditto.
34711 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34713 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
34714 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
34715 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
34716 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34717 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
34721 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
34726 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
34727 (@pred_<optab><mode>_scalar): New pattern.
34728 (*pred_<optab><mode>_scalar): New pattern.
34729 (*pred_<optab><mode>_extended_scalar): New pattern.
34731 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34733 * config/riscv/iterators.md: Add neg and not.
34734 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
34736 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34737 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
34758 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
34759 (struct alu_def): Ditto.
34761 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34762 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
34763 * config/riscv/vector-iterators.md: New iterator.
34764 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
34766 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34768 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
34770 2023-02-11 Jakub Jelinek <jakub@redhat.com>
34773 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
34774 item->offset bit position is too large to be representable as
34775 unsigned int byte position.
34777 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
34779 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
34781 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
34783 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
34784 valid_combine only when ira_use_lra_p is true.
34786 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
34788 * params.opt (ira-simple-lra-insn-threshold): Add new param.
34789 * ira.cc (ira): Use the param to switch on simple LRA.
34791 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
34793 PR tree-optimization/108687
34794 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
34795 back to RFD_NONE mode for calculations.
34796 (ranger_cache::propagate_cache): Call the internal edge range API
34797 with RFD_READ_ONLY instead of changing the external routine.
34799 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
34801 PR tree-optimization/108520
34802 * gimple-range-infer.cc (check_assume_func): Invoke
34803 gimple_range_global directly instead using global_range_query.
34804 * value-query.cc (get_range_global): Add function context and
34805 avoid calling nonnull_arg_p if not cfun.
34806 (gimple_range_global): Add function context pointer.
34807 * value-query.h (imple_range_global): Add function context.
34809 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34811 * config/riscv/constraints.md (Wdm): Adjust constraint.
34812 (Wbr): New constraint.
34813 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
34814 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
34815 (emit_vlmax_op): New function.
34816 (emit_nonvlmax_op): Ditto.
34818 (neg_simm5_p): Ditto.
34819 (has_vi_variant_p): Ditto.
34820 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
34821 (emit_vlmax_op): New function.
34822 (emit_nonvlmax_op): Ditto.
34823 (expand_const_vector): Adjust function.
34824 (legitimize_move): Ditto.
34825 (simm32_p): New function.
34827 (neg_simm5_p): Ditto.
34828 (has_vi_variant_p): Ditto.
34829 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
34831 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34832 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
34835 (vminu): Remove signed cases.
34837 (vdiv): Remove unsigned cases.
34839 (vdivu): Remove signed cases.
34843 (vrsub): New class.
34848 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
34849 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
34850 * config/riscv/vector-iterators.md: New iterators.
34851 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
34853 (@pred_<optab><mode>_scalar): New pattern.
34854 (@pred_sub<mode>_reverse_scalar): Ditto.
34855 (*pred_<optab><mode>_scalar): Ditto.
34856 (*pred_<optab><mode>_extended_scalar): Ditto.
34857 (*pred_sub<mode>_reverse_scalar): Ditto.
34858 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
34860 2023-02-10 Richard Biener <rguenther@suse.de>
34862 PR tree-optimization/108724
34863 * tree-vect-stmts.cc (vectorizable_operation): Avoid
34864 using word_mode vectors when vector lowering will
34865 decompose them to elementwise operations.
34867 2023-02-10 Jakub Jelinek <jakub@redhat.com>
34870 2023-02-09 Martin Liska <mliska@suse.cz>
34873 * doc/extend.texi: Document that the function
34874 does not work correctly for old VIA processors.
34876 2023-02-10 Andrew Pinski <apinski@marvell.com>
34877 Andrew Macleod <amacleod@redhat.com>
34879 PR tree-optimization/108684
34880 * tree-ssa-dce.cc (simple_dce_from_worklist):
34881 Check all ssa names and not just non-vdef ones
34882 before accepting the inline-asm.
34883 Call unlink_stmt_vdef on the statement before
34886 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
34888 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
34889 * ira.cc (validate_equiv_mem): Check memref address variance.
34890 (no_equiv): Clear caller_save_p flag.
34891 (update_equiv_regs): Define caller save equivalence for
34893 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
34894 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
34895 call_save_p. Use caller save equivalence depending on the arg.
34896 (split_reg): Adjust the call.
34898 2023-02-09 Jakub Jelinek <jakub@redhat.com>
34901 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
34902 (cpu_indicator_init): Call get_available_features for all CPUs with
34903 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
34906 2023-02-09 Jakub Jelinek <jakub@redhat.com>
34908 PR tree-optimization/108688
34909 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
34910 of BIT_INSERT_EXPR extracting exactly all inserted bits even
34911 when without mode precision. Formatting fixes.
34913 2023-02-09 Andrew Pinski <apinski@marvell.com>
34915 PR tree-optimization/108688
34916 * match.pd (bit_field_ref [bit_insert]): Avoid generating
34917 BIT_FIELD_REFs of non-mode-precision integral operands.
34919 2023-02-09 Martin Liska <mliska@suse.cz>
34922 * doc/extend.texi: Document that the function
34923 does not work correctly for old VIA processors.
34925 2023-02-09 Andreas Schwab <schwab@suse.de>
34927 * lto-wrapper.cc (merge_and_complain): Handle
34928 -funwind-tables and -fasynchronous-unwind-tables.
34929 (append_compiler_options): Likewise.
34931 2023-02-09 Richard Biener <rguenther@suse.de>
34933 PR tree-optimization/26854
34934 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
34935 view around insert_updated_phi_nodes_for.
34936 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
34938 (walk_aliased_vdefs_1): Likewise.
34940 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
34942 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
34944 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
34947 * config.gcc (tm_mlib_file): Define new variable.
34949 2023-02-08 Jakub Jelinek <jakub@redhat.com>
34951 PR tree-optimization/108692
34952 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
34953 widened_code which is different from code, don't call
34954 vect_look_through_possible_promotion but instead just check op is
34955 SSA_NAME with integral type for which vect_is_simple_use is true
34956 and call set_op on this_unprom.
34958 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
34960 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
34962 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
34964 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
34965 to 'aarch_ra_sign_key'.
34966 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
34968 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
34969 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
34970 * config/arm/arm.opt: Define.
34972 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
34974 PR tree-optimization/108316
34975 * tree-vect-stmts.cc (get_load_store_type): When using
34976 internal functions for gather/scatter, make sure that the type
34977 of the offset argument is consistent with the offset vector type.
34979 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
34982 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
34984 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
34985 * ira.cc (validate_equiv_mem): Check memref address variance.
34986 (update_equiv_regs): Define caller save equivalence for
34988 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
34989 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
34990 call_save_p. Use caller save equivalence depending on the arg.
34991 (split_reg): Adjust the call.
34993 2023-02-08 Jakub Jelinek <jakub@redhat.com>
34995 * tree.def (SAD_EXPR): Remove outdated comment about missing
34998 2023-02-07 Marek Polacek <polacek@redhat.com>
35000 * doc/invoke.texi: Update -fchar8_t documentation.
35002 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
35004 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
35005 * ira.cc (validate_equiv_mem): Check memref address variance.
35006 (update_equiv_regs): Define caller save equivalence for
35008 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
35009 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
35010 call_save_p. Use caller save equivalence depending on the arg.
35011 (split_reg): Adjust the call.
35013 2023-02-07 Richard Biener <rguenther@suse.de>
35015 PR tree-optimization/26854
35016 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
35017 instead of immediate uses.
35019 2023-02-07 Jakub Jelinek <jakub@redhat.com>
35021 PR tree-optimization/106923
35022 * ipa-split.cc (execute_split_functions): Don't split returns_twice
35025 2023-02-07 Jakub Jelinek <jakub@redhat.com>
35027 PR tree-optimization/106433
35028 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
35029 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
35031 2023-02-07 Jan Hubicka <jh@suse.cz>
35033 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
35036 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
35038 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
35039 (process_asm): Create a constructor for GCN_STACK_SIZE.
35040 (main): Parse the -mstack-size option.
35042 2023-02-06 Alex Coplan <alex.coplan@arm.com>
35045 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
35046 Use correct constraint for operand 3.
35048 2023-02-06 Martin Jambor <mjambor@suse.cz>
35050 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
35052 2023-02-06 Xi Ruoyao <xry111@xry111.site>
35054 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
35055 New define_int_iterator.
35056 (bytepick_d_ashift_amount): Likewise.
35057 (bytepick_imm): New define_int_attr.
35058 (bytepick_w_lshiftrt_amount): Likewise.
35059 (bytepick_d_lshiftrt_amount): Likewise.
35060 (bytepick_w_<bytepick_imm>): New define_insn template.
35061 (bytepick_w_<bytepick_imm>_extend): Likewise.
35062 (bytepick_d_<bytepick_imm>): Likewise.
35063 (bytepick_w): Remove unused define_insn.
35064 (bytepick_d): Likewise.
35065 (UNSPEC_BYTEPICK_W): Remove unused unspec.
35066 (UNSPEC_BYTEPICK_D): Likewise.
35067 * config/loongarch/predicates.md (const_0_to_3_operand):
35068 Remove unused define_predicate.
35069 (const_0_to_7_operand): Likewise.
35071 2023-02-06 Jakub Jelinek <jakub@redhat.com>
35073 PR tree-optimization/108655
35074 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
35075 or -fsanitize=unreachable -fsanitize-trap=unreachable return
35076 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
35078 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
35080 * doc/install.texi (Specific): Remove PW32.
35082 2023-02-03 Jakub Jelinek <jakub@redhat.com>
35084 PR tree-optimization/108647
35085 * range-op.cc (operator_equal::op1_range,
35086 operator_not_equal::op1_range): Don't test op2 bound
35087 equality if op2.undefined_p (), instead set_varying.
35088 (operator_lt::op1_range, operator_le::op1_range,
35089 operator_gt::op1_range, operator_ge::op1_range): Return false if
35090 op2.undefined_p ().
35091 (operator_lt::op2_range, operator_le::op2_range,
35092 operator_gt::op2_range, operator_ge::op2_range): Return false if
35093 op1.undefined_p ().
35095 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
35097 PR tree-optimization/108639
35098 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
35100 (irange::operator==): Same.
35102 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
35104 PR tree-optimization/108647
35105 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
35106 (foperator_lt::op2_range): Same.
35107 (foperator_le::op1_range): Same.
35108 (foperator_le::op2_range): Same.
35109 (foperator_gt::op1_range): Same.
35110 (foperator_gt::op2_range): Same.
35111 (foperator_ge::op1_range): Same.
35112 (foperator_ge::op2_range): Same.
35113 (foperator_unordered_lt::op1_range): Same.
35114 (foperator_unordered_lt::op2_range): Same.
35115 (foperator_unordered_le::op1_range): Same.
35116 (foperator_unordered_le::op2_range): Same.
35117 (foperator_unordered_gt::op1_range): Same.
35118 (foperator_unordered_gt::op2_range): Same.
35119 (foperator_unordered_ge::op1_range): Same.
35120 (foperator_unordered_ge::op2_range): Same.
35122 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
35124 PR tree-optimization/107570
35125 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
35127 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
35129 * doc/gm2.texi (Internals): Remove from menu.
35130 (Using): Comment out ifnohtml conditional.
35131 (Documentation): Use gcc url.
35132 (License): Node simplified.
35133 (Copying): New node. Include gpl_v3_without_node.
35134 (Contributing): Node simplified.
35135 (Internals): Commented out.
35136 (Libraries): Node simplified.
35139 (Functions): Ditto.
35141 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
35143 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
35145 (mve_vqshluq_m_n_s<mode>): Likewise.
35146 (mve_vshlq_m_<supf><mode>): Likewise.
35147 (mve_vsriq_m_n_<supf><mode>): Likewise.
35148 (mve_vsubq_m_<supf><mode>): Likewise.
35150 2023-02-03 Martin Jambor <mjambor@suse.cz>
35153 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
35154 when comparing to an IPA-CP value.
35155 (dump_list_of_param_indices): New function.
35156 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
35157 Dump removed candidates using dump_list_of_param_indices.
35158 * ipa-param-manipulation.cc
35159 (ipa_param_body_adjustments::modify_expression): Add assert checking
35160 sizes of a VIEW_CONVERT_EXPR will match.
35161 (ipa_param_body_adjustments::modify_assignment): Likewise.
35163 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
35165 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
35166 * config/riscv/riscv.cc: Ditto.
35168 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35170 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
35174 * config/riscv/vector.md: Ditto.
35176 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35178 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
35179 * config/riscv/riscv-vector-builtins-bases.cc: New class.
35180 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
35183 * config/riscv/riscv-vector-builtins.cc: Ditto.
35184 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
35186 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
35188 * toplev.cc (toplev::main): Only print the version information header
35189 from toplevel main().
35191 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
35193 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
35194 cond_{ashl|ashr|lshr}
35196 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
35198 PR rtl-optimization/108086
35199 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
35200 Adjust size-related commentary accordingly.
35202 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
35204 PR rtl-optimization/108508
35205 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
35206 the splay tree search gives the first clobber in the second group,
35207 make sure that the root of the first clobber group is updated
35208 correctly. Enter the new clobber group into the definition splay
35211 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
35213 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
35214 Fix finding best match score.
35216 2023-02-02 Jakub Jelinek <jakub@redhat.com>
35219 PR rtl-optimization/108463
35221 * cselib.cc (cselib_current_insn): Move declaration earlier.
35222 (cselib_hasher::equal): For debug only locs, temporarily override
35223 cselib_current_insn to their l->setting_insn for the
35224 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
35225 promote some debug locs.
35226 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
35227 when using cselib call cselib_lookup_from_insn on the address but
35228 don't substitute it.
35230 2023-02-02 Richard Biener <rguenther@suse.de>
35232 PR middle-end/108625
35233 * genmatch.cc (expr::gen_transform): Also disallow resimplification
35234 from pushing to lseq with force_leaf.
35235 (dt_simplify::gen_1): Likewise.
35237 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
35239 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
35240 (struct kernargs): Replace the common content with kernargs_abi.
35241 (struct heap): Delete.
35242 (main): Read GCN_STACK_SIZE envvar.
35243 Allocate space for the device stacks.
35244 Write the new kernargs fields.
35245 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
35246 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
35247 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
35248 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
35249 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
35250 Set up the stacks from the values in the kernargs, not private.
35251 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
35252 (gcn_hsa_declare_function_name): Turn off the private segment.
35253 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
35254 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
35255 * config/gcn/gcn.opt (mstack-size): Change the description.
35257 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35260 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
35261 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
35262 addressing MVE predicate modes.
35263 (mve_bool_vec_to_const): Change to represent correct MVE predicate
35265 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
35267 (arm_vector_mode_supported_p): Likewise.
35268 (arm_mode_to_pred_mode): Add V2QI.
35269 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
35271 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
35272 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
35273 (v2qi_UP): New macro.
35274 (v4bi_UP): New macro.
35275 (v8bi_UP): New macro.
35276 (v16bi_UP): New macro.
35277 (arm_expand_builtin_args): Make it able to expand the new predicate
35279 * config/arm/arm-modes.def (V2QI): New mode.
35280 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
35281 Pred4x4_t): Remove unused predicate builtin types.
35282 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
35283 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
35284 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
35285 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
35286 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
35287 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
35288 of MODE_VECTOR_BOOL.
35289 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
35290 (MVE_VPRED): Likewise.
35291 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
35292 (MVE_vctp): New mode attribute.
35296 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
35297 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
35299 (mve_vpnothi): Rename this...
35300 (mve_vpnotv16bi): ... to this.
35301 (mve_vctp<mode1>q_mhi): Rename this...
35302 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
35303 (mve_vldrdq_gather_base_z_<supf>v2di,
35304 mve_vldrdq_gather_offset_z_<supf>v2di,
35305 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
35306 mve_vstrdq_scatter_base_p_<supf>v2di,
35307 mve_vstrdq_scatter_offset_p_<supf>v2di,
35308 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
35309 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
35310 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
35311 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
35312 mve_vldrdq_gather_base_wb_z_<supf>v2di,
35313 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
35314 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
35316 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
35318 (VCTP): ... with this.
35319 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
35320 (VCTP_M): ... with this.
35321 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
35322 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
35324 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35327 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
35328 (arm_modes_tieable_p): Make MVE predicate modes tieable.
35329 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
35330 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
35331 simplify_subreg to simplify subregs where the outermode is not scalar.
35333 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
35336 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
35337 new qualifiers parameter and use unsigned short type for MVE predicate.
35338 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
35340 (arm_init_crypto_builtins): Likewise.
35342 2023-02-02 Jakub Jelinek <jakub@redhat.com>
35345 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
35346 * internal-fn.def (TRAP): Remove.
35347 * internal-fn.cc (expand_TRAP): Remove.
35348 * tree.cc (build_common_builtin_nodes): Define
35349 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
35350 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
35351 instead of BUILT_IN_TRAP.
35352 * gimple.cc (gimple_build_builtin_unreachable): Remove
35353 emitting internal function for BUILT_IN_TRAP.
35354 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
35355 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
35356 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
35357 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
35358 BUILT_IN_UNREACHABLE_TRAP.
35359 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
35360 * tree-cfg.cc (verify_gimple_call,
35361 pass_warn_function_return::execute): Likewise.
35362 * attribs.cc (decl_attributes): Don't report exclusions on
35363 BUILT_IN_UNREACHABLE_TRAP either.
35365 2023-02-02 liuhongt <hongtao.liu@intel.com>
35367 PR tree-optimization/108601
35368 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
35369 * tree-vect-loop.cc
35370 (vectorizable_nonlinear_induction): Remove
35371 vect_can_peel_nonlinear_iv_p.
35372 (vect_can_peel_nonlinear_iv_p): Don't peel
35373 nonlinear iv(mult or shift) for epilog when vf is not
35374 constant and moved the defination to ..
35375 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
35378 2023-02-02 Jakub Jelinek <jakub@redhat.com>
35380 PR middle-end/108435
35381 * tree-nested.cc (convert_nonlocal_omp_clauses)
35382 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
35383 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
35384 before calling declare_vars.
35385 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
35386 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
35387 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
35388 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
35390 2023-02-01 Tamar Christina <tamar.christina@arm.com>
35392 * common/config/aarch64/aarch64-common.cc
35393 (struct aarch64_option_extension): Add native_detect and document struct
35395 (all_extensions): Set new field native_detect.
35396 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
35399 2023-02-01 Martin Liska <mliska@suse.cz>
35401 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
35404 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
35406 PR tree-optimization/108356
35407 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
35408 do a search of the DOM tree for a range.
35410 2023-02-01 Martin Liska <mliska@suse.cz>
35413 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
35414 ony non-null values.
35415 * ipa.cc (walk_polymorphic_call_targets): Likewise.
35417 2023-02-01 Martin Liska <mliska@suse.cz>
35420 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
35423 2023-02-01 Jakub Jelinek <jakub@redhat.com>
35426 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
35427 subregs in DEBUG_INSNs.
35429 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
35431 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
35433 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
35435 * config/s390/s390.cc (s390_restore_gpr_p): New function.
35436 (s390_preserve_gpr_arg_in_range_p): New function.
35437 (s390_preserve_gpr_arg_p): New function.
35438 (s390_preserve_fpr_arg_p): New function.
35439 (s390_register_info_stdarg_fpr): Rename to ...
35440 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
35441 (s390_register_info_stdarg_gpr): Rename to ...
35442 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
35443 (s390_register_info): Use the renamed functions above.
35444 (s390_optimize_register_info): Likewise.
35445 (save_fpr): Generate CFI for -mpreserve-args.
35446 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
35447 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
35448 (s390_optimize_prologue): Likewise.
35449 * config/s390/s390.opt: New option -mpreserve-args
35451 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
35453 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
35454 (restore_gprs): Likewise.
35455 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
35456 frame pointer if a frame-pointer is used.
35457 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
35458 * config/s390/s390.md (stack_tie): Add a register operand and
35460 (@stack_tie<mode>): ... this.
35462 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
35464 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
35465 EMIT_CFI parameter.
35466 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
35467 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
35469 2023-02-01 Richard Biener <rguenther@suse.de>
35471 PR middle-end/108500
35472 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
35473 with tree traversal algorithm.
35475 2023-02-01 Jason Merrill <jason@redhat.com>
35477 * doc/invoke.texi: Document -Wno-changes-meaning.
35479 2023-02-01 David Malcolm <dmalcolm@redhat.com>
35481 * doc/invoke.texi (Static Analyzer Options): Add notes about
35482 limitations of -fanalyzer.
35484 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35486 * config/riscv/constraints.md (vj): New.
35488 * config/riscv/iterators.md: Add more opcode.
35489 * config/riscv/predicates.md (vector_arith_operand): New.
35490 (vector_neg_arith_operand): New.
35491 (vector_shift_operand): New.
35492 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
35493 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
35510 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
35527 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
35528 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
35529 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
35530 (DEF_RVV_U_OPS): New.
35531 (rvv_arg_type_info::get_base_vector_type): Handle
35532 RVV_BASE_shift_vector.
35533 (rvv_arg_type_info::get_tree_type): Ditto.
35534 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
35535 RVV_BASE_shift_vector.
35536 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
35537 * config/riscv/vector-iterators.md: Handle more opcode.
35538 * config/riscv/vector.md (@pred_<optab><mode>): New.
35540 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
35543 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
35546 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
35548 PR tree-optimization/108608
35549 * tree-vect-loop.cc (vect_transform_reduction): Handle single
35550 def-use cycles that involve function calls rather than tree codes.
35552 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
35554 PR tree-optimization/108385
35555 * gimple-range-gori.cc (gori_compute::compute_operand_range):
35556 Allow VARYING computations to continue if there is a relation.
35557 * range-op.cc (pointer_plus_operator::op2_range): New.
35559 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
35561 PR tree-optimization/108359
35562 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
35563 (range_operator::fold_range): If op1 is equivalent to op2 then
35564 invoke new fold_in_parts_equiv to operate on sub-components.
35565 * range-op.h (wi_fold_in_parts_equiv): New prototype.
35567 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
35569 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
35570 not abort calculations if there is a valid relation available.
35571 (gori_compute::refine_using_relation): Pass correct relation trio.
35572 (gori_compute::compute_operand1_range): Create trio and use it.
35573 (gori_compute::compute_operand2_range): Ditto.
35574 * range-op.cc (operator_plus::op1_range): Use correct trio member.
35575 (operator_minus::op1_range): Use correct trio member.
35576 * value-relation.cc (value_relation::create_trio): New.
35577 * value-relation.h (value_relation::create_trio): New prototype.
35579 2023-01-31 Jakub Jelinek <jakub@redhat.com>
35582 * config/i386/i386-expand.cc
35583 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
35584 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
35585 equal to bitsize of mode.
35587 2023-01-31 Jakub Jelinek <jakub@redhat.com>
35589 PR rtl-optimization/108596
35590 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
35591 ends with asm goto and has a crossing fallthrough edge to the same bb
35592 that contains at least one of its labels by restoring EDGE_CROSSING
35593 flag even on possible edge from cur_bb to new_bb successor.
35595 2023-01-31 Jakub Jelinek <jakub@redhat.com>
35598 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
35599 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
35600 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
35601 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
35602 uninitialized automatic variable __W.
35604 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
35606 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
35608 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35610 * config/riscv/riscv-protos.h (get_vector_mode): New function.
35611 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
35612 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
35613 (class loadstore): Adjust for indexed loads/stores support.
35615 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
35616 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
35632 * config/riscv/riscv-vector-builtins-shapes.cc
35633 (struct indexed_loadstore_def): New class.
35635 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35636 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
35637 for indexed loads/stores support.
35638 (check_required_extensions): Ditto.
35639 (rvv_arg_type_info::get_base_vector_type): New function.
35640 (rvv_arg_type_info::get_tree_type): Ditto.
35641 (function_builder::add_unique_function): Adjust for indexed loads/stores
35643 (function_expander::use_exact_insn): New function.
35644 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
35645 indexed loads/stores support.
35646 (struct rvv_arg_type_info): Ditto.
35647 (function_expander::index_mode): New function.
35648 (function_base::apply_tail_policy_p): Ditto.
35649 (function_base::apply_mask_policy_p): Ditto.
35650 * config/riscv/vector-iterators.md (unspec): New unspec.
35651 * config/riscv/vector.md (unspec): Ditto.
35652 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
35654 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
35655 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
35656 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
35657 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
35658 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
35659 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
35660 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
35661 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
35662 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
35663 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
35664 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
35665 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
35666 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
35668 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
35670 * config.gcc: Recognize x86_64-*-gnu* targets and include
35672 * config/i386/gnu64.h: Define configuration for new target
35673 including ld.so location.
35675 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
35677 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
35678 ampere1a to include SM4.
35680 2023-01-30 Andrew Pinski <apinski@marvell.com>
35682 PR tree-optimization/108582
35683 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
35684 for middlebb to have no phi nodes.
35686 2023-01-30 Richard Biener <rguenther@suse.de>
35688 PR tree-optimization/108574
35689 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
35690 sameval and def, ignore the equivalence if there's the
35691 danger of oscillating between two values.
35693 2023-01-30 Andreas Schwab <schwab@suse.de>
35695 * common/config/riscv/riscv-common.cc
35696 (riscv_option_optimization_table)
35697 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
35698 -fasynchronous-unwind-tables and -funwind-tables.
35699 * config.gcc (riscv*-*-linux*): Define
35700 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
35702 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
35704 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
35705 value of includedir.
35707 2023-01-30 Richard Biener <rguenther@suse.de>
35710 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
35713 2023-01-30 liuhongt <hongtao.liu@intel.com>
35715 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
35716 * doc/invoke.texi: Ditto.
35718 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
35720 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
35721 (stmt_may_terminate_function_p): If assuming return or EH
35722 volatile asm is safe.
35723 (find_always_executed_bbs): Fix handling of terminating BBS and
35724 infinite loops; add debug output.
35725 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
35727 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
35729 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
35730 off-by-one in checking the permissible shift-amount.
35732 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35734 * doc/extend.texi (Named Address Spaces): Update link to the
35737 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35739 * doc/standards.texi (Standards): Fix markup.
35741 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35743 * doc/standards.texi (Standards): Update link to Objective-C book.
35745 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35747 * doc/invoke.texi (Instrumentation Options): Update reference to
35750 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
35752 * doc/standards.texi: Update Go1 link.
35754 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35756 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
35757 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
35760 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35761 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
35763 * config/riscv/riscv-vector-builtins.cc
35764 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
35765 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
35766 (@pred_strided_store<mode>): Ditto.
35768 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35770 * config/riscv/vector.md (tail_policy_op_idx): Remove.
35771 (mask_policy_op_idx): Remove.
35772 (avl_type_op_idx): Remove.
35774 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
35776 PR tree-optimization/96373
35777 * tree.h (sign_mask_for): Declare.
35778 * tree.cc (sign_mask_for): New function.
35779 (signed_or_unsigned_type_for): For vector types, try to use the
35780 related_int_vector_mode.
35781 * genmatch.cc (commutative_op): Handle conditional internal functions.
35782 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
35784 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
35786 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
35787 Use the likely minimum VF when bounding the denominators to
35788 the estimated number of iterations.
35790 2023-01-27 Richard Biener <rguenther@suse.de>
35793 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
35794 and -Ofast FP environment side-effects.
35796 2023-01-27 Richard Biener <rguenther@suse.de>
35799 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
35800 Don't add crtfastmath.o for -shared.
35802 2023-01-27 Richard Biener <rguenther@suse.de>
35805 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
35808 2023-01-27 Richard Biener <rguenther@suse.de>
35811 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
35812 crtfastmath.o for -shared.
35814 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
35816 PR tree-optimization/108306
35817 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
35818 varying for shifts that are always out of void range.
35819 (operator_rshift::fold_range): Return [0, 0] not
35820 varying for shifts that are always out of void range.
35822 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
35824 PR tree-optimization/108447
35825 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
35826 Do not attempt to fold HONOR_NAN types.
35828 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35830 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
35831 Remove _m suffix for "vop_m" C++ overloaded API name.
35833 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35835 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
35836 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35837 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
35839 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
35840 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
35841 (vbool64_t): Ditto.
35842 (vbool32_t): Ditto.
35843 (vbool16_t): Ditto.
35848 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
35849 (rvv_arg_type_info::get_tree_type): Ditto.
35850 (function_expander::use_contiguous_load_insn): Ditto.
35851 * config/riscv/vector.md (@pred_store<mode>): Ditto.
35853 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35855 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
35856 (vsetvl_discard_result_insn_p): New function.
35857 (reg_killed_by_bb_p): rename to find_reg_killed_by.
35858 (find_reg_killed_by): New name.
35859 (get_vl): allow it to be called by more functions.
35860 (has_vsetvl_killed_avl_p): Add condition.
35861 (get_avl): allow it to be called by more functions.
35862 (insn_should_be_added_p): New function.
35863 (get_all_nonphi_defs): Refine function.
35864 (get_all_sets): Ditto.
35865 (get_same_bb_set): New function.
35866 (any_insn_in_bb_p): Ditto.
35867 (any_set_in_bb_p): Ditto.
35868 (get_vl_vtype_info): Add VLMAX forward optimization.
35869 (source_equal_p): Fix issues.
35870 (extract_single_source): Refine.
35871 (avl_info::multiple_source_equal_p): New function.
35872 (avl_info::operator==): Adjust for final version.
35873 (vl_vtype_info::operator==): Ditto.
35874 (vl_vtype_info::same_avl_p): Ditto.
35875 (vector_insn_info::parse_insn): Ditto.
35876 (vector_insn_info::available_p): New function.
35877 (vector_insn_info::merge): Adjust for final version.
35878 (vector_insn_info::dump): Add hard_empty.
35879 (pass_vsetvl::hard_empty_block_p): New function.
35880 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
35881 (pass_vsetvl::forward_demand_fusion): Ditto.
35882 (pass_vsetvl::demand_fusion): Ditto.
35883 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
35884 (pass_vsetvl::compute_local_properties): Adjust for final version.
35885 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
35886 (pass_vsetvl::refine_vsetvls): Ditto.
35887 (pass_vsetvl::commit_vsetvls): Ditto.
35888 (pass_vsetvl::propagate_avl): New function.
35889 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
35890 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
35892 2023-01-27 Jakub Jelinek <jakub@redhat.com>
35895 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
35896 from size_t to int.
35898 2023-01-27 Jakub Jelinek <jakub@redhat.com>
35901 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
35902 redirection of calls to __builtin_trap in addition to redirection
35903 to __builtin_unreachable.
35905 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35907 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
35909 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35911 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
35912 (emit_vsetvl_insn): Ditto.
35914 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35916 * config/riscv/vector.md: Fix constraints.
35918 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35920 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
35922 2023-01-27 Patrick Palka <ppalka@redhat.com>
35923 Jakub Jelinek <jakub@redhat.com>
35925 * tree-core.h (tree_code_type, tree_code_length): For
35926 C++17 and later, add inline keyword, otherwise don't define
35927 the arrays, but declare extern arrays.
35928 * tree.cc (tree_code_type, tree_code_length): Define these
35929 arrays for C++14 and older.
35931 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35933 * config/riscv/riscv-vsetvl.h: Change it into public.
35935 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35937 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
35940 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35942 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
35944 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35946 * config/riscv/vector.md: Fix incorrect attributes.
35948 2023-01-27 Richard Biener <rguenther@suse.de>
35951 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
35952 Don't add crtfastmath.o for -shared.
35954 2023-01-27 Alexandre Oliva <oliva@gnu.org>
35956 * doc/options.texi (option, RejectNegative): Mention that
35957 -g-started options are also implicitly negatable.
35959 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
35961 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
35962 Use get_typenode_from_name to get fixed-width integer type
35964 * config/riscv/riscv-vector-builtins.def: Update define with
35965 fixed-width integer type nodes.
35967 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35969 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
35970 (real_insn_and_same_bb_p): New function.
35971 (same_bb_and_after_or_equal_p): Remove it.
35972 (before_p): New function.
35973 (reg_killed_by_bb_p): Ditto.
35974 (has_vsetvl_killed_avl_p): Ditto.
35975 (get_vl): Move location so that we can call it.
35976 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
35977 (available_occurrence_p): Ditto.
35978 (dominate_probability_p): Remove it.
35979 (can_backward_propagate_p): Remove it.
35980 (get_all_nonphi_defs): New function.
35981 (get_all_predecessors): Ditto.
35982 (any_insn_in_bb_p): Ditto.
35983 (insert_vsetvl): Adjust AVL REG.
35984 (source_equal_p): New function.
35985 (extract_single_source): Ditto.
35986 (avl_info::single_source_equal_p): Ditto.
35987 (avl_info::operator==): Adjust for AVL=REG.
35988 (vl_vtype_info::same_avl_p): Ditto.
35989 (vector_insn_info::set_demand_info): Remove it.
35990 (vector_insn_info::compatible_p): Adjust for AVL=REG.
35991 (vector_insn_info::compatible_avl_p): New function.
35992 (vector_insn_info::merge): Adjust AVL=REG.
35993 (vector_insn_info::dump): Ditto.
35994 (pass_vsetvl::merge_successors): Remove it.
35995 (enum fusion_type): New enum.
35996 (pass_vsetvl::get_backward_fusion_type): New function.
35997 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
35998 (pass_vsetvl::forward_demand_fusion): Ditto.
35999 (pass_vsetvl::demand_fusion): Ditto.
36000 (pass_vsetvl::prune_expressions): Ditto.
36001 (pass_vsetvl::compute_local_properties): Ditto.
36002 (pass_vsetvl::cleanup_vsetvls): Ditto.
36003 (pass_vsetvl::commit_vsetvls): Ditto.
36004 (pass_vsetvl::init): Ditto.
36005 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
36006 (enum merge_type): New enum.
36008 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36010 * config/riscv/riscv-vsetvl.cc
36011 (vector_infos_manager::vector_infos_manager): Add probability.
36012 (vector_infos_manager::dump): Ditto.
36013 (pass_vsetvl::compute_probabilities): Ditto.
36014 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
36016 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36018 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
36019 (vector_insn_info::merge): Ditto.
36020 (vector_insn_info::dump): Ditto.
36021 (pass_vsetvl::merge_successors): Ditto.
36022 (pass_vsetvl::backward_demand_fusion): Ditto.
36023 (pass_vsetvl::forward_demand_fusion): Ditto.
36024 (pass_vsetvl::commit_vsetvls): Ditto.
36025 * config/riscv/riscv-vsetvl.h: Ditto.
36027 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36029 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
36032 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36034 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
36036 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36038 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
36039 Add pre-check for redundant flow.
36041 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36043 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
36044 (vector_infos_manager::free_bitmap_vectors): Ditto.
36045 (pass_vsetvl::pre_vsetvl): Adjust codes.
36046 * config/riscv/riscv-vsetvl.h: New function declaration.
36048 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36050 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
36051 (vector_insn_info::set_demand_info): New function.
36052 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
36053 (pass_vsetvl::merge_successors): Ditto.
36054 (pass_vsetvl::compute_global_backward_infos): Ditto.
36055 (pass_vsetvl::backward_demand_fusion): Ditto.
36056 (pass_vsetvl::forward_demand_fusion): Ditto.
36057 (pass_vsetvl::demand_fusion): New function.
36058 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
36059 * config/riscv/riscv-vsetvl.h: New function declaration.
36061 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36063 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
36065 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36067 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
36068 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
36070 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36072 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
36073 (backward_propagate_worthwhile_p): Fix non-worthwhile.
36075 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36077 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
36079 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36081 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
36082 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
36083 (pass_vsetvl::commit_vsetvls): Ditto.
36084 * config/riscv/riscv-vsetvl.h: New function declaration.
36086 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36088 * config/riscv/vector.md:
36090 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36092 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
36093 pred_store for vse.
36094 * config/riscv/riscv-vector-builtins.cc
36095 (function_expander::add_mem_operand): Refine function.
36096 (function_expander::use_contiguous_load_insn): Adjust new
36098 (function_expander::use_contiguous_store_insn): Ditto.
36099 * config/riscv/riscv-vector-builtins.h: Refine function.
36100 * config/riscv/vector.md (@pred_store<mode>): New pattern.
36102 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36104 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
36106 2023-01-26 Marek Polacek <polacek@redhat.com>
36108 PR middle-end/108543
36109 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
36110 if it was previously set.
36112 2023-01-26 Jakub Jelinek <jakub@redhat.com>
36114 PR tree-optimization/108540
36115 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
36116 are singletons, use range_true even if op1 != op2
36117 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
36118 even if intersection of the ranges is empty and one has
36119 zero low bound and another zero high bound, use range_true_and_false
36120 rather than range_false.
36121 (foperator_not_equal::fold_range): If both op1 and op2
36122 are singletons, use range_false even if op1 != op2
36123 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
36124 even if intersection of the ranges is empty and one has
36125 zero low bound and another zero high bound, use range_true_and_false
36126 rather than range_true.
36128 2023-01-26 Jakub Jelinek <jakub@redhat.com>
36130 * value-relation.cc (kind_string): Add const.
36131 (rr_negate_table, rr_swap_table, rr_intersect_table,
36132 rr_union_table, rr_transitive_table): Add static const, change
36133 element type from relation_kind to unsigned char.
36134 (relation_negate, relation_swap, relation_intersect, relation_union,
36135 relation_transitive): Cast rr_*_table element to relation_kind.
36136 (relation_to_code): Add static const.
36137 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
36139 2023-01-26 Richard Biener <rguenther@suse.de>
36141 PR tree-optimization/108547
36142 * gimple-predicate-analysis.cc (value_sat_pred_p):
36145 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
36147 PR tree-optimization/108522
36148 * tree-object-size.cc (compute_object_offset): Make EXPR
36149 argument non-const. Call component_ref_field_offset.
36151 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36153 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
36154 FEATURE_STRING field.
36156 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
36158 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
36160 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
36164 * gcc.cc: Provide default specs for Modula-2 so that when the
36165 language is not built-in better diagnostics are emitted for
36166 attempts to use .mod or .m2i file extensions.
36168 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36170 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
36172 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36174 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
36176 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36178 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
36181 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36183 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
36185 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
36187 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
36189 2023-01-25 Richard Biener <rguenther@suse.de>
36191 PR tree-optimization/108523
36192 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
36193 backedge value for the result when using predication to
36196 2023-01-25 Richard Biener <rguenther@suse.de>
36198 * doc/lto.texi (Command line options): Reword and update reference
36199 to removed lto_read_all_file_options.
36201 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
36203 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
36206 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
36208 * doc/contrib.texi: Add Jose E. Marchesi.
36210 2023-01-25 Jakub Jelinek <jakub@redhat.com>
36212 PR tree-optimization/108498
36213 * gimple-ssa-store-merging.cc (class store_operand_info):
36214 End coment with full stop rather than comma.
36215 (split_group): Likewise.
36216 (merged_store_group::apply_stores): Clear string_concatenation if
36217 start or end aren't on a byte boundary.
36219 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
36220 Jakub Jelinek <jakub@redhat.com>
36222 PR tree-optimization/108522
36223 * tree-object-size.cc (compute_object_offset): Use
36224 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
36226 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36228 * config/xtensa/xtensa.md:
36229 Fix exit from loops detecting references before overwriting in the
36232 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
36234 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
36235 do elimination but only for hard register.
36236 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
36237 calls of get_hard_regno.
36239 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
36241 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
36244 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
36247 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
36248 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
36251 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36253 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
36254 and only include 'csky/t-csky-linux' when enable multilib.
36255 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
36256 define it when disable multilib.
36258 2023-01-24 Richard Biener <rguenther@suse.de>
36260 PR tree-optimization/108500
36261 * dominance.h (calculate_dominance_info): Add parameter
36262 to indicate fast-query compute, defaulted to true.
36263 * dominance.cc (calculate_dominance_info): Honor
36264 fast-query compute parameter.
36265 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
36266 not compute the dominator fast-query DFS numbers.
36268 2023-01-24 Eric Biggers <ebiggers@google.com>
36271 * optc-save-gen.awk: Fix copy-and-paste error.
36273 2023-01-24 Jakub Jelinek <jakub@redhat.com>
36276 * cgraphbuild.cc: Include gimplify.h.
36277 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
36278 their corresponding DECL_VALUE_EXPR expressions after unsharing.
36280 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36283 * config.gcc (tm_file): Move the variable out of loop.
36285 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
36286 Yang Yujie <yangyujie@loongson.cn>
36289 * config/loongarch/loongarch.cc (loongarch_classify_address):
36290 Add precessint for CONST_INT.
36291 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
36292 (loongarch_print_operand): Increase the processing of '%c'.
36293 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
36294 And port the public operand modifiers information to this document.
36296 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36298 * doc/invoke.texi (-mbranch-protection): Update documentation.
36300 2023-01-23 Richard Biener <rguenther@suse.de>
36303 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
36305 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
36306 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
36307 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
36308 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
36310 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36312 * config/arm/aout.h (ra_auth_code): Add entry in enum.
36313 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
36314 to dwarf frame expression.
36315 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
36316 (arm_expand_prologue): Update frame related information and reg notes
36317 for pac/pacbit insn.
36318 (arm_regno_class): Check for pac pseudo reigster.
36319 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
36320 (arm_init_machine_status): Set pacspval_needed to zero.
36321 (arm_debugger_regno): Check for PAC register.
36322 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
36324 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
36325 (arm_unwind_emit): Update REG_CFA_REGISTER case._
36326 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
36327 (DWARF_PAC_REGNUM): Define.
36328 (IS_PAC_REGNUM): Likewise.
36329 (enum reg_class): Add PAC_REG entry.
36330 (machine_function): Add pacbti_needed state to structure.
36331 * config/arm/arm.md (RA_AUTH_CODE): Define.
36333 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36335 * config.gcc ($tm_file): Update variable.
36336 * config/arm/arm-mlib.h: Create new header file.
36337 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
36338 multilib arch directory.
36339 (MULTILIB_REUSE): Add multilib reuse rules.
36340 (MULTILIB_MATCHES): Add multilib match rules.
36342 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36344 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
36345 * config/arm/arm-tables.opt: Regenerate.
36346 * config/arm/arm-tune.md: Likewise.
36347 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
36348 * (-mfix-cmse-cve-2021-35465): Likewise.
36350 2023-01-23 Richard Biener <rguenther@suse.de>
36352 PR tree-optimization/108482
36353 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
36354 .LOOP_DIST_ALIAS calls.
36356 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36358 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
36359 * config/arm/arm-protos.h: Update.
36360 * config/arm/aarch-common-protos.h: Declare
36361 'aarch_bti_arch_check'.
36362 * config/arm/arm.cc (aarch_bti_enabled) Update.
36363 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
36364 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
36365 * config/arm/arm.md (bti_nop): New insn.
36366 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
36367 (aarch-bti-insert.o): New target.
36368 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
36369 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
36371 (gate): Make use of 'aarch_bti_arch_check'.
36372 * config/arm/arm-passes.def: New file.
36373 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
36375 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36377 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
36378 'aarch-bti-insert.o'.
36379 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
36381 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
36382 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
36383 (aarch64_output_mi_thunk)
36384 (aarch64_print_patchable_function_entry)
36385 (aarch64_file_end_indicate_exec_stack): Update renamed function
36386 calls to renamed functions.
36387 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
36388 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
36390 * config/aarch64/aarch64-bti-insert.cc: Delete.
36391 * config/arm/aarch-bti-insert.cc: New file including and
36392 generalizing code from aarch64-bti-insert.cc.
36393 * config/arm/aarch-common-protos.h: Update.
36395 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36397 * config/arm/arm.h (arm_arch8m_main): Declare it.
36398 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
36400 * config/arm/arm.cc (arm_arch8m_main): Define it.
36401 (arm_option_reconfigure_globals): Set arm_arch8m_main.
36402 (arm_compute_frame_layout, arm_expand_prologue)
36403 (thumb2_expand_return, arm_expand_epilogue)
36404 (arm_conditional_register_usage): Update for pac codegen.
36405 (arm_current_function_pac_enabled_p): New function.
36406 (aarch_bti_enabled) New function.
36407 (use_return_insn): Return zero when pac is enabled.
36408 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
36410 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
36411 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
36413 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36415 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
36416 mbranch-protection.
36418 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36419 Tejas Belagod <tbelagod@arm.com>
36421 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
36422 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
36424 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36425 Tejas Belagod <tbelagod@arm.com>
36426 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36428 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
36429 new pseudo register class _UVRSC_PAC.
36431 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36432 Tejas Belagod <tbelagod@arm.com>
36434 * config/arm/arm-c.cc (arm_cpu_builtins): Define
36435 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
36436 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
36438 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36439 Tejas Belagod <tbelagod@arm.com>
36441 * doc/sourcebuild.texi: Document arm_pacbti_hw.
36443 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36444 Tejas Belagod <tbelagod@arm.com>
36445 Richard Earnshaw <Richard.Earnshaw@arm.com>
36447 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
36448 -mbranch-protection option and initialize appropriate data structures.
36449 * config/arm/arm.opt (-mbranch-protection): New option.
36450 * doc/invoke.texi (Arm Options): Document it.
36452 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36453 Tejas Belagod <tbelagod@arm.com>
36455 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
36456 * config/arm/arm-cpus.in (pacbti): New feature.
36457 * doc/invoke.texi (Arm Options): Document it.
36459 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
36460 Tejas Belagod <tbelagod@arm.com>
36462 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
36463 (all_architectures): Fix comment.
36464 (aarch64_parse_extension): Rename return type, enum value names.
36465 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
36466 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
36467 Also rename corresponding enum values.
36468 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
36469 out aarch64_function_type and move it to common code as
36470 aarch_function_type in aarch-common.h.
36471 * config/aarch64/aarch64-protos.h: Include common types header,
36472 move out types aarch64_parse_opt_result and aarch64_key_type to
36474 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
36475 and functions out into aarch-common.h and aarch-common.cc. Fix up
36476 all the name changes resulting from the move.
36477 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
36479 * config/aarch64/aarch64.opt: Include aarch-common.h to import
36480 type move. Fix up name changes from factoring out common code and
36482 * config/arm/aarch-common-protos.h: Export factored out routines to both
36484 * config/arm/aarch-common.cc: Include newly factored out types.
36485 Move all mbranch-protection code and data structures from
36487 * config/arm/aarch-common.h: New header that declares types shared
36488 between aarch32 and aarch64 backends.
36489 * config/arm/arm-protos.h: Declare types and variables that are
36490 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
36491 aarch_ra_sign_scope and aarch_enable_bti.
36492 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
36493 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
36494 * config/arm/arm.cc: Add missing includes.
36496 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
36498 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
36500 2023-01-23 Richard Biener <rguenther@suse.de>
36502 PR tree-optimization/108449
36503 * cgraphunit.cc (check_global_declaration): Do not turn
36504 undefined statics into externs.
36506 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
36508 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
36509 and HI input modes.
36510 * config/pru/pru.md (clz): Fix generated code for QI and HI
36513 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
36515 * config/v850/v850.cc (v850_select_section): Put const volatile
36516 objects into read-only sections.
36518 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
36520 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
36521 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
36522 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
36524 2023-01-20 Jakub Jelinek <jakub@redhat.com>
36526 PR tree-optimization/108457
36527 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
36528 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
36529 argument instead of a temporary. Formatting fixes.
36531 2023-01-19 Jakub Jelinek <jakub@redhat.com>
36533 PR tree-optimization/108447
36534 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
36535 (relation_tests): Add self-tests for relation_{intersect,union}
36537 * selftest.h (relation_tests): Declare.
36538 * function-tests.cc (test_ranges): Call it.
36540 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
36543 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
36544 invalid third argument to __builtin_ia32_prefetch.
36546 2023-01-19 Jakub Jelinek <jakub@redhat.com>
36548 PR middle-end/108459
36549 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
36550 than fold_unary for NEGATE_EXPR.
36552 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
36555 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
36556 comment. Move assert about alignment a bit later.
36558 2023-01-19 Jakub Jelinek <jakub@redhat.com>
36560 PR tree-optimization/108440
36561 * tree-ssa-forwprop.cc: Include gimple-range.h.
36562 (simplify_rotate): For the forms with T2 wider than T and shift counts of
36563 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
36564 to B. For the forms with T2 wider than T and shift counts of
36565 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
36566 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
36567 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
36568 pass specific ranger instead of get_global_range_query.
36569 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
36572 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
36574 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
36575 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
36577 (aarch64_simd_vec_copy_lane<mode>): Likewise.
36578 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
36580 2023-01-19 Alexandre Oliva <oliva@adacore.com>
36583 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
36584 within debug insns.
36586 2023-01-18 Martin Jambor <mjambor@suse.cz>
36589 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
36590 lcone_of chain also do not need the body.
36592 2023-01-18 Richard Biener <rguenther@suse.de>
36595 2022-12-16 Richard Biener <rguenther@suse.de>
36597 PR middle-end/108086
36598 * tree-inline.cc (remap_ssa_name): Do not unshare the
36599 result from the decl_map.
36601 2023-01-18 Murray Steele <murray.steele@arm.com>
36604 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
36606 (__arm_vst1q_p_s8): Likewise.
36607 (__arm_vld1q_z_u8): Likewise.
36608 (__arm_vld1q_z_s8): Likewise.
36609 (__arm_vst1q_p_u16): Likewise.
36610 (__arm_vst1q_p_s16): Likewise.
36611 (__arm_vld1q_z_u16): Likewise.
36612 (__arm_vld1q_z_s16): Likewise.
36613 (__arm_vst1q_p_u32): Likewise.
36614 (__arm_vst1q_p_s32): Likewise.
36615 (__arm_vld1q_z_u32): Likewise.
36616 (__arm_vld1q_z_s32): Likewise.
36617 (__arm_vld1q_z_f16): Likewise.
36618 (__arm_vst1q_p_f16): Likewise.
36619 (__arm_vld1q_z_f32): Likewise.
36620 (__arm_vst1q_p_f32): Likewise.
36622 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36624 * config/xtensa/xtensa.md (xorsi3_internal):
36625 Rename from the original of "xorsi3".
36626 (xorsi3): New expansion pattern that emits addition rather than
36627 bitwise-XOR when the second source is a constant of -2147483648
36630 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
36631 Andrew Pinski <apinski@marvell.com>
36634 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
36635 vec_vsubcuqP with vec_vsubcuq.
36637 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
36640 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
36641 support for invalid uses of MMA opaque type in function arguments.
36643 2023-01-18 liuhongt <hongtao.liu@intel.com>
36646 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
36647 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
36648 -share or -mno-daz-ftz is specified.
36649 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
36650 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
36652 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
36654 * config/bpf/bpf.cc (bpf_option_override): Disable
36657 2023-01-17 Jakub Jelinek <jakub@redhat.com>
36659 PR tree-optimization/106523
36660 * tree-ssa-forwprop.cc (simplify_rotate): For the
36661 patterns with (-Y) & (B - 1) in one operand's shift
36662 count and Y in another, if T2 has wider precision than T,
36663 punt if Y could have a value in [B, B2 - 1] range.
36665 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
36668 * config/i386/i386.cc (x86_output_mi_thunk): Disable
36669 -mforce-indirect-call for PIC in 32-bit mode.
36671 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
36674 * ipa-modref.cc (modref_access_analysis::analyze): Use
36675 find_always_executed_bbs.
36676 * ipa-sra.cc (process_scan_results): Likewise.
36677 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
36678 (find_always_executed_bbs): New function.
36679 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
36680 (find_always_executed_bbs): Declare.
36682 2023-01-16 Jan Hubicka <jh@suse.cz>
36684 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
36685 by TARGET_USE_SCATTER.
36686 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
36687 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
36688 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
36689 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
36690 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
36691 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
36693 2023-01-16 Richard Biener <rguenther@suse.de>
36696 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
36698 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
36702 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
36703 (__ARM_mve_coerce3): Likewise.
36705 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36707 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
36709 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36711 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
36712 (number_of_iterations_bitcount): Add call to the above.
36713 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
36714 c[lt]z idiom recognition.
36716 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36718 * doc/sourcebuild.texi: Add missing target attributes.
36720 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
36722 PR tree-optimization/94793
36723 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
36725 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
36726 (number_of_iterations_cltz_complement): New.
36727 (number_of_iterations_bitcount): Add call to the above.
36729 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
36731 * doc/extend.texi (Common Function Attributes): Fix grammar.
36733 2023-01-16 Jakub Jelinek <jakub@redhat.com>
36736 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
36737 * config/riscv/riscv-vsetvl.cc: Likewise.
36739 2023-01-16 Jakub Jelinek <jakub@redhat.com>
36742 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
36743 disable -Winit-self using pragma GCC diagnostic ignored.
36744 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
36746 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
36747 _mm256_undefined_si256): Likewise.
36748 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
36749 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
36750 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
36751 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
36753 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
36756 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
36757 support for invalid uses in inline asm, factor out the checking and
36758 erroring to lambda function check_and_error_invalid_use.
36760 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
36762 PR tree-optimization/107608
36763 * range-op-float.cc (range_operator_float::fold_range): Avoid
36764 folding into INF when flag_trapping_math.
36765 * value-range.h (frange::known_isinf): Return false for possible NANs.
36767 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
36769 * config.gcc (csky-*-*): Support --with-float=softfp.
36771 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36773 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
36774 Rename to xtensa_adjust_reg_alloc_order.
36775 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
36776 Ditto. And also remove code to reorder register numbers for
36777 leaf functions, rename the tables, and adjust the allocation
36778 order for the call0 ABI to use register A0 more.
36779 (xtensa_leaf_regs): Remove.
36780 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
36781 (order_regs_for_local_alloc): Rename as the above.
36782 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
36784 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
36786 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
36787 Change to define_insn_and_split to fold ldr+dup to ld1rq.
36788 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
36790 2023-01-14 Alexandre Oliva <oliva@adacore.com>
36792 * hash-table.h (is_deleted): Precheck !is_empty.
36793 (mark_deleted): Postcheck !is_empty.
36794 (copy constructor): Test is_empty before is_deleted.
36796 2023-01-14 Alexandre Oliva <oliva@adacore.com>
36799 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
36802 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
36804 PR rtl-optimization/108274
36805 * function.cc (thread_prologue_and_epilogue_insns): Also update the
36806 DF information for calls in a few more cases.
36808 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
36810 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
36811 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
36813 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
36814 (MAX_SYNC_LIBFUNC_SIZE): Define.
36815 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
36817 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
36818 libcall when sync libcalls are disabled.
36819 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
36820 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
36821 are disabled on 32-bit target.
36822 * config/pa/pa.opt (matomic-libcalls): New option.
36823 * doc/invoke.texi (HPPA Options): Update.
36825 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
36827 PR rtl-optimization/108117
36828 PR rtl-optimization/108132
36829 * sched-deps.cc (deps_analyze_insn): Do not schedule across
36830 calls before reload.
36832 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
36834 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
36835 options for -mlibarch.
36836 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
36837 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
36839 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
36841 * attribs.cc (strict_flex_array_level_of): Move this function to ...
36842 * attribs.h (strict_flex_array_level_of): Remove the declaration.
36843 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
36844 replace the referece to strict_flex_array_level_of with
36845 DECL_NOT_FLEXARRAY.
36846 * tree.cc (component_ref_size): Likewise.
36848 2023-01-13 Richard Biener <rguenther@suse.de>
36851 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
36852 crtfastmath.o for -shared.
36853 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
36855 2023-01-13 Richard Biener <rguenther@suse.de>
36858 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
36859 crtfastmath.o for -shared.
36860 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
36862 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
36865 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
36867 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
36869 (TARGET_DWARF_FRAME_REG_MODE): Define.
36871 2023-01-13 Richard Biener <rguenther@suse.de>
36874 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
36875 update EH info on the fly.
36877 2023-01-13 Richard Biener <rguenther@suse.de>
36879 PR tree-optimization/108387
36880 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
36881 value before inserting expression into the tables.
36883 2023-01-12 Andrew Pinski <apinski@marvell.com>
36884 Roger Sayle <roger@nextmovesoftware.com>
36886 PR tree-optimization/92342
36887 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
36888 Use tcc_comparison and :c for the multiply.
36889 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
36891 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
36892 Richard Sandiford <richard.sandiford@arm.com>
36895 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
36896 Check DECL_PACKED for bitfield.
36897 (aarch64_layout_arg): Warn when parameter passing ABI changes.
36898 (aarch64_function_arg_boundary): Do not warn here.
36899 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
36902 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
36903 Richard Sandiford <richard.sandiford@arm.com>
36905 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
36907 (aarch64_layout_arg): Factorize warning conditions.
36908 (aarch64_function_arg_boundary): Fix typo.
36909 * function.cc (currently_expanding_function_start): New variable.
36910 (expand_function_start): Handle
36911 currently_expanding_function_start.
36912 * function.h (currently_expanding_function_start): Declare.
36914 2023-01-12 Richard Biener <rguenther@suse.de>
36916 PR tree-optimization/99412
36917 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
36918 (swap_ops_for_binary_stmt): Remove reduction handling.
36919 (rewrite_expr_tree_parallel): Adjust.
36920 (reassociate_bb): Likewise.
36921 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
36923 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36925 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
36926 Rearrange the emitting codes.
36928 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36930 * config/xtensa/xtensa.md (*btrue):
36931 Correct value of the attribute "length" that depends on
36932 TARGET_DENSITY and operands, and add '?' character to the register
36933 constraint of the compared operand.
36935 2023-01-12 Alexandre Oliva <oliva@adacore.com>
36937 * hash-table.h (expand): Check elements and deleted counts.
36938 (verify): Likewise.
36940 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
36942 PR tree-optimization/71343
36943 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
36944 the value number of the expression X << C the same as the value
36945 number for the multiplication X * (1<<C).
36947 2023-01-11 David Faust <david.faust@oracle.com>
36950 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
36951 floating point modes.
36953 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
36955 PR tree-optimization/108199
36956 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
36957 for bit-field references.
36959 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
36961 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
36962 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
36963 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
36964 OPTION_MASK_P10_FUSION.
36966 2023-01-11 Richard Biener <rguenther@suse.de>
36968 PR tree-optimization/107767
36969 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
36970 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
36971 * tree-switch-conversion.cc (switch_conversion::collect):
36972 Count unique non-default targets accounting for later
36973 merging opportunities.
36975 2023-01-11 Martin Liska <mliska@suse.cz>
36977 PR middle-end/107976
36978 * params.opt: Limit JT params.
36979 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
36981 2023-01-11 Richard Biener <rguenther@suse.de>
36983 PR tree-optimization/108352
36984 * tree-ssa-threadbackward.cc
36985 (back_threader_profitability::profitable_path_p): Adjust
36986 heuristic that allows non-multi-way branch threads creating
36988 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
36989 (--param fsm-scale-path-stmts): Adjust.
36990 * params.opt (--param=fsm-scale-path-blocks=): Remove.
36991 (-param=fsm-scale-path-stmts=): Adjust description.
36993 2023-01-11 Richard Biener <rguenther@suse.de>
36995 PR tree-optimization/108353
36996 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
36998 (add_ssa_edge): Simplify.
36999 (add_control_edge): Likewise.
37000 (ssa_prop_init): Likewise.
37001 (ssa_prop_fini): Likewise.
37002 (ssa_propagation_engine::ssa_propagate): Likewise.
37004 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
37006 * config/s390/s390.md (*not<mode>): New pattern.
37008 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37010 * config/xtensa/xtensa.cc (xtensa_insn_cost):
37011 Let insn cost for size be obtained by applying COSTS_N_INSNS()
37012 to instruction length and then dividing by 3.
37014 2023-01-10 Richard Biener <rguenther@suse.de>
37016 PR tree-optimization/106293
37017 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
37018 process degenerate PHI defs.
37020 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
37022 PR rtl-optimization/106421
37023 * cprop.cc (bypass_block): Check that DEST is local to this
37024 function (non-NULL) before calling find_edge.
37026 2023-01-10 Martin Jambor <mjambor@suse.cz>
37029 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
37030 sort_replacements, lookup_first_base_replacement and
37031 m_sorted_replacements_p.
37032 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
37033 (ipa_param_body_adjustments::register_replacement): Set
37034 m_sorted_replacements_p to false.
37035 (compare_param_body_replacement): New function.
37036 (ipa_param_body_adjustments::sort_replacements): Likewise.
37037 (ipa_param_body_adjustments::common_initialization): Call
37039 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
37040 m_sorted_replacements_p.
37041 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
37043 (ipa_param_body_adjustments::lookup_first_base_replacement): New
37045 (ipa_param_body_adjustments::modify_call_stmt): Use
37046 lookup_first_base_replacement.
37047 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
37048 adjustments->sort_replacements.
37050 2023-01-10 Richard Biener <rguenther@suse.de>
37052 PR tree-optimization/108314
37053 * tree-vect-stmts.cc (vectorizable_condition): Do not
37054 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
37056 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37058 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
37060 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37062 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
37064 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37066 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
37067 defines for soft float abi.
37069 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37071 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
37072 (smart_bclri): Likewise.
37073 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
37074 (fast_bclri): Likewise.
37075 (fast_cmpnesi_i): Likewise.
37076 (*fast_cmpltsi_i): Likewise.
37077 (*fast_cmpgeusi_i): Likewise.
37079 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
37081 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
37082 flag_fp_int_builtin_inexact || !flag_trapping_math.
37083 (<frm_pattern><mode>2): Likewise.
37085 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
37087 * config/s390/s390.cc (s390_register_info): Check call_used_regs
37088 instead of hard-coding the register numbers for call saved
37090 (s390_optimize_register_info): Likewise.
37092 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
37094 * doc/gm2.texi (Overview): Fix @node markers.
37095 (Using): Likewise. Remove subsections that were moved to Overview
37096 from the menu and move others around.
37098 2023-01-09 Richard Biener <rguenther@suse.de>
37100 PR middle-end/108209
37101 * genmatch.cc (commutative_op): Fix return value for
37102 user-id with non-commutative first replacement.
37104 2023-01-09 Jakub Jelinek <jakub@redhat.com>
37107 * calls.cc (expand_call): For calls with
37108 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
37111 2023-01-09 Richard Biener <rguenther@suse.de>
37113 PR middle-end/69482
37114 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
37115 qualified accesses also force objects to memory.
37117 2023-01-09 Martin Liska <mliska@suse.cz>
37120 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
37121 NULL (deleleted value) to a hash_set.
37123 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37125 * config/xtensa/xtensa.md (*splice_bits):
37126 New insn_and_split pattern.
37128 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
37130 * config/xtensa/xtensa.cc
37131 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
37132 New helper functions.
37133 (xtensa_set_return_address, xtensa_output_mi_thunk):
37134 Change to use the helper function.
37135 (xtensa_emit_adjust_stack_ptr): Ditto.
37136 And also change to try reusing the content of scratch register
37137 A9 if the register is not modified in the function body.
37139 2023-01-07 LIU Hao <lh_mouse@126.com>
37141 PR middle-end/108300
37142 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
37143 before <windows.h>.
37144 * diagnostic-color.cc: Likewise.
37145 * plugin.cc: Likewise.
37146 * prefix.cc: Likewise.
37148 2023-01-06 Joseph Myers <joseph@codesourcery.com>
37150 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
37151 for handling real integer types.
37153 2023-01-06 Tamar Christina <tamar.christina@arm.com>
37156 2022-12-12 Tamar Christina <tamar.christina@arm.com>
37158 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
37159 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
37160 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
37161 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
37162 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
37163 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
37164 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
37165 (aarch64_simd_dupv2hf): New.
37166 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
37168 * config/aarch64/iterators.md (VHSDF_P): New.
37169 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
37170 Vel, q, vp): Add V2HF.
37171 * config/arm/types.md (neon_fp_reduc_add_h): New.
37173 2023-01-06 Martin Liska <mliska@suse.cz>
37175 PR middle-end/107966
37176 * doc/options.texi: Fix Var documentation in internal manual.
37178 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
37181 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
37183 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
37184 RTL expansion to allow condition (mask) to be shared/reused,
37185 by avoiding overwriting pseudos and adding REG_EQUAL notes.
37187 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
37189 * common.opt: Add -static-libgm2.
37190 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
37191 * doc/gm2.texi: Document static-libgm2.
37192 * gcc.cc (driver_handle_option): Allow static-libgm2.
37194 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
37196 * common/config/i386/i386-common.cc (processor_alias_table):
37197 Use CPU_ZNVER4 for znver4.
37198 * config/i386/i386.md: Add znver4.md.
37199 * config/i386/znver4.md: New.
37201 2023-01-04 Jakub Jelinek <jakub@redhat.com>
37203 PR tree-optimization/108253
37204 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
37207 2023-01-04 Jakub Jelinek <jakub@redhat.com>
37209 PR middle-end/108237
37210 * generic-match-head.cc: Include tree-pass.h.
37211 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
37212 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
37213 resp. PROP_gimple_lvec property set.
37215 2023-01-04 Jakub Jelinek <jakub@redhat.com>
37217 PR sanitizer/108256
37218 * convert.cc (do_narrow): Punt for MULT_EXPR if original
37219 type doesn't wrap around and -fsanitize=signed-integer-overflow
37221 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
37223 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
37225 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
37226 * common/config/i386/i386-common.cc: Add Emeraldrapids.
37228 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
37230 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
37233 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
37235 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
37236 default constructor to initialize it.
37237 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
37238 for last and iterate to handle recursive calls. Delete leftover
37239 candidates at the end.
37240 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
37242 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
37243 gc_candidate bit when a clone is used.
37245 2023-01-03 Florian Weimer <fweimer@redhat.com>
37248 2023-01-02 Florian Weimer <fweimer@redhat.com>
37250 * dwarf2cfi.cc (init_return_column_size): Remove.
37251 (init_one_dwarf_reg_size): Adjust.
37252 (generate_dwarf_reg_sizes): New function. Extracted
37253 from expand_builtin_init_dwarf_reg_sizes.
37254 (expand_builtin_init_dwarf_reg_sizes): Call
37255 generate_dwarf_reg_sizes.
37256 * target.def (init_dwarf_reg_sizes_extra): Adjust
37258 * config/msp430/msp430.cc
37259 (msp430_init_dwarf_reg_sizes_extra): Adjust.
37260 * config/rs6000/rs6000.cc
37261 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
37262 * doc/tm.texi: Update.
37264 2023-01-03 Florian Weimer <fweimer@redhat.com>
37267 2023-01-02 Florian Weimer <fweimer@redhat.com>
37269 * debug.h (dwarf_reg_sizes_constant): Declare.
37270 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
37272 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
37274 PR tree-optimization/105043
37275 * doc/extend.texi (Object Size Checking): Split out into two
37276 subsections and mention _FORTIFY_SOURCE.
37278 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
37280 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
37281 RTL expansion to allow condition (mask) to be shared/reused,
37282 by avoiding overwriting pseudos and adding REG_EQUAL notes.
37284 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
37287 * config/i386/i386-features.cc
37288 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
37289 the gain/cost of converting a MEM operand.
37291 2023-01-03 Jakub Jelinek <jakub@redhat.com>
37293 PR middle-end/108264
37294 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
37295 from source which doesn't have scalar integral mode first convert
37298 2023-01-03 Jakub Jelinek <jakub@redhat.com>
37300 PR rtl-optimization/108263
37301 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
37304 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
37307 * config/i386/lujiazui.md (lujiazui_div): New automaton.
37308 (lua_div): New unit.
37309 (lua_idiv_qi): Correct unit in the reservation.
37310 (lua_idiv_qi_load): Ditto.
37311 (lua_idiv_hi): Ditto.
37312 (lua_idiv_hi_load): Ditto.
37313 (lua_idiv_si): Ditto.
37314 (lua_idiv_si_load): Ditto.
37315 (lua_idiv_di): Ditto.
37316 (lua_idiv_di_load): Ditto.
37317 (lua_fdiv_SF): Ditto.
37318 (lua_fdiv_SF_load): Ditto.
37319 (lua_fdiv_DF): Ditto.
37320 (lua_fdiv_DF_load): Ditto.
37321 (lua_fdiv_XF): Ditto.
37322 (lua_fdiv_XF_load): Ditto.
37323 (lua_ssediv_SF): Ditto.
37324 (lua_ssediv_load_SF): Ditto.
37325 (lua_ssediv_V4SF): Ditto.
37326 (lua_ssediv_load_V4SF): Ditto.
37327 (lua_ssediv_V8SF): Ditto.
37328 (lua_ssediv_load_V8SF): Ditto.
37329 (lua_ssediv_SD): Ditto.
37330 (lua_ssediv_load_SD): Ditto.
37331 (lua_ssediv_V2DF): Ditto.
37332 (lua_ssediv_load_V2DF): Ditto.
37333 (lua_ssediv_V4DF): Ditto.
37334 (lua_ssediv_load_V4DF): Ditto.
37336 2023-01-02 Florian Weimer <fweimer@redhat.com>
37338 * debug.h (dwarf_reg_sizes_constant): Declare.
37339 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
37341 2023-01-02 Florian Weimer <fweimer@redhat.com>
37343 * dwarf2cfi.cc (init_return_column_size): Remove.
37344 (init_one_dwarf_reg_size): Adjust.
37345 (generate_dwarf_reg_sizes): New function. Extracted
37346 from expand_builtin_init_dwarf_reg_sizes.
37347 (expand_builtin_init_dwarf_reg_sizes): Call
37348 generate_dwarf_reg_sizes.
37349 * target.def (init_dwarf_reg_sizes_extra): Adjust
37351 * config/msp430/msp430.cc
37352 (msp430_init_dwarf_reg_sizes_extra): Adjust.
37353 * config/rs6000/rs6000.cc
37354 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
37355 * doc/tm.texi: Update.
37357 2023-01-02 Jakub Jelinek <jakub@redhat.com>
37359 * gcc.cc (process_command): Update copyright notice dates.
37360 * gcov-dump.cc (print_version): Ditto.
37361 * gcov.cc (print_version): Ditto.
37362 * gcov-tool.cc (print_version): Ditto.
37363 * gengtype.cc (create_file): Ditto.
37364 * doc/cpp.texi: Bump @copying's copyright year.
37365 * doc/cppinternals.texi: Ditto.
37366 * doc/gcc.texi: Ditto.
37367 * doc/gccint.texi: Ditto.
37368 * doc/gcov.texi: Ditto.
37369 * doc/install.texi: Ditto.
37370 * doc/invoke.texi: Ditto.
37372 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
37373 Uroš Bizjak <ubizjak@gmail.com>
37375 * config/i386/i386.md (extendditi2): New define_insn.
37376 (define_split): Use DWIH mode iterator to treat new extendditi2
37377 identically to existing extendsidi2_1.
37378 (define_peephole2): Likewise.
37379 (define_peephole2): Likewise.
37380 (define_Split): Likewise.
37383 Copyright (C) 2023 Free Software Foundation, Inc.
37385 Copying and distribution of this file, with or without modification,
37386 are permitted in any medium without royalty provided the copyright
37387 notice and this notice are preserved.