* config/arm/arm.md (addsi3_cbranch_scratch): Correct constraints.
[official-gcc.git] / gcc / emit-rtl.c
blobec7bec39adcc6bfbbf5328bf5bb64110c942eedd
1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains support functions for creating rtl expressions
26 and manipulating them in the doubly-linked chain of insns.
28 The patterns of the insns are created by machine-dependent
29 routines in insn-emit.c, which is generated automatically from
30 the machine description. These routines make the individual rtx's
31 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
32 which are automatically generated from rtl.def; what is machine
33 dependent is the kind of rtx's they make and what arguments they
34 use. */
36 #include "config.h"
37 #include "system.h"
38 #include "coretypes.h"
39 #include "tm.h"
40 #include "toplev.h"
41 #include "rtl.h"
42 #include "tree.h"
43 #include "tm_p.h"
44 #include "flags.h"
45 #include "function.h"
46 #include "expr.h"
47 #include "regs.h"
48 #include "hard-reg-set.h"
49 #include "hashtab.h"
50 #include "insn-config.h"
51 #include "recog.h"
52 #include "real.h"
53 #include "bitmap.h"
54 #include "basic-block.h"
55 #include "ggc.h"
56 #include "debug.h"
57 #include "langhooks.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static GTY(()) int label_num = 1;
72 /* Nonzero means do not generate NOTEs for source line numbers. */
74 static int no_line_numbers;
76 /* Commonly used rtx's, so that we only need space for one copy.
77 These are initialized once for the entire compilation.
78 All of these are unique; no other rtx-object will be equal to any
79 of these. */
81 rtx global_rtl[GR_MAX];
83 /* Commonly used RTL for hard registers. These objects are not necessarily
84 unique, so we allocate them separately from global_rtl. They are
85 initialized once per compilation unit, then copied into regno_reg_rtx
86 at the beginning of each function. */
87 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
89 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
90 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
91 record a copy of const[012]_rtx. */
93 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
95 rtx const_true_rtx;
97 REAL_VALUE_TYPE dconst0;
98 REAL_VALUE_TYPE dconst1;
99 REAL_VALUE_TYPE dconst2;
100 REAL_VALUE_TYPE dconst3;
101 REAL_VALUE_TYPE dconst10;
102 REAL_VALUE_TYPE dconstm1;
103 REAL_VALUE_TYPE dconstm2;
104 REAL_VALUE_TYPE dconsthalf;
105 REAL_VALUE_TYPE dconstthird;
106 REAL_VALUE_TYPE dconstpi;
107 REAL_VALUE_TYPE dconste;
109 /* All references to the following fixed hard registers go through
110 these unique rtl objects. On machines where the frame-pointer and
111 arg-pointer are the same register, they use the same unique object.
113 After register allocation, other rtl objects which used to be pseudo-regs
114 may be clobbered to refer to the frame-pointer register.
115 But references that were originally to the frame-pointer can be
116 distinguished from the others because they contain frame_pointer_rtx.
118 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
119 tricky: until register elimination has taken place hard_frame_pointer_rtx
120 should be used if it is being set, and frame_pointer_rtx otherwise. After
121 register elimination hard_frame_pointer_rtx should always be used.
122 On machines where the two registers are same (most) then these are the
123 same.
125 In an inline procedure, the stack and frame pointer rtxs may not be
126 used for anything else. */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
138 integers. */
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
146 htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
150 htab_t mem_attrs_htab;
152 /* A hash table storing register attribute structures. */
153 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
154 htab_t reg_attrs_htab;
156 /* A hash table storing all CONST_DOUBLEs. */
157 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
158 htab_t const_double_htab;
160 #define first_insn (cfun->emit->x_first_insn)
161 #define last_insn (cfun->emit->x_last_insn)
162 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
163 #define last_location (cfun->emit->x_last_location)
164 #define first_label_num (cfun->emit->x_first_label_num)
166 static rtx make_jump_insn_raw (rtx);
167 static rtx make_call_insn_raw (rtx);
168 static rtx find_line_note (rtx);
169 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
170 static void unshare_all_decls (tree);
171 static void reset_used_decls (tree);
172 static void mark_label_nuses (rtx);
173 static hashval_t const_int_htab_hash (const void *);
174 static int const_int_htab_eq (const void *, const void *);
175 static hashval_t const_double_htab_hash (const void *);
176 static int const_double_htab_eq (const void *, const void *);
177 static rtx lookup_const_double (rtx);
178 static hashval_t mem_attrs_htab_hash (const void *);
179 static int mem_attrs_htab_eq (const void *, const void *);
180 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
181 enum machine_mode);
182 static hashval_t reg_attrs_htab_hash (const void *);
183 static int reg_attrs_htab_eq (const void *, const void *);
184 static reg_attrs *get_reg_attrs (tree, int);
185 static tree component_ref_for_mem_expr (tree);
186 static rtx gen_const_vector (enum machine_mode, int);
187 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
188 static void copy_rtx_if_shared_1 (rtx *orig);
190 /* Probability of the conditional branch currently proceeded by try_split.
191 Set to -1 otherwise. */
192 int split_branch_probability = -1;
194 /* Returns a hash code for X (which is a really a CONST_INT). */
196 static hashval_t
197 const_int_htab_hash (const void *x)
199 return (hashval_t) INTVAL ((rtx) x);
202 /* Returns nonzero if the value represented by X (which is really a
203 CONST_INT) is the same as that given by Y (which is really a
204 HOST_WIDE_INT *). */
206 static int
207 const_int_htab_eq (const void *x, const void *y)
209 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
212 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
213 static hashval_t
214 const_double_htab_hash (const void *x)
216 rtx value = (rtx) x;
217 hashval_t h;
219 if (GET_MODE (value) == VOIDmode)
220 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
221 else
223 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
224 /* MODE is used in the comparison, so it should be in the hash. */
225 h ^= GET_MODE (value);
227 return h;
230 /* Returns nonzero if the value represented by X (really a ...)
231 is the same as that represented by Y (really a ...) */
232 static int
233 const_double_htab_eq (const void *x, const void *y)
235 rtx a = (rtx)x, b = (rtx)y;
237 if (GET_MODE (a) != GET_MODE (b))
238 return 0;
239 if (GET_MODE (a) == VOIDmode)
240 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
241 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
242 else
243 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
244 CONST_DOUBLE_REAL_VALUE (b));
247 /* Returns a hash code for X (which is a really a mem_attrs *). */
249 static hashval_t
250 mem_attrs_htab_hash (const void *x)
252 mem_attrs *p = (mem_attrs *) x;
254 return (p->alias ^ (p->align * 1000)
255 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
256 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
257 ^ (size_t) p->expr);
260 /* Returns nonzero if the value represented by X (which is really a
261 mem_attrs *) is the same as that given by Y (which is also really a
262 mem_attrs *). */
264 static int
265 mem_attrs_htab_eq (const void *x, const void *y)
267 mem_attrs *p = (mem_attrs *) x;
268 mem_attrs *q = (mem_attrs *) y;
270 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
271 && p->size == q->size && p->align == q->align);
274 /* Allocate a new mem_attrs structure and insert it into the hash table if
275 one identical to it is not already in the table. We are doing this for
276 MEM of mode MODE. */
278 static mem_attrs *
279 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
280 unsigned int align, enum machine_mode mode)
282 mem_attrs attrs;
283 void **slot;
285 /* If everything is the default, we can just return zero.
286 This must match what the corresponding MEM_* macros return when the
287 field is not present. */
288 if (alias == 0 && expr == 0 && offset == 0
289 && (size == 0
290 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
291 && (STRICT_ALIGNMENT && mode != BLKmode
292 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
293 return 0;
295 attrs.alias = alias;
296 attrs.expr = expr;
297 attrs.offset = offset;
298 attrs.size = size;
299 attrs.align = align;
301 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
302 if (*slot == 0)
304 *slot = ggc_alloc (sizeof (mem_attrs));
305 memcpy (*slot, &attrs, sizeof (mem_attrs));
308 return *slot;
311 /* Returns a hash code for X (which is a really a reg_attrs *). */
313 static hashval_t
314 reg_attrs_htab_hash (const void *x)
316 reg_attrs *p = (reg_attrs *) x;
318 return ((p->offset * 1000) ^ (long) p->decl);
321 /* Returns nonzero if the value represented by X (which is really a
322 reg_attrs *) is the same as that given by Y (which is also really a
323 reg_attrs *). */
325 static int
326 reg_attrs_htab_eq (const void *x, const void *y)
328 reg_attrs *p = (reg_attrs *) x;
329 reg_attrs *q = (reg_attrs *) y;
331 return (p->decl == q->decl && p->offset == q->offset);
333 /* Allocate a new reg_attrs structure and insert it into the hash table if
334 one identical to it is not already in the table. We are doing this for
335 MEM of mode MODE. */
337 static reg_attrs *
338 get_reg_attrs (tree decl, int offset)
340 reg_attrs attrs;
341 void **slot;
343 /* If everything is the default, we can just return zero. */
344 if (decl == 0 && offset == 0)
345 return 0;
347 attrs.decl = decl;
348 attrs.offset = offset;
350 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
351 if (*slot == 0)
353 *slot = ggc_alloc (sizeof (reg_attrs));
354 memcpy (*slot, &attrs, sizeof (reg_attrs));
357 return *slot;
360 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
361 don't attempt to share with the various global pieces of rtl (such as
362 frame_pointer_rtx). */
365 gen_raw_REG (enum machine_mode mode, int regno)
367 rtx x = gen_rtx_raw_REG (mode, regno);
368 ORIGINAL_REGNO (x) = regno;
369 return x;
372 /* There are some RTL codes that require special attention; the generation
373 functions do the raw handling. If you add to this list, modify
374 special_rtx in gengenrtl.c as well. */
377 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
379 void **slot;
381 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
382 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
384 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
385 if (const_true_rtx && arg == STORE_FLAG_VALUE)
386 return const_true_rtx;
387 #endif
389 /* Look up the CONST_INT in the hash table. */
390 slot = htab_find_slot_with_hash (const_int_htab, &arg,
391 (hashval_t) arg, INSERT);
392 if (*slot == 0)
393 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
395 return (rtx) *slot;
399 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
401 return GEN_INT (trunc_int_for_mode (c, mode));
404 /* CONST_DOUBLEs might be created from pairs of integers, or from
405 REAL_VALUE_TYPEs. Also, their length is known only at run time,
406 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
408 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
409 hash table. If so, return its counterpart; otherwise add it
410 to the hash table and return it. */
411 static rtx
412 lookup_const_double (rtx real)
414 void **slot = htab_find_slot (const_double_htab, real, INSERT);
415 if (*slot == 0)
416 *slot = real;
418 return (rtx) *slot;
421 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
422 VALUE in mode MODE. */
424 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
426 rtx real = rtx_alloc (CONST_DOUBLE);
427 PUT_MODE (real, mode);
429 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
431 return lookup_const_double (real);
434 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
435 of ints: I0 is the low-order word and I1 is the high-order word.
436 Do not use this routine for non-integer modes; convert to
437 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
440 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
442 rtx value;
443 unsigned int i;
445 if (mode != VOIDmode)
447 int width;
449 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
450 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
451 /* We can get a 0 for an error mark. */
452 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
453 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
455 /* We clear out all bits that don't belong in MODE, unless they and
456 our sign bit are all one. So we get either a reasonable negative
457 value or a reasonable unsigned value for this mode. */
458 width = GET_MODE_BITSIZE (mode);
459 if (width < HOST_BITS_PER_WIDE_INT
460 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
461 != ((HOST_WIDE_INT) (-1) << (width - 1))))
462 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
463 else if (width == HOST_BITS_PER_WIDE_INT
464 && ! (i1 == ~0 && i0 < 0))
465 i1 = 0;
466 else
467 /* We should be able to represent this value as a constant. */
468 gcc_assert (width <= 2 * HOST_BITS_PER_WIDE_INT);
470 /* If this would be an entire word for the target, but is not for
471 the host, then sign-extend on the host so that the number will
472 look the same way on the host that it would on the target.
474 For example, when building a 64 bit alpha hosted 32 bit sparc
475 targeted compiler, then we want the 32 bit unsigned value -1 to be
476 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
477 The latter confuses the sparc backend. */
479 if (width < HOST_BITS_PER_WIDE_INT
480 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
481 i0 |= ((HOST_WIDE_INT) (-1) << width);
483 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
484 CONST_INT.
486 ??? Strictly speaking, this is wrong if we create a CONST_INT for
487 a large unsigned constant with the size of MODE being
488 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
489 in a wider mode. In that case we will mis-interpret it as a
490 negative number.
492 Unfortunately, the only alternative is to make a CONST_DOUBLE for
493 any constant in any mode if it is an unsigned constant larger
494 than the maximum signed integer in an int on the host. However,
495 doing this will break everyone that always expects to see a
496 CONST_INT for SImode and smaller.
498 We have always been making CONST_INTs in this case, so nothing
499 new is being broken. */
501 if (width <= HOST_BITS_PER_WIDE_INT)
502 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
505 /* If this integer fits in one word, return a CONST_INT. */
506 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
507 return GEN_INT (i0);
509 /* We use VOIDmode for integers. */
510 value = rtx_alloc (CONST_DOUBLE);
511 PUT_MODE (value, VOIDmode);
513 CONST_DOUBLE_LOW (value) = i0;
514 CONST_DOUBLE_HIGH (value) = i1;
516 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
517 XWINT (value, i) = 0;
519 return lookup_const_double (value);
523 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
525 /* In case the MD file explicitly references the frame pointer, have
526 all such references point to the same frame pointer. This is
527 used during frame pointer elimination to distinguish the explicit
528 references to these registers from pseudos that happened to be
529 assigned to them.
531 If we have eliminated the frame pointer or arg pointer, we will
532 be using it as a normal register, for example as a spill
533 register. In such cases, we might be accessing it in a mode that
534 is not Pmode and therefore cannot use the pre-allocated rtx.
536 Also don't do this when we are making new REGs in reload, since
537 we don't want to get confused with the real pointers. */
539 if (mode == Pmode && !reload_in_progress)
541 if (regno == FRAME_POINTER_REGNUM
542 && (!reload_completed || frame_pointer_needed))
543 return frame_pointer_rtx;
544 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
545 if (regno == HARD_FRAME_POINTER_REGNUM
546 && (!reload_completed || frame_pointer_needed))
547 return hard_frame_pointer_rtx;
548 #endif
549 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
550 if (regno == ARG_POINTER_REGNUM)
551 return arg_pointer_rtx;
552 #endif
553 #ifdef RETURN_ADDRESS_POINTER_REGNUM
554 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
555 return return_address_pointer_rtx;
556 #endif
557 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
558 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
559 return pic_offset_table_rtx;
560 if (regno == STACK_POINTER_REGNUM)
561 return stack_pointer_rtx;
564 #if 0
565 /* If the per-function register table has been set up, try to re-use
566 an existing entry in that table to avoid useless generation of RTL.
568 This code is disabled for now until we can fix the various backends
569 which depend on having non-shared hard registers in some cases. Long
570 term we want to re-enable this code as it can significantly cut down
571 on the amount of useless RTL that gets generated.
573 We'll also need to fix some code that runs after reload that wants to
574 set ORIGINAL_REGNO. */
576 if (cfun
577 && cfun->emit
578 && regno_reg_rtx
579 && regno < FIRST_PSEUDO_REGISTER
580 && reg_raw_mode[regno] == mode)
581 return regno_reg_rtx[regno];
582 #endif
584 return gen_raw_REG (mode, regno);
588 gen_rtx_MEM (enum machine_mode mode, rtx addr)
590 rtx rt = gen_rtx_raw_MEM (mode, addr);
592 /* This field is not cleared by the mere allocation of the rtx, so
593 we clear it here. */
594 MEM_ATTRS (rt) = 0;
596 return rt;
599 /* Generate a memory referring to non-trapping constant memory. */
602 gen_const_mem (enum machine_mode mode, rtx addr)
604 rtx mem = gen_rtx_MEM (mode, addr);
605 MEM_READONLY_P (mem) = 1;
606 MEM_NOTRAP_P (mem) = 1;
607 return mem;
611 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
613 /* This is the most common failure type.
614 Catch it early so we can see who does it. */
615 gcc_assert (!(offset % GET_MODE_SIZE (mode)));
617 /* This check isn't usable right now because combine will
618 throw arbitrary crap like a CALL into a SUBREG in
619 gen_lowpart_for_combine so we must just eat it. */
620 #if 0
621 /* Check for this too. */
622 gcc_assert (offset < GET_MODE_SIZE (GET_MODE (reg)));
623 #endif
624 return gen_rtx_raw_SUBREG (mode, reg, offset);
627 /* Generate a SUBREG representing the least-significant part of REG if MODE
628 is smaller than mode of REG, otherwise paradoxical SUBREG. */
631 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
633 enum machine_mode inmode;
635 inmode = GET_MODE (reg);
636 if (inmode == VOIDmode)
637 inmode = mode;
638 return gen_rtx_SUBREG (mode, reg,
639 subreg_lowpart_offset (mode, inmode));
642 /* gen_rtvec (n, [rt1, ..., rtn])
644 ** This routine creates an rtvec and stores within it the
645 ** pointers to rtx's which are its arguments.
648 /*VARARGS1*/
649 rtvec
650 gen_rtvec (int n, ...)
652 int i, save_n;
653 rtx *vector;
654 va_list p;
656 va_start (p, n);
658 if (n == 0)
659 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
661 vector = alloca (n * sizeof (rtx));
663 for (i = 0; i < n; i++)
664 vector[i] = va_arg (p, rtx);
666 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
667 save_n = n;
668 va_end (p);
670 return gen_rtvec_v (save_n, vector);
673 rtvec
674 gen_rtvec_v (int n, rtx *argp)
676 int i;
677 rtvec rt_val;
679 if (n == 0)
680 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
682 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
684 for (i = 0; i < n; i++)
685 rt_val->elem[i] = *argp++;
687 return rt_val;
690 /* Generate a REG rtx for a new pseudo register of mode MODE.
691 This pseudo is assigned the next sequential register number. */
694 gen_reg_rtx (enum machine_mode mode)
696 struct function *f = cfun;
697 rtx val;
699 /* Don't let anything called after initial flow analysis create new
700 registers. */
701 gcc_assert (!no_new_pseudos);
703 if (generating_concat_p
704 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
705 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
707 /* For complex modes, don't make a single pseudo.
708 Instead, make a CONCAT of two pseudos.
709 This allows noncontiguous allocation of the real and imaginary parts,
710 which makes much better code. Besides, allocating DCmode
711 pseudos overstrains reload on some machines like the 386. */
712 rtx realpart, imagpart;
713 enum machine_mode partmode = GET_MODE_INNER (mode);
715 realpart = gen_reg_rtx (partmode);
716 imagpart = gen_reg_rtx (partmode);
717 return gen_rtx_CONCAT (mode, realpart, imagpart);
720 /* Make sure regno_pointer_align, and regno_reg_rtx are large
721 enough to have an element for this pseudo reg number. */
723 if (reg_rtx_no == f->emit->regno_pointer_align_length)
725 int old_size = f->emit->regno_pointer_align_length;
726 char *new;
727 rtx *new1;
729 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
730 memset (new + old_size, 0, old_size);
731 f->emit->regno_pointer_align = (unsigned char *) new;
733 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
734 old_size * 2 * sizeof (rtx));
735 memset (new1 + old_size, 0, old_size * sizeof (rtx));
736 regno_reg_rtx = new1;
738 f->emit->regno_pointer_align_length = old_size * 2;
741 val = gen_raw_REG (mode, reg_rtx_no);
742 regno_reg_rtx[reg_rtx_no++] = val;
743 return val;
746 /* Generate a register with same attributes as REG, but offsetted by OFFSET.
747 Do the big endian correction if needed. */
750 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
752 rtx new = gen_rtx_REG (mode, regno);
753 tree decl;
754 HOST_WIDE_INT var_size;
756 /* PR middle-end/14084
757 The problem appears when a variable is stored in a larger register
758 and later it is used in the original mode or some mode in between
759 or some part of variable is accessed.
761 On little endian machines there is no problem because
762 the REG_OFFSET of the start of the variable is the same when
763 accessed in any mode (it is 0).
765 However, this is not true on big endian machines.
766 The offset of the start of the variable is different when accessed
767 in different modes.
768 When we are taking a part of the REG we have to change the OFFSET
769 from offset WRT size of mode of REG to offset WRT size of variable.
771 If we would not do the big endian correction the resulting REG_OFFSET
772 would be larger than the size of the DECL.
774 Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
776 REG.mode MODE DECL size old offset new offset description
777 DI SI 4 4 0 int32 in SImode
778 DI SI 1 4 0 char in SImode
779 DI QI 1 7 0 char in QImode
780 DI QI 4 5 1 1st element in QImode
781 of char[4]
782 DI HI 4 6 2 1st element in HImode
783 of int16[2]
785 If the size of DECL is equal or greater than the size of REG
786 we can't do this correction because the register holds the
787 whole variable or a part of the variable and thus the REG_OFFSET
788 is already correct. */
790 decl = REG_EXPR (reg);
791 if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
792 && decl != NULL
793 && offset > 0
794 && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
795 && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
796 && var_size < GET_MODE_SIZE (GET_MODE (reg))))
798 int offset_le;
800 /* Convert machine endian to little endian WRT size of mode of REG. */
801 if (WORDS_BIG_ENDIAN)
802 offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
803 / UNITS_PER_WORD) * UNITS_PER_WORD;
804 else
805 offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
807 if (BYTES_BIG_ENDIAN)
808 offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
809 % UNITS_PER_WORD);
810 else
811 offset_le += offset % UNITS_PER_WORD;
813 if (offset_le >= var_size)
815 /* MODE is wider than the variable so the new reg will cover
816 the whole variable so the resulting OFFSET should be 0. */
817 offset = 0;
819 else
821 /* Convert little endian to machine endian WRT size of variable. */
822 if (WORDS_BIG_ENDIAN)
823 offset = ((var_size - 1 - offset_le)
824 / UNITS_PER_WORD) * UNITS_PER_WORD;
825 else
826 offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
828 if (BYTES_BIG_ENDIAN)
829 offset += ((var_size - 1 - offset_le)
830 % UNITS_PER_WORD);
831 else
832 offset += offset_le % UNITS_PER_WORD;
836 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
837 REG_OFFSET (reg) + offset);
838 return new;
841 /* Set the decl for MEM to DECL. */
843 void
844 set_reg_attrs_from_mem (rtx reg, rtx mem)
846 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
847 REG_ATTRS (reg)
848 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
851 /* Set the register attributes for registers contained in PARM_RTX.
852 Use needed values from memory attributes of MEM. */
854 void
855 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
857 if (REG_P (parm_rtx))
858 set_reg_attrs_from_mem (parm_rtx, mem);
859 else if (GET_CODE (parm_rtx) == PARALLEL)
861 /* Check for a NULL entry in the first slot, used to indicate that the
862 parameter goes both on the stack and in registers. */
863 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
864 for (; i < XVECLEN (parm_rtx, 0); i++)
866 rtx x = XVECEXP (parm_rtx, 0, i);
867 if (REG_P (XEXP (x, 0)))
868 REG_ATTRS (XEXP (x, 0))
869 = get_reg_attrs (MEM_EXPR (mem),
870 INTVAL (XEXP (x, 1)));
875 /* Assign the RTX X to declaration T. */
876 void
877 set_decl_rtl (tree t, rtx x)
879 DECL_CHECK (t)->decl.rtl = x;
881 if (!x)
882 return;
883 /* For register, we maintain the reverse information too. */
884 if (REG_P (x))
885 REG_ATTRS (x) = get_reg_attrs (t, 0);
886 else if (GET_CODE (x) == SUBREG)
887 REG_ATTRS (SUBREG_REG (x))
888 = get_reg_attrs (t, -SUBREG_BYTE (x));
889 if (GET_CODE (x) == CONCAT)
891 if (REG_P (XEXP (x, 0)))
892 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
893 if (REG_P (XEXP (x, 1)))
894 REG_ATTRS (XEXP (x, 1))
895 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
897 if (GET_CODE (x) == PARALLEL)
899 int i;
900 for (i = 0; i < XVECLEN (x, 0); i++)
902 rtx y = XVECEXP (x, 0, i);
903 if (REG_P (XEXP (y, 0)))
904 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
909 /* Assign the RTX X to parameter declaration T. */
910 void
911 set_decl_incoming_rtl (tree t, rtx x)
913 DECL_INCOMING_RTL (t) = x;
915 if (!x)
916 return;
917 /* For register, we maintain the reverse information too. */
918 if (REG_P (x))
919 REG_ATTRS (x) = get_reg_attrs (t, 0);
920 else if (GET_CODE (x) == SUBREG)
921 REG_ATTRS (SUBREG_REG (x))
922 = get_reg_attrs (t, -SUBREG_BYTE (x));
923 if (GET_CODE (x) == CONCAT)
925 if (REG_P (XEXP (x, 0)))
926 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
927 if (REG_P (XEXP (x, 1)))
928 REG_ATTRS (XEXP (x, 1))
929 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
931 if (GET_CODE (x) == PARALLEL)
933 int i, start;
935 /* Check for a NULL entry, used to indicate that the parameter goes
936 both on the stack and in registers. */
937 if (XEXP (XVECEXP (x, 0, 0), 0))
938 start = 0;
939 else
940 start = 1;
942 for (i = start; i < XVECLEN (x, 0); i++)
944 rtx y = XVECEXP (x, 0, i);
945 if (REG_P (XEXP (y, 0)))
946 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
951 /* Identify REG (which may be a CONCAT) as a user register. */
953 void
954 mark_user_reg (rtx reg)
956 if (GET_CODE (reg) == CONCAT)
958 REG_USERVAR_P (XEXP (reg, 0)) = 1;
959 REG_USERVAR_P (XEXP (reg, 1)) = 1;
961 else
963 gcc_assert (REG_P (reg));
964 REG_USERVAR_P (reg) = 1;
968 /* Identify REG as a probable pointer register and show its alignment
969 as ALIGN, if nonzero. */
971 void
972 mark_reg_pointer (rtx reg, int align)
974 if (! REG_POINTER (reg))
976 REG_POINTER (reg) = 1;
978 if (align)
979 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
981 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
982 /* We can no-longer be sure just how aligned this pointer is. */
983 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
986 /* Return 1 plus largest pseudo reg number used in the current function. */
989 max_reg_num (void)
991 return reg_rtx_no;
994 /* Return 1 + the largest label number used so far in the current function. */
997 max_label_num (void)
999 return label_num;
1002 /* Return first label number used in this function (if any were used). */
1005 get_first_label_num (void)
1007 return first_label_num;
1010 /* If the rtx for label was created during the expansion of a nested
1011 function, then first_label_num won't include this label number.
1012 Fix this now so that array indicies work later. */
1014 void
1015 maybe_set_first_label_num (rtx x)
1017 if (CODE_LABEL_NUMBER (x) < first_label_num)
1018 first_label_num = CODE_LABEL_NUMBER (x);
1021 /* Return the final regno of X, which is a SUBREG of a hard
1022 register. */
1024 subreg_hard_regno (rtx x, int check_mode)
1026 enum machine_mode mode = GET_MODE (x);
1027 unsigned int byte_offset, base_regno, final_regno;
1028 rtx reg = SUBREG_REG (x);
1030 /* This is where we attempt to catch illegal subregs
1031 created by the compiler. */
1032 gcc_assert (GET_CODE (x) == SUBREG && REG_P (reg));
1033 base_regno = REGNO (reg);
1034 gcc_assert (base_regno < FIRST_PSEUDO_REGISTER);
1035 gcc_assert (!check_mode || HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)));
1036 #ifdef ENABLE_CHECKING
1037 gcc_assert (subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1038 SUBREG_BYTE (x), mode));
1039 #endif
1040 /* Catch non-congruent offsets too. */
1041 byte_offset = SUBREG_BYTE (x);
1042 gcc_assert (!(byte_offset % GET_MODE_SIZE (mode)));
1044 final_regno = subreg_regno (x);
1046 return final_regno;
1049 /* Return a value representing some low-order bits of X, where the number
1050 of low-order bits is given by MODE. Note that no conversion is done
1051 between floating-point and fixed-point values, rather, the bit
1052 representation is returned.
1054 This function handles the cases in common between gen_lowpart, below,
1055 and two variants in cse.c and combine.c. These are the cases that can
1056 be safely handled at all points in the compilation.
1058 If this is not a case we can handle, return 0. */
1061 gen_lowpart_common (enum machine_mode mode, rtx x)
1063 int msize = GET_MODE_SIZE (mode);
1064 int xsize;
1065 int offset = 0;
1066 enum machine_mode innermode;
1068 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1069 so we have to make one up. Yuk. */
1070 innermode = GET_MODE (x);
1071 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1072 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1073 else if (innermode == VOIDmode)
1074 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1076 xsize = GET_MODE_SIZE (innermode);
1078 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1080 if (innermode == mode)
1081 return x;
1083 /* MODE must occupy no more words than the mode of X. */
1084 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1085 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1086 return 0;
1088 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1089 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1090 return 0;
1092 offset = subreg_lowpart_offset (mode, innermode);
1094 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1095 && (GET_MODE_CLASS (mode) == MODE_INT
1096 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1098 /* If we are getting the low-order part of something that has been
1099 sign- or zero-extended, we can either just use the object being
1100 extended or make a narrower extension. If we want an even smaller
1101 piece than the size of the object being extended, call ourselves
1102 recursively.
1104 This case is used mostly by combine and cse. */
1106 if (GET_MODE (XEXP (x, 0)) == mode)
1107 return XEXP (x, 0);
1108 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1109 return gen_lowpart_common (mode, XEXP (x, 0));
1110 else if (msize < xsize)
1111 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1113 else if (GET_CODE (x) == SUBREG || REG_P (x)
1114 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1115 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1116 return simplify_gen_subreg (mode, x, innermode, offset);
1118 /* Otherwise, we can't do this. */
1119 return 0;
1122 /* Return the constant real or imaginary part (which has mode MODE)
1123 of a complex value X. The IMAGPART_P argument determines whether
1124 the real or complex component should be returned. This function
1125 returns NULL_RTX if the component isn't a constant. */
1127 static rtx
1128 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1130 tree decl, part;
1132 if (MEM_P (x)
1133 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1135 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1136 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1138 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1139 if (TREE_CODE (part) == REAL_CST
1140 || TREE_CODE (part) == INTEGER_CST)
1141 return expand_expr (part, NULL_RTX, mode, 0);
1144 return NULL_RTX;
1147 /* Return the real part (which has mode MODE) of a complex value X.
1148 This always comes at the low address in memory. */
1151 gen_realpart (enum machine_mode mode, rtx x)
1153 rtx part;
1155 /* Handle complex constants. */
1156 part = gen_complex_constant_part (mode, x, 0);
1157 if (part != NULL_RTX)
1158 return part;
1160 if (WORDS_BIG_ENDIAN
1161 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1162 && REG_P (x)
1163 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1164 internal_error
1165 ("can't access real part of complex value in hard register");
1166 else if (WORDS_BIG_ENDIAN)
1167 return gen_highpart (mode, x);
1168 else
1169 return gen_lowpart (mode, x);
1172 /* Return the imaginary part (which has mode MODE) of a complex value X.
1173 This always comes at the high address in memory. */
1176 gen_imagpart (enum machine_mode mode, rtx x)
1178 rtx part;
1180 /* Handle complex constants. */
1181 part = gen_complex_constant_part (mode, x, 1);
1182 if (part != NULL_RTX)
1183 return part;
1185 if (WORDS_BIG_ENDIAN)
1186 return gen_lowpart (mode, x);
1187 else if (! WORDS_BIG_ENDIAN
1188 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1189 && REG_P (x)
1190 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1191 internal_error
1192 ("can't access imaginary part of complex value in hard register");
1193 else
1194 return gen_highpart (mode, x);
1198 gen_highpart (enum machine_mode mode, rtx x)
1200 unsigned int msize = GET_MODE_SIZE (mode);
1201 rtx result;
1203 /* This case loses if X is a subreg. To catch bugs early,
1204 complain if an invalid MODE is used even in other cases. */
1205 gcc_assert (msize <= UNITS_PER_WORD
1206 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1208 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1209 subreg_highpart_offset (mode, GET_MODE (x)));
1210 gcc_assert (result);
1212 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1213 the target if we have a MEM. gen_highpart must return a valid operand,
1214 emitting code if necessary to do so. */
1215 if (MEM_P (result))
1217 result = validize_mem (result);
1218 gcc_assert (result);
1221 return result;
1224 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1225 be VOIDmode constant. */
1227 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1229 if (GET_MODE (exp) != VOIDmode)
1231 gcc_assert (GET_MODE (exp) == innermode);
1232 return gen_highpart (outermode, exp);
1234 return simplify_gen_subreg (outermode, exp, innermode,
1235 subreg_highpart_offset (outermode, innermode));
1238 /* Return offset in bytes to get OUTERMODE low part
1239 of the value in mode INNERMODE stored in memory in target format. */
1241 unsigned int
1242 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1244 unsigned int offset = 0;
1245 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1247 if (difference > 0)
1249 if (WORDS_BIG_ENDIAN)
1250 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1251 if (BYTES_BIG_ENDIAN)
1252 offset += difference % UNITS_PER_WORD;
1255 return offset;
1258 /* Return offset in bytes to get OUTERMODE high part
1259 of the value in mode INNERMODE stored in memory in target format. */
1260 unsigned int
1261 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1263 unsigned int offset = 0;
1264 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1266 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1268 if (difference > 0)
1270 if (! WORDS_BIG_ENDIAN)
1271 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1272 if (! BYTES_BIG_ENDIAN)
1273 offset += difference % UNITS_PER_WORD;
1276 return offset;
1279 /* Return 1 iff X, assumed to be a SUBREG,
1280 refers to the least significant part of its containing reg.
1281 If X is not a SUBREG, always return 1 (it is its own low part!). */
1284 subreg_lowpart_p (rtx x)
1286 if (GET_CODE (x) != SUBREG)
1287 return 1;
1288 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1289 return 0;
1291 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1292 == SUBREG_BYTE (x));
1295 /* Return subword OFFSET of operand OP.
1296 The word number, OFFSET, is interpreted as the word number starting
1297 at the low-order address. OFFSET 0 is the low-order word if not
1298 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1300 If we cannot extract the required word, we return zero. Otherwise,
1301 an rtx corresponding to the requested word will be returned.
1303 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1304 reload has completed, a valid address will always be returned. After
1305 reload, if a valid address cannot be returned, we return zero.
1307 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1308 it is the responsibility of the caller.
1310 MODE is the mode of OP in case it is a CONST_INT.
1312 ??? This is still rather broken for some cases. The problem for the
1313 moment is that all callers of this thing provide no 'goal mode' to
1314 tell us to work with. This exists because all callers were written
1315 in a word based SUBREG world.
1316 Now use of this function can be deprecated by simplify_subreg in most
1317 cases.
1321 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1323 if (mode == VOIDmode)
1324 mode = GET_MODE (op);
1326 gcc_assert (mode != VOIDmode);
1328 /* If OP is narrower than a word, fail. */
1329 if (mode != BLKmode
1330 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1331 return 0;
1333 /* If we want a word outside OP, return zero. */
1334 if (mode != BLKmode
1335 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1336 return const0_rtx;
1338 /* Form a new MEM at the requested address. */
1339 if (MEM_P (op))
1341 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1343 if (! validate_address)
1344 return new;
1346 else if (reload_completed)
1348 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1349 return 0;
1351 else
1352 return replace_equiv_address (new, XEXP (new, 0));
1355 /* Rest can be handled by simplify_subreg. */
1356 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1359 /* Similar to `operand_subword', but never return 0. If we can't extract
1360 the required subword, put OP into a register and try again. If that fails,
1361 abort. We always validate the address in this case.
1363 MODE is the mode of OP, in case it is CONST_INT. */
1366 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1368 rtx result = operand_subword (op, offset, 1, mode);
1370 if (result)
1371 return result;
1373 if (mode != BLKmode && mode != VOIDmode)
1375 /* If this is a register which can not be accessed by words, copy it
1376 to a pseudo register. */
1377 if (REG_P (op))
1378 op = copy_to_reg (op);
1379 else
1380 op = force_reg (mode, op);
1383 result = operand_subword (op, offset, 1, mode);
1384 gcc_assert (result);
1386 return result;
1389 /* Given a compare instruction, swap the operands.
1390 A test instruction is changed into a compare of 0 against the operand. */
1392 void
1393 reverse_comparison (rtx insn)
1395 rtx body = PATTERN (insn);
1396 rtx comp;
1398 if (GET_CODE (body) == SET)
1399 comp = SET_SRC (body);
1400 else
1401 comp = SET_SRC (XVECEXP (body, 0, 0));
1403 if (GET_CODE (comp) == COMPARE)
1405 rtx op0 = XEXP (comp, 0);
1406 rtx op1 = XEXP (comp, 1);
1407 XEXP (comp, 0) = op1;
1408 XEXP (comp, 1) = op0;
1410 else
1412 rtx new = gen_rtx_COMPARE (VOIDmode,
1413 CONST0_RTX (GET_MODE (comp)), comp);
1414 if (GET_CODE (body) == SET)
1415 SET_SRC (body) = new;
1416 else
1417 SET_SRC (XVECEXP (body, 0, 0)) = new;
1421 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1422 or (2) a component ref of something variable. Represent the later with
1423 a NULL expression. */
1425 static tree
1426 component_ref_for_mem_expr (tree ref)
1428 tree inner = TREE_OPERAND (ref, 0);
1430 if (TREE_CODE (inner) == COMPONENT_REF)
1431 inner = component_ref_for_mem_expr (inner);
1432 else
1434 /* Now remove any conversions: they don't change what the underlying
1435 object is. Likewise for SAVE_EXPR. */
1436 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1437 || TREE_CODE (inner) == NON_LVALUE_EXPR
1438 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1439 || TREE_CODE (inner) == SAVE_EXPR)
1440 inner = TREE_OPERAND (inner, 0);
1442 if (! DECL_P (inner))
1443 inner = NULL_TREE;
1446 if (inner == TREE_OPERAND (ref, 0))
1447 return ref;
1448 else
1449 return build3 (COMPONENT_REF, TREE_TYPE (ref), inner,
1450 TREE_OPERAND (ref, 1), NULL_TREE);
1453 /* Returns 1 if both MEM_EXPR can be considered equal
1454 and 0 otherwise. */
1457 mem_expr_equal_p (tree expr1, tree expr2)
1459 if (expr1 == expr2)
1460 return 1;
1462 if (! expr1 || ! expr2)
1463 return 0;
1465 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1466 return 0;
1468 if (TREE_CODE (expr1) == COMPONENT_REF)
1469 return
1470 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1471 TREE_OPERAND (expr2, 0))
1472 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1473 TREE_OPERAND (expr2, 1));
1475 if (INDIRECT_REF_P (expr1))
1476 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1477 TREE_OPERAND (expr2, 0));
1479 /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1480 have been resolved here. */
1481 gcc_assert (DECL_P (expr1));
1483 /* Decls with different pointers can't be equal. */
1484 return 0;
1487 /* Given REF, a MEM, and T, either the type of X or the expression
1488 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1489 if we are making a new object of this type. BITPOS is nonzero if
1490 there is an offset outstanding on T that will be applied later. */
1492 void
1493 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1494 HOST_WIDE_INT bitpos)
1496 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1497 tree expr = MEM_EXPR (ref);
1498 rtx offset = MEM_OFFSET (ref);
1499 rtx size = MEM_SIZE (ref);
1500 unsigned int align = MEM_ALIGN (ref);
1501 HOST_WIDE_INT apply_bitpos = 0;
1502 tree type;
1504 /* It can happen that type_for_mode was given a mode for which there
1505 is no language-level type. In which case it returns NULL, which
1506 we can see here. */
1507 if (t == NULL_TREE)
1508 return;
1510 type = TYPE_P (t) ? t : TREE_TYPE (t);
1511 if (type == error_mark_node)
1512 return;
1514 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1515 wrong answer, as it assumes that DECL_RTL already has the right alias
1516 info. Callers should not set DECL_RTL until after the call to
1517 set_mem_attributes. */
1518 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1520 /* Get the alias set from the expression or type (perhaps using a
1521 front-end routine) and use it. */
1522 alias = get_alias_set (t);
1524 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1525 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1526 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1527 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (t);
1529 /* If we are making an object of this type, or if this is a DECL, we know
1530 that it is a scalar if the type is not an aggregate. */
1531 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1532 MEM_SCALAR_P (ref) = 1;
1534 /* We can set the alignment from the type if we are making an object,
1535 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1536 if (objectp || TREE_CODE (t) == INDIRECT_REF
1537 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1538 || TYPE_ALIGN_OK (type))
1539 align = MAX (align, TYPE_ALIGN (type));
1540 else
1541 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1543 if (integer_zerop (TREE_OPERAND (t, 1)))
1544 /* We don't know anything about the alignment. */
1545 align = BITS_PER_UNIT;
1546 else
1547 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1550 /* If the size is known, we can set that. */
1551 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1552 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1554 /* If T is not a type, we may be able to deduce some more information about
1555 the expression. */
1556 if (! TYPE_P (t))
1558 tree base = get_base_address (t);
1559 if (base && DECL_P (base)
1560 && TREE_READONLY (base)
1561 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1562 MEM_READONLY_P (ref) = 1;
1564 if (TREE_THIS_VOLATILE (t))
1565 MEM_VOLATILE_P (ref) = 1;
1567 /* Now remove any conversions: they don't change what the underlying
1568 object is. Likewise for SAVE_EXPR. */
1569 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1570 || TREE_CODE (t) == NON_LVALUE_EXPR
1571 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1572 || TREE_CODE (t) == SAVE_EXPR)
1573 t = TREE_OPERAND (t, 0);
1575 /* If this expression can't be addressed (e.g., it contains a reference
1576 to a non-addressable field), show we don't change its alias set. */
1577 if (! can_address_p (t))
1578 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1580 /* If this is a decl, set the attributes of the MEM from it. */
1581 if (DECL_P (t))
1583 expr = t;
1584 offset = const0_rtx;
1585 apply_bitpos = bitpos;
1586 size = (DECL_SIZE_UNIT (t)
1587 && host_integerp (DECL_SIZE_UNIT (t), 1)
1588 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1589 align = DECL_ALIGN (t);
1592 /* If this is a constant, we know the alignment. */
1593 else if (CONSTANT_CLASS_P (t))
1595 align = TYPE_ALIGN (type);
1596 #ifdef CONSTANT_ALIGNMENT
1597 align = CONSTANT_ALIGNMENT (t, align);
1598 #endif
1601 /* If this is a field reference and not a bit-field, record it. */
1602 /* ??? There is some information that can be gleened from bit-fields,
1603 such as the word offset in the structure that might be modified.
1604 But skip it for now. */
1605 else if (TREE_CODE (t) == COMPONENT_REF
1606 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1608 expr = component_ref_for_mem_expr (t);
1609 offset = const0_rtx;
1610 apply_bitpos = bitpos;
1611 /* ??? Any reason the field size would be different than
1612 the size we got from the type? */
1615 /* If this is an array reference, look for an outer field reference. */
1616 else if (TREE_CODE (t) == ARRAY_REF)
1618 tree off_tree = size_zero_node;
1619 /* We can't modify t, because we use it at the end of the
1620 function. */
1621 tree t2 = t;
1625 tree index = TREE_OPERAND (t2, 1);
1626 tree low_bound = array_ref_low_bound (t2);
1627 tree unit_size = array_ref_element_size (t2);
1629 /* We assume all arrays have sizes that are a multiple of a byte.
1630 First subtract the lower bound, if any, in the type of the
1631 index, then convert to sizetype and multiply by the size of
1632 the array element. */
1633 if (! integer_zerop (low_bound))
1634 index = fold (build2 (MINUS_EXPR, TREE_TYPE (index),
1635 index, low_bound));
1637 off_tree = size_binop (PLUS_EXPR,
1638 size_binop (MULT_EXPR, convert (sizetype,
1639 index),
1640 unit_size),
1641 off_tree);
1642 t2 = TREE_OPERAND (t2, 0);
1644 while (TREE_CODE (t2) == ARRAY_REF);
1646 if (DECL_P (t2))
1648 expr = t2;
1649 offset = NULL;
1650 if (host_integerp (off_tree, 1))
1652 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1653 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1654 align = DECL_ALIGN (t2);
1655 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1656 align = aoff;
1657 offset = GEN_INT (ioff);
1658 apply_bitpos = bitpos;
1661 else if (TREE_CODE (t2) == COMPONENT_REF)
1663 expr = component_ref_for_mem_expr (t2);
1664 if (host_integerp (off_tree, 1))
1666 offset = GEN_INT (tree_low_cst (off_tree, 1));
1667 apply_bitpos = bitpos;
1669 /* ??? Any reason the field size would be different than
1670 the size we got from the type? */
1672 else if (flag_argument_noalias > 1
1673 && (INDIRECT_REF_P (t2))
1674 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1676 expr = t2;
1677 offset = NULL;
1681 /* If this is a Fortran indirect argument reference, record the
1682 parameter decl. */
1683 else if (flag_argument_noalias > 1
1684 && (INDIRECT_REF_P (t))
1685 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1687 expr = t;
1688 offset = NULL;
1692 /* If we modified OFFSET based on T, then subtract the outstanding
1693 bit position offset. Similarly, increase the size of the accessed
1694 object to contain the negative offset. */
1695 if (apply_bitpos)
1697 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1698 if (size)
1699 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1702 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1704 /* Force EXPR and OFFSE to NULL, since we don't know exactly what
1705 we're overlapping. */
1706 offset = NULL;
1707 expr = NULL;
1710 /* Now set the attributes we computed above. */
1711 MEM_ATTRS (ref)
1712 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1714 /* If this is already known to be a scalar or aggregate, we are done. */
1715 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1716 return;
1718 /* If it is a reference into an aggregate, this is part of an aggregate.
1719 Otherwise we don't know. */
1720 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1721 || TREE_CODE (t) == ARRAY_RANGE_REF
1722 || TREE_CODE (t) == BIT_FIELD_REF)
1723 MEM_IN_STRUCT_P (ref) = 1;
1726 void
1727 set_mem_attributes (rtx ref, tree t, int objectp)
1729 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1732 /* Set the decl for MEM to DECL. */
1734 void
1735 set_mem_attrs_from_reg (rtx mem, rtx reg)
1737 MEM_ATTRS (mem)
1738 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1739 GEN_INT (REG_OFFSET (reg)),
1740 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1743 /* Set the alias set of MEM to SET. */
1745 void
1746 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1748 #ifdef ENABLE_CHECKING
1749 /* If the new and old alias sets don't conflict, something is wrong. */
1750 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1751 #endif
1753 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1754 MEM_SIZE (mem), MEM_ALIGN (mem),
1755 GET_MODE (mem));
1758 /* Set the alignment of MEM to ALIGN bits. */
1760 void
1761 set_mem_align (rtx mem, unsigned int align)
1763 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1764 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1765 GET_MODE (mem));
1768 /* Set the expr for MEM to EXPR. */
1770 void
1771 set_mem_expr (rtx mem, tree expr)
1773 MEM_ATTRS (mem)
1774 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1775 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1778 /* Set the offset of MEM to OFFSET. */
1780 void
1781 set_mem_offset (rtx mem, rtx offset)
1783 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1784 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1785 GET_MODE (mem));
1788 /* Set the size of MEM to SIZE. */
1790 void
1791 set_mem_size (rtx mem, rtx size)
1793 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1794 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1795 GET_MODE (mem));
1798 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1799 and its address changed to ADDR. (VOIDmode means don't change the mode.
1800 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1801 returned memory location is required to be valid. The memory
1802 attributes are not changed. */
1804 static rtx
1805 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1807 rtx new;
1809 gcc_assert (MEM_P (memref));
1810 if (mode == VOIDmode)
1811 mode = GET_MODE (memref);
1812 if (addr == 0)
1813 addr = XEXP (memref, 0);
1814 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1815 && (!validate || memory_address_p (mode, addr)))
1816 return memref;
1818 if (validate)
1820 if (reload_in_progress || reload_completed)
1821 gcc_assert (memory_address_p (mode, addr));
1822 else
1823 addr = memory_address (mode, addr);
1826 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1827 return memref;
1829 new = gen_rtx_MEM (mode, addr);
1830 MEM_COPY_ATTRIBUTES (new, memref);
1831 return new;
1834 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1835 way we are changing MEMREF, so we only preserve the alias set. */
1838 change_address (rtx memref, enum machine_mode mode, rtx addr)
1840 rtx new = change_address_1 (memref, mode, addr, 1), size;
1841 enum machine_mode mmode = GET_MODE (new);
1842 unsigned int align;
1844 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1845 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1847 /* If there are no changes, just return the original memory reference. */
1848 if (new == memref)
1850 if (MEM_ATTRS (memref) == 0
1851 || (MEM_EXPR (memref) == NULL
1852 && MEM_OFFSET (memref) == NULL
1853 && MEM_SIZE (memref) == size
1854 && MEM_ALIGN (memref) == align))
1855 return new;
1857 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1858 MEM_COPY_ATTRIBUTES (new, memref);
1861 MEM_ATTRS (new)
1862 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1864 return new;
1867 /* Return a memory reference like MEMREF, but with its mode changed
1868 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1869 nonzero, the memory address is forced to be valid.
1870 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1871 and caller is responsible for adjusting MEMREF base register. */
1874 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1875 int validate, int adjust)
1877 rtx addr = XEXP (memref, 0);
1878 rtx new;
1879 rtx memoffset = MEM_OFFSET (memref);
1880 rtx size = 0;
1881 unsigned int memalign = MEM_ALIGN (memref);
1883 /* If there are no changes, just return the original memory reference. */
1884 if (mode == GET_MODE (memref) && !offset
1885 && (!validate || memory_address_p (mode, addr)))
1886 return memref;
1888 /* ??? Prefer to create garbage instead of creating shared rtl.
1889 This may happen even if offset is nonzero -- consider
1890 (plus (plus reg reg) const_int) -- so do this always. */
1891 addr = copy_rtx (addr);
1893 if (adjust)
1895 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1896 object, we can merge it into the LO_SUM. */
1897 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1898 && offset >= 0
1899 && (unsigned HOST_WIDE_INT) offset
1900 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1901 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1902 plus_constant (XEXP (addr, 1), offset));
1903 else
1904 addr = plus_constant (addr, offset);
1907 new = change_address_1 (memref, mode, addr, validate);
1909 /* Compute the new values of the memory attributes due to this adjustment.
1910 We add the offsets and update the alignment. */
1911 if (memoffset)
1912 memoffset = GEN_INT (offset + INTVAL (memoffset));
1914 /* Compute the new alignment by taking the MIN of the alignment and the
1915 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1916 if zero. */
1917 if (offset != 0)
1918 memalign
1919 = MIN (memalign,
1920 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1922 /* We can compute the size in a number of ways. */
1923 if (GET_MODE (new) != BLKmode)
1924 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1925 else if (MEM_SIZE (memref))
1926 size = plus_constant (MEM_SIZE (memref), -offset);
1928 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1929 memoffset, size, memalign, GET_MODE (new));
1931 /* At some point, we should validate that this offset is within the object,
1932 if all the appropriate values are known. */
1933 return new;
1936 /* Return a memory reference like MEMREF, but with its mode changed
1937 to MODE and its address changed to ADDR, which is assumed to be
1938 MEMREF offseted by OFFSET bytes. If VALIDATE is
1939 nonzero, the memory address is forced to be valid. */
1942 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
1943 HOST_WIDE_INT offset, int validate)
1945 memref = change_address_1 (memref, VOIDmode, addr, validate);
1946 return adjust_address_1 (memref, mode, offset, validate, 0);
1949 /* Return a memory reference like MEMREF, but whose address is changed by
1950 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1951 known to be in OFFSET (possibly 1). */
1954 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
1956 rtx new, addr = XEXP (memref, 0);
1958 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1960 /* At this point we don't know _why_ the address is invalid. It
1961 could have secondary memory references, multiplies or anything.
1963 However, if we did go and rearrange things, we can wind up not
1964 being able to recognize the magic around pic_offset_table_rtx.
1965 This stuff is fragile, and is yet another example of why it is
1966 bad to expose PIC machinery too early. */
1967 if (! memory_address_p (GET_MODE (memref), new)
1968 && GET_CODE (addr) == PLUS
1969 && XEXP (addr, 0) == pic_offset_table_rtx)
1971 addr = force_reg (GET_MODE (addr), addr);
1972 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
1975 update_temp_slot_address (XEXP (memref, 0), new);
1976 new = change_address_1 (memref, VOIDmode, new, 1);
1978 /* If there are no changes, just return the original memory reference. */
1979 if (new == memref)
1980 return new;
1982 /* Update the alignment to reflect the offset. Reset the offset, which
1983 we don't know. */
1984 MEM_ATTRS (new)
1985 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
1986 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
1987 GET_MODE (new));
1988 return new;
1991 /* Return a memory reference like MEMREF, but with its address changed to
1992 ADDR. The caller is asserting that the actual piece of memory pointed
1993 to is the same, just the form of the address is being changed, such as
1994 by putting something into a register. */
1997 replace_equiv_address (rtx memref, rtx addr)
1999 /* change_address_1 copies the memory attribute structure without change
2000 and that's exactly what we want here. */
2001 update_temp_slot_address (XEXP (memref, 0), addr);
2002 return change_address_1 (memref, VOIDmode, addr, 1);
2005 /* Likewise, but the reference is not required to be valid. */
2008 replace_equiv_address_nv (rtx memref, rtx addr)
2010 return change_address_1 (memref, VOIDmode, addr, 0);
2013 /* Return a memory reference like MEMREF, but with its mode widened to
2014 MODE and offset by OFFSET. This would be used by targets that e.g.
2015 cannot issue QImode memory operations and have to use SImode memory
2016 operations plus masking logic. */
2019 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2021 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2022 tree expr = MEM_EXPR (new);
2023 rtx memoffset = MEM_OFFSET (new);
2024 unsigned int size = GET_MODE_SIZE (mode);
2026 /* If there are no changes, just return the original memory reference. */
2027 if (new == memref)
2028 return new;
2030 /* If we don't know what offset we were at within the expression, then
2031 we can't know if we've overstepped the bounds. */
2032 if (! memoffset)
2033 expr = NULL_TREE;
2035 while (expr)
2037 if (TREE_CODE (expr) == COMPONENT_REF)
2039 tree field = TREE_OPERAND (expr, 1);
2040 tree offset = component_ref_field_offset (expr);
2042 if (! DECL_SIZE_UNIT (field))
2044 expr = NULL_TREE;
2045 break;
2048 /* Is the field at least as large as the access? If so, ok,
2049 otherwise strip back to the containing structure. */
2050 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2051 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2052 && INTVAL (memoffset) >= 0)
2053 break;
2055 if (! host_integerp (offset, 1))
2057 expr = NULL_TREE;
2058 break;
2061 expr = TREE_OPERAND (expr, 0);
2062 memoffset
2063 = (GEN_INT (INTVAL (memoffset)
2064 + tree_low_cst (offset, 1)
2065 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2066 / BITS_PER_UNIT)));
2068 /* Similarly for the decl. */
2069 else if (DECL_P (expr)
2070 && DECL_SIZE_UNIT (expr)
2071 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2072 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2073 && (! memoffset || INTVAL (memoffset) >= 0))
2074 break;
2075 else
2077 /* The widened memory access overflows the expression, which means
2078 that it could alias another expression. Zap it. */
2079 expr = NULL_TREE;
2080 break;
2084 if (! expr)
2085 memoffset = NULL_RTX;
2087 /* The widened memory may alias other stuff, so zap the alias set. */
2088 /* ??? Maybe use get_alias_set on any remaining expression. */
2090 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2091 MEM_ALIGN (new), mode);
2093 return new;
2096 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2099 gen_label_rtx (void)
2101 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2102 NULL, label_num++, NULL);
2105 /* For procedure integration. */
2107 /* Install new pointers to the first and last insns in the chain.
2108 Also, set cur_insn_uid to one higher than the last in use.
2109 Used for an inline-procedure after copying the insn chain. */
2111 void
2112 set_new_first_and_last_insn (rtx first, rtx last)
2114 rtx insn;
2116 first_insn = first;
2117 last_insn = last;
2118 cur_insn_uid = 0;
2120 for (insn = first; insn; insn = NEXT_INSN (insn))
2121 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2123 cur_insn_uid++;
2126 /* Go through all the RTL insn bodies and copy any invalid shared
2127 structure. This routine should only be called once. */
2129 static void
2130 unshare_all_rtl_1 (tree fndecl, rtx insn)
2132 tree decl;
2134 /* Make sure that virtual parameters are not shared. */
2135 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2136 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2138 /* Make sure that virtual stack slots are not shared. */
2139 unshare_all_decls (DECL_INITIAL (fndecl));
2141 /* Unshare just about everything else. */
2142 unshare_all_rtl_in_chain (insn);
2144 /* Make sure the addresses of stack slots found outside the insn chain
2145 (such as, in DECL_RTL of a variable) are not shared
2146 with the insn chain.
2148 This special care is necessary when the stack slot MEM does not
2149 actually appear in the insn chain. If it does appear, its address
2150 is unshared from all else at that point. */
2151 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2154 /* Go through all the RTL insn bodies and copy any invalid shared
2155 structure, again. This is a fairly expensive thing to do so it
2156 should be done sparingly. */
2158 void
2159 unshare_all_rtl_again (rtx insn)
2161 rtx p;
2162 tree decl;
2164 for (p = insn; p; p = NEXT_INSN (p))
2165 if (INSN_P (p))
2167 reset_used_flags (PATTERN (p));
2168 reset_used_flags (REG_NOTES (p));
2169 reset_used_flags (LOG_LINKS (p));
2172 /* Make sure that virtual stack slots are not shared. */
2173 reset_used_decls (DECL_INITIAL (cfun->decl));
2175 /* Make sure that virtual parameters are not shared. */
2176 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2177 reset_used_flags (DECL_RTL (decl));
2179 reset_used_flags (stack_slot_list);
2181 unshare_all_rtl_1 (cfun->decl, insn);
2184 void
2185 unshare_all_rtl (void)
2187 unshare_all_rtl_1 (current_function_decl, get_insns ());
2190 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2191 Recursively does the same for subexpressions. */
2193 static void
2194 verify_rtx_sharing (rtx orig, rtx insn)
2196 rtx x = orig;
2197 int i;
2198 enum rtx_code code;
2199 const char *format_ptr;
2201 if (x == 0)
2202 return;
2204 code = GET_CODE (x);
2206 /* These types may be freely shared. */
2208 switch (code)
2210 case REG:
2211 case CONST_INT:
2212 case CONST_DOUBLE:
2213 case CONST_VECTOR:
2214 case SYMBOL_REF:
2215 case LABEL_REF:
2216 case CODE_LABEL:
2217 case PC:
2218 case CC0:
2219 case SCRATCH:
2220 return;
2221 /* SCRATCH must be shared because they represent distinct values. */
2222 case CLOBBER:
2223 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2224 return;
2225 break;
2227 case CONST:
2228 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2229 a LABEL_REF, it isn't sharable. */
2230 if (GET_CODE (XEXP (x, 0)) == PLUS
2231 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2232 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2233 return;
2234 break;
2236 case MEM:
2237 /* A MEM is allowed to be shared if its address is constant. */
2238 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2239 || reload_completed || reload_in_progress)
2240 return;
2242 break;
2244 default:
2245 break;
2248 /* This rtx may not be shared. If it has already been seen,
2249 replace it with a copy of itself. */
2250 #ifdef ENABLE_CHECKING
2251 if (RTX_FLAG (x, used))
2253 error ("Invalid rtl sharing found in the insn");
2254 debug_rtx (insn);
2255 error ("Shared rtx");
2256 debug_rtx (x);
2257 internal_error ("Internal consistency failure");
2259 #endif
2260 gcc_assert (!RTX_FLAG (x, used));
2262 RTX_FLAG (x, used) = 1;
2264 /* Now scan the subexpressions recursively. */
2266 format_ptr = GET_RTX_FORMAT (code);
2268 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2270 switch (*format_ptr++)
2272 case 'e':
2273 verify_rtx_sharing (XEXP (x, i), insn);
2274 break;
2276 case 'E':
2277 if (XVEC (x, i) != NULL)
2279 int j;
2280 int len = XVECLEN (x, i);
2282 for (j = 0; j < len; j++)
2284 /* We allow sharing of ASM_OPERANDS inside single
2285 instruction. */
2286 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2287 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2288 == ASM_OPERANDS))
2289 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2290 else
2291 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2294 break;
2297 return;
2300 /* Go through all the RTL insn bodies and check that there is no unexpected
2301 sharing in between the subexpressions. */
2303 void
2304 verify_rtl_sharing (void)
2306 rtx p;
2308 for (p = get_insns (); p; p = NEXT_INSN (p))
2309 if (INSN_P (p))
2311 reset_used_flags (PATTERN (p));
2312 reset_used_flags (REG_NOTES (p));
2313 reset_used_flags (LOG_LINKS (p));
2316 for (p = get_insns (); p; p = NEXT_INSN (p))
2317 if (INSN_P (p))
2319 verify_rtx_sharing (PATTERN (p), p);
2320 verify_rtx_sharing (REG_NOTES (p), p);
2321 verify_rtx_sharing (LOG_LINKS (p), p);
2325 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2326 Assumes the mark bits are cleared at entry. */
2328 void
2329 unshare_all_rtl_in_chain (rtx insn)
2331 for (; insn; insn = NEXT_INSN (insn))
2332 if (INSN_P (insn))
2334 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2335 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2336 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2340 /* Go through all virtual stack slots of a function and copy any
2341 shared structure. */
2342 static void
2343 unshare_all_decls (tree blk)
2345 tree t;
2347 /* Copy shared decls. */
2348 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2349 if (DECL_RTL_SET_P (t))
2350 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2352 /* Now process sub-blocks. */
2353 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2354 unshare_all_decls (t);
2357 /* Go through all virtual stack slots of a function and mark them as
2358 not shared. */
2359 static void
2360 reset_used_decls (tree blk)
2362 tree t;
2364 /* Mark decls. */
2365 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2366 if (DECL_RTL_SET_P (t))
2367 reset_used_flags (DECL_RTL (t));
2369 /* Now process sub-blocks. */
2370 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2371 reset_used_decls (t);
2374 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2375 placed in the result directly, rather than being copied. MAY_SHARE is
2376 either a MEM of an EXPR_LIST of MEMs. */
2379 copy_most_rtx (rtx orig, rtx may_share)
2381 rtx copy;
2382 int i, j;
2383 RTX_CODE code;
2384 const char *format_ptr;
2386 if (orig == may_share
2387 || (GET_CODE (may_share) == EXPR_LIST
2388 && in_expr_list_p (may_share, orig)))
2389 return orig;
2391 code = GET_CODE (orig);
2393 switch (code)
2395 case REG:
2396 case CONST_INT:
2397 case CONST_DOUBLE:
2398 case CONST_VECTOR:
2399 case SYMBOL_REF:
2400 case CODE_LABEL:
2401 case PC:
2402 case CC0:
2403 return orig;
2404 default:
2405 break;
2408 copy = rtx_alloc (code);
2409 PUT_MODE (copy, GET_MODE (orig));
2410 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2411 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2412 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2413 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2414 RTX_FLAG (copy, return_val) = RTX_FLAG (orig, return_val);
2416 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2418 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2420 switch (*format_ptr++)
2422 case 'e':
2423 XEXP (copy, i) = XEXP (orig, i);
2424 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2425 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2426 break;
2428 case 'u':
2429 XEXP (copy, i) = XEXP (orig, i);
2430 break;
2432 case 'E':
2433 case 'V':
2434 XVEC (copy, i) = XVEC (orig, i);
2435 if (XVEC (orig, i) != NULL)
2437 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2438 for (j = 0; j < XVECLEN (copy, i); j++)
2439 XVECEXP (copy, i, j)
2440 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2442 break;
2444 case 'w':
2445 XWINT (copy, i) = XWINT (orig, i);
2446 break;
2448 case 'n':
2449 case 'i':
2450 XINT (copy, i) = XINT (orig, i);
2451 break;
2453 case 't':
2454 XTREE (copy, i) = XTREE (orig, i);
2455 break;
2457 case 's':
2458 case 'S':
2459 XSTR (copy, i) = XSTR (orig, i);
2460 break;
2462 case '0':
2463 X0ANY (copy, i) = X0ANY (orig, i);
2464 break;
2466 default:
2467 gcc_unreachable ();
2470 return copy;
2473 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2474 Recursively does the same for subexpressions. Uses
2475 copy_rtx_if_shared_1 to reduce stack space. */
2478 copy_rtx_if_shared (rtx orig)
2480 copy_rtx_if_shared_1 (&orig);
2481 return orig;
2484 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2485 use. Recursively does the same for subexpressions. */
2487 static void
2488 copy_rtx_if_shared_1 (rtx *orig1)
2490 rtx x;
2491 int i;
2492 enum rtx_code code;
2493 rtx *last_ptr;
2494 const char *format_ptr;
2495 int copied = 0;
2496 int length;
2498 /* Repeat is used to turn tail-recursion into iteration. */
2499 repeat:
2500 x = *orig1;
2502 if (x == 0)
2503 return;
2505 code = GET_CODE (x);
2507 /* These types may be freely shared. */
2509 switch (code)
2511 case REG:
2512 case CONST_INT:
2513 case CONST_DOUBLE:
2514 case CONST_VECTOR:
2515 case SYMBOL_REF:
2516 case LABEL_REF:
2517 case CODE_LABEL:
2518 case PC:
2519 case CC0:
2520 case SCRATCH:
2521 /* SCRATCH must be shared because they represent distinct values. */
2522 return;
2523 case CLOBBER:
2524 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2525 return;
2526 break;
2528 case CONST:
2529 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2530 a LABEL_REF, it isn't sharable. */
2531 if (GET_CODE (XEXP (x, 0)) == PLUS
2532 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2533 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2534 return;
2535 break;
2537 case INSN:
2538 case JUMP_INSN:
2539 case CALL_INSN:
2540 case NOTE:
2541 case BARRIER:
2542 /* The chain of insns is not being copied. */
2543 return;
2545 default:
2546 break;
2549 /* This rtx may not be shared. If it has already been seen,
2550 replace it with a copy of itself. */
2552 if (RTX_FLAG (x, used))
2554 rtx copy;
2556 copy = rtx_alloc (code);
2557 memcpy (copy, x, RTX_SIZE (code));
2558 x = copy;
2559 copied = 1;
2561 RTX_FLAG (x, used) = 1;
2563 /* Now scan the subexpressions recursively.
2564 We can store any replaced subexpressions directly into X
2565 since we know X is not shared! Any vectors in X
2566 must be copied if X was copied. */
2568 format_ptr = GET_RTX_FORMAT (code);
2569 length = GET_RTX_LENGTH (code);
2570 last_ptr = NULL;
2572 for (i = 0; i < length; i++)
2574 switch (*format_ptr++)
2576 case 'e':
2577 if (last_ptr)
2578 copy_rtx_if_shared_1 (last_ptr);
2579 last_ptr = &XEXP (x, i);
2580 break;
2582 case 'E':
2583 if (XVEC (x, i) != NULL)
2585 int j;
2586 int len = XVECLEN (x, i);
2588 /* Copy the vector iff I copied the rtx and the length
2589 is nonzero. */
2590 if (copied && len > 0)
2591 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2593 /* Call recursively on all inside the vector. */
2594 for (j = 0; j < len; j++)
2596 if (last_ptr)
2597 copy_rtx_if_shared_1 (last_ptr);
2598 last_ptr = &XVECEXP (x, i, j);
2601 break;
2604 *orig1 = x;
2605 if (last_ptr)
2607 orig1 = last_ptr;
2608 goto repeat;
2610 return;
2613 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2614 to look for shared sub-parts. */
2616 void
2617 reset_used_flags (rtx x)
2619 int i, j;
2620 enum rtx_code code;
2621 const char *format_ptr;
2622 int length;
2624 /* Repeat is used to turn tail-recursion into iteration. */
2625 repeat:
2626 if (x == 0)
2627 return;
2629 code = GET_CODE (x);
2631 /* These types may be freely shared so we needn't do any resetting
2632 for them. */
2634 switch (code)
2636 case REG:
2637 case CONST_INT:
2638 case CONST_DOUBLE:
2639 case CONST_VECTOR:
2640 case SYMBOL_REF:
2641 case CODE_LABEL:
2642 case PC:
2643 case CC0:
2644 return;
2646 case INSN:
2647 case JUMP_INSN:
2648 case CALL_INSN:
2649 case NOTE:
2650 case LABEL_REF:
2651 case BARRIER:
2652 /* The chain of insns is not being copied. */
2653 return;
2655 default:
2656 break;
2659 RTX_FLAG (x, used) = 0;
2661 format_ptr = GET_RTX_FORMAT (code);
2662 length = GET_RTX_LENGTH (code);
2664 for (i = 0; i < length; i++)
2666 switch (*format_ptr++)
2668 case 'e':
2669 if (i == length-1)
2671 x = XEXP (x, i);
2672 goto repeat;
2674 reset_used_flags (XEXP (x, i));
2675 break;
2677 case 'E':
2678 for (j = 0; j < XVECLEN (x, i); j++)
2679 reset_used_flags (XVECEXP (x, i, j));
2680 break;
2685 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2686 to look for shared sub-parts. */
2688 void
2689 set_used_flags (rtx x)
2691 int i, j;
2692 enum rtx_code code;
2693 const char *format_ptr;
2695 if (x == 0)
2696 return;
2698 code = GET_CODE (x);
2700 /* These types may be freely shared so we needn't do any resetting
2701 for them. */
2703 switch (code)
2705 case REG:
2706 case CONST_INT:
2707 case CONST_DOUBLE:
2708 case CONST_VECTOR:
2709 case SYMBOL_REF:
2710 case CODE_LABEL:
2711 case PC:
2712 case CC0:
2713 return;
2715 case INSN:
2716 case JUMP_INSN:
2717 case CALL_INSN:
2718 case NOTE:
2719 case LABEL_REF:
2720 case BARRIER:
2721 /* The chain of insns is not being copied. */
2722 return;
2724 default:
2725 break;
2728 RTX_FLAG (x, used) = 1;
2730 format_ptr = GET_RTX_FORMAT (code);
2731 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2733 switch (*format_ptr++)
2735 case 'e':
2736 set_used_flags (XEXP (x, i));
2737 break;
2739 case 'E':
2740 for (j = 0; j < XVECLEN (x, i); j++)
2741 set_used_flags (XVECEXP (x, i, j));
2742 break;
2747 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2748 Return X or the rtx for the pseudo reg the value of X was copied into.
2749 OTHER must be valid as a SET_DEST. */
2752 make_safe_from (rtx x, rtx other)
2754 while (1)
2755 switch (GET_CODE (other))
2757 case SUBREG:
2758 other = SUBREG_REG (other);
2759 break;
2760 case STRICT_LOW_PART:
2761 case SIGN_EXTEND:
2762 case ZERO_EXTEND:
2763 other = XEXP (other, 0);
2764 break;
2765 default:
2766 goto done;
2768 done:
2769 if ((MEM_P (other)
2770 && ! CONSTANT_P (x)
2771 && !REG_P (x)
2772 && GET_CODE (x) != SUBREG)
2773 || (REG_P (other)
2774 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2775 || reg_mentioned_p (other, x))))
2777 rtx temp = gen_reg_rtx (GET_MODE (x));
2778 emit_move_insn (temp, x);
2779 return temp;
2781 return x;
2784 /* Emission of insns (adding them to the doubly-linked list). */
2786 /* Return the first insn of the current sequence or current function. */
2789 get_insns (void)
2791 return first_insn;
2794 /* Specify a new insn as the first in the chain. */
2796 void
2797 set_first_insn (rtx insn)
2799 gcc_assert (!PREV_INSN (insn));
2800 first_insn = insn;
2803 /* Return the last insn emitted in current sequence or current function. */
2806 get_last_insn (void)
2808 return last_insn;
2811 /* Specify a new insn as the last in the chain. */
2813 void
2814 set_last_insn (rtx insn)
2816 gcc_assert (!NEXT_INSN (insn));
2817 last_insn = insn;
2820 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2823 get_last_insn_anywhere (void)
2825 struct sequence_stack *stack;
2826 if (last_insn)
2827 return last_insn;
2828 for (stack = seq_stack; stack; stack = stack->next)
2829 if (stack->last != 0)
2830 return stack->last;
2831 return 0;
2834 /* Return the first nonnote insn emitted in current sequence or current
2835 function. This routine looks inside SEQUENCEs. */
2838 get_first_nonnote_insn (void)
2840 rtx insn = first_insn;
2842 while (insn)
2844 insn = next_insn (insn);
2845 if (insn == 0 || !NOTE_P (insn))
2846 break;
2849 return insn;
2852 /* Return the last nonnote insn emitted in current sequence or current
2853 function. This routine looks inside SEQUENCEs. */
2856 get_last_nonnote_insn (void)
2858 rtx insn = last_insn;
2860 while (insn)
2862 insn = previous_insn (insn);
2863 if (insn == 0 || !NOTE_P (insn))
2864 break;
2867 return insn;
2870 /* Return a number larger than any instruction's uid in this function. */
2873 get_max_uid (void)
2875 return cur_insn_uid;
2878 /* Renumber instructions so that no instruction UIDs are wasted. */
2880 void
2881 renumber_insns (FILE *stream)
2883 rtx insn;
2885 /* If we're not supposed to renumber instructions, don't. */
2886 if (!flag_renumber_insns)
2887 return;
2889 /* If there aren't that many instructions, then it's not really
2890 worth renumbering them. */
2891 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2892 return;
2894 cur_insn_uid = 1;
2896 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2898 if (stream)
2899 fprintf (stream, "Renumbering insn %d to %d\n",
2900 INSN_UID (insn), cur_insn_uid);
2901 INSN_UID (insn) = cur_insn_uid++;
2905 /* Return the next insn. If it is a SEQUENCE, return the first insn
2906 of the sequence. */
2909 next_insn (rtx insn)
2911 if (insn)
2913 insn = NEXT_INSN (insn);
2914 if (insn && NONJUMP_INSN_P (insn)
2915 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2916 insn = XVECEXP (PATTERN (insn), 0, 0);
2919 return insn;
2922 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2923 of the sequence. */
2926 previous_insn (rtx insn)
2928 if (insn)
2930 insn = PREV_INSN (insn);
2931 if (insn && NONJUMP_INSN_P (insn)
2932 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2933 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2936 return insn;
2939 /* Return the next insn after INSN that is not a NOTE. This routine does not
2940 look inside SEQUENCEs. */
2943 next_nonnote_insn (rtx insn)
2945 while (insn)
2947 insn = NEXT_INSN (insn);
2948 if (insn == 0 || !NOTE_P (insn))
2949 break;
2952 return insn;
2955 /* Return the previous insn before INSN that is not a NOTE. This routine does
2956 not look inside SEQUENCEs. */
2959 prev_nonnote_insn (rtx insn)
2961 while (insn)
2963 insn = PREV_INSN (insn);
2964 if (insn == 0 || !NOTE_P (insn))
2965 break;
2968 return insn;
2971 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2972 or 0, if there is none. This routine does not look inside
2973 SEQUENCEs. */
2976 next_real_insn (rtx insn)
2978 while (insn)
2980 insn = NEXT_INSN (insn);
2981 if (insn == 0 || INSN_P (insn))
2982 break;
2985 return insn;
2988 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2989 or 0, if there is none. This routine does not look inside
2990 SEQUENCEs. */
2993 prev_real_insn (rtx insn)
2995 while (insn)
2997 insn = PREV_INSN (insn);
2998 if (insn == 0 || INSN_P (insn))
2999 break;
3002 return insn;
3005 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3006 This routine does not look inside SEQUENCEs. */
3009 last_call_insn (void)
3011 rtx insn;
3013 for (insn = get_last_insn ();
3014 insn && !CALL_P (insn);
3015 insn = PREV_INSN (insn))
3018 return insn;
3021 /* Find the next insn after INSN that really does something. This routine
3022 does not look inside SEQUENCEs. Until reload has completed, this is the
3023 same as next_real_insn. */
3026 active_insn_p (rtx insn)
3028 return (CALL_P (insn) || JUMP_P (insn)
3029 || (NONJUMP_INSN_P (insn)
3030 && (! reload_completed
3031 || (GET_CODE (PATTERN (insn)) != USE
3032 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3036 next_active_insn (rtx insn)
3038 while (insn)
3040 insn = NEXT_INSN (insn);
3041 if (insn == 0 || active_insn_p (insn))
3042 break;
3045 return insn;
3048 /* Find the last insn before INSN that really does something. This routine
3049 does not look inside SEQUENCEs. Until reload has completed, this is the
3050 same as prev_real_insn. */
3053 prev_active_insn (rtx insn)
3055 while (insn)
3057 insn = PREV_INSN (insn);
3058 if (insn == 0 || active_insn_p (insn))
3059 break;
3062 return insn;
3065 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3068 next_label (rtx insn)
3070 while (insn)
3072 insn = NEXT_INSN (insn);
3073 if (insn == 0 || LABEL_P (insn))
3074 break;
3077 return insn;
3080 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3083 prev_label (rtx insn)
3085 while (insn)
3087 insn = PREV_INSN (insn);
3088 if (insn == 0 || LABEL_P (insn))
3089 break;
3092 return insn;
3095 /* Return the last label to mark the same position as LABEL. Return null
3096 if LABEL itself is null. */
3099 skip_consecutive_labels (rtx label)
3101 rtx insn;
3103 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3104 if (LABEL_P (insn))
3105 label = insn;
3107 return label;
3110 #ifdef HAVE_cc0
3111 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3112 and REG_CC_USER notes so we can find it. */
3114 void
3115 link_cc0_insns (rtx insn)
3117 rtx user = next_nonnote_insn (insn);
3119 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3120 user = XVECEXP (PATTERN (user), 0, 0);
3122 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3123 REG_NOTES (user));
3124 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3127 /* Return the next insn that uses CC0 after INSN, which is assumed to
3128 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3129 applied to the result of this function should yield INSN).
3131 Normally, this is simply the next insn. However, if a REG_CC_USER note
3132 is present, it contains the insn that uses CC0.
3134 Return 0 if we can't find the insn. */
3137 next_cc0_user (rtx insn)
3139 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3141 if (note)
3142 return XEXP (note, 0);
3144 insn = next_nonnote_insn (insn);
3145 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3146 insn = XVECEXP (PATTERN (insn), 0, 0);
3148 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3149 return insn;
3151 return 0;
3154 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3155 note, it is the previous insn. */
3158 prev_cc0_setter (rtx insn)
3160 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3162 if (note)
3163 return XEXP (note, 0);
3165 insn = prev_nonnote_insn (insn);
3166 gcc_assert (sets_cc0_p (PATTERN (insn)));
3168 return insn;
3170 #endif
3172 /* Increment the label uses for all labels present in rtx. */
3174 static void
3175 mark_label_nuses (rtx x)
3177 enum rtx_code code;
3178 int i, j;
3179 const char *fmt;
3181 code = GET_CODE (x);
3182 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3183 LABEL_NUSES (XEXP (x, 0))++;
3185 fmt = GET_RTX_FORMAT (code);
3186 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3188 if (fmt[i] == 'e')
3189 mark_label_nuses (XEXP (x, i));
3190 else if (fmt[i] == 'E')
3191 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3192 mark_label_nuses (XVECEXP (x, i, j));
3197 /* Try splitting insns that can be split for better scheduling.
3198 PAT is the pattern which might split.
3199 TRIAL is the insn providing PAT.
3200 LAST is nonzero if we should return the last insn of the sequence produced.
3202 If this routine succeeds in splitting, it returns the first or last
3203 replacement insn depending on the value of LAST. Otherwise, it
3204 returns TRIAL. If the insn to be returned can be split, it will be. */
3207 try_split (rtx pat, rtx trial, int last)
3209 rtx before = PREV_INSN (trial);
3210 rtx after = NEXT_INSN (trial);
3211 int has_barrier = 0;
3212 rtx tem;
3213 rtx note, seq;
3214 int probability;
3215 rtx insn_last, insn;
3216 int njumps = 0;
3218 if (any_condjump_p (trial)
3219 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3220 split_branch_probability = INTVAL (XEXP (note, 0));
3221 probability = split_branch_probability;
3223 seq = split_insns (pat, trial);
3225 split_branch_probability = -1;
3227 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3228 We may need to handle this specially. */
3229 if (after && BARRIER_P (after))
3231 has_barrier = 1;
3232 after = NEXT_INSN (after);
3235 if (!seq)
3236 return trial;
3238 /* Avoid infinite loop if any insn of the result matches
3239 the original pattern. */
3240 insn_last = seq;
3241 while (1)
3243 if (INSN_P (insn_last)
3244 && rtx_equal_p (PATTERN (insn_last), pat))
3245 return trial;
3246 if (!NEXT_INSN (insn_last))
3247 break;
3248 insn_last = NEXT_INSN (insn_last);
3251 /* Mark labels. */
3252 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3254 if (JUMP_P (insn))
3256 mark_jump_label (PATTERN (insn), insn, 0);
3257 njumps++;
3258 if (probability != -1
3259 && any_condjump_p (insn)
3260 && !find_reg_note (insn, REG_BR_PROB, 0))
3262 /* We can preserve the REG_BR_PROB notes only if exactly
3263 one jump is created, otherwise the machine description
3264 is responsible for this step using
3265 split_branch_probability variable. */
3266 gcc_assert (njumps == 1);
3267 REG_NOTES (insn)
3268 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3269 GEN_INT (probability),
3270 REG_NOTES (insn));
3275 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3276 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3277 if (CALL_P (trial))
3279 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3280 if (CALL_P (insn))
3282 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3283 while (*p)
3284 p = &XEXP (*p, 1);
3285 *p = CALL_INSN_FUNCTION_USAGE (trial);
3286 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3290 /* Copy notes, particularly those related to the CFG. */
3291 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3293 switch (REG_NOTE_KIND (note))
3295 case REG_EH_REGION:
3296 insn = insn_last;
3297 while (insn != NULL_RTX)
3299 if (CALL_P (insn)
3300 || (flag_non_call_exceptions && INSN_P (insn)
3301 && may_trap_p (PATTERN (insn))))
3302 REG_NOTES (insn)
3303 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3304 XEXP (note, 0),
3305 REG_NOTES (insn));
3306 insn = PREV_INSN (insn);
3308 break;
3310 case REG_NORETURN:
3311 case REG_SETJMP:
3312 case REG_ALWAYS_RETURN:
3313 insn = insn_last;
3314 while (insn != NULL_RTX)
3316 if (CALL_P (insn))
3317 REG_NOTES (insn)
3318 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3319 XEXP (note, 0),
3320 REG_NOTES (insn));
3321 insn = PREV_INSN (insn);
3323 break;
3325 case REG_NON_LOCAL_GOTO:
3326 insn = insn_last;
3327 while (insn != NULL_RTX)
3329 if (JUMP_P (insn))
3330 REG_NOTES (insn)
3331 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3332 XEXP (note, 0),
3333 REG_NOTES (insn));
3334 insn = PREV_INSN (insn);
3336 break;
3338 default:
3339 break;
3343 /* If there are LABELS inside the split insns increment the
3344 usage count so we don't delete the label. */
3345 if (NONJUMP_INSN_P (trial))
3347 insn = insn_last;
3348 while (insn != NULL_RTX)
3350 if (NONJUMP_INSN_P (insn))
3351 mark_label_nuses (PATTERN (insn));
3353 insn = PREV_INSN (insn);
3357 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3359 delete_insn (trial);
3360 if (has_barrier)
3361 emit_barrier_after (tem);
3363 /* Recursively call try_split for each new insn created; by the
3364 time control returns here that insn will be fully split, so
3365 set LAST and continue from the insn after the one returned.
3366 We can't use next_active_insn here since AFTER may be a note.
3367 Ignore deleted insns, which can be occur if not optimizing. */
3368 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3369 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3370 tem = try_split (PATTERN (tem), tem, 1);
3372 /* Return either the first or the last insn, depending on which was
3373 requested. */
3374 return last
3375 ? (after ? PREV_INSN (after) : last_insn)
3376 : NEXT_INSN (before);
3379 /* Make and return an INSN rtx, initializing all its slots.
3380 Store PATTERN in the pattern slots. */
3383 make_insn_raw (rtx pattern)
3385 rtx insn;
3387 insn = rtx_alloc (INSN);
3389 INSN_UID (insn) = cur_insn_uid++;
3390 PATTERN (insn) = pattern;
3391 INSN_CODE (insn) = -1;
3392 LOG_LINKS (insn) = NULL;
3393 REG_NOTES (insn) = NULL;
3394 INSN_LOCATOR (insn) = 0;
3395 BLOCK_FOR_INSN (insn) = NULL;
3397 #ifdef ENABLE_RTL_CHECKING
3398 if (insn
3399 && INSN_P (insn)
3400 && (returnjump_p (insn)
3401 || (GET_CODE (insn) == SET
3402 && SET_DEST (insn) == pc_rtx)))
3404 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3405 debug_rtx (insn);
3407 #endif
3409 return insn;
3412 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3414 static rtx
3415 make_jump_insn_raw (rtx pattern)
3417 rtx insn;
3419 insn = rtx_alloc (JUMP_INSN);
3420 INSN_UID (insn) = cur_insn_uid++;
3422 PATTERN (insn) = pattern;
3423 INSN_CODE (insn) = -1;
3424 LOG_LINKS (insn) = NULL;
3425 REG_NOTES (insn) = NULL;
3426 JUMP_LABEL (insn) = NULL;
3427 INSN_LOCATOR (insn) = 0;
3428 BLOCK_FOR_INSN (insn) = NULL;
3430 return insn;
3433 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3435 static rtx
3436 make_call_insn_raw (rtx pattern)
3438 rtx insn;
3440 insn = rtx_alloc (CALL_INSN);
3441 INSN_UID (insn) = cur_insn_uid++;
3443 PATTERN (insn) = pattern;
3444 INSN_CODE (insn) = -1;
3445 LOG_LINKS (insn) = NULL;
3446 REG_NOTES (insn) = NULL;
3447 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3448 INSN_LOCATOR (insn) = 0;
3449 BLOCK_FOR_INSN (insn) = NULL;
3451 return insn;
3454 /* Add INSN to the end of the doubly-linked list.
3455 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3457 void
3458 add_insn (rtx insn)
3460 PREV_INSN (insn) = last_insn;
3461 NEXT_INSN (insn) = 0;
3463 if (NULL != last_insn)
3464 NEXT_INSN (last_insn) = insn;
3466 if (NULL == first_insn)
3467 first_insn = insn;
3469 last_insn = insn;
3472 /* Add INSN into the doubly-linked list after insn AFTER. This and
3473 the next should be the only functions called to insert an insn once
3474 delay slots have been filled since only they know how to update a
3475 SEQUENCE. */
3477 void
3478 add_insn_after (rtx insn, rtx after)
3480 rtx next = NEXT_INSN (after);
3481 basic_block bb;
3483 gcc_assert (!optimize || !INSN_DELETED_P (after));
3485 NEXT_INSN (insn) = next;
3486 PREV_INSN (insn) = after;
3488 if (next)
3490 PREV_INSN (next) = insn;
3491 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3492 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3494 else if (last_insn == after)
3495 last_insn = insn;
3496 else
3498 struct sequence_stack *stack = seq_stack;
3499 /* Scan all pending sequences too. */
3500 for (; stack; stack = stack->next)
3501 if (after == stack->last)
3503 stack->last = insn;
3504 break;
3507 gcc_assert (stack);
3510 if (!BARRIER_P (after)
3511 && !BARRIER_P (insn)
3512 && (bb = BLOCK_FOR_INSN (after)))
3514 set_block_for_insn (insn, bb);
3515 if (INSN_P (insn))
3516 bb->flags |= BB_DIRTY;
3517 /* Should not happen as first in the BB is always
3518 either NOTE or LABEL. */
3519 if (BB_END (bb) == after
3520 /* Avoid clobbering of structure when creating new BB. */
3521 && !BARRIER_P (insn)
3522 && (!NOTE_P (insn)
3523 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3524 BB_END (bb) = insn;
3527 NEXT_INSN (after) = insn;
3528 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3530 rtx sequence = PATTERN (after);
3531 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3535 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3536 the previous should be the only functions called to insert an insn once
3537 delay slots have been filled since only they know how to update a
3538 SEQUENCE. */
3540 void
3541 add_insn_before (rtx insn, rtx before)
3543 rtx prev = PREV_INSN (before);
3544 basic_block bb;
3546 gcc_assert (!optimize || !INSN_DELETED_P (before));
3548 PREV_INSN (insn) = prev;
3549 NEXT_INSN (insn) = before;
3551 if (prev)
3553 NEXT_INSN (prev) = insn;
3554 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3556 rtx sequence = PATTERN (prev);
3557 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3560 else if (first_insn == before)
3561 first_insn = insn;
3562 else
3564 struct sequence_stack *stack = seq_stack;
3565 /* Scan all pending sequences too. */
3566 for (; stack; stack = stack->next)
3567 if (before == stack->first)
3569 stack->first = insn;
3570 break;
3573 gcc_assert (stack);
3576 if (!BARRIER_P (before)
3577 && !BARRIER_P (insn)
3578 && (bb = BLOCK_FOR_INSN (before)))
3580 set_block_for_insn (insn, bb);
3581 if (INSN_P (insn))
3582 bb->flags |= BB_DIRTY;
3583 /* Should not happen as first in the BB is always either NOTE or
3584 LABEl. */
3585 gcc_assert (BB_HEAD (bb) != insn
3586 /* Avoid clobbering of structure when creating new BB. */
3587 || BARRIER_P (insn)
3588 || (NOTE_P (insn)
3589 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_BASIC_BLOCK));
3592 PREV_INSN (before) = insn;
3593 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3594 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3597 /* Remove an insn from its doubly-linked list. This function knows how
3598 to handle sequences. */
3599 void
3600 remove_insn (rtx insn)
3602 rtx next = NEXT_INSN (insn);
3603 rtx prev = PREV_INSN (insn);
3604 basic_block bb;
3606 if (prev)
3608 NEXT_INSN (prev) = next;
3609 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3611 rtx sequence = PATTERN (prev);
3612 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3615 else if (first_insn == insn)
3616 first_insn = next;
3617 else
3619 struct sequence_stack *stack = seq_stack;
3620 /* Scan all pending sequences too. */
3621 for (; stack; stack = stack->next)
3622 if (insn == stack->first)
3624 stack->first = next;
3625 break;
3628 gcc_assert (stack);
3631 if (next)
3633 PREV_INSN (next) = prev;
3634 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3635 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3637 else if (last_insn == insn)
3638 last_insn = prev;
3639 else
3641 struct sequence_stack *stack = seq_stack;
3642 /* Scan all pending sequences too. */
3643 for (; stack; stack = stack->next)
3644 if (insn == stack->last)
3646 stack->last = prev;
3647 break;
3650 gcc_assert (stack);
3652 if (!BARRIER_P (insn)
3653 && (bb = BLOCK_FOR_INSN (insn)))
3655 if (INSN_P (insn))
3656 bb->flags |= BB_DIRTY;
3657 if (BB_HEAD (bb) == insn)
3659 /* Never ever delete the basic block note without deleting whole
3660 basic block. */
3661 gcc_assert (!NOTE_P (insn));
3662 BB_HEAD (bb) = next;
3664 if (BB_END (bb) == insn)
3665 BB_END (bb) = prev;
3669 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3671 void
3672 add_function_usage_to (rtx call_insn, rtx call_fusage)
3674 gcc_assert (call_insn && CALL_P (call_insn));
3676 /* Put the register usage information on the CALL. If there is already
3677 some usage information, put ours at the end. */
3678 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3680 rtx link;
3682 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3683 link = XEXP (link, 1))
3686 XEXP (link, 1) = call_fusage;
3688 else
3689 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3692 /* Delete all insns made since FROM.
3693 FROM becomes the new last instruction. */
3695 void
3696 delete_insns_since (rtx from)
3698 if (from == 0)
3699 first_insn = 0;
3700 else
3701 NEXT_INSN (from) = 0;
3702 last_insn = from;
3705 /* This function is deprecated, please use sequences instead.
3707 Move a consecutive bunch of insns to a different place in the chain.
3708 The insns to be moved are those between FROM and TO.
3709 They are moved to a new position after the insn AFTER.
3710 AFTER must not be FROM or TO or any insn in between.
3712 This function does not know about SEQUENCEs and hence should not be
3713 called after delay-slot filling has been done. */
3715 void
3716 reorder_insns_nobb (rtx from, rtx to, rtx after)
3718 /* Splice this bunch out of where it is now. */
3719 if (PREV_INSN (from))
3720 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3721 if (NEXT_INSN (to))
3722 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3723 if (last_insn == to)
3724 last_insn = PREV_INSN (from);
3725 if (first_insn == from)
3726 first_insn = NEXT_INSN (to);
3728 /* Make the new neighbors point to it and it to them. */
3729 if (NEXT_INSN (after))
3730 PREV_INSN (NEXT_INSN (after)) = to;
3732 NEXT_INSN (to) = NEXT_INSN (after);
3733 PREV_INSN (from) = after;
3734 NEXT_INSN (after) = from;
3735 if (after == last_insn)
3736 last_insn = to;
3739 /* Same as function above, but take care to update BB boundaries. */
3740 void
3741 reorder_insns (rtx from, rtx to, rtx after)
3743 rtx prev = PREV_INSN (from);
3744 basic_block bb, bb2;
3746 reorder_insns_nobb (from, to, after);
3748 if (!BARRIER_P (after)
3749 && (bb = BLOCK_FOR_INSN (after)))
3751 rtx x;
3752 bb->flags |= BB_DIRTY;
3754 if (!BARRIER_P (from)
3755 && (bb2 = BLOCK_FOR_INSN (from)))
3757 if (BB_END (bb2) == to)
3758 BB_END (bb2) = prev;
3759 bb2->flags |= BB_DIRTY;
3762 if (BB_END (bb) == after)
3763 BB_END (bb) = to;
3765 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3766 if (!BARRIER_P (x))
3767 set_block_for_insn (x, bb);
3771 /* Return the line note insn preceding INSN. */
3773 static rtx
3774 find_line_note (rtx insn)
3776 if (no_line_numbers)
3777 return 0;
3779 for (; insn; insn = PREV_INSN (insn))
3780 if (NOTE_P (insn)
3781 && NOTE_LINE_NUMBER (insn) >= 0)
3782 break;
3784 return insn;
3787 /* Remove unnecessary notes from the instruction stream. */
3789 void
3790 remove_unnecessary_notes (void)
3792 rtx block_stack = NULL_RTX;
3793 rtx eh_stack = NULL_RTX;
3794 rtx insn;
3795 rtx next;
3796 rtx tmp;
3798 /* We must not remove the first instruction in the function because
3799 the compiler depends on the first instruction being a note. */
3800 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3802 /* Remember what's next. */
3803 next = NEXT_INSN (insn);
3805 /* We're only interested in notes. */
3806 if (!NOTE_P (insn))
3807 continue;
3809 switch (NOTE_LINE_NUMBER (insn))
3811 case NOTE_INSN_DELETED:
3812 remove_insn (insn);
3813 break;
3815 case NOTE_INSN_EH_REGION_BEG:
3816 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3817 break;
3819 case NOTE_INSN_EH_REGION_END:
3820 /* Too many end notes. */
3821 gcc_assert (eh_stack);
3822 /* Mismatched nesting. */
3823 gcc_assert (NOTE_EH_HANDLER (XEXP (eh_stack, 0))
3824 == NOTE_EH_HANDLER (insn));
3825 tmp = eh_stack;
3826 eh_stack = XEXP (eh_stack, 1);
3827 free_INSN_LIST_node (tmp);
3828 break;
3830 case NOTE_INSN_BLOCK_BEG:
3831 /* By now, all notes indicating lexical blocks should have
3832 NOTE_BLOCK filled in. */
3833 gcc_assert (NOTE_BLOCK (insn));
3834 block_stack = alloc_INSN_LIST (insn, block_stack);
3835 break;
3837 case NOTE_INSN_BLOCK_END:
3838 /* Too many end notes. */
3839 gcc_assert (block_stack);
3840 /* Mismatched nesting. */
3841 gcc_assert (NOTE_BLOCK (XEXP (block_stack, 0)) == NOTE_BLOCK (insn));
3842 tmp = block_stack;
3843 block_stack = XEXP (block_stack, 1);
3844 free_INSN_LIST_node (tmp);
3846 /* Scan back to see if there are any non-note instructions
3847 between INSN and the beginning of this block. If not,
3848 then there is no PC range in the generated code that will
3849 actually be in this block, so there's no point in
3850 remembering the existence of the block. */
3851 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3853 /* This block contains a real instruction. Note that we
3854 don't include labels; if the only thing in the block
3855 is a label, then there are still no PC values that
3856 lie within the block. */
3857 if (INSN_P (tmp))
3858 break;
3860 /* We're only interested in NOTEs. */
3861 if (!NOTE_P (tmp))
3862 continue;
3864 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3866 /* We just verified that this BLOCK matches us with
3867 the block_stack check above. Never delete the
3868 BLOCK for the outermost scope of the function; we
3869 can refer to names from that scope even if the
3870 block notes are messed up. */
3871 if (! is_body_block (NOTE_BLOCK (insn))
3872 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3874 remove_insn (tmp);
3875 remove_insn (insn);
3877 break;
3879 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3880 /* There's a nested block. We need to leave the
3881 current block in place since otherwise the debugger
3882 wouldn't be able to show symbols from our block in
3883 the nested block. */
3884 break;
3889 /* Too many begin notes. */
3890 gcc_assert (!block_stack && !eh_stack);
3894 /* Emit insn(s) of given code and pattern
3895 at a specified place within the doubly-linked list.
3897 All of the emit_foo global entry points accept an object
3898 X which is either an insn list or a PATTERN of a single
3899 instruction.
3901 There are thus a few canonical ways to generate code and
3902 emit it at a specific place in the instruction stream. For
3903 example, consider the instruction named SPOT and the fact that
3904 we would like to emit some instructions before SPOT. We might
3905 do it like this:
3907 start_sequence ();
3908 ... emit the new instructions ...
3909 insns_head = get_insns ();
3910 end_sequence ();
3912 emit_insn_before (insns_head, SPOT);
3914 It used to be common to generate SEQUENCE rtl instead, but that
3915 is a relic of the past which no longer occurs. The reason is that
3916 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
3917 generated would almost certainly die right after it was created. */
3919 /* Make X be output before the instruction BEFORE. */
3922 emit_insn_before_noloc (rtx x, rtx before)
3924 rtx last = before;
3925 rtx insn;
3927 gcc_assert (before);
3929 if (x == NULL_RTX)
3930 return last;
3932 switch (GET_CODE (x))
3934 case INSN:
3935 case JUMP_INSN:
3936 case CALL_INSN:
3937 case CODE_LABEL:
3938 case BARRIER:
3939 case NOTE:
3940 insn = x;
3941 while (insn)
3943 rtx next = NEXT_INSN (insn);
3944 add_insn_before (insn, before);
3945 last = insn;
3946 insn = next;
3948 break;
3950 #ifdef ENABLE_RTL_CHECKING
3951 case SEQUENCE:
3952 gcc_unreachable ();
3953 break;
3954 #endif
3956 default:
3957 last = make_insn_raw (x);
3958 add_insn_before (last, before);
3959 break;
3962 return last;
3965 /* Make an instruction with body X and code JUMP_INSN
3966 and output it before the instruction BEFORE. */
3969 emit_jump_insn_before_noloc (rtx x, rtx before)
3971 rtx insn, last = NULL_RTX;
3973 gcc_assert (before);
3975 switch (GET_CODE (x))
3977 case INSN:
3978 case JUMP_INSN:
3979 case CALL_INSN:
3980 case CODE_LABEL:
3981 case BARRIER:
3982 case NOTE:
3983 insn = x;
3984 while (insn)
3986 rtx next = NEXT_INSN (insn);
3987 add_insn_before (insn, before);
3988 last = insn;
3989 insn = next;
3991 break;
3993 #ifdef ENABLE_RTL_CHECKING
3994 case SEQUENCE:
3995 gcc_unreachable ();
3996 break;
3997 #endif
3999 default:
4000 last = make_jump_insn_raw (x);
4001 add_insn_before (last, before);
4002 break;
4005 return last;
4008 /* Make an instruction with body X and code CALL_INSN
4009 and output it before the instruction BEFORE. */
4012 emit_call_insn_before_noloc (rtx x, rtx before)
4014 rtx last = NULL_RTX, insn;
4016 gcc_assert (before);
4018 switch (GET_CODE (x))
4020 case INSN:
4021 case JUMP_INSN:
4022 case CALL_INSN:
4023 case CODE_LABEL:
4024 case BARRIER:
4025 case NOTE:
4026 insn = x;
4027 while (insn)
4029 rtx next = NEXT_INSN (insn);
4030 add_insn_before (insn, before);
4031 last = insn;
4032 insn = next;
4034 break;
4036 #ifdef ENABLE_RTL_CHECKING
4037 case SEQUENCE:
4038 gcc_unreachable ();
4039 break;
4040 #endif
4042 default:
4043 last = make_call_insn_raw (x);
4044 add_insn_before (last, before);
4045 break;
4048 return last;
4051 /* Make an insn of code BARRIER
4052 and output it before the insn BEFORE. */
4055 emit_barrier_before (rtx before)
4057 rtx insn = rtx_alloc (BARRIER);
4059 INSN_UID (insn) = cur_insn_uid++;
4061 add_insn_before (insn, before);
4062 return insn;
4065 /* Emit the label LABEL before the insn BEFORE. */
4068 emit_label_before (rtx label, rtx before)
4070 /* This can be called twice for the same label as a result of the
4071 confusion that follows a syntax error! So make it harmless. */
4072 if (INSN_UID (label) == 0)
4074 INSN_UID (label) = cur_insn_uid++;
4075 add_insn_before (label, before);
4078 return label;
4081 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4084 emit_note_before (int subtype, rtx before)
4086 rtx note = rtx_alloc (NOTE);
4087 INSN_UID (note) = cur_insn_uid++;
4088 #ifndef USE_MAPPED_LOCATION
4089 NOTE_SOURCE_FILE (note) = 0;
4090 #endif
4091 NOTE_LINE_NUMBER (note) = subtype;
4092 BLOCK_FOR_INSN (note) = NULL;
4094 add_insn_before (note, before);
4095 return note;
4098 /* Helper for emit_insn_after, handles lists of instructions
4099 efficiently. */
4101 static rtx emit_insn_after_1 (rtx, rtx);
4103 static rtx
4104 emit_insn_after_1 (rtx first, rtx after)
4106 rtx last;
4107 rtx after_after;
4108 basic_block bb;
4110 if (!BARRIER_P (after)
4111 && (bb = BLOCK_FOR_INSN (after)))
4113 bb->flags |= BB_DIRTY;
4114 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4115 if (!BARRIER_P (last))
4116 set_block_for_insn (last, bb);
4117 if (!BARRIER_P (last))
4118 set_block_for_insn (last, bb);
4119 if (BB_END (bb) == after)
4120 BB_END (bb) = last;
4122 else
4123 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4124 continue;
4126 after_after = NEXT_INSN (after);
4128 NEXT_INSN (after) = first;
4129 PREV_INSN (first) = after;
4130 NEXT_INSN (last) = after_after;
4131 if (after_after)
4132 PREV_INSN (after_after) = last;
4134 if (after == last_insn)
4135 last_insn = last;
4136 return last;
4139 /* Make X be output after the insn AFTER. */
4142 emit_insn_after_noloc (rtx x, rtx after)
4144 rtx last = after;
4146 gcc_assert (after);
4148 if (x == NULL_RTX)
4149 return last;
4151 switch (GET_CODE (x))
4153 case INSN:
4154 case JUMP_INSN:
4155 case CALL_INSN:
4156 case CODE_LABEL:
4157 case BARRIER:
4158 case NOTE:
4159 last = emit_insn_after_1 (x, after);
4160 break;
4162 #ifdef ENABLE_RTL_CHECKING
4163 case SEQUENCE:
4164 gcc_unreachable ();
4165 break;
4166 #endif
4168 default:
4169 last = make_insn_raw (x);
4170 add_insn_after (last, after);
4171 break;
4174 return last;
4177 /* Similar to emit_insn_after, except that line notes are to be inserted so
4178 as to act as if this insn were at FROM. */
4180 void
4181 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4183 rtx from_line = find_line_note (from);
4184 rtx after_line = find_line_note (after);
4185 rtx insn = emit_insn_after (x, after);
4187 if (from_line)
4188 emit_note_copy_after (from_line, after);
4190 if (after_line)
4191 emit_note_copy_after (after_line, insn);
4194 /* Make an insn of code JUMP_INSN with body X
4195 and output it after the insn AFTER. */
4198 emit_jump_insn_after_noloc (rtx x, rtx after)
4200 rtx last;
4202 gcc_assert (after);
4204 switch (GET_CODE (x))
4206 case INSN:
4207 case JUMP_INSN:
4208 case CALL_INSN:
4209 case CODE_LABEL:
4210 case BARRIER:
4211 case NOTE:
4212 last = emit_insn_after_1 (x, after);
4213 break;
4215 #ifdef ENABLE_RTL_CHECKING
4216 case SEQUENCE:
4217 gcc_unreachable ();
4218 break;
4219 #endif
4221 default:
4222 last = make_jump_insn_raw (x);
4223 add_insn_after (last, after);
4224 break;
4227 return last;
4230 /* Make an instruction with body X and code CALL_INSN
4231 and output it after the instruction AFTER. */
4234 emit_call_insn_after_noloc (rtx x, rtx after)
4236 rtx last;
4238 gcc_assert (after);
4240 switch (GET_CODE (x))
4242 case INSN:
4243 case JUMP_INSN:
4244 case CALL_INSN:
4245 case CODE_LABEL:
4246 case BARRIER:
4247 case NOTE:
4248 last = emit_insn_after_1 (x, after);
4249 break;
4251 #ifdef ENABLE_RTL_CHECKING
4252 case SEQUENCE:
4253 gcc_unreachable ();
4254 break;
4255 #endif
4257 default:
4258 last = make_call_insn_raw (x);
4259 add_insn_after (last, after);
4260 break;
4263 return last;
4266 /* Make an insn of code BARRIER
4267 and output it after the insn AFTER. */
4270 emit_barrier_after (rtx after)
4272 rtx insn = rtx_alloc (BARRIER);
4274 INSN_UID (insn) = cur_insn_uid++;
4276 add_insn_after (insn, after);
4277 return insn;
4280 /* Emit the label LABEL after the insn AFTER. */
4283 emit_label_after (rtx label, rtx after)
4285 /* This can be called twice for the same label
4286 as a result of the confusion that follows a syntax error!
4287 So make it harmless. */
4288 if (INSN_UID (label) == 0)
4290 INSN_UID (label) = cur_insn_uid++;
4291 add_insn_after (label, after);
4294 return label;
4297 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4300 emit_note_after (int subtype, rtx after)
4302 rtx note = rtx_alloc (NOTE);
4303 INSN_UID (note) = cur_insn_uid++;
4304 #ifndef USE_MAPPED_LOCATION
4305 NOTE_SOURCE_FILE (note) = 0;
4306 #endif
4307 NOTE_LINE_NUMBER (note) = subtype;
4308 BLOCK_FOR_INSN (note) = NULL;
4309 add_insn_after (note, after);
4310 return note;
4313 /* Emit a copy of note ORIG after the insn AFTER. */
4316 emit_note_copy_after (rtx orig, rtx after)
4318 rtx note;
4320 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4322 cur_insn_uid++;
4323 return 0;
4326 note = rtx_alloc (NOTE);
4327 INSN_UID (note) = cur_insn_uid++;
4328 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4329 NOTE_DATA (note) = NOTE_DATA (orig);
4330 BLOCK_FOR_INSN (note) = NULL;
4331 add_insn_after (note, after);
4332 return note;
4335 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4337 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4339 rtx last = emit_insn_after_noloc (pattern, after);
4341 if (pattern == NULL_RTX || !loc)
4342 return last;
4344 after = NEXT_INSN (after);
4345 while (1)
4347 if (active_insn_p (after) && !INSN_LOCATOR (after))
4348 INSN_LOCATOR (after) = loc;
4349 if (after == last)
4350 break;
4351 after = NEXT_INSN (after);
4353 return last;
4356 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4358 emit_insn_after (rtx pattern, rtx after)
4360 if (INSN_P (after))
4361 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4362 else
4363 return emit_insn_after_noloc (pattern, after);
4366 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4368 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4370 rtx last = emit_jump_insn_after_noloc (pattern, after);
4372 if (pattern == NULL_RTX || !loc)
4373 return last;
4375 after = NEXT_INSN (after);
4376 while (1)
4378 if (active_insn_p (after) && !INSN_LOCATOR (after))
4379 INSN_LOCATOR (after) = loc;
4380 if (after == last)
4381 break;
4382 after = NEXT_INSN (after);
4384 return last;
4387 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4389 emit_jump_insn_after (rtx pattern, rtx after)
4391 if (INSN_P (after))
4392 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4393 else
4394 return emit_jump_insn_after_noloc (pattern, after);
4397 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4399 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4401 rtx last = emit_call_insn_after_noloc (pattern, after);
4403 if (pattern == NULL_RTX || !loc)
4404 return last;
4406 after = NEXT_INSN (after);
4407 while (1)
4409 if (active_insn_p (after) && !INSN_LOCATOR (after))
4410 INSN_LOCATOR (after) = loc;
4411 if (after == last)
4412 break;
4413 after = NEXT_INSN (after);
4415 return last;
4418 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4420 emit_call_insn_after (rtx pattern, rtx after)
4422 if (INSN_P (after))
4423 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4424 else
4425 return emit_call_insn_after_noloc (pattern, after);
4428 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4430 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4432 rtx first = PREV_INSN (before);
4433 rtx last = emit_insn_before_noloc (pattern, before);
4435 if (pattern == NULL_RTX || !loc)
4436 return last;
4438 first = NEXT_INSN (first);
4439 while (1)
4441 if (active_insn_p (first) && !INSN_LOCATOR (first))
4442 INSN_LOCATOR (first) = loc;
4443 if (first == last)
4444 break;
4445 first = NEXT_INSN (first);
4447 return last;
4450 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4452 emit_insn_before (rtx pattern, rtx before)
4454 if (INSN_P (before))
4455 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4456 else
4457 return emit_insn_before_noloc (pattern, before);
4460 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4462 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4464 rtx first = PREV_INSN (before);
4465 rtx last = emit_jump_insn_before_noloc (pattern, before);
4467 if (pattern == NULL_RTX)
4468 return last;
4470 first = NEXT_INSN (first);
4471 while (1)
4473 if (active_insn_p (first) && !INSN_LOCATOR (first))
4474 INSN_LOCATOR (first) = loc;
4475 if (first == last)
4476 break;
4477 first = NEXT_INSN (first);
4479 return last;
4482 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4484 emit_jump_insn_before (rtx pattern, rtx before)
4486 if (INSN_P (before))
4487 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4488 else
4489 return emit_jump_insn_before_noloc (pattern, before);
4492 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4494 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4496 rtx first = PREV_INSN (before);
4497 rtx last = emit_call_insn_before_noloc (pattern, before);
4499 if (pattern == NULL_RTX)
4500 return last;
4502 first = NEXT_INSN (first);
4503 while (1)
4505 if (active_insn_p (first) && !INSN_LOCATOR (first))
4506 INSN_LOCATOR (first) = loc;
4507 if (first == last)
4508 break;
4509 first = NEXT_INSN (first);
4511 return last;
4514 /* like emit_call_insn_before_noloc,
4515 but set insn_locator according to before. */
4517 emit_call_insn_before (rtx pattern, rtx before)
4519 if (INSN_P (before))
4520 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4521 else
4522 return emit_call_insn_before_noloc (pattern, before);
4525 /* Take X and emit it at the end of the doubly-linked
4526 INSN list.
4528 Returns the last insn emitted. */
4531 emit_insn (rtx x)
4533 rtx last = last_insn;
4534 rtx insn;
4536 if (x == NULL_RTX)
4537 return last;
4539 switch (GET_CODE (x))
4541 case INSN:
4542 case JUMP_INSN:
4543 case CALL_INSN:
4544 case CODE_LABEL:
4545 case BARRIER:
4546 case NOTE:
4547 insn = x;
4548 while (insn)
4550 rtx next = NEXT_INSN (insn);
4551 add_insn (insn);
4552 last = insn;
4553 insn = next;
4555 break;
4557 #ifdef ENABLE_RTL_CHECKING
4558 case SEQUENCE:
4559 gcc_unreachable ();
4560 break;
4561 #endif
4563 default:
4564 last = make_insn_raw (x);
4565 add_insn (last);
4566 break;
4569 return last;
4572 /* Make an insn of code JUMP_INSN with pattern X
4573 and add it to the end of the doubly-linked list. */
4576 emit_jump_insn (rtx x)
4578 rtx last = NULL_RTX, insn;
4580 switch (GET_CODE (x))
4582 case INSN:
4583 case JUMP_INSN:
4584 case CALL_INSN:
4585 case CODE_LABEL:
4586 case BARRIER:
4587 case NOTE:
4588 insn = x;
4589 while (insn)
4591 rtx next = NEXT_INSN (insn);
4592 add_insn (insn);
4593 last = insn;
4594 insn = next;
4596 break;
4598 #ifdef ENABLE_RTL_CHECKING
4599 case SEQUENCE:
4600 gcc_unreachable ();
4601 break;
4602 #endif
4604 default:
4605 last = make_jump_insn_raw (x);
4606 add_insn (last);
4607 break;
4610 return last;
4613 /* Make an insn of code CALL_INSN with pattern X
4614 and add it to the end of the doubly-linked list. */
4617 emit_call_insn (rtx x)
4619 rtx insn;
4621 switch (GET_CODE (x))
4623 case INSN:
4624 case JUMP_INSN:
4625 case CALL_INSN:
4626 case CODE_LABEL:
4627 case BARRIER:
4628 case NOTE:
4629 insn = emit_insn (x);
4630 break;
4632 #ifdef ENABLE_RTL_CHECKING
4633 case SEQUENCE:
4634 gcc_unreachable ();
4635 break;
4636 #endif
4638 default:
4639 insn = make_call_insn_raw (x);
4640 add_insn (insn);
4641 break;
4644 return insn;
4647 /* Add the label LABEL to the end of the doubly-linked list. */
4650 emit_label (rtx label)
4652 /* This can be called twice for the same label
4653 as a result of the confusion that follows a syntax error!
4654 So make it harmless. */
4655 if (INSN_UID (label) == 0)
4657 INSN_UID (label) = cur_insn_uid++;
4658 add_insn (label);
4660 return label;
4663 /* Make an insn of code BARRIER
4664 and add it to the end of the doubly-linked list. */
4667 emit_barrier (void)
4669 rtx barrier = rtx_alloc (BARRIER);
4670 INSN_UID (barrier) = cur_insn_uid++;
4671 add_insn (barrier);
4672 return barrier;
4675 /* Make line numbering NOTE insn for LOCATION add it to the end
4676 of the doubly-linked list, but only if line-numbers are desired for
4677 debugging info and it doesn't match the previous one. */
4680 emit_line_note (location_t location)
4682 rtx note;
4684 #ifdef USE_MAPPED_LOCATION
4685 if (location == last_location)
4686 return NULL_RTX;
4687 #else
4688 if (location.file && last_location.file
4689 && !strcmp (location.file, last_location.file)
4690 && location.line == last_location.line)
4691 return NULL_RTX;
4692 #endif
4693 last_location = location;
4695 if (no_line_numbers)
4697 cur_insn_uid++;
4698 return NULL_RTX;
4701 #ifdef USE_MAPPED_LOCATION
4702 note = emit_note ((int) location);
4703 #else
4704 note = emit_note (location.line);
4705 NOTE_SOURCE_FILE (note) = location.file;
4706 #endif
4708 return note;
4711 /* Emit a copy of note ORIG. */
4714 emit_note_copy (rtx orig)
4716 rtx note;
4718 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4720 cur_insn_uid++;
4721 return NULL_RTX;
4724 note = rtx_alloc (NOTE);
4726 INSN_UID (note) = cur_insn_uid++;
4727 NOTE_DATA (note) = NOTE_DATA (orig);
4728 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4729 BLOCK_FOR_INSN (note) = NULL;
4730 add_insn (note);
4732 return note;
4735 /* Make an insn of code NOTE or type NOTE_NO
4736 and add it to the end of the doubly-linked list. */
4739 emit_note (int note_no)
4741 rtx note;
4743 note = rtx_alloc (NOTE);
4744 INSN_UID (note) = cur_insn_uid++;
4745 NOTE_LINE_NUMBER (note) = note_no;
4746 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4747 BLOCK_FOR_INSN (note) = NULL;
4748 add_insn (note);
4749 return note;
4752 /* Cause next statement to emit a line note even if the line number
4753 has not changed. */
4755 void
4756 force_next_line_note (void)
4758 #ifdef USE_MAPPED_LOCATION
4759 last_location = -1;
4760 #else
4761 last_location.line = -1;
4762 #endif
4765 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4766 note of this type already exists, remove it first. */
4769 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4771 rtx note = find_reg_note (insn, kind, NULL_RTX);
4773 switch (kind)
4775 case REG_EQUAL:
4776 case REG_EQUIV:
4777 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4778 has multiple sets (some callers assume single_set
4779 means the insn only has one set, when in fact it
4780 means the insn only has one * useful * set). */
4781 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4783 gcc_assert (!note);
4784 return NULL_RTX;
4787 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4788 It serves no useful purpose and breaks eliminate_regs. */
4789 if (GET_CODE (datum) == ASM_OPERANDS)
4790 return NULL_RTX;
4791 break;
4793 default:
4794 break;
4797 if (note)
4799 XEXP (note, 0) = datum;
4800 return note;
4803 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4804 return REG_NOTES (insn);
4807 /* Return an indication of which type of insn should have X as a body.
4808 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4810 enum rtx_code
4811 classify_insn (rtx x)
4813 if (LABEL_P (x))
4814 return CODE_LABEL;
4815 if (GET_CODE (x) == CALL)
4816 return CALL_INSN;
4817 if (GET_CODE (x) == RETURN)
4818 return JUMP_INSN;
4819 if (GET_CODE (x) == SET)
4821 if (SET_DEST (x) == pc_rtx)
4822 return JUMP_INSN;
4823 else if (GET_CODE (SET_SRC (x)) == CALL)
4824 return CALL_INSN;
4825 else
4826 return INSN;
4828 if (GET_CODE (x) == PARALLEL)
4830 int j;
4831 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4832 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4833 return CALL_INSN;
4834 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4835 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4836 return JUMP_INSN;
4837 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4838 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4839 return CALL_INSN;
4841 return INSN;
4844 /* Emit the rtl pattern X as an appropriate kind of insn.
4845 If X is a label, it is simply added into the insn chain. */
4848 emit (rtx x)
4850 enum rtx_code code = classify_insn (x);
4852 switch (code)
4854 case CODE_LABEL:
4855 return emit_label (x);
4856 case INSN:
4857 return emit_insn (x);
4858 case JUMP_INSN:
4860 rtx insn = emit_jump_insn (x);
4861 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4862 return emit_barrier ();
4863 return insn;
4865 case CALL_INSN:
4866 return emit_call_insn (x);
4867 default:
4868 gcc_unreachable ();
4872 /* Space for free sequence stack entries. */
4873 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
4875 /* Begin emitting insns to a sequence. If this sequence will contain
4876 something that might cause the compiler to pop arguments to function
4877 calls (because those pops have previously been deferred; see
4878 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
4879 before calling this function. That will ensure that the deferred
4880 pops are not accidentally emitted in the middle of this sequence. */
4882 void
4883 start_sequence (void)
4885 struct sequence_stack *tem;
4887 if (free_sequence_stack != NULL)
4889 tem = free_sequence_stack;
4890 free_sequence_stack = tem->next;
4892 else
4893 tem = ggc_alloc (sizeof (struct sequence_stack));
4895 tem->next = seq_stack;
4896 tem->first = first_insn;
4897 tem->last = last_insn;
4899 seq_stack = tem;
4901 first_insn = 0;
4902 last_insn = 0;
4905 /* Set up the insn chain starting with FIRST as the current sequence,
4906 saving the previously current one. See the documentation for
4907 start_sequence for more information about how to use this function. */
4909 void
4910 push_to_sequence (rtx first)
4912 rtx last;
4914 start_sequence ();
4916 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4918 first_insn = first;
4919 last_insn = last;
4922 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4924 void
4925 push_to_full_sequence (rtx first, rtx last)
4927 start_sequence ();
4928 first_insn = first;
4929 last_insn = last;
4930 /* We really should have the end of the insn chain here. */
4931 gcc_assert (!last || !NEXT_INSN (last));
4934 /* Set up the outer-level insn chain
4935 as the current sequence, saving the previously current one. */
4937 void
4938 push_topmost_sequence (void)
4940 struct sequence_stack *stack, *top = NULL;
4942 start_sequence ();
4944 for (stack = seq_stack; stack; stack = stack->next)
4945 top = stack;
4947 first_insn = top->first;
4948 last_insn = top->last;
4951 /* After emitting to the outer-level insn chain, update the outer-level
4952 insn chain, and restore the previous saved state. */
4954 void
4955 pop_topmost_sequence (void)
4957 struct sequence_stack *stack, *top = NULL;
4959 for (stack = seq_stack; stack; stack = stack->next)
4960 top = stack;
4962 top->first = first_insn;
4963 top->last = last_insn;
4965 end_sequence ();
4968 /* After emitting to a sequence, restore previous saved state.
4970 To get the contents of the sequence just made, you must call
4971 `get_insns' *before* calling here.
4973 If the compiler might have deferred popping arguments while
4974 generating this sequence, and this sequence will not be immediately
4975 inserted into the instruction stream, use do_pending_stack_adjust
4976 before calling get_insns. That will ensure that the deferred
4977 pops are inserted into this sequence, and not into some random
4978 location in the instruction stream. See INHIBIT_DEFER_POP for more
4979 information about deferred popping of arguments. */
4981 void
4982 end_sequence (void)
4984 struct sequence_stack *tem = seq_stack;
4986 first_insn = tem->first;
4987 last_insn = tem->last;
4988 seq_stack = tem->next;
4990 memset (tem, 0, sizeof (*tem));
4991 tem->next = free_sequence_stack;
4992 free_sequence_stack = tem;
4995 /* Return 1 if currently emitting into a sequence. */
4998 in_sequence_p (void)
5000 return seq_stack != 0;
5003 /* Put the various virtual registers into REGNO_REG_RTX. */
5005 void
5006 init_virtual_regs (struct emit_status *es)
5008 rtx *ptr = es->x_regno_reg_rtx;
5009 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5010 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5011 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5012 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5013 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5017 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5018 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5019 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5020 static int copy_insn_n_scratches;
5022 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5023 copied an ASM_OPERANDS.
5024 In that case, it is the original input-operand vector. */
5025 static rtvec orig_asm_operands_vector;
5027 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5028 copied an ASM_OPERANDS.
5029 In that case, it is the copied input-operand vector. */
5030 static rtvec copy_asm_operands_vector;
5032 /* Likewise for the constraints vector. */
5033 static rtvec orig_asm_constraints_vector;
5034 static rtvec copy_asm_constraints_vector;
5036 /* Recursively create a new copy of an rtx for copy_insn.
5037 This function differs from copy_rtx in that it handles SCRATCHes and
5038 ASM_OPERANDs properly.
5039 Normally, this function is not used directly; use copy_insn as front end.
5040 However, you could first copy an insn pattern with copy_insn and then use
5041 this function afterwards to properly copy any REG_NOTEs containing
5042 SCRATCHes. */
5045 copy_insn_1 (rtx orig)
5047 rtx copy;
5048 int i, j;
5049 RTX_CODE code;
5050 const char *format_ptr;
5052 code = GET_CODE (orig);
5054 switch (code)
5056 case REG:
5057 case CONST_INT:
5058 case CONST_DOUBLE:
5059 case CONST_VECTOR:
5060 case SYMBOL_REF:
5061 case CODE_LABEL:
5062 case PC:
5063 case CC0:
5064 return orig;
5065 case CLOBBER:
5066 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5067 return orig;
5068 break;
5070 case SCRATCH:
5071 for (i = 0; i < copy_insn_n_scratches; i++)
5072 if (copy_insn_scratch_in[i] == orig)
5073 return copy_insn_scratch_out[i];
5074 break;
5076 case CONST:
5077 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5078 a LABEL_REF, it isn't sharable. */
5079 if (GET_CODE (XEXP (orig, 0)) == PLUS
5080 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5081 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5082 return orig;
5083 break;
5085 /* A MEM with a constant address is not sharable. The problem is that
5086 the constant address may need to be reloaded. If the mem is shared,
5087 then reloading one copy of this mem will cause all copies to appear
5088 to have been reloaded. */
5090 default:
5091 break;
5094 copy = rtx_alloc (code);
5096 /* Copy the various flags, and other information. We assume that
5097 all fields need copying, and then clear the fields that should
5098 not be copied. That is the sensible default behavior, and forces
5099 us to explicitly document why we are *not* copying a flag. */
5100 memcpy (copy, orig, RTX_HDR_SIZE);
5102 /* We do not copy the USED flag, which is used as a mark bit during
5103 walks over the RTL. */
5104 RTX_FLAG (copy, used) = 0;
5106 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5107 if (INSN_P (orig))
5109 RTX_FLAG (copy, jump) = 0;
5110 RTX_FLAG (copy, call) = 0;
5111 RTX_FLAG (copy, frame_related) = 0;
5114 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5116 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5118 copy->u.fld[i] = orig->u.fld[i];
5119 switch (*format_ptr++)
5121 case 'e':
5122 if (XEXP (orig, i) != NULL)
5123 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5124 break;
5126 case 'E':
5127 case 'V':
5128 if (XVEC (orig, i) == orig_asm_constraints_vector)
5129 XVEC (copy, i) = copy_asm_constraints_vector;
5130 else if (XVEC (orig, i) == orig_asm_operands_vector)
5131 XVEC (copy, i) = copy_asm_operands_vector;
5132 else if (XVEC (orig, i) != NULL)
5134 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5135 for (j = 0; j < XVECLEN (copy, i); j++)
5136 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5138 break;
5140 case 't':
5141 case 'w':
5142 case 'i':
5143 case 's':
5144 case 'S':
5145 case 'u':
5146 case '0':
5147 /* These are left unchanged. */
5148 break;
5150 default:
5151 gcc_unreachable ();
5155 if (code == SCRATCH)
5157 i = copy_insn_n_scratches++;
5158 gcc_assert (i < MAX_RECOG_OPERANDS);
5159 copy_insn_scratch_in[i] = orig;
5160 copy_insn_scratch_out[i] = copy;
5162 else if (code == ASM_OPERANDS)
5164 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5165 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5166 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5167 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5170 return copy;
5173 /* Create a new copy of an rtx.
5174 This function differs from copy_rtx in that it handles SCRATCHes and
5175 ASM_OPERANDs properly.
5176 INSN doesn't really have to be a full INSN; it could be just the
5177 pattern. */
5179 copy_insn (rtx insn)
5181 copy_insn_n_scratches = 0;
5182 orig_asm_operands_vector = 0;
5183 orig_asm_constraints_vector = 0;
5184 copy_asm_operands_vector = 0;
5185 copy_asm_constraints_vector = 0;
5186 return copy_insn_1 (insn);
5189 /* Initialize data structures and variables in this file
5190 before generating rtl for each function. */
5192 void
5193 init_emit (void)
5195 struct function *f = cfun;
5197 f->emit = ggc_alloc (sizeof (struct emit_status));
5198 first_insn = NULL;
5199 last_insn = NULL;
5200 cur_insn_uid = 1;
5201 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5202 last_location = UNKNOWN_LOCATION;
5203 first_label_num = label_num;
5204 seq_stack = NULL;
5206 /* Init the tables that describe all the pseudo regs. */
5208 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5210 f->emit->regno_pointer_align
5211 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5212 * sizeof (unsigned char));
5214 regno_reg_rtx
5215 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5217 /* Put copies of all the hard registers into regno_reg_rtx. */
5218 memcpy (regno_reg_rtx,
5219 static_regno_reg_rtx,
5220 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5222 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5223 init_virtual_regs (f->emit);
5225 /* Indicate that the virtual registers and stack locations are
5226 all pointers. */
5227 REG_POINTER (stack_pointer_rtx) = 1;
5228 REG_POINTER (frame_pointer_rtx) = 1;
5229 REG_POINTER (hard_frame_pointer_rtx) = 1;
5230 REG_POINTER (arg_pointer_rtx) = 1;
5232 REG_POINTER (virtual_incoming_args_rtx) = 1;
5233 REG_POINTER (virtual_stack_vars_rtx) = 1;
5234 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5235 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5236 REG_POINTER (virtual_cfa_rtx) = 1;
5238 #ifdef STACK_BOUNDARY
5239 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5240 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5241 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5242 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5244 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5245 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5246 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5247 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5248 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5249 #endif
5251 #ifdef INIT_EXPANDERS
5252 INIT_EXPANDERS;
5253 #endif
5256 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5258 static rtx
5259 gen_const_vector (enum machine_mode mode, int constant)
5261 rtx tem;
5262 rtvec v;
5263 int units, i;
5264 enum machine_mode inner;
5266 units = GET_MODE_NUNITS (mode);
5267 inner = GET_MODE_INNER (mode);
5269 v = rtvec_alloc (units);
5271 /* We need to call this function after we set the scalar const_tiny_rtx
5272 entries. */
5273 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5275 for (i = 0; i < units; ++i)
5276 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5278 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5279 return tem;
5282 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5283 all elements are zero, and the one vector when all elements are one. */
5285 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5287 enum machine_mode inner = GET_MODE_INNER (mode);
5288 int nunits = GET_MODE_NUNITS (mode);
5289 rtx x;
5290 int i;
5292 /* Check to see if all of the elements have the same value. */
5293 x = RTVEC_ELT (v, nunits - 1);
5294 for (i = nunits - 2; i >= 0; i--)
5295 if (RTVEC_ELT (v, i) != x)
5296 break;
5298 /* If the values are all the same, check to see if we can use one of the
5299 standard constant vectors. */
5300 if (i == -1)
5302 if (x == CONST0_RTX (inner))
5303 return CONST0_RTX (mode);
5304 else if (x == CONST1_RTX (inner))
5305 return CONST1_RTX (mode);
5308 return gen_rtx_raw_CONST_VECTOR (mode, v);
5311 /* Create some permanent unique rtl objects shared between all functions.
5312 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5314 void
5315 init_emit_once (int line_numbers)
5317 int i;
5318 enum machine_mode mode;
5319 enum machine_mode double_mode;
5321 /* We need reg_raw_mode, so initialize the modes now. */
5322 init_reg_modes_once ();
5324 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5325 tables. */
5326 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5327 const_int_htab_eq, NULL);
5329 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5330 const_double_htab_eq, NULL);
5332 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5333 mem_attrs_htab_eq, NULL);
5334 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5335 reg_attrs_htab_eq, NULL);
5337 no_line_numbers = ! line_numbers;
5339 /* Compute the word and byte modes. */
5341 byte_mode = VOIDmode;
5342 word_mode = VOIDmode;
5343 double_mode = VOIDmode;
5345 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5346 mode = GET_MODE_WIDER_MODE (mode))
5348 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5349 && byte_mode == VOIDmode)
5350 byte_mode = mode;
5352 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5353 && word_mode == VOIDmode)
5354 word_mode = mode;
5357 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5358 mode = GET_MODE_WIDER_MODE (mode))
5360 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5361 && double_mode == VOIDmode)
5362 double_mode = mode;
5365 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5367 /* Assign register numbers to the globally defined register rtx.
5368 This must be done at runtime because the register number field
5369 is in a union and some compilers can't initialize unions. */
5371 pc_rtx = gen_rtx_PC (VOIDmode);
5372 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5373 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5374 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5375 if (hard_frame_pointer_rtx == 0)
5376 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5377 HARD_FRAME_POINTER_REGNUM);
5378 if (arg_pointer_rtx == 0)
5379 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5380 virtual_incoming_args_rtx =
5381 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5382 virtual_stack_vars_rtx =
5383 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5384 virtual_stack_dynamic_rtx =
5385 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5386 virtual_outgoing_args_rtx =
5387 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5388 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5390 /* Initialize RTL for commonly used hard registers. These are
5391 copied into regno_reg_rtx as we begin to compile each function. */
5392 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5393 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5395 #ifdef INIT_EXPANDERS
5396 /* This is to initialize {init|mark|free}_machine_status before the first
5397 call to push_function_context_to. This is needed by the Chill front
5398 end which calls push_function_context_to before the first call to
5399 init_function_start. */
5400 INIT_EXPANDERS;
5401 #endif
5403 /* Create the unique rtx's for certain rtx codes and operand values. */
5405 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5406 tries to use these variables. */
5407 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5408 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5409 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5411 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5412 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5413 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5414 else
5415 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5417 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5418 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5419 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5420 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5421 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5422 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5423 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5425 dconsthalf = dconst1;
5426 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5428 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5430 /* Initialize mathematical constants for constant folding builtins.
5431 These constants need to be given to at least 160 bits precision. */
5432 real_from_string (&dconstpi,
5433 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5434 real_from_string (&dconste,
5435 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5437 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5439 REAL_VALUE_TYPE *r =
5440 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5442 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5443 mode = GET_MODE_WIDER_MODE (mode))
5444 const_tiny_rtx[i][(int) mode] =
5445 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5447 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5449 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5450 mode = GET_MODE_WIDER_MODE (mode))
5451 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5453 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5454 mode != VOIDmode;
5455 mode = GET_MODE_WIDER_MODE (mode))
5456 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5459 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5460 mode != VOIDmode;
5461 mode = GET_MODE_WIDER_MODE (mode))
5463 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5464 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5467 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5468 mode != VOIDmode;
5469 mode = GET_MODE_WIDER_MODE (mode))
5471 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5472 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5475 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5476 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5477 const_tiny_rtx[0][i] = const0_rtx;
5479 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5480 if (STORE_FLAG_VALUE == 1)
5481 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5483 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5484 return_address_pointer_rtx
5485 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5486 #endif
5488 #ifdef STATIC_CHAIN_REGNUM
5489 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5491 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5492 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5493 static_chain_incoming_rtx
5494 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5495 else
5496 #endif
5497 static_chain_incoming_rtx = static_chain_rtx;
5498 #endif
5500 #ifdef STATIC_CHAIN
5501 static_chain_rtx = STATIC_CHAIN;
5503 #ifdef STATIC_CHAIN_INCOMING
5504 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5505 #else
5506 static_chain_incoming_rtx = static_chain_rtx;
5507 #endif
5508 #endif
5510 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5511 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5514 /* Produce exact duplicate of insn INSN after AFTER.
5515 Care updating of libcall regions if present. */
5518 emit_copy_of_insn_after (rtx insn, rtx after)
5520 rtx new;
5521 rtx note1, note2, link;
5523 switch (GET_CODE (insn))
5525 case INSN:
5526 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5527 break;
5529 case JUMP_INSN:
5530 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5531 break;
5533 case CALL_INSN:
5534 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5535 if (CALL_INSN_FUNCTION_USAGE (insn))
5536 CALL_INSN_FUNCTION_USAGE (new)
5537 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5538 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5539 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5540 break;
5542 default:
5543 gcc_unreachable ();
5546 /* Update LABEL_NUSES. */
5547 mark_jump_label (PATTERN (new), new, 0);
5549 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5551 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5552 make them. */
5553 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5554 if (REG_NOTE_KIND (link) != REG_LABEL)
5556 if (GET_CODE (link) == EXPR_LIST)
5557 REG_NOTES (new)
5558 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5559 XEXP (link, 0),
5560 REG_NOTES (new)));
5561 else
5562 REG_NOTES (new)
5563 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5564 XEXP (link, 0),
5565 REG_NOTES (new)));
5568 /* Fix the libcall sequences. */
5569 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5571 rtx p = new;
5572 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5573 p = PREV_INSN (p);
5574 XEXP (note1, 0) = p;
5575 XEXP (note2, 0) = new;
5577 INSN_CODE (new) = INSN_CODE (insn);
5578 return new;
5581 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5583 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5585 if (hard_reg_clobbers[mode][regno])
5586 return hard_reg_clobbers[mode][regno];
5587 else
5588 return (hard_reg_clobbers[mode][regno] =
5589 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5592 #include "gt-emit-rtl.h"