1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation,
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
31 init_reload actually has to be called earlier anyway.
33 To scan an insn, call `find_reloads'. This does two things:
34 1. sets up tables describing which values must be reloaded
35 for this insn, and what kind of hard regs they must be reloaded into;
36 2. optionally record the locations where those values appear in
37 the data, so they can be replaced properly later.
38 This is done only if the second arg to `find_reloads' is nonzero.
40 The third arg to `find_reloads' specifies the number of levels
41 of indirect addressing supported by the machine. If it is zero,
42 indirect addressing is not valid. If it is one, (MEM (REG n))
43 is valid even if (REG n) did not get a hard register; if it is two,
44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
45 hard register, and similarly for higher values.
47 Then you must choose the hard regs to reload those pseudo regs into,
48 and generate appropriate load insns before this insn and perhaps
49 also store insns after this insn. Set up the array `reload_reg_rtx'
50 to contain the REG rtx's for the registers you used. In some
51 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
52 for certain reloads. Then that tells you which register to use,
53 so you do not need to allocate one. But you still do need to add extra
54 instructions to copy the value into and out of that register.
56 Finally you must call `subst_reloads' to substitute the reload reg rtx's
57 into the locations already recorded.
61 find_reloads can alter the operands of the instruction it is called on.
63 1. Two operands of any sort may be interchanged, if they are in a
64 commutative instruction.
65 This happens only if find_reloads thinks the instruction will compile
68 2. Pseudo-registers that are equivalent to constants are replaced
69 with those constants if they are not in hard registers.
71 1 happens every time find_reloads is called.
72 2 happens only when REPLACE is 1, which is only when
73 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
91 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
96 #include "coretypes.h"
100 #include "insn-config.h"
106 #include "addresses.h"
107 #include "hard-reg-set.h"
111 #include "function.h"
116 /* True if X is a constant that can be forced into the constant pool. */
117 #define CONST_POOL_OK_P(X) \
119 && GET_CODE (X) != HIGH \
120 && !targetm.cannot_force_const_mem (X))
122 /* True if C is a non-empty register class that has too few registers
123 to be safely used as a reload target class. */
124 #define SMALL_REGISTER_CLASS_P(C) \
125 (reg_class_size [(C)] == 1 \
126 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
129 /* All reloads of the current insn are recorded here. See reload.h for
132 struct reload rld
[MAX_RELOADS
];
134 /* All the "earlyclobber" operands of the current insn
135 are recorded here. */
137 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
139 int reload_n_operands
;
141 /* Replacing reloads.
143 If `replace_reloads' is nonzero, then as each reload is recorded
144 an entry is made for it in the table `replacements'.
145 Then later `subst_reloads' can look through that table and
146 perform all the replacements needed. */
148 /* Nonzero means record the places to replace. */
149 static int replace_reloads
;
151 /* Each replacement is recorded with a structure like this. */
154 rtx
*where
; /* Location to store in */
155 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
156 a SUBREG; 0 otherwise. */
157 int what
; /* which reload this is for */
158 enum machine_mode mode
; /* mode it must have */
161 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
163 /* Number of replacements currently recorded. */
164 static int n_replacements
;
166 /* Used to track what is modified by an operand. */
169 int reg_flag
; /* Nonzero if referencing a register. */
170 int safe
; /* Nonzero if this can't conflict with anything. */
171 rtx base
; /* Base address for MEM. */
172 HOST_WIDE_INT start
; /* Starting offset or register number. */
173 HOST_WIDE_INT end
; /* Ending offset or register number. */
176 #ifdef SECONDARY_MEMORY_NEEDED
178 /* Save MEMs needed to copy from one class of registers to another. One MEM
179 is used per mode, but normally only one or two modes are ever used.
181 We keep two versions, before and after register elimination. The one
182 after register elimination is record separately for each operand. This
183 is done in case the address is not valid to be sure that we separately
186 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
187 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
188 static int secondary_memlocs_elim_used
= 0;
191 /* The instruction we are doing reloads for;
192 so we can test whether a register dies in it. */
193 static rtx this_insn
;
195 /* Nonzero if this instruction is a user-specified asm with operands. */
196 static int this_insn_is_asm
;
198 /* If hard_regs_live_known is nonzero,
199 we can tell which hard regs are currently live,
200 at least enough to succeed in choosing dummy reloads. */
201 static int hard_regs_live_known
;
203 /* Indexed by hard reg number,
204 element is nonnegative if hard reg has been spilled.
205 This vector is passed to `find_reloads' as an argument
206 and is not changed here. */
207 static short *static_reload_reg_p
;
209 /* Set to 1 in subst_reg_equivs if it changes anything. */
210 static int subst_reg_equivs_changed
;
212 /* On return from push_reload, holds the reload-number for the OUT
213 operand, which can be different for that from the input operand. */
214 static int output_reloadnum
;
216 /* Compare two RTX's. */
217 #define MATCHES(x, y) \
218 (x == y || (x != 0 && (REG_P (x) \
219 ? REG_P (y) && REGNO (x) == REGNO (y) \
220 : rtx_equal_p (x, y) && ! side_effects_p (x))))
222 /* Indicates if two reloads purposes are for similar enough things that we
223 can merge their reloads. */
224 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
225 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
226 || ((when1) == (when2) && (op1) == (op2)) \
227 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
228 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
230 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
231 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
233 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
234 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
235 ((when1) != (when2) \
236 || ! ((op1) == (op2) \
237 || (when1) == RELOAD_FOR_INPUT \
238 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
239 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
241 /* If we are going to reload an address, compute the reload type to
243 #define ADDR_TYPE(type) \
244 ((type) == RELOAD_FOR_INPUT_ADDRESS \
245 ? RELOAD_FOR_INPADDR_ADDRESS \
246 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
247 ? RELOAD_FOR_OUTADDR_ADDRESS \
250 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
251 enum machine_mode
, enum reload_type
,
252 enum insn_code
*, secondary_reload_info
*);
253 static enum reg_class
find_valid_class (enum machine_mode
, enum machine_mode
,
255 static int reload_inner_reg_of_subreg (rtx
, enum machine_mode
, int);
256 static void push_replacement (rtx
*, int, enum machine_mode
);
257 static void dup_replacements (rtx
*, rtx
*);
258 static void combine_reloads (void);
259 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
260 enum reload_type
, int, int);
261 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, enum machine_mode
,
262 enum machine_mode
, enum reg_class
, int, int);
263 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
264 static struct decomposition
decompose (rtx
);
265 static int immune_p (rtx
, rtx
, struct decomposition
);
266 static int alternative_allows_memconst (const char *, int);
267 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int, rtx
,
269 static rtx
make_memloc (rtx
, int);
270 static int maybe_memory_address_p (enum machine_mode
, rtx
, rtx
*);
271 static int find_reloads_address (enum machine_mode
, rtx
*, rtx
, rtx
*,
272 int, enum reload_type
, int, rtx
);
273 static rtx
subst_reg_equivs (rtx
, rtx
);
274 static rtx
subst_indexed_address (rtx
);
275 static void update_auto_inc_notes (rtx
, int, int);
276 static int find_reloads_address_1 (enum machine_mode
, rtx
, int,
277 enum rtx_code
, enum rtx_code
, rtx
*,
278 int, enum reload_type
,int, rtx
);
279 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
280 enum machine_mode
, int,
281 enum reload_type
, int);
282 static rtx
find_reloads_subreg_address (rtx
, int, int, enum reload_type
,
284 static void copy_replacements_1 (rtx
*, rtx
*, int);
285 static int find_inc_amount (rtx
, rtx
);
286 static int refers_to_mem_for_reload_p (rtx
);
287 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
290 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
294 push_reg_equiv_alt_mem (int regno
, rtx mem
)
298 for (it
= reg_equiv_alt_mem_list
[regno
]; it
; it
= XEXP (it
, 1))
299 if (rtx_equal_p (XEXP (it
, 0), mem
))
302 reg_equiv_alt_mem_list
[regno
]
303 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
304 reg_equiv_alt_mem_list
[regno
]);
307 /* Determine if any secondary reloads are needed for loading (if IN_P is
308 nonzero) or storing (if IN_P is zero) X to or from a reload register of
309 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
310 are needed, push them.
312 Return the reload number of the secondary reload we made, or -1 if
313 we didn't need one. *PICODE is set to the insn_code to use if we do
314 need a secondary reload. */
317 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
318 enum reg_class reload_class
,
319 enum machine_mode reload_mode
, enum reload_type type
,
320 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
322 enum reg_class
class = NO_REGS
;
323 enum reg_class scratch_class
;
324 enum machine_mode mode
= reload_mode
;
325 enum insn_code icode
= CODE_FOR_nothing
;
326 enum insn_code t_icode
= CODE_FOR_nothing
;
327 enum reload_type secondary_type
;
328 int s_reload
, t_reload
= -1;
329 const char *scratch_constraint
;
331 secondary_reload_info sri
;
333 if (type
== RELOAD_FOR_INPUT_ADDRESS
334 || type
== RELOAD_FOR_OUTPUT_ADDRESS
335 || type
== RELOAD_FOR_INPADDR_ADDRESS
336 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
337 secondary_type
= type
;
339 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
341 *picode
= CODE_FOR_nothing
;
343 /* If X is a paradoxical SUBREG, use the inner value to determine both the
344 mode and object being reloaded. */
345 if (GET_CODE (x
) == SUBREG
346 && (GET_MODE_SIZE (GET_MODE (x
))
347 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
350 reload_mode
= GET_MODE (x
);
353 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
354 is still a pseudo-register by now, it *must* have an equivalent MEM
355 but we don't want to assume that), use that equivalent when seeing if
356 a secondary reload is needed since whether or not a reload is needed
357 might be sensitive to the form of the MEM. */
359 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
360 && reg_equiv_mem
[REGNO (x
)] != 0)
361 x
= reg_equiv_mem
[REGNO (x
)];
363 sri
.icode
= CODE_FOR_nothing
;
364 sri
.prev_sri
= prev_sri
;
365 class = targetm
.secondary_reload (in_p
, x
, reload_class
, reload_mode
, &sri
);
368 /* If we don't need any secondary registers, done. */
369 if (class == NO_REGS
&& icode
== CODE_FOR_nothing
)
372 if (class != NO_REGS
)
373 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, class,
374 reload_mode
, type
, &t_icode
, &sri
);
376 /* If we will be using an insn, the secondary reload is for a
379 if (icode
!= CODE_FOR_nothing
)
381 /* If IN_P is nonzero, the reload register will be the output in
382 operand 0. If IN_P is zero, the reload register will be the input
383 in operand 1. Outputs should have an initial "=", which we must
386 /* ??? It would be useful to be able to handle only two, or more than
387 three, operands, but for now we can only handle the case of having
388 exactly three: output, input and one temp/scratch. */
389 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
391 /* ??? We currently have no way to represent a reload that needs
392 an icode to reload from an intermediate tertiary reload register.
393 We should probably have a new field in struct reload to tag a
394 chain of scratch operand reloads onto. */
395 gcc_assert (class == NO_REGS
);
397 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
398 gcc_assert (*scratch_constraint
== '=');
399 scratch_constraint
++;
400 if (*scratch_constraint
== '&')
401 scratch_constraint
++;
402 letter
= *scratch_constraint
;
403 scratch_class
= (letter
== 'r' ? GENERAL_REGS
404 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter
,
405 scratch_constraint
));
407 class = scratch_class
;
408 mode
= insn_data
[(int) icode
].operand
[2].mode
;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 gcc_assert (!in_p
|| class != reload_class
|| icode
!= CODE_FOR_nothing
426 || t_icode
!= CODE_FOR_nothing
);
428 /* See if we can reuse an existing secondary reload. */
429 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
430 if (rld
[s_reload
].secondary_p
431 && (reg_class_subset_p (class, rld
[s_reload
].class)
432 || reg_class_subset_p (rld
[s_reload
].class, class))
433 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
434 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
435 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
436 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
437 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
438 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
439 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES
)
440 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
441 opnum
, rld
[s_reload
].opnum
))
444 rld
[s_reload
].inmode
= mode
;
446 rld
[s_reload
].outmode
= mode
;
448 if (reg_class_subset_p (class, rld
[s_reload
].class))
449 rld
[s_reload
].class = class;
451 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
452 rld
[s_reload
].optional
&= optional
;
453 rld
[s_reload
].secondary_p
= 1;
454 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
455 opnum
, rld
[s_reload
].opnum
))
456 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
459 if (s_reload
== n_reloads
)
461 #ifdef SECONDARY_MEMORY_NEEDED
462 /* If we need a memory location to copy between the two reload regs,
463 set it up now. Note that we do the input case before making
464 the reload and the output case after. This is due to the
465 way reloads are output. */
467 if (in_p
&& icode
== CODE_FOR_nothing
468 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
470 get_secondary_mem (x
, reload_mode
, opnum
, type
);
472 /* We may have just added new reloads. Make sure we add
473 the new reload at the end. */
474 s_reload
= n_reloads
;
478 /* We need to make a new secondary reload for this register class. */
479 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
480 rld
[s_reload
].class = class;
482 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
483 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
484 rld
[s_reload
].reg_rtx
= 0;
485 rld
[s_reload
].optional
= optional
;
486 rld
[s_reload
].inc
= 0;
487 /* Maybe we could combine these, but it seems too tricky. */
488 rld
[s_reload
].nocombine
= 1;
489 rld
[s_reload
].in_reg
= 0;
490 rld
[s_reload
].out_reg
= 0;
491 rld
[s_reload
].opnum
= opnum
;
492 rld
[s_reload
].when_needed
= secondary_type
;
493 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
494 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
495 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
496 rld
[s_reload
].secondary_out_icode
497 = ! in_p
? t_icode
: CODE_FOR_nothing
;
498 rld
[s_reload
].secondary_p
= 1;
502 #ifdef SECONDARY_MEMORY_NEEDED
503 if (! in_p
&& icode
== CODE_FOR_nothing
504 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
505 get_secondary_mem (x
, mode
, opnum
, type
);
513 /* If a secondary reload is needed, return its class. If both an intermediate
514 register and a scratch register is needed, we return the class of the
515 intermediate register. */
517 secondary_reload_class (bool in_p
, enum reg_class
class,
518 enum machine_mode mode
, rtx x
)
520 enum insn_code icode
;
521 secondary_reload_info sri
;
523 sri
.icode
= CODE_FOR_nothing
;
525 class = targetm
.secondary_reload (in_p
, x
, class, mode
, &sri
);
528 /* If there are no secondary reloads at all, we return NO_REGS.
529 If an intermediate register is needed, we return its class. */
530 if (icode
== CODE_FOR_nothing
|| class != NO_REGS
)
533 /* No intermediate register is needed, but we have a special reload
534 pattern, which we assume for now needs a scratch register. */
535 return scratch_reload_class (icode
);
538 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
539 three operands, verify that operand 2 is an output operand, and return
541 ??? We'd like to be able to handle any pattern with at least 2 operands,
542 for zero or more scratch registers, but that needs more infrastructure. */
544 scratch_reload_class (enum insn_code icode
)
546 const char *scratch_constraint
;
548 enum reg_class
class;
550 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
551 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
552 gcc_assert (*scratch_constraint
== '=');
553 scratch_constraint
++;
554 if (*scratch_constraint
== '&')
555 scratch_constraint
++;
556 scratch_letter
= *scratch_constraint
;
557 if (scratch_letter
== 'r')
559 class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter
,
561 gcc_assert (class != NO_REGS
);
565 #ifdef SECONDARY_MEMORY_NEEDED
567 /* Return a memory location that will be used to copy X in mode MODE.
568 If we haven't already made a location for this mode in this insn,
569 call find_reloads_address on the location being returned. */
572 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, enum machine_mode mode
,
573 int opnum
, enum reload_type type
)
578 /* By default, if MODE is narrower than a word, widen it to a word.
579 This is required because most machines that require these memory
580 locations do not support short load and stores from all registers
581 (e.g., FP registers). */
583 #ifdef SECONDARY_MEMORY_NEEDED_MODE
584 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
586 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
587 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
590 /* If we already have made a MEM for this operand in MODE, return it. */
591 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
592 return secondary_memlocs_elim
[(int) mode
][opnum
];
594 /* If this is the first time we've tried to get a MEM for this mode,
595 allocate a new one. `something_changed' in reload will get set
596 by noticing that the frame size has changed. */
598 if (secondary_memlocs
[(int) mode
] == 0)
600 #ifdef SECONDARY_MEMORY_NEEDED_RTX
601 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
603 secondary_memlocs
[(int) mode
]
604 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
608 /* Get a version of the address doing any eliminations needed. If that
609 didn't give us a new MEM, make a new one if it isn't valid. */
611 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
612 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
614 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
615 loc
= copy_rtx (loc
);
617 /* The only time the call below will do anything is if the stack
618 offset is too large. In that case IND_LEVELS doesn't matter, so we
619 can just pass a zero. Adjust the type to be the address of the
620 corresponding object. If the address was valid, save the eliminated
621 address. If it wasn't valid, we need to make a reload each time, so
626 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
627 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
630 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
634 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
635 if (secondary_memlocs_elim_used
<= (int)mode
)
636 secondary_memlocs_elim_used
= (int)mode
+ 1;
640 /* Clear any secondary memory locations we've made. */
643 clear_secondary_mem (void)
645 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
647 #endif /* SECONDARY_MEMORY_NEEDED */
650 /* Find the largest class which has at least one register valid in
651 mode INNER, and which for every such register, that register number
652 plus N is also valid in OUTER (if in range) and is cheap to move
653 into REGNO. Such a class must exist. */
655 static enum reg_class
656 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED
,
657 enum machine_mode inner ATTRIBUTE_UNUSED
, int n
,
658 unsigned int dest_regno ATTRIBUTE_UNUSED
)
663 enum reg_class best_class
= NO_REGS
;
664 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
665 unsigned int best_size
= 0;
668 for (class = 1; class < N_REG_CLASSES
; class++)
672 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
673 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
))
675 if (HARD_REGNO_MODE_OK (regno
, inner
))
678 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
679 || ! HARD_REGNO_MODE_OK (regno
+ n
, outer
))
686 cost
= REGISTER_MOVE_COST (outer
, class, dest_class
);
688 if ((reg_class_size
[class] > best_size
689 && (best_cost
< 0 || best_cost
>= cost
))
693 best_size
= reg_class_size
[class];
694 best_cost
= REGISTER_MOVE_COST (outer
, class, dest_class
);
698 gcc_assert (best_size
!= 0);
703 /* Return the number of a previously made reload that can be combined with
704 a new one, or n_reloads if none of the existing reloads can be used.
705 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
706 push_reload, they determine the kind of the new reload that we try to
707 combine. P_IN points to the corresponding value of IN, which can be
708 modified by this function.
709 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
712 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class
class,
713 enum reload_type type
, int opnum
, int dont_share
)
717 /* We can't merge two reloads if the output of either one is
720 if (earlyclobber_operand_p (out
))
723 /* We can use an existing reload if the class is right
724 and at least one of IN and OUT is a match
725 and the other is at worst neutral.
726 (A zero compared against anything is neutral.)
728 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
729 for the same thing since that can cause us to need more reload registers
730 than we otherwise would. */
732 for (i
= 0; i
< n_reloads
; i
++)
733 if ((reg_class_subset_p (class, rld
[i
].class)
734 || reg_class_subset_p (rld
[i
].class, class))
735 /* If the existing reload has a register, it must fit our class. */
736 && (rld
[i
].reg_rtx
== 0
737 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
738 true_regnum (rld
[i
].reg_rtx
)))
739 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
740 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
741 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
742 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
743 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
744 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES
)
745 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
748 /* Reloading a plain reg for input can match a reload to postincrement
749 that reg, since the postincrement's value is the right value.
750 Likewise, it can match a preincrement reload, since we regard
751 the preincrementation as happening before any ref in this insn
753 for (i
= 0; i
< n_reloads
; i
++)
754 if ((reg_class_subset_p (class, rld
[i
].class)
755 || reg_class_subset_p (rld
[i
].class, class))
756 /* If the existing reload has a register, it must fit our
758 && (rld
[i
].reg_rtx
== 0
759 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
760 true_regnum (rld
[i
].reg_rtx
)))
761 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
763 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
764 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
765 || (REG_P (rld
[i
].in
)
766 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
767 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
768 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
769 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES
)
770 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
771 opnum
, rld
[i
].opnum
))
773 /* Make sure reload_in ultimately has the increment,
774 not the plain register. */
782 /* Return nonzero if X is a SUBREG which will require reloading of its
783 SUBREG_REG expression. */
786 reload_inner_reg_of_subreg (rtx x
, enum machine_mode mode
, int output
)
790 /* Only SUBREGs are problematical. */
791 if (GET_CODE (x
) != SUBREG
)
794 inner
= SUBREG_REG (x
);
796 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
797 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
800 /* If INNER is not a hard register, then INNER will not need to
803 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
806 /* If INNER is not ok for MODE, then INNER will need reloading. */
807 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
810 /* If the outer part is a word or smaller, INNER larger than a
811 word and the number of regs for INNER is not the same as the
812 number of words in INNER, then INNER will need reloading. */
813 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
815 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
816 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
817 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
820 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
821 requiring an extra reload register. The caller has already found that
822 IN contains some reference to REGNO, so check that we can produce the
823 new value in a single step. E.g. if we have
824 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
825 instruction that adds one to a register, this should succeed.
826 However, if we have something like
827 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
828 needs to be loaded into a register first, we need a separate reload
830 Such PLUS reloads are generated by find_reload_address_part.
831 The out-of-range PLUS expressions are usually introduced in the instruction
832 patterns by register elimination and substituting pseudos without a home
833 by their function-invariant equivalences. */
835 can_reload_into (rtx in
, int regno
, enum machine_mode mode
)
839 struct recog_data save_recog_data
;
841 /* For matching constraints, we often get notional input reloads where
842 we want to use the original register as the reload register. I.e.
843 technically this is a non-optional input-output reload, but IN is
844 already a valid register, and has been chosen as the reload register.
845 Speed this up, since it trivially works. */
849 /* To test MEMs properly, we'd have to take into account all the reloads
850 that are already scheduled, which can become quite complicated.
851 And since we've already handled address reloads for this MEM, it
852 should always succeed anyway. */
856 /* If we can make a simple SET insn that does the job, everything should
858 dst
= gen_rtx_REG (mode
, regno
);
859 test_insn
= make_insn_raw (gen_rtx_SET (VOIDmode
, dst
, in
));
860 save_recog_data
= recog_data
;
861 if (recog_memoized (test_insn
) >= 0)
863 extract_insn (test_insn
);
864 r
= constrain_operands (1);
866 recog_data
= save_recog_data
;
870 /* Record one reload that needs to be performed.
871 IN is an rtx saying where the data are to be found before this instruction.
872 OUT says where they must be stored after the instruction.
873 (IN is zero for data not read, and OUT is zero for data not written.)
874 INLOC and OUTLOC point to the places in the instructions where
875 IN and OUT were found.
876 If IN and OUT are both nonzero, it means the same register must be used
877 to reload both IN and OUT.
879 CLASS is a register class required for the reloaded data.
880 INMODE is the machine mode that the instruction requires
881 for the reg that replaces IN and OUTMODE is likewise for OUT.
883 If IN is zero, then OUT's location and mode should be passed as
886 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
888 OPTIONAL nonzero means this reload does not need to be performed:
889 it can be discarded if that is more convenient.
891 OPNUM and TYPE say what the purpose of this reload is.
893 The return value is the reload-number for this reload.
895 If both IN and OUT are nonzero, in some rare cases we might
896 want to make two separate reloads. (Actually we never do this now.)
897 Therefore, the reload-number for OUT is stored in
898 output_reloadnum when we return; the return value applies to IN.
899 Usually (presently always), when IN and OUT are nonzero,
900 the two reload-numbers are equal, but the caller should be careful to
904 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
905 enum reg_class
class, enum machine_mode inmode
,
906 enum machine_mode outmode
, int strict_low
, int optional
,
907 int opnum
, enum reload_type type
)
911 int dont_remove_subreg
= 0;
912 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
913 int secondary_in_reload
= -1, secondary_out_reload
= -1;
914 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
915 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
917 /* INMODE and/or OUTMODE could be VOIDmode if no mode
918 has been specified for the operand. In that case,
919 use the operand's mode as the mode to reload. */
920 if (inmode
== VOIDmode
&& in
!= 0)
921 inmode
= GET_MODE (in
);
922 if (outmode
== VOIDmode
&& out
!= 0)
923 outmode
= GET_MODE (out
);
925 /* If IN is a pseudo register everywhere-equivalent to a constant, and
926 it is not in a hard register, reload straight from the constant,
927 since we want to get rid of such pseudo registers.
928 Often this is done earlier, but not always in find_reloads_address. */
929 if (in
!= 0 && REG_P (in
))
931 int regno
= REGNO (in
);
933 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
934 && reg_equiv_constant
[regno
] != 0)
935 in
= reg_equiv_constant
[regno
];
938 /* Likewise for OUT. Of course, OUT will never be equivalent to
939 an actual constant, but it might be equivalent to a memory location
940 (in the case of a parameter). */
941 if (out
!= 0 && REG_P (out
))
943 int regno
= REGNO (out
);
945 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
946 && reg_equiv_constant
[regno
] != 0)
947 out
= reg_equiv_constant
[regno
];
950 /* If we have a read-write operand with an address side-effect,
951 change either IN or OUT so the side-effect happens only once. */
952 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
953 switch (GET_CODE (XEXP (in
, 0)))
955 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
956 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
959 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
960 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
967 /* If we are reloading a (SUBREG constant ...), really reload just the
968 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
969 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
970 a pseudo and hence will become a MEM) with M1 wider than M2 and the
971 register is a pseudo, also reload the inside expression.
972 For machines that extend byte loads, do this for any SUBREG of a pseudo
973 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
974 M2 is an integral mode that gets extended when loaded.
975 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
976 either M1 is not valid for R or M2 is wider than a word but we only
977 need one word to store an M2-sized quantity in R.
978 (However, if OUT is nonzero, we need to reload the reg *and*
979 the subreg, so do nothing here, and let following statement handle it.)
981 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
982 we can't handle it here because CONST_INT does not indicate a mode.
984 Similarly, we must reload the inside expression if we have a
985 STRICT_LOW_PART (presumably, in == out in the cas).
987 Also reload the inner expression if it does not require a secondary
988 reload but the SUBREG does.
990 Finally, reload the inner expression if it is a register that is in
991 the class whose registers cannot be referenced in a different size
992 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
993 cannot reload just the inside since we might end up with the wrong
994 register class. But if it is inside a STRICT_LOW_PART, we have
995 no choice, so we hope we do get the right register class there. */
997 if (in
!= 0 && GET_CODE (in
) == SUBREG
998 && (subreg_lowpart_p (in
) || strict_low
)
999 #ifdef CANNOT_CHANGE_MODE_CLASS
1000 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, class)
1002 && (CONSTANT_P (SUBREG_REG (in
))
1003 || GET_CODE (SUBREG_REG (in
)) == PLUS
1005 || (((REG_P (SUBREG_REG (in
))
1006 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1007 || MEM_P (SUBREG_REG (in
)))
1008 && ((GET_MODE_SIZE (inmode
)
1009 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1010 #ifdef LOAD_EXTEND_OP
1011 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1014 && (GET_MODE_SIZE (inmode
)
1015 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1016 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
1017 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != UNKNOWN
)
1019 #ifdef WORD_REGISTER_OPERATIONS
1020 || ((GET_MODE_SIZE (inmode
)
1021 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1022 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1023 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1027 || (REG_P (SUBREG_REG (in
))
1028 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1029 /* The case where out is nonzero
1030 is handled differently in the following statement. */
1031 && (out
== 0 || subreg_lowpart_p (in
))
1032 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1033 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1035 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1037 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1038 [GET_MODE (SUBREG_REG (in
))]))
1039 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1040 || (secondary_reload_class (1, class, inmode
, in
) != NO_REGS
1041 && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in
)),
1044 #ifdef CANNOT_CHANGE_MODE_CLASS
1045 || (REG_P (SUBREG_REG (in
))
1046 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1047 && REG_CANNOT_CHANGE_MODE_P
1048 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1052 in_subreg_loc
= inloc
;
1053 inloc
= &SUBREG_REG (in
);
1055 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1057 /* This is supposed to happen only for paradoxical subregs made by
1058 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1059 gcc_assert (GET_MODE_SIZE (GET_MODE (in
)) <= GET_MODE_SIZE (inmode
));
1061 inmode
= GET_MODE (in
);
1064 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1065 either M1 is not valid for R or M2 is wider than a word but we only
1066 need one word to store an M2-sized quantity in R.
1068 However, we must reload the inner reg *as well as* the subreg in
1071 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1072 code above. This can happen if SUBREG_BYTE != 0. */
1074 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, 0))
1076 enum reg_class in_class
= class;
1078 if (REG_P (SUBREG_REG (in
)))
1080 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1081 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1082 GET_MODE (SUBREG_REG (in
)),
1085 REGNO (SUBREG_REG (in
)));
1087 /* This relies on the fact that emit_reload_insns outputs the
1088 instructions for input reloads of type RELOAD_OTHER in the same
1089 order as the reloads. Thus if the outer reload is also of type
1090 RELOAD_OTHER, we are guaranteed that this inner reload will be
1091 output before the outer reload. */
1092 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1093 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1094 dont_remove_subreg
= 1;
1097 /* Similarly for paradoxical and problematical SUBREGs on the output.
1098 Note that there is no reason we need worry about the previous value
1099 of SUBREG_REG (out); even if wider than out,
1100 storing in a subreg is entitled to clobber it all
1101 (except in the case of STRICT_LOW_PART,
1102 and in that case the constraint should label it input-output.) */
1103 if (out
!= 0 && GET_CODE (out
) == SUBREG
1104 && (subreg_lowpart_p (out
) || strict_low
)
1105 #ifdef CANNOT_CHANGE_MODE_CLASS
1106 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, class)
1108 && (CONSTANT_P (SUBREG_REG (out
))
1110 || (((REG_P (SUBREG_REG (out
))
1111 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1112 || MEM_P (SUBREG_REG (out
)))
1113 && ((GET_MODE_SIZE (outmode
)
1114 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1115 #ifdef WORD_REGISTER_OPERATIONS
1116 || ((GET_MODE_SIZE (outmode
)
1117 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1118 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1119 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1123 || (REG_P (SUBREG_REG (out
))
1124 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1125 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1126 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1128 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1130 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (out
))]
1131 [GET_MODE (SUBREG_REG (out
))]))
1132 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1133 || (secondary_reload_class (0, class, outmode
, out
) != NO_REGS
1134 && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out
)),
1137 #ifdef CANNOT_CHANGE_MODE_CLASS
1138 || (REG_P (SUBREG_REG (out
))
1139 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1140 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1141 GET_MODE (SUBREG_REG (out
)),
1146 out_subreg_loc
= outloc
;
1147 outloc
= &SUBREG_REG (out
);
1149 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1150 gcc_assert (!MEM_P (out
)
1151 || GET_MODE_SIZE (GET_MODE (out
))
1152 <= GET_MODE_SIZE (outmode
));
1154 outmode
= GET_MODE (out
);
1157 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1158 either M1 is not valid for R or M2 is wider than a word but we only
1159 need one word to store an M2-sized quantity in R.
1161 However, we must reload the inner reg *as well as* the subreg in
1162 that case. In this case, the inner reg is an in-out reload. */
1164 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, 1))
1166 /* This relies on the fact that emit_reload_insns outputs the
1167 instructions for output reloads of type RELOAD_OTHER in reverse
1168 order of the reloads. Thus if the outer reload is also of type
1169 RELOAD_OTHER, we are guaranteed that this inner reload will be
1170 output after the outer reload. */
1171 dont_remove_subreg
= 1;
1172 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1174 find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1175 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1176 GET_MODE (SUBREG_REG (out
)),
1179 REGNO (SUBREG_REG (out
))),
1180 VOIDmode
, VOIDmode
, 0, 0,
1181 opnum
, RELOAD_OTHER
);
1184 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1185 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1186 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1187 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1190 /* If IN is a SUBREG of a hard register, make a new REG. This
1191 simplifies some of the cases below. */
1193 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1194 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1195 && ! dont_remove_subreg
)
1196 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1198 /* Similarly for OUT. */
1199 if (out
!= 0 && GET_CODE (out
) == SUBREG
1200 && REG_P (SUBREG_REG (out
))
1201 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1202 && ! dont_remove_subreg
)
1203 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1205 /* Narrow down the class of register wanted if that is
1206 desirable on this machine for efficiency. */
1208 enum reg_class preferred_class
= class;
1211 preferred_class
= PREFERRED_RELOAD_CLASS (in
, class);
1213 /* Output reloads may need analogous treatment, different in detail. */
1214 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1216 preferred_class
= PREFERRED_OUTPUT_RELOAD_CLASS (out
, preferred_class
);
1219 /* Discard what the target said if we cannot do it. */
1220 if (preferred_class
!= NO_REGS
1221 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1222 class = preferred_class
;
1225 /* Make sure we use a class that can handle the actual pseudo
1226 inside any subreg. For example, on the 386, QImode regs
1227 can appear within SImode subregs. Although GENERAL_REGS
1228 can handle SImode, QImode needs a smaller class. */
1229 #ifdef LIMIT_RELOAD_CLASS
1231 class = LIMIT_RELOAD_CLASS (inmode
, class);
1232 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1233 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1236 class = LIMIT_RELOAD_CLASS (outmode
, class);
1237 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1238 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1241 /* Verify that this class is at least possible for the mode that
1243 if (this_insn_is_asm
)
1245 enum machine_mode mode
;
1246 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1250 if (mode
== VOIDmode
)
1252 error_for_asm (this_insn
, "cannot reload integer constant "
1253 "operand in %<asm%>");
1258 outmode
= word_mode
;
1260 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1261 if (HARD_REGNO_MODE_OK (i
, mode
)
1262 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1264 int nregs
= hard_regno_nregs
[i
][mode
];
1267 for (j
= 1; j
< nregs
; j
++)
1268 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1273 if (i
== FIRST_PSEUDO_REGISTER
)
1275 error_for_asm (this_insn
, "impossible register constraint "
1277 /* Avoid further trouble with this insn. */
1278 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1279 /* We used to continue here setting class to ALL_REGS, but it triggers
1280 sanity check on i386 for:
1281 void foo(long double d)
1285 Returning zero here ought to be safe as we take care in
1286 find_reloads to not process the reloads when instruction was
1293 /* Optional output reloads are always OK even if we have no register class,
1294 since the function of these reloads is only to have spill_reg_store etc.
1295 set, so that the storing insn can be deleted later. */
1296 gcc_assert (class != NO_REGS
1297 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1299 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1303 /* See if we need a secondary reload register to move between CLASS
1304 and IN or CLASS and OUT. Get the icode and push any required reloads
1305 needed for each of them if so. */
1309 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1310 &secondary_in_icode
, NULL
);
1311 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1312 secondary_out_reload
1313 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1314 type
, &secondary_out_icode
, NULL
);
1316 /* We found no existing reload suitable for re-use.
1317 So add an additional reload. */
1319 #ifdef SECONDARY_MEMORY_NEEDED
1320 /* If a memory location is needed for the copy, make one. */
1323 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1324 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
1325 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in
)),
1327 get_secondary_mem (in
, inmode
, opnum
, type
);
1333 rld
[i
].class = class;
1334 rld
[i
].inmode
= inmode
;
1335 rld
[i
].outmode
= outmode
;
1337 rld
[i
].optional
= optional
;
1339 rld
[i
].nocombine
= 0;
1340 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1341 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1342 rld
[i
].opnum
= opnum
;
1343 rld
[i
].when_needed
= type
;
1344 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1345 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1346 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1347 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1348 rld
[i
].secondary_p
= 0;
1352 #ifdef SECONDARY_MEMORY_NEEDED
1355 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1356 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1357 && SECONDARY_MEMORY_NEEDED (class,
1358 REGNO_REG_CLASS (reg_or_subregno (out
)),
1360 get_secondary_mem (out
, outmode
, opnum
, type
);
1365 /* We are reusing an existing reload,
1366 but we may have additional information for it.
1367 For example, we may now have both IN and OUT
1368 while the old one may have just one of them. */
1370 /* The modes can be different. If they are, we want to reload in
1371 the larger mode, so that the value is valid for both modes. */
1372 if (inmode
!= VOIDmode
1373 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1374 rld
[i
].inmode
= inmode
;
1375 if (outmode
!= VOIDmode
1376 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1377 rld
[i
].outmode
= outmode
;
1380 rtx in_reg
= inloc
? *inloc
: 0;
1381 /* If we merge reloads for two distinct rtl expressions that
1382 are identical in content, there might be duplicate address
1383 reloads. Remove the extra set now, so that if we later find
1384 that we can inherit this reload, we can get rid of the
1385 address reloads altogether.
1387 Do not do this if both reloads are optional since the result
1388 would be an optional reload which could potentially leave
1389 unresolved address replacements.
1391 It is not sufficient to call transfer_replacements since
1392 choose_reload_regs will remove the replacements for address
1393 reloads of inherited reloads which results in the same
1395 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1396 && ! (rld
[i
].optional
&& optional
))
1398 /* We must keep the address reload with the lower operand
1400 if (opnum
> rld
[i
].opnum
)
1402 remove_address_replacements (in
);
1404 in_reg
= rld
[i
].in_reg
;
1407 remove_address_replacements (rld
[i
].in
);
1410 rld
[i
].in_reg
= in_reg
;
1415 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1417 if (reg_class_subset_p (class, rld
[i
].class))
1418 rld
[i
].class = class;
1419 rld
[i
].optional
&= optional
;
1420 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1421 opnum
, rld
[i
].opnum
))
1422 rld
[i
].when_needed
= RELOAD_OTHER
;
1423 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1426 /* If the ostensible rtx being reloaded differs from the rtx found
1427 in the location to substitute, this reload is not safe to combine
1428 because we cannot reliably tell whether it appears in the insn. */
1430 if (in
!= 0 && in
!= *inloc
)
1431 rld
[i
].nocombine
= 1;
1434 /* This was replaced by changes in find_reloads_address_1 and the new
1435 function inc_for_reload, which go with a new meaning of reload_inc. */
1437 /* If this is an IN/OUT reload in an insn that sets the CC,
1438 it must be for an autoincrement. It doesn't work to store
1439 the incremented value after the insn because that would clobber the CC.
1440 So we must do the increment of the value reloaded from,
1441 increment it, store it back, then decrement again. */
1442 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1446 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1447 /* If we did not find a nonzero amount-to-increment-by,
1448 that contradicts the belief that IN is being incremented
1449 in an address in this insn. */
1450 gcc_assert (rld
[i
].inc
!= 0);
1454 /* If we will replace IN and OUT with the reload-reg,
1455 record where they are located so that substitution need
1456 not do a tree walk. */
1458 if (replace_reloads
)
1462 struct replacement
*r
= &replacements
[n_replacements
++];
1464 r
->subreg_loc
= in_subreg_loc
;
1468 if (outloc
!= 0 && outloc
!= inloc
)
1470 struct replacement
*r
= &replacements
[n_replacements
++];
1473 r
->subreg_loc
= out_subreg_loc
;
1478 /* If this reload is just being introduced and it has both
1479 an incoming quantity and an outgoing quantity that are
1480 supposed to be made to match, see if either one of the two
1481 can serve as the place to reload into.
1483 If one of them is acceptable, set rld[i].reg_rtx
1486 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1488 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1491 earlyclobber_operand_p (out
));
1493 /* If the outgoing register already contains the same value
1494 as the incoming one, we can dispense with loading it.
1495 The easiest way to tell the caller that is to give a phony
1496 value for the incoming operand (same as outgoing one). */
1497 if (rld
[i
].reg_rtx
== out
1498 && (REG_P (in
) || CONSTANT_P (in
))
1499 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1500 static_reload_reg_p
, i
, inmode
))
1504 /* If this is an input reload and the operand contains a register that
1505 dies in this insn and is used nowhere else, see if it is the right class
1506 to be used for this reload. Use it if so. (This occurs most commonly
1507 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1508 this if it is also an output reload that mentions the register unless
1509 the output is a SUBREG that clobbers an entire register.
1511 Note that the operand might be one of the spill regs, if it is a
1512 pseudo reg and we are in a block where spilling has not taken place.
1513 But if there is no spilling in this block, that is OK.
1514 An explicitly used hard reg cannot be a spill reg. */
1516 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1520 enum machine_mode rel_mode
= inmode
;
1522 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1525 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1526 if (REG_NOTE_KIND (note
) == REG_DEAD
1527 && REG_P (XEXP (note
, 0))
1528 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1529 && reg_mentioned_p (XEXP (note
, 0), in
)
1530 /* Check that we don't use a hardreg for an uninitialized
1531 pseudo. See also find_dummy_reload(). */
1532 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1533 || ! bitmap_bit_p (ENTRY_BLOCK_PTR
->il
.rtl
->global_live_at_end
,
1534 ORIGINAL_REGNO (XEXP (note
, 0))))
1535 && ! refers_to_regno_for_reload_p (regno
,
1537 + hard_regno_nregs
[regno
]
1539 PATTERN (this_insn
), inloc
)
1540 /* If this is also an output reload, IN cannot be used as
1541 the reload register if it is set in this insn unless IN
1543 && (out
== 0 || in
== out
1544 || ! hard_reg_set_here_p (regno
,
1546 + hard_regno_nregs
[regno
]
1548 PATTERN (this_insn
)))
1549 /* ??? Why is this code so different from the previous?
1550 Is there any simple coherent way to describe the two together?
1551 What's going on here. */
1553 || (GET_CODE (in
) == SUBREG
1554 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1556 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1557 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1558 /* Make sure the operand fits in the reg that dies. */
1559 && (GET_MODE_SIZE (rel_mode
)
1560 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1561 && HARD_REGNO_MODE_OK (regno
, inmode
)
1562 && HARD_REGNO_MODE_OK (regno
, outmode
))
1565 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1566 hard_regno_nregs
[regno
][outmode
]);
1568 for (offs
= 0; offs
< nregs
; offs
++)
1569 if (fixed_regs
[regno
+ offs
]
1570 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1575 && (! (refers_to_regno_for_reload_p
1576 (regno
, (regno
+ hard_regno_nregs
[regno
][inmode
]),
1578 || can_reload_into (in
, regno
, inmode
)))
1580 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1587 output_reloadnum
= i
;
1592 /* Record an additional place we must replace a value
1593 for which we have already recorded a reload.
1594 RELOADNUM is the value returned by push_reload
1595 when the reload was recorded.
1596 This is used in insn patterns that use match_dup. */
1599 push_replacement (rtx
*loc
, int reloadnum
, enum machine_mode mode
)
1601 if (replace_reloads
)
1603 struct replacement
*r
= &replacements
[n_replacements
++];
1604 r
->what
= reloadnum
;
1611 /* Duplicate any replacement we have recorded to apply at
1612 location ORIG_LOC to also be performed at DUP_LOC.
1613 This is used in insn patterns that use match_dup. */
1616 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1618 int i
, n
= n_replacements
;
1620 for (i
= 0; i
< n
; i
++)
1622 struct replacement
*r
= &replacements
[i
];
1623 if (r
->where
== orig_loc
)
1624 push_replacement (dup_loc
, r
->what
, r
->mode
);
1628 /* Transfer all replacements that used to be in reload FROM to be in
1632 transfer_replacements (int to
, int from
)
1636 for (i
= 0; i
< n_replacements
; i
++)
1637 if (replacements
[i
].what
== from
)
1638 replacements
[i
].what
= to
;
1641 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1642 or a subpart of it. If we have any replacements registered for IN_RTX,
1643 cancel the reloads that were supposed to load them.
1644 Return nonzero if we canceled any reloads. */
1646 remove_address_replacements (rtx in_rtx
)
1649 char reload_flags
[MAX_RELOADS
];
1650 int something_changed
= 0;
1652 memset (reload_flags
, 0, sizeof reload_flags
);
1653 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1655 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1656 reload_flags
[replacements
[i
].what
] |= 1;
1659 replacements
[j
++] = replacements
[i
];
1660 reload_flags
[replacements
[i
].what
] |= 2;
1663 /* Note that the following store must be done before the recursive calls. */
1666 for (i
= n_reloads
- 1; i
>= 0; i
--)
1668 if (reload_flags
[i
] == 1)
1670 deallocate_reload_reg (i
);
1671 remove_address_replacements (rld
[i
].in
);
1673 something_changed
= 1;
1676 return something_changed
;
1679 /* If there is only one output reload, and it is not for an earlyclobber
1680 operand, try to combine it with a (logically unrelated) input reload
1681 to reduce the number of reload registers needed.
1683 This is safe if the input reload does not appear in
1684 the value being output-reloaded, because this implies
1685 it is not needed any more once the original insn completes.
1687 If that doesn't work, see we can use any of the registers that
1688 die in this insn as a reload register. We can if it is of the right
1689 class and does not appear in the value being output-reloaded. */
1692 combine_reloads (void)
1695 int output_reload
= -1;
1696 int secondary_out
= -1;
1699 /* Find the output reload; return unless there is exactly one
1700 and that one is mandatory. */
1702 for (i
= 0; i
< n_reloads
; i
++)
1703 if (rld
[i
].out
!= 0)
1705 if (output_reload
>= 0)
1710 if (output_reload
< 0 || rld
[output_reload
].optional
)
1713 /* An input-output reload isn't combinable. */
1715 if (rld
[output_reload
].in
!= 0)
1718 /* If this reload is for an earlyclobber operand, we can't do anything. */
1719 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1722 /* If there is a reload for part of the address of this operand, we would
1723 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1724 its life to the point where doing this combine would not lower the
1725 number of spill registers needed. */
1726 for (i
= 0; i
< n_reloads
; i
++)
1727 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1728 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1729 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1732 /* Check each input reload; can we combine it? */
1734 for (i
= 0; i
< n_reloads
; i
++)
1735 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1736 /* Life span of this reload must not extend past main insn. */
1737 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1738 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1739 && rld
[i
].when_needed
!= RELOAD_OTHER
1740 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1741 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1742 rld
[output_reload
].outmode
))
1744 && rld
[i
].reg_rtx
== 0
1745 #ifdef SECONDARY_MEMORY_NEEDED
1746 /* Don't combine two reloads with different secondary
1747 memory locations. */
1748 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1749 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1750 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1751 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1753 && (SMALL_REGISTER_CLASSES
1754 ? (rld
[i
].class == rld
[output_reload
].class)
1755 : (reg_class_subset_p (rld
[i
].class,
1756 rld
[output_reload
].class)
1757 || reg_class_subset_p (rld
[output_reload
].class,
1759 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1760 /* Args reversed because the first arg seems to be
1761 the one that we imagine being modified
1762 while the second is the one that might be affected. */
1763 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1765 /* However, if the input is a register that appears inside
1766 the output, then we also can't share.
1767 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1768 If the same reload reg is used for both reg 69 and the
1769 result to be stored in memory, then that result
1770 will clobber the address of the memory ref. */
1771 && ! (REG_P (rld
[i
].in
)
1772 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1773 rld
[output_reload
].out
))))
1774 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1775 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1776 && (reg_class_size
[(int) rld
[i
].class]
1777 || SMALL_REGISTER_CLASSES
)
1778 /* We will allow making things slightly worse by combining an
1779 input and an output, but no worse than that. */
1780 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1781 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1785 /* We have found a reload to combine with! */
1786 rld
[i
].out
= rld
[output_reload
].out
;
1787 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1788 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1789 /* Mark the old output reload as inoperative. */
1790 rld
[output_reload
].out
= 0;
1791 /* The combined reload is needed for the entire insn. */
1792 rld
[i
].when_needed
= RELOAD_OTHER
;
1793 /* If the output reload had a secondary reload, copy it. */
1794 if (rld
[output_reload
].secondary_out_reload
!= -1)
1796 rld
[i
].secondary_out_reload
1797 = rld
[output_reload
].secondary_out_reload
;
1798 rld
[i
].secondary_out_icode
1799 = rld
[output_reload
].secondary_out_icode
;
1802 #ifdef SECONDARY_MEMORY_NEEDED
1803 /* Copy any secondary MEM. */
1804 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1805 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1806 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1808 /* If required, minimize the register class. */
1809 if (reg_class_subset_p (rld
[output_reload
].class,
1811 rld
[i
].class = rld
[output_reload
].class;
1813 /* Transfer all replacements from the old reload to the combined. */
1814 for (j
= 0; j
< n_replacements
; j
++)
1815 if (replacements
[j
].what
== output_reload
)
1816 replacements
[j
].what
= i
;
1821 /* If this insn has only one operand that is modified or written (assumed
1822 to be the first), it must be the one corresponding to this reload. It
1823 is safe to use anything that dies in this insn for that output provided
1824 that it does not occur in the output (we already know it isn't an
1825 earlyclobber. If this is an asm insn, give up. */
1827 if (INSN_CODE (this_insn
) == -1)
1830 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1831 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1832 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1835 /* See if some hard register that dies in this insn and is not used in
1836 the output is the right class. Only works if the register we pick
1837 up can fully hold our output reload. */
1838 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1839 if (REG_NOTE_KIND (note
) == REG_DEAD
1840 && REG_P (XEXP (note
, 0))
1841 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1842 rld
[output_reload
].out
)
1843 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1844 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1845 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1846 REGNO (XEXP (note
, 0)))
1847 && (hard_regno_nregs
[REGNO (XEXP (note
, 0))][rld
[output_reload
].outmode
]
1848 <= hard_regno_nregs
[REGNO (XEXP (note
, 0))][GET_MODE (XEXP (note
, 0))])
1849 /* Ensure that a secondary or tertiary reload for this output
1850 won't want this register. */
1851 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1852 || (! (TEST_HARD_REG_BIT
1853 (reg_class_contents
[(int) rld
[secondary_out
].class],
1854 REGNO (XEXP (note
, 0))))
1855 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1856 || ! (TEST_HARD_REG_BIT
1857 (reg_class_contents
[(int) rld
[secondary_out
].class],
1858 REGNO (XEXP (note
, 0)))))))
1859 && ! fixed_regs
[REGNO (XEXP (note
, 0))]
1860 /* Check that we don't use a hardreg for an uninitialized
1861 pseudo. See also find_dummy_reload(). */
1862 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1863 || ! bitmap_bit_p (ENTRY_BLOCK_PTR
->il
.rtl
->global_live_at_end
,
1864 ORIGINAL_REGNO (XEXP (note
, 0)))))
1866 rld
[output_reload
].reg_rtx
1867 = gen_rtx_REG (rld
[output_reload
].outmode
,
1868 REGNO (XEXP (note
, 0)));
1873 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1874 See if one of IN and OUT is a register that may be used;
1875 this is desirable since a spill-register won't be needed.
1876 If so, return the register rtx that proves acceptable.
1878 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1879 CLASS is the register class required for the reload.
1881 If FOR_REAL is >= 0, it is the number of the reload,
1882 and in some cases when it can be discovered that OUT doesn't need
1883 to be computed, clear out rld[FOR_REAL].out.
1885 If FOR_REAL is -1, this should not be done, because this call
1886 is just to see if a register can be found, not to find and install it.
1888 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1889 puts an additional constraint on being able to use IN for OUT since
1890 IN must not appear elsewhere in the insn (it is assumed that IN itself
1891 is safe from the earlyclobber). */
1894 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1895 enum machine_mode inmode
, enum machine_mode outmode
,
1896 enum reg_class
class, int for_real
, int earlyclobber
)
1904 /* If operands exceed a word, we can't use either of them
1905 unless they have the same size. */
1906 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1907 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1908 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1911 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1912 respectively refers to a hard register. */
1914 /* Find the inside of any subregs. */
1915 while (GET_CODE (out
) == SUBREG
)
1917 if (REG_P (SUBREG_REG (out
))
1918 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1919 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1920 GET_MODE (SUBREG_REG (out
)),
1923 out
= SUBREG_REG (out
);
1925 while (GET_CODE (in
) == SUBREG
)
1927 if (REG_P (SUBREG_REG (in
))
1928 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1929 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1930 GET_MODE (SUBREG_REG (in
)),
1933 in
= SUBREG_REG (in
);
1936 /* Narrow down the reg class, the same way push_reload will;
1937 otherwise we might find a dummy now, but push_reload won't. */
1939 enum reg_class preferred_class
= PREFERRED_RELOAD_CLASS (in
, class);
1940 if (preferred_class
!= NO_REGS
)
1941 class = preferred_class
;
1944 /* See if OUT will do. */
1946 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1948 unsigned int regno
= REGNO (out
) + out_offset
;
1949 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
1952 /* When we consider whether the insn uses OUT,
1953 ignore references within IN. They don't prevent us
1954 from copying IN into OUT, because those refs would
1955 move into the insn that reloads IN.
1957 However, we only ignore IN in its role as this reload.
1958 If the insn uses IN elsewhere and it contains OUT,
1959 that counts. We can't be sure it's the "same" operand
1960 so it might not go through this reload. */
1962 *inloc
= const0_rtx
;
1964 if (regno
< FIRST_PSEUDO_REGISTER
1965 && HARD_REGNO_MODE_OK (regno
, outmode
)
1966 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1967 PATTERN (this_insn
), outloc
))
1971 for (i
= 0; i
< nwords
; i
++)
1972 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1978 if (REG_P (real_out
))
1981 value
= gen_rtx_REG (outmode
, regno
);
1988 /* Consider using IN if OUT was not acceptable
1989 or if OUT dies in this insn (like the quotient in a divmod insn).
1990 We can't use IN unless it is dies in this insn,
1991 which means we must know accurately which hard regs are live.
1992 Also, the result can't go in IN if IN is used within OUT,
1993 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1994 if (hard_regs_live_known
1996 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1998 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1999 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2000 && !fixed_regs
[REGNO (in
)]
2001 && HARD_REGNO_MODE_OK (REGNO (in
),
2002 /* The only case where out and real_out might
2003 have different modes is where real_out
2004 is a subreg, and in that case, out
2006 (GET_MODE (out
) != VOIDmode
2007 ? GET_MODE (out
) : outmode
))
2008 /* But only do all this if we can be sure, that this input
2009 operand doesn't correspond with an uninitialized pseudoreg.
2010 global can assign some hardreg to it, which is the same as
2011 a different pseudo also currently live (as it can ignore the
2012 conflict). So we never must introduce writes to such hardregs,
2013 as they would clobber the other live pseudo using the same.
2014 See also PR20973. */
2015 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2016 || ! bitmap_bit_p (ENTRY_BLOCK_PTR
->il
.rtl
->global_live_at_end
,
2017 ORIGINAL_REGNO (in
))))
2019 unsigned int regno
= REGNO (in
) + in_offset
;
2020 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
2022 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2023 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2024 PATTERN (this_insn
))
2026 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2027 PATTERN (this_insn
), inloc
)))
2031 for (i
= 0; i
< nwords
; i
++)
2032 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2038 /* If we were going to use OUT as the reload reg
2039 and changed our mind, it means OUT is a dummy that
2040 dies here. So don't bother copying value to it. */
2041 if (for_real
>= 0 && value
== real_out
)
2042 rld
[for_real
].out
= 0;
2043 if (REG_P (real_in
))
2046 value
= gen_rtx_REG (inmode
, regno
);
2054 /* This page contains subroutines used mainly for determining
2055 whether the IN or an OUT of a reload can serve as the
2058 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2061 earlyclobber_operand_p (rtx x
)
2065 for (i
= 0; i
< n_earlyclobbers
; i
++)
2066 if (reload_earlyclobbers
[i
] == x
)
2072 /* Return 1 if expression X alters a hard reg in the range
2073 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2074 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2075 X should be the body of an instruction. */
2078 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2080 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2082 rtx op0
= SET_DEST (x
);
2084 while (GET_CODE (op0
) == SUBREG
)
2085 op0
= SUBREG_REG (op0
);
2088 unsigned int r
= REGNO (op0
);
2090 /* See if this reg overlaps range under consideration. */
2092 && r
+ hard_regno_nregs
[r
][GET_MODE (op0
)] > beg_regno
)
2096 else if (GET_CODE (x
) == PARALLEL
)
2098 int i
= XVECLEN (x
, 0) - 1;
2101 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2108 /* Return 1 if ADDR is a valid memory address for mode MODE,
2109 and check that each pseudo reg has the proper kind of
2113 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED
, rtx addr
)
2115 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2122 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2123 if they are the same hard reg, and has special hacks for
2124 autoincrement and autodecrement.
2125 This is specifically intended for find_reloads to use
2126 in determining whether two operands match.
2127 X is the operand whose number is the lower of the two.
2129 The value is 2 if Y contains a pre-increment that matches
2130 a non-incrementing address in X. */
2132 /* ??? To be completely correct, we should arrange to pass
2133 for X the output operand and for Y the input operand.
2134 For now, we assume that the output operand has the lower number
2135 because that is natural in (SET output (... input ...)). */
2138 operands_match_p (rtx x
, rtx y
)
2141 RTX_CODE code
= GET_CODE (x
);
2147 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2148 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2149 && REG_P (SUBREG_REG (y
)))))
2155 i
= REGNO (SUBREG_REG (x
));
2156 if (i
>= FIRST_PSEUDO_REGISTER
)
2158 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2159 GET_MODE (SUBREG_REG (x
)),
2166 if (GET_CODE (y
) == SUBREG
)
2168 j
= REGNO (SUBREG_REG (y
));
2169 if (j
>= FIRST_PSEUDO_REGISTER
)
2171 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2172 GET_MODE (SUBREG_REG (y
)),
2179 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2180 multiple hard register group of scalar integer registers, so that
2181 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2183 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2184 && SCALAR_INT_MODE_P (GET_MODE (x
))
2185 && i
< FIRST_PSEUDO_REGISTER
)
2186 i
+= hard_regno_nregs
[i
][GET_MODE (x
)] - 1;
2187 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2188 && SCALAR_INT_MODE_P (GET_MODE (y
))
2189 && j
< FIRST_PSEUDO_REGISTER
)
2190 j
+= hard_regno_nregs
[j
][GET_MODE (y
)] - 1;
2194 /* If two operands must match, because they are really a single
2195 operand of an assembler insn, then two postincrements are invalid
2196 because the assembler insn would increment only once.
2197 On the other hand, a postincrement matches ordinary indexing
2198 if the postincrement is the output operand. */
2199 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2200 return operands_match_p (XEXP (x
, 0), y
);
2201 /* Two preincrements are invalid
2202 because the assembler insn would increment only once.
2203 On the other hand, a preincrement matches ordinary indexing
2204 if the preincrement is the input operand.
2205 In this case, return 2, since some callers need to do special
2206 things when this happens. */
2207 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2208 || GET_CODE (y
) == PRE_MODIFY
)
2209 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2213 /* Now we have disposed of all the cases in which different rtx codes
2215 if (code
!= GET_CODE (y
))
2218 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2219 if (GET_MODE (x
) != GET_MODE (y
))
2229 return XEXP (x
, 0) == XEXP (y
, 0);
2231 return XSTR (x
, 0) == XSTR (y
, 0);
2237 /* Compare the elements. If any pair of corresponding elements
2238 fail to match, return 0 for the whole things. */
2241 fmt
= GET_RTX_FORMAT (code
);
2242 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2248 if (XWINT (x
, i
) != XWINT (y
, i
))
2253 if (XINT (x
, i
) != XINT (y
, i
))
2258 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2261 /* If any subexpression returns 2,
2262 we should return 2 if we are successful. */
2271 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2273 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2275 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2283 /* It is believed that rtx's at this level will never
2284 contain anything but integers and other rtx's,
2285 except for within LABEL_REFs and SYMBOL_REFs. */
2290 return 1 + success_2
;
2293 /* Describe the range of registers or memory referenced by X.
2294 If X is a register, set REG_FLAG and put the first register
2295 number into START and the last plus one into END.
2296 If X is a memory reference, put a base address into BASE
2297 and a range of integer offsets into START and END.
2298 If X is pushing on the stack, we can assume it causes no trouble,
2299 so we set the SAFE field. */
2301 static struct decomposition
2304 struct decomposition val
;
2307 memset (&val
, 0, sizeof (val
));
2309 switch (GET_CODE (x
))
2313 rtx base
= NULL_RTX
, offset
= 0;
2314 rtx addr
= XEXP (x
, 0);
2316 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2317 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2319 val
.base
= XEXP (addr
, 0);
2320 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2321 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2322 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2326 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2328 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2329 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2330 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2332 val
.base
= XEXP (addr
, 0);
2333 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2334 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2335 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2340 if (GET_CODE (addr
) == CONST
)
2342 addr
= XEXP (addr
, 0);
2345 if (GET_CODE (addr
) == PLUS
)
2347 if (CONSTANT_P (XEXP (addr
, 0)))
2349 base
= XEXP (addr
, 1);
2350 offset
= XEXP (addr
, 0);
2352 else if (CONSTANT_P (XEXP (addr
, 1)))
2354 base
= XEXP (addr
, 0);
2355 offset
= XEXP (addr
, 1);
2362 offset
= const0_rtx
;
2364 if (GET_CODE (offset
) == CONST
)
2365 offset
= XEXP (offset
, 0);
2366 if (GET_CODE (offset
) == PLUS
)
2368 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2370 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2371 offset
= XEXP (offset
, 0);
2373 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2375 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2376 offset
= XEXP (offset
, 1);
2380 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2381 offset
= const0_rtx
;
2384 else if (GET_CODE (offset
) != CONST_INT
)
2386 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2387 offset
= const0_rtx
;
2390 if (all_const
&& GET_CODE (base
) == PLUS
)
2391 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2393 gcc_assert (GET_CODE (offset
) == CONST_INT
);
2395 val
.start
= INTVAL (offset
);
2396 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2403 val
.start
= true_regnum (x
);
2404 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2406 /* A pseudo with no hard reg. */
2407 val
.start
= REGNO (x
);
2408 val
.end
= val
.start
+ 1;
2412 val
.end
= val
.start
+ hard_regno_nregs
[val
.start
][GET_MODE (x
)];
2416 if (!REG_P (SUBREG_REG (x
)))
2417 /* This could be more precise, but it's good enough. */
2418 return decompose (SUBREG_REG (x
));
2420 val
.start
= true_regnum (x
);
2421 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2422 return decompose (SUBREG_REG (x
));
2425 val
.end
= val
.start
+ subreg_nregs (x
);
2429 /* This hasn't been assigned yet, so it can't conflict yet. */
2434 gcc_assert (CONSTANT_P (x
));
2441 /* Return 1 if altering Y will not modify the value of X.
2442 Y is also described by YDATA, which should be decompose (Y). */
2445 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2447 struct decomposition xdata
;
2450 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2454 gcc_assert (MEM_P (y
));
2455 /* If Y is memory and X is not, Y can't affect X. */
2459 xdata
= decompose (x
);
2461 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2463 /* If bases are distinct symbolic constants, there is no overlap. */
2464 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2466 /* Constants and stack slots never overlap. */
2467 if (CONSTANT_P (xdata
.base
)
2468 && (ydata
.base
== frame_pointer_rtx
2469 || ydata
.base
== hard_frame_pointer_rtx
2470 || ydata
.base
== stack_pointer_rtx
))
2472 if (CONSTANT_P (ydata
.base
)
2473 && (xdata
.base
== frame_pointer_rtx
2474 || xdata
.base
== hard_frame_pointer_rtx
2475 || xdata
.base
== stack_pointer_rtx
))
2477 /* If either base is variable, we don't know anything. */
2481 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2484 /* Similar, but calls decompose. */
2487 safe_from_earlyclobber (rtx op
, rtx clobber
)
2489 struct decomposition early_data
;
2491 early_data
= decompose (clobber
);
2492 return immune_p (op
, clobber
, early_data
);
2495 /* Main entry point of this file: search the body of INSN
2496 for values that need reloading and record them with push_reload.
2497 REPLACE nonzero means record also where the values occur
2498 so that subst_reloads can be used.
2500 IND_LEVELS says how many levels of indirection are supported by this
2501 machine; a value of zero means that a memory reference is not a valid
2504 LIVE_KNOWN says we have valid information about which hard
2505 regs are live at each point in the program; this is true when
2506 we are called from global_alloc but false when stupid register
2507 allocation has been done.
2509 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2510 which is nonnegative if the reg has been commandeered for reloading into.
2511 It is copied into STATIC_RELOAD_REG_P and referenced from there
2512 by various subroutines.
2514 Return TRUE if some operands need to be changed, because of swapping
2515 commutative operands, reg_equiv_address substitution, or whatever. */
2518 find_reloads (rtx insn
, int replace
, int ind_levels
, int live_known
,
2519 short *reload_reg_p
)
2521 int insn_code_number
;
2524 /* These start out as the constraints for the insn
2525 and they are chewed up as we consider alternatives. */
2526 char *constraints
[MAX_RECOG_OPERANDS
];
2527 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2529 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2530 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2531 /* Nonzero for a MEM operand whose entire address needs a reload.
2532 May be -1 to indicate the entire address may or may not need a reload. */
2533 int address_reloaded
[MAX_RECOG_OPERANDS
];
2534 /* Nonzero for an address operand that needs to be completely reloaded.
2535 May be -1 to indicate the entire operand may or may not need a reload. */
2536 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2537 /* Value of enum reload_type to use for operand. */
2538 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2539 /* Value of enum reload_type to use within address of operand. */
2540 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2541 /* Save the usage of each operand. */
2542 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2543 int no_input_reloads
= 0, no_output_reloads
= 0;
2545 int this_alternative
[MAX_RECOG_OPERANDS
];
2546 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2547 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2548 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2549 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2550 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2552 int goal_alternative
[MAX_RECOG_OPERANDS
];
2553 int this_alternative_number
;
2554 int goal_alternative_number
= 0;
2555 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2556 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2557 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2558 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2559 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2560 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2561 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2562 int goal_alternative_swapped
;
2565 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2566 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2567 rtx body
= PATTERN (insn
);
2568 rtx set
= single_set (insn
);
2569 int goal_earlyclobber
= 0, this_earlyclobber
;
2570 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2576 n_earlyclobbers
= 0;
2577 replace_reloads
= replace
;
2578 hard_regs_live_known
= live_known
;
2579 static_reload_reg_p
= reload_reg_p
;
2581 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2582 neither are insns that SET cc0. Insns that use CC0 are not allowed
2583 to have any input reloads. */
2584 if (JUMP_P (insn
) || CALL_P (insn
))
2585 no_output_reloads
= 1;
2588 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2589 no_input_reloads
= 1;
2590 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2591 no_output_reloads
= 1;
2594 #ifdef SECONDARY_MEMORY_NEEDED
2595 /* The eliminated forms of any secondary memory locations are per-insn, so
2596 clear them out here. */
2598 if (secondary_memlocs_elim_used
)
2600 memset (secondary_memlocs_elim
, 0,
2601 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2602 secondary_memlocs_elim_used
= 0;
2606 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2607 is cheap to move between them. If it is not, there may not be an insn
2608 to do the copy, so we may need a reload. */
2609 if (GET_CODE (body
) == SET
2610 && REG_P (SET_DEST (body
))
2611 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2612 && REG_P (SET_SRC (body
))
2613 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2614 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2615 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2616 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2619 extract_insn (insn
);
2621 noperands
= reload_n_operands
= recog_data
.n_operands
;
2622 n_alternatives
= recog_data
.n_alternatives
;
2624 /* Just return "no reloads" if insn has no operands with constraints. */
2625 if (noperands
== 0 || n_alternatives
== 0)
2628 insn_code_number
= INSN_CODE (insn
);
2629 this_insn_is_asm
= insn_code_number
< 0;
2631 memcpy (operand_mode
, recog_data
.operand_mode
,
2632 noperands
* sizeof (enum machine_mode
));
2633 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2637 /* If we will need to know, later, whether some pair of operands
2638 are the same, we must compare them now and save the result.
2639 Reloading the base and index registers will clobber them
2640 and afterward they will fail to match. */
2642 for (i
= 0; i
< noperands
; i
++)
2647 substed_operand
[i
] = recog_data
.operand
[i
];
2650 modified
[i
] = RELOAD_READ
;
2652 /* Scan this operand's constraint to see if it is an output operand,
2653 an in-out operand, is commutative, or should match another. */
2657 p
+= CONSTRAINT_LEN (c
, p
);
2661 modified
[i
] = RELOAD_WRITE
;
2664 modified
[i
] = RELOAD_READ_WRITE
;
2668 /* The last operand should not be marked commutative. */
2669 gcc_assert (i
!= noperands
- 1);
2671 /* We currently only support one commutative pair of
2672 operands. Some existing asm code currently uses more
2673 than one pair. Previously, that would usually work,
2674 but sometimes it would crash the compiler. We
2675 continue supporting that case as well as we can by
2676 silently ignoring all but the first pair. In the
2677 future we may handle it correctly. */
2678 if (commutative
< 0)
2681 gcc_assert (this_insn_is_asm
);
2684 /* Use of ISDIGIT is tempting here, but it may get expensive because
2685 of locale support we don't want. */
2686 case '0': case '1': case '2': case '3': case '4':
2687 case '5': case '6': case '7': case '8': case '9':
2689 c
= strtoul (p
- 1, &p
, 10);
2691 operands_match
[c
][i
]
2692 = operands_match_p (recog_data
.operand
[c
],
2693 recog_data
.operand
[i
]);
2695 /* An operand may not match itself. */
2696 gcc_assert (c
!= i
);
2698 /* If C can be commuted with C+1, and C might need to match I,
2699 then C+1 might also need to match I. */
2700 if (commutative
>= 0)
2702 if (c
== commutative
|| c
== commutative
+ 1)
2704 int other
= c
+ (c
== commutative
? 1 : -1);
2705 operands_match
[other
][i
]
2706 = operands_match_p (recog_data
.operand
[other
],
2707 recog_data
.operand
[i
]);
2709 if (i
== commutative
|| i
== commutative
+ 1)
2711 int other
= i
+ (i
== commutative
? 1 : -1);
2712 operands_match
[c
][other
]
2713 = operands_match_p (recog_data
.operand
[c
],
2714 recog_data
.operand
[other
]);
2716 /* Note that C is supposed to be less than I.
2717 No need to consider altering both C and I because in
2718 that case we would alter one into the other. */
2725 /* Examine each operand that is a memory reference or memory address
2726 and reload parts of the addresses into index registers.
2727 Also here any references to pseudo regs that didn't get hard regs
2728 but are equivalent to constants get replaced in the insn itself
2729 with those constants. Nobody will ever see them again.
2731 Finally, set up the preferred classes of each operand. */
2733 for (i
= 0; i
< noperands
; i
++)
2735 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2737 address_reloaded
[i
] = 0;
2738 address_operand_reloaded
[i
] = 0;
2739 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2740 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2743 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2744 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2747 if (*constraints
[i
] == 0)
2748 /* Ignore things like match_operator operands. */
2750 else if (constraints
[i
][0] == 'p'
2751 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0], constraints
[i
]))
2753 address_operand_reloaded
[i
]
2754 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2755 recog_data
.operand
[i
],
2756 recog_data
.operand_loc
[i
],
2757 i
, operand_type
[i
], ind_levels
, insn
);
2759 /* If we now have a simple operand where we used to have a
2760 PLUS or MULT, re-recognize and try again. */
2761 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2762 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2763 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2764 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2766 INSN_CODE (insn
) = -1;
2767 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2772 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2773 substed_operand
[i
] = recog_data
.operand
[i
];
2775 /* Address operands are reloaded in their existing mode,
2776 no matter what is specified in the machine description. */
2777 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2779 else if (code
== MEM
)
2782 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2783 recog_data
.operand_loc
[i
],
2784 XEXP (recog_data
.operand
[i
], 0),
2785 &XEXP (recog_data
.operand
[i
], 0),
2786 i
, address_type
[i
], ind_levels
, insn
);
2787 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2788 substed_operand
[i
] = recog_data
.operand
[i
];
2790 else if (code
== SUBREG
)
2792 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2794 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2797 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2799 &address_reloaded
[i
]);
2801 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2802 that didn't get a hard register, emit a USE with a REG_EQUAL
2803 note in front so that we might inherit a previous, possibly
2809 && (GET_MODE_SIZE (GET_MODE (reg
))
2810 >= GET_MODE_SIZE (GET_MODE (op
))))
2811 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2813 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2815 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2817 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2818 /* We can get a PLUS as an "operand" as a result of register
2819 elimination. See eliminate_regs and gen_reload. We handle
2820 a unary operator by reloading the operand. */
2821 substed_operand
[i
] = recog_data
.operand
[i
]
2822 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2823 ind_levels
, 0, insn
,
2824 &address_reloaded
[i
]);
2825 else if (code
== REG
)
2827 /* This is equivalent to calling find_reloads_toplev.
2828 The code is duplicated for speed.
2829 When we find a pseudo always equivalent to a constant,
2830 we replace it by the constant. We must be sure, however,
2831 that we don't try to replace it in the insn in which it
2833 int regno
= REGNO (recog_data
.operand
[i
]);
2834 if (reg_equiv_constant
[regno
] != 0
2835 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2837 /* Record the existing mode so that the check if constants are
2838 allowed will work when operand_mode isn't specified. */
2840 if (operand_mode
[i
] == VOIDmode
)
2841 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2843 substed_operand
[i
] = recog_data
.operand
[i
]
2844 = reg_equiv_constant
[regno
];
2846 if (reg_equiv_memory_loc
[regno
] != 0
2847 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2848 /* We need not give a valid is_set_dest argument since the case
2849 of a constant equivalence was checked above. */
2850 substed_operand
[i
] = recog_data
.operand
[i
]
2851 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2852 ind_levels
, 0, insn
,
2853 &address_reloaded
[i
]);
2855 /* If the operand is still a register (we didn't replace it with an
2856 equivalent), get the preferred class to reload it into. */
2857 code
= GET_CODE (recog_data
.operand
[i
]);
2859 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2860 >= FIRST_PSEUDO_REGISTER
)
2861 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2865 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2866 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2869 /* If this is simply a copy from operand 1 to operand 0, merge the
2870 preferred classes for the operands. */
2871 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2872 && recog_data
.operand
[1] == SET_SRC (set
))
2874 preferred_class
[0] = preferred_class
[1]
2875 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2876 pref_or_nothing
[0] |= pref_or_nothing
[1];
2877 pref_or_nothing
[1] |= pref_or_nothing
[0];
2880 /* Now see what we need for pseudo-regs that didn't get hard regs
2881 or got the wrong kind of hard reg. For this, we must consider
2882 all the operands together against the register constraints. */
2884 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2887 goal_alternative_swapped
= 0;
2890 /* The constraints are made of several alternatives.
2891 Each operand's constraint looks like foo,bar,... with commas
2892 separating the alternatives. The first alternatives for all
2893 operands go together, the second alternatives go together, etc.
2895 First loop over alternatives. */
2897 for (this_alternative_number
= 0;
2898 this_alternative_number
< n_alternatives
;
2899 this_alternative_number
++)
2901 /* Loop over operands for one constraint alternative. */
2902 /* LOSERS counts those that don't fit this alternative
2903 and would require loading. */
2905 /* BAD is set to 1 if it some operand can't fit this alternative
2906 even after reloading. */
2908 /* REJECT is a count of how undesirable this alternative says it is
2909 if any reloading is required. If the alternative matches exactly
2910 then REJECT is ignored, but otherwise it gets this much
2911 counted against it in addition to the reloading needed. Each
2912 ? counts three times here since we want the disparaging caused by
2913 a bad register class to only count 1/3 as much. */
2916 this_earlyclobber
= 0;
2918 for (i
= 0; i
< noperands
; i
++)
2920 char *p
= constraints
[i
];
2925 /* 0 => this operand can be reloaded somehow for this alternative. */
2927 /* 0 => this operand can be reloaded if the alternative allows regs. */
2931 rtx operand
= recog_data
.operand
[i
];
2933 /* Nonzero means this is a MEM that must be reloaded into a reg
2934 regardless of what the constraint says. */
2935 int force_reload
= 0;
2937 /* Nonzero if a constant forced into memory would be OK for this
2940 int earlyclobber
= 0;
2942 /* If the predicate accepts a unary operator, it means that
2943 we need to reload the operand, but do not do this for
2944 match_operator and friends. */
2945 if (UNARY_P (operand
) && *p
!= 0)
2946 operand
= XEXP (operand
, 0);
2948 /* If the operand is a SUBREG, extract
2949 the REG or MEM (or maybe even a constant) within.
2950 (Constants can occur as a result of reg_equiv_constant.) */
2952 while (GET_CODE (operand
) == SUBREG
)
2954 /* Offset only matters when operand is a REG and
2955 it is a hard reg. This is because it is passed
2956 to reg_fits_class_p if it is a REG and all pseudos
2957 return 0 from that function. */
2958 if (REG_P (SUBREG_REG (operand
))
2959 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2961 if (!subreg_offset_representable_p
2962 (REGNO (SUBREG_REG (operand
)),
2963 GET_MODE (SUBREG_REG (operand
)),
2964 SUBREG_BYTE (operand
),
2965 GET_MODE (operand
)))
2967 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2968 GET_MODE (SUBREG_REG (operand
)),
2969 SUBREG_BYTE (operand
),
2970 GET_MODE (operand
));
2972 operand
= SUBREG_REG (operand
);
2973 /* Force reload if this is a constant or PLUS or if there may
2974 be a problem accessing OPERAND in the outer mode. */
2975 if (CONSTANT_P (operand
)
2976 || GET_CODE (operand
) == PLUS
2977 /* We must force a reload of paradoxical SUBREGs
2978 of a MEM because the alignment of the inner value
2979 may not be enough to do the outer reference. On
2980 big-endian machines, it may also reference outside
2983 On machines that extend byte operations and we have a
2984 SUBREG where both the inner and outer modes are no wider
2985 than a word and the inner mode is narrower, is integral,
2986 and gets extended when loaded from memory, combine.c has
2987 made assumptions about the behavior of the machine in such
2988 register access. If the data is, in fact, in memory we
2989 must always load using the size assumed to be in the
2990 register and let the insn do the different-sized
2993 This is doubly true if WORD_REGISTER_OPERATIONS. In
2994 this case eliminate_regs has left non-paradoxical
2995 subregs for push_reload to see. Make sure it does
2996 by forcing the reload.
2998 ??? When is it right at this stage to have a subreg
2999 of a mem that is _not_ to be handled specially? IMO
3000 those should have been reduced to just a mem. */
3001 || ((MEM_P (operand
)
3003 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3004 #ifndef WORD_REGISTER_OPERATIONS
3005 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
3006 < BIGGEST_ALIGNMENT
)
3007 && (GET_MODE_SIZE (operand_mode
[i
])
3008 > GET_MODE_SIZE (GET_MODE (operand
))))
3010 #ifdef LOAD_EXTEND_OP
3011 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3012 && (GET_MODE_SIZE (GET_MODE (operand
))
3014 && (GET_MODE_SIZE (operand_mode
[i
])
3015 > GET_MODE_SIZE (GET_MODE (operand
)))
3016 && INTEGRAL_MODE_P (GET_MODE (operand
))
3017 && LOAD_EXTEND_OP (GET_MODE (operand
)) != UNKNOWN
)
3026 this_alternative
[i
] = (int) NO_REGS
;
3027 this_alternative_win
[i
] = 0;
3028 this_alternative_match_win
[i
] = 0;
3029 this_alternative_offmemok
[i
] = 0;
3030 this_alternative_earlyclobber
[i
] = 0;
3031 this_alternative_matches
[i
] = -1;
3033 /* An empty constraint or empty alternative
3034 allows anything which matched the pattern. */
3035 if (*p
== 0 || *p
== ',')
3038 /* Scan this alternative's specs for this operand;
3039 set WIN if the operand fits any letter in this alternative.
3040 Otherwise, clear BADOP if this operand could
3041 fit some letter after reloads,
3042 or set WINREG if this operand could fit after reloads
3043 provided the constraint allows some registers. */
3046 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3055 case '=': case '+': case '*':
3059 /* We only support one commutative marker, the first
3060 one. We already set commutative above. */
3072 /* Ignore rest of this alternative as far as
3073 reloading is concerned. */
3076 while (*p
&& *p
!= ',');
3080 case '0': case '1': case '2': case '3': case '4':
3081 case '5': case '6': case '7': case '8': case '9':
3082 m
= strtoul (p
, &end
, 10);
3086 this_alternative_matches
[i
] = m
;
3087 /* We are supposed to match a previous operand.
3088 If we do, we win if that one did.
3089 If we do not, count both of the operands as losers.
3090 (This is too conservative, since most of the time
3091 only a single reload insn will be needed to make
3092 the two operands win. As a result, this alternative
3093 may be rejected when it is actually desirable.) */
3094 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3095 /* If we are matching as if two operands were swapped,
3096 also pretend that operands_match had been computed
3098 But if I is the second of those and C is the first,
3099 don't exchange them, because operands_match is valid
3100 only on one side of its diagonal. */
3102 [(m
== commutative
|| m
== commutative
+ 1)
3103 ? 2 * commutative
+ 1 - m
: m
]
3104 [(i
== commutative
|| i
== commutative
+ 1)
3105 ? 2 * commutative
+ 1 - i
: i
])
3106 : operands_match
[m
][i
])
3108 /* If we are matching a non-offsettable address where an
3109 offsettable address was expected, then we must reject
3110 this combination, because we can't reload it. */
3111 if (this_alternative_offmemok
[m
]
3112 && MEM_P (recog_data
.operand
[m
])
3113 && this_alternative
[m
] == (int) NO_REGS
3114 && ! this_alternative_win
[m
])
3117 did_match
= this_alternative_win
[m
];
3121 /* Operands don't match. */
3124 /* Retroactively mark the operand we had to match
3125 as a loser, if it wasn't already. */
3126 if (this_alternative_win
[m
])
3128 this_alternative_win
[m
] = 0;
3129 if (this_alternative
[m
] == (int) NO_REGS
)
3131 /* But count the pair only once in the total badness of
3132 this alternative, if the pair can be a dummy reload.
3133 The pointers in operand_loc are not swapped; swap
3134 them by hand if necessary. */
3135 if (swapped
&& i
== commutative
)
3136 loc1
= commutative
+ 1;
3137 else if (swapped
&& i
== commutative
+ 1)
3141 if (swapped
&& m
== commutative
)
3142 loc2
= commutative
+ 1;
3143 else if (swapped
&& m
== commutative
+ 1)
3148 = find_dummy_reload (recog_data
.operand
[i
],
3149 recog_data
.operand
[m
],
3150 recog_data
.operand_loc
[loc1
],
3151 recog_data
.operand_loc
[loc2
],
3152 operand_mode
[i
], operand_mode
[m
],
3153 this_alternative
[m
], -1,
3154 this_alternative_earlyclobber
[m
]);
3159 /* This can be fixed with reloads if the operand
3160 we are supposed to match can be fixed with reloads. */
3162 this_alternative
[i
] = this_alternative
[m
];
3164 /* If we have to reload this operand and some previous
3165 operand also had to match the same thing as this
3166 operand, we don't know how to do that. So reject this
3168 if (! did_match
|| force_reload
)
3169 for (j
= 0; j
< i
; j
++)
3170 if (this_alternative_matches
[j
]
3171 == this_alternative_matches
[i
])
3176 /* All necessary reloads for an address_operand
3177 were handled in find_reloads_address. */
3179 = (int) base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
);
3189 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3190 && reg_renumber
[REGNO (operand
)] < 0))
3192 if (CONST_POOL_OK_P (operand
))
3199 && ! address_reloaded
[i
]
3200 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3201 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3207 && ! address_reloaded
[i
]
3208 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3209 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3213 /* Memory operand whose address is not offsettable. */
3218 && ! (ind_levels
? offsettable_memref_p (operand
)
3219 : offsettable_nonstrict_memref_p (operand
))
3220 /* Certain mem addresses will become offsettable
3221 after they themselves are reloaded. This is important;
3222 we don't want our own handling of unoffsettables
3223 to override the handling of reg_equiv_address. */
3224 && !(REG_P (XEXP (operand
, 0))
3226 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3230 /* Memory operand whose address is offsettable. */
3234 if ((MEM_P (operand
)
3235 /* If IND_LEVELS, find_reloads_address won't reload a
3236 pseudo that didn't get a hard reg, so we have to
3237 reject that case. */
3238 && ((ind_levels
? offsettable_memref_p (operand
)
3239 : offsettable_nonstrict_memref_p (operand
))
3240 /* A reloaded address is offsettable because it is now
3241 just a simple register indirect. */
3242 || address_reloaded
[i
] == 1))
3244 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3245 && reg_renumber
[REGNO (operand
)] < 0
3246 /* If reg_equiv_address is nonzero, we will be
3247 loading it into a register; hence it will be
3248 offsettable, but we cannot say that reg_equiv_mem
3249 is offsettable without checking. */
3250 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3251 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3252 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3254 if (CONST_POOL_OK_P (operand
)
3262 /* Output operand that is stored before the need for the
3263 input operands (and their index registers) is over. */
3264 earlyclobber
= 1, this_earlyclobber
= 1;
3269 if (GET_CODE (operand
) == CONST_DOUBLE
3270 || (GET_CODE (operand
) == CONST_VECTOR
3271 && (GET_MODE_CLASS (GET_MODE (operand
))
3272 == MODE_VECTOR_FLOAT
)))
3278 if (GET_CODE (operand
) == CONST_DOUBLE
3279 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand
, c
, p
))
3284 if (GET_CODE (operand
) == CONST_INT
3285 || (GET_CODE (operand
) == CONST_DOUBLE
3286 && GET_MODE (operand
) == VOIDmode
))
3289 if (CONSTANT_P (operand
)
3290 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
)))
3295 if (GET_CODE (operand
) == CONST_INT
3296 || (GET_CODE (operand
) == CONST_DOUBLE
3297 && GET_MODE (operand
) == VOIDmode
))
3309 if (GET_CODE (operand
) == CONST_INT
3310 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand
), c
, p
))
3321 /* A PLUS is never a valid operand, but reload can make
3322 it from a register when eliminating registers. */
3323 && GET_CODE (operand
) != PLUS
3324 /* A SCRATCH is not a valid operand. */
3325 && GET_CODE (operand
) != SCRATCH
3326 && (! CONSTANT_P (operand
)
3328 || LEGITIMATE_PIC_OPERAND_P (operand
))
3329 && (GENERAL_REGS
== ALL_REGS
3331 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3332 && reg_renumber
[REGNO (operand
)] < 0)))
3334 /* Drop through into 'r' case. */
3338 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3342 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) == NO_REGS
)
3344 #ifdef EXTRA_CONSTRAINT_STR
3345 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
3349 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3351 /* If the address was already reloaded,
3353 else if (MEM_P (operand
)
3354 && address_reloaded
[i
] == 1)
3356 /* Likewise if the address will be reloaded because
3357 reg_equiv_address is nonzero. For reg_equiv_mem
3358 we have to check. */
3359 else if (REG_P (operand
)
3360 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3361 && reg_renumber
[REGNO (operand
)] < 0
3362 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3363 && EXTRA_CONSTRAINT_STR (reg_equiv_mem
[REGNO (operand
)], c
, p
))
3364 || (reg_equiv_address
[REGNO (operand
)] != 0)))
3367 /* If we didn't already win, we can reload
3368 constants via force_const_mem, and other
3369 MEMs by reloading the address like for 'o'. */
3370 if (CONST_POOL_OK_P (operand
)
3377 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
3379 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3382 /* If we didn't already win, we can reload
3383 the address into a base register. */
3385 = (int) base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
);
3390 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3397 = (int) (reg_class_subunion
3398 [this_alternative
[i
]]
3399 [(int) REG_CLASS_FROM_CONSTRAINT (c
, p
)]);
3401 if (GET_MODE (operand
) == BLKmode
)
3405 && reg_fits_class_p (operand
, this_alternative
[i
],
3406 offset
, GET_MODE (recog_data
.operand
[i
])))
3410 while ((p
+= len
), c
);
3414 /* If this operand could be handled with a reg,
3415 and some reg is allowed, then this operand can be handled. */
3416 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3419 /* Record which operands fit this alternative. */
3420 this_alternative_earlyclobber
[i
] = earlyclobber
;
3421 if (win
&& ! force_reload
)
3422 this_alternative_win
[i
] = 1;
3423 else if (did_match
&& ! force_reload
)
3424 this_alternative_match_win
[i
] = 1;
3427 int const_to_mem
= 0;
3429 this_alternative_offmemok
[i
] = offmemok
;
3433 /* Alternative loses if it has no regs for a reg operand. */
3435 && this_alternative
[i
] == (int) NO_REGS
3436 && this_alternative_matches
[i
] < 0)
3439 /* If this is a constant that is reloaded into the desired
3440 class by copying it to memory first, count that as another
3441 reload. This is consistent with other code and is
3442 required to avoid choosing another alternative when
3443 the constant is moved into memory by this function on
3444 an early reload pass. Note that the test here is
3445 precisely the same as in the code below that calls
3447 if (CONST_POOL_OK_P (operand
)
3448 && ((PREFERRED_RELOAD_CLASS (operand
,
3449 (enum reg_class
) this_alternative
[i
])
3451 || no_input_reloads
)
3452 && operand_mode
[i
] != VOIDmode
)
3455 if (this_alternative
[i
] != (int) NO_REGS
)
3459 /* Alternative loses if it requires a type of reload not
3460 permitted for this insn. We can always reload SCRATCH
3461 and objects with a REG_UNUSED note. */
3462 if (GET_CODE (operand
) != SCRATCH
3463 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3464 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3466 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3470 /* If we can't reload this value at all, reject this
3471 alternative. Note that we could also lose due to
3472 LIMIT_RELOAD_CLASS, but we don't check that
3475 if (! CONSTANT_P (operand
)
3476 && (enum reg_class
) this_alternative
[i
] != NO_REGS
)
3478 if (PREFERRED_RELOAD_CLASS
3479 (operand
, (enum reg_class
) this_alternative
[i
])
3483 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3484 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3485 && PREFERRED_OUTPUT_RELOAD_CLASS
3486 (operand
, (enum reg_class
) this_alternative
[i
])
3492 /* We prefer to reload pseudos over reloading other things,
3493 since such reloads may be able to be eliminated later.
3494 If we are reloading a SCRATCH, we won't be generating any
3495 insns, just using a register, so it is also preferred.
3496 So bump REJECT in other cases. Don't do this in the
3497 case where we are forcing a constant into memory and
3498 it will then win since we don't want to have a different
3499 alternative match then. */
3500 if (! (REG_P (operand
)
3501 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3502 && GET_CODE (operand
) != SCRATCH
3503 && ! (const_to_mem
&& constmemok
))
3506 /* Input reloads can be inherited more often than output
3507 reloads can be removed, so penalize output reloads. */
3508 if (operand_type
[i
] != RELOAD_FOR_INPUT
3509 && GET_CODE (operand
) != SCRATCH
)
3513 /* If this operand is a pseudo register that didn't get a hard
3514 reg and this alternative accepts some register, see if the
3515 class that we want is a subset of the preferred class for this
3516 register. If not, but it intersects that class, use the
3517 preferred class instead. If it does not intersect the preferred
3518 class, show that usage of this alternative should be discouraged;
3519 it will be discouraged more still if the register is `preferred
3520 or nothing'. We do this because it increases the chance of
3521 reusing our spill register in a later insn and avoiding a pair
3522 of memory stores and loads.
3524 Don't bother with this if this alternative will accept this
3527 Don't do this for a multiword operand, since it is only a
3528 small win and has the risk of requiring more spill registers,
3529 which could cause a large loss.
3531 Don't do this if the preferred class has only one register
3532 because we might otherwise exhaust the class. */
3534 if (! win
&& ! did_match
3535 && this_alternative
[i
] != (int) NO_REGS
3536 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3537 && reg_class_size
[(int) preferred_class
[i
]] > 0
3538 && ! SMALL_REGISTER_CLASS_P (preferred_class
[i
]))
3540 if (! reg_class_subset_p (this_alternative
[i
],
3541 preferred_class
[i
]))
3543 /* Since we don't have a way of forming the intersection,
3544 we just do something special if the preferred class
3545 is a subset of the class we have; that's the most
3546 common case anyway. */
3547 if (reg_class_subset_p (preferred_class
[i
],
3548 this_alternative
[i
]))
3549 this_alternative
[i
] = (int) preferred_class
[i
];
3551 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3556 /* Now see if any output operands that are marked "earlyclobber"
3557 in this alternative conflict with any input operands
3558 or any memory addresses. */
3560 for (i
= 0; i
< noperands
; i
++)
3561 if (this_alternative_earlyclobber
[i
]
3562 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3564 struct decomposition early_data
;
3566 early_data
= decompose (recog_data
.operand
[i
]);
3568 gcc_assert (modified
[i
] != RELOAD_READ
);
3570 if (this_alternative
[i
] == NO_REGS
)
3572 this_alternative_earlyclobber
[i
] = 0;
3573 gcc_assert (this_insn_is_asm
);
3574 error_for_asm (this_insn
,
3575 "%<&%> constraint used with no register class");
3578 for (j
= 0; j
< noperands
; j
++)
3579 /* Is this an input operand or a memory ref? */
3580 if ((MEM_P (recog_data
.operand
[j
])
3581 || modified
[j
] != RELOAD_WRITE
)
3583 /* Ignore things like match_operator operands. */
3584 && *recog_data
.constraints
[j
] != 0
3585 /* Don't count an input operand that is constrained to match
3586 the early clobber operand. */
3587 && ! (this_alternative_matches
[j
] == i
3588 && rtx_equal_p (recog_data
.operand
[i
],
3589 recog_data
.operand
[j
]))
3590 /* Is it altered by storing the earlyclobber operand? */
3591 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3594 /* If the output is in a non-empty few-regs class,
3595 it's costly to reload it, so reload the input instead. */
3596 if (SMALL_REGISTER_CLASS_P (this_alternative
[i
])
3597 && (REG_P (recog_data
.operand
[j
])
3598 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3601 this_alternative_win
[j
] = 0;
3602 this_alternative_match_win
[j
] = 0;
3607 /* If an earlyclobber operand conflicts with something,
3608 it must be reloaded, so request this and count the cost. */
3612 this_alternative_win
[i
] = 0;
3613 this_alternative_match_win
[j
] = 0;
3614 for (j
= 0; j
< noperands
; j
++)
3615 if (this_alternative_matches
[j
] == i
3616 && this_alternative_match_win
[j
])
3618 this_alternative_win
[j
] = 0;
3619 this_alternative_match_win
[j
] = 0;
3625 /* If one alternative accepts all the operands, no reload required,
3626 choose that alternative; don't consider the remaining ones. */
3629 /* Unswap these so that they are never swapped at `finish'. */
3630 if (commutative
>= 0)
3632 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3633 recog_data
.operand
[commutative
+ 1]
3634 = substed_operand
[commutative
+ 1];
3636 for (i
= 0; i
< noperands
; i
++)
3638 goal_alternative_win
[i
] = this_alternative_win
[i
];
3639 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3640 goal_alternative
[i
] = this_alternative
[i
];
3641 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3642 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3643 goal_alternative_earlyclobber
[i
]
3644 = this_alternative_earlyclobber
[i
];
3646 goal_alternative_number
= this_alternative_number
;
3647 goal_alternative_swapped
= swapped
;
3648 goal_earlyclobber
= this_earlyclobber
;
3652 /* REJECT, set by the ! and ? constraint characters and when a register
3653 would be reloaded into a non-preferred class, discourages the use of
3654 this alternative for a reload goal. REJECT is incremented by six
3655 for each ? and two for each non-preferred class. */
3656 losers
= losers
* 6 + reject
;
3658 /* If this alternative can be made to work by reloading,
3659 and it needs less reloading than the others checked so far,
3660 record it as the chosen goal for reloading. */
3661 if (! bad
&& best
> losers
)
3663 for (i
= 0; i
< noperands
; i
++)
3665 goal_alternative
[i
] = this_alternative
[i
];
3666 goal_alternative_win
[i
] = this_alternative_win
[i
];
3667 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3668 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3669 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3670 goal_alternative_earlyclobber
[i
]
3671 = this_alternative_earlyclobber
[i
];
3673 goal_alternative_swapped
= swapped
;
3675 goal_alternative_number
= this_alternative_number
;
3676 goal_earlyclobber
= this_earlyclobber
;
3680 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3681 then we need to try each alternative twice,
3682 the second time matching those two operands
3683 as if we had exchanged them.
3684 To do this, really exchange them in operands.
3686 If we have just tried the alternatives the second time,
3687 return operands to normal and drop through. */
3689 if (commutative
>= 0)
3694 enum reg_class tclass
;
3697 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3698 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3699 /* Swap the duplicates too. */
3700 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3701 if (recog_data
.dup_num
[i
] == commutative
3702 || recog_data
.dup_num
[i
] == commutative
+ 1)
3703 *recog_data
.dup_loc
[i
]
3704 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3706 tclass
= preferred_class
[commutative
];
3707 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3708 preferred_class
[commutative
+ 1] = tclass
;
3710 t
= pref_or_nothing
[commutative
];
3711 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3712 pref_or_nothing
[commutative
+ 1] = t
;
3714 t
= address_reloaded
[commutative
];
3715 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3716 address_reloaded
[commutative
+ 1] = t
;
3718 memcpy (constraints
, recog_data
.constraints
,
3719 noperands
* sizeof (char *));
3724 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3725 recog_data
.operand
[commutative
+ 1]
3726 = substed_operand
[commutative
+ 1];
3727 /* Unswap the duplicates too. */
3728 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3729 if (recog_data
.dup_num
[i
] == commutative
3730 || recog_data
.dup_num
[i
] == commutative
+ 1)
3731 *recog_data
.dup_loc
[i
]
3732 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3736 /* The operands don't meet the constraints.
3737 goal_alternative describes the alternative
3738 that we could reach by reloading the fewest operands.
3739 Reload so as to fit it. */
3741 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3743 /* No alternative works with reloads?? */
3744 if (insn_code_number
>= 0)
3745 fatal_insn ("unable to generate reloads for:", insn
);
3746 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3747 /* Avoid further trouble with this insn. */
3748 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3753 /* Jump to `finish' from above if all operands are valid already.
3754 In that case, goal_alternative_win is all 1. */
3757 /* Right now, for any pair of operands I and J that are required to match,
3759 goal_alternative_matches[J] is I.
3760 Set up goal_alternative_matched as the inverse function:
3761 goal_alternative_matched[I] = J. */
3763 for (i
= 0; i
< noperands
; i
++)
3764 goal_alternative_matched
[i
] = -1;
3766 for (i
= 0; i
< noperands
; i
++)
3767 if (! goal_alternative_win
[i
]
3768 && goal_alternative_matches
[i
] >= 0)
3769 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3771 for (i
= 0; i
< noperands
; i
++)
3772 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3774 /* If the best alternative is with operands 1 and 2 swapped,
3775 consider them swapped before reporting the reloads. Update the
3776 operand numbers of any reloads already pushed. */
3778 if (goal_alternative_swapped
)
3782 tem
= substed_operand
[commutative
];
3783 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3784 substed_operand
[commutative
+ 1] = tem
;
3785 tem
= recog_data
.operand
[commutative
];
3786 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3787 recog_data
.operand
[commutative
+ 1] = tem
;
3788 tem
= *recog_data
.operand_loc
[commutative
];
3789 *recog_data
.operand_loc
[commutative
]
3790 = *recog_data
.operand_loc
[commutative
+ 1];
3791 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3793 for (i
= 0; i
< n_reloads
; i
++)
3795 if (rld
[i
].opnum
== commutative
)
3796 rld
[i
].opnum
= commutative
+ 1;
3797 else if (rld
[i
].opnum
== commutative
+ 1)
3798 rld
[i
].opnum
= commutative
;
3802 for (i
= 0; i
< noperands
; i
++)
3804 operand_reloadnum
[i
] = -1;
3806 /* If this is an earlyclobber operand, we need to widen the scope.
3807 The reload must remain valid from the start of the insn being
3808 reloaded until after the operand is stored into its destination.
3809 We approximate this with RELOAD_OTHER even though we know that we
3810 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3812 One special case that is worth checking is when we have an
3813 output that is earlyclobber but isn't used past the insn (typically
3814 a SCRATCH). In this case, we only need have the reload live
3815 through the insn itself, but not for any of our input or output
3817 But we must not accidentally narrow the scope of an existing
3818 RELOAD_OTHER reload - leave these alone.
3820 In any case, anything needed to address this operand can remain
3821 however they were previously categorized. */
3823 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3825 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3826 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3829 /* Any constants that aren't allowed and can't be reloaded
3830 into registers are here changed into memory references. */
3831 for (i
= 0; i
< noperands
; i
++)
3832 if (! goal_alternative_win
[i
]
3833 && CONST_POOL_OK_P (recog_data
.operand
[i
])
3834 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3835 (enum reg_class
) goal_alternative
[i
])
3837 || no_input_reloads
)
3838 && operand_mode
[i
] != VOIDmode
)
3840 substed_operand
[i
] = recog_data
.operand
[i
]
3841 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3842 recog_data
.operand
[i
]),
3843 i
, address_type
[i
], ind_levels
, 0, insn
,
3845 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3846 goal_alternative_number
))
3847 goal_alternative_win
[i
] = 1;
3850 /* Likewise any invalid constants appearing as operand of a PLUS
3851 that is to be reloaded. */
3852 for (i
= 0; i
< noperands
; i
++)
3853 if (! goal_alternative_win
[i
]
3854 && GET_CODE (recog_data
.operand
[i
]) == PLUS
3855 && CONST_POOL_OK_P (XEXP (recog_data
.operand
[i
], 1))
3856 && (PREFERRED_RELOAD_CLASS (XEXP (recog_data
.operand
[i
], 1),
3857 (enum reg_class
) goal_alternative
[i
])
3859 && operand_mode
[i
] != VOIDmode
)
3861 rtx tem
= force_const_mem (operand_mode
[i
],
3862 XEXP (recog_data
.operand
[i
], 1));
3863 tem
= gen_rtx_PLUS (operand_mode
[i
],
3864 XEXP (recog_data
.operand
[i
], 0), tem
);
3866 substed_operand
[i
] = recog_data
.operand
[i
]
3867 = find_reloads_toplev (tem
, i
, address_type
[i
],
3868 ind_levels
, 0, insn
, NULL
);
3871 /* Record the values of the earlyclobber operands for the caller. */
3872 if (goal_earlyclobber
)
3873 for (i
= 0; i
< noperands
; i
++)
3874 if (goal_alternative_earlyclobber
[i
])
3875 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3877 /* Now record reloads for all the operands that need them. */
3878 for (i
= 0; i
< noperands
; i
++)
3879 if (! goal_alternative_win
[i
])
3881 /* Operands that match previous ones have already been handled. */
3882 if (goal_alternative_matches
[i
] >= 0)
3884 /* Handle an operand with a nonoffsettable address
3885 appearing where an offsettable address will do
3886 by reloading the address into a base register.
3888 ??? We can also do this when the operand is a register and
3889 reg_equiv_mem is not offsettable, but this is a bit tricky,
3890 so we don't bother with it. It may not be worth doing. */
3891 else if (goal_alternative_matched
[i
] == -1
3892 && goal_alternative_offmemok
[i
]
3893 && MEM_P (recog_data
.operand
[i
]))
3895 /* If the address to be reloaded is a VOIDmode constant,
3896 use Pmode as mode of the reload register, as would have
3897 been done by find_reloads_address. */
3898 enum machine_mode address_mode
;
3899 address_mode
= GET_MODE (XEXP (recog_data
.operand
[i
], 0));
3900 if (address_mode
== VOIDmode
)
3901 address_mode
= Pmode
;
3903 operand_reloadnum
[i
]
3904 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3905 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3906 base_reg_class (VOIDmode
, MEM
, SCRATCH
),
3908 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3909 rld
[operand_reloadnum
[i
]].inc
3910 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3912 /* If this operand is an output, we will have made any
3913 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3914 now we are treating part of the operand as an input, so
3915 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3917 if (modified
[i
] == RELOAD_WRITE
)
3919 for (j
= 0; j
< n_reloads
; j
++)
3921 if (rld
[j
].opnum
== i
)
3923 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3924 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3925 else if (rld
[j
].when_needed
3926 == RELOAD_FOR_OUTADDR_ADDRESS
)
3927 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3932 else if (goal_alternative_matched
[i
] == -1)
3934 operand_reloadnum
[i
]
3935 = push_reload ((modified
[i
] != RELOAD_WRITE
3936 ? recog_data
.operand
[i
] : 0),
3937 (modified
[i
] != RELOAD_READ
3938 ? recog_data
.operand
[i
] : 0),
3939 (modified
[i
] != RELOAD_WRITE
3940 ? recog_data
.operand_loc
[i
] : 0),
3941 (modified
[i
] != RELOAD_READ
3942 ? recog_data
.operand_loc
[i
] : 0),
3943 (enum reg_class
) goal_alternative
[i
],
3944 (modified
[i
] == RELOAD_WRITE
3945 ? VOIDmode
: operand_mode
[i
]),
3946 (modified
[i
] == RELOAD_READ
3947 ? VOIDmode
: operand_mode
[i
]),
3948 (insn_code_number
< 0 ? 0
3949 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3950 0, i
, operand_type
[i
]);
3952 /* In a matching pair of operands, one must be input only
3953 and the other must be output only.
3954 Pass the input operand as IN and the other as OUT. */
3955 else if (modified
[i
] == RELOAD_READ
3956 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3958 operand_reloadnum
[i
]
3959 = push_reload (recog_data
.operand
[i
],
3960 recog_data
.operand
[goal_alternative_matched
[i
]],
3961 recog_data
.operand_loc
[i
],
3962 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3963 (enum reg_class
) goal_alternative
[i
],
3965 operand_mode
[goal_alternative_matched
[i
]],
3966 0, 0, i
, RELOAD_OTHER
);
3967 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3969 else if (modified
[i
] == RELOAD_WRITE
3970 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3972 operand_reloadnum
[goal_alternative_matched
[i
]]
3973 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3974 recog_data
.operand
[i
],
3975 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3976 recog_data
.operand_loc
[i
],
3977 (enum reg_class
) goal_alternative
[i
],
3978 operand_mode
[goal_alternative_matched
[i
]],
3980 0, 0, i
, RELOAD_OTHER
);
3981 operand_reloadnum
[i
] = output_reloadnum
;
3985 gcc_assert (insn_code_number
< 0);
3986 error_for_asm (insn
, "inconsistent operand constraints "
3988 /* Avoid further trouble with this insn. */
3989 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3994 else if (goal_alternative_matched
[i
] < 0
3995 && goal_alternative_matches
[i
] < 0
3996 && address_operand_reloaded
[i
] != 1
3999 /* For each non-matching operand that's a MEM or a pseudo-register
4000 that didn't get a hard register, make an optional reload.
4001 This may get done even if the insn needs no reloads otherwise. */
4003 rtx operand
= recog_data
.operand
[i
];
4005 while (GET_CODE (operand
) == SUBREG
)
4006 operand
= SUBREG_REG (operand
);
4007 if ((MEM_P (operand
)
4009 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4010 /* If this is only for an output, the optional reload would not
4011 actually cause us to use a register now, just note that
4012 something is stored here. */
4013 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
4014 || modified
[i
] == RELOAD_WRITE
)
4015 && ! no_input_reloads
4016 /* An optional output reload might allow to delete INSN later.
4017 We mustn't make in-out reloads on insns that are not permitted
4019 If this is an asm, we can't delete it; we must not even call
4020 push_reload for an optional output reload in this case,
4021 because we can't be sure that the constraint allows a register,
4022 and push_reload verifies the constraints for asms. */
4023 && (modified
[i
] == RELOAD_READ
4024 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4025 operand_reloadnum
[i
]
4026 = push_reload ((modified
[i
] != RELOAD_WRITE
4027 ? recog_data
.operand
[i
] : 0),
4028 (modified
[i
] != RELOAD_READ
4029 ? recog_data
.operand
[i
] : 0),
4030 (modified
[i
] != RELOAD_WRITE
4031 ? recog_data
.operand_loc
[i
] : 0),
4032 (modified
[i
] != RELOAD_READ
4033 ? recog_data
.operand_loc
[i
] : 0),
4034 (enum reg_class
) goal_alternative
[i
],
4035 (modified
[i
] == RELOAD_WRITE
4036 ? VOIDmode
: operand_mode
[i
]),
4037 (modified
[i
] == RELOAD_READ
4038 ? VOIDmode
: operand_mode
[i
]),
4039 (insn_code_number
< 0 ? 0
4040 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4041 1, i
, operand_type
[i
]);
4042 /* If a memory reference remains (either as a MEM or a pseudo that
4043 did not get a hard register), yet we can't make an optional
4044 reload, check if this is actually a pseudo register reference;
4045 we then need to emit a USE and/or a CLOBBER so that reload
4046 inheritance will do the right thing. */
4050 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4051 && reg_renumber
[REGNO (operand
)] < 0)))
4053 operand
= *recog_data
.operand_loc
[i
];
4055 while (GET_CODE (operand
) == SUBREG
)
4056 operand
= SUBREG_REG (operand
);
4057 if (REG_P (operand
))
4059 if (modified
[i
] != RELOAD_WRITE
)
4060 /* We mark the USE with QImode so that we recognize
4061 it as one that can be safely deleted at the end
4063 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4065 if (modified
[i
] != RELOAD_READ
)
4066 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
4070 else if (goal_alternative_matches
[i
] >= 0
4071 && goal_alternative_win
[goal_alternative_matches
[i
]]
4072 && modified
[i
] == RELOAD_READ
4073 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4074 && ! no_input_reloads
&& ! no_output_reloads
4077 /* Similarly, make an optional reload for a pair of matching
4078 objects that are in MEM or a pseudo that didn't get a hard reg. */
4080 rtx operand
= recog_data
.operand
[i
];
4082 while (GET_CODE (operand
) == SUBREG
)
4083 operand
= SUBREG_REG (operand
);
4084 if ((MEM_P (operand
)
4086 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4087 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
4089 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4090 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4091 recog_data
.operand
[i
],
4092 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4093 recog_data
.operand_loc
[i
],
4094 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4095 operand_mode
[goal_alternative_matches
[i
]],
4097 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4100 /* Perform whatever substitutions on the operands we are supposed
4101 to make due to commutativity or replacement of registers
4102 with equivalent constants or memory slots. */
4104 for (i
= 0; i
< noperands
; i
++)
4106 /* We only do this on the last pass through reload, because it is
4107 possible for some data (like reg_equiv_address) to be changed during
4108 later passes. Moreover, we lose the opportunity to get a useful
4109 reload_{in,out}_reg when we do these replacements. */
4113 rtx substitution
= substed_operand
[i
];
4115 *recog_data
.operand_loc
[i
] = substitution
;
4117 /* If we're replacing an operand with a LABEL_REF, we need
4118 to make sure that there's a REG_LABEL note attached to
4119 this instruction. */
4121 && GET_CODE (substitution
) == LABEL_REF
4122 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
4123 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
4124 XEXP (substitution
, 0),
4128 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4131 /* If this insn pattern contains any MATCH_DUP's, make sure that
4132 they will be substituted if the operands they match are substituted.
4133 Also do now any substitutions we already did on the operands.
4135 Don't do this if we aren't making replacements because we might be
4136 propagating things allocated by frame pointer elimination into places
4137 it doesn't expect. */
4139 if (insn_code_number
>= 0 && replace
)
4140 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4142 int opno
= recog_data
.dup_num
[i
];
4143 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4144 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4148 /* This loses because reloading of prior insns can invalidate the equivalence
4149 (or at least find_equiv_reg isn't smart enough to find it any more),
4150 causing this insn to need more reload regs than it needed before.
4151 It may be too late to make the reload regs available.
4152 Now this optimization is done safely in choose_reload_regs. */
4154 /* For each reload of a reg into some other class of reg,
4155 search for an existing equivalent reg (same value now) in the right class.
4156 We can use it as long as we don't need to change its contents. */
4157 for (i
= 0; i
< n_reloads
; i
++)
4158 if (rld
[i
].reg_rtx
== 0
4160 && REG_P (rld
[i
].in
)
4164 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
4165 static_reload_reg_p
, 0, rld
[i
].inmode
);
4166 /* Prevent generation of insn to load the value
4167 because the one we found already has the value. */
4169 rld
[i
].in
= rld
[i
].reg_rtx
;
4173 /* If we detected error and replaced asm instruction by USE, forget about the
4175 if (GET_CODE (PATTERN (insn
)) == USE
4176 && GET_CODE (XEXP (PATTERN (insn
), 0)) == CONST_INT
)
4179 /* Perhaps an output reload can be combined with another
4180 to reduce needs by one. */
4181 if (!goal_earlyclobber
)
4184 /* If we have a pair of reloads for parts of an address, they are reloading
4185 the same object, the operands themselves were not reloaded, and they
4186 are for two operands that are supposed to match, merge the reloads and
4187 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4189 for (i
= 0; i
< n_reloads
; i
++)
4193 for (j
= i
+ 1; j
< n_reloads
; j
++)
4194 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4195 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4196 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4197 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4198 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4199 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4200 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4201 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4202 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4203 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4204 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4205 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4206 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4207 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4208 || (goal_alternative_matches
[rld
[j
].opnum
]
4211 for (k
= 0; k
< n_replacements
; k
++)
4212 if (replacements
[k
].what
== j
)
4213 replacements
[k
].what
= i
;
4215 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4216 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4217 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4219 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4224 /* Scan all the reloads and update their type.
4225 If a reload is for the address of an operand and we didn't reload
4226 that operand, change the type. Similarly, change the operand number
4227 of a reload when two operands match. If a reload is optional, treat it
4228 as though the operand isn't reloaded.
4230 ??? This latter case is somewhat odd because if we do the optional
4231 reload, it means the object is hanging around. Thus we need only
4232 do the address reload if the optional reload was NOT done.
4234 Change secondary reloads to be the address type of their operand, not
4237 If an operand's reload is now RELOAD_OTHER, change any
4238 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4239 RELOAD_FOR_OTHER_ADDRESS. */
4241 for (i
= 0; i
< n_reloads
; i
++)
4243 if (rld
[i
].secondary_p
4244 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4245 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4247 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4248 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4249 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4250 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4251 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4252 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4254 /* If we have a secondary reload to go along with this reload,
4255 change its type to RELOAD_FOR_OPADDR_ADDR. */
4257 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4258 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4259 && rld
[i
].secondary_in_reload
!= -1)
4261 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4263 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4265 /* If there's a tertiary reload we have to change it also. */
4266 if (secondary_in_reload
> 0
4267 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4268 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4269 = RELOAD_FOR_OPADDR_ADDR
;
4272 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4273 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4274 && rld
[i
].secondary_out_reload
!= -1)
4276 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4278 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4280 /* If there's a tertiary reload we have to change it also. */
4281 if (secondary_out_reload
4282 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4283 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4284 = RELOAD_FOR_OPADDR_ADDR
;
4287 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4288 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4289 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4291 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4294 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4295 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4296 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4297 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4299 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4301 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4302 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4305 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4306 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4307 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4309 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4310 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4311 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4312 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4313 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4314 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4315 This is complicated by the fact that a single operand can have more
4316 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4317 choose_reload_regs without affecting code quality, and cases that
4318 actually fail are extremely rare, so it turns out to be better to fix
4319 the problem here by not generating cases that choose_reload_regs will
4321 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4322 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4324 We can reduce the register pressure by exploiting that a
4325 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4326 does not conflict with any of them, if it is only used for the first of
4327 the RELOAD_FOR_X_ADDRESS reloads. */
4329 int first_op_addr_num
= -2;
4330 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4331 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4332 int need_change
= 0;
4333 /* We use last_op_addr_reload and the contents of the above arrays
4334 first as flags - -2 means no instance encountered, -1 means exactly
4335 one instance encountered.
4336 If more than one instance has been encountered, we store the reload
4337 number of the first reload of the kind in question; reload numbers
4338 are known to be non-negative. */
4339 for (i
= 0; i
< noperands
; i
++)
4340 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4341 for (i
= n_reloads
- 1; i
>= 0; i
--)
4343 switch (rld
[i
].when_needed
)
4345 case RELOAD_FOR_OPERAND_ADDRESS
:
4346 if (++first_op_addr_num
>= 0)
4348 first_op_addr_num
= i
;
4352 case RELOAD_FOR_INPUT_ADDRESS
:
4353 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4355 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4359 case RELOAD_FOR_OUTPUT_ADDRESS
:
4360 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4362 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4373 for (i
= 0; i
< n_reloads
; i
++)
4376 enum reload_type type
;
4378 switch (rld
[i
].when_needed
)
4380 case RELOAD_FOR_OPADDR_ADDR
:
4381 first_num
= first_op_addr_num
;
4382 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4384 case RELOAD_FOR_INPADDR_ADDRESS
:
4385 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4386 type
= RELOAD_FOR_INPUT_ADDRESS
;
4388 case RELOAD_FOR_OUTADDR_ADDRESS
:
4389 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4390 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4397 else if (i
> first_num
)
4398 rld
[i
].when_needed
= type
;
4401 /* Check if the only TYPE reload that uses reload I is
4402 reload FIRST_NUM. */
4403 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4405 if (rld
[j
].when_needed
== type
4406 && (rld
[i
].secondary_p
4407 ? rld
[j
].secondary_in_reload
== i
4408 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4410 rld
[i
].when_needed
= type
;
4419 /* See if we have any reloads that are now allowed to be merged
4420 because we've changed when the reload is needed to
4421 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4422 check for the most common cases. */
4424 for (i
= 0; i
< n_reloads
; i
++)
4425 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4426 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4427 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4428 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4429 for (j
= 0; j
< n_reloads
; j
++)
4430 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4431 && rld
[j
].when_needed
== rld
[i
].when_needed
4432 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4433 && rld
[i
].class == rld
[j
].class
4434 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4435 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4437 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4438 transfer_replacements (i
, j
);
4443 /* If we made any reloads for addresses, see if they violate a
4444 "no input reloads" requirement for this insn. But loads that we
4445 do after the insn (such as for output addresses) are fine. */
4446 if (no_input_reloads
)
4447 for (i
= 0; i
< n_reloads
; i
++)
4448 gcc_assert (rld
[i
].in
== 0
4449 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4450 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4453 /* Compute reload_mode and reload_nregs. */
4454 for (i
= 0; i
< n_reloads
; i
++)
4457 = (rld
[i
].inmode
== VOIDmode
4458 || (GET_MODE_SIZE (rld
[i
].outmode
)
4459 > GET_MODE_SIZE (rld
[i
].inmode
)))
4460 ? rld
[i
].outmode
: rld
[i
].inmode
;
4462 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4465 /* Special case a simple move with an input reload and a
4466 destination of a hard reg, if the hard reg is ok, use it. */
4467 for (i
= 0; i
< n_reloads
; i
++)
4468 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4469 && GET_CODE (PATTERN (insn
)) == SET
4470 && REG_P (SET_DEST (PATTERN (insn
)))
4471 && SET_SRC (PATTERN (insn
)) == rld
[i
].in
4472 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4474 rtx dest
= SET_DEST (PATTERN (insn
));
4475 unsigned int regno
= REGNO (dest
);
4477 if (regno
< FIRST_PSEUDO_REGISTER
4478 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4479 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4481 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4484 for (nri
= 1; nri
< nr
; nri
++)
4485 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
+ nri
))
4489 rld
[i
].reg_rtx
= dest
;
4496 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4497 accepts a memory operand with constant address. */
4500 alternative_allows_memconst (const char *constraint
, int altnum
)
4503 /* Skip alternatives before the one requested. */
4506 while (*constraint
++ != ',');
4509 /* Scan the requested alternative for 'm' or 'o'.
4510 If one of them is present, this alternative accepts memory constants. */
4511 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4512 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4513 if (c
== 'm' || c
== 'o' || EXTRA_MEMORY_CONSTRAINT (c
, constraint
))
4518 /* Scan X for memory references and scan the addresses for reloading.
4519 Also checks for references to "constant" regs that we want to eliminate
4520 and replaces them with the values they stand for.
4521 We may alter X destructively if it contains a reference to such.
4522 If X is just a constant reg, we return the equivalent value
4525 IND_LEVELS says how many levels of indirect addressing this machine
4528 OPNUM and TYPE identify the purpose of the reload.
4530 IS_SET_DEST is true if X is the destination of a SET, which is not
4531 appropriate to be replaced by a constant.
4533 INSN, if nonzero, is the insn in which we do the reload. It is used
4534 to determine if we may generate output reloads, and where to put USEs
4535 for pseudos that we have to replace with stack slots.
4537 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4538 result of find_reloads_address. */
4541 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4542 int ind_levels
, int is_set_dest
, rtx insn
,
4543 int *address_reloaded
)
4545 RTX_CODE code
= GET_CODE (x
);
4547 const char *fmt
= GET_RTX_FORMAT (code
);
4553 /* This code is duplicated for speed in find_reloads. */
4554 int regno
= REGNO (x
);
4555 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4556 x
= reg_equiv_constant
[regno
];
4558 /* This creates (subreg (mem...)) which would cause an unnecessary
4559 reload of the mem. */
4560 else if (reg_equiv_mem
[regno
] != 0)
4561 x
= reg_equiv_mem
[regno
];
4563 else if (reg_equiv_memory_loc
[regno
]
4564 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4566 rtx mem
= make_memloc (x
, regno
);
4567 if (reg_equiv_address
[regno
]
4568 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4570 /* If this is not a toplevel operand, find_reloads doesn't see
4571 this substitution. We have to emit a USE of the pseudo so
4572 that delete_output_reload can see it. */
4573 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4574 /* We mark the USE with QImode so that we recognize it
4575 as one that can be safely deleted at the end of
4577 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4580 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4581 opnum
, type
, ind_levels
, insn
);
4582 if (!rtx_equal_p (x
, mem
))
4583 push_reg_equiv_alt_mem (regno
, x
);
4584 if (address_reloaded
)
4585 *address_reloaded
= i
;
4594 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4595 opnum
, type
, ind_levels
, insn
);
4596 if (address_reloaded
)
4597 *address_reloaded
= i
;
4602 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4604 /* Check for SUBREG containing a REG that's equivalent to a
4605 constant. If the constant has a known value, truncate it
4606 right now. Similarly if we are extracting a single-word of a
4607 multi-word constant. If the constant is symbolic, allow it
4608 to be substituted normally. push_reload will strip the
4609 subreg later. The constant must not be VOIDmode, because we
4610 will lose the mode of the register (this should never happen
4611 because one of the cases above should handle it). */
4613 int regno
= REGNO (SUBREG_REG (x
));
4616 if (subreg_lowpart_p (x
)
4617 && regno
>= FIRST_PSEUDO_REGISTER
4618 && reg_renumber
[regno
] < 0
4619 && reg_equiv_constant
[regno
] != 0
4620 && (tem
= gen_lowpart_common (GET_MODE (x
),
4621 reg_equiv_constant
[regno
])) != 0)
4624 if (regno
>= FIRST_PSEUDO_REGISTER
4625 && reg_renumber
[regno
] < 0
4626 && reg_equiv_constant
[regno
] != 0)
4629 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant
[regno
],
4630 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4635 /* If the subreg contains a reg that will be converted to a mem,
4636 convert the subreg to a narrower memref now.
4637 Otherwise, we would get (subreg (mem ...) ...),
4638 which would force reload of the mem.
4640 We also need to do this if there is an equivalent MEM that is
4641 not offsettable. In that case, alter_subreg would produce an
4642 invalid address on big-endian machines.
4644 For machines that extend byte loads, we must not reload using
4645 a wider mode if we have a paradoxical SUBREG. find_reloads will
4646 force a reload in that case. So we should not do anything here. */
4648 if (regno
>= FIRST_PSEUDO_REGISTER
4649 #ifdef LOAD_EXTEND_OP
4650 && (GET_MODE_SIZE (GET_MODE (x
))
4651 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4653 && (reg_equiv_address
[regno
] != 0
4654 || (reg_equiv_mem
[regno
] != 0
4655 && (! strict_memory_address_p (GET_MODE (x
),
4656 XEXP (reg_equiv_mem
[regno
], 0))
4657 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4658 || num_not_at_initial_offset
))))
4659 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4663 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4667 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4668 ind_levels
, is_set_dest
, insn
,
4670 /* If we have replaced a reg with it's equivalent memory loc -
4671 that can still be handled here e.g. if it's in a paradoxical
4672 subreg - we must make the change in a copy, rather than using
4673 a destructive change. This way, find_reloads can still elect
4674 not to do the change. */
4675 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4677 x
= shallow_copy_rtx (x
);
4680 XEXP (x
, i
) = new_part
;
4686 /* Return a mem ref for the memory equivalent of reg REGNO.
4687 This mem ref is not shared with anything. */
4690 make_memloc (rtx ad
, int regno
)
4692 /* We must rerun eliminate_regs, in case the elimination
4693 offsets have changed. */
4695 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4697 /* If TEM might contain a pseudo, we must copy it to avoid
4698 modifying it when we do the substitution for the reload. */
4699 if (rtx_varies_p (tem
, 0))
4700 tem
= copy_rtx (tem
);
4702 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4703 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4705 /* Copy the result if it's still the same as the equivalence, to avoid
4706 modifying it when we do the substitution for the reload. */
4707 if (tem
== reg_equiv_memory_loc
[regno
])
4708 tem
= copy_rtx (tem
);
4712 /* Returns true if AD could be turned into a valid memory reference
4713 to mode MODE by reloading the part pointed to by PART into a
4717 maybe_memory_address_p (enum machine_mode mode
, rtx ad
, rtx
*part
)
4721 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4724 retv
= memory_address_p (mode
, ad
);
4730 /* Record all reloads needed for handling memory address AD
4731 which appears in *LOC in a memory reference to mode MODE
4732 which itself is found in location *MEMREFLOC.
4733 Note that we take shortcuts assuming that no multi-reg machine mode
4734 occurs as part of an address.
4736 OPNUM and TYPE specify the purpose of this reload.
4738 IND_LEVELS says how many levels of indirect addressing this machine
4741 INSN, if nonzero, is the insn in which we do the reload. It is used
4742 to determine if we may generate output reloads, and where to put USEs
4743 for pseudos that we have to replace with stack slots.
4745 Value is one if this address is reloaded or replaced as a whole; it is
4746 zero if the top level of this address was not reloaded or replaced, and
4747 it is -1 if it may or may not have been reloaded or replaced.
4749 Note that there is no verification that the address will be valid after
4750 this routine does its work. Instead, we rely on the fact that the address
4751 was valid when reload started. So we need only undo things that reload
4752 could have broken. These are wrong register types, pseudos not allocated
4753 to a hard register, and frame pointer elimination. */
4756 find_reloads_address (enum machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4757 rtx
*loc
, int opnum
, enum reload_type type
,
4758 int ind_levels
, rtx insn
)
4761 int removed_and
= 0;
4765 /* If the address is a register, see if it is a legitimate address and
4766 reload if not. We first handle the cases where we need not reload
4767 or where we must reload in a non-standard way. */
4773 /* If the register is equivalent to an invariant expression, substitute
4774 the invariant, and eliminate any eliminable register references. */
4775 tem
= reg_equiv_constant
[regno
];
4777 && (tem
= eliminate_regs (tem
, mode
, insn
))
4778 && strict_memory_address_p (mode
, tem
))
4784 tem
= reg_equiv_memory_loc
[regno
];
4787 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4789 tem
= make_memloc (ad
, regno
);
4790 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4794 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4795 &XEXP (tem
, 0), opnum
,
4796 ADDR_TYPE (type
), ind_levels
, insn
);
4797 if (!rtx_equal_p (tem
, orig
))
4798 push_reg_equiv_alt_mem (regno
, tem
);
4800 /* We can avoid a reload if the register's equivalent memory
4801 expression is valid as an indirect memory address.
4802 But not all addresses are valid in a mem used as an indirect
4803 address: only reg or reg+constant. */
4806 && strict_memory_address_p (mode
, tem
)
4807 && (REG_P (XEXP (tem
, 0))
4808 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4809 && REG_P (XEXP (XEXP (tem
, 0), 0))
4810 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4812 /* TEM is not the same as what we'll be replacing the
4813 pseudo with after reload, put a USE in front of INSN
4814 in the final reload pass. */
4816 && num_not_at_initial_offset
4817 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4820 /* We mark the USE with QImode so that we
4821 recognize it as one that can be safely
4822 deleted at the end of reload. */
4823 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4826 /* This doesn't really count as replacing the address
4827 as a whole, since it is still a memory access. */
4835 /* The only remaining case where we can avoid a reload is if this is a
4836 hard register that is valid as a base register and which is not the
4837 subject of a CLOBBER in this insn. */
4839 else if (regno
< FIRST_PSEUDO_REGISTER
4840 && regno_ok_for_base_p (regno
, mode
, MEM
, SCRATCH
)
4841 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4844 /* If we do not have one of the cases above, we must do the reload. */
4845 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, base_reg_class (mode
, MEM
, SCRATCH
),
4846 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4850 if (strict_memory_address_p (mode
, ad
))
4852 /* The address appears valid, so reloads are not needed.
4853 But the address may contain an eliminable register.
4854 This can happen because a machine with indirect addressing
4855 may consider a pseudo register by itself a valid address even when
4856 it has failed to get a hard reg.
4857 So do a tree-walk to find and eliminate all such regs. */
4859 /* But first quickly dispose of a common case. */
4860 if (GET_CODE (ad
) == PLUS
4861 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4862 && REG_P (XEXP (ad
, 0))
4863 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4866 subst_reg_equivs_changed
= 0;
4867 *loc
= subst_reg_equivs (ad
, insn
);
4869 if (! subst_reg_equivs_changed
)
4872 /* Check result for validity after substitution. */
4873 if (strict_memory_address_p (mode
, ad
))
4877 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4882 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4887 *memrefloc
= copy_rtx (*memrefloc
);
4888 XEXP (*memrefloc
, 0) = ad
;
4889 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4895 /* The address is not valid. We have to figure out why. First see if
4896 we have an outer AND and remove it if so. Then analyze what's inside. */
4898 if (GET_CODE (ad
) == AND
)
4901 loc
= &XEXP (ad
, 0);
4905 /* One possibility for why the address is invalid is that it is itself
4906 a MEM. This can happen when the frame pointer is being eliminated, a
4907 pseudo is not allocated to a hard register, and the offset between the
4908 frame and stack pointers is not its initial value. In that case the
4909 pseudo will have been replaced by a MEM referring to the
4913 /* First ensure that the address in this MEM is valid. Then, unless
4914 indirect addresses are valid, reload the MEM into a register. */
4916 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4917 opnum
, ADDR_TYPE (type
),
4918 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4920 /* If tem was changed, then we must create a new memory reference to
4921 hold it and store it back into memrefloc. */
4922 if (tem
!= ad
&& memrefloc
)
4924 *memrefloc
= copy_rtx (*memrefloc
);
4925 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4926 loc
= &XEXP (*memrefloc
, 0);
4928 loc
= &XEXP (*loc
, 0);
4931 /* Check similar cases as for indirect addresses as above except
4932 that we can allow pseudos and a MEM since they should have been
4933 taken care of above. */
4936 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4937 || MEM_P (XEXP (tem
, 0))
4938 || ! (REG_P (XEXP (tem
, 0))
4939 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4940 && REG_P (XEXP (XEXP (tem
, 0), 0))
4941 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4943 /* Must use TEM here, not AD, since it is the one that will
4944 have any subexpressions reloaded, if needed. */
4945 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4946 base_reg_class (mode
, MEM
, SCRATCH
), GET_MODE (tem
),
4949 return ! removed_and
;
4955 /* If we have address of a stack slot but it's not valid because the
4956 displacement is too large, compute the sum in a register.
4957 Handle all base registers here, not just fp/ap/sp, because on some
4958 targets (namely SH) we can also get too large displacements from
4959 big-endian corrections. */
4960 else if (GET_CODE (ad
) == PLUS
4961 && REG_P (XEXP (ad
, 0))
4962 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4963 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4964 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, PLUS
,
4968 /* Unshare the MEM rtx so we can safely alter it. */
4971 *memrefloc
= copy_rtx (*memrefloc
);
4972 loc
= &XEXP (*memrefloc
, 0);
4974 loc
= &XEXP (*loc
, 0);
4977 if (double_reg_address_ok
)
4979 /* Unshare the sum as well. */
4980 *loc
= ad
= copy_rtx (ad
);
4982 /* Reload the displacement into an index reg.
4983 We assume the frame pointer or arg pointer is a base reg. */
4984 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4985 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4991 /* If the sum of two regs is not necessarily valid,
4992 reload the sum into a base reg.
4993 That will at least work. */
4994 find_reloads_address_part (ad
, loc
,
4995 base_reg_class (mode
, MEM
, SCRATCH
),
4996 Pmode
, opnum
, type
, ind_levels
);
4998 return ! removed_and
;
5001 /* If we have an indexed stack slot, there are three possible reasons why
5002 it might be invalid: The index might need to be reloaded, the address
5003 might have been made by frame pointer elimination and hence have a
5004 constant out of range, or both reasons might apply.
5006 We can easily check for an index needing reload, but even if that is the
5007 case, we might also have an invalid constant. To avoid making the
5008 conservative assumption and requiring two reloads, we see if this address
5009 is valid when not interpreted strictly. If it is, the only problem is
5010 that the index needs a reload and find_reloads_address_1 will take care
5013 Handle all base registers here, not just fp/ap/sp, because on some
5014 targets (namely SPARC) we can also get invalid addresses from preventive
5015 subreg big-endian corrections made by find_reloads_toplev. We
5016 can also get expressions involving LO_SUM (rather than PLUS) from
5017 find_reloads_subreg_address.
5019 If we decide to do something, it must be that `double_reg_address_ok'
5020 is true. We generate a reload of the base register + constant and
5021 rework the sum so that the reload register will be added to the index.
5022 This is safe because we know the address isn't shared.
5024 We check for the base register as both the first and second operand of
5025 the innermost PLUS and/or LO_SUM. */
5027 for (op_index
= 0; op_index
< 2; ++op_index
)
5029 rtx operand
, addend
;
5030 enum rtx_code inner_code
;
5032 if (GET_CODE (ad
) != PLUS
)
5035 inner_code
= GET_CODE (XEXP (ad
, 0));
5036 if (!(GET_CODE (ad
) == PLUS
5037 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
5038 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5041 operand
= XEXP (XEXP (ad
, 0), op_index
);
5042 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5045 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5047 if ((regno_ok_for_base_p (REGNO (operand
), mode
, inner_code
,
5049 || operand
== frame_pointer_rtx
5050 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5051 || operand
== hard_frame_pointer_rtx
5053 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5054 || operand
== arg_pointer_rtx
5056 || operand
== stack_pointer_rtx
)
5057 && ! maybe_memory_address_p (mode
, ad
,
5058 &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5063 offset_reg
= plus_constant (operand
, INTVAL (XEXP (ad
, 1)));
5065 /* Form the adjusted address. */
5066 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5067 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5068 op_index
== 0 ? offset_reg
: addend
,
5069 op_index
== 0 ? addend
: offset_reg
);
5071 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5072 op_index
== 0 ? offset_reg
: addend
,
5073 op_index
== 0 ? addend
: offset_reg
);
5076 cls
= base_reg_class (mode
, MEM
, GET_CODE (addend
));
5077 find_reloads_address_part (XEXP (ad
, op_index
),
5078 &XEXP (ad
, op_index
), cls
,
5079 GET_MODE (ad
), opnum
, type
, ind_levels
);
5080 find_reloads_address_1 (mode
,
5081 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5082 GET_CODE (XEXP (ad
, op_index
)),
5083 &XEXP (ad
, 1 - op_index
), opnum
,
5090 /* See if address becomes valid when an eliminable register
5091 in a sum is replaced. */
5094 if (GET_CODE (ad
) == PLUS
)
5095 tem
= subst_indexed_address (ad
);
5096 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
5098 /* Ok, we win that way. Replace any additional eliminable
5101 subst_reg_equivs_changed
= 0;
5102 tem
= subst_reg_equivs (tem
, insn
);
5104 /* Make sure that didn't make the address invalid again. */
5106 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
5113 /* If constants aren't valid addresses, reload the constant address
5115 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
5117 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5118 Unshare it so we can safely alter it. */
5119 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5120 && CONSTANT_POOL_ADDRESS_P (ad
))
5122 *memrefloc
= copy_rtx (*memrefloc
);
5123 loc
= &XEXP (*memrefloc
, 0);
5125 loc
= &XEXP (*loc
, 0);
5128 find_reloads_address_part (ad
, loc
, base_reg_class (mode
, MEM
, SCRATCH
),
5129 Pmode
, opnum
, type
, ind_levels
);
5130 return ! removed_and
;
5133 return find_reloads_address_1 (mode
, ad
, 0, MEM
, SCRATCH
, loc
, opnum
, type
,
5137 /* Find all pseudo regs appearing in AD
5138 that are eliminable in favor of equivalent values
5139 and do not have hard regs; replace them by their equivalents.
5140 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5141 front of it for pseudos that we have to replace with stack slots. */
5144 subst_reg_equivs (rtx ad
, rtx insn
)
5146 RTX_CODE code
= GET_CODE (ad
);
5165 int regno
= REGNO (ad
);
5167 if (reg_equiv_constant
[regno
] != 0)
5169 subst_reg_equivs_changed
= 1;
5170 return reg_equiv_constant
[regno
];
5172 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
5174 rtx mem
= make_memloc (ad
, regno
);
5175 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
5177 subst_reg_equivs_changed
= 1;
5178 /* We mark the USE with QImode so that we recognize it
5179 as one that can be safely deleted at the end of
5181 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5190 /* Quickly dispose of a common case. */
5191 if (XEXP (ad
, 0) == frame_pointer_rtx
5192 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
5200 fmt
= GET_RTX_FORMAT (code
);
5201 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5203 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5207 /* Compute the sum of X and Y, making canonicalizations assumed in an
5208 address, namely: sum constant integers, surround the sum of two
5209 constants with a CONST, put the constant as the second operand, and
5210 group the constant on the outermost sum.
5212 This routine assumes both inputs are already in canonical form. */
5215 form_sum (rtx x
, rtx y
)
5218 enum machine_mode mode
= GET_MODE (x
);
5220 if (mode
== VOIDmode
)
5221 mode
= GET_MODE (y
);
5223 if (mode
== VOIDmode
)
5226 if (GET_CODE (x
) == CONST_INT
)
5227 return plus_constant (y
, INTVAL (x
));
5228 else if (GET_CODE (y
) == CONST_INT
)
5229 return plus_constant (x
, INTVAL (y
));
5230 else if (CONSTANT_P (x
))
5231 tem
= x
, x
= y
, y
= tem
;
5233 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5234 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5236 /* Note that if the operands of Y are specified in the opposite
5237 order in the recursive calls below, infinite recursion will occur. */
5238 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5239 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5241 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5242 constant will have been placed second. */
5243 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5245 if (GET_CODE (x
) == CONST
)
5247 if (GET_CODE (y
) == CONST
)
5250 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5253 return gen_rtx_PLUS (mode
, x
, y
);
5256 /* If ADDR is a sum containing a pseudo register that should be
5257 replaced with a constant (from reg_equiv_constant),
5258 return the result of doing so, and also apply the associative
5259 law so that the result is more likely to be a valid address.
5260 (But it is not guaranteed to be one.)
5262 Note that at most one register is replaced, even if more are
5263 replaceable. Also, we try to put the result into a canonical form
5264 so it is more likely to be a valid address.
5266 In all other cases, return ADDR. */
5269 subst_indexed_address (rtx addr
)
5271 rtx op0
= 0, op1
= 0, op2
= 0;
5275 if (GET_CODE (addr
) == PLUS
)
5277 /* Try to find a register to replace. */
5278 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5280 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5281 && reg_renumber
[regno
] < 0
5282 && reg_equiv_constant
[regno
] != 0)
5283 op0
= reg_equiv_constant
[regno
];
5284 else if (REG_P (op1
)
5285 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5286 && reg_renumber
[regno
] < 0
5287 && reg_equiv_constant
[regno
] != 0)
5288 op1
= reg_equiv_constant
[regno
];
5289 else if (GET_CODE (op0
) == PLUS
5290 && (tem
= subst_indexed_address (op0
)) != op0
)
5292 else if (GET_CODE (op1
) == PLUS
5293 && (tem
= subst_indexed_address (op1
)) != op1
)
5298 /* Pick out up to three things to add. */
5299 if (GET_CODE (op1
) == PLUS
)
5300 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5301 else if (GET_CODE (op0
) == PLUS
)
5302 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5304 /* Compute the sum. */
5306 op1
= form_sum (op1
, op2
);
5308 op0
= form_sum (op0
, op1
);
5315 /* Update the REG_INC notes for an insn. It updates all REG_INC
5316 notes for the instruction which refer to REGNO the to refer
5317 to the reload number.
5319 INSN is the insn for which any REG_INC notes need updating.
5321 REGNO is the register number which has been reloaded.
5323 RELOADNUM is the reload number. */
5326 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5327 int reloadnum ATTRIBUTE_UNUSED
)
5332 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5333 if (REG_NOTE_KIND (link
) == REG_INC
5334 && (int) REGNO (XEXP (link
, 0)) == regno
)
5335 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5339 /* Record the pseudo registers we must reload into hard registers in a
5340 subexpression of a would-be memory address, X referring to a value
5341 in mode MODE. (This function is not called if the address we find
5344 CONTEXT = 1 means we are considering regs as index regs,
5345 = 0 means we are considering them as base regs.
5346 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5348 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5349 is the code of the index part of the address. Otherwise, pass SCRATCH
5351 OPNUM and TYPE specify the purpose of any reloads made.
5353 IND_LEVELS says how many levels of indirect addressing are
5354 supported at this point in the address.
5356 INSN, if nonzero, is the insn in which we do the reload. It is used
5357 to determine if we may generate output reloads.
5359 We return nonzero if X, as a whole, is reloaded or replaced. */
5361 /* Note that we take shortcuts assuming that no multi-reg machine mode
5362 occurs as part of an address.
5363 Also, this is not fully machine-customizable; it works for machines
5364 such as VAXen and 68000's and 32000's, but other possible machines
5365 could have addressing modes that this does not handle right.
5366 If you add push_reload calls here, you need to make sure gen_reload
5367 handles those cases gracefully. */
5370 find_reloads_address_1 (enum machine_mode mode
, rtx x
, int context
,
5371 enum rtx_code outer_code
, enum rtx_code index_code
,
5372 rtx
*loc
, int opnum
, enum reload_type type
,
5373 int ind_levels
, rtx insn
)
5375 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5377 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5378 : REGNO_OK_FOR_INDEX_P (REGNO))
5380 enum reg_class context_reg_class
;
5381 RTX_CODE code
= GET_CODE (x
);
5384 context_reg_class
= INDEX_REG_CLASS
;
5386 context_reg_class
= base_reg_class (mode
, outer_code
, index_code
);
5392 rtx orig_op0
= XEXP (x
, 0);
5393 rtx orig_op1
= XEXP (x
, 1);
5394 RTX_CODE code0
= GET_CODE (orig_op0
);
5395 RTX_CODE code1
= GET_CODE (orig_op1
);
5399 if (GET_CODE (op0
) == SUBREG
)
5401 op0
= SUBREG_REG (op0
);
5402 code0
= GET_CODE (op0
);
5403 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5404 op0
= gen_rtx_REG (word_mode
,
5406 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5407 GET_MODE (SUBREG_REG (orig_op0
)),
5408 SUBREG_BYTE (orig_op0
),
5409 GET_MODE (orig_op0
))));
5412 if (GET_CODE (op1
) == SUBREG
)
5414 op1
= SUBREG_REG (op1
);
5415 code1
= GET_CODE (op1
);
5416 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5417 /* ??? Why is this given op1's mode and above for
5418 ??? op0 SUBREGs we use word_mode? */
5419 op1
= gen_rtx_REG (GET_MODE (op1
),
5421 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5422 GET_MODE (SUBREG_REG (orig_op1
)),
5423 SUBREG_BYTE (orig_op1
),
5424 GET_MODE (orig_op1
))));
5426 /* Plus in the index register may be created only as a result of
5427 register rematerialization for expression like &localvar*4. Reload it.
5428 It may be possible to combine the displacement on the outer level,
5429 but it is probably not worthwhile to do so. */
5432 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5433 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5434 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5436 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5440 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5441 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5443 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5444 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5446 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, code0
,
5447 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5451 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5452 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5454 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, code1
,
5455 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5457 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5458 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5462 else if (code0
== CONST_INT
|| code0
== CONST
5463 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5464 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, code0
,
5465 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5468 else if (code1
== CONST_INT
|| code1
== CONST
5469 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5470 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, code1
,
5471 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5474 else if (code0
== REG
&& code1
== REG
)
5476 if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5477 && regno_ok_for_base_p (REGNO (op1
), mode
, PLUS
, REG
))
5479 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5480 && regno_ok_for_base_p (REGNO (op0
), mode
, PLUS
, REG
))
5482 else if (regno_ok_for_base_p (REGNO (op1
), mode
, PLUS
, REG
))
5483 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5484 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5486 else if (regno_ok_for_base_p (REGNO (op0
), mode
, PLUS
, REG
))
5487 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5488 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5490 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5491 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5492 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5494 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5495 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5496 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5500 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5501 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5503 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5504 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5509 else if (code0
== REG
)
5511 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5512 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5514 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5515 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5519 else if (code1
== REG
)
5521 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5522 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5524 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5525 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5535 rtx op0
= XEXP (x
, 0);
5536 rtx op1
= XEXP (x
, 1);
5537 enum rtx_code index_code
;
5541 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5544 /* Currently, we only support {PRE,POST}_MODIFY constructs
5545 where a base register is {inc,dec}remented by the contents
5546 of another register or by a constant value. Thus, these
5547 operands must match. */
5548 gcc_assert (op0
== XEXP (op1
, 0));
5550 /* Require index register (or constant). Let's just handle the
5551 register case in the meantime... If the target allows
5552 auto-modify by a constant then we could try replacing a pseudo
5553 register with its equivalent constant where applicable.
5555 We also handle the case where the register was eliminated
5556 resulting in a PLUS subexpression.
5558 If we later decide to reload the whole PRE_MODIFY or
5559 POST_MODIFY, inc_for_reload might clobber the reload register
5560 before reading the index. The index register might therefore
5561 need to live longer than a TYPE reload normally would, so be
5562 conservative and class it as RELOAD_OTHER. */
5563 if ((REG_P (XEXP (op1
, 1))
5564 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5565 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5566 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5567 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5570 gcc_assert (REG_P (XEXP (op1
, 0)));
5572 regno
= REGNO (XEXP (op1
, 0));
5573 index_code
= GET_CODE (XEXP (op1
, 1));
5575 /* A register that is incremented cannot be constant! */
5576 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5577 || reg_equiv_constant
[regno
] == 0);
5579 /* Handle a register that is equivalent to a memory location
5580 which cannot be addressed directly. */
5581 if (reg_equiv_memory_loc
[regno
] != 0
5582 && (reg_equiv_address
[regno
] != 0
5583 || num_not_at_initial_offset
))
5585 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5587 if (reg_equiv_address
[regno
]
5588 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5592 /* First reload the memory location's address.
5593 We can't use ADDR_TYPE (type) here, because we need to
5594 write back the value after reading it, hence we actually
5595 need two registers. */
5596 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5597 &XEXP (tem
, 0), opnum
,
5601 if (!rtx_equal_p (tem
, orig
))
5602 push_reg_equiv_alt_mem (regno
, tem
);
5604 /* Then reload the memory location into a base
5606 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5608 base_reg_class (mode
, code
,
5610 GET_MODE (x
), GET_MODE (x
), 0,
5611 0, opnum
, RELOAD_OTHER
);
5613 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5618 if (reg_renumber
[regno
] >= 0)
5619 regno
= reg_renumber
[regno
];
5621 /* We require a base register here... */
5622 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), code
, index_code
))
5624 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5625 &XEXP (op1
, 0), &XEXP (x
, 0),
5626 base_reg_class (mode
, code
, index_code
),
5627 GET_MODE (x
), GET_MODE (x
), 0, 0,
5628 opnum
, RELOAD_OTHER
);
5630 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5640 if (REG_P (XEXP (x
, 0)))
5642 int regno
= REGNO (XEXP (x
, 0));
5646 /* A register that is incremented cannot be constant! */
5647 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5648 || reg_equiv_constant
[regno
] == 0);
5650 /* Handle a register that is equivalent to a memory location
5651 which cannot be addressed directly. */
5652 if (reg_equiv_memory_loc
[regno
] != 0
5653 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5655 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5656 if (reg_equiv_address
[regno
]
5657 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5661 /* First reload the memory location's address.
5662 We can't use ADDR_TYPE (type) here, because we need to
5663 write back the value after reading it, hence we actually
5664 need two registers. */
5665 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5666 &XEXP (tem
, 0), opnum
, type
,
5668 if (!rtx_equal_p (tem
, orig
))
5669 push_reg_equiv_alt_mem (regno
, tem
);
5670 /* Put this inside a new increment-expression. */
5671 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5672 /* Proceed to reload that, as if it contained a register. */
5676 /* If we have a hard register that is ok as an index,
5677 don't make a reload. If an autoincrement of a nice register
5678 isn't "valid", it must be that no autoincrement is "valid".
5679 If that is true and something made an autoincrement anyway,
5680 this must be a special context where one is allowed.
5681 (For example, a "push" instruction.)
5682 We can't improve this address, so leave it alone. */
5684 /* Otherwise, reload the autoincrement into a suitable hard reg
5685 and record how much to increment by. */
5687 if (reg_renumber
[regno
] >= 0)
5688 regno
= reg_renumber
[regno
];
5689 if (regno
>= FIRST_PSEUDO_REGISTER
5690 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5695 /* If we can output the register afterwards, do so, this
5696 saves the extra update.
5697 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5698 CALL_INSN - and it does not set CC0.
5699 But don't do this if we cannot directly address the
5700 memory location, since this will make it harder to
5701 reuse address reloads, and increases register pressure.
5702 Also don't do this if we can probably update x directly. */
5703 rtx equiv
= (MEM_P (XEXP (x
, 0))
5705 : reg_equiv_mem
[regno
]);
5706 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5707 if (insn
&& NONJUMP_INSN_P (insn
) && equiv
5708 && memory_operand (equiv
, GET_MODE (equiv
))
5710 && ! sets_cc0_p (PATTERN (insn
))
5712 && ! (icode
!= CODE_FOR_nothing
5713 && ((*insn_data
[icode
].operand
[0].predicate
)
5715 && ((*insn_data
[icode
].operand
[1].predicate
)
5718 /* We use the original pseudo for loc, so that
5719 emit_reload_insns() knows which pseudo this
5720 reload refers to and updates the pseudo rtx, not
5721 its equivalent memory location, as well as the
5722 corresponding entry in reg_last_reload_reg. */
5723 loc
= &XEXP (x_orig
, 0);
5726 = push_reload (x
, x
, loc
, loc
,
5728 GET_MODE (x
), GET_MODE (x
), 0, 0,
5729 opnum
, RELOAD_OTHER
);
5734 = push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5736 GET_MODE (x
), GET_MODE (x
), 0, 0,
5739 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5744 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5754 /* Look for parts to reload in the inner expression and reload them
5755 too, in addition to this operation. Reloading all inner parts in
5756 addition to this one shouldn't be necessary, but at this point,
5757 we don't know if we can possibly omit any part that *can* be
5758 reloaded. Targets that are better off reloading just either part
5759 (or perhaps even a different part of an outer expression), should
5760 define LEGITIMIZE_RELOAD_ADDRESS. */
5761 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), XEXP (x
, 0),
5762 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5763 type
, ind_levels
, insn
);
5764 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5766 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5770 /* This is probably the result of a substitution, by eliminate_regs, of
5771 an equivalent address for a pseudo that was not allocated to a hard
5772 register. Verify that the specified address is valid and reload it
5775 Since we know we are going to reload this item, don't decrement for
5776 the indirection level.
5778 Note that this is actually conservative: it would be slightly more
5779 efficient to use the value of SPILL_INDIRECT_LEVELS from
5782 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5783 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5784 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5786 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5791 int regno
= REGNO (x
);
5793 if (reg_equiv_constant
[regno
] != 0)
5795 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5797 GET_MODE (x
), opnum
, type
, ind_levels
);
5801 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5802 that feeds this insn. */
5803 if (reg_equiv_mem
[regno
] != 0)
5805 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5807 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5812 if (reg_equiv_memory_loc
[regno
]
5813 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5815 rtx tem
= make_memloc (x
, regno
);
5816 if (reg_equiv_address
[regno
] != 0
5817 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5820 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5821 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5823 if (!rtx_equal_p (x
, tem
))
5824 push_reg_equiv_alt_mem (regno
, x
);
5828 if (reg_renumber
[regno
] >= 0)
5829 regno
= reg_renumber
[regno
];
5831 if (regno
>= FIRST_PSEUDO_REGISTER
5832 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5835 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5837 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5841 /* If a register appearing in an address is the subject of a CLOBBER
5842 in this insn, reload it into some other register to be safe.
5843 The CLOBBER is supposed to make the register unavailable
5844 from before this insn to after it. */
5845 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5847 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5849 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5856 if (REG_P (SUBREG_REG (x
)))
5858 /* If this is a SUBREG of a hard register and the resulting register
5859 is of the wrong class, reload the whole SUBREG. This avoids
5860 needless copies if SUBREG_REG is multi-word. */
5861 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5863 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5865 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5868 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5870 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5874 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5875 is larger than the class size, then reload the whole SUBREG. */
5878 enum reg_class
class = context_reg_class
;
5879 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5880 > reg_class_size
[class])
5882 x
= find_reloads_subreg_address (x
, 0, opnum
,
5885 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5886 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5898 const char *fmt
= GET_RTX_FORMAT (code
);
5901 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5904 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5906 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, code
, SCRATCH
,
5907 &XEXP (x
, i
), opnum
, type
, ind_levels
, insn
);
5911 #undef REG_OK_FOR_CONTEXT
5915 /* X, which is found at *LOC, is a part of an address that needs to be
5916 reloaded into a register of class CLASS. If X is a constant, or if
5917 X is a PLUS that contains a constant, check that the constant is a
5918 legitimate operand and that we are supposed to be able to load
5919 it into the register.
5921 If not, force the constant into memory and reload the MEM instead.
5923 MODE is the mode to use, in case X is an integer constant.
5925 OPNUM and TYPE describe the purpose of any reloads made.
5927 IND_LEVELS says how many levels of indirect addressing this machine
5931 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class
class,
5932 enum machine_mode mode
, int opnum
,
5933 enum reload_type type
, int ind_levels
)
5936 && (! LEGITIMATE_CONSTANT_P (x
)
5937 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5941 tem
= x
= force_const_mem (mode
, x
);
5942 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5943 opnum
, type
, ind_levels
, 0);
5946 else if (GET_CODE (x
) == PLUS
5947 && CONSTANT_P (XEXP (x
, 1))
5948 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5949 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5953 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5954 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5955 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5956 opnum
, type
, ind_levels
, 0);
5959 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5960 mode
, VOIDmode
, 0, 0, opnum
, type
);
5963 /* X, a subreg of a pseudo, is a part of an address that needs to be
5966 If the pseudo is equivalent to a memory location that cannot be directly
5967 addressed, make the necessary address reloads.
5969 If address reloads have been necessary, or if the address is changed
5970 by register elimination, return the rtx of the memory location;
5971 otherwise, return X.
5973 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5976 OPNUM and TYPE identify the purpose of the reload.
5978 IND_LEVELS says how many levels of indirect addressing are
5979 supported at this point in the address.
5981 INSN, if nonzero, is the insn in which we do the reload. It is used
5982 to determine where to put USEs for pseudos that we have to replace with
5986 find_reloads_subreg_address (rtx x
, int force_replace
, int opnum
,
5987 enum reload_type type
, int ind_levels
, rtx insn
)
5989 int regno
= REGNO (SUBREG_REG (x
));
5991 if (reg_equiv_memory_loc
[regno
])
5993 /* If the address is not directly addressable, or if the address is not
5994 offsettable, then it must be replaced. */
5996 && (reg_equiv_address
[regno
]
5997 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
6000 if (force_replace
|| num_not_at_initial_offset
)
6002 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
6004 /* If the address changes because of register elimination, then
6005 it must be replaced. */
6007 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
6009 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
6010 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
6013 enum machine_mode orig_mode
= GET_MODE (orig
);
6016 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6017 hold the correct (negative) byte offset. */
6018 if (BYTES_BIG_ENDIAN
&& outer_size
> inner_size
)
6019 offset
= inner_size
- outer_size
;
6021 offset
= SUBREG_BYTE (x
);
6023 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
6024 PUT_MODE (tem
, GET_MODE (x
));
6026 /* If this was a paradoxical subreg that we replaced, the
6027 resulting memory must be sufficiently aligned to allow
6028 us to widen the mode of the memory. */
6029 if (outer_size
> inner_size
)
6033 base
= XEXP (tem
, 0);
6034 if (GET_CODE (base
) == PLUS
)
6036 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
6037 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
6039 base
= XEXP (base
, 0);
6042 || (REGNO_POINTER_ALIGN (REGNO (base
))
6043 < outer_size
* BITS_PER_UNIT
))
6047 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6048 XEXP (tem
, 0), &XEXP (tem
, 0),
6049 opnum
, type
, ind_levels
, insn
);
6050 /* ??? Do we need to handle nonzero offsets somehow? */
6051 if (!offset
&& !rtx_equal_p (tem
, orig
))
6052 push_reg_equiv_alt_mem (regno
, tem
);
6054 /* For some processors an address may be valid in the
6055 original mode but not in a smaller mode. For
6056 example, ARM accepts a scaled index register in
6057 SImode but not in HImode. find_reloads_address
6058 assumes that we pass it a valid address, and doesn't
6059 force a reload. This will probably be fine if
6060 find_reloads_address finds some reloads. But if it
6061 doesn't find any, then we may have just converted a
6062 valid address into an invalid one. Check for that
6065 && strict_memory_address_p (orig_mode
, XEXP (tem
, 0))
6066 && !strict_memory_address_p (GET_MODE (tem
),
6068 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6069 base_reg_class (GET_MODE (tem
), MEM
, SCRATCH
),
6070 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0,
6073 /* If this is not a toplevel operand, find_reloads doesn't see
6074 this substitution. We have to emit a USE of the pseudo so
6075 that delete_output_reload can see it. */
6076 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6077 /* We mark the USE with QImode so that we recognize it
6078 as one that can be safely deleted at the end of
6080 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
6090 /* Substitute into the current INSN the registers into which we have reloaded
6091 the things that need reloading. The array `replacements'
6092 contains the locations of all pointers that must be changed
6093 and says what to replace them with.
6095 Return the rtx that X translates into; usually X, but modified. */
6098 subst_reloads (rtx insn
)
6102 for (i
= 0; i
< n_replacements
; i
++)
6104 struct replacement
*r
= &replacements
[i
];
6105 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6109 /* This checking takes a very long time on some platforms
6110 causing the gcc.c-torture/compile/limits-fnargs.c test
6111 to time out during testing. See PR 31850.
6113 Internal consistency test. Check that we don't modify
6114 anything in the equivalence arrays. Whenever something from
6115 those arrays needs to be reloaded, it must be unshared before
6116 being substituted into; the equivalence must not be modified.
6117 Otherwise, if the equivalence is used after that, it will
6118 have been modified, and the thing substituted (probably a
6119 register) is likely overwritten and not a usable equivalence. */
6122 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6124 #define CHECK_MODF(ARRAY) \
6125 gcc_assert (!ARRAY[check_regno] \
6126 || !loc_mentioned_in_p (r->where, \
6127 ARRAY[check_regno]))
6129 CHECK_MODF (reg_equiv_constant
);
6130 CHECK_MODF (reg_equiv_memory_loc
);
6131 CHECK_MODF (reg_equiv_address
);
6132 CHECK_MODF (reg_equiv_mem
);
6135 #endif /* DEBUG_RELOAD */
6137 /* If we're replacing a LABEL_REF with a register, add a
6138 REG_LABEL note to indicate to flow which label this
6139 register refers to. */
6140 if (GET_CODE (*r
->where
) == LABEL_REF
6143 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
6144 XEXP (*r
->where
, 0),
6146 JUMP_LABEL (insn
) = XEXP (*r
->where
, 0);
6149 /* Encapsulate RELOADREG so its machine mode matches what
6150 used to be there. Note that gen_lowpart_common will
6151 do the wrong thing if RELOADREG is multi-word. RELOADREG
6152 will always be a REG here. */
6153 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6154 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6156 /* If we are putting this into a SUBREG and RELOADREG is a
6157 SUBREG, we would be making nested SUBREGs, so we have to fix
6158 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6160 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
6162 if (GET_MODE (*r
->subreg_loc
)
6163 == GET_MODE (SUBREG_REG (reloadreg
)))
6164 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
6168 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
6170 /* When working with SUBREGs the rule is that the byte
6171 offset must be a multiple of the SUBREG's mode. */
6172 final_offset
= (final_offset
/
6173 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
6174 final_offset
= (final_offset
*
6175 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
6177 *r
->where
= SUBREG_REG (reloadreg
);
6178 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
6182 *r
->where
= reloadreg
;
6184 /* If reload got no reg and isn't optional, something's wrong. */
6186 gcc_assert (rld
[r
->what
].optional
);
6190 /* Make a copy of any replacements being done into X and move those
6191 copies to locations in Y, a copy of X. */
6194 copy_replacements (rtx x
, rtx y
)
6196 /* We can't support X being a SUBREG because we might then need to know its
6197 location if something inside it was replaced. */
6198 gcc_assert (GET_CODE (x
) != SUBREG
);
6200 copy_replacements_1 (&x
, &y
, n_replacements
);
6204 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6208 struct replacement
*r
;
6212 for (j
= 0; j
< orig_replacements
; j
++)
6214 if (replacements
[j
].subreg_loc
== px
)
6216 r
= &replacements
[n_replacements
++];
6217 r
->where
= replacements
[j
].where
;
6219 r
->what
= replacements
[j
].what
;
6220 r
->mode
= replacements
[j
].mode
;
6222 else if (replacements
[j
].where
== px
)
6224 r
= &replacements
[n_replacements
++];
6227 r
->what
= replacements
[j
].what
;
6228 r
->mode
= replacements
[j
].mode
;
6234 code
= GET_CODE (x
);
6235 fmt
= GET_RTX_FORMAT (code
);
6237 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6240 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6241 else if (fmt
[i
] == 'E')
6242 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6243 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6248 /* Change any replacements being done to *X to be done to *Y. */
6251 move_replacements (rtx
*x
, rtx
*y
)
6255 for (i
= 0; i
< n_replacements
; i
++)
6256 if (replacements
[i
].subreg_loc
== x
)
6257 replacements
[i
].subreg_loc
= y
;
6258 else if (replacements
[i
].where
== x
)
6260 replacements
[i
].where
= y
;
6261 replacements
[i
].subreg_loc
= 0;
6265 /* If LOC was scheduled to be replaced by something, return the replacement.
6266 Otherwise, return *LOC. */
6269 find_replacement (rtx
*loc
)
6271 struct replacement
*r
;
6273 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6275 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6277 if (reloadreg
&& r
->where
== loc
)
6279 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6280 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
6284 else if (reloadreg
&& r
->subreg_loc
== loc
)
6286 /* RELOADREG must be either a REG or a SUBREG.
6288 ??? Is it actually still ever a SUBREG? If so, why? */
6290 if (REG_P (reloadreg
))
6291 return gen_rtx_REG (GET_MODE (*loc
),
6292 (REGNO (reloadreg
) +
6293 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6294 GET_MODE (SUBREG_REG (*loc
)),
6297 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6301 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6303 /* When working with SUBREGs the rule is that the byte
6304 offset must be a multiple of the SUBREG's mode. */
6305 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6306 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6307 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6313 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6314 what's inside and make a new rtl if so. */
6315 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6316 || GET_CODE (*loc
) == MULT
)
6318 rtx x
= find_replacement (&XEXP (*loc
, 0));
6319 rtx y
= find_replacement (&XEXP (*loc
, 1));
6321 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6322 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6328 /* Return nonzero if register in range [REGNO, ENDREGNO)
6329 appears either explicitly or implicitly in X
6330 other than being stored into (except for earlyclobber operands).
6332 References contained within the substructure at LOC do not count.
6333 LOC may be zero, meaning don't ignore anything.
6335 This is similar to refers_to_regno_p in rtlanal.c except that we
6336 look at equivalences for pseudos that didn't get hard registers. */
6339 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6351 code
= GET_CODE (x
);
6358 /* If this is a pseudo, a hard register must not have been allocated.
6359 X must therefore either be a constant or be in memory. */
6360 if (r
>= FIRST_PSEUDO_REGISTER
)
6362 if (reg_equiv_memory_loc
[r
])
6363 return refers_to_regno_for_reload_p (regno
, endregno
,
6364 reg_equiv_memory_loc
[r
],
6367 gcc_assert (reg_equiv_constant
[r
] || reg_equiv_invariant
[r
]);
6371 return (endregno
> r
6372 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6373 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6377 /* If this is a SUBREG of a hard reg, we can see exactly which
6378 registers are being modified. Otherwise, handle normally. */
6379 if (REG_P (SUBREG_REG (x
))
6380 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6382 unsigned int inner_regno
= subreg_regno (x
);
6383 unsigned int inner_endregno
6384 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6385 ? subreg_nregs (x
) : 1);
6387 return endregno
> inner_regno
&& regno
< inner_endregno
;
6393 if (&SET_DEST (x
) != loc
6394 /* Note setting a SUBREG counts as referring to the REG it is in for
6395 a pseudo but not for hard registers since we can
6396 treat each word individually. */
6397 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6398 && loc
!= &SUBREG_REG (SET_DEST (x
))
6399 && REG_P (SUBREG_REG (SET_DEST (x
)))
6400 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6401 && refers_to_regno_for_reload_p (regno
, endregno
,
6402 SUBREG_REG (SET_DEST (x
)),
6404 /* If the output is an earlyclobber operand, this is
6406 || ((!REG_P (SET_DEST (x
))
6407 || earlyclobber_operand_p (SET_DEST (x
)))
6408 && refers_to_regno_for_reload_p (regno
, endregno
,
6409 SET_DEST (x
), loc
))))
6412 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6421 /* X does not match, so try its subexpressions. */
6423 fmt
= GET_RTX_FORMAT (code
);
6424 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6426 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6434 if (refers_to_regno_for_reload_p (regno
, endregno
,
6438 else if (fmt
[i
] == 'E')
6441 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6442 if (loc
!= &XVECEXP (x
, i
, j
)
6443 && refers_to_regno_for_reload_p (regno
, endregno
,
6444 XVECEXP (x
, i
, j
), loc
))
6451 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6452 we check if any register number in X conflicts with the relevant register
6453 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6454 contains a MEM (we don't bother checking for memory addresses that can't
6455 conflict because we expect this to be a rare case.
6457 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6458 that we look at equivalences for pseudos that didn't get hard registers. */
6461 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6463 int regno
, endregno
;
6465 /* Overly conservative. */
6466 if (GET_CODE (x
) == STRICT_LOW_PART
6467 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6470 /* If either argument is a constant, then modifying X can not affect IN. */
6471 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6473 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
)
6474 return refers_to_mem_for_reload_p (in
);
6475 else if (GET_CODE (x
) == SUBREG
)
6477 regno
= REGNO (SUBREG_REG (x
));
6478 if (regno
< FIRST_PSEUDO_REGISTER
)
6479 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6480 GET_MODE (SUBREG_REG (x
)),
6483 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6484 ? subreg_nregs (x
) : 1);
6486 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6492 /* If this is a pseudo, it must not have been assigned a hard register.
6493 Therefore, it must either be in memory or be a constant. */
6495 if (regno
>= FIRST_PSEUDO_REGISTER
)
6497 if (reg_equiv_memory_loc
[regno
])
6498 return refers_to_mem_for_reload_p (in
);
6499 gcc_assert (reg_equiv_constant
[regno
]);
6503 endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
6505 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6508 return refers_to_mem_for_reload_p (in
);
6509 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6510 || GET_CODE (x
) == CC0
)
6511 return reg_mentioned_p (x
, in
);
6514 gcc_assert (GET_CODE (x
) == PLUS
);
6516 /* We actually want to know if X is mentioned somewhere inside IN.
6517 We must not say that (plus (sp) (const_int 124)) is in
6518 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6519 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6520 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6525 else if (GET_CODE (in
) == PLUS
)
6526 return (rtx_equal_p (x
, in
)
6527 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6528 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6529 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6530 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6536 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6540 refers_to_mem_for_reload_p (rtx x
)
6549 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6550 && reg_equiv_memory_loc
[REGNO (x
)]);
6552 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6553 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6555 && (MEM_P (XEXP (x
, i
))
6556 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6562 /* Check the insns before INSN to see if there is a suitable register
6563 containing the same value as GOAL.
6564 If OTHER is -1, look for a register in class CLASS.
6565 Otherwise, just see if register number OTHER shares GOAL's value.
6567 Return an rtx for the register found, or zero if none is found.
6569 If RELOAD_REG_P is (short *)1,
6570 we reject any hard reg that appears in reload_reg_rtx
6571 because such a hard reg is also needed coming into this insn.
6573 If RELOAD_REG_P is any other nonzero value,
6574 it is a vector indexed by hard reg number
6575 and we reject any hard reg whose element in the vector is nonnegative
6576 as well as any that appears in reload_reg_rtx.
6578 If GOAL is zero, then GOALREG is a register number; we look
6579 for an equivalent for that register.
6581 MODE is the machine mode of the value we want an equivalence for.
6582 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6584 This function is used by jump.c as well as in the reload pass.
6586 If GOAL is the sum of the stack pointer and a constant, we treat it
6587 as if it were a constant except that sp is required to be unchanging. */
6590 find_equiv_reg (rtx goal
, rtx insn
, enum reg_class
class, int other
,
6591 short *reload_reg_p
, int goalreg
, enum machine_mode mode
)
6594 rtx goaltry
, valtry
, value
, where
;
6600 int goal_mem_addr_varies
= 0;
6601 int need_stable_sp
= 0;
6608 else if (REG_P (goal
))
6609 regno
= REGNO (goal
);
6610 else if (MEM_P (goal
))
6612 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6613 if (MEM_VOLATILE_P (goal
))
6615 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6617 /* An address with side effects must be reexecuted. */
6632 else if (CONSTANT_P (goal
))
6634 else if (GET_CODE (goal
) == PLUS
6635 && XEXP (goal
, 0) == stack_pointer_rtx
6636 && CONSTANT_P (XEXP (goal
, 1)))
6637 goal_const
= need_stable_sp
= 1;
6638 else if (GET_CODE (goal
) == PLUS
6639 && XEXP (goal
, 0) == frame_pointer_rtx
6640 && CONSTANT_P (XEXP (goal
, 1)))
6646 /* Scan insns back from INSN, looking for one that copies
6647 a value into or out of GOAL.
6648 Stop and give up if we reach a label. */
6654 if (p
== 0 || LABEL_P (p
)
6655 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6658 if (NONJUMP_INSN_P (p
)
6659 /* If we don't want spill regs ... */
6660 && (! (reload_reg_p
!= 0
6661 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6662 /* ... then ignore insns introduced by reload; they aren't
6663 useful and can cause results in reload_as_needed to be
6664 different from what they were when calculating the need for
6665 spills. If we notice an input-reload insn here, we will
6666 reject it below, but it might hide a usable equivalent.
6667 That makes bad code. It may even fail: perhaps no reg was
6668 spilled for this insn because it was assumed we would find
6670 || INSN_UID (p
) < reload_first_uid
))
6673 pat
= single_set (p
);
6675 /* First check for something that sets some reg equal to GOAL. */
6678 && true_regnum (SET_SRC (pat
)) == regno
6679 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6682 && true_regnum (SET_DEST (pat
)) == regno
6683 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6685 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6686 /* When looking for stack pointer + const,
6687 make sure we don't use a stack adjust. */
6688 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6689 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6691 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6692 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6694 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6695 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6696 /* If we are looking for a constant,
6697 and something equivalent to that constant was copied
6698 into a reg, we can use that reg. */
6699 || (goal_const
&& REG_NOTES (p
) != 0
6700 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6701 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6703 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6704 || (REG_P (SET_DEST (pat
))
6705 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6706 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6707 && GET_CODE (goal
) == CONST_INT
6709 = operand_subword (XEXP (tem
, 0), 0, 0,
6711 && rtx_equal_p (goal
, goaltry
)
6713 = operand_subword (SET_DEST (pat
), 0, 0,
6715 && (valueno
= true_regnum (valtry
)) >= 0)))
6716 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6718 && REG_P (SET_DEST (pat
))
6719 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6720 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6721 && GET_CODE (goal
) == CONST_INT
6722 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6724 && rtx_equal_p (goal
, goaltry
)
6726 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6727 && (valueno
= true_regnum (valtry
)) >= 0)))
6731 if (valueno
!= other
)
6734 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6740 for (i
= hard_regno_nregs
[valueno
][mode
] - 1; i
>= 0; i
--)
6741 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6754 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6755 (or copying VALUE into GOAL, if GOAL is also a register).
6756 Now verify that VALUE is really valid. */
6758 /* VALUENO is the register number of VALUE; a hard register. */
6760 /* Don't try to re-use something that is killed in this insn. We want
6761 to be able to trust REG_UNUSED notes. */
6762 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6765 /* If we propose to get the value from the stack pointer or if GOAL is
6766 a MEM based on the stack pointer, we need a stable SP. */
6767 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6768 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6772 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6773 if (GET_MODE (value
) != mode
)
6776 /* Reject VALUE if it was loaded from GOAL
6777 and is also a register that appears in the address of GOAL. */
6779 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6780 && refers_to_regno_for_reload_p (valueno
,
6782 + hard_regno_nregs
[valueno
][mode
]),
6786 /* Reject registers that overlap GOAL. */
6788 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6789 nregs
= hard_regno_nregs
[regno
][mode
];
6792 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6794 if (!goal_mem
&& !goal_const
6795 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6798 /* Reject VALUE if it is one of the regs reserved for reloads.
6799 Reload1 knows how to reuse them anyway, and it would get
6800 confused if we allocated one without its knowledge.
6801 (Now that insns introduced by reload are ignored above,
6802 this case shouldn't happen, but I'm not positive.) */
6804 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6807 for (i
= 0; i
< valuenregs
; ++i
)
6808 if (reload_reg_p
[valueno
+ i
] >= 0)
6812 /* Reject VALUE if it is a register being used for an input reload
6813 even if it is not one of those reserved. */
6815 if (reload_reg_p
!= 0)
6818 for (i
= 0; i
< n_reloads
; i
++)
6819 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6821 int regno1
= REGNO (rld
[i
].reg_rtx
);
6822 int nregs1
= hard_regno_nregs
[regno1
]
6823 [GET_MODE (rld
[i
].reg_rtx
)];
6824 if (regno1
< valueno
+ valuenregs
6825 && regno1
+ nregs1
> valueno
)
6831 /* We must treat frame pointer as varying here,
6832 since it can vary--in a nonlocal goto as generated by expand_goto. */
6833 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6835 /* Now verify that the values of GOAL and VALUE remain unaltered
6836 until INSN is reached. */
6845 /* Don't trust the conversion past a function call
6846 if either of the two is in a call-clobbered register, or memory. */
6851 if (goal_mem
|| need_stable_sp
)
6854 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6855 for (i
= 0; i
< nregs
; ++i
)
6856 if (call_used_regs
[regno
+ i
]
6857 || HARD_REGNO_CALL_PART_CLOBBERED (regno
+ i
, mode
))
6860 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6861 for (i
= 0; i
< valuenregs
; ++i
)
6862 if (call_used_regs
[valueno
+ i
]
6863 || HARD_REGNO_CALL_PART_CLOBBERED (valueno
+ i
, mode
))
6871 /* Watch out for unspec_volatile, and volatile asms. */
6872 if (volatile_insn_p (pat
))
6875 /* If this insn P stores in either GOAL or VALUE, return 0.
6876 If GOAL is a memory ref and this insn writes memory, return 0.
6877 If GOAL is a memory ref and its address is not constant,
6878 and this insn P changes a register used in GOAL, return 0. */
6880 if (GET_CODE (pat
) == COND_EXEC
)
6881 pat
= COND_EXEC_CODE (pat
);
6882 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6884 rtx dest
= SET_DEST (pat
);
6885 while (GET_CODE (dest
) == SUBREG
6886 || GET_CODE (dest
) == ZERO_EXTRACT
6887 || GET_CODE (dest
) == STRICT_LOW_PART
)
6888 dest
= XEXP (dest
, 0);
6891 int xregno
= REGNO (dest
);
6893 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6894 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6897 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6899 if (xregno
< valueno
+ valuenregs
6900 && xregno
+ xnregs
> valueno
)
6902 if (goal_mem_addr_varies
6903 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6905 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6908 else if (goal_mem
&& MEM_P (dest
)
6909 && ! push_operand (dest
, GET_MODE (dest
)))
6911 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6912 && reg_equiv_memory_loc
[regno
] != 0)
6914 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6917 else if (GET_CODE (pat
) == PARALLEL
)
6920 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6922 rtx v1
= XVECEXP (pat
, 0, i
);
6923 if (GET_CODE (v1
) == COND_EXEC
)
6924 v1
= COND_EXEC_CODE (v1
);
6925 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6927 rtx dest
= SET_DEST (v1
);
6928 while (GET_CODE (dest
) == SUBREG
6929 || GET_CODE (dest
) == ZERO_EXTRACT
6930 || GET_CODE (dest
) == STRICT_LOW_PART
)
6931 dest
= XEXP (dest
, 0);
6934 int xregno
= REGNO (dest
);
6936 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6937 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6940 if (xregno
< regno
+ nregs
6941 && xregno
+ xnregs
> regno
)
6943 if (xregno
< valueno
+ valuenregs
6944 && xregno
+ xnregs
> valueno
)
6946 if (goal_mem_addr_varies
6947 && reg_overlap_mentioned_for_reload_p (dest
,
6950 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6953 else if (goal_mem
&& MEM_P (dest
)
6954 && ! push_operand (dest
, GET_MODE (dest
)))
6956 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6957 && reg_equiv_memory_loc
[regno
] != 0)
6959 else if (need_stable_sp
6960 && push_operand (dest
, GET_MODE (dest
)))
6966 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
6970 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6971 link
= XEXP (link
, 1))
6973 pat
= XEXP (link
, 0);
6974 if (GET_CODE (pat
) == CLOBBER
)
6976 rtx dest
= SET_DEST (pat
);
6980 int xregno
= REGNO (dest
);
6982 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6984 if (xregno
< regno
+ nregs
6985 && xregno
+ xnregs
> regno
)
6987 else if (xregno
< valueno
+ valuenregs
6988 && xregno
+ xnregs
> valueno
)
6990 else if (goal_mem_addr_varies
6991 && reg_overlap_mentioned_for_reload_p (dest
,
6996 else if (goal_mem
&& MEM_P (dest
)
6997 && ! push_operand (dest
, GET_MODE (dest
)))
6999 else if (need_stable_sp
7000 && push_operand (dest
, GET_MODE (dest
)))
7007 /* If this insn auto-increments or auto-decrements
7008 either regno or valueno, return 0 now.
7009 If GOAL is a memory ref and its address is not constant,
7010 and this insn P increments a register used in GOAL, return 0. */
7014 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7015 if (REG_NOTE_KIND (link
) == REG_INC
7016 && REG_P (XEXP (link
, 0)))
7018 int incno
= REGNO (XEXP (link
, 0));
7019 if (incno
< regno
+ nregs
&& incno
>= regno
)
7021 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7023 if (goal_mem_addr_varies
7024 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7034 /* Find a place where INCED appears in an increment or decrement operator
7035 within X, and return the amount INCED is incremented or decremented by.
7036 The value is always positive. */
7039 find_inc_amount (rtx x
, rtx inced
)
7041 enum rtx_code code
= GET_CODE (x
);
7047 rtx addr
= XEXP (x
, 0);
7048 if ((GET_CODE (addr
) == PRE_DEC
7049 || GET_CODE (addr
) == POST_DEC
7050 || GET_CODE (addr
) == PRE_INC
7051 || GET_CODE (addr
) == POST_INC
)
7052 && XEXP (addr
, 0) == inced
)
7053 return GET_MODE_SIZE (GET_MODE (x
));
7054 else if ((GET_CODE (addr
) == PRE_MODIFY
7055 || GET_CODE (addr
) == POST_MODIFY
)
7056 && GET_CODE (XEXP (addr
, 1)) == PLUS
7057 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7058 && XEXP (addr
, 0) == inced
7059 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
7061 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7062 return i
< 0 ? -i
: i
;
7066 fmt
= GET_RTX_FORMAT (code
);
7067 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7071 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
7078 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7080 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7090 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7091 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7095 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7102 if (! INSN_P (insn
))
7105 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7106 if (REG_NOTE_KIND (link
) == REG_INC
)
7108 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7109 if (test
>= regno
&& test
< endregno
)
7116 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7120 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7121 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7122 REG_INC. REGNO must refer to a hard register. */
7125 regno_clobbered_p (unsigned int regno
, rtx insn
, enum machine_mode mode
,
7128 unsigned int nregs
, endregno
;
7130 /* regno must be a hard register. */
7131 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7133 nregs
= hard_regno_nregs
[regno
][mode
];
7134 endregno
= regno
+ nregs
;
7136 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7137 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7138 && REG_P (XEXP (PATTERN (insn
), 0)))
7140 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7142 return test
>= regno
&& test
< endregno
;
7145 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7148 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7150 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7154 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7155 if ((GET_CODE (elt
) == CLOBBER
7156 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7157 && REG_P (XEXP (elt
, 0)))
7159 unsigned int test
= REGNO (XEXP (elt
, 0));
7161 if (test
>= regno
&& test
< endregno
)
7165 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7173 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7175 reload_adjust_reg_for_mode (rtx reloadreg
, enum machine_mode mode
)
7179 if (GET_MODE (reloadreg
) == mode
)
7182 regno
= REGNO (reloadreg
);
7184 if (WORDS_BIG_ENDIAN
)
7185 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
7186 - (int) hard_regno_nregs
[regno
][mode
];
7188 return gen_rtx_REG (mode
, regno
);
7191 static const char *const reload_when_needed_name
[] =
7194 "RELOAD_FOR_OUTPUT",
7196 "RELOAD_FOR_INPUT_ADDRESS",
7197 "RELOAD_FOR_INPADDR_ADDRESS",
7198 "RELOAD_FOR_OUTPUT_ADDRESS",
7199 "RELOAD_FOR_OUTADDR_ADDRESS",
7200 "RELOAD_FOR_OPERAND_ADDRESS",
7201 "RELOAD_FOR_OPADDR_ADDR",
7203 "RELOAD_FOR_OTHER_ADDRESS"
7206 /* These functions are used to print the variables set by 'find_reloads' */
7209 debug_reload_to_stream (FILE *f
)
7216 for (r
= 0; r
< n_reloads
; r
++)
7218 fprintf (f
, "Reload %d: ", r
);
7222 fprintf (f
, "reload_in (%s) = ",
7223 GET_MODE_NAME (rld
[r
].inmode
));
7224 print_inline_rtx (f
, rld
[r
].in
, 24);
7225 fprintf (f
, "\n\t");
7228 if (rld
[r
].out
!= 0)
7230 fprintf (f
, "reload_out (%s) = ",
7231 GET_MODE_NAME (rld
[r
].outmode
));
7232 print_inline_rtx (f
, rld
[r
].out
, 24);
7233 fprintf (f
, "\n\t");
7236 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
7238 fprintf (f
, "%s (opnum = %d)",
7239 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7242 if (rld
[r
].optional
)
7243 fprintf (f
, ", optional");
7245 if (rld
[r
].nongroup
)
7246 fprintf (f
, ", nongroup");
7248 if (rld
[r
].inc
!= 0)
7249 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7251 if (rld
[r
].nocombine
)
7252 fprintf (f
, ", can't combine");
7254 if (rld
[r
].secondary_p
)
7255 fprintf (f
, ", secondary_reload_p");
7257 if (rld
[r
].in_reg
!= 0)
7259 fprintf (f
, "\n\treload_in_reg: ");
7260 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7263 if (rld
[r
].out_reg
!= 0)
7265 fprintf (f
, "\n\treload_out_reg: ");
7266 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7269 if (rld
[r
].reg_rtx
!= 0)
7271 fprintf (f
, "\n\treload_reg_rtx: ");
7272 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7276 if (rld
[r
].secondary_in_reload
!= -1)
7278 fprintf (f
, "%ssecondary_in_reload = %d",
7279 prefix
, rld
[r
].secondary_in_reload
);
7283 if (rld
[r
].secondary_out_reload
!= -1)
7284 fprintf (f
, "%ssecondary_out_reload = %d\n",
7285 prefix
, rld
[r
].secondary_out_reload
);
7288 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7290 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7291 insn_data
[rld
[r
].secondary_in_icode
].name
);
7295 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7296 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7297 insn_data
[rld
[r
].secondary_out_icode
].name
);
7306 debug_reload_to_stream (stderr
);