1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
25 #include "diagnostic-core.h"
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
34 #include "double-int.h"
41 #include "tree-hasher.h"
42 #include "stor-layout.h"
43 #include "stringpool.h"
47 #include "hard-reg-set.h"
51 #include "statistics.h"
53 #include "fixed-value.h"
61 #include "insn-codes.h"
68 #include "dominance.h"
70 #include "basic-block.h"
73 struct target_optabs default_target_optabs
;
74 struct target_libfuncs default_target_libfuncs
;
75 struct target_optabs
*this_fn_optabs
= &default_target_optabs
;
77 struct target_optabs
*this_target_optabs
= &default_target_optabs
;
78 struct target_libfuncs
*this_target_libfuncs
= &default_target_libfuncs
;
81 #define libfunc_hash \
82 (this_target_libfuncs->x_libfunc_hash)
84 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
86 static rtx
expand_unop_direct (machine_mode
, optab
, rtx
, rtx
, int);
87 static void emit_libcall_block_1 (rtx_insn
*, rtx
, rtx
, rtx
, bool);
89 /* Debug facility for use in GDB. */
90 void debug_optab_libfuncs (void);
92 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
93 #if ENABLE_DECIMAL_BID_FORMAT
94 #define DECIMAL_PREFIX "bid_"
96 #define DECIMAL_PREFIX "dpd_"
99 /* Used for libfunc_hash. */
102 libfunc_hasher::hash (libfunc_entry
*e
)
104 return ((e
->mode1
+ e
->mode2
* NUM_MACHINE_MODES
) ^ e
->op
);
107 /* Used for libfunc_hash. */
110 libfunc_hasher::equal (libfunc_entry
*e1
, libfunc_entry
*e2
)
112 return e1
->op
== e2
->op
&& e1
->mode1
== e2
->mode1
&& e1
->mode2
== e2
->mode2
;
115 /* Return libfunc corresponding operation defined by OPTAB converting
116 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
117 if no libfunc is available. */
119 convert_optab_libfunc (convert_optab optab
, machine_mode mode1
,
122 struct libfunc_entry e
;
123 struct libfunc_entry
**slot
;
125 /* ??? This ought to be an assert, but not all of the places
126 that we expand optabs know about the optabs that got moved
128 if (!(optab
>= FIRST_CONV_OPTAB
&& optab
<= LAST_CONVLIB_OPTAB
))
134 slot
= libfunc_hash
->find_slot (&e
, NO_INSERT
);
137 const struct convert_optab_libcall_d
*d
138 = &convlib_def
[optab
- FIRST_CONV_OPTAB
];
140 if (d
->libcall_gen
== NULL
)
143 d
->libcall_gen (optab
, d
->libcall_basename
, mode1
, mode2
);
144 slot
= libfunc_hash
->find_slot (&e
, NO_INSERT
);
148 return (*slot
)->libfunc
;
151 /* Return libfunc corresponding operation defined by OPTAB in MODE.
152 Trigger lazy initialization if needed, return NULL if no libfunc is
155 optab_libfunc (optab optab
, machine_mode mode
)
157 struct libfunc_entry e
;
158 struct libfunc_entry
**slot
;
160 /* ??? This ought to be an assert, but not all of the places
161 that we expand optabs know about the optabs that got moved
163 if (!(optab
>= FIRST_NORM_OPTAB
&& optab
<= LAST_NORMLIB_OPTAB
))
169 slot
= libfunc_hash
->find_slot (&e
, NO_INSERT
);
172 const struct optab_libcall_d
*d
173 = &normlib_def
[optab
- FIRST_NORM_OPTAB
];
175 if (d
->libcall_gen
== NULL
)
178 d
->libcall_gen (optab
, d
->libcall_basename
, d
->libcall_suffix
, mode
);
179 slot
= libfunc_hash
->find_slot (&e
, NO_INSERT
);
183 return (*slot
)->libfunc
;
187 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
188 the result of operation CODE applied to OP0 (and OP1 if it is a binary
191 If the last insn does not set TARGET, don't do anything, but return 1.
193 If the last insn or a previous insn sets TARGET and TARGET is one of OP0
194 or OP1, don't add the REG_EQUAL note but return 0. Our caller can then
195 try again, ensuring that TARGET is not one of the operands. */
198 add_equal_note (rtx_insn
*insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
204 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
206 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
207 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
208 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
209 && GET_RTX_CLASS (code
) != RTX_COMPARE
210 && GET_RTX_CLASS (code
) != RTX_UNARY
)
213 if (GET_CODE (target
) == ZERO_EXTRACT
)
216 for (last_insn
= insns
;
217 NEXT_INSN (last_insn
) != NULL_RTX
;
218 last_insn
= NEXT_INSN (last_insn
))
221 /* If TARGET is in OP0 or OP1, punt. We'd end up with a note referencing
222 a value changing in the insn, so the note would be invalid for CSE. */
223 if (reg_overlap_mentioned_p (target
, op0
)
224 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
227 && (rtx_equal_p (target
, op0
)
228 || (op1
&& rtx_equal_p (target
, op1
))))
230 /* For MEM target, with MEM = MEM op X, prefer no REG_EQUAL note
231 over expanding it as temp = MEM op X, MEM = temp. If the target
232 supports MEM = MEM op X instructions, it is sometimes too hard
233 to reconstruct that form later, especially if X is also a memory,
234 and due to multiple occurrences of addresses the address might
235 be forced into register unnecessarily.
236 Note that not emitting the REG_EQUIV note might inhibit
237 CSE in some cases. */
238 set
= single_set (last_insn
);
240 && GET_CODE (SET_SRC (set
)) == code
241 && MEM_P (SET_DEST (set
))
242 && (rtx_equal_p (SET_DEST (set
), XEXP (SET_SRC (set
), 0))
243 || (op1
&& rtx_equal_p (SET_DEST (set
),
244 XEXP (SET_SRC (set
), 1)))))
250 set
= set_for_reg_notes (last_insn
);
254 if (! rtx_equal_p (SET_DEST (set
), target
)
255 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
256 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
257 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
260 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
270 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (target
) != GET_MODE (op0
))
272 note
= gen_rtx_fmt_e (code
, GET_MODE (op0
), copy_rtx (op0
));
273 if (GET_MODE_SIZE (GET_MODE (op0
))
274 > GET_MODE_SIZE (GET_MODE (target
)))
275 note
= simplify_gen_unary (TRUNCATE
, GET_MODE (target
),
276 note
, GET_MODE (op0
));
278 note
= simplify_gen_unary (ZERO_EXTEND
, GET_MODE (target
),
279 note
, GET_MODE (op0
));
284 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
288 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
290 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
295 /* Given two input operands, OP0 and OP1, determine what the correct from_mode
296 for a widening operation would be. In most cases this would be OP0, but if
297 that's a constant it'll be VOIDmode, which isn't useful. */
300 widened_mode (machine_mode to_mode
, rtx op0
, rtx op1
)
302 machine_mode m0
= GET_MODE (op0
);
303 machine_mode m1
= GET_MODE (op1
);
306 if (m0
== VOIDmode
&& m1
== VOIDmode
)
308 else if (m0
== VOIDmode
|| GET_MODE_SIZE (m0
) < GET_MODE_SIZE (m1
))
313 if (GET_MODE_SIZE (result
) > GET_MODE_SIZE (to_mode
))
319 /* Like optab_handler, but for widening_operations that have a
320 TO_MODE and a FROM_MODE. */
323 widening_optab_handler (optab op
, machine_mode to_mode
,
324 machine_mode from_mode
)
326 unsigned scode
= (op
<< 16) | to_mode
;
327 if (to_mode
!= from_mode
&& from_mode
!= VOIDmode
)
329 /* ??? Why does find_widening_optab_handler_and_mode attempt to
330 widen things that can't be widened? E.g. add_optab... */
331 if (op
> LAST_CONV_OPTAB
)
332 return CODE_FOR_nothing
;
333 scode
|= from_mode
<< 8;
335 return raw_optab_handler (scode
);
338 /* Find a widening optab even if it doesn't widen as much as we want.
339 E.g. if from_mode is HImode, and to_mode is DImode, and there is no
340 direct HI->SI insn, then return SI->DI, if that exists.
341 If PERMIT_NON_WIDENING is non-zero then this can be used with
342 non-widening optabs also. */
345 find_widening_optab_handler_and_mode (optab op
, machine_mode to_mode
,
346 machine_mode from_mode
,
347 int permit_non_widening
,
348 machine_mode
*found_mode
)
350 for (; (permit_non_widening
|| from_mode
!= to_mode
)
351 && GET_MODE_SIZE (from_mode
) <= GET_MODE_SIZE (to_mode
)
352 && from_mode
!= VOIDmode
;
353 from_mode
= GET_MODE_WIDER_MODE (from_mode
))
355 enum insn_code handler
= widening_optab_handler (op
, to_mode
,
358 if (handler
!= CODE_FOR_nothing
)
361 *found_mode
= from_mode
;
366 return CODE_FOR_nothing
;
369 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
370 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
371 not actually do a sign-extend or zero-extend, but can leave the
372 higher-order bits of the result rtx undefined, for example, in the case
373 of logical operations, but not right shifts. */
376 widen_operand (rtx op
, machine_mode mode
, machine_mode oldmode
,
377 int unsignedp
, int no_extend
)
381 /* If we don't have to extend and this is a constant, return it. */
382 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
385 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
386 extend since it will be more efficient to do so unless the signedness of
387 a promoted object differs from our extension. */
389 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
390 && SUBREG_CHECK_PROMOTED_SIGN (op
, unsignedp
)))
391 return convert_modes (mode
, oldmode
, op
, unsignedp
);
393 /* If MODE is no wider than a single word, we return a lowpart or paradoxical
395 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
396 return gen_lowpart (mode
, force_reg (GET_MODE (op
), op
));
398 /* Otherwise, get an object of MODE, clobber it, and set the low-order
401 result
= gen_reg_rtx (mode
);
402 emit_clobber (result
);
403 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
407 /* Return the optab used for computing the operation given by the tree code,
408 CODE and the tree EXP. This function is not always usable (for example, it
409 cannot give complete results for multiplication or division) but probably
410 ought to be relied on more widely throughout the expander. */
412 optab_for_tree_code (enum tree_code code
, const_tree type
,
413 enum optab_subtype subtype
)
425 return one_cmpl_optab
;
430 case MULT_HIGHPART_EXPR
:
431 return TYPE_UNSIGNED (type
) ? umul_highpart_optab
: smul_highpart_optab
;
437 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
445 if (TYPE_SATURATING (type
))
446 return TYPE_UNSIGNED (type
) ? usdiv_optab
: ssdiv_optab
;
447 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
450 if (TREE_CODE (type
) == VECTOR_TYPE
)
452 if (subtype
== optab_vector
)
453 return TYPE_SATURATING (type
) ? unknown_optab
: vashl_optab
;
455 gcc_assert (subtype
== optab_scalar
);
457 if (TYPE_SATURATING (type
))
458 return TYPE_UNSIGNED (type
) ? usashl_optab
: ssashl_optab
;
462 if (TREE_CODE (type
) == VECTOR_TYPE
)
464 if (subtype
== optab_vector
)
465 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
467 gcc_assert (subtype
== optab_scalar
);
469 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
472 if (TREE_CODE (type
) == VECTOR_TYPE
)
474 if (subtype
== optab_vector
)
477 gcc_assert (subtype
== optab_scalar
);
482 if (TREE_CODE (type
) == VECTOR_TYPE
)
484 if (subtype
== optab_vector
)
487 gcc_assert (subtype
== optab_scalar
);
492 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
495 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
497 case REALIGN_LOAD_EXPR
:
498 return vec_realign_load_optab
;
501 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
504 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
507 return TYPE_UNSIGNED (type
) ? usad_optab
: ssad_optab
;
509 case WIDEN_MULT_PLUS_EXPR
:
510 return (TYPE_UNSIGNED (type
)
511 ? (TYPE_SATURATING (type
)
512 ? usmadd_widen_optab
: umadd_widen_optab
)
513 : (TYPE_SATURATING (type
)
514 ? ssmadd_widen_optab
: smadd_widen_optab
));
516 case WIDEN_MULT_MINUS_EXPR
:
517 return (TYPE_UNSIGNED (type
)
518 ? (TYPE_SATURATING (type
)
519 ? usmsub_widen_optab
: umsub_widen_optab
)
520 : (TYPE_SATURATING (type
)
521 ? ssmsub_widen_optab
: smsub_widen_optab
));
527 return TYPE_UNSIGNED (type
)
528 ? reduc_umax_scal_optab
: reduc_smax_scal_optab
;
531 return TYPE_UNSIGNED (type
)
532 ? reduc_umin_scal_optab
: reduc_smin_scal_optab
;
534 case REDUC_PLUS_EXPR
:
535 return reduc_plus_scal_optab
;
537 case VEC_WIDEN_MULT_HI_EXPR
:
538 return TYPE_UNSIGNED (type
) ?
539 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
541 case VEC_WIDEN_MULT_LO_EXPR
:
542 return TYPE_UNSIGNED (type
) ?
543 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
545 case VEC_WIDEN_MULT_EVEN_EXPR
:
546 return TYPE_UNSIGNED (type
) ?
547 vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
549 case VEC_WIDEN_MULT_ODD_EXPR
:
550 return TYPE_UNSIGNED (type
) ?
551 vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
553 case VEC_WIDEN_LSHIFT_HI_EXPR
:
554 return TYPE_UNSIGNED (type
) ?
555 vec_widen_ushiftl_hi_optab
: vec_widen_sshiftl_hi_optab
;
557 case VEC_WIDEN_LSHIFT_LO_EXPR
:
558 return TYPE_UNSIGNED (type
) ?
559 vec_widen_ushiftl_lo_optab
: vec_widen_sshiftl_lo_optab
;
561 case VEC_UNPACK_HI_EXPR
:
562 return TYPE_UNSIGNED (type
) ?
563 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
565 case VEC_UNPACK_LO_EXPR
:
566 return TYPE_UNSIGNED (type
) ?
567 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
569 case VEC_UNPACK_FLOAT_HI_EXPR
:
570 /* The signedness is determined from input operand. */
571 return TYPE_UNSIGNED (type
) ?
572 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
574 case VEC_UNPACK_FLOAT_LO_EXPR
:
575 /* The signedness is determined from input operand. */
576 return TYPE_UNSIGNED (type
) ?
577 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
579 case VEC_PACK_TRUNC_EXPR
:
580 return vec_pack_trunc_optab
;
582 case VEC_PACK_SAT_EXPR
:
583 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
585 case VEC_PACK_FIX_TRUNC_EXPR
:
586 /* The signedness is determined from output operand. */
587 return TYPE_UNSIGNED (type
) ?
588 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
594 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
597 case POINTER_PLUS_EXPR
:
599 if (TYPE_SATURATING (type
))
600 return TYPE_UNSIGNED (type
) ? usadd_optab
: ssadd_optab
;
601 return trapv
? addv_optab
: add_optab
;
604 if (TYPE_SATURATING (type
))
605 return TYPE_UNSIGNED (type
) ? ussub_optab
: sssub_optab
;
606 return trapv
? subv_optab
: sub_optab
;
609 if (TYPE_SATURATING (type
))
610 return TYPE_UNSIGNED (type
) ? usmul_optab
: ssmul_optab
;
611 return trapv
? smulv_optab
: smul_optab
;
614 if (TYPE_SATURATING (type
))
615 return TYPE_UNSIGNED (type
) ? usneg_optab
: ssneg_optab
;
616 return trapv
? negv_optab
: neg_optab
;
619 return trapv
? absv_optab
: abs_optab
;
622 return unknown_optab
;
626 /* Given optab UNOPTAB that reduces a vector to a scalar, find instead the old
627 optab that produces a vector with the reduction result in one element,
628 for a tree with type TYPE. */
631 scalar_reduc_to_vector (optab unoptab
, const_tree type
)
635 case reduc_plus_scal_optab
:
636 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
638 case reduc_smin_scal_optab
: return reduc_smin_optab
;
639 case reduc_umin_scal_optab
: return reduc_umin_optab
;
640 case reduc_smax_scal_optab
: return reduc_smax_optab
;
641 case reduc_umax_scal_optab
: return reduc_umax_optab
;
642 default: return unknown_optab
;
646 /* Expand vector widening operations.
648 There are two different classes of operations handled here:
649 1) Operations whose result is wider than all the arguments to the operation.
650 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
651 In this case OP0 and optionally OP1 would be initialized,
652 but WIDE_OP wouldn't (not relevant for this case).
653 2) Operations whose result is of the same size as the last argument to the
654 operation, but wider than all the other arguments to the operation.
655 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
656 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
658 E.g, when called to expand the following operations, this is how
659 the arguments will be initialized:
661 widening-sum 2 oprnd0 - oprnd1
662 widening-dot-product 3 oprnd0 oprnd1 oprnd2
663 widening-mult 2 oprnd0 oprnd1 -
664 type-promotion (vec-unpack) 1 oprnd0 - - */
667 expand_widen_pattern_expr (sepops ops
, rtx op0
, rtx op1
, rtx wide_op
,
668 rtx target
, int unsignedp
)
670 struct expand_operand eops
[4];
671 tree oprnd0
, oprnd1
, oprnd2
;
672 machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
673 optab widen_pattern_optab
;
674 enum insn_code icode
;
675 int nops
= TREE_CODE_LENGTH (ops
->code
);
679 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
680 widen_pattern_optab
=
681 optab_for_tree_code (ops
->code
, TREE_TYPE (oprnd0
), optab_default
);
682 if (ops
->code
== WIDEN_MULT_PLUS_EXPR
683 || ops
->code
== WIDEN_MULT_MINUS_EXPR
)
684 icode
= find_widening_optab_handler (widen_pattern_optab
,
685 TYPE_MODE (TREE_TYPE (ops
->op2
)),
688 icode
= optab_handler (widen_pattern_optab
, tmode0
);
689 gcc_assert (icode
!= CODE_FOR_nothing
);
694 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
697 /* The last operand is of a wider mode than the rest of the operands. */
702 gcc_assert (tmode1
== tmode0
);
705 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
709 create_output_operand (&eops
[op
++], target
, TYPE_MODE (ops
->type
));
710 create_convert_operand_from (&eops
[op
++], op0
, tmode0
, unsignedp
);
712 create_convert_operand_from (&eops
[op
++], op1
, tmode1
, unsignedp
);
714 create_convert_operand_from (&eops
[op
++], wide_op
, wmode
, unsignedp
);
715 expand_insn (icode
, op
, eops
);
716 return eops
[0].value
;
719 /* Generate code to perform an operation specified by TERNARY_OPTAB
720 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
722 UNSIGNEDP is for the case where we have to widen the operands
723 to perform the operation. It says to use zero-extension.
725 If TARGET is nonzero, the value
726 is generated there, if it is convenient to do so.
727 In all cases an rtx is returned for the locus of the value;
728 this may or may not be TARGET. */
731 expand_ternary_op (machine_mode mode
, optab ternary_optab
, rtx op0
,
732 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
734 struct expand_operand ops
[4];
735 enum insn_code icode
= optab_handler (ternary_optab
, mode
);
737 gcc_assert (optab_handler (ternary_optab
, mode
) != CODE_FOR_nothing
);
739 create_output_operand (&ops
[0], target
, mode
);
740 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
741 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
742 create_convert_operand_from (&ops
[3], op2
, mode
, unsignedp
);
743 expand_insn (icode
, 4, ops
);
748 /* Like expand_binop, but return a constant rtx if the result can be
749 calculated at compile time. The arguments and return value are
750 otherwise the same as for expand_binop. */
753 simplify_expand_binop (machine_mode mode
, optab binoptab
,
754 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
755 enum optab_methods methods
)
757 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
759 rtx x
= simplify_binary_operation (optab_to_code (binoptab
),
765 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
768 /* Like simplify_expand_binop, but always put the result in TARGET.
769 Return true if the expansion succeeded. */
772 force_expand_binop (machine_mode mode
, optab binoptab
,
773 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
774 enum optab_methods methods
)
776 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
777 target
, unsignedp
, methods
);
781 emit_move_insn (target
, x
);
785 /* Create a new vector value in VMODE with all elements set to OP. The
786 mode of OP must be the element mode of VMODE. If OP is a constant,
787 then the return value will be a constant. */
790 expand_vector_broadcast (machine_mode vmode
, rtx op
)
792 enum insn_code icode
;
797 gcc_checking_assert (VECTOR_MODE_P (vmode
));
799 n
= GET_MODE_NUNITS (vmode
);
800 vec
= rtvec_alloc (n
);
801 for (i
= 0; i
< n
; ++i
)
802 RTVEC_ELT (vec
, i
) = op
;
805 return gen_rtx_CONST_VECTOR (vmode
, vec
);
807 /* ??? If the target doesn't have a vec_init, then we have no easy way
808 of performing this operation. Most of this sort of generic support
809 is hidden away in the vector lowering support in gimple. */
810 icode
= optab_handler (vec_init_optab
, vmode
);
811 if (icode
== CODE_FOR_nothing
)
814 ret
= gen_reg_rtx (vmode
);
815 emit_insn (GEN_FCN (icode
) (ret
, gen_rtx_PARALLEL (vmode
, vec
)));
820 /* This subroutine of expand_doubleword_shift handles the cases in which
821 the effective shift value is >= BITS_PER_WORD. The arguments and return
822 value are the same as for the parent routine, except that SUPERWORD_OP1
823 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
824 INTO_TARGET may be null if the caller has decided to calculate it. */
827 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
828 rtx outof_target
, rtx into_target
,
829 int unsignedp
, enum optab_methods methods
)
831 if (into_target
!= 0)
832 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
833 into_target
, unsignedp
, methods
))
836 if (outof_target
!= 0)
838 /* For a signed right shift, we must fill OUTOF_TARGET with copies
839 of the sign bit, otherwise we must fill it with zeros. */
840 if (binoptab
!= ashr_optab
)
841 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
843 if (!force_expand_binop (word_mode
, binoptab
,
844 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
845 outof_target
, unsignedp
, methods
))
851 /* This subroutine of expand_doubleword_shift handles the cases in which
852 the effective shift value is < BITS_PER_WORD. The arguments and return
853 value are the same as for the parent routine. */
856 expand_subword_shift (machine_mode op1_mode
, optab binoptab
,
857 rtx outof_input
, rtx into_input
, rtx op1
,
858 rtx outof_target
, rtx into_target
,
859 int unsignedp
, enum optab_methods methods
,
860 unsigned HOST_WIDE_INT shift_mask
)
862 optab reverse_unsigned_shift
, unsigned_shift
;
865 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
866 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
868 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
869 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
870 the opposite direction to BINOPTAB. */
871 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
873 carries
= outof_input
;
874 tmp
= immed_wide_int_const (wi::shwi (BITS_PER_WORD
,
875 op1_mode
), op1_mode
);
876 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
881 /* We must avoid shifting by BITS_PER_WORD bits since that is either
882 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
883 has unknown behavior. Do a single shift first, then shift by the
884 remainder. It's OK to use ~OP1 as the remainder if shift counts
885 are truncated to the mode size. */
886 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
887 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
888 if (shift_mask
== BITS_PER_WORD
- 1)
890 tmp
= immed_wide_int_const
891 (wi::minus_one (GET_MODE_PRECISION (op1_mode
)), op1_mode
);
892 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
897 tmp
= immed_wide_int_const (wi::shwi (BITS_PER_WORD
- 1,
898 op1_mode
), op1_mode
);
899 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
903 if (tmp
== 0 || carries
== 0)
905 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
906 carries
, tmp
, 0, unsignedp
, methods
);
910 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
911 so the result can go directly into INTO_TARGET if convenient. */
912 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
913 into_target
, unsignedp
, methods
);
917 /* Now OR in the bits carried over from OUTOF_INPUT. */
918 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
919 into_target
, unsignedp
, methods
))
922 /* Use a standard word_mode shift for the out-of half. */
923 if (outof_target
!= 0)
924 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
925 outof_target
, unsignedp
, methods
))
932 #ifdef HAVE_conditional_move
933 /* Try implementing expand_doubleword_shift using conditional moves.
934 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
935 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
936 are the shift counts to use in the former and latter case. All other
937 arguments are the same as the parent routine. */
940 expand_doubleword_shift_condmove (machine_mode op1_mode
, optab binoptab
,
941 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
942 rtx outof_input
, rtx into_input
,
943 rtx subword_op1
, rtx superword_op1
,
944 rtx outof_target
, rtx into_target
,
945 int unsignedp
, enum optab_methods methods
,
946 unsigned HOST_WIDE_INT shift_mask
)
948 rtx outof_superword
, into_superword
;
950 /* Put the superword version of the output into OUTOF_SUPERWORD and
952 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
953 if (outof_target
!= 0 && subword_op1
== superword_op1
)
955 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
956 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
957 into_superword
= outof_target
;
958 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
959 outof_superword
, 0, unsignedp
, methods
))
964 into_superword
= gen_reg_rtx (word_mode
);
965 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
966 outof_superword
, into_superword
,
971 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
972 if (!expand_subword_shift (op1_mode
, binoptab
,
973 outof_input
, into_input
, subword_op1
,
974 outof_target
, into_target
,
975 unsignedp
, methods
, shift_mask
))
978 /* Select between them. Do the INTO half first because INTO_SUPERWORD
979 might be the current value of OUTOF_TARGET. */
980 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
981 into_target
, into_superword
, word_mode
, false))
984 if (outof_target
!= 0)
985 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
986 outof_target
, outof_superword
,
994 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
995 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
996 input operand; the shift moves bits in the direction OUTOF_INPUT->
997 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
998 of the target. OP1 is the shift count and OP1_MODE is its mode.
999 If OP1 is constant, it will have been truncated as appropriate
1000 and is known to be nonzero.
1002 If SHIFT_MASK is zero, the result of word shifts is undefined when the
1003 shift count is outside the range [0, BITS_PER_WORD). This routine must
1004 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
1006 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
1007 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
1008 fill with zeros or sign bits as appropriate.
1010 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
1011 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
1012 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
1013 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
1016 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
1017 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
1018 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1019 function wants to calculate it itself.
1021 Return true if the shift could be successfully synthesized. */
1024 expand_doubleword_shift (machine_mode op1_mode
, optab binoptab
,
1025 rtx outof_input
, rtx into_input
, rtx op1
,
1026 rtx outof_target
, rtx into_target
,
1027 int unsignedp
, enum optab_methods methods
,
1028 unsigned HOST_WIDE_INT shift_mask
)
1030 rtx superword_op1
, tmp
, cmp1
, cmp2
;
1031 enum rtx_code cmp_code
;
1033 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1034 fill the result with sign or zero bits as appropriate. If so, the value
1035 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1036 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1037 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1039 This isn't worthwhile for constant shifts since the optimizers will
1040 cope better with in-range shift counts. */
1041 if (shift_mask
>= BITS_PER_WORD
1042 && outof_target
!= 0
1043 && !CONSTANT_P (op1
))
1045 if (!expand_doubleword_shift (op1_mode
, binoptab
,
1046 outof_input
, into_input
, op1
,
1048 unsignedp
, methods
, shift_mask
))
1050 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
1051 outof_target
, unsignedp
, methods
))
1056 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1057 is true when the effective shift value is less than BITS_PER_WORD.
1058 Set SUPERWORD_OP1 to the shift count that should be used to shift
1059 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1060 tmp
= immed_wide_int_const (wi::shwi (BITS_PER_WORD
, op1_mode
), op1_mode
);
1061 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1063 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1064 is a subword shift count. */
1065 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1067 cmp2
= CONST0_RTX (op1_mode
);
1069 superword_op1
= op1
;
1073 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1074 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1076 cmp2
= CONST0_RTX (op1_mode
);
1078 superword_op1
= cmp1
;
1083 /* If we can compute the condition at compile time, pick the
1084 appropriate subroutine. */
1085 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1086 if (tmp
!= 0 && CONST_INT_P (tmp
))
1088 if (tmp
== const0_rtx
)
1089 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1090 outof_target
, into_target
,
1091 unsignedp
, methods
);
1093 return expand_subword_shift (op1_mode
, binoptab
,
1094 outof_input
, into_input
, op1
,
1095 outof_target
, into_target
,
1096 unsignedp
, methods
, shift_mask
);
1099 #ifdef HAVE_conditional_move
1100 /* Try using conditional moves to generate straight-line code. */
1102 rtx_insn
*start
= get_last_insn ();
1103 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1104 cmp_code
, cmp1
, cmp2
,
1105 outof_input
, into_input
,
1107 outof_target
, into_target
,
1108 unsignedp
, methods
, shift_mask
))
1110 delete_insns_since (start
);
1114 /* As a last resort, use branches to select the correct alternative. */
1115 rtx_code_label
*subword_label
= gen_label_rtx ();
1116 rtx_code_label
*done_label
= gen_label_rtx ();
1119 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1120 0, 0, subword_label
, -1);
1123 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1124 outof_target
, into_target
,
1125 unsignedp
, methods
))
1128 emit_jump_insn (gen_jump (done_label
));
1130 emit_label (subword_label
);
1132 if (!expand_subword_shift (op1_mode
, binoptab
,
1133 outof_input
, into_input
, op1
,
1134 outof_target
, into_target
,
1135 unsignedp
, methods
, shift_mask
))
1138 emit_label (done_label
);
1142 /* Subroutine of expand_binop. Perform a double word multiplication of
1143 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1144 as the target's word_mode. This function return NULL_RTX if anything
1145 goes wrong, in which case it may have already emitted instructions
1146 which need to be deleted.
1148 If we want to multiply two two-word values and have normal and widening
1149 multiplies of single-word values, we can do this with three smaller
1152 The multiplication proceeds as follows:
1153 _______________________
1154 [__op0_high_|__op0_low__]
1155 _______________________
1156 * [__op1_high_|__op1_low__]
1157 _______________________________________________
1158 _______________________
1159 (1) [__op0_low__*__op1_low__]
1160 _______________________
1161 (2a) [__op0_low__*__op1_high_]
1162 _______________________
1163 (2b) [__op0_high_*__op1_low__]
1164 _______________________
1165 (3) [__op0_high_*__op1_high_]
1168 This gives a 4-word result. Since we are only interested in the
1169 lower 2 words, partial result (3) and the upper words of (2a) and
1170 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1171 calculated using non-widening multiplication.
1173 (1), however, needs to be calculated with an unsigned widening
1174 multiplication. If this operation is not directly supported we
1175 try using a signed widening multiplication and adjust the result.
1176 This adjustment works as follows:
1178 If both operands are positive then no adjustment is needed.
1180 If the operands have different signs, for example op0_low < 0 and
1181 op1_low >= 0, the instruction treats the most significant bit of
1182 op0_low as a sign bit instead of a bit with significance
1183 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1184 with 2**BITS_PER_WORD - op0_low, and two's complements the
1185 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1188 Similarly, if both operands are negative, we need to add
1189 (op0_low + op1_low) * 2**BITS_PER_WORD.
1191 We use a trick to adjust quickly. We logically shift op0_low right
1192 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1193 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1194 logical shift exists, we do an arithmetic right shift and subtract
1198 expand_doubleword_mult (machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1199 bool umulp
, enum optab_methods methods
)
1201 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1202 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1203 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1204 rtx product
, adjust
, product_high
, temp
;
1206 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1207 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1208 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1209 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1211 /* If we're using an unsigned multiply to directly compute the product
1212 of the low-order words of the operands and perform any required
1213 adjustments of the operands, we begin by trying two more multiplications
1214 and then computing the appropriate sum.
1216 We have checked above that the required addition is provided.
1217 Full-word addition will normally always succeed, especially if
1218 it is provided at all, so we don't worry about its failure. The
1219 multiplication may well fail, however, so we do handle that. */
1223 /* ??? This could be done with emit_store_flag where available. */
1224 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1225 NULL_RTX
, 1, methods
);
1227 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1228 NULL_RTX
, 0, OPTAB_DIRECT
);
1231 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1232 NULL_RTX
, 0, methods
);
1235 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1236 NULL_RTX
, 0, OPTAB_DIRECT
);
1243 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1244 NULL_RTX
, 0, OPTAB_DIRECT
);
1248 /* OP0_HIGH should now be dead. */
1252 /* ??? This could be done with emit_store_flag where available. */
1253 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1254 NULL_RTX
, 1, methods
);
1256 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1257 NULL_RTX
, 0, OPTAB_DIRECT
);
1260 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1261 NULL_RTX
, 0, methods
);
1264 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1265 NULL_RTX
, 0, OPTAB_DIRECT
);
1272 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1273 NULL_RTX
, 0, OPTAB_DIRECT
);
1277 /* OP1_HIGH should now be dead. */
1279 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1280 NULL_RTX
, 0, OPTAB_DIRECT
);
1282 if (target
&& !REG_P (target
))
1286 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1287 target
, 1, OPTAB_DIRECT
);
1289 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1290 target
, 1, OPTAB_DIRECT
);
1295 product_high
= operand_subword (product
, high
, 1, mode
);
1296 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1297 NULL_RTX
, 0, OPTAB_DIRECT
);
1298 emit_move_insn (product_high
, adjust
);
1302 /* Wrapper around expand_binop which takes an rtx code to specify
1303 the operation to perform, not an optab pointer. All other
1304 arguments are the same. */
1306 expand_simple_binop (machine_mode mode
, enum rtx_code code
, rtx op0
,
1307 rtx op1
, rtx target
, int unsignedp
,
1308 enum optab_methods methods
)
1310 optab binop
= code_to_optab (code
);
1313 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1316 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1317 binop. Order them according to commutative_operand_precedence and, if
1318 possible, try to put TARGET or a pseudo first. */
1320 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1322 int op0_prec
= commutative_operand_precedence (op0
);
1323 int op1_prec
= commutative_operand_precedence (op1
);
1325 if (op0_prec
< op1_prec
)
1328 if (op0_prec
> op1_prec
)
1331 /* With equal precedence, both orders are ok, but it is better if the
1332 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1333 if (target
== 0 || REG_P (target
))
1334 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1336 return rtx_equal_p (op1
, target
);
1339 /* Return true if BINOPTAB implements a shift operation. */
1342 shift_optab_p (optab binoptab
)
1344 switch (optab_to_code (binoptab
))
1360 /* Return true if BINOPTAB implements a commutative binary operation. */
1363 commutative_optab_p (optab binoptab
)
1365 return (GET_RTX_CLASS (optab_to_code (binoptab
)) == RTX_COMM_ARITH
1366 || binoptab
== smul_widen_optab
1367 || binoptab
== umul_widen_optab
1368 || binoptab
== smul_highpart_optab
1369 || binoptab
== umul_highpart_optab
);
1372 /* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
1373 optimizing, and if the operand is a constant that costs more than
1374 1 instruction, force the constant into a register and return that
1375 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1378 avoid_expensive_constant (machine_mode mode
, optab binoptab
,
1379 int opn
, rtx x
, bool unsignedp
)
1381 bool speed
= optimize_insn_for_speed_p ();
1383 if (mode
!= VOIDmode
1386 && (rtx_cost (x
, optab_to_code (binoptab
), opn
, speed
)
1387 > set_src_cost (x
, speed
)))
1389 if (CONST_INT_P (x
))
1391 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1392 if (intval
!= INTVAL (x
))
1393 x
= GEN_INT (intval
);
1396 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1397 x
= force_reg (mode
, x
);
1402 /* Helper function for expand_binop: handle the case where there
1403 is an insn that directly implements the indicated operation.
1404 Returns null if this is not possible. */
1406 expand_binop_directly (machine_mode mode
, optab binoptab
,
1408 rtx target
, int unsignedp
, enum optab_methods methods
,
1411 machine_mode from_mode
= widened_mode (mode
, op0
, op1
);
1412 enum insn_code icode
= find_widening_optab_handler (binoptab
, mode
,
1414 machine_mode xmode0
= insn_data
[(int) icode
].operand
[1].mode
;
1415 machine_mode xmode1
= insn_data
[(int) icode
].operand
[2].mode
;
1416 machine_mode mode0
, mode1
, tmp_mode
;
1417 struct expand_operand ops
[3];
1420 rtx xop0
= op0
, xop1
= op1
;
1422 /* If it is a commutative operator and the modes would match
1423 if we would swap the operands, we can save the conversions. */
1424 commutative_p
= commutative_optab_p (binoptab
);
1426 && GET_MODE (xop0
) != xmode0
&& GET_MODE (xop1
) != xmode1
1427 && GET_MODE (xop0
) == xmode1
&& GET_MODE (xop1
) == xmode1
)
1428 std::swap (xop0
, xop1
);
1430 /* If we are optimizing, force expensive constants into a register. */
1431 xop0
= avoid_expensive_constant (xmode0
, binoptab
, 0, xop0
, unsignedp
);
1432 if (!shift_optab_p (binoptab
))
1433 xop1
= avoid_expensive_constant (xmode1
, binoptab
, 1, xop1
, unsignedp
);
1435 /* In case the insn wants input operands in modes different from
1436 those of the actual operands, convert the operands. It would
1437 seem that we don't need to convert CONST_INTs, but we do, so
1438 that they're properly zero-extended, sign-extended or truncated
1441 mode0
= GET_MODE (xop0
) != VOIDmode
? GET_MODE (xop0
) : mode
;
1442 if (xmode0
!= VOIDmode
&& xmode0
!= mode0
)
1444 xop0
= convert_modes (xmode0
, mode0
, xop0
, unsignedp
);
1448 mode1
= GET_MODE (xop1
) != VOIDmode
? GET_MODE (xop1
) : mode
;
1449 if (xmode1
!= VOIDmode
&& xmode1
!= mode1
)
1451 xop1
= convert_modes (xmode1
, mode1
, xop1
, unsignedp
);
1455 /* If operation is commutative,
1456 try to make the first operand a register.
1457 Even better, try to make it the same as the target.
1458 Also try to make the last operand a constant. */
1460 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1461 std::swap (xop0
, xop1
);
1463 /* Now, if insn's predicates don't allow our operands, put them into
1466 if (binoptab
== vec_pack_trunc_optab
1467 || binoptab
== vec_pack_usat_optab
1468 || binoptab
== vec_pack_ssat_optab
1469 || binoptab
== vec_pack_ufix_trunc_optab
1470 || binoptab
== vec_pack_sfix_trunc_optab
)
1472 /* The mode of the result is different then the mode of the
1474 tmp_mode
= insn_data
[(int) icode
].operand
[0].mode
;
1475 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1477 delete_insns_since (last
);
1484 create_output_operand (&ops
[0], target
, tmp_mode
);
1485 create_input_operand (&ops
[1], xop0
, mode0
);
1486 create_input_operand (&ops
[2], xop1
, mode1
);
1487 pat
= maybe_gen_insn (icode
, 3, ops
);
1490 /* If PAT is composed of more than one insn, try to add an appropriate
1491 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1492 operand, call expand_binop again, this time without a target. */
1493 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1494 && ! add_equal_note (pat
, ops
[0].value
,
1495 optab_to_code (binoptab
),
1496 ops
[1].value
, ops
[2].value
))
1498 delete_insns_since (last
);
1499 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1500 unsignedp
, methods
);
1504 return ops
[0].value
;
1506 delete_insns_since (last
);
1510 /* Generate code to perform an operation specified by BINOPTAB
1511 on operands OP0 and OP1, with result having machine-mode MODE.
1513 UNSIGNEDP is for the case where we have to widen the operands
1514 to perform the operation. It says to use zero-extension.
1516 If TARGET is nonzero, the value
1517 is generated there, if it is convenient to do so.
1518 In all cases an rtx is returned for the locus of the value;
1519 this may or may not be TARGET. */
1522 expand_binop (machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1523 rtx target
, int unsignedp
, enum optab_methods methods
)
1525 enum optab_methods next_methods
1526 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1527 ? OPTAB_WIDEN
: methods
);
1528 enum mode_class mclass
;
1529 machine_mode wider_mode
;
1532 rtx_insn
*entry_last
= get_last_insn ();
1535 mclass
= GET_MODE_CLASS (mode
);
1537 /* If subtracting an integer constant, convert this into an addition of
1538 the negated constant. */
1540 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1542 op1
= negate_rtx (mode
, op1
);
1543 binoptab
= add_optab
;
1546 /* Record where to delete back to if we backtrack. */
1547 last
= get_last_insn ();
1549 /* If we can do it with a three-operand insn, do so. */
1551 if (methods
!= OPTAB_MUST_WIDEN
1552 && find_widening_optab_handler (binoptab
, mode
,
1553 widened_mode (mode
, op0
, op1
), 1)
1554 != CODE_FOR_nothing
)
1556 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1557 unsignedp
, methods
, last
);
1562 /* If we were trying to rotate, and that didn't work, try rotating
1563 the other direction before falling back to shifts and bitwise-or. */
1564 if (((binoptab
== rotl_optab
1565 && optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
1566 || (binoptab
== rotr_optab
1567 && optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
))
1568 && mclass
== MODE_INT
)
1570 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1572 unsigned int bits
= GET_MODE_PRECISION (mode
);
1574 if (CONST_INT_P (op1
))
1575 newop1
= GEN_INT (bits
- INTVAL (op1
));
1576 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1577 newop1
= negate_rtx (GET_MODE (op1
), op1
);
1579 newop1
= expand_binop (GET_MODE (op1
), sub_optab
,
1580 gen_int_mode (bits
, GET_MODE (op1
)), op1
,
1581 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1583 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1584 target
, unsignedp
, methods
, last
);
1589 /* If this is a multiply, see if we can do a widening operation that
1590 takes operands of this mode and makes a wider mode. */
1592 if (binoptab
== smul_optab
1593 && GET_MODE_2XWIDER_MODE (mode
) != VOIDmode
1594 && (widening_optab_handler ((unsignedp
? umul_widen_optab
1595 : smul_widen_optab
),
1596 GET_MODE_2XWIDER_MODE (mode
), mode
)
1597 != CODE_FOR_nothing
))
1599 temp
= expand_binop (GET_MODE_2XWIDER_MODE (mode
),
1600 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1601 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1605 if (GET_MODE_CLASS (mode
) == MODE_INT
1606 && TRULY_NOOP_TRUNCATION_MODES_P (mode
, GET_MODE (temp
)))
1607 return gen_lowpart (mode
, temp
);
1609 return convert_to_mode (mode
, temp
, unsignedp
);
1613 /* If this is a vector shift by a scalar, see if we can do a vector
1614 shift by a vector. If so, broadcast the scalar into a vector. */
1615 if (mclass
== MODE_VECTOR_INT
)
1617 optab otheroptab
= unknown_optab
;
1619 if (binoptab
== ashl_optab
)
1620 otheroptab
= vashl_optab
;
1621 else if (binoptab
== ashr_optab
)
1622 otheroptab
= vashr_optab
;
1623 else if (binoptab
== lshr_optab
)
1624 otheroptab
= vlshr_optab
;
1625 else if (binoptab
== rotl_optab
)
1626 otheroptab
= vrotl_optab
;
1627 else if (binoptab
== rotr_optab
)
1628 otheroptab
= vrotr_optab
;
1630 if (otheroptab
&& optab_handler (otheroptab
, mode
) != CODE_FOR_nothing
)
1632 rtx vop1
= expand_vector_broadcast (mode
, op1
);
1635 temp
= expand_binop_directly (mode
, otheroptab
, op0
, vop1
,
1636 target
, unsignedp
, methods
, last
);
1643 /* Look for a wider mode of the same class for which we think we
1644 can open-code the operation. Check for a widening multiply at the
1645 wider mode as well. */
1647 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1648 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1649 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1650 wider_mode
!= VOIDmode
;
1651 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1653 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
1654 || (binoptab
== smul_optab
1655 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1656 && (find_widening_optab_handler ((unsignedp
1658 : smul_widen_optab
),
1659 GET_MODE_WIDER_MODE (wider_mode
),
1661 != CODE_FOR_nothing
)))
1663 rtx xop0
= op0
, xop1
= op1
;
1666 /* For certain integer operations, we need not actually extend
1667 the narrow operands, as long as we will truncate
1668 the results to the same narrowness. */
1670 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1671 || binoptab
== xor_optab
1672 || binoptab
== add_optab
|| binoptab
== sub_optab
1673 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1674 && mclass
== MODE_INT
)
1677 xop0
= avoid_expensive_constant (mode
, binoptab
, 0,
1679 if (binoptab
!= ashl_optab
)
1680 xop1
= avoid_expensive_constant (mode
, binoptab
, 1,
1684 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1686 /* The second operand of a shift must always be extended. */
1687 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1688 no_extend
&& binoptab
!= ashl_optab
);
1690 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1691 unsignedp
, OPTAB_DIRECT
);
1694 if (mclass
!= MODE_INT
1695 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
1698 target
= gen_reg_rtx (mode
);
1699 convert_move (target
, temp
, 0);
1703 return gen_lowpart (mode
, temp
);
1706 delete_insns_since (last
);
1710 /* If operation is commutative,
1711 try to make the first operand a register.
1712 Even better, try to make it the same as the target.
1713 Also try to make the last operand a constant. */
1714 if (commutative_optab_p (binoptab
)
1715 && swap_commutative_operands_with_target (target
, op0
, op1
))
1716 std::swap (op0
, op1
);
1718 /* These can be done a word at a time. */
1719 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1720 && mclass
== MODE_INT
1721 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1722 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1727 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1728 won't be accurate, so use a new target. */
1732 || !valid_multiword_target_p (target
))
1733 target
= gen_reg_rtx (mode
);
1737 /* Do the actual arithmetic. */
1738 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1740 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1741 rtx x
= expand_binop (word_mode
, binoptab
,
1742 operand_subword_force (op0
, i
, mode
),
1743 operand_subword_force (op1
, i
, mode
),
1744 target_piece
, unsignedp
, next_methods
);
1749 if (target_piece
!= x
)
1750 emit_move_insn (target_piece
, x
);
1753 insns
= get_insns ();
1756 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1763 /* Synthesize double word shifts from single word shifts. */
1764 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1765 || binoptab
== ashr_optab
)
1766 && mclass
== MODE_INT
1767 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1768 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1769 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
)
1770 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
1771 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1772 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1774 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1775 machine_mode op1_mode
;
1777 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1778 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1779 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1781 /* Apply the truncation to constant shifts. */
1782 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1783 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1785 if (op1
== CONST0_RTX (op1_mode
))
1788 /* Make sure that this is a combination that expand_doubleword_shift
1789 can handle. See the comments there for details. */
1790 if (double_shift_mask
== 0
1791 || (shift_mask
== BITS_PER_WORD
- 1
1792 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1795 rtx into_target
, outof_target
;
1796 rtx into_input
, outof_input
;
1797 int left_shift
, outof_word
;
1799 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1800 won't be accurate, so use a new target. */
1804 || !valid_multiword_target_p (target
))
1805 target
= gen_reg_rtx (mode
);
1809 /* OUTOF_* is the word we are shifting bits away from, and
1810 INTO_* is the word that we are shifting bits towards, thus
1811 they differ depending on the direction of the shift and
1812 WORDS_BIG_ENDIAN. */
1814 left_shift
= binoptab
== ashl_optab
;
1815 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1817 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1818 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1820 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1821 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1823 if (expand_doubleword_shift (op1_mode
, binoptab
,
1824 outof_input
, into_input
, op1
,
1825 outof_target
, into_target
,
1826 unsignedp
, next_methods
, shift_mask
))
1828 insns
= get_insns ();
1838 /* Synthesize double word rotates from single word shifts. */
1839 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1840 && mclass
== MODE_INT
1841 && CONST_INT_P (op1
)
1842 && GET_MODE_PRECISION (mode
) == 2 * BITS_PER_WORD
1843 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1844 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1847 rtx into_target
, outof_target
;
1848 rtx into_input
, outof_input
;
1850 int shift_count
, left_shift
, outof_word
;
1852 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1853 won't be accurate, so use a new target. Do this also if target is not
1854 a REG, first because having a register instead may open optimization
1855 opportunities, and second because if target and op0 happen to be MEMs
1856 designating the same location, we would risk clobbering it too early
1857 in the code sequence we generate below. */
1862 || !valid_multiword_target_p (target
))
1863 target
= gen_reg_rtx (mode
);
1867 shift_count
= INTVAL (op1
);
1869 /* OUTOF_* is the word we are shifting bits away from, and
1870 INTO_* is the word that we are shifting bits towards, thus
1871 they differ depending on the direction of the shift and
1872 WORDS_BIG_ENDIAN. */
1874 left_shift
= (binoptab
== rotl_optab
);
1875 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1877 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1878 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1880 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1881 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1883 if (shift_count
== BITS_PER_WORD
)
1885 /* This is just a word swap. */
1886 emit_move_insn (outof_target
, into_input
);
1887 emit_move_insn (into_target
, outof_input
);
1892 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1893 rtx first_shift_count
, second_shift_count
;
1894 optab reverse_unsigned_shift
, unsigned_shift
;
1896 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1897 ? lshr_optab
: ashl_optab
);
1899 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1900 ? ashl_optab
: lshr_optab
);
1902 if (shift_count
> BITS_PER_WORD
)
1904 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1905 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1909 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1910 second_shift_count
= GEN_INT (shift_count
);
1913 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1914 outof_input
, first_shift_count
,
1915 NULL_RTX
, unsignedp
, next_methods
);
1916 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1917 into_input
, second_shift_count
,
1918 NULL_RTX
, unsignedp
, next_methods
);
1920 if (into_temp1
!= 0 && into_temp2
!= 0)
1921 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1922 into_target
, unsignedp
, next_methods
);
1926 if (inter
!= 0 && inter
!= into_target
)
1927 emit_move_insn (into_target
, inter
);
1929 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1930 into_input
, first_shift_count
,
1931 NULL_RTX
, unsignedp
, next_methods
);
1932 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1933 outof_input
, second_shift_count
,
1934 NULL_RTX
, unsignedp
, next_methods
);
1936 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1937 inter
= expand_binop (word_mode
, ior_optab
,
1938 outof_temp1
, outof_temp2
,
1939 outof_target
, unsignedp
, next_methods
);
1941 if (inter
!= 0 && inter
!= outof_target
)
1942 emit_move_insn (outof_target
, inter
);
1945 insns
= get_insns ();
1955 /* These can be done a word at a time by propagating carries. */
1956 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1957 && mclass
== MODE_INT
1958 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1959 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1962 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1963 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1964 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1965 rtx xop0
, xop1
, xtarget
;
1967 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1968 value is one of those, use it. Otherwise, use 1 since it is the
1969 one easiest to get. */
1970 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1971 int normalizep
= STORE_FLAG_VALUE
;
1976 /* Prepare the operands. */
1977 xop0
= force_reg (mode
, op0
);
1978 xop1
= force_reg (mode
, op1
);
1980 xtarget
= gen_reg_rtx (mode
);
1982 if (target
== 0 || !REG_P (target
) || !valid_multiword_target_p (target
))
1985 /* Indicate for flow that the entire target reg is being set. */
1987 emit_clobber (xtarget
);
1989 /* Do the actual arithmetic. */
1990 for (i
= 0; i
< nwords
; i
++)
1992 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1993 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1994 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1995 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1998 /* Main add/subtract of the input operands. */
1999 x
= expand_binop (word_mode
, binoptab
,
2000 op0_piece
, op1_piece
,
2001 target_piece
, unsignedp
, next_methods
);
2007 /* Store carry from main add/subtract. */
2008 carry_out
= gen_reg_rtx (word_mode
);
2009 carry_out
= emit_store_flag_force (carry_out
,
2010 (binoptab
== add_optab
2013 word_mode
, 1, normalizep
);
2020 /* Add/subtract previous carry to main result. */
2021 newx
= expand_binop (word_mode
,
2022 normalizep
== 1 ? binoptab
: otheroptab
,
2024 NULL_RTX
, 1, next_methods
);
2028 /* Get out carry from adding/subtracting carry in. */
2029 rtx carry_tmp
= gen_reg_rtx (word_mode
);
2030 carry_tmp
= emit_store_flag_force (carry_tmp
,
2031 (binoptab
== add_optab
2034 word_mode
, 1, normalizep
);
2036 /* Logical-ior the two poss. carry together. */
2037 carry_out
= expand_binop (word_mode
, ior_optab
,
2038 carry_out
, carry_tmp
,
2039 carry_out
, 0, next_methods
);
2043 emit_move_insn (target_piece
, newx
);
2047 if (x
!= target_piece
)
2048 emit_move_insn (target_piece
, x
);
2051 carry_in
= carry_out
;
2054 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2056 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
2057 || ! rtx_equal_p (target
, xtarget
))
2059 rtx temp
= emit_move_insn (target
, xtarget
);
2061 set_dst_reg_note (temp
, REG_EQUAL
,
2062 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2063 mode
, copy_rtx (xop0
),
2074 delete_insns_since (last
);
2077 /* Attempt to synthesize double word multiplies using a sequence of word
2078 mode multiplications. We first attempt to generate a sequence using a
2079 more efficient unsigned widening multiply, and if that fails we then
2080 try using a signed widening multiply. */
2082 if (binoptab
== smul_optab
2083 && mclass
== MODE_INT
2084 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2085 && optab_handler (smul_optab
, word_mode
) != CODE_FOR_nothing
2086 && optab_handler (add_optab
, word_mode
) != CODE_FOR_nothing
)
2088 rtx product
= NULL_RTX
;
2089 if (widening_optab_handler (umul_widen_optab
, mode
, word_mode
)
2090 != CODE_FOR_nothing
)
2092 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2095 delete_insns_since (last
);
2098 if (product
== NULL_RTX
2099 && widening_optab_handler (smul_widen_optab
, mode
, word_mode
)
2100 != CODE_FOR_nothing
)
2102 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2105 delete_insns_since (last
);
2108 if (product
!= NULL_RTX
)
2110 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
2112 temp
= emit_move_insn (target
? target
: product
, product
);
2113 set_dst_reg_note (temp
,
2115 gen_rtx_fmt_ee (MULT
, mode
,
2118 target
? target
: product
);
2124 /* It can't be open-coded in this mode.
2125 Use a library call if one is available and caller says that's ok. */
2127 libfunc
= optab_libfunc (binoptab
, mode
);
2129 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2133 machine_mode op1_mode
= mode
;
2138 if (shift_optab_p (binoptab
))
2140 op1_mode
= targetm
.libgcc_shift_count_mode ();
2141 /* Specify unsigned here,
2142 since negative shift counts are meaningless. */
2143 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2146 if (GET_MODE (op0
) != VOIDmode
2147 && GET_MODE (op0
) != mode
)
2148 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2150 /* Pass 1 for NO_QUEUE so we don't lose any increments
2151 if the libcall is cse'd or moved. */
2152 value
= emit_library_call_value (libfunc
,
2153 NULL_RTX
, LCT_CONST
, mode
, 2,
2154 op0
, mode
, op1x
, op1_mode
);
2156 insns
= get_insns ();
2159 target
= gen_reg_rtx (mode
);
2160 emit_libcall_block_1 (insns
, target
, value
,
2161 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2163 trapv_binoptab_p (binoptab
));
2168 delete_insns_since (last
);
2170 /* It can't be done in this mode. Can we do it in a wider mode? */
2172 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2173 || methods
== OPTAB_MUST_WIDEN
))
2175 /* Caller says, don't even try. */
2176 delete_insns_since (entry_last
);
2180 /* Compute the value of METHODS to pass to recursive calls.
2181 Don't allow widening to be tried recursively. */
2183 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2185 /* Look for a wider mode of the same class for which it appears we can do
2188 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2190 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2191 wider_mode
!= VOIDmode
;
2192 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2194 if (find_widening_optab_handler (binoptab
, wider_mode
, mode
, 1)
2196 || (methods
== OPTAB_LIB
2197 && optab_libfunc (binoptab
, wider_mode
)))
2199 rtx xop0
= op0
, xop1
= op1
;
2202 /* For certain integer operations, we need not actually extend
2203 the narrow operands, as long as we will truncate
2204 the results to the same narrowness. */
2206 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2207 || binoptab
== xor_optab
2208 || binoptab
== add_optab
|| binoptab
== sub_optab
2209 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2210 && mclass
== MODE_INT
)
2213 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2214 unsignedp
, no_extend
);
2216 /* The second operand of a shift must always be extended. */
2217 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2218 no_extend
&& binoptab
!= ashl_optab
);
2220 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2221 unsignedp
, methods
);
2224 if (mclass
!= MODE_INT
2225 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
2228 target
= gen_reg_rtx (mode
);
2229 convert_move (target
, temp
, 0);
2233 return gen_lowpart (mode
, temp
);
2236 delete_insns_since (last
);
2241 delete_insns_since (entry_last
);
2245 /* Expand a binary operator which has both signed and unsigned forms.
2246 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2249 If we widen unsigned operands, we may use a signed wider operation instead
2250 of an unsigned wider operation, since the result would be the same. */
2253 sign_expand_binop (machine_mode mode
, optab uoptab
, optab soptab
,
2254 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2255 enum optab_methods methods
)
2258 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2261 /* Do it without widening, if possible. */
2262 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2263 unsignedp
, OPTAB_DIRECT
);
2264 if (temp
|| methods
== OPTAB_DIRECT
)
2267 /* Try widening to a signed int. Disable any direct use of any
2268 signed insn in the current mode. */
2269 save_enable
= swap_optab_enable (soptab
, mode
, false);
2271 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2272 unsignedp
, OPTAB_WIDEN
);
2274 /* For unsigned operands, try widening to an unsigned int. */
2275 if (!temp
&& unsignedp
)
2276 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2277 unsignedp
, OPTAB_WIDEN
);
2278 if (temp
|| methods
== OPTAB_WIDEN
)
2281 /* Use the right width libcall if that exists. */
2282 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2283 unsignedp
, OPTAB_LIB
);
2284 if (temp
|| methods
== OPTAB_LIB
)
2287 /* Must widen and use a libcall, use either signed or unsigned. */
2288 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2289 unsignedp
, methods
);
2290 if (!temp
&& unsignedp
)
2291 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2292 unsignedp
, methods
);
2295 /* Undo the fiddling above. */
2297 swap_optab_enable (soptab
, mode
, true);
2301 /* Generate code to perform an operation specified by UNOPPTAB
2302 on operand OP0, with two results to TARG0 and TARG1.
2303 We assume that the order of the operands for the instruction
2304 is TARG0, TARG1, OP0.
2306 Either TARG0 or TARG1 may be zero, but what that means is that
2307 the result is not actually wanted. We will generate it into
2308 a dummy pseudo-reg and discard it. They may not both be zero.
2310 Returns 1 if this operation can be performed; 0 if not. */
2313 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2316 machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2317 enum mode_class mclass
;
2318 machine_mode wider_mode
;
2319 rtx_insn
*entry_last
= get_last_insn ();
2322 mclass
= GET_MODE_CLASS (mode
);
2325 targ0
= gen_reg_rtx (mode
);
2327 targ1
= gen_reg_rtx (mode
);
2329 /* Record where to go back to if we fail. */
2330 last
= get_last_insn ();
2332 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2334 struct expand_operand ops
[3];
2335 enum insn_code icode
= optab_handler (unoptab
, mode
);
2337 create_fixed_operand (&ops
[0], targ0
);
2338 create_fixed_operand (&ops
[1], targ1
);
2339 create_convert_operand_from (&ops
[2], op0
, mode
, unsignedp
);
2340 if (maybe_expand_insn (icode
, 3, ops
))
2344 /* It can't be done in this mode. Can we do it in a wider mode? */
2346 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2348 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2349 wider_mode
!= VOIDmode
;
2350 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2352 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2354 rtx t0
= gen_reg_rtx (wider_mode
);
2355 rtx t1
= gen_reg_rtx (wider_mode
);
2356 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2358 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2360 convert_move (targ0
, t0
, unsignedp
);
2361 convert_move (targ1
, t1
, unsignedp
);
2365 delete_insns_since (last
);
2370 delete_insns_since (entry_last
);
2374 /* Generate code to perform an operation specified by BINOPTAB
2375 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2376 We assume that the order of the operands for the instruction
2377 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2378 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2380 Either TARG0 or TARG1 may be zero, but what that means is that
2381 the result is not actually wanted. We will generate it into
2382 a dummy pseudo-reg and discard it. They may not both be zero.
2384 Returns 1 if this operation can be performed; 0 if not. */
2387 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2390 machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2391 enum mode_class mclass
;
2392 machine_mode wider_mode
;
2393 rtx_insn
*entry_last
= get_last_insn ();
2396 mclass
= GET_MODE_CLASS (mode
);
2399 targ0
= gen_reg_rtx (mode
);
2401 targ1
= gen_reg_rtx (mode
);
2403 /* Record where to go back to if we fail. */
2404 last
= get_last_insn ();
2406 if (optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
2408 struct expand_operand ops
[4];
2409 enum insn_code icode
= optab_handler (binoptab
, mode
);
2410 machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2411 machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2412 rtx xop0
= op0
, xop1
= op1
;
2414 /* If we are optimizing, force expensive constants into a register. */
2415 xop0
= avoid_expensive_constant (mode0
, binoptab
, 0, xop0
, unsignedp
);
2416 xop1
= avoid_expensive_constant (mode1
, binoptab
, 1, xop1
, unsignedp
);
2418 create_fixed_operand (&ops
[0], targ0
);
2419 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2420 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
2421 create_fixed_operand (&ops
[3], targ1
);
2422 if (maybe_expand_insn (icode
, 4, ops
))
2424 delete_insns_since (last
);
2427 /* It can't be done in this mode. Can we do it in a wider mode? */
2429 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2431 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2432 wider_mode
!= VOIDmode
;
2433 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2435 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
)
2437 rtx t0
= gen_reg_rtx (wider_mode
);
2438 rtx t1
= gen_reg_rtx (wider_mode
);
2439 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2440 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2442 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2445 convert_move (targ0
, t0
, unsignedp
);
2446 convert_move (targ1
, t1
, unsignedp
);
2450 delete_insns_since (last
);
2455 delete_insns_since (entry_last
);
2459 /* Expand the two-valued library call indicated by BINOPTAB, but
2460 preserve only one of the values. If TARG0 is non-NULL, the first
2461 value is placed into TARG0; otherwise the second value is placed
2462 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2463 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2464 This routine assumes that the value returned by the library call is
2465 as if the return value was of an integral mode twice as wide as the
2466 mode of OP0. Returns 1 if the call was successful. */
2469 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2470 rtx targ0
, rtx targ1
, enum rtx_code code
)
2473 machine_mode libval_mode
;
2478 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2479 gcc_assert (!targ0
!= !targ1
);
2481 mode
= GET_MODE (op0
);
2482 libfunc
= optab_libfunc (binoptab
, mode
);
2486 /* The value returned by the library function will have twice as
2487 many bits as the nominal MODE. */
2488 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2491 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2495 /* Get the part of VAL containing the value that we want. */
2496 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2497 targ0
? 0 : GET_MODE_SIZE (mode
));
2498 insns
= get_insns ();
2500 /* Move the into the desired location. */
2501 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2502 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2508 /* Wrapper around expand_unop which takes an rtx code to specify
2509 the operation to perform, not an optab pointer. All other
2510 arguments are the same. */
2512 expand_simple_unop (machine_mode mode
, enum rtx_code code
, rtx op0
,
2513 rtx target
, int unsignedp
)
2515 optab unop
= code_to_optab (code
);
2518 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2524 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
2526 A similar operation can be used for clrsb. UNOPTAB says which operation
2527 we are trying to expand. */
2529 widen_leading (machine_mode mode
, rtx op0
, rtx target
, optab unoptab
)
2531 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2532 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2534 machine_mode wider_mode
;
2535 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2536 wider_mode
!= VOIDmode
;
2537 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2539 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2544 last
= get_last_insn ();
2547 target
= gen_reg_rtx (mode
);
2548 xop0
= widen_operand (op0
, wider_mode
, mode
,
2549 unoptab
!= clrsb_optab
, false);
2550 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2551 unoptab
!= clrsb_optab
);
2554 (wider_mode
, sub_optab
, temp
,
2555 gen_int_mode (GET_MODE_PRECISION (wider_mode
)
2556 - GET_MODE_PRECISION (mode
),
2558 target
, true, OPTAB_DIRECT
);
2560 delete_insns_since (last
);
2569 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2570 quantities, choosing which based on whether the high word is nonzero. */
2572 expand_doubleword_clz (machine_mode mode
, rtx op0
, rtx target
)
2574 rtx xop0
= force_reg (mode
, op0
);
2575 rtx subhi
= gen_highpart (word_mode
, xop0
);
2576 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2577 rtx_code_label
*hi0_label
= gen_label_rtx ();
2578 rtx_code_label
*after_label
= gen_label_rtx ();
2582 /* If we were not given a target, use a word_mode register, not a
2583 'mode' register. The result will fit, and nobody is expecting
2584 anything bigger (the return type of __builtin_clz* is int). */
2586 target
= gen_reg_rtx (word_mode
);
2588 /* In any case, write to a word_mode scratch in both branches of the
2589 conditional, so we can ensure there is a single move insn setting
2590 'target' to tag a REG_EQUAL note on. */
2591 result
= gen_reg_rtx (word_mode
);
2595 /* If the high word is not equal to zero,
2596 then clz of the full value is clz of the high word. */
2597 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2598 word_mode
, true, hi0_label
);
2600 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2605 convert_move (result
, temp
, true);
2607 emit_jump_insn (gen_jump (after_label
));
2610 /* Else clz of the full value is clz of the low word plus the number
2611 of bits in the high word. */
2612 emit_label (hi0_label
);
2614 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2617 temp
= expand_binop (word_mode
, add_optab
, temp
,
2618 gen_int_mode (GET_MODE_BITSIZE (word_mode
), word_mode
),
2619 result
, true, OPTAB_DIRECT
);
2623 convert_move (result
, temp
, true);
2625 emit_label (after_label
);
2626 convert_move (target
, result
, true);
2631 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2643 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2645 widen_bswap (machine_mode mode
, rtx op0
, rtx target
)
2647 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2648 machine_mode wider_mode
;
2652 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2655 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2656 wider_mode
!= VOIDmode
;
2657 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2658 if (optab_handler (bswap_optab
, wider_mode
) != CODE_FOR_nothing
)
2663 last
= get_last_insn ();
2665 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2666 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2668 gcc_assert (GET_MODE_PRECISION (wider_mode
) == GET_MODE_BITSIZE (wider_mode
)
2669 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
));
2671 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2672 GET_MODE_BITSIZE (wider_mode
)
2673 - GET_MODE_BITSIZE (mode
),
2679 target
= gen_reg_rtx (mode
);
2680 emit_move_insn (target
, gen_lowpart (mode
, x
));
2683 delete_insns_since (last
);
2688 /* Try calculating bswap as two bswaps of two word-sized operands. */
2691 expand_doubleword_bswap (machine_mode mode
, rtx op
, rtx target
)
2695 t1
= expand_unop (word_mode
, bswap_optab
,
2696 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2697 t0
= expand_unop (word_mode
, bswap_optab
,
2698 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2700 if (target
== 0 || !valid_multiword_target_p (target
))
2701 target
= gen_reg_rtx (mode
);
2703 emit_clobber (target
);
2704 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2705 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2710 /* Try calculating (parity x) as (and (popcount x) 1), where
2711 popcount can also be done in a wider mode. */
2713 expand_parity (machine_mode mode
, rtx op0
, rtx target
)
2715 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2716 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2718 machine_mode wider_mode
;
2719 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2720 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2722 if (optab_handler (popcount_optab
, wider_mode
) != CODE_FOR_nothing
)
2727 last
= get_last_insn ();
2730 target
= gen_reg_rtx (mode
);
2731 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2732 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2735 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2736 target
, true, OPTAB_DIRECT
);
2738 delete_insns_since (last
);
2747 /* Try calculating ctz(x) as K - clz(x & -x) ,
2748 where K is GET_MODE_PRECISION(mode) - 1.
2750 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2751 don't have to worry about what the hardware does in that case. (If
2752 the clz instruction produces the usual value at 0, which is K, the
2753 result of this code sequence will be -1; expand_ffs, below, relies
2754 on this. It might be nice to have it be K instead, for consistency
2755 with the (very few) processors that provide a ctz with a defined
2756 value, but that would take one more instruction, and it would be
2757 less convenient for expand_ffs anyway. */
2760 expand_ctz (machine_mode mode
, rtx op0
, rtx target
)
2765 if (optab_handler (clz_optab
, mode
) == CODE_FOR_nothing
)
2770 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2772 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2773 true, OPTAB_DIRECT
);
2775 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2777 temp
= expand_binop (mode
, sub_optab
,
2778 gen_int_mode (GET_MODE_PRECISION (mode
) - 1, mode
),
2780 true, OPTAB_DIRECT
);
2790 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2796 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2797 else with the sequence used by expand_clz.
2799 The ffs builtin promises to return zero for a zero value and ctz/clz
2800 may have an undefined value in that case. If they do not give us a
2801 convenient value, we have to generate a test and branch. */
2803 expand_ffs (machine_mode mode
, rtx op0
, rtx target
)
2805 HOST_WIDE_INT val
= 0;
2806 bool defined_at_zero
= false;
2810 if (optab_handler (ctz_optab
, mode
) != CODE_FOR_nothing
)
2814 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2818 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2820 else if (optab_handler (clz_optab
, mode
) != CODE_FOR_nothing
)
2823 temp
= expand_ctz (mode
, op0
, 0);
2827 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2829 defined_at_zero
= true;
2830 val
= (GET_MODE_PRECISION (mode
) - 1) - val
;
2836 if (defined_at_zero
&& val
== -1)
2837 /* No correction needed at zero. */;
2840 /* We don't try to do anything clever with the situation found
2841 on some processors (eg Alpha) where ctz(0:mode) ==
2842 bitsize(mode). If someone can think of a way to send N to -1
2843 and leave alone all values in the range 0..N-1 (where N is a
2844 power of two), cheaper than this test-and-branch, please add it.
2846 The test-and-branch is done after the operation itself, in case
2847 the operation sets condition codes that can be recycled for this.
2848 (This is true on i386, for instance.) */
2850 rtx_code_label
*nonzero_label
= gen_label_rtx ();
2851 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2852 mode
, true, nonzero_label
);
2854 convert_move (temp
, GEN_INT (-1), false);
2855 emit_label (nonzero_label
);
2858 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2859 to produce a value in the range 0..bitsize. */
2860 temp
= expand_binop (mode
, add_optab
, temp
, gen_int_mode (1, mode
),
2861 target
, false, OPTAB_DIRECT
);
2868 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2877 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2878 conditions, VAL may already be a SUBREG against which we cannot generate
2879 a further SUBREG. In this case, we expect forcing the value into a
2880 register will work around the situation. */
2883 lowpart_subreg_maybe_copy (machine_mode omode
, rtx val
,
2887 ret
= lowpart_subreg (omode
, val
, imode
);
2890 val
= force_reg (imode
, val
);
2891 ret
= lowpart_subreg (omode
, val
, imode
);
2892 gcc_assert (ret
!= NULL
);
2897 /* Expand a floating point absolute value or negation operation via a
2898 logical operation on the sign bit. */
2901 expand_absneg_bit (enum rtx_code code
, machine_mode mode
,
2902 rtx op0
, rtx target
)
2904 const struct real_format
*fmt
;
2905 int bitpos
, word
, nwords
, i
;
2910 /* The format has to have a simple sign bit. */
2911 fmt
= REAL_MODE_FORMAT (mode
);
2915 bitpos
= fmt
->signbit_rw
;
2919 /* Don't create negative zeros if the format doesn't support them. */
2920 if (code
== NEG
&& !fmt
->has_signed_zero
)
2923 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2925 imode
= int_mode_for_mode (mode
);
2926 if (imode
== BLKmode
)
2935 if (FLOAT_WORDS_BIG_ENDIAN
)
2936 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2938 word
= bitpos
/ BITS_PER_WORD
;
2939 bitpos
= bitpos
% BITS_PER_WORD
;
2940 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2943 wide_int mask
= wi::set_bit_in_zero (bitpos
, GET_MODE_PRECISION (imode
));
2949 || (nwords
> 1 && !valid_multiword_target_p (target
)))
2950 target
= gen_reg_rtx (mode
);
2956 for (i
= 0; i
< nwords
; ++i
)
2958 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2959 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
2963 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2965 immed_wide_int_const (mask
, imode
),
2966 targ_piece
, 1, OPTAB_LIB_WIDEN
);
2967 if (temp
!= targ_piece
)
2968 emit_move_insn (targ_piece
, temp
);
2971 emit_move_insn (targ_piece
, op0_piece
);
2974 insns
= get_insns ();
2981 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2982 gen_lowpart (imode
, op0
),
2983 immed_wide_int_const (mask
, imode
),
2984 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
2985 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
2987 set_dst_reg_note (get_last_insn (), REG_EQUAL
,
2988 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)),
2995 /* As expand_unop, but will fail rather than attempt the operation in a
2996 different mode or with a libcall. */
2998 expand_unop_direct (machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3001 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
3003 struct expand_operand ops
[2];
3004 enum insn_code icode
= optab_handler (unoptab
, mode
);
3005 rtx_insn
*last
= get_last_insn ();
3008 create_output_operand (&ops
[0], target
, mode
);
3009 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
3010 pat
= maybe_gen_insn (icode
, 2, ops
);
3013 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3014 && ! add_equal_note (pat
, ops
[0].value
,
3015 optab_to_code (unoptab
),
3016 ops
[1].value
, NULL_RTX
))
3018 delete_insns_since (last
);
3019 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
3024 return ops
[0].value
;
3030 /* Generate code to perform an operation specified by UNOPTAB
3031 on operand OP0, with result having machine-mode MODE.
3033 UNSIGNEDP is for the case where we have to widen the operands
3034 to perform the operation. It says to use zero-extension.
3036 If TARGET is nonzero, the value
3037 is generated there, if it is convenient to do so.
3038 In all cases an rtx is returned for the locus of the value;
3039 this may or may not be TARGET. */
3042 expand_unop (machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3045 enum mode_class mclass
= GET_MODE_CLASS (mode
);
3046 machine_mode wider_mode
;
3050 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3054 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3056 /* Widening (or narrowing) clz needs special treatment. */
3057 if (unoptab
== clz_optab
)
3059 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3063 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3064 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3066 temp
= expand_doubleword_clz (mode
, op0
, target
);
3074 if (unoptab
== clrsb_optab
)
3076 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3082 /* Widening (or narrowing) bswap needs special treatment. */
3083 if (unoptab
== bswap_optab
)
3085 /* HImode is special because in this mode BSWAP is equivalent to ROTATE
3086 or ROTATERT. First try these directly; if this fails, then try the
3087 obvious pair of shifts with allowed widening, as this will probably
3088 be always more efficient than the other fallback methods. */
3094 if (optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
)
3096 temp
= expand_binop (mode
, rotl_optab
, op0
, GEN_INT (8), target
,
3097 unsignedp
, OPTAB_DIRECT
);
3102 if (optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
3104 temp
= expand_binop (mode
, rotr_optab
, op0
, GEN_INT (8), target
,
3105 unsignedp
, OPTAB_DIRECT
);
3110 last
= get_last_insn ();
3112 temp1
= expand_binop (mode
, ashl_optab
, op0
, GEN_INT (8), NULL_RTX
,
3113 unsignedp
, OPTAB_WIDEN
);
3114 temp2
= expand_binop (mode
, lshr_optab
, op0
, GEN_INT (8), NULL_RTX
,
3115 unsignedp
, OPTAB_WIDEN
);
3118 temp
= expand_binop (mode
, ior_optab
, temp1
, temp2
, target
,
3119 unsignedp
, OPTAB_WIDEN
);
3124 delete_insns_since (last
);
3127 temp
= widen_bswap (mode
, op0
, target
);
3131 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3132 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3134 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3142 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3143 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3144 wider_mode
!= VOIDmode
;
3145 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3147 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
3150 rtx_insn
*last
= get_last_insn ();
3152 /* For certain operations, we need not actually extend
3153 the narrow operand, as long as we will truncate the
3154 results to the same narrowness. */
3156 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3157 (unoptab
== neg_optab
3158 || unoptab
== one_cmpl_optab
)
3159 && mclass
== MODE_INT
);
3161 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3166 if (mclass
!= MODE_INT
3167 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
3170 target
= gen_reg_rtx (mode
);
3171 convert_move (target
, temp
, 0);
3175 return gen_lowpart (mode
, temp
);
3178 delete_insns_since (last
);
3182 /* These can be done a word at a time. */
3183 if (unoptab
== one_cmpl_optab
3184 && mclass
== MODE_INT
3185 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3186 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3191 if (target
== 0 || target
== op0
|| !valid_multiword_target_p (target
))
3192 target
= gen_reg_rtx (mode
);
3196 /* Do the actual arithmetic. */
3197 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3199 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3200 rtx x
= expand_unop (word_mode
, unoptab
,
3201 operand_subword_force (op0
, i
, mode
),
3202 target_piece
, unsignedp
);
3204 if (target_piece
!= x
)
3205 emit_move_insn (target_piece
, x
);
3208 insns
= get_insns ();
3215 if (optab_to_code (unoptab
) == NEG
)
3217 /* Try negating floating point values by flipping the sign bit. */
3218 if (SCALAR_FLOAT_MODE_P (mode
))
3220 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3225 /* If there is no negation pattern, and we have no negative zero,
3226 try subtracting from zero. */
3227 if (!HONOR_SIGNED_ZEROS (mode
))
3229 temp
= expand_binop (mode
, (unoptab
== negv_optab
3230 ? subv_optab
: sub_optab
),
3231 CONST0_RTX (mode
), op0
, target
,
3232 unsignedp
, OPTAB_DIRECT
);
3238 /* Try calculating parity (x) as popcount (x) % 2. */
3239 if (unoptab
== parity_optab
)
3241 temp
= expand_parity (mode
, op0
, target
);
3246 /* Try implementing ffs (x) in terms of clz (x). */
3247 if (unoptab
== ffs_optab
)
3249 temp
= expand_ffs (mode
, op0
, target
);
3254 /* Try implementing ctz (x) in terms of clz (x). */
3255 if (unoptab
== ctz_optab
)
3257 temp
= expand_ctz (mode
, op0
, target
);
3263 /* Now try a library call in this mode. */
3264 libfunc
= optab_libfunc (unoptab
, mode
);
3270 machine_mode outmode
= mode
;
3272 /* All of these functions return small values. Thus we choose to
3273 have them return something that isn't a double-word. */
3274 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3275 || unoptab
== clrsb_optab
|| unoptab
== popcount_optab
3276 || unoptab
== parity_optab
)
3278 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
),
3279 optab_libfunc (unoptab
, mode
)));
3283 /* Pass 1 for NO_QUEUE so we don't lose any increments
3284 if the libcall is cse'd or moved. */
3285 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3287 insns
= get_insns ();
3290 target
= gen_reg_rtx (outmode
);
3291 eq_value
= gen_rtx_fmt_e (optab_to_code (unoptab
), mode
, op0
);
3292 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3293 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3294 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3295 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3296 emit_libcall_block_1 (insns
, target
, value
, eq_value
,
3297 trapv_unoptab_p (unoptab
));
3302 /* It can't be done in this mode. Can we do it in a wider mode? */
3304 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3306 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3307 wider_mode
!= VOIDmode
;
3308 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3310 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
3311 || optab_libfunc (unoptab
, wider_mode
))
3314 rtx_insn
*last
= get_last_insn ();
3316 /* For certain operations, we need not actually extend
3317 the narrow operand, as long as we will truncate the
3318 results to the same narrowness. */
3319 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3320 (unoptab
== neg_optab
3321 || unoptab
== one_cmpl_optab
3322 || unoptab
== bswap_optab
)
3323 && mclass
== MODE_INT
);
3325 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3328 /* If we are generating clz using wider mode, adjust the
3329 result. Similarly for clrsb. */
3330 if ((unoptab
== clz_optab
|| unoptab
== clrsb_optab
)
3333 (wider_mode
, sub_optab
, temp
,
3334 gen_int_mode (GET_MODE_PRECISION (wider_mode
)
3335 - GET_MODE_PRECISION (mode
),
3337 target
, true, OPTAB_DIRECT
);
3339 /* Likewise for bswap. */
3340 if (unoptab
== bswap_optab
&& temp
!= 0)
3342 gcc_assert (GET_MODE_PRECISION (wider_mode
)
3343 == GET_MODE_BITSIZE (wider_mode
)
3344 && GET_MODE_PRECISION (mode
)
3345 == GET_MODE_BITSIZE (mode
));
3347 temp
= expand_shift (RSHIFT_EXPR
, wider_mode
, temp
,
3348 GET_MODE_BITSIZE (wider_mode
)
3349 - GET_MODE_BITSIZE (mode
),
3355 if (mclass
!= MODE_INT
)
3358 target
= gen_reg_rtx (mode
);
3359 convert_move (target
, temp
, 0);
3363 return gen_lowpart (mode
, temp
);
3366 delete_insns_since (last
);
3371 /* One final attempt at implementing negation via subtraction,
3372 this time allowing widening of the operand. */
3373 if (optab_to_code (unoptab
) == NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3376 temp
= expand_binop (mode
,
3377 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3378 CONST0_RTX (mode
), op0
,
3379 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3387 /* Emit code to compute the absolute value of OP0, with result to
3388 TARGET if convenient. (TARGET may be 0.) The return value says
3389 where the result actually is to be found.
3391 MODE is the mode of the operand; the mode of the result is
3392 different but can be deduced from MODE.
3397 expand_abs_nojump (machine_mode mode
, rtx op0
, rtx target
,
3398 int result_unsignedp
)
3402 if (GET_MODE_CLASS (mode
) != MODE_INT
3404 result_unsignedp
= 1;
3406 /* First try to do it with a special abs instruction. */
3407 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3412 /* For floating point modes, try clearing the sign bit. */
3413 if (SCALAR_FLOAT_MODE_P (mode
))
3415 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3420 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3421 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
3422 && !HONOR_SIGNED_ZEROS (mode
))
3424 rtx_insn
*last
= get_last_insn ();
3426 temp
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3429 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3435 delete_insns_since (last
);
3438 /* If this machine has expensive jumps, we can do integer absolute
3439 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3440 where W is the width of MODE. */
3442 if (GET_MODE_CLASS (mode
) == MODE_INT
3443 && BRANCH_COST (optimize_insn_for_speed_p (),
3446 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3447 GET_MODE_PRECISION (mode
) - 1,
3450 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3453 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3454 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3464 expand_abs (machine_mode mode
, rtx op0
, rtx target
,
3465 int result_unsignedp
, int safe
)
3468 rtx_code_label
*op1
;
3470 if (GET_MODE_CLASS (mode
) != MODE_INT
3472 result_unsignedp
= 1;
3474 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3478 /* If that does not win, use conditional jump and negate. */
3480 /* It is safe to use the target if it is the same
3481 as the source if this is also a pseudo register */
3482 if (op0
== target
&& REG_P (op0
)
3483 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3486 op1
= gen_label_rtx ();
3487 if (target
== 0 || ! safe
3488 || GET_MODE (target
) != mode
3489 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3491 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3492 target
= gen_reg_rtx (mode
);
3494 emit_move_insn (target
, op0
);
3497 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3498 NULL_RTX
, NULL
, op1
, -1);
3500 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3503 emit_move_insn (target
, op0
);
3509 /* Emit code to compute the one's complement absolute value of OP0
3510 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3511 (TARGET may be NULL_RTX.) The return value says where the result
3512 actually is to be found.
3514 MODE is the mode of the operand; the mode of the result is
3515 different but can be deduced from MODE. */
3518 expand_one_cmpl_abs_nojump (machine_mode mode
, rtx op0
, rtx target
)
3522 /* Not applicable for floating point modes. */
3523 if (FLOAT_MODE_P (mode
))
3526 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3527 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
)
3529 rtx_insn
*last
= get_last_insn ();
3531 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, NULL_RTX
, 0);
3533 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3539 delete_insns_since (last
);
3542 /* If this machine has expensive jumps, we can do one's complement
3543 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3545 if (GET_MODE_CLASS (mode
) == MODE_INT
3546 && BRANCH_COST (optimize_insn_for_speed_p (),
3549 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3550 GET_MODE_PRECISION (mode
) - 1,
3553 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3563 /* A subroutine of expand_copysign, perform the copysign operation using the
3564 abs and neg primitives advertised to exist on the target. The assumption
3565 is that we have a split register file, and leaving op0 in fp registers,
3566 and not playing with subregs so much, will help the register allocator. */
3569 expand_copysign_absneg (machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3570 int bitpos
, bool op0_is_abs
)
3573 enum insn_code icode
;
3575 rtx_code_label
*label
;
3580 /* Check if the back end provides an insn that handles signbit for the
3582 icode
= optab_handler (signbit_optab
, mode
);
3583 if (icode
!= CODE_FOR_nothing
)
3585 imode
= insn_data
[(int) icode
].operand
[0].mode
;
3586 sign
= gen_reg_rtx (imode
);
3587 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3591 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3593 imode
= int_mode_for_mode (mode
);
3594 if (imode
== BLKmode
)
3596 op1
= gen_lowpart (imode
, op1
);
3603 if (FLOAT_WORDS_BIG_ENDIAN
)
3604 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3606 word
= bitpos
/ BITS_PER_WORD
;
3607 bitpos
= bitpos
% BITS_PER_WORD
;
3608 op1
= operand_subword_force (op1
, word
, mode
);
3611 wide_int mask
= wi::set_bit_in_zero (bitpos
, GET_MODE_PRECISION (imode
));
3612 sign
= expand_binop (imode
, and_optab
, op1
,
3613 immed_wide_int_const (mask
, imode
),
3614 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3619 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3626 if (target
== NULL_RTX
)
3627 target
= copy_to_reg (op0
);
3629 emit_move_insn (target
, op0
);
3632 label
= gen_label_rtx ();
3633 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3635 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3636 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3638 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3640 emit_move_insn (target
, op0
);
3648 /* A subroutine of expand_copysign, perform the entire copysign operation
3649 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3650 is true if op0 is known to have its sign bit clear. */
3653 expand_copysign_bit (machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3654 int bitpos
, bool op0_is_abs
)
3657 int word
, nwords
, i
;
3661 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3663 imode
= int_mode_for_mode (mode
);
3664 if (imode
== BLKmode
)
3673 if (FLOAT_WORDS_BIG_ENDIAN
)
3674 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3676 word
= bitpos
/ BITS_PER_WORD
;
3677 bitpos
= bitpos
% BITS_PER_WORD
;
3678 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3681 wide_int mask
= wi::set_bit_in_zero (bitpos
, GET_MODE_PRECISION (imode
));
3686 || (nwords
> 1 && !valid_multiword_target_p (target
)))
3687 target
= gen_reg_rtx (mode
);
3693 for (i
= 0; i
< nwords
; ++i
)
3695 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3696 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3702 = expand_binop (imode
, and_optab
, op0_piece
,
3703 immed_wide_int_const (~mask
, imode
),
3704 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3705 op1
= expand_binop (imode
, and_optab
,
3706 operand_subword_force (op1
, i
, mode
),
3707 immed_wide_int_const (mask
, imode
),
3708 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3710 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3711 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3712 if (temp
!= targ_piece
)
3713 emit_move_insn (targ_piece
, temp
);
3716 emit_move_insn (targ_piece
, op0_piece
);
3719 insns
= get_insns ();
3726 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3727 immed_wide_int_const (mask
, imode
),
3728 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3730 op0
= gen_lowpart (imode
, op0
);
3732 op0
= expand_binop (imode
, and_optab
, op0
,
3733 immed_wide_int_const (~mask
, imode
),
3734 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3736 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3737 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3738 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3744 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3745 scalar floating point mode. Return NULL if we do not know how to
3746 expand the operation inline. */
3749 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3751 machine_mode mode
= GET_MODE (op0
);
3752 const struct real_format
*fmt
;
3756 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3757 gcc_assert (GET_MODE (op1
) == mode
);
3759 /* First try to do it with a special instruction. */
3760 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3761 target
, 0, OPTAB_DIRECT
);
3765 fmt
= REAL_MODE_FORMAT (mode
);
3766 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3770 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3772 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3773 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3777 if (fmt
->signbit_ro
>= 0
3778 && (CONST_DOUBLE_AS_FLOAT_P (op0
)
3779 || (optab_handler (neg_optab
, mode
) != CODE_FOR_nothing
3780 && optab_handler (abs_optab
, mode
) != CODE_FOR_nothing
)))
3782 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3783 fmt
->signbit_ro
, op0_is_abs
);
3788 if (fmt
->signbit_rw
< 0)
3790 return expand_copysign_bit (mode
, op0
, op1
, target
,
3791 fmt
->signbit_rw
, op0_is_abs
);
3794 /* Generate an instruction whose insn-code is INSN_CODE,
3795 with two operands: an output TARGET and an input OP0.
3796 TARGET *must* be nonzero, and the output is always stored there.
3797 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3798 the value that is stored into TARGET.
3800 Return false if expansion failed. */
3803 maybe_emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
,
3806 struct expand_operand ops
[2];
3809 create_output_operand (&ops
[0], target
, GET_MODE (target
));
3810 create_input_operand (&ops
[1], op0
, GET_MODE (op0
));
3811 pat
= maybe_gen_insn (icode
, 2, ops
);
3815 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3817 add_equal_note (pat
, ops
[0].value
, code
, ops
[1].value
, NULL_RTX
);
3821 if (ops
[0].value
!= target
)
3822 emit_move_insn (target
, ops
[0].value
);
3825 /* Generate an instruction whose insn-code is INSN_CODE,
3826 with two operands: an output TARGET and an input OP0.
3827 TARGET *must* be nonzero, and the output is always stored there.
3828 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3829 the value that is stored into TARGET. */
3832 emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
, enum rtx_code code
)
3834 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3838 struct no_conflict_data
3841 rtx_insn
*first
, *insn
;
3845 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3846 the currently examined clobber / store has to stay in the list of
3847 insns that constitute the actual libcall block. */
3849 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3851 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3853 /* If this inns directly contributes to setting the target, it must stay. */
3854 if (reg_overlap_mentioned_p (p
->target
, dest
))
3855 p
->must_stay
= true;
3856 /* If we haven't committed to keeping any other insns in the list yet,
3857 there is nothing more to check. */
3858 else if (p
->insn
== p
->first
)
3860 /* If this insn sets / clobbers a register that feeds one of the insns
3861 already in the list, this insn has to stay too. */
3862 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3863 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3864 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3865 /* Likewise if this insn depends on a register set by a previous
3866 insn in the list, or if it sets a result (presumably a hard
3867 register) that is set or clobbered by a previous insn.
3868 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3869 SET_DEST perform the former check on the address, and the latter
3870 check on the MEM. */
3871 || (GET_CODE (set
) == SET
3872 && (modified_in_p (SET_SRC (set
), p
->first
)
3873 || modified_in_p (SET_DEST (set
), p
->first
)
3874 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3875 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3876 p
->must_stay
= true;
3880 /* Emit code to make a call to a constant function or a library call.
3882 INSNS is a list containing all insns emitted in the call.
3883 These insns leave the result in RESULT. Our block is to copy RESULT
3884 to TARGET, which is logically equivalent to EQUIV.
3886 We first emit any insns that set a pseudo on the assumption that these are
3887 loading constants into registers; doing so allows them to be safely cse'ed
3888 between blocks. Then we emit all the other insns in the block, followed by
3889 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3890 note with an operand of EQUIV. */
3893 emit_libcall_block_1 (rtx_insn
*insns
, rtx target
, rtx result
, rtx equiv
,
3894 bool equiv_may_trap
)
3896 rtx final_dest
= target
;
3897 rtx_insn
*next
, *last
, *insn
;
3899 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3900 into a MEM later. Protect the libcall block from this change. */
3901 if (! REG_P (target
) || REG_USERVAR_P (target
))
3902 target
= gen_reg_rtx (GET_MODE (target
));
3904 /* If we're using non-call exceptions, a libcall corresponding to an
3905 operation that may trap may also trap. */
3906 /* ??? See the comment in front of make_reg_eh_region_note. */
3907 if (cfun
->can_throw_non_call_exceptions
3908 && (equiv_may_trap
|| may_trap_p (equiv
)))
3910 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3913 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3916 int lp_nr
= INTVAL (XEXP (note
, 0));
3917 if (lp_nr
== 0 || lp_nr
== INT_MIN
)
3918 remove_note (insn
, note
);
3924 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3925 reg note to indicate that this call cannot throw or execute a nonlocal
3926 goto (unless there is already a REG_EH_REGION note, in which case
3928 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3930 make_reg_eh_region_note_nothrow_nononlocal (insn
);
3933 /* First emit all insns that set pseudos. Remove them from the list as
3934 we go. Avoid insns that set pseudos which were referenced in previous
3935 insns. These can be generated by move_by_pieces, for example,
3936 to update an address. Similarly, avoid insns that reference things
3937 set in previous insns. */
3939 for (insn
= insns
; insn
; insn
= next
)
3941 rtx set
= single_set (insn
);
3943 next
= NEXT_INSN (insn
);
3945 if (set
!= 0 && REG_P (SET_DEST (set
))
3946 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3948 struct no_conflict_data data
;
3950 data
.target
= const0_rtx
;
3954 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3955 if (! data
.must_stay
)
3957 if (PREV_INSN (insn
))
3958 SET_NEXT_INSN (PREV_INSN (insn
)) = next
;
3963 SET_PREV_INSN (next
) = PREV_INSN (insn
);
3969 /* Some ports use a loop to copy large arguments onto the stack.
3970 Don't move anything outside such a loop. */
3975 /* Write the remaining insns followed by the final copy. */
3976 for (insn
= insns
; insn
; insn
= next
)
3978 next
= NEXT_INSN (insn
);
3983 last
= emit_move_insn (target
, result
);
3984 set_dst_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
), target
);
3986 if (final_dest
!= target
)
3987 emit_move_insn (final_dest
, target
);
3991 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3993 emit_libcall_block_1 (safe_as_a
<rtx_insn
*> (insns
),
3994 target
, result
, equiv
, false);
3997 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3998 PURPOSE describes how this comparison will be used. CODE is the rtx
3999 comparison code we will be using.
4001 ??? Actually, CODE is slightly weaker than that. A target is still
4002 required to implement all of the normal bcc operations, but not
4003 required to implement all (or any) of the unordered bcc operations. */
4006 can_compare_p (enum rtx_code code
, machine_mode mode
,
4007 enum can_compare_purpose purpose
)
4010 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
4013 enum insn_code icode
;
4015 if (purpose
== ccp_jump
4016 && (icode
= optab_handler (cbranch_optab
, mode
)) != CODE_FOR_nothing
4017 && insn_operand_matches (icode
, 0, test
))
4019 if (purpose
== ccp_store_flag
4020 && (icode
= optab_handler (cstore_optab
, mode
)) != CODE_FOR_nothing
4021 && insn_operand_matches (icode
, 1, test
))
4023 if (purpose
== ccp_cmov
4024 && optab_handler (cmov_optab
, mode
) != CODE_FOR_nothing
)
4027 mode
= GET_MODE_WIDER_MODE (mode
);
4028 PUT_MODE (test
, mode
);
4030 while (mode
!= VOIDmode
);
4035 /* This function is called when we are going to emit a compare instruction that
4036 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
4038 *PMODE is the mode of the inputs (in case they are const_int).
4039 *PUNSIGNEDP nonzero says that the operands are unsigned;
4040 this matters if they need to be widened (as given by METHODS).
4042 If they have mode BLKmode, then SIZE specifies the size of both operands.
4044 This function performs all the setup necessary so that the caller only has
4045 to emit a single comparison insn. This setup can involve doing a BLKmode
4046 comparison or emitting a library call to perform the comparison if no insn
4047 is available to handle it.
4048 The values which are passed in through pointers can be modified; the caller
4049 should perform the comparison on the modified values. Constant
4050 comparisons must have already been folded. */
4053 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4054 int unsignedp
, enum optab_methods methods
,
4055 rtx
*ptest
, machine_mode
*pmode
)
4057 machine_mode mode
= *pmode
;
4059 machine_mode cmp_mode
;
4060 enum mode_class mclass
;
4062 /* The other methods are not needed. */
4063 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
4064 || methods
== OPTAB_LIB_WIDEN
);
4066 /* If we are optimizing, force expensive constants into a register. */
4067 if (CONSTANT_P (x
) && optimize
4068 && (rtx_cost (x
, COMPARE
, 0, optimize_insn_for_speed_p ())
4069 > COSTS_N_INSNS (1)))
4070 x
= force_reg (mode
, x
);
4072 if (CONSTANT_P (y
) && optimize
4073 && (rtx_cost (y
, COMPARE
, 1, optimize_insn_for_speed_p ())
4074 > COSTS_N_INSNS (1)))
4075 y
= force_reg (mode
, y
);
4078 /* Make sure if we have a canonical comparison. The RTL
4079 documentation states that canonical comparisons are required only
4080 for targets which have cc0. */
4081 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
4084 /* Don't let both operands fail to indicate the mode. */
4085 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
4086 x
= force_reg (mode
, x
);
4087 if (mode
== VOIDmode
)
4088 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
4090 /* Handle all BLKmode compares. */
4092 if (mode
== BLKmode
)
4094 machine_mode result_mode
;
4095 enum insn_code cmp_code
;
4100 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
4104 /* Try to use a memory block compare insn - either cmpstr
4105 or cmpmem will do. */
4106 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
4107 cmp_mode
!= VOIDmode
;
4108 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
4110 cmp_code
= direct_optab_handler (cmpmem_optab
, cmp_mode
);
4111 if (cmp_code
== CODE_FOR_nothing
)
4112 cmp_code
= direct_optab_handler (cmpstr_optab
, cmp_mode
);
4113 if (cmp_code
== CODE_FOR_nothing
)
4114 cmp_code
= direct_optab_handler (cmpstrn_optab
, cmp_mode
);
4115 if (cmp_code
== CODE_FOR_nothing
)
4118 /* Must make sure the size fits the insn's mode. */
4119 if ((CONST_INT_P (size
)
4120 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4121 || (GET_MODE_BITSIZE (GET_MODE (size
))
4122 > GET_MODE_BITSIZE (cmp_mode
)))
4125 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4126 result
= gen_reg_rtx (result_mode
);
4127 size
= convert_to_mode (cmp_mode
, size
, 1);
4128 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4130 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4131 *pmode
= result_mode
;
4135 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4138 /* Otherwise call a library function, memcmp. */
4139 libfunc
= memcmp_libfunc
;
4140 length_type
= sizetype
;
4141 result_mode
= TYPE_MODE (integer_type_node
);
4142 cmp_mode
= TYPE_MODE (length_type
);
4143 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4144 TYPE_UNSIGNED (length_type
));
4146 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4154 methods
= OPTAB_LIB_WIDEN
;
4158 /* Don't allow operands to the compare to trap, as that can put the
4159 compare and branch in different basic blocks. */
4160 if (cfun
->can_throw_non_call_exceptions
)
4163 x
= force_reg (mode
, x
);
4165 y
= force_reg (mode
, y
);
4168 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4170 enum insn_code icode
= optab_handler (cbranch_optab
, CCmode
);
4171 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4172 gcc_assert (icode
!= CODE_FOR_nothing
4173 && insn_operand_matches (icode
, 0, test
));
4178 mclass
= GET_MODE_CLASS (mode
);
4179 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4183 enum insn_code icode
;
4184 icode
= optab_handler (cbranch_optab
, cmp_mode
);
4185 if (icode
!= CODE_FOR_nothing
4186 && insn_operand_matches (icode
, 0, test
))
4188 rtx_insn
*last
= get_last_insn ();
4189 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4190 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4192 && insn_operand_matches (icode
, 1, op0
)
4193 && insn_operand_matches (icode
, 2, op1
))
4195 XEXP (test
, 0) = op0
;
4196 XEXP (test
, 1) = op1
;
4201 delete_insns_since (last
);
4204 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4206 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4208 while (cmp_mode
!= VOIDmode
);
4210 if (methods
!= OPTAB_LIB_WIDEN
)
4213 if (!SCALAR_FLOAT_MODE_P (mode
))
4216 machine_mode ret_mode
;
4218 /* Handle a libcall just for the mode we are using. */
4219 libfunc
= optab_libfunc (cmp_optab
, mode
);
4220 gcc_assert (libfunc
);
4222 /* If we want unsigned, and this mode has a distinct unsigned
4223 comparison routine, use that. */
4226 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4231 ret_mode
= targetm
.libgcc_cmp_return_mode ();
4232 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4233 ret_mode
, 2, x
, mode
, y
, mode
);
4235 /* There are two kinds of comparison routines. Biased routines
4236 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4237 of gcc expect that the comparison operation is equivalent
4238 to the modified comparison. For signed comparisons compare the
4239 result against 1 in the biased case, and zero in the unbiased
4240 case. For unsigned comparisons always compare against 1 after
4241 biasing the unbiased result by adding 1. This gives us a way to
4243 The comparisons in the fixed-point helper library are always
4248 if (!TARGET_LIB_INT_CMP_BIASED
&& !ALL_FIXED_POINT_MODE_P (mode
))
4251 x
= plus_constant (ret_mode
, result
, 1);
4257 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4261 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4269 /* Before emitting an insn with code ICODE, make sure that X, which is going
4270 to be used for operand OPNUM of the insn, is converted from mode MODE to
4271 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4272 that it is accepted by the operand predicate. Return the new value. */
4275 prepare_operand (enum insn_code icode
, rtx x
, int opnum
, machine_mode mode
,
4276 machine_mode wider_mode
, int unsignedp
)
4278 if (mode
!= wider_mode
)
4279 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4281 if (!insn_operand_matches (icode
, opnum
, x
))
4283 machine_mode op_mode
= insn_data
[(int) icode
].operand
[opnum
].mode
;
4284 if (reload_completed
)
4286 if (GET_MODE (x
) != op_mode
&& GET_MODE (x
) != VOIDmode
)
4288 x
= copy_to_mode_reg (op_mode
, x
);
4294 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4295 we can do the branch. */
4298 emit_cmp_and_jump_insn_1 (rtx test
, machine_mode mode
, rtx label
, int prob
)
4300 machine_mode optab_mode
;
4301 enum mode_class mclass
;
4302 enum insn_code icode
;
4305 mclass
= GET_MODE_CLASS (mode
);
4306 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4307 icode
= optab_handler (cbranch_optab
, optab_mode
);
4309 gcc_assert (icode
!= CODE_FOR_nothing
);
4310 gcc_assert (insn_operand_matches (icode
, 0, test
));
4311 insn
= emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0),
4312 XEXP (test
, 1), label
));
4314 && profile_status_for_fn (cfun
) != PROFILE_ABSENT
4317 && any_condjump_p (insn
)
4318 && !find_reg_note (insn
, REG_BR_PROB
, 0))
4319 add_int_reg_note (insn
, REG_BR_PROB
, prob
);
4322 /* Generate code to compare X with Y so that the condition codes are
4323 set and to jump to LABEL if the condition is true. If X is a
4324 constant and Y is not a constant, then the comparison is swapped to
4325 ensure that the comparison RTL has the canonical form.
4327 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4328 need to be widened. UNSIGNEDP is also used to select the proper
4329 branch condition code.
4331 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4333 MODE is the mode of the inputs (in case they are const_int).
4335 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4336 It will be potentially converted into an unsigned variant based on
4337 UNSIGNEDP to select a proper jump instruction.
4339 PROB is the probability of jumping to LABEL. */
4342 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4343 machine_mode mode
, int unsignedp
, rtx label
,
4346 rtx op0
= x
, op1
= y
;
4349 /* Swap operands and condition to ensure canonical RTL. */
4350 if (swap_commutative_operands_p (x
, y
)
4351 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4354 comparison
= swap_condition (comparison
);
4357 /* If OP0 is still a constant, then both X and Y must be constants
4358 or the opposite comparison is not supported. Force X into a register
4359 to create canonical RTL. */
4360 if (CONSTANT_P (op0
))
4361 op0
= force_reg (mode
, op0
);
4364 comparison
= unsigned_condition (comparison
);
4366 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4368 emit_cmp_and_jump_insn_1 (test
, mode
, label
, prob
);
4372 /* Emit a library call comparison between floating point X and Y.
4373 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4376 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4377 rtx
*ptest
, machine_mode
*pmode
)
4379 enum rtx_code swapped
= swap_condition (comparison
);
4380 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4381 machine_mode orig_mode
= GET_MODE (x
);
4382 machine_mode mode
, cmp_mode
;
4383 rtx true_rtx
, false_rtx
;
4384 rtx value
, target
, equiv
;
4387 bool reversed_p
= false;
4388 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4390 for (mode
= orig_mode
;
4392 mode
= GET_MODE_WIDER_MODE (mode
))
4394 if (code_to_optab (comparison
)
4395 && (libfunc
= optab_libfunc (code_to_optab (comparison
), mode
)))
4398 if (code_to_optab (swapped
)
4399 && (libfunc
= optab_libfunc (code_to_optab (swapped
), mode
)))
4402 tmp
= x
; x
= y
; y
= tmp
;
4403 comparison
= swapped
;
4407 if (code_to_optab (reversed
)
4408 && (libfunc
= optab_libfunc (code_to_optab (reversed
), mode
)))
4410 comparison
= reversed
;
4416 gcc_assert (mode
!= VOIDmode
);
4418 if (mode
!= orig_mode
)
4420 x
= convert_to_mode (mode
, x
, 0);
4421 y
= convert_to_mode (mode
, y
, 0);
4424 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4425 the RTL. The allows the RTL optimizers to delete the libcall if the
4426 condition can be determined at compile-time. */
4427 if (comparison
== UNORDERED
4428 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4430 true_rtx
= const_true_rtx
;
4431 false_rtx
= const0_rtx
;
4438 true_rtx
= const0_rtx
;
4439 false_rtx
= const_true_rtx
;
4443 true_rtx
= const_true_rtx
;
4444 false_rtx
= const0_rtx
;
4448 true_rtx
= const1_rtx
;
4449 false_rtx
= const0_rtx
;
4453 true_rtx
= const0_rtx
;
4454 false_rtx
= constm1_rtx
;
4458 true_rtx
= constm1_rtx
;
4459 false_rtx
= const0_rtx
;
4463 true_rtx
= const0_rtx
;
4464 false_rtx
= const1_rtx
;
4472 if (comparison
== UNORDERED
)
4474 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4475 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4476 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4477 temp
, const_true_rtx
, equiv
);
4481 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4482 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4483 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4484 equiv
, true_rtx
, false_rtx
);
4488 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4489 cmp_mode
, 2, x
, mode
, y
, mode
);
4490 insns
= get_insns ();
4493 target
= gen_reg_rtx (cmp_mode
);
4494 emit_libcall_block (insns
, target
, value
, equiv
);
4496 if (comparison
== UNORDERED
4497 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
)
4499 *ptest
= gen_rtx_fmt_ee (reversed_p
? EQ
: NE
, VOIDmode
, target
, false_rtx
);
4501 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4506 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4509 emit_indirect_jump (rtx loc ATTRIBUTE_UNUSED
)
4511 #ifndef HAVE_indirect_jump
4512 sorry ("indirect jumps are not available on this target");
4514 struct expand_operand ops
[1];
4515 create_address_operand (&ops
[0], loc
);
4516 expand_jump_insn (CODE_FOR_indirect_jump
, 1, ops
);
4521 #ifdef HAVE_conditional_move
4523 /* Emit a conditional move instruction if the machine supports one for that
4524 condition and machine mode.
4526 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4527 the mode to use should they be constants. If it is VOIDmode, they cannot
4530 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4531 should be stored there. MODE is the mode to use should they be constants.
4532 If it is VOIDmode, they cannot both be constants.
4534 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4535 is not supported. */
4538 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4539 machine_mode cmode
, rtx op2
, rtx op3
,
4540 machine_mode mode
, int unsignedp
)
4544 enum insn_code icode
;
4545 enum rtx_code reversed
;
4547 /* If one operand is constant, make it the second one. Only do this
4548 if the other operand is not constant as well. */
4550 if (swap_commutative_operands_p (op0
, op1
))
4552 std::swap (op0
, op1
);
4553 code
= swap_condition (code
);
4556 /* get_condition will prefer to generate LT and GT even if the old
4557 comparison was against zero, so undo that canonicalization here since
4558 comparisons against zero are cheaper. */
4559 if (code
== LT
&& op1
== const1_rtx
)
4560 code
= LE
, op1
= const0_rtx
;
4561 else if (code
== GT
&& op1
== constm1_rtx
)
4562 code
= GE
, op1
= const0_rtx
;
4564 if (cmode
== VOIDmode
)
4565 cmode
= GET_MODE (op0
);
4567 if (swap_commutative_operands_p (op2
, op3
)
4568 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4571 std::swap (op2
, op3
);
4575 if (mode
== VOIDmode
)
4576 mode
= GET_MODE (op2
);
4578 icode
= direct_optab_handler (movcc_optab
, mode
);
4580 if (icode
== CODE_FOR_nothing
)
4584 target
= gen_reg_rtx (mode
);
4586 code
= unsignedp
? unsigned_condition (code
) : code
;
4587 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4589 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4590 return NULL and let the caller figure out how best to deal with this
4592 if (!COMPARISON_P (comparison
))
4595 saved_pending_stack_adjust save
;
4596 save_pending_stack_adjust (&save
);
4597 last
= get_last_insn ();
4598 do_pending_stack_adjust ();
4599 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4600 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4601 &comparison
, &cmode
);
4604 struct expand_operand ops
[4];
4606 create_output_operand (&ops
[0], target
, mode
);
4607 create_fixed_operand (&ops
[1], comparison
);
4608 create_input_operand (&ops
[2], op2
, mode
);
4609 create_input_operand (&ops
[3], op3
, mode
);
4610 if (maybe_expand_insn (icode
, 4, ops
))
4612 if (ops
[0].value
!= target
)
4613 convert_move (target
, ops
[0].value
, false);
4617 delete_insns_since (last
);
4618 restore_pending_stack_adjust (&save
);
4622 /* Return nonzero if a conditional move of mode MODE is supported.
4624 This function is for combine so it can tell whether an insn that looks
4625 like a conditional move is actually supported by the hardware. If we
4626 guess wrong we lose a bit on optimization, but that's it. */
4627 /* ??? sparc64 supports conditionally moving integers values based on fp
4628 comparisons, and vice versa. How do we handle them? */
4631 can_conditionally_move_p (machine_mode mode
)
4633 if (direct_optab_handler (movcc_optab
, mode
) != CODE_FOR_nothing
)
4639 #endif /* HAVE_conditional_move */
4641 /* Emit a conditional addition instruction if the machine supports one for that
4642 condition and machine mode.
4644 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4645 the mode to use should they be constants. If it is VOIDmode, they cannot
4648 OP2 should be stored in TARGET if the comparison is false, otherwise OP2+OP3
4649 should be stored there. MODE is the mode to use should they be constants.
4650 If it is VOIDmode, they cannot both be constants.
4652 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4653 is not supported. */
4656 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4657 machine_mode cmode
, rtx op2
, rtx op3
,
4658 machine_mode mode
, int unsignedp
)
4662 enum insn_code icode
;
4664 /* If one operand is constant, make it the second one. Only do this
4665 if the other operand is not constant as well. */
4667 if (swap_commutative_operands_p (op0
, op1
))
4669 std::swap (op0
, op1
);
4670 code
= swap_condition (code
);
4673 /* get_condition will prefer to generate LT and GT even if the old
4674 comparison was against zero, so undo that canonicalization here since
4675 comparisons against zero are cheaper. */
4676 if (code
== LT
&& op1
== const1_rtx
)
4677 code
= LE
, op1
= const0_rtx
;
4678 else if (code
== GT
&& op1
== constm1_rtx
)
4679 code
= GE
, op1
= const0_rtx
;
4681 if (cmode
== VOIDmode
)
4682 cmode
= GET_MODE (op0
);
4684 if (mode
== VOIDmode
)
4685 mode
= GET_MODE (op2
);
4687 icode
= optab_handler (addcc_optab
, mode
);
4689 if (icode
== CODE_FOR_nothing
)
4693 target
= gen_reg_rtx (mode
);
4695 code
= unsignedp
? unsigned_condition (code
) : code
;
4696 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4698 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4699 return NULL and let the caller figure out how best to deal with this
4701 if (!COMPARISON_P (comparison
))
4704 do_pending_stack_adjust ();
4705 last
= get_last_insn ();
4706 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4707 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4708 &comparison
, &cmode
);
4711 struct expand_operand ops
[4];
4713 create_output_operand (&ops
[0], target
, mode
);
4714 create_fixed_operand (&ops
[1], comparison
);
4715 create_input_operand (&ops
[2], op2
, mode
);
4716 create_input_operand (&ops
[3], op3
, mode
);
4717 if (maybe_expand_insn (icode
, 4, ops
))
4719 if (ops
[0].value
!= target
)
4720 convert_move (target
, ops
[0].value
, false);
4724 delete_insns_since (last
);
4728 /* These functions attempt to generate an insn body, rather than
4729 emitting the insn, but if the gen function already emits them, we
4730 make no attempt to turn them back into naked patterns. */
4732 /* Generate and return an insn body to add Y to X. */
4735 gen_add2_insn (rtx x
, rtx y
)
4737 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
4739 gcc_assert (insn_operand_matches (icode
, 0, x
));
4740 gcc_assert (insn_operand_matches (icode
, 1, x
));
4741 gcc_assert (insn_operand_matches (icode
, 2, y
));
4743 return GEN_FCN (icode
) (x
, x
, y
);
4746 /* Generate and return an insn body to add r1 and c,
4747 storing the result in r0. */
4750 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4752 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (r0
));
4754 if (icode
== CODE_FOR_nothing
4755 || !insn_operand_matches (icode
, 0, r0
)
4756 || !insn_operand_matches (icode
, 1, r1
)
4757 || !insn_operand_matches (icode
, 2, c
))
4760 return GEN_FCN (icode
) (r0
, r1
, c
);
4764 have_add2_insn (rtx x
, rtx y
)
4766 enum insn_code icode
;
4768 gcc_assert (GET_MODE (x
) != VOIDmode
);
4770 icode
= optab_handler (add_optab
, GET_MODE (x
));
4772 if (icode
== CODE_FOR_nothing
)
4775 if (!insn_operand_matches (icode
, 0, x
)
4776 || !insn_operand_matches (icode
, 1, x
)
4777 || !insn_operand_matches (icode
, 2, y
))
4783 /* Generate and return an insn body to add Y to X. */
4786 gen_addptr3_insn (rtx x
, rtx y
, rtx z
)
4788 enum insn_code icode
= optab_handler (addptr3_optab
, GET_MODE (x
));
4790 gcc_assert (insn_operand_matches (icode
, 0, x
));
4791 gcc_assert (insn_operand_matches (icode
, 1, y
));
4792 gcc_assert (insn_operand_matches (icode
, 2, z
));
4794 return GEN_FCN (icode
) (x
, y
, z
);
4797 /* Return true if the target implements an addptr pattern and X, Y,
4798 and Z are valid for the pattern predicates. */
4801 have_addptr3_insn (rtx x
, rtx y
, rtx z
)
4803 enum insn_code icode
;
4805 gcc_assert (GET_MODE (x
) != VOIDmode
);
4807 icode
= optab_handler (addptr3_optab
, GET_MODE (x
));
4809 if (icode
== CODE_FOR_nothing
)
4812 if (!insn_operand_matches (icode
, 0, x
)
4813 || !insn_operand_matches (icode
, 1, y
)
4814 || !insn_operand_matches (icode
, 2, z
))
4820 /* Generate and return an insn body to subtract Y from X. */
4823 gen_sub2_insn (rtx x
, rtx y
)
4825 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (x
));
4827 gcc_assert (insn_operand_matches (icode
, 0, x
));
4828 gcc_assert (insn_operand_matches (icode
, 1, x
));
4829 gcc_assert (insn_operand_matches (icode
, 2, y
));
4831 return GEN_FCN (icode
) (x
, x
, y
);
4834 /* Generate and return an insn body to subtract r1 and c,
4835 storing the result in r0. */
4838 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4840 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (r0
));
4842 if (icode
== CODE_FOR_nothing
4843 || !insn_operand_matches (icode
, 0, r0
)
4844 || !insn_operand_matches (icode
, 1, r1
)
4845 || !insn_operand_matches (icode
, 2, c
))
4848 return GEN_FCN (icode
) (r0
, r1
, c
);
4852 have_sub2_insn (rtx x
, rtx y
)
4854 enum insn_code icode
;
4856 gcc_assert (GET_MODE (x
) != VOIDmode
);
4858 icode
= optab_handler (sub_optab
, GET_MODE (x
));
4860 if (icode
== CODE_FOR_nothing
)
4863 if (!insn_operand_matches (icode
, 0, x
)
4864 || !insn_operand_matches (icode
, 1, x
)
4865 || !insn_operand_matches (icode
, 2, y
))
4871 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4872 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4873 no such operation exists, CODE_FOR_nothing will be returned. */
4876 can_extend_p (machine_mode to_mode
, machine_mode from_mode
,
4880 #ifdef HAVE_ptr_extend
4882 return CODE_FOR_ptr_extend
;
4885 tab
= unsignedp
? zext_optab
: sext_optab
;
4886 return convert_optab_handler (tab
, to_mode
, from_mode
);
4889 /* Generate the body of an insn to extend Y (with mode MFROM)
4890 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4893 gen_extend_insn (rtx x
, rtx y
, machine_mode mto
,
4894 machine_mode mfrom
, int unsignedp
)
4896 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4897 return GEN_FCN (icode
) (x
, y
);
4900 /* can_fix_p and can_float_p say whether the target machine
4901 can directly convert a given fixed point type to
4902 a given floating point type, or vice versa.
4903 The returned value is the CODE_FOR_... value to use,
4904 or CODE_FOR_nothing if these modes cannot be directly converted.
4906 *TRUNCP_PTR is set to 1 if it is necessary to output
4907 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4909 static enum insn_code
4910 can_fix_p (machine_mode fixmode
, machine_mode fltmode
,
4911 int unsignedp
, int *truncp_ptr
)
4914 enum insn_code icode
;
4916 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4917 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4918 if (icode
!= CODE_FOR_nothing
)
4924 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4925 for this to work. We need to rework the fix* and ftrunc* patterns
4926 and documentation. */
4927 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4928 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4929 if (icode
!= CODE_FOR_nothing
4930 && optab_handler (ftrunc_optab
, fltmode
) != CODE_FOR_nothing
)
4937 return CODE_FOR_nothing
;
4941 can_float_p (machine_mode fltmode
, machine_mode fixmode
,
4946 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4947 return convert_optab_handler (tab
, fltmode
, fixmode
);
4950 /* Function supportable_convert_operation
4952 Check whether an operation represented by the code CODE is a
4953 convert operation that is supported by the target platform in
4954 vector form (i.e., when operating on arguments of type VECTYPE_IN
4955 producing a result of type VECTYPE_OUT).
4957 Convert operations we currently support directly are FIX_TRUNC and FLOAT.
4958 This function checks if these operations are supported
4959 by the target platform either directly (via vector tree-codes), or via
4963 - CODE1 is code of vector operation to be used when
4964 vectorizing the operation, if available.
4965 - DECL is decl of target builtin functions to be used
4966 when vectorizing the operation, if available. In this case,
4967 CODE1 is CALL_EXPR. */
4970 supportable_convert_operation (enum tree_code code
,
4971 tree vectype_out
, tree vectype_in
,
4972 tree
*decl
, enum tree_code
*code1
)
4977 m1
= TYPE_MODE (vectype_out
);
4978 m2
= TYPE_MODE (vectype_in
);
4980 /* First check if we can done conversion directly. */
4981 if ((code
== FIX_TRUNC_EXPR
4982 && can_fix_p (m1
,m2
,TYPE_UNSIGNED (vectype_out
), &truncp
)
4983 != CODE_FOR_nothing
)
4984 || (code
== FLOAT_EXPR
4985 && can_float_p (m1
,m2
,TYPE_UNSIGNED (vectype_in
))
4986 != CODE_FOR_nothing
))
4992 /* Now check for builtin. */
4993 if (targetm
.vectorize
.builtin_conversion
4994 && targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
))
4997 *decl
= targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
);
5004 /* Generate code to convert FROM to floating point
5005 and store in TO. FROM must be fixed point and not VOIDmode.
5006 UNSIGNEDP nonzero means regard FROM as unsigned.
5007 Normally this is done by correcting the final value
5008 if it is negative. */
5011 expand_float (rtx to
, rtx from
, int unsignedp
)
5013 enum insn_code icode
;
5015 machine_mode fmode
, imode
;
5016 bool can_do_signed
= false;
5018 /* Crash now, because we won't be able to decide which mode to use. */
5019 gcc_assert (GET_MODE (from
) != VOIDmode
);
5021 /* Look for an insn to do the conversion. Do it in the specified
5022 modes if possible; otherwise convert either input, output or both to
5023 wider mode. If the integer mode is wider than the mode of FROM,
5024 we can do the conversion signed even if the input is unsigned. */
5026 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
5027 fmode
= GET_MODE_WIDER_MODE (fmode
))
5028 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
5029 imode
= GET_MODE_WIDER_MODE (imode
))
5031 int doing_unsigned
= unsignedp
;
5033 if (fmode
!= GET_MODE (to
)
5034 && significand_size (fmode
) < GET_MODE_PRECISION (GET_MODE (from
)))
5037 icode
= can_float_p (fmode
, imode
, unsignedp
);
5038 if (icode
== CODE_FOR_nothing
&& unsignedp
)
5040 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
5041 if (scode
!= CODE_FOR_nothing
)
5042 can_do_signed
= true;
5043 if (imode
!= GET_MODE (from
))
5044 icode
= scode
, doing_unsigned
= 0;
5047 if (icode
!= CODE_FOR_nothing
)
5049 if (imode
!= GET_MODE (from
))
5050 from
= convert_to_mode (imode
, from
, unsignedp
);
5052 if (fmode
!= GET_MODE (to
))
5053 target
= gen_reg_rtx (fmode
);
5055 emit_unop_insn (icode
, target
, from
,
5056 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
5059 convert_move (to
, target
, 0);
5064 /* Unsigned integer, and no way to convert directly. Convert as signed,
5065 then unconditionally adjust the result. */
5066 if (unsignedp
&& can_do_signed
)
5068 rtx_code_label
*label
= gen_label_rtx ();
5070 REAL_VALUE_TYPE offset
;
5072 /* Look for a usable floating mode FMODE wider than the source and at
5073 least as wide as the target. Using FMODE will avoid rounding woes
5074 with unsigned values greater than the signed maximum value. */
5076 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
5077 fmode
= GET_MODE_WIDER_MODE (fmode
))
5078 if (GET_MODE_PRECISION (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
5079 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
5082 if (fmode
== VOIDmode
)
5084 /* There is no such mode. Pretend the target is wide enough. */
5085 fmode
= GET_MODE (to
);
5087 /* Avoid double-rounding when TO is narrower than FROM. */
5088 if ((significand_size (fmode
) + 1)
5089 < GET_MODE_PRECISION (GET_MODE (from
)))
5092 rtx_code_label
*neglabel
= gen_label_rtx ();
5094 /* Don't use TARGET if it isn't a register, is a hard register,
5095 or is the wrong mode. */
5097 || REGNO (target
) < FIRST_PSEUDO_REGISTER
5098 || GET_MODE (target
) != fmode
)
5099 target
= gen_reg_rtx (fmode
);
5101 imode
= GET_MODE (from
);
5102 do_pending_stack_adjust ();
5104 /* Test whether the sign bit is set. */
5105 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
5108 /* The sign bit is not set. Convert as signed. */
5109 expand_float (target
, from
, 0);
5110 emit_jump_insn (gen_jump (label
));
5113 /* The sign bit is set.
5114 Convert to a usable (positive signed) value by shifting right
5115 one bit, while remembering if a nonzero bit was shifted
5116 out; i.e., compute (from & 1) | (from >> 1). */
5118 emit_label (neglabel
);
5119 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
5120 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
5121 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, 1, NULL_RTX
, 1);
5122 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
5124 expand_float (target
, temp
, 0);
5126 /* Multiply by 2 to undo the shift above. */
5127 temp
= expand_binop (fmode
, add_optab
, target
, target
,
5128 target
, 0, OPTAB_LIB_WIDEN
);
5130 emit_move_insn (target
, temp
);
5132 do_pending_stack_adjust ();
5138 /* If we are about to do some arithmetic to correct for an
5139 unsigned operand, do it in a pseudo-register. */
5141 if (GET_MODE (to
) != fmode
5142 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
5143 target
= gen_reg_rtx (fmode
);
5145 /* Convert as signed integer to floating. */
5146 expand_float (target
, from
, 0);
5148 /* If FROM is negative (and therefore TO is negative),
5149 correct its value by 2**bitwidth. */
5151 do_pending_stack_adjust ();
5152 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5156 real_2expN (&offset
, GET_MODE_PRECISION (GET_MODE (from
)), fmode
);
5157 temp
= expand_binop (fmode
, add_optab
, target
,
5158 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5159 target
, 0, OPTAB_LIB_WIDEN
);
5161 emit_move_insn (target
, temp
);
5163 do_pending_stack_adjust ();
5168 /* No hardware instruction available; call a library routine. */
5173 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5175 if (GET_MODE_PRECISION (GET_MODE (from
)) < GET_MODE_PRECISION (SImode
))
5176 from
= convert_to_mode (SImode
, from
, unsignedp
);
5178 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5179 gcc_assert (libfunc
);
5183 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5184 GET_MODE (to
), 1, from
,
5186 insns
= get_insns ();
5189 emit_libcall_block (insns
, target
, value
,
5190 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5191 GET_MODE (to
), from
));
5196 /* Copy result to requested destination
5197 if we have been computing in a temp location. */
5201 if (GET_MODE (target
) == GET_MODE (to
))
5202 emit_move_insn (to
, target
);
5204 convert_move (to
, target
, 0);
5208 /* Generate code to convert FROM to fixed point and store in TO. FROM
5209 must be floating point. */
5212 expand_fix (rtx to
, rtx from
, int unsignedp
)
5214 enum insn_code icode
;
5216 machine_mode fmode
, imode
;
5219 /* We first try to find a pair of modes, one real and one integer, at
5220 least as wide as FROM and TO, respectively, in which we can open-code
5221 this conversion. If the integer mode is wider than the mode of TO,
5222 we can do the conversion either signed or unsigned. */
5224 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5225 fmode
= GET_MODE_WIDER_MODE (fmode
))
5226 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5227 imode
= GET_MODE_WIDER_MODE (imode
))
5229 int doing_unsigned
= unsignedp
;
5231 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5232 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5233 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5235 if (icode
!= CODE_FOR_nothing
)
5237 rtx_insn
*last
= get_last_insn ();
5238 if (fmode
!= GET_MODE (from
))
5239 from
= convert_to_mode (fmode
, from
, 0);
5243 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5244 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5248 if (imode
!= GET_MODE (to
))
5249 target
= gen_reg_rtx (imode
);
5251 if (maybe_emit_unop_insn (icode
, target
, from
,
5252 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5255 convert_move (to
, target
, unsignedp
);
5258 delete_insns_since (last
);
5262 /* For an unsigned conversion, there is one more way to do it.
5263 If we have a signed conversion, we generate code that compares
5264 the real value to the largest representable positive number. If if
5265 is smaller, the conversion is done normally. Otherwise, subtract
5266 one plus the highest signed number, convert, and add it back.
5268 We only need to check all real modes, since we know we didn't find
5269 anything with a wider integer mode.
5271 This code used to extend FP value into mode wider than the destination.
5272 This is needed for decimal float modes which cannot accurately
5273 represent one plus the highest signed number of the same size, but
5274 not for binary modes. Consider, for instance conversion from SFmode
5277 The hot path through the code is dealing with inputs smaller than 2^63
5278 and doing just the conversion, so there is no bits to lose.
5280 In the other path we know the value is positive in the range 2^63..2^64-1
5281 inclusive. (as for other input overflow happens and result is undefined)
5282 So we know that the most important bit set in mantissa corresponds to
5283 2^63. The subtraction of 2^63 should not generate any rounding as it
5284 simply clears out that bit. The rest is trivial. */
5286 if (unsignedp
&& GET_MODE_PRECISION (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5287 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5288 fmode
= GET_MODE_WIDER_MODE (fmode
))
5289 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5290 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5291 || GET_MODE_BITSIZE (fmode
) > GET_MODE_PRECISION (GET_MODE (to
))))
5294 REAL_VALUE_TYPE offset
;
5296 rtx_code_label
*lab1
, *lab2
;
5299 bitsize
= GET_MODE_PRECISION (GET_MODE (to
));
5300 real_2expN (&offset
, bitsize
- 1, fmode
);
5301 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5302 lab1
= gen_label_rtx ();
5303 lab2
= gen_label_rtx ();
5305 if (fmode
!= GET_MODE (from
))
5306 from
= convert_to_mode (fmode
, from
, 0);
5308 /* See if we need to do the subtraction. */
5309 do_pending_stack_adjust ();
5310 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5313 /* If not, do the signed "fix" and branch around fixup code. */
5314 expand_fix (to
, from
, 0);
5315 emit_jump_insn (gen_jump (lab2
));
5318 /* Otherwise, subtract 2**(N-1), convert to signed number,
5319 then add 2**(N-1). Do the addition using XOR since this
5320 will often generate better code. */
5322 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5323 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5324 expand_fix (to
, target
, 0);
5325 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5327 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5329 to
, 1, OPTAB_LIB_WIDEN
);
5332 emit_move_insn (to
, target
);
5336 if (optab_handler (mov_optab
, GET_MODE (to
)) != CODE_FOR_nothing
)
5338 /* Make a place for a REG_NOTE and add it. */
5339 insn
= emit_move_insn (to
, to
);
5340 set_dst_reg_note (insn
, REG_EQUAL
,
5341 gen_rtx_fmt_e (UNSIGNED_FIX
, GET_MODE (to
),
5349 /* We can't do it with an insn, so use a library call. But first ensure
5350 that the mode of TO is at least as wide as SImode, since those are the
5351 only library calls we know about. */
5353 if (GET_MODE_PRECISION (GET_MODE (to
)) < GET_MODE_PRECISION (SImode
))
5355 target
= gen_reg_rtx (SImode
);
5357 expand_fix (target
, from
, unsignedp
);
5365 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5366 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5367 gcc_assert (libfunc
);
5371 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5372 GET_MODE (to
), 1, from
,
5374 insns
= get_insns ();
5377 emit_libcall_block (insns
, target
, value
,
5378 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5379 GET_MODE (to
), from
));
5384 if (GET_MODE (to
) == GET_MODE (target
))
5385 emit_move_insn (to
, target
);
5387 convert_move (to
, target
, 0);
5391 /* Generate code to convert FROM or TO a fixed-point.
5392 If UINTP is true, either TO or FROM is an unsigned integer.
5393 If SATP is true, we need to saturate the result. */
5396 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5398 machine_mode to_mode
= GET_MODE (to
);
5399 machine_mode from_mode
= GET_MODE (from
);
5401 enum rtx_code this_code
;
5402 enum insn_code code
;
5407 if (to_mode
== from_mode
)
5409 emit_move_insn (to
, from
);
5415 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5416 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5420 tab
= satp
? satfract_optab
: fract_optab
;
5421 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5423 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
5424 if (code
!= CODE_FOR_nothing
)
5426 emit_unop_insn (code
, to
, from
, this_code
);
5430 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5431 gcc_assert (libfunc
);
5434 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5435 1, from
, from_mode
);
5436 insns
= get_insns ();
5439 emit_libcall_block (insns
, to
, value
,
5440 gen_rtx_fmt_e (optab_to_code (tab
), to_mode
, from
));
5443 /* Generate code to convert FROM to fixed point and store in TO. FROM
5444 must be floating point, TO must be signed. Use the conversion optab
5445 TAB to do the conversion. */
5448 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5450 enum insn_code icode
;
5452 machine_mode fmode
, imode
;
5454 /* We first try to find a pair of modes, one real and one integer, at
5455 least as wide as FROM and TO, respectively, in which we can open-code
5456 this conversion. If the integer mode is wider than the mode of TO,
5457 we can do the conversion either signed or unsigned. */
5459 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5460 fmode
= GET_MODE_WIDER_MODE (fmode
))
5461 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5462 imode
= GET_MODE_WIDER_MODE (imode
))
5464 icode
= convert_optab_handler (tab
, imode
, fmode
);
5465 if (icode
!= CODE_FOR_nothing
)
5467 rtx_insn
*last
= get_last_insn ();
5468 if (fmode
!= GET_MODE (from
))
5469 from
= convert_to_mode (fmode
, from
, 0);
5471 if (imode
!= GET_MODE (to
))
5472 target
= gen_reg_rtx (imode
);
5474 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5476 delete_insns_since (last
);
5480 convert_move (to
, target
, 0);
5488 /* Report whether we have an instruction to perform the operation
5489 specified by CODE on operands of mode MODE. */
5491 have_insn_for (enum rtx_code code
, machine_mode mode
)
5493 return (code_to_optab (code
)
5494 && (optab_handler (code_to_optab (code
), mode
)
5495 != CODE_FOR_nothing
));
5498 /* Initialize the libfunc fields of an entire group of entries in some
5499 optab. Each entry is set equal to a string consisting of a leading
5500 pair of underscores followed by a generic operation name followed by
5501 a mode name (downshifted to lowercase) followed by a single character
5502 representing the number of operands for the given operation (which is
5503 usually one of the characters '2', '3', or '4').
5505 OPTABLE is the table in which libfunc fields are to be initialized.
5506 OPNAME is the generic (string) name of the operation.
5507 SUFFIX is the character which specifies the number of operands for
5508 the given generic operation.
5509 MODE is the mode to generate for.
5513 gen_libfunc (optab optable
, const char *opname
, int suffix
,
5516 unsigned opname_len
= strlen (opname
);
5517 const char *mname
= GET_MODE_NAME (mode
);
5518 unsigned mname_len
= strlen (mname
);
5519 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5520 int len
= prefix_len
+ opname_len
+ mname_len
+ 1 + 1;
5521 char *libfunc_name
= XALLOCAVEC (char, len
);
5528 if (targetm
.libfunc_gnu_prefix
)
5535 for (q
= opname
; *q
; )
5537 for (q
= mname
; *q
; q
++)
5538 *p
++ = TOLOWER (*q
);
5542 set_optab_libfunc (optable
, mode
,
5543 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5546 /* Like gen_libfunc, but verify that integer operation is involved. */
5549 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5552 int maxsize
= 2 * BITS_PER_WORD
;
5553 int minsize
= BITS_PER_WORD
;
5555 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5557 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5558 maxsize
= LONG_LONG_TYPE_SIZE
;
5559 if (minsize
> INT_TYPE_SIZE
5560 && (trapv_binoptab_p (optable
)
5561 || trapv_unoptab_p (optable
)))
5562 minsize
= INT_TYPE_SIZE
;
5563 if (GET_MODE_BITSIZE (mode
) < minsize
5564 || GET_MODE_BITSIZE (mode
) > maxsize
)
5566 gen_libfunc (optable
, opname
, suffix
, mode
);
5569 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5572 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5577 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5578 gen_libfunc (optable
, opname
, suffix
, mode
);
5579 if (DECIMAL_FLOAT_MODE_P (mode
))
5581 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5582 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5583 depending on the low level floating format used. */
5584 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5585 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5586 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5590 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5593 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5596 if (!ALL_FIXED_POINT_MODE_P (mode
))
5598 gen_libfunc (optable
, opname
, suffix
, mode
);
5601 /* Like gen_libfunc, but verify that signed fixed-point operation is
5605 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5608 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5610 gen_libfunc (optable
, opname
, suffix
, mode
);
5613 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5617 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5620 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5622 gen_libfunc (optable
, opname
, suffix
, mode
);
5625 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5628 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5631 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5632 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5633 if (INTEGRAL_MODE_P (mode
))
5634 gen_int_libfunc (optable
, name
, suffix
, mode
);
5637 /* Like gen_libfunc, but verify that FP or INT operation is involved
5638 and add 'v' suffix for integer operation. */
5641 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5644 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5645 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5646 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5648 int len
= strlen (name
);
5649 char *v_name
= XALLOCAVEC (char, len
+ 2);
5650 strcpy (v_name
, name
);
5652 v_name
[len
+ 1] = 0;
5653 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5657 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5661 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5664 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5665 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5666 if (INTEGRAL_MODE_P (mode
))
5667 gen_int_libfunc (optable
, name
, suffix
, mode
);
5668 if (ALL_FIXED_POINT_MODE_P (mode
))
5669 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5672 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5676 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5679 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5680 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5681 if (INTEGRAL_MODE_P (mode
))
5682 gen_int_libfunc (optable
, name
, suffix
, mode
);
5683 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5684 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5687 /* Like gen_libfunc, but verify that INT or FIXED operation is
5691 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5694 if (INTEGRAL_MODE_P (mode
))
5695 gen_int_libfunc (optable
, name
, suffix
, mode
);
5696 if (ALL_FIXED_POINT_MODE_P (mode
))
5697 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5700 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5704 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5707 if (INTEGRAL_MODE_P (mode
))
5708 gen_int_libfunc (optable
, name
, suffix
, mode
);
5709 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5710 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5713 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5717 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5720 if (INTEGRAL_MODE_P (mode
))
5721 gen_int_libfunc (optable
, name
, suffix
, mode
);
5722 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5723 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5726 /* Initialize the libfunc fields of an entire group of entries of an
5727 inter-mode-class conversion optab. The string formation rules are
5728 similar to the ones for init_libfuncs, above, but instead of having
5729 a mode name and an operand count these functions have two mode names
5730 and no operand count. */
5733 gen_interclass_conv_libfunc (convert_optab tab
,
5738 size_t opname_len
= strlen (opname
);
5739 size_t mname_len
= 0;
5741 const char *fname
, *tname
;
5743 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5744 char *libfunc_name
, *suffix
;
5745 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5748 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5749 depends on which underlying decimal floating point format is used. */
5750 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5752 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5754 nondec_name
= XALLOCAVEC (char, prefix_len
+ opname_len
+ mname_len
+ 1 + 1);
5755 nondec_name
[0] = '_';
5756 nondec_name
[1] = '_';
5757 if (targetm
.libfunc_gnu_prefix
)
5759 nondec_name
[2] = 'g';
5760 nondec_name
[3] = 'n';
5761 nondec_name
[4] = 'u';
5762 nondec_name
[5] = '_';
5765 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5766 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5768 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5771 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5772 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5773 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5775 fname
= GET_MODE_NAME (fmode
);
5776 tname
= GET_MODE_NAME (tmode
);
5778 if (DECIMAL_FLOAT_MODE_P (fmode
) || DECIMAL_FLOAT_MODE_P (tmode
))
5780 libfunc_name
= dec_name
;
5781 suffix
= dec_suffix
;
5785 libfunc_name
= nondec_name
;
5786 suffix
= nondec_suffix
;
5790 for (q
= fname
; *q
; p
++, q
++)
5792 for (q
= tname
; *q
; p
++, q
++)
5797 set_conv_libfunc (tab
, tmode
, fmode
,
5798 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5801 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5802 int->fp conversion. */
5805 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5810 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5812 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5814 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5817 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5821 gen_ufloat_conv_libfunc (convert_optab tab
,
5822 const char *opname ATTRIBUTE_UNUSED
,
5826 if (DECIMAL_FLOAT_MODE_P (tmode
))
5827 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5829 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5832 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5833 fp->int conversion. */
5836 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5841 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5843 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5845 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5848 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5849 fp->int conversion with no decimal floating point involved. */
5852 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5857 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5859 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5861 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5864 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5865 The string formation rules are
5866 similar to the ones for init_libfunc, above. */
5869 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5870 machine_mode tmode
, machine_mode fmode
)
5872 size_t opname_len
= strlen (opname
);
5873 size_t mname_len
= 0;
5875 const char *fname
, *tname
;
5877 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5878 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5879 char *libfunc_name
, *suffix
;
5882 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5883 depends on which underlying decimal floating point format is used. */
5884 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5886 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5888 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5889 nondec_name
[0] = '_';
5890 nondec_name
[1] = '_';
5891 if (targetm
.libfunc_gnu_prefix
)
5893 nondec_name
[2] = 'g';
5894 nondec_name
[3] = 'n';
5895 nondec_name
[4] = 'u';
5896 nondec_name
[5] = '_';
5898 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5899 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5901 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5904 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5905 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5906 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5908 fname
= GET_MODE_NAME (fmode
);
5909 tname
= GET_MODE_NAME (tmode
);
5911 if (DECIMAL_FLOAT_MODE_P (fmode
) || DECIMAL_FLOAT_MODE_P (tmode
))
5913 libfunc_name
= dec_name
;
5914 suffix
= dec_suffix
;
5918 libfunc_name
= nondec_name
;
5919 suffix
= nondec_suffix
;
5923 for (q
= fname
; *q
; p
++, q
++)
5925 for (q
= tname
; *q
; p
++, q
++)
5931 set_conv_libfunc (tab
, tmode
, fmode
,
5932 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5935 /* Pick proper libcall for trunc_optab. We need to chose if we do
5936 truncation or extension and interclass or intraclass. */
5939 gen_trunc_conv_libfunc (convert_optab tab
,
5944 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5946 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5951 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5952 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5953 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5955 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5958 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5959 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5960 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5961 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5964 /* Pick proper libcall for extend_optab. We need to chose if we do
5965 truncation or extension and interclass or intraclass. */
5968 gen_extend_conv_libfunc (convert_optab tab
,
5969 const char *opname ATTRIBUTE_UNUSED
,
5973 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5975 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5980 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5981 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5982 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5984 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5987 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5988 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5989 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5990 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5993 /* Pick proper libcall for fract_optab. We need to chose if we do
5994 interclass or intraclass. */
5997 gen_fract_conv_libfunc (convert_optab tab
,
6004 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
6007 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
6008 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6010 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6013 /* Pick proper libcall for fractuns_optab. */
6016 gen_fractuns_conv_libfunc (convert_optab tab
,
6023 /* One mode must be a fixed-point mode, and the other must be an integer
6025 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
6026 || (ALL_FIXED_POINT_MODE_P (fmode
)
6027 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
6030 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6033 /* Pick proper libcall for satfract_optab. We need to chose if we do
6034 interclass or intraclass. */
6037 gen_satfract_conv_libfunc (convert_optab tab
,
6044 /* TMODE must be a fixed-point mode. */
6045 if (!ALL_FIXED_POINT_MODE_P (tmode
))
6048 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
6049 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6051 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6054 /* Pick proper libcall for satfractuns_optab. */
6057 gen_satfractuns_conv_libfunc (convert_optab tab
,
6064 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
6065 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
6068 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6071 /* Hashtable callbacks for libfunc_decls. */
6073 struct libfunc_decl_hasher
: ggc_hasher
<tree
>
6078 return IDENTIFIER_HASH_VALUE (DECL_NAME (entry
));
6082 equal (tree decl
, tree name
)
6084 return DECL_NAME (decl
) == name
;
6088 /* A table of previously-created libfuncs, hashed by name. */
6089 static GTY (()) hash_table
<libfunc_decl_hasher
> *libfunc_decls
;
6091 /* Build a decl for a libfunc named NAME. */
6094 build_libfunc_function (const char *name
)
6096 tree decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
6097 get_identifier (name
),
6098 build_function_type (integer_type_node
, NULL_TREE
));
6099 /* ??? We don't have any type information except for this is
6100 a function. Pretend this is "int foo()". */
6101 DECL_ARTIFICIAL (decl
) = 1;
6102 DECL_EXTERNAL (decl
) = 1;
6103 TREE_PUBLIC (decl
) = 1;
6104 gcc_assert (DECL_ASSEMBLER_NAME (decl
));
6106 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6107 are the flags assigned by targetm.encode_section_info. */
6108 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
6114 init_one_libfunc (const char *name
)
6119 if (libfunc_decls
== NULL
)
6120 libfunc_decls
= hash_table
<libfunc_decl_hasher
>::create_ggc (37);
6122 /* See if we have already created a libfunc decl for this function. */
6123 id
= get_identifier (name
);
6124 hash
= IDENTIFIER_HASH_VALUE (id
);
6125 tree
*slot
= libfunc_decls
->find_slot_with_hash (id
, hash
, INSERT
);
6129 /* Create a new decl, so that it can be passed to
6130 targetm.encode_section_info. */
6131 decl
= build_libfunc_function (name
);
6134 return XEXP (DECL_RTL (decl
), 0);
6137 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6140 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6145 id
= get_identifier (name
);
6146 hash
= IDENTIFIER_HASH_VALUE (id
);
6147 tree
*slot
= libfunc_decls
->find_slot_with_hash (id
, hash
, NO_INSERT
);
6149 decl
= (tree
) *slot
;
6150 set_user_assembler_name (decl
, asmspec
);
6151 return XEXP (DECL_RTL (decl
), 0);
6154 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6155 MODE to NAME, which should be either 0 or a string constant. */
6157 set_optab_libfunc (optab op
, machine_mode mode
, const char *name
)
6160 struct libfunc_entry e
;
6161 struct libfunc_entry
**slot
;
6168 val
= init_one_libfunc (name
);
6171 slot
= libfunc_hash
->find_slot (&e
, INSERT
);
6173 *slot
= ggc_alloc
<libfunc_entry
> ();
6175 (*slot
)->mode1
= mode
;
6176 (*slot
)->mode2
= VOIDmode
;
6177 (*slot
)->libfunc
= val
;
6180 /* Call this to reset the function entry for one conversion optab
6181 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6182 either 0 or a string constant. */
6184 set_conv_libfunc (convert_optab optab
, machine_mode tmode
,
6185 machine_mode fmode
, const char *name
)
6188 struct libfunc_entry e
;
6189 struct libfunc_entry
**slot
;
6196 val
= init_one_libfunc (name
);
6199 slot
= libfunc_hash
->find_slot (&e
, INSERT
);
6201 *slot
= ggc_alloc
<libfunc_entry
> ();
6202 (*slot
)->op
= optab
;
6203 (*slot
)->mode1
= tmode
;
6204 (*slot
)->mode2
= fmode
;
6205 (*slot
)->libfunc
= val
;
6208 /* Call this to initialize the contents of the optabs
6209 appropriately for the current target machine. */
6215 libfunc_hash
->empty ();
6217 libfunc_hash
= hash_table
<libfunc_hasher
>::create_ggc (10);
6219 /* Fill in the optabs with the insns we support. */
6220 init_all_optabs (this_fn_optabs
);
6222 /* The ffs function operates on `int'. Fall back on it if we do not
6223 have a libgcc2 function for that width. */
6224 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6225 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6228 /* Explicitly initialize the bswap libfuncs since we need them to be
6229 valid for things other than word_mode. */
6230 if (targetm
.libfunc_gnu_prefix
)
6232 set_optab_libfunc (bswap_optab
, SImode
, "__gnu_bswapsi2");
6233 set_optab_libfunc (bswap_optab
, DImode
, "__gnu_bswapdi2");
6237 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6238 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6241 /* Use cabs for double complex abs, since systems generally have cabs.
6242 Don't define any libcall for float complex, so that cabs will be used. */
6243 if (complex_double_type_node
)
6244 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
),
6247 abort_libfunc
= init_one_libfunc ("abort");
6248 memcpy_libfunc
= init_one_libfunc ("memcpy");
6249 memmove_libfunc
= init_one_libfunc ("memmove");
6250 memcmp_libfunc
= init_one_libfunc ("memcmp");
6251 memset_libfunc
= init_one_libfunc ("memset");
6252 setbits_libfunc
= init_one_libfunc ("__setbits");
6254 #ifndef DONT_USE_BUILTIN_SETJMP
6255 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6256 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6258 setjmp_libfunc
= init_one_libfunc ("setjmp");
6259 longjmp_libfunc
= init_one_libfunc ("longjmp");
6261 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6262 unwind_sjlj_unregister_libfunc
6263 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6265 /* For function entry/exit instrumentation. */
6266 profile_function_entry_libfunc
6267 = init_one_libfunc ("__cyg_profile_func_enter");
6268 profile_function_exit_libfunc
6269 = init_one_libfunc ("__cyg_profile_func_exit");
6271 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6273 /* Allow the target to add more libcalls or rename some, etc. */
6274 targetm
.init_libfuncs ();
6277 /* Use the current target and options to initialize
6278 TREE_OPTIMIZATION_OPTABS (OPTNODE). */
6281 init_tree_optimization_optabs (tree optnode
)
6283 /* Quick exit if we have already computed optabs for this target. */
6284 if (TREE_OPTIMIZATION_BASE_OPTABS (optnode
) == this_target_optabs
)
6287 /* Forget any previous information and set up for the current target. */
6288 TREE_OPTIMIZATION_BASE_OPTABS (optnode
) = this_target_optabs
;
6289 struct target_optabs
*tmp_optabs
= (struct target_optabs
*)
6290 TREE_OPTIMIZATION_OPTABS (optnode
);
6292 memset (tmp_optabs
, 0, sizeof (struct target_optabs
));
6294 tmp_optabs
= ggc_alloc
<target_optabs
> ();
6296 /* Generate a new set of optabs into tmp_optabs. */
6297 init_all_optabs (tmp_optabs
);
6299 /* If the optabs changed, record it. */
6300 if (memcmp (tmp_optabs
, this_target_optabs
, sizeof (struct target_optabs
)))
6301 TREE_OPTIMIZATION_OPTABS (optnode
) = tmp_optabs
;
6304 TREE_OPTIMIZATION_OPTABS (optnode
) = NULL
;
6305 ggc_free (tmp_optabs
);
6309 /* A helper function for init_sync_libfuncs. Using the basename BASE,
6310 install libfuncs into TAB for BASE_N for 1 <= N <= MAX. */
6313 init_sync_libfuncs_1 (optab tab
, const char *base
, int max
)
6317 size_t len
= strlen (base
);
6320 gcc_assert (max
<= 8);
6321 gcc_assert (len
+ 3 < sizeof (buf
));
6323 memcpy (buf
, base
, len
);
6326 buf
[len
+ 2] = '\0';
6329 for (i
= 1; i
<= max
; i
*= 2)
6331 buf
[len
+ 1] = '0' + i
;
6332 set_optab_libfunc (tab
, mode
, buf
);
6333 mode
= GET_MODE_2XWIDER_MODE (mode
);
6338 init_sync_libfuncs (int max
)
6340 if (!flag_sync_libcalls
)
6343 init_sync_libfuncs_1 (sync_compare_and_swap_optab
,
6344 "__sync_val_compare_and_swap", max
);
6345 init_sync_libfuncs_1 (sync_lock_test_and_set_optab
,
6346 "__sync_lock_test_and_set", max
);
6348 init_sync_libfuncs_1 (sync_old_add_optab
, "__sync_fetch_and_add", max
);
6349 init_sync_libfuncs_1 (sync_old_sub_optab
, "__sync_fetch_and_sub", max
);
6350 init_sync_libfuncs_1 (sync_old_ior_optab
, "__sync_fetch_and_or", max
);
6351 init_sync_libfuncs_1 (sync_old_and_optab
, "__sync_fetch_and_and", max
);
6352 init_sync_libfuncs_1 (sync_old_xor_optab
, "__sync_fetch_and_xor", max
);
6353 init_sync_libfuncs_1 (sync_old_nand_optab
, "__sync_fetch_and_nand", max
);
6355 init_sync_libfuncs_1 (sync_new_add_optab
, "__sync_add_and_fetch", max
);
6356 init_sync_libfuncs_1 (sync_new_sub_optab
, "__sync_sub_and_fetch", max
);
6357 init_sync_libfuncs_1 (sync_new_ior_optab
, "__sync_or_and_fetch", max
);
6358 init_sync_libfuncs_1 (sync_new_and_optab
, "__sync_and_and_fetch", max
);
6359 init_sync_libfuncs_1 (sync_new_xor_optab
, "__sync_xor_and_fetch", max
);
6360 init_sync_libfuncs_1 (sync_new_nand_optab
, "__sync_nand_and_fetch", max
);
6363 /* Print information about the current contents of the optabs on
6367 debug_optab_libfuncs (void)
6371 /* Dump the arithmetic optabs. */
6372 for (i
= FIRST_NORM_OPTAB
; i
<= LAST_NORMLIB_OPTAB
; ++i
)
6373 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6375 rtx l
= optab_libfunc ((optab
) i
, (machine_mode
) j
);
6378 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6379 fprintf (stderr
, "%s\t%s:\t%s\n",
6380 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6386 /* Dump the conversion optabs. */
6387 for (i
= FIRST_CONV_OPTAB
; i
<= LAST_CONVLIB_OPTAB
; ++i
)
6388 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6389 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6391 rtx l
= convert_optab_libfunc ((optab
) i
, (machine_mode
) j
,
6395 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6396 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6397 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6406 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6407 CODE. Return 0 on failure. */
6410 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6412 machine_mode mode
= GET_MODE (op1
);
6413 enum insn_code icode
;
6417 if (mode
== VOIDmode
)
6420 icode
= optab_handler (ctrap_optab
, mode
);
6421 if (icode
== CODE_FOR_nothing
)
6424 /* Some targets only accept a zero trap code. */
6425 if (!insn_operand_matches (icode
, 3, tcode
))
6428 do_pending_stack_adjust ();
6430 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6435 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6438 /* If that failed, then give up. */
6446 insn
= get_insns ();
6451 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6452 or unsigned operation code. */
6455 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6467 code
= unsignedp
? LTU
: LT
;
6470 code
= unsignedp
? LEU
: LE
;
6473 code
= unsignedp
? GTU
: GT
;
6476 code
= unsignedp
? GEU
: GE
;
6479 case UNORDERED_EXPR
:
6518 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6519 unsigned operators. Do not generate compare instruction. */
6522 vector_compare_rtx (enum tree_code tcode
, tree t_op0
, tree t_op1
,
6523 bool unsignedp
, enum insn_code icode
)
6525 struct expand_operand ops
[2];
6526 rtx rtx_op0
, rtx_op1
;
6527 machine_mode m0
, m1
;
6528 enum rtx_code rcode
= get_rtx_code (tcode
, unsignedp
);
6530 gcc_assert (TREE_CODE_CLASS (tcode
) == tcc_comparison
);
6532 /* Expand operands. For vector types with scalar modes, e.g. where int64x1_t
6533 has mode DImode, this can produce a constant RTX of mode VOIDmode; in such
6534 cases, use the original mode. */
6535 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6537 m0
= GET_MODE (rtx_op0
);
6539 m0
= TYPE_MODE (TREE_TYPE (t_op0
));
6541 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6543 m1
= GET_MODE (rtx_op1
);
6545 m1
= TYPE_MODE (TREE_TYPE (t_op1
));
6547 create_input_operand (&ops
[0], rtx_op0
, m0
);
6548 create_input_operand (&ops
[1], rtx_op1
, m1
);
6549 if (!maybe_legitimize_operands (icode
, 4, 2, ops
))
6551 return gen_rtx_fmt_ee (rcode
, VOIDmode
, ops
[0].value
, ops
[1].value
);
6554 /* Return true if VEC_PERM_EXPR of arbitrary input vectors can be expanded using
6555 SIMD extensions of the CPU. SEL may be NULL, which stands for an unknown
6556 constant. Note that additional permutations representing whole-vector shifts
6557 may also be handled via the vec_shr optab, but only where the second input
6558 vector is entirely constant zeroes; this case is not dealt with here. */
6561 can_vec_perm_p (machine_mode mode
, bool variable
,
6562 const unsigned char *sel
)
6564 machine_mode qimode
;
6566 /* If the target doesn't implement a vector mode for the vector type,
6567 then no operations are supported. */
6568 if (!VECTOR_MODE_P (mode
))
6573 if (direct_optab_handler (vec_perm_const_optab
, mode
) != CODE_FOR_nothing
6575 || targetm
.vectorize
.vec_perm_const_ok
== NULL
6576 || targetm
.vectorize
.vec_perm_const_ok (mode
, sel
)))
6580 if (direct_optab_handler (vec_perm_optab
, mode
) != CODE_FOR_nothing
)
6583 /* We allow fallback to a QI vector mode, and adjust the mask. */
6584 if (GET_MODE_INNER (mode
) == QImode
)
6586 qimode
= mode_for_vector (QImode
, GET_MODE_SIZE (mode
));
6587 if (!VECTOR_MODE_P (qimode
))
6590 /* ??? For completeness, we ought to check the QImode version of
6591 vec_perm_const_optab. But all users of this implicit lowering
6592 feature implement the variable vec_perm_optab. */
6593 if (direct_optab_handler (vec_perm_optab
, qimode
) == CODE_FOR_nothing
)
6596 /* In order to support the lowering of variable permutations,
6597 we need to support shifts and adds. */
6600 if (GET_MODE_UNIT_SIZE (mode
) > 2
6601 && optab_handler (ashl_optab
, mode
) == CODE_FOR_nothing
6602 && optab_handler (vashl_optab
, mode
) == CODE_FOR_nothing
)
6604 if (optab_handler (add_optab
, qimode
) == CODE_FOR_nothing
)
6611 /* Checks if vec_perm mask SEL is a constant equivalent to a shift of the first
6612 vec_perm operand, assuming the second operand is a constant vector of zeroes.
6613 Return the shift distance in bits if so, or NULL_RTX if the vec_perm is not a
6616 shift_amt_for_vec_perm_mask (rtx sel
)
6618 unsigned int i
, first
, nelt
= GET_MODE_NUNITS (GET_MODE (sel
));
6619 unsigned int bitsize
= GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (sel
)));
6621 if (GET_CODE (sel
) != CONST_VECTOR
)
6624 first
= INTVAL (CONST_VECTOR_ELT (sel
, 0));
6625 if (first
>= 2*nelt
)
6627 for (i
= 1; i
< nelt
; i
++)
6629 int idx
= INTVAL (CONST_VECTOR_ELT (sel
, i
));
6630 unsigned int expected
= (i
+ first
) & (2 * nelt
- 1);
6631 /* Indices into the second vector are all equivalent. */
6632 if (idx
< 0 || (MIN (nelt
, (unsigned) idx
) != MIN (nelt
, expected
)))
6636 return GEN_INT (first
* bitsize
);
6639 /* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
6642 expand_vec_perm_1 (enum insn_code icode
, rtx target
,
6643 rtx v0
, rtx v1
, rtx sel
)
6645 machine_mode tmode
= GET_MODE (target
);
6646 machine_mode smode
= GET_MODE (sel
);
6647 struct expand_operand ops
[4];
6649 create_output_operand (&ops
[0], target
, tmode
);
6650 create_input_operand (&ops
[3], sel
, smode
);
6652 /* Make an effort to preserve v0 == v1. The target expander is able to
6653 rely on this to determine if we're permuting a single input operand. */
6654 if (rtx_equal_p (v0
, v1
))
6656 if (!insn_operand_matches (icode
, 1, v0
))
6657 v0
= force_reg (tmode
, v0
);
6658 gcc_checking_assert (insn_operand_matches (icode
, 1, v0
));
6659 gcc_checking_assert (insn_operand_matches (icode
, 2, v0
));
6661 create_fixed_operand (&ops
[1], v0
);
6662 create_fixed_operand (&ops
[2], v0
);
6666 create_input_operand (&ops
[1], v0
, tmode
);
6667 /* See if this can be handled with a vec_shr. We only do this if the
6668 second vector is all zeroes. */
6669 enum insn_code shift_code
= optab_handler (vec_shr_optab
, GET_MODE (v0
));
6670 if (v1
== CONST0_RTX (GET_MODE (v1
)) && shift_code
)
6671 if (rtx shift_amt
= shift_amt_for_vec_perm_mask (sel
))
6673 create_convert_operand_from_type (&ops
[2], shift_amt
,
6674 sizetype_tab
[(int) stk_sizetype
]);
6675 if (maybe_expand_insn (shift_code
, 3, ops
))
6676 return ops
[0].value
;
6678 create_input_operand (&ops
[2], v1
, tmode
);
6681 if (maybe_expand_insn (icode
, 4, ops
))
6682 return ops
[0].value
;
6686 /* Generate instructions for vec_perm optab given its mode
6687 and three operands. */
6690 expand_vec_perm (machine_mode mode
, rtx v0
, rtx v1
, rtx sel
, rtx target
)
6692 enum insn_code icode
;
6693 machine_mode qimode
;
6694 unsigned int i
, w
, e
, u
;
6695 rtx tmp
, sel_qi
= NULL
;
6698 if (!target
|| GET_MODE (target
) != mode
)
6699 target
= gen_reg_rtx (mode
);
6701 w
= GET_MODE_SIZE (mode
);
6702 e
= GET_MODE_NUNITS (mode
);
6703 u
= GET_MODE_UNIT_SIZE (mode
);
6705 /* Set QIMODE to a different vector mode with byte elements.
6706 If no such mode, or if MODE already has byte elements, use VOIDmode. */
6708 if (GET_MODE_INNER (mode
) != QImode
)
6710 qimode
= mode_for_vector (QImode
, w
);
6711 if (!VECTOR_MODE_P (qimode
))
6715 /* If the input is a constant, expand it specially. */
6716 gcc_assert (GET_MODE_CLASS (GET_MODE (sel
)) == MODE_VECTOR_INT
);
6717 if (GET_CODE (sel
) == CONST_VECTOR
)
6719 icode
= direct_optab_handler (vec_perm_const_optab
, mode
);
6720 if (icode
!= CODE_FOR_nothing
)
6722 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6727 /* Fall back to a constant byte-based permutation. */
6728 if (qimode
!= VOIDmode
)
6730 vec
= rtvec_alloc (w
);
6731 for (i
= 0; i
< e
; ++i
)
6733 unsigned int j
, this_e
;
6735 this_e
= INTVAL (CONST_VECTOR_ELT (sel
, i
));
6736 this_e
&= 2 * e
- 1;
6739 for (j
= 0; j
< u
; ++j
)
6740 RTVEC_ELT (vec
, i
* u
+ j
) = GEN_INT (this_e
+ j
);
6742 sel_qi
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6744 icode
= direct_optab_handler (vec_perm_const_optab
, qimode
);
6745 if (icode
!= CODE_FOR_nothing
)
6747 tmp
= mode
!= qimode
? gen_reg_rtx (qimode
) : target
;
6748 tmp
= expand_vec_perm_1 (icode
, tmp
, gen_lowpart (qimode
, v0
),
6749 gen_lowpart (qimode
, v1
), sel_qi
);
6751 return gen_lowpart (mode
, tmp
);
6756 /* Otherwise expand as a fully variable permuation. */
6757 icode
= direct_optab_handler (vec_perm_optab
, mode
);
6758 if (icode
!= CODE_FOR_nothing
)
6760 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6765 /* As a special case to aid several targets, lower the element-based
6766 permutation to a byte-based permutation and try again. */
6767 if (qimode
== VOIDmode
)
6769 icode
= direct_optab_handler (vec_perm_optab
, qimode
);
6770 if (icode
== CODE_FOR_nothing
)
6775 /* Multiply each element by its byte size. */
6776 machine_mode selmode
= GET_MODE (sel
);
6778 sel
= expand_simple_binop (selmode
, PLUS
, sel
, sel
,
6779 NULL
, 0, OPTAB_DIRECT
);
6781 sel
= expand_simple_binop (selmode
, ASHIFT
, sel
,
6782 GEN_INT (exact_log2 (u
)),
6783 NULL
, 0, OPTAB_DIRECT
);
6784 gcc_assert (sel
!= NULL
);
6786 /* Broadcast the low byte each element into each of its bytes. */
6787 vec
= rtvec_alloc (w
);
6788 for (i
= 0; i
< w
; ++i
)
6790 int this_e
= i
/ u
* u
;
6791 if (BYTES_BIG_ENDIAN
)
6793 RTVEC_ELT (vec
, i
) = GEN_INT (this_e
);
6795 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6796 sel
= gen_lowpart (qimode
, sel
);
6797 sel
= expand_vec_perm (qimode
, sel
, sel
, tmp
, NULL
);
6798 gcc_assert (sel
!= NULL
);
6800 /* Add the byte offset to each byte element. */
6801 /* Note that the definition of the indicies here is memory ordering,
6802 so there should be no difference between big and little endian. */
6803 vec
= rtvec_alloc (w
);
6804 for (i
= 0; i
< w
; ++i
)
6805 RTVEC_ELT (vec
, i
) = GEN_INT (i
% u
);
6806 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6807 sel_qi
= expand_simple_binop (qimode
, PLUS
, sel
, tmp
,
6808 sel
, 0, OPTAB_DIRECT
);
6809 gcc_assert (sel_qi
!= NULL
);
6812 tmp
= mode
!= qimode
? gen_reg_rtx (qimode
) : target
;
6813 tmp
= expand_vec_perm_1 (icode
, tmp
, gen_lowpart (qimode
, v0
),
6814 gen_lowpart (qimode
, v1
), sel_qi
);
6816 tmp
= gen_lowpart (mode
, tmp
);
6820 /* Return insn code for a conditional operator with a comparison in
6821 mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
6823 static inline enum insn_code
6824 get_vcond_icode (machine_mode vmode
, machine_mode cmode
, bool uns
)
6826 enum insn_code icode
= CODE_FOR_nothing
;
6828 icode
= convert_optab_handler (vcondu_optab
, vmode
, cmode
);
6830 icode
= convert_optab_handler (vcond_optab
, vmode
, cmode
);
6834 /* Return TRUE iff, appropriate vector insns are available
6835 for vector cond expr with vector type VALUE_TYPE and a comparison
6836 with operand vector types in CMP_OP_TYPE. */
6839 expand_vec_cond_expr_p (tree value_type
, tree cmp_op_type
)
6841 machine_mode value_mode
= TYPE_MODE (value_type
);
6842 machine_mode cmp_op_mode
= TYPE_MODE (cmp_op_type
);
6843 if (GET_MODE_SIZE (value_mode
) != GET_MODE_SIZE (cmp_op_mode
)
6844 || GET_MODE_NUNITS (value_mode
) != GET_MODE_NUNITS (cmp_op_mode
)
6845 || get_vcond_icode (TYPE_MODE (value_type
), TYPE_MODE (cmp_op_type
),
6846 TYPE_UNSIGNED (cmp_op_type
)) == CODE_FOR_nothing
)
6851 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
6855 expand_vec_cond_expr (tree vec_cond_type
, tree op0
, tree op1
, tree op2
,
6858 struct expand_operand ops
[6];
6859 enum insn_code icode
;
6860 rtx comparison
, rtx_op1
, rtx_op2
;
6861 machine_mode mode
= TYPE_MODE (vec_cond_type
);
6862 machine_mode cmp_op_mode
;
6865 enum tree_code tcode
;
6867 if (COMPARISON_CLASS_P (op0
))
6869 op0a
= TREE_OPERAND (op0
, 0);
6870 op0b
= TREE_OPERAND (op0
, 1);
6871 tcode
= TREE_CODE (op0
);
6876 gcc_assert (!TYPE_UNSIGNED (TREE_TYPE (op0
)));
6878 op0b
= build_zero_cst (TREE_TYPE (op0
));
6881 unsignedp
= TYPE_UNSIGNED (TREE_TYPE (op0a
));
6882 cmp_op_mode
= TYPE_MODE (TREE_TYPE (op0a
));
6885 gcc_assert (GET_MODE_SIZE (mode
) == GET_MODE_SIZE (cmp_op_mode
)
6886 && GET_MODE_NUNITS (mode
) == GET_MODE_NUNITS (cmp_op_mode
));
6888 icode
= get_vcond_icode (mode
, cmp_op_mode
, unsignedp
);
6889 if (icode
== CODE_FOR_nothing
)
6892 comparison
= vector_compare_rtx (tcode
, op0a
, op0b
, unsignedp
, icode
);
6893 rtx_op1
= expand_normal (op1
);
6894 rtx_op2
= expand_normal (op2
);
6896 create_output_operand (&ops
[0], target
, mode
);
6897 create_input_operand (&ops
[1], rtx_op1
, mode
);
6898 create_input_operand (&ops
[2], rtx_op2
, mode
);
6899 create_fixed_operand (&ops
[3], comparison
);
6900 create_fixed_operand (&ops
[4], XEXP (comparison
, 0));
6901 create_fixed_operand (&ops
[5], XEXP (comparison
, 1));
6902 expand_insn (icode
, 6, ops
);
6903 return ops
[0].value
;
6906 /* Return non-zero if a highpart multiply is supported of can be synthisized.
6907 For the benefit of expand_mult_highpart, the return value is 1 for direct,
6908 2 for even/odd widening, and 3 for hi/lo widening. */
6911 can_mult_highpart_p (machine_mode mode
, bool uns_p
)
6917 op
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6918 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6921 /* If the mode is an integral vector, synth from widening operations. */
6922 if (GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
)
6925 nunits
= GET_MODE_NUNITS (mode
);
6926 sel
= XALLOCAVEC (unsigned char, nunits
);
6928 op
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6929 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6931 op
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6932 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6934 for (i
= 0; i
< nunits
; ++i
)
6935 sel
[i
] = !BYTES_BIG_ENDIAN
+ (i
& ~1) + ((i
& 1) ? nunits
: 0);
6936 if (can_vec_perm_p (mode
, false, sel
))
6941 op
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6942 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6944 op
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6945 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6947 for (i
= 0; i
< nunits
; ++i
)
6948 sel
[i
] = 2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1);
6949 if (can_vec_perm_p (mode
, false, sel
))
6957 /* Expand a highpart multiply. */
6960 expand_mult_highpart (machine_mode mode
, rtx op0
, rtx op1
,
6961 rtx target
, bool uns_p
)
6963 struct expand_operand eops
[3];
6964 enum insn_code icode
;
6965 int method
, i
, nunits
;
6971 method
= can_mult_highpart_p (mode
, uns_p
);
6977 tab1
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6978 return expand_binop (mode
, tab1
, op0
, op1
, target
, uns_p
,
6981 tab1
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6982 tab2
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6985 tab1
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6986 tab2
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6987 if (BYTES_BIG_ENDIAN
)
6998 icode
= optab_handler (tab1
, mode
);
6999 nunits
= GET_MODE_NUNITS (mode
);
7000 wmode
= insn_data
[icode
].operand
[0].mode
;
7001 gcc_checking_assert (2 * GET_MODE_NUNITS (wmode
) == nunits
);
7002 gcc_checking_assert (GET_MODE_SIZE (wmode
) == GET_MODE_SIZE (mode
));
7004 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
7005 create_input_operand (&eops
[1], op0
, mode
);
7006 create_input_operand (&eops
[2], op1
, mode
);
7007 expand_insn (icode
, 3, eops
);
7008 m1
= gen_lowpart (mode
, eops
[0].value
);
7010 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
7011 create_input_operand (&eops
[1], op0
, mode
);
7012 create_input_operand (&eops
[2], op1
, mode
);
7013 expand_insn (optab_handler (tab2
, mode
), 3, eops
);
7014 m2
= gen_lowpart (mode
, eops
[0].value
);
7016 v
= rtvec_alloc (nunits
);
7019 for (i
= 0; i
< nunits
; ++i
)
7020 RTVEC_ELT (v
, i
) = GEN_INT (!BYTES_BIG_ENDIAN
+ (i
& ~1)
7021 + ((i
& 1) ? nunits
: 0));
7025 for (i
= 0; i
< nunits
; ++i
)
7026 RTVEC_ELT (v
, i
) = GEN_INT (2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1));
7028 perm
= gen_rtx_CONST_VECTOR (mode
, v
);
7030 return expand_vec_perm (mode
, m1
, m2
, perm
, target
);
7033 /* Return true if target supports vector masked load/store for mode. */
7035 can_vec_mask_load_store_p (machine_mode mode
, bool is_load
)
7037 optab op
= is_load
? maskload_optab
: maskstore_optab
;
7039 unsigned int vector_sizes
;
7041 /* If mode is vector mode, check it directly. */
7042 if (VECTOR_MODE_P (mode
))
7043 return optab_handler (op
, mode
) != CODE_FOR_nothing
;
7045 /* Otherwise, return true if there is some vector mode with
7046 the mask load/store supported. */
7048 /* See if there is any chance the mask load or store might be
7049 vectorized. If not, punt. */
7050 vmode
= targetm
.vectorize
.preferred_simd_mode (mode
);
7051 if (!VECTOR_MODE_P (vmode
))
7054 if (optab_handler (op
, vmode
) != CODE_FOR_nothing
)
7057 vector_sizes
= targetm
.vectorize
.autovectorize_vector_sizes ();
7058 while (vector_sizes
!= 0)
7060 unsigned int cur
= 1 << floor_log2 (vector_sizes
);
7061 vector_sizes
&= ~cur
;
7062 if (cur
<= GET_MODE_SIZE (mode
))
7064 vmode
= mode_for_vector (mode
, cur
/ GET_MODE_SIZE (mode
));
7065 if (VECTOR_MODE_P (vmode
)
7066 && optab_handler (op
, vmode
) != CODE_FOR_nothing
)
7072 /* Return true if there is a compare_and_swap pattern. */
7075 can_compare_and_swap_p (machine_mode mode
, bool allow_libcall
)
7077 enum insn_code icode
;
7079 /* Check for __atomic_compare_and_swap. */
7080 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7081 if (icode
!= CODE_FOR_nothing
)
7084 /* Check for __sync_compare_and_swap. */
7085 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7086 if (icode
!= CODE_FOR_nothing
)
7088 if (allow_libcall
&& optab_libfunc (sync_compare_and_swap_optab
, mode
))
7091 /* No inline compare and swap. */
7095 /* Return true if an atomic exchange can be performed. */
7098 can_atomic_exchange_p (machine_mode mode
, bool allow_libcall
)
7100 enum insn_code icode
;
7102 /* Check for __atomic_exchange. */
7103 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7104 if (icode
!= CODE_FOR_nothing
)
7107 /* Don't check __sync_test_and_set, as on some platforms that
7108 has reduced functionality. Targets that really do support
7109 a proper exchange should simply be updated to the __atomics. */
7111 return can_compare_and_swap_p (mode
, allow_libcall
);
7115 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
7119 find_cc_set (rtx x
, const_rtx pat
, void *data
)
7121 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
7122 && GET_CODE (pat
) == SET
)
7124 rtx
*p_cc_reg
= (rtx
*) data
;
7125 gcc_assert (!*p_cc_reg
);
7130 /* This is a helper function for the other atomic operations. This function
7131 emits a loop that contains SEQ that iterates until a compare-and-swap
7132 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7133 a set of instructions that takes a value from OLD_REG as an input and
7134 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7135 set to the current contents of MEM. After SEQ, a compare-and-swap will
7136 attempt to update MEM with NEW_REG. The function returns true when the
7137 loop was generated successfully. */
7140 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
7142 machine_mode mode
= GET_MODE (mem
);
7143 rtx_code_label
*label
;
7144 rtx cmp_reg
, success
, oldval
;
7146 /* The loop we want to generate looks like
7152 (success, cmp_reg) = compare-and-swap(mem, old_reg, new_reg)
7156 Note that we only do the plain load from memory once. Subsequent
7157 iterations use the value loaded by the compare-and-swap pattern. */
7159 label
= gen_label_rtx ();
7160 cmp_reg
= gen_reg_rtx (mode
);
7162 emit_move_insn (cmp_reg
, mem
);
7164 emit_move_insn (old_reg
, cmp_reg
);
7170 if (!expand_atomic_compare_and_swap (&success
, &oldval
, mem
, old_reg
,
7171 new_reg
, false, MEMMODEL_SYNC_SEQ_CST
,
7175 if (oldval
!= cmp_reg
)
7176 emit_move_insn (cmp_reg
, oldval
);
7178 /* Mark this jump predicted not taken. */
7179 emit_cmp_and_jump_insns (success
, const0_rtx
, EQ
, const0_rtx
,
7180 GET_MODE (success
), 1, label
, 0);
7185 /* This function tries to emit an atomic_exchange intruction. VAL is written
7186 to *MEM using memory model MODEL. The previous contents of *MEM are returned,
7187 using TARGET if possible. */
7190 maybe_emit_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7192 machine_mode mode
= GET_MODE (mem
);
7193 enum insn_code icode
;
7195 /* If the target supports the exchange directly, great. */
7196 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7197 if (icode
!= CODE_FOR_nothing
)
7199 struct expand_operand ops
[4];
7201 create_output_operand (&ops
[0], target
, mode
);
7202 create_fixed_operand (&ops
[1], mem
);
7203 create_input_operand (&ops
[2], val
, mode
);
7204 create_integer_operand (&ops
[3], model
);
7205 if (maybe_expand_insn (icode
, 4, ops
))
7206 return ops
[0].value
;
7212 /* This function tries to implement an atomic exchange operation using
7213 __sync_lock_test_and_set. VAL is written to *MEM using memory model MODEL.
7214 The previous contents of *MEM are returned, using TARGET if possible.
7215 Since this instructionn is an acquire barrier only, stronger memory
7216 models may require additional barriers to be emitted. */
7219 maybe_emit_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
,
7220 enum memmodel model
)
7222 machine_mode mode
= GET_MODE (mem
);
7223 enum insn_code icode
;
7224 rtx_insn
*last_insn
= get_last_insn ();
7226 icode
= optab_handler (sync_lock_test_and_set_optab
, mode
);
7228 /* Legacy sync_lock_test_and_set is an acquire barrier. If the pattern
7229 exists, and the memory model is stronger than acquire, add a release
7230 barrier before the instruction. */
7232 if (is_mm_seq_cst (model
) || is_mm_release (model
) || is_mm_acq_rel (model
))
7233 expand_mem_thread_fence (model
);
7235 if (icode
!= CODE_FOR_nothing
)
7237 struct expand_operand ops
[3];
7238 create_output_operand (&ops
[0], target
, mode
);
7239 create_fixed_operand (&ops
[1], mem
);
7240 create_input_operand (&ops
[2], val
, mode
);
7241 if (maybe_expand_insn (icode
, 3, ops
))
7242 return ops
[0].value
;
7245 /* If an external test-and-set libcall is provided, use that instead of
7246 any external compare-and-swap that we might get from the compare-and-
7247 swap-loop expansion later. */
7248 if (!can_compare_and_swap_p (mode
, false))
7250 rtx libfunc
= optab_libfunc (sync_lock_test_and_set_optab
, mode
);
7251 if (libfunc
!= NULL
)
7255 addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7256 return emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7257 mode
, 2, addr
, ptr_mode
,
7262 /* If the test_and_set can't be emitted, eliminate any barrier that might
7263 have been emitted. */
7264 delete_insns_since (last_insn
);
7268 /* This function tries to implement an atomic exchange operation using a
7269 compare_and_swap loop. VAL is written to *MEM. The previous contents of
7270 *MEM are returned, using TARGET if possible. No memory model is required
7271 since a compare_and_swap loop is seq-cst. */
7274 maybe_emit_compare_and_swap_exchange_loop (rtx target
, rtx mem
, rtx val
)
7276 machine_mode mode
= GET_MODE (mem
);
7278 if (can_compare_and_swap_p (mode
, true))
7280 if (!target
|| !register_operand (target
, mode
))
7281 target
= gen_reg_rtx (mode
);
7282 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7289 /* This function tries to implement an atomic test-and-set operation
7290 using the atomic_test_and_set instruction pattern. A boolean value
7291 is returned from the operation, using TARGET if possible. */
7293 #ifndef HAVE_atomic_test_and_set
7294 #define HAVE_atomic_test_and_set 0
7295 #define CODE_FOR_atomic_test_and_set CODE_FOR_nothing
7299 maybe_emit_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7301 machine_mode pat_bool_mode
;
7302 struct expand_operand ops
[3];
7304 if (!HAVE_atomic_test_and_set
)
7307 /* While we always get QImode from __atomic_test_and_set, we get
7308 other memory modes from __sync_lock_test_and_set. Note that we
7309 use no endian adjustment here. This matches the 4.6 behavior
7310 in the Sparc backend. */
7312 (insn_data
[CODE_FOR_atomic_test_and_set
].operand
[1].mode
== QImode
);
7313 if (GET_MODE (mem
) != QImode
)
7314 mem
= adjust_address_nv (mem
, QImode
, 0);
7316 pat_bool_mode
= insn_data
[CODE_FOR_atomic_test_and_set
].operand
[0].mode
;
7317 create_output_operand (&ops
[0], target
, pat_bool_mode
);
7318 create_fixed_operand (&ops
[1], mem
);
7319 create_integer_operand (&ops
[2], model
);
7321 if (maybe_expand_insn (CODE_FOR_atomic_test_and_set
, 3, ops
))
7322 return ops
[0].value
;
7326 /* This function expands the legacy _sync_lock test_and_set operation which is
7327 generally an atomic exchange. Some limited targets only allow the
7328 constant 1 to be stored. This is an ACQUIRE operation.
7330 TARGET is an optional place to stick the return value.
7331 MEM is where VAL is stored. */
7334 expand_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
)
7338 /* Try an atomic_exchange first. */
7339 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, MEMMODEL_SYNC_ACQUIRE
);
7343 ret
= maybe_emit_sync_lock_test_and_set (target
, mem
, val
,
7344 MEMMODEL_SYNC_ACQUIRE
);
7348 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7352 /* If there are no other options, try atomic_test_and_set if the value
7353 being stored is 1. */
7354 if (val
== const1_rtx
)
7355 ret
= maybe_emit_atomic_test_and_set (target
, mem
, MEMMODEL_SYNC_ACQUIRE
);
7360 /* This function expands the atomic test_and_set operation:
7361 atomically store a boolean TRUE into MEM and return the previous value.
7363 MEMMODEL is the memory model variant to use.
7364 TARGET is an optional place to stick the return value. */
7367 expand_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7369 machine_mode mode
= GET_MODE (mem
);
7370 rtx ret
, trueval
, subtarget
;
7372 ret
= maybe_emit_atomic_test_and_set (target
, mem
, model
);
7376 /* Be binary compatible with non-default settings of trueval, and different
7377 cpu revisions. E.g. one revision may have atomic-test-and-set, but
7378 another only has atomic-exchange. */
7379 if (targetm
.atomic_test_and_set_trueval
== 1)
7381 trueval
= const1_rtx
;
7382 subtarget
= target
? target
: gen_reg_rtx (mode
);
7386 trueval
= gen_int_mode (targetm
.atomic_test_and_set_trueval
, mode
);
7387 subtarget
= gen_reg_rtx (mode
);
7390 /* Try the atomic-exchange optab... */
7391 ret
= maybe_emit_atomic_exchange (subtarget
, mem
, trueval
, model
);
7393 /* ... then an atomic-compare-and-swap loop ... */
7395 ret
= maybe_emit_compare_and_swap_exchange_loop (subtarget
, mem
, trueval
);
7397 /* ... before trying the vaguely defined legacy lock_test_and_set. */
7399 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, trueval
, model
);
7401 /* Recall that the legacy lock_test_and_set optab was allowed to do magic
7402 things with the value 1. Thus we try again without trueval. */
7403 if (!ret
&& targetm
.atomic_test_and_set_trueval
!= 1)
7404 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, const1_rtx
, model
);
7406 /* Failing all else, assume a single threaded environment and simply
7407 perform the operation. */
7410 /* If the result is ignored skip the move to target. */
7411 if (subtarget
!= const0_rtx
)
7412 emit_move_insn (subtarget
, mem
);
7414 emit_move_insn (mem
, trueval
);
7418 /* Recall that have to return a boolean value; rectify if trueval
7419 is not exactly one. */
7420 if (targetm
.atomic_test_and_set_trueval
!= 1)
7421 ret
= emit_store_flag_force (target
, NE
, ret
, const0_rtx
, mode
, 0, 1);
7426 /* This function expands the atomic exchange operation:
7427 atomically store VAL in MEM and return the previous value in MEM.
7429 MEMMODEL is the memory model variant to use.
7430 TARGET is an optional place to stick the return value. */
7433 expand_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7437 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7439 /* Next try a compare-and-swap loop for the exchange. */
7441 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7446 /* This function expands the atomic compare exchange operation:
7448 *PTARGET_BOOL is an optional place to store the boolean success/failure.
7449 *PTARGET_OVAL is an optional place to store the old value from memory.
7450 Both target parameters may be NULL to indicate that we do not care about
7451 that return value. Both target parameters are updated on success to
7452 the actual location of the corresponding result.
7454 MEMMODEL is the memory model variant to use.
7456 The return value of the function is true for success. */
7459 expand_atomic_compare_and_swap (rtx
*ptarget_bool
, rtx
*ptarget_oval
,
7460 rtx mem
, rtx expected
, rtx desired
,
7461 bool is_weak
, enum memmodel succ_model
,
7462 enum memmodel fail_model
)
7464 machine_mode mode
= GET_MODE (mem
);
7465 struct expand_operand ops
[8];
7466 enum insn_code icode
;
7467 rtx target_oval
, target_bool
= NULL_RTX
;
7470 /* Load expected into a register for the compare and swap. */
7471 if (MEM_P (expected
))
7472 expected
= copy_to_reg (expected
);
7474 /* Make sure we always have some place to put the return oldval.
7475 Further, make sure that place is distinct from the input expected,
7476 just in case we need that path down below. */
7477 if (ptarget_oval
== NULL
7478 || (target_oval
= *ptarget_oval
) == NULL
7479 || reg_overlap_mentioned_p (expected
, target_oval
))
7480 target_oval
= gen_reg_rtx (mode
);
7482 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7483 if (icode
!= CODE_FOR_nothing
)
7485 machine_mode bool_mode
= insn_data
[icode
].operand
[0].mode
;
7487 /* Make sure we always have a place for the bool operand. */
7488 if (ptarget_bool
== NULL
7489 || (target_bool
= *ptarget_bool
) == NULL
7490 || GET_MODE (target_bool
) != bool_mode
)
7491 target_bool
= gen_reg_rtx (bool_mode
);
7493 /* Emit the compare_and_swap. */
7494 create_output_operand (&ops
[0], target_bool
, bool_mode
);
7495 create_output_operand (&ops
[1], target_oval
, mode
);
7496 create_fixed_operand (&ops
[2], mem
);
7497 create_input_operand (&ops
[3], expected
, mode
);
7498 create_input_operand (&ops
[4], desired
, mode
);
7499 create_integer_operand (&ops
[5], is_weak
);
7500 create_integer_operand (&ops
[6], succ_model
);
7501 create_integer_operand (&ops
[7], fail_model
);
7502 if (maybe_expand_insn (icode
, 8, ops
))
7504 /* Return success/failure. */
7505 target_bool
= ops
[0].value
;
7506 target_oval
= ops
[1].value
;
7511 /* Otherwise fall back to the original __sync_val_compare_and_swap
7512 which is always seq-cst. */
7513 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7514 if (icode
!= CODE_FOR_nothing
)
7518 create_output_operand (&ops
[0], target_oval
, mode
);
7519 create_fixed_operand (&ops
[1], mem
);
7520 create_input_operand (&ops
[2], expected
, mode
);
7521 create_input_operand (&ops
[3], desired
, mode
);
7522 if (!maybe_expand_insn (icode
, 4, ops
))
7525 target_oval
= ops
[0].value
;
7527 /* If the caller isn't interested in the boolean return value,
7528 skip the computation of it. */
7529 if (ptarget_bool
== NULL
)
7532 /* Otherwise, work out if the compare-and-swap succeeded. */
7534 if (have_insn_for (COMPARE
, CCmode
))
7535 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7538 target_bool
= emit_store_flag_force (target_bool
, EQ
, cc_reg
,
7539 const0_rtx
, VOIDmode
, 0, 1);
7542 goto success_bool_from_val
;
7545 /* Also check for library support for __sync_val_compare_and_swap. */
7546 libfunc
= optab_libfunc (sync_compare_and_swap_optab
, mode
);
7547 if (libfunc
!= NULL
)
7549 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7550 target_oval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7551 mode
, 3, addr
, ptr_mode
,
7552 expected
, mode
, desired
, mode
);
7554 /* Compute the boolean return value only if requested. */
7556 goto success_bool_from_val
;
7564 success_bool_from_val
:
7565 target_bool
= emit_store_flag_force (target_bool
, EQ
, target_oval
,
7566 expected
, VOIDmode
, 1, 1);
7568 /* Make sure that the oval output winds up where the caller asked. */
7570 *ptarget_oval
= target_oval
;
7572 *ptarget_bool
= target_bool
;
7576 /* Generate asm volatile("" : : : "memory") as the memory barrier. */
7579 expand_asm_memory_barrier (void)
7583 asm_op
= gen_rtx_ASM_OPERANDS (VOIDmode
, empty_string
, empty_string
, 0,
7584 rtvec_alloc (0), rtvec_alloc (0),
7585 rtvec_alloc (0), UNKNOWN_LOCATION
);
7586 MEM_VOLATILE_P (asm_op
) = 1;
7588 clob
= gen_rtx_SCRATCH (VOIDmode
);
7589 clob
= gen_rtx_MEM (BLKmode
, clob
);
7590 clob
= gen_rtx_CLOBBER (VOIDmode
, clob
);
7592 emit_insn (gen_rtx_PARALLEL (VOIDmode
, gen_rtvec (2, asm_op
, clob
)));
7595 /* This routine will either emit the mem_thread_fence pattern or issue a
7596 sync_synchronize to generate a fence for memory model MEMMODEL. */
7598 #ifndef HAVE_mem_thread_fence
7599 # define HAVE_mem_thread_fence 0
7600 # define gen_mem_thread_fence(x) (gcc_unreachable (), NULL_RTX)
7602 #ifndef HAVE_memory_barrier
7603 # define HAVE_memory_barrier 0
7604 # define gen_memory_barrier() (gcc_unreachable (), NULL_RTX)
7608 expand_mem_thread_fence (enum memmodel model
)
7610 if (HAVE_mem_thread_fence
)
7611 emit_insn (gen_mem_thread_fence (GEN_INT (model
)));
7612 else if (!is_mm_relaxed (model
))
7614 if (HAVE_memory_barrier
)
7615 emit_insn (gen_memory_barrier ());
7616 else if (synchronize_libfunc
!= NULL_RTX
)
7617 emit_library_call (synchronize_libfunc
, LCT_NORMAL
, VOIDmode
, 0);
7619 expand_asm_memory_barrier ();
7623 /* This routine will either emit the mem_signal_fence pattern or issue a
7624 sync_synchronize to generate a fence for memory model MEMMODEL. */
7626 #ifndef HAVE_mem_signal_fence
7627 # define HAVE_mem_signal_fence 0
7628 # define gen_mem_signal_fence(x) (gcc_unreachable (), NULL_RTX)
7632 expand_mem_signal_fence (enum memmodel model
)
7634 if (HAVE_mem_signal_fence
)
7635 emit_insn (gen_mem_signal_fence (GEN_INT (model
)));
7636 else if (!is_mm_relaxed (model
))
7638 /* By default targets are coherent between a thread and the signal
7639 handler running on the same thread. Thus this really becomes a
7640 compiler barrier, in that stores must not be sunk past
7641 (or raised above) a given point. */
7642 expand_asm_memory_barrier ();
7646 /* This function expands the atomic load operation:
7647 return the atomically loaded value in MEM.
7649 MEMMODEL is the memory model variant to use.
7650 TARGET is an option place to stick the return value. */
7653 expand_atomic_load (rtx target
, rtx mem
, enum memmodel model
)
7655 machine_mode mode
= GET_MODE (mem
);
7656 enum insn_code icode
;
7658 /* If the target supports the load directly, great. */
7659 icode
= direct_optab_handler (atomic_load_optab
, mode
);
7660 if (icode
!= CODE_FOR_nothing
)
7662 struct expand_operand ops
[3];
7664 create_output_operand (&ops
[0], target
, mode
);
7665 create_fixed_operand (&ops
[1], mem
);
7666 create_integer_operand (&ops
[2], model
);
7667 if (maybe_expand_insn (icode
, 3, ops
))
7668 return ops
[0].value
;
7671 /* If the size of the object is greater than word size on this target,
7672 then we assume that a load will not be atomic. */
7673 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7675 /* Issue val = compare_and_swap (mem, 0, 0).
7676 This may cause the occasional harmless store of 0 when the value is
7677 already 0, but it seems to be OK according to the standards guys. */
7678 if (expand_atomic_compare_and_swap (NULL
, &target
, mem
, const0_rtx
,
7679 const0_rtx
, false, model
, model
))
7682 /* Otherwise there is no atomic load, leave the library call. */
7686 /* Otherwise assume loads are atomic, and emit the proper barriers. */
7687 if (!target
|| target
== const0_rtx
)
7688 target
= gen_reg_rtx (mode
);
7690 /* For SEQ_CST, emit a barrier before the load. */
7691 if (is_mm_seq_cst (model
))
7692 expand_mem_thread_fence (model
);
7694 emit_move_insn (target
, mem
);
7696 /* Emit the appropriate barrier after the load. */
7697 expand_mem_thread_fence (model
);
7702 /* This function expands the atomic store operation:
7703 Atomically store VAL in MEM.
7704 MEMMODEL is the memory model variant to use.
7705 USE_RELEASE is true if __sync_lock_release can be used as a fall back.
7706 function returns const0_rtx if a pattern was emitted. */
7709 expand_atomic_store (rtx mem
, rtx val
, enum memmodel model
, bool use_release
)
7711 machine_mode mode
= GET_MODE (mem
);
7712 enum insn_code icode
;
7713 struct expand_operand ops
[3];
7715 /* If the target supports the store directly, great. */
7716 icode
= direct_optab_handler (atomic_store_optab
, mode
);
7717 if (icode
!= CODE_FOR_nothing
)
7719 create_fixed_operand (&ops
[0], mem
);
7720 create_input_operand (&ops
[1], val
, mode
);
7721 create_integer_operand (&ops
[2], model
);
7722 if (maybe_expand_insn (icode
, 3, ops
))
7726 /* If using __sync_lock_release is a viable alternative, try it. */
7729 icode
= direct_optab_handler (sync_lock_release_optab
, mode
);
7730 if (icode
!= CODE_FOR_nothing
)
7732 create_fixed_operand (&ops
[0], mem
);
7733 create_input_operand (&ops
[1], const0_rtx
, mode
);
7734 if (maybe_expand_insn (icode
, 2, ops
))
7736 /* lock_release is only a release barrier. */
7737 if (is_mm_seq_cst (model
))
7738 expand_mem_thread_fence (model
);
7744 /* If the size of the object is greater than word size on this target,
7745 a default store will not be atomic, Try a mem_exchange and throw away
7746 the result. If that doesn't work, don't do anything. */
7747 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7749 rtx target
= maybe_emit_atomic_exchange (NULL_RTX
, mem
, val
, model
);
7751 target
= maybe_emit_compare_and_swap_exchange_loop (NULL_RTX
, mem
, val
);
7758 /* Otherwise assume stores are atomic, and emit the proper barriers. */
7759 expand_mem_thread_fence (model
);
7761 emit_move_insn (mem
, val
);
7763 /* For SEQ_CST, also emit a barrier after the store. */
7764 if (is_mm_seq_cst (model
))
7765 expand_mem_thread_fence (model
);
7771 /* Structure containing the pointers and values required to process the
7772 various forms of the atomic_fetch_op and atomic_op_fetch builtins. */
7774 struct atomic_op_functions
7776 direct_optab mem_fetch_before
;
7777 direct_optab mem_fetch_after
;
7778 direct_optab mem_no_result
;
7781 direct_optab no_result
;
7782 enum rtx_code reverse_code
;
7786 /* Fill in structure pointed to by OP with the various optab entries for an
7787 operation of type CODE. */
7790 get_atomic_op_for_code (struct atomic_op_functions
*op
, enum rtx_code code
)
7792 gcc_assert (op
!= NULL
);
7794 /* If SWITCHABLE_TARGET is defined, then subtargets can be switched
7795 in the source code during compilation, and the optab entries are not
7796 computable until runtime. Fill in the values at runtime. */
7800 op
->mem_fetch_before
= atomic_fetch_add_optab
;
7801 op
->mem_fetch_after
= atomic_add_fetch_optab
;
7802 op
->mem_no_result
= atomic_add_optab
;
7803 op
->fetch_before
= sync_old_add_optab
;
7804 op
->fetch_after
= sync_new_add_optab
;
7805 op
->no_result
= sync_add_optab
;
7806 op
->reverse_code
= MINUS
;
7809 op
->mem_fetch_before
= atomic_fetch_sub_optab
;
7810 op
->mem_fetch_after
= atomic_sub_fetch_optab
;
7811 op
->mem_no_result
= atomic_sub_optab
;
7812 op
->fetch_before
= sync_old_sub_optab
;
7813 op
->fetch_after
= sync_new_sub_optab
;
7814 op
->no_result
= sync_sub_optab
;
7815 op
->reverse_code
= PLUS
;
7818 op
->mem_fetch_before
= atomic_fetch_xor_optab
;
7819 op
->mem_fetch_after
= atomic_xor_fetch_optab
;
7820 op
->mem_no_result
= atomic_xor_optab
;
7821 op
->fetch_before
= sync_old_xor_optab
;
7822 op
->fetch_after
= sync_new_xor_optab
;
7823 op
->no_result
= sync_xor_optab
;
7824 op
->reverse_code
= XOR
;
7827 op
->mem_fetch_before
= atomic_fetch_and_optab
;
7828 op
->mem_fetch_after
= atomic_and_fetch_optab
;
7829 op
->mem_no_result
= atomic_and_optab
;
7830 op
->fetch_before
= sync_old_and_optab
;
7831 op
->fetch_after
= sync_new_and_optab
;
7832 op
->no_result
= sync_and_optab
;
7833 op
->reverse_code
= UNKNOWN
;
7836 op
->mem_fetch_before
= atomic_fetch_or_optab
;
7837 op
->mem_fetch_after
= atomic_or_fetch_optab
;
7838 op
->mem_no_result
= atomic_or_optab
;
7839 op
->fetch_before
= sync_old_ior_optab
;
7840 op
->fetch_after
= sync_new_ior_optab
;
7841 op
->no_result
= sync_ior_optab
;
7842 op
->reverse_code
= UNKNOWN
;
7845 op
->mem_fetch_before
= atomic_fetch_nand_optab
;
7846 op
->mem_fetch_after
= atomic_nand_fetch_optab
;
7847 op
->mem_no_result
= atomic_nand_optab
;
7848 op
->fetch_before
= sync_old_nand_optab
;
7849 op
->fetch_after
= sync_new_nand_optab
;
7850 op
->no_result
= sync_nand_optab
;
7851 op
->reverse_code
= UNKNOWN
;
7858 /* See if there is a more optimal way to implement the operation "*MEM CODE VAL"
7859 using memory order MODEL. If AFTER is true the operation needs to return
7860 the value of *MEM after the operation, otherwise the previous value.
7861 TARGET is an optional place to place the result. The result is unused if
7863 Return the result if there is a better sequence, otherwise NULL_RTX. */
7866 maybe_optimize_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7867 enum memmodel model
, bool after
)
7869 /* If the value is prefetched, or not used, it may be possible to replace
7870 the sequence with a native exchange operation. */
7871 if (!after
|| target
== const0_rtx
)
7873 /* fetch_and (&x, 0, m) can be replaced with exchange (&x, 0, m). */
7874 if (code
== AND
&& val
== const0_rtx
)
7876 if (target
== const0_rtx
)
7877 target
= gen_reg_rtx (GET_MODE (mem
));
7878 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7881 /* fetch_or (&x, -1, m) can be replaced with exchange (&x, -1, m). */
7882 if (code
== IOR
&& val
== constm1_rtx
)
7884 if (target
== const0_rtx
)
7885 target
= gen_reg_rtx (GET_MODE (mem
));
7886 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7893 /* Try to emit an instruction for a specific operation varaition.
7894 OPTAB contains the OP functions.
7895 TARGET is an optional place to return the result. const0_rtx means unused.
7896 MEM is the memory location to operate on.
7897 VAL is the value to use in the operation.
7898 USE_MEMMODEL is TRUE if the variation with a memory model should be tried.
7899 MODEL is the memory model, if used.
7900 AFTER is true if the returned result is the value after the operation. */
7903 maybe_emit_op (const struct atomic_op_functions
*optab
, rtx target
, rtx mem
,
7904 rtx val
, bool use_memmodel
, enum memmodel model
, bool after
)
7906 machine_mode mode
= GET_MODE (mem
);
7907 struct expand_operand ops
[4];
7908 enum insn_code icode
;
7912 /* Check to see if there is a result returned. */
7913 if (target
== const0_rtx
)
7917 icode
= direct_optab_handler (optab
->mem_no_result
, mode
);
7918 create_integer_operand (&ops
[2], model
);
7923 icode
= direct_optab_handler (optab
->no_result
, mode
);
7927 /* Otherwise, we need to generate a result. */
7932 icode
= direct_optab_handler (after
? optab
->mem_fetch_after
7933 : optab
->mem_fetch_before
, mode
);
7934 create_integer_operand (&ops
[3], model
);
7939 icode
= optab_handler (after
? optab
->fetch_after
7940 : optab
->fetch_before
, mode
);
7943 create_output_operand (&ops
[op_counter
++], target
, mode
);
7945 if (icode
== CODE_FOR_nothing
)
7948 create_fixed_operand (&ops
[op_counter
++], mem
);
7949 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7950 create_convert_operand_to (&ops
[op_counter
++], val
, mode
, true);
7952 if (maybe_expand_insn (icode
, num_ops
, ops
))
7953 return (target
== const0_rtx
? const0_rtx
: ops
[0].value
);
7959 /* This function expands an atomic fetch_OP or OP_fetch operation:
7960 TARGET is an option place to stick the return value. const0_rtx indicates
7961 the result is unused.
7962 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7963 CODE is the operation being performed (OP)
7964 MEMMODEL is the memory model variant to use.
7965 AFTER is true to return the result of the operation (OP_fetch).
7966 AFTER is false to return the value before the operation (fetch_OP).
7968 This function will *only* generate instructions if there is a direct
7969 optab. No compare and swap loops or libcalls will be generated. */
7972 expand_atomic_fetch_op_no_fallback (rtx target
, rtx mem
, rtx val
,
7973 enum rtx_code code
, enum memmodel model
,
7976 machine_mode mode
= GET_MODE (mem
);
7977 struct atomic_op_functions optab
;
7979 bool unused_result
= (target
== const0_rtx
);
7981 get_atomic_op_for_code (&optab
, code
);
7983 /* Check to see if there are any better instructions. */
7984 result
= maybe_optimize_fetch_op (target
, mem
, val
, code
, model
, after
);
7988 /* Check for the case where the result isn't used and try those patterns. */
7991 /* Try the memory model variant first. */
7992 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, true);
7996 /* Next try the old style withuot a memory model. */
7997 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, true);
8001 /* There is no no-result pattern, so try patterns with a result. */
8005 /* Try the __atomic version. */
8006 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, after
);
8010 /* Try the older __sync version. */
8011 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, after
);
8015 /* If the fetch value can be calculated from the other variation of fetch,
8016 try that operation. */
8017 if (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
)
8019 /* Try the __atomic version, then the older __sync version. */
8020 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, !after
);
8022 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, !after
);
8026 /* If the result isn't used, no need to do compensation code. */
8030 /* Issue compensation code. Fetch_after == fetch_before OP val.
8031 Fetch_before == after REVERSE_OP val. */
8033 code
= optab
.reverse_code
;
8036 result
= expand_simple_binop (mode
, AND
, result
, val
, NULL_RTX
,
8037 true, OPTAB_LIB_WIDEN
);
8038 result
= expand_simple_unop (mode
, NOT
, result
, target
, true);
8041 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
8042 true, OPTAB_LIB_WIDEN
);
8047 /* No direct opcode can be generated. */
8053 /* This function expands an atomic fetch_OP or OP_fetch operation:
8054 TARGET is an option place to stick the return value. const0_rtx indicates
8055 the result is unused.
8056 atomically fetch MEM, perform the operation with VAL and return it to MEM.
8057 CODE is the operation being performed (OP)
8058 MEMMODEL is the memory model variant to use.
8059 AFTER is true to return the result of the operation (OP_fetch).
8060 AFTER is false to return the value before the operation (fetch_OP). */
8062 expand_atomic_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
8063 enum memmodel model
, bool after
)
8065 machine_mode mode
= GET_MODE (mem
);
8067 bool unused_result
= (target
== const0_rtx
);
8069 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, val
, code
, model
,
8075 /* Add/sub can be implemented by doing the reverse operation with -(val). */
8076 if (code
== PLUS
|| code
== MINUS
)
8079 enum rtx_code reverse
= (code
== PLUS
? MINUS
: PLUS
);
8082 tmp
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, true);
8083 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, tmp
, reverse
,
8087 /* PLUS worked so emit the insns and return. */
8094 /* PLUS did not work, so throw away the negation code and continue. */
8098 /* Try the __sync libcalls only if we can't do compare-and-swap inline. */
8099 if (!can_compare_and_swap_p (mode
, false))
8103 enum rtx_code orig_code
= code
;
8104 struct atomic_op_functions optab
;
8106 get_atomic_op_for_code (&optab
, code
);
8107 libfunc
= optab_libfunc (after
? optab
.fetch_after
8108 : optab
.fetch_before
, mode
);
8110 && (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
))
8114 code
= optab
.reverse_code
;
8115 libfunc
= optab_libfunc (after
? optab
.fetch_before
8116 : optab
.fetch_after
, mode
);
8118 if (libfunc
!= NULL
)
8120 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
8121 result
= emit_library_call_value (libfunc
, NULL
, LCT_NORMAL
, mode
,
8122 2, addr
, ptr_mode
, val
, mode
);
8124 if (!unused_result
&& fixup
)
8125 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
8126 true, OPTAB_LIB_WIDEN
);
8130 /* We need the original code for any further attempts. */
8134 /* If nothing else has succeeded, default to a compare and swap loop. */
8135 if (can_compare_and_swap_p (mode
, true))
8138 rtx t0
= gen_reg_rtx (mode
), t1
;
8142 /* If the result is used, get a register for it. */
8145 if (!target
|| !register_operand (target
, mode
))
8146 target
= gen_reg_rtx (mode
);
8147 /* If fetch_before, copy the value now. */
8149 emit_move_insn (target
, t0
);
8152 target
= const0_rtx
;
8157 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
8158 true, OPTAB_LIB_WIDEN
);
8159 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
8162 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
, true,
8165 /* For after, copy the value now. */
8166 if (!unused_result
&& after
)
8167 emit_move_insn (target
, t1
);
8168 insn
= get_insns ();
8171 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
8178 /* Return true if OPERAND is suitable for operand number OPNO of
8179 instruction ICODE. */
8182 insn_operand_matches (enum insn_code icode
, unsigned int opno
, rtx operand
)
8184 return (!insn_data
[(int) icode
].operand
[opno
].predicate
8185 || (insn_data
[(int) icode
].operand
[opno
].predicate
8186 (operand
, insn_data
[(int) icode
].operand
[opno
].mode
)));
8189 /* TARGET is a target of a multiword operation that we are going to
8190 implement as a series of word-mode operations. Return true if
8191 TARGET is suitable for this purpose. */
8194 valid_multiword_target_p (rtx target
)
8199 mode
= GET_MODE (target
);
8200 for (i
= 0; i
< GET_MODE_SIZE (mode
); i
+= UNITS_PER_WORD
)
8201 if (!validate_subreg (word_mode
, mode
, target
, i
))
8206 /* Like maybe_legitimize_operand, but do not change the code of the
8207 current rtx value. */
8210 maybe_legitimize_operand_same_code (enum insn_code icode
, unsigned int opno
,
8211 struct expand_operand
*op
)
8213 /* See if the operand matches in its current form. */
8214 if (insn_operand_matches (icode
, opno
, op
->value
))
8217 /* If the operand is a memory whose address has no side effects,
8218 try forcing the address into a non-virtual pseudo register.
8219 The check for side effects is important because copy_to_mode_reg
8220 cannot handle things like auto-modified addresses. */
8221 if (insn_data
[(int) icode
].operand
[opno
].allows_mem
&& MEM_P (op
->value
))
8226 addr
= XEXP (mem
, 0);
8227 if (!(REG_P (addr
) && REGNO (addr
) > LAST_VIRTUAL_REGISTER
)
8228 && !side_effects_p (addr
))
8233 last
= get_last_insn ();
8234 mode
= get_address_mode (mem
);
8235 mem
= replace_equiv_address (mem
, copy_to_mode_reg (mode
, addr
));
8236 if (insn_operand_matches (icode
, opno
, mem
))
8241 delete_insns_since (last
);
8248 /* Try to make OP match operand OPNO of instruction ICODE. Return true
8249 on success, storing the new operand value back in OP. */
8252 maybe_legitimize_operand (enum insn_code icode
, unsigned int opno
,
8253 struct expand_operand
*op
)
8255 machine_mode mode
, imode
;
8256 bool old_volatile_ok
, result
;
8262 old_volatile_ok
= volatile_ok
;
8264 result
= maybe_legitimize_operand_same_code (icode
, opno
, op
);
8265 volatile_ok
= old_volatile_ok
;
8269 gcc_assert (mode
!= VOIDmode
);
8271 && op
->value
!= const0_rtx
8272 && GET_MODE (op
->value
) == mode
8273 && maybe_legitimize_operand_same_code (icode
, opno
, op
))
8276 op
->value
= gen_reg_rtx (mode
);
8281 gcc_assert (mode
!= VOIDmode
);
8282 gcc_assert (GET_MODE (op
->value
) == VOIDmode
8283 || GET_MODE (op
->value
) == mode
);
8284 if (maybe_legitimize_operand_same_code (icode
, opno
, op
))
8287 op
->value
= copy_to_mode_reg (mode
, op
->value
);
8290 case EXPAND_CONVERT_TO
:
8291 gcc_assert (mode
!= VOIDmode
);
8292 op
->value
= convert_to_mode (mode
, op
->value
, op
->unsigned_p
);
8295 case EXPAND_CONVERT_FROM
:
8296 if (GET_MODE (op
->value
) != VOIDmode
)
8297 mode
= GET_MODE (op
->value
);
8299 /* The caller must tell us what mode this value has. */
8300 gcc_assert (mode
!= VOIDmode
);
8302 imode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8303 if (imode
!= VOIDmode
&& imode
!= mode
)
8305 op
->value
= convert_modes (imode
, mode
, op
->value
, op
->unsigned_p
);
8310 case EXPAND_ADDRESS
:
8311 gcc_assert (mode
!= VOIDmode
);
8312 op
->value
= convert_memory_address (mode
, op
->value
);
8315 case EXPAND_INTEGER
:
8316 mode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8317 if (mode
!= VOIDmode
&& const_int_operand (op
->value
, mode
))
8321 return insn_operand_matches (icode
, opno
, op
->value
);
8324 /* Make OP describe an input operand that should have the same value
8325 as VALUE, after any mode conversion that the target might request.
8326 TYPE is the type of VALUE. */
8329 create_convert_operand_from_type (struct expand_operand
*op
,
8330 rtx value
, tree type
)
8332 create_convert_operand_from (op
, value
, TYPE_MODE (type
),
8333 TYPE_UNSIGNED (type
));
8336 /* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
8337 of instruction ICODE. Return true on success, leaving the new operand
8338 values in the OPS themselves. Emit no code on failure. */
8341 maybe_legitimize_operands (enum insn_code icode
, unsigned int opno
,
8342 unsigned int nops
, struct expand_operand
*ops
)
8347 last
= get_last_insn ();
8348 for (i
= 0; i
< nops
; i
++)
8349 if (!maybe_legitimize_operand (icode
, opno
+ i
, &ops
[i
]))
8351 delete_insns_since (last
);
8357 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
8358 as its operands. Return the instruction pattern on success,
8359 and emit any necessary set-up code. Return null and emit no
8363 maybe_gen_insn (enum insn_code icode
, unsigned int nops
,
8364 struct expand_operand
*ops
)
8366 gcc_assert (nops
== (unsigned int) insn_data
[(int) icode
].n_generator_args
);
8367 if (!maybe_legitimize_operands (icode
, 0, nops
, ops
))
8373 return GEN_FCN (icode
) (ops
[0].value
);
8375 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
);
8377 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
);
8379 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8382 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8383 ops
[3].value
, ops
[4].value
);
8385 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8386 ops
[3].value
, ops
[4].value
, ops
[5].value
);
8388 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8389 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8392 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8393 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8394 ops
[6].value
, ops
[7].value
);
8396 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8397 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8398 ops
[6].value
, ops
[7].value
, ops
[8].value
);
8403 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
8404 as its operands. Return true on success and emit no code on failure. */
8407 maybe_expand_insn (enum insn_code icode
, unsigned int nops
,
8408 struct expand_operand
*ops
)
8410 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8419 /* Like maybe_expand_insn, but for jumps. */
8422 maybe_expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8423 struct expand_operand
*ops
)
8425 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8428 emit_jump_insn (pat
);
8434 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
8438 expand_insn (enum insn_code icode
, unsigned int nops
,
8439 struct expand_operand
*ops
)
8441 if (!maybe_expand_insn (icode
, nops
, ops
))
8445 /* Like expand_insn, but for jumps. */
8448 expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8449 struct expand_operand
*ops
)
8451 if (!maybe_expand_jump_insn (icode
, nops
, ops
))
8455 /* Reduce conditional compilation elsewhere. */
8458 #define CODE_FOR_insv CODE_FOR_nothing
8462 #define CODE_FOR_extv CODE_FOR_nothing
8465 #define HAVE_extzv 0
8466 #define CODE_FOR_extzv CODE_FOR_nothing
8469 /* Enumerates the possible types of structure operand to an
8471 enum extraction_type
{ ET_unaligned_mem
, ET_reg
};
8473 /* Check whether insv, extv or extzv pattern ICODE can be used for an
8474 insertion or extraction of type TYPE on a structure of mode MODE.
8475 Return true if so and fill in *INSN accordingly. STRUCT_OP is the
8476 operand number of the structure (the first sign_extract or zero_extract
8477 operand) and FIELD_OP is the operand number of the field (the other
8478 side of the set from the sign_extract or zero_extract). */
8481 get_traditional_extraction_insn (extraction_insn
*insn
,
8482 enum extraction_type type
,
8484 enum insn_code icode
,
8485 int struct_op
, int field_op
)
8487 const struct insn_data_d
*data
= &insn_data
[icode
];
8489 machine_mode struct_mode
= data
->operand
[struct_op
].mode
;
8490 if (struct_mode
== VOIDmode
)
8491 struct_mode
= word_mode
;
8492 if (mode
!= struct_mode
)
8495 machine_mode field_mode
= data
->operand
[field_op
].mode
;
8496 if (field_mode
== VOIDmode
)
8497 field_mode
= word_mode
;
8499 machine_mode pos_mode
= data
->operand
[struct_op
+ 2].mode
;
8500 if (pos_mode
== VOIDmode
)
8501 pos_mode
= word_mode
;
8503 insn
->icode
= icode
;
8504 insn
->field_mode
= field_mode
;
8505 insn
->struct_mode
= (type
== ET_unaligned_mem
? byte_mode
: struct_mode
);
8506 insn
->pos_mode
= pos_mode
;
8510 /* Return true if an optab exists to perform an insertion or extraction
8511 of type TYPE in mode MODE. Describe the instruction in *INSN if so.
8513 REG_OPTAB is the optab to use for register structures and
8514 MISALIGN_OPTAB is the optab to use for misaligned memory structures.
8515 POS_OP is the operand number of the bit position. */
8518 get_optab_extraction_insn (struct extraction_insn
*insn
,
8519 enum extraction_type type
,
8520 machine_mode mode
, direct_optab reg_optab
,
8521 direct_optab misalign_optab
, int pos_op
)
8523 direct_optab optab
= (type
== ET_unaligned_mem
? misalign_optab
: reg_optab
);
8524 enum insn_code icode
= direct_optab_handler (optab
, mode
);
8525 if (icode
== CODE_FOR_nothing
)
8528 const struct insn_data_d
*data
= &insn_data
[icode
];
8530 insn
->icode
= icode
;
8531 insn
->field_mode
= mode
;
8532 insn
->struct_mode
= (type
== ET_unaligned_mem
? BLKmode
: mode
);
8533 insn
->pos_mode
= data
->operand
[pos_op
].mode
;
8534 if (insn
->pos_mode
== VOIDmode
)
8535 insn
->pos_mode
= word_mode
;
8539 /* Return true if an instruction exists to perform an insertion or
8540 extraction (PATTERN says which) of type TYPE in mode MODE.
8541 Describe the instruction in *INSN if so. */
8544 get_extraction_insn (extraction_insn
*insn
,
8545 enum extraction_pattern pattern
,
8546 enum extraction_type type
,
8553 && get_traditional_extraction_insn (insn
, type
, mode
,
8554 CODE_FOR_insv
, 0, 3))
8556 return get_optab_extraction_insn (insn
, type
, mode
, insv_optab
,
8557 insvmisalign_optab
, 2);
8561 && get_traditional_extraction_insn (insn
, type
, mode
,
8562 CODE_FOR_extv
, 1, 0))
8564 return get_optab_extraction_insn (insn
, type
, mode
, extv_optab
,
8565 extvmisalign_optab
, 3);
8569 && get_traditional_extraction_insn (insn
, type
, mode
,
8570 CODE_FOR_extzv
, 1, 0))
8572 return get_optab_extraction_insn (insn
, type
, mode
, extzv_optab
,
8573 extzvmisalign_optab
, 3);
8580 /* Return true if an instruction exists to access a field of mode
8581 FIELDMODE in a structure that has STRUCT_BITS significant bits.
8582 Describe the "best" such instruction in *INSN if so. PATTERN and
8583 TYPE describe the type of insertion or extraction we want to perform.
8585 For an insertion, the number of significant structure bits includes
8586 all bits of the target. For an extraction, it need only include the
8587 most significant bit of the field. Larger widths are acceptable
8591 get_best_extraction_insn (extraction_insn
*insn
,
8592 enum extraction_pattern pattern
,
8593 enum extraction_type type
,
8594 unsigned HOST_WIDE_INT struct_bits
,
8595 machine_mode field_mode
)
8597 machine_mode mode
= smallest_mode_for_size (struct_bits
, MODE_INT
);
8598 while (mode
!= VOIDmode
)
8600 if (get_extraction_insn (insn
, pattern
, type
, mode
))
8602 while (mode
!= VOIDmode
8603 && GET_MODE_SIZE (mode
) <= GET_MODE_SIZE (field_mode
)
8604 && !TRULY_NOOP_TRUNCATION_MODES_P (insn
->field_mode
,
8607 get_extraction_insn (insn
, pattern
, type
, mode
);
8608 mode
= GET_MODE_WIDER_MODE (mode
);
8612 mode
= GET_MODE_WIDER_MODE (mode
);
8617 /* Return true if an instruction exists to access a field of mode
8618 FIELDMODE in a register structure that has STRUCT_BITS significant bits.
8619 Describe the "best" such instruction in *INSN if so. PATTERN describes
8620 the type of insertion or extraction we want to perform.
8622 For an insertion, the number of significant structure bits includes
8623 all bits of the target. For an extraction, it need only include the
8624 most significant bit of the field. Larger widths are acceptable
8628 get_best_reg_extraction_insn (extraction_insn
*insn
,
8629 enum extraction_pattern pattern
,
8630 unsigned HOST_WIDE_INT struct_bits
,
8631 machine_mode field_mode
)
8633 return get_best_extraction_insn (insn
, pattern
, ET_reg
, struct_bits
,
8637 /* Return true if an instruction exists to access a field of BITSIZE
8638 bits starting BITNUM bits into a memory structure. Describe the
8639 "best" such instruction in *INSN if so. PATTERN describes the type
8640 of insertion or extraction we want to perform and FIELDMODE is the
8641 natural mode of the extracted field.
8643 The instructions considered here only access bytes that overlap
8644 the bitfield; they do not touch any surrounding bytes. */
8647 get_best_mem_extraction_insn (extraction_insn
*insn
,
8648 enum extraction_pattern pattern
,
8649 HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitnum
,
8650 machine_mode field_mode
)
8652 unsigned HOST_WIDE_INT struct_bits
= (bitnum
% BITS_PER_UNIT
8654 + BITS_PER_UNIT
- 1);
8655 struct_bits
-= struct_bits
% BITS_PER_UNIT
;
8656 return get_best_extraction_insn (insn
, pattern
, ET_unaligned_mem
,
8657 struct_bits
, field_mode
);
8660 /* Determine whether "1 << x" is relatively cheap in word_mode. */
8663 lshift_cheap_p (bool speed_p
)
8665 /* FIXME: This should be made target dependent via this "this_target"
8666 mechanism, similar to e.g. can_copy_init_p in gcse.c. */
8667 static bool init
[2] = { false, false };
8668 static bool cheap
[2] = { true, true };
8670 /* If the targer has no lshift in word_mode, the operation will most
8671 probably not be cheap. ??? Does GCC even work for such targets? */
8672 if (optab_handler (ashl_optab
, word_mode
) == CODE_FOR_nothing
)
8677 rtx reg
= gen_raw_REG (word_mode
, 10000);
8678 int cost
= set_src_cost (gen_rtx_ASHIFT (word_mode
, const1_rtx
, reg
),
8680 cheap
[speed_p
] = cost
< COSTS_N_INSNS (3);
8681 init
[speed_p
] = true;
8684 return cheap
[speed_p
];
8687 #include "gt-optabs.h"