1 ;; Predicate definitions for IA-64.
2 ;; Copyright (C) 2004-2013 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 3, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>.
20 ;; True if OP is a valid operand for the MEM of a CALL insn.
21 (define_predicate "call_operand"
22 (ior (match_code "symbol_ref")
23 (match_operand 0 "register_operand")))
25 ;; True if OP refers to any kind of symbol.
26 ;; For roughly the same reasons that pmode_register_operand exists, this
27 ;; predicate ignores its mode argument.
28 (define_special_predicate "symbolic_operand"
29 (match_code "symbol_ref,const,label_ref"))
31 ;; True if OP is a SYMBOL_REF which refers to a function.
32 (define_predicate "function_operand"
33 (and (match_code "symbol_ref")
34 (match_test "SYMBOL_REF_FUNCTION_P (op)")))
36 ;; True if OP refers to a symbol in the sdata section.
37 (define_predicate "sdata_symbolic_operand"
38 (match_code "symbol_ref,const")
40 HOST_WIDE_INT offset = 0, size = 0;
42 switch (GET_CODE (op))
46 if (GET_CODE (op) != PLUS
47 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
48 || GET_CODE (XEXP (op, 1)) != CONST_INT)
50 offset = INTVAL (XEXP (op, 1));
55 if (CONSTANT_POOL_ADDRESS_P (op))
57 size = GET_MODE_SIZE (get_pool_mode (op));
58 if (size > ia64_section_threshold)
65 if (!SYMBOL_REF_LOCAL_P (op) || !SYMBOL_REF_SMALL_P (op))
68 /* Note that in addition to DECLs, we can get various forms
70 t = SYMBOL_REF_DECL (op);
72 t = DECL_SIZE_UNIT (t);
74 t = TYPE_SIZE_UNIT (TREE_TYPE (t));
75 if (t && host_integerp (t, 0))
77 size = tree_low_cst (t, 0);
83 /* Deny the stupid user trick of addressing outside the object. Such
84 things quickly result in GPREL22 relocation overflows. Of course,
85 they're also highly undefined. From a pure pedant's point of view
86 they deserve a slap on the wrist (such as provided by a relocation
87 overflow), but that just leads to bugzilla noise. */
88 return (offset >= 0 && offset <= size);
95 ;; True if OP refers to a symbol in the small address area.
96 (define_predicate "small_addr_symbolic_operand"
97 (match_code "symbol_ref,const")
99 switch (GET_CODE (op))
103 if (GET_CODE (op) != PLUS
104 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
105 || GET_CODE (XEXP (op, 1)) != CONST_INT)
111 return SYMBOL_REF_SMALL_ADDR_P (op);
118 ;; True if OP refers to a symbol with which we may use any offset.
119 (define_predicate "any_offset_symbol_operand"
120 (match_code "symbol_ref")
122 if (TARGET_NO_PIC || TARGET_AUTO_PIC)
124 if (SYMBOL_REF_SMALL_ADDR_P (op))
126 if (SYMBOL_REF_FUNCTION_P (op))
128 if (sdata_symbolic_operand (op, mode))
133 ;; True if OP refers to a symbol with which we may use 14-bit aligned offsets.
134 ;; False if OP refers to a symbol with which we may not use any offset at any
136 (define_predicate "aligned_offset_symbol_operand"
137 (and (match_code "symbol_ref")
138 (match_test "! SYMBOL_REF_FUNCTION_P (op)")))
140 ;; True if OP refers to a symbol, and is appropriate for a GOT load.
141 (define_predicate "got_symbolic_operand"
142 (match_operand 0 "symbolic_operand" "")
144 HOST_WIDE_INT addend = 0;
146 switch (GET_CODE (op))
152 /* Accept only (plus (symbol_ref) (const_int)). */
154 if (GET_CODE (op) != PLUS
155 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
156 || GET_CODE (XEXP (op, 1)) != CONST_INT)
159 addend = INTVAL (XEXP (op, 1));
164 /* These symbols shouldn't be used with got loads. */
165 if (SYMBOL_REF_SMALL_ADDR_P (op))
167 if (SYMBOL_REF_TLS_MODEL (op) != 0)
170 if (any_offset_symbol_operand (op, mode))
173 /* The low 14 bits of the constant have been forced to zero
174 so that we do not use up so many GOT entries. Prevent cse
175 from undoing this. */
176 if (aligned_offset_symbol_operand (op, mode))
177 return (addend & 0x3fff) == 0;
186 ;; Return true if OP is a valid thread local storage symbolic operand.
187 (define_predicate "tls_symbolic_operand"
188 (match_code "symbol_ref,const")
190 switch (GET_CODE (op))
193 return SYMBOL_REF_TLS_MODEL (op) != 0;
197 if (GET_CODE (op) != PLUS
198 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
199 || GET_CODE (XEXP (op, 1)) != CONST_INT)
202 /* We only allow certain offsets for certain tls models. */
203 switch (SYMBOL_REF_TLS_MODEL (XEXP (op, 0)))
205 case TLS_MODEL_GLOBAL_DYNAMIC:
206 case TLS_MODEL_LOCAL_DYNAMIC:
209 case TLS_MODEL_INITIAL_EXEC:
210 return (INTVAL (XEXP (op, 1)) & 0x3fff) == 0;
212 case TLS_MODEL_LOCAL_EXEC:
224 ;; Return true if OP is a local-dynamic thread local storage symbolic operand.
225 (define_predicate "ld_tls_symbolic_operand"
226 (and (match_code "symbol_ref")
227 (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC")))
229 ;; Return true if OP is an initial-exec thread local storage symbolic operand.
230 (define_predicate "ie_tls_symbolic_operand"
231 (match_code "symbol_ref,const")
233 switch (GET_CODE (op))
237 if (GET_CODE (op) != PLUS
238 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
239 || GET_CODE (XEXP (op, 1)) != CONST_INT
240 || (INTVAL (XEXP (op, 1)) & 0x3fff) != 0)
246 return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC;
253 ;; Return true if OP is a local-exec thread local storage symbolic operand.
254 (define_predicate "le_tls_symbolic_operand"
255 (match_code "symbol_ref,const")
257 switch (GET_CODE (op))
261 if (GET_CODE (op) != PLUS
262 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
263 || GET_CODE (XEXP (op, 1)) != CONST_INT)
269 return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC;
276 ;; Like nonimmediate_operand, but don't allow MEMs that try to use a
277 ;; POST_MODIFY with a REG as displacement.
278 (define_predicate "destination_operand"
279 (and (match_operand 0 "nonimmediate_operand")
280 (match_test "GET_CODE (op) != MEM
281 || GET_CODE (XEXP (op, 0)) != POST_MODIFY
282 || GET_CODE (XEXP (XEXP (XEXP (op, 0), 1), 1)) != REG")))
284 ;; Like destination_operand, but don't allow any post-increments.
285 (define_predicate "not_postinc_destination_operand"
286 (and (match_operand 0 "nonimmediate_operand")
287 (match_test "GET_CODE (op) != MEM
288 || GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
290 ;; Like memory_operand, but don't allow post-increments.
291 (define_predicate "not_postinc_memory_operand"
292 (and (match_operand 0 "memory_operand")
293 (match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
295 ;; True if OP is a general operand, with some restrictions on symbols.
296 (define_predicate "move_operand"
297 (match_operand 0 "general_operand")
299 switch (GET_CODE (op))
303 HOST_WIDE_INT addend;
305 /* Accept only (plus (symbol_ref) (const_int)). */
307 if (GET_CODE (op) != PLUS
308 || GET_CODE (XEXP (op, 0)) != SYMBOL_REF
309 || GET_CODE (XEXP (op, 1)) != CONST_INT)
312 addend = INTVAL (XEXP (op, 1));
315 /* After reload, we want to allow any offset whatsoever. This
316 allows reload the opportunity to avoid spilling addresses to
317 the stack, and instead simply substitute in the value from a
318 REG_EQUIV. We'll split this up again when splitting the insn. */
319 if (reload_in_progress || reload_completed)
322 /* Some symbol types we allow to use with any offset. */
323 if (any_offset_symbol_operand (op, mode))
326 /* Some symbol types we allow offsets with the low 14 bits of the
327 constant forced to zero so that we do not use up so many GOT
328 entries. We want to prevent cse from undoing this. */
329 if (aligned_offset_symbol_operand (op, mode))
330 return (addend & 0x3fff) == 0;
332 /* The remaining symbol types may never be used with an offset. */
341 ;; Like move_operand but don't allow post-increments.
342 (define_predicate "not_postinc_move_operand"
343 (and (match_operand 0 "move_operand")
344 (match_test "GET_CODE (op) != MEM
345 || GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
347 ;; True if OP is a register operand that is (or could be) a GR reg.
348 (define_predicate "gr_register_operand"
349 (match_operand 0 "register_operand")
352 if (GET_CODE (op) == SUBREG)
353 op = SUBREG_REG (op);
356 return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
359 ;; True if OP is a register operand that is (or could be) an FR reg.
360 (define_predicate "fr_register_operand"
361 (match_operand 0 "register_operand")
364 if (GET_CODE (op) == SUBREG)
365 op = SUBREG_REG (op);
368 return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
371 ;; True if OP is a register operand that is (or could be) a GR/FR reg.
372 (define_predicate "grfr_register_operand"
373 (match_operand 0 "register_operand")
376 if (GET_CODE (op) == SUBREG)
377 op = SUBREG_REG (op);
380 return (regno >= FIRST_PSEUDO_REGISTER
381 || GENERAL_REGNO_P (regno)
382 || FR_REGNO_P (regno));
385 ;; True if OP is a nonimmediate operand that is (or could be) a GR reg.
386 (define_predicate "gr_nonimmediate_operand"
387 (match_operand 0 "nonimmediate_operand")
391 if (GET_CODE (op) == MEM)
393 if (GET_CODE (op) == SUBREG)
394 op = SUBREG_REG (op);
397 return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
400 ;; True if OP is a nonimmediate operand that is (or could be) a FR reg.
401 (define_predicate "fr_nonimmediate_operand"
402 (match_operand 0 "nonimmediate_operand")
406 if (GET_CODE (op) == MEM)
408 if (GET_CODE (op) == SUBREG)
409 op = SUBREG_REG (op);
412 return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno));
415 ;; True if OP is a nonimmediate operand that is (or could be) a GR/FR reg.
416 (define_predicate "grfr_nonimmediate_operand"
417 (match_operand 0 "nonimmediate_operand")
421 if (GET_CODE (op) == MEM)
423 if (GET_CODE (op) == SUBREG)
424 op = SUBREG_REG (op);
427 return (regno >= FIRST_PSEUDO_REGISTER
428 || GENERAL_REGNO_P (regno)
429 || FR_REGNO_P (regno));
432 ;; True if OP is a GR register operand, or zero.
433 (define_predicate "gr_reg_or_0_operand"
434 (ior (match_operand 0 "gr_register_operand")
435 (and (match_code "const_int,const_double,const_vector")
436 (match_test "op == CONST0_RTX (GET_MODE (op))"))))
438 ;; True if OP is a GR register operand, or a 5-bit immediate operand.
439 (define_predicate "gr_reg_or_5bit_operand"
440 (ior (match_operand 0 "gr_register_operand")
441 (and (match_code "const_int")
442 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32"))))
444 ;; True if OP is a GR register operand, or a 6-bit immediate operand.
445 (define_predicate "gr_reg_or_6bit_operand"
446 (ior (match_operand 0 "gr_register_operand")
447 (and (match_code "const_int")
448 (match_test "satisfies_constraint_M (op)"))))
450 ;; True if OP is a GR register operand, or an 8-bit immediate operand.
451 (define_predicate "gr_reg_or_8bit_operand"
452 (ior (match_operand 0 "gr_register_operand")
453 (and (match_code "const_int")
454 (match_test "satisfies_constraint_K (op)"))))
456 ;; True if OP is a GR/FR register operand, or an 8-bit immediate operand.
457 (define_predicate "grfr_reg_or_8bit_operand"
458 (ior (match_operand 0 "grfr_register_operand")
459 (and (match_code "const_int")
460 (match_test "satisfies_constraint_K (op)"))))
462 ;; True if OP is a register operand, or an 8-bit adjusted immediate operand.
463 (define_predicate "gr_reg_or_8bit_adjusted_operand"
464 (ior (match_operand 0 "gr_register_operand")
465 (and (match_code "const_int")
466 (match_test "satisfies_constraint_L (op)"))))
468 ;; True if OP is a register operand, or is valid for both an 8-bit
469 ;; immediate and an 8-bit adjusted immediate operand. This is necessary
470 ;; because when we emit a compare, we don't know what the condition will be,
471 ;; so we need the union of the immediates accepted by GT and LT.
472 (define_predicate "gr_reg_or_8bit_and_adjusted_operand"
473 (ior (match_operand 0 "gr_register_operand")
474 (and (match_code "const_int")
475 (match_test "satisfies_constraint_K (op)
476 && satisfies_constraint_L (op)"))))
478 ;; True if OP is a register operand, or a 14-bit immediate operand.
479 (define_predicate "gr_reg_or_14bit_operand"
480 (ior (match_operand 0 "gr_register_operand")
481 (and (match_code "const_int")
482 (match_test "satisfies_constraint_I (op)"))))
484 ;; True if OP is a register operand, or a 22-bit immediate operand.
485 (define_predicate "gr_reg_or_22bit_operand"
486 (ior (match_operand 0 "gr_register_operand")
487 (and (match_code "const_int")
488 (match_test "satisfies_constraint_J (op)"))))
490 ;; True if OP is a 7-bit immediate operand.
491 (define_predicate "dshift_count_operand"
492 (and (match_code "const_int")
493 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 128")))
495 ;; True if OP is a 6-bit immediate operand.
496 (define_predicate "shift_count_operand"
497 (and (match_code "const_int")
498 (match_test "satisfies_constraint_M (op)")))
500 ;; True if OP-1 is a 6-bit immediate operand, used in extr instruction.
501 (define_predicate "extr_len_operand"
502 (and (match_code "const_int")
503 (match_test "satisfies_constraint_M (GEN_INT (INTVAL (op) - 1))")))
505 ;; True if OP is a 5-bit immediate operand.
506 (define_predicate "shift_32bit_count_operand"
507 (and (match_code "const_int")
508 (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32")))
510 ;; True if OP is one of the immediate values 2, 4, 8, or 16.
511 (define_predicate "shladd_operand"
512 (and (match_code "const_int")
513 (match_test "INTVAL (op) == 2 || INTVAL (op) == 4 ||
514 INTVAL (op) == 8 || INTVAL (op) == 16")))
516 ;; True if OP is one of the immediate values 1, 2, 3, or 4.
517 (define_predicate "shladd_log2_operand"
518 (and (match_code "const_int")
519 (match_test "INTVAL (op) >= 1 && INTVAL (op) <= 4")))
521 ;; True if OP is one of the immediate values -16, -8, -4, -1, 1, 4, 8, 16.
522 (define_predicate "fetchadd_operand"
523 (and (match_code "const_int")
524 (match_test "INTVAL (op) == -16 || INTVAL (op) == -8 ||
525 INTVAL (op) == -4 || INTVAL (op) == -1 ||
526 INTVAL (op) == 1 || INTVAL (op) == 4 ||
527 INTVAL (op) == 8 || INTVAL (op) == 16")))
529 ;; True if OP is one of the immediate values 0, 7, 15, 16
530 (define_predicate "pmpyshr_operand"
531 (and (match_code "const_int")
532 (match_test "INTVAL (op) == 0 || INTVAL (op) == 7
533 || INTVAL (op) == 15 || INTVAL (op) == 16")))
535 ;; True if OP is 0..3.
536 (define_predicate "const_int_2bit_operand"
537 (and (match_code "const_int")
538 (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 3")))
540 ;; True if OP is a floating-point constant zero, one, or a register.
541 (define_predicate "fr_reg_or_fp01_operand"
542 (ior (match_operand 0 "fr_register_operand")
543 (and (match_code "const_double")
544 (match_test "satisfies_constraint_G (op)"))))
546 ;; Like fr_reg_or_fp01_operand, but don't allow any SUBREGs.
547 (define_predicate "xfreg_or_fp01_operand"
548 (and (match_operand 0 "fr_reg_or_fp01_operand")
549 (not (match_code "subreg"))))
551 ;; Like fr_reg_or_fp01_operand, but don't allow 0 if flag_signed_zero is set.
552 ;; Using f0 as the second arg to fadd or fsub, or as the third arg to fma or
553 ;; fms can cause a zero result to have the wrong sign.
554 (define_predicate "fr_reg_or_signed_fp01_operand"
555 (ior (match_operand 0 "fr_register_operand")
556 (and (match_code "const_double")
557 (match_test "satisfies_constraint_Z (op)"))))
559 ;; Like fr_reg_or_signed_fp01_operand, but don't allow any SUBREGs.
560 (define_predicate "xfreg_or_signed_fp01_operand"
561 (and (match_operand 0 "fr_reg_or_signed_fp01_operand")
562 (not (match_code "subreg"))))
564 ;; True if OP is a constant zero, or a register.
565 (define_predicate "fr_reg_or_0_operand"
566 (ior (match_operand 0 "fr_register_operand")
567 (and (match_code "const_double,const_vector")
568 (match_test "op == CONST0_RTX (GET_MODE (op))"))))
570 ;; Return 1 if OP is a valid comparison operator for "cbranch" instructions.
571 ;; If we're assuming that FP operations cannot generate user-visible traps,
572 ;; then we can use the FP unordered-signaling instructions to implement the
573 ;; FP unordered-quiet comparison predicates.
574 (define_predicate "ia64_cbranch_operator"
575 (if_then_else (match_test "flag_trapping_math")
576 (ior (match_operand 0 "ordered_comparison_operator")
577 (match_code "ordered,unordered"))
578 (and (match_operand 0 "comparison_operator")
579 (not (match_code "uneq,ltgt")))))
581 ;; True if this is a comparison operator, which accepts a normal 8-bit
582 ;; signed immediate operand.
583 (define_predicate "normal_comparison_operator"
584 (match_code "eq,ne,gt,le,gtu,leu"))
586 ;; True if this is a comparison operator, which accepts an adjusted 8-bit
587 ;; signed immediate operand.
588 (define_predicate "adjusted_comparison_operator"
589 (match_code "lt,ge,ltu,geu"))
591 ;; True if this is a signed inequality operator.
592 (define_predicate "signed_inequality_operator"
593 (match_code "ge,gt,le,lt"))
595 ;; True if this operator is valid for predication.
596 (define_predicate "predicate_operator"
597 (match_code "eq,ne"))
599 ;; True if this operator can be used in a conditional operation.
600 (define_predicate "condop_operator"
601 (match_code "plus,minus,ior,xor,and"))
603 ;; These three are hardware registers that can only be addressed in
604 ;; DImode. It's not strictly necessary to test mode == DImode here,
605 ;; but it makes decent insurance against someone writing a
606 ;; match_operand wrong.
608 ;; True if this is the ar.lc register.
609 (define_predicate "ar_lc_reg_operand"
610 (and (match_code "reg")
611 (match_test "mode == DImode && REGNO (op) == AR_LC_REGNUM")))
613 ;; True if this is the ar.ccv register.
614 (define_predicate "ar_ccv_reg_operand"
615 (and (match_code "reg")
616 (match_test "mode == DImode && REGNO (op) == AR_CCV_REGNUM")))
618 ;; True if this is the ar.pfs register.
619 (define_predicate "ar_pfs_reg_operand"
620 (and (match_code "reg")
621 (match_test "mode == DImode && REGNO (op) == AR_PFS_REGNUM")))
623 ;; True if OP is valid as a base register in a reg + offset address.
624 ;; ??? Should I copy the flag_omit_frame_pointer and cse_not_expected
625 ;; checks from pa.c basereg_operand as well? Seems to be OK without them
627 (define_predicate "basereg_operand"
628 (match_operand 0 "register_operand")
630 return REG_P (op) && REG_POINTER (op);
633 ;; True if this is the right-most vector element; for mux1 @brcst.
634 (define_predicate "mux1_brcst_element"
635 (and (match_code "const_int")
636 (match_test "INTVAL (op) == (TARGET_BIG_ENDIAN ? 7 : 0)")))