gcc/config/cr16/cr16.h

   1 /* Definitions of target machine for GNU compiler, for CR16.
   2    Copyright (C) 2012 Free Software Foundation, Inc.
   3    Contributed by KPIT Cummins Infosystems Limited.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 3, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING3.  If not see
  19    <http://www.gnu.org/licenses/>.  */
  20
  21 #ifndef GCC_CR16_H
  22 #define GCC_CR16_H
  23
  24 #define OBJECT_FORMAT_ELF
  25
  26 /* Controlling the driver.  */
  27
  28 /* The GNU C++ standard library requires that these macros be defined.  */
  29 #undef CPLUSPLUS_CPP_SPEC
  30 #define CPLUSPLUS_CPP_SPEC "-D_GNU_SOURCE %(cpp)"
  31
  32 #undef  STARTFILE_SPEC
  33 #define STARTFILE_SPEC "crt1.o%s crti.o%s crtbegin.o%s crtlibid.o%s"
  34
  35 #undef  ENDFILE_SPEC
  36 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
  37
  38 #undef  MATH_LIBRARY
  39 #define MATH_LIBRARY ""
  40
  41 #undef  LIB_SPEC
  42 #define LIB_SPEC "-( -lc %{msim*:-lsim}%{!msim*:-lnosys} -) \
  43 %{msim*:%{!T*:-Tsim.ld}} \
  44 %{!T*:%{!msim*: %{-Telf32cr16.x}}}"
  45
  46 /* Run-time target specification.  */
  47 #ifndef TARGET_CPU_CPP_BUILTINS
  48 #define TARGET_CPU_CPP_BUILTINS()          \
  49 do                                         \
  50   {                                        \
  51     builtin_define ("__CR__");             \
  52     builtin_define ("__CR16__");           \
  53     builtin_define ("__CR16C__");          \
  54     if (TARGET_CR16CP)                     \
  55       builtin_define ("__CR16CP__");       \
  56     else                                   \
  57       builtin_define ("__CR16CSTD__");     \
  58     if (CR16_TARGET_DATA_NEAR)             \
  59       builtin_define ("__DATA_NEAR__");    \
  60     if (CR16_TARGET_DATA_MEDIUM)           \
  61       builtin_define ("__DATA_MEDIUM__");  \
  62     if (CR16_TARGET_DATA_FAR)              \
  63       builtin_define ("__DATA_FAR__");     \
  64     if (TARGET_INT32)                      \
  65       builtin_define ("__INT32__");        \
  66   }                                        \
  67 while (0)
  68 #endif
  69
  70 /* Force the generation of dwarf .debug_frame sections even if not
  71    compiling -g.  This guarantees that we can unwind the stack.  */
  72 #define DWARF2_FRAME_INFO 1
  73
  74 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
  75
  76 /* Generate .file/.loc directives, so that the assembler generates the
  77    line table.  */
  78 #define DWARF2_ASM_LINE_DEBUG_INFO 1
  79
  80 #define CR16_TARGET_DATA_NEAR   cr16_is_data_model (DM_NEAR)
  81 #define CR16_TARGET_DATA_MEDIUM cr16_is_data_model (DM_DEFAULT)
  82 #define CR16_TARGET_DATA_FAR    cr16_is_data_model (DM_FAR)
  83
  84 /* Storage layout.  */
  85 #define BITS_BIG_ENDIAN     0
  86
  87 #define BYTES_BIG_ENDIAN    0
  88
  89 #define WORDS_BIG_ENDIAN    0
  90
  91 #define UNITS_PER_WORD      2
  92
  93 /* Units per 32-bit (DWORD).  */
  94 #define CR16_UNITS_PER_DWORD 4
  95
  96 #define POINTER_SIZE        32
  97
  98 #define PARM_BOUNDARY       16
  99
 100 #define STACK_BOUNDARY      (MAX (BIGGEST_ALIGNMENT, PARM_BOUNDARY))
 101
 102 #define FUNCTION_BOUNDARY   BIGGEST_ALIGNMENT
 103
 104 /* Biggest alignment on CR16C+ is 32-bit as internal bus is AMBA based
 105    where as CR16C is proprietary internal bus architecture.  */
 106 #define BIGGEST_ALIGNMENT   ((TARGET_CR16CP) ? 32 : 16)
 107
 108 #define MAX_FIXED_MODE_SIZE 64
 109
 110 /* In CR16 arrays of chars are word-aligned, so strcpy () will be faster.  */
 111 #define DATA_ALIGNMENT(TYPE, ALIGN)              \
 112   (((TREE_CODE (TYPE) == ARRAY_TYPE)             \
 113      && (TYPE_MODE (TREE_TYPE (TYPE)) == QImode) \
 114      && ((ALIGN) < BITS_PER_WORD))               \
 115      ? (BITS_PER_WORD) : (ALIGN))
 116
 117 /* In CR16 strings are word-aligne; strcpy from constants will be faster.  */
 118 #define CONSTANT_ALIGNMENT(CONSTANT, ALIGN)                            \
 119   (((TREE_CODE (CONSTANT) == STRING_CST) && ((ALIGN) < BITS_PER_WORD)) \
 120      ? (BITS_PER_WORD) : (ALIGN))
 121
 122 #define STRICT_ALIGNMENT 0
 123
 124 #define PCC_BITFIELD_TYPE_MATTERS 1
 125
 126 /* Layout of source language data types.  */
 127 #define INT_TYPE_SIZE       (TARGET_INT32 ? 32 : 16)
 128
 129 #define SHORT_TYPE_SIZE     16
 130
 131 #define LONG_TYPE_SIZE      32
 132
 133 #define LONG_LONG_TYPE_SIZE 64
 134
 135 #define FLOAT_TYPE_SIZE     32
 136
 137 #define DOUBLE_TYPE_SIZE    64
 138
 139 #define LONG_DOUBLE_TYPE_SIZE 64
 140
 141 #define DEFAULT_SIGNED_CHAR 1
 142
 143 #define SIZE_TYPE           "long unsigned int"
 144
 145 #define PTRDIFF_TYPE        "long int"
 146
 147 #define WCHAR_TYPE          "short unsigned int"
 148
 149 #define WCHAR_TYPE_SIZE     16
 150
 151 /* By default, the C++ compiler will use the lowest bit of the pointer
 152    to function to indicate a pointer-to-member-function points to a
 153    virtual member function.  However, in CR architecture FUNCTION_BOUNDARY
 154    indicates function addresses are always even, but function pointers can be
 155    odd (after right-shifting them when loading them into a register), and the
 156    default doesn't work.  In that case, the lowest bit of the delta
 157    field will be used (the remainder of the field is shifted to the left).  */
 158 #define TARGET_PTRMEMFUNC_VBIT_LOCATION     ptrmemfunc_vbit_in_delta
 159
 160 /* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return
 161    values must be in memory.  */
 162 #define DEFAULT_PCC_STRUCT_RETURN 0
 163
 164 /* Register usage.  */
 165
 166 /* First 32-bit register is R12.  */
 167 #define CR16_FIRST_DWORD_REGISTER   12
 168
 169 #define FIRST_PSEUDO_REGISTER       16
 170
 171 /* 1 for registers that have pervasive standard uses
 172    and are not available for the register allocator.
 173    On the CR16, only the stack pointer (r15) is such.  */
 174 #define FIXED_REGISTERS                               \
 175   {                                                   \
 176   /* r0  r1  r2  r3  r4  r5  r6  r7  r8  r9  r10.  */ \
 177     0,  0,  0,  0,  0,  0,  0,  0,  0,  0,  0,        \
 178   /* r11 r12 r13 ra  sp.  */                          \
 179     0,  0,  0,  0,  1                                 \
 180   }
 181
 182 /* 1 for registers not available across function calls.
 183    These must include the FIXED_REGISTERS and also any
 184    registers that can be used without being saved.
 185    The latter must include the registers where values are returned
 186    and the register where structure-value addresses are passed.
 187
 188    On the CR16, calls clobbers r0-r6 (scratch registers),
 189    ra (the return address) and sp (the stack pointer).  */
 190 #define CALL_USED_REGISTERS                           \
 191   {                                                   \
 192   /* r0  r1  r2  r3  r4  r5  r6  r7  r8  r9  r10.  */ \
 193     1,  1,  1,  1,  1,  1,  1,  0,  0,  0,  0,        \
 194   /* r11 r12 r13 ra  sp.  */                          \
 195     0,  0,  0,  1,  1                                 \
 196   }
 197
 198 /* Returns 1 if the register is longer than word size, 0 otherwise.  */
 199 #define LONG_REG_P(REGNO)                                                    \
 200   (HARD_REGNO_NREGS (REGNO,                                                  \
 201                      GET_MODE_WIDER_MODE (smallest_mode_for_size             \
 202                                          (BITS_PER_WORD, MODE_INT))) == 1)
 203
 204 #define HARD_REGNO_NREGS(REGNO, MODE)                                         \
 205  ((REGNO >= CR16_FIRST_DWORD_REGISTER)                                        \
 206   ? ((GET_MODE_SIZE (MODE) + CR16_UNITS_PER_DWORD - 1) / CR16_UNITS_PER_DWORD)\
 207   : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD       - 1) / UNITS_PER_WORD))
 208
 209 /* Nonzero if it is permissible to store a value of mode @var{mode} in hard
 210    register number @var{regno} (or in several registers starting with that
 211    one).  On the CR16 architecture, all registers can hold all modes,
 212    except that double precision floats (and double ints) must fall on
 213    even-register boundaries.  */
 214 #define HARD_REGNO_MODE_OK(REGNO, MODE) cr16_hard_regno_mode_ok (REGNO, MODE)
 215
 216 #define NOTICE_UPDATE_CC(EXP, INSN) \
 217    notice_update_cc ((EXP))
 218
 219 /* Interrupt functions can only use registers that have already been
 220    saved by the prologue, even if they would normally be call-clobbered
 221    Check if sizes are same and then check if it is possible to rename.  */
 222 #define HARD_REGNO_RENAME_OK(SRC, DEST)                 \
 223   (!cr16_interrupt_function_p () || (df_regs_ever_live_p (DEST)))
 224
 225 /* Exception handling stuff.  */
 226
 227 /*To ensure correct dwarf unwinding.  */
 228 #define LIBGCC2_UNWIND_ATTRIBUTE __attribute__((optimize ("no-gcse","no-dse")))
 229
 230 #define gen_rtx_RA      gen_rtx_REG (Pmode, RETURN_ADDRESS_REGNUM)
 231
 232 /* Use (r8,r7) and (r10,r9) to pass exception handling information.  */
 233 #define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? (N*2 + 7) : INVALID_REGNUM)
 234
 235 #define DWARF2_UNWIND_INFO 1
 236
 237 /* (r5,r4) holds a stack adjustment for returning to a handler.  */
 238 #define EH_RETURN_STACKADJ_RTX          gen_rtx_REG (Pmode, 4)
 239
 240 #define EH_RETURN_HANDLER_RTX \
 241   gen_rtx_MEM (Pmode, plus_constant (Pmode, arg_pointer_rtx, -4))
 242
 243 #define INCOMING_RETURN_ADDR_RTX        gen_rtx_RA
 244
 245 #define DWARF_FRAME_RETURN_COLUMN       \
 246   DWARF_FRAME_REGNUM (RETURN_ADDRESS_REGNUM)
 247
 248 #define INCOMING_FRAME_SP_OFFSET                0
 249 #define FRAME_POINTER_CFA_OFFSET(FNDECL)        0
 250
 251 /* A C expression whose value is RTL representing the value of the return
 252    address for the frame COUNT steps up from the current frame.  */
 253 #define RETURN_ADDR_RTX(COUNT, FRAME)                                   \
 254   (0 == COUNT)  ?  gen_rtx_PLUS (Pmode, gen_rtx_RA, gen_rtx_RA)         \
 255                 :  const0_rtx
 256
 257 #define MODES_TIEABLE_P(MODE1, MODE2)  \
 258   (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
 259
 260 enum reg_class
 261 {
 262   NO_REGS,
 263   SHORT_REGS,
 264   LONG_REGS,
 265   NOSP_REGS,
 266   DOUBLE_BASE_REGS,
 267   GENERAL_REGS,
 268   ALL_REGS,
 269   LIM_REG_CLASSES
 270 };
 271
 272 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 273
 274 #define REG_CLASS_NAMES \
 275   {                     \
 276     "NO_REGS",          \
 277     "SHORT_REGS",       \
 278     "LONG_REGS",        \
 279     "NOSP_REGS",        \
 280     "DOUBLE_BASE_REGS", \
 281     "GENERAL_REGS",     \
 282     "ALL_REGS"          \
 283   }
 284
 285 #define REG_CLASS_CONTENTS                                      \
 286   {                                                             \
 287     {0x00000000}, /* NO_REGS                         */         \
 288     {0x00000FFF}, /* SHORT_REGS         : 0 - 11     */         \
 289     {0x0000F000}, /* LONG_REGS          : 12 - 15    */         \
 290     {0x00007FFF}, /* NOSP_REGS          : 0 - 14     */         \
 291     {0x0000F555}, /* DOUBLE_BASE_REGS   : 2,4,6,8,10 */         \
 292     {0x0000FFFF}, /* GENERAL_REGS       : 0 - 15     */         \
 293     {0x0000FFFF}  /* ALL_REGS           : 0 - 15     */         \
 294   }
 295
 296 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P  hook_bool_mode_true
 297
 298 #define REGNO_REG_CLASS(REGNO)  cr16_regno_reg_class (REGNO)
 299
 300 #define BASE_REG_CLASS      GENERAL_REGS
 301
 302 #define MODE_BASE_REG_CLASS(MODE) \
 303   (GET_MODE_SIZE (MODE) <= 4 ?  (BASE_REG_CLASS) :  (DOUBLE_BASE_REGS))
 304
 305 #define INDEX_REG_CLASS      LONG_REGS
 306
 307 #define CR16_REGNO_OK_FOR_BASE_P(REGNO)                  \
 308   (((REGNO) < FIRST_PSEUDO_REGISTER)                     \
 309      || (reg_renumber && ((unsigned) reg_renumber[REGNO] \
 310                         < FIRST_PSEUDO_REGISTER)))
 311
 312 /* Use even-numbered reg for 64-bit accesses.  */
 313 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE)     \
 314         (CR16_REGNO_OK_FOR_BASE_P(REGNO)  &&      \
 315           ((GET_MODE_SIZE (MODE) > 4  &&          \
 316              (REGNO) < CR16_FIRST_DWORD_REGISTER) \
 317              ? (0 == ((REGNO) & 1))               \
 318              : 1))
 319
 320 /* TODO: For now lets not support index addressing mode.  */
 321 #define REGNO_OK_FOR_INDEX_P(REGNO)        \
 322   (((REGNO >= CR16_FIRST_DWORD_REGISTER)   \
 323      && ((REGNO) < FIRST_PSEUDO_REGISTER)) \
 324    || (reg_renumber                        \
 325        && (((unsigned) reg_renumber[REGNO] >= CR16_FIRST_DWORD_REGISTER)  \
 326             && ((unsigned) reg_renumber[REGNO] < FIRST_PSEUDO_REGISTER))) \
 327   )
 328
 329 #define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS
 330
 331 /* The maximum number of consecutive registers of class CLASS needed to
 332    hold a value of mode MODE.
 333    On the CompactRISC architecture, the size of MODE in words.
 334    The size of MODE in double words for the class LONG_REGS.
 335
 336    The following check assumes if the class is not LONG_REGS, then
 337    all (NO_REGS, SHORT_REGS, NOSP_REGS and GENERAL_REGS) other classes are
 338    short.  We may have to check if this can cause any degradation in
 339    performance.  */
 340 #define CLASS_MAX_NREGS(CLASS, MODE) \
 341   (CLASS == LONG_REGS \
 342    ? (GET_MODE_SIZE (MODE) + CR16_UNITS_PER_DWORD - 1) / CR16_UNITS_PER_DWORD\
 343    : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 344
 345 /* Macros to check the range of integers . These macros were used across
 346    the port, majorly in constraints.md, predicates.md files. */
 347 #define SIGNED_INT_FITS_N_BITS(imm, N)           \
 348   ((((imm) < ((HOST_WIDE_INT) 1 << ((N) - 1)))       \
 349       && ((imm) >= -((HOST_WIDE_INT) 1 << ((N) - 1)))) ? 1 : 0)
 350
 351 #define UNSIGNED_INT_FITS_N_BITS(imm, N) \
 352   (((imm) < ((HOST_WIDE_INT) 1 << (N)) && (imm) >= (HOST_WIDE_INT) 0) ? 1 : 0)
 353
 354 #define IN_RANGE_P(VALUE, LOW, HIGH)                            \
 355   ((((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW))           \
 356    && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH))))
 357
 358 #define IN_RAN(VALUE, LOW, HIGH)                             \
 359   (((((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW))       \
 360    && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH)))) ? 1 : 0)
 361
 362 /* This check is for sbit/cbit instruction.  */
 363 #define OK_FOR_Z(OP) \
 364   ((GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST_INT) \
 365    || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG) \
 366    || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == PLUS \
 367        && GET_CODE (XEXP ((XEXP (OP, 0)), 0)) == REG \
 368        && GET_CODE (XEXP ((XEXP (OP, 0)), 1)) == CONST_INT))
 369
 370 /* Stack layout and calling conventions.  */
 371 #define STACK_GROWS_DOWNWARD
 372
 373 #define STARTING_FRAME_OFFSET   0
 374
 375 #define STACK_POINTER_REGNUM    15
 376
 377 #define FRAME_POINTER_REGNUM    13
 378
 379 #define ARG_POINTER_REGNUM      12
 380
 381 #define STATIC_CHAIN_REGNUM     1
 382
 383 #define RETURN_ADDRESS_REGNUM   14
 384
 385 #define FIRST_PARM_OFFSET(FNDECL) 0
 386
 387 #define ELIMINABLE_REGS                            \
 388   {                                                \
 389     { ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM}, \
 390     { ARG_POINTER_REGNUM,   FRAME_POINTER_REGNUM}, \
 391     { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}  \
 392   }
 393
 394 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)              \
 395   do                                                              \
 396     {                                                             \
 397       (OFFSET) = cr16_initial_elimination_offset ((FROM), (TO));  \
 398     }                                                             \
 399   while (0)
 400
 401 /* Passing function arguments.  */
 402
 403 #define ACCUMULATE_OUTGOING_ARGS 0
 404
 405 #define PUSH_ARGS 1
 406
 407 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
 408
 409 #ifndef CUMULATIVE_ARGS
 410 struct cumulative_args
 411 {
 412   int ints;
 413   int last_parm_in_reg;
 414 };
 415
 416 #define CUMULATIVE_ARGS struct cumulative_args
 417 #endif
 418
 419 /* On the CR16 architecture, Varargs routines should receive their parameters
 420    on the stack.  */
 421
 422 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 423   cr16_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME))
 424
 425 #define FUNCTION_ARG_REGNO_P(REGNO)  cr16_function_arg_regno_p (REGNO)
 426
 427 /* Generating code for profiling - NOT IMPLEMENTED.  */
 428 #undef  FUNCTION_PROFILER
 429 #define FUNCTION_PROFILER(STREAM, LABELNO)      \
 430 {                                               \
 431   sorry ("profiler support for CR16");          \
 432 }
 433
 434 /* Trampolines for nested functions - NOT SUPPORTED.  */
 435 #define TRAMPOLINE_SIZE    16
 436
 437 /* ADDRESSING MODES.  */
 438
 439 #define CONSTANT_ADDRESS_P(X)       \
 440   (GET_CODE (X) == LABEL_REF        \
 441    || GET_CODE (X) == SYMBOL_REF    \
 442    || GET_CODE (X) == CONST         \
 443    || GET_CODE (X) == CONST_INT)
 444
 445 #define MAX_REGS_PER_ADDRESS    2
 446
 447 #define HAVE_POST_INCREMENT     0
 448 #define HAVE_POST_DECREMENT     0
 449 #define HAVE_POST_MODIFY_DISP   0
 450 #define HAVE_POST_MODIFY_REG    0
 451
 452 #ifdef REG_OK_STRICT
 453 #define CR16_REG_OK_FOR_BASE_P(X)       CR16_REGNO_OK_FOR_BASE_P (REGNO (X))
 454 #define REG_MODE_OK_FOR_BASE_P(X, MODE) \
 455   REGNO_MODE_OK_FOR_BASE_P (REGNO(X), MODE)
 456 #define REG_OK_FOR_INDEX_P(X)   REGNO_OK_FOR_INDEX_P (REGNO (X))
 457 #else /* not REG_OK_STRICT.  */
 458 #define CR16_REG_OK_FOR_BASE_P(X)       1
 459 #define REG_MODE_OK_FOR_BASE_P(X, MODE) 1
 460 #define REG_OK_FOR_INDEX_P(X)   1
 461 #endif /* not REG_OK_STRICT.  */
 462
 463 /* Assume best case (branch predicted).  */
 464 #define BRANCH_COST(speed_p, predictable_p)       2
 465
 466 #define SLOW_BYTE_ACCESS  1
 467
 468 /* It is as good or better to call a constant function address than to
 469    call an address kept in a register.  */
 470 #define NO_FUNCTION_CSE
 471
 472 /* Dividing the output into sections.  */
 473
 474 #define TEXT_SECTION_ASM_OP "\t.section\t.text"
 475
 476 #define DATA_SECTION_ASM_OP "\t.section\t.data"
 477
 478 #define BSS_SECTION_ASM_OP  "\t.section\t.bss"
 479
 480 /* Position independent code (PIC).  */
 481 /* NEAR_PIC for -fpic option.  */
 482
 483 #define NEAR_PIC 1
 484
 485 /* FAR_PIC for -fPIC option.  */
 486
 487 #define FAR_PIC  2
 488
 489 #define PIC_OFFSET_TABLE_REGNUM  12
 490
 491 #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
 492
 493 /* Assembler format.  */
 494
 495 /* Character to start a comment.  */
 496 #define ASM_COMMENT_START "#"
 497
 498 #define GLOBAL_ASM_OP "\t.globl\t"
 499
 500 #undef USER_LABEL_PREFIX
 501 #define USER_LABEL_PREFIX "_"
 502
 503 #undef ASM_OUTPUT_LABELREF
 504 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
 505   asm_fprintf (STREAM, "%U%s", (*targetm.strip_name_encoding) (NAME));
 506
 507 #define ASM_OUTPUT_SYMBOL_REF(STREAM, SYMBOL)   \
 508   do                                            \
 509     {                                           \
 510       const char *rn = XSTR (SYMBOL, 0);        \
 511       assemble_name (STREAM, rn);               \
 512       if (SYMBOL_REF_FUNCTION_P (SYMBOL))       \
 513       {                                         \
 514         fprintf ((STREAM), "@c");               \
 515       }                                         \
 516     }                                           \
 517   while (0)
 518
 519 #undef ASM_APP_ON
 520 #define ASM_APP_ON   "#APP\n"
 521
 522 #undef ASM_APP_OFF
 523 #define ASM_APP_OFF  "#NO_APP\n"
 524
 525 /* Switch into a generic section.  */
 526 #define TARGET_ASM_NAMED_SECTION        default_elf_asm_named_section
 527
 528 #undef INIT_SECTION_ASM_OP
 529 #define INIT_SECTION_ASM_OP             "\t.section\t.init"
 530
 531 #undef FINI_SECTION_ASM_OP
 532 #define FINI_SECTION_ASM_OP             "\t.section\t.fini"
 533
 534 /* Instruction output.  */
 535
 536 #define REGISTER_NAMES                                     \
 537   {                                                        \
 538     "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7", \
 539     "r8",  "r9",  "r10", "r11", "r12", "r13", "ra",  "sp"  \
 540   }
 541
 542 /* Output of dispatch tables.  */
 543
 544 /* Revisit. No PC relative case as label expressions are not
 545    properly supported in binutils else we could have done this:
 546    #define CASE_VECTOR_PC_RELATIVE (optimize_size ? 1 : 0).  */
 547 #define CASE_VECTOR_PC_RELATIVE 0
 548
 549 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)    \
 550   ((GET_MODE (BODY) == QImode)                              \
 551    ? fprintf ((FILE), "\t.byte (.L%d-.L%d) >> 1\n",         \
 552               VALUE, REL)                                   \
 553    : fprintf ((FILE), "\t.word (.L%d-.L%d) >> 1\n",         \
 554               VALUE, REL))
 555
 556 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
 557   asm_fprintf ((STREAM), "\t.long\t.L%d@c\n", (VALUE))
 558
 559 /* Alignment in assembler file.  */
 560
 561 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
 562   asm_fprintf ((STREAM), "\t.align\t%d\n", 1 << (POWER))
 563
 564 /* Miscellaneous parameters.  */
 565
 566 #define CASE_VECTOR_MODE  Pmode
 567
 568 #define MOVE_MAX 4
 569
 570 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 571
 572 #define STORE_FLAG_VALUE  1
 573
 574 #define Pmode SImode
 575
 576 #define FUNCTION_MODE QImode
 577
 578 /* Define this boolean macro(s) to indicate whether or not your architecture
 579    has (un)conditional branches that can span all of memory.  It is used in
 580    conjunction with an optimization that partitions hot and cold basic blocks
 581    into separate sections of the executable.
 582    CR16 contains branch instructions that span whole address space.  */
 583 #define HAS_LONG_COND_BRANCH    1
 584 #define HAS_LONG_UNCOND_BRANCH  1
 585
 586 #endif /* End of GCC_CR16_H.  */