1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
74 #include "tree-pass.h"
84 #ifdef XCOFF_DEBUGGING_INFO
85 #include "xcoffout.h" /* Needed for external data
86 declarations for e.g. AIX 4.x. */
89 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
90 #include "dwarf2out.h"
93 #ifdef DBX_DEBUGGING_INFO
97 #ifdef SDB_DEBUGGING_INFO
101 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
102 null default for it to save conditionalization later. */
103 #ifndef CC_STATUS_INIT
104 #define CC_STATUS_INIT
107 /* How to start an assembler comment. */
108 #ifndef ASM_COMMENT_START
109 #define ASM_COMMENT_START ";#"
112 /* Is the given character a logical line separator for the assembler? */
113 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
114 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
117 #ifndef JUMP_TABLES_IN_TEXT_SECTION
118 #define JUMP_TABLES_IN_TEXT_SECTION 0
121 /* Bitflags used by final_scan_insn. */
124 #define SEEN_EMITTED 4
126 /* Last insn processed by final_scan_insn. */
127 static rtx debug_insn
;
128 rtx current_output_insn
;
130 /* Line number of last NOTE. */
131 static int last_linenum
;
133 /* Highest line number in current block. */
134 static int high_block_linenum
;
136 /* Likewise for function. */
137 static int high_function_linenum
;
139 /* Filename of last NOTE. */
140 static const char *last_filename
;
142 /* Override filename and line number. */
143 static const char *override_filename
;
144 static int override_linenum
;
146 /* Whether to force emission of a line note before the next insn. */
147 static bool force_source_line
= false;
149 extern const int length_unit_log
; /* This is defined in insn-attrtab.c. */
151 /* Nonzero while outputting an `asm' with operands.
152 This means that inconsistencies are the user's fault, so don't die.
153 The precise value is the insn being output, to pass to error_for_asm. */
154 rtx this_is_asm_operands
;
156 /* Number of operands of this insn, for an `asm' with operands. */
157 static unsigned int insn_noperands
;
159 /* Compare optimization flag. */
161 static rtx last_ignored_compare
= 0;
163 /* Assign a unique number to each insn that is output.
164 This can be used to generate unique local labels. */
166 static int insn_counter
= 0;
169 /* This variable contains machine-dependent flags (defined in tm.h)
170 set and examined by output routines
171 that describe how to interpret the condition codes properly. */
175 /* During output of an insn, this contains a copy of cc_status
176 from before the insn. */
178 CC_STATUS cc_prev_status
;
181 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
183 static int block_depth
;
185 /* Nonzero if have enabled APP processing of our assembler output. */
189 /* If we are outputting an insn sequence, this contains the sequence rtx.
194 #ifdef ASSEMBLER_DIALECT
196 /* Number of the assembler dialect to use, starting at 0. */
197 static int dialect_number
;
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate
;
205 #ifdef HAVE_ATTR_length
206 static int asm_insn_count (rtx
);
208 static void profile_function (FILE *);
209 static void profile_after_prologue (FILE *);
210 static bool notice_source_line (rtx
);
211 static rtx
walk_alter_subreg (rtx
*, bool *);
212 static void output_asm_name (void);
213 static void output_alternate_entry_point (FILE *, rtx
);
214 static tree
get_mem_expr_from_op (rtx
, int *);
215 static void output_asm_operand_names (rtx
*, int *, int);
216 static void output_operand (rtx
, int);
217 #ifdef LEAF_REGISTERS
218 static void leaf_renumber_regs (rtx
);
221 static int alter_cond (rtx
);
223 #ifndef ADDR_VEC_ALIGN
224 static int final_addr_vec_align (rtx
);
226 #ifdef HAVE_ATTR_length
227 static int align_fuzz (rtx
, rtx
, int, unsigned);
230 /* Initialize data in final at the beginning of a compilation. */
233 init_final (const char *filename ATTRIBUTE_UNUSED
)
238 #ifdef ASSEMBLER_DIALECT
239 dialect_number
= ASSEMBLER_DIALECT
;
243 /* Default target function prologue and epilogue assembler output.
245 If not overridden for epilogue code, then the function body itself
246 contains return instructions wherever needed. */
248 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
249 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
253 /* Default target hook that outputs nothing to a stream. */
255 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
259 /* Enable APP processing of subsequent output.
260 Used before the output from an `asm' statement. */
267 fputs (ASM_APP_ON
, asm_out_file
);
272 /* Disable APP processing of subsequent output.
273 Called from varasm.c before most kinds of output. */
280 fputs (ASM_APP_OFF
, asm_out_file
);
285 /* Return the number of slots filled in the current
286 delayed branch sequence (we don't count the insn needing the
287 delay slot). Zero if not in a delayed branch sequence. */
291 dbr_sequence_length (void)
293 if (final_sequence
!= 0)
294 return XVECLEN (final_sequence
, 0) - 1;
300 /* The next two pages contain routines used to compute the length of an insn
301 and to shorten branches. */
303 /* Arrays for insn lengths, and addresses. The latter is referenced by
304 `insn_current_length'. */
306 static int *insn_lengths
;
308 VEC(int,heap
) *insn_addresses_
;
310 /* Max uid for which the above arrays are valid. */
311 static int insn_lengths_max_uid
;
313 /* Address of insn being processed. Used by `insn_current_length'. */
314 int insn_current_address
;
316 /* Address of insn being processed in previous iteration. */
317 int insn_last_address
;
319 /* known invariant alignment of insn being processed. */
320 int insn_current_align
;
322 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
323 gives the next following alignment insn that increases the known
324 alignment, or NULL_RTX if there is no such insn.
325 For any alignment obtained this way, we can again index uid_align with
326 its uid to obtain the next following align that in turn increases the
327 alignment, till we reach NULL_RTX; the sequence obtained this way
328 for each insn we'll call the alignment chain of this insn in the following
331 struct label_alignment
337 static rtx
*uid_align
;
338 static int *uid_shuid
;
339 static struct label_alignment
*label_align
;
341 /* Indicate that branch shortening hasn't yet been done. */
344 init_insn_lengths (void)
355 insn_lengths_max_uid
= 0;
357 #ifdef HAVE_ATTR_length
358 INSN_ADDRESSES_FREE ();
367 /* Obtain the current length of an insn. If branch shortening has been done,
368 get its actual length. Otherwise, use FALLBACK_FN to calculate the
371 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED
,
372 int (*fallback_fn
) (rtx
) ATTRIBUTE_UNUSED
)
374 #ifdef HAVE_ATTR_length
379 if (insn_lengths_max_uid
> INSN_UID (insn
))
380 return insn_lengths
[INSN_UID (insn
)];
382 switch (GET_CODE (insn
))
390 length
= fallback_fn (insn
);
394 body
= PATTERN (insn
);
395 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
397 /* Alignment is machine-dependent and should be handled by
401 length
= fallback_fn (insn
);
405 body
= PATTERN (insn
);
406 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
409 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
410 length
= asm_insn_count (body
) * fallback_fn (insn
);
411 else if (GET_CODE (body
) == SEQUENCE
)
412 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
413 length
+= get_attr_length_1 (XVECEXP (body
, 0, i
), fallback_fn
);
415 length
= fallback_fn (insn
);
422 #ifdef ADJUST_INSN_LENGTH
423 ADJUST_INSN_LENGTH (insn
, length
);
426 #else /* not HAVE_ATTR_length */
428 #define insn_default_length 0
429 #define insn_min_length 0
430 #endif /* not HAVE_ATTR_length */
433 /* Obtain the current length of an insn. If branch shortening has been done,
434 get its actual length. Otherwise, get its maximum length. */
436 get_attr_length (rtx insn
)
438 return get_attr_length_1 (insn
, insn_default_length
);
441 /* Obtain the current length of an insn. If branch shortening has been done,
442 get its actual length. Otherwise, get its minimum length. */
444 get_attr_min_length (rtx insn
)
446 return get_attr_length_1 (insn
, insn_min_length
);
449 /* Code to handle alignment inside shorten_branches. */
451 /* Here is an explanation how the algorithm in align_fuzz can give
454 Call a sequence of instructions beginning with alignment point X
455 and continuing until the next alignment point `block X'. When `X'
456 is used in an expression, it means the alignment value of the
459 Call the distance between the start of the first insn of block X, and
460 the end of the last insn of block X `IX', for the `inner size of X'.
461 This is clearly the sum of the instruction lengths.
463 Likewise with the next alignment-delimited block following X, which we
466 Call the distance between the start of the first insn of block X, and
467 the start of the first insn of block Y `OX', for the `outer size of X'.
469 The estimated padding is then OX - IX.
471 OX can be safely estimated as
476 OX = round_up(IX, X) + Y - X
478 Clearly est(IX) >= real(IX), because that only depends on the
479 instruction lengths, and those being overestimated is a given.
481 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
482 we needn't worry about that when thinking about OX.
484 When X >= Y, the alignment provided by Y adds no uncertainty factor
485 for branch ranges starting before X, so we can just round what we have.
486 But when X < Y, we don't know anything about the, so to speak,
487 `middle bits', so we have to assume the worst when aligning up from an
488 address mod X to one mod Y, which is Y - X. */
491 #define LABEL_ALIGN(LABEL) align_labels_log
494 #ifndef LABEL_ALIGN_MAX_SKIP
495 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
499 #define LOOP_ALIGN(LABEL) align_loops_log
502 #ifndef LOOP_ALIGN_MAX_SKIP
503 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
506 #ifndef LABEL_ALIGN_AFTER_BARRIER
507 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
510 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
511 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
515 #define JUMP_ALIGN(LABEL) align_jumps_log
518 #ifndef JUMP_ALIGN_MAX_SKIP
519 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
522 #ifndef ADDR_VEC_ALIGN
524 final_addr_vec_align (rtx addr_vec
)
526 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
528 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
529 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
530 return exact_log2 (align
);
534 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
537 #ifndef INSN_LENGTH_ALIGNMENT
538 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
541 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
543 static int min_labelno
, max_labelno
;
545 #define LABEL_TO_ALIGNMENT(LABEL) \
546 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
548 #define LABEL_TO_MAX_SKIP(LABEL) \
549 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
551 /* For the benefit of port specific code do this also as a function. */
554 label_to_alignment (rtx label
)
556 return LABEL_TO_ALIGNMENT (label
);
559 #ifdef HAVE_ATTR_length
560 /* The differences in addresses
561 between a branch and its target might grow or shrink depending on
562 the alignment the start insn of the range (the branch for a forward
563 branch or the label for a backward branch) starts out on; if these
564 differences are used naively, they can even oscillate infinitely.
565 We therefore want to compute a 'worst case' address difference that
566 is independent of the alignment the start insn of the range end
567 up on, and that is at least as large as the actual difference.
568 The function align_fuzz calculates the amount we have to add to the
569 naively computed difference, by traversing the part of the alignment
570 chain of the start insn of the range that is in front of the end insn
571 of the range, and considering for each alignment the maximum amount
572 that it might contribute to a size increase.
574 For casesi tables, we also want to know worst case minimum amounts of
575 address difference, in case a machine description wants to introduce
576 some common offset that is added to all offsets in a table.
577 For this purpose, align_fuzz with a growth argument of 0 computes the
578 appropriate adjustment. */
580 /* Compute the maximum delta by which the difference of the addresses of
581 START and END might grow / shrink due to a different address for start
582 which changes the size of alignment insns between START and END.
583 KNOWN_ALIGN_LOG is the alignment known for START.
584 GROWTH should be ~0 if the objective is to compute potential code size
585 increase, and 0 if the objective is to compute potential shrink.
586 The return value is undefined for any other value of GROWTH. */
589 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
591 int uid
= INSN_UID (start
);
593 int known_align
= 1 << known_align_log
;
594 int end_shuid
= INSN_SHUID (end
);
597 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
599 int align_addr
, new_align
;
601 uid
= INSN_UID (align_label
);
602 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
603 if (uid_shuid
[uid
] > end_shuid
)
605 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
606 new_align
= 1 << known_align_log
;
607 if (new_align
< known_align
)
609 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
610 known_align
= new_align
;
615 /* Compute a worst-case reference address of a branch so that it
616 can be safely used in the presence of aligned labels. Since the
617 size of the branch itself is unknown, the size of the branch is
618 not included in the range. I.e. for a forward branch, the reference
619 address is the end address of the branch as known from the previous
620 branch shortening pass, minus a value to account for possible size
621 increase due to alignment. For a backward branch, it is the start
622 address of the branch as known from the current pass, plus a value
623 to account for possible size increase due to alignment.
624 NB.: Therefore, the maximum offset allowed for backward branches needs
625 to exclude the branch size. */
628 insn_current_reference_address (rtx branch
)
633 if (! INSN_ADDRESSES_SET_P ())
636 seq
= NEXT_INSN (PREV_INSN (branch
));
637 seq_uid
= INSN_UID (seq
);
638 if (!JUMP_P (branch
))
639 /* This can happen for example on the PA; the objective is to know the
640 offset to address something in front of the start of the function.
641 Thus, we can treat it like a backward branch.
642 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
643 any alignment we'd encounter, so we skip the call to align_fuzz. */
644 return insn_current_address
;
645 dest
= JUMP_LABEL (branch
);
647 /* BRANCH has no proper alignment chain set, so use SEQ.
648 BRANCH also has no INSN_SHUID. */
649 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
651 /* Forward branch. */
652 return (insn_last_address
+ insn_lengths
[seq_uid
]
653 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
657 /* Backward branch. */
658 return (insn_current_address
659 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
662 #endif /* HAVE_ATTR_length */
664 /* Compute branch alignments based on frequency information in the
668 compute_alignments (void)
670 int log
, max_skip
, max_log
;
673 int freq_threshold
= 0;
681 max_labelno
= max_label_num ();
682 min_labelno
= get_first_label_num ();
683 label_align
= XCNEWVEC (struct label_alignment
, max_labelno
- min_labelno
+ 1);
685 /* If not optimizing or optimizing for size, don't assign any alignments. */
686 if (! optimize
|| optimize_size
)
691 dump_flow_info (dump_file
, TDF_DETAILS
);
692 flow_loops_dump (dump_file
, NULL
, 1);
693 loop_optimizer_init (AVOID_CFG_MODIFICATIONS
);
696 if (bb
->frequency
> freq_max
)
697 freq_max
= bb
->frequency
;
698 freq_threshold
= freq_max
/ PARAM_VALUE (PARAM_ALIGN_THRESHOLD
);
701 fprintf(dump_file
, "freq_max: %i\n",freq_max
);
704 rtx label
= BB_HEAD (bb
);
705 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
710 || probably_never_executed_bb_p (bb
))
713 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
714 bb
->index
, bb
->frequency
, bb
->loop_father
->num
, bb
->loop_depth
);
717 max_log
= LABEL_ALIGN (label
);
718 max_skip
= LABEL_ALIGN_MAX_SKIP
;
720 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
722 if (e
->flags
& EDGE_FALLTHRU
)
723 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
725 branch_frequency
+= EDGE_FREQUENCY (e
);
729 fprintf(dump_file
, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
730 bb
->index
, bb
->frequency
, bb
->loop_father
->num
,
732 fallthru_frequency
, branch_frequency
);
733 if (!bb
->loop_father
->inner
&& bb
->loop_father
->num
)
734 fprintf (dump_file
, " inner_loop");
735 if (bb
->loop_father
->header
== bb
)
736 fprintf (dump_file
, " loop_header");
737 fprintf (dump_file
, "\n");
740 /* There are two purposes to align block with no fallthru incoming edge:
741 1) to avoid fetch stalls when branch destination is near cache boundary
742 2) to improve cache efficiency in case the previous block is not executed
743 (so it does not need to be in the cache).
745 We to catch first case, we align frequently executed blocks.
746 To catch the second, we align blocks that are executed more frequently
747 than the predecessor and the predecessor is likely to not be executed
748 when function is called. */
751 && (branch_frequency
> freq_threshold
752 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
753 && (bb
->prev_bb
->frequency
754 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
756 log
= JUMP_ALIGN (label
);
758 fprintf(dump_file
, " jump alignment added.\n");
762 max_skip
= JUMP_ALIGN_MAX_SKIP
;
765 /* In case block is frequent and reached mostly by non-fallthru edge,
766 align it. It is most likely a first block of loop. */
768 && maybe_hot_bb_p (bb
)
769 && branch_frequency
+ fallthru_frequency
> freq_threshold
771 > fallthru_frequency
* PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS
)))
773 log
= LOOP_ALIGN (label
);
775 fprintf(dump_file
, " internal loop alignment added.\n");
779 max_skip
= LOOP_ALIGN_MAX_SKIP
;
782 LABEL_TO_ALIGNMENT (label
) = max_log
;
783 LABEL_TO_MAX_SKIP (label
) = max_skip
;
787 loop_optimizer_finalize ();
791 struct rtl_opt_pass pass_compute_alignments
=
795 "alignments", /* name */
797 compute_alignments
, /* execute */
800 0, /* static_pass_number */
802 0, /* properties_required */
803 0, /* properties_provided */
804 0, /* properties_destroyed */
805 0, /* todo_flags_start */
806 TODO_dump_func
| TODO_verify_rtl_sharing
807 | TODO_ggc_collect
/* todo_flags_finish */
812 /* Make a pass over all insns and compute their actual lengths by shortening
813 any branches of variable length if possible. */
815 /* shorten_branches might be called multiple times: for example, the SH
816 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
817 In order to do this, it needs proper length information, which it obtains
818 by calling shorten_branches. This cannot be collapsed with
819 shorten_branches itself into a single pass unless we also want to integrate
820 reorg.c, since the branch splitting exposes new instructions with delay
824 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
831 #ifdef HAVE_ATTR_length
832 #define MAX_CODE_ALIGN 16
834 int something_changed
= 1;
835 char *varying_length
;
838 rtx align_tab
[MAX_CODE_ALIGN
];
842 /* Compute maximum UID and allocate label_align / uid_shuid. */
843 max_uid
= get_max_uid ();
845 /* Free uid_shuid before reallocating it. */
848 uid_shuid
= XNEWVEC (int, max_uid
);
850 if (max_labelno
!= max_label_num ())
852 int old
= max_labelno
;
856 max_labelno
= max_label_num ();
858 n_labels
= max_labelno
- min_labelno
+ 1;
859 n_old_labels
= old
- min_labelno
+ 1;
861 label_align
= XRESIZEVEC (struct label_alignment
, label_align
, n_labels
);
863 /* Range of labels grows monotonically in the function. Failing here
864 means that the initialization of array got lost. */
865 gcc_assert (n_old_labels
<= n_labels
);
867 memset (label_align
+ n_old_labels
, 0,
868 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
871 /* Initialize label_align and set up uid_shuid to be strictly
872 monotonically rising with insn order. */
873 /* We use max_log here to keep track of the maximum alignment we want to
874 impose on the next CODE_LABEL (or the current one if we are processing
875 the CODE_LABEL itself). */
880 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
884 INSN_SHUID (insn
) = i
++;
892 /* Merge in alignments computed by compute_alignments. */
893 log
= LABEL_TO_ALIGNMENT (insn
);
897 max_skip
= LABEL_TO_MAX_SKIP (insn
);
900 log
= LABEL_ALIGN (insn
);
904 max_skip
= LABEL_ALIGN_MAX_SKIP
;
906 next
= next_nonnote_insn (insn
);
907 /* ADDR_VECs only take room if read-only data goes into the text
909 if (JUMP_TABLES_IN_TEXT_SECTION
910 || readonly_data_section
== text_section
)
911 if (next
&& JUMP_P (next
))
913 rtx nextbody
= PATTERN (next
);
914 if (GET_CODE (nextbody
) == ADDR_VEC
915 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
917 log
= ADDR_VEC_ALIGN (next
);
921 max_skip
= LABEL_ALIGN_MAX_SKIP
;
925 LABEL_TO_ALIGNMENT (insn
) = max_log
;
926 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
930 else if (BARRIER_P (insn
))
934 for (label
= insn
; label
&& ! INSN_P (label
);
935 label
= NEXT_INSN (label
))
938 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
942 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
948 #ifdef HAVE_ATTR_length
950 /* Allocate the rest of the arrays. */
951 insn_lengths
= XNEWVEC (int, max_uid
);
952 insn_lengths_max_uid
= max_uid
;
953 /* Syntax errors can lead to labels being outside of the main insn stream.
954 Initialize insn_addresses, so that we get reproducible results. */
955 INSN_ADDRESSES_ALLOC (max_uid
);
957 varying_length
= XCNEWVEC (char, max_uid
);
959 /* Initialize uid_align. We scan instructions
960 from end to start, and keep in align_tab[n] the last seen insn
961 that does an alignment of at least n+1, i.e. the successor
962 in the alignment chain for an insn that does / has a known
964 uid_align
= XCNEWVEC (rtx
, max_uid
);
966 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
967 align_tab
[i
] = NULL_RTX
;
968 seq
= get_last_insn ();
969 for (; seq
; seq
= PREV_INSN (seq
))
971 int uid
= INSN_UID (seq
);
973 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
974 uid_align
[uid
] = align_tab
[0];
977 /* Found an alignment label. */
978 uid_align
[uid
] = align_tab
[log
];
979 for (i
= log
- 1; i
>= 0; i
--)
983 #ifdef CASE_VECTOR_SHORTEN_MODE
986 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
989 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
990 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
993 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
995 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
996 int len
, i
, min
, max
, insn_shuid
;
998 addr_diff_vec_flags flags
;
1001 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
1003 pat
= PATTERN (insn
);
1004 len
= XVECLEN (pat
, 1);
1005 gcc_assert (len
> 0);
1006 min_align
= MAX_CODE_ALIGN
;
1007 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
1009 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
1010 int shuid
= INSN_SHUID (lab
);
1021 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
1022 min_align
= LABEL_TO_ALIGNMENT (lab
);
1024 XEXP (pat
, 2) = gen_rtx_LABEL_REF (Pmode
, min_lab
);
1025 XEXP (pat
, 3) = gen_rtx_LABEL_REF (Pmode
, max_lab
);
1026 insn_shuid
= INSN_SHUID (insn
);
1027 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
1028 memset (&flags
, 0, sizeof (flags
));
1029 flags
.min_align
= min_align
;
1030 flags
.base_after_vec
= rel
> insn_shuid
;
1031 flags
.min_after_vec
= min
> insn_shuid
;
1032 flags
.max_after_vec
= max
> insn_shuid
;
1033 flags
.min_after_base
= min
> rel
;
1034 flags
.max_after_base
= max
> rel
;
1035 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
1038 #endif /* CASE_VECTOR_SHORTEN_MODE */
1040 /* Compute initial lengths, addresses, and varying flags for each insn. */
1041 for (insn_current_address
= 0, insn
= first
;
1043 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
1045 uid
= INSN_UID (insn
);
1047 insn_lengths
[uid
] = 0;
1051 int log
= LABEL_TO_ALIGNMENT (insn
);
1054 int align
= 1 << log
;
1055 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1056 insn_lengths
[uid
] = new_address
- insn_current_address
;
1060 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
1062 if (NOTE_P (insn
) || BARRIER_P (insn
)
1065 if (INSN_DELETED_P (insn
))
1068 body
= PATTERN (insn
);
1069 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1071 /* This only takes room if read-only data goes into the text
1073 if (JUMP_TABLES_IN_TEXT_SECTION
1074 || readonly_data_section
== text_section
)
1075 insn_lengths
[uid
] = (XVECLEN (body
,
1076 GET_CODE (body
) == ADDR_DIFF_VEC
)
1077 * GET_MODE_SIZE (GET_MODE (body
)));
1078 /* Alignment is handled by ADDR_VEC_ALIGN. */
1080 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1081 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1082 else if (GET_CODE (body
) == SEQUENCE
)
1085 int const_delay_slots
;
1087 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1089 const_delay_slots
= 0;
1091 /* Inside a delay slot sequence, we do not do any branch shortening
1092 if the shortening could change the number of delay slots
1094 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1096 rtx inner_insn
= XVECEXP (body
, 0, i
);
1097 int inner_uid
= INSN_UID (inner_insn
);
1100 if (GET_CODE (body
) == ASM_INPUT
1101 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1102 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1103 * insn_default_length (inner_insn
));
1105 inner_length
= insn_default_length (inner_insn
);
1107 insn_lengths
[inner_uid
] = inner_length
;
1108 if (const_delay_slots
)
1110 if ((varying_length
[inner_uid
]
1111 = insn_variable_length_p (inner_insn
)) != 0)
1112 varying_length
[uid
] = 1;
1113 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1114 + insn_lengths
[uid
]);
1117 varying_length
[inner_uid
] = 0;
1118 insn_lengths
[uid
] += inner_length
;
1121 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1123 insn_lengths
[uid
] = insn_default_length (insn
);
1124 varying_length
[uid
] = insn_variable_length_p (insn
);
1127 /* If needed, do any adjustment. */
1128 #ifdef ADJUST_INSN_LENGTH
1129 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1130 if (insn_lengths
[uid
] < 0)
1131 fatal_insn ("negative insn length", insn
);
1135 /* Now loop over all the insns finding varying length insns. For each,
1136 get the current insn length. If it has changed, reflect the change.
1137 When nothing changes for a full pass, we are done. */
1139 while (something_changed
)
1141 something_changed
= 0;
1142 insn_current_align
= MAX_CODE_ALIGN
- 1;
1143 for (insn_current_address
= 0, insn
= first
;
1145 insn
= NEXT_INSN (insn
))
1148 #ifdef ADJUST_INSN_LENGTH
1153 uid
= INSN_UID (insn
);
1157 int log
= LABEL_TO_ALIGNMENT (insn
);
1158 if (log
> insn_current_align
)
1160 int align
= 1 << log
;
1161 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1162 insn_lengths
[uid
] = new_address
- insn_current_address
;
1163 insn_current_align
= log
;
1164 insn_current_address
= new_address
;
1167 insn_lengths
[uid
] = 0;
1168 INSN_ADDRESSES (uid
) = insn_current_address
;
1172 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1173 if (length_align
< insn_current_align
)
1174 insn_current_align
= length_align
;
1176 insn_last_address
= INSN_ADDRESSES (uid
);
1177 INSN_ADDRESSES (uid
) = insn_current_address
;
1179 #ifdef CASE_VECTOR_SHORTEN_MODE
1180 if (optimize
&& JUMP_P (insn
)
1181 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1183 rtx body
= PATTERN (insn
);
1184 int old_length
= insn_lengths
[uid
];
1185 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1186 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1187 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1188 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1189 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1190 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1193 addr_diff_vec_flags flags
;
1195 /* Avoid automatic aggregate initialization. */
1196 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1198 /* Try to find a known alignment for rel_lab. */
1199 for (prev
= rel_lab
;
1201 && ! insn_lengths
[INSN_UID (prev
)]
1202 && ! (varying_length
[INSN_UID (prev
)] & 1);
1203 prev
= PREV_INSN (prev
))
1204 if (varying_length
[INSN_UID (prev
)] & 2)
1206 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1210 /* See the comment on addr_diff_vec_flags in rtl.h for the
1211 meaning of the flags values. base: REL_LAB vec: INSN */
1212 /* Anything after INSN has still addresses from the last
1213 pass; adjust these so that they reflect our current
1214 estimate for this pass. */
1215 if (flags
.base_after_vec
)
1216 rel_addr
+= insn_current_address
- insn_last_address
;
1217 if (flags
.min_after_vec
)
1218 min_addr
+= insn_current_address
- insn_last_address
;
1219 if (flags
.max_after_vec
)
1220 max_addr
+= insn_current_address
- insn_last_address
;
1221 /* We want to know the worst case, i.e. lowest possible value
1222 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1223 its offset is positive, and we have to be wary of code shrink;
1224 otherwise, it is negative, and we have to be vary of code
1226 if (flags
.min_after_base
)
1228 /* If INSN is between REL_LAB and MIN_LAB, the size
1229 changes we are about to make can change the alignment
1230 within the observed offset, therefore we have to break
1231 it up into two parts that are independent. */
1232 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1234 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1235 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1238 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1242 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1244 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1245 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1248 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1250 /* Likewise, determine the highest lowest possible value
1251 for the offset of MAX_LAB. */
1252 if (flags
.max_after_base
)
1254 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1256 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1257 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1260 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1264 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1266 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1267 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1270 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1272 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1273 max_addr
- rel_addr
,
1275 if (JUMP_TABLES_IN_TEXT_SECTION
1276 || readonly_data_section
== text_section
)
1279 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1280 insn_current_address
+= insn_lengths
[uid
];
1281 if (insn_lengths
[uid
] != old_length
)
1282 something_changed
= 1;
1287 #endif /* CASE_VECTOR_SHORTEN_MODE */
1289 if (! (varying_length
[uid
]))
1291 if (NONJUMP_INSN_P (insn
)
1292 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1296 body
= PATTERN (insn
);
1297 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1299 rtx inner_insn
= XVECEXP (body
, 0, i
);
1300 int inner_uid
= INSN_UID (inner_insn
);
1302 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1304 insn_current_address
+= insn_lengths
[inner_uid
];
1308 insn_current_address
+= insn_lengths
[uid
];
1313 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1317 body
= PATTERN (insn
);
1319 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1321 rtx inner_insn
= XVECEXP (body
, 0, i
);
1322 int inner_uid
= INSN_UID (inner_insn
);
1325 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1327 /* insn_current_length returns 0 for insns with a
1328 non-varying length. */
1329 if (! varying_length
[inner_uid
])
1330 inner_length
= insn_lengths
[inner_uid
];
1332 inner_length
= insn_current_length (inner_insn
);
1334 if (inner_length
!= insn_lengths
[inner_uid
])
1336 insn_lengths
[inner_uid
] = inner_length
;
1337 something_changed
= 1;
1339 insn_current_address
+= insn_lengths
[inner_uid
];
1340 new_length
+= inner_length
;
1345 new_length
= insn_current_length (insn
);
1346 insn_current_address
+= new_length
;
1349 #ifdef ADJUST_INSN_LENGTH
1350 /* If needed, do any adjustment. */
1351 tmp_length
= new_length
;
1352 ADJUST_INSN_LENGTH (insn
, new_length
);
1353 insn_current_address
+= (new_length
- tmp_length
);
1356 if (new_length
!= insn_lengths
[uid
])
1358 insn_lengths
[uid
] = new_length
;
1359 something_changed
= 1;
1362 /* For a non-optimizing compile, do only a single pass. */
1367 free (varying_length
);
1369 #endif /* HAVE_ATTR_length */
1372 #ifdef HAVE_ATTR_length
1373 /* Given the body of an INSN known to be generated by an ASM statement, return
1374 the number of machine instructions likely to be generated for this insn.
1375 This is used to compute its length. */
1378 asm_insn_count (rtx body
)
1383 if (GET_CODE (body
) == ASM_INPUT
)
1384 templ
= XSTR (body
, 0);
1386 templ
= decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
, NULL
);
1391 for (; *templ
; templ
++)
1392 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ
, templ
)
1400 /* ??? This is probably the wrong place for these. */
1401 /* Structure recording the mapping from source file and directory
1402 names at compile time to those to be embedded in debug
1404 typedef struct debug_prefix_map
1406 const char *old_prefix
;
1407 const char *new_prefix
;
1410 struct debug_prefix_map
*next
;
1413 /* Linked list of such structures. */
1414 debug_prefix_map
*debug_prefix_maps
;
1417 /* Record a debug file prefix mapping. ARG is the argument to
1418 -fdebug-prefix-map and must be of the form OLD=NEW. */
1421 add_debug_prefix_map (const char *arg
)
1423 debug_prefix_map
*map
;
1426 p
= strchr (arg
, '=');
1429 error ("invalid argument %qs to -fdebug-prefix-map", arg
);
1432 map
= XNEW (debug_prefix_map
);
1433 map
->old_prefix
= ggc_alloc_string (arg
, p
- arg
);
1434 map
->old_len
= p
- arg
;
1436 map
->new_prefix
= ggc_strdup (p
);
1437 map
->new_len
= strlen (p
);
1438 map
->next
= debug_prefix_maps
;
1439 debug_prefix_maps
= map
;
1442 /* Perform user-specified mapping of debug filename prefixes. Return
1443 the new name corresponding to FILENAME. */
1446 remap_debug_filename (const char *filename
)
1448 debug_prefix_map
*map
;
1453 for (map
= debug_prefix_maps
; map
; map
= map
->next
)
1454 if (strncmp (filename
, map
->old_prefix
, map
->old_len
) == 0)
1458 name
= filename
+ map
->old_len
;
1459 name_len
= strlen (name
) + 1;
1460 s
= (char *) alloca (name_len
+ map
->new_len
);
1461 memcpy (s
, map
->new_prefix
, map
->new_len
);
1462 memcpy (s
+ map
->new_len
, name
, name_len
);
1463 return ggc_strdup (s
);
1466 /* Output assembler code for the start of a function,
1467 and initialize some of the variables in this file
1468 for the new function. The label for the function and associated
1469 assembler pseudo-ops have already been output in `assemble_start_function'.
1471 FIRST is the first insn of the rtl for the function being compiled.
1472 FILE is the file to write assembler code to.
1473 OPTIMIZE is nonzero if we should eliminate redundant
1474 test and compare insns. */
1477 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1478 int optimize ATTRIBUTE_UNUSED
)
1482 this_is_asm_operands
= 0;
1484 last_filename
= locator_file (prologue_locator
);
1485 last_linenum
= locator_line (prologue_locator
);
1487 high_block_linenum
= high_function_linenum
= last_linenum
;
1489 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1491 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1492 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1493 dwarf2out_begin_prologue (0, NULL
);
1496 #ifdef LEAF_REG_REMAP
1497 if (current_function_uses_only_leaf_regs
)
1498 leaf_renumber_regs (first
);
1501 /* The Sun386i and perhaps other machines don't work right
1502 if the profiling code comes after the prologue. */
1503 #ifdef PROFILE_BEFORE_PROLOGUE
1505 profile_function (file
);
1506 #endif /* PROFILE_BEFORE_PROLOGUE */
1508 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1509 if (dwarf2out_do_frame ())
1510 dwarf2out_frame_debug (NULL_RTX
, false);
1513 /* If debugging, assign block numbers to all of the blocks in this
1517 reemit_insn_block_notes ();
1518 number_blocks (current_function_decl
);
1519 /* We never actually put out begin/end notes for the top-level
1520 block in the function. But, conceptually, that block is
1522 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1525 if (warn_frame_larger_than
1526 && get_frame_size () > frame_larger_than_size
)
1528 /* Issue a warning */
1529 warning (OPT_Wframe_larger_than_
,
1530 "the frame size of %wd bytes is larger than %wd bytes",
1531 get_frame_size (), frame_larger_than_size
);
1534 /* First output the function prologue: code to set up the stack frame. */
1535 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1537 /* If the machine represents the prologue as RTL, the profiling code must
1538 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1539 #ifdef HAVE_prologue
1540 if (! HAVE_prologue
)
1542 profile_after_prologue (file
);
1546 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1548 #ifndef PROFILE_BEFORE_PROLOGUE
1550 profile_function (file
);
1551 #endif /* not PROFILE_BEFORE_PROLOGUE */
1555 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1557 #ifndef NO_PROFILE_COUNTERS
1558 # define NO_PROFILE_COUNTERS 0
1560 #if defined(ASM_OUTPUT_REG_PUSH)
1561 int sval
= cfun
->returns_struct
;
1562 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1563 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1564 int cxt
= cfun
->static_chain_decl
!= NULL
;
1566 #endif /* ASM_OUTPUT_REG_PUSH */
1568 if (! NO_PROFILE_COUNTERS
)
1570 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1571 switch_to_section (data_section
);
1572 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1573 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1574 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1577 switch_to_section (current_function_section ());
1579 #if defined(ASM_OUTPUT_REG_PUSH)
1580 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1582 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1586 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1588 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1590 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1593 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1598 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1600 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1602 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1604 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1607 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1612 #if defined(ASM_OUTPUT_REG_PUSH)
1613 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1615 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1620 /* Output assembler code for the end of a function.
1621 For clarity, args are same as those of `final_start_function'
1622 even though not all of them are needed. */
1625 final_end_function (void)
1629 (*debug_hooks
->end_function
) (high_function_linenum
);
1631 /* Finally, output the function epilogue:
1632 code to restore the stack frame and return to the caller. */
1633 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1635 /* And debug output. */
1636 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1638 #if defined (DWARF2_UNWIND_INFO)
1639 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1640 && dwarf2out_do_frame ())
1641 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1645 /* Output assembler code for some insns: all or part of a function.
1646 For description of args, see `final_start_function', above. */
1649 final (rtx first
, FILE *file
, int optimize
)
1655 last_ignored_compare
= 0;
1657 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1659 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1660 max_uid
= INSN_UID (insn
);
1662 /* If CC tracking across branches is enabled, record the insn which
1663 jumps to each branch only reached from one place. */
1664 if (optimize
&& JUMP_P (insn
))
1666 rtx lab
= JUMP_LABEL (insn
);
1667 if (lab
&& LABEL_NUSES (lab
) == 1)
1669 LABEL_REFS (lab
) = insn
;
1679 /* Output the insns. */
1680 for (insn
= first
; insn
;)
1682 #ifdef HAVE_ATTR_length
1683 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1685 /* This can be triggered by bugs elsewhere in the compiler if
1686 new insns are created after init_insn_lengths is called. */
1687 gcc_assert (NOTE_P (insn
));
1688 insn_current_address
= -1;
1691 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1692 #endif /* HAVE_ATTR_length */
1694 insn
= final_scan_insn (insn
, file
, optimize
, 0, &seen
);
1699 get_insn_template (int code
, rtx insn
)
1701 switch (insn_data
[code
].output_format
)
1703 case INSN_OUTPUT_FORMAT_SINGLE
:
1704 return insn_data
[code
].output
.single
;
1705 case INSN_OUTPUT_FORMAT_MULTI
:
1706 return insn_data
[code
].output
.multi
[which_alternative
];
1707 case INSN_OUTPUT_FORMAT_FUNCTION
:
1709 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1716 /* Emit the appropriate declaration for an alternate-entry-point
1717 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1718 LABEL_KIND != LABEL_NORMAL.
1720 The case fall-through in this function is intentional. */
1722 output_alternate_entry_point (FILE *file
, rtx insn
)
1724 const char *name
= LABEL_NAME (insn
);
1726 switch (LABEL_KIND (insn
))
1728 case LABEL_WEAK_ENTRY
:
1729 #ifdef ASM_WEAKEN_LABEL
1730 ASM_WEAKEN_LABEL (file
, name
);
1732 case LABEL_GLOBAL_ENTRY
:
1733 targetm
.asm_out
.globalize_label (file
, name
);
1734 case LABEL_STATIC_ENTRY
:
1735 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1736 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1738 ASM_OUTPUT_LABEL (file
, name
);
1747 /* The final scan for one insn, INSN.
1748 Args are same as in `final', except that INSN
1749 is the insn being scanned.
1750 Value returned is the next insn to be scanned.
1752 NOPEEPHOLES is the flag to disallow peephole processing (currently
1753 used for within delayed branch sequence output).
1755 SEEN is used to track the end of the prologue, for emitting
1756 debug information. We force the emission of a line note after
1757 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1758 at the beginning of the second basic block, whichever comes
1762 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1763 int nopeepholes ATTRIBUTE_UNUSED
, int *seen
)
1772 /* Ignore deleted insns. These can occur when we split insns (due to a
1773 template of "#") while not optimizing. */
1774 if (INSN_DELETED_P (insn
))
1775 return NEXT_INSN (insn
);
1777 switch (GET_CODE (insn
))
1780 switch (NOTE_KIND (insn
))
1782 case NOTE_INSN_DELETED
:
1785 case NOTE_INSN_SWITCH_TEXT_SECTIONS
:
1786 in_cold_section_p
= !in_cold_section_p
;
1787 #ifdef DWARF2_UNWIND_INFO
1788 if (dwarf2out_do_frame ())
1789 dwarf2out_switch_text_section ();
1792 (*debug_hooks
->switch_text_section
) ();
1794 switch_to_section (current_function_section ());
1797 case NOTE_INSN_BASIC_BLOCK
:
1798 #ifdef TARGET_UNWIND_INFO
1799 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1803 fprintf (asm_out_file
, "\t%s basic block %d\n",
1804 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1806 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1808 *seen
|= SEEN_EMITTED
;
1809 force_source_line
= true;
1816 case NOTE_INSN_EH_REGION_BEG
:
1817 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1818 NOTE_EH_HANDLER (insn
));
1821 case NOTE_INSN_EH_REGION_END
:
1822 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1823 NOTE_EH_HANDLER (insn
));
1826 case NOTE_INSN_PROLOGUE_END
:
1827 targetm
.asm_out
.function_end_prologue (file
);
1828 profile_after_prologue (file
);
1830 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1832 *seen
|= SEEN_EMITTED
;
1833 force_source_line
= true;
1840 case NOTE_INSN_EPILOGUE_BEG
:
1841 targetm
.asm_out
.function_begin_epilogue (file
);
1844 case NOTE_INSN_FUNCTION_BEG
:
1846 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1848 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1850 *seen
|= SEEN_EMITTED
;
1851 force_source_line
= true;
1858 case NOTE_INSN_BLOCK_BEG
:
1859 if (debug_info_level
== DINFO_LEVEL_NORMAL
1860 || debug_info_level
== DINFO_LEVEL_VERBOSE
1861 || write_symbols
== DWARF2_DEBUG
1862 || write_symbols
== VMS_AND_DWARF2_DEBUG
1863 || write_symbols
== VMS_DEBUG
)
1865 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1869 high_block_linenum
= last_linenum
;
1871 /* Output debugging info about the symbol-block beginning. */
1872 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1874 /* Mark this block as output. */
1875 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1877 if (write_symbols
== DBX_DEBUG
1878 || write_symbols
== SDB_DEBUG
)
1880 location_t
*locus_ptr
1881 = block_nonartificial_location (NOTE_BLOCK (insn
));
1883 if (locus_ptr
!= NULL
)
1885 override_filename
= LOCATION_FILE (*locus_ptr
);
1886 override_linenum
= LOCATION_LINE (*locus_ptr
);
1891 case NOTE_INSN_BLOCK_END
:
1892 if (debug_info_level
== DINFO_LEVEL_NORMAL
1893 || debug_info_level
== DINFO_LEVEL_VERBOSE
1894 || write_symbols
== DWARF2_DEBUG
1895 || write_symbols
== VMS_AND_DWARF2_DEBUG
1896 || write_symbols
== VMS_DEBUG
)
1898 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1902 /* End of a symbol-block. */
1904 gcc_assert (block_depth
>= 0);
1906 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1908 if (write_symbols
== DBX_DEBUG
1909 || write_symbols
== SDB_DEBUG
)
1911 tree outer_block
= BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn
));
1912 location_t
*locus_ptr
1913 = block_nonartificial_location (outer_block
);
1915 if (locus_ptr
!= NULL
)
1917 override_filename
= LOCATION_FILE (*locus_ptr
);
1918 override_linenum
= LOCATION_LINE (*locus_ptr
);
1922 override_filename
= NULL
;
1923 override_linenum
= 0;
1928 case NOTE_INSN_DELETED_LABEL
:
1929 /* Emit the label. We may have deleted the CODE_LABEL because
1930 the label could be proved to be unreachable, though still
1931 referenced (in the form of having its address taken. */
1932 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1935 case NOTE_INSN_VAR_LOCATION
:
1936 (*debug_hooks
->var_location
) (insn
);
1946 #if defined (DWARF2_UNWIND_INFO)
1947 if (dwarf2out_do_frame ())
1948 dwarf2out_frame_debug (insn
, false);
1953 /* The target port might emit labels in the output function for
1954 some insn, e.g. sh.c output_branchy_insn. */
1955 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1957 int align
= LABEL_TO_ALIGNMENT (insn
);
1958 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1959 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1962 if (align
&& NEXT_INSN (insn
))
1964 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1965 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1967 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1968 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1970 ASM_OUTPUT_ALIGN (file
, align
);
1979 if (LABEL_NAME (insn
))
1980 (*debug_hooks
->label
) (insn
);
1984 fputs (ASM_APP_OFF
, file
);
1988 next
= next_nonnote_insn (insn
);
1989 if (next
!= 0 && JUMP_P (next
))
1991 rtx nextbody
= PATTERN (next
);
1993 /* If this label is followed by a jump-table,
1994 make sure we put the label in the read-only section. Also
1995 possibly write the label and jump table together. */
1997 if (GET_CODE (nextbody
) == ADDR_VEC
1998 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
2000 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2001 /* In this case, the case vector is being moved by the
2002 target, so don't output the label at all. Leave that
2003 to the back end macros. */
2005 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2009 switch_to_section (targetm
.asm_out
.function_rodata_section
2010 (current_function_decl
));
2012 #ifdef ADDR_VEC_ALIGN
2013 log_align
= ADDR_VEC_ALIGN (next
);
2015 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
2017 ASM_OUTPUT_ALIGN (file
, log_align
);
2020 switch_to_section (current_function_section ());
2022 #ifdef ASM_OUTPUT_CASE_LABEL
2023 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
2026 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2032 if (LABEL_ALT_ENTRY_P (insn
))
2033 output_alternate_entry_point (file
, insn
);
2035 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
2040 rtx body
= PATTERN (insn
);
2041 int insn_code_number
;
2044 #ifdef HAVE_conditional_execution
2045 /* Reset this early so it is correct for ASM statements. */
2046 current_insn_predicate
= NULL_RTX
;
2048 /* An INSN, JUMP_INSN or CALL_INSN.
2049 First check for special kinds that recog doesn't recognize. */
2051 if (GET_CODE (body
) == USE
/* These are just declarations. */
2052 || GET_CODE (body
) == CLOBBER
)
2057 /* If there is a REG_CC_SETTER note on this insn, it means that
2058 the setting of the condition code was done in the delay slot
2059 of the insn that branched here. So recover the cc status
2060 from the insn that set it. */
2062 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2065 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2066 cc_prev_status
= cc_status
;
2071 /* Detect insns that are really jump-tables
2072 and output them as such. */
2074 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2076 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2080 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2081 switch_to_section (targetm
.asm_out
.function_rodata_section
2082 (current_function_decl
));
2084 switch_to_section (current_function_section ());
2088 fputs (ASM_APP_OFF
, file
);
2092 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2093 if (GET_CODE (body
) == ADDR_VEC
)
2095 #ifdef ASM_OUTPUT_ADDR_VEC
2096 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2103 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2104 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2110 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2111 for (idx
= 0; idx
< vlen
; idx
++)
2113 if (GET_CODE (body
) == ADDR_VEC
)
2115 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2116 ASM_OUTPUT_ADDR_VEC_ELT
2117 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2124 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2125 ASM_OUTPUT_ADDR_DIFF_ELT
2128 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2129 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2135 #ifdef ASM_OUTPUT_CASE_END
2136 ASM_OUTPUT_CASE_END (file
,
2137 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2142 switch_to_section (current_function_section ());
2146 /* Output this line note if it is the first or the last line
2148 if (notice_source_line (insn
))
2150 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2153 if (GET_CODE (body
) == ASM_INPUT
)
2155 const char *string
= XSTR (body
, 0);
2157 /* There's no telling what that did to the condition codes. */
2162 expanded_location loc
;
2166 fputs (ASM_APP_ON
, file
);
2169 loc
= expand_location (ASM_INPUT_SOURCE_LOCATION (body
));
2170 if (*loc
.file
&& loc
.line
)
2171 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2172 ASM_COMMENT_START
, loc
.line
, loc
.file
);
2173 fprintf (asm_out_file
, "\t%s\n", string
);
2174 #if HAVE_AS_LINE_ZERO
2175 if (*loc
.file
&& loc
.line
)
2176 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2182 /* Detect `asm' construct with operands. */
2183 if (asm_noperands (body
) >= 0)
2185 unsigned int noperands
= asm_noperands (body
);
2186 rtx
*ops
= XALLOCAVEC (rtx
, noperands
);
2189 expanded_location expanded
;
2191 /* There's no telling what that did to the condition codes. */
2194 /* Get out the operand values. */
2195 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
, &loc
);
2196 /* Inhibit dying on what would otherwise be compiler bugs. */
2197 insn_noperands
= noperands
;
2198 this_is_asm_operands
= insn
;
2199 expanded
= expand_location (loc
);
2201 #ifdef FINAL_PRESCAN_INSN
2202 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2205 /* Output the insn using them. */
2210 fputs (ASM_APP_ON
, file
);
2213 if (expanded
.file
&& expanded
.line
)
2214 fprintf (asm_out_file
, "%s %i \"%s\" 1\n",
2215 ASM_COMMENT_START
, expanded
.line
, expanded
.file
);
2216 output_asm_insn (string
, ops
);
2217 #if HAVE_AS_LINE_ZERO
2218 if (expanded
.file
&& expanded
.line
)
2219 fprintf (asm_out_file
, "%s 0 \"\" 2\n", ASM_COMMENT_START
);
2223 this_is_asm_operands
= 0;
2229 fputs (ASM_APP_OFF
, file
);
2233 if (GET_CODE (body
) == SEQUENCE
)
2235 /* A delayed-branch sequence */
2238 final_sequence
= body
;
2240 /* Record the delay slots' frame information before the branch.
2241 This is needed for delayed calls: see execute_cfa_program(). */
2242 #if defined (DWARF2_UNWIND_INFO)
2243 if (dwarf2out_do_frame ())
2244 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2245 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2248 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2249 force the restoration of a comparison that was previously
2250 thought unnecessary. If that happens, cancel this sequence
2251 and cause that insn to be restored. */
2253 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, 1, seen
);
2254 if (next
!= XVECEXP (body
, 0, 1))
2260 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2262 rtx insn
= XVECEXP (body
, 0, i
);
2263 rtx next
= NEXT_INSN (insn
);
2264 /* We loop in case any instruction in a delay slot gets
2267 insn
= final_scan_insn (insn
, file
, 0, 1, seen
);
2268 while (insn
!= next
);
2270 #ifdef DBR_OUTPUT_SEQEND
2271 DBR_OUTPUT_SEQEND (file
);
2275 /* If the insn requiring the delay slot was a CALL_INSN, the
2276 insns in the delay slot are actually executed before the
2277 called function. Hence we don't preserve any CC-setting
2278 actions in these insns and the CC must be marked as being
2279 clobbered by the function. */
2280 if (CALL_P (XVECEXP (body
, 0, 0)))
2287 /* We have a real machine instruction as rtl. */
2289 body
= PATTERN (insn
);
2292 set
= single_set (insn
);
2294 /* Check for redundant test and compare instructions
2295 (when the condition codes are already set up as desired).
2296 This is done only when optimizing; if not optimizing,
2297 it should be possible for the user to alter a variable
2298 with the debugger in between statements
2299 and the next statement should reexamine the variable
2300 to compute the condition codes. */
2305 && GET_CODE (SET_DEST (set
)) == CC0
2306 && insn
!= last_ignored_compare
)
2308 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2309 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2310 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2312 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2313 XEXP (SET_SRC (set
), 0)
2314 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2315 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2316 XEXP (SET_SRC (set
), 1)
2317 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2319 if ((cc_status
.value1
!= 0
2320 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2321 || (cc_status
.value2
!= 0
2322 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2324 /* Don't delete insn if it has an addressing side-effect. */
2325 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2326 /* or if anything in it is volatile. */
2327 && ! volatile_refs_p (PATTERN (insn
)))
2329 /* We don't really delete the insn; just ignore it. */
2330 last_ignored_compare
= insn
;
2339 /* If this is a conditional branch, maybe modify it
2340 if the cc's are in a nonstandard state
2341 so that it accomplishes the same thing that it would
2342 do straightforwardly if the cc's were set up normally. */
2344 if (cc_status
.flags
!= 0
2346 && GET_CODE (body
) == SET
2347 && SET_DEST (body
) == pc_rtx
2348 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2349 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2350 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
)
2352 /* This function may alter the contents of its argument
2353 and clear some of the cc_status.flags bits.
2354 It may also return 1 meaning condition now always true
2355 or -1 meaning condition now always false
2356 or 2 meaning condition nontrivial but altered. */
2357 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2358 /* If condition now has fixed value, replace the IF_THEN_ELSE
2359 with its then-operand or its else-operand. */
2361 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2363 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2365 /* The jump is now either unconditional or a no-op.
2366 If it has become a no-op, don't try to output it.
2367 (It would not be recognized.) */
2368 if (SET_SRC (body
) == pc_rtx
)
2373 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2374 /* Replace (set (pc) (return)) with (return). */
2375 PATTERN (insn
) = body
= SET_SRC (body
);
2377 /* Rerecognize the instruction if it has changed. */
2379 INSN_CODE (insn
) = -1;
2382 /* If this is a conditional trap, maybe modify it if the cc's
2383 are in a nonstandard state so that it accomplishes the same
2384 thing that it would do straightforwardly if the cc's were
2386 if (cc_status
.flags
!= 0
2387 && NONJUMP_INSN_P (insn
)
2388 && GET_CODE (body
) == TRAP_IF
2389 && COMPARISON_P (TRAP_CONDITION (body
))
2390 && XEXP (TRAP_CONDITION (body
), 0) == cc0_rtx
)
2392 /* This function may alter the contents of its argument
2393 and clear some of the cc_status.flags bits.
2394 It may also return 1 meaning condition now always true
2395 or -1 meaning condition now always false
2396 or 2 meaning condition nontrivial but altered. */
2397 int result
= alter_cond (TRAP_CONDITION (body
));
2399 /* If TRAP_CONDITION has become always false, delete the
2407 /* If TRAP_CONDITION has become always true, replace
2408 TRAP_CONDITION with const_true_rtx. */
2410 TRAP_CONDITION (body
) = const_true_rtx
;
2412 /* Rerecognize the instruction if it has changed. */
2414 INSN_CODE (insn
) = -1;
2417 /* Make same adjustments to instructions that examine the
2418 condition codes without jumping and instructions that
2419 handle conditional moves (if this machine has either one). */
2421 if (cc_status
.flags
!= 0
2424 rtx cond_rtx
, then_rtx
, else_rtx
;
2427 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2429 cond_rtx
= XEXP (SET_SRC (set
), 0);
2430 then_rtx
= XEXP (SET_SRC (set
), 1);
2431 else_rtx
= XEXP (SET_SRC (set
), 2);
2435 cond_rtx
= SET_SRC (set
);
2436 then_rtx
= const_true_rtx
;
2437 else_rtx
= const0_rtx
;
2440 switch (GET_CODE (cond_rtx
))
2454 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2456 result
= alter_cond (cond_rtx
);
2458 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2459 else if (result
== -1)
2460 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2461 else if (result
== 2)
2462 INSN_CODE (insn
) = -1;
2463 if (SET_DEST (set
) == SET_SRC (set
))
2475 #ifdef HAVE_peephole
2476 /* Do machine-specific peephole optimizations if desired. */
2478 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2480 rtx next
= peephole (insn
);
2481 /* When peepholing, if there were notes within the peephole,
2482 emit them before the peephole. */
2483 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2485 rtx note
, prev
= PREV_INSN (insn
);
2487 for (note
= NEXT_INSN (insn
); note
!= next
;
2488 note
= NEXT_INSN (note
))
2489 final_scan_insn (note
, file
, optimize
, nopeepholes
, seen
);
2491 /* Put the notes in the proper position for a later
2492 rescan. For example, the SH target can do this
2493 when generating a far jump in a delayed branch
2495 note
= NEXT_INSN (insn
);
2496 PREV_INSN (note
) = prev
;
2497 NEXT_INSN (prev
) = note
;
2498 NEXT_INSN (PREV_INSN (next
)) = insn
;
2499 PREV_INSN (insn
) = PREV_INSN (next
);
2500 NEXT_INSN (insn
) = next
;
2501 PREV_INSN (next
) = insn
;
2504 /* PEEPHOLE might have changed this. */
2505 body
= PATTERN (insn
);
2509 /* Try to recognize the instruction.
2510 If successful, verify that the operands satisfy the
2511 constraints for the instruction. Crash if they don't,
2512 since `reload' should have changed them so that they do. */
2514 insn_code_number
= recog_memoized (insn
);
2515 cleanup_subreg_operands (insn
);
2517 /* Dump the insn in the assembly for debugging. */
2518 if (flag_dump_rtl_in_asm
)
2520 print_rtx_head
= ASM_COMMENT_START
;
2521 print_rtl_single (asm_out_file
, insn
);
2522 print_rtx_head
= "";
2525 if (! constrain_operands_cached (1))
2526 fatal_insn_not_found (insn
);
2528 /* Some target machines need to prescan each insn before
2531 #ifdef FINAL_PRESCAN_INSN
2532 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2535 #ifdef HAVE_conditional_execution
2536 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2537 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2541 cc_prev_status
= cc_status
;
2543 /* Update `cc_status' for this instruction.
2544 The instruction's output routine may change it further.
2545 If the output routine for a jump insn needs to depend
2546 on the cc status, it should look at cc_prev_status. */
2548 NOTICE_UPDATE_CC (body
, insn
);
2551 current_output_insn
= debug_insn
= insn
;
2553 #if defined (DWARF2_UNWIND_INFO)
2554 if (CALL_P (insn
) && dwarf2out_do_frame ())
2555 dwarf2out_frame_debug (insn
, false);
2558 /* Find the proper template for this insn. */
2559 templ
= get_insn_template (insn_code_number
, insn
);
2561 /* If the C code returns 0, it means that it is a jump insn
2562 which follows a deleted test insn, and that test insn
2563 needs to be reinserted. */
2568 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2570 /* We have already processed the notes between the setter and
2571 the user. Make sure we don't process them again, this is
2572 particularly important if one of the notes is a block
2573 scope note or an EH note. */
2575 prev
!= last_ignored_compare
;
2576 prev
= PREV_INSN (prev
))
2579 delete_insn (prev
); /* Use delete_note. */
2585 /* If the template is the string "#", it means that this insn must
2587 if (templ
[0] == '#' && templ
[1] == '\0')
2589 rtx new_rtx
= try_split (body
, insn
, 0);
2591 /* If we didn't split the insn, go away. */
2592 if (new_rtx
== insn
&& PATTERN (new_rtx
) == body
)
2593 fatal_insn ("could not split insn", insn
);
2595 #ifdef HAVE_ATTR_length
2596 /* This instruction should have been split in shorten_branches,
2597 to ensure that we would have valid length info for the
2605 #ifdef TARGET_UNWIND_INFO
2606 /* ??? This will put the directives in the wrong place if
2607 get_insn_template outputs assembly directly. However calling it
2608 before get_insn_template breaks if the insns is split. */
2609 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2612 /* Output assembler code from the template. */
2613 output_asm_insn (templ
, recog_data
.operand
);
2615 /* If necessary, report the effect that the instruction has on
2616 the unwind info. We've already done this for delay slots
2617 and call instructions. */
2618 #if defined (DWARF2_UNWIND_INFO)
2619 if (final_sequence
== 0
2620 #if !defined (HAVE_prologue)
2621 && !ACCUMULATE_OUTGOING_ARGS
2623 && dwarf2out_do_frame ())
2624 dwarf2out_frame_debug (insn
, true);
2627 current_output_insn
= debug_insn
= 0;
2630 return NEXT_INSN (insn
);
2633 /* Return whether a source line note needs to be emitted before INSN. */
2636 notice_source_line (rtx insn
)
2638 const char *filename
;
2641 if (override_filename
)
2643 filename
= override_filename
;
2644 linenum
= override_linenum
;
2648 filename
= insn_file (insn
);
2649 linenum
= insn_line (insn
);
2653 && (force_source_line
2654 || filename
!= last_filename
2655 || last_linenum
!= linenum
))
2657 force_source_line
= false;
2658 last_filename
= filename
;
2659 last_linenum
= linenum
;
2660 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2661 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2667 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2668 directly to the desired hard register. */
2671 cleanup_subreg_operands (rtx insn
)
2674 bool changed
= false;
2675 extract_insn_cached (insn
);
2676 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2678 /* The following test cannot use recog_data.operand when testing
2679 for a SUBREG: the underlying object might have been changed
2680 already if we are inside a match_operator expression that
2681 matches the else clause. Instead we test the underlying
2682 expression directly. */
2683 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2685 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2688 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2689 || GET_CODE (recog_data
.operand
[i
]) == MULT
2690 || MEM_P (recog_data
.operand
[i
]))
2691 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
], &changed
);
2694 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2696 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2698 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2701 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2702 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2703 || MEM_P (*recog_data
.dup_loc
[i
]))
2704 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
], &changed
);
2707 df_insn_rescan (insn
);
2710 /* If X is a SUBREG, replace it with a REG or a MEM,
2711 based on the thing it is a subreg of. */
2714 alter_subreg (rtx
*xp
)
2717 rtx y
= SUBREG_REG (x
);
2719 /* simplify_subreg does not remove subreg from volatile references.
2720 We are required to. */
2723 int offset
= SUBREG_BYTE (x
);
2725 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2726 contains 0 instead of the proper offset. See simplify_subreg. */
2728 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2730 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2731 - GET_MODE_SIZE (GET_MODE (x
));
2732 if (WORDS_BIG_ENDIAN
)
2733 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2734 if (BYTES_BIG_ENDIAN
)
2735 offset
+= difference
% UNITS_PER_WORD
;
2738 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2742 rtx new_rtx
= simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2749 /* Simplify_subreg can't handle some REG cases, but we have to. */
2751 HOST_WIDE_INT offset
;
2753 regno
= subreg_regno (x
);
2754 if (subreg_lowpart_p (x
))
2755 offset
= byte_lowpart_offset (GET_MODE (x
), GET_MODE (y
));
2757 offset
= SUBREG_BYTE (x
);
2758 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, offset
);
2765 /* Do alter_subreg on all the SUBREGs contained in X. */
2768 walk_alter_subreg (rtx
*xp
, bool *changed
)
2771 switch (GET_CODE (x
))
2776 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2777 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1), changed
);
2782 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0), changed
);
2787 return alter_subreg (xp
);
2798 /* Given BODY, the body of a jump instruction, alter the jump condition
2799 as required by the bits that are set in cc_status.flags.
2800 Not all of the bits there can be handled at this level in all cases.
2802 The value is normally 0.
2803 1 means that the condition has become always true.
2804 -1 means that the condition has become always false.
2805 2 means that COND has been altered. */
2808 alter_cond (rtx cond
)
2812 if (cc_status
.flags
& CC_REVERSED
)
2815 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2818 if (cc_status
.flags
& CC_INVERTED
)
2821 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2824 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2825 switch (GET_CODE (cond
))
2830 /* Jump becomes unconditional. */
2836 /* Jump becomes no-op. */
2840 PUT_CODE (cond
, EQ
);
2845 PUT_CODE (cond
, NE
);
2853 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2854 switch (GET_CODE (cond
))
2858 /* Jump becomes unconditional. */
2863 /* Jump becomes no-op. */
2868 PUT_CODE (cond
, EQ
);
2874 PUT_CODE (cond
, NE
);
2882 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2883 switch (GET_CODE (cond
))
2886 /* Jump becomes unconditional. */
2890 PUT_CODE (cond
, EQ
);
2895 PUT_CODE (cond
, NE
);
2900 /* Jump becomes no-op. */
2907 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2908 switch (GET_CODE (cond
))
2914 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2919 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2924 if (cc_status
.flags
& CC_NOT_SIGNED
)
2925 /* The flags are valid if signed condition operators are converted
2927 switch (GET_CODE (cond
))
2930 PUT_CODE (cond
, LEU
);
2935 PUT_CODE (cond
, LTU
);
2940 PUT_CODE (cond
, GTU
);
2945 PUT_CODE (cond
, GEU
);
2957 /* Report inconsistency between the assembler template and the operands.
2958 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2961 output_operand_lossage (const char *cmsgid
, ...)
2965 const char *pfx_str
;
2968 va_start (ap
, cmsgid
);
2970 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
2971 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
2972 vasprintf (&new_message
, fmt_string
, ap
);
2974 if (this_is_asm_operands
)
2975 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2977 internal_error ("%s", new_message
);
2984 /* Output of assembler code from a template, and its subroutines. */
2986 /* Annotate the assembly with a comment describing the pattern and
2987 alternative used. */
2990 output_asm_name (void)
2994 int num
= INSN_CODE (debug_insn
);
2995 fprintf (asm_out_file
, "\t%s %d\t%s",
2996 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2997 insn_data
[num
].name
);
2998 if (insn_data
[num
].n_alternatives
> 1)
2999 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
3000 #ifdef HAVE_ATTR_length
3001 fprintf (asm_out_file
, "\t[length = %d]",
3002 get_attr_length (debug_insn
));
3004 /* Clear this so only the first assembler insn
3005 of any rtl insn will get the special comment for -dp. */
3010 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3011 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3012 corresponds to the address of the object and 0 if to the object. */
3015 get_mem_expr_from_op (rtx op
, int *paddressp
)
3023 return REG_EXPR (op
);
3024 else if (!MEM_P (op
))
3027 if (MEM_EXPR (op
) != 0)
3028 return MEM_EXPR (op
);
3030 /* Otherwise we have an address, so indicate it and look at the address. */
3034 /* First check if we have a decl for the address, then look at the right side
3035 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3036 But don't allow the address to itself be indirect. */
3037 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
3039 else if (GET_CODE (op
) == PLUS
3040 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
3043 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
3044 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
3047 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
3048 return inner_addressp
? 0 : expr
;
3051 /* Output operand names for assembler instructions. OPERANDS is the
3052 operand vector, OPORDER is the order to write the operands, and NOPS
3053 is the number of operands to write. */
3056 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
3061 for (i
= 0; i
< nops
; i
++)
3064 rtx op
= operands
[oporder
[i
]];
3065 tree expr
= get_mem_expr_from_op (op
, &addressp
);
3067 fprintf (asm_out_file
, "%c%s",
3068 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
3072 fprintf (asm_out_file
, "%s",
3073 addressp
? "*" : "");
3074 print_mem_expr (asm_out_file
, expr
);
3077 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
3078 && ORIGINAL_REGNO (op
) != REGNO (op
))
3079 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
3083 /* Output text from TEMPLATE to the assembler output file,
3084 obeying %-directions to substitute operands taken from
3085 the vector OPERANDS.
3087 %N (for N a digit) means print operand N in usual manner.
3088 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3089 and print the label name with no punctuation.
3090 %cN means require operand N to be a constant
3091 and print the constant expression with no punctuation.
3092 %aN means expect operand N to be a memory address
3093 (not a memory reference!) and print a reference
3095 %nN means expect operand N to be a constant
3096 and print a constant expression for minus the value
3097 of the operand, with no other punctuation. */
3100 output_asm_insn (const char *templ
, rtx
*operands
)
3104 #ifdef ASSEMBLER_DIALECT
3107 int oporder
[MAX_RECOG_OPERANDS
];
3108 char opoutput
[MAX_RECOG_OPERANDS
];
3111 /* An insn may return a null string template
3112 in a case where no assembler code is needed. */
3116 memset (opoutput
, 0, sizeof opoutput
);
3118 putc ('\t', asm_out_file
);
3120 #ifdef ASM_OUTPUT_OPCODE
3121 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3128 if (flag_verbose_asm
)
3129 output_asm_operand_names (operands
, oporder
, ops
);
3130 if (flag_print_asm_name
)
3134 memset (opoutput
, 0, sizeof opoutput
);
3136 putc (c
, asm_out_file
);
3137 #ifdef ASM_OUTPUT_OPCODE
3138 while ((c
= *p
) == '\t')
3140 putc (c
, asm_out_file
);
3143 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3147 #ifdef ASSEMBLER_DIALECT
3153 output_operand_lossage ("nested assembly dialect alternatives");
3157 /* If we want the first dialect, do nothing. Otherwise, skip
3158 DIALECT_NUMBER of strings ending with '|'. */
3159 for (i
= 0; i
< dialect_number
; i
++)
3161 while (*p
&& *p
!= '}' && *p
++ != '|')
3170 output_operand_lossage ("unterminated assembly dialect alternative");
3177 /* Skip to close brace. */
3182 output_operand_lossage ("unterminated assembly dialect alternative");
3186 while (*p
++ != '}');
3190 putc (c
, asm_out_file
);
3195 putc (c
, asm_out_file
);
3201 /* %% outputs a single %. */
3205 putc (c
, asm_out_file
);
3207 /* %= outputs a number which is unique to each insn in the entire
3208 compilation. This is useful for making local labels that are
3209 referred to more than once in a given insn. */
3213 fprintf (asm_out_file
, "%d", insn_counter
);
3215 /* % followed by a letter and some digits
3216 outputs an operand in a special way depending on the letter.
3217 Letters `acln' are implemented directly.
3218 Other letters are passed to `output_operand' so that
3219 the PRINT_OPERAND macro can define them. */
3220 else if (ISALPHA (*p
))
3223 unsigned long opnum
;
3226 opnum
= strtoul (p
, &endptr
, 10);
3229 output_operand_lossage ("operand number missing "
3231 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3232 output_operand_lossage ("operand number out of range");
3233 else if (letter
== 'l')
3234 output_asm_label (operands
[opnum
]);
3235 else if (letter
== 'a')
3236 output_address (operands
[opnum
]);
3237 else if (letter
== 'c')
3239 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3240 output_addr_const (asm_out_file
, operands
[opnum
]);
3242 output_operand (operands
[opnum
], 'c');
3244 else if (letter
== 'n')
3246 if (GET_CODE (operands
[opnum
]) == CONST_INT
)
3247 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3248 - INTVAL (operands
[opnum
]));
3251 putc ('-', asm_out_file
);
3252 output_addr_const (asm_out_file
, operands
[opnum
]);
3256 output_operand (operands
[opnum
], letter
);
3258 if (!opoutput
[opnum
])
3259 oporder
[ops
++] = opnum
;
3260 opoutput
[opnum
] = 1;
3265 /* % followed by a digit outputs an operand the default way. */
3266 else if (ISDIGIT (*p
))
3268 unsigned long opnum
;
3271 opnum
= strtoul (p
, &endptr
, 10);
3272 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3273 output_operand_lossage ("operand number out of range");
3275 output_operand (operands
[opnum
], 0);
3277 if (!opoutput
[opnum
])
3278 oporder
[ops
++] = opnum
;
3279 opoutput
[opnum
] = 1;
3284 /* % followed by punctuation: output something for that
3285 punctuation character alone, with no operand.
3286 The PRINT_OPERAND macro decides what is actually done. */
3287 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3288 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3289 output_operand (NULL_RTX
, *p
++);
3292 output_operand_lossage ("invalid %%-code");
3296 putc (c
, asm_out_file
);
3299 /* Write out the variable names for operands, if we know them. */
3300 if (flag_verbose_asm
)
3301 output_asm_operand_names (operands
, oporder
, ops
);
3302 if (flag_print_asm_name
)
3305 putc ('\n', asm_out_file
);
3308 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3311 output_asm_label (rtx x
)
3315 if (GET_CODE (x
) == LABEL_REF
)
3319 && NOTE_KIND (x
) == NOTE_INSN_DELETED_LABEL
))
3320 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3322 output_operand_lossage ("'%%l' operand isn't a label");
3324 assemble_name (asm_out_file
, buf
);
3327 /* Print operand X using machine-dependent assembler syntax.
3328 The macro PRINT_OPERAND is defined just to control this function.
3329 CODE is a non-digit that preceded the operand-number in the % spec,
3330 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3331 between the % and the digits.
3332 When CODE is a non-letter, X is 0.
3334 The meanings of the letters are machine-dependent and controlled
3335 by PRINT_OPERAND. */
3338 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3340 if (x
&& GET_CODE (x
) == SUBREG
)
3341 x
= alter_subreg (&x
);
3343 /* X must not be a pseudo reg. */
3344 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3346 PRINT_OPERAND (asm_out_file
, x
, code
);
3347 if (x
&& MEM_P (x
) && GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
)
3351 t
= SYMBOL_REF_DECL (x
);
3353 assemble_external (t
);
3357 /* Print a memory reference operand for address X
3358 using machine-dependent assembler syntax.
3359 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3362 output_address (rtx x
)
3364 bool changed
= false;
3365 walk_alter_subreg (&x
, &changed
);
3366 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3369 /* Print an integer constant expression in assembler syntax.
3370 Addition and subtraction are the only arithmetic
3371 that may appear in these expressions. */
3374 output_addr_const (FILE *file
, rtx x
)
3379 switch (GET_CODE (x
))
3386 if (SYMBOL_REF_DECL (x
))
3387 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3388 #ifdef ASM_OUTPUT_SYMBOL_REF
3389 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3391 assemble_name (file
, XSTR (x
, 0));
3399 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3400 #ifdef ASM_OUTPUT_LABEL_REF
3401 ASM_OUTPUT_LABEL_REF (file
, buf
);
3403 assemble_name (file
, buf
);
3408 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3412 /* This used to output parentheses around the expression,
3413 but that does not work on the 386 (either ATT or BSD assembler). */
3414 output_addr_const (file
, XEXP (x
, 0));
3418 if (GET_MODE (x
) == VOIDmode
)
3420 /* We can use %d if the number is one word and positive. */
3421 if (CONST_DOUBLE_HIGH (x
))
3422 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3423 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_HIGH (x
),
3424 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (x
));
3425 else if (CONST_DOUBLE_LOW (x
) < 0)
3426 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3427 (unsigned HOST_WIDE_INT
) CONST_DOUBLE_LOW (x
));
3429 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3432 /* We can't handle floating point constants;
3433 PRINT_OPERAND must handle them. */
3434 output_operand_lossage ("floating constant misused");
3438 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
,
3439 (unsigned HOST_WIDE_INT
) CONST_FIXED_VALUE_LOW (x
));
3443 /* Some assemblers need integer constants to appear last (eg masm). */
3444 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3446 output_addr_const (file
, XEXP (x
, 1));
3447 if (INTVAL (XEXP (x
, 0)) >= 0)
3448 fprintf (file
, "+");
3449 output_addr_const (file
, XEXP (x
, 0));
3453 output_addr_const (file
, XEXP (x
, 0));
3454 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3455 || INTVAL (XEXP (x
, 1)) >= 0)
3456 fprintf (file
, "+");
3457 output_addr_const (file
, XEXP (x
, 1));
3462 /* Avoid outputting things like x-x or x+5-x,
3463 since some assemblers can't handle that. */
3464 x
= simplify_subtraction (x
);
3465 if (GET_CODE (x
) != MINUS
)
3468 output_addr_const (file
, XEXP (x
, 0));
3469 fprintf (file
, "-");
3470 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3471 || GET_CODE (XEXP (x
, 1)) == PC
3472 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3473 output_addr_const (file
, XEXP (x
, 1));
3476 fputs (targetm
.asm_out
.open_paren
, file
);
3477 output_addr_const (file
, XEXP (x
, 1));
3478 fputs (targetm
.asm_out
.close_paren
, file
);
3486 output_addr_const (file
, XEXP (x
, 0));
3490 #ifdef OUTPUT_ADDR_CONST_EXTRA
3491 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3496 output_operand_lossage ("invalid expression as operand");
3500 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3501 %R prints the value of REGISTER_PREFIX.
3502 %L prints the value of LOCAL_LABEL_PREFIX.
3503 %U prints the value of USER_LABEL_PREFIX.
3504 %I prints the value of IMMEDIATE_PREFIX.
3505 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3506 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3508 We handle alternate assembler dialects here, just like output_asm_insn. */
3511 asm_fprintf (FILE *file
, const char *p
, ...)
3517 va_start (argptr
, p
);
3524 #ifdef ASSEMBLER_DIALECT
3529 /* If we want the first dialect, do nothing. Otherwise, skip
3530 DIALECT_NUMBER of strings ending with '|'. */
3531 for (i
= 0; i
< dialect_number
; i
++)
3533 while (*p
&& *p
++ != '|')
3543 /* Skip to close brace. */
3544 while (*p
&& *p
++ != '}')
3555 while (strchr ("-+ #0", c
))
3560 while (ISDIGIT (c
) || c
== '.')
3571 case 'd': case 'i': case 'u':
3572 case 'x': case 'X': case 'o':
3576 fprintf (file
, buf
, va_arg (argptr
, int));
3580 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3581 'o' cases, but we do not check for those cases. It
3582 means that the value is a HOST_WIDE_INT, which may be
3583 either `long' or `long long'. */
3584 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3585 q
+= strlen (HOST_WIDE_INT_PRINT
);
3588 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3593 #ifdef HAVE_LONG_LONG
3599 fprintf (file
, buf
, va_arg (argptr
, long long));
3606 fprintf (file
, buf
, va_arg (argptr
, long));
3614 fprintf (file
, buf
, va_arg (argptr
, char *));
3618 #ifdef ASM_OUTPUT_OPCODE
3619 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3624 #ifdef REGISTER_PREFIX
3625 fprintf (file
, "%s", REGISTER_PREFIX
);
3630 #ifdef IMMEDIATE_PREFIX
3631 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3636 #ifdef LOCAL_LABEL_PREFIX
3637 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3642 fputs (user_label_prefix
, file
);
3645 #ifdef ASM_FPRINTF_EXTENSIONS
3646 /* Uppercase letters are reserved for general use by asm_fprintf
3647 and so are not available to target specific code. In order to
3648 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3649 they are defined here. As they get turned into real extensions
3650 to asm_fprintf they should be removed from this list. */
3651 case 'A': case 'B': case 'C': case 'D': case 'E':
3652 case 'F': case 'G': case 'H': case 'J': case 'K':
3653 case 'M': case 'N': case 'P': case 'Q': case 'S':
3654 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3657 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3670 /* Split up a CONST_DOUBLE or integer constant rtx
3671 into two rtx's for single words,
3672 storing in *FIRST the word that comes first in memory in the target
3673 and in *SECOND the other. */
3676 split_double (rtx value
, rtx
*first
, rtx
*second
)
3678 if (GET_CODE (value
) == CONST_INT
)
3680 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3682 /* In this case the CONST_INT holds both target words.
3683 Extract the bits from it into two word-sized pieces.
3684 Sign extend each half to HOST_WIDE_INT. */
3685 unsigned HOST_WIDE_INT low
, high
;
3686 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3688 /* Set sign_bit to the most significant bit of a word. */
3690 sign_bit
<<= BITS_PER_WORD
- 1;
3692 /* Set mask so that all bits of the word are set. We could
3693 have used 1 << BITS_PER_WORD instead of basing the
3694 calculation on sign_bit. However, on machines where
3695 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3696 compiler warning, even though the code would never be
3698 mask
= sign_bit
<< 1;
3701 /* Set sign_extend as any remaining bits. */
3702 sign_extend
= ~mask
;
3704 /* Pick the lower word and sign-extend it. */
3705 low
= INTVAL (value
);
3710 /* Pick the higher word, shifted to the least significant
3711 bits, and sign-extend it. */
3712 high
= INTVAL (value
);
3713 high
>>= BITS_PER_WORD
- 1;
3716 if (high
& sign_bit
)
3717 high
|= sign_extend
;
3719 /* Store the words in the target machine order. */
3720 if (WORDS_BIG_ENDIAN
)
3722 *first
= GEN_INT (high
);
3723 *second
= GEN_INT (low
);
3727 *first
= GEN_INT (low
);
3728 *second
= GEN_INT (high
);
3733 /* The rule for using CONST_INT for a wider mode
3734 is that we regard the value as signed.
3735 So sign-extend it. */
3736 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3737 if (WORDS_BIG_ENDIAN
)
3749 else if (GET_CODE (value
) != CONST_DOUBLE
)
3751 if (WORDS_BIG_ENDIAN
)
3753 *first
= const0_rtx
;
3759 *second
= const0_rtx
;
3762 else if (GET_MODE (value
) == VOIDmode
3763 /* This is the old way we did CONST_DOUBLE integers. */
3764 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3766 /* In an integer, the words are defined as most and least significant.
3767 So order them by the target's convention. */
3768 if (WORDS_BIG_ENDIAN
)
3770 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3771 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3775 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3776 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3783 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3785 /* Note, this converts the REAL_VALUE_TYPE to the target's
3786 format, splits up the floating point double and outputs
3787 exactly 32 bits of it into each of l[0] and l[1] --
3788 not necessarily BITS_PER_WORD bits. */
3789 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3791 /* If 32 bits is an entire word for the target, but not for the host,
3792 then sign-extend on the host so that the number will look the same
3793 way on the host that it would on the target. See for instance
3794 simplify_unary_operation. The #if is needed to avoid compiler
3797 #if HOST_BITS_PER_LONG > 32
3798 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3800 if (l
[0] & ((long) 1 << 31))
3801 l
[0] |= ((long) (-1) << 32);
3802 if (l
[1] & ((long) 1 << 31))
3803 l
[1] |= ((long) (-1) << 32);
3807 *first
= GEN_INT (l
[0]);
3808 *second
= GEN_INT (l
[1]);
3812 /* Return nonzero if this function has no function calls. */
3815 leaf_function_p (void)
3820 if (crtl
->profile
|| profile_arc_flag
)
3823 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3826 && ! SIBLING_CALL_P (insn
))
3828 if (NONJUMP_INSN_P (insn
)
3829 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3830 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3831 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3834 for (link
= crtl
->epilogue_delay_list
;
3836 link
= XEXP (link
, 1))
3838 insn
= XEXP (link
, 0);
3841 && ! SIBLING_CALL_P (insn
))
3843 if (NONJUMP_INSN_P (insn
)
3844 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3845 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3846 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3853 /* Return 1 if branch is a forward branch.
3854 Uses insn_shuid array, so it works only in the final pass. May be used by
3855 output templates to customary add branch prediction hints.
3858 final_forward_branch_p (rtx insn
)
3860 int insn_id
, label_id
;
3862 gcc_assert (uid_shuid
);
3863 insn_id
= INSN_SHUID (insn
);
3864 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3865 /* We've hit some insns that does not have id information available. */
3866 gcc_assert (insn_id
&& label_id
);
3867 return insn_id
< label_id
;
3870 /* On some machines, a function with no call insns
3871 can run faster if it doesn't create its own register window.
3872 When output, the leaf function should use only the "output"
3873 registers. Ordinarily, the function would be compiled to use
3874 the "input" registers to find its arguments; it is a candidate
3875 for leaf treatment if it uses only the "input" registers.
3876 Leaf function treatment means renumbering so the function
3877 uses the "output" registers instead. */
3879 #ifdef LEAF_REGISTERS
3881 /* Return 1 if this function uses only the registers that can be
3882 safely renumbered. */
3885 only_leaf_regs_used (void)
3888 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3890 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3891 if ((df_regs_ever_live_p (i
) || global_regs
[i
])
3892 && ! permitted_reg_in_leaf_functions
[i
])
3895 if (crtl
->uses_pic_offset_table
3896 && pic_offset_table_rtx
!= 0
3897 && REG_P (pic_offset_table_rtx
)
3898 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3904 /* Scan all instructions and renumber all registers into those
3905 available in leaf functions. */
3908 leaf_renumber_regs (rtx first
)
3912 /* Renumber only the actual patterns.
3913 The reg-notes can contain frame pointer refs,
3914 and renumbering them could crash, and should not be needed. */
3915 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3917 leaf_renumber_regs_insn (PATTERN (insn
));
3918 for (insn
= crtl
->epilogue_delay_list
;
3920 insn
= XEXP (insn
, 1))
3921 if (INSN_P (XEXP (insn
, 0)))
3922 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3925 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3926 available in leaf functions. */
3929 leaf_renumber_regs_insn (rtx in_rtx
)
3932 const char *format_ptr
;
3937 /* Renumber all input-registers into output-registers.
3938 renumbered_regs would be 1 for an output-register;
3945 /* Don't renumber the same reg twice. */
3949 newreg
= REGNO (in_rtx
);
3950 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3951 to reach here as part of a REG_NOTE. */
3952 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3957 newreg
= LEAF_REG_REMAP (newreg
);
3958 gcc_assert (newreg
>= 0);
3959 df_set_regs_ever_live (REGNO (in_rtx
), false);
3960 df_set_regs_ever_live (newreg
, true);
3961 SET_REGNO (in_rtx
, newreg
);
3965 if (INSN_P (in_rtx
))
3967 /* Inside a SEQUENCE, we find insns.
3968 Renumber just the patterns of these insns,
3969 just as we do for the top-level insns. */
3970 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3974 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3976 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3977 switch (*format_ptr
++)
3980 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3984 if (NULL
!= XVEC (in_rtx
, i
))
3986 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3987 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
4007 /* When -gused is used, emit debug info for only used symbols. But in
4008 addition to the standard intercepted debug_hooks there are some direct
4009 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
4010 Those routines may also be called from a higher level intercepted routine. So
4011 to prevent recording data for an inner call to one of these for an intercept,
4012 we maintain an intercept nesting counter (debug_nesting). We only save the
4013 intercepted arguments if the nesting is 1. */
4014 int debug_nesting
= 0;
4016 static tree
*symbol_queue
;
4017 int symbol_queue_index
= 0;
4018 static int symbol_queue_size
= 0;
4020 /* Generate the symbols for any queued up type symbols we encountered
4021 while generating the type info for some originally used symbol.
4022 This might generate additional entries in the queue. Only when
4023 the nesting depth goes to 0 is this routine called. */
4026 debug_flush_symbol_queue (void)
4030 /* Make sure that additionally queued items are not flushed
4035 for (i
= 0; i
< symbol_queue_index
; ++i
)
4037 /* If we pushed queued symbols then such symbols must be
4038 output no matter what anyone else says. Specifically,
4039 we need to make sure dbxout_symbol() thinks the symbol was
4040 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
4041 which may be set for outside reasons. */
4042 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
4043 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
4044 TREE_USED (symbol_queue
[i
]) = 1;
4045 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
4047 #ifdef DBX_DEBUGGING_INFO
4048 dbxout_symbol (symbol_queue
[i
], 0);
4051 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
4052 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
4055 symbol_queue_index
= 0;
4059 /* Queue a type symbol needed as part of the definition of a decl
4060 symbol. These symbols are generated when debug_flush_symbol_queue()
4064 debug_queue_symbol (tree decl
)
4066 if (symbol_queue_index
>= symbol_queue_size
)
4068 symbol_queue_size
+= 10;
4069 symbol_queue
= XRESIZEVEC (tree
, symbol_queue
, symbol_queue_size
);
4072 symbol_queue
[symbol_queue_index
++] = decl
;
4075 /* Free symbol queue. */
4077 debug_free_queue (void)
4081 free (symbol_queue
);
4082 symbol_queue
= NULL
;
4083 symbol_queue_size
= 0;
4087 /* Turn the RTL into assembly. */
4089 rest_of_handle_final (void)
4094 /* Get the function's name, as described by its RTL. This may be
4095 different from the DECL_NAME name used in the source file. */
4097 x
= DECL_RTL (current_function_decl
);
4098 gcc_assert (MEM_P (x
));
4100 gcc_assert (GET_CODE (x
) == SYMBOL_REF
);
4101 fnname
= XSTR (x
, 0);
4103 assemble_start_function (current_function_decl
, fnname
);
4104 final_start_function (get_insns (), asm_out_file
, optimize
);
4105 final (get_insns (), asm_out_file
, optimize
);
4106 final_end_function ();
4108 #ifdef TARGET_UNWIND_INFO
4109 /* ??? The IA-64 ".handlerdata" directive must be issued before
4110 the ".endp" directive that closes the procedure descriptor. */
4111 output_function_exception_table (fnname
);
4114 assemble_end_function (current_function_decl
, fnname
);
4116 #ifndef TARGET_UNWIND_INFO
4117 /* Otherwise, it feels unclean to switch sections in the middle. */
4118 output_function_exception_table (fnname
);
4121 user_defined_section_attribute
= false;
4123 /* Free up reg info memory. */
4127 fflush (asm_out_file
);
4129 /* Write DBX symbols if requested. */
4131 /* Note that for those inline functions where we don't initially
4132 know for certain that we will be generating an out-of-line copy,
4133 the first invocation of this routine (rest_of_compilation) will
4134 skip over this code by doing a `goto exit_rest_of_compilation;'.
4135 Later on, wrapup_global_declarations will (indirectly) call
4136 rest_of_compilation again for those inline functions that need
4137 to have out-of-line copies generated. During that call, we
4138 *will* be routed past here. */
4140 timevar_push (TV_SYMOUT
);
4141 (*debug_hooks
->function_decl
) (current_function_decl
);
4142 timevar_pop (TV_SYMOUT
);
4143 if (DECL_STATIC_CONSTRUCTOR (current_function_decl
)
4144 && targetm
.have_ctors_dtors
)
4145 targetm
.asm_out
.constructor (XEXP (DECL_RTL (current_function_decl
), 0),
4146 decl_init_priority_lookup
4147 (current_function_decl
));
4148 if (DECL_STATIC_DESTRUCTOR (current_function_decl
)
4149 && targetm
.have_ctors_dtors
)
4150 targetm
.asm_out
.destructor (XEXP (DECL_RTL (current_function_decl
), 0),
4151 decl_fini_priority_lookup
4152 (current_function_decl
));
4156 struct rtl_opt_pass pass_final
=
4162 rest_of_handle_final
, /* execute */
4165 0, /* static_pass_number */
4166 TV_FINAL
, /* tv_id */
4167 0, /* properties_required */
4168 0, /* properties_provided */
4169 0, /* properties_destroyed */
4170 0, /* todo_flags_start */
4171 TODO_ggc_collect
/* todo_flags_finish */
4177 rest_of_handle_shorten_branches (void)
4179 /* Shorten branches. */
4180 shorten_branches (get_insns ());
4184 struct rtl_opt_pass pass_shorten_branches
=
4188 "shorten", /* name */
4190 rest_of_handle_shorten_branches
, /* execute */
4193 0, /* static_pass_number */
4194 TV_FINAL
, /* tv_id */
4195 0, /* properties_required */
4196 0, /* properties_provided */
4197 0, /* properties_destroyed */
4198 0, /* todo_flags_start */
4199 TODO_dump_func
/* todo_flags_finish */
4205 rest_of_clean_state (void)
4209 /* It is very important to decompose the RTL instruction chain here:
4210 debug information keeps pointing into CODE_LABEL insns inside the function
4211 body. If these remain pointing to the other insns, we end up preserving
4212 whole RTL chain and attached detailed debug info in memory. */
4213 for (insn
= get_insns (); insn
; insn
= next
)
4215 next
= NEXT_INSN (insn
);
4216 NEXT_INSN (insn
) = NULL
;
4217 PREV_INSN (insn
) = NULL
;
4220 /* In case the function was not output,
4221 don't leave any temporary anonymous types
4222 queued up for sdb output. */
4223 #ifdef SDB_DEBUGGING_INFO
4224 if (write_symbols
== SDB_DEBUG
)
4225 sdbout_types (NULL_TREE
);
4228 reload_completed
= 0;
4229 epilogue_completed
= 0;
4231 regstack_completed
= 0;
4234 /* Clear out the insn_length contents now that they are no
4236 init_insn_lengths ();
4238 /* Show no temporary slots allocated. */
4241 free_bb_for_insn ();
4243 if (targetm
.binds_local_p (current_function_decl
))
4245 unsigned int pref
= crtl
->preferred_stack_boundary
;
4246 if (crtl
->stack_alignment_needed
> crtl
->preferred_stack_boundary
)
4247 pref
= crtl
->stack_alignment_needed
;
4248 cgraph_rtl_info (current_function_decl
)->preferred_incoming_stack_boundary
4252 /* Make sure volatile mem refs aren't considered valid operands for
4253 arithmetic insns. We must call this here if this is a nested inline
4254 function, since the above code leaves us in the init_recog state,
4255 and the function context push/pop code does not save/restore volatile_ok.
4257 ??? Maybe it isn't necessary for expand_start_function to call this
4258 anymore if we do it here? */
4260 init_recog_no_volatile ();
4262 /* We're done with this function. Free up memory if we can. */
4263 free_after_parsing (cfun
);
4264 free_after_compilation (cfun
);
4268 struct rtl_opt_pass pass_clean_state
=
4274 rest_of_clean_state
, /* execute */
4277 0, /* static_pass_number */
4278 TV_FINAL
, /* tv_id */
4279 0, /* properties_required */
4280 0, /* properties_provided */
4281 PROP_rtl
, /* properties_destroyed */
4282 0, /* todo_flags_start */
4283 0 /* todo_flags_finish */