1 ; Options for the IA-32 and AMD64 ports of the compiler.
3 ; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 2, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 ; WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING. If not, write to the Free
19 ; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE)
24 sizeof(long double) is 16
27 Target Report Mask(80387)
31 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE)
32 sizeof(long double) is 12
34 maccumulate-outgoing-args
35 Target Report Mask(ACCUMULATE_OUTGOING_ARGS)
36 Reserve space for outgoing arguments in the function prologue
39 Target Report Mask(ALIGN_DOUBLE)
40 Align some doubles on dword boundary
43 Target RejectNegative Joined Var(ix86_align_funcs_string)
44 Function starts are aligned to this power of 2
47 Target RejectNegative Joined Var(ix86_align_jumps_string)
48 Jump targets are aligned to this power of 2
51 Target RejectNegative Joined Var(ix86_align_loops_string)
52 Loop code aligned to this power of 2
55 Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS)
56 Align destination of the string operations
59 Target RejectNegative Joined Var(ix86_arch_string)
60 Generate code for given CPU
63 Target RejectNegative Joined Var(ix86_asm_string)
64 Use given assembler dialect
67 Target RejectNegative Joined Var(ix86_branch_cost_string)
68 Branches are this expensive (1-5, arbitrary units)
70 mlarge-data-threshold=
71 Target RejectNegative Joined Var(ix86_section_threshold_string)
72 Data greater than given threshold will go into .ldata section in x86-64 medium model
75 Target RejectNegative Joined Var(ix86_cmodel_string)
76 Use given x86-64 code model
79 Target RejectNegative Report InverseMask(NO_FANCY_MATH_387, USE_FANCY_MATH_387)
80 Generate sin, cos, sqrt for FPU
83 Target Report Mask(FLOAT_RETURNS)
84 Return values of functions in FPU registers
87 Target RejectNegative Joined Var(ix86_fpmath_string)
88 Generate floating point mathematics using given instruction set
91 Target RejectNegative Mask(80387) MaskExists
95 Target Report Mask(IEEE_FP)
96 Use IEEE math for fp comparisons
99 Target Report Mask(INLINE_ALL_STRINGOPS)
100 Inline all known string operations
102 minline-stringops-dynamically
103 Target Report Mask(INLINE_STRINGOPS_DYNAMICALLY)
104 Inline memset/memcpy string operations, but perform inline version only for small blocks
111 Target Report Mask(MS_BITFIELD_LAYOUT)
112 Use native (MS) bitfield layout
115 Target RejectNegative Report Mask(NO_ALIGN_STRINGOPS) Undocumented
118 Target RejectNegative Report Mask(NO_FANCY_MATH_387) Undocumented
121 Target RejectNegative Report Mask(NO_PUSH_ARGS) Undocumented
124 Target RejectNegative Report Mask(NO_RED_ZONE) Undocumented
126 momit-leaf-frame-pointer
127 Target Report Mask(OMIT_LEAF_FRAME_POINTER)
128 Omit the frame pointer in leaf functions
131 Target RejectNegative Report Joined Var(ix87_precision_string)
132 Set 80387 floating-point precision (-mpc32, -mpc64, -mpc80)
134 mpreferred-stack-boundary=
135 Target RejectNegative Joined Var(ix86_preferred_stack_boundary_string)
136 Attempt to keep stack aligned to this power of 2
139 Target Report InverseMask(NO_PUSH_ARGS, PUSH_ARGS)
140 Use push instructions to save outgoing arguments
143 Target RejectNegative Report InverseMask(NO_RED_ZONE, RED_ZONE)
144 Use red-zone in the x86-64 code
147 Target RejectNegative Joined Var(ix86_regparm_string)
148 Number of registers used to pass integer arguments
151 Target Report Mask(RTD)
152 Alternate calling convention
155 Target InverseMask(80387)
156 Do not use hardware fp
159 Target RejectNegative Mask(SSEREGPARM)
160 Use SSE register passing conventions for SF and DF mode
163 Target Report Var(ix86_force_align_arg_pointer)
164 Realign stack in prologue
167 Target Report Mask(STACK_PROBE)
171 Target RejectNegative Joined Var(ix86_stringop_string)
172 Chose strategy to generate stringop using
175 Target RejectNegative Joined Var(ix86_tls_dialect_string)
176 Use given thread-local storage dialect
179 Target Report Mask(TLS_DIRECT_SEG_REFS)
180 Use direct references against %gs when accessing tls data
183 Target RejectNegative Joined Var(ix86_tune_string)
184 Schedule code for given CPU
189 Target RejectNegative Negative(m64) Report InverseMask(ISA_64BIT) Var(ix86_isa_flags) VarExists
190 Generate 32bit i386 code
193 Target RejectNegative Negative(m32) Report Mask(ISA_64BIT) Var(ix86_isa_flags) VarExists
194 Generate 64bit x86-64 code
197 Target Report Mask(ISA_MMX) Var(ix86_isa_flags) VarExists
198 Support MMX built-in functions
201 Target Report Mask(ISA_3DNOW) Var(ix86_isa_flags) VarExists
202 Support 3DNow! built-in functions
205 Target Undocumented Mask(ISA_3DNOW_A) Var(ix86_isa_flags) VarExists
206 Support Athlon 3Dnow! built-in functions
209 Target Report Mask(ISA_SSE) Var(ix86_isa_flags) VarExists
210 Support MMX and SSE built-in functions and code generation
213 Target Report Mask(ISA_SSE2) Var(ix86_isa_flags) VarExists
214 Support MMX, SSE and SSE2 built-in functions and code generation
217 Target Report Mask(ISA_SSE3) Var(ix86_isa_flags) VarExists
218 Support MMX, SSE, SSE2 and SSE3 built-in functions and code generation
221 Target Report Mask(ISA_SSSE3) Var(ix86_isa_flags) VarExists
222 Support MMX, SSE, SSE2, SSE3 and SSSE3 built-in functions and code generation
225 Target Report Mask(ISA_SSE4_1) Var(ix86_isa_flags) VarExists
226 Support MMX, SSE, SSE2, SSE3, SSSE3 and SSE4.1 built-in functions and code generation
229 Target Report Mask(ISA_SSE4A) Var(ix86_isa_flags) VarExists
230 Support MMX, SSE, SSE2, SSE3 and SSE4A built-in functions and code generation
232 ;; Instruction support
235 Target Report RejectNegative Var(x86_abm)
236 Support code generation of Advanced Bit Manipulation (ABM) instructions.
239 Target Report RejectNegative Var(x86_cmpxchg16b)
240 Support code generation of cmpxchg16b instruction.
243 Target Report RejectNegative Var(x86_popcnt)
244 Support code generation of popcnt instruction.
247 Target Report RejectNegative Var(x86_sahf)
248 Support code generation of sahf instruction in 64bit x86-64 code.