1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
25 #include "diagnostic-core.h"
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
32 #include "stor-layout.h"
33 #include "stringpool.h"
45 #include "basic-block.h"
48 struct target_optabs default_target_optabs
;
49 struct target_libfuncs default_target_libfuncs
;
50 struct target_optabs
*this_fn_optabs
= &default_target_optabs
;
52 struct target_optabs
*this_target_optabs
= &default_target_optabs
;
53 struct target_libfuncs
*this_target_libfuncs
= &default_target_libfuncs
;
56 #define libfunc_hash \
57 (this_target_libfuncs->x_libfunc_hash)
59 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
61 static rtx
expand_unop_direct (enum machine_mode
, optab
, rtx
, rtx
, int);
62 static void emit_libcall_block_1 (rtx
, rtx
, rtx
, rtx
, bool);
64 /* Debug facility for use in GDB. */
65 void debug_optab_libfuncs (void);
67 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
68 #if ENABLE_DECIMAL_BID_FORMAT
69 #define DECIMAL_PREFIX "bid_"
71 #define DECIMAL_PREFIX "dpd_"
74 /* Used for libfunc_hash. */
77 hash_libfunc (const void *p
)
79 const struct libfunc_entry
*const e
= (const struct libfunc_entry
*) p
;
80 return ((e
->mode1
+ e
->mode2
* NUM_MACHINE_MODES
) ^ e
->op
);
83 /* Used for libfunc_hash. */
86 eq_libfunc (const void *p
, const void *q
)
88 const struct libfunc_entry
*const e1
= (const struct libfunc_entry
*) p
;
89 const struct libfunc_entry
*const e2
= (const struct libfunc_entry
*) q
;
90 return e1
->op
== e2
->op
&& e1
->mode1
== e2
->mode1
&& e1
->mode2
== e2
->mode2
;
93 /* Return libfunc corresponding operation defined by OPTAB converting
94 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
95 if no libfunc is available. */
97 convert_optab_libfunc (convert_optab optab
, enum machine_mode mode1
,
98 enum machine_mode mode2
)
100 struct libfunc_entry e
;
101 struct libfunc_entry
**slot
;
103 /* ??? This ought to be an assert, but not all of the places
104 that we expand optabs know about the optabs that got moved
106 if (!(optab
>= FIRST_CONV_OPTAB
&& optab
<= LAST_CONVLIB_OPTAB
))
112 slot
= (struct libfunc_entry
**)
113 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
116 const struct convert_optab_libcall_d
*d
117 = &convlib_def
[optab
- FIRST_CONV_OPTAB
];
119 if (d
->libcall_gen
== NULL
)
122 d
->libcall_gen (optab
, d
->libcall_basename
, mode1
, mode2
);
123 slot
= (struct libfunc_entry
**)
124 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
128 return (*slot
)->libfunc
;
131 /* Return libfunc corresponding operation defined by OPTAB in MODE.
132 Trigger lazy initialization if needed, return NULL if no libfunc is
135 optab_libfunc (optab optab
, enum machine_mode mode
)
137 struct libfunc_entry e
;
138 struct libfunc_entry
**slot
;
140 /* ??? This ought to be an assert, but not all of the places
141 that we expand optabs know about the optabs that got moved
143 if (!(optab
>= FIRST_NORM_OPTAB
&& optab
<= LAST_NORMLIB_OPTAB
))
149 slot
= (struct libfunc_entry
**)
150 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
153 const struct optab_libcall_d
*d
154 = &normlib_def
[optab
- FIRST_NORM_OPTAB
];
156 if (d
->libcall_gen
== NULL
)
159 d
->libcall_gen (optab
, d
->libcall_basename
, d
->libcall_suffix
, mode
);
160 slot
= (struct libfunc_entry
**)
161 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
165 return (*slot
)->libfunc
;
169 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
170 the result of operation CODE applied to OP0 (and OP1 if it is a binary
173 If the last insn does not set TARGET, don't do anything, but return 1.
175 If the last insn or a previous insn sets TARGET and TARGET is one of OP0
176 or OP1, don't add the REG_EQUAL note but return 0. Our caller can then
177 try again, ensuring that TARGET is not one of the operands. */
180 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
185 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
187 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
188 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
189 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
190 && GET_RTX_CLASS (code
) != RTX_COMPARE
191 && GET_RTX_CLASS (code
) != RTX_UNARY
)
194 if (GET_CODE (target
) == ZERO_EXTRACT
)
197 for (last_insn
= insns
;
198 NEXT_INSN (last_insn
) != NULL_RTX
;
199 last_insn
= NEXT_INSN (last_insn
))
202 /* If TARGET is in OP0 or OP1, punt. We'd end up with a note referencing
203 a value changing in the insn, so the note would be invalid for CSE. */
204 if (reg_overlap_mentioned_p (target
, op0
)
205 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
208 && (rtx_equal_p (target
, op0
)
209 || (op1
&& rtx_equal_p (target
, op1
))))
211 /* For MEM target, with MEM = MEM op X, prefer no REG_EQUAL note
212 over expanding it as temp = MEM op X, MEM = temp. If the target
213 supports MEM = MEM op X instructions, it is sometimes too hard
214 to reconstruct that form later, especially if X is also a memory,
215 and due to multiple occurrences of addresses the address might
216 be forced into register unnecessarily.
217 Note that not emitting the REG_EQUIV note might inhibit
218 CSE in some cases. */
219 set
= single_set (last_insn
);
221 && GET_CODE (SET_SRC (set
)) == code
222 && MEM_P (SET_DEST (set
))
223 && (rtx_equal_p (SET_DEST (set
), XEXP (SET_SRC (set
), 0))
224 || (op1
&& rtx_equal_p (SET_DEST (set
),
225 XEXP (SET_SRC (set
), 1)))))
231 set
= single_set (last_insn
);
235 if (! rtx_equal_p (SET_DEST (set
), target
)
236 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
237 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
238 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
241 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
251 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (target
) != GET_MODE (op0
))
253 note
= gen_rtx_fmt_e (code
, GET_MODE (op0
), copy_rtx (op0
));
254 if (GET_MODE_SIZE (GET_MODE (op0
))
255 > GET_MODE_SIZE (GET_MODE (target
)))
256 note
= simplify_gen_unary (TRUNCATE
, GET_MODE (target
),
257 note
, GET_MODE (op0
));
259 note
= simplify_gen_unary (ZERO_EXTEND
, GET_MODE (target
),
260 note
, GET_MODE (op0
));
265 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
269 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
271 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
276 /* Given two input operands, OP0 and OP1, determine what the correct from_mode
277 for a widening operation would be. In most cases this would be OP0, but if
278 that's a constant it'll be VOIDmode, which isn't useful. */
280 static enum machine_mode
281 widened_mode (enum machine_mode to_mode
, rtx op0
, rtx op1
)
283 enum machine_mode m0
= GET_MODE (op0
);
284 enum machine_mode m1
= GET_MODE (op1
);
285 enum machine_mode result
;
287 if (m0
== VOIDmode
&& m1
== VOIDmode
)
289 else if (m0
== VOIDmode
|| GET_MODE_SIZE (m0
) < GET_MODE_SIZE (m1
))
294 if (GET_MODE_SIZE (result
) > GET_MODE_SIZE (to_mode
))
300 /* Find a widening optab even if it doesn't widen as much as we want.
301 E.g. if from_mode is HImode, and to_mode is DImode, and there is no
302 direct HI->SI insn, then return SI->DI, if that exists.
303 If PERMIT_NON_WIDENING is non-zero then this can be used with
304 non-widening optabs also. */
307 find_widening_optab_handler_and_mode (optab op
, enum machine_mode to_mode
,
308 enum machine_mode from_mode
,
309 int permit_non_widening
,
310 enum machine_mode
*found_mode
)
312 for (; (permit_non_widening
|| from_mode
!= to_mode
)
313 && GET_MODE_SIZE (from_mode
) <= GET_MODE_SIZE (to_mode
)
314 && from_mode
!= VOIDmode
;
315 from_mode
= GET_MODE_WIDER_MODE (from_mode
))
317 enum insn_code handler
= widening_optab_handler (op
, to_mode
,
320 if (handler
!= CODE_FOR_nothing
)
323 *found_mode
= from_mode
;
328 return CODE_FOR_nothing
;
331 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
332 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
333 not actually do a sign-extend or zero-extend, but can leave the
334 higher-order bits of the result rtx undefined, for example, in the case
335 of logical operations, but not right shifts. */
338 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
339 int unsignedp
, int no_extend
)
343 /* If we don't have to extend and this is a constant, return it. */
344 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
347 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
348 extend since it will be more efficient to do so unless the signedness of
349 a promoted object differs from our extension. */
351 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
352 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
353 return convert_modes (mode
, oldmode
, op
, unsignedp
);
355 /* If MODE is no wider than a single word, we return a lowpart or paradoxical
357 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
358 return gen_lowpart (mode
, force_reg (GET_MODE (op
), op
));
360 /* Otherwise, get an object of MODE, clobber it, and set the low-order
363 result
= gen_reg_rtx (mode
);
364 emit_clobber (result
);
365 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
369 /* Return the optab used for computing the operation given by the tree code,
370 CODE and the tree EXP. This function is not always usable (for example, it
371 cannot give complete results for multiplication or division) but probably
372 ought to be relied on more widely throughout the expander. */
374 optab_for_tree_code (enum tree_code code
, const_tree type
,
375 enum optab_subtype subtype
)
387 return one_cmpl_optab
;
392 case MULT_HIGHPART_EXPR
:
393 return TYPE_UNSIGNED (type
) ? umul_highpart_optab
: smul_highpart_optab
;
399 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
407 if (TYPE_SATURATING (type
))
408 return TYPE_UNSIGNED (type
) ? usdiv_optab
: ssdiv_optab
;
409 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
412 if (TREE_CODE (type
) == VECTOR_TYPE
)
414 if (subtype
== optab_vector
)
415 return TYPE_SATURATING (type
) ? unknown_optab
: vashl_optab
;
417 gcc_assert (subtype
== optab_scalar
);
419 if (TYPE_SATURATING (type
))
420 return TYPE_UNSIGNED (type
) ? usashl_optab
: ssashl_optab
;
424 if (TREE_CODE (type
) == VECTOR_TYPE
)
426 if (subtype
== optab_vector
)
427 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
429 gcc_assert (subtype
== optab_scalar
);
431 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
434 if (TREE_CODE (type
) == VECTOR_TYPE
)
436 if (subtype
== optab_vector
)
439 gcc_assert (subtype
== optab_scalar
);
444 if (TREE_CODE (type
) == VECTOR_TYPE
)
446 if (subtype
== optab_vector
)
449 gcc_assert (subtype
== optab_scalar
);
454 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
457 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
459 case REALIGN_LOAD_EXPR
:
460 return vec_realign_load_optab
;
463 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
466 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
468 case WIDEN_MULT_PLUS_EXPR
:
469 return (TYPE_UNSIGNED (type
)
470 ? (TYPE_SATURATING (type
)
471 ? usmadd_widen_optab
: umadd_widen_optab
)
472 : (TYPE_SATURATING (type
)
473 ? ssmadd_widen_optab
: smadd_widen_optab
));
475 case WIDEN_MULT_MINUS_EXPR
:
476 return (TYPE_UNSIGNED (type
)
477 ? (TYPE_SATURATING (type
)
478 ? usmsub_widen_optab
: umsub_widen_optab
)
479 : (TYPE_SATURATING (type
)
480 ? ssmsub_widen_optab
: smsub_widen_optab
));
486 return TYPE_UNSIGNED (type
)
487 ? reduc_umax_scal_optab
: reduc_smax_scal_optab
;
490 return TYPE_UNSIGNED (type
)
491 ? reduc_umin_scal_optab
: reduc_smin_scal_optab
;
493 case REDUC_PLUS_EXPR
:
494 return reduc_plus_scal_optab
;
496 case VEC_RSHIFT_EXPR
:
497 return vec_shr_optab
;
499 case VEC_WIDEN_MULT_HI_EXPR
:
500 return TYPE_UNSIGNED (type
) ?
501 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
503 case VEC_WIDEN_MULT_LO_EXPR
:
504 return TYPE_UNSIGNED (type
) ?
505 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
507 case VEC_WIDEN_MULT_EVEN_EXPR
:
508 return TYPE_UNSIGNED (type
) ?
509 vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
511 case VEC_WIDEN_MULT_ODD_EXPR
:
512 return TYPE_UNSIGNED (type
) ?
513 vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
515 case VEC_WIDEN_LSHIFT_HI_EXPR
:
516 return TYPE_UNSIGNED (type
) ?
517 vec_widen_ushiftl_hi_optab
: vec_widen_sshiftl_hi_optab
;
519 case VEC_WIDEN_LSHIFT_LO_EXPR
:
520 return TYPE_UNSIGNED (type
) ?
521 vec_widen_ushiftl_lo_optab
: vec_widen_sshiftl_lo_optab
;
523 case VEC_UNPACK_HI_EXPR
:
524 return TYPE_UNSIGNED (type
) ?
525 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
527 case VEC_UNPACK_LO_EXPR
:
528 return TYPE_UNSIGNED (type
) ?
529 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
531 case VEC_UNPACK_FLOAT_HI_EXPR
:
532 /* The signedness is determined from input operand. */
533 return TYPE_UNSIGNED (type
) ?
534 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
536 case VEC_UNPACK_FLOAT_LO_EXPR
:
537 /* The signedness is determined from input operand. */
538 return TYPE_UNSIGNED (type
) ?
539 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
541 case VEC_PACK_TRUNC_EXPR
:
542 return vec_pack_trunc_optab
;
544 case VEC_PACK_SAT_EXPR
:
545 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
547 case VEC_PACK_FIX_TRUNC_EXPR
:
548 /* The signedness is determined from output operand. */
549 return TYPE_UNSIGNED (type
) ?
550 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
556 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
559 case POINTER_PLUS_EXPR
:
561 if (TYPE_SATURATING (type
))
562 return TYPE_UNSIGNED (type
) ? usadd_optab
: ssadd_optab
;
563 return trapv
? addv_optab
: add_optab
;
566 if (TYPE_SATURATING (type
))
567 return TYPE_UNSIGNED (type
) ? ussub_optab
: sssub_optab
;
568 return trapv
? subv_optab
: sub_optab
;
571 if (TYPE_SATURATING (type
))
572 return TYPE_UNSIGNED (type
) ? usmul_optab
: ssmul_optab
;
573 return trapv
? smulv_optab
: smul_optab
;
576 if (TYPE_SATURATING (type
))
577 return TYPE_UNSIGNED (type
) ? usneg_optab
: ssneg_optab
;
578 return trapv
? negv_optab
: neg_optab
;
581 return trapv
? absv_optab
: abs_optab
;
584 return unknown_optab
;
588 /* Given optab UNOPTAB that reduces a vector to a scalar, find instead the old
589 optab that produces a vector with the reduction result in one element,
590 for a tree with type TYPE. */
593 scalar_reduc_to_vector (optab unoptab
, const_tree type
)
597 case reduc_plus_scal_optab
:
598 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
600 case reduc_smin_scal_optab
: return reduc_smin_optab
;
601 case reduc_umin_scal_optab
: return reduc_umin_optab
;
602 case reduc_smax_scal_optab
: return reduc_smax_optab
;
603 case reduc_umax_scal_optab
: return reduc_umax_optab
;
604 default: return unknown_optab
;
608 /* Expand vector widening operations.
610 There are two different classes of operations handled here:
611 1) Operations whose result is wider than all the arguments to the operation.
612 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
613 In this case OP0 and optionally OP1 would be initialized,
614 but WIDE_OP wouldn't (not relevant for this case).
615 2) Operations whose result is of the same size as the last argument to the
616 operation, but wider than all the other arguments to the operation.
617 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
618 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
620 E.g, when called to expand the following operations, this is how
621 the arguments will be initialized:
623 widening-sum 2 oprnd0 - oprnd1
624 widening-dot-product 3 oprnd0 oprnd1 oprnd2
625 widening-mult 2 oprnd0 oprnd1 -
626 type-promotion (vec-unpack) 1 oprnd0 - - */
629 expand_widen_pattern_expr (sepops ops
, rtx op0
, rtx op1
, rtx wide_op
,
630 rtx target
, int unsignedp
)
632 struct expand_operand eops
[4];
633 tree oprnd0
, oprnd1
, oprnd2
;
634 enum machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
635 optab widen_pattern_optab
;
636 enum insn_code icode
;
637 int nops
= TREE_CODE_LENGTH (ops
->code
);
641 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
642 widen_pattern_optab
=
643 optab_for_tree_code (ops
->code
, TREE_TYPE (oprnd0
), optab_default
);
644 if (ops
->code
== WIDEN_MULT_PLUS_EXPR
645 || ops
->code
== WIDEN_MULT_MINUS_EXPR
)
646 icode
= find_widening_optab_handler (widen_pattern_optab
,
647 TYPE_MODE (TREE_TYPE (ops
->op2
)),
650 icode
= optab_handler (widen_pattern_optab
, tmode0
);
651 gcc_assert (icode
!= CODE_FOR_nothing
);
656 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
659 /* The last operand is of a wider mode than the rest of the operands. */
664 gcc_assert (tmode1
== tmode0
);
667 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
671 create_output_operand (&eops
[op
++], target
, TYPE_MODE (ops
->type
));
672 create_convert_operand_from (&eops
[op
++], op0
, tmode0
, unsignedp
);
674 create_convert_operand_from (&eops
[op
++], op1
, tmode1
, unsignedp
);
676 create_convert_operand_from (&eops
[op
++], wide_op
, wmode
, unsignedp
);
677 expand_insn (icode
, op
, eops
);
678 return eops
[0].value
;
681 /* Generate code to perform an operation specified by TERNARY_OPTAB
682 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
684 UNSIGNEDP is for the case where we have to widen the operands
685 to perform the operation. It says to use zero-extension.
687 If TARGET is nonzero, the value
688 is generated there, if it is convenient to do so.
689 In all cases an rtx is returned for the locus of the value;
690 this may or may not be TARGET. */
693 expand_ternary_op (enum machine_mode mode
, optab ternary_optab
, rtx op0
,
694 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
696 struct expand_operand ops
[4];
697 enum insn_code icode
= optab_handler (ternary_optab
, mode
);
699 gcc_assert (optab_handler (ternary_optab
, mode
) != CODE_FOR_nothing
);
701 create_output_operand (&ops
[0], target
, mode
);
702 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
703 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
704 create_convert_operand_from (&ops
[3], op2
, mode
, unsignedp
);
705 expand_insn (icode
, 4, ops
);
710 /* Like expand_binop, but return a constant rtx if the result can be
711 calculated at compile time. The arguments and return value are
712 otherwise the same as for expand_binop. */
715 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
716 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
717 enum optab_methods methods
)
719 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
721 rtx x
= simplify_binary_operation (optab_to_code (binoptab
),
727 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
730 /* Like simplify_expand_binop, but always put the result in TARGET.
731 Return true if the expansion succeeded. */
734 force_expand_binop (enum machine_mode mode
, optab binoptab
,
735 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
736 enum optab_methods methods
)
738 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
739 target
, unsignedp
, methods
);
743 emit_move_insn (target
, x
);
747 /* Generate insns for VEC_RSHIFT_EXPR. */
750 expand_vec_shift_expr (sepops ops
, rtx target
)
752 struct expand_operand eops
[3];
753 enum insn_code icode
;
754 rtx rtx_op1
, rtx_op2
;
755 enum machine_mode mode
= TYPE_MODE (ops
->type
);
756 tree vec_oprnd
= ops
->op0
;
757 tree shift_oprnd
= ops
->op1
;
759 gcc_assert (ops
->code
== VEC_RSHIFT_EXPR
);
761 icode
= optab_handler (vec_shr_optab
, mode
);
762 gcc_assert (icode
!= CODE_FOR_nothing
);
764 rtx_op1
= expand_normal (vec_oprnd
);
765 rtx_op2
= expand_normal (shift_oprnd
);
767 create_output_operand (&eops
[0], target
, mode
);
768 create_input_operand (&eops
[1], rtx_op1
, GET_MODE (rtx_op1
));
769 create_convert_operand_from_type (&eops
[2], rtx_op2
, TREE_TYPE (shift_oprnd
));
770 expand_insn (icode
, 3, eops
);
772 return eops
[0].value
;
775 /* Create a new vector value in VMODE with all elements set to OP. The
776 mode of OP must be the element mode of VMODE. If OP is a constant,
777 then the return value will be a constant. */
780 expand_vector_broadcast (enum machine_mode vmode
, rtx op
)
782 enum insn_code icode
;
787 gcc_checking_assert (VECTOR_MODE_P (vmode
));
789 n
= GET_MODE_NUNITS (vmode
);
790 vec
= rtvec_alloc (n
);
791 for (i
= 0; i
< n
; ++i
)
792 RTVEC_ELT (vec
, i
) = op
;
795 return gen_rtx_CONST_VECTOR (vmode
, vec
);
797 /* ??? If the target doesn't have a vec_init, then we have no easy way
798 of performing this operation. Most of this sort of generic support
799 is hidden away in the vector lowering support in gimple. */
800 icode
= optab_handler (vec_init_optab
, vmode
);
801 if (icode
== CODE_FOR_nothing
)
804 ret
= gen_reg_rtx (vmode
);
805 emit_insn (GEN_FCN (icode
) (ret
, gen_rtx_PARALLEL (vmode
, vec
)));
810 /* This subroutine of expand_doubleword_shift handles the cases in which
811 the effective shift value is >= BITS_PER_WORD. The arguments and return
812 value are the same as for the parent routine, except that SUPERWORD_OP1
813 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
814 INTO_TARGET may be null if the caller has decided to calculate it. */
817 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
818 rtx outof_target
, rtx into_target
,
819 int unsignedp
, enum optab_methods methods
)
821 if (into_target
!= 0)
822 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
823 into_target
, unsignedp
, methods
))
826 if (outof_target
!= 0)
828 /* For a signed right shift, we must fill OUTOF_TARGET with copies
829 of the sign bit, otherwise we must fill it with zeros. */
830 if (binoptab
!= ashr_optab
)
831 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
833 if (!force_expand_binop (word_mode
, binoptab
,
834 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
835 outof_target
, unsignedp
, methods
))
841 /* This subroutine of expand_doubleword_shift handles the cases in which
842 the effective shift value is < BITS_PER_WORD. The arguments and return
843 value are the same as for the parent routine. */
846 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
847 rtx outof_input
, rtx into_input
, rtx op1
,
848 rtx outof_target
, rtx into_target
,
849 int unsignedp
, enum optab_methods methods
,
850 unsigned HOST_WIDE_INT shift_mask
)
852 optab reverse_unsigned_shift
, unsigned_shift
;
855 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
856 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
858 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
859 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
860 the opposite direction to BINOPTAB. */
861 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
863 carries
= outof_input
;
864 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
865 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
870 /* We must avoid shifting by BITS_PER_WORD bits since that is either
871 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
872 has unknown behavior. Do a single shift first, then shift by the
873 remainder. It's OK to use ~OP1 as the remainder if shift counts
874 are truncated to the mode size. */
875 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
876 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
877 if (shift_mask
== BITS_PER_WORD
- 1)
879 tmp
= immed_double_const (-1, -1, op1_mode
);
880 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
885 tmp
= immed_double_const (BITS_PER_WORD
- 1, 0, op1_mode
);
886 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
890 if (tmp
== 0 || carries
== 0)
892 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
893 carries
, tmp
, 0, unsignedp
, methods
);
897 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
898 so the result can go directly into INTO_TARGET if convenient. */
899 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
900 into_target
, unsignedp
, methods
);
904 /* Now OR in the bits carried over from OUTOF_INPUT. */
905 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
906 into_target
, unsignedp
, methods
))
909 /* Use a standard word_mode shift for the out-of half. */
910 if (outof_target
!= 0)
911 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
912 outof_target
, unsignedp
, methods
))
919 #ifdef HAVE_conditional_move
920 /* Try implementing expand_doubleword_shift using conditional moves.
921 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
922 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
923 are the shift counts to use in the former and latter case. All other
924 arguments are the same as the parent routine. */
927 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
928 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
929 rtx outof_input
, rtx into_input
,
930 rtx subword_op1
, rtx superword_op1
,
931 rtx outof_target
, rtx into_target
,
932 int unsignedp
, enum optab_methods methods
,
933 unsigned HOST_WIDE_INT shift_mask
)
935 rtx outof_superword
, into_superword
;
937 /* Put the superword version of the output into OUTOF_SUPERWORD and
939 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
940 if (outof_target
!= 0 && subword_op1
== superword_op1
)
942 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
943 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
944 into_superword
= outof_target
;
945 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
946 outof_superword
, 0, unsignedp
, methods
))
951 into_superword
= gen_reg_rtx (word_mode
);
952 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
953 outof_superword
, into_superword
,
958 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
959 if (!expand_subword_shift (op1_mode
, binoptab
,
960 outof_input
, into_input
, subword_op1
,
961 outof_target
, into_target
,
962 unsignedp
, methods
, shift_mask
))
965 /* Select between them. Do the INTO half first because INTO_SUPERWORD
966 might be the current value of OUTOF_TARGET. */
967 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
968 into_target
, into_superword
, word_mode
, false))
971 if (outof_target
!= 0)
972 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
973 outof_target
, outof_superword
,
981 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
982 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
983 input operand; the shift moves bits in the direction OUTOF_INPUT->
984 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
985 of the target. OP1 is the shift count and OP1_MODE is its mode.
986 If OP1 is constant, it will have been truncated as appropriate
987 and is known to be nonzero.
989 If SHIFT_MASK is zero, the result of word shifts is undefined when the
990 shift count is outside the range [0, BITS_PER_WORD). This routine must
991 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
993 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
994 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
995 fill with zeros or sign bits as appropriate.
997 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
998 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
999 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
1000 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
1003 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
1004 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
1005 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1006 function wants to calculate it itself.
1008 Return true if the shift could be successfully synthesized. */
1011 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
1012 rtx outof_input
, rtx into_input
, rtx op1
,
1013 rtx outof_target
, rtx into_target
,
1014 int unsignedp
, enum optab_methods methods
,
1015 unsigned HOST_WIDE_INT shift_mask
)
1017 rtx superword_op1
, tmp
, cmp1
, cmp2
;
1018 rtx subword_label
, done_label
;
1019 enum rtx_code cmp_code
;
1021 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1022 fill the result with sign or zero bits as appropriate. If so, the value
1023 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1024 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1025 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1027 This isn't worthwhile for constant shifts since the optimizers will
1028 cope better with in-range shift counts. */
1029 if (shift_mask
>= BITS_PER_WORD
1030 && outof_target
!= 0
1031 && !CONSTANT_P (op1
))
1033 if (!expand_doubleword_shift (op1_mode
, binoptab
,
1034 outof_input
, into_input
, op1
,
1036 unsignedp
, methods
, shift_mask
))
1038 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
1039 outof_target
, unsignedp
, methods
))
1044 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1045 is true when the effective shift value is less than BITS_PER_WORD.
1046 Set SUPERWORD_OP1 to the shift count that should be used to shift
1047 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1048 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
1049 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1051 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1052 is a subword shift count. */
1053 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1055 cmp2
= CONST0_RTX (op1_mode
);
1057 superword_op1
= op1
;
1061 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1062 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1064 cmp2
= CONST0_RTX (op1_mode
);
1066 superword_op1
= cmp1
;
1071 /* If we can compute the condition at compile time, pick the
1072 appropriate subroutine. */
1073 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1074 if (tmp
!= 0 && CONST_INT_P (tmp
))
1076 if (tmp
== const0_rtx
)
1077 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1078 outof_target
, into_target
,
1079 unsignedp
, methods
);
1081 return expand_subword_shift (op1_mode
, binoptab
,
1082 outof_input
, into_input
, op1
,
1083 outof_target
, into_target
,
1084 unsignedp
, methods
, shift_mask
);
1087 #ifdef HAVE_conditional_move
1088 /* Try using conditional moves to generate straight-line code. */
1090 rtx start
= get_last_insn ();
1091 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1092 cmp_code
, cmp1
, cmp2
,
1093 outof_input
, into_input
,
1095 outof_target
, into_target
,
1096 unsignedp
, methods
, shift_mask
))
1098 delete_insns_since (start
);
1102 /* As a last resort, use branches to select the correct alternative. */
1103 subword_label
= gen_label_rtx ();
1104 done_label
= gen_label_rtx ();
1107 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1108 0, 0, subword_label
, -1);
1111 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1112 outof_target
, into_target
,
1113 unsignedp
, methods
))
1116 emit_jump_insn (gen_jump (done_label
));
1118 emit_label (subword_label
);
1120 if (!expand_subword_shift (op1_mode
, binoptab
,
1121 outof_input
, into_input
, op1
,
1122 outof_target
, into_target
,
1123 unsignedp
, methods
, shift_mask
))
1126 emit_label (done_label
);
1130 /* Subroutine of expand_binop. Perform a double word multiplication of
1131 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1132 as the target's word_mode. This function return NULL_RTX if anything
1133 goes wrong, in which case it may have already emitted instructions
1134 which need to be deleted.
1136 If we want to multiply two two-word values and have normal and widening
1137 multiplies of single-word values, we can do this with three smaller
1140 The multiplication proceeds as follows:
1141 _______________________
1142 [__op0_high_|__op0_low__]
1143 _______________________
1144 * [__op1_high_|__op1_low__]
1145 _______________________________________________
1146 _______________________
1147 (1) [__op0_low__*__op1_low__]
1148 _______________________
1149 (2a) [__op0_low__*__op1_high_]
1150 _______________________
1151 (2b) [__op0_high_*__op1_low__]
1152 _______________________
1153 (3) [__op0_high_*__op1_high_]
1156 This gives a 4-word result. Since we are only interested in the
1157 lower 2 words, partial result (3) and the upper words of (2a) and
1158 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1159 calculated using non-widening multiplication.
1161 (1), however, needs to be calculated with an unsigned widening
1162 multiplication. If this operation is not directly supported we
1163 try using a signed widening multiplication and adjust the result.
1164 This adjustment works as follows:
1166 If both operands are positive then no adjustment is needed.
1168 If the operands have different signs, for example op0_low < 0 and
1169 op1_low >= 0, the instruction treats the most significant bit of
1170 op0_low as a sign bit instead of a bit with significance
1171 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1172 with 2**BITS_PER_WORD - op0_low, and two's complements the
1173 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1176 Similarly, if both operands are negative, we need to add
1177 (op0_low + op1_low) * 2**BITS_PER_WORD.
1179 We use a trick to adjust quickly. We logically shift op0_low right
1180 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1181 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1182 logical shift exists, we do an arithmetic right shift and subtract
1186 expand_doubleword_mult (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1187 bool umulp
, enum optab_methods methods
)
1189 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1190 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1191 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1192 rtx product
, adjust
, product_high
, temp
;
1194 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1195 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1196 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1197 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1199 /* If we're using an unsigned multiply to directly compute the product
1200 of the low-order words of the operands and perform any required
1201 adjustments of the operands, we begin by trying two more multiplications
1202 and then computing the appropriate sum.
1204 We have checked above that the required addition is provided.
1205 Full-word addition will normally always succeed, especially if
1206 it is provided at all, so we don't worry about its failure. The
1207 multiplication may well fail, however, so we do handle that. */
1211 /* ??? This could be done with emit_store_flag where available. */
1212 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1213 NULL_RTX
, 1, methods
);
1215 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1216 NULL_RTX
, 0, OPTAB_DIRECT
);
1219 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1220 NULL_RTX
, 0, methods
);
1223 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1224 NULL_RTX
, 0, OPTAB_DIRECT
);
1231 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1232 NULL_RTX
, 0, OPTAB_DIRECT
);
1236 /* OP0_HIGH should now be dead. */
1240 /* ??? This could be done with emit_store_flag where available. */
1241 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1242 NULL_RTX
, 1, methods
);
1244 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1245 NULL_RTX
, 0, OPTAB_DIRECT
);
1248 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1249 NULL_RTX
, 0, methods
);
1252 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1253 NULL_RTX
, 0, OPTAB_DIRECT
);
1260 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1261 NULL_RTX
, 0, OPTAB_DIRECT
);
1265 /* OP1_HIGH should now be dead. */
1267 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1268 NULL_RTX
, 0, OPTAB_DIRECT
);
1270 if (target
&& !REG_P (target
))
1274 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1275 target
, 1, OPTAB_DIRECT
);
1277 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1278 target
, 1, OPTAB_DIRECT
);
1283 product_high
= operand_subword (product
, high
, 1, mode
);
1284 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1285 NULL_RTX
, 0, OPTAB_DIRECT
);
1286 emit_move_insn (product_high
, adjust
);
1290 /* Wrapper around expand_binop which takes an rtx code to specify
1291 the operation to perform, not an optab pointer. All other
1292 arguments are the same. */
1294 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1295 rtx op1
, rtx target
, int unsignedp
,
1296 enum optab_methods methods
)
1298 optab binop
= code_to_optab (code
);
1301 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1304 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1305 binop. Order them according to commutative_operand_precedence and, if
1306 possible, try to put TARGET or a pseudo first. */
1308 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1310 int op0_prec
= commutative_operand_precedence (op0
);
1311 int op1_prec
= commutative_operand_precedence (op1
);
1313 if (op0_prec
< op1_prec
)
1316 if (op0_prec
> op1_prec
)
1319 /* With equal precedence, both orders are ok, but it is better if the
1320 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1321 if (target
== 0 || REG_P (target
))
1322 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1324 return rtx_equal_p (op1
, target
);
1327 /* Return true if BINOPTAB implements a shift operation. */
1330 shift_optab_p (optab binoptab
)
1332 switch (optab_to_code (binoptab
))
1348 /* Return true if BINOPTAB implements a commutative binary operation. */
1351 commutative_optab_p (optab binoptab
)
1353 return (GET_RTX_CLASS (optab_to_code (binoptab
)) == RTX_COMM_ARITH
1354 || binoptab
== smul_widen_optab
1355 || binoptab
== umul_widen_optab
1356 || binoptab
== smul_highpart_optab
1357 || binoptab
== umul_highpart_optab
);
1360 /* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
1361 optimizing, and if the operand is a constant that costs more than
1362 1 instruction, force the constant into a register and return that
1363 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1366 avoid_expensive_constant (enum machine_mode mode
, optab binoptab
,
1367 int opn
, rtx x
, bool unsignedp
)
1369 bool speed
= optimize_insn_for_speed_p ();
1371 if (mode
!= VOIDmode
1374 && (rtx_cost (x
, optab_to_code (binoptab
), opn
, speed
)
1375 > set_src_cost (x
, speed
)))
1377 if (CONST_INT_P (x
))
1379 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1380 if (intval
!= INTVAL (x
))
1381 x
= GEN_INT (intval
);
1384 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1385 x
= force_reg (mode
, x
);
1390 /* Helper function for expand_binop: handle the case where there
1391 is an insn that directly implements the indicated operation.
1392 Returns null if this is not possible. */
1394 expand_binop_directly (enum machine_mode mode
, optab binoptab
,
1396 rtx target
, int unsignedp
, enum optab_methods methods
,
1399 enum machine_mode from_mode
= widened_mode (mode
, op0
, op1
);
1400 enum insn_code icode
= find_widening_optab_handler (binoptab
, mode
,
1402 enum machine_mode xmode0
= insn_data
[(int) icode
].operand
[1].mode
;
1403 enum machine_mode xmode1
= insn_data
[(int) icode
].operand
[2].mode
;
1404 enum machine_mode mode0
, mode1
, tmp_mode
;
1405 struct expand_operand ops
[3];
1408 rtx xop0
= op0
, xop1
= op1
;
1411 /* If it is a commutative operator and the modes would match
1412 if we would swap the operands, we can save the conversions. */
1413 commutative_p
= commutative_optab_p (binoptab
);
1415 && GET_MODE (xop0
) != xmode0
&& GET_MODE (xop1
) != xmode1
1416 && GET_MODE (xop0
) == xmode1
&& GET_MODE (xop1
) == xmode1
)
1423 /* If we are optimizing, force expensive constants into a register. */
1424 xop0
= avoid_expensive_constant (xmode0
, binoptab
, 0, xop0
, unsignedp
);
1425 if (!shift_optab_p (binoptab
))
1426 xop1
= avoid_expensive_constant (xmode1
, binoptab
, 1, xop1
, unsignedp
);
1428 /* In case the insn wants input operands in modes different from
1429 those of the actual operands, convert the operands. It would
1430 seem that we don't need to convert CONST_INTs, but we do, so
1431 that they're properly zero-extended, sign-extended or truncated
1434 mode0
= GET_MODE (xop0
) != VOIDmode
? GET_MODE (xop0
) : mode
;
1435 if (xmode0
!= VOIDmode
&& xmode0
!= mode0
)
1437 xop0
= convert_modes (xmode0
, mode0
, xop0
, unsignedp
);
1441 mode1
= GET_MODE (xop1
) != VOIDmode
? GET_MODE (xop1
) : mode
;
1442 if (xmode1
!= VOIDmode
&& xmode1
!= mode1
)
1444 xop1
= convert_modes (xmode1
, mode1
, xop1
, unsignedp
);
1448 /* If operation is commutative,
1449 try to make the first operand a register.
1450 Even better, try to make it the same as the target.
1451 Also try to make the last operand a constant. */
1453 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1460 /* Now, if insn's predicates don't allow our operands, put them into
1463 if (binoptab
== vec_pack_trunc_optab
1464 || binoptab
== vec_pack_usat_optab
1465 || binoptab
== vec_pack_ssat_optab
1466 || binoptab
== vec_pack_ufix_trunc_optab
1467 || binoptab
== vec_pack_sfix_trunc_optab
)
1469 /* The mode of the result is different then the mode of the
1471 tmp_mode
= insn_data
[(int) icode
].operand
[0].mode
;
1472 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1474 delete_insns_since (last
);
1481 create_output_operand (&ops
[0], target
, tmp_mode
);
1482 create_input_operand (&ops
[1], xop0
, mode0
);
1483 create_input_operand (&ops
[2], xop1
, mode1
);
1484 pat
= maybe_gen_insn (icode
, 3, ops
);
1487 /* If PAT is composed of more than one insn, try to add an appropriate
1488 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1489 operand, call expand_binop again, this time without a target. */
1490 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1491 && ! add_equal_note (pat
, ops
[0].value
, optab_to_code (binoptab
),
1492 ops
[1].value
, ops
[2].value
))
1494 delete_insns_since (last
);
1495 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1496 unsignedp
, methods
);
1500 return ops
[0].value
;
1502 delete_insns_since (last
);
1506 /* Generate code to perform an operation specified by BINOPTAB
1507 on operands OP0 and OP1, with result having machine-mode MODE.
1509 UNSIGNEDP is for the case where we have to widen the operands
1510 to perform the operation. It says to use zero-extension.
1512 If TARGET is nonzero, the value
1513 is generated there, if it is convenient to do so.
1514 In all cases an rtx is returned for the locus of the value;
1515 this may or may not be TARGET. */
1518 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1519 rtx target
, int unsignedp
, enum optab_methods methods
)
1521 enum optab_methods next_methods
1522 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1523 ? OPTAB_WIDEN
: methods
);
1524 enum mode_class mclass
;
1525 enum machine_mode wider_mode
;
1528 rtx entry_last
= get_last_insn ();
1531 mclass
= GET_MODE_CLASS (mode
);
1533 /* If subtracting an integer constant, convert this into an addition of
1534 the negated constant. */
1536 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1538 op1
= negate_rtx (mode
, op1
);
1539 binoptab
= add_optab
;
1542 /* Record where to delete back to if we backtrack. */
1543 last
= get_last_insn ();
1545 /* If we can do it with a three-operand insn, do so. */
1547 if (methods
!= OPTAB_MUST_WIDEN
1548 && find_widening_optab_handler (binoptab
, mode
,
1549 widened_mode (mode
, op0
, op1
), 1)
1550 != CODE_FOR_nothing
)
1552 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1553 unsignedp
, methods
, last
);
1558 /* If we were trying to rotate, and that didn't work, try rotating
1559 the other direction before falling back to shifts and bitwise-or. */
1560 if (((binoptab
== rotl_optab
1561 && optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
1562 || (binoptab
== rotr_optab
1563 && optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
))
1564 && mclass
== MODE_INT
)
1566 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1568 unsigned int bits
= GET_MODE_PRECISION (mode
);
1570 if (CONST_INT_P (op1
))
1571 newop1
= GEN_INT (bits
- INTVAL (op1
));
1572 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1573 newop1
= negate_rtx (GET_MODE (op1
), op1
);
1575 newop1
= expand_binop (GET_MODE (op1
), sub_optab
,
1576 gen_int_mode (bits
, GET_MODE (op1
)), op1
,
1577 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1579 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1580 target
, unsignedp
, methods
, last
);
1585 /* If this is a multiply, see if we can do a widening operation that
1586 takes operands of this mode and makes a wider mode. */
1588 if (binoptab
== smul_optab
1589 && GET_MODE_2XWIDER_MODE (mode
) != VOIDmode
1590 && (widening_optab_handler ((unsignedp
? umul_widen_optab
1591 : smul_widen_optab
),
1592 GET_MODE_2XWIDER_MODE (mode
), mode
)
1593 != CODE_FOR_nothing
))
1595 temp
= expand_binop (GET_MODE_2XWIDER_MODE (mode
),
1596 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1597 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1601 if (GET_MODE_CLASS (mode
) == MODE_INT
1602 && TRULY_NOOP_TRUNCATION_MODES_P (mode
, GET_MODE (temp
)))
1603 return gen_lowpart (mode
, temp
);
1605 return convert_to_mode (mode
, temp
, unsignedp
);
1609 /* If this is a vector shift by a scalar, see if we can do a vector
1610 shift by a vector. If so, broadcast the scalar into a vector. */
1611 if (mclass
== MODE_VECTOR_INT
)
1613 optab otheroptab
= unknown_optab
;
1615 if (binoptab
== ashl_optab
)
1616 otheroptab
= vashl_optab
;
1617 else if (binoptab
== ashr_optab
)
1618 otheroptab
= vashr_optab
;
1619 else if (binoptab
== lshr_optab
)
1620 otheroptab
= vlshr_optab
;
1621 else if (binoptab
== rotl_optab
)
1622 otheroptab
= vrotl_optab
;
1623 else if (binoptab
== rotr_optab
)
1624 otheroptab
= vrotr_optab
;
1626 if (otheroptab
&& optab_handler (otheroptab
, mode
) != CODE_FOR_nothing
)
1628 rtx vop1
= expand_vector_broadcast (mode
, op1
);
1631 temp
= expand_binop_directly (mode
, otheroptab
, op0
, vop1
,
1632 target
, unsignedp
, methods
, last
);
1639 /* Look for a wider mode of the same class for which we think we
1640 can open-code the operation. Check for a widening multiply at the
1641 wider mode as well. */
1643 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1644 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1645 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1646 wider_mode
!= VOIDmode
;
1647 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1649 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
1650 || (binoptab
== smul_optab
1651 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1652 && (find_widening_optab_handler ((unsignedp
1654 : smul_widen_optab
),
1655 GET_MODE_WIDER_MODE (wider_mode
),
1657 != CODE_FOR_nothing
)))
1659 rtx xop0
= op0
, xop1
= op1
;
1662 /* For certain integer operations, we need not actually extend
1663 the narrow operands, as long as we will truncate
1664 the results to the same narrowness. */
1666 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1667 || binoptab
== xor_optab
1668 || binoptab
== add_optab
|| binoptab
== sub_optab
1669 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1670 && mclass
== MODE_INT
)
1673 xop0
= avoid_expensive_constant (mode
, binoptab
, 0,
1675 if (binoptab
!= ashl_optab
)
1676 xop1
= avoid_expensive_constant (mode
, binoptab
, 1,
1680 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1682 /* The second operand of a shift must always be extended. */
1683 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1684 no_extend
&& binoptab
!= ashl_optab
);
1686 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1687 unsignedp
, OPTAB_DIRECT
);
1690 if (mclass
!= MODE_INT
1691 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
1694 target
= gen_reg_rtx (mode
);
1695 convert_move (target
, temp
, 0);
1699 return gen_lowpart (mode
, temp
);
1702 delete_insns_since (last
);
1706 /* If operation is commutative,
1707 try to make the first operand a register.
1708 Even better, try to make it the same as the target.
1709 Also try to make the last operand a constant. */
1710 if (commutative_optab_p (binoptab
)
1711 && swap_commutative_operands_with_target (target
, op0
, op1
))
1718 /* These can be done a word at a time. */
1719 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1720 && mclass
== MODE_INT
1721 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1722 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1727 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1728 won't be accurate, so use a new target. */
1732 || !valid_multiword_target_p (target
))
1733 target
= gen_reg_rtx (mode
);
1737 /* Do the actual arithmetic. */
1738 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1740 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1741 rtx x
= expand_binop (word_mode
, binoptab
,
1742 operand_subword_force (op0
, i
, mode
),
1743 operand_subword_force (op1
, i
, mode
),
1744 target_piece
, unsignedp
, next_methods
);
1749 if (target_piece
!= x
)
1750 emit_move_insn (target_piece
, x
);
1753 insns
= get_insns ();
1756 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1763 /* Synthesize double word shifts from single word shifts. */
1764 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1765 || binoptab
== ashr_optab
)
1766 && mclass
== MODE_INT
1767 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1768 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1769 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
)
1770 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
1771 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1772 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1774 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1775 enum machine_mode op1_mode
;
1777 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1778 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1779 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1781 /* Apply the truncation to constant shifts. */
1782 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1783 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1785 if (op1
== CONST0_RTX (op1_mode
))
1788 /* Make sure that this is a combination that expand_doubleword_shift
1789 can handle. See the comments there for details. */
1790 if (double_shift_mask
== 0
1791 || (shift_mask
== BITS_PER_WORD
- 1
1792 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1795 rtx into_target
, outof_target
;
1796 rtx into_input
, outof_input
;
1797 int left_shift
, outof_word
;
1799 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1800 won't be accurate, so use a new target. */
1804 || !valid_multiword_target_p (target
))
1805 target
= gen_reg_rtx (mode
);
1809 /* OUTOF_* is the word we are shifting bits away from, and
1810 INTO_* is the word that we are shifting bits towards, thus
1811 they differ depending on the direction of the shift and
1812 WORDS_BIG_ENDIAN. */
1814 left_shift
= binoptab
== ashl_optab
;
1815 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1817 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1818 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1820 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1821 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1823 if (expand_doubleword_shift (op1_mode
, binoptab
,
1824 outof_input
, into_input
, op1
,
1825 outof_target
, into_target
,
1826 unsignedp
, next_methods
, shift_mask
))
1828 insns
= get_insns ();
1838 /* Synthesize double word rotates from single word shifts. */
1839 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1840 && mclass
== MODE_INT
1841 && CONST_INT_P (op1
)
1842 && GET_MODE_PRECISION (mode
) == 2 * BITS_PER_WORD
1843 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1844 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1847 rtx into_target
, outof_target
;
1848 rtx into_input
, outof_input
;
1850 int shift_count
, left_shift
, outof_word
;
1852 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1853 won't be accurate, so use a new target. Do this also if target is not
1854 a REG, first because having a register instead may open optimization
1855 opportunities, and second because if target and op0 happen to be MEMs
1856 designating the same location, we would risk clobbering it too early
1857 in the code sequence we generate below. */
1862 || !valid_multiword_target_p (target
))
1863 target
= gen_reg_rtx (mode
);
1867 shift_count
= INTVAL (op1
);
1869 /* OUTOF_* is the word we are shifting bits away from, and
1870 INTO_* is the word that we are shifting bits towards, thus
1871 they differ depending on the direction of the shift and
1872 WORDS_BIG_ENDIAN. */
1874 left_shift
= (binoptab
== rotl_optab
);
1875 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1877 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1878 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1880 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1881 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1883 if (shift_count
== BITS_PER_WORD
)
1885 /* This is just a word swap. */
1886 emit_move_insn (outof_target
, into_input
);
1887 emit_move_insn (into_target
, outof_input
);
1892 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1893 rtx first_shift_count
, second_shift_count
;
1894 optab reverse_unsigned_shift
, unsigned_shift
;
1896 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1897 ? lshr_optab
: ashl_optab
);
1899 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1900 ? ashl_optab
: lshr_optab
);
1902 if (shift_count
> BITS_PER_WORD
)
1904 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1905 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1909 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1910 second_shift_count
= GEN_INT (shift_count
);
1913 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1914 outof_input
, first_shift_count
,
1915 NULL_RTX
, unsignedp
, next_methods
);
1916 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1917 into_input
, second_shift_count
,
1918 NULL_RTX
, unsignedp
, next_methods
);
1920 if (into_temp1
!= 0 && into_temp2
!= 0)
1921 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1922 into_target
, unsignedp
, next_methods
);
1926 if (inter
!= 0 && inter
!= into_target
)
1927 emit_move_insn (into_target
, inter
);
1929 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1930 into_input
, first_shift_count
,
1931 NULL_RTX
, unsignedp
, next_methods
);
1932 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1933 outof_input
, second_shift_count
,
1934 NULL_RTX
, unsignedp
, next_methods
);
1936 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1937 inter
= expand_binop (word_mode
, ior_optab
,
1938 outof_temp1
, outof_temp2
,
1939 outof_target
, unsignedp
, next_methods
);
1941 if (inter
!= 0 && inter
!= outof_target
)
1942 emit_move_insn (outof_target
, inter
);
1945 insns
= get_insns ();
1955 /* These can be done a word at a time by propagating carries. */
1956 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1957 && mclass
== MODE_INT
1958 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1959 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1962 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1963 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1964 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1965 rtx xop0
, xop1
, xtarget
;
1967 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1968 value is one of those, use it. Otherwise, use 1 since it is the
1969 one easiest to get. */
1970 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1971 int normalizep
= STORE_FLAG_VALUE
;
1976 /* Prepare the operands. */
1977 xop0
= force_reg (mode
, op0
);
1978 xop1
= force_reg (mode
, op1
);
1980 xtarget
= gen_reg_rtx (mode
);
1982 if (target
== 0 || !REG_P (target
) || !valid_multiword_target_p (target
))
1985 /* Indicate for flow that the entire target reg is being set. */
1987 emit_clobber (xtarget
);
1989 /* Do the actual arithmetic. */
1990 for (i
= 0; i
< nwords
; i
++)
1992 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1993 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1994 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1995 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1998 /* Main add/subtract of the input operands. */
1999 x
= expand_binop (word_mode
, binoptab
,
2000 op0_piece
, op1_piece
,
2001 target_piece
, unsignedp
, next_methods
);
2007 /* Store carry from main add/subtract. */
2008 carry_out
= gen_reg_rtx (word_mode
);
2009 carry_out
= emit_store_flag_force (carry_out
,
2010 (binoptab
== add_optab
2013 word_mode
, 1, normalizep
);
2020 /* Add/subtract previous carry to main result. */
2021 newx
= expand_binop (word_mode
,
2022 normalizep
== 1 ? binoptab
: otheroptab
,
2024 NULL_RTX
, 1, next_methods
);
2028 /* Get out carry from adding/subtracting carry in. */
2029 rtx carry_tmp
= gen_reg_rtx (word_mode
);
2030 carry_tmp
= emit_store_flag_force (carry_tmp
,
2031 (binoptab
== add_optab
2034 word_mode
, 1, normalizep
);
2036 /* Logical-ior the two poss. carry together. */
2037 carry_out
= expand_binop (word_mode
, ior_optab
,
2038 carry_out
, carry_tmp
,
2039 carry_out
, 0, next_methods
);
2043 emit_move_insn (target_piece
, newx
);
2047 if (x
!= target_piece
)
2048 emit_move_insn (target_piece
, x
);
2051 carry_in
= carry_out
;
2054 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2056 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
2057 || ! rtx_equal_p (target
, xtarget
))
2059 rtx temp
= emit_move_insn (target
, xtarget
);
2061 set_dst_reg_note (temp
, REG_EQUAL
,
2062 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2063 mode
, copy_rtx (xop0
),
2074 delete_insns_since (last
);
2077 /* Attempt to synthesize double word multiplies using a sequence of word
2078 mode multiplications. We first attempt to generate a sequence using a
2079 more efficient unsigned widening multiply, and if that fails we then
2080 try using a signed widening multiply. */
2082 if (binoptab
== smul_optab
2083 && mclass
== MODE_INT
2084 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2085 && optab_handler (smul_optab
, word_mode
) != CODE_FOR_nothing
2086 && optab_handler (add_optab
, word_mode
) != CODE_FOR_nothing
)
2088 rtx product
= NULL_RTX
;
2089 if (widening_optab_handler (umul_widen_optab
, mode
, word_mode
)
2090 != CODE_FOR_nothing
)
2092 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2095 delete_insns_since (last
);
2098 if (product
== NULL_RTX
2099 && widening_optab_handler (smul_widen_optab
, mode
, word_mode
)
2100 != CODE_FOR_nothing
)
2102 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2105 delete_insns_since (last
);
2108 if (product
!= NULL_RTX
)
2110 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
2112 temp
= emit_move_insn (target
? target
: product
, product
);
2113 set_dst_reg_note (temp
,
2115 gen_rtx_fmt_ee (MULT
, mode
,
2118 target
? target
: product
);
2124 /* It can't be open-coded in this mode.
2125 Use a library call if one is available and caller says that's ok. */
2127 libfunc
= optab_libfunc (binoptab
, mode
);
2129 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2133 enum machine_mode op1_mode
= mode
;
2138 if (shift_optab_p (binoptab
))
2140 op1_mode
= targetm
.libgcc_shift_count_mode ();
2141 /* Specify unsigned here,
2142 since negative shift counts are meaningless. */
2143 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2146 if (GET_MODE (op0
) != VOIDmode
2147 && GET_MODE (op0
) != mode
)
2148 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2150 /* Pass 1 for NO_QUEUE so we don't lose any increments
2151 if the libcall is cse'd or moved. */
2152 value
= emit_library_call_value (libfunc
,
2153 NULL_RTX
, LCT_CONST
, mode
, 2,
2154 op0
, mode
, op1x
, op1_mode
);
2156 insns
= get_insns ();
2159 target
= gen_reg_rtx (mode
);
2160 emit_libcall_block_1 (insns
, target
, value
,
2161 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2163 trapv_binoptab_p (binoptab
));
2168 delete_insns_since (last
);
2170 /* It can't be done in this mode. Can we do it in a wider mode? */
2172 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2173 || methods
== OPTAB_MUST_WIDEN
))
2175 /* Caller says, don't even try. */
2176 delete_insns_since (entry_last
);
2180 /* Compute the value of METHODS to pass to recursive calls.
2181 Don't allow widening to be tried recursively. */
2183 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2185 /* Look for a wider mode of the same class for which it appears we can do
2188 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2190 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2191 wider_mode
!= VOIDmode
;
2192 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2194 if (find_widening_optab_handler (binoptab
, wider_mode
, mode
, 1)
2196 || (methods
== OPTAB_LIB
2197 && optab_libfunc (binoptab
, wider_mode
)))
2199 rtx xop0
= op0
, xop1
= op1
;
2202 /* For certain integer operations, we need not actually extend
2203 the narrow operands, as long as we will truncate
2204 the results to the same narrowness. */
2206 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2207 || binoptab
== xor_optab
2208 || binoptab
== add_optab
|| binoptab
== sub_optab
2209 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2210 && mclass
== MODE_INT
)
2213 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2214 unsignedp
, no_extend
);
2216 /* The second operand of a shift must always be extended. */
2217 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2218 no_extend
&& binoptab
!= ashl_optab
);
2220 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2221 unsignedp
, methods
);
2224 if (mclass
!= MODE_INT
2225 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
2228 target
= gen_reg_rtx (mode
);
2229 convert_move (target
, temp
, 0);
2233 return gen_lowpart (mode
, temp
);
2236 delete_insns_since (last
);
2241 delete_insns_since (entry_last
);
2245 /* Expand a binary operator which has both signed and unsigned forms.
2246 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2249 If we widen unsigned operands, we may use a signed wider operation instead
2250 of an unsigned wider operation, since the result would be the same. */
2253 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2254 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2255 enum optab_methods methods
)
2258 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2261 /* Do it without widening, if possible. */
2262 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2263 unsignedp
, OPTAB_DIRECT
);
2264 if (temp
|| methods
== OPTAB_DIRECT
)
2267 /* Try widening to a signed int. Disable any direct use of any
2268 signed insn in the current mode. */
2269 save_enable
= swap_optab_enable (soptab
, mode
, false);
2271 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2272 unsignedp
, OPTAB_WIDEN
);
2274 /* For unsigned operands, try widening to an unsigned int. */
2275 if (!temp
&& unsignedp
)
2276 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2277 unsignedp
, OPTAB_WIDEN
);
2278 if (temp
|| methods
== OPTAB_WIDEN
)
2281 /* Use the right width libcall if that exists. */
2282 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2283 unsignedp
, OPTAB_LIB
);
2284 if (temp
|| methods
== OPTAB_LIB
)
2287 /* Must widen and use a libcall, use either signed or unsigned. */
2288 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2289 unsignedp
, methods
);
2290 if (!temp
&& unsignedp
)
2291 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2292 unsignedp
, methods
);
2295 /* Undo the fiddling above. */
2297 swap_optab_enable (soptab
, mode
, true);
2301 /* Generate code to perform an operation specified by UNOPPTAB
2302 on operand OP0, with two results to TARG0 and TARG1.
2303 We assume that the order of the operands for the instruction
2304 is TARG0, TARG1, OP0.
2306 Either TARG0 or TARG1 may be zero, but what that means is that
2307 the result is not actually wanted. We will generate it into
2308 a dummy pseudo-reg and discard it. They may not both be zero.
2310 Returns 1 if this operation can be performed; 0 if not. */
2313 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2316 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2317 enum mode_class mclass
;
2318 enum machine_mode wider_mode
;
2319 rtx entry_last
= get_last_insn ();
2322 mclass
= GET_MODE_CLASS (mode
);
2325 targ0
= gen_reg_rtx (mode
);
2327 targ1
= gen_reg_rtx (mode
);
2329 /* Record where to go back to if we fail. */
2330 last
= get_last_insn ();
2332 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2334 struct expand_operand ops
[3];
2335 enum insn_code icode
= optab_handler (unoptab
, mode
);
2337 create_fixed_operand (&ops
[0], targ0
);
2338 create_fixed_operand (&ops
[1], targ1
);
2339 create_convert_operand_from (&ops
[2], op0
, mode
, unsignedp
);
2340 if (maybe_expand_insn (icode
, 3, ops
))
2344 /* It can't be done in this mode. Can we do it in a wider mode? */
2346 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2348 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2349 wider_mode
!= VOIDmode
;
2350 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2352 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2354 rtx t0
= gen_reg_rtx (wider_mode
);
2355 rtx t1
= gen_reg_rtx (wider_mode
);
2356 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2358 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2360 convert_move (targ0
, t0
, unsignedp
);
2361 convert_move (targ1
, t1
, unsignedp
);
2365 delete_insns_since (last
);
2370 delete_insns_since (entry_last
);
2374 /* Generate code to perform an operation specified by BINOPTAB
2375 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2376 We assume that the order of the operands for the instruction
2377 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2378 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2380 Either TARG0 or TARG1 may be zero, but what that means is that
2381 the result is not actually wanted. We will generate it into
2382 a dummy pseudo-reg and discard it. They may not both be zero.
2384 Returns 1 if this operation can be performed; 0 if not. */
2387 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2390 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2391 enum mode_class mclass
;
2392 enum machine_mode wider_mode
;
2393 rtx entry_last
= get_last_insn ();
2396 mclass
= GET_MODE_CLASS (mode
);
2399 targ0
= gen_reg_rtx (mode
);
2401 targ1
= gen_reg_rtx (mode
);
2403 /* Record where to go back to if we fail. */
2404 last
= get_last_insn ();
2406 if (optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
2408 struct expand_operand ops
[4];
2409 enum insn_code icode
= optab_handler (binoptab
, mode
);
2410 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2411 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2412 rtx xop0
= op0
, xop1
= op1
;
2414 /* If we are optimizing, force expensive constants into a register. */
2415 xop0
= avoid_expensive_constant (mode0
, binoptab
, 0, xop0
, unsignedp
);
2416 xop1
= avoid_expensive_constant (mode1
, binoptab
, 1, xop1
, unsignedp
);
2418 create_fixed_operand (&ops
[0], targ0
);
2419 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2420 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
2421 create_fixed_operand (&ops
[3], targ1
);
2422 if (maybe_expand_insn (icode
, 4, ops
))
2424 delete_insns_since (last
);
2427 /* It can't be done in this mode. Can we do it in a wider mode? */
2429 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2431 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2432 wider_mode
!= VOIDmode
;
2433 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2435 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
)
2437 rtx t0
= gen_reg_rtx (wider_mode
);
2438 rtx t1
= gen_reg_rtx (wider_mode
);
2439 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2440 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2442 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2445 convert_move (targ0
, t0
, unsignedp
);
2446 convert_move (targ1
, t1
, unsignedp
);
2450 delete_insns_since (last
);
2455 delete_insns_since (entry_last
);
2459 /* Expand the two-valued library call indicated by BINOPTAB, but
2460 preserve only one of the values. If TARG0 is non-NULL, the first
2461 value is placed into TARG0; otherwise the second value is placed
2462 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2463 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2464 This routine assumes that the value returned by the library call is
2465 as if the return value was of an integral mode twice as wide as the
2466 mode of OP0. Returns 1 if the call was successful. */
2469 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2470 rtx targ0
, rtx targ1
, enum rtx_code code
)
2472 enum machine_mode mode
;
2473 enum machine_mode libval_mode
;
2478 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2479 gcc_assert (!targ0
!= !targ1
);
2481 mode
= GET_MODE (op0
);
2482 libfunc
= optab_libfunc (binoptab
, mode
);
2486 /* The value returned by the library function will have twice as
2487 many bits as the nominal MODE. */
2488 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2491 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2495 /* Get the part of VAL containing the value that we want. */
2496 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2497 targ0
? 0 : GET_MODE_SIZE (mode
));
2498 insns
= get_insns ();
2500 /* Move the into the desired location. */
2501 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2502 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2508 /* Wrapper around expand_unop which takes an rtx code to specify
2509 the operation to perform, not an optab pointer. All other
2510 arguments are the same. */
2512 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2513 rtx target
, int unsignedp
)
2515 optab unop
= code_to_optab (code
);
2518 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2524 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
2526 A similar operation can be used for clrsb. UNOPTAB says which operation
2527 we are trying to expand. */
2529 widen_leading (enum machine_mode mode
, rtx op0
, rtx target
, optab unoptab
)
2531 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2532 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2534 enum machine_mode wider_mode
;
2535 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2536 wider_mode
!= VOIDmode
;
2537 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2539 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2541 rtx xop0
, temp
, last
;
2543 last
= get_last_insn ();
2546 target
= gen_reg_rtx (mode
);
2547 xop0
= widen_operand (op0
, wider_mode
, mode
,
2548 unoptab
!= clrsb_optab
, false);
2549 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2550 unoptab
!= clrsb_optab
);
2553 (wider_mode
, sub_optab
, temp
,
2554 gen_int_mode (GET_MODE_PRECISION (wider_mode
)
2555 - GET_MODE_PRECISION (mode
),
2557 target
, true, OPTAB_DIRECT
);
2559 delete_insns_since (last
);
2568 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2569 quantities, choosing which based on whether the high word is nonzero. */
2571 expand_doubleword_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2573 rtx xop0
= force_reg (mode
, op0
);
2574 rtx subhi
= gen_highpart (word_mode
, xop0
);
2575 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2576 rtx hi0_label
= gen_label_rtx ();
2577 rtx after_label
= gen_label_rtx ();
2578 rtx seq
, temp
, result
;
2580 /* If we were not given a target, use a word_mode register, not a
2581 'mode' register. The result will fit, and nobody is expecting
2582 anything bigger (the return type of __builtin_clz* is int). */
2584 target
= gen_reg_rtx (word_mode
);
2586 /* In any case, write to a word_mode scratch in both branches of the
2587 conditional, so we can ensure there is a single move insn setting
2588 'target' to tag a REG_EQUAL note on. */
2589 result
= gen_reg_rtx (word_mode
);
2593 /* If the high word is not equal to zero,
2594 then clz of the full value is clz of the high word. */
2595 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2596 word_mode
, true, hi0_label
);
2598 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2603 convert_move (result
, temp
, true);
2605 emit_jump_insn (gen_jump (after_label
));
2608 /* Else clz of the full value is clz of the low word plus the number
2609 of bits in the high word. */
2610 emit_label (hi0_label
);
2612 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2615 temp
= expand_binop (word_mode
, add_optab
, temp
,
2616 gen_int_mode (GET_MODE_BITSIZE (word_mode
), word_mode
),
2617 result
, true, OPTAB_DIRECT
);
2621 convert_move (result
, temp
, true);
2623 emit_label (after_label
);
2624 convert_move (target
, result
, true);
2629 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2641 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2643 widen_bswap (enum machine_mode mode
, rtx op0
, rtx target
)
2645 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2646 enum machine_mode wider_mode
;
2649 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2652 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2653 wider_mode
!= VOIDmode
;
2654 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2655 if (optab_handler (bswap_optab
, wider_mode
) != CODE_FOR_nothing
)
2660 last
= get_last_insn ();
2662 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2663 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2665 gcc_assert (GET_MODE_PRECISION (wider_mode
) == GET_MODE_BITSIZE (wider_mode
)
2666 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
));
2668 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2669 GET_MODE_BITSIZE (wider_mode
)
2670 - GET_MODE_BITSIZE (mode
),
2676 target
= gen_reg_rtx (mode
);
2677 emit_move_insn (target
, gen_lowpart (mode
, x
));
2680 delete_insns_since (last
);
2685 /* Try calculating bswap as two bswaps of two word-sized operands. */
2688 expand_doubleword_bswap (enum machine_mode mode
, rtx op
, rtx target
)
2692 t1
= expand_unop (word_mode
, bswap_optab
,
2693 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2694 t0
= expand_unop (word_mode
, bswap_optab
,
2695 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2697 if (target
== 0 || !valid_multiword_target_p (target
))
2698 target
= gen_reg_rtx (mode
);
2700 emit_clobber (target
);
2701 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2702 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2707 /* Try calculating (parity x) as (and (popcount x) 1), where
2708 popcount can also be done in a wider mode. */
2710 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2712 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2713 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2715 enum machine_mode wider_mode
;
2716 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2717 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2719 if (optab_handler (popcount_optab
, wider_mode
) != CODE_FOR_nothing
)
2721 rtx xop0
, temp
, last
;
2723 last
= get_last_insn ();
2726 target
= gen_reg_rtx (mode
);
2727 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2728 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2731 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2732 target
, true, OPTAB_DIRECT
);
2734 delete_insns_since (last
);
2743 /* Try calculating ctz(x) as K - clz(x & -x) ,
2744 where K is GET_MODE_PRECISION(mode) - 1.
2746 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2747 don't have to worry about what the hardware does in that case. (If
2748 the clz instruction produces the usual value at 0, which is K, the
2749 result of this code sequence will be -1; expand_ffs, below, relies
2750 on this. It might be nice to have it be K instead, for consistency
2751 with the (very few) processors that provide a ctz with a defined
2752 value, but that would take one more instruction, and it would be
2753 less convenient for expand_ffs anyway. */
2756 expand_ctz (enum machine_mode mode
, rtx op0
, rtx target
)
2760 if (optab_handler (clz_optab
, mode
) == CODE_FOR_nothing
)
2765 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2767 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2768 true, OPTAB_DIRECT
);
2770 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2772 temp
= expand_binop (mode
, sub_optab
,
2773 gen_int_mode (GET_MODE_PRECISION (mode
) - 1, mode
),
2775 true, OPTAB_DIRECT
);
2785 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2791 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2792 else with the sequence used by expand_clz.
2794 The ffs builtin promises to return zero for a zero value and ctz/clz
2795 may have an undefined value in that case. If they do not give us a
2796 convenient value, we have to generate a test and branch. */
2798 expand_ffs (enum machine_mode mode
, rtx op0
, rtx target
)
2800 HOST_WIDE_INT val
= 0;
2801 bool defined_at_zero
= false;
2804 if (optab_handler (ctz_optab
, mode
) != CODE_FOR_nothing
)
2808 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2812 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2814 else if (optab_handler (clz_optab
, mode
) != CODE_FOR_nothing
)
2817 temp
= expand_ctz (mode
, op0
, 0);
2821 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2823 defined_at_zero
= true;
2824 val
= (GET_MODE_PRECISION (mode
) - 1) - val
;
2830 if (defined_at_zero
&& val
== -1)
2831 /* No correction needed at zero. */;
2834 /* We don't try to do anything clever with the situation found
2835 on some processors (eg Alpha) where ctz(0:mode) ==
2836 bitsize(mode). If someone can think of a way to send N to -1
2837 and leave alone all values in the range 0..N-1 (where N is a
2838 power of two), cheaper than this test-and-branch, please add it.
2840 The test-and-branch is done after the operation itself, in case
2841 the operation sets condition codes that can be recycled for this.
2842 (This is true on i386, for instance.) */
2844 rtx nonzero_label
= gen_label_rtx ();
2845 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2846 mode
, true, nonzero_label
);
2848 convert_move (temp
, GEN_INT (-1), false);
2849 emit_label (nonzero_label
);
2852 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2853 to produce a value in the range 0..bitsize. */
2854 temp
= expand_binop (mode
, add_optab
, temp
, gen_int_mode (1, mode
),
2855 target
, false, OPTAB_DIRECT
);
2862 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2871 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2872 conditions, VAL may already be a SUBREG against which we cannot generate
2873 a further SUBREG. In this case, we expect forcing the value into a
2874 register will work around the situation. */
2877 lowpart_subreg_maybe_copy (enum machine_mode omode
, rtx val
,
2878 enum machine_mode imode
)
2881 ret
= lowpart_subreg (omode
, val
, imode
);
2884 val
= force_reg (imode
, val
);
2885 ret
= lowpart_subreg (omode
, val
, imode
);
2886 gcc_assert (ret
!= NULL
);
2891 /* Expand a floating point absolute value or negation operation via a
2892 logical operation on the sign bit. */
2895 expand_absneg_bit (enum rtx_code code
, enum machine_mode mode
,
2896 rtx op0
, rtx target
)
2898 const struct real_format
*fmt
;
2899 int bitpos
, word
, nwords
, i
;
2900 enum machine_mode imode
;
2904 /* The format has to have a simple sign bit. */
2905 fmt
= REAL_MODE_FORMAT (mode
);
2909 bitpos
= fmt
->signbit_rw
;
2913 /* Don't create negative zeros if the format doesn't support them. */
2914 if (code
== NEG
&& !fmt
->has_signed_zero
)
2917 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2919 imode
= int_mode_for_mode (mode
);
2920 if (imode
== BLKmode
)
2929 if (FLOAT_WORDS_BIG_ENDIAN
)
2930 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2932 word
= bitpos
/ BITS_PER_WORD
;
2933 bitpos
= bitpos
% BITS_PER_WORD
;
2934 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2937 mask
= double_int_zero
.set_bit (bitpos
);
2943 || (nwords
> 1 && !valid_multiword_target_p (target
)))
2944 target
= gen_reg_rtx (mode
);
2950 for (i
= 0; i
< nwords
; ++i
)
2952 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2953 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
2957 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2959 immed_double_int_const (mask
, imode
),
2960 targ_piece
, 1, OPTAB_LIB_WIDEN
);
2961 if (temp
!= targ_piece
)
2962 emit_move_insn (targ_piece
, temp
);
2965 emit_move_insn (targ_piece
, op0_piece
);
2968 insns
= get_insns ();
2975 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2976 gen_lowpart (imode
, op0
),
2977 immed_double_int_const (mask
, imode
),
2978 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
2979 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
2981 set_dst_reg_note (get_last_insn (), REG_EQUAL
,
2982 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)),
2989 /* As expand_unop, but will fail rather than attempt the operation in a
2990 different mode or with a libcall. */
2992 expand_unop_direct (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2995 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2997 struct expand_operand ops
[2];
2998 enum insn_code icode
= optab_handler (unoptab
, mode
);
2999 rtx last
= get_last_insn ();
3002 create_output_operand (&ops
[0], target
, mode
);
3003 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
3004 pat
= maybe_gen_insn (icode
, 2, ops
);
3007 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3008 && ! add_equal_note (pat
, ops
[0].value
, optab_to_code (unoptab
),
3009 ops
[1].value
, NULL_RTX
))
3011 delete_insns_since (last
);
3012 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
3017 return ops
[0].value
;
3023 /* Generate code to perform an operation specified by UNOPTAB
3024 on operand OP0, with result having machine-mode MODE.
3026 UNSIGNEDP is for the case where we have to widen the operands
3027 to perform the operation. It says to use zero-extension.
3029 If TARGET is nonzero, the value
3030 is generated there, if it is convenient to do so.
3031 In all cases an rtx is returned for the locus of the value;
3032 this may or may not be TARGET. */
3035 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3038 enum mode_class mclass
= GET_MODE_CLASS (mode
);
3039 enum machine_mode wider_mode
;
3043 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3047 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3049 /* Widening (or narrowing) clz needs special treatment. */
3050 if (unoptab
== clz_optab
)
3052 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3056 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3057 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3059 temp
= expand_doubleword_clz (mode
, op0
, target
);
3067 if (unoptab
== clrsb_optab
)
3069 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3075 /* Widening (or narrowing) bswap needs special treatment. */
3076 if (unoptab
== bswap_optab
)
3078 /* HImode is special because in this mode BSWAP is equivalent to ROTATE
3079 or ROTATERT. First try these directly; if this fails, then try the
3080 obvious pair of shifts with allowed widening, as this will probably
3081 be always more efficient than the other fallback methods. */
3084 rtx last
, temp1
, temp2
;
3086 if (optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
)
3088 temp
= expand_binop (mode
, rotl_optab
, op0
, GEN_INT (8), target
,
3089 unsignedp
, OPTAB_DIRECT
);
3094 if (optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
3096 temp
= expand_binop (mode
, rotr_optab
, op0
, GEN_INT (8), target
,
3097 unsignedp
, OPTAB_DIRECT
);
3102 last
= get_last_insn ();
3104 temp1
= expand_binop (mode
, ashl_optab
, op0
, GEN_INT (8), NULL_RTX
,
3105 unsignedp
, OPTAB_WIDEN
);
3106 temp2
= expand_binop (mode
, lshr_optab
, op0
, GEN_INT (8), NULL_RTX
,
3107 unsignedp
, OPTAB_WIDEN
);
3110 temp
= expand_binop (mode
, ior_optab
, temp1
, temp2
, target
,
3111 unsignedp
, OPTAB_WIDEN
);
3116 delete_insns_since (last
);
3119 temp
= widen_bswap (mode
, op0
, target
);
3123 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3124 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3126 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3134 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3135 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3136 wider_mode
!= VOIDmode
;
3137 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3139 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
3142 rtx last
= get_last_insn ();
3144 /* For certain operations, we need not actually extend
3145 the narrow operand, as long as we will truncate the
3146 results to the same narrowness. */
3148 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3149 (unoptab
== neg_optab
3150 || unoptab
== one_cmpl_optab
)
3151 && mclass
== MODE_INT
);
3153 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3158 if (mclass
!= MODE_INT
3159 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
3162 target
= gen_reg_rtx (mode
);
3163 convert_move (target
, temp
, 0);
3167 return gen_lowpart (mode
, temp
);
3170 delete_insns_since (last
);
3174 /* These can be done a word at a time. */
3175 if (unoptab
== one_cmpl_optab
3176 && mclass
== MODE_INT
3177 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3178 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3183 if (target
== 0 || target
== op0
|| !valid_multiword_target_p (target
))
3184 target
= gen_reg_rtx (mode
);
3188 /* Do the actual arithmetic. */
3189 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3191 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3192 rtx x
= expand_unop (word_mode
, unoptab
,
3193 operand_subword_force (op0
, i
, mode
),
3194 target_piece
, unsignedp
);
3196 if (target_piece
!= x
)
3197 emit_move_insn (target_piece
, x
);
3200 insns
= get_insns ();
3207 if (optab_to_code (unoptab
) == NEG
)
3209 /* Try negating floating point values by flipping the sign bit. */
3210 if (SCALAR_FLOAT_MODE_P (mode
))
3212 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3217 /* If there is no negation pattern, and we have no negative zero,
3218 try subtracting from zero. */
3219 if (!HONOR_SIGNED_ZEROS (mode
))
3221 temp
= expand_binop (mode
, (unoptab
== negv_optab
3222 ? subv_optab
: sub_optab
),
3223 CONST0_RTX (mode
), op0
, target
,
3224 unsignedp
, OPTAB_DIRECT
);
3230 /* Try calculating parity (x) as popcount (x) % 2. */
3231 if (unoptab
== parity_optab
)
3233 temp
= expand_parity (mode
, op0
, target
);
3238 /* Try implementing ffs (x) in terms of clz (x). */
3239 if (unoptab
== ffs_optab
)
3241 temp
= expand_ffs (mode
, op0
, target
);
3246 /* Try implementing ctz (x) in terms of clz (x). */
3247 if (unoptab
== ctz_optab
)
3249 temp
= expand_ctz (mode
, op0
, target
);
3255 /* Now try a library call in this mode. */
3256 libfunc
= optab_libfunc (unoptab
, mode
);
3262 enum machine_mode outmode
= mode
;
3264 /* All of these functions return small values. Thus we choose to
3265 have them return something that isn't a double-word. */
3266 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3267 || unoptab
== clrsb_optab
|| unoptab
== popcount_optab
3268 || unoptab
== parity_optab
)
3270 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
),
3271 optab_libfunc (unoptab
, mode
)));
3275 /* Pass 1 for NO_QUEUE so we don't lose any increments
3276 if the libcall is cse'd or moved. */
3277 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3279 insns
= get_insns ();
3282 target
= gen_reg_rtx (outmode
);
3283 eq_value
= gen_rtx_fmt_e (optab_to_code (unoptab
), mode
, op0
);
3284 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3285 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3286 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3287 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3288 emit_libcall_block_1 (insns
, target
, value
, eq_value
,
3289 trapv_unoptab_p (unoptab
));
3294 /* It can't be done in this mode. Can we do it in a wider mode? */
3296 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3298 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3299 wider_mode
!= VOIDmode
;
3300 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3302 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
3303 || optab_libfunc (unoptab
, wider_mode
))
3306 rtx last
= get_last_insn ();
3308 /* For certain operations, we need not actually extend
3309 the narrow operand, as long as we will truncate the
3310 results to the same narrowness. */
3311 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3312 (unoptab
== neg_optab
3313 || unoptab
== one_cmpl_optab
3314 || unoptab
== bswap_optab
)
3315 && mclass
== MODE_INT
);
3317 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3320 /* If we are generating clz using wider mode, adjust the
3321 result. Similarly for clrsb. */
3322 if ((unoptab
== clz_optab
|| unoptab
== clrsb_optab
)
3325 (wider_mode
, sub_optab
, temp
,
3326 gen_int_mode (GET_MODE_PRECISION (wider_mode
)
3327 - GET_MODE_PRECISION (mode
),
3329 target
, true, OPTAB_DIRECT
);
3331 /* Likewise for bswap. */
3332 if (unoptab
== bswap_optab
&& temp
!= 0)
3334 gcc_assert (GET_MODE_PRECISION (wider_mode
)
3335 == GET_MODE_BITSIZE (wider_mode
)
3336 && GET_MODE_PRECISION (mode
)
3337 == GET_MODE_BITSIZE (mode
));
3339 temp
= expand_shift (RSHIFT_EXPR
, wider_mode
, temp
,
3340 GET_MODE_BITSIZE (wider_mode
)
3341 - GET_MODE_BITSIZE (mode
),
3347 if (mclass
!= MODE_INT
)
3350 target
= gen_reg_rtx (mode
);
3351 convert_move (target
, temp
, 0);
3355 return gen_lowpart (mode
, temp
);
3358 delete_insns_since (last
);
3363 /* One final attempt at implementing negation via subtraction,
3364 this time allowing widening of the operand. */
3365 if (optab_to_code (unoptab
) == NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3368 temp
= expand_binop (mode
,
3369 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3370 CONST0_RTX (mode
), op0
,
3371 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3379 /* Emit code to compute the absolute value of OP0, with result to
3380 TARGET if convenient. (TARGET may be 0.) The return value says
3381 where the result actually is to be found.
3383 MODE is the mode of the operand; the mode of the result is
3384 different but can be deduced from MODE.
3389 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
3390 int result_unsignedp
)
3394 if (GET_MODE_CLASS (mode
) != MODE_INT
3396 result_unsignedp
= 1;
3398 /* First try to do it with a special abs instruction. */
3399 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3404 /* For floating point modes, try clearing the sign bit. */
3405 if (SCALAR_FLOAT_MODE_P (mode
))
3407 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3412 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3413 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
3414 && !HONOR_SIGNED_ZEROS (mode
))
3416 rtx last
= get_last_insn ();
3418 temp
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3421 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3427 delete_insns_since (last
);
3430 /* If this machine has expensive jumps, we can do integer absolute
3431 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3432 where W is the width of MODE. */
3434 if (GET_MODE_CLASS (mode
) == MODE_INT
3435 && BRANCH_COST (optimize_insn_for_speed_p (),
3438 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3439 GET_MODE_PRECISION (mode
) - 1,
3442 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3445 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3446 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3456 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3457 int result_unsignedp
, int safe
)
3461 if (GET_MODE_CLASS (mode
) != MODE_INT
3463 result_unsignedp
= 1;
3465 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3469 /* If that does not win, use conditional jump and negate. */
3471 /* It is safe to use the target if it is the same
3472 as the source if this is also a pseudo register */
3473 if (op0
== target
&& REG_P (op0
)
3474 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3477 op1
= gen_label_rtx ();
3478 if (target
== 0 || ! safe
3479 || GET_MODE (target
) != mode
3480 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3482 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3483 target
= gen_reg_rtx (mode
);
3485 emit_move_insn (target
, op0
);
3488 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3489 NULL_RTX
, NULL_RTX
, op1
, -1);
3491 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3494 emit_move_insn (target
, op0
);
3500 /* Emit code to compute the one's complement absolute value of OP0
3501 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3502 (TARGET may be NULL_RTX.) The return value says where the result
3503 actually is to be found.
3505 MODE is the mode of the operand; the mode of the result is
3506 different but can be deduced from MODE. */
3509 expand_one_cmpl_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
)
3513 /* Not applicable for floating point modes. */
3514 if (FLOAT_MODE_P (mode
))
3517 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3518 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
)
3520 rtx last
= get_last_insn ();
3522 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, NULL_RTX
, 0);
3524 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3530 delete_insns_since (last
);
3533 /* If this machine has expensive jumps, we can do one's complement
3534 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3536 if (GET_MODE_CLASS (mode
) == MODE_INT
3537 && BRANCH_COST (optimize_insn_for_speed_p (),
3540 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3541 GET_MODE_PRECISION (mode
) - 1,
3544 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3554 /* A subroutine of expand_copysign, perform the copysign operation using the
3555 abs and neg primitives advertised to exist on the target. The assumption
3556 is that we have a split register file, and leaving op0 in fp registers,
3557 and not playing with subregs so much, will help the register allocator. */
3560 expand_copysign_absneg (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3561 int bitpos
, bool op0_is_abs
)
3563 enum machine_mode imode
;
3564 enum insn_code icode
;
3570 /* Check if the back end provides an insn that handles signbit for the
3572 icode
= optab_handler (signbit_optab
, mode
);
3573 if (icode
!= CODE_FOR_nothing
)
3575 imode
= insn_data
[(int) icode
].operand
[0].mode
;
3576 sign
= gen_reg_rtx (imode
);
3577 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3583 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3585 imode
= int_mode_for_mode (mode
);
3586 if (imode
== BLKmode
)
3588 op1
= gen_lowpart (imode
, op1
);
3595 if (FLOAT_WORDS_BIG_ENDIAN
)
3596 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3598 word
= bitpos
/ BITS_PER_WORD
;
3599 bitpos
= bitpos
% BITS_PER_WORD
;
3600 op1
= operand_subword_force (op1
, word
, mode
);
3603 mask
= double_int_zero
.set_bit (bitpos
);
3605 sign
= expand_binop (imode
, and_optab
, op1
,
3606 immed_double_int_const (mask
, imode
),
3607 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3612 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3619 if (target
== NULL_RTX
)
3620 target
= copy_to_reg (op0
);
3622 emit_move_insn (target
, op0
);
3625 label
= gen_label_rtx ();
3626 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3628 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3629 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3631 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3633 emit_move_insn (target
, op0
);
3641 /* A subroutine of expand_copysign, perform the entire copysign operation
3642 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3643 is true if op0 is known to have its sign bit clear. */
3646 expand_copysign_bit (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3647 int bitpos
, bool op0_is_abs
)
3649 enum machine_mode imode
;
3651 int word
, nwords
, i
;
3654 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3656 imode
= int_mode_for_mode (mode
);
3657 if (imode
== BLKmode
)
3666 if (FLOAT_WORDS_BIG_ENDIAN
)
3667 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3669 word
= bitpos
/ BITS_PER_WORD
;
3670 bitpos
= bitpos
% BITS_PER_WORD
;
3671 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3674 mask
= double_int_zero
.set_bit (bitpos
);
3679 || (nwords
> 1 && !valid_multiword_target_p (target
)))
3680 target
= gen_reg_rtx (mode
);
3686 for (i
= 0; i
< nwords
; ++i
)
3688 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3689 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3695 = expand_binop (imode
, and_optab
, op0_piece
,
3696 immed_double_int_const (~mask
, imode
),
3697 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3699 op1
= expand_binop (imode
, and_optab
,
3700 operand_subword_force (op1
, i
, mode
),
3701 immed_double_int_const (mask
, imode
),
3702 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3704 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3705 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3706 if (temp
!= targ_piece
)
3707 emit_move_insn (targ_piece
, temp
);
3710 emit_move_insn (targ_piece
, op0_piece
);
3713 insns
= get_insns ();
3720 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3721 immed_double_int_const (mask
, imode
),
3722 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3724 op0
= gen_lowpart (imode
, op0
);
3726 op0
= expand_binop (imode
, and_optab
, op0
,
3727 immed_double_int_const (~mask
, imode
),
3728 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3730 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3731 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3732 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3738 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3739 scalar floating point mode. Return NULL if we do not know how to
3740 expand the operation inline. */
3743 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3745 enum machine_mode mode
= GET_MODE (op0
);
3746 const struct real_format
*fmt
;
3750 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3751 gcc_assert (GET_MODE (op1
) == mode
);
3753 /* First try to do it with a special instruction. */
3754 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3755 target
, 0, OPTAB_DIRECT
);
3759 fmt
= REAL_MODE_FORMAT (mode
);
3760 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3764 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3766 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3767 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3771 if (fmt
->signbit_ro
>= 0
3772 && (CONST_DOUBLE_AS_FLOAT_P (op0
)
3773 || (optab_handler (neg_optab
, mode
) != CODE_FOR_nothing
3774 && optab_handler (abs_optab
, mode
) != CODE_FOR_nothing
)))
3776 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3777 fmt
->signbit_ro
, op0_is_abs
);
3782 if (fmt
->signbit_rw
< 0)
3784 return expand_copysign_bit (mode
, op0
, op1
, target
,
3785 fmt
->signbit_rw
, op0_is_abs
);
3788 /* Generate an instruction whose insn-code is INSN_CODE,
3789 with two operands: an output TARGET and an input OP0.
3790 TARGET *must* be nonzero, and the output is always stored there.
3791 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3792 the value that is stored into TARGET.
3794 Return false if expansion failed. */
3797 maybe_emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
,
3800 struct expand_operand ops
[2];
3803 create_output_operand (&ops
[0], target
, GET_MODE (target
));
3804 create_input_operand (&ops
[1], op0
, GET_MODE (op0
));
3805 pat
= maybe_gen_insn (icode
, 2, ops
);
3809 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3810 add_equal_note (pat
, ops
[0].value
, code
, ops
[1].value
, NULL_RTX
);
3814 if (ops
[0].value
!= target
)
3815 emit_move_insn (target
, ops
[0].value
);
3818 /* Generate an instruction whose insn-code is INSN_CODE,
3819 with two operands: an output TARGET and an input OP0.
3820 TARGET *must* be nonzero, and the output is always stored there.
3821 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3822 the value that is stored into TARGET. */
3825 emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
, enum rtx_code code
)
3827 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3831 struct no_conflict_data
3833 rtx target
, first
, insn
;
3837 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3838 the currently examined clobber / store has to stay in the list of
3839 insns that constitute the actual libcall block. */
3841 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3843 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3845 /* If this inns directly contributes to setting the target, it must stay. */
3846 if (reg_overlap_mentioned_p (p
->target
, dest
))
3847 p
->must_stay
= true;
3848 /* If we haven't committed to keeping any other insns in the list yet,
3849 there is nothing more to check. */
3850 else if (p
->insn
== p
->first
)
3852 /* If this insn sets / clobbers a register that feeds one of the insns
3853 already in the list, this insn has to stay too. */
3854 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3855 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3856 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3857 /* Likewise if this insn depends on a register set by a previous
3858 insn in the list, or if it sets a result (presumably a hard
3859 register) that is set or clobbered by a previous insn.
3860 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3861 SET_DEST perform the former check on the address, and the latter
3862 check on the MEM. */
3863 || (GET_CODE (set
) == SET
3864 && (modified_in_p (SET_SRC (set
), p
->first
)
3865 || modified_in_p (SET_DEST (set
), p
->first
)
3866 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3867 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3868 p
->must_stay
= true;
3872 /* Emit code to make a call to a constant function or a library call.
3874 INSNS is a list containing all insns emitted in the call.
3875 These insns leave the result in RESULT. Our block is to copy RESULT
3876 to TARGET, which is logically equivalent to EQUIV.
3878 We first emit any insns that set a pseudo on the assumption that these are
3879 loading constants into registers; doing so allows them to be safely cse'ed
3880 between blocks. Then we emit all the other insns in the block, followed by
3881 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3882 note with an operand of EQUIV. */
3885 emit_libcall_block_1 (rtx insns
, rtx target
, rtx result
, rtx equiv
,
3886 bool equiv_may_trap
)
3888 rtx final_dest
= target
;
3889 rtx next
, last
, insn
;
3891 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3892 into a MEM later. Protect the libcall block from this change. */
3893 if (! REG_P (target
) || REG_USERVAR_P (target
))
3894 target
= gen_reg_rtx (GET_MODE (target
));
3896 /* If we're using non-call exceptions, a libcall corresponding to an
3897 operation that may trap may also trap. */
3898 /* ??? See the comment in front of make_reg_eh_region_note. */
3899 if (cfun
->can_throw_non_call_exceptions
3900 && (equiv_may_trap
|| may_trap_p (equiv
)))
3902 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3905 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3908 int lp_nr
= INTVAL (XEXP (note
, 0));
3909 if (lp_nr
== 0 || lp_nr
== INT_MIN
)
3910 remove_note (insn
, note
);
3916 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3917 reg note to indicate that this call cannot throw or execute a nonlocal
3918 goto (unless there is already a REG_EH_REGION note, in which case
3920 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3922 make_reg_eh_region_note_nothrow_nononlocal (insn
);
3925 /* First emit all insns that set pseudos. Remove them from the list as
3926 we go. Avoid insns that set pseudos which were referenced in previous
3927 insns. These can be generated by move_by_pieces, for example,
3928 to update an address. Similarly, avoid insns that reference things
3929 set in previous insns. */
3931 for (insn
= insns
; insn
; insn
= next
)
3933 rtx set
= single_set (insn
);
3935 next
= NEXT_INSN (insn
);
3937 if (set
!= 0 && REG_P (SET_DEST (set
))
3938 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3940 struct no_conflict_data data
;
3942 data
.target
= const0_rtx
;
3946 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3947 if (! data
.must_stay
)
3949 if (PREV_INSN (insn
))
3950 NEXT_INSN (PREV_INSN (insn
)) = next
;
3955 PREV_INSN (next
) = PREV_INSN (insn
);
3961 /* Some ports use a loop to copy large arguments onto the stack.
3962 Don't move anything outside such a loop. */
3967 /* Write the remaining insns followed by the final copy. */
3968 for (insn
= insns
; insn
; insn
= next
)
3970 next
= NEXT_INSN (insn
);
3975 last
= emit_move_insn (target
, result
);
3976 set_dst_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
), target
);
3978 if (final_dest
!= target
)
3979 emit_move_insn (final_dest
, target
);
3983 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3985 emit_libcall_block_1 (insns
, target
, result
, equiv
, false);
3988 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3989 PURPOSE describes how this comparison will be used. CODE is the rtx
3990 comparison code we will be using.
3992 ??? Actually, CODE is slightly weaker than that. A target is still
3993 required to implement all of the normal bcc operations, but not
3994 required to implement all (or any) of the unordered bcc operations. */
3997 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3998 enum can_compare_purpose purpose
)
4001 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
4004 enum insn_code icode
;
4006 if (purpose
== ccp_jump
4007 && (icode
= optab_handler (cbranch_optab
, mode
)) != CODE_FOR_nothing
4008 && insn_operand_matches (icode
, 0, test
))
4010 if (purpose
== ccp_store_flag
4011 && (icode
= optab_handler (cstore_optab
, mode
)) != CODE_FOR_nothing
4012 && insn_operand_matches (icode
, 1, test
))
4014 if (purpose
== ccp_cmov
4015 && optab_handler (cmov_optab
, mode
) != CODE_FOR_nothing
)
4018 mode
= GET_MODE_WIDER_MODE (mode
);
4019 PUT_MODE (test
, mode
);
4021 while (mode
!= VOIDmode
);
4026 /* This function is called when we are going to emit a compare instruction that
4027 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
4029 *PMODE is the mode of the inputs (in case they are const_int).
4030 *PUNSIGNEDP nonzero says that the operands are unsigned;
4031 this matters if they need to be widened (as given by METHODS).
4033 If they have mode BLKmode, then SIZE specifies the size of both operands.
4035 This function performs all the setup necessary so that the caller only has
4036 to emit a single comparison insn. This setup can involve doing a BLKmode
4037 comparison or emitting a library call to perform the comparison if no insn
4038 is available to handle it.
4039 The values which are passed in through pointers can be modified; the caller
4040 should perform the comparison on the modified values. Constant
4041 comparisons must have already been folded. */
4044 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4045 int unsignedp
, enum optab_methods methods
,
4046 rtx
*ptest
, enum machine_mode
*pmode
)
4048 enum machine_mode mode
= *pmode
;
4050 enum machine_mode cmp_mode
;
4051 enum mode_class mclass
;
4053 /* The other methods are not needed. */
4054 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
4055 || methods
== OPTAB_LIB_WIDEN
);
4057 /* If we are optimizing, force expensive constants into a register. */
4058 if (CONSTANT_P (x
) && optimize
4059 && (rtx_cost (x
, COMPARE
, 0, optimize_insn_for_speed_p ())
4060 > COSTS_N_INSNS (1)))
4061 x
= force_reg (mode
, x
);
4063 if (CONSTANT_P (y
) && optimize
4064 && (rtx_cost (y
, COMPARE
, 1, optimize_insn_for_speed_p ())
4065 > COSTS_N_INSNS (1)))
4066 y
= force_reg (mode
, y
);
4069 /* Make sure if we have a canonical comparison. The RTL
4070 documentation states that canonical comparisons are required only
4071 for targets which have cc0. */
4072 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
4075 /* Don't let both operands fail to indicate the mode. */
4076 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
4077 x
= force_reg (mode
, x
);
4078 if (mode
== VOIDmode
)
4079 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
4081 /* Handle all BLKmode compares. */
4083 if (mode
== BLKmode
)
4085 enum machine_mode result_mode
;
4086 enum insn_code cmp_code
;
4091 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
4095 /* Try to use a memory block compare insn - either cmpstr
4096 or cmpmem will do. */
4097 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
4098 cmp_mode
!= VOIDmode
;
4099 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
4101 cmp_code
= direct_optab_handler (cmpmem_optab
, cmp_mode
);
4102 if (cmp_code
== CODE_FOR_nothing
)
4103 cmp_code
= direct_optab_handler (cmpstr_optab
, cmp_mode
);
4104 if (cmp_code
== CODE_FOR_nothing
)
4105 cmp_code
= direct_optab_handler (cmpstrn_optab
, cmp_mode
);
4106 if (cmp_code
== CODE_FOR_nothing
)
4109 /* Must make sure the size fits the insn's mode. */
4110 if ((CONST_INT_P (size
)
4111 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4112 || (GET_MODE_BITSIZE (GET_MODE (size
))
4113 > GET_MODE_BITSIZE (cmp_mode
)))
4116 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4117 result
= gen_reg_rtx (result_mode
);
4118 size
= convert_to_mode (cmp_mode
, size
, 1);
4119 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4121 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4122 *pmode
= result_mode
;
4126 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4129 /* Otherwise call a library function, memcmp. */
4130 libfunc
= memcmp_libfunc
;
4131 length_type
= sizetype
;
4132 result_mode
= TYPE_MODE (integer_type_node
);
4133 cmp_mode
= TYPE_MODE (length_type
);
4134 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4135 TYPE_UNSIGNED (length_type
));
4137 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4145 methods
= OPTAB_LIB_WIDEN
;
4149 /* Don't allow operands to the compare to trap, as that can put the
4150 compare and branch in different basic blocks. */
4151 if (cfun
->can_throw_non_call_exceptions
)
4154 x
= force_reg (mode
, x
);
4156 y
= force_reg (mode
, y
);
4159 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4161 gcc_assert (can_compare_p (comparison
, CCmode
, ccp_jump
));
4162 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4166 mclass
= GET_MODE_CLASS (mode
);
4167 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4171 enum insn_code icode
;
4172 icode
= optab_handler (cbranch_optab
, cmp_mode
);
4173 if (icode
!= CODE_FOR_nothing
4174 && insn_operand_matches (icode
, 0, test
))
4176 rtx last
= get_last_insn ();
4177 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4178 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4180 && insn_operand_matches (icode
, 1, op0
)
4181 && insn_operand_matches (icode
, 2, op1
))
4183 XEXP (test
, 0) = op0
;
4184 XEXP (test
, 1) = op1
;
4189 delete_insns_since (last
);
4192 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4194 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4196 while (cmp_mode
!= VOIDmode
);
4198 if (methods
!= OPTAB_LIB_WIDEN
)
4201 if (!SCALAR_FLOAT_MODE_P (mode
))
4204 enum machine_mode ret_mode
;
4206 /* Handle a libcall just for the mode we are using. */
4207 libfunc
= optab_libfunc (cmp_optab
, mode
);
4208 gcc_assert (libfunc
);
4210 /* If we want unsigned, and this mode has a distinct unsigned
4211 comparison routine, use that. */
4214 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4219 ret_mode
= targetm
.libgcc_cmp_return_mode ();
4220 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4221 ret_mode
, 2, x
, mode
, y
, mode
);
4223 /* There are two kinds of comparison routines. Biased routines
4224 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4225 of gcc expect that the comparison operation is equivalent
4226 to the modified comparison. For signed comparisons compare the
4227 result against 1 in the biased case, and zero in the unbiased
4228 case. For unsigned comparisons always compare against 1 after
4229 biasing the unbiased result by adding 1. This gives us a way to
4231 The comparisons in the fixed-point helper library are always
4236 if (!TARGET_LIB_INT_CMP_BIASED
&& !ALL_FIXED_POINT_MODE_P (mode
))
4239 x
= plus_constant (ret_mode
, result
, 1);
4245 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4249 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4257 /* Before emitting an insn with code ICODE, make sure that X, which is going
4258 to be used for operand OPNUM of the insn, is converted from mode MODE to
4259 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4260 that it is accepted by the operand predicate. Return the new value. */
4263 prepare_operand (enum insn_code icode
, rtx x
, int opnum
, enum machine_mode mode
,
4264 enum machine_mode wider_mode
, int unsignedp
)
4266 if (mode
!= wider_mode
)
4267 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4269 if (!insn_operand_matches (icode
, opnum
, x
))
4271 if (reload_completed
)
4273 x
= copy_to_mode_reg (insn_data
[(int) icode
].operand
[opnum
].mode
, x
);
4279 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4280 we can do the branch. */
4283 emit_cmp_and_jump_insn_1 (rtx test
, enum machine_mode mode
, rtx label
, int prob
)
4285 enum machine_mode optab_mode
;
4286 enum mode_class mclass
;
4287 enum insn_code icode
;
4290 mclass
= GET_MODE_CLASS (mode
);
4291 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4292 icode
= optab_handler (cbranch_optab
, optab_mode
);
4294 gcc_assert (icode
!= CODE_FOR_nothing
);
4295 gcc_assert (insn_operand_matches (icode
, 0, test
));
4296 insn
= emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0),
4297 XEXP (test
, 1), label
));
4299 && profile_status_for_fn (cfun
) != PROFILE_ABSENT
4302 && any_condjump_p (insn
)
4303 && !find_reg_note (insn
, REG_BR_PROB
, 0))
4304 add_int_reg_note (insn
, REG_BR_PROB
, prob
);
4307 /* Generate code to compare X with Y so that the condition codes are
4308 set and to jump to LABEL if the condition is true. If X is a
4309 constant and Y is not a constant, then the comparison is swapped to
4310 ensure that the comparison RTL has the canonical form.
4312 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4313 need to be widened. UNSIGNEDP is also used to select the proper
4314 branch condition code.
4316 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4318 MODE is the mode of the inputs (in case they are const_int).
4320 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4321 It will be potentially converted into an unsigned variant based on
4322 UNSIGNEDP to select a proper jump instruction.
4324 PROB is the probability of jumping to LABEL. */
4327 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4328 enum machine_mode mode
, int unsignedp
, rtx label
,
4331 rtx op0
= x
, op1
= y
;
4334 /* Swap operands and condition to ensure canonical RTL. */
4335 if (swap_commutative_operands_p (x
, y
)
4336 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4339 comparison
= swap_condition (comparison
);
4342 /* If OP0 is still a constant, then both X and Y must be constants
4343 or the opposite comparison is not supported. Force X into a register
4344 to create canonical RTL. */
4345 if (CONSTANT_P (op0
))
4346 op0
= force_reg (mode
, op0
);
4349 comparison
= unsigned_condition (comparison
);
4351 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4353 emit_cmp_and_jump_insn_1 (test
, mode
, label
, prob
);
4357 /* Emit a library call comparison between floating point X and Y.
4358 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4361 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4362 rtx
*ptest
, enum machine_mode
*pmode
)
4364 enum rtx_code swapped
= swap_condition (comparison
);
4365 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4366 enum machine_mode orig_mode
= GET_MODE (x
);
4367 enum machine_mode mode
, cmp_mode
;
4368 rtx true_rtx
, false_rtx
;
4369 rtx value
, target
, insns
, equiv
;
4371 bool reversed_p
= false;
4372 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4374 for (mode
= orig_mode
;
4376 mode
= GET_MODE_WIDER_MODE (mode
))
4378 if (code_to_optab (comparison
)
4379 && (libfunc
= optab_libfunc (code_to_optab (comparison
), mode
)))
4382 if (code_to_optab (swapped
)
4383 && (libfunc
= optab_libfunc (code_to_optab (swapped
), mode
)))
4386 tmp
= x
; x
= y
; y
= tmp
;
4387 comparison
= swapped
;
4391 if (code_to_optab (reversed
)
4392 && (libfunc
= optab_libfunc (code_to_optab (reversed
), mode
)))
4394 comparison
= reversed
;
4400 gcc_assert (mode
!= VOIDmode
);
4402 if (mode
!= orig_mode
)
4404 x
= convert_to_mode (mode
, x
, 0);
4405 y
= convert_to_mode (mode
, y
, 0);
4408 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4409 the RTL. The allows the RTL optimizers to delete the libcall if the
4410 condition can be determined at compile-time. */
4411 if (comparison
== UNORDERED
4412 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4414 true_rtx
= const_true_rtx
;
4415 false_rtx
= const0_rtx
;
4422 true_rtx
= const0_rtx
;
4423 false_rtx
= const_true_rtx
;
4427 true_rtx
= const_true_rtx
;
4428 false_rtx
= const0_rtx
;
4432 true_rtx
= const1_rtx
;
4433 false_rtx
= const0_rtx
;
4437 true_rtx
= const0_rtx
;
4438 false_rtx
= constm1_rtx
;
4442 true_rtx
= constm1_rtx
;
4443 false_rtx
= const0_rtx
;
4447 true_rtx
= const0_rtx
;
4448 false_rtx
= const1_rtx
;
4456 if (comparison
== UNORDERED
)
4458 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4459 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4460 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4461 temp
, const_true_rtx
, equiv
);
4465 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4466 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4467 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4468 equiv
, true_rtx
, false_rtx
);
4472 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4473 cmp_mode
, 2, x
, mode
, y
, mode
);
4474 insns
= get_insns ();
4477 target
= gen_reg_rtx (cmp_mode
);
4478 emit_libcall_block (insns
, target
, value
, equiv
);
4480 if (comparison
== UNORDERED
4481 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
)
4483 *ptest
= gen_rtx_fmt_ee (reversed_p
? EQ
: NE
, VOIDmode
, target
, false_rtx
);
4485 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4490 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4493 emit_indirect_jump (rtx loc
)
4495 struct expand_operand ops
[1];
4497 create_address_operand (&ops
[0], loc
);
4498 expand_jump_insn (CODE_FOR_indirect_jump
, 1, ops
);
4502 #ifdef HAVE_conditional_move
4504 /* Emit a conditional move instruction if the machine supports one for that
4505 condition and machine mode.
4507 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4508 the mode to use should they be constants. If it is VOIDmode, they cannot
4511 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4512 should be stored there. MODE is the mode to use should they be constants.
4513 If it is VOIDmode, they cannot both be constants.
4515 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4516 is not supported. */
4519 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4520 enum machine_mode cmode
, rtx op2
, rtx op3
,
4521 enum machine_mode mode
, int unsignedp
)
4523 rtx tem
, comparison
, last
;
4524 enum insn_code icode
;
4525 enum rtx_code reversed
;
4527 /* If one operand is constant, make it the second one. Only do this
4528 if the other operand is not constant as well. */
4530 if (swap_commutative_operands_p (op0
, op1
))
4535 code
= swap_condition (code
);
4538 /* get_condition will prefer to generate LT and GT even if the old
4539 comparison was against zero, so undo that canonicalization here since
4540 comparisons against zero are cheaper. */
4541 if (code
== LT
&& op1
== const1_rtx
)
4542 code
= LE
, op1
= const0_rtx
;
4543 else if (code
== GT
&& op1
== constm1_rtx
)
4544 code
= GE
, op1
= const0_rtx
;
4546 if (cmode
== VOIDmode
)
4547 cmode
= GET_MODE (op0
);
4549 if (swap_commutative_operands_p (op2
, op3
)
4550 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4559 if (mode
== VOIDmode
)
4560 mode
= GET_MODE (op2
);
4562 icode
= direct_optab_handler (movcc_optab
, mode
);
4564 if (icode
== CODE_FOR_nothing
)
4568 target
= gen_reg_rtx (mode
);
4570 code
= unsignedp
? unsigned_condition (code
) : code
;
4571 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4573 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4574 return NULL and let the caller figure out how best to deal with this
4576 if (!COMPARISON_P (comparison
))
4579 saved_pending_stack_adjust save
;
4580 save_pending_stack_adjust (&save
);
4581 last
= get_last_insn ();
4582 do_pending_stack_adjust ();
4583 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4584 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4585 &comparison
, &cmode
);
4588 struct expand_operand ops
[4];
4590 create_output_operand (&ops
[0], target
, mode
);
4591 create_fixed_operand (&ops
[1], comparison
);
4592 create_input_operand (&ops
[2], op2
, mode
);
4593 create_input_operand (&ops
[3], op3
, mode
);
4594 if (maybe_expand_insn (icode
, 4, ops
))
4596 if (ops
[0].value
!= target
)
4597 convert_move (target
, ops
[0].value
, false);
4601 delete_insns_since (last
);
4602 restore_pending_stack_adjust (&save
);
4606 /* Return nonzero if a conditional move of mode MODE is supported.
4608 This function is for combine so it can tell whether an insn that looks
4609 like a conditional move is actually supported by the hardware. If we
4610 guess wrong we lose a bit on optimization, but that's it. */
4611 /* ??? sparc64 supports conditionally moving integers values based on fp
4612 comparisons, and vice versa. How do we handle them? */
4615 can_conditionally_move_p (enum machine_mode mode
)
4617 if (direct_optab_handler (movcc_optab
, mode
) != CODE_FOR_nothing
)
4623 #endif /* HAVE_conditional_move */
4625 /* Emit a conditional addition instruction if the machine supports one for that
4626 condition and machine mode.
4628 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4629 the mode to use should they be constants. If it is VOIDmode, they cannot
4632 OP2 should be stored in TARGET if the comparison is false, otherwise OP2+OP3
4633 should be stored there. MODE is the mode to use should they be constants.
4634 If it is VOIDmode, they cannot both be constants.
4636 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4637 is not supported. */
4640 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4641 enum machine_mode cmode
, rtx op2
, rtx op3
,
4642 enum machine_mode mode
, int unsignedp
)
4644 rtx tem
, comparison
, last
;
4645 enum insn_code icode
;
4647 /* If one operand is constant, make it the second one. Only do this
4648 if the other operand is not constant as well. */
4650 if (swap_commutative_operands_p (op0
, op1
))
4655 code
= swap_condition (code
);
4658 /* get_condition will prefer to generate LT and GT even if the old
4659 comparison was against zero, so undo that canonicalization here since
4660 comparisons against zero are cheaper. */
4661 if (code
== LT
&& op1
== const1_rtx
)
4662 code
= LE
, op1
= const0_rtx
;
4663 else if (code
== GT
&& op1
== constm1_rtx
)
4664 code
= GE
, op1
= const0_rtx
;
4666 if (cmode
== VOIDmode
)
4667 cmode
= GET_MODE (op0
);
4669 if (mode
== VOIDmode
)
4670 mode
= GET_MODE (op2
);
4672 icode
= optab_handler (addcc_optab
, mode
);
4674 if (icode
== CODE_FOR_nothing
)
4678 target
= gen_reg_rtx (mode
);
4680 code
= unsignedp
? unsigned_condition (code
) : code
;
4681 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4683 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4684 return NULL and let the caller figure out how best to deal with this
4686 if (!COMPARISON_P (comparison
))
4689 do_pending_stack_adjust ();
4690 last
= get_last_insn ();
4691 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4692 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4693 &comparison
, &cmode
);
4696 struct expand_operand ops
[4];
4698 create_output_operand (&ops
[0], target
, mode
);
4699 create_fixed_operand (&ops
[1], comparison
);
4700 create_input_operand (&ops
[2], op2
, mode
);
4701 create_input_operand (&ops
[3], op3
, mode
);
4702 if (maybe_expand_insn (icode
, 4, ops
))
4704 if (ops
[0].value
!= target
)
4705 convert_move (target
, ops
[0].value
, false);
4709 delete_insns_since (last
);
4713 /* These functions attempt to generate an insn body, rather than
4714 emitting the insn, but if the gen function already emits them, we
4715 make no attempt to turn them back into naked patterns. */
4717 /* Generate and return an insn body to add Y to X. */
4720 gen_add2_insn (rtx x
, rtx y
)
4722 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
4724 gcc_assert (insn_operand_matches (icode
, 0, x
));
4725 gcc_assert (insn_operand_matches (icode
, 1, x
));
4726 gcc_assert (insn_operand_matches (icode
, 2, y
));
4728 return GEN_FCN (icode
) (x
, x
, y
);
4731 /* Generate and return an insn body to add r1 and c,
4732 storing the result in r0. */
4735 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4737 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (r0
));
4739 if (icode
== CODE_FOR_nothing
4740 || !insn_operand_matches (icode
, 0, r0
)
4741 || !insn_operand_matches (icode
, 1, r1
)
4742 || !insn_operand_matches (icode
, 2, c
))
4745 return GEN_FCN (icode
) (r0
, r1
, c
);
4749 have_add2_insn (rtx x
, rtx y
)
4751 enum insn_code icode
;
4753 gcc_assert (GET_MODE (x
) != VOIDmode
);
4755 icode
= optab_handler (add_optab
, GET_MODE (x
));
4757 if (icode
== CODE_FOR_nothing
)
4760 if (!insn_operand_matches (icode
, 0, x
)
4761 || !insn_operand_matches (icode
, 1, x
)
4762 || !insn_operand_matches (icode
, 2, y
))
4768 /* Generate and return an insn body to add Y to X. */
4771 gen_addptr3_insn (rtx x
, rtx y
, rtx z
)
4773 enum insn_code icode
= optab_handler (addptr3_optab
, GET_MODE (x
));
4775 gcc_assert (insn_operand_matches (icode
, 0, x
));
4776 gcc_assert (insn_operand_matches (icode
, 1, y
));
4777 gcc_assert (insn_operand_matches (icode
, 2, z
));
4779 return GEN_FCN (icode
) (x
, y
, z
);
4782 /* Return true if the target implements an addptr pattern and X, Y,
4783 and Z are valid for the pattern predicates. */
4786 have_addptr3_insn (rtx x
, rtx y
, rtx z
)
4788 enum insn_code icode
;
4790 gcc_assert (GET_MODE (x
) != VOIDmode
);
4792 icode
= optab_handler (addptr3_optab
, GET_MODE (x
));
4794 if (icode
== CODE_FOR_nothing
)
4797 if (!insn_operand_matches (icode
, 0, x
)
4798 || !insn_operand_matches (icode
, 1, y
)
4799 || !insn_operand_matches (icode
, 2, z
))
4805 /* Generate and return an insn body to subtract Y from X. */
4808 gen_sub2_insn (rtx x
, rtx y
)
4810 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (x
));
4812 gcc_assert (insn_operand_matches (icode
, 0, x
));
4813 gcc_assert (insn_operand_matches (icode
, 1, x
));
4814 gcc_assert (insn_operand_matches (icode
, 2, y
));
4816 return GEN_FCN (icode
) (x
, x
, y
);
4819 /* Generate and return an insn body to subtract r1 and c,
4820 storing the result in r0. */
4823 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4825 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (r0
));
4827 if (icode
== CODE_FOR_nothing
4828 || !insn_operand_matches (icode
, 0, r0
)
4829 || !insn_operand_matches (icode
, 1, r1
)
4830 || !insn_operand_matches (icode
, 2, c
))
4833 return GEN_FCN (icode
) (r0
, r1
, c
);
4837 have_sub2_insn (rtx x
, rtx y
)
4839 enum insn_code icode
;
4841 gcc_assert (GET_MODE (x
) != VOIDmode
);
4843 icode
= optab_handler (sub_optab
, GET_MODE (x
));
4845 if (icode
== CODE_FOR_nothing
)
4848 if (!insn_operand_matches (icode
, 0, x
)
4849 || !insn_operand_matches (icode
, 1, x
)
4850 || !insn_operand_matches (icode
, 2, y
))
4856 /* Generate the body of an instruction to copy Y into X.
4857 It may be a list of insns, if one insn isn't enough. */
4860 gen_move_insn (rtx x
, rtx y
)
4865 emit_move_insn_1 (x
, y
);
4871 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4872 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4873 no such operation exists, CODE_FOR_nothing will be returned. */
4876 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4880 #ifdef HAVE_ptr_extend
4882 return CODE_FOR_ptr_extend
;
4885 tab
= unsignedp
? zext_optab
: sext_optab
;
4886 return convert_optab_handler (tab
, to_mode
, from_mode
);
4889 /* Generate the body of an insn to extend Y (with mode MFROM)
4890 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4893 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4894 enum machine_mode mfrom
, int unsignedp
)
4896 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4897 return GEN_FCN (icode
) (x
, y
);
4900 /* can_fix_p and can_float_p say whether the target machine
4901 can directly convert a given fixed point type to
4902 a given floating point type, or vice versa.
4903 The returned value is the CODE_FOR_... value to use,
4904 or CODE_FOR_nothing if these modes cannot be directly converted.
4906 *TRUNCP_PTR is set to 1 if it is necessary to output
4907 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4909 static enum insn_code
4910 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4911 int unsignedp
, int *truncp_ptr
)
4914 enum insn_code icode
;
4916 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4917 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4918 if (icode
!= CODE_FOR_nothing
)
4924 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4925 for this to work. We need to rework the fix* and ftrunc* patterns
4926 and documentation. */
4927 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4928 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4929 if (icode
!= CODE_FOR_nothing
4930 && optab_handler (ftrunc_optab
, fltmode
) != CODE_FOR_nothing
)
4937 return CODE_FOR_nothing
;
4941 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4946 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4947 return convert_optab_handler (tab
, fltmode
, fixmode
);
4950 /* Function supportable_convert_operation
4952 Check whether an operation represented by the code CODE is a
4953 convert operation that is supported by the target platform in
4954 vector form (i.e., when operating on arguments of type VECTYPE_IN
4955 producing a result of type VECTYPE_OUT).
4957 Convert operations we currently support directly are FIX_TRUNC and FLOAT.
4958 This function checks if these operations are supported
4959 by the target platform either directly (via vector tree-codes), or via
4963 - CODE1 is code of vector operation to be used when
4964 vectorizing the operation, if available.
4965 - DECL is decl of target builtin functions to be used
4966 when vectorizing the operation, if available. In this case,
4967 CODE1 is CALL_EXPR. */
4970 supportable_convert_operation (enum tree_code code
,
4971 tree vectype_out
, tree vectype_in
,
4972 tree
*decl
, enum tree_code
*code1
)
4974 enum machine_mode m1
,m2
;
4977 m1
= TYPE_MODE (vectype_out
);
4978 m2
= TYPE_MODE (vectype_in
);
4980 /* First check if we can done conversion directly. */
4981 if ((code
== FIX_TRUNC_EXPR
4982 && can_fix_p (m1
,m2
,TYPE_UNSIGNED (vectype_out
), &truncp
)
4983 != CODE_FOR_nothing
)
4984 || (code
== FLOAT_EXPR
4985 && can_float_p (m1
,m2
,TYPE_UNSIGNED (vectype_in
))
4986 != CODE_FOR_nothing
))
4992 /* Now check for builtin. */
4993 if (targetm
.vectorize
.builtin_conversion
4994 && targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
))
4997 *decl
= targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
);
5004 /* Generate code to convert FROM to floating point
5005 and store in TO. FROM must be fixed point and not VOIDmode.
5006 UNSIGNEDP nonzero means regard FROM as unsigned.
5007 Normally this is done by correcting the final value
5008 if it is negative. */
5011 expand_float (rtx to
, rtx from
, int unsignedp
)
5013 enum insn_code icode
;
5015 enum machine_mode fmode
, imode
;
5016 bool can_do_signed
= false;
5018 /* Crash now, because we won't be able to decide which mode to use. */
5019 gcc_assert (GET_MODE (from
) != VOIDmode
);
5021 /* Look for an insn to do the conversion. Do it in the specified
5022 modes if possible; otherwise convert either input, output or both to
5023 wider mode. If the integer mode is wider than the mode of FROM,
5024 we can do the conversion signed even if the input is unsigned. */
5026 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
5027 fmode
= GET_MODE_WIDER_MODE (fmode
))
5028 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
5029 imode
= GET_MODE_WIDER_MODE (imode
))
5031 int doing_unsigned
= unsignedp
;
5033 if (fmode
!= GET_MODE (to
)
5034 && significand_size (fmode
) < GET_MODE_PRECISION (GET_MODE (from
)))
5037 icode
= can_float_p (fmode
, imode
, unsignedp
);
5038 if (icode
== CODE_FOR_nothing
&& unsignedp
)
5040 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
5041 if (scode
!= CODE_FOR_nothing
)
5042 can_do_signed
= true;
5043 if (imode
!= GET_MODE (from
))
5044 icode
= scode
, doing_unsigned
= 0;
5047 if (icode
!= CODE_FOR_nothing
)
5049 if (imode
!= GET_MODE (from
))
5050 from
= convert_to_mode (imode
, from
, unsignedp
);
5052 if (fmode
!= GET_MODE (to
))
5053 target
= gen_reg_rtx (fmode
);
5055 emit_unop_insn (icode
, target
, from
,
5056 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
5059 convert_move (to
, target
, 0);
5064 /* Unsigned integer, and no way to convert directly. Convert as signed,
5065 then unconditionally adjust the result. */
5066 if (unsignedp
&& can_do_signed
)
5068 rtx label
= gen_label_rtx ();
5070 REAL_VALUE_TYPE offset
;
5072 /* Look for a usable floating mode FMODE wider than the source and at
5073 least as wide as the target. Using FMODE will avoid rounding woes
5074 with unsigned values greater than the signed maximum value. */
5076 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
5077 fmode
= GET_MODE_WIDER_MODE (fmode
))
5078 if (GET_MODE_PRECISION (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
5079 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
5082 if (fmode
== VOIDmode
)
5084 /* There is no such mode. Pretend the target is wide enough. */
5085 fmode
= GET_MODE (to
);
5087 /* Avoid double-rounding when TO is narrower than FROM. */
5088 if ((significand_size (fmode
) + 1)
5089 < GET_MODE_PRECISION (GET_MODE (from
)))
5092 rtx neglabel
= gen_label_rtx ();
5094 /* Don't use TARGET if it isn't a register, is a hard register,
5095 or is the wrong mode. */
5097 || REGNO (target
) < FIRST_PSEUDO_REGISTER
5098 || GET_MODE (target
) != fmode
)
5099 target
= gen_reg_rtx (fmode
);
5101 imode
= GET_MODE (from
);
5102 do_pending_stack_adjust ();
5104 /* Test whether the sign bit is set. */
5105 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
5108 /* The sign bit is not set. Convert as signed. */
5109 expand_float (target
, from
, 0);
5110 emit_jump_insn (gen_jump (label
));
5113 /* The sign bit is set.
5114 Convert to a usable (positive signed) value by shifting right
5115 one bit, while remembering if a nonzero bit was shifted
5116 out; i.e., compute (from & 1) | (from >> 1). */
5118 emit_label (neglabel
);
5119 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
5120 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
5121 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, 1, NULL_RTX
, 1);
5122 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
5124 expand_float (target
, temp
, 0);
5126 /* Multiply by 2 to undo the shift above. */
5127 temp
= expand_binop (fmode
, add_optab
, target
, target
,
5128 target
, 0, OPTAB_LIB_WIDEN
);
5130 emit_move_insn (target
, temp
);
5132 do_pending_stack_adjust ();
5138 /* If we are about to do some arithmetic to correct for an
5139 unsigned operand, do it in a pseudo-register. */
5141 if (GET_MODE (to
) != fmode
5142 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
5143 target
= gen_reg_rtx (fmode
);
5145 /* Convert as signed integer to floating. */
5146 expand_float (target
, from
, 0);
5148 /* If FROM is negative (and therefore TO is negative),
5149 correct its value by 2**bitwidth. */
5151 do_pending_stack_adjust ();
5152 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5156 real_2expN (&offset
, GET_MODE_PRECISION (GET_MODE (from
)), fmode
);
5157 temp
= expand_binop (fmode
, add_optab
, target
,
5158 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5159 target
, 0, OPTAB_LIB_WIDEN
);
5161 emit_move_insn (target
, temp
);
5163 do_pending_stack_adjust ();
5168 /* No hardware instruction available; call a library routine. */
5173 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5175 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
5176 from
= convert_to_mode (SImode
, from
, unsignedp
);
5178 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5179 gcc_assert (libfunc
);
5183 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5184 GET_MODE (to
), 1, from
,
5186 insns
= get_insns ();
5189 emit_libcall_block (insns
, target
, value
,
5190 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5191 GET_MODE (to
), from
));
5196 /* Copy result to requested destination
5197 if we have been computing in a temp location. */
5201 if (GET_MODE (target
) == GET_MODE (to
))
5202 emit_move_insn (to
, target
);
5204 convert_move (to
, target
, 0);
5208 /* Generate code to convert FROM to fixed point and store in TO. FROM
5209 must be floating point. */
5212 expand_fix (rtx to
, rtx from
, int unsignedp
)
5214 enum insn_code icode
;
5216 enum machine_mode fmode
, imode
;
5219 /* We first try to find a pair of modes, one real and one integer, at
5220 least as wide as FROM and TO, respectively, in which we can open-code
5221 this conversion. If the integer mode is wider than the mode of TO,
5222 we can do the conversion either signed or unsigned. */
5224 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5225 fmode
= GET_MODE_WIDER_MODE (fmode
))
5226 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5227 imode
= GET_MODE_WIDER_MODE (imode
))
5229 int doing_unsigned
= unsignedp
;
5231 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5232 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5233 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5235 if (icode
!= CODE_FOR_nothing
)
5237 rtx last
= get_last_insn ();
5238 if (fmode
!= GET_MODE (from
))
5239 from
= convert_to_mode (fmode
, from
, 0);
5243 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5244 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5248 if (imode
!= GET_MODE (to
))
5249 target
= gen_reg_rtx (imode
);
5251 if (maybe_emit_unop_insn (icode
, target
, from
,
5252 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5255 convert_move (to
, target
, unsignedp
);
5258 delete_insns_since (last
);
5262 /* For an unsigned conversion, there is one more way to do it.
5263 If we have a signed conversion, we generate code that compares
5264 the real value to the largest representable positive number. If if
5265 is smaller, the conversion is done normally. Otherwise, subtract
5266 one plus the highest signed number, convert, and add it back.
5268 We only need to check all real modes, since we know we didn't find
5269 anything with a wider integer mode.
5271 This code used to extend FP value into mode wider than the destination.
5272 This is needed for decimal float modes which cannot accurately
5273 represent one plus the highest signed number of the same size, but
5274 not for binary modes. Consider, for instance conversion from SFmode
5277 The hot path through the code is dealing with inputs smaller than 2^63
5278 and doing just the conversion, so there is no bits to lose.
5280 In the other path we know the value is positive in the range 2^63..2^64-1
5281 inclusive. (as for other input overflow happens and result is undefined)
5282 So we know that the most important bit set in mantissa corresponds to
5283 2^63. The subtraction of 2^63 should not generate any rounding as it
5284 simply clears out that bit. The rest is trivial. */
5286 if (unsignedp
&& GET_MODE_PRECISION (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5287 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5288 fmode
= GET_MODE_WIDER_MODE (fmode
))
5289 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5290 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5291 || GET_MODE_BITSIZE (fmode
) > GET_MODE_PRECISION (GET_MODE (to
))))
5294 REAL_VALUE_TYPE offset
;
5295 rtx limit
, lab1
, lab2
, insn
;
5297 bitsize
= GET_MODE_PRECISION (GET_MODE (to
));
5298 real_2expN (&offset
, bitsize
- 1, fmode
);
5299 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5300 lab1
= gen_label_rtx ();
5301 lab2
= gen_label_rtx ();
5303 if (fmode
!= GET_MODE (from
))
5304 from
= convert_to_mode (fmode
, from
, 0);
5306 /* See if we need to do the subtraction. */
5307 do_pending_stack_adjust ();
5308 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5311 /* If not, do the signed "fix" and branch around fixup code. */
5312 expand_fix (to
, from
, 0);
5313 emit_jump_insn (gen_jump (lab2
));
5316 /* Otherwise, subtract 2**(N-1), convert to signed number,
5317 then add 2**(N-1). Do the addition using XOR since this
5318 will often generate better code. */
5320 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5321 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5322 expand_fix (to
, target
, 0);
5323 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5325 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5327 to
, 1, OPTAB_LIB_WIDEN
);
5330 emit_move_insn (to
, target
);
5334 if (optab_handler (mov_optab
, GET_MODE (to
)) != CODE_FOR_nothing
)
5336 /* Make a place for a REG_NOTE and add it. */
5337 insn
= emit_move_insn (to
, to
);
5338 set_dst_reg_note (insn
, REG_EQUAL
,
5339 gen_rtx_fmt_e (UNSIGNED_FIX
, GET_MODE (to
),
5347 /* We can't do it with an insn, so use a library call. But first ensure
5348 that the mode of TO is at least as wide as SImode, since those are the
5349 only library calls we know about. */
5351 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5353 target
= gen_reg_rtx (SImode
);
5355 expand_fix (target
, from
, unsignedp
);
5363 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5364 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5365 gcc_assert (libfunc
);
5369 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5370 GET_MODE (to
), 1, from
,
5372 insns
= get_insns ();
5375 emit_libcall_block (insns
, target
, value
,
5376 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5377 GET_MODE (to
), from
));
5382 if (GET_MODE (to
) == GET_MODE (target
))
5383 emit_move_insn (to
, target
);
5385 convert_move (to
, target
, 0);
5389 /* Generate code to convert FROM or TO a fixed-point.
5390 If UINTP is true, either TO or FROM is an unsigned integer.
5391 If SATP is true, we need to saturate the result. */
5394 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5396 enum machine_mode to_mode
= GET_MODE (to
);
5397 enum machine_mode from_mode
= GET_MODE (from
);
5399 enum rtx_code this_code
;
5400 enum insn_code code
;
5404 if (to_mode
== from_mode
)
5406 emit_move_insn (to
, from
);
5412 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5413 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5417 tab
= satp
? satfract_optab
: fract_optab
;
5418 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5420 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
5421 if (code
!= CODE_FOR_nothing
)
5423 emit_unop_insn (code
, to
, from
, this_code
);
5427 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5428 gcc_assert (libfunc
);
5431 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5432 1, from
, from_mode
);
5433 insns
= get_insns ();
5436 emit_libcall_block (insns
, to
, value
,
5437 gen_rtx_fmt_e (optab_to_code (tab
), to_mode
, from
));
5440 /* Generate code to convert FROM to fixed point and store in TO. FROM
5441 must be floating point, TO must be signed. Use the conversion optab
5442 TAB to do the conversion. */
5445 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5447 enum insn_code icode
;
5449 enum machine_mode fmode
, imode
;
5451 /* We first try to find a pair of modes, one real and one integer, at
5452 least as wide as FROM and TO, respectively, in which we can open-code
5453 this conversion. If the integer mode is wider than the mode of TO,
5454 we can do the conversion either signed or unsigned. */
5456 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5457 fmode
= GET_MODE_WIDER_MODE (fmode
))
5458 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5459 imode
= GET_MODE_WIDER_MODE (imode
))
5461 icode
= convert_optab_handler (tab
, imode
, fmode
);
5462 if (icode
!= CODE_FOR_nothing
)
5464 rtx last
= get_last_insn ();
5465 if (fmode
!= GET_MODE (from
))
5466 from
= convert_to_mode (fmode
, from
, 0);
5468 if (imode
!= GET_MODE (to
))
5469 target
= gen_reg_rtx (imode
);
5471 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5473 delete_insns_since (last
);
5477 convert_move (to
, target
, 0);
5485 /* Report whether we have an instruction to perform the operation
5486 specified by CODE on operands of mode MODE. */
5488 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
5490 return (code_to_optab (code
)
5491 && (optab_handler (code_to_optab (code
), mode
)
5492 != CODE_FOR_nothing
));
5495 /* Initialize the libfunc fields of an entire group of entries in some
5496 optab. Each entry is set equal to a string consisting of a leading
5497 pair of underscores followed by a generic operation name followed by
5498 a mode name (downshifted to lowercase) followed by a single character
5499 representing the number of operands for the given operation (which is
5500 usually one of the characters '2', '3', or '4').
5502 OPTABLE is the table in which libfunc fields are to be initialized.
5503 OPNAME is the generic (string) name of the operation.
5504 SUFFIX is the character which specifies the number of operands for
5505 the given generic operation.
5506 MODE is the mode to generate for.
5510 gen_libfunc (optab optable
, const char *opname
, int suffix
,
5511 enum machine_mode mode
)
5513 unsigned opname_len
= strlen (opname
);
5514 const char *mname
= GET_MODE_NAME (mode
);
5515 unsigned mname_len
= strlen (mname
);
5516 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5517 int len
= prefix_len
+ opname_len
+ mname_len
+ 1 + 1;
5518 char *libfunc_name
= XALLOCAVEC (char, len
);
5525 if (targetm
.libfunc_gnu_prefix
)
5532 for (q
= opname
; *q
; )
5534 for (q
= mname
; *q
; q
++)
5535 *p
++ = TOLOWER (*q
);
5539 set_optab_libfunc (optable
, mode
,
5540 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5543 /* Like gen_libfunc, but verify that integer operation is involved. */
5546 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5547 enum machine_mode mode
)
5549 int maxsize
= 2 * BITS_PER_WORD
;
5551 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5553 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5554 maxsize
= LONG_LONG_TYPE_SIZE
;
5555 if (GET_MODE_CLASS (mode
) != MODE_INT
5556 || GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
5557 || GET_MODE_BITSIZE (mode
) > maxsize
)
5559 gen_libfunc (optable
, opname
, suffix
, mode
);
5562 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5565 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5566 enum machine_mode mode
)
5570 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5571 gen_libfunc (optable
, opname
, suffix
, mode
);
5572 if (DECIMAL_FLOAT_MODE_P (mode
))
5574 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5575 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5576 depending on the low level floating format used. */
5577 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5578 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5579 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5583 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5586 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5587 enum machine_mode mode
)
5589 if (!ALL_FIXED_POINT_MODE_P (mode
))
5591 gen_libfunc (optable
, opname
, suffix
, mode
);
5594 /* Like gen_libfunc, but verify that signed fixed-point operation is
5598 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5599 enum machine_mode mode
)
5601 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5603 gen_libfunc (optable
, opname
, suffix
, mode
);
5606 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5610 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5611 enum machine_mode mode
)
5613 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5615 gen_libfunc (optable
, opname
, suffix
, mode
);
5618 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5621 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5622 enum machine_mode mode
)
5624 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5625 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5626 if (INTEGRAL_MODE_P (mode
))
5627 gen_int_libfunc (optable
, name
, suffix
, mode
);
5630 /* Like gen_libfunc, but verify that FP or INT operation is involved
5631 and add 'v' suffix for integer operation. */
5634 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5635 enum machine_mode mode
)
5637 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5638 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5639 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5641 int len
= strlen (name
);
5642 char *v_name
= XALLOCAVEC (char, len
+ 2);
5643 strcpy (v_name
, name
);
5645 v_name
[len
+ 1] = 0;
5646 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5650 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5654 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5655 enum machine_mode mode
)
5657 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5658 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5659 if (INTEGRAL_MODE_P (mode
))
5660 gen_int_libfunc (optable
, name
, suffix
, mode
);
5661 if (ALL_FIXED_POINT_MODE_P (mode
))
5662 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5665 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5669 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5670 enum machine_mode mode
)
5672 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5673 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5674 if (INTEGRAL_MODE_P (mode
))
5675 gen_int_libfunc (optable
, name
, suffix
, mode
);
5676 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5677 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5680 /* Like gen_libfunc, but verify that INT or FIXED operation is
5684 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5685 enum machine_mode mode
)
5687 if (INTEGRAL_MODE_P (mode
))
5688 gen_int_libfunc (optable
, name
, suffix
, mode
);
5689 if (ALL_FIXED_POINT_MODE_P (mode
))
5690 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5693 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5697 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5698 enum machine_mode mode
)
5700 if (INTEGRAL_MODE_P (mode
))
5701 gen_int_libfunc (optable
, name
, suffix
, mode
);
5702 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5703 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5706 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5710 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5711 enum machine_mode mode
)
5713 if (INTEGRAL_MODE_P (mode
))
5714 gen_int_libfunc (optable
, name
, suffix
, mode
);
5715 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5716 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5719 /* Initialize the libfunc fields of an entire group of entries of an
5720 inter-mode-class conversion optab. The string formation rules are
5721 similar to the ones for init_libfuncs, above, but instead of having
5722 a mode name and an operand count these functions have two mode names
5723 and no operand count. */
5726 gen_interclass_conv_libfunc (convert_optab tab
,
5728 enum machine_mode tmode
,
5729 enum machine_mode fmode
)
5731 size_t opname_len
= strlen (opname
);
5732 size_t mname_len
= 0;
5734 const char *fname
, *tname
;
5736 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5737 char *libfunc_name
, *suffix
;
5738 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5741 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5742 depends on which underlying decimal floating point format is used. */
5743 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5745 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5747 nondec_name
= XALLOCAVEC (char, prefix_len
+ opname_len
+ mname_len
+ 1 + 1);
5748 nondec_name
[0] = '_';
5749 nondec_name
[1] = '_';
5750 if (targetm
.libfunc_gnu_prefix
)
5752 nondec_name
[2] = 'g';
5753 nondec_name
[3] = 'n';
5754 nondec_name
[4] = 'u';
5755 nondec_name
[5] = '_';
5758 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5759 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5761 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5764 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5765 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5766 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5768 fname
= GET_MODE_NAME (fmode
);
5769 tname
= GET_MODE_NAME (tmode
);
5771 if (DECIMAL_FLOAT_MODE_P (fmode
) || DECIMAL_FLOAT_MODE_P (tmode
))
5773 libfunc_name
= dec_name
;
5774 suffix
= dec_suffix
;
5778 libfunc_name
= nondec_name
;
5779 suffix
= nondec_suffix
;
5783 for (q
= fname
; *q
; p
++, q
++)
5785 for (q
= tname
; *q
; p
++, q
++)
5790 set_conv_libfunc (tab
, tmode
, fmode
,
5791 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5794 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5795 int->fp conversion. */
5798 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5800 enum machine_mode tmode
,
5801 enum machine_mode fmode
)
5803 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5805 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5807 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5810 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5814 gen_ufloat_conv_libfunc (convert_optab tab
,
5815 const char *opname ATTRIBUTE_UNUSED
,
5816 enum machine_mode tmode
,
5817 enum machine_mode fmode
)
5819 if (DECIMAL_FLOAT_MODE_P (tmode
))
5820 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5822 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5825 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5826 fp->int conversion. */
5829 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5831 enum machine_mode tmode
,
5832 enum machine_mode fmode
)
5834 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5836 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5838 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5841 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5842 fp->int conversion with no decimal floating point involved. */
5845 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5847 enum machine_mode tmode
,
5848 enum machine_mode fmode
)
5850 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5852 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5854 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5857 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5858 The string formation rules are
5859 similar to the ones for init_libfunc, above. */
5862 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5863 enum machine_mode tmode
, enum machine_mode fmode
)
5865 size_t opname_len
= strlen (opname
);
5866 size_t mname_len
= 0;
5868 const char *fname
, *tname
;
5870 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5871 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5872 char *libfunc_name
, *suffix
;
5875 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5876 depends on which underlying decimal floating point format is used. */
5877 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5879 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5881 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5882 nondec_name
[0] = '_';
5883 nondec_name
[1] = '_';
5884 if (targetm
.libfunc_gnu_prefix
)
5886 nondec_name
[2] = 'g';
5887 nondec_name
[3] = 'n';
5888 nondec_name
[4] = 'u';
5889 nondec_name
[5] = '_';
5891 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5892 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5894 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5897 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5898 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5899 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5901 fname
= GET_MODE_NAME (fmode
);
5902 tname
= GET_MODE_NAME (tmode
);
5904 if (DECIMAL_FLOAT_MODE_P (fmode
) || DECIMAL_FLOAT_MODE_P (tmode
))
5906 libfunc_name
= dec_name
;
5907 suffix
= dec_suffix
;
5911 libfunc_name
= nondec_name
;
5912 suffix
= nondec_suffix
;
5916 for (q
= fname
; *q
; p
++, q
++)
5918 for (q
= tname
; *q
; p
++, q
++)
5924 set_conv_libfunc (tab
, tmode
, fmode
,
5925 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5928 /* Pick proper libcall for trunc_optab. We need to chose if we do
5929 truncation or extension and interclass or intraclass. */
5932 gen_trunc_conv_libfunc (convert_optab tab
,
5934 enum machine_mode tmode
,
5935 enum machine_mode fmode
)
5937 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5939 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5944 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5945 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5946 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5948 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5951 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5952 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5953 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5954 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5957 /* Pick proper libcall for extend_optab. We need to chose if we do
5958 truncation or extension and interclass or intraclass. */
5961 gen_extend_conv_libfunc (convert_optab tab
,
5962 const char *opname ATTRIBUTE_UNUSED
,
5963 enum machine_mode tmode
,
5964 enum machine_mode fmode
)
5966 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5968 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5973 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5974 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5975 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5977 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5980 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5981 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5982 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5983 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5986 /* Pick proper libcall for fract_optab. We need to chose if we do
5987 interclass or intraclass. */
5990 gen_fract_conv_libfunc (convert_optab tab
,
5992 enum machine_mode tmode
,
5993 enum machine_mode fmode
)
5997 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
6000 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
6001 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6003 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6006 /* Pick proper libcall for fractuns_optab. */
6009 gen_fractuns_conv_libfunc (convert_optab tab
,
6011 enum machine_mode tmode
,
6012 enum machine_mode fmode
)
6016 /* One mode must be a fixed-point mode, and the other must be an integer
6018 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
6019 || (ALL_FIXED_POINT_MODE_P (fmode
)
6020 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
6023 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6026 /* Pick proper libcall for satfract_optab. We need to chose if we do
6027 interclass or intraclass. */
6030 gen_satfract_conv_libfunc (convert_optab tab
,
6032 enum machine_mode tmode
,
6033 enum machine_mode fmode
)
6037 /* TMODE must be a fixed-point mode. */
6038 if (!ALL_FIXED_POINT_MODE_P (tmode
))
6041 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
6042 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6044 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6047 /* Pick proper libcall for satfractuns_optab. */
6050 gen_satfractuns_conv_libfunc (convert_optab tab
,
6052 enum machine_mode tmode
,
6053 enum machine_mode fmode
)
6057 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
6058 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
6061 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6064 /* A table of previously-created libfuncs, hashed by name. */
6065 static GTY ((param_is (union tree_node
))) htab_t libfunc_decls
;
6067 /* Hashtable callbacks for libfunc_decls. */
6070 libfunc_decl_hash (const void *entry
)
6072 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree
) entry
));
6076 libfunc_decl_eq (const void *entry1
, const void *entry2
)
6078 return DECL_NAME ((const_tree
) entry1
) == (const_tree
) entry2
;
6081 /* Build a decl for a libfunc named NAME. */
6084 build_libfunc_function (const char *name
)
6086 tree decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
6087 get_identifier (name
),
6088 build_function_type (integer_type_node
, NULL_TREE
));
6089 /* ??? We don't have any type information except for this is
6090 a function. Pretend this is "int foo()". */
6091 DECL_ARTIFICIAL (decl
) = 1;
6092 DECL_EXTERNAL (decl
) = 1;
6093 TREE_PUBLIC (decl
) = 1;
6094 gcc_assert (DECL_ASSEMBLER_NAME (decl
));
6096 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6097 are the flags assigned by targetm.encode_section_info. */
6098 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
6104 init_one_libfunc (const char *name
)
6110 if (libfunc_decls
== NULL
)
6111 libfunc_decls
= htab_create_ggc (37, libfunc_decl_hash
,
6112 libfunc_decl_eq
, NULL
);
6114 /* See if we have already created a libfunc decl for this function. */
6115 id
= get_identifier (name
);
6116 hash
= IDENTIFIER_HASH_VALUE (id
);
6117 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, INSERT
);
6118 decl
= (tree
) *slot
;
6121 /* Create a new decl, so that it can be passed to
6122 targetm.encode_section_info. */
6123 decl
= build_libfunc_function (name
);
6126 return XEXP (DECL_RTL (decl
), 0);
6129 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6132 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6138 id
= get_identifier (name
);
6139 hash
= IDENTIFIER_HASH_VALUE (id
);
6140 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, NO_INSERT
);
6142 decl
= (tree
) *slot
;
6143 set_user_assembler_name (decl
, asmspec
);
6144 return XEXP (DECL_RTL (decl
), 0);
6147 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6148 MODE to NAME, which should be either 0 or a string constant. */
6150 set_optab_libfunc (optab op
, enum machine_mode mode
, const char *name
)
6153 struct libfunc_entry e
;
6154 struct libfunc_entry
**slot
;
6161 val
= init_one_libfunc (name
);
6164 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6166 *slot
= ggc_alloc_libfunc_entry ();
6168 (*slot
)->mode1
= mode
;
6169 (*slot
)->mode2
= VOIDmode
;
6170 (*slot
)->libfunc
= val
;
6173 /* Call this to reset the function entry for one conversion optab
6174 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6175 either 0 or a string constant. */
6177 set_conv_libfunc (convert_optab optab
, enum machine_mode tmode
,
6178 enum machine_mode fmode
, const char *name
)
6181 struct libfunc_entry e
;
6182 struct libfunc_entry
**slot
;
6189 val
= init_one_libfunc (name
);
6192 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6194 *slot
= ggc_alloc_libfunc_entry ();
6195 (*slot
)->op
= optab
;
6196 (*slot
)->mode1
= tmode
;
6197 (*slot
)->mode2
= fmode
;
6198 (*slot
)->libfunc
= val
;
6201 /* Call this to initialize the contents of the optabs
6202 appropriately for the current target machine. */
6208 htab_empty (libfunc_hash
);
6210 libfunc_hash
= htab_create_ggc (10, hash_libfunc
, eq_libfunc
, NULL
);
6212 /* Fill in the optabs with the insns we support. */
6213 init_all_optabs (this_fn_optabs
);
6215 /* The ffs function operates on `int'. Fall back on it if we do not
6216 have a libgcc2 function for that width. */
6217 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6218 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6221 /* Explicitly initialize the bswap libfuncs since we need them to be
6222 valid for things other than word_mode. */
6223 if (targetm
.libfunc_gnu_prefix
)
6225 set_optab_libfunc (bswap_optab
, SImode
, "__gnu_bswapsi2");
6226 set_optab_libfunc (bswap_optab
, DImode
, "__gnu_bswapdi2");
6230 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6231 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6234 /* Use cabs for double complex abs, since systems generally have cabs.
6235 Don't define any libcall for float complex, so that cabs will be used. */
6236 if (complex_double_type_node
)
6237 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
),
6240 abort_libfunc
= init_one_libfunc ("abort");
6241 memcpy_libfunc
= init_one_libfunc ("memcpy");
6242 memmove_libfunc
= init_one_libfunc ("memmove");
6243 memcmp_libfunc
= init_one_libfunc ("memcmp");
6244 memset_libfunc
= init_one_libfunc ("memset");
6245 setbits_libfunc
= init_one_libfunc ("__setbits");
6247 #ifndef DONT_USE_BUILTIN_SETJMP
6248 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6249 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6251 setjmp_libfunc
= init_one_libfunc ("setjmp");
6252 longjmp_libfunc
= init_one_libfunc ("longjmp");
6254 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6255 unwind_sjlj_unregister_libfunc
6256 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6258 /* For function entry/exit instrumentation. */
6259 profile_function_entry_libfunc
6260 = init_one_libfunc ("__cyg_profile_func_enter");
6261 profile_function_exit_libfunc
6262 = init_one_libfunc ("__cyg_profile_func_exit");
6264 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6266 /* Allow the target to add more libcalls or rename some, etc. */
6267 targetm
.init_libfuncs ();
6270 /* Use the current target and options to initialize
6271 TREE_OPTIMIZATION_OPTABS (OPTNODE). */
6274 init_tree_optimization_optabs (tree optnode
)
6276 /* Quick exit if we have already computed optabs for this target. */
6277 if (TREE_OPTIMIZATION_BASE_OPTABS (optnode
) == this_target_optabs
)
6280 /* Forget any previous information and set up for the current target. */
6281 TREE_OPTIMIZATION_BASE_OPTABS (optnode
) = this_target_optabs
;
6282 struct target_optabs
*tmp_optabs
= (struct target_optabs
*)
6283 TREE_OPTIMIZATION_OPTABS (optnode
);
6285 memset (tmp_optabs
, 0, sizeof (struct target_optabs
));
6287 tmp_optabs
= (struct target_optabs
*)
6288 ggc_alloc_atomic (sizeof (struct target_optabs
));
6290 /* Generate a new set of optabs into tmp_optabs. */
6291 init_all_optabs (tmp_optabs
);
6293 /* If the optabs changed, record it. */
6294 if (memcmp (tmp_optabs
, this_target_optabs
, sizeof (struct target_optabs
)))
6295 TREE_OPTIMIZATION_OPTABS (optnode
) = tmp_optabs
;
6298 TREE_OPTIMIZATION_OPTABS (optnode
) = NULL
;
6299 ggc_free (tmp_optabs
);
6303 /* A helper function for init_sync_libfuncs. Using the basename BASE,
6304 install libfuncs into TAB for BASE_N for 1 <= N <= MAX. */
6307 init_sync_libfuncs_1 (optab tab
, const char *base
, int max
)
6309 enum machine_mode mode
;
6311 size_t len
= strlen (base
);
6314 gcc_assert (max
<= 8);
6315 gcc_assert (len
+ 3 < sizeof (buf
));
6317 memcpy (buf
, base
, len
);
6320 buf
[len
+ 2] = '\0';
6323 for (i
= 1; i
<= max
; i
*= 2)
6325 buf
[len
+ 1] = '0' + i
;
6326 set_optab_libfunc (tab
, mode
, buf
);
6327 mode
= GET_MODE_2XWIDER_MODE (mode
);
6332 init_sync_libfuncs (int max
)
6334 if (!flag_sync_libcalls
)
6337 init_sync_libfuncs_1 (sync_compare_and_swap_optab
,
6338 "__sync_val_compare_and_swap", max
);
6339 init_sync_libfuncs_1 (sync_lock_test_and_set_optab
,
6340 "__sync_lock_test_and_set", max
);
6342 init_sync_libfuncs_1 (sync_old_add_optab
, "__sync_fetch_and_add", max
);
6343 init_sync_libfuncs_1 (sync_old_sub_optab
, "__sync_fetch_and_sub", max
);
6344 init_sync_libfuncs_1 (sync_old_ior_optab
, "__sync_fetch_and_or", max
);
6345 init_sync_libfuncs_1 (sync_old_and_optab
, "__sync_fetch_and_and", max
);
6346 init_sync_libfuncs_1 (sync_old_xor_optab
, "__sync_fetch_and_xor", max
);
6347 init_sync_libfuncs_1 (sync_old_nand_optab
, "__sync_fetch_and_nand", max
);
6349 init_sync_libfuncs_1 (sync_new_add_optab
, "__sync_add_and_fetch", max
);
6350 init_sync_libfuncs_1 (sync_new_sub_optab
, "__sync_sub_and_fetch", max
);
6351 init_sync_libfuncs_1 (sync_new_ior_optab
, "__sync_or_and_fetch", max
);
6352 init_sync_libfuncs_1 (sync_new_and_optab
, "__sync_and_and_fetch", max
);
6353 init_sync_libfuncs_1 (sync_new_xor_optab
, "__sync_xor_and_fetch", max
);
6354 init_sync_libfuncs_1 (sync_new_nand_optab
, "__sync_nand_and_fetch", max
);
6357 /* Print information about the current contents of the optabs on
6361 debug_optab_libfuncs (void)
6365 /* Dump the arithmetic optabs. */
6366 for (i
= FIRST_NORM_OPTAB
; i
<= LAST_NORMLIB_OPTAB
; ++i
)
6367 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6369 rtx l
= optab_libfunc ((optab
) i
, (enum machine_mode
) j
);
6372 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6373 fprintf (stderr
, "%s\t%s:\t%s\n",
6374 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6380 /* Dump the conversion optabs. */
6381 for (i
= FIRST_CONV_OPTAB
; i
<= LAST_CONVLIB_OPTAB
; ++i
)
6382 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6383 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6385 rtx l
= convert_optab_libfunc ((optab
) i
, (enum machine_mode
) j
,
6386 (enum machine_mode
) k
);
6389 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6390 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6391 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6400 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6401 CODE. Return 0 on failure. */
6404 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6406 enum machine_mode mode
= GET_MODE (op1
);
6407 enum insn_code icode
;
6411 if (mode
== VOIDmode
)
6414 icode
= optab_handler (ctrap_optab
, mode
);
6415 if (icode
== CODE_FOR_nothing
)
6418 /* Some targets only accept a zero trap code. */
6419 if (!insn_operand_matches (icode
, 3, tcode
))
6422 do_pending_stack_adjust ();
6424 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6429 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6432 /* If that failed, then give up. */
6440 insn
= get_insns ();
6445 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6446 or unsigned operation code. */
6448 static enum rtx_code
6449 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6461 code
= unsignedp
? LTU
: LT
;
6464 code
= unsignedp
? LEU
: LE
;
6467 code
= unsignedp
? GTU
: GT
;
6470 code
= unsignedp
? GEU
: GE
;
6473 case UNORDERED_EXPR
:
6504 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6505 unsigned operators. Do not generate compare instruction. */
6508 vector_compare_rtx (enum tree_code tcode
, tree t_op0
, tree t_op1
,
6509 bool unsignedp
, enum insn_code icode
)
6511 struct expand_operand ops
[2];
6512 rtx rtx_op0
, rtx_op1
;
6513 enum rtx_code rcode
= get_rtx_code (tcode
, unsignedp
);
6515 gcc_assert (TREE_CODE_CLASS (tcode
) == tcc_comparison
);
6517 /* Expand operands. */
6518 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6520 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6523 create_input_operand (&ops
[0], rtx_op0
, GET_MODE (rtx_op0
));
6524 create_input_operand (&ops
[1], rtx_op1
, GET_MODE (rtx_op1
));
6525 if (!maybe_legitimize_operands (icode
, 4, 2, ops
))
6527 return gen_rtx_fmt_ee (rcode
, VOIDmode
, ops
[0].value
, ops
[1].value
);
6530 /* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
6531 of the CPU. SEL may be NULL, which stands for an unknown constant. */
6534 can_vec_perm_p (enum machine_mode mode
, bool variable
,
6535 const unsigned char *sel
)
6537 enum machine_mode qimode
;
6539 /* If the target doesn't implement a vector mode for the vector type,
6540 then no operations are supported. */
6541 if (!VECTOR_MODE_P (mode
))
6546 if (direct_optab_handler (vec_perm_const_optab
, mode
) != CODE_FOR_nothing
6548 || targetm
.vectorize
.vec_perm_const_ok
== NULL
6549 || targetm
.vectorize
.vec_perm_const_ok (mode
, sel
)))
6553 if (direct_optab_handler (vec_perm_optab
, mode
) != CODE_FOR_nothing
)
6556 /* We allow fallback to a QI vector mode, and adjust the mask. */
6557 if (GET_MODE_INNER (mode
) == QImode
)
6559 qimode
= mode_for_vector (QImode
, GET_MODE_SIZE (mode
));
6560 if (!VECTOR_MODE_P (qimode
))
6563 /* ??? For completeness, we ought to check the QImode version of
6564 vec_perm_const_optab. But all users of this implicit lowering
6565 feature implement the variable vec_perm_optab. */
6566 if (direct_optab_handler (vec_perm_optab
, qimode
) == CODE_FOR_nothing
)
6569 /* In order to support the lowering of variable permutations,
6570 we need to support shifts and adds. */
6573 if (GET_MODE_UNIT_SIZE (mode
) > 2
6574 && optab_handler (ashl_optab
, mode
) == CODE_FOR_nothing
6575 && optab_handler (vashl_optab
, mode
) == CODE_FOR_nothing
)
6577 if (optab_handler (add_optab
, qimode
) == CODE_FOR_nothing
)
6584 /* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
6587 expand_vec_perm_1 (enum insn_code icode
, rtx target
,
6588 rtx v0
, rtx v1
, rtx sel
)
6590 enum machine_mode tmode
= GET_MODE (target
);
6591 enum machine_mode smode
= GET_MODE (sel
);
6592 struct expand_operand ops
[4];
6594 create_output_operand (&ops
[0], target
, tmode
);
6595 create_input_operand (&ops
[3], sel
, smode
);
6597 /* Make an effort to preserve v0 == v1. The target expander is able to
6598 rely on this to determine if we're permuting a single input operand. */
6599 if (rtx_equal_p (v0
, v1
))
6601 if (!insn_operand_matches (icode
, 1, v0
))
6602 v0
= force_reg (tmode
, v0
);
6603 gcc_checking_assert (insn_operand_matches (icode
, 1, v0
));
6604 gcc_checking_assert (insn_operand_matches (icode
, 2, v0
));
6606 create_fixed_operand (&ops
[1], v0
);
6607 create_fixed_operand (&ops
[2], v0
);
6611 create_input_operand (&ops
[1], v0
, tmode
);
6612 create_input_operand (&ops
[2], v1
, tmode
);
6615 if (maybe_expand_insn (icode
, 4, ops
))
6616 return ops
[0].value
;
6620 /* Generate instructions for vec_perm optab given its mode
6621 and three operands. */
6624 expand_vec_perm (enum machine_mode mode
, rtx v0
, rtx v1
, rtx sel
, rtx target
)
6626 enum insn_code icode
;
6627 enum machine_mode qimode
;
6628 unsigned int i
, w
, e
, u
;
6629 rtx tmp
, sel_qi
= NULL
;
6632 if (!target
|| GET_MODE (target
) != mode
)
6633 target
= gen_reg_rtx (mode
);
6635 w
= GET_MODE_SIZE (mode
);
6636 e
= GET_MODE_NUNITS (mode
);
6637 u
= GET_MODE_UNIT_SIZE (mode
);
6639 /* Set QIMODE to a different vector mode with byte elements.
6640 If no such mode, or if MODE already has byte elements, use VOIDmode. */
6642 if (GET_MODE_INNER (mode
) != QImode
)
6644 qimode
= mode_for_vector (QImode
, w
);
6645 if (!VECTOR_MODE_P (qimode
))
6649 /* If the input is a constant, expand it specially. */
6650 gcc_assert (GET_MODE_CLASS (GET_MODE (sel
)) == MODE_VECTOR_INT
);
6651 if (GET_CODE (sel
) == CONST_VECTOR
)
6653 icode
= direct_optab_handler (vec_perm_const_optab
, mode
);
6654 if (icode
!= CODE_FOR_nothing
)
6656 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6661 /* Fall back to a constant byte-based permutation. */
6662 if (qimode
!= VOIDmode
)
6664 vec
= rtvec_alloc (w
);
6665 for (i
= 0; i
< e
; ++i
)
6667 unsigned int j
, this_e
;
6669 this_e
= INTVAL (CONST_VECTOR_ELT (sel
, i
));
6670 this_e
&= 2 * e
- 1;
6673 for (j
= 0; j
< u
; ++j
)
6674 RTVEC_ELT (vec
, i
* u
+ j
) = GEN_INT (this_e
+ j
);
6676 sel_qi
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6678 icode
= direct_optab_handler (vec_perm_const_optab
, qimode
);
6679 if (icode
!= CODE_FOR_nothing
)
6681 tmp
= mode
!= qimode
? gen_reg_rtx (qimode
) : target
;
6682 tmp
= expand_vec_perm_1 (icode
, tmp
, gen_lowpart (qimode
, v0
),
6683 gen_lowpart (qimode
, v1
), sel_qi
);
6685 return gen_lowpart (mode
, tmp
);
6690 /* Otherwise expand as a fully variable permuation. */
6691 icode
= direct_optab_handler (vec_perm_optab
, mode
);
6692 if (icode
!= CODE_FOR_nothing
)
6694 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6699 /* As a special case to aid several targets, lower the element-based
6700 permutation to a byte-based permutation and try again. */
6701 if (qimode
== VOIDmode
)
6703 icode
= direct_optab_handler (vec_perm_optab
, qimode
);
6704 if (icode
== CODE_FOR_nothing
)
6709 /* Multiply each element by its byte size. */
6710 enum machine_mode selmode
= GET_MODE (sel
);
6712 sel
= expand_simple_binop (selmode
, PLUS
, sel
, sel
,
6713 sel
, 0, OPTAB_DIRECT
);
6715 sel
= expand_simple_binop (selmode
, ASHIFT
, sel
,
6716 GEN_INT (exact_log2 (u
)),
6717 sel
, 0, OPTAB_DIRECT
);
6718 gcc_assert (sel
!= NULL
);
6720 /* Broadcast the low byte each element into each of its bytes. */
6721 vec
= rtvec_alloc (w
);
6722 for (i
= 0; i
< w
; ++i
)
6724 int this_e
= i
/ u
* u
;
6725 if (BYTES_BIG_ENDIAN
)
6727 RTVEC_ELT (vec
, i
) = GEN_INT (this_e
);
6729 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6730 sel
= gen_lowpart (qimode
, sel
);
6731 sel
= expand_vec_perm (qimode
, sel
, sel
, tmp
, NULL
);
6732 gcc_assert (sel
!= NULL
);
6734 /* Add the byte offset to each byte element. */
6735 /* Note that the definition of the indicies here is memory ordering,
6736 so there should be no difference between big and little endian. */
6737 vec
= rtvec_alloc (w
);
6738 for (i
= 0; i
< w
; ++i
)
6739 RTVEC_ELT (vec
, i
) = GEN_INT (i
% u
);
6740 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6741 sel_qi
= expand_simple_binop (qimode
, PLUS
, sel
, tmp
,
6742 sel
, 0, OPTAB_DIRECT
);
6743 gcc_assert (sel_qi
!= NULL
);
6746 tmp
= mode
!= qimode
? gen_reg_rtx (qimode
) : target
;
6747 tmp
= expand_vec_perm_1 (icode
, tmp
, gen_lowpart (qimode
, v0
),
6748 gen_lowpart (qimode
, v1
), sel_qi
);
6750 tmp
= gen_lowpart (mode
, tmp
);
6754 /* Return insn code for a conditional operator with a comparison in
6755 mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
6757 static inline enum insn_code
6758 get_vcond_icode (enum machine_mode vmode
, enum machine_mode cmode
, bool uns
)
6760 enum insn_code icode
= CODE_FOR_nothing
;
6762 icode
= convert_optab_handler (vcondu_optab
, vmode
, cmode
);
6764 icode
= convert_optab_handler (vcond_optab
, vmode
, cmode
);
6768 /* Return TRUE iff, appropriate vector insns are available
6769 for vector cond expr with vector type VALUE_TYPE and a comparison
6770 with operand vector types in CMP_OP_TYPE. */
6773 expand_vec_cond_expr_p (tree value_type
, tree cmp_op_type
)
6775 enum machine_mode value_mode
= TYPE_MODE (value_type
);
6776 enum machine_mode cmp_op_mode
= TYPE_MODE (cmp_op_type
);
6777 if (GET_MODE_SIZE (value_mode
) != GET_MODE_SIZE (cmp_op_mode
)
6778 || GET_MODE_NUNITS (value_mode
) != GET_MODE_NUNITS (cmp_op_mode
)
6779 || get_vcond_icode (TYPE_MODE (value_type
), TYPE_MODE (cmp_op_type
),
6780 TYPE_UNSIGNED (cmp_op_type
)) == CODE_FOR_nothing
)
6785 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
6789 expand_vec_cond_expr (tree vec_cond_type
, tree op0
, tree op1
, tree op2
,
6792 struct expand_operand ops
[6];
6793 enum insn_code icode
;
6794 rtx comparison
, rtx_op1
, rtx_op2
;
6795 enum machine_mode mode
= TYPE_MODE (vec_cond_type
);
6796 enum machine_mode cmp_op_mode
;
6799 enum tree_code tcode
;
6801 if (COMPARISON_CLASS_P (op0
))
6803 op0a
= TREE_OPERAND (op0
, 0);
6804 op0b
= TREE_OPERAND (op0
, 1);
6805 tcode
= TREE_CODE (op0
);
6810 gcc_assert (!TYPE_UNSIGNED (TREE_TYPE (op0
)));
6812 op0b
= build_zero_cst (TREE_TYPE (op0
));
6815 unsignedp
= TYPE_UNSIGNED (TREE_TYPE (op0a
));
6816 cmp_op_mode
= TYPE_MODE (TREE_TYPE (op0a
));
6819 gcc_assert (GET_MODE_SIZE (mode
) == GET_MODE_SIZE (cmp_op_mode
)
6820 && GET_MODE_NUNITS (mode
) == GET_MODE_NUNITS (cmp_op_mode
));
6822 icode
= get_vcond_icode (mode
, cmp_op_mode
, unsignedp
);
6823 if (icode
== CODE_FOR_nothing
)
6826 comparison
= vector_compare_rtx (tcode
, op0a
, op0b
, unsignedp
, icode
);
6827 rtx_op1
= expand_normal (op1
);
6828 rtx_op2
= expand_normal (op2
);
6830 create_output_operand (&ops
[0], target
, mode
);
6831 create_input_operand (&ops
[1], rtx_op1
, mode
);
6832 create_input_operand (&ops
[2], rtx_op2
, mode
);
6833 create_fixed_operand (&ops
[3], comparison
);
6834 create_fixed_operand (&ops
[4], XEXP (comparison
, 0));
6835 create_fixed_operand (&ops
[5], XEXP (comparison
, 1));
6836 expand_insn (icode
, 6, ops
);
6837 return ops
[0].value
;
6840 /* Return non-zero if a highpart multiply is supported of can be synthisized.
6841 For the benefit of expand_mult_highpart, the return value is 1 for direct,
6842 2 for even/odd widening, and 3 for hi/lo widening. */
6845 can_mult_highpart_p (enum machine_mode mode
, bool uns_p
)
6851 op
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6852 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6855 /* If the mode is an integral vector, synth from widening operations. */
6856 if (GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
)
6859 nunits
= GET_MODE_NUNITS (mode
);
6860 sel
= XALLOCAVEC (unsigned char, nunits
);
6862 op
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6863 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6865 op
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6866 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6868 for (i
= 0; i
< nunits
; ++i
)
6869 sel
[i
] = !BYTES_BIG_ENDIAN
+ (i
& ~1) + ((i
& 1) ? nunits
: 0);
6870 if (can_vec_perm_p (mode
, false, sel
))
6875 op
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6876 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6878 op
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6879 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6881 for (i
= 0; i
< nunits
; ++i
)
6882 sel
[i
] = 2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1);
6883 if (can_vec_perm_p (mode
, false, sel
))
6891 /* Expand a highpart multiply. */
6894 expand_mult_highpart (enum machine_mode mode
, rtx op0
, rtx op1
,
6895 rtx target
, bool uns_p
)
6897 struct expand_operand eops
[3];
6898 enum insn_code icode
;
6899 int method
, i
, nunits
;
6900 enum machine_mode wmode
;
6905 method
= can_mult_highpart_p (mode
, uns_p
);
6911 tab1
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6912 return expand_binop (mode
, tab1
, op0
, op1
, target
, uns_p
,
6915 tab1
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6916 tab2
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6919 tab1
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6920 tab2
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6921 if (BYTES_BIG_ENDIAN
)
6932 icode
= optab_handler (tab1
, mode
);
6933 nunits
= GET_MODE_NUNITS (mode
);
6934 wmode
= insn_data
[icode
].operand
[0].mode
;
6935 gcc_checking_assert (2 * GET_MODE_NUNITS (wmode
) == nunits
);
6936 gcc_checking_assert (GET_MODE_SIZE (wmode
) == GET_MODE_SIZE (mode
));
6938 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
6939 create_input_operand (&eops
[1], op0
, mode
);
6940 create_input_operand (&eops
[2], op1
, mode
);
6941 expand_insn (icode
, 3, eops
);
6942 m1
= gen_lowpart (mode
, eops
[0].value
);
6944 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
6945 create_input_operand (&eops
[1], op0
, mode
);
6946 create_input_operand (&eops
[2], op1
, mode
);
6947 expand_insn (optab_handler (tab2
, mode
), 3, eops
);
6948 m2
= gen_lowpart (mode
, eops
[0].value
);
6950 v
= rtvec_alloc (nunits
);
6953 for (i
= 0; i
< nunits
; ++i
)
6954 RTVEC_ELT (v
, i
) = GEN_INT (!BYTES_BIG_ENDIAN
+ (i
& ~1)
6955 + ((i
& 1) ? nunits
: 0));
6959 for (i
= 0; i
< nunits
; ++i
)
6960 RTVEC_ELT (v
, i
) = GEN_INT (2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1));
6962 perm
= gen_rtx_CONST_VECTOR (mode
, v
);
6964 return expand_vec_perm (mode
, m1
, m2
, perm
, target
);
6967 /* Return true if target supports vector masked load/store for mode. */
6969 can_vec_mask_load_store_p (enum machine_mode mode
, bool is_load
)
6971 optab op
= is_load
? maskload_optab
: maskstore_optab
;
6972 enum machine_mode vmode
;
6973 unsigned int vector_sizes
;
6975 /* If mode is vector mode, check it directly. */
6976 if (VECTOR_MODE_P (mode
))
6977 return optab_handler (op
, mode
) != CODE_FOR_nothing
;
6979 /* Otherwise, return true if there is some vector mode with
6980 the mask load/store supported. */
6982 /* See if there is any chance the mask load or store might be
6983 vectorized. If not, punt. */
6984 vmode
= targetm
.vectorize
.preferred_simd_mode (mode
);
6985 if (!VECTOR_MODE_P (vmode
))
6988 if (optab_handler (op
, vmode
) != CODE_FOR_nothing
)
6991 vector_sizes
= targetm
.vectorize
.autovectorize_vector_sizes ();
6992 while (vector_sizes
!= 0)
6994 unsigned int cur
= 1 << floor_log2 (vector_sizes
);
6995 vector_sizes
&= ~cur
;
6996 if (cur
<= GET_MODE_SIZE (mode
))
6998 vmode
= mode_for_vector (mode
, cur
/ GET_MODE_SIZE (mode
));
6999 if (VECTOR_MODE_P (vmode
)
7000 && optab_handler (op
, vmode
) != CODE_FOR_nothing
)
7006 /* Return true if there is a compare_and_swap pattern. */
7009 can_compare_and_swap_p (enum machine_mode mode
, bool allow_libcall
)
7011 enum insn_code icode
;
7013 /* Check for __atomic_compare_and_swap. */
7014 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7015 if (icode
!= CODE_FOR_nothing
)
7018 /* Check for __sync_compare_and_swap. */
7019 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7020 if (icode
!= CODE_FOR_nothing
)
7022 if (allow_libcall
&& optab_libfunc (sync_compare_and_swap_optab
, mode
))
7025 /* No inline compare and swap. */
7029 /* Return true if an atomic exchange can be performed. */
7032 can_atomic_exchange_p (enum machine_mode mode
, bool allow_libcall
)
7034 enum insn_code icode
;
7036 /* Check for __atomic_exchange. */
7037 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7038 if (icode
!= CODE_FOR_nothing
)
7041 /* Don't check __sync_test_and_set, as on some platforms that
7042 has reduced functionality. Targets that really do support
7043 a proper exchange should simply be updated to the __atomics. */
7045 return can_compare_and_swap_p (mode
, allow_libcall
);
7049 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
7053 find_cc_set (rtx x
, const_rtx pat
, void *data
)
7055 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
7056 && GET_CODE (pat
) == SET
)
7058 rtx
*p_cc_reg
= (rtx
*) data
;
7059 gcc_assert (!*p_cc_reg
);
7064 /* This is a helper function for the other atomic operations. This function
7065 emits a loop that contains SEQ that iterates until a compare-and-swap
7066 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7067 a set of instructions that takes a value from OLD_REG as an input and
7068 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7069 set to the current contents of MEM. After SEQ, a compare-and-swap will
7070 attempt to update MEM with NEW_REG. The function returns true when the
7071 loop was generated successfully. */
7074 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
7076 enum machine_mode mode
= GET_MODE (mem
);
7077 rtx label
, cmp_reg
, success
, oldval
;
7079 /* The loop we want to generate looks like
7085 (success, cmp_reg) = compare-and-swap(mem, old_reg, new_reg)
7089 Note that we only do the plain load from memory once. Subsequent
7090 iterations use the value loaded by the compare-and-swap pattern. */
7092 label
= gen_label_rtx ();
7093 cmp_reg
= gen_reg_rtx (mode
);
7095 emit_move_insn (cmp_reg
, mem
);
7097 emit_move_insn (old_reg
, cmp_reg
);
7103 if (!expand_atomic_compare_and_swap (&success
, &oldval
, mem
, old_reg
,
7104 new_reg
, false, MEMMODEL_SEQ_CST
,
7108 if (oldval
!= cmp_reg
)
7109 emit_move_insn (cmp_reg
, oldval
);
7111 /* Mark this jump predicted not taken. */
7112 emit_cmp_and_jump_insns (success
, const0_rtx
, EQ
, const0_rtx
,
7113 GET_MODE (success
), 1, label
, 0);
7118 /* This function tries to emit an atomic_exchange intruction. VAL is written
7119 to *MEM using memory model MODEL. The previous contents of *MEM are returned,
7120 using TARGET if possible. */
7123 maybe_emit_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7125 enum machine_mode mode
= GET_MODE (mem
);
7126 enum insn_code icode
;
7128 /* If the target supports the exchange directly, great. */
7129 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7130 if (icode
!= CODE_FOR_nothing
)
7132 struct expand_operand ops
[4];
7134 create_output_operand (&ops
[0], target
, mode
);
7135 create_fixed_operand (&ops
[1], mem
);
7136 create_input_operand (&ops
[2], val
, mode
);
7137 create_integer_operand (&ops
[3], model
);
7138 if (maybe_expand_insn (icode
, 4, ops
))
7139 return ops
[0].value
;
7145 /* This function tries to implement an atomic exchange operation using
7146 __sync_lock_test_and_set. VAL is written to *MEM using memory model MODEL.
7147 The previous contents of *MEM are returned, using TARGET if possible.
7148 Since this instructionn is an acquire barrier only, stronger memory
7149 models may require additional barriers to be emitted. */
7152 maybe_emit_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
,
7153 enum memmodel model
)
7155 enum machine_mode mode
= GET_MODE (mem
);
7156 enum insn_code icode
;
7157 rtx last_insn
= get_last_insn ();
7159 icode
= optab_handler (sync_lock_test_and_set_optab
, mode
);
7161 /* Legacy sync_lock_test_and_set is an acquire barrier. If the pattern
7162 exists, and the memory model is stronger than acquire, add a release
7163 barrier before the instruction. */
7165 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
7166 || (model
& MEMMODEL_MASK
) == MEMMODEL_RELEASE
7167 || (model
& MEMMODEL_MASK
) == MEMMODEL_ACQ_REL
)
7168 expand_mem_thread_fence (model
);
7170 if (icode
!= CODE_FOR_nothing
)
7172 struct expand_operand ops
[3];
7173 create_output_operand (&ops
[0], target
, mode
);
7174 create_fixed_operand (&ops
[1], mem
);
7175 create_input_operand (&ops
[2], val
, mode
);
7176 if (maybe_expand_insn (icode
, 3, ops
))
7177 return ops
[0].value
;
7180 /* If an external test-and-set libcall is provided, use that instead of
7181 any external compare-and-swap that we might get from the compare-and-
7182 swap-loop expansion later. */
7183 if (!can_compare_and_swap_p (mode
, false))
7185 rtx libfunc
= optab_libfunc (sync_lock_test_and_set_optab
, mode
);
7186 if (libfunc
!= NULL
)
7190 addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7191 return emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7192 mode
, 2, addr
, ptr_mode
,
7197 /* If the test_and_set can't be emitted, eliminate any barrier that might
7198 have been emitted. */
7199 delete_insns_since (last_insn
);
7203 /* This function tries to implement an atomic exchange operation using a
7204 compare_and_swap loop. VAL is written to *MEM. The previous contents of
7205 *MEM are returned, using TARGET if possible. No memory model is required
7206 since a compare_and_swap loop is seq-cst. */
7209 maybe_emit_compare_and_swap_exchange_loop (rtx target
, rtx mem
, rtx val
)
7211 enum machine_mode mode
= GET_MODE (mem
);
7213 if (can_compare_and_swap_p (mode
, true))
7215 if (!target
|| !register_operand (target
, mode
))
7216 target
= gen_reg_rtx (mode
);
7217 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7224 /* This function tries to implement an atomic test-and-set operation
7225 using the atomic_test_and_set instruction pattern. A boolean value
7226 is returned from the operation, using TARGET if possible. */
7228 #ifndef HAVE_atomic_test_and_set
7229 #define HAVE_atomic_test_and_set 0
7230 #define CODE_FOR_atomic_test_and_set CODE_FOR_nothing
7234 maybe_emit_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7236 enum machine_mode pat_bool_mode
;
7237 struct expand_operand ops
[3];
7239 if (!HAVE_atomic_test_and_set
)
7242 /* While we always get QImode from __atomic_test_and_set, we get
7243 other memory modes from __sync_lock_test_and_set. Note that we
7244 use no endian adjustment here. This matches the 4.6 behavior
7245 in the Sparc backend. */
7247 (insn_data
[CODE_FOR_atomic_test_and_set
].operand
[1].mode
== QImode
);
7248 if (GET_MODE (mem
) != QImode
)
7249 mem
= adjust_address_nv (mem
, QImode
, 0);
7251 pat_bool_mode
= insn_data
[CODE_FOR_atomic_test_and_set
].operand
[0].mode
;
7252 create_output_operand (&ops
[0], target
, pat_bool_mode
);
7253 create_fixed_operand (&ops
[1], mem
);
7254 create_integer_operand (&ops
[2], model
);
7256 if (maybe_expand_insn (CODE_FOR_atomic_test_and_set
, 3, ops
))
7257 return ops
[0].value
;
7261 /* This function expands the legacy _sync_lock test_and_set operation which is
7262 generally an atomic exchange. Some limited targets only allow the
7263 constant 1 to be stored. This is an ACQUIRE operation.
7265 TARGET is an optional place to stick the return value.
7266 MEM is where VAL is stored. */
7269 expand_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
)
7273 /* Try an atomic_exchange first. */
7274 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7278 ret
= maybe_emit_sync_lock_test_and_set (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7282 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7286 /* If there are no other options, try atomic_test_and_set if the value
7287 being stored is 1. */
7288 if (val
== const1_rtx
)
7289 ret
= maybe_emit_atomic_test_and_set (target
, mem
, MEMMODEL_ACQUIRE
);
7294 /* This function expands the atomic test_and_set operation:
7295 atomically store a boolean TRUE into MEM and return the previous value.
7297 MEMMODEL is the memory model variant to use.
7298 TARGET is an optional place to stick the return value. */
7301 expand_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7303 enum machine_mode mode
= GET_MODE (mem
);
7304 rtx ret
, trueval
, subtarget
;
7306 ret
= maybe_emit_atomic_test_and_set (target
, mem
, model
);
7310 /* Be binary compatible with non-default settings of trueval, and different
7311 cpu revisions. E.g. one revision may have atomic-test-and-set, but
7312 another only has atomic-exchange. */
7313 if (targetm
.atomic_test_and_set_trueval
== 1)
7315 trueval
= const1_rtx
;
7316 subtarget
= target
? target
: gen_reg_rtx (mode
);
7320 trueval
= gen_int_mode (targetm
.atomic_test_and_set_trueval
, mode
);
7321 subtarget
= gen_reg_rtx (mode
);
7324 /* Try the atomic-exchange optab... */
7325 ret
= maybe_emit_atomic_exchange (subtarget
, mem
, trueval
, model
);
7327 /* ... then an atomic-compare-and-swap loop ... */
7329 ret
= maybe_emit_compare_and_swap_exchange_loop (subtarget
, mem
, trueval
);
7331 /* ... before trying the vaguely defined legacy lock_test_and_set. */
7333 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, trueval
, model
);
7335 /* Recall that the legacy lock_test_and_set optab was allowed to do magic
7336 things with the value 1. Thus we try again without trueval. */
7337 if (!ret
&& targetm
.atomic_test_and_set_trueval
!= 1)
7338 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, const1_rtx
, model
);
7340 /* Failing all else, assume a single threaded environment and simply
7341 perform the operation. */
7344 /* If the result is ignored skip the move to target. */
7345 if (subtarget
!= const0_rtx
)
7346 emit_move_insn (subtarget
, mem
);
7348 emit_move_insn (mem
, trueval
);
7352 /* Recall that have to return a boolean value; rectify if trueval
7353 is not exactly one. */
7354 if (targetm
.atomic_test_and_set_trueval
!= 1)
7355 ret
= emit_store_flag_force (target
, NE
, ret
, const0_rtx
, mode
, 0, 1);
7360 /* This function expands the atomic exchange operation:
7361 atomically store VAL in MEM and return the previous value in MEM.
7363 MEMMODEL is the memory model variant to use.
7364 TARGET is an optional place to stick the return value. */
7367 expand_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7371 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7373 /* Next try a compare-and-swap loop for the exchange. */
7375 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7380 /* This function expands the atomic compare exchange operation:
7382 *PTARGET_BOOL is an optional place to store the boolean success/failure.
7383 *PTARGET_OVAL is an optional place to store the old value from memory.
7384 Both target parameters may be NULL to indicate that we do not care about
7385 that return value. Both target parameters are updated on success to
7386 the actual location of the corresponding result.
7388 MEMMODEL is the memory model variant to use.
7390 The return value of the function is true for success. */
7393 expand_atomic_compare_and_swap (rtx
*ptarget_bool
, rtx
*ptarget_oval
,
7394 rtx mem
, rtx expected
, rtx desired
,
7395 bool is_weak
, enum memmodel succ_model
,
7396 enum memmodel fail_model
)
7398 enum machine_mode mode
= GET_MODE (mem
);
7399 struct expand_operand ops
[8];
7400 enum insn_code icode
;
7401 rtx target_oval
, target_bool
= NULL_RTX
;
7404 /* Load expected into a register for the compare and swap. */
7405 if (MEM_P (expected
))
7406 expected
= copy_to_reg (expected
);
7408 /* Make sure we always have some place to put the return oldval.
7409 Further, make sure that place is distinct from the input expected,
7410 just in case we need that path down below. */
7411 if (ptarget_oval
== NULL
7412 || (target_oval
= *ptarget_oval
) == NULL
7413 || reg_overlap_mentioned_p (expected
, target_oval
))
7414 target_oval
= gen_reg_rtx (mode
);
7416 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7417 if (icode
!= CODE_FOR_nothing
)
7419 enum machine_mode bool_mode
= insn_data
[icode
].operand
[0].mode
;
7421 /* Make sure we always have a place for the bool operand. */
7422 if (ptarget_bool
== NULL
7423 || (target_bool
= *ptarget_bool
) == NULL
7424 || GET_MODE (target_bool
) != bool_mode
)
7425 target_bool
= gen_reg_rtx (bool_mode
);
7427 /* Emit the compare_and_swap. */
7428 create_output_operand (&ops
[0], target_bool
, bool_mode
);
7429 create_output_operand (&ops
[1], target_oval
, mode
);
7430 create_fixed_operand (&ops
[2], mem
);
7431 create_input_operand (&ops
[3], expected
, mode
);
7432 create_input_operand (&ops
[4], desired
, mode
);
7433 create_integer_operand (&ops
[5], is_weak
);
7434 create_integer_operand (&ops
[6], succ_model
);
7435 create_integer_operand (&ops
[7], fail_model
);
7436 if (maybe_expand_insn (icode
, 8, ops
))
7438 /* Return success/failure. */
7439 target_bool
= ops
[0].value
;
7440 target_oval
= ops
[1].value
;
7445 /* Otherwise fall back to the original __sync_val_compare_and_swap
7446 which is always seq-cst. */
7447 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7448 if (icode
!= CODE_FOR_nothing
)
7452 create_output_operand (&ops
[0], target_oval
, mode
);
7453 create_fixed_operand (&ops
[1], mem
);
7454 create_input_operand (&ops
[2], expected
, mode
);
7455 create_input_operand (&ops
[3], desired
, mode
);
7456 if (!maybe_expand_insn (icode
, 4, ops
))
7459 target_oval
= ops
[0].value
;
7461 /* If the caller isn't interested in the boolean return value,
7462 skip the computation of it. */
7463 if (ptarget_bool
== NULL
)
7466 /* Otherwise, work out if the compare-and-swap succeeded. */
7468 if (have_insn_for (COMPARE
, CCmode
))
7469 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7472 target_bool
= emit_store_flag_force (target_bool
, EQ
, cc_reg
,
7473 const0_rtx
, VOIDmode
, 0, 1);
7476 goto success_bool_from_val
;
7479 /* Also check for library support for __sync_val_compare_and_swap. */
7480 libfunc
= optab_libfunc (sync_compare_and_swap_optab
, mode
);
7481 if (libfunc
!= NULL
)
7483 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7484 target_oval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7485 mode
, 3, addr
, ptr_mode
,
7486 expected
, mode
, desired
, mode
);
7488 /* Compute the boolean return value only if requested. */
7490 goto success_bool_from_val
;
7498 success_bool_from_val
:
7499 target_bool
= emit_store_flag_force (target_bool
, EQ
, target_oval
,
7500 expected
, VOIDmode
, 1, 1);
7502 /* Make sure that the oval output winds up where the caller asked. */
7504 *ptarget_oval
= target_oval
;
7506 *ptarget_bool
= target_bool
;
7510 /* Generate asm volatile("" : : : "memory") as the memory barrier. */
7513 expand_asm_memory_barrier (void)
7517 asm_op
= gen_rtx_ASM_OPERANDS (VOIDmode
, empty_string
, empty_string
, 0,
7518 rtvec_alloc (0), rtvec_alloc (0),
7519 rtvec_alloc (0), UNKNOWN_LOCATION
);
7520 MEM_VOLATILE_P (asm_op
) = 1;
7522 clob
= gen_rtx_SCRATCH (VOIDmode
);
7523 clob
= gen_rtx_MEM (BLKmode
, clob
);
7524 clob
= gen_rtx_CLOBBER (VOIDmode
, clob
);
7526 emit_insn (gen_rtx_PARALLEL (VOIDmode
, gen_rtvec (2, asm_op
, clob
)));
7529 /* This routine will either emit the mem_thread_fence pattern or issue a
7530 sync_synchronize to generate a fence for memory model MEMMODEL. */
7532 #ifndef HAVE_mem_thread_fence
7533 # define HAVE_mem_thread_fence 0
7534 # define gen_mem_thread_fence(x) (gcc_unreachable (), NULL_RTX)
7536 #ifndef HAVE_memory_barrier
7537 # define HAVE_memory_barrier 0
7538 # define gen_memory_barrier() (gcc_unreachable (), NULL_RTX)
7542 expand_mem_thread_fence (enum memmodel model
)
7544 if (HAVE_mem_thread_fence
)
7545 emit_insn (gen_mem_thread_fence (GEN_INT (model
)));
7546 else if ((model
& MEMMODEL_MASK
) != MEMMODEL_RELAXED
)
7548 if (HAVE_memory_barrier
)
7549 emit_insn (gen_memory_barrier ());
7550 else if (synchronize_libfunc
!= NULL_RTX
)
7551 emit_library_call (synchronize_libfunc
, LCT_NORMAL
, VOIDmode
, 0);
7553 expand_asm_memory_barrier ();
7557 /* This routine will either emit the mem_signal_fence pattern or issue a
7558 sync_synchronize to generate a fence for memory model MEMMODEL. */
7560 #ifndef HAVE_mem_signal_fence
7561 # define HAVE_mem_signal_fence 0
7562 # define gen_mem_signal_fence(x) (gcc_unreachable (), NULL_RTX)
7566 expand_mem_signal_fence (enum memmodel model
)
7568 if (HAVE_mem_signal_fence
)
7569 emit_insn (gen_mem_signal_fence (GEN_INT (model
)));
7570 else if ((model
& MEMMODEL_MASK
) != MEMMODEL_RELAXED
)
7572 /* By default targets are coherent between a thread and the signal
7573 handler running on the same thread. Thus this really becomes a
7574 compiler barrier, in that stores must not be sunk past
7575 (or raised above) a given point. */
7576 expand_asm_memory_barrier ();
7580 /* This function expands the atomic load operation:
7581 return the atomically loaded value in MEM.
7583 MEMMODEL is the memory model variant to use.
7584 TARGET is an option place to stick the return value. */
7587 expand_atomic_load (rtx target
, rtx mem
, enum memmodel model
)
7589 enum machine_mode mode
= GET_MODE (mem
);
7590 enum insn_code icode
;
7592 /* If the target supports the load directly, great. */
7593 icode
= direct_optab_handler (atomic_load_optab
, mode
);
7594 if (icode
!= CODE_FOR_nothing
)
7596 struct expand_operand ops
[3];
7598 create_output_operand (&ops
[0], target
, mode
);
7599 create_fixed_operand (&ops
[1], mem
);
7600 create_integer_operand (&ops
[2], model
);
7601 if (maybe_expand_insn (icode
, 3, ops
))
7602 return ops
[0].value
;
7605 /* If the size of the object is greater than word size on this target,
7606 then we assume that a load will not be atomic. */
7607 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7609 /* Issue val = compare_and_swap (mem, 0, 0).
7610 This may cause the occasional harmless store of 0 when the value is
7611 already 0, but it seems to be OK according to the standards guys. */
7612 if (expand_atomic_compare_and_swap (NULL
, &target
, mem
, const0_rtx
,
7613 const0_rtx
, false, model
, model
))
7616 /* Otherwise there is no atomic load, leave the library call. */
7620 /* Otherwise assume loads are atomic, and emit the proper barriers. */
7621 if (!target
|| target
== const0_rtx
)
7622 target
= gen_reg_rtx (mode
);
7624 /* For SEQ_CST, emit a barrier before the load. */
7625 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7626 expand_mem_thread_fence (model
);
7628 emit_move_insn (target
, mem
);
7630 /* Emit the appropriate barrier after the load. */
7631 expand_mem_thread_fence (model
);
7636 /* This function expands the atomic store operation:
7637 Atomically store VAL in MEM.
7638 MEMMODEL is the memory model variant to use.
7639 USE_RELEASE is true if __sync_lock_release can be used as a fall back.
7640 function returns const0_rtx if a pattern was emitted. */
7643 expand_atomic_store (rtx mem
, rtx val
, enum memmodel model
, bool use_release
)
7645 enum machine_mode mode
= GET_MODE (mem
);
7646 enum insn_code icode
;
7647 struct expand_operand ops
[3];
7649 /* If the target supports the store directly, great. */
7650 icode
= direct_optab_handler (atomic_store_optab
, mode
);
7651 if (icode
!= CODE_FOR_nothing
)
7653 create_fixed_operand (&ops
[0], mem
);
7654 create_input_operand (&ops
[1], val
, mode
);
7655 create_integer_operand (&ops
[2], model
);
7656 if (maybe_expand_insn (icode
, 3, ops
))
7660 /* If using __sync_lock_release is a viable alternative, try it. */
7663 icode
= direct_optab_handler (sync_lock_release_optab
, mode
);
7664 if (icode
!= CODE_FOR_nothing
)
7666 create_fixed_operand (&ops
[0], mem
);
7667 create_input_operand (&ops
[1], const0_rtx
, mode
);
7668 if (maybe_expand_insn (icode
, 2, ops
))
7670 /* lock_release is only a release barrier. */
7671 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7672 expand_mem_thread_fence (model
);
7678 /* If the size of the object is greater than word size on this target,
7679 a default store will not be atomic, Try a mem_exchange and throw away
7680 the result. If that doesn't work, don't do anything. */
7681 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7683 rtx target
= maybe_emit_atomic_exchange (NULL_RTX
, mem
, val
, model
);
7685 target
= maybe_emit_compare_and_swap_exchange_loop (NULL_RTX
, mem
, val
);
7692 /* Otherwise assume stores are atomic, and emit the proper barriers. */
7693 expand_mem_thread_fence (model
);
7695 emit_move_insn (mem
, val
);
7697 /* For SEQ_CST, also emit a barrier after the store. */
7698 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7699 expand_mem_thread_fence (model
);
7705 /* Structure containing the pointers and values required to process the
7706 various forms of the atomic_fetch_op and atomic_op_fetch builtins. */
7708 struct atomic_op_functions
7710 direct_optab mem_fetch_before
;
7711 direct_optab mem_fetch_after
;
7712 direct_optab mem_no_result
;
7715 direct_optab no_result
;
7716 enum rtx_code reverse_code
;
7720 /* Fill in structure pointed to by OP with the various optab entries for an
7721 operation of type CODE. */
7724 get_atomic_op_for_code (struct atomic_op_functions
*op
, enum rtx_code code
)
7726 gcc_assert (op
!= NULL
);
7728 /* If SWITCHABLE_TARGET is defined, then subtargets can be switched
7729 in the source code during compilation, and the optab entries are not
7730 computable until runtime. Fill in the values at runtime. */
7734 op
->mem_fetch_before
= atomic_fetch_add_optab
;
7735 op
->mem_fetch_after
= atomic_add_fetch_optab
;
7736 op
->mem_no_result
= atomic_add_optab
;
7737 op
->fetch_before
= sync_old_add_optab
;
7738 op
->fetch_after
= sync_new_add_optab
;
7739 op
->no_result
= sync_add_optab
;
7740 op
->reverse_code
= MINUS
;
7743 op
->mem_fetch_before
= atomic_fetch_sub_optab
;
7744 op
->mem_fetch_after
= atomic_sub_fetch_optab
;
7745 op
->mem_no_result
= atomic_sub_optab
;
7746 op
->fetch_before
= sync_old_sub_optab
;
7747 op
->fetch_after
= sync_new_sub_optab
;
7748 op
->no_result
= sync_sub_optab
;
7749 op
->reverse_code
= PLUS
;
7752 op
->mem_fetch_before
= atomic_fetch_xor_optab
;
7753 op
->mem_fetch_after
= atomic_xor_fetch_optab
;
7754 op
->mem_no_result
= atomic_xor_optab
;
7755 op
->fetch_before
= sync_old_xor_optab
;
7756 op
->fetch_after
= sync_new_xor_optab
;
7757 op
->no_result
= sync_xor_optab
;
7758 op
->reverse_code
= XOR
;
7761 op
->mem_fetch_before
= atomic_fetch_and_optab
;
7762 op
->mem_fetch_after
= atomic_and_fetch_optab
;
7763 op
->mem_no_result
= atomic_and_optab
;
7764 op
->fetch_before
= sync_old_and_optab
;
7765 op
->fetch_after
= sync_new_and_optab
;
7766 op
->no_result
= sync_and_optab
;
7767 op
->reverse_code
= UNKNOWN
;
7770 op
->mem_fetch_before
= atomic_fetch_or_optab
;
7771 op
->mem_fetch_after
= atomic_or_fetch_optab
;
7772 op
->mem_no_result
= atomic_or_optab
;
7773 op
->fetch_before
= sync_old_ior_optab
;
7774 op
->fetch_after
= sync_new_ior_optab
;
7775 op
->no_result
= sync_ior_optab
;
7776 op
->reverse_code
= UNKNOWN
;
7779 op
->mem_fetch_before
= atomic_fetch_nand_optab
;
7780 op
->mem_fetch_after
= atomic_nand_fetch_optab
;
7781 op
->mem_no_result
= atomic_nand_optab
;
7782 op
->fetch_before
= sync_old_nand_optab
;
7783 op
->fetch_after
= sync_new_nand_optab
;
7784 op
->no_result
= sync_nand_optab
;
7785 op
->reverse_code
= UNKNOWN
;
7792 /* See if there is a more optimal way to implement the operation "*MEM CODE VAL"
7793 using memory order MODEL. If AFTER is true the operation needs to return
7794 the value of *MEM after the operation, otherwise the previous value.
7795 TARGET is an optional place to place the result. The result is unused if
7797 Return the result if there is a better sequence, otherwise NULL_RTX. */
7800 maybe_optimize_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7801 enum memmodel model
, bool after
)
7803 /* If the value is prefetched, or not used, it may be possible to replace
7804 the sequence with a native exchange operation. */
7805 if (!after
|| target
== const0_rtx
)
7807 /* fetch_and (&x, 0, m) can be replaced with exchange (&x, 0, m). */
7808 if (code
== AND
&& val
== const0_rtx
)
7810 if (target
== const0_rtx
)
7811 target
= gen_reg_rtx (GET_MODE (mem
));
7812 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7815 /* fetch_or (&x, -1, m) can be replaced with exchange (&x, -1, m). */
7816 if (code
== IOR
&& val
== constm1_rtx
)
7818 if (target
== const0_rtx
)
7819 target
= gen_reg_rtx (GET_MODE (mem
));
7820 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7827 /* Try to emit an instruction for a specific operation varaition.
7828 OPTAB contains the OP functions.
7829 TARGET is an optional place to return the result. const0_rtx means unused.
7830 MEM is the memory location to operate on.
7831 VAL is the value to use in the operation.
7832 USE_MEMMODEL is TRUE if the variation with a memory model should be tried.
7833 MODEL is the memory model, if used.
7834 AFTER is true if the returned result is the value after the operation. */
7837 maybe_emit_op (const struct atomic_op_functions
*optab
, rtx target
, rtx mem
,
7838 rtx val
, bool use_memmodel
, enum memmodel model
, bool after
)
7840 enum machine_mode mode
= GET_MODE (mem
);
7841 struct expand_operand ops
[4];
7842 enum insn_code icode
;
7846 /* Check to see if there is a result returned. */
7847 if (target
== const0_rtx
)
7851 icode
= direct_optab_handler (optab
->mem_no_result
, mode
);
7852 create_integer_operand (&ops
[2], model
);
7857 icode
= direct_optab_handler (optab
->no_result
, mode
);
7861 /* Otherwise, we need to generate a result. */
7866 icode
= direct_optab_handler (after
? optab
->mem_fetch_after
7867 : optab
->mem_fetch_before
, mode
);
7868 create_integer_operand (&ops
[3], model
);
7873 icode
= optab_handler (after
? optab
->fetch_after
7874 : optab
->fetch_before
, mode
);
7877 create_output_operand (&ops
[op_counter
++], target
, mode
);
7879 if (icode
== CODE_FOR_nothing
)
7882 create_fixed_operand (&ops
[op_counter
++], mem
);
7883 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7884 create_convert_operand_to (&ops
[op_counter
++], val
, mode
, true);
7886 if (maybe_expand_insn (icode
, num_ops
, ops
))
7887 return (target
== const0_rtx
? const0_rtx
: ops
[0].value
);
7893 /* This function expands an atomic fetch_OP or OP_fetch operation:
7894 TARGET is an option place to stick the return value. const0_rtx indicates
7895 the result is unused.
7896 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7897 CODE is the operation being performed (OP)
7898 MEMMODEL is the memory model variant to use.
7899 AFTER is true to return the result of the operation (OP_fetch).
7900 AFTER is false to return the value before the operation (fetch_OP).
7902 This function will *only* generate instructions if there is a direct
7903 optab. No compare and swap loops or libcalls will be generated. */
7906 expand_atomic_fetch_op_no_fallback (rtx target
, rtx mem
, rtx val
,
7907 enum rtx_code code
, enum memmodel model
,
7910 enum machine_mode mode
= GET_MODE (mem
);
7911 struct atomic_op_functions optab
;
7913 bool unused_result
= (target
== const0_rtx
);
7915 get_atomic_op_for_code (&optab
, code
);
7917 /* Check to see if there are any better instructions. */
7918 result
= maybe_optimize_fetch_op (target
, mem
, val
, code
, model
, after
);
7922 /* Check for the case where the result isn't used and try those patterns. */
7925 /* Try the memory model variant first. */
7926 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, true);
7930 /* Next try the old style withuot a memory model. */
7931 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, true);
7935 /* There is no no-result pattern, so try patterns with a result. */
7939 /* Try the __atomic version. */
7940 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, after
);
7944 /* Try the older __sync version. */
7945 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, after
);
7949 /* If the fetch value can be calculated from the other variation of fetch,
7950 try that operation. */
7951 if (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
)
7953 /* Try the __atomic version, then the older __sync version. */
7954 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, !after
);
7956 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, !after
);
7960 /* If the result isn't used, no need to do compensation code. */
7964 /* Issue compensation code. Fetch_after == fetch_before OP val.
7965 Fetch_before == after REVERSE_OP val. */
7967 code
= optab
.reverse_code
;
7970 result
= expand_simple_binop (mode
, AND
, result
, val
, NULL_RTX
,
7971 true, OPTAB_LIB_WIDEN
);
7972 result
= expand_simple_unop (mode
, NOT
, result
, target
, true);
7975 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
7976 true, OPTAB_LIB_WIDEN
);
7981 /* No direct opcode can be generated. */
7987 /* This function expands an atomic fetch_OP or OP_fetch operation:
7988 TARGET is an option place to stick the return value. const0_rtx indicates
7989 the result is unused.
7990 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7991 CODE is the operation being performed (OP)
7992 MEMMODEL is the memory model variant to use.
7993 AFTER is true to return the result of the operation (OP_fetch).
7994 AFTER is false to return the value before the operation (fetch_OP). */
7996 expand_atomic_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7997 enum memmodel model
, bool after
)
7999 enum machine_mode mode
= GET_MODE (mem
);
8001 bool unused_result
= (target
== const0_rtx
);
8003 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, val
, code
, model
,
8009 /* Add/sub can be implemented by doing the reverse operation with -(val). */
8010 if (code
== PLUS
|| code
== MINUS
)
8013 enum rtx_code reverse
= (code
== PLUS
? MINUS
: PLUS
);
8016 tmp
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, true);
8017 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, tmp
, reverse
,
8021 /* PLUS worked so emit the insns and return. */
8028 /* PLUS did not work, so throw away the negation code and continue. */
8032 /* Try the __sync libcalls only if we can't do compare-and-swap inline. */
8033 if (!can_compare_and_swap_p (mode
, false))
8037 enum rtx_code orig_code
= code
;
8038 struct atomic_op_functions optab
;
8040 get_atomic_op_for_code (&optab
, code
);
8041 libfunc
= optab_libfunc (after
? optab
.fetch_after
8042 : optab
.fetch_before
, mode
);
8044 && (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
))
8048 code
= optab
.reverse_code
;
8049 libfunc
= optab_libfunc (after
? optab
.fetch_before
8050 : optab
.fetch_after
, mode
);
8052 if (libfunc
!= NULL
)
8054 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
8055 result
= emit_library_call_value (libfunc
, NULL
, LCT_NORMAL
, mode
,
8056 2, addr
, ptr_mode
, val
, mode
);
8058 if (!unused_result
&& fixup
)
8059 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
8060 true, OPTAB_LIB_WIDEN
);
8064 /* We need the original code for any further attempts. */
8068 /* If nothing else has succeeded, default to a compare and swap loop. */
8069 if (can_compare_and_swap_p (mode
, true))
8072 rtx t0
= gen_reg_rtx (mode
), t1
;
8076 /* If the result is used, get a register for it. */
8079 if (!target
|| !register_operand (target
, mode
))
8080 target
= gen_reg_rtx (mode
);
8081 /* If fetch_before, copy the value now. */
8083 emit_move_insn (target
, t0
);
8086 target
= const0_rtx
;
8091 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
8092 true, OPTAB_LIB_WIDEN
);
8093 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
8096 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
, true,
8099 /* For after, copy the value now. */
8100 if (!unused_result
&& after
)
8101 emit_move_insn (target
, t1
);
8102 insn
= get_insns ();
8105 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
8112 /* Return true if OPERAND is suitable for operand number OPNO of
8113 instruction ICODE. */
8116 insn_operand_matches (enum insn_code icode
, unsigned int opno
, rtx operand
)
8118 return (!insn_data
[(int) icode
].operand
[opno
].predicate
8119 || (insn_data
[(int) icode
].operand
[opno
].predicate
8120 (operand
, insn_data
[(int) icode
].operand
[opno
].mode
)));
8123 /* TARGET is a target of a multiword operation that we are going to
8124 implement as a series of word-mode operations. Return true if
8125 TARGET is suitable for this purpose. */
8128 valid_multiword_target_p (rtx target
)
8130 enum machine_mode mode
;
8133 mode
= GET_MODE (target
);
8134 for (i
= 0; i
< GET_MODE_SIZE (mode
); i
+= UNITS_PER_WORD
)
8135 if (!validate_subreg (word_mode
, mode
, target
, i
))
8140 /* Like maybe_legitimize_operand, but do not change the code of the
8141 current rtx value. */
8144 maybe_legitimize_operand_same_code (enum insn_code icode
, unsigned int opno
,
8145 struct expand_operand
*op
)
8147 /* See if the operand matches in its current form. */
8148 if (insn_operand_matches (icode
, opno
, op
->value
))
8151 /* If the operand is a memory whose address has no side effects,
8152 try forcing the address into a non-virtual pseudo register.
8153 The check for side effects is important because copy_to_mode_reg
8154 cannot handle things like auto-modified addresses. */
8155 if (insn_data
[(int) icode
].operand
[opno
].allows_mem
&& MEM_P (op
->value
))
8160 addr
= XEXP (mem
, 0);
8161 if (!(REG_P (addr
) && REGNO (addr
) > LAST_VIRTUAL_REGISTER
)
8162 && !side_effects_p (addr
))
8165 enum machine_mode mode
;
8167 last
= get_last_insn ();
8168 mode
= get_address_mode (mem
);
8169 mem
= replace_equiv_address (mem
, copy_to_mode_reg (mode
, addr
));
8170 if (insn_operand_matches (icode
, opno
, mem
))
8175 delete_insns_since (last
);
8182 /* Try to make OP match operand OPNO of instruction ICODE. Return true
8183 on success, storing the new operand value back in OP. */
8186 maybe_legitimize_operand (enum insn_code icode
, unsigned int opno
,
8187 struct expand_operand
*op
)
8189 enum machine_mode mode
, imode
;
8190 bool old_volatile_ok
, result
;
8196 old_volatile_ok
= volatile_ok
;
8198 result
= maybe_legitimize_operand_same_code (icode
, opno
, op
);
8199 volatile_ok
= old_volatile_ok
;
8203 gcc_assert (mode
!= VOIDmode
);
8205 && op
->value
!= const0_rtx
8206 && GET_MODE (op
->value
) == mode
8207 && maybe_legitimize_operand_same_code (icode
, opno
, op
))
8210 op
->value
= gen_reg_rtx (mode
);
8215 gcc_assert (mode
!= VOIDmode
);
8216 gcc_assert (GET_MODE (op
->value
) == VOIDmode
8217 || GET_MODE (op
->value
) == mode
);
8218 if (maybe_legitimize_operand_same_code (icode
, opno
, op
))
8221 op
->value
= copy_to_mode_reg (mode
, op
->value
);
8224 case EXPAND_CONVERT_TO
:
8225 gcc_assert (mode
!= VOIDmode
);
8226 op
->value
= convert_to_mode (mode
, op
->value
, op
->unsigned_p
);
8229 case EXPAND_CONVERT_FROM
:
8230 if (GET_MODE (op
->value
) != VOIDmode
)
8231 mode
= GET_MODE (op
->value
);
8233 /* The caller must tell us what mode this value has. */
8234 gcc_assert (mode
!= VOIDmode
);
8236 imode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8237 if (imode
!= VOIDmode
&& imode
!= mode
)
8239 op
->value
= convert_modes (imode
, mode
, op
->value
, op
->unsigned_p
);
8244 case EXPAND_ADDRESS
:
8245 gcc_assert (mode
!= VOIDmode
);
8246 op
->value
= convert_memory_address (mode
, op
->value
);
8249 case EXPAND_INTEGER
:
8250 mode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8251 if (mode
!= VOIDmode
&& const_int_operand (op
->value
, mode
))
8255 return insn_operand_matches (icode
, opno
, op
->value
);
8258 /* Make OP describe an input operand that should have the same value
8259 as VALUE, after any mode conversion that the target might request.
8260 TYPE is the type of VALUE. */
8263 create_convert_operand_from_type (struct expand_operand
*op
,
8264 rtx value
, tree type
)
8266 create_convert_operand_from (op
, value
, TYPE_MODE (type
),
8267 TYPE_UNSIGNED (type
));
8270 /* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
8271 of instruction ICODE. Return true on success, leaving the new operand
8272 values in the OPS themselves. Emit no code on failure. */
8275 maybe_legitimize_operands (enum insn_code icode
, unsigned int opno
,
8276 unsigned int nops
, struct expand_operand
*ops
)
8281 last
= get_last_insn ();
8282 for (i
= 0; i
< nops
; i
++)
8283 if (!maybe_legitimize_operand (icode
, opno
+ i
, &ops
[i
]))
8285 delete_insns_since (last
);
8291 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
8292 as its operands. Return the instruction pattern on success,
8293 and emit any necessary set-up code. Return null and emit no
8297 maybe_gen_insn (enum insn_code icode
, unsigned int nops
,
8298 struct expand_operand
*ops
)
8300 gcc_assert (nops
== (unsigned int) insn_data
[(int) icode
].n_generator_args
);
8301 if (!maybe_legitimize_operands (icode
, 0, nops
, ops
))
8307 return GEN_FCN (icode
) (ops
[0].value
);
8309 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
);
8311 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
);
8313 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8316 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8317 ops
[3].value
, ops
[4].value
);
8319 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8320 ops
[3].value
, ops
[4].value
, ops
[5].value
);
8322 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8323 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8326 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8327 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8328 ops
[6].value
, ops
[7].value
);
8330 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8331 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8332 ops
[6].value
, ops
[7].value
, ops
[8].value
);
8337 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
8338 as its operands. Return true on success and emit no code on failure. */
8341 maybe_expand_insn (enum insn_code icode
, unsigned int nops
,
8342 struct expand_operand
*ops
)
8344 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8353 /* Like maybe_expand_insn, but for jumps. */
8356 maybe_expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8357 struct expand_operand
*ops
)
8359 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8362 emit_jump_insn (pat
);
8368 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
8372 expand_insn (enum insn_code icode
, unsigned int nops
,
8373 struct expand_operand
*ops
)
8375 if (!maybe_expand_insn (icode
, nops
, ops
))
8379 /* Like expand_insn, but for jumps. */
8382 expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8383 struct expand_operand
*ops
)
8385 if (!maybe_expand_jump_insn (icode
, nops
, ops
))
8389 /* Reduce conditional compilation elsewhere. */
8392 #define CODE_FOR_insv CODE_FOR_nothing
8396 #define CODE_FOR_extv CODE_FOR_nothing
8399 #define HAVE_extzv 0
8400 #define CODE_FOR_extzv CODE_FOR_nothing
8403 /* Enumerates the possible types of structure operand to an
8405 enum extraction_type
{ ET_unaligned_mem
, ET_reg
};
8407 /* Check whether insv, extv or extzv pattern ICODE can be used for an
8408 insertion or extraction of type TYPE on a structure of mode MODE.
8409 Return true if so and fill in *INSN accordingly. STRUCT_OP is the
8410 operand number of the structure (the first sign_extract or zero_extract
8411 operand) and FIELD_OP is the operand number of the field (the other
8412 side of the set from the sign_extract or zero_extract). */
8415 get_traditional_extraction_insn (extraction_insn
*insn
,
8416 enum extraction_type type
,
8417 enum machine_mode mode
,
8418 enum insn_code icode
,
8419 int struct_op
, int field_op
)
8421 const struct insn_data_d
*data
= &insn_data
[icode
];
8423 enum machine_mode struct_mode
= data
->operand
[struct_op
].mode
;
8424 if (struct_mode
== VOIDmode
)
8425 struct_mode
= word_mode
;
8426 if (mode
!= struct_mode
)
8429 enum machine_mode field_mode
= data
->operand
[field_op
].mode
;
8430 if (field_mode
== VOIDmode
)
8431 field_mode
= word_mode
;
8433 enum machine_mode pos_mode
= data
->operand
[struct_op
+ 2].mode
;
8434 if (pos_mode
== VOIDmode
)
8435 pos_mode
= word_mode
;
8437 insn
->icode
= icode
;
8438 insn
->field_mode
= field_mode
;
8439 insn
->struct_mode
= (type
== ET_unaligned_mem
? byte_mode
: struct_mode
);
8440 insn
->pos_mode
= pos_mode
;
8444 /* Return true if an optab exists to perform an insertion or extraction
8445 of type TYPE in mode MODE. Describe the instruction in *INSN if so.
8447 REG_OPTAB is the optab to use for register structures and
8448 MISALIGN_OPTAB is the optab to use for misaligned memory structures.
8449 POS_OP is the operand number of the bit position. */
8452 get_optab_extraction_insn (struct extraction_insn
*insn
,
8453 enum extraction_type type
,
8454 enum machine_mode mode
, direct_optab reg_optab
,
8455 direct_optab misalign_optab
, int pos_op
)
8457 direct_optab optab
= (type
== ET_unaligned_mem
? misalign_optab
: reg_optab
);
8458 enum insn_code icode
= direct_optab_handler (optab
, mode
);
8459 if (icode
== CODE_FOR_nothing
)
8462 const struct insn_data_d
*data
= &insn_data
[icode
];
8464 insn
->icode
= icode
;
8465 insn
->field_mode
= mode
;
8466 insn
->struct_mode
= (type
== ET_unaligned_mem
? BLKmode
: mode
);
8467 insn
->pos_mode
= data
->operand
[pos_op
].mode
;
8468 if (insn
->pos_mode
== VOIDmode
)
8469 insn
->pos_mode
= word_mode
;
8473 /* Return true if an instruction exists to perform an insertion or
8474 extraction (PATTERN says which) of type TYPE in mode MODE.
8475 Describe the instruction in *INSN if so. */
8478 get_extraction_insn (extraction_insn
*insn
,
8479 enum extraction_pattern pattern
,
8480 enum extraction_type type
,
8481 enum machine_mode mode
)
8487 && get_traditional_extraction_insn (insn
, type
, mode
,
8488 CODE_FOR_insv
, 0, 3))
8490 return get_optab_extraction_insn (insn
, type
, mode
, insv_optab
,
8491 insvmisalign_optab
, 2);
8495 && get_traditional_extraction_insn (insn
, type
, mode
,
8496 CODE_FOR_extv
, 1, 0))
8498 return get_optab_extraction_insn (insn
, type
, mode
, extv_optab
,
8499 extvmisalign_optab
, 3);
8503 && get_traditional_extraction_insn (insn
, type
, mode
,
8504 CODE_FOR_extzv
, 1, 0))
8506 return get_optab_extraction_insn (insn
, type
, mode
, extzv_optab
,
8507 extzvmisalign_optab
, 3);
8514 /* Return true if an instruction exists to access a field of mode
8515 FIELDMODE in a structure that has STRUCT_BITS significant bits.
8516 Describe the "best" such instruction in *INSN if so. PATTERN and
8517 TYPE describe the type of insertion or extraction we want to perform.
8519 For an insertion, the number of significant structure bits includes
8520 all bits of the target. For an extraction, it need only include the
8521 most significant bit of the field. Larger widths are acceptable
8525 get_best_extraction_insn (extraction_insn
*insn
,
8526 enum extraction_pattern pattern
,
8527 enum extraction_type type
,
8528 unsigned HOST_WIDE_INT struct_bits
,
8529 enum machine_mode field_mode
)
8531 enum machine_mode mode
= smallest_mode_for_size (struct_bits
, MODE_INT
);
8532 while (mode
!= VOIDmode
)
8534 if (get_extraction_insn (insn
, pattern
, type
, mode
))
8536 while (mode
!= VOIDmode
8537 && GET_MODE_SIZE (mode
) <= GET_MODE_SIZE (field_mode
)
8538 && !TRULY_NOOP_TRUNCATION_MODES_P (insn
->field_mode
,
8541 get_extraction_insn (insn
, pattern
, type
, mode
);
8542 mode
= GET_MODE_WIDER_MODE (mode
);
8546 mode
= GET_MODE_WIDER_MODE (mode
);
8551 /* Return true if an instruction exists to access a field of mode
8552 FIELDMODE in a register structure that has STRUCT_BITS significant bits.
8553 Describe the "best" such instruction in *INSN if so. PATTERN describes
8554 the type of insertion or extraction we want to perform.
8556 For an insertion, the number of significant structure bits includes
8557 all bits of the target. For an extraction, it need only include the
8558 most significant bit of the field. Larger widths are acceptable
8562 get_best_reg_extraction_insn (extraction_insn
*insn
,
8563 enum extraction_pattern pattern
,
8564 unsigned HOST_WIDE_INT struct_bits
,
8565 enum machine_mode field_mode
)
8567 return get_best_extraction_insn (insn
, pattern
, ET_reg
, struct_bits
,
8571 /* Return true if an instruction exists to access a field of BITSIZE
8572 bits starting BITNUM bits into a memory structure. Describe the
8573 "best" such instruction in *INSN if so. PATTERN describes the type
8574 of insertion or extraction we want to perform and FIELDMODE is the
8575 natural mode of the extracted field.
8577 The instructions considered here only access bytes that overlap
8578 the bitfield; they do not touch any surrounding bytes. */
8581 get_best_mem_extraction_insn (extraction_insn
*insn
,
8582 enum extraction_pattern pattern
,
8583 HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitnum
,
8584 enum machine_mode field_mode
)
8586 unsigned HOST_WIDE_INT struct_bits
= (bitnum
% BITS_PER_UNIT
8588 + BITS_PER_UNIT
- 1);
8589 struct_bits
-= struct_bits
% BITS_PER_UNIT
;
8590 return get_best_extraction_insn (insn
, pattern
, ET_unaligned_mem
,
8591 struct_bits
, field_mode
);
8594 #include "gt-optabs.h"