1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
34 #include "insn-flags.h"
35 #include "insn-codes.h"
43 /* Each optab contains info on how this target machine
44 can perform a particular operation
45 for all sizes and kinds of operands.
47 The operation to be performed is often specified
48 by passing one of these optabs as an argument.
50 See expr.h for documentation of these optabs. */
52 optab optab_table
[OTI_MAX
];
54 rtx libfunc_table
[LTI_MAX
];
56 /* Tables of patterns for extending one integer mode to another. */
57 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
59 /* Tables of patterns for converting between fixed and floating point. */
60 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
61 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
62 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
64 /* Contains the optab used for each rtx code. */
65 optab code_to_optab
[NUM_RTX_CODE
+ 1];
67 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
68 gives the gen_function to make a branch to test that condition. */
70 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
72 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
73 gives the insn code to make a store-condition insn
74 to test that condition. */
76 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
78 #ifdef HAVE_conditional_move
79 /* Indexed by the machine mode, gives the insn code to make a conditional
80 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
81 setcc_gen_code to cut down on the number of named patterns. Consider a day
82 when a lot more rtx codes are conditional (eg: for the ARM). */
84 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
87 static int add_equal_note
PARAMS ((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
88 static rtx widen_operand
PARAMS ((rtx
, enum machine_mode
,
89 enum machine_mode
, int, int));
90 static int expand_cmplxdiv_straight
PARAMS ((rtx
, rtx
, rtx
, rtx
,
91 rtx
, rtx
, enum machine_mode
,
92 int, enum optab_methods
,
93 enum mode_class
, optab
));
94 static int expand_cmplxdiv_wide
PARAMS ((rtx
, rtx
, rtx
, rtx
,
95 rtx
, rtx
, enum machine_mode
,
96 int, enum optab_methods
,
97 enum mode_class
, optab
));
98 static enum insn_code can_fix_p
PARAMS ((enum machine_mode
, enum machine_mode
,
100 static enum insn_code can_float_p
PARAMS ((enum machine_mode
, enum machine_mode
,
102 static rtx ftruncify
PARAMS ((rtx
));
103 static optab init_optab
PARAMS ((enum rtx_code
));
104 static void init_libfuncs
PARAMS ((optab
, int, int, const char *, int));
105 static void init_integral_libfuncs
PARAMS ((optab
, const char *, int));
106 static void init_floating_libfuncs
PARAMS ((optab
, const char *, int));
107 #ifdef HAVE_conditional_trap
108 static void init_traps
PARAMS ((void));
110 static void emit_cmp_and_jump_insn_1
PARAMS ((rtx
, rtx
, enum machine_mode
,
111 enum rtx_code
, int, rtx
));
112 static void prepare_float_lib_cmp
PARAMS ((rtx
*, rtx
*, enum rtx_code
*,
113 enum machine_mode
*, int *));
115 /* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
116 the result of operation CODE applied to OP0 (and OP1 if it is a binary
119 If the last insn does not set TARGET, don't do anything, but return 1.
121 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
122 don't add the REG_EQUAL note but return 0. Our caller can then try
123 again, ensuring that TARGET is not one of the operands. */
126 add_equal_note (seq
, target
, code
, op0
, op1
)
136 if ((GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
137 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
138 || GET_CODE (seq
) != SEQUENCE
139 || (set
= single_set (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1))) == 0
140 || GET_CODE (target
) == ZERO_EXTRACT
141 || (! rtx_equal_p (SET_DEST (set
), target
)
142 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
144 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
145 || ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set
), 0)),
149 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
150 besides the last insn. */
151 if (reg_overlap_mentioned_p (target
, op0
)
152 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
153 for (i
= XVECLEN (seq
, 0) - 2; i
>= 0; i
--)
154 if (reg_set_p (target
, XVECEXP (seq
, 0, i
)))
157 if (GET_RTX_CLASS (code
) == '1')
158 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
160 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
162 set_unique_reg_note (XVECEXP (seq
, 0, XVECLEN (seq
, 0) - 1), REG_EQUAL
, note
);
167 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
168 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
169 not actually do a sign-extend or zero-extend, but can leave the
170 higher-order bits of the result rtx undefined, for example, in the case
171 of logical operations, but not right shifts. */
174 widen_operand (op
, mode
, oldmode
, unsignedp
, no_extend
)
176 enum machine_mode mode
, oldmode
;
182 /* If we must extend do so. If OP is either a constant or a SUBREG
183 for a promoted object, also extend since it will be more efficient to
186 || GET_MODE (op
) == VOIDmode
187 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)))
188 return convert_modes (mode
, oldmode
, op
, unsignedp
);
190 /* If MODE is no wider than a single word, we return a paradoxical
192 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
193 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
195 /* Otherwise, get an object of MODE, clobber it, and set the low-order
198 result
= gen_reg_rtx (mode
);
199 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
200 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
204 /* Generate code to perform a straightforward complex divide. */
207 expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
208 unsignedp
, methods
, class, binoptab
)
209 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
210 enum machine_mode submode
;
212 enum optab_methods methods
;
213 enum mode_class
class;
220 optab this_add_optab
= add_optab
;
221 optab this_sub_optab
= sub_optab
;
222 optab this_neg_optab
= neg_optab
;
223 optab this_mul_optab
= smul_optab
;
225 if (binoptab
== sdivv_optab
)
227 this_add_optab
= addv_optab
;
228 this_sub_optab
= subv_optab
;
229 this_neg_optab
= negv_optab
;
230 this_mul_optab
= smulv_optab
;
233 /* Don't fetch these from memory more than once. */
234 real0
= force_reg (submode
, real0
);
235 real1
= force_reg (submode
, real1
);
238 imag0
= force_reg (submode
, imag0
);
240 imag1
= force_reg (submode
, imag1
);
242 /* Divisor: c*c + d*d. */
243 temp1
= expand_binop (submode
, this_mul_optab
, real1
, real1
,
244 NULL_RTX
, unsignedp
, methods
);
246 temp2
= expand_binop (submode
, this_mul_optab
, imag1
, imag1
,
247 NULL_RTX
, unsignedp
, methods
);
249 if (temp1
== 0 || temp2
== 0)
252 divisor
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
253 NULL_RTX
, unsignedp
, methods
);
259 /* Mathematically, ((a)(c-id))/divisor. */
260 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
262 /* Calculate the dividend. */
263 real_t
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
264 NULL_RTX
, unsignedp
, methods
);
266 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
267 NULL_RTX
, unsignedp
, methods
);
269 if (real_t
== 0 || imag_t
== 0)
272 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
273 NULL_RTX
, unsignedp
);
277 /* Mathematically, ((a+ib)(c-id))/divider. */
278 /* Calculate the dividend. */
279 temp1
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
280 NULL_RTX
, unsignedp
, methods
);
282 temp2
= expand_binop (submode
, this_mul_optab
, imag0
, imag1
,
283 NULL_RTX
, unsignedp
, methods
);
285 if (temp1
== 0 || temp2
== 0)
288 real_t
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
289 NULL_RTX
, unsignedp
, methods
);
291 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, real1
,
292 NULL_RTX
, unsignedp
, methods
);
294 temp2
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
295 NULL_RTX
, unsignedp
, methods
);
297 if (temp1
== 0 || temp2
== 0)
300 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, temp2
,
301 NULL_RTX
, unsignedp
, methods
);
303 if (real_t
== 0 || imag_t
== 0)
307 if (class == MODE_COMPLEX_FLOAT
)
308 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
309 realr
, unsignedp
, methods
);
311 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
312 real_t
, divisor
, realr
, unsignedp
);
318 emit_move_insn (realr
, res
);
320 if (class == MODE_COMPLEX_FLOAT
)
321 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
322 imagr
, unsignedp
, methods
);
324 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
325 imag_t
, divisor
, imagr
, unsignedp
);
331 emit_move_insn (imagr
, res
);
336 /* Generate code to perform a wide-input-range-acceptable complex divide. */
339 expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
340 unsignedp
, methods
, class, binoptab
)
341 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
342 enum machine_mode submode
;
344 enum optab_methods methods
;
345 enum mode_class
class;
350 rtx temp1
, temp2
, lab1
, lab2
;
351 enum machine_mode mode
;
354 optab this_add_optab
= add_optab
;
355 optab this_sub_optab
= sub_optab
;
356 optab this_neg_optab
= neg_optab
;
357 optab this_mul_optab
= smul_optab
;
359 if (binoptab
== sdivv_optab
)
361 this_add_optab
= addv_optab
;
362 this_sub_optab
= subv_optab
;
363 this_neg_optab
= negv_optab
;
364 this_mul_optab
= smulv_optab
;
367 /* Don't fetch these from memory more than once. */
368 real0
= force_reg (submode
, real0
);
369 real1
= force_reg (submode
, real1
);
372 imag0
= force_reg (submode
, imag0
);
374 imag1
= force_reg (submode
, imag1
);
376 /* XXX What's an "unsigned" complex number? */
384 temp1
= expand_abs (submode
, real1
, NULL_RTX
, unsignedp
, 1);
385 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, unsignedp
, 1);
388 if (temp1
== 0 || temp2
== 0)
391 mode
= GET_MODE (temp1
);
392 align
= GET_MODE_ALIGNMENT (mode
);
393 lab1
= gen_label_rtx ();
394 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
395 mode
, unsignedp
, align
, lab1
);
397 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
399 if (class == MODE_COMPLEX_FLOAT
)
400 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
401 NULL_RTX
, unsignedp
, methods
);
403 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
404 imag1
, real1
, NULL_RTX
, unsignedp
);
409 /* Calculate divisor. */
411 temp1
= expand_binop (submode
, this_mul_optab
, imag1
, ratio
,
412 NULL_RTX
, unsignedp
, methods
);
417 divisor
= expand_binop (submode
, this_add_optab
, temp1
, real1
,
418 NULL_RTX
, unsignedp
, methods
);
423 /* Calculate dividend. */
429 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
431 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
432 NULL_RTX
, unsignedp
, methods
);
437 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
438 NULL_RTX
, unsignedp
);
440 if (real_t
== 0 || imag_t
== 0)
445 /* Compute (a+ib)/(c+id) as
446 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
448 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
449 NULL_RTX
, unsignedp
, methods
);
454 real_t
= expand_binop (submode
, this_add_optab
, temp1
, real0
,
455 NULL_RTX
, unsignedp
, methods
);
457 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
458 NULL_RTX
, unsignedp
, methods
);
463 imag_t
= expand_binop (submode
, this_sub_optab
, imag0
, temp1
,
464 NULL_RTX
, unsignedp
, methods
);
466 if (real_t
== 0 || imag_t
== 0)
470 if (class == MODE_COMPLEX_FLOAT
)
471 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
472 realr
, unsignedp
, methods
);
474 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
475 real_t
, divisor
, realr
, unsignedp
);
481 emit_move_insn (realr
, res
);
483 if (class == MODE_COMPLEX_FLOAT
)
484 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
485 imagr
, unsignedp
, methods
);
487 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
488 imag_t
, divisor
, imagr
, unsignedp
);
494 emit_move_insn (imagr
, res
);
496 lab2
= gen_label_rtx ();
497 emit_jump_insn (gen_jump (lab2
));
502 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
504 if (class == MODE_COMPLEX_FLOAT
)
505 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
506 NULL_RTX
, unsignedp
, methods
);
508 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
509 real1
, imag1
, NULL_RTX
, unsignedp
);
514 /* Calculate divisor. */
516 temp1
= expand_binop (submode
, this_mul_optab
, real1
, ratio
,
517 NULL_RTX
, unsignedp
, methods
);
522 divisor
= expand_binop (submode
, this_add_optab
, temp1
, imag1
,
523 NULL_RTX
, unsignedp
, methods
);
528 /* Calculate dividend. */
532 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
534 real_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
535 NULL_RTX
, unsignedp
, methods
);
537 imag_t
= expand_unop (submode
, this_neg_optab
, real0
,
538 NULL_RTX
, unsignedp
);
540 if (real_t
== 0 || imag_t
== 0)
545 /* Compute (a+ib)/(c+id) as
546 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
548 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
549 NULL_RTX
, unsignedp
, methods
);
554 real_t
= expand_binop (submode
, this_add_optab
, temp1
, imag0
,
555 NULL_RTX
, unsignedp
, methods
);
557 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
558 NULL_RTX
, unsignedp
, methods
);
563 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, real0
,
564 NULL_RTX
, unsignedp
, methods
);
566 if (real_t
== 0 || imag_t
== 0)
570 if (class == MODE_COMPLEX_FLOAT
)
571 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
572 realr
, unsignedp
, methods
);
574 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
575 real_t
, divisor
, realr
, unsignedp
);
581 emit_move_insn (realr
, res
);
583 if (class == MODE_COMPLEX_FLOAT
)
584 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
585 imagr
, unsignedp
, methods
);
587 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
588 imag_t
, divisor
, imagr
, unsignedp
);
594 emit_move_insn (imagr
, res
);
601 /* Generate code to perform an operation specified by BINOPTAB
602 on operands OP0 and OP1, with result having machine-mode MODE.
604 UNSIGNEDP is for the case where we have to widen the operands
605 to perform the operation. It says to use zero-extension.
607 If TARGET is nonzero, the value
608 is generated there, if it is convenient to do so.
609 In all cases an rtx is returned for the locus of the value;
610 this may or may not be TARGET. */
613 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
614 enum machine_mode mode
;
619 enum optab_methods methods
;
621 enum optab_methods next_methods
622 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
623 ? OPTAB_WIDEN
: methods
);
624 enum mode_class
class;
625 enum machine_mode wider_mode
;
627 int commutative_op
= 0;
628 int shift_op
= (binoptab
->code
== ASHIFT
629 || binoptab
->code
== ASHIFTRT
630 || binoptab
->code
== LSHIFTRT
631 || binoptab
->code
== ROTATE
632 || binoptab
->code
== ROTATERT
);
633 rtx entry_last
= get_last_insn ();
636 class = GET_MODE_CLASS (mode
);
638 op0
= protect_from_queue (op0
, 0);
639 op1
= protect_from_queue (op1
, 0);
641 target
= protect_from_queue (target
, 1);
645 op0
= force_not_mem (op0
);
646 op1
= force_not_mem (op1
);
649 /* If subtracting an integer constant, convert this into an addition of
650 the negated constant. */
652 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
654 op1
= negate_rtx (mode
, op1
);
655 binoptab
= add_optab
;
658 /* If we are inside an appropriately-short loop and one operand is an
659 expensive constant, force it into a register. */
660 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
661 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
662 op0
= force_reg (mode
, op0
);
664 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
665 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
666 op1
= force_reg (mode
, op1
);
668 /* Record where to delete back to if we backtrack. */
669 last
= get_last_insn ();
671 /* If operation is commutative,
672 try to make the first operand a register.
673 Even better, try to make it the same as the target.
674 Also try to make the last operand a constant. */
675 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
676 || binoptab
== smul_widen_optab
677 || binoptab
== umul_widen_optab
678 || binoptab
== smul_highpart_optab
679 || binoptab
== umul_highpart_optab
)
683 if (((target
== 0 || GET_CODE (target
) == REG
)
684 ? ((GET_CODE (op1
) == REG
685 && GET_CODE (op0
) != REG
)
687 : rtx_equal_p (op1
, target
))
688 || GET_CODE (op0
) == CONST_INT
)
696 /* If we can do it with a three-operand insn, do so. */
698 if (methods
!= OPTAB_MUST_WIDEN
699 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
701 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
702 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
703 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
705 rtx xop0
= op0
, xop1
= op1
;
710 temp
= gen_reg_rtx (mode
);
712 /* If it is a commutative operator and the modes would match
713 if we would swap the operands, we can save the conversions. */
716 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
717 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
721 tmp
= op0
; op0
= op1
; op1
= tmp
;
722 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
726 /* In case the insn wants input operands in modes different from
727 the result, convert the operands. */
729 if (GET_MODE (op0
) != VOIDmode
730 && GET_MODE (op0
) != mode0
731 && mode0
!= VOIDmode
)
732 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
734 if (GET_MODE (xop1
) != VOIDmode
735 && GET_MODE (xop1
) != mode1
736 && mode1
!= VOIDmode
)
737 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
739 /* Now, if insn's predicates don't allow our operands, put them into
742 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
743 && mode0
!= VOIDmode
)
744 xop0
= copy_to_mode_reg (mode0
, xop0
);
746 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
747 && mode1
!= VOIDmode
)
748 xop1
= copy_to_mode_reg (mode1
, xop1
);
750 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
751 temp
= gen_reg_rtx (mode
);
753 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
756 /* If PAT is a multi-insn sequence, try to add an appropriate
757 REG_EQUAL note to it. If we can't because TEMP conflicts with an
758 operand, call ourselves again, this time without a target. */
759 if (GET_CODE (pat
) == SEQUENCE
760 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
762 delete_insns_since (last
);
763 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
771 delete_insns_since (last
);
774 /* If this is a multiply, see if we can do a widening operation that
775 takes operands of this mode and makes a wider mode. */
777 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
778 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
779 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
780 != CODE_FOR_nothing
))
782 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
783 unsignedp
? umul_widen_optab
: smul_widen_optab
,
784 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
788 if (GET_MODE_CLASS (mode
) == MODE_INT
)
789 return gen_lowpart (mode
, temp
);
791 return convert_to_mode (mode
, temp
, unsignedp
);
795 /* Look for a wider mode of the same class for which we think we
796 can open-code the operation. Check for a widening multiply at the
797 wider mode as well. */
799 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
800 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
801 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
802 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
804 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
805 || (binoptab
== smul_optab
806 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
807 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
808 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
809 != CODE_FOR_nothing
)))
811 rtx xop0
= op0
, xop1
= op1
;
814 /* For certain integer operations, we need not actually extend
815 the narrow operands, as long as we will truncate
816 the results to the same narrowness. */
818 if ((binoptab
== ior_optab
|| binoptab
== and_optab
819 || binoptab
== xor_optab
820 || binoptab
== add_optab
|| binoptab
== sub_optab
821 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
822 && class == MODE_INT
)
825 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
827 /* The second operand of a shift must always be extended. */
828 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
829 no_extend
&& binoptab
!= ashl_optab
);
831 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
832 unsignedp
, OPTAB_DIRECT
);
835 if (class != MODE_INT
)
838 target
= gen_reg_rtx (mode
);
839 convert_move (target
, temp
, 0);
843 return gen_lowpart (mode
, temp
);
846 delete_insns_since (last
);
850 /* These can be done a word at a time. */
851 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
853 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
854 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
860 /* If TARGET is the same as one of the operands, the REG_EQUAL note
861 won't be accurate, so use a new target. */
862 if (target
== 0 || target
== op0
|| target
== op1
)
863 target
= gen_reg_rtx (mode
);
867 /* Do the actual arithmetic. */
868 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
870 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
871 rtx x
= expand_binop (word_mode
, binoptab
,
872 operand_subword_force (op0
, i
, mode
),
873 operand_subword_force (op1
, i
, mode
),
874 target_piece
, unsignedp
, next_methods
);
879 if (target_piece
!= x
)
880 emit_move_insn (target_piece
, x
);
883 insns
= get_insns ();
886 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
888 if (binoptab
->code
!= UNKNOWN
)
890 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
891 copy_rtx (op0
), copy_rtx (op1
));
895 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
900 /* Synthesize double word shifts from single word shifts. */
901 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
902 || binoptab
== ashr_optab
)
904 && GET_CODE (op1
) == CONST_INT
905 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
906 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
907 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
908 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
910 rtx insns
, inter
, equiv_value
;
911 rtx into_target
, outof_target
;
912 rtx into_input
, outof_input
;
913 int shift_count
, left_shift
, outof_word
;
915 /* If TARGET is the same as one of the operands, the REG_EQUAL note
916 won't be accurate, so use a new target. */
917 if (target
== 0 || target
== op0
|| target
== op1
)
918 target
= gen_reg_rtx (mode
);
922 shift_count
= INTVAL (op1
);
924 /* OUTOF_* is the word we are shifting bits away from, and
925 INTO_* is the word that we are shifting bits towards, thus
926 they differ depending on the direction of the shift and
929 left_shift
= binoptab
== ashl_optab
;
930 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
932 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
933 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
935 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
936 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
938 if (shift_count
>= BITS_PER_WORD
)
940 inter
= expand_binop (word_mode
, binoptab
,
942 GEN_INT (shift_count
- BITS_PER_WORD
),
943 into_target
, unsignedp
, next_methods
);
945 if (inter
!= 0 && inter
!= into_target
)
946 emit_move_insn (into_target
, inter
);
948 /* For a signed right shift, we must fill the word we are shifting
949 out of with copies of the sign bit. Otherwise it is zeroed. */
950 if (inter
!= 0 && binoptab
!= ashr_optab
)
951 inter
= CONST0_RTX (word_mode
);
953 inter
= expand_binop (word_mode
, binoptab
,
955 GEN_INT (BITS_PER_WORD
- 1),
956 outof_target
, unsignedp
, next_methods
);
958 if (inter
!= 0 && inter
!= outof_target
)
959 emit_move_insn (outof_target
, inter
);
964 optab reverse_unsigned_shift
, unsigned_shift
;
966 /* For a shift of less then BITS_PER_WORD, to compute the carry,
967 we must do a logical shift in the opposite direction of the
970 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
972 /* For a shift of less than BITS_PER_WORD, to compute the word
973 shifted towards, we need to unsigned shift the orig value of
976 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
978 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
980 GEN_INT (BITS_PER_WORD
- shift_count
),
981 0, unsignedp
, next_methods
);
986 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
987 op1
, 0, unsignedp
, next_methods
);
990 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
991 into_target
, unsignedp
, next_methods
);
993 if (inter
!= 0 && inter
!= into_target
)
994 emit_move_insn (into_target
, inter
);
997 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
998 op1
, outof_target
, unsignedp
, next_methods
);
1000 if (inter
!= 0 && inter
!= outof_target
)
1001 emit_move_insn (outof_target
, inter
);
1004 insns
= get_insns ();
1009 if (binoptab
->code
!= UNKNOWN
)
1010 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1014 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1019 /* Synthesize double word rotates from single word shifts. */
1020 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1021 && class == MODE_INT
1022 && GET_CODE (op1
) == CONST_INT
1023 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1024 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1025 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1027 rtx insns
, equiv_value
;
1028 rtx into_target
, outof_target
;
1029 rtx into_input
, outof_input
;
1031 int shift_count
, left_shift
, outof_word
;
1033 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1034 won't be accurate, so use a new target. */
1035 if (target
== 0 || target
== op0
|| target
== op1
)
1036 target
= gen_reg_rtx (mode
);
1040 shift_count
= INTVAL (op1
);
1042 /* OUTOF_* is the word we are shifting bits away from, and
1043 INTO_* is the word that we are shifting bits towards, thus
1044 they differ depending on the direction of the shift and
1045 WORDS_BIG_ENDIAN. */
1047 left_shift
= (binoptab
== rotl_optab
);
1048 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1050 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1051 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1053 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1054 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1056 if (shift_count
== BITS_PER_WORD
)
1058 /* This is just a word swap. */
1059 emit_move_insn (outof_target
, into_input
);
1060 emit_move_insn (into_target
, outof_input
);
1065 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1066 rtx first_shift_count
, second_shift_count
;
1067 optab reverse_unsigned_shift
, unsigned_shift
;
1069 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1070 ? lshr_optab
: ashl_optab
);
1072 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1073 ? ashl_optab
: lshr_optab
);
1075 if (shift_count
> BITS_PER_WORD
)
1077 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1078 second_shift_count
= GEN_INT (2*BITS_PER_WORD
- shift_count
);
1082 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1083 second_shift_count
= GEN_INT (shift_count
);
1086 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1087 outof_input
, first_shift_count
,
1088 NULL_RTX
, unsignedp
, next_methods
);
1089 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1090 into_input
, second_shift_count
,
1091 into_target
, unsignedp
, next_methods
);
1093 if (into_temp1
!= 0 && into_temp2
!= 0)
1094 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1095 into_target
, unsignedp
, next_methods
);
1099 if (inter
!= 0 && inter
!= into_target
)
1100 emit_move_insn (into_target
, inter
);
1102 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1103 into_input
, first_shift_count
,
1104 NULL_RTX
, unsignedp
, next_methods
);
1105 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1106 outof_input
, second_shift_count
,
1107 outof_target
, unsignedp
, next_methods
);
1109 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1110 inter
= expand_binop (word_mode
, ior_optab
,
1111 outof_temp1
, outof_temp2
,
1112 outof_target
, unsignedp
, next_methods
);
1114 if (inter
!= 0 && inter
!= outof_target
)
1115 emit_move_insn (outof_target
, inter
);
1118 insns
= get_insns ();
1123 if (binoptab
->code
!= UNKNOWN
)
1124 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1128 /* We can't make this a no conflict block if this is a word swap,
1129 because the word swap case fails if the input and output values
1130 are in the same register. */
1131 if (shift_count
!= BITS_PER_WORD
)
1132 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1141 /* These can be done a word at a time by propagating carries. */
1142 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1143 && class == MODE_INT
1144 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1145 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1148 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1149 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1150 unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1151 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1154 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1155 value is one of those, use it. Otherwise, use 1 since it is the
1156 one easiest to get. */
1157 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1158 int normalizep
= STORE_FLAG_VALUE
;
1163 /* Prepare the operands. */
1164 xop0
= force_reg (mode
, op0
);
1165 xop1
= force_reg (mode
, op1
);
1167 if (target
== 0 || GET_CODE (target
) != REG
1168 || target
== xop0
|| target
== xop1
)
1169 target
= gen_reg_rtx (mode
);
1171 /* Indicate for flow that the entire target reg is being set. */
1172 if (GET_CODE (target
) == REG
)
1173 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
1175 /* Do the actual arithmetic. */
1176 for (i
= 0; i
< nwords
; i
++)
1178 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1179 rtx target_piece
= operand_subword (target
, index
, 1, mode
);
1180 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1181 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1184 /* Main add/subtract of the input operands. */
1185 x
= expand_binop (word_mode
, binoptab
,
1186 op0_piece
, op1_piece
,
1187 target_piece
, unsignedp
, next_methods
);
1193 /* Store carry from main add/subtract. */
1194 carry_out
= gen_reg_rtx (word_mode
);
1195 carry_out
= emit_store_flag_force (carry_out
,
1196 (binoptab
== add_optab
1199 word_mode
, 1, normalizep
);
1204 /* Add/subtract previous carry to main result. */
1205 x
= expand_binop (word_mode
,
1206 normalizep
== 1 ? binoptab
: otheroptab
,
1208 target_piece
, 1, next_methods
);
1211 else if (target_piece
!= x
)
1212 emit_move_insn (target_piece
, x
);
1216 /* THIS CODE HAS NOT BEEN TESTED. */
1217 /* Get out carry from adding/subtracting carry in. */
1218 carry_tmp
= emit_store_flag_force (carry_tmp
,
1219 binoptab
== add_optab
1222 word_mode
, 1, normalizep
);
1224 /* Logical-ior the two poss. carry together. */
1225 carry_out
= expand_binop (word_mode
, ior_optab
,
1226 carry_out
, carry_tmp
,
1227 carry_out
, 0, next_methods
);
1233 carry_in
= carry_out
;
1236 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1238 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1240 rtx temp
= emit_move_insn (target
, target
);
1242 set_unique_reg_note (temp
,
1244 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1253 delete_insns_since (last
);
1256 /* If we want to multiply two two-word values and have normal and widening
1257 multiplies of single-word values, we can do this with three smaller
1258 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1259 because we are not operating on one word at a time.
1261 The multiplication proceeds as follows:
1262 _______________________
1263 [__op0_high_|__op0_low__]
1264 _______________________
1265 * [__op1_high_|__op1_low__]
1266 _______________________________________________
1267 _______________________
1268 (1) [__op0_low__*__op1_low__]
1269 _______________________
1270 (2a) [__op0_low__*__op1_high_]
1271 _______________________
1272 (2b) [__op0_high_*__op1_low__]
1273 _______________________
1274 (3) [__op0_high_*__op1_high_]
1277 This gives a 4-word result. Since we are only interested in the
1278 lower 2 words, partial result (3) and the upper words of (2a) and
1279 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1280 calculated using non-widening multiplication.
1282 (1), however, needs to be calculated with an unsigned widening
1283 multiplication. If this operation is not directly supported we
1284 try using a signed widening multiplication and adjust the result.
1285 This adjustment works as follows:
1287 If both operands are positive then no adjustment is needed.
1289 If the operands have different signs, for example op0_low < 0 and
1290 op1_low >= 0, the instruction treats the most significant bit of
1291 op0_low as a sign bit instead of a bit with significance
1292 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1293 with 2**BITS_PER_WORD - op0_low, and two's complements the
1294 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1297 Similarly, if both operands are negative, we need to add
1298 (op0_low + op1_low) * 2**BITS_PER_WORD.
1300 We use a trick to adjust quickly. We logically shift op0_low right
1301 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1302 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1303 logical shift exists, we do an arithmetic right shift and subtract
1306 if (binoptab
== smul_optab
1307 && class == MODE_INT
1308 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1309 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1310 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1311 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1312 != CODE_FOR_nothing
)
1313 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1314 != CODE_FOR_nothing
)))
1316 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1317 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1318 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1319 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1320 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1321 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1323 rtx op0_xhigh
= NULL_RTX
;
1324 rtx op1_xhigh
= NULL_RTX
;
1326 /* If the target is the same as one of the inputs, don't use it. This
1327 prevents problems with the REG_EQUAL note. */
1328 if (target
== op0
|| target
== op1
1329 || (target
!= 0 && GET_CODE (target
) != REG
))
1332 /* Multiply the two lower words to get a double-word product.
1333 If unsigned widening multiplication is available, use that;
1334 otherwise use the signed form and compensate. */
1336 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1338 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1339 target
, 1, OPTAB_DIRECT
);
1341 /* If we didn't succeed, delete everything we did so far. */
1343 delete_insns_since (last
);
1345 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1349 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1350 != CODE_FOR_nothing
)
1352 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1353 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1354 target
, 1, OPTAB_DIRECT
);
1355 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1356 NULL_RTX
, 1, next_methods
);
1358 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1359 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1362 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1363 NULL_RTX
, 0, next_methods
);
1365 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1366 op0_xhigh
, op0_xhigh
, 0,
1370 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1371 NULL_RTX
, 1, next_methods
);
1373 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1374 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1377 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1378 NULL_RTX
, 0, next_methods
);
1380 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1381 op1_xhigh
, op1_xhigh
, 0,
1386 /* If we have been able to directly compute the product of the
1387 low-order words of the operands and perform any required adjustments
1388 of the operands, we proceed by trying two more multiplications
1389 and then computing the appropriate sum.
1391 We have checked above that the required addition is provided.
1392 Full-word addition will normally always succeed, especially if
1393 it is provided at all, so we don't worry about its failure. The
1394 multiplication may well fail, however, so we do handle that. */
1396 if (product
&& op0_xhigh
&& op1_xhigh
)
1398 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1399 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1400 NULL_RTX
, 0, OPTAB_DIRECT
);
1403 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1404 product_high
, 0, next_methods
);
1406 if (temp
!= 0 && temp
!= product_high
)
1407 emit_move_insn (product_high
, temp
);
1410 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1411 NULL_RTX
, 0, OPTAB_DIRECT
);
1414 temp
= expand_binop (word_mode
, add_optab
, temp
,
1415 product_high
, product_high
,
1418 if (temp
!= 0 && temp
!= product_high
)
1419 emit_move_insn (product_high
, temp
);
1423 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1425 temp
= emit_move_insn (product
, product
);
1426 set_unique_reg_note (temp
,
1428 gen_rtx_fmt_ee (MULT
, mode
,
1437 /* If we get here, we couldn't do it for some reason even though we
1438 originally thought we could. Delete anything we've emitted in
1441 delete_insns_since (last
);
1444 /* We need to open-code the complex type operations: '+, -, * and /' */
1446 /* At this point we allow operations between two similar complex
1447 numbers, and also if one of the operands is not a complex number
1448 but rather of MODE_FLOAT or MODE_INT. However, the caller
1449 must make sure that the MODE of the non-complex operand matches
1450 the SUBMODE of the complex operand. */
1452 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1454 rtx real0
= 0, imag0
= 0;
1455 rtx real1
= 0, imag1
= 0;
1456 rtx realr
, imagr
, res
;
1461 /* Find the correct mode for the real and imaginary parts */
1462 enum machine_mode submode
1463 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
1464 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
1467 if (submode
== BLKmode
)
1471 target
= gen_reg_rtx (mode
);
1475 realr
= gen_realpart (submode
, target
);
1476 imagr
= gen_imagpart (submode
, target
);
1478 if (GET_MODE (op0
) == mode
)
1480 real0
= gen_realpart (submode
, op0
);
1481 imag0
= gen_imagpart (submode
, op0
);
1486 if (GET_MODE (op1
) == mode
)
1488 real1
= gen_realpart (submode
, op1
);
1489 imag1
= gen_imagpart (submode
, op1
);
1494 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0|| imag1
!= 0))
1497 switch (binoptab
->code
)
1500 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1502 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1503 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1504 realr
, unsignedp
, methods
);
1508 else if (res
!= realr
)
1509 emit_move_insn (realr
, res
);
1512 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1513 imagr
, unsignedp
, methods
);
1516 else if (binoptab
->code
== MINUS
)
1517 res
= expand_unop (submode
,
1518 binoptab
== subv_optab
? negv_optab
: neg_optab
,
1519 imag1
, imagr
, unsignedp
);
1525 else if (res
!= imagr
)
1526 emit_move_insn (imagr
, res
);
1532 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1538 /* Don't fetch these from memory more than once. */
1539 real0
= force_reg (submode
, real0
);
1540 real1
= force_reg (submode
, real1
);
1541 imag0
= force_reg (submode
, imag0
);
1542 imag1
= force_reg (submode
, imag1
);
1544 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1545 unsignedp
, methods
);
1547 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1548 unsignedp
, methods
);
1550 if (temp1
== 0 || temp2
== 0)
1555 binoptab
== smulv_optab
? subv_optab
: sub_optab
,
1556 temp1
, temp2
, realr
, unsignedp
, methods
));
1560 else if (res
!= realr
)
1561 emit_move_insn (realr
, res
);
1563 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1564 NULL_RTX
, unsignedp
, methods
);
1566 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1567 NULL_RTX
, unsignedp
, methods
);
1569 if (temp1
== 0 || temp2
== 0)
1574 binoptab
== smulv_optab
? addv_optab
: add_optab
,
1575 temp1
, temp2
, imagr
, unsignedp
, methods
));
1579 else if (res
!= imagr
)
1580 emit_move_insn (imagr
, res
);
1586 /* Don't fetch these from memory more than once. */
1587 real0
= force_reg (submode
, real0
);
1588 real1
= force_reg (submode
, real1
);
1590 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1591 realr
, unsignedp
, methods
);
1594 else if (res
!= realr
)
1595 emit_move_insn (realr
, res
);
1598 res
= expand_binop (submode
, binoptab
,
1599 real1
, imag0
, imagr
, unsignedp
, methods
);
1601 res
= expand_binop (submode
, binoptab
,
1602 real0
, imag1
, imagr
, unsignedp
, methods
);
1606 else if (res
!= imagr
)
1607 emit_move_insn (imagr
, res
);
1614 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1618 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1620 /* Don't fetch these from memory more than once. */
1621 real1
= force_reg (submode
, real1
);
1623 /* Simply divide the real and imaginary parts by `c' */
1624 if (class == MODE_COMPLEX_FLOAT
)
1625 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1626 realr
, unsignedp
, methods
);
1628 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1629 real0
, real1
, realr
, unsignedp
);
1633 else if (res
!= realr
)
1634 emit_move_insn (realr
, res
);
1636 if (class == MODE_COMPLEX_FLOAT
)
1637 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1638 imagr
, unsignedp
, methods
);
1640 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1641 imag0
, real1
, imagr
, unsignedp
);
1645 else if (res
!= imagr
)
1646 emit_move_insn (imagr
, res
);
1652 switch (flag_complex_divide_method
)
1655 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1656 realr
, imagr
, submode
,
1662 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1663 realr
, imagr
, submode
,
1683 if (binoptab
->code
!= UNKNOWN
)
1685 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
1686 copy_rtx (op0
), copy_rtx (op1
));
1690 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1696 /* It can't be open-coded in this mode.
1697 Use a library call if one is available and caller says that's ok. */
1699 if (binoptab
->handlers
[(int) mode
].libfunc
1700 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1704 enum machine_mode op1_mode
= mode
;
1711 op1_mode
= word_mode
;
1712 /* Specify unsigned here,
1713 since negative shift counts are meaningless. */
1714 op1x
= convert_to_mode (word_mode
, op1
, 1);
1717 if (GET_MODE (op0
) != VOIDmode
1718 && GET_MODE (op0
) != mode
)
1719 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1721 /* Pass 1 for NO_QUEUE so we don't lose any increments
1722 if the libcall is cse'd or moved. */
1723 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1724 NULL_RTX
, LCT_CONST
, mode
, 2,
1725 op0
, mode
, op1x
, op1_mode
);
1727 insns
= get_insns ();
1730 target
= gen_reg_rtx (mode
);
1731 emit_libcall_block (insns
, target
, value
,
1732 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1737 delete_insns_since (last
);
1739 /* It can't be done in this mode. Can we do it in a wider mode? */
1741 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1742 || methods
== OPTAB_MUST_WIDEN
))
1744 /* Caller says, don't even try. */
1745 delete_insns_since (entry_last
);
1749 /* Compute the value of METHODS to pass to recursive calls.
1750 Don't allow widening to be tried recursively. */
1752 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1754 /* Look for a wider mode of the same class for which it appears we can do
1757 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1759 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1760 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1762 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1763 != CODE_FOR_nothing
)
1764 || (methods
== OPTAB_LIB
1765 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1767 rtx xop0
= op0
, xop1
= op1
;
1770 /* For certain integer operations, we need not actually extend
1771 the narrow operands, as long as we will truncate
1772 the results to the same narrowness. */
1774 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1775 || binoptab
== xor_optab
1776 || binoptab
== add_optab
|| binoptab
== sub_optab
1777 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1778 && class == MODE_INT
)
1781 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1782 unsignedp
, no_extend
);
1784 /* The second operand of a shift must always be extended. */
1785 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1786 no_extend
&& binoptab
!= ashl_optab
);
1788 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1789 unsignedp
, methods
);
1792 if (class != MODE_INT
)
1795 target
= gen_reg_rtx (mode
);
1796 convert_move (target
, temp
, 0);
1800 return gen_lowpart (mode
, temp
);
1803 delete_insns_since (last
);
1808 delete_insns_since (entry_last
);
1812 /* Expand a binary operator which has both signed and unsigned forms.
1813 UOPTAB is the optab for unsigned operations, and SOPTAB is for
1816 If we widen unsigned operands, we may use a signed wider operation instead
1817 of an unsigned wider operation, since the result would be the same. */
1820 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
1821 enum machine_mode mode
;
1822 optab uoptab
, soptab
;
1823 rtx op0
, op1
, target
;
1825 enum optab_methods methods
;
1828 optab direct_optab
= unsignedp
? uoptab
: soptab
;
1829 struct optab wide_soptab
;
1831 /* Do it without widening, if possible. */
1832 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
1833 unsignedp
, OPTAB_DIRECT
);
1834 if (temp
|| methods
== OPTAB_DIRECT
)
1837 /* Try widening to a signed int. Make a fake signed optab that
1838 hides any signed insn for direct use. */
1839 wide_soptab
= *soptab
;
1840 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
1841 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
1843 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1844 unsignedp
, OPTAB_WIDEN
);
1846 /* For unsigned operands, try widening to an unsigned int. */
1847 if (temp
== 0 && unsignedp
)
1848 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
1849 unsignedp
, OPTAB_WIDEN
);
1850 if (temp
|| methods
== OPTAB_WIDEN
)
1853 /* Use the right width lib call if that exists. */
1854 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
1855 if (temp
|| methods
== OPTAB_LIB
)
1858 /* Must widen and use a lib call, use either signed or unsigned. */
1859 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
1860 unsignedp
, methods
);
1864 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
1865 unsignedp
, methods
);
1869 /* Generate code to perform an operation specified by BINOPTAB
1870 on operands OP0 and OP1, with two results to TARG1 and TARG2.
1871 We assume that the order of the operands for the instruction
1872 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
1873 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
1875 Either TARG0 or TARG1 may be zero, but what that means is that
1876 the result is not actually wanted. We will generate it into
1877 a dummy pseudo-reg and discard it. They may not both be zero.
1879 Returns 1 if this operation can be performed; 0 if not. */
1882 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
1888 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
1889 enum mode_class
class;
1890 enum machine_mode wider_mode
;
1891 rtx entry_last
= get_last_insn ();
1894 class = GET_MODE_CLASS (mode
);
1896 op0
= protect_from_queue (op0
, 0);
1897 op1
= protect_from_queue (op1
, 0);
1901 op0
= force_not_mem (op0
);
1902 op1
= force_not_mem (op1
);
1905 /* If we are inside an appropriately-short loop and one operand is an
1906 expensive constant, force it into a register. */
1907 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
1908 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
1909 op0
= force_reg (mode
, op0
);
1911 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
1912 && rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
1913 op1
= force_reg (mode
, op1
);
1916 targ0
= protect_from_queue (targ0
, 1);
1918 targ0
= gen_reg_rtx (mode
);
1920 targ1
= protect_from_queue (targ1
, 1);
1922 targ1
= gen_reg_rtx (mode
);
1924 /* Record where to go back to if we fail. */
1925 last
= get_last_insn ();
1927 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1929 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
1930 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
1931 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
1933 rtx xop0
= op0
, xop1
= op1
;
1935 /* In case this insn wants input operands in modes different from the
1936 result, convert the operands. */
1937 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (op0
) != mode0
)
1938 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
1940 if (GET_MODE (op1
) != VOIDmode
&& GET_MODE (op1
) != mode1
)
1941 xop1
= convert_to_mode (mode1
, xop1
, unsignedp
);
1943 /* Now, if insn doesn't accept these operands, put them into pseudos. */
1944 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
1945 xop0
= copy_to_mode_reg (mode0
, xop0
);
1947 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
1948 xop1
= copy_to_mode_reg (mode1
, xop1
);
1950 /* We could handle this, but we should always be called with a pseudo
1951 for our targets and all insns should take them as outputs. */
1952 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
1953 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
1956 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
1963 delete_insns_since (last
);
1966 /* It can't be done in this mode. Can we do it in a wider mode? */
1968 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1970 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1971 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1973 if (binoptab
->handlers
[(int) wider_mode
].insn_code
1974 != CODE_FOR_nothing
)
1976 register rtx t0
= gen_reg_rtx (wider_mode
);
1977 register rtx t1
= gen_reg_rtx (wider_mode
);
1979 if (expand_twoval_binop (binoptab
,
1980 convert_modes (wider_mode
, mode
, op0
,
1982 convert_modes (wider_mode
, mode
, op1
,
1986 convert_move (targ0
, t0
, unsignedp
);
1987 convert_move (targ1
, t1
, unsignedp
);
1991 delete_insns_since (last
);
1996 delete_insns_since (entry_last
);
2000 /* Generate code to perform an operation specified by UNOPTAB
2001 on operand OP0, with result having machine-mode MODE.
2003 UNSIGNEDP is for the case where we have to widen the operands
2004 to perform the operation. It says to use zero-extension.
2006 If TARGET is nonzero, the value
2007 is generated there, if it is convenient to do so.
2008 In all cases an rtx is returned for the locus of the value;
2009 this may or may not be TARGET. */
2012 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
2013 enum machine_mode mode
;
2019 enum mode_class
class;
2020 enum machine_mode wider_mode
;
2022 rtx last
= get_last_insn ();
2025 class = GET_MODE_CLASS (mode
);
2027 op0
= protect_from_queue (op0
, 0);
2031 op0
= force_not_mem (op0
);
2035 target
= protect_from_queue (target
, 1);
2037 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2039 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2040 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2046 temp
= gen_reg_rtx (mode
);
2048 if (GET_MODE (xop0
) != VOIDmode
2049 && GET_MODE (xop0
) != mode0
)
2050 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2052 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2054 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2055 xop0
= copy_to_mode_reg (mode0
, xop0
);
2057 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2058 temp
= gen_reg_rtx (mode
);
2060 pat
= GEN_FCN (icode
) (temp
, xop0
);
2063 if (GET_CODE (pat
) == SEQUENCE
2064 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2066 delete_insns_since (last
);
2067 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2075 delete_insns_since (last
);
2078 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2080 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2081 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2082 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2084 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2088 /* For certain operations, we need not actually extend
2089 the narrow operand, as long as we will truncate the
2090 results to the same narrowness. */
2092 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2093 (unoptab
== neg_optab
2094 || unoptab
== one_cmpl_optab
)
2095 && class == MODE_INT
);
2097 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2102 if (class != MODE_INT
)
2105 target
= gen_reg_rtx (mode
);
2106 convert_move (target
, temp
, 0);
2110 return gen_lowpart (mode
, temp
);
2113 delete_insns_since (last
);
2117 /* These can be done a word at a time. */
2118 if (unoptab
== one_cmpl_optab
2119 && class == MODE_INT
2120 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2121 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2126 if (target
== 0 || target
== op0
)
2127 target
= gen_reg_rtx (mode
);
2131 /* Do the actual arithmetic. */
2132 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2134 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2135 rtx x
= expand_unop (word_mode
, unoptab
,
2136 operand_subword_force (op0
, i
, mode
),
2137 target_piece
, unsignedp
);
2138 if (target_piece
!= x
)
2139 emit_move_insn (target_piece
, x
);
2142 insns
= get_insns ();
2145 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2146 gen_rtx_fmt_e (unoptab
->code
, mode
,
2151 /* Open-code the complex negation operation. */
2152 else if (unoptab
->code
== NEG
2153 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2159 /* Find the correct mode for the real and imaginary parts */
2160 enum machine_mode submode
2161 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
2162 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
2165 if (submode
== BLKmode
)
2169 target
= gen_reg_rtx (mode
);
2173 target_piece
= gen_imagpart (submode
, target
);
2174 x
= expand_unop (submode
, unoptab
,
2175 gen_imagpart (submode
, op0
),
2176 target_piece
, unsignedp
);
2177 if (target_piece
!= x
)
2178 emit_move_insn (target_piece
, x
);
2180 target_piece
= gen_realpart (submode
, target
);
2181 x
= expand_unop (submode
, unoptab
,
2182 gen_realpart (submode
, op0
),
2183 target_piece
, unsignedp
);
2184 if (target_piece
!= x
)
2185 emit_move_insn (target_piece
, x
);
2190 emit_no_conflict_block (seq
, target
, op0
, 0,
2191 gen_rtx_fmt_e (unoptab
->code
, mode
,
2196 /* Now try a library call in this mode. */
2197 if (unoptab
->handlers
[(int) mode
].libfunc
)
2204 /* Pass 1 for NO_QUEUE so we don't lose any increments
2205 if the libcall is cse'd or moved. */
2206 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2207 NULL_RTX
, LCT_CONST
, mode
, 1, op0
, mode
);
2208 insns
= get_insns ();
2211 target
= gen_reg_rtx (mode
);
2212 emit_libcall_block (insns
, target
, value
,
2213 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2218 /* It can't be done in this mode. Can we do it in a wider mode? */
2220 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2222 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2223 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2225 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2226 != CODE_FOR_nothing
)
2227 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2231 /* For certain operations, we need not actually extend
2232 the narrow operand, as long as we will truncate the
2233 results to the same narrowness. */
2235 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2236 (unoptab
== neg_optab
2237 || unoptab
== one_cmpl_optab
)
2238 && class == MODE_INT
);
2240 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2245 if (class != MODE_INT
)
2248 target
= gen_reg_rtx (mode
);
2249 convert_move (target
, temp
, 0);
2253 return gen_lowpart (mode
, temp
);
2256 delete_insns_since (last
);
2261 /* If there is no negate operation, try doing a subtract from zero.
2262 The US Software GOFAST library needs this. */
2263 if (unoptab
->code
== NEG
)
2266 temp
= expand_binop (mode
,
2267 unoptab
== negv_optab
? subv_optab
: sub_optab
,
2268 CONST0_RTX (mode
), op0
,
2269 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2277 /* Emit code to compute the absolute value of OP0, with result to
2278 TARGET if convenient. (TARGET may be 0.) The return value says
2279 where the result actually is to be found.
2281 MODE is the mode of the operand; the mode of the result is
2282 different but can be deduced from MODE.
2287 expand_abs (mode
, op0
, target
, result_unsignedp
, safe
)
2288 enum machine_mode mode
;
2291 int result_unsignedp
;
2297 result_unsignedp
= 1;
2299 /* First try to do it with a special abs instruction. */
2300 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
2305 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2306 if (smax_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2308 rtx last
= get_last_insn ();
2310 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
2312 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
2318 delete_insns_since (last
);
2321 /* If this machine has expensive jumps, we can do integer absolute
2322 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2323 where W is the width of MODE. But don't do this if the machine has
2324 conditional arithmetic since the branches will be converted into
2325 a conditional negation insn. */
2327 #ifndef HAVE_conditional_arithmetic
2328 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2330 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2331 size_int (GET_MODE_BITSIZE (mode
) - 1),
2334 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2337 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
2338 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
2345 /* If that does not win, use conditional jump and negate. */
2347 /* It is safe to use the target if it is the same
2348 as the source if this is also a pseudo register */
2349 if (op0
== target
&& GET_CODE (op0
) == REG
2350 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2353 op1
= gen_label_rtx ();
2354 if (target
== 0 || ! safe
2355 || GET_MODE (target
) != mode
2356 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2357 || (GET_CODE (target
) == REG
2358 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2359 target
= gen_reg_rtx (mode
);
2361 emit_move_insn (target
, op0
);
2364 /* If this mode is an integer too wide to compare properly,
2365 compare word by word. Rely on CSE to optimize constant cases. */
2366 if (GET_MODE_CLASS (mode
) == MODE_INT
2367 && ! can_compare_p (GE
, mode
, ccp_jump
))
2368 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2371 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2372 NULL_RTX
, 0, NULL_RTX
, op1
);
2374 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
2377 emit_move_insn (target
, op0
);
2383 /* Emit code to compute the absolute value of OP0, with result to
2384 TARGET if convenient. (TARGET may be 0.) The return value says
2385 where the result actually is to be found.
2387 MODE is the mode of the operand; the mode of the result is
2388 different but can be deduced from MODE.
2390 UNSIGNEDP is relevant for complex integer modes. */
2393 expand_complex_abs (mode
, op0
, target
, unsignedp
)
2394 enum machine_mode mode
;
2399 enum mode_class
class = GET_MODE_CLASS (mode
);
2400 enum machine_mode wider_mode
;
2402 rtx entry_last
= get_last_insn ();
2405 optab this_abs_optab
;
2407 /* Find the correct mode for the real and imaginary parts. */
2408 enum machine_mode submode
2409 = mode_for_size (GET_MODE_UNIT_SIZE (mode
) * BITS_PER_UNIT
,
2410 class == MODE_COMPLEX_INT
? MODE_INT
: MODE_FLOAT
,
2413 if (submode
== BLKmode
)
2416 op0
= protect_from_queue (op0
, 0);
2420 op0
= force_not_mem (op0
);
2423 last
= get_last_insn ();
2426 target
= protect_from_queue (target
, 1);
2428 this_abs_optab
= ! unsignedp
&& flag_trapv
2429 && (GET_MODE_CLASS(mode
) == MODE_INT
)
2430 ? absv_optab
: abs_optab
;
2432 if (this_abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2434 int icode
= (int) this_abs_optab
->handlers
[(int) mode
].insn_code
;
2435 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2441 temp
= gen_reg_rtx (submode
);
2443 if (GET_MODE (xop0
) != VOIDmode
2444 && GET_MODE (xop0
) != mode0
)
2445 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2447 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2449 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2450 xop0
= copy_to_mode_reg (mode0
, xop0
);
2452 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, submode
))
2453 temp
= gen_reg_rtx (submode
);
2455 pat
= GEN_FCN (icode
) (temp
, xop0
);
2458 if (GET_CODE (pat
) == SEQUENCE
2459 && ! add_equal_note (pat
, temp
, this_abs_optab
->code
, xop0
,
2462 delete_insns_since (last
);
2463 return expand_unop (mode
, this_abs_optab
, op0
, NULL_RTX
,
2472 delete_insns_since (last
);
2475 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2477 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2478 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2480 if (this_abs_optab
->handlers
[(int) wider_mode
].insn_code
2481 != CODE_FOR_nothing
)
2485 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2486 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2490 if (class != MODE_COMPLEX_INT
)
2493 target
= gen_reg_rtx (submode
);
2494 convert_move (target
, temp
, 0);
2498 return gen_lowpart (submode
, temp
);
2501 delete_insns_since (last
);
2505 /* Open-code the complex absolute-value operation
2506 if we can open-code sqrt. Otherwise it's not worth while. */
2507 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
2510 rtx real
, imag
, total
;
2512 real
= gen_realpart (submode
, op0
);
2513 imag
= gen_imagpart (submode
, op0
);
2515 /* Square both parts. */
2516 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
2517 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
2519 /* Sum the parts. */
2520 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
2521 0, OPTAB_LIB_WIDEN
);
2523 /* Get sqrt in TARGET. Set TARGET to where the result is. */
2524 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
2526 delete_insns_since (last
);
2531 /* Now try a library call in this mode. */
2532 if (this_abs_optab
->handlers
[(int) mode
].libfunc
)
2539 /* Pass 1 for NO_QUEUE so we don't lose any increments
2540 if the libcall is cse'd or moved. */
2541 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
2542 NULL_RTX
, LCT_CONST
, submode
, 1, op0
, mode
);
2543 insns
= get_insns ();
2546 target
= gen_reg_rtx (submode
);
2547 emit_libcall_block (insns
, target
, value
,
2548 gen_rtx_fmt_e (this_abs_optab
->code
, mode
, op0
));
2553 /* It can't be done in this mode. Can we do it in a wider mode? */
2555 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2556 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2558 if ((this_abs_optab
->handlers
[(int) wider_mode
].insn_code
2559 != CODE_FOR_nothing
)
2560 || this_abs_optab
->handlers
[(int) wider_mode
].libfunc
)
2564 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2566 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2570 if (class != MODE_COMPLEX_INT
)
2573 target
= gen_reg_rtx (submode
);
2574 convert_move (target
, temp
, 0);
2578 return gen_lowpart (submode
, temp
);
2581 delete_insns_since (last
);
2585 delete_insns_since (entry_last
);
2589 /* Generate an instruction whose insn-code is INSN_CODE,
2590 with two operands: an output TARGET and an input OP0.
2591 TARGET *must* be nonzero, and the output is always stored there.
2592 CODE is an rtx code such that (CODE OP0) is an rtx that describes
2593 the value that is stored into TARGET. */
2596 emit_unop_insn (icode
, target
, op0
, code
)
2603 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2606 temp
= target
= protect_from_queue (target
, 1);
2608 op0
= protect_from_queue (op0
, 0);
2610 /* Sign and zero extension from memory is often done specially on
2611 RISC machines, so forcing into a register here can pessimize
2613 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
2614 op0
= force_not_mem (op0
);
2616 /* Now, if insn does not accept our operands, put them into pseudos. */
2618 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
2619 op0
= copy_to_mode_reg (mode0
, op0
);
2621 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
2622 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
2623 temp
= gen_reg_rtx (GET_MODE (temp
));
2625 pat
= GEN_FCN (icode
) (temp
, op0
);
2627 if (GET_CODE (pat
) == SEQUENCE
&& code
!= UNKNOWN
)
2628 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
2633 emit_move_insn (target
, temp
);
2636 /* Emit code to perform a series of operations on a multi-word quantity, one
2639 Such a block is preceded by a CLOBBER of the output, consists of multiple
2640 insns, each setting one word of the output, and followed by a SET copying
2641 the output to itself.
2643 Each of the insns setting words of the output receives a REG_NO_CONFLICT
2644 note indicating that it doesn't conflict with the (also multi-word)
2645 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
2648 INSNS is a block of code generated to perform the operation, not including
2649 the CLOBBER and final copy. All insns that compute intermediate values
2650 are first emitted, followed by the block as described above.
2652 TARGET, OP0, and OP1 are the output and inputs of the operations,
2653 respectively. OP1 may be zero for a unary operation.
2655 EQUIV, if non-zero, is an expression to be placed into a REG_EQUAL note
2658 If TARGET is not a register, INSNS is simply emitted with no special
2659 processing. Likewise if anything in INSNS is not an INSN or if
2660 there is a libcall block inside INSNS.
2662 The final insn emitted is returned. */
2665 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
2671 rtx prev
, next
, first
, last
, insn
;
2673 if (GET_CODE (target
) != REG
|| reload_in_progress
)
2674 return emit_insns (insns
);
2676 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2677 if (GET_CODE (insn
) != INSN
2678 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
2679 return emit_insns (insns
);
2681 /* First emit all insns that do not store into words of the output and remove
2682 these from the list. */
2683 for (insn
= insns
; insn
; insn
= next
)
2688 next
= NEXT_INSN (insn
);
2690 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
2691 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
2692 set
= PATTERN (insn
);
2693 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2695 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2696 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
2698 set
= XVECEXP (PATTERN (insn
), 0, i
);
2706 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
2708 if (PREV_INSN (insn
))
2709 NEXT_INSN (PREV_INSN (insn
)) = next
;
2714 PREV_INSN (next
) = PREV_INSN (insn
);
2720 prev
= get_last_insn ();
2722 /* Now write the CLOBBER of the output, followed by the setting of each
2723 of the words, followed by the final copy. */
2724 if (target
!= op0
&& target
!= op1
)
2725 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
2727 for (insn
= insns
; insn
; insn
= next
)
2729 next
= NEXT_INSN (insn
);
2732 if (op1
&& GET_CODE (op1
) == REG
)
2733 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
2736 if (op0
&& GET_CODE (op0
) == REG
)
2737 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
2741 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2742 != CODE_FOR_nothing
)
2744 last
= emit_move_insn (target
, target
);
2746 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
2750 last
= get_last_insn ();
2752 /* Remove any existing REG_EQUAL note from "last", or else it will
2753 be mistaken for a note referring to the full contents of the
2754 alleged libcall value when found together with the REG_RETVAL
2755 note added below. An existing note can come from an insn
2756 expansion at "last". */
2757 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
2761 first
= get_insns ();
2763 first
= NEXT_INSN (prev
);
2765 /* Encapsulate the block so it gets manipulated as a unit. */
2766 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2768 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
2773 /* Emit code to make a call to a constant function or a library call.
2775 INSNS is a list containing all insns emitted in the call.
2776 These insns leave the result in RESULT. Our block is to copy RESULT
2777 to TARGET, which is logically equivalent to EQUIV.
2779 We first emit any insns that set a pseudo on the assumption that these are
2780 loading constants into registers; doing so allows them to be safely cse'ed
2781 between blocks. Then we emit all the other insns in the block, followed by
2782 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
2783 note with an operand of EQUIV.
2785 Moving assignments to pseudos outside of the block is done to improve
2786 the generated code, but is not required to generate correct code,
2787 hence being unable to move an assignment is not grounds for not making
2788 a libcall block. There are two reasons why it is safe to leave these
2789 insns inside the block: First, we know that these pseudos cannot be
2790 used in generated RTL outside the block since they are created for
2791 temporary purposes within the block. Second, CSE will not record the
2792 values of anything set inside a libcall block, so we know they must
2793 be dead at the end of the block.
2795 Except for the first group of insns (the ones setting pseudos), the
2796 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
2799 emit_libcall_block (insns
, target
, result
, equiv
)
2805 rtx final_dest
= target
;
2806 rtx prev
, next
, first
, last
, insn
;
2808 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
2809 into a MEM later. Protect the libcall block from this change. */
2810 if (! REG_P (target
) || REG_USERVAR_P (target
))
2811 target
= gen_reg_rtx (GET_MODE (target
));
2813 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
2814 reg note to indicate that this call cannot throw or execute a nonlocal
2815 goto (unless there is already a REG_EH_REGION note, in which case
2816 we update it). Also set the CONST_CALL_P flag. */
2818 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
2819 if (GET_CODE (insn
) == CALL_INSN
)
2821 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
2823 CONST_CALL_P (insn
) = 1;
2825 XEXP (note
, 0) = GEN_INT (-1);
2827 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, GEN_INT (-1),
2831 /* First emit all insns that set pseudos. Remove them from the list as
2832 we go. Avoid insns that set pseudos which were referenced in previous
2833 insns. These can be generated by move_by_pieces, for example,
2834 to update an address. Similarly, avoid insns that reference things
2835 set in previous insns. */
2837 for (insn
= insns
; insn
; insn
= next
)
2839 rtx set
= single_set (insn
);
2841 next
= NEXT_INSN (insn
);
2843 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
2844 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
2846 || ((! INSN_P(insns
)
2847 || ! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
)))
2848 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
2849 && ! modified_in_p (SET_SRC (set
), insns
)
2850 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
2852 if (PREV_INSN (insn
))
2853 NEXT_INSN (PREV_INSN (insn
)) = next
;
2858 PREV_INSN (next
) = PREV_INSN (insn
);
2864 prev
= get_last_insn ();
2866 /* Write the remaining insns followed by the final copy. */
2868 for (insn
= insns
; insn
; insn
= next
)
2870 next
= NEXT_INSN (insn
);
2875 last
= emit_move_insn (target
, result
);
2876 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
2877 != CODE_FOR_nothing
)
2878 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
2881 /* Remove any existing REG_EQUAL note from "last", or else it will
2882 be mistaken for a note referring to the full contents of the
2883 libcall value when found together with the REG_RETVAL note added
2884 below. An existing note can come from an insn expansion at
2886 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
2889 if (final_dest
!= target
)
2890 emit_move_insn (final_dest
, target
);
2893 first
= get_insns ();
2895 first
= NEXT_INSN (prev
);
2897 /* Encapsulate the block so it gets manipulated as a unit. */
2898 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
2900 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
2903 /* Generate code to store zero in X. */
2909 emit_move_insn (x
, const0_rtx
);
2912 /* Generate code to store 1 in X
2913 assuming it contains zero beforehand. */
2916 emit_0_to_1_insn (x
)
2919 emit_move_insn (x
, const1_rtx
);
2922 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
2923 PURPOSE describes how this comparison will be used. CODE is the rtx
2924 comparison code we will be using.
2926 ??? Actually, CODE is slightly weaker than that. A target is still
2927 required to implement all of the normal bcc operations, but not
2928 required to implement all (or any) of the unordered bcc operations. */
2931 can_compare_p (code
, mode
, purpose
)
2933 enum machine_mode mode
;
2934 enum can_compare_purpose purpose
;
2938 if (cmp_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2940 if (purpose
== ccp_jump
)
2941 return bcc_gen_fctn
[(int)code
] != NULL
;
2942 else if (purpose
== ccp_store_flag
)
2943 return setcc_gen_code
[(int)code
] != CODE_FOR_nothing
;
2945 /* There's only one cmov entry point, and it's allowed to fail. */
2948 if (purpose
== ccp_jump
2949 && cbranch_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2951 if (purpose
== ccp_cmov
2952 && cmov_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2954 if (purpose
== ccp_store_flag
2955 && cstore_optab
->handlers
[(int)mode
].insn_code
!= CODE_FOR_nothing
)
2958 mode
= GET_MODE_WIDER_MODE (mode
);
2960 while (mode
!= VOIDmode
);
2965 /* This function is called when we are going to emit a compare instruction that
2966 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
2968 *PMODE is the mode of the inputs (in case they are const_int).
2969 *PUNSIGNEDP nonzero says that the operands are unsigned;
2970 this matters if they need to be widened.
2972 If they have mode BLKmode, then SIZE specifies the size of both operands,
2973 and ALIGN specifies the known shared alignment of the operands.
2975 This function performs all the setup necessary so that the caller only has
2976 to emit a single comparison insn. This setup can involve doing a BLKmode
2977 comparison or emitting a library call to perform the comparison if no insn
2978 is available to handle it.
2979 The values which are passed in through pointers can be modified; the caller
2980 should perform the comparison on the modified values. */
2983 prepare_cmp_insn (px
, py
, pcomparison
, size
, pmode
, punsignedp
, align
,
2986 enum rtx_code
*pcomparison
;
2988 enum machine_mode
*pmode
;
2990 int align ATTRIBUTE_UNUSED
;
2991 enum can_compare_purpose purpose
;
2993 enum machine_mode mode
= *pmode
;
2994 rtx x
= *px
, y
= *py
;
2995 int unsignedp
= *punsignedp
;
2996 enum mode_class
class;
2997 rtx opalign ATTRIBUTE_UNUSED
= GEN_INT (align
/ BITS_PER_UNIT
);;
2999 class = GET_MODE_CLASS (mode
);
3001 /* They could both be VOIDmode if both args are immediate constants,
3002 but we should fold that at an earlier stage.
3003 With no special code here, this will call abort,
3004 reminding the programmer to implement such folding. */
3006 if (mode
!= BLKmode
&& flag_force_mem
)
3008 x
= force_not_mem (x
);
3009 y
= force_not_mem (y
);
3012 /* If we are inside an appropriately-short loop and one operand is an
3013 expensive constant, force it into a register. */
3014 if (CONSTANT_P (x
) && preserve_subexpressions_p ()
3015 && rtx_cost (x
, COMPARE
) > COSTS_N_INSNS (1))
3016 x
= force_reg (mode
, x
);
3018 if (CONSTANT_P (y
) && preserve_subexpressions_p ()
3019 && rtx_cost (y
, COMPARE
) > COSTS_N_INSNS (1))
3020 y
= force_reg (mode
, y
);
3023 /* Abort if we have a non-canonical comparison. The RTL documentation
3024 states that canonical comparisons are required only for targets which
3026 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
3030 /* Don't let both operands fail to indicate the mode. */
3031 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
3032 x
= force_reg (mode
, x
);
3034 /* Handle all BLKmode compares. */
3036 if (mode
== BLKmode
)
3039 enum machine_mode result_mode
;
3042 x
= protect_from_queue (x
, 0);
3043 y
= protect_from_queue (y
, 0);
3047 #ifdef HAVE_cmpstrqi
3049 && GET_CODE (size
) == CONST_INT
3050 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
3052 result_mode
= insn_data
[(int) CODE_FOR_cmpstrqi
].operand
[0].mode
;
3053 result
= gen_reg_rtx (result_mode
);
3054 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, opalign
));
3058 #ifdef HAVE_cmpstrhi
3060 && GET_CODE (size
) == CONST_INT
3061 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
3063 result_mode
= insn_data
[(int) CODE_FOR_cmpstrhi
].operand
[0].mode
;
3064 result
= gen_reg_rtx (result_mode
);
3065 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, opalign
));
3069 #ifdef HAVE_cmpstrsi
3072 result_mode
= insn_data
[(int) CODE_FOR_cmpstrsi
].operand
[0].mode
;
3073 result
= gen_reg_rtx (result_mode
);
3074 size
= protect_from_queue (size
, 0);
3075 emit_insn (gen_cmpstrsi (result
, x
, y
,
3076 convert_to_mode (SImode
, size
, 1),
3082 #ifdef TARGET_MEM_FUNCTIONS
3083 emit_library_call (memcmp_libfunc
, LCT_PURE_MAKE_BLOCK
,
3084 TYPE_MODE (integer_type_node
), 3,
3085 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3086 convert_to_mode (TYPE_MODE (sizetype
), size
,
3087 TREE_UNSIGNED (sizetype
)),
3088 TYPE_MODE (sizetype
));
3090 emit_library_call (bcmp_libfunc
, LCT_PURE_MAKE_BLOCK
,
3091 TYPE_MODE (integer_type_node
), 3,
3092 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3093 convert_to_mode (TYPE_MODE (integer_type_node
),
3095 TREE_UNSIGNED (integer_type_node
)),
3096 TYPE_MODE (integer_type_node
));
3099 /* Immediately move the result of the libcall into a pseudo
3100 register so reload doesn't clobber the value if it needs
3101 the return register for a spill reg. */
3102 result
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
3103 result_mode
= TYPE_MODE (integer_type_node
);
3104 emit_move_insn (result
,
3105 hard_libcall_value (result_mode
));
3109 *pmode
= result_mode
;
3115 if (can_compare_p (*pcomparison
, mode
, purpose
))
3118 /* Handle a lib call just for the mode we are using. */
3120 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3122 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3125 /* If we want unsigned, and this mode has a distinct unsigned
3126 comparison routine, use that. */
3127 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3128 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3130 emit_library_call (libfunc
, 1,
3131 word_mode
, 2, x
, mode
, y
, mode
);
3133 /* Immediately move the result of the libcall into a pseudo
3134 register so reload doesn't clobber the value if it needs
3135 the return register for a spill reg. */
3136 result
= gen_reg_rtx (word_mode
);
3137 emit_move_insn (result
, hard_libcall_value (word_mode
));
3139 /* Integer comparison returns a result that must be compared against 1,
3140 so that even if we do an unsigned compare afterward,
3141 there is still a value that can represent the result "less than". */
3148 if (class == MODE_FLOAT
)
3149 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3155 /* Before emitting an insn with code ICODE, make sure that X, which is going
3156 to be used for operand OPNUM of the insn, is converted from mode MODE to
3157 WIDER_MODE (UNSIGNEDP determines whether it is a unsigned conversion), and
3158 that it is accepted by the operand predicate. Return the new value. */
3161 prepare_operand (icode
, x
, opnum
, mode
, wider_mode
, unsignedp
)
3165 enum machine_mode mode
, wider_mode
;
3168 x
= protect_from_queue (x
, 0);
3170 if (mode
!= wider_mode
)
3171 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3173 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3174 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3175 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3179 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3180 we can do the comparison.
3181 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3182 be NULL_RTX which indicates that only a comparison is to be generated. */
3185 emit_cmp_and_jump_insn_1 (x
, y
, mode
, comparison
, unsignedp
, label
)
3187 enum machine_mode mode
;
3188 enum rtx_code comparison
;
3192 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3193 enum mode_class
class = GET_MODE_CLASS (mode
);
3194 enum machine_mode wider_mode
= mode
;
3196 /* Try combined insns first. */
3199 enum insn_code icode
;
3200 PUT_MODE (test
, wider_mode
);
3204 icode
= cbranch_optab
->handlers
[(int)wider_mode
].insn_code
;
3206 if (icode
!= CODE_FOR_nothing
3207 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3209 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3210 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3211 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3216 /* Handle some compares against zero. */
3217 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3218 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3220 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3221 emit_insn (GEN_FCN (icode
) (x
));
3223 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3227 /* Handle compares for which there is a directly suitable insn. */
3229 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3230 if (icode
!= CODE_FOR_nothing
)
3232 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3233 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3234 emit_insn (GEN_FCN (icode
) (x
, y
));
3236 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3240 if (class != MODE_INT
&& class != MODE_FLOAT
3241 && class != MODE_COMPLEX_FLOAT
)
3244 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3245 } while (wider_mode
!= VOIDmode
);
3250 /* Generate code to compare X with Y so that the condition codes are
3251 set and to jump to LABEL if the condition is true. If X is a
3252 constant and Y is not a constant, then the comparison is swapped to
3253 ensure that the comparison RTL has the canonical form.
3255 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3256 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3257 the proper branch condition code.
3259 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y,
3260 and ALIGN specifies the known shared alignment of X and Y.
3262 MODE is the mode of the inputs (in case they are const_int).
3264 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3265 be passed unchanged to emit_cmp_insn, then potentially converted into an
3266 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3269 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, align
, label
)
3271 enum rtx_code comparison
;
3273 enum machine_mode mode
;
3281 if ((CONSTANT_P (x
) && ! CONSTANT_P (y
))
3282 || (GET_CODE (x
) == CONST_INT
&& GET_CODE (y
) != CONST_INT
))
3284 /* Swap operands and condition to ensure canonical RTL. */
3287 comparison
= swap_condition (comparison
);
3296 /* If OP0 is still a constant, then both X and Y must be constants. Force
3297 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3299 if (CONSTANT_P (op0
))
3300 op0
= force_reg (mode
, op0
);
3305 comparison
= unsigned_condition (comparison
);
3306 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
, align
,
3308 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3311 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3314 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
, align
)
3316 enum rtx_code comparison
;
3318 enum machine_mode mode
;
3322 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, align
, 0);
3325 /* Emit a library call comparison between floating point X and Y.
3326 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3329 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
)
3331 enum rtx_code
*pcomparison
;
3332 enum machine_mode
*pmode
;
3335 enum rtx_code comparison
= *pcomparison
;
3336 rtx x
= *px
= protect_from_queue (*px
, 0);
3337 rtx y
= *py
= protect_from_queue (*py
, 0);
3338 enum machine_mode mode
= GET_MODE (x
);
3346 libfunc
= eqhf2_libfunc
;
3350 libfunc
= nehf2_libfunc
;
3354 libfunc
= gthf2_libfunc
;
3358 libfunc
= gehf2_libfunc
;
3362 libfunc
= lthf2_libfunc
;
3366 libfunc
= lehf2_libfunc
;
3370 libfunc
= unordhf2_libfunc
;
3376 else if (mode
== SFmode
)
3380 libfunc
= eqsf2_libfunc
;
3384 libfunc
= nesf2_libfunc
;
3388 libfunc
= gtsf2_libfunc
;
3392 libfunc
= gesf2_libfunc
;
3396 libfunc
= ltsf2_libfunc
;
3400 libfunc
= lesf2_libfunc
;
3404 libfunc
= unordsf2_libfunc
;
3410 else if (mode
== DFmode
)
3414 libfunc
= eqdf2_libfunc
;
3418 libfunc
= nedf2_libfunc
;
3422 libfunc
= gtdf2_libfunc
;
3426 libfunc
= gedf2_libfunc
;
3430 libfunc
= ltdf2_libfunc
;
3434 libfunc
= ledf2_libfunc
;
3438 libfunc
= unorddf2_libfunc
;
3444 else if (mode
== XFmode
)
3448 libfunc
= eqxf2_libfunc
;
3452 libfunc
= nexf2_libfunc
;
3456 libfunc
= gtxf2_libfunc
;
3460 libfunc
= gexf2_libfunc
;
3464 libfunc
= ltxf2_libfunc
;
3468 libfunc
= lexf2_libfunc
;
3472 libfunc
= unordxf2_libfunc
;
3478 else if (mode
== TFmode
)
3482 libfunc
= eqtf2_libfunc
;
3486 libfunc
= netf2_libfunc
;
3490 libfunc
= gttf2_libfunc
;
3494 libfunc
= getf2_libfunc
;
3498 libfunc
= lttf2_libfunc
;
3502 libfunc
= letf2_libfunc
;
3506 libfunc
= unordtf2_libfunc
;
3514 enum machine_mode wider_mode
;
3516 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3517 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3519 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
3520 != CODE_FOR_nothing
)
3521 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
3523 x
= protect_from_queue (x
, 0);
3524 y
= protect_from_queue (y
, 0);
3525 *px
= convert_to_mode (wider_mode
, x
, 0);
3526 *py
= convert_to_mode (wider_mode
, y
, 0);
3527 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3537 emit_library_call (libfunc
, LCT_CONST_MAKE_BLOCK
, word_mode
, 2, x
, mode
, y
,
3540 /* Immediately move the result of the libcall into a pseudo
3541 register so reload doesn't clobber the value if it needs
3542 the return register for a spill reg. */
3543 result
= gen_reg_rtx (word_mode
);
3544 emit_move_insn (result
, hard_libcall_value (word_mode
));
3548 if (comparison
== UNORDERED
)
3550 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
3551 else if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
3557 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3560 emit_indirect_jump (loc
)
3563 if (! ((*insn_data
[(int)CODE_FOR_indirect_jump
].operand
[0].predicate
)
3565 loc
= copy_to_mode_reg (Pmode
, loc
);
3567 emit_jump_insn (gen_indirect_jump (loc
));
3571 #ifdef HAVE_conditional_move
3573 /* Emit a conditional move instruction if the machine supports one for that
3574 condition and machine mode.
3576 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
3577 the mode to use should they be constants. If it is VOIDmode, they cannot
3580 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
3581 should be stored there. MODE is the mode to use should they be constants.
3582 If it is VOIDmode, they cannot both be constants.
3584 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
3585 is not supported. */
3588 emit_conditional_move (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
3593 enum machine_mode cmode
;
3595 enum machine_mode mode
;
3598 rtx tem
, subtarget
, comparison
, insn
;
3599 enum insn_code icode
;
3601 /* If one operand is constant, make it the second one. Only do this
3602 if the other operand is not constant as well. */
3604 if ((CONSTANT_P (op0
) && ! CONSTANT_P (op1
))
3605 || (GET_CODE (op0
) == CONST_INT
&& GET_CODE (op1
) != CONST_INT
))
3610 code
= swap_condition (code
);
3613 /* get_condition will prefer to generate LT and GT even if the old
3614 comparison was against zero, so undo that canonicalization here since
3615 comparisons against zero are cheaper. */
3616 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
3617 code
= LE
, op1
= const0_rtx
;
3618 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
3619 code
= GE
, op1
= const0_rtx
;
3621 if (cmode
== VOIDmode
)
3622 cmode
= GET_MODE (op0
);
3624 if (((CONSTANT_P (op2
) && ! CONSTANT_P (op3
))
3625 || (GET_CODE (op2
) == CONST_INT
&& GET_CODE (op3
) != CONST_INT
))
3626 && (GET_MODE_CLASS (GET_MODE (op1
)) != MODE_FLOAT
3627 || TARGET_FLOAT_FORMAT
!= IEEE_FLOAT_FORMAT
|| flag_fast_math
))
3632 code
= reverse_condition (code
);
3635 if (mode
== VOIDmode
)
3636 mode
= GET_MODE (op2
);
3638 icode
= movcc_gen_code
[mode
];
3640 if (icode
== CODE_FOR_nothing
)
3645 op2
= force_not_mem (op2
);
3646 op3
= force_not_mem (op3
);
3650 target
= protect_from_queue (target
, 1);
3652 target
= gen_reg_rtx (mode
);
3658 op2
= protect_from_queue (op2
, 0);
3659 op3
= protect_from_queue (op3
, 0);
3661 /* If the insn doesn't accept these operands, put them in pseudos. */
3663 if (! (*insn_data
[icode
].operand
[0].predicate
)
3664 (subtarget
, insn_data
[icode
].operand
[0].mode
))
3665 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
3667 if (! (*insn_data
[icode
].operand
[2].predicate
)
3668 (op2
, insn_data
[icode
].operand
[2].mode
))
3669 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
3671 if (! (*insn_data
[icode
].operand
[3].predicate
)
3672 (op3
, insn_data
[icode
].operand
[3].mode
))
3673 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
3675 /* Everything should now be in the suitable form, so emit the compare insn
3676 and then the conditional move. */
3679 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
, 0);
3681 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
3682 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
3683 return NULL and let the caller figure out how best to deal with this
3685 if (GET_CODE (comparison
) != code
)
3688 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
3690 /* If that failed, then give up. */
3696 if (subtarget
!= target
)
3697 convert_move (target
, subtarget
, 0);
3702 /* Return non-zero if a conditional move of mode MODE is supported.
3704 This function is for combine so it can tell whether an insn that looks
3705 like a conditional move is actually supported by the hardware. If we
3706 guess wrong we lose a bit on optimization, but that's it. */
3707 /* ??? sparc64 supports conditionally moving integers values based on fp
3708 comparisons, and vice versa. How do we handle them? */
3711 can_conditionally_move_p (mode
)
3712 enum machine_mode mode
;
3714 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
3720 #endif /* HAVE_conditional_move */
3722 /* These three functions generate an insn body and return it
3723 rather than emitting the insn.
3725 They do not protect from queued increments,
3726 because they may be used 1) in protect_from_queue itself
3727 and 2) in other passes where there is no queue. */
3729 /* Generate and return an insn body to add Y to X. */
3732 gen_add2_insn (x
, y
)
3735 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3737 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3738 (x
, insn_data
[icode
].operand
[0].mode
))
3739 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3740 (x
, insn_data
[icode
].operand
[1].mode
))
3741 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3742 (y
, insn_data
[icode
].operand
[2].mode
)))
3745 return (GEN_FCN (icode
) (x
, x
, y
));
3749 have_add2_insn (mode
)
3750 enum machine_mode mode
;
3752 return add_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3755 /* Generate and return an insn body to subtract Y from X. */
3758 gen_sub2_insn (x
, y
)
3761 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
3763 if (! ((*insn_data
[icode
].operand
[0].predicate
)
3764 (x
, insn_data
[icode
].operand
[0].mode
))
3765 || ! ((*insn_data
[icode
].operand
[1].predicate
)
3766 (x
, insn_data
[icode
].operand
[1].mode
))
3767 || ! ((*insn_data
[icode
].operand
[2].predicate
)
3768 (y
, insn_data
[icode
].operand
[2].mode
)))
3771 return (GEN_FCN (icode
) (x
, x
, y
));
3775 have_sub2_insn (mode
)
3776 enum machine_mode mode
;
3778 return sub_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
;
3781 /* Generate the body of an instruction to copy Y into X.
3782 It may be a SEQUENCE, if one insn isn't enough. */
3785 gen_move_insn (x
, y
)
3788 register enum machine_mode mode
= GET_MODE (x
);
3789 enum insn_code insn_code
;
3792 if (mode
== VOIDmode
)
3793 mode
= GET_MODE (y
);
3795 insn_code
= mov_optab
->handlers
[(int) mode
].insn_code
;
3797 /* Handle MODE_CC modes: If we don't have a special move insn for this mode,
3798 find a mode to do it in. If we have a movcc, use it. Otherwise,
3799 find the MODE_INT mode of the same width. */
3801 if (GET_MODE_CLASS (mode
) == MODE_CC
&& insn_code
== CODE_FOR_nothing
)
3803 enum machine_mode tmode
= VOIDmode
;
3807 && mov_optab
->handlers
[(int) CCmode
].insn_code
!= CODE_FOR_nothing
)
3810 for (tmode
= QImode
; tmode
!= VOIDmode
;
3811 tmode
= GET_MODE_WIDER_MODE (tmode
))
3812 if (GET_MODE_SIZE (tmode
) == GET_MODE_SIZE (mode
))
3815 if (tmode
== VOIDmode
)
3818 /* Get X and Y in TMODE. We can't use gen_lowpart here because it
3819 may call change_address which is not appropriate if we were
3820 called when a reload was in progress. We don't have to worry
3821 about changing the address since the size in bytes is supposed to
3822 be the same. Copy the MEM to change the mode and move any
3823 substitutions from the old MEM to the new one. */
3825 if (reload_in_progress
)
3827 x
= gen_lowpart_common (tmode
, x1
);
3828 if (x
== 0 && GET_CODE (x1
) == MEM
)
3830 x
= gen_rtx_MEM (tmode
, XEXP (x1
, 0));
3831 MEM_COPY_ATTRIBUTES (x
, x1
);
3832 copy_replacements (x1
, x
);
3835 y
= gen_lowpart_common (tmode
, y1
);
3836 if (y
== 0 && GET_CODE (y1
) == MEM
)
3838 y
= gen_rtx_MEM (tmode
, XEXP (y1
, 0));
3839 MEM_COPY_ATTRIBUTES (y
, y1
);
3840 copy_replacements (y1
, y
);
3845 x
= gen_lowpart (tmode
, x
);
3846 y
= gen_lowpart (tmode
, y
);
3849 insn_code
= mov_optab
->handlers
[(int) tmode
].insn_code
;
3850 return (GEN_FCN (insn_code
) (x
, y
));
3854 emit_move_insn_1 (x
, y
);
3855 seq
= gen_sequence ();
3860 /* Return the insn code used to extend FROM_MODE to TO_MODE.
3861 UNSIGNEDP specifies zero-extension instead of sign-extension. If
3862 no such operation exists, CODE_FOR_nothing will be returned. */
3865 can_extend_p (to_mode
, from_mode
, unsignedp
)
3866 enum machine_mode to_mode
, from_mode
;
3869 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
!= 0];
3872 /* Generate the body of an insn to extend Y (with mode MFROM)
3873 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
3876 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
3878 enum machine_mode mto
, mfrom
;
3881 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
!= 0]) (x
, y
));
3884 /* can_fix_p and can_float_p say whether the target machine
3885 can directly convert a given fixed point type to
3886 a given floating point type, or vice versa.
3887 The returned value is the CODE_FOR_... value to use,
3888 or CODE_FOR_nothing if these modes cannot be directly converted.
3890 *TRUNCP_PTR is set to 1 if it is necessary to output
3891 an explicit FTRUNC insn before the fix insn; otherwise 0. */
3893 static enum insn_code
3894 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
3895 enum machine_mode fltmode
, fixmode
;
3900 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0]
3901 != CODE_FOR_nothing
)
3902 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
3904 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
3907 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
3909 return CODE_FOR_nothing
;
3912 static enum insn_code
3913 can_float_p (fltmode
, fixmode
, unsignedp
)
3914 enum machine_mode fixmode
, fltmode
;
3917 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
3920 /* Generate code to convert FROM to floating point
3921 and store in TO. FROM must be fixed point and not VOIDmode.
3922 UNSIGNEDP nonzero means regard FROM as unsigned.
3923 Normally this is done by correcting the final value
3924 if it is negative. */
3927 expand_float (to
, from
, unsignedp
)
3931 enum insn_code icode
;
3932 register rtx target
= to
;
3933 enum machine_mode fmode
, imode
;
3935 /* Crash now, because we won't be able to decide which mode to use. */
3936 if (GET_MODE (from
) == VOIDmode
)
3939 /* Look for an insn to do the conversion. Do it in the specified
3940 modes if possible; otherwise convert either input, output or both to
3941 wider mode. If the integer mode is wider than the mode of FROM,
3942 we can do the conversion signed even if the input is unsigned. */
3944 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
3945 imode
= GET_MODE_WIDER_MODE (imode
))
3946 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
3947 fmode
= GET_MODE_WIDER_MODE (fmode
))
3949 int doing_unsigned
= unsignedp
;
3951 if (fmode
!= GET_MODE (to
)
3952 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
3955 icode
= can_float_p (fmode
, imode
, unsignedp
);
3956 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
3957 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
3959 if (icode
!= CODE_FOR_nothing
)
3961 to
= protect_from_queue (to
, 1);
3962 from
= protect_from_queue (from
, 0);
3964 if (imode
!= GET_MODE (from
))
3965 from
= convert_to_mode (imode
, from
, unsignedp
);
3967 if (fmode
!= GET_MODE (to
))
3968 target
= gen_reg_rtx (fmode
);
3970 emit_unop_insn (icode
, target
, from
,
3971 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
3974 convert_move (to
, target
, 0);
3979 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3981 /* Unsigned integer, and no way to convert directly.
3982 Convert as signed, then conditionally adjust the result. */
3985 rtx label
= gen_label_rtx ();
3987 REAL_VALUE_TYPE offset
;
3991 to
= protect_from_queue (to
, 1);
3992 from
= protect_from_queue (from
, 0);
3995 from
= force_not_mem (from
);
3997 /* Look for a usable floating mode FMODE wider than the source and at
3998 least as wide as the target. Using FMODE will avoid rounding woes
3999 with unsigned values greater than the signed maximum value. */
4001 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4002 fmode
= GET_MODE_WIDER_MODE (fmode
))
4003 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4004 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4007 if (fmode
== VOIDmode
)
4009 /* There is no such mode. Pretend the target is wide enough. */
4010 fmode
= GET_MODE (to
);
4012 /* Avoid double-rounding when TO is narrower than FROM. */
4013 if ((significand_size (fmode
) + 1)
4014 < GET_MODE_BITSIZE (GET_MODE (from
)))
4017 rtx neglabel
= gen_label_rtx ();
4019 /* Don't use TARGET if it isn't a register, is a hard register,
4020 or is the wrong mode. */
4021 if (GET_CODE (target
) != REG
4022 || REGNO (target
) < FIRST_PSEUDO_REGISTER
4023 || GET_MODE (target
) != fmode
)
4024 target
= gen_reg_rtx (fmode
);
4026 imode
= GET_MODE (from
);
4027 do_pending_stack_adjust ();
4029 /* Test whether the sign bit is set. */
4030 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
4033 /* The sign bit is not set. Convert as signed. */
4034 expand_float (target
, from
, 0);
4035 emit_jump_insn (gen_jump (label
));
4038 /* The sign bit is set.
4039 Convert to a usable (positive signed) value by shifting right
4040 one bit, while remembering if a nonzero bit was shifted
4041 out; i.e., compute (from & 1) | (from >> 1). */
4043 emit_label (neglabel
);
4044 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
4045 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
4046 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
4048 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
4050 expand_float (target
, temp
, 0);
4052 /* Multiply by 2 to undo the shift above. */
4053 temp
= expand_binop (fmode
, add_optab
, target
, target
,
4054 target
, 0, OPTAB_LIB_WIDEN
);
4056 emit_move_insn (target
, temp
);
4058 do_pending_stack_adjust ();
4064 /* If we are about to do some arithmetic to correct for an
4065 unsigned operand, do it in a pseudo-register. */
4067 if (GET_MODE (to
) != fmode
4068 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
4069 target
= gen_reg_rtx (fmode
);
4071 /* Convert as signed integer to floating. */
4072 expand_float (target
, from
, 0);
4074 /* If FROM is negative (and therefore TO is negative),
4075 correct its value by 2**bitwidth. */
4077 do_pending_stack_adjust ();
4078 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
4081 /* On SCO 3.2.1, ldexp rejects values outside [0.5, 1).
4082 Rather than setting up a dconst_dot_5, let's hope SCO
4084 offset
= REAL_VALUE_LDEXP (dconst1
, GET_MODE_BITSIZE (GET_MODE (from
)));
4085 temp
= expand_binop (fmode
, add_optab
, target
,
4086 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
4087 target
, 0, OPTAB_LIB_WIDEN
);
4089 emit_move_insn (target
, temp
);
4091 do_pending_stack_adjust ();
4097 /* No hardware instruction available; call a library routine to convert from
4098 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
4104 to
= protect_from_queue (to
, 1);
4105 from
= protect_from_queue (from
, 0);
4107 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
4108 from
= convert_to_mode (SImode
, from
, unsignedp
);
4111 from
= force_not_mem (from
);
4113 if (GET_MODE (to
) == SFmode
)
4115 if (GET_MODE (from
) == SImode
)
4116 libfcn
= floatsisf_libfunc
;
4117 else if (GET_MODE (from
) == DImode
)
4118 libfcn
= floatdisf_libfunc
;
4119 else if (GET_MODE (from
) == TImode
)
4120 libfcn
= floattisf_libfunc
;
4124 else if (GET_MODE (to
) == DFmode
)
4126 if (GET_MODE (from
) == SImode
)
4127 libfcn
= floatsidf_libfunc
;
4128 else if (GET_MODE (from
) == DImode
)
4129 libfcn
= floatdidf_libfunc
;
4130 else if (GET_MODE (from
) == TImode
)
4131 libfcn
= floattidf_libfunc
;
4135 else if (GET_MODE (to
) == XFmode
)
4137 if (GET_MODE (from
) == SImode
)
4138 libfcn
= floatsixf_libfunc
;
4139 else if (GET_MODE (from
) == DImode
)
4140 libfcn
= floatdixf_libfunc
;
4141 else if (GET_MODE (from
) == TImode
)
4142 libfcn
= floattixf_libfunc
;
4146 else if (GET_MODE (to
) == TFmode
)
4148 if (GET_MODE (from
) == SImode
)
4149 libfcn
= floatsitf_libfunc
;
4150 else if (GET_MODE (from
) == DImode
)
4151 libfcn
= floatditf_libfunc
;
4152 else if (GET_MODE (from
) == TImode
)
4153 libfcn
= floattitf_libfunc
;
4162 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
4163 GET_MODE (to
), 1, from
,
4165 insns
= get_insns ();
4168 emit_libcall_block (insns
, target
, value
,
4169 gen_rtx_FLOAT (GET_MODE (to
), from
));
4174 /* Copy result to requested destination
4175 if we have been computing in a temp location. */
4179 if (GET_MODE (target
) == GET_MODE (to
))
4180 emit_move_insn (to
, target
);
4182 convert_move (to
, target
, 0);
4186 /* expand_fix: generate code to convert FROM to fixed point
4187 and store in TO. FROM must be floating point. */
4193 rtx temp
= gen_reg_rtx (GET_MODE (x
));
4194 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
4198 expand_fix (to
, from
, unsignedp
)
4199 register rtx to
, from
;
4202 enum insn_code icode
;
4203 register rtx target
= to
;
4204 enum machine_mode fmode
, imode
;
4208 /* We first try to find a pair of modes, one real and one integer, at
4209 least as wide as FROM and TO, respectively, in which we can open-code
4210 this conversion. If the integer mode is wider than the mode of TO,
4211 we can do the conversion either signed or unsigned. */
4213 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
4214 imode
= GET_MODE_WIDER_MODE (imode
))
4215 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4216 fmode
= GET_MODE_WIDER_MODE (fmode
))
4218 int doing_unsigned
= unsignedp
;
4220 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
4221 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
4222 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
4224 if (icode
!= CODE_FOR_nothing
)
4226 to
= protect_from_queue (to
, 1);
4227 from
= protect_from_queue (from
, 0);
4229 if (fmode
!= GET_MODE (from
))
4230 from
= convert_to_mode (fmode
, from
, 0);
4233 from
= ftruncify (from
);
4235 if (imode
!= GET_MODE (to
))
4236 target
= gen_reg_rtx (imode
);
4238 emit_unop_insn (icode
, target
, from
,
4239 doing_unsigned
? UNSIGNED_FIX
: FIX
);
4241 convert_move (to
, target
, unsignedp
);
4246 #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4247 /* For an unsigned conversion, there is one more way to do it.
4248 If we have a signed conversion, we generate code that compares
4249 the real value to the largest representable positive number. If if
4250 is smaller, the conversion is done normally. Otherwise, subtract
4251 one plus the highest signed number, convert, and add it back.
4253 We only need to check all real modes, since we know we didn't find
4254 anything with a wider integer mode. */
4256 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
4257 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4258 fmode
= GET_MODE_WIDER_MODE (fmode
))
4259 /* Make sure we won't lose significant bits doing this. */
4260 if (GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))
4261 && CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
4265 REAL_VALUE_TYPE offset
;
4266 rtx limit
, lab1
, lab2
, insn
;
4268 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
4269 offset
= REAL_VALUE_LDEXP (dconst1
, bitsize
- 1);
4270 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
4271 lab1
= gen_label_rtx ();
4272 lab2
= gen_label_rtx ();
4275 to
= protect_from_queue (to
, 1);
4276 from
= protect_from_queue (from
, 0);
4279 from
= force_not_mem (from
);
4281 if (fmode
!= GET_MODE (from
))
4282 from
= convert_to_mode (fmode
, from
, 0);
4284 /* See if we need to do the subtraction. */
4285 do_pending_stack_adjust ();
4286 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
4289 /* If not, do the signed "fix" and branch around fixup code. */
4290 expand_fix (to
, from
, 0);
4291 emit_jump_insn (gen_jump (lab2
));
4294 /* Otherwise, subtract 2**(N-1), convert to signed number,
4295 then add 2**(N-1). Do the addition using XOR since this
4296 will often generate better code. */
4298 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
4299 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4300 expand_fix (to
, target
, 0);
4301 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
4302 GEN_INT ((HOST_WIDE_INT
) 1 << (bitsize
- 1)),
4303 to
, 1, OPTAB_LIB_WIDEN
);
4306 emit_move_insn (to
, target
);
4310 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
4311 != CODE_FOR_nothing
)
4313 /* Make a place for a REG_NOTE and add it. */
4314 insn
= emit_move_insn (to
, to
);
4315 set_unique_reg_note (insn
,
4317 gen_rtx_fmt_e (UNSIGNED_FIX
,
4326 /* We can't do it with an insn, so use a library call. But first ensure
4327 that the mode of TO is at least as wide as SImode, since those are the
4328 only library calls we know about. */
4330 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
4332 target
= gen_reg_rtx (SImode
);
4334 expand_fix (target
, from
, unsignedp
);
4336 else if (GET_MODE (from
) == SFmode
)
4338 if (GET_MODE (to
) == SImode
)
4339 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
4340 else if (GET_MODE (to
) == DImode
)
4341 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
4342 else if (GET_MODE (to
) == TImode
)
4343 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
4347 else if (GET_MODE (from
) == DFmode
)
4349 if (GET_MODE (to
) == SImode
)
4350 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
4351 else if (GET_MODE (to
) == DImode
)
4352 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
4353 else if (GET_MODE (to
) == TImode
)
4354 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
4358 else if (GET_MODE (from
) == XFmode
)
4360 if (GET_MODE (to
) == SImode
)
4361 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
4362 else if (GET_MODE (to
) == DImode
)
4363 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
4364 else if (GET_MODE (to
) == TImode
)
4365 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
4369 else if (GET_MODE (from
) == TFmode
)
4371 if (GET_MODE (to
) == SImode
)
4372 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
4373 else if (GET_MODE (to
) == DImode
)
4374 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
4375 else if (GET_MODE (to
) == TImode
)
4376 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
4388 to
= protect_from_queue (to
, 1);
4389 from
= protect_from_queue (from
, 0);
4392 from
= force_not_mem (from
);
4396 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
4397 GET_MODE (to
), 1, from
,
4399 insns
= get_insns ();
4402 emit_libcall_block (insns
, target
, value
,
4403 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
4404 GET_MODE (to
), from
));
4409 if (GET_MODE (to
) == GET_MODE (target
))
4410 emit_move_insn (to
, target
);
4412 convert_move (to
, target
, 0);
4421 optab op
= (optab
) xmalloc (sizeof (struct optab
));
4423 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4425 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
4426 op
->handlers
[i
].libfunc
= 0;
4429 if (code
!= UNKNOWN
)
4430 code_to_optab
[(int) code
] = op
;
4435 /* Initialize the libfunc fields of an entire group of entries in some
4436 optab. Each entry is set equal to a string consisting of a leading
4437 pair of underscores followed by a generic operation name followed by
4438 a mode name (downshifted to lower case) followed by a single character
4439 representing the number of operands for the given operation (which is
4440 usually one of the characters '2', '3', or '4').
4442 OPTABLE is the table in which libfunc fields are to be initialized.
4443 FIRST_MODE is the first machine mode index in the given optab to
4445 LAST_MODE is the last machine mode index in the given optab to
4447 OPNAME is the generic (string) name of the operation.
4448 SUFFIX is the character which specifies the number of operands for
4449 the given generic operation.
4453 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
4454 register optab optable
;
4455 register int first_mode
;
4456 register int last_mode
;
4457 register const char *opname
;
4458 register int suffix
;
4461 register unsigned opname_len
= strlen (opname
);
4463 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
4464 mode
= (enum machine_mode
) ((int) mode
+ 1))
4466 register const char *mname
= GET_MODE_NAME(mode
);
4467 register unsigned mname_len
= strlen (mname
);
4468 register char *libfunc_name
= alloca (2 + opname_len
+ mname_len
+ 1 + 1);
4470 register const char *q
;
4475 for (q
= opname
; *q
; )
4477 for (q
= mname
; *q
; q
++)
4478 *p
++ = TOLOWER (*q
);
4482 optable
->handlers
[(int) mode
].libfunc
4483 = gen_rtx_SYMBOL_REF (Pmode
, ggc_alloc_string (libfunc_name
,
4488 /* Initialize the libfunc fields of an entire group of entries in some
4489 optab which correspond to all integer mode operations. The parameters
4490 have the same meaning as similarly named ones for the `init_libfuncs'
4491 routine. (See above). */
4494 init_integral_libfuncs (optable
, opname
, suffix
)
4495 register optab optable
;
4496 register const char *opname
;
4497 register int suffix
;
4499 init_libfuncs (optable
, SImode
, TImode
, opname
, suffix
);
4502 /* Initialize the libfunc fields of an entire group of entries in some
4503 optab which correspond to all real mode operations. The parameters
4504 have the same meaning as similarly named ones for the `init_libfuncs'
4505 routine. (See above). */
4508 init_floating_libfuncs (optable
, opname
, suffix
)
4509 register optab optable
;
4510 register const char *opname
;
4511 register int suffix
;
4513 init_libfuncs (optable
, SFmode
, TFmode
, opname
, suffix
);
4517 init_one_libfunc (name
)
4518 register const char *name
;
4520 name
= ggc_strdup (name
);
4522 return gen_rtx_SYMBOL_REF (Pmode
, name
);
4525 /* Mark ARG (which is really an OPTAB *) for GC. */
4531 optab o
= *(optab
*) arg
;
4534 for (i
= 0; i
< NUM_MACHINE_MODES
; ++i
)
4535 ggc_mark_rtx (o
->handlers
[i
].libfunc
);
4538 /* Call this once to initialize the contents of the optabs
4539 appropriately for the current target machine. */
4544 unsigned int i
, j
, k
;
4546 /* Start by initializing all tables to contain CODE_FOR_nothing. */
4548 for (i
= 0; i
< ARRAY_SIZE (fixtab
); i
++)
4549 for (j
= 0; j
< ARRAY_SIZE (fixtab
[0]); j
++)
4550 for (k
= 0; k
< ARRAY_SIZE (fixtab
[0][0]); k
++)
4551 fixtab
[i
][j
][k
] = CODE_FOR_nothing
;
4553 for (i
= 0; i
< ARRAY_SIZE (fixtrunctab
); i
++)
4554 for (j
= 0; j
< ARRAY_SIZE (fixtrunctab
[0]); j
++)
4555 for (k
= 0; k
< ARRAY_SIZE (fixtrunctab
[0][0]); k
++)
4556 fixtrunctab
[i
][j
][k
] = CODE_FOR_nothing
;
4558 for (i
= 0; i
< ARRAY_SIZE (floattab
); i
++)
4559 for (j
= 0; j
< ARRAY_SIZE (floattab
[0]); j
++)
4560 for (k
= 0; k
< ARRAY_SIZE (floattab
[0][0]); k
++)
4561 floattab
[i
][j
][k
] = CODE_FOR_nothing
;
4563 for (i
= 0; i
< ARRAY_SIZE (extendtab
); i
++)
4564 for (j
= 0; j
< ARRAY_SIZE (extendtab
[0]); j
++)
4565 for (k
= 0; k
< ARRAY_SIZE (extendtab
[0][0]); k
++)
4566 extendtab
[i
][j
][k
] = CODE_FOR_nothing
;
4568 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
4569 setcc_gen_code
[i
] = CODE_FOR_nothing
;
4571 #ifdef HAVE_conditional_move
4572 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4573 movcc_gen_code
[i
] = CODE_FOR_nothing
;
4576 add_optab
= init_optab (PLUS
);
4577 addv_optab
= init_optab (PLUS
);
4578 sub_optab
= init_optab (MINUS
);
4579 subv_optab
= init_optab (MINUS
);
4580 smul_optab
= init_optab (MULT
);
4581 smulv_optab
= init_optab (MULT
);
4582 smul_highpart_optab
= init_optab (UNKNOWN
);
4583 umul_highpart_optab
= init_optab (UNKNOWN
);
4584 smul_widen_optab
= init_optab (UNKNOWN
);
4585 umul_widen_optab
= init_optab (UNKNOWN
);
4586 sdiv_optab
= init_optab (DIV
);
4587 sdivv_optab
= init_optab (DIV
);
4588 sdivmod_optab
= init_optab (UNKNOWN
);
4589 udiv_optab
= init_optab (UDIV
);
4590 udivmod_optab
= init_optab (UNKNOWN
);
4591 smod_optab
= init_optab (MOD
);
4592 umod_optab
= init_optab (UMOD
);
4593 flodiv_optab
= init_optab (DIV
);
4594 ftrunc_optab
= init_optab (UNKNOWN
);
4595 and_optab
= init_optab (AND
);
4596 ior_optab
= init_optab (IOR
);
4597 xor_optab
= init_optab (XOR
);
4598 ashl_optab
= init_optab (ASHIFT
);
4599 ashr_optab
= init_optab (ASHIFTRT
);
4600 lshr_optab
= init_optab (LSHIFTRT
);
4601 rotl_optab
= init_optab (ROTATE
);
4602 rotr_optab
= init_optab (ROTATERT
);
4603 smin_optab
= init_optab (SMIN
);
4604 smax_optab
= init_optab (SMAX
);
4605 umin_optab
= init_optab (UMIN
);
4606 umax_optab
= init_optab (UMAX
);
4607 mov_optab
= init_optab (UNKNOWN
);
4608 movstrict_optab
= init_optab (UNKNOWN
);
4609 cmp_optab
= init_optab (UNKNOWN
);
4610 ucmp_optab
= init_optab (UNKNOWN
);
4611 tst_optab
= init_optab (UNKNOWN
);
4612 neg_optab
= init_optab (NEG
);
4613 negv_optab
= init_optab (NEG
);
4614 abs_optab
= init_optab (ABS
);
4615 absv_optab
= init_optab (ABS
);
4616 one_cmpl_optab
= init_optab (NOT
);
4617 ffs_optab
= init_optab (FFS
);
4618 sqrt_optab
= init_optab (SQRT
);
4619 sin_optab
= init_optab (UNKNOWN
);
4620 cos_optab
= init_optab (UNKNOWN
);
4621 strlen_optab
= init_optab (UNKNOWN
);
4622 cbranch_optab
= init_optab (UNKNOWN
);
4623 cmov_optab
= init_optab (UNKNOWN
);
4624 cstore_optab
= init_optab (UNKNOWN
);
4626 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4628 movstr_optab
[i
] = CODE_FOR_nothing
;
4629 clrstr_optab
[i
] = CODE_FOR_nothing
;
4631 #ifdef HAVE_SECONDARY_RELOADS
4632 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
4636 /* Fill in the optabs with the insns we support. */
4639 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
4640 /* This flag says the same insns that convert to a signed fixnum
4641 also convert validly to an unsigned one. */
4642 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4643 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
4644 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
4647 /* Initialize the optabs with the names of the library functions. */
4648 init_integral_libfuncs (add_optab
, "add", '3');
4649 init_floating_libfuncs (add_optab
, "add", '3');
4650 init_integral_libfuncs (addv_optab
, "addv", '3');
4651 init_floating_libfuncs (addv_optab
, "add", '3');
4652 init_integral_libfuncs (sub_optab
, "sub", '3');
4653 init_floating_libfuncs (sub_optab
, "sub", '3');
4654 init_integral_libfuncs (subv_optab
, "subv", '3');
4655 init_floating_libfuncs (subv_optab
, "sub", '3');
4656 init_integral_libfuncs (smul_optab
, "mul", '3');
4657 init_floating_libfuncs (smul_optab
, "mul", '3');
4658 init_integral_libfuncs (smulv_optab
, "mulv", '3');
4659 init_floating_libfuncs (smulv_optab
, "mul", '3');
4660 init_integral_libfuncs (sdiv_optab
, "div", '3');
4661 init_integral_libfuncs (sdivv_optab
, "divv", '3');
4662 init_integral_libfuncs (udiv_optab
, "udiv", '3');
4663 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
4664 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
4665 init_integral_libfuncs (smod_optab
, "mod", '3');
4666 init_integral_libfuncs (umod_optab
, "umod", '3');
4667 init_floating_libfuncs (flodiv_optab
, "div", '3');
4668 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
4669 init_integral_libfuncs (and_optab
, "and", '3');
4670 init_integral_libfuncs (ior_optab
, "ior", '3');
4671 init_integral_libfuncs (xor_optab
, "xor", '3');
4672 init_integral_libfuncs (ashl_optab
, "ashl", '3');
4673 init_integral_libfuncs (ashr_optab
, "ashr", '3');
4674 init_integral_libfuncs (lshr_optab
, "lshr", '3');
4675 init_integral_libfuncs (smin_optab
, "min", '3');
4676 init_floating_libfuncs (smin_optab
, "min", '3');
4677 init_integral_libfuncs (smax_optab
, "max", '3');
4678 init_floating_libfuncs (smax_optab
, "max", '3');
4679 init_integral_libfuncs (umin_optab
, "umin", '3');
4680 init_integral_libfuncs (umax_optab
, "umax", '3');
4681 init_integral_libfuncs (neg_optab
, "neg", '2');
4682 init_floating_libfuncs (neg_optab
, "neg", '2');
4683 init_integral_libfuncs (negv_optab
, "negv", '2');
4684 init_floating_libfuncs (negv_optab
, "neg", '2');
4685 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
4686 init_integral_libfuncs (ffs_optab
, "ffs", '2');
4688 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
4689 init_integral_libfuncs (cmp_optab
, "cmp", '2');
4690 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
4691 init_floating_libfuncs (cmp_optab
, "cmp", '2');
4693 #ifdef MULSI3_LIBCALL
4694 smul_optab
->handlers
[(int) SImode
].libfunc
4695 = init_one_libfunc (MULSI3_LIBCALL
);
4697 #ifdef MULDI3_LIBCALL
4698 smul_optab
->handlers
[(int) DImode
].libfunc
4699 = init_one_libfunc (MULDI3_LIBCALL
);
4702 #ifdef DIVSI3_LIBCALL
4703 sdiv_optab
->handlers
[(int) SImode
].libfunc
4704 = init_one_libfunc (DIVSI3_LIBCALL
);
4706 #ifdef DIVDI3_LIBCALL
4707 sdiv_optab
->handlers
[(int) DImode
].libfunc
4708 = init_one_libfunc (DIVDI3_LIBCALL
);
4711 #ifdef UDIVSI3_LIBCALL
4712 udiv_optab
->handlers
[(int) SImode
].libfunc
4713 = init_one_libfunc (UDIVSI3_LIBCALL
);
4715 #ifdef UDIVDI3_LIBCALL
4716 udiv_optab
->handlers
[(int) DImode
].libfunc
4717 = init_one_libfunc (UDIVDI3_LIBCALL
);
4720 #ifdef MODSI3_LIBCALL
4721 smod_optab
->handlers
[(int) SImode
].libfunc
4722 = init_one_libfunc (MODSI3_LIBCALL
);
4724 #ifdef MODDI3_LIBCALL
4725 smod_optab
->handlers
[(int) DImode
].libfunc
4726 = init_one_libfunc (MODDI3_LIBCALL
);
4729 #ifdef UMODSI3_LIBCALL
4730 umod_optab
->handlers
[(int) SImode
].libfunc
4731 = init_one_libfunc (UMODSI3_LIBCALL
);
4733 #ifdef UMODDI3_LIBCALL
4734 umod_optab
->handlers
[(int) DImode
].libfunc
4735 = init_one_libfunc (UMODDI3_LIBCALL
);
4738 /* Use cabs for DC complex abs, since systems generally have cabs.
4739 Don't define any libcall for SCmode, so that cabs will be used. */
4740 abs_optab
->handlers
[(int) DCmode
].libfunc
4741 = init_one_libfunc ("cabs");
4743 /* The ffs function operates on `int'. */
4744 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
4745 = init_one_libfunc ("ffs");
4747 extendsfdf2_libfunc
= init_one_libfunc ("__extendsfdf2");
4748 extendsfxf2_libfunc
= init_one_libfunc ("__extendsfxf2");
4749 extendsftf2_libfunc
= init_one_libfunc ("__extendsftf2");
4750 extenddfxf2_libfunc
= init_one_libfunc ("__extenddfxf2");
4751 extenddftf2_libfunc
= init_one_libfunc ("__extenddftf2");
4753 truncdfsf2_libfunc
= init_one_libfunc ("__truncdfsf2");
4754 truncxfsf2_libfunc
= init_one_libfunc ("__truncxfsf2");
4755 trunctfsf2_libfunc
= init_one_libfunc ("__trunctfsf2");
4756 truncxfdf2_libfunc
= init_one_libfunc ("__truncxfdf2");
4757 trunctfdf2_libfunc
= init_one_libfunc ("__trunctfdf2");
4759 memcpy_libfunc
= init_one_libfunc ("memcpy");
4760 memmove_libfunc
= init_one_libfunc ("memmove");
4761 bcopy_libfunc
= init_one_libfunc ("bcopy");
4762 memcmp_libfunc
= init_one_libfunc ("memcmp");
4763 bcmp_libfunc
= init_one_libfunc ("__gcc_bcmp");
4764 memset_libfunc
= init_one_libfunc ("memset");
4765 bzero_libfunc
= init_one_libfunc ("bzero");
4767 throw_libfunc
= init_one_libfunc ("__throw");
4768 rethrow_libfunc
= init_one_libfunc ("__rethrow");
4769 sjthrow_libfunc
= init_one_libfunc ("__sjthrow");
4770 sjpopnthrow_libfunc
= init_one_libfunc ("__sjpopnthrow");
4771 terminate_libfunc
= init_one_libfunc ("__terminate");
4772 eh_rtime_match_libfunc
= init_one_libfunc ("__eh_rtime_match");
4773 #ifndef DONT_USE_BUILTIN_SETJMP
4774 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
4775 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
4777 setjmp_libfunc
= init_one_libfunc ("setjmp");
4778 longjmp_libfunc
= init_one_libfunc ("longjmp");
4781 eqhf2_libfunc
= init_one_libfunc ("__eqhf2");
4782 nehf2_libfunc
= init_one_libfunc ("__nehf2");
4783 gthf2_libfunc
= init_one_libfunc ("__gthf2");
4784 gehf2_libfunc
= init_one_libfunc ("__gehf2");
4785 lthf2_libfunc
= init_one_libfunc ("__lthf2");
4786 lehf2_libfunc
= init_one_libfunc ("__lehf2");
4787 unordhf2_libfunc
= init_one_libfunc ("__unordhf2");
4789 eqsf2_libfunc
= init_one_libfunc ("__eqsf2");
4790 nesf2_libfunc
= init_one_libfunc ("__nesf2");
4791 gtsf2_libfunc
= init_one_libfunc ("__gtsf2");
4792 gesf2_libfunc
= init_one_libfunc ("__gesf2");
4793 ltsf2_libfunc
= init_one_libfunc ("__ltsf2");
4794 lesf2_libfunc
= init_one_libfunc ("__lesf2");
4795 unordsf2_libfunc
= init_one_libfunc ("__unordsf2");
4797 eqdf2_libfunc
= init_one_libfunc ("__eqdf2");
4798 nedf2_libfunc
= init_one_libfunc ("__nedf2");
4799 gtdf2_libfunc
= init_one_libfunc ("__gtdf2");
4800 gedf2_libfunc
= init_one_libfunc ("__gedf2");
4801 ltdf2_libfunc
= init_one_libfunc ("__ltdf2");
4802 ledf2_libfunc
= init_one_libfunc ("__ledf2");
4803 unorddf2_libfunc
= init_one_libfunc ("__unorddf2");
4805 eqxf2_libfunc
= init_one_libfunc ("__eqxf2");
4806 nexf2_libfunc
= init_one_libfunc ("__nexf2");
4807 gtxf2_libfunc
= init_one_libfunc ("__gtxf2");
4808 gexf2_libfunc
= init_one_libfunc ("__gexf2");
4809 ltxf2_libfunc
= init_one_libfunc ("__ltxf2");
4810 lexf2_libfunc
= init_one_libfunc ("__lexf2");
4811 unordxf2_libfunc
= init_one_libfunc ("__unordxf2");
4813 eqtf2_libfunc
= init_one_libfunc ("__eqtf2");
4814 netf2_libfunc
= init_one_libfunc ("__netf2");
4815 gttf2_libfunc
= init_one_libfunc ("__gttf2");
4816 getf2_libfunc
= init_one_libfunc ("__getf2");
4817 lttf2_libfunc
= init_one_libfunc ("__lttf2");
4818 letf2_libfunc
= init_one_libfunc ("__letf2");
4819 unordtf2_libfunc
= init_one_libfunc ("__unordtf2");
4821 floatsisf_libfunc
= init_one_libfunc ("__floatsisf");
4822 floatdisf_libfunc
= init_one_libfunc ("__floatdisf");
4823 floattisf_libfunc
= init_one_libfunc ("__floattisf");
4825 floatsidf_libfunc
= init_one_libfunc ("__floatsidf");
4826 floatdidf_libfunc
= init_one_libfunc ("__floatdidf");
4827 floattidf_libfunc
= init_one_libfunc ("__floattidf");
4829 floatsixf_libfunc
= init_one_libfunc ("__floatsixf");
4830 floatdixf_libfunc
= init_one_libfunc ("__floatdixf");
4831 floattixf_libfunc
= init_one_libfunc ("__floattixf");
4833 floatsitf_libfunc
= init_one_libfunc ("__floatsitf");
4834 floatditf_libfunc
= init_one_libfunc ("__floatditf");
4835 floattitf_libfunc
= init_one_libfunc ("__floattitf");
4837 fixsfsi_libfunc
= init_one_libfunc ("__fixsfsi");
4838 fixsfdi_libfunc
= init_one_libfunc ("__fixsfdi");
4839 fixsfti_libfunc
= init_one_libfunc ("__fixsfti");
4841 fixdfsi_libfunc
= init_one_libfunc ("__fixdfsi");
4842 fixdfdi_libfunc
= init_one_libfunc ("__fixdfdi");
4843 fixdfti_libfunc
= init_one_libfunc ("__fixdfti");
4845 fixxfsi_libfunc
= init_one_libfunc ("__fixxfsi");
4846 fixxfdi_libfunc
= init_one_libfunc ("__fixxfdi");
4847 fixxfti_libfunc
= init_one_libfunc ("__fixxfti");
4849 fixtfsi_libfunc
= init_one_libfunc ("__fixtfsi");
4850 fixtfdi_libfunc
= init_one_libfunc ("__fixtfdi");
4851 fixtfti_libfunc
= init_one_libfunc ("__fixtfti");
4853 fixunssfsi_libfunc
= init_one_libfunc ("__fixunssfsi");
4854 fixunssfdi_libfunc
= init_one_libfunc ("__fixunssfdi");
4855 fixunssfti_libfunc
= init_one_libfunc ("__fixunssfti");
4857 fixunsdfsi_libfunc
= init_one_libfunc ("__fixunsdfsi");
4858 fixunsdfdi_libfunc
= init_one_libfunc ("__fixunsdfdi");
4859 fixunsdfti_libfunc
= init_one_libfunc ("__fixunsdfti");
4861 fixunsxfsi_libfunc
= init_one_libfunc ("__fixunsxfsi");
4862 fixunsxfdi_libfunc
= init_one_libfunc ("__fixunsxfdi");
4863 fixunsxfti_libfunc
= init_one_libfunc ("__fixunsxfti");
4865 fixunstfsi_libfunc
= init_one_libfunc ("__fixunstfsi");
4866 fixunstfdi_libfunc
= init_one_libfunc ("__fixunstfdi");
4867 fixunstfti_libfunc
= init_one_libfunc ("__fixunstfti");
4869 /* For check-memory-usage. */
4870 chkr_check_addr_libfunc
= init_one_libfunc ("chkr_check_addr");
4871 chkr_set_right_libfunc
= init_one_libfunc ("chkr_set_right");
4872 chkr_copy_bitmap_libfunc
= init_one_libfunc ("chkr_copy_bitmap");
4873 chkr_check_exec_libfunc
= init_one_libfunc ("chkr_check_exec");
4874 chkr_check_str_libfunc
= init_one_libfunc ("chkr_check_str");
4876 /* For function entry/exit instrumentation. */
4877 profile_function_entry_libfunc
4878 = init_one_libfunc ("__cyg_profile_func_enter");
4879 profile_function_exit_libfunc
4880 = init_one_libfunc ("__cyg_profile_func_exit");
4882 #ifdef HAVE_conditional_trap
4886 #ifdef INIT_TARGET_OPTABS
4887 /* Allow the target to add more libcalls or rename some, etc. */
4891 /* Add these GC roots. */
4892 ggc_add_root (optab_table
, OTI_MAX
, sizeof(optab
), mark_optab
);
4893 ggc_add_rtx_root (libfunc_table
, LTI_MAX
);
4898 /* SCO 3.2 apparently has a broken ldexp. */
4911 #endif /* BROKEN_LDEXP */
4913 #ifdef HAVE_conditional_trap
4914 /* The insn generating function can not take an rtx_code argument.
4915 TRAP_RTX is used as an rtx argument. Its code is replaced with
4916 the code to be used in the trap insn and all other fields are
4918 static rtx trap_rtx
;
4923 if (HAVE_conditional_trap
)
4925 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
4926 ggc_add_rtx_root (&trap_rtx
, 1);
4931 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
4932 CODE. Return 0 on failure. */
4935 gen_cond_trap (code
, op1
, op2
, tcode
)
4936 enum rtx_code code ATTRIBUTE_UNUSED
;
4937 rtx op1
, op2 ATTRIBUTE_UNUSED
, tcode ATTRIBUTE_UNUSED
;
4939 enum machine_mode mode
= GET_MODE (op1
);
4941 if (mode
== VOIDmode
)
4944 #ifdef HAVE_conditional_trap
4945 if (HAVE_conditional_trap
4946 && cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
4950 emit_insn (GEN_FCN (cmp_optab
->handlers
[(int) mode
].insn_code
) (op1
, op2
));
4951 PUT_CODE (trap_rtx
, code
);
4952 insn
= gen_conditional_trap (trap_rtx
, tcode
);
4956 insn
= gen_sequence ();