1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* stdio.h must precede rtl.h for FFS. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
34 #include "insn-config.h"
45 #include "rtlhooks-def.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `REG_QTY (N)' records what quantity register N is currently thought
86 All real quantity numbers are greater than or equal to zero.
87 If register N has not been assigned a quantity, `REG_QTY (N)' will
88 equal -N - 1, which is always negative.
90 Quantity numbers below zero do not exist and none of the `qty_table'
91 entries should be referenced with a negative index.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 `REG_TICK' and `REG_IN_TABLE', accessors for members of
176 cse_reg_info, are used to detect this case. REG_TICK (i) is
177 incremented whenever a value is stored in register i.
178 REG_IN_TABLE (i) holds -1 if no references to register i have been
179 entered in the table; otherwise, it contains the value REG_TICK (i)
180 had when the references were entered. If we want to enter a
181 reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
182 remove old references. Until we want to enter a new entry, the
183 mere fact that the two vectors don't match makes the entries be
184 ignored if anyone tries to match them.
186 Registers themselves are entered in the hash table as well as in
187 the equivalent-register chains. However, `REG_TICK' and
188 `REG_IN_TABLE' do not apply to expressions which are simple
189 register references. These expressions are removed from the table
190 immediately when they become invalid, and this can be done even if
191 we do not immediately search for all the expressions that refer to
194 A CLOBBER rtx in an instruction invalidates its operand for further
195 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
196 invalidates everything that resides in memory.
200 Constant expressions that differ only by an additive integer
201 are called related. When a constant expression is put in
202 the table, the related expression with no constant term
203 is also entered. These are made to point at each other
204 so that it is possible to find out if there exists any
205 register equivalent to an expression related to a given expression. */
207 /* Length of qty_table vector. We know in advance we will not need
208 a quantity number this big. */
212 /* Next quantity number to be allocated.
213 This is 1 + the largest number needed so far. */
217 /* Per-qty information tracking.
219 `first_reg' and `last_reg' track the head and tail of the
220 chain of registers which currently contain this quantity.
222 `mode' contains the machine mode of this quantity.
224 `const_rtx' holds the rtx of the constant value of this
225 quantity, if known. A summations of the frame/arg pointer
226 and a constant can also be entered here. When this holds
227 a known value, `const_insn' is the insn which stored the
230 `comparison_{code,const,qty}' are used to track when a
231 comparison between a quantity and some constant or register has
232 been passed. In such a case, we know the results of the comparison
233 in case we see it again. These members record a comparison that
234 is known to be true. `comparison_code' holds the rtx code of such
235 a comparison, else it is set to UNKNOWN and the other two
236 comparison members are undefined. `comparison_const' holds
237 the constant being compared against, or zero if the comparison
238 is not against a constant. `comparison_qty' holds the quantity
239 being compared against when the result is known. If the comparison
240 is not with a register, `comparison_qty' is -1. */
242 struct qty_table_elem
246 rtx comparison_const
;
248 unsigned int first_reg
, last_reg
;
249 /* The sizes of these fields should match the sizes of the
250 code and mode fields of struct rtx_def (see rtl.h). */
251 ENUM_BITFIELD(rtx_code
) comparison_code
: 16;
252 ENUM_BITFIELD(machine_mode
) mode
: 8;
255 /* The table of all qtys, indexed by qty number. */
256 static struct qty_table_elem
*qty_table
;
258 /* Structure used to pass arguments via for_each_rtx to function
259 cse_change_cc_mode. */
260 struct change_cc_mode_args
267 /* For machines that have a CC0, we do not record its value in the hash
268 table since its use is guaranteed to be the insn immediately following
269 its definition and any other insn is presumed to invalidate it.
271 Instead, we store below the value last assigned to CC0. If it should
272 happen to be a constant, it is stored in preference to the actual
273 assigned value. In case it is a constant, we store the mode in which
274 the constant should be interpreted. */
276 static rtx prev_insn_cc0
;
277 static enum machine_mode prev_insn_cc0_mode
;
279 /* Previous actual insn. 0 if at first insn of basic block. */
281 static rtx prev_insn
;
284 /* Insn being scanned. */
286 static rtx this_insn
;
288 /* Index by register number, gives the number of the next (or
289 previous) register in the chain of registers sharing the same
292 Or -1 if this register is at the end of the chain.
294 If REG_QTY (N) == -N - 1, reg_eqv_table[N].next is undefined. */
296 /* Per-register equivalence chain. */
302 /* The table of all register equivalence chains. */
303 static struct reg_eqv_elem
*reg_eqv_table
;
307 /* The timestamp at which this register is initialized. */
308 unsigned int timestamp
;
310 /* The quantity number of the register's current contents. */
313 /* The number of times the register has been altered in the current
317 /* The REG_TICK value at which rtx's containing this register are
318 valid in the hash table. If this does not equal the current
319 reg_tick value, such expressions existing in the hash table are
323 /* The SUBREG that was set when REG_TICK was last incremented. Set
324 to -1 if the last store was to the whole register, not a subreg. */
325 unsigned int subreg_ticked
;
328 /* A table of cse_reg_info indexed by register numbers. */
329 static struct cse_reg_info
*cse_reg_info_table
;
331 /* The size of the above table. */
332 static unsigned int cse_reg_info_table_size
;
334 /* The index of the first entry that has not been initialized. */
335 static unsigned int cse_reg_info_table_first_uninitialized
;
337 /* The timestamp at the beginning of the current run of
338 cse_basic_block. We increment this variable at the beginning of
339 the current run of cse_basic_block. The timestamp field of a
340 cse_reg_info entry matches the value of this variable if and only
341 if the entry has been initialized during the current run of
343 static unsigned int cse_reg_info_timestamp
;
345 /* A HARD_REG_SET containing all the hard registers for which there is
346 currently a REG expression in the hash table. Note the difference
347 from the above variables, which indicate if the REG is mentioned in some
348 expression in the table. */
350 static HARD_REG_SET hard_regs_in_table
;
352 /* CUID of insn that starts the basic block currently being cse-processed. */
354 static int cse_basic_block_start
;
356 /* CUID of insn that ends the basic block currently being cse-processed. */
358 static int cse_basic_block_end
;
360 /* Vector mapping INSN_UIDs to cuids.
361 The cuids are like uids but increase monotonically always.
362 We use them to see whether a reg is used outside a given basic block. */
364 static int *uid_cuid
;
366 /* Highest UID in UID_CUID. */
369 /* Get the cuid of an insn. */
371 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
373 /* Nonzero if this pass has made changes, and therefore it's
374 worthwhile to run the garbage collector. */
376 static int cse_altered
;
378 /* Nonzero if cse has altered conditional jump insns
379 in such a way that jump optimization should be redone. */
381 static int cse_jumps_altered
;
383 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
384 REG_LABEL, we have to rerun jump after CSE to put in the note. */
385 static int recorded_label_ref
;
387 /* canon_hash stores 1 in do_not_record
388 if it notices a reference to CC0, PC, or some other volatile
391 static int do_not_record
;
393 /* canon_hash stores 1 in hash_arg_in_memory
394 if it notices a reference to memory within the expression being hashed. */
396 static int hash_arg_in_memory
;
398 /* The hash table contains buckets which are chains of `struct table_elt's,
399 each recording one expression's information.
400 That expression is in the `exp' field.
402 The canon_exp field contains a canonical (from the point of view of
403 alias analysis) version of the `exp' field.
405 Those elements with the same hash code are chained in both directions
406 through the `next_same_hash' and `prev_same_hash' fields.
408 Each set of expressions with equivalent values
409 are on a two-way chain through the `next_same_value'
410 and `prev_same_value' fields, and all point with
411 the `first_same_value' field at the first element in
412 that chain. The chain is in order of increasing cost.
413 Each element's cost value is in its `cost' field.
415 The `in_memory' field is nonzero for elements that
416 involve any reference to memory. These elements are removed
417 whenever a write is done to an unidentified location in memory.
418 To be safe, we assume that a memory address is unidentified unless
419 the address is either a symbol constant or a constant plus
420 the frame pointer or argument pointer.
422 The `related_value' field is used to connect related expressions
423 (that differ by adding an integer).
424 The related expressions are chained in a circular fashion.
425 `related_value' is zero for expressions for which this
428 The `cost' field stores the cost of this element's expression.
429 The `regcost' field stores the value returned by approx_reg_cost for
430 this element's expression.
432 The `is_const' flag is set if the element is a constant (including
435 The `flag' field is used as a temporary during some search routines.
437 The `mode' field is usually the same as GET_MODE (`exp'), but
438 if `exp' is a CONST_INT and has no machine mode then the `mode'
439 field is the mode it was being used as. Each constant is
440 recorded separately for each mode it is used with. */
446 struct table_elt
*next_same_hash
;
447 struct table_elt
*prev_same_hash
;
448 struct table_elt
*next_same_value
;
449 struct table_elt
*prev_same_value
;
450 struct table_elt
*first_same_value
;
451 struct table_elt
*related_value
;
454 /* The size of this field should match the size
455 of the mode field of struct rtx_def (see rtl.h). */
456 ENUM_BITFIELD(machine_mode
) mode
: 8;
462 /* We don't want a lot of buckets, because we rarely have very many
463 things stored in the hash table, and a lot of buckets slows
464 down a lot of loops that happen frequently. */
466 #define HASH_SIZE (1 << HASH_SHIFT)
467 #define HASH_MASK (HASH_SIZE - 1)
469 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
470 register (hard registers may require `do_not_record' to be set). */
473 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
474 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
475 : canon_hash (X, M)) & HASH_MASK)
477 /* Like HASH, but without side-effects. */
478 #define SAFE_HASH(X, M) \
479 ((REG_P (X) && REGNO (X) >= FIRST_PSEUDO_REGISTER \
480 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
481 : safe_hash (X, M)) & HASH_MASK)
483 /* Determine whether register number N is considered a fixed register for the
484 purpose of approximating register costs.
485 It is desirable to replace other regs with fixed regs, to reduce need for
487 A reg wins if it is either the frame pointer or designated as fixed. */
488 #define FIXED_REGNO_P(N) \
489 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
490 || fixed_regs[N] || global_regs[N])
492 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
493 hard registers and pointers into the frame are the cheapest with a cost
494 of 0. Next come pseudos with a cost of one and other hard registers with
495 a cost of 2. Aside from these special cases, call `rtx_cost'. */
497 #define CHEAP_REGNO(N) \
498 (REGNO_PTR_FRAME_P(N) \
499 || (HARD_REGISTER_NUM_P (N) \
500 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
502 #define COST(X) (REG_P (X) ? 0 : notreg_cost (X, SET))
503 #define COST_IN(X,OUTER) (REG_P (X) ? 0 : notreg_cost (X, OUTER))
505 /* Get the number of times this register has been updated in this
508 #define REG_TICK(N) (get_cse_reg_info (N)->reg_tick)
510 /* Get the point at which REG was recorded in the table. */
512 #define REG_IN_TABLE(N) (get_cse_reg_info (N)->reg_in_table)
514 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
517 #define SUBREG_TICKED(N) (get_cse_reg_info (N)->subreg_ticked)
519 /* Get the quantity number for REG. */
521 #define REG_QTY(N) (get_cse_reg_info (N)->reg_qty)
523 /* Determine if the quantity number for register X represents a valid index
524 into the qty_table. */
526 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
528 static struct table_elt
*table
[HASH_SIZE
];
530 /* Chain of `struct table_elt's made so far for this function
531 but currently removed from the table. */
533 static struct table_elt
*free_element_chain
;
535 /* Set to the cost of a constant pool reference if one was found for a
536 symbolic constant. If this was found, it means we should try to
537 convert constants into constant pool entries if they don't fit in
540 static int constant_pool_entries_cost
;
541 static int constant_pool_entries_regcost
;
543 /* This data describes a block that will be processed by cse_basic_block. */
545 struct cse_basic_block_data
547 /* Lowest CUID value of insns in block. */
549 /* Highest CUID value of insns in block. */
551 /* Total number of SETs in block. */
553 /* Last insn in the block. */
555 /* Size of current branch path, if any. */
557 /* Current branch path, indicating which branches will be taken. */
560 /* The branch insn. */
562 /* Whether it should be taken or not. AROUND is the same as taken
563 except that it is used when the destination label is not preceded
565 enum taken
{PATH_TAKEN
, PATH_NOT_TAKEN
, PATH_AROUND
} status
;
569 static bool fixed_base_plus_p (rtx x
);
570 static int notreg_cost (rtx
, enum rtx_code
);
571 static int approx_reg_cost_1 (rtx
*, void *);
572 static int approx_reg_cost (rtx
);
573 static int preferable (int, int, int, int);
574 static void new_basic_block (void);
575 static void make_new_qty (unsigned int, enum machine_mode
);
576 static void make_regs_eqv (unsigned int, unsigned int);
577 static void delete_reg_equiv (unsigned int);
578 static int mention_regs (rtx
);
579 static int insert_regs (rtx
, struct table_elt
*, int);
580 static void remove_from_table (struct table_elt
*, unsigned);
581 static struct table_elt
*lookup (rtx
, unsigned, enum machine_mode
);
582 static struct table_elt
*lookup_for_remove (rtx
, unsigned, enum machine_mode
);
583 static rtx
lookup_as_function (rtx
, enum rtx_code
);
584 static struct table_elt
*insert (rtx
, struct table_elt
*, unsigned,
586 static void merge_equiv_classes (struct table_elt
*, struct table_elt
*);
587 static void invalidate (rtx
, enum machine_mode
);
588 static int cse_rtx_varies_p (rtx
, int);
589 static void remove_invalid_refs (unsigned int);
590 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
592 static void rehash_using_reg (rtx
);
593 static void invalidate_memory (void);
594 static void invalidate_for_call (void);
595 static rtx
use_related_value (rtx
, struct table_elt
*);
597 static inline unsigned canon_hash (rtx
, enum machine_mode
);
598 static inline unsigned safe_hash (rtx
, enum machine_mode
);
599 static unsigned hash_rtx_string (const char *);
601 static rtx
canon_reg (rtx
, rtx
);
602 static void find_best_addr (rtx
, rtx
*, enum machine_mode
);
603 static enum rtx_code
find_comparison_args (enum rtx_code
, rtx
*, rtx
*,
605 enum machine_mode
*);
606 static rtx
fold_rtx (rtx
, rtx
);
607 static rtx
equiv_constant (rtx
);
608 static void record_jump_equiv (rtx
, int);
609 static void record_jump_cond (enum rtx_code
, enum machine_mode
, rtx
, rtx
,
611 static void cse_insn (rtx
, rtx
);
612 static void cse_end_of_basic_block (rtx
, struct cse_basic_block_data
*,
614 static int addr_affects_sp_p (rtx
);
615 static void invalidate_from_clobbers (rtx
);
616 static rtx
cse_process_notes (rtx
, rtx
);
617 static void invalidate_skipped_set (rtx
, rtx
, void *);
618 static void invalidate_skipped_block (rtx
);
619 static rtx
cse_basic_block (rtx
, rtx
, struct branch_path
*);
620 static void count_reg_usage (rtx
, int *, int);
621 static int check_for_label_ref (rtx
*, void *);
622 extern void dump_class (struct table_elt
*);
623 static void get_cse_reg_info_1 (unsigned int regno
);
624 static struct cse_reg_info
* get_cse_reg_info (unsigned int regno
);
625 static int check_dependence (rtx
*, void *);
627 static void flush_hash_table (void);
628 static bool insn_live_p (rtx
, int *);
629 static bool set_live_p (rtx
, rtx
, int *);
630 static bool dead_libcall_p (rtx
, int *);
631 static int cse_change_cc_mode (rtx
*, void *);
632 static void cse_change_cc_mode_insn (rtx
, rtx
);
633 static void cse_change_cc_mode_insns (rtx
, rtx
, rtx
);
634 static enum machine_mode
cse_cc_succs (basic_block
, rtx
, rtx
, bool);
637 #undef RTL_HOOKS_GEN_LOWPART
638 #define RTL_HOOKS_GEN_LOWPART gen_lowpart_if_possible
640 static const struct rtl_hooks cse_rtl_hooks
= RTL_HOOKS_INITIALIZER
;
642 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
643 virtual regs here because the simplify_*_operation routines are called
644 by integrate.c, which is called before virtual register instantiation. */
647 fixed_base_plus_p (rtx x
)
649 switch (GET_CODE (x
))
652 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
)
654 if (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
])
656 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
657 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
662 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
664 return fixed_base_plus_p (XEXP (x
, 0));
671 /* Dump the expressions in the equivalence class indicated by CLASSP.
672 This function is used only for debugging. */
674 dump_class (struct table_elt
*classp
)
676 struct table_elt
*elt
;
678 fprintf (stderr
, "Equivalence chain for ");
679 print_rtl (stderr
, classp
->exp
);
680 fprintf (stderr
, ": \n");
682 for (elt
= classp
->first_same_value
; elt
; elt
= elt
->next_same_value
)
684 print_rtl (stderr
, elt
->exp
);
685 fprintf (stderr
, "\n");
689 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
692 approx_reg_cost_1 (rtx
*xp
, void *data
)
699 unsigned int regno
= REGNO (x
);
701 if (! CHEAP_REGNO (regno
))
703 if (regno
< FIRST_PSEUDO_REGISTER
)
705 if (SMALL_REGISTER_CLASSES
)
717 /* Return an estimate of the cost of the registers used in an rtx.
718 This is mostly the number of different REG expressions in the rtx;
719 however for some exceptions like fixed registers we use a cost of
720 0. If any other hard register reference occurs, return MAX_COST. */
723 approx_reg_cost (rtx x
)
727 if (for_each_rtx (&x
, approx_reg_cost_1
, (void *) &cost
))
733 /* Returns a canonical version of X for the address, from the point of view,
734 that all multiplications are represented as MULT instead of the multiply
735 by a power of 2 being represented as ASHIFT. */
738 canon_for_address (rtx x
)
741 enum machine_mode mode
;
755 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
756 && INTVAL (XEXP (x
, 1)) < GET_MODE_BITSIZE (mode
)
757 && INTVAL (XEXP (x
, 1)) >= 0)
759 new = canon_for_address (XEXP (x
, 0));
760 new = gen_rtx_MULT (mode
, new,
761 gen_int_mode ((HOST_WIDE_INT
) 1
762 << INTVAL (XEXP (x
, 1)),
773 /* Now recursively process each operand of this operation. */
774 fmt
= GET_RTX_FORMAT (code
);
775 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
778 new = canon_for_address (XEXP (x
, i
));
784 /* Return a negative value if an rtx A, whose costs are given by COST_A
785 and REGCOST_A, is more desirable than an rtx B.
786 Return a positive value if A is less desirable, or 0 if the two are
789 preferable (int cost_a
, int regcost_a
, int cost_b
, int regcost_b
)
791 /* First, get rid of cases involving expressions that are entirely
793 if (cost_a
!= cost_b
)
795 if (cost_a
== MAX_COST
)
797 if (cost_b
== MAX_COST
)
801 /* Avoid extending lifetimes of hardregs. */
802 if (regcost_a
!= regcost_b
)
804 if (regcost_a
== MAX_COST
)
806 if (regcost_b
== MAX_COST
)
810 /* Normal operation costs take precedence. */
811 if (cost_a
!= cost_b
)
812 return cost_a
- cost_b
;
813 /* Only if these are identical consider effects on register pressure. */
814 if (regcost_a
!= regcost_b
)
815 return regcost_a
- regcost_b
;
819 /* Internal function, to compute cost when X is not a register; called
820 from COST macro to keep it simple. */
823 notreg_cost (rtx x
, enum rtx_code outer
)
825 return ((GET_CODE (x
) == SUBREG
826 && REG_P (SUBREG_REG (x
))
827 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
828 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x
))) == MODE_INT
829 && (GET_MODE_SIZE (GET_MODE (x
))
830 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
831 && subreg_lowpart_p (x
)
832 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x
)),
833 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))))
835 : rtx_cost (x
, outer
) * 2);
839 /* Initialize CSE_REG_INFO_TABLE. */
842 init_cse_reg_info (unsigned int nregs
)
844 /* Do we need to grow the table? */
845 if (nregs
> cse_reg_info_table_size
)
847 unsigned int new_size
;
849 if (cse_reg_info_table_size
< 2048)
851 /* Compute a new size that is a power of 2 and no smaller
852 than the large of NREGS and 64. */
853 new_size
= (cse_reg_info_table_size
854 ? cse_reg_info_table_size
: 64);
856 while (new_size
< nregs
)
861 /* If we need a big table, allocate just enough to hold
866 /* Reallocate the table with NEW_SIZE entries. */
867 if (cse_reg_info_table
)
868 free (cse_reg_info_table
);
869 cse_reg_info_table
= xmalloc (sizeof (struct cse_reg_info
)
871 cse_reg_info_table_size
= new_size
;
872 cse_reg_info_table_first_uninitialized
= 0;
875 /* Do we have all of the first NREGS entries initialized? */
876 if (cse_reg_info_table_first_uninitialized
< nregs
)
878 unsigned int old_timestamp
= cse_reg_info_timestamp
- 1;
881 /* Put the old timestamp on newly allocated entries so that they
882 will all be considered out of date. We do not touch those
883 entries beyond the first NREGS entries to be nice to the
885 for (i
= cse_reg_info_table_first_uninitialized
; i
< nregs
; i
++)
886 cse_reg_info_table
[i
].timestamp
= old_timestamp
;
888 cse_reg_info_table_first_uninitialized
= nregs
;
892 /* Given REGNO, initialize the cse_reg_info entry for REGNO. */
895 get_cse_reg_info_1 (unsigned int regno
)
897 /* Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
898 entry will be considered to have been initialized. */
899 cse_reg_info_table
[regno
].timestamp
= cse_reg_info_timestamp
;
901 /* Initialize the rest of the entry. */
902 cse_reg_info_table
[regno
].reg_tick
= 1;
903 cse_reg_info_table
[regno
].reg_in_table
= -1;
904 cse_reg_info_table
[regno
].subreg_ticked
= -1;
905 cse_reg_info_table
[regno
].reg_qty
= -regno
- 1;
908 /* Find a cse_reg_info entry for REGNO. */
910 static inline struct cse_reg_info
*
911 get_cse_reg_info (unsigned int regno
)
913 struct cse_reg_info
*p
= &cse_reg_info_table
[regno
];
915 /* If this entry has not been initialized, go ahead and initialize
917 if (p
->timestamp
!= cse_reg_info_timestamp
)
918 get_cse_reg_info_1 (regno
);
923 /* Clear the hash table and initialize each register with its own quantity,
924 for a new basic block. */
927 new_basic_block (void)
933 /* Invalidate cse_reg_info_table. */
934 cse_reg_info_timestamp
++;
936 /* Clear out hash table state for this pass. */
937 CLEAR_HARD_REG_SET (hard_regs_in_table
);
939 /* The per-quantity values used to be initialized here, but it is
940 much faster to initialize each as it is made in `make_new_qty'. */
942 for (i
= 0; i
< HASH_SIZE
; i
++)
944 struct table_elt
*first
;
949 struct table_elt
*last
= first
;
953 while (last
->next_same_hash
!= NULL
)
954 last
= last
->next_same_hash
;
956 /* Now relink this hash entire chain into
957 the free element list. */
959 last
->next_same_hash
= free_element_chain
;
960 free_element_chain
= first
;
970 /* Say that register REG contains a quantity in mode MODE not in any
971 register before and initialize that quantity. */
974 make_new_qty (unsigned int reg
, enum machine_mode mode
)
977 struct qty_table_elem
*ent
;
978 struct reg_eqv_elem
*eqv
;
980 gcc_assert (next_qty
< max_qty
);
982 q
= REG_QTY (reg
) = next_qty
++;
984 ent
->first_reg
= reg
;
987 ent
->const_rtx
= ent
->const_insn
= NULL_RTX
;
988 ent
->comparison_code
= UNKNOWN
;
990 eqv
= ®_eqv_table
[reg
];
991 eqv
->next
= eqv
->prev
= -1;
994 /* Make reg NEW equivalent to reg OLD.
995 OLD is not changing; NEW is. */
998 make_regs_eqv (unsigned int new, unsigned int old
)
1000 unsigned int lastr
, firstr
;
1001 int q
= REG_QTY (old
);
1002 struct qty_table_elem
*ent
;
1004 ent
= &qty_table
[q
];
1006 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1007 gcc_assert (REGNO_QTY_VALID_P (old
));
1010 firstr
= ent
->first_reg
;
1011 lastr
= ent
->last_reg
;
1013 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1014 hard regs. Among pseudos, if NEW will live longer than any other reg
1015 of the same qty, and that is beyond the current basic block,
1016 make it the new canonical replacement for this qty. */
1017 if (! (firstr
< FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (firstr
))
1018 /* Certain fixed registers might be of the class NO_REGS. This means
1019 that not only can they not be allocated by the compiler, but
1020 they cannot be used in substitutions or canonicalizations
1022 && (new >= FIRST_PSEUDO_REGISTER
|| REGNO_REG_CLASS (new) != NO_REGS
)
1023 && ((new < FIRST_PSEUDO_REGISTER
&& FIXED_REGNO_P (new))
1024 || (new >= FIRST_PSEUDO_REGISTER
1025 && (firstr
< FIRST_PSEUDO_REGISTER
1026 || ((uid_cuid
[REGNO_LAST_UID (new)] > cse_basic_block_end
1027 || (uid_cuid
[REGNO_FIRST_UID (new)]
1028 < cse_basic_block_start
))
1029 && (uid_cuid
[REGNO_LAST_UID (new)]
1030 > uid_cuid
[REGNO_LAST_UID (firstr
)]))))))
1032 reg_eqv_table
[firstr
].prev
= new;
1033 reg_eqv_table
[new].next
= firstr
;
1034 reg_eqv_table
[new].prev
= -1;
1035 ent
->first_reg
= new;
1039 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1040 Otherwise, insert before any non-fixed hard regs that are at the
1041 end. Registers of class NO_REGS cannot be used as an
1042 equivalent for anything. */
1043 while (lastr
< FIRST_PSEUDO_REGISTER
&& reg_eqv_table
[lastr
].prev
>= 0
1044 && (REGNO_REG_CLASS (lastr
) == NO_REGS
|| ! FIXED_REGNO_P (lastr
))
1045 && new >= FIRST_PSEUDO_REGISTER
)
1046 lastr
= reg_eqv_table
[lastr
].prev
;
1047 reg_eqv_table
[new].next
= reg_eqv_table
[lastr
].next
;
1048 if (reg_eqv_table
[lastr
].next
>= 0)
1049 reg_eqv_table
[reg_eqv_table
[lastr
].next
].prev
= new;
1051 qty_table
[q
].last_reg
= new;
1052 reg_eqv_table
[lastr
].next
= new;
1053 reg_eqv_table
[new].prev
= lastr
;
1057 /* Remove REG from its equivalence class. */
1060 delete_reg_equiv (unsigned int reg
)
1062 struct qty_table_elem
*ent
;
1063 int q
= REG_QTY (reg
);
1066 /* If invalid, do nothing. */
1067 if (! REGNO_QTY_VALID_P (reg
))
1070 ent
= &qty_table
[q
];
1072 p
= reg_eqv_table
[reg
].prev
;
1073 n
= reg_eqv_table
[reg
].next
;
1076 reg_eqv_table
[n
].prev
= p
;
1080 reg_eqv_table
[p
].next
= n
;
1084 REG_QTY (reg
) = -reg
- 1;
1087 /* Remove any invalid expressions from the hash table
1088 that refer to any of the registers contained in expression X.
1090 Make sure that newly inserted references to those registers
1091 as subexpressions will be considered valid.
1093 mention_regs is not called when a register itself
1094 is being stored in the table.
1096 Return 1 if we have done something that may have changed the hash code
1100 mention_regs (rtx x
)
1110 code
= GET_CODE (x
);
1113 unsigned int regno
= REGNO (x
);
1114 unsigned int endregno
1115 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
1116 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
1119 for (i
= regno
; i
< endregno
; i
++)
1121 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1122 remove_invalid_refs (i
);
1124 REG_IN_TABLE (i
) = REG_TICK (i
);
1125 SUBREG_TICKED (i
) = -1;
1131 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1132 pseudo if they don't use overlapping words. We handle only pseudos
1133 here for simplicity. */
1134 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
1135 && REGNO (SUBREG_REG (x
)) >= FIRST_PSEUDO_REGISTER
)
1137 unsigned int i
= REGNO (SUBREG_REG (x
));
1139 if (REG_IN_TABLE (i
) >= 0 && REG_IN_TABLE (i
) != REG_TICK (i
))
1141 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1142 the last store to this register really stored into this
1143 subreg, then remove the memory of this subreg.
1144 Otherwise, remove any memory of the entire register and
1145 all its subregs from the table. */
1146 if (REG_TICK (i
) - REG_IN_TABLE (i
) > 1
1147 || SUBREG_TICKED (i
) != REGNO (SUBREG_REG (x
)))
1148 remove_invalid_refs (i
);
1150 remove_invalid_subreg_refs (i
, SUBREG_BYTE (x
), GET_MODE (x
));
1153 REG_IN_TABLE (i
) = REG_TICK (i
);
1154 SUBREG_TICKED (i
) = REGNO (SUBREG_REG (x
));
1158 /* If X is a comparison or a COMPARE and either operand is a register
1159 that does not have a quantity, give it one. This is so that a later
1160 call to record_jump_equiv won't cause X to be assigned a different
1161 hash code and not found in the table after that call.
1163 It is not necessary to do this here, since rehash_using_reg can
1164 fix up the table later, but doing this here eliminates the need to
1165 call that expensive function in the most common case where the only
1166 use of the register is in the comparison. */
1168 if (code
== COMPARE
|| COMPARISON_P (x
))
1170 if (REG_P (XEXP (x
, 0))
1171 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
1172 if (insert_regs (XEXP (x
, 0), NULL
, 0))
1174 rehash_using_reg (XEXP (x
, 0));
1178 if (REG_P (XEXP (x
, 1))
1179 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
1180 if (insert_regs (XEXP (x
, 1), NULL
, 0))
1182 rehash_using_reg (XEXP (x
, 1));
1187 fmt
= GET_RTX_FORMAT (code
);
1188 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1190 changed
|= mention_regs (XEXP (x
, i
));
1191 else if (fmt
[i
] == 'E')
1192 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1193 changed
|= mention_regs (XVECEXP (x
, i
, j
));
1198 /* Update the register quantities for inserting X into the hash table
1199 with a value equivalent to CLASSP.
1200 (If the class does not contain a REG, it is irrelevant.)
1201 If MODIFIED is nonzero, X is a destination; it is being modified.
1202 Note that delete_reg_equiv should be called on a register
1203 before insert_regs is done on that register with MODIFIED != 0.
1205 Nonzero value means that elements of reg_qty have changed
1206 so X's hash code may be different. */
1209 insert_regs (rtx x
, struct table_elt
*classp
, int modified
)
1213 unsigned int regno
= REGNO (x
);
1216 /* If REGNO is in the equivalence table already but is of the
1217 wrong mode for that equivalence, don't do anything here. */
1219 qty_valid
= REGNO_QTY_VALID_P (regno
);
1222 struct qty_table_elem
*ent
= &qty_table
[REG_QTY (regno
)];
1224 if (ent
->mode
!= GET_MODE (x
))
1228 if (modified
|| ! qty_valid
)
1231 for (classp
= classp
->first_same_value
;
1233 classp
= classp
->next_same_value
)
1234 if (REG_P (classp
->exp
)
1235 && GET_MODE (classp
->exp
) == GET_MODE (x
))
1237 make_regs_eqv (regno
, REGNO (classp
->exp
));
1241 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1242 than REG_IN_TABLE to find out if there was only a single preceding
1243 invalidation - for the SUBREG - or another one, which would be
1244 for the full register. However, if we find here that REG_TICK
1245 indicates that the register is invalid, it means that it has
1246 been invalidated in a separate operation. The SUBREG might be used
1247 now (then this is a recursive call), or we might use the full REG
1248 now and a SUBREG of it later. So bump up REG_TICK so that
1249 mention_regs will do the right thing. */
1251 && REG_IN_TABLE (regno
) >= 0
1252 && REG_TICK (regno
) == REG_IN_TABLE (regno
) + 1)
1254 make_new_qty (regno
, GET_MODE (x
));
1261 /* If X is a SUBREG, we will likely be inserting the inner register in the
1262 table. If that register doesn't have an assigned quantity number at
1263 this point but does later, the insertion that we will be doing now will
1264 not be accessible because its hash code will have changed. So assign
1265 a quantity number now. */
1267 else if (GET_CODE (x
) == SUBREG
&& REG_P (SUBREG_REG (x
))
1268 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x
))))
1270 insert_regs (SUBREG_REG (x
), NULL
, 0);
1275 return mention_regs (x
);
1278 /* Look in or update the hash table. */
1280 /* Remove table element ELT from use in the table.
1281 HASH is its hash code, made using the HASH macro.
1282 It's an argument because often that is known in advance
1283 and we save much time not recomputing it. */
1286 remove_from_table (struct table_elt
*elt
, unsigned int hash
)
1291 /* Mark this element as removed. See cse_insn. */
1292 elt
->first_same_value
= 0;
1294 /* Remove the table element from its equivalence class. */
1297 struct table_elt
*prev
= elt
->prev_same_value
;
1298 struct table_elt
*next
= elt
->next_same_value
;
1301 next
->prev_same_value
= prev
;
1304 prev
->next_same_value
= next
;
1307 struct table_elt
*newfirst
= next
;
1310 next
->first_same_value
= newfirst
;
1311 next
= next
->next_same_value
;
1316 /* Remove the table element from its hash bucket. */
1319 struct table_elt
*prev
= elt
->prev_same_hash
;
1320 struct table_elt
*next
= elt
->next_same_hash
;
1323 next
->prev_same_hash
= prev
;
1326 prev
->next_same_hash
= next
;
1327 else if (table
[hash
] == elt
)
1331 /* This entry is not in the proper hash bucket. This can happen
1332 when two classes were merged by `merge_equiv_classes'. Search
1333 for the hash bucket that it heads. This happens only very
1334 rarely, so the cost is acceptable. */
1335 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1336 if (table
[hash
] == elt
)
1341 /* Remove the table element from its related-value circular chain. */
1343 if (elt
->related_value
!= 0 && elt
->related_value
!= elt
)
1345 struct table_elt
*p
= elt
->related_value
;
1347 while (p
->related_value
!= elt
)
1348 p
= p
->related_value
;
1349 p
->related_value
= elt
->related_value
;
1350 if (p
->related_value
== p
)
1351 p
->related_value
= 0;
1354 /* Now add it to the free element chain. */
1355 elt
->next_same_hash
= free_element_chain
;
1356 free_element_chain
= elt
;
1359 /* Look up X in the hash table and return its table element,
1360 or 0 if X is not in the table.
1362 MODE is the machine-mode of X, or if X is an integer constant
1363 with VOIDmode then MODE is the mode with which X will be used.
1365 Here we are satisfied to find an expression whose tree structure
1368 static struct table_elt
*
1369 lookup (rtx x
, unsigned int hash
, enum machine_mode mode
)
1371 struct table_elt
*p
;
1373 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1374 if (mode
== p
->mode
&& ((x
== p
->exp
&& REG_P (x
))
1375 || exp_equiv_p (x
, p
->exp
, !REG_P (x
), false)))
1381 /* Like `lookup' but don't care whether the table element uses invalid regs.
1382 Also ignore discrepancies in the machine mode of a register. */
1384 static struct table_elt
*
1385 lookup_for_remove (rtx x
, unsigned int hash
, enum machine_mode mode
)
1387 struct table_elt
*p
;
1391 unsigned int regno
= REGNO (x
);
1393 /* Don't check the machine mode when comparing registers;
1394 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1395 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1397 && REGNO (p
->exp
) == regno
)
1402 for (p
= table
[hash
]; p
; p
= p
->next_same_hash
)
1404 && (x
== p
->exp
|| exp_equiv_p (x
, p
->exp
, 0, false)))
1411 /* Look for an expression equivalent to X and with code CODE.
1412 If one is found, return that expression. */
1415 lookup_as_function (rtx x
, enum rtx_code code
)
1418 = lookup (x
, SAFE_HASH (x
, VOIDmode
), GET_MODE (x
));
1420 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1421 long as we are narrowing. So if we looked in vain for a mode narrower
1422 than word_mode before, look for word_mode now. */
1423 if (p
== 0 && code
== CONST_INT
1424 && GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (word_mode
))
1427 PUT_MODE (x
, word_mode
);
1428 p
= lookup (x
, SAFE_HASH (x
, VOIDmode
), word_mode
);
1434 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
1435 if (GET_CODE (p
->exp
) == code
1436 /* Make sure this is a valid entry in the table. */
1437 && exp_equiv_p (p
->exp
, p
->exp
, 1, false))
1443 /* Insert X in the hash table, assuming HASH is its hash code
1444 and CLASSP is an element of the class it should go in
1445 (or 0 if a new class should be made).
1446 It is inserted at the proper position to keep the class in
1447 the order cheapest first.
1449 MODE is the machine-mode of X, or if X is an integer constant
1450 with VOIDmode then MODE is the mode with which X will be used.
1452 For elements of equal cheapness, the most recent one
1453 goes in front, except that the first element in the list
1454 remains first unless a cheaper element is added. The order of
1455 pseudo-registers does not matter, as canon_reg will be called to
1456 find the cheapest when a register is retrieved from the table.
1458 The in_memory field in the hash table element is set to 0.
1459 The caller must set it nonzero if appropriate.
1461 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1462 and if insert_regs returns a nonzero value
1463 you must then recompute its hash code before calling here.
1465 If necessary, update table showing constant values of quantities. */
1467 #define CHEAPER(X, Y) \
1468 (preferable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1470 static struct table_elt
*
1471 insert (rtx x
, struct table_elt
*classp
, unsigned int hash
, enum machine_mode mode
)
1473 struct table_elt
*elt
;
1475 /* If X is a register and we haven't made a quantity for it,
1476 something is wrong. */
1477 gcc_assert (!REG_P (x
) || REGNO_QTY_VALID_P (REGNO (x
)));
1479 /* If X is a hard register, show it is being put in the table. */
1480 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1482 unsigned int regno
= REGNO (x
);
1483 unsigned int endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1486 for (i
= regno
; i
< endregno
; i
++)
1487 SET_HARD_REG_BIT (hard_regs_in_table
, i
);
1490 /* Put an element for X into the right hash bucket. */
1492 elt
= free_element_chain
;
1494 free_element_chain
= elt
->next_same_hash
;
1496 elt
= xmalloc (sizeof (struct table_elt
));
1499 elt
->canon_exp
= NULL_RTX
;
1500 elt
->cost
= COST (x
);
1501 elt
->regcost
= approx_reg_cost (x
);
1502 elt
->next_same_value
= 0;
1503 elt
->prev_same_value
= 0;
1504 elt
->next_same_hash
= table
[hash
];
1505 elt
->prev_same_hash
= 0;
1506 elt
->related_value
= 0;
1509 elt
->is_const
= (CONSTANT_P (x
) || fixed_base_plus_p (x
));
1512 table
[hash
]->prev_same_hash
= elt
;
1515 /* Put it into the proper value-class. */
1518 classp
= classp
->first_same_value
;
1519 if (CHEAPER (elt
, classp
))
1520 /* Insert at the head of the class. */
1522 struct table_elt
*p
;
1523 elt
->next_same_value
= classp
;
1524 classp
->prev_same_value
= elt
;
1525 elt
->first_same_value
= elt
;
1527 for (p
= classp
; p
; p
= p
->next_same_value
)
1528 p
->first_same_value
= elt
;
1532 /* Insert not at head of the class. */
1533 /* Put it after the last element cheaper than X. */
1534 struct table_elt
*p
, *next
;
1536 for (p
= classp
; (next
= p
->next_same_value
) && CHEAPER (next
, elt
);
1539 /* Put it after P and before NEXT. */
1540 elt
->next_same_value
= next
;
1542 next
->prev_same_value
= elt
;
1544 elt
->prev_same_value
= p
;
1545 p
->next_same_value
= elt
;
1546 elt
->first_same_value
= classp
;
1550 elt
->first_same_value
= elt
;
1552 /* If this is a constant being set equivalent to a register or a register
1553 being set equivalent to a constant, note the constant equivalence.
1555 If this is a constant, it cannot be equivalent to a different constant,
1556 and a constant is the only thing that can be cheaper than a register. So
1557 we know the register is the head of the class (before the constant was
1560 If this is a register that is not already known equivalent to a
1561 constant, we must check the entire class.
1563 If this is a register that is already known equivalent to an insn,
1564 update the qtys `const_insn' to show that `this_insn' is the latest
1565 insn making that quantity equivalent to the constant. */
1567 if (elt
->is_const
&& classp
&& REG_P (classp
->exp
)
1570 int exp_q
= REG_QTY (REGNO (classp
->exp
));
1571 struct qty_table_elem
*exp_ent
= &qty_table
[exp_q
];
1573 exp_ent
->const_rtx
= gen_lowpart (exp_ent
->mode
, x
);
1574 exp_ent
->const_insn
= this_insn
;
1579 && ! qty_table
[REG_QTY (REGNO (x
))].const_rtx
1582 struct table_elt
*p
;
1584 for (p
= classp
; p
!= 0; p
= p
->next_same_value
)
1586 if (p
->is_const
&& !REG_P (p
->exp
))
1588 int x_q
= REG_QTY (REGNO (x
));
1589 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
1592 = gen_lowpart (GET_MODE (x
), p
->exp
);
1593 x_ent
->const_insn
= this_insn
;
1600 && qty_table
[REG_QTY (REGNO (x
))].const_rtx
1601 && GET_MODE (x
) == qty_table
[REG_QTY (REGNO (x
))].mode
)
1602 qty_table
[REG_QTY (REGNO (x
))].const_insn
= this_insn
;
1604 /* If this is a constant with symbolic value,
1605 and it has a term with an explicit integer value,
1606 link it up with related expressions. */
1607 if (GET_CODE (x
) == CONST
)
1609 rtx subexp
= get_related_value (x
);
1611 struct table_elt
*subelt
, *subelt_prev
;
1615 /* Get the integer-free subexpression in the hash table. */
1616 subhash
= SAFE_HASH (subexp
, mode
);
1617 subelt
= lookup (subexp
, subhash
, mode
);
1619 subelt
= insert (subexp
, NULL
, subhash
, mode
);
1620 /* Initialize SUBELT's circular chain if it has none. */
1621 if (subelt
->related_value
== 0)
1622 subelt
->related_value
= subelt
;
1623 /* Find the element in the circular chain that precedes SUBELT. */
1624 subelt_prev
= subelt
;
1625 while (subelt_prev
->related_value
!= subelt
)
1626 subelt_prev
= subelt_prev
->related_value
;
1627 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1628 This way the element that follows SUBELT is the oldest one. */
1629 elt
->related_value
= subelt_prev
->related_value
;
1630 subelt_prev
->related_value
= elt
;
1637 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1638 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1639 the two classes equivalent.
1641 CLASS1 will be the surviving class; CLASS2 should not be used after this
1644 Any invalid entries in CLASS2 will not be copied. */
1647 merge_equiv_classes (struct table_elt
*class1
, struct table_elt
*class2
)
1649 struct table_elt
*elt
, *next
, *new;
1651 /* Ensure we start with the head of the classes. */
1652 class1
= class1
->first_same_value
;
1653 class2
= class2
->first_same_value
;
1655 /* If they were already equal, forget it. */
1656 if (class1
== class2
)
1659 for (elt
= class2
; elt
; elt
= next
)
1663 enum machine_mode mode
= elt
->mode
;
1665 next
= elt
->next_same_value
;
1667 /* Remove old entry, make a new one in CLASS1's class.
1668 Don't do this for invalid entries as we cannot find their
1669 hash code (it also isn't necessary). */
1670 if (REG_P (exp
) || exp_equiv_p (exp
, exp
, 1, false))
1672 bool need_rehash
= false;
1674 hash_arg_in_memory
= 0;
1675 hash
= HASH (exp
, mode
);
1679 need_rehash
= REGNO_QTY_VALID_P (REGNO (exp
));
1680 delete_reg_equiv (REGNO (exp
));
1683 remove_from_table (elt
, hash
);
1685 if (insert_regs (exp
, class1
, 0) || need_rehash
)
1687 rehash_using_reg (exp
);
1688 hash
= HASH (exp
, mode
);
1690 new = insert (exp
, class1
, hash
, mode
);
1691 new->in_memory
= hash_arg_in_memory
;
1696 /* Flush the entire hash table. */
1699 flush_hash_table (void)
1702 struct table_elt
*p
;
1704 for (i
= 0; i
< HASH_SIZE
; i
++)
1705 for (p
= table
[i
]; p
; p
= table
[i
])
1707 /* Note that invalidate can remove elements
1708 after P in the current hash chain. */
1710 invalidate (p
->exp
, p
->mode
);
1712 remove_from_table (p
, i
);
1716 /* Function called for each rtx to check whether true dependence exist. */
1717 struct check_dependence_data
1719 enum machine_mode mode
;
1725 check_dependence (rtx
*x
, void *data
)
1727 struct check_dependence_data
*d
= (struct check_dependence_data
*) data
;
1728 if (*x
&& MEM_P (*x
))
1729 return canon_true_dependence (d
->exp
, d
->mode
, d
->addr
, *x
,
1735 /* Remove from the hash table, or mark as invalid, all expressions whose
1736 values could be altered by storing in X. X is a register, a subreg, or
1737 a memory reference with nonvarying address (because, when a memory
1738 reference with a varying address is stored in, all memory references are
1739 removed by invalidate_memory so specific invalidation is superfluous).
1740 FULL_MODE, if not VOIDmode, indicates that this much should be
1741 invalidated instead of just the amount indicated by the mode of X. This
1742 is only used for bitfield stores into memory.
1744 A nonvarying address may be just a register or just a symbol reference,
1745 or it may be either of those plus a numeric offset. */
1748 invalidate (rtx x
, enum machine_mode full_mode
)
1751 struct table_elt
*p
;
1754 switch (GET_CODE (x
))
1758 /* If X is a register, dependencies on its contents are recorded
1759 through the qty number mechanism. Just change the qty number of
1760 the register, mark it as invalid for expressions that refer to it,
1761 and remove it itself. */
1762 unsigned int regno
= REGNO (x
);
1763 unsigned int hash
= HASH (x
, GET_MODE (x
));
1765 /* Remove REGNO from any quantity list it might be on and indicate
1766 that its value might have changed. If it is a pseudo, remove its
1767 entry from the hash table.
1769 For a hard register, we do the first two actions above for any
1770 additional hard registers corresponding to X. Then, if any of these
1771 registers are in the table, we must remove any REG entries that
1772 overlap these registers. */
1774 delete_reg_equiv (regno
);
1776 SUBREG_TICKED (regno
) = -1;
1778 if (regno
>= FIRST_PSEUDO_REGISTER
)
1780 /* Because a register can be referenced in more than one mode,
1781 we might have to remove more than one table entry. */
1782 struct table_elt
*elt
;
1784 while ((elt
= lookup_for_remove (x
, hash
, GET_MODE (x
))))
1785 remove_from_table (elt
, hash
);
1789 HOST_WIDE_INT in_table
1790 = TEST_HARD_REG_BIT (hard_regs_in_table
, regno
);
1791 unsigned int endregno
1792 = regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)];
1793 unsigned int tregno
, tendregno
, rn
;
1794 struct table_elt
*p
, *next
;
1796 CLEAR_HARD_REG_BIT (hard_regs_in_table
, regno
);
1798 for (rn
= regno
+ 1; rn
< endregno
; rn
++)
1800 in_table
|= TEST_HARD_REG_BIT (hard_regs_in_table
, rn
);
1801 CLEAR_HARD_REG_BIT (hard_regs_in_table
, rn
);
1802 delete_reg_equiv (rn
);
1804 SUBREG_TICKED (rn
) = -1;
1808 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
1809 for (p
= table
[hash
]; p
; p
= next
)
1811 next
= p
->next_same_hash
;
1814 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
1817 tregno
= REGNO (p
->exp
);
1819 = tregno
+ hard_regno_nregs
[tregno
][GET_MODE (p
->exp
)];
1820 if (tendregno
> regno
&& tregno
< endregno
)
1821 remove_from_table (p
, hash
);
1828 invalidate (SUBREG_REG (x
), VOIDmode
);
1832 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; --i
)
1833 invalidate (XVECEXP (x
, 0, i
), VOIDmode
);
1837 /* This is part of a disjoint return value; extract the location in
1838 question ignoring the offset. */
1839 invalidate (XEXP (x
, 0), VOIDmode
);
1843 addr
= canon_rtx (get_addr (XEXP (x
, 0)));
1844 /* Calculate the canonical version of X here so that
1845 true_dependence doesn't generate new RTL for X on each call. */
1848 /* Remove all hash table elements that refer to overlapping pieces of
1850 if (full_mode
== VOIDmode
)
1851 full_mode
= GET_MODE (x
);
1853 for (i
= 0; i
< HASH_SIZE
; i
++)
1855 struct table_elt
*next
;
1857 for (p
= table
[i
]; p
; p
= next
)
1859 next
= p
->next_same_hash
;
1862 struct check_dependence_data d
;
1864 /* Just canonicalize the expression once;
1865 otherwise each time we call invalidate
1866 true_dependence will canonicalize the
1867 expression again. */
1869 p
->canon_exp
= canon_rtx (p
->exp
);
1873 if (for_each_rtx (&p
->canon_exp
, check_dependence
, &d
))
1874 remove_from_table (p
, i
);
1885 /* Remove all expressions that refer to register REGNO,
1886 since they are already invalid, and we are about to
1887 mark that register valid again and don't want the old
1888 expressions to reappear as valid. */
1891 remove_invalid_refs (unsigned int regno
)
1894 struct table_elt
*p
, *next
;
1896 for (i
= 0; i
< HASH_SIZE
; i
++)
1897 for (p
= table
[i
]; p
; p
= next
)
1899 next
= p
->next_same_hash
;
1901 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1902 remove_from_table (p
, i
);
1906 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1909 remove_invalid_subreg_refs (unsigned int regno
, unsigned int offset
,
1910 enum machine_mode mode
)
1913 struct table_elt
*p
, *next
;
1914 unsigned int end
= offset
+ (GET_MODE_SIZE (mode
) - 1);
1916 for (i
= 0; i
< HASH_SIZE
; i
++)
1917 for (p
= table
[i
]; p
; p
= next
)
1920 next
= p
->next_same_hash
;
1923 && (GET_CODE (exp
) != SUBREG
1924 || !REG_P (SUBREG_REG (exp
))
1925 || REGNO (SUBREG_REG (exp
)) != regno
1926 || (((SUBREG_BYTE (exp
)
1927 + (GET_MODE_SIZE (GET_MODE (exp
)) - 1)) >= offset
)
1928 && SUBREG_BYTE (exp
) <= end
))
1929 && refers_to_regno_p (regno
, regno
+ 1, p
->exp
, (rtx
*) 0))
1930 remove_from_table (p
, i
);
1934 /* Recompute the hash codes of any valid entries in the hash table that
1935 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1937 This is called when we make a jump equivalence. */
1940 rehash_using_reg (rtx x
)
1943 struct table_elt
*p
, *next
;
1946 if (GET_CODE (x
) == SUBREG
)
1949 /* If X is not a register or if the register is known not to be in any
1950 valid entries in the table, we have no work to do. */
1953 || REG_IN_TABLE (REGNO (x
)) < 0
1954 || REG_IN_TABLE (REGNO (x
)) != REG_TICK (REGNO (x
)))
1957 /* Scan all hash chains looking for valid entries that mention X.
1958 If we find one and it is in the wrong hash chain, move it. */
1960 for (i
= 0; i
< HASH_SIZE
; i
++)
1961 for (p
= table
[i
]; p
; p
= next
)
1963 next
= p
->next_same_hash
;
1964 if (reg_mentioned_p (x
, p
->exp
)
1965 && exp_equiv_p (p
->exp
, p
->exp
, 1, false)
1966 && i
!= (hash
= SAFE_HASH (p
->exp
, p
->mode
)))
1968 if (p
->next_same_hash
)
1969 p
->next_same_hash
->prev_same_hash
= p
->prev_same_hash
;
1971 if (p
->prev_same_hash
)
1972 p
->prev_same_hash
->next_same_hash
= p
->next_same_hash
;
1974 table
[i
] = p
->next_same_hash
;
1976 p
->next_same_hash
= table
[hash
];
1977 p
->prev_same_hash
= 0;
1979 table
[hash
]->prev_same_hash
= p
;
1985 /* Remove from the hash table any expression that is a call-clobbered
1986 register. Also update their TICK values. */
1989 invalidate_for_call (void)
1991 unsigned int regno
, endregno
;
1994 struct table_elt
*p
, *next
;
1997 /* Go through all the hard registers. For each that is clobbered in
1998 a CALL_INSN, remove the register from quantity chains and update
1999 reg_tick if defined. Also see if any of these registers is currently
2002 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
2003 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, regno
))
2005 delete_reg_equiv (regno
);
2006 if (REG_TICK (regno
) >= 0)
2009 SUBREG_TICKED (regno
) = -1;
2012 in_table
|= (TEST_HARD_REG_BIT (hard_regs_in_table
, regno
) != 0);
2015 /* In the case where we have no call-clobbered hard registers in the
2016 table, we are done. Otherwise, scan the table and remove any
2017 entry that overlaps a call-clobbered register. */
2020 for (hash
= 0; hash
< HASH_SIZE
; hash
++)
2021 for (p
= table
[hash
]; p
; p
= next
)
2023 next
= p
->next_same_hash
;
2026 || REGNO (p
->exp
) >= FIRST_PSEUDO_REGISTER
)
2029 regno
= REGNO (p
->exp
);
2030 endregno
= regno
+ hard_regno_nregs
[regno
][GET_MODE (p
->exp
)];
2032 for (i
= regno
; i
< endregno
; i
++)
2033 if (TEST_HARD_REG_BIT (regs_invalidated_by_call
, i
))
2035 remove_from_table (p
, hash
);
2041 /* Given an expression X of type CONST,
2042 and ELT which is its table entry (or 0 if it
2043 is not in the hash table),
2044 return an alternate expression for X as a register plus integer.
2045 If none can be found, return 0. */
2048 use_related_value (rtx x
, struct table_elt
*elt
)
2050 struct table_elt
*relt
= 0;
2051 struct table_elt
*p
, *q
;
2052 HOST_WIDE_INT offset
;
2054 /* First, is there anything related known?
2055 If we have a table element, we can tell from that.
2056 Otherwise, must look it up. */
2058 if (elt
!= 0 && elt
->related_value
!= 0)
2060 else if (elt
== 0 && GET_CODE (x
) == CONST
)
2062 rtx subexp
= get_related_value (x
);
2064 relt
= lookup (subexp
,
2065 SAFE_HASH (subexp
, GET_MODE (subexp
)),
2072 /* Search all related table entries for one that has an
2073 equivalent register. */
2078 /* This loop is strange in that it is executed in two different cases.
2079 The first is when X is already in the table. Then it is searching
2080 the RELATED_VALUE list of X's class (RELT). The second case is when
2081 X is not in the table. Then RELT points to a class for the related
2084 Ensure that, whatever case we are in, that we ignore classes that have
2085 the same value as X. */
2087 if (rtx_equal_p (x
, p
->exp
))
2090 for (q
= p
->first_same_value
; q
; q
= q
->next_same_value
)
2097 p
= p
->related_value
;
2099 /* We went all the way around, so there is nothing to be found.
2100 Alternatively, perhaps RELT was in the table for some other reason
2101 and it has no related values recorded. */
2102 if (p
== relt
|| p
== 0)
2109 offset
= (get_integer_term (x
) - get_integer_term (p
->exp
));
2110 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2111 return plus_constant (q
->exp
, offset
);
2114 /* Hash a string. Just add its bytes up. */
2115 static inline unsigned
2116 hash_rtx_string (const char *ps
)
2119 const unsigned char *p
= (const unsigned char *) ps
;
2128 /* Hash an rtx. We are careful to make sure the value is never negative.
2129 Equivalent registers hash identically.
2130 MODE is used in hashing for CONST_INTs only;
2131 otherwise the mode of X is used.
2133 Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.
2135 If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
2136 a MEM rtx which does not have the RTX_UNCHANGING_P bit set.
2138 Note that cse_insn knows that the hash code of a MEM expression
2139 is just (int) MEM plus the hash code of the address. */
2142 hash_rtx (rtx x
, enum machine_mode mode
, int *do_not_record_p
,
2143 int *hash_arg_in_memory_p
, bool have_reg_qty
)
2150 /* Used to turn recursion into iteration. We can't rely on GCC's
2151 tail-recursion elimination since we need to keep accumulating values
2157 code
= GET_CODE (x
);
2162 unsigned int regno
= REGNO (x
);
2164 if (!reload_completed
)
2166 /* On some machines, we can't record any non-fixed hard register,
2167 because extending its life will cause reload problems. We
2168 consider ap, fp, sp, gp to be fixed for this purpose.
2170 We also consider CCmode registers to be fixed for this purpose;
2171 failure to do so leads to failure to simplify 0<100 type of
2174 On all machines, we can't record any global registers.
2175 Nor should we record any register that is in a small
2176 class, as defined by CLASS_LIKELY_SPILLED_P. */
2179 if (regno
>= FIRST_PSEUDO_REGISTER
)
2181 else if (x
== frame_pointer_rtx
2182 || x
== hard_frame_pointer_rtx
2183 || x
== arg_pointer_rtx
2184 || x
== stack_pointer_rtx
2185 || x
== pic_offset_table_rtx
)
2187 else if (global_regs
[regno
])
2189 else if (fixed_regs
[regno
])
2191 else if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
)
2193 else if (SMALL_REGISTER_CLASSES
)
2195 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno
)))
2202 *do_not_record_p
= 1;
2207 hash
+= ((unsigned int) REG
<< 7);
2208 hash
+= (have_reg_qty
? (unsigned) REG_QTY (regno
) : regno
);
2212 /* We handle SUBREG of a REG specially because the underlying
2213 reg changes its hash value with every value change; we don't
2214 want to have to forget unrelated subregs when one subreg changes. */
2217 if (REG_P (SUBREG_REG (x
)))
2219 hash
+= (((unsigned int) SUBREG
<< 7)
2220 + REGNO (SUBREG_REG (x
))
2221 + (SUBREG_BYTE (x
) / UNITS_PER_WORD
));
2228 hash
+= (((unsigned int) CONST_INT
<< 7) + (unsigned int) mode
2229 + (unsigned int) INTVAL (x
));
2233 /* This is like the general case, except that it only counts
2234 the integers representing the constant. */
2235 hash
+= (unsigned int) code
+ (unsigned int) GET_MODE (x
);
2236 if (GET_MODE (x
) != VOIDmode
)
2237 hash
+= real_hash (CONST_DOUBLE_REAL_VALUE (x
));
2239 hash
+= ((unsigned int) CONST_DOUBLE_LOW (x
)
2240 + (unsigned int) CONST_DOUBLE_HIGH (x
));
2248 units
= CONST_VECTOR_NUNITS (x
);
2250 for (i
= 0; i
< units
; ++i
)
2252 elt
= CONST_VECTOR_ELT (x
, i
);
2253 hash
+= hash_rtx (elt
, GET_MODE (elt
), do_not_record_p
,
2254 hash_arg_in_memory_p
, have_reg_qty
);
2260 /* Assume there is only one rtx object for any given label. */
2262 /* We don't hash on the address of the CODE_LABEL to avoid bootstrap
2263 differences and differences between each stage's debugging dumps. */
2264 hash
+= (((unsigned int) LABEL_REF
<< 7)
2265 + CODE_LABEL_NUMBER (XEXP (x
, 0)));
2270 /* Don't hash on the symbol's address to avoid bootstrap differences.
2271 Different hash values may cause expressions to be recorded in
2272 different orders and thus different registers to be used in the
2273 final assembler. This also avoids differences in the dump files
2274 between various stages. */
2276 const unsigned char *p
= (const unsigned char *) XSTR (x
, 0);
2279 h
+= (h
<< 7) + *p
++; /* ??? revisit */
2281 hash
+= ((unsigned int) SYMBOL_REF
<< 7) + h
;
2286 /* We don't record if marked volatile or if BLKmode since we don't
2287 know the size of the move. */
2288 if (MEM_VOLATILE_P (x
) || GET_MODE (x
) == BLKmode
)
2290 *do_not_record_p
= 1;
2293 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2294 *hash_arg_in_memory_p
= 1;
2296 /* Now that we have already found this special case,
2297 might as well speed it up as much as possible. */
2298 hash
+= (unsigned) MEM
;
2303 /* A USE that mentions non-volatile memory needs special
2304 handling since the MEM may be BLKmode which normally
2305 prevents an entry from being made. Pure calls are
2306 marked by a USE which mentions BLKmode memory.
2307 See calls.c:emit_call_1. */
2308 if (MEM_P (XEXP (x
, 0))
2309 && ! MEM_VOLATILE_P (XEXP (x
, 0)))
2311 hash
+= (unsigned) USE
;
2314 if (hash_arg_in_memory_p
&& !MEM_READONLY_P (x
))
2315 *hash_arg_in_memory_p
= 1;
2317 /* Now that we have already found this special case,
2318 might as well speed it up as much as possible. */
2319 hash
+= (unsigned) MEM
;
2334 case UNSPEC_VOLATILE
:
2335 *do_not_record_p
= 1;
2339 if (MEM_VOLATILE_P (x
))
2341 *do_not_record_p
= 1;
2346 /* We don't want to take the filename and line into account. */
2347 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
)
2348 + hash_rtx_string (ASM_OPERANDS_TEMPLATE (x
))
2349 + hash_rtx_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
))
2350 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x
);
2352 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2354 for (i
= 1; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
2356 hash
+= (hash_rtx (ASM_OPERANDS_INPUT (x
, i
),
2357 GET_MODE (ASM_OPERANDS_INPUT (x
, i
)),
2358 do_not_record_p
, hash_arg_in_memory_p
,
2361 (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
)));
2364 hash
+= hash_rtx_string (ASM_OPERANDS_INPUT_CONSTRAINT (x
, 0));
2365 x
= ASM_OPERANDS_INPUT (x
, 0);
2366 mode
= GET_MODE (x
);
2378 i
= GET_RTX_LENGTH (code
) - 1;
2379 hash
+= (unsigned) code
+ (unsigned) GET_MODE (x
);
2380 fmt
= GET_RTX_FORMAT (code
);
2386 /* If we are about to do the last recursive call
2387 needed at this level, change it into iteration.
2388 This function is called enough to be worth it. */
2395 hash
+= hash_rtx (XEXP (x
, i
), 0, do_not_record_p
,
2396 hash_arg_in_memory_p
, have_reg_qty
);
2400 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2401 hash
+= hash_rtx (XVECEXP (x
, i
, j
), 0, do_not_record_p
,
2402 hash_arg_in_memory_p
, have_reg_qty
);
2406 hash
+= hash_rtx_string (XSTR (x
, i
));
2410 hash
+= (unsigned int) XINT (x
, i
);
2425 /* Hash an rtx X for cse via hash_rtx.
2426 Stores 1 in do_not_record if any subexpression is volatile.
2427 Stores 1 in hash_arg_in_memory if X contains a mem rtx which
2428 does not have the RTX_UNCHANGING_P bit set. */
2430 static inline unsigned
2431 canon_hash (rtx x
, enum machine_mode mode
)
2433 return hash_rtx (x
, mode
, &do_not_record
, &hash_arg_in_memory
, true);
2436 /* Like canon_hash but with no side effects, i.e. do_not_record
2437 and hash_arg_in_memory are not changed. */
2439 static inline unsigned
2440 safe_hash (rtx x
, enum machine_mode mode
)
2442 int dummy_do_not_record
;
2443 return hash_rtx (x
, mode
, &dummy_do_not_record
, NULL
, true);
2446 /* Return 1 iff X and Y would canonicalize into the same thing,
2447 without actually constructing the canonicalization of either one.
2448 If VALIDATE is nonzero,
2449 we assume X is an expression being processed from the rtl
2450 and Y was found in the hash table. We check register refs
2451 in Y for being marked as valid.
2453 If FOR_GCSE is true, we compare X and Y for equivalence for GCSE. */
2456 exp_equiv_p (rtx x
, rtx y
, int validate
, bool for_gcse
)
2462 /* Note: it is incorrect to assume an expression is equivalent to itself
2463 if VALIDATE is nonzero. */
2464 if (x
== y
&& !validate
)
2467 if (x
== 0 || y
== 0)
2470 code
= GET_CODE (x
);
2471 if (code
!= GET_CODE (y
))
2474 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2475 if (GET_MODE (x
) != GET_MODE (y
))
2486 return XEXP (x
, 0) == XEXP (y
, 0);
2489 return XSTR (x
, 0) == XSTR (y
, 0);
2493 return REGNO (x
) == REGNO (y
);
2496 unsigned int regno
= REGNO (y
);
2498 unsigned int endregno
2499 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
2500 : hard_regno_nregs
[regno
][GET_MODE (y
)]);
2502 /* If the quantities are not the same, the expressions are not
2503 equivalent. If there are and we are not to validate, they
2504 are equivalent. Otherwise, ensure all regs are up-to-date. */
2506 if (REG_QTY (REGNO (x
)) != REG_QTY (regno
))
2512 for (i
= regno
; i
< endregno
; i
++)
2513 if (REG_IN_TABLE (i
) != REG_TICK (i
))
2522 /* Can't merge two expressions in different alias sets, since we
2523 can decide that the expression is transparent in a block when
2524 it isn't, due to it being set with the different alias set. */
2525 if (MEM_ALIAS_SET (x
) != MEM_ALIAS_SET (y
))
2528 /* A volatile mem should not be considered equivalent to any
2530 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2535 /* For commutative operations, check both orders. */
2543 return ((exp_equiv_p (XEXP (x
, 0), XEXP (y
, 0),
2545 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 1),
2546 validate
, for_gcse
))
2547 || (exp_equiv_p (XEXP (x
, 0), XEXP (y
, 1),
2549 && exp_equiv_p (XEXP (x
, 1), XEXP (y
, 0),
2550 validate
, for_gcse
)));
2553 /* We don't use the generic code below because we want to
2554 disregard filename and line numbers. */
2556 /* A volatile asm isn't equivalent to any other. */
2557 if (MEM_VOLATILE_P (x
) || MEM_VOLATILE_P (y
))
2560 if (GET_MODE (x
) != GET_MODE (y
)
2561 || strcmp (ASM_OPERANDS_TEMPLATE (x
), ASM_OPERANDS_TEMPLATE (y
))
2562 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x
),
2563 ASM_OPERANDS_OUTPUT_CONSTRAINT (y
))
2564 || ASM_OPERANDS_OUTPUT_IDX (x
) != ASM_OPERANDS_OUTPUT_IDX (y
)
2565 || ASM_OPERANDS_INPUT_LENGTH (x
) != ASM_OPERANDS_INPUT_LENGTH (y
))
2568 if (ASM_OPERANDS_INPUT_LENGTH (x
))
2570 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
2571 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x
, i
),
2572 ASM_OPERANDS_INPUT (y
, i
),
2574 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x
, i
),
2575 ASM_OPERANDS_INPUT_CONSTRAINT (y
, i
)))
2585 /* Compare the elements. If any pair of corresponding elements
2586 fail to match, return 0 for the whole thing. */
2588 fmt
= GET_RTX_FORMAT (code
);
2589 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2594 if (! exp_equiv_p (XEXP (x
, i
), XEXP (y
, i
),
2595 validate
, for_gcse
))
2600 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2602 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2603 if (! exp_equiv_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
),
2604 validate
, for_gcse
))
2609 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
2614 if (XINT (x
, i
) != XINT (y
, i
))
2619 if (XWINT (x
, i
) != XWINT (y
, i
))
2635 /* Return 1 if X has a value that can vary even between two
2636 executions of the program. 0 means X can be compared reliably
2637 against certain constants or near-constants. */
2640 cse_rtx_varies_p (rtx x
, int from_alias
)
2642 /* We need not check for X and the equivalence class being of the same
2643 mode because if X is equivalent to a constant in some mode, it
2644 doesn't vary in any mode. */
2647 && REGNO_QTY_VALID_P (REGNO (x
)))
2649 int x_q
= REG_QTY (REGNO (x
));
2650 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
2652 if (GET_MODE (x
) == x_ent
->mode
2653 && x_ent
->const_rtx
!= NULL_RTX
)
2657 if (GET_CODE (x
) == PLUS
2658 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2659 && REG_P (XEXP (x
, 0))
2660 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0))))
2662 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2663 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2665 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2666 && x0_ent
->const_rtx
!= NULL_RTX
)
2670 /* This can happen as the result of virtual register instantiation, if
2671 the initial constant is too large to be a valid address. This gives
2672 us a three instruction sequence, load large offset into a register,
2673 load fp minus a constant into a register, then a MEM which is the
2674 sum of the two `constant' registers. */
2675 if (GET_CODE (x
) == PLUS
2676 && REG_P (XEXP (x
, 0))
2677 && REG_P (XEXP (x
, 1))
2678 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 0)))
2679 && REGNO_QTY_VALID_P (REGNO (XEXP (x
, 1))))
2681 int x0_q
= REG_QTY (REGNO (XEXP (x
, 0)));
2682 int x1_q
= REG_QTY (REGNO (XEXP (x
, 1)));
2683 struct qty_table_elem
*x0_ent
= &qty_table
[x0_q
];
2684 struct qty_table_elem
*x1_ent
= &qty_table
[x1_q
];
2686 if ((GET_MODE (XEXP (x
, 0)) == x0_ent
->mode
)
2687 && x0_ent
->const_rtx
!= NULL_RTX
2688 && (GET_MODE (XEXP (x
, 1)) == x1_ent
->mode
)
2689 && x1_ent
->const_rtx
!= NULL_RTX
)
2693 return rtx_varies_p (x
, from_alias
);
2696 /* Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate
2697 the result if necessary. INSN is as for canon_reg. */
2700 validate_canon_reg (rtx
*xloc
, rtx insn
)
2702 rtx
new = canon_reg (*xloc
, insn
);
2705 /* If replacing pseudo with hard reg or vice versa, ensure the
2706 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2707 if (insn
!= 0 && new != 0
2708 && REG_P (new) && REG_P (*xloc
)
2709 && (((REGNO (new) < FIRST_PSEUDO_REGISTER
)
2710 != (REGNO (*xloc
) < FIRST_PSEUDO_REGISTER
))
2711 || GET_MODE (new) != GET_MODE (*xloc
)
2712 || (insn_code
= recog_memoized (insn
)) < 0
2713 || insn_data
[insn_code
].n_dups
> 0))
2714 validate_change (insn
, xloc
, new, 1);
2719 /* Canonicalize an expression:
2720 replace each register reference inside it
2721 with the "oldest" equivalent register.
2723 If INSN is nonzero and we are replacing a pseudo with a hard register
2724 or vice versa, validate_change is used to ensure that INSN remains valid
2725 after we make our substitution. The calls are made with IN_GROUP nonzero
2726 so apply_change_group must be called upon the outermost return from this
2727 function (unless INSN is zero). The result of apply_change_group can
2728 generally be discarded since the changes we are making are optional. */
2731 canon_reg (rtx x
, rtx insn
)
2740 code
= GET_CODE (x
);
2759 struct qty_table_elem
*ent
;
2761 /* Never replace a hard reg, because hard regs can appear
2762 in more than one machine mode, and we must preserve the mode
2763 of each occurrence. Also, some hard regs appear in
2764 MEMs that are shared and mustn't be altered. Don't try to
2765 replace any reg that maps to a reg of class NO_REGS. */
2766 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
2767 || ! REGNO_QTY_VALID_P (REGNO (x
)))
2770 q
= REG_QTY (REGNO (x
));
2771 ent
= &qty_table
[q
];
2772 first
= ent
->first_reg
;
2773 return (first
>= FIRST_PSEUDO_REGISTER
? regno_reg_rtx
[first
]
2774 : REGNO_REG_CLASS (first
) == NO_REGS
? x
2775 : gen_rtx_REG (ent
->mode
, first
));
2782 fmt
= GET_RTX_FORMAT (code
);
2783 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2788 validate_canon_reg (&XEXP (x
, i
), insn
);
2789 else if (fmt
[i
] == 'E')
2790 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2791 validate_canon_reg (&XVECEXP (x
, i
, j
), insn
);
2797 /* LOC is a location within INSN that is an operand address (the contents of
2798 a MEM). Find the best equivalent address to use that is valid for this
2801 On most CISC machines, complicated address modes are costly, and rtx_cost
2802 is a good approximation for that cost. However, most RISC machines have
2803 only a few (usually only one) memory reference formats. If an address is
2804 valid at all, it is often just as cheap as any other address. Hence, for
2805 RISC machines, we use `address_cost' to compare the costs of various
2806 addresses. For two addresses of equal cost, choose the one with the
2807 highest `rtx_cost' value as that has the potential of eliminating the
2808 most insns. For equal costs, we choose the first in the equivalence
2809 class. Note that we ignore the fact that pseudo registers are cheaper than
2810 hard registers here because we would also prefer the pseudo registers. */
2813 find_best_addr (rtx insn
, rtx
*loc
, enum machine_mode mode
)
2815 struct table_elt
*elt
;
2817 struct table_elt
*p
;
2818 int found_better
= 1;
2819 int save_do_not_record
= do_not_record
;
2820 int save_hash_arg_in_memory
= hash_arg_in_memory
;
2825 /* Do not try to replace constant addresses or addresses of local and
2826 argument slots. These MEM expressions are made only once and inserted
2827 in many instructions, as well as being used to control symbol table
2828 output. It is not safe to clobber them.
2830 There are some uncommon cases where the address is already in a register
2831 for some reason, but we cannot take advantage of that because we have
2832 no easy way to unshare the MEM. In addition, looking up all stack
2833 addresses is costly. */
2834 if ((GET_CODE (addr
) == PLUS
2835 && REG_P (XEXP (addr
, 0))
2836 && GET_CODE (XEXP (addr
, 1)) == CONST_INT
2837 && (regno
= REGNO (XEXP (addr
, 0)),
2838 regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
2839 || regno
== ARG_POINTER_REGNUM
))
2841 && (regno
= REGNO (addr
), regno
== FRAME_POINTER_REGNUM
2842 || regno
== HARD_FRAME_POINTER_REGNUM
2843 || regno
== ARG_POINTER_REGNUM
))
2844 || CONSTANT_ADDRESS_P (addr
))
2847 /* If this address is not simply a register, try to fold it. This will
2848 sometimes simplify the expression. Many simplifications
2849 will not be valid, but some, usually applying the associative rule, will
2850 be valid and produce better code. */
2853 rtx folded
= canon_for_address (fold_rtx (addr
, NULL_RTX
));
2857 int addr_folded_cost
= address_cost (folded
, mode
);
2858 int addr_cost
= address_cost (addr
, mode
);
2860 if ((addr_folded_cost
< addr_cost
2861 || (addr_folded_cost
== addr_cost
2862 /* ??? The rtx_cost comparison is left over from an older
2863 version of this code. It is probably no longer helpful.*/
2864 && (rtx_cost (folded
, MEM
) > rtx_cost (addr
, MEM
)
2865 || approx_reg_cost (folded
) < approx_reg_cost (addr
))))
2866 && validate_change (insn
, loc
, folded
, 0))
2871 /* If this address is not in the hash table, we can't look for equivalences
2872 of the whole address. Also, ignore if volatile. */
2875 hash
= HASH (addr
, Pmode
);
2876 addr_volatile
= do_not_record
;
2877 do_not_record
= save_do_not_record
;
2878 hash_arg_in_memory
= save_hash_arg_in_memory
;
2883 elt
= lookup (addr
, hash
, Pmode
);
2887 /* We need to find the best (under the criteria documented above) entry
2888 in the class that is valid. We use the `flag' field to indicate
2889 choices that were invalid and iterate until we can't find a better
2890 one that hasn't already been tried. */
2892 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2895 while (found_better
)
2897 int best_addr_cost
= address_cost (*loc
, mode
);
2898 int best_rtx_cost
= (elt
->cost
+ 1) >> 1;
2900 struct table_elt
*best_elt
= elt
;
2903 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2907 || exp_equiv_p (p
->exp
, p
->exp
, 1, false))
2908 && ((exp_cost
= address_cost (p
->exp
, mode
)) < best_addr_cost
2909 || (exp_cost
== best_addr_cost
2910 && ((p
->cost
+ 1) >> 1) > best_rtx_cost
)))
2913 best_addr_cost
= exp_cost
;
2914 best_rtx_cost
= (p
->cost
+ 1) >> 1;
2921 if (validate_change (insn
, loc
,
2922 canon_reg (copy_rtx (best_elt
->exp
),
2931 /* If the address is a binary operation with the first operand a register
2932 and the second a constant, do the same as above, but looking for
2933 equivalences of the register. Then try to simplify before checking for
2934 the best address to use. This catches a few cases: First is when we
2935 have REG+const and the register is another REG+const. We can often merge
2936 the constants and eliminate one insn and one register. It may also be
2937 that a machine has a cheap REG+REG+const. Finally, this improves the
2938 code on the Alpha for unaligned byte stores. */
2940 if (flag_expensive_optimizations
2941 && ARITHMETIC_P (*loc
)
2942 && REG_P (XEXP (*loc
, 0)))
2944 rtx op1
= XEXP (*loc
, 1);
2947 hash
= HASH (XEXP (*loc
, 0), Pmode
);
2948 do_not_record
= save_do_not_record
;
2949 hash_arg_in_memory
= save_hash_arg_in_memory
;
2951 elt
= lookup (XEXP (*loc
, 0), hash
, Pmode
);
2955 /* We need to find the best (under the criteria documented above) entry
2956 in the class that is valid. We use the `flag' field to indicate
2957 choices that were invalid and iterate until we can't find a better
2958 one that hasn't already been tried. */
2960 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
2963 while (found_better
)
2965 int best_addr_cost
= address_cost (*loc
, mode
);
2966 int best_rtx_cost
= (COST (*loc
) + 1) >> 1;
2967 struct table_elt
*best_elt
= elt
;
2968 rtx best_rtx
= *loc
;
2971 /* This is at worst case an O(n^2) algorithm, so limit our search
2972 to the first 32 elements on the list. This avoids trouble
2973 compiling code with very long basic blocks that can easily
2974 call simplify_gen_binary so many times that we run out of
2978 for (p
= elt
->first_same_value
, count
= 0;
2980 p
= p
->next_same_value
, count
++)
2983 || exp_equiv_p (p
->exp
, p
->exp
, 1, false)))
2985 rtx
new = simplify_gen_binary (GET_CODE (*loc
), Pmode
,
2989 /* Get the canonical version of the address so we can accept
2991 new = canon_for_address (new);
2993 new_cost
= address_cost (new, mode
);
2995 if (new_cost
< best_addr_cost
2996 || (new_cost
== best_addr_cost
2997 && (COST (new) + 1) >> 1 > best_rtx_cost
))
3000 best_addr_cost
= new_cost
;
3001 best_rtx_cost
= (COST (new) + 1) >> 1;
3009 if (validate_change (insn
, loc
,
3010 canon_reg (copy_rtx (best_rtx
),
3020 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3021 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3022 what values are being compared.
3024 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3025 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3026 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3027 compared to produce cc0.
3029 The return value is the comparison operator and is either the code of
3030 A or the code corresponding to the inverse of the comparison. */
3032 static enum rtx_code
3033 find_comparison_args (enum rtx_code code
, rtx
*parg1
, rtx
*parg2
,
3034 enum machine_mode
*pmode1
, enum machine_mode
*pmode2
)
3038 arg1
= *parg1
, arg2
= *parg2
;
3040 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3042 while (arg2
== CONST0_RTX (GET_MODE (arg1
)))
3044 /* Set nonzero when we find something of interest. */
3046 int reverse_code
= 0;
3047 struct table_elt
*p
= 0;
3049 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3050 On machines with CC0, this is the only case that can occur, since
3051 fold_rtx will return the COMPARE or item being compared with zero
3054 if (GET_CODE (arg1
) == COMPARE
&& arg2
== const0_rtx
)
3057 /* If ARG1 is a comparison operator and CODE is testing for
3058 STORE_FLAG_VALUE, get the inner arguments. */
3060 else if (COMPARISON_P (arg1
))
3062 #ifdef FLOAT_STORE_FLAG_VALUE
3063 REAL_VALUE_TYPE fsfv
;
3067 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3068 && code
== LT
&& STORE_FLAG_VALUE
== -1)
3069 #ifdef FLOAT_STORE_FLAG_VALUE
3070 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3071 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3072 REAL_VALUE_NEGATIVE (fsfv
)))
3077 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_INT
3078 && code
== GE
&& STORE_FLAG_VALUE
== -1)
3079 #ifdef FLOAT_STORE_FLAG_VALUE
3080 || (GET_MODE_CLASS (GET_MODE (arg1
)) == MODE_FLOAT
3081 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3082 REAL_VALUE_NEGATIVE (fsfv
)))
3085 x
= arg1
, reverse_code
= 1;
3088 /* ??? We could also check for
3090 (ne (and (eq (...) (const_int 1))) (const_int 0))
3092 and related forms, but let's wait until we see them occurring. */
3095 /* Look up ARG1 in the hash table and see if it has an equivalence
3096 that lets us see what is being compared. */
3097 p
= lookup (arg1
, SAFE_HASH (arg1
, GET_MODE (arg1
)), GET_MODE (arg1
));
3100 p
= p
->first_same_value
;
3102 /* If what we compare is already known to be constant, that is as
3104 We need to break the loop in this case, because otherwise we
3105 can have an infinite loop when looking at a reg that is known
3106 to be a constant which is the same as a comparison of a reg
3107 against zero which appears later in the insn stream, which in
3108 turn is constant and the same as the comparison of the first reg
3114 for (; p
; p
= p
->next_same_value
)
3116 enum machine_mode inner_mode
= GET_MODE (p
->exp
);
3117 #ifdef FLOAT_STORE_FLAG_VALUE
3118 REAL_VALUE_TYPE fsfv
;
3121 /* If the entry isn't valid, skip it. */
3122 if (! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
3125 if (GET_CODE (p
->exp
) == COMPARE
3126 /* Another possibility is that this machine has a compare insn
3127 that includes the comparison code. In that case, ARG1 would
3128 be equivalent to a comparison operation that would set ARG1 to
3129 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3130 ORIG_CODE is the actual comparison being done; if it is an EQ,
3131 we must reverse ORIG_CODE. On machine with a negative value
3132 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3135 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3136 && (GET_MODE_BITSIZE (inner_mode
)
3137 <= HOST_BITS_PER_WIDE_INT
)
3138 && (STORE_FLAG_VALUE
3139 & ((HOST_WIDE_INT
) 1
3140 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3141 #ifdef FLOAT_STORE_FLAG_VALUE
3143 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3144 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3145 REAL_VALUE_NEGATIVE (fsfv
)))
3148 && COMPARISON_P (p
->exp
)))
3153 else if ((code
== EQ
3155 && GET_MODE_CLASS (inner_mode
) == MODE_INT
3156 && (GET_MODE_BITSIZE (inner_mode
)
3157 <= HOST_BITS_PER_WIDE_INT
)
3158 && (STORE_FLAG_VALUE
3159 & ((HOST_WIDE_INT
) 1
3160 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
3161 #ifdef FLOAT_STORE_FLAG_VALUE
3163 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
3164 && (fsfv
= FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1
)),
3165 REAL_VALUE_NEGATIVE (fsfv
)))
3168 && COMPARISON_P (p
->exp
))
3175 /* If this non-trapping address, e.g. fp + constant, the
3176 equivalent is a better operand since it may let us predict
3177 the value of the comparison. */
3178 else if (!rtx_addr_can_trap_p (p
->exp
))
3185 /* If we didn't find a useful equivalence for ARG1, we are done.
3186 Otherwise, set up for the next iteration. */
3190 /* If we need to reverse the comparison, make sure that that is
3191 possible -- we can't necessarily infer the value of GE from LT
3192 with floating-point operands. */
3195 enum rtx_code reversed
= reversed_comparison_code (x
, NULL_RTX
);
3196 if (reversed
== UNKNOWN
)
3201 else if (COMPARISON_P (x
))
3202 code
= GET_CODE (x
);
3203 arg1
= XEXP (x
, 0), arg2
= XEXP (x
, 1);
3206 /* Return our results. Return the modes from before fold_rtx
3207 because fold_rtx might produce const_int, and then it's too late. */
3208 *pmode1
= GET_MODE (arg1
), *pmode2
= GET_MODE (arg2
);
3209 *parg1
= fold_rtx (arg1
, 0), *parg2
= fold_rtx (arg2
, 0);
3217 fold_rtx_subreg (rtx x
, rtx insn
)
3219 enum machine_mode mode
= GET_MODE (x
);
3224 /* See if we previously assigned a constant value to this SUBREG. */
3225 if ((new = lookup_as_function (x
, CONST_INT
)) != 0
3226 || (new = lookup_as_function (x
, CONST_DOUBLE
)) != 0)
3229 /* If this is a paradoxical SUBREG, we have no idea what value the
3230 extra bits would have. However, if the operand is equivalent to
3231 a SUBREG whose operand is the same as our mode, and all the modes
3232 are within a word, we can just use the inner operand because
3233 these SUBREGs just say how to treat the register.
3235 Similarly if we find an integer constant. */
3237 if (GET_MODE_SIZE (mode
) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3239 enum machine_mode imode
= GET_MODE (SUBREG_REG (x
));
3240 struct table_elt
*elt
;
3242 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
3243 && GET_MODE_SIZE (imode
) <= UNITS_PER_WORD
3244 && (elt
= lookup (SUBREG_REG (x
), HASH (SUBREG_REG (x
), imode
),
3246 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
3248 if (CONSTANT_P (elt
->exp
)
3249 && GET_MODE (elt
->exp
) == VOIDmode
)
3252 if (GET_CODE (elt
->exp
) == SUBREG
3253 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3254 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3255 return copy_rtx (SUBREG_REG (elt
->exp
));
3261 /* Fold SUBREG_REG. If it changed, see if we can simplify the
3262 SUBREG. We might be able to if the SUBREG is extracting a single
3263 word in an integral mode or extracting the low part. */
3265 folded_arg0
= fold_rtx (SUBREG_REG (x
), insn
);
3266 const_arg0
= equiv_constant (folded_arg0
);
3268 folded_arg0
= const_arg0
;
3270 if (folded_arg0
!= SUBREG_REG (x
))
3272 new = simplify_subreg (mode
, folded_arg0
,
3273 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
3278 if (REG_P (folded_arg0
)
3279 && GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (folded_arg0
)))
3281 struct table_elt
*elt
;
3283 elt
= lookup (folded_arg0
,
3284 HASH (folded_arg0
, GET_MODE (folded_arg0
)),
3285 GET_MODE (folded_arg0
));
3288 elt
= elt
->first_same_value
;
3290 if (subreg_lowpart_p (x
))
3291 /* If this is a narrowing SUBREG and our operand is a REG, see
3292 if we can find an equivalence for REG that is an arithmetic
3293 operation in a wider mode where both operands are
3294 paradoxical SUBREGs from objects of our result mode. In
3295 that case, we couldn-t report an equivalent value for that
3296 operation, since we don't know what the extra bits will be.
3297 But we can find an equivalence for this SUBREG by folding
3298 that operation in the narrow mode. This allows us to fold
3299 arithmetic in narrow modes when the machine only supports
3300 word-sized arithmetic.
3302 Also look for a case where we have a SUBREG whose operand
3303 is the same as our result. If both modes are smaller than
3304 a word, we are simply interpreting a register in different
3305 modes and we can use the inner value. */
3307 for (; elt
; elt
= elt
->next_same_value
)
3309 enum rtx_code eltcode
= GET_CODE (elt
->exp
);
3311 /* Just check for unary and binary operations. */
3312 if (UNARY_P (elt
->exp
)
3313 && eltcode
!= SIGN_EXTEND
3314 && eltcode
!= ZERO_EXTEND
3315 && GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3316 && GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0))) == mode
3317 && (GET_MODE_CLASS (mode
)
3318 == GET_MODE_CLASS (GET_MODE (XEXP (elt
->exp
, 0)))))
3320 rtx op0
= SUBREG_REG (XEXP (elt
->exp
, 0));
3322 if (!REG_P (op0
) && ! CONSTANT_P (op0
))
3323 op0
= fold_rtx (op0
, NULL_RTX
);
3325 op0
= equiv_constant (op0
);
3327 new = simplify_unary_operation (GET_CODE (elt
->exp
), mode
,
3330 else if (ARITHMETIC_P (elt
->exp
)
3331 && eltcode
!= DIV
&& eltcode
!= MOD
3332 && eltcode
!= UDIV
&& eltcode
!= UMOD
3333 && eltcode
!= ASHIFTRT
&& eltcode
!= LSHIFTRT
3334 && eltcode
!= ROTATE
&& eltcode
!= ROTATERT
3335 && ((GET_CODE (XEXP (elt
->exp
, 0)) == SUBREG
3336 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 0)))
3338 || CONSTANT_P (XEXP (elt
->exp
, 0)))
3339 && ((GET_CODE (XEXP (elt
->exp
, 1)) == SUBREG
3340 && (GET_MODE (SUBREG_REG (XEXP (elt
->exp
, 1)))
3342 || CONSTANT_P (XEXP (elt
->exp
, 1))))
3344 rtx op0
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 0));
3345 rtx op1
= gen_lowpart_common (mode
, XEXP (elt
->exp
, 1));
3347 if (op0
&& !REG_P (op0
) && ! CONSTANT_P (op0
))
3348 op0
= fold_rtx (op0
, NULL_RTX
);
3351 op0
= equiv_constant (op0
);
3353 if (op1
&& !REG_P (op1
) && ! CONSTANT_P (op1
))
3354 op1
= fold_rtx (op1
, NULL_RTX
);
3357 op1
= equiv_constant (op1
);
3359 /* If we are looking for the low SImode part of
3360 (ashift:DI c (const_int 32)), it doesn't work to
3361 compute that in SImode, because a 32-bit shift in
3362 SImode is unpredictable. We know the value is
3365 && GET_CODE (elt
->exp
) == ASHIFT
3366 && GET_CODE (op1
) == CONST_INT
3367 && INTVAL (op1
) >= GET_MODE_BITSIZE (mode
))
3370 < GET_MODE_BITSIZE (GET_MODE (elt
->exp
)))
3371 /* If the count fits in the inner mode's width,
3372 but exceeds the outer mode's width, the value
3373 will get truncated to 0 by the subreg. */
3374 new = CONST0_RTX (mode
);
3376 /* If the count exceeds even the inner mode's width,
3377 don't fold this expression. */
3380 else if (op0
&& op1
)
3381 new = simplify_binary_operation (GET_CODE (elt
->exp
),
3385 else if (GET_CODE (elt
->exp
) == SUBREG
3386 && GET_MODE (SUBREG_REG (elt
->exp
)) == mode
3387 && (GET_MODE_SIZE (GET_MODE (folded_arg0
))
3389 && exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
3390 new = copy_rtx (SUBREG_REG (elt
->exp
));
3396 /* A SUBREG resulting from a zero extension may fold to zero
3397 if it extracts higher bits than the ZERO_EXTEND's source
3398 bits. FIXME: if combine tried to, er, combine these
3399 instructions, this transformation may be moved to
3401 for (; elt
; elt
= elt
->next_same_value
)
3403 if (GET_CODE (elt
->exp
) == ZERO_EXTEND
3405 >= GET_MODE_BITSIZE (GET_MODE (XEXP (elt
->exp
, 0))))
3406 return CONST0_RTX (mode
);
3416 fold_rtx_mem (rtx x
, rtx insn
)
3418 enum machine_mode mode
= GET_MODE (x
);
3421 /* If we are not actually processing an insn, don't try to find the
3422 best address. Not only don't we care, but we could modify the
3423 MEM in an invalid way since we have no insn to validate
3426 find_best_addr (insn
, &XEXP (x
, 0), mode
);
3429 /* Even if we don't fold in the insn itself, we can safely do so
3430 here, in hopes of getting a constant. */
3431 rtx addr
= fold_rtx (XEXP (x
, 0), NULL_RTX
);
3433 HOST_WIDE_INT offset
= 0;
3436 && REGNO_QTY_VALID_P (REGNO (addr
)))
3438 int addr_q
= REG_QTY (REGNO (addr
));
3439 struct qty_table_elem
*addr_ent
= &qty_table
[addr_q
];
3441 if (GET_MODE (addr
) == addr_ent
->mode
3442 && addr_ent
->const_rtx
!= NULL_RTX
)
3443 addr
= addr_ent
->const_rtx
;
3446 /* If address is constant, split it into a base and integer
3448 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
3450 else if (GET_CODE (addr
) == CONST
&& GET_CODE (XEXP (addr
, 0)) == PLUS
3451 && GET_CODE (XEXP (XEXP (addr
, 0), 1)) == CONST_INT
)
3453 base
= XEXP (XEXP (addr
, 0), 0);
3454 offset
= INTVAL (XEXP (XEXP (addr
, 0), 1));
3456 else if (GET_CODE (addr
) == LO_SUM
3457 && GET_CODE (XEXP (addr
, 1)) == SYMBOL_REF
)
3458 base
= XEXP (addr
, 1);
3460 /* If this is a constant pool reference, we can fold it into its
3461 constant to allow better value tracking. */
3462 if (base
&& GET_CODE (base
) == SYMBOL_REF
3463 && CONSTANT_POOL_ADDRESS_P (base
))
3465 rtx constant
= get_pool_constant (base
);
3466 enum machine_mode const_mode
= get_pool_mode (base
);
3469 if (CONSTANT_P (constant
) && GET_CODE (constant
) != CONST_INT
)
3471 constant_pool_entries_cost
= COST (constant
);
3472 constant_pool_entries_regcost
= approx_reg_cost (constant
);
3475 /* If we are loading the full constant, we have an
3477 if (offset
== 0 && mode
== const_mode
)
3480 /* If this actually isn't a constant (weird!), we can't do
3481 anything. Otherwise, handle the two most common cases:
3482 extracting a word from a multi-word constant, and
3483 extracting the low-order bits. Other cases don't seem
3484 common enough to worry about. */
3485 if (! CONSTANT_P (constant
))
3488 if (GET_MODE_CLASS (mode
) == MODE_INT
3489 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
3490 && offset
% UNITS_PER_WORD
== 0
3491 && (new = operand_subword (constant
,
3492 offset
/ UNITS_PER_WORD
,
3493 0, const_mode
)) != 0)
3496 if (((BYTES_BIG_ENDIAN
3497 && offset
== GET_MODE_SIZE (GET_MODE (constant
)) - 1)
3498 || (! BYTES_BIG_ENDIAN
&& offset
== 0))
3499 && (new = gen_lowpart (mode
, constant
)) != 0)
3503 /* If this is a reference to a label at a known position in a jump
3504 table, we also know its value. */
3505 if (base
&& GET_CODE (base
) == LABEL_REF
)
3507 rtx label
= XEXP (base
, 0);
3508 rtx table_insn
= NEXT_INSN (label
);
3510 if (table_insn
&& JUMP_P (table_insn
)
3511 && GET_CODE (PATTERN (table_insn
)) == ADDR_VEC
)
3513 rtx table
= PATTERN (table_insn
);
3516 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3517 < XVECLEN (table
, 0)))
3520 (table
, 0, offset
/ GET_MODE_SIZE (GET_MODE (table
)));
3523 /* If we have an insn that loads the label from the
3524 jumptable into a reg, we don't want to set the reg
3525 to the label, because this may cause a reference to
3526 the label to remain after the label is removed in
3527 some very obscure cases (PR middle-end/18628). */
3531 set
= single_set (insn
);
3533 if (! set
|| SET_SRC (set
) != x
)
3536 /* If it's a jump, it's safe to reference the label. */
3537 if (SET_DEST (set
) == pc_rtx
)
3543 if (table_insn
&& JUMP_P (table_insn
)
3544 && GET_CODE (PATTERN (table_insn
)) == ADDR_DIFF_VEC
)
3546 rtx table
= PATTERN (table_insn
);
3549 && (offset
/ GET_MODE_SIZE (GET_MODE (table
))
3550 < XVECLEN (table
, 1)))
3552 offset
/= GET_MODE_SIZE (GET_MODE (table
));
3553 new = gen_rtx_MINUS (Pmode
, XVECEXP (table
, 1, offset
),
3556 if (GET_MODE (table
) != Pmode
)
3557 new = gen_rtx_TRUNCATE (GET_MODE (table
), new);
3559 /* Indicate this is a constant. This isn't a valid
3560 form of CONST, but it will only be used to fold the
3561 next insns and then discarded, so it should be
3564 Note this expression must be explicitly discarded,
3565 by cse_insn, else it may end up in a REG_EQUAL note
3566 and "escape" to cause problems elsewhere. */
3567 return gen_rtx_CONST (GET_MODE (new), new);
3576 /* If X is a nontrivial arithmetic operation on an argument
3577 for which a constant value can be determined, return
3578 the result of operating on that value, as a constant.
3579 Otherwise, return X, possibly with one or more operands
3580 modified by recursive calls to this function.
3582 If X is a register whose contents are known, we do NOT
3583 return those contents here. equiv_constant is called to
3586 INSN is the insn that we may be modifying. If it is 0, make a copy
3587 of X before modifying it. */
3590 fold_rtx (rtx x
, rtx insn
)
3593 enum machine_mode mode
;
3600 /* Folded equivalents of first two operands of X. */
3604 /* Constant equivalents of first three operands of X;
3605 0 when no such equivalent is known. */
3610 /* The mode of the first operand of X. We need this for sign and zero
3612 enum machine_mode mode_arg0
;
3617 mode
= GET_MODE (x
);
3618 code
= GET_CODE (x
);
3629 /* No use simplifying an EXPR_LIST
3630 since they are used only for lists of args
3631 in a function call's REG_EQUAL note. */
3637 return prev_insn_cc0
;
3641 return fold_rtx_subreg (x
, insn
);
3645 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3646 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3647 new = lookup_as_function (XEXP (x
, 0), code
);
3649 return fold_rtx (copy_rtx (XEXP (new, 0)), insn
);
3653 return fold_rtx_mem (x
, insn
);
3655 #ifdef NO_FUNCTION_CSE
3657 if (CONSTANT_P (XEXP (XEXP (x
, 0), 0)))
3665 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
3666 validate_change (insn
, &ASM_OPERANDS_INPUT (x
, i
),
3667 fold_rtx (ASM_OPERANDS_INPUT (x
, i
), insn
), 0);
3678 mode_arg0
= VOIDmode
;
3680 /* Try folding our operands.
3681 Then see which ones have constant values known. */
3683 fmt
= GET_RTX_FORMAT (code
);
3684 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3687 rtx arg
= XEXP (x
, i
);
3688 rtx folded_arg
= arg
, const_arg
= 0;
3689 enum machine_mode mode_arg
= GET_MODE (arg
);
3690 rtx cheap_arg
, expensive_arg
;
3691 rtx replacements
[2];
3693 int old_cost
= COST_IN (XEXP (x
, i
), code
);
3695 /* Most arguments are cheap, so handle them specially. */
3696 switch (GET_CODE (arg
))
3699 /* This is the same as calling equiv_constant; it is duplicated
3701 if (REGNO_QTY_VALID_P (REGNO (arg
)))
3703 int arg_q
= REG_QTY (REGNO (arg
));
3704 struct qty_table_elem
*arg_ent
= &qty_table
[arg_q
];
3706 if (arg_ent
->const_rtx
!= NULL_RTX
3707 && !REG_P (arg_ent
->const_rtx
)
3708 && GET_CODE (arg_ent
->const_rtx
) != PLUS
)
3710 = gen_lowpart (GET_MODE (arg
),
3711 arg_ent
->const_rtx
);
3726 folded_arg
= prev_insn_cc0
;
3727 mode_arg
= prev_insn_cc0_mode
;
3728 const_arg
= equiv_constant (folded_arg
);
3733 folded_arg
= fold_rtx (arg
, insn
);
3734 const_arg
= equiv_constant (folded_arg
);
3737 /* For the first three operands, see if the operand
3738 is constant or equivalent to a constant. */
3742 folded_arg0
= folded_arg
;
3743 const_arg0
= const_arg
;
3744 mode_arg0
= mode_arg
;
3747 folded_arg1
= folded_arg
;
3748 const_arg1
= const_arg
;
3751 const_arg2
= const_arg
;
3755 /* Pick the least expensive of the folded argument and an
3756 equivalent constant argument. */
3757 if (const_arg
== 0 || const_arg
== folded_arg
3758 || COST_IN (const_arg
, code
) > COST_IN (folded_arg
, code
))
3759 cheap_arg
= folded_arg
, expensive_arg
= const_arg
;
3761 cheap_arg
= const_arg
, expensive_arg
= folded_arg
;
3763 /* Try to replace the operand with the cheapest of the two
3764 possibilities. If it doesn't work and this is either of the first
3765 two operands of a commutative operation, try swapping them.
3766 If THAT fails, try the more expensive, provided it is cheaper
3767 than what is already there. */
3769 if (cheap_arg
== XEXP (x
, i
))
3772 if (insn
== 0 && ! copied
)
3778 /* Order the replacements from cheapest to most expensive. */
3779 replacements
[0] = cheap_arg
;
3780 replacements
[1] = expensive_arg
;
3782 for (j
= 0; j
< 2 && replacements
[j
]; j
++)
3784 int new_cost
= COST_IN (replacements
[j
], code
);
3786 /* Stop if what existed before was cheaper. Prefer constants
3787 in the case of a tie. */
3788 if (new_cost
> old_cost
3789 || (new_cost
== old_cost
&& CONSTANT_P (XEXP (x
, i
))))
3792 /* It's not safe to substitute the operand of a conversion
3793 operator with a constant, as the conversion's identity
3794 depends upon the mode of it's operand. This optimization
3795 is handled by the call to simplify_unary_operation. */
3796 if (GET_RTX_CLASS (code
) == RTX_UNARY
3797 && GET_MODE (replacements
[j
]) != mode_arg0
3798 && (code
== ZERO_EXTEND
3799 || code
== SIGN_EXTEND
3801 || code
== FLOAT_TRUNCATE
3802 || code
== FLOAT_EXTEND
3805 || code
== UNSIGNED_FLOAT
3806 || code
== UNSIGNED_FIX
))
3809 if (validate_change (insn
, &XEXP (x
, i
), replacements
[j
], 0))
3812 if (GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
3813 || GET_RTX_CLASS (code
) == RTX_COMM_ARITH
)
3815 validate_change (insn
, &XEXP (x
, i
), XEXP (x
, 1 - i
), 1);
3816 validate_change (insn
, &XEXP (x
, 1 - i
), replacements
[j
], 1);
3818 if (apply_change_group ())
3820 /* Swap them back to be invalid so that this loop can
3821 continue and flag them to be swapped back later. */
3824 tem
= XEXP (x
, 0); XEXP (x
, 0) = XEXP (x
, 1);
3836 /* Don't try to fold inside of a vector of expressions.
3837 Doing nothing is harmless. */
3841 /* If a commutative operation, place a constant integer as the second
3842 operand unless the first operand is also a constant integer. Otherwise,
3843 place any constant second unless the first operand is also a constant. */
3845 if (COMMUTATIVE_P (x
))
3848 || swap_commutative_operands_p (const_arg0
? const_arg0
3850 const_arg1
? const_arg1
3853 rtx tem
= XEXP (x
, 0);
3855 if (insn
== 0 && ! copied
)
3861 validate_change (insn
, &XEXP (x
, 0), XEXP (x
, 1), 1);
3862 validate_change (insn
, &XEXP (x
, 1), tem
, 1);
3863 if (apply_change_group ())
3865 tem
= const_arg0
, const_arg0
= const_arg1
, const_arg1
= tem
;
3866 tem
= folded_arg0
, folded_arg0
= folded_arg1
, folded_arg1
= tem
;
3871 /* If X is an arithmetic operation, see if we can simplify it. */
3873 switch (GET_RTX_CLASS (code
))
3879 /* We can't simplify extension ops unless we know the
3881 if ((code
== ZERO_EXTEND
|| code
== SIGN_EXTEND
)
3882 && mode_arg0
== VOIDmode
)
3885 /* If we had a CONST, strip it off and put it back later if we
3887 if (const_arg0
!= 0 && GET_CODE (const_arg0
) == CONST
)
3888 is_const
= 1, const_arg0
= XEXP (const_arg0
, 0);
3890 new = simplify_unary_operation (code
, mode
,
3891 const_arg0
? const_arg0
: folded_arg0
,
3893 /* NEG of PLUS could be converted into MINUS, but that causes
3894 expressions of the form
3895 (CONST (MINUS (CONST_INT) (SYMBOL_REF)))
3896 which many ports mistakenly treat as LEGITIMATE_CONSTANT_P.
3897 FIXME: those ports should be fixed. */
3898 if (new != 0 && is_const
3899 && GET_CODE (new) == PLUS
3900 && (GET_CODE (XEXP (new, 0)) == SYMBOL_REF
3901 || GET_CODE (XEXP (new, 0)) == LABEL_REF
)
3902 && GET_CODE (XEXP (new, 1)) == CONST_INT
)
3903 new = gen_rtx_CONST (mode
, new);
3908 case RTX_COMM_COMPARE
:
3909 /* See what items are actually being compared and set FOLDED_ARG[01]
3910 to those values and CODE to the actual comparison code. If any are
3911 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3912 do anything if both operands are already known to be constant. */
3914 /* ??? Vector mode comparisons are not supported yet. */
3915 if (VECTOR_MODE_P (mode
))
3918 if (const_arg0
== 0 || const_arg1
== 0)
3920 struct table_elt
*p0
, *p1
;
3921 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
3922 enum machine_mode mode_arg1
;
3924 #ifdef FLOAT_STORE_FLAG_VALUE
3925 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
3927 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
3928 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
3929 false_rtx
= CONST0_RTX (mode
);
3933 code
= find_comparison_args (code
, &folded_arg0
, &folded_arg1
,
3934 &mode_arg0
, &mode_arg1
);
3936 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3937 what kinds of things are being compared, so we can't do
3938 anything with this comparison. */
3940 if (mode_arg0
== VOIDmode
|| GET_MODE_CLASS (mode_arg0
) == MODE_CC
)
3943 const_arg0
= equiv_constant (folded_arg0
);
3944 const_arg1
= equiv_constant (folded_arg1
);
3946 /* If we do not now have two constants being compared, see
3947 if we can nevertheless deduce some things about the
3949 if (const_arg0
== 0 || const_arg1
== 0)
3951 /* Some addresses are known to be nonzero. We don't know
3952 their sign, but equality comparisons are known. */
3953 if (const_arg1
== const0_rtx
3954 && nonzero_address_p (folded_arg0
))
3958 else if (code
== NE
)
3962 /* See if the two operands are the same. */
3964 if (folded_arg0
== folded_arg1
3965 || (REG_P (folded_arg0
)
3966 && REG_P (folded_arg1
)
3967 && (REG_QTY (REGNO (folded_arg0
))
3968 == REG_QTY (REGNO (folded_arg1
))))
3969 || ((p0
= lookup (folded_arg0
,
3970 SAFE_HASH (folded_arg0
, mode_arg0
),
3972 && (p1
= lookup (folded_arg1
,
3973 SAFE_HASH (folded_arg1
, mode_arg0
),
3975 && p0
->first_same_value
== p1
->first_same_value
))
3977 /* Sadly two equal NaNs are not equivalent. */
3978 if (!HONOR_NANS (mode_arg0
))
3979 return ((code
== EQ
|| code
== LE
|| code
== GE
3980 || code
== LEU
|| code
== GEU
|| code
== UNEQ
3981 || code
== UNLE
|| code
== UNGE
3983 ? true_rtx
: false_rtx
);
3984 /* Take care for the FP compares we can resolve. */
3985 if (code
== UNEQ
|| code
== UNLE
|| code
== UNGE
)
3987 if (code
== LTGT
|| code
== LT
|| code
== GT
)
3991 /* If FOLDED_ARG0 is a register, see if the comparison we are
3992 doing now is either the same as we did before or the reverse
3993 (we only check the reverse if not floating-point). */
3994 else if (REG_P (folded_arg0
))
3996 int qty
= REG_QTY (REGNO (folded_arg0
));
3998 if (REGNO_QTY_VALID_P (REGNO (folded_arg0
)))
4000 struct qty_table_elem
*ent
= &qty_table
[qty
];
4002 if ((comparison_dominates_p (ent
->comparison_code
, code
)
4003 || (! FLOAT_MODE_P (mode_arg0
)
4004 && comparison_dominates_p (ent
->comparison_code
,
4005 reverse_condition (code
))))
4006 && (rtx_equal_p (ent
->comparison_const
, folded_arg1
)
4008 && rtx_equal_p (ent
->comparison_const
,
4010 || (REG_P (folded_arg1
)
4011 && (REG_QTY (REGNO (folded_arg1
)) == ent
->comparison_qty
))))
4012 return (comparison_dominates_p (ent
->comparison_code
, code
)
4013 ? true_rtx
: false_rtx
);
4019 /* If we are comparing against zero, see if the first operand is
4020 equivalent to an IOR with a constant. If so, we may be able to
4021 determine the result of this comparison. */
4023 if (const_arg1
== const0_rtx
)
4025 rtx y
= lookup_as_function (folded_arg0
, IOR
);
4029 && (inner_const
= equiv_constant (XEXP (y
, 1))) != 0
4030 && GET_CODE (inner_const
) == CONST_INT
4031 && INTVAL (inner_const
) != 0)
4033 int sign_bitnum
= GET_MODE_BITSIZE (mode_arg0
) - 1;
4034 int has_sign
= (HOST_BITS_PER_WIDE_INT
>= sign_bitnum
4035 && (INTVAL (inner_const
)
4036 & ((HOST_WIDE_INT
) 1 << sign_bitnum
)));
4037 rtx true_rtx
= const_true_rtx
, false_rtx
= const0_rtx
;
4039 #ifdef FLOAT_STORE_FLAG_VALUE
4040 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
4042 true_rtx
= (CONST_DOUBLE_FROM_REAL_VALUE
4043 (FLOAT_STORE_FLAG_VALUE (mode
), mode
));
4044 false_rtx
= CONST0_RTX (mode
);
4069 rtx op0
= const_arg0
? const_arg0
: folded_arg0
;
4070 rtx op1
= const_arg1
? const_arg1
: folded_arg1
;
4071 new = simplify_relational_operation (code
, mode
, mode_arg0
, op0
, op1
);
4076 case RTX_COMM_ARITH
:
4080 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4081 with that LABEL_REF as its second operand. If so, the result is
4082 the first operand of that MINUS. This handles switches with an
4083 ADDR_DIFF_VEC table. */
4084 if (const_arg1
&& GET_CODE (const_arg1
) == LABEL_REF
)
4087 = GET_CODE (folded_arg0
) == MINUS
? folded_arg0
4088 : lookup_as_function (folded_arg0
, MINUS
);
4090 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4091 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg1
, 0))
4094 /* Now try for a CONST of a MINUS like the above. */
4095 if ((y
= (GET_CODE (folded_arg0
) == CONST
? folded_arg0
4096 : lookup_as_function (folded_arg0
, CONST
))) != 0
4097 && GET_CODE (XEXP (y
, 0)) == MINUS
4098 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4099 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg1
, 0))
4100 return XEXP (XEXP (y
, 0), 0);
4103 /* Likewise if the operands are in the other order. */
4104 if (const_arg0
&& GET_CODE (const_arg0
) == LABEL_REF
)
4107 = GET_CODE (folded_arg1
) == MINUS
? folded_arg1
4108 : lookup_as_function (folded_arg1
, MINUS
);
4110 if (y
!= 0 && GET_CODE (XEXP (y
, 1)) == LABEL_REF
4111 && XEXP (XEXP (y
, 1), 0) == XEXP (const_arg0
, 0))
4114 /* Now try for a CONST of a MINUS like the above. */
4115 if ((y
= (GET_CODE (folded_arg1
) == CONST
? folded_arg1
4116 : lookup_as_function (folded_arg1
, CONST
))) != 0
4117 && GET_CODE (XEXP (y
, 0)) == MINUS
4118 && GET_CODE (XEXP (XEXP (y
, 0), 1)) == LABEL_REF
4119 && XEXP (XEXP (XEXP (y
, 0), 1), 0) == XEXP (const_arg0
, 0))
4120 return XEXP (XEXP (y
, 0), 0);
4123 /* If second operand is a register equivalent to a negative
4124 CONST_INT, see if we can find a register equivalent to the
4125 positive constant. Make a MINUS if so. Don't do this for
4126 a non-negative constant since we might then alternate between
4127 choosing positive and negative constants. Having the positive
4128 constant previously-used is the more common case. Be sure
4129 the resulting constant is non-negative; if const_arg1 were
4130 the smallest negative number this would overflow: depending
4131 on the mode, this would either just be the same value (and
4132 hence not save anything) or be incorrect. */
4133 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
4134 && INTVAL (const_arg1
) < 0
4135 /* This used to test
4137 -INTVAL (const_arg1) >= 0
4139 But The Sun V5.0 compilers mis-compiled that test. So
4140 instead we test for the problematic value in a more direct
4141 manner and hope the Sun compilers get it correct. */
4142 && INTVAL (const_arg1
) !=
4143 ((HOST_WIDE_INT
) 1 << (HOST_BITS_PER_WIDE_INT
- 1))
4144 && REG_P (folded_arg1
))
4146 rtx new_const
= GEN_INT (-INTVAL (const_arg1
));
4148 = lookup (new_const
, SAFE_HASH (new_const
, mode
), mode
);
4151 for (p
= p
->first_same_value
; p
; p
= p
->next_same_value
)
4153 return simplify_gen_binary (MINUS
, mode
, folded_arg0
,
4154 canon_reg (p
->exp
, NULL_RTX
));
4159 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4160 If so, produce (PLUS Z C2-C). */
4161 if (const_arg1
!= 0 && GET_CODE (const_arg1
) == CONST_INT
)
4163 rtx y
= lookup_as_function (XEXP (x
, 0), PLUS
);
4164 if (y
&& GET_CODE (XEXP (y
, 1)) == CONST_INT
)
4165 return fold_rtx (plus_constant (copy_rtx (y
),
4166 -INTVAL (const_arg1
)),
4173 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4174 case IOR
: case AND
: case XOR
:
4176 case ASHIFT
: case LSHIFTRT
: case ASHIFTRT
:
4177 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4178 is known to be of similar form, we may be able to replace the
4179 operation with a combined operation. This may eliminate the
4180 intermediate operation if every use is simplified in this way.
4181 Note that the similar optimization done by combine.c only works
4182 if the intermediate operation's result has only one reference. */
4184 if (REG_P (folded_arg0
)
4185 && const_arg1
&& GET_CODE (const_arg1
) == CONST_INT
)
4188 = (code
== ASHIFT
|| code
== ASHIFTRT
|| code
== LSHIFTRT
);
4189 rtx y
= lookup_as_function (folded_arg0
, code
);
4191 enum rtx_code associate_code
;
4195 || 0 == (inner_const
4196 = equiv_constant (fold_rtx (XEXP (y
, 1), 0)))
4197 || GET_CODE (inner_const
) != CONST_INT
4198 /* If we have compiled a statement like
4199 "if (x == (x & mask1))", and now are looking at
4200 "x & mask2", we will have a case where the first operand
4201 of Y is the same as our first operand. Unless we detect
4202 this case, an infinite loop will result. */
4203 || XEXP (y
, 0) == folded_arg0
)
4206 /* Don't associate these operations if they are a PLUS with the
4207 same constant and it is a power of two. These might be doable
4208 with a pre- or post-increment. Similarly for two subtracts of
4209 identical powers of two with post decrement. */
4211 if (code
== PLUS
&& const_arg1
== inner_const
4212 && ((HAVE_PRE_INCREMENT
4213 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4214 || (HAVE_POST_INCREMENT
4215 && exact_log2 (INTVAL (const_arg1
)) >= 0)
4216 || (HAVE_PRE_DECREMENT
4217 && exact_log2 (- INTVAL (const_arg1
)) >= 0)
4218 || (HAVE_POST_DECREMENT
4219 && exact_log2 (- INTVAL (const_arg1
)) >= 0)))
4222 /* Compute the code used to compose the constants. For example,
4223 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4225 associate_code
= (is_shift
|| code
== MINUS
? PLUS
: code
);
4227 new_const
= simplify_binary_operation (associate_code
, mode
,
4228 const_arg1
, inner_const
);
4233 /* If we are associating shift operations, don't let this
4234 produce a shift of the size of the object or larger.
4235 This could occur when we follow a sign-extend by a right
4236 shift on a machine that does a sign-extend as a pair
4239 if (is_shift
&& GET_CODE (new_const
) == CONST_INT
4240 && INTVAL (new_const
) >= GET_MODE_BITSIZE (mode
))
4242 /* As an exception, we can turn an ASHIFTRT of this
4243 form into a shift of the number of bits - 1. */
4244 if (code
== ASHIFTRT
)
4245 new_const
= GEN_INT (GET_MODE_BITSIZE (mode
) - 1);
4250 y
= copy_rtx (XEXP (y
, 0));
4252 /* If Y contains our first operand (the most common way this
4253 can happen is if Y is a MEM), we would do into an infinite
4254 loop if we tried to fold it. So don't in that case. */
4256 if (! reg_mentioned_p (folded_arg0
, y
))
4257 y
= fold_rtx (y
, insn
);
4259 return simplify_gen_binary (code
, mode
, y
, new_const
);
4263 case DIV
: case UDIV
:
4264 /* ??? The associative optimization performed immediately above is
4265 also possible for DIV and UDIV using associate_code of MULT.
4266 However, we would need extra code to verify that the
4267 multiplication does not overflow, that is, there is no overflow
4268 in the calculation of new_const. */
4275 new = simplify_binary_operation (code
, mode
,
4276 const_arg0
? const_arg0
: folded_arg0
,
4277 const_arg1
? const_arg1
: folded_arg1
);
4281 /* (lo_sum (high X) X) is simply X. */
4282 if (code
== LO_SUM
&& const_arg0
!= 0
4283 && GET_CODE (const_arg0
) == HIGH
4284 && rtx_equal_p (XEXP (const_arg0
, 0), const_arg1
))
4289 case RTX_BITFIELD_OPS
:
4290 new = simplify_ternary_operation (code
, mode
, mode_arg0
,
4291 const_arg0
? const_arg0
: folded_arg0
,
4292 const_arg1
? const_arg1
: folded_arg1
,
4293 const_arg2
? const_arg2
: XEXP (x
, 2));
4300 return new ? new : x
;
4303 /* Return a constant value currently equivalent to X.
4304 Return 0 if we don't know one. */
4307 equiv_constant (rtx x
)
4310 && REGNO_QTY_VALID_P (REGNO (x
)))
4312 int x_q
= REG_QTY (REGNO (x
));
4313 struct qty_table_elem
*x_ent
= &qty_table
[x_q
];
4315 if (x_ent
->const_rtx
)
4316 x
= gen_lowpart (GET_MODE (x
), x_ent
->const_rtx
);
4319 if (x
== 0 || CONSTANT_P (x
))
4322 /* If X is a MEM, try to fold it outside the context of any insn to see if
4323 it might be equivalent to a constant. That handles the case where it
4324 is a constant-pool reference. Then try to look it up in the hash table
4325 in case it is something whose value we have seen before. */
4329 struct table_elt
*elt
;
4331 x
= fold_rtx (x
, NULL_RTX
);
4335 elt
= lookup (x
, SAFE_HASH (x
, GET_MODE (x
)), GET_MODE (x
));
4339 for (elt
= elt
->first_same_value
; elt
; elt
= elt
->next_same_value
)
4340 if (elt
->is_const
&& CONSTANT_P (elt
->exp
))
4347 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4348 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4349 least-significant part of X.
4350 MODE specifies how big a part of X to return.
4352 If the requested operation cannot be done, 0 is returned.
4354 This is similar to gen_lowpart_general in emit-rtl.c. */
4357 gen_lowpart_if_possible (enum machine_mode mode
, rtx x
)
4359 rtx result
= gen_lowpart_common (mode
, x
);
4365 /* This is the only other case we handle. */
4369 if (WORDS_BIG_ENDIAN
)
4370 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
4371 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
4372 if (BYTES_BIG_ENDIAN
)
4373 /* Adjust the address so that the address-after-the-data is
4375 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
4376 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
4378 new = adjust_address_nv (x
, mode
, offset
);
4379 if (! memory_address_p (mode
, XEXP (new, 0)))
4388 /* Given INSN, a jump insn, PATH_TAKEN indicates if we are following the "taken"
4389 branch. It will be zero if not.
4391 In certain cases, this can cause us to add an equivalence. For example,
4392 if we are following the taken case of
4394 we can add the fact that `i' and '2' are now equivalent.
4396 In any case, we can record that this comparison was passed. If the same
4397 comparison is seen later, we will know its value. */
4400 record_jump_equiv (rtx insn
, int taken
)
4402 int cond_known_true
;
4405 enum machine_mode mode
, mode0
, mode1
;
4406 int reversed_nonequality
= 0;
4409 /* Ensure this is the right kind of insn. */
4410 if (! any_condjump_p (insn
))
4412 set
= pc_set (insn
);
4414 /* See if this jump condition is known true or false. */
4416 cond_known_true
= (XEXP (SET_SRC (set
), 2) == pc_rtx
);
4418 cond_known_true
= (XEXP (SET_SRC (set
), 1) == pc_rtx
);
4420 /* Get the type of comparison being done and the operands being compared.
4421 If we had to reverse a non-equality condition, record that fact so we
4422 know that it isn't valid for floating-point. */
4423 code
= GET_CODE (XEXP (SET_SRC (set
), 0));
4424 op0
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 0), insn
);
4425 op1
= fold_rtx (XEXP (XEXP (SET_SRC (set
), 0), 1), insn
);
4427 code
= find_comparison_args (code
, &op0
, &op1
, &mode0
, &mode1
);
4428 if (! cond_known_true
)
4430 code
= reversed_comparison_code_parts (code
, op0
, op1
, insn
);
4432 /* Don't remember if we can't find the inverse. */
4433 if (code
== UNKNOWN
)
4437 /* The mode is the mode of the non-constant. */
4439 if (mode1
!= VOIDmode
)
4442 record_jump_cond (code
, mode
, op0
, op1
, reversed_nonequality
);
4445 /* Yet another form of subreg creation. In this case, we want something in
4446 MODE, and we should assume OP has MODE iff it is naturally modeless. */
4449 record_jump_cond_subreg (enum machine_mode mode
, rtx op
)
4451 enum machine_mode op_mode
= GET_MODE (op
);
4452 if (op_mode
== mode
|| op_mode
== VOIDmode
)
4454 return lowpart_subreg (mode
, op
, op_mode
);
4457 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4458 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4459 Make any useful entries we can with that information. Called from
4460 above function and called recursively. */
4463 record_jump_cond (enum rtx_code code
, enum machine_mode mode
, rtx op0
,
4464 rtx op1
, int reversed_nonequality
)
4466 unsigned op0_hash
, op1_hash
;
4467 int op0_in_memory
, op1_in_memory
;
4468 struct table_elt
*op0_elt
, *op1_elt
;
4470 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4471 we know that they are also equal in the smaller mode (this is also
4472 true for all smaller modes whether or not there is a SUBREG, but
4473 is not worth testing for with no SUBREG). */
4475 /* Note that GET_MODE (op0) may not equal MODE. */
4476 if (code
== EQ
&& GET_CODE (op0
) == SUBREG
4477 && (GET_MODE_SIZE (GET_MODE (op0
))
4478 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4480 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4481 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
4483 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
4484 reversed_nonequality
);
4487 if (code
== EQ
&& GET_CODE (op1
) == SUBREG
4488 && (GET_MODE_SIZE (GET_MODE (op1
))
4489 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4491 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4492 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4494 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4495 reversed_nonequality
);
4498 /* Similarly, if this is an NE comparison, and either is a SUBREG
4499 making a smaller mode, we know the whole thing is also NE. */
4501 /* Note that GET_MODE (op0) may not equal MODE;
4502 if we test MODE instead, we can get an infinite recursion
4503 alternating between two modes each wider than MODE. */
4505 if (code
== NE
&& GET_CODE (op0
) == SUBREG
4506 && subreg_lowpart_p (op0
)
4507 && (GET_MODE_SIZE (GET_MODE (op0
))
4508 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0
)))))
4510 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op0
));
4511 rtx tem
= record_jump_cond_subreg (inner_mode
, op1
);
4513 record_jump_cond (code
, mode
, SUBREG_REG (op0
), tem
,
4514 reversed_nonequality
);
4517 if (code
== NE
&& GET_CODE (op1
) == SUBREG
4518 && subreg_lowpart_p (op1
)
4519 && (GET_MODE_SIZE (GET_MODE (op1
))
4520 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1
)))))
4522 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (op1
));
4523 rtx tem
= record_jump_cond_subreg (inner_mode
, op0
);
4525 record_jump_cond (code
, mode
, SUBREG_REG (op1
), tem
,
4526 reversed_nonequality
);
4529 /* Hash both operands. */
4532 hash_arg_in_memory
= 0;
4533 op0_hash
= HASH (op0
, mode
);
4534 op0_in_memory
= hash_arg_in_memory
;
4540 hash_arg_in_memory
= 0;
4541 op1_hash
= HASH (op1
, mode
);
4542 op1_in_memory
= hash_arg_in_memory
;
4547 /* Look up both operands. */
4548 op0_elt
= lookup (op0
, op0_hash
, mode
);
4549 op1_elt
= lookup (op1
, op1_hash
, mode
);
4551 /* If both operands are already equivalent or if they are not in the
4552 table but are identical, do nothing. */
4553 if ((op0_elt
!= 0 && op1_elt
!= 0
4554 && op0_elt
->first_same_value
== op1_elt
->first_same_value
)
4555 || op0
== op1
|| rtx_equal_p (op0
, op1
))
4558 /* If we aren't setting two things equal all we can do is save this
4559 comparison. Similarly if this is floating-point. In the latter
4560 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4561 If we record the equality, we might inadvertently delete code
4562 whose intent was to change -0 to +0. */
4564 if (code
!= EQ
|| FLOAT_MODE_P (GET_MODE (op0
)))
4566 struct qty_table_elem
*ent
;
4569 /* If we reversed a floating-point comparison, if OP0 is not a
4570 register, or if OP1 is neither a register or constant, we can't
4574 op1
= equiv_constant (op1
);
4576 if ((reversed_nonequality
&& FLOAT_MODE_P (mode
))
4577 || !REG_P (op0
) || op1
== 0)
4580 /* Put OP0 in the hash table if it isn't already. This gives it a
4581 new quantity number. */
4584 if (insert_regs (op0
, NULL
, 0))
4586 rehash_using_reg (op0
);
4587 op0_hash
= HASH (op0
, mode
);
4589 /* If OP0 is contained in OP1, this changes its hash code
4590 as well. Faster to rehash than to check, except
4591 for the simple case of a constant. */
4592 if (! CONSTANT_P (op1
))
4593 op1_hash
= HASH (op1
,mode
);
4596 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4597 op0_elt
->in_memory
= op0_in_memory
;
4600 qty
= REG_QTY (REGNO (op0
));
4601 ent
= &qty_table
[qty
];
4603 ent
->comparison_code
= code
;
4606 /* Look it up again--in case op0 and op1 are the same. */
4607 op1_elt
= lookup (op1
, op1_hash
, mode
);
4609 /* Put OP1 in the hash table so it gets a new quantity number. */
4612 if (insert_regs (op1
, NULL
, 0))
4614 rehash_using_reg (op1
);
4615 op1_hash
= HASH (op1
, mode
);
4618 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4619 op1_elt
->in_memory
= op1_in_memory
;
4622 ent
->comparison_const
= NULL_RTX
;
4623 ent
->comparison_qty
= REG_QTY (REGNO (op1
));
4627 ent
->comparison_const
= op1
;
4628 ent
->comparison_qty
= -1;
4634 /* If either side is still missing an equivalence, make it now,
4635 then merge the equivalences. */
4639 if (insert_regs (op0
, NULL
, 0))
4641 rehash_using_reg (op0
);
4642 op0_hash
= HASH (op0
, mode
);
4645 op0_elt
= insert (op0
, NULL
, op0_hash
, mode
);
4646 op0_elt
->in_memory
= op0_in_memory
;
4651 if (insert_regs (op1
, NULL
, 0))
4653 rehash_using_reg (op1
);
4654 op1_hash
= HASH (op1
, mode
);
4657 op1_elt
= insert (op1
, NULL
, op1_hash
, mode
);
4658 op1_elt
->in_memory
= op1_in_memory
;
4661 merge_equiv_classes (op0_elt
, op1_elt
);
4664 /* CSE processing for one instruction.
4665 First simplify sources and addresses of all assignments
4666 in the instruction, using previously-computed equivalents values.
4667 Then install the new sources and destinations in the table
4668 of available values.
4670 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4671 the insn. It means that INSN is inside libcall block. In this
4672 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4674 /* Data on one SET contained in the instruction. */
4678 /* The SET rtx itself. */
4680 /* The SET_SRC of the rtx (the original value, if it is changing). */
4682 /* The hash-table element for the SET_SRC of the SET. */
4683 struct table_elt
*src_elt
;
4684 /* Hash value for the SET_SRC. */
4686 /* Hash value for the SET_DEST. */
4688 /* The SET_DEST, with SUBREG, etc., stripped. */
4690 /* Nonzero if the SET_SRC is in memory. */
4692 /* Nonzero if the SET_SRC contains something
4693 whose value cannot be predicted and understood. */
4695 /* Original machine mode, in case it becomes a CONST_INT.
4696 The size of this field should match the size of the mode
4697 field of struct rtx_def (see rtl.h). */
4698 ENUM_BITFIELD(machine_mode
) mode
: 8;
4699 /* A constant equivalent for SET_SRC, if any. */
4701 /* Original SET_SRC value used for libcall notes. */
4703 /* Hash value of constant equivalent for SET_SRC. */
4704 unsigned src_const_hash
;
4705 /* Table entry for constant equivalent for SET_SRC, if any. */
4706 struct table_elt
*src_const_elt
;
4710 cse_insn (rtx insn
, rtx libcall_insn
)
4712 rtx x
= PATTERN (insn
);
4718 /* Records what this insn does to set CC0. */
4719 rtx this_insn_cc0
= 0;
4720 enum machine_mode this_insn_cc0_mode
= VOIDmode
;
4724 struct table_elt
*src_eqv_elt
= 0;
4725 int src_eqv_volatile
= 0;
4726 int src_eqv_in_memory
= 0;
4727 unsigned src_eqv_hash
= 0;
4729 struct set
*sets
= (struct set
*) 0;
4733 /* Find all the SETs and CLOBBERs in this instruction.
4734 Record all the SETs in the array `set' and count them.
4735 Also determine whether there is a CLOBBER that invalidates
4736 all memory references, or all references at varying addresses. */
4740 for (tem
= CALL_INSN_FUNCTION_USAGE (insn
); tem
; tem
= XEXP (tem
, 1))
4742 if (GET_CODE (XEXP (tem
, 0)) == CLOBBER
)
4743 invalidate (SET_DEST (XEXP (tem
, 0)), VOIDmode
);
4744 XEXP (tem
, 0) = canon_reg (XEXP (tem
, 0), insn
);
4748 if (GET_CODE (x
) == SET
)
4750 sets
= alloca (sizeof (struct set
));
4753 /* Ignore SETs that are unconditional jumps.
4754 They never need cse processing, so this does not hurt.
4755 The reason is not efficiency but rather
4756 so that we can test at the end for instructions
4757 that have been simplified to unconditional jumps
4758 and not be misled by unchanged instructions
4759 that were unconditional jumps to begin with. */
4760 if (SET_DEST (x
) == pc_rtx
4761 && GET_CODE (SET_SRC (x
)) == LABEL_REF
)
4764 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4765 The hard function value register is used only once, to copy to
4766 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4767 Ensure we invalidate the destination register. On the 80386 no
4768 other code would invalidate it since it is a fixed_reg.
4769 We need not check the return of apply_change_group; see canon_reg. */
4771 else if (GET_CODE (SET_SRC (x
)) == CALL
)
4773 canon_reg (SET_SRC (x
), insn
);
4774 apply_change_group ();
4775 fold_rtx (SET_SRC (x
), insn
);
4776 invalidate (SET_DEST (x
), VOIDmode
);
4781 else if (GET_CODE (x
) == PARALLEL
)
4783 int lim
= XVECLEN (x
, 0);
4785 sets
= alloca (lim
* sizeof (struct set
));
4787 /* Find all regs explicitly clobbered in this insn,
4788 and ensure they are not replaced with any other regs
4789 elsewhere in this insn.
4790 When a reg that is clobbered is also used for input,
4791 we should presume that that is for a reason,
4792 and we should not substitute some other register
4793 which is not supposed to be clobbered.
4794 Therefore, this loop cannot be merged into the one below
4795 because a CALL may precede a CLOBBER and refer to the
4796 value clobbered. We must not let a canonicalization do
4797 anything in that case. */
4798 for (i
= 0; i
< lim
; i
++)
4800 rtx y
= XVECEXP (x
, 0, i
);
4801 if (GET_CODE (y
) == CLOBBER
)
4803 rtx clobbered
= XEXP (y
, 0);
4805 if (REG_P (clobbered
)
4806 || GET_CODE (clobbered
) == SUBREG
)
4807 invalidate (clobbered
, VOIDmode
);
4808 else if (GET_CODE (clobbered
) == STRICT_LOW_PART
4809 || GET_CODE (clobbered
) == ZERO_EXTRACT
)
4810 invalidate (XEXP (clobbered
, 0), GET_MODE (clobbered
));
4814 for (i
= 0; i
< lim
; i
++)
4816 rtx y
= XVECEXP (x
, 0, i
);
4817 if (GET_CODE (y
) == SET
)
4819 /* As above, we ignore unconditional jumps and call-insns and
4820 ignore the result of apply_change_group. */
4821 if (GET_CODE (SET_SRC (y
)) == CALL
)
4823 canon_reg (SET_SRC (y
), insn
);
4824 apply_change_group ();
4825 fold_rtx (SET_SRC (y
), insn
);
4826 invalidate (SET_DEST (y
), VOIDmode
);
4828 else if (SET_DEST (y
) == pc_rtx
4829 && GET_CODE (SET_SRC (y
)) == LABEL_REF
)
4832 sets
[n_sets
++].rtl
= y
;
4834 else if (GET_CODE (y
) == CLOBBER
)
4836 /* If we clobber memory, canon the address.
4837 This does nothing when a register is clobbered
4838 because we have already invalidated the reg. */
4839 if (MEM_P (XEXP (y
, 0)))
4840 canon_reg (XEXP (y
, 0), NULL_RTX
);
4842 else if (GET_CODE (y
) == USE
4843 && ! (REG_P (XEXP (y
, 0))
4844 && REGNO (XEXP (y
, 0)) < FIRST_PSEUDO_REGISTER
))
4845 canon_reg (y
, NULL_RTX
);
4846 else if (GET_CODE (y
) == CALL
)
4848 /* The result of apply_change_group can be ignored; see
4850 canon_reg (y
, insn
);
4851 apply_change_group ();
4856 else if (GET_CODE (x
) == CLOBBER
)
4858 if (MEM_P (XEXP (x
, 0)))
4859 canon_reg (XEXP (x
, 0), NULL_RTX
);
4862 /* Canonicalize a USE of a pseudo register or memory location. */
4863 else if (GET_CODE (x
) == USE
4864 && ! (REG_P (XEXP (x
, 0))
4865 && REGNO (XEXP (x
, 0)) < FIRST_PSEUDO_REGISTER
))
4866 canon_reg (XEXP (x
, 0), NULL_RTX
);
4867 else if (GET_CODE (x
) == CALL
)
4869 /* The result of apply_change_group can be ignored; see canon_reg. */
4870 canon_reg (x
, insn
);
4871 apply_change_group ();
4875 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4876 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4877 is handled specially for this case, and if it isn't set, then there will
4878 be no equivalence for the destination. */
4879 if (n_sets
== 1 && REG_NOTES (insn
) != 0
4880 && (tem
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
)) != 0
4881 && (! rtx_equal_p (XEXP (tem
, 0), SET_SRC (sets
[0].rtl
))
4882 || GET_CODE (SET_DEST (sets
[0].rtl
)) == STRICT_LOW_PART
))
4884 src_eqv
= fold_rtx (canon_reg (XEXP (tem
, 0), NULL_RTX
), insn
);
4885 XEXP (tem
, 0) = src_eqv
;
4888 /* Canonicalize sources and addresses of destinations.
4889 We do this in a separate pass to avoid problems when a MATCH_DUP is
4890 present in the insn pattern. In that case, we want to ensure that
4891 we don't break the duplicate nature of the pattern. So we will replace
4892 both operands at the same time. Otherwise, we would fail to find an
4893 equivalent substitution in the loop calling validate_change below.
4895 We used to suppress canonicalization of DEST if it appears in SRC,
4896 but we don't do this any more. */
4898 for (i
= 0; i
< n_sets
; i
++)
4900 rtx dest
= SET_DEST (sets
[i
].rtl
);
4901 rtx src
= SET_SRC (sets
[i
].rtl
);
4902 rtx
new = canon_reg (src
, insn
);
4905 sets
[i
].orig_src
= src
;
4906 if ((REG_P (new) && REG_P (src
)
4907 && ((REGNO (new) < FIRST_PSEUDO_REGISTER
)
4908 != (REGNO (src
) < FIRST_PSEUDO_REGISTER
)))
4909 || (insn_code
= recog_memoized (insn
)) < 0
4910 || insn_data
[insn_code
].n_dups
> 0)
4911 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
4913 SET_SRC (sets
[i
].rtl
) = new;
4915 if (GET_CODE (dest
) == ZERO_EXTRACT
)
4917 validate_change (insn
, &XEXP (dest
, 1),
4918 canon_reg (XEXP (dest
, 1), insn
), 1);
4919 validate_change (insn
, &XEXP (dest
, 2),
4920 canon_reg (XEXP (dest
, 2), insn
), 1);
4923 while (GET_CODE (dest
) == SUBREG
4924 || GET_CODE (dest
) == ZERO_EXTRACT
4925 || GET_CODE (dest
) == STRICT_LOW_PART
)
4926 dest
= XEXP (dest
, 0);
4929 canon_reg (dest
, insn
);
4932 /* Now that we have done all the replacements, we can apply the change
4933 group and see if they all work. Note that this will cause some
4934 canonicalizations that would have worked individually not to be applied
4935 because some other canonicalization didn't work, but this should not
4938 The result of apply_change_group can be ignored; see canon_reg. */
4940 apply_change_group ();
4942 /* Set sets[i].src_elt to the class each source belongs to.
4943 Detect assignments from or to volatile things
4944 and set set[i] to zero so they will be ignored
4945 in the rest of this function.
4947 Nothing in this loop changes the hash table or the register chains. */
4949 for (i
= 0; i
< n_sets
; i
++)
4953 struct table_elt
*elt
= 0, *p
;
4954 enum machine_mode mode
;
4957 rtx src_related
= 0;
4958 struct table_elt
*src_const_elt
= 0;
4959 int src_cost
= MAX_COST
;
4960 int src_eqv_cost
= MAX_COST
;
4961 int src_folded_cost
= MAX_COST
;
4962 int src_related_cost
= MAX_COST
;
4963 int src_elt_cost
= MAX_COST
;
4964 int src_regcost
= MAX_COST
;
4965 int src_eqv_regcost
= MAX_COST
;
4966 int src_folded_regcost
= MAX_COST
;
4967 int src_related_regcost
= MAX_COST
;
4968 int src_elt_regcost
= MAX_COST
;
4969 /* Set nonzero if we need to call force_const_mem on with the
4970 contents of src_folded before using it. */
4971 int src_folded_force_flag
= 0;
4973 dest
= SET_DEST (sets
[i
].rtl
);
4974 src
= SET_SRC (sets
[i
].rtl
);
4976 /* If SRC is a constant that has no machine mode,
4977 hash it with the destination's machine mode.
4978 This way we can keep different modes separate. */
4980 mode
= GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
4981 sets
[i
].mode
= mode
;
4985 enum machine_mode eqvmode
= mode
;
4986 if (GET_CODE (dest
) == STRICT_LOW_PART
)
4987 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
4989 hash_arg_in_memory
= 0;
4990 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
4992 /* Find the equivalence class for the equivalent expression. */
4995 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, eqvmode
);
4997 src_eqv_volatile
= do_not_record
;
4998 src_eqv_in_memory
= hash_arg_in_memory
;
5001 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5002 value of the INNER register, not the destination. So it is not
5003 a valid substitution for the source. But save it for later. */
5004 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5007 src_eqv_here
= src_eqv
;
5009 /* Simplify and foldable subexpressions in SRC. Then get the fully-
5010 simplified result, which may not necessarily be valid. */
5011 src_folded
= fold_rtx (src
, insn
);
5014 /* ??? This caused bad code to be generated for the m68k port with -O2.
5015 Suppose src is (CONST_INT -1), and that after truncation src_folded
5016 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5017 At the end we will add src and src_const to the same equivalence
5018 class. We now have 3 and -1 on the same equivalence class. This
5019 causes later instructions to be mis-optimized. */
5020 /* If storing a constant in a bitfield, pre-truncate the constant
5021 so we will be able to record it later. */
5022 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5024 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5026 if (GET_CODE (src
) == CONST_INT
5027 && GET_CODE (width
) == CONST_INT
5028 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5029 && (INTVAL (src
) & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5031 = GEN_INT (INTVAL (src
) & (((HOST_WIDE_INT
) 1
5032 << INTVAL (width
)) - 1));
5036 /* Compute SRC's hash code, and also notice if it
5037 should not be recorded at all. In that case,
5038 prevent any further processing of this assignment. */
5040 hash_arg_in_memory
= 0;
5043 sets
[i
].src_hash
= HASH (src
, mode
);
5044 sets
[i
].src_volatile
= do_not_record
;
5045 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5047 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5048 a pseudo, do not record SRC. Using SRC as a replacement for
5049 anything else will be incorrect in that situation. Note that
5050 this usually occurs only for stack slots, in which case all the
5051 RTL would be referring to SRC, so we don't lose any optimization
5052 opportunities by not having SRC in the hash table. */
5055 && find_reg_note (insn
, REG_EQUIV
, NULL_RTX
) != 0
5057 && REGNO (dest
) >= FIRST_PSEUDO_REGISTER
)
5058 sets
[i
].src_volatile
= 1;
5061 /* It is no longer clear why we used to do this, but it doesn't
5062 appear to still be needed. So let's try without it since this
5063 code hurts cse'ing widened ops. */
5064 /* If source is a paradoxical subreg (such as QI treated as an SI),
5065 treat it as volatile. It may do the work of an SI in one context
5066 where the extra bits are not being used, but cannot replace an SI
5068 if (GET_CODE (src
) == SUBREG
5069 && (GET_MODE_SIZE (GET_MODE (src
))
5070 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))))
5071 sets
[i
].src_volatile
= 1;
5074 /* Locate all possible equivalent forms for SRC. Try to replace
5075 SRC in the insn with each cheaper equivalent.
5077 We have the following types of equivalents: SRC itself, a folded
5078 version, a value given in a REG_EQUAL note, or a value related
5081 Each of these equivalents may be part of an additional class
5082 of equivalents (if more than one is in the table, they must be in
5083 the same class; we check for this).
5085 If the source is volatile, we don't do any table lookups.
5087 We note any constant equivalent for possible later use in a
5090 if (!sets
[i
].src_volatile
)
5091 elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5093 sets
[i
].src_elt
= elt
;
5095 if (elt
&& src_eqv_here
&& src_eqv_elt
)
5097 if (elt
->first_same_value
!= src_eqv_elt
->first_same_value
)
5099 /* The REG_EQUAL is indicating that two formerly distinct
5100 classes are now equivalent. So merge them. */
5101 merge_equiv_classes (elt
, src_eqv_elt
);
5102 src_eqv_hash
= HASH (src_eqv
, elt
->mode
);
5103 src_eqv_elt
= lookup (src_eqv
, src_eqv_hash
, elt
->mode
);
5109 else if (src_eqv_elt
)
5112 /* Try to find a constant somewhere and record it in `src_const'.
5113 Record its table element, if any, in `src_const_elt'. Look in
5114 any known equivalences first. (If the constant is not in the
5115 table, also set `sets[i].src_const_hash'). */
5117 for (p
= elt
->first_same_value
; p
; p
= p
->next_same_value
)
5121 src_const_elt
= elt
;
5126 && (CONSTANT_P (src_folded
)
5127 /* Consider (minus (label_ref L1) (label_ref L2)) as
5128 "constant" here so we will record it. This allows us
5129 to fold switch statements when an ADDR_DIFF_VEC is used. */
5130 || (GET_CODE (src_folded
) == MINUS
5131 && GET_CODE (XEXP (src_folded
, 0)) == LABEL_REF
5132 && GET_CODE (XEXP (src_folded
, 1)) == LABEL_REF
)))
5133 src_const
= src_folded
, src_const_elt
= elt
;
5134 else if (src_const
== 0 && src_eqv_here
&& CONSTANT_P (src_eqv_here
))
5135 src_const
= src_eqv_here
, src_const_elt
= src_eqv_elt
;
5137 /* If we don't know if the constant is in the table, get its
5138 hash code and look it up. */
5139 if (src_const
&& src_const_elt
== 0)
5141 sets
[i
].src_const_hash
= HASH (src_const
, mode
);
5142 src_const_elt
= lookup (src_const
, sets
[i
].src_const_hash
, mode
);
5145 sets
[i
].src_const
= src_const
;
5146 sets
[i
].src_const_elt
= src_const_elt
;
5148 /* If the constant and our source are both in the table, mark them as
5149 equivalent. Otherwise, if a constant is in the table but the source
5150 isn't, set ELT to it. */
5151 if (src_const_elt
&& elt
5152 && src_const_elt
->first_same_value
!= elt
->first_same_value
)
5153 merge_equiv_classes (elt
, src_const_elt
);
5154 else if (src_const_elt
&& elt
== 0)
5155 elt
= src_const_elt
;
5157 /* See if there is a register linearly related to a constant
5158 equivalent of SRC. */
5160 && (GET_CODE (src_const
) == CONST
5161 || (src_const_elt
&& src_const_elt
->related_value
!= 0)))
5163 src_related
= use_related_value (src_const
, src_const_elt
);
5166 struct table_elt
*src_related_elt
5167 = lookup (src_related
, HASH (src_related
, mode
), mode
);
5168 if (src_related_elt
&& elt
)
5170 if (elt
->first_same_value
5171 != src_related_elt
->first_same_value
)
5172 /* This can occur when we previously saw a CONST
5173 involving a SYMBOL_REF and then see the SYMBOL_REF
5174 twice. Merge the involved classes. */
5175 merge_equiv_classes (elt
, src_related_elt
);
5178 src_related_elt
= 0;
5180 else if (src_related_elt
&& elt
== 0)
5181 elt
= src_related_elt
;
5185 /* See if we have a CONST_INT that is already in a register in a
5188 if (src_const
&& src_related
== 0 && GET_CODE (src_const
) == CONST_INT
5189 && GET_MODE_CLASS (mode
) == MODE_INT
5190 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
5192 enum machine_mode wider_mode
;
5194 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
5195 GET_MODE_BITSIZE (wider_mode
) <= BITS_PER_WORD
5196 && src_related
== 0;
5197 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
5199 struct table_elt
*const_elt
5200 = lookup (src_const
, HASH (src_const
, wider_mode
), wider_mode
);
5205 for (const_elt
= const_elt
->first_same_value
;
5206 const_elt
; const_elt
= const_elt
->next_same_value
)
5207 if (REG_P (const_elt
->exp
))
5209 src_related
= gen_lowpart (mode
,
5216 /* Another possibility is that we have an AND with a constant in
5217 a mode narrower than a word. If so, it might have been generated
5218 as part of an "if" which would narrow the AND. If we already
5219 have done the AND in a wider mode, we can use a SUBREG of that
5222 if (flag_expensive_optimizations
&& ! src_related
5223 && GET_CODE (src
) == AND
&& GET_CODE (XEXP (src
, 1)) == CONST_INT
5224 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5226 enum machine_mode tmode
;
5227 rtx new_and
= gen_rtx_AND (VOIDmode
, NULL_RTX
, XEXP (src
, 1));
5229 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5230 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5231 tmode
= GET_MODE_WIDER_MODE (tmode
))
5233 rtx inner
= gen_lowpart (tmode
, XEXP (src
, 0));
5234 struct table_elt
*larger_elt
;
5238 PUT_MODE (new_and
, tmode
);
5239 XEXP (new_and
, 0) = inner
;
5240 larger_elt
= lookup (new_and
, HASH (new_and
, tmode
), tmode
);
5241 if (larger_elt
== 0)
5244 for (larger_elt
= larger_elt
->first_same_value
;
5245 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5246 if (REG_P (larger_elt
->exp
))
5249 = gen_lowpart (mode
, larger_elt
->exp
);
5259 #ifdef LOAD_EXTEND_OP
5260 /* See if a MEM has already been loaded with a widening operation;
5261 if it has, we can use a subreg of that. Many CISC machines
5262 also have such operations, but this is only likely to be
5263 beneficial on these machines. */
5265 if (flag_expensive_optimizations
&& src_related
== 0
5266 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
5267 && GET_MODE_CLASS (mode
) == MODE_INT
5268 && MEM_P (src
) && ! do_not_record
5269 && LOAD_EXTEND_OP (mode
) != UNKNOWN
)
5271 struct rtx_def memory_extend_buf
;
5272 rtx memory_extend_rtx
= &memory_extend_buf
;
5273 enum machine_mode tmode
;
5275 /* Set what we are trying to extend and the operation it might
5276 have been extended with. */
5277 memset (memory_extend_rtx
, 0, sizeof(*memory_extend_rtx
));
5278 PUT_CODE (memory_extend_rtx
, LOAD_EXTEND_OP (mode
));
5279 XEXP (memory_extend_rtx
, 0) = src
;
5281 for (tmode
= GET_MODE_WIDER_MODE (mode
);
5282 GET_MODE_SIZE (tmode
) <= UNITS_PER_WORD
;
5283 tmode
= GET_MODE_WIDER_MODE (tmode
))
5285 struct table_elt
*larger_elt
;
5287 PUT_MODE (memory_extend_rtx
, tmode
);
5288 larger_elt
= lookup (memory_extend_rtx
,
5289 HASH (memory_extend_rtx
, tmode
), tmode
);
5290 if (larger_elt
== 0)
5293 for (larger_elt
= larger_elt
->first_same_value
;
5294 larger_elt
; larger_elt
= larger_elt
->next_same_value
)
5295 if (REG_P (larger_elt
->exp
))
5297 src_related
= gen_lowpart (mode
,
5306 #endif /* LOAD_EXTEND_OP */
5308 if (src
== src_folded
)
5311 /* At this point, ELT, if nonzero, points to a class of expressions
5312 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5313 and SRC_RELATED, if nonzero, each contain additional equivalent
5314 expressions. Prune these latter expressions by deleting expressions
5315 already in the equivalence class.
5317 Check for an equivalent identical to the destination. If found,
5318 this is the preferred equivalent since it will likely lead to
5319 elimination of the insn. Indicate this by placing it in
5323 elt
= elt
->first_same_value
;
5324 for (p
= elt
; p
; p
= p
->next_same_value
)
5326 enum rtx_code code
= GET_CODE (p
->exp
);
5328 /* If the expression is not valid, ignore it. Then we do not
5329 have to check for validity below. In most cases, we can use
5330 `rtx_equal_p', since canonicalization has already been done. */
5331 if (code
!= REG
&& ! exp_equiv_p (p
->exp
, p
->exp
, 1, false))
5334 /* Also skip paradoxical subregs, unless that's what we're
5337 && (GET_MODE_SIZE (GET_MODE (p
->exp
))
5338 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))
5340 && GET_CODE (src
) == SUBREG
5341 && GET_MODE (src
) == GET_MODE (p
->exp
)
5342 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5343 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p
->exp
))))))
5346 if (src
&& GET_CODE (src
) == code
&& rtx_equal_p (src
, p
->exp
))
5348 else if (src_folded
&& GET_CODE (src_folded
) == code
5349 && rtx_equal_p (src_folded
, p
->exp
))
5351 else if (src_eqv_here
&& GET_CODE (src_eqv_here
) == code
5352 && rtx_equal_p (src_eqv_here
, p
->exp
))
5354 else if (src_related
&& GET_CODE (src_related
) == code
5355 && rtx_equal_p (src_related
, p
->exp
))
5358 /* This is the same as the destination of the insns, we want
5359 to prefer it. Copy it to src_related. The code below will
5360 then give it a negative cost. */
5361 if (GET_CODE (dest
) == code
&& rtx_equal_p (p
->exp
, dest
))
5365 /* Find the cheapest valid equivalent, trying all the available
5366 possibilities. Prefer items not in the hash table to ones
5367 that are when they are equal cost. Note that we can never
5368 worsen an insn as the current contents will also succeed.
5369 If we find an equivalent identical to the destination, use it as best,
5370 since this insn will probably be eliminated in that case. */
5373 if (rtx_equal_p (src
, dest
))
5374 src_cost
= src_regcost
= -1;
5377 src_cost
= COST (src
);
5378 src_regcost
= approx_reg_cost (src
);
5384 if (rtx_equal_p (src_eqv_here
, dest
))
5385 src_eqv_cost
= src_eqv_regcost
= -1;
5388 src_eqv_cost
= COST (src_eqv_here
);
5389 src_eqv_regcost
= approx_reg_cost (src_eqv_here
);
5395 if (rtx_equal_p (src_folded
, dest
))
5396 src_folded_cost
= src_folded_regcost
= -1;
5399 src_folded_cost
= COST (src_folded
);
5400 src_folded_regcost
= approx_reg_cost (src_folded
);
5406 if (rtx_equal_p (src_related
, dest
))
5407 src_related_cost
= src_related_regcost
= -1;
5410 src_related_cost
= COST (src_related
);
5411 src_related_regcost
= approx_reg_cost (src_related
);
5415 /* If this was an indirect jump insn, a known label will really be
5416 cheaper even though it looks more expensive. */
5417 if (dest
== pc_rtx
&& src_const
&& GET_CODE (src_const
) == LABEL_REF
)
5418 src_folded
= src_const
, src_folded_cost
= src_folded_regcost
= -1;
5420 /* Terminate loop when replacement made. This must terminate since
5421 the current contents will be tested and will always be valid. */
5426 /* Skip invalid entries. */
5427 while (elt
&& !REG_P (elt
->exp
)
5428 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
5429 elt
= elt
->next_same_value
;
5431 /* A paradoxical subreg would be bad here: it'll be the right
5432 size, but later may be adjusted so that the upper bits aren't
5433 what we want. So reject it. */
5435 && GET_CODE (elt
->exp
) == SUBREG
5436 && (GET_MODE_SIZE (GET_MODE (elt
->exp
))
5437 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))
5438 /* It is okay, though, if the rtx we're trying to match
5439 will ignore any of the bits we can't predict. */
5441 && GET_CODE (src
) == SUBREG
5442 && GET_MODE (src
) == GET_MODE (elt
->exp
)
5443 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src
)))
5444 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt
->exp
))))))
5446 elt
= elt
->next_same_value
;
5452 src_elt_cost
= elt
->cost
;
5453 src_elt_regcost
= elt
->regcost
;
5456 /* Find cheapest and skip it for the next time. For items
5457 of equal cost, use this order:
5458 src_folded, src, src_eqv, src_related and hash table entry. */
5460 && preferable (src_folded_cost
, src_folded_regcost
,
5461 src_cost
, src_regcost
) <= 0
5462 && preferable (src_folded_cost
, src_folded_regcost
,
5463 src_eqv_cost
, src_eqv_regcost
) <= 0
5464 && preferable (src_folded_cost
, src_folded_regcost
,
5465 src_related_cost
, src_related_regcost
) <= 0
5466 && preferable (src_folded_cost
, src_folded_regcost
,
5467 src_elt_cost
, src_elt_regcost
) <= 0)
5469 trial
= src_folded
, src_folded_cost
= MAX_COST
;
5470 if (src_folded_force_flag
)
5472 rtx forced
= force_const_mem (mode
, trial
);
5478 && preferable (src_cost
, src_regcost
,
5479 src_eqv_cost
, src_eqv_regcost
) <= 0
5480 && preferable (src_cost
, src_regcost
,
5481 src_related_cost
, src_related_regcost
) <= 0
5482 && preferable (src_cost
, src_regcost
,
5483 src_elt_cost
, src_elt_regcost
) <= 0)
5484 trial
= src
, src_cost
= MAX_COST
;
5485 else if (src_eqv_here
5486 && preferable (src_eqv_cost
, src_eqv_regcost
,
5487 src_related_cost
, src_related_regcost
) <= 0
5488 && preferable (src_eqv_cost
, src_eqv_regcost
,
5489 src_elt_cost
, src_elt_regcost
) <= 0)
5490 trial
= copy_rtx (src_eqv_here
), src_eqv_cost
= MAX_COST
;
5491 else if (src_related
5492 && preferable (src_related_cost
, src_related_regcost
,
5493 src_elt_cost
, src_elt_regcost
) <= 0)
5494 trial
= copy_rtx (src_related
), src_related_cost
= MAX_COST
;
5497 trial
= copy_rtx (elt
->exp
);
5498 elt
= elt
->next_same_value
;
5499 src_elt_cost
= MAX_COST
;
5502 /* We don't normally have an insn matching (set (pc) (pc)), so
5503 check for this separately here. We will delete such an
5506 For other cases such as a table jump or conditional jump
5507 where we know the ultimate target, go ahead and replace the
5508 operand. While that may not make a valid insn, we will
5509 reemit the jump below (and also insert any necessary
5511 if (n_sets
== 1 && dest
== pc_rtx
5513 || (GET_CODE (trial
) == LABEL_REF
5514 && ! condjump_p (insn
))))
5516 /* Don't substitute non-local labels, this confuses CFG. */
5517 if (GET_CODE (trial
) == LABEL_REF
5518 && LABEL_REF_NONLOCAL_P (trial
))
5521 SET_SRC (sets
[i
].rtl
) = trial
;
5522 cse_jumps_altered
= 1;
5526 /* Look for a substitution that makes a valid insn. */
5527 else if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), trial
, 0))
5529 rtx
new = canon_reg (SET_SRC (sets
[i
].rtl
), insn
);
5531 /* If we just made a substitution inside a libcall, then we
5532 need to make the same substitution in any notes attached
5533 to the RETVAL insn. */
5535 && (REG_P (sets
[i
].orig_src
)
5536 || GET_CODE (sets
[i
].orig_src
) == SUBREG
5537 || MEM_P (sets
[i
].orig_src
)))
5539 rtx note
= find_reg_equal_equiv_note (libcall_insn
);
5541 XEXP (note
, 0) = simplify_replace_rtx (XEXP (note
, 0),
5546 /* The result of apply_change_group can be ignored; see
5549 validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new, 1);
5550 apply_change_group ();
5554 /* If we previously found constant pool entries for
5555 constants and this is a constant, try making a
5556 pool entry. Put it in src_folded unless we already have done
5557 this since that is where it likely came from. */
5559 else if (constant_pool_entries_cost
5560 && CONSTANT_P (trial
)
5561 /* Reject cases that will abort in decode_rtx_const.
5562 On the alpha when simplifying a switch, we get
5563 (const (truncate (minus (label_ref) (label_ref)))). */
5564 && ! (GET_CODE (trial
) == CONST
5565 && GET_CODE (XEXP (trial
, 0)) == TRUNCATE
)
5566 /* Likewise on IA-64, except without the truncate. */
5567 && ! (GET_CODE (trial
) == CONST
5568 && GET_CODE (XEXP (trial
, 0)) == MINUS
5569 && GET_CODE (XEXP (XEXP (trial
, 0), 0)) == LABEL_REF
5570 && GET_CODE (XEXP (XEXP (trial
, 0), 1)) == LABEL_REF
)
5572 || (!MEM_P (src_folded
)
5573 && ! src_folded_force_flag
))
5574 && GET_MODE_CLASS (mode
) != MODE_CC
5575 && mode
!= VOIDmode
)
5577 src_folded_force_flag
= 1;
5579 src_folded_cost
= constant_pool_entries_cost
;
5580 src_folded_regcost
= constant_pool_entries_regcost
;
5584 src
= SET_SRC (sets
[i
].rtl
);
5586 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5587 However, there is an important exception: If both are registers
5588 that are not the head of their equivalence class, replace SET_SRC
5589 with the head of the class. If we do not do this, we will have
5590 both registers live over a portion of the basic block. This way,
5591 their lifetimes will likely abut instead of overlapping. */
5593 && REGNO_QTY_VALID_P (REGNO (dest
)))
5595 int dest_q
= REG_QTY (REGNO (dest
));
5596 struct qty_table_elem
*dest_ent
= &qty_table
[dest_q
];
5598 if (dest_ent
->mode
== GET_MODE (dest
)
5599 && dest_ent
->first_reg
!= REGNO (dest
)
5600 && REG_P (src
) && REGNO (src
) == REGNO (dest
)
5601 /* Don't do this if the original insn had a hard reg as
5602 SET_SRC or SET_DEST. */
5603 && (!REG_P (sets
[i
].src
)
5604 || REGNO (sets
[i
].src
) >= FIRST_PSEUDO_REGISTER
)
5605 && (!REG_P (dest
) || REGNO (dest
) >= FIRST_PSEUDO_REGISTER
))
5606 /* We can't call canon_reg here because it won't do anything if
5607 SRC is a hard register. */
5609 int src_q
= REG_QTY (REGNO (src
));
5610 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
5611 int first
= src_ent
->first_reg
;
5613 = (first
>= FIRST_PSEUDO_REGISTER
5614 ? regno_reg_rtx
[first
] : gen_rtx_REG (GET_MODE (src
), first
));
5616 /* We must use validate-change even for this, because this
5617 might be a special no-op instruction, suitable only to
5619 if (validate_change (insn
, &SET_SRC (sets
[i
].rtl
), new_src
, 0))
5622 /* If we had a constant that is cheaper than what we are now
5623 setting SRC to, use that constant. We ignored it when we
5624 thought we could make this into a no-op. */
5625 if (src_const
&& COST (src_const
) < COST (src
)
5626 && validate_change (insn
, &SET_SRC (sets
[i
].rtl
),
5633 /* If we made a change, recompute SRC values. */
5634 if (src
!= sets
[i
].src
)
5638 hash_arg_in_memory
= 0;
5640 sets
[i
].src_hash
= HASH (src
, mode
);
5641 sets
[i
].src_volatile
= do_not_record
;
5642 sets
[i
].src_in_memory
= hash_arg_in_memory
;
5643 sets
[i
].src_elt
= lookup (src
, sets
[i
].src_hash
, mode
);
5646 /* If this is a single SET, we are setting a register, and we have an
5647 equivalent constant, we want to add a REG_NOTE. We don't want
5648 to write a REG_EQUAL note for a constant pseudo since verifying that
5649 that pseudo hasn't been eliminated is a pain. Such a note also
5650 won't help anything.
5652 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5653 which can be created for a reference to a compile time computable
5654 entry in a jump table. */
5656 if (n_sets
== 1 && src_const
&& REG_P (dest
)
5657 && !REG_P (src_const
)
5658 && ! (GET_CODE (src_const
) == CONST
5659 && GET_CODE (XEXP (src_const
, 0)) == MINUS
5660 && GET_CODE (XEXP (XEXP (src_const
, 0), 0)) == LABEL_REF
5661 && GET_CODE (XEXP (XEXP (src_const
, 0), 1)) == LABEL_REF
))
5663 /* We only want a REG_EQUAL note if src_const != src. */
5664 if (! rtx_equal_p (src
, src_const
))
5666 /* Make sure that the rtx is not shared. */
5667 src_const
= copy_rtx (src_const
);
5669 /* Record the actual constant value in a REG_EQUAL note,
5670 making a new one if one does not already exist. */
5671 set_unique_reg_note (insn
, REG_EQUAL
, src_const
);
5675 /* Now deal with the destination. */
5678 /* Look within any ZERO_EXTRACT to the MEM or REG within it. */
5679 while (GET_CODE (dest
) == SUBREG
5680 || GET_CODE (dest
) == ZERO_EXTRACT
5681 || GET_CODE (dest
) == STRICT_LOW_PART
)
5682 dest
= XEXP (dest
, 0);
5684 sets
[i
].inner_dest
= dest
;
5688 #ifdef PUSH_ROUNDING
5689 /* Stack pushes invalidate the stack pointer. */
5690 rtx addr
= XEXP (dest
, 0);
5691 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
5692 && XEXP (addr
, 0) == stack_pointer_rtx
)
5693 invalidate (stack_pointer_rtx
, Pmode
);
5695 dest
= fold_rtx (dest
, insn
);
5698 /* Compute the hash code of the destination now,
5699 before the effects of this instruction are recorded,
5700 since the register values used in the address computation
5701 are those before this instruction. */
5702 sets
[i
].dest_hash
= HASH (dest
, mode
);
5704 /* Don't enter a bit-field in the hash table
5705 because the value in it after the store
5706 may not equal what was stored, due to truncation. */
5708 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == ZERO_EXTRACT
)
5710 rtx width
= XEXP (SET_DEST (sets
[i
].rtl
), 1);
5712 if (src_const
!= 0 && GET_CODE (src_const
) == CONST_INT
5713 && GET_CODE (width
) == CONST_INT
5714 && INTVAL (width
) < HOST_BITS_PER_WIDE_INT
5715 && ! (INTVAL (src_const
)
5716 & ((HOST_WIDE_INT
) (-1) << INTVAL (width
))))
5717 /* Exception: if the value is constant,
5718 and it won't be truncated, record it. */
5722 /* This is chosen so that the destination will be invalidated
5723 but no new value will be recorded.
5724 We must invalidate because sometimes constant
5725 values can be recorded for bitfields. */
5726 sets
[i
].src_elt
= 0;
5727 sets
[i
].src_volatile
= 1;
5733 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5735 else if (n_sets
== 1 && dest
== pc_rtx
&& src
== pc_rtx
)
5737 /* One less use of the label this insn used to jump to. */
5739 cse_jumps_altered
= 1;
5740 /* No more processing for this set. */
5744 /* If this SET is now setting PC to a label, we know it used to
5745 be a conditional or computed branch. */
5746 else if (dest
== pc_rtx
&& GET_CODE (src
) == LABEL_REF
5747 && !LABEL_REF_NONLOCAL_P (src
))
5749 /* Now emit a BARRIER after the unconditional jump. */
5750 if (NEXT_INSN (insn
) == 0
5751 || !BARRIER_P (NEXT_INSN (insn
)))
5752 emit_barrier_after (insn
);
5754 /* We reemit the jump in as many cases as possible just in
5755 case the form of an unconditional jump is significantly
5756 different than a computed jump or conditional jump.
5758 If this insn has multiple sets, then reemitting the
5759 jump is nontrivial. So instead we just force rerecognition
5760 and hope for the best. */
5765 new = emit_jump_insn_after (gen_jump (XEXP (src
, 0)), insn
);
5766 JUMP_LABEL (new) = XEXP (src
, 0);
5767 LABEL_NUSES (XEXP (src
, 0))++;
5769 /* Make sure to copy over REG_NON_LOCAL_GOTO. */
5770 note
= find_reg_note (insn
, REG_NON_LOCAL_GOTO
, 0);
5773 XEXP (note
, 1) = NULL_RTX
;
5774 REG_NOTES (new) = note
;
5780 /* Now emit a BARRIER after the unconditional jump. */
5781 if (NEXT_INSN (insn
) == 0
5782 || !BARRIER_P (NEXT_INSN (insn
)))
5783 emit_barrier_after (insn
);
5786 INSN_CODE (insn
) = -1;
5788 /* Do not bother deleting any unreachable code,
5789 let jump/flow do that. */
5791 cse_jumps_altered
= 1;
5795 /* If destination is volatile, invalidate it and then do no further
5796 processing for this assignment. */
5798 else if (do_not_record
)
5800 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5801 invalidate (dest
, VOIDmode
);
5802 else if (MEM_P (dest
))
5803 invalidate (dest
, VOIDmode
);
5804 else if (GET_CODE (dest
) == STRICT_LOW_PART
5805 || GET_CODE (dest
) == ZERO_EXTRACT
)
5806 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5810 if (sets
[i
].rtl
!= 0 && dest
!= SET_DEST (sets
[i
].rtl
))
5811 sets
[i
].dest_hash
= HASH (SET_DEST (sets
[i
].rtl
), mode
);
5814 /* If setting CC0, record what it was set to, or a constant, if it
5815 is equivalent to a constant. If it is being set to a floating-point
5816 value, make a COMPARE with the appropriate constant of 0. If we
5817 don't do this, later code can interpret this as a test against
5818 const0_rtx, which can cause problems if we try to put it into an
5819 insn as a floating-point operand. */
5820 if (dest
== cc0_rtx
)
5822 this_insn_cc0
= src_const
&& mode
!= VOIDmode
? src_const
: src
;
5823 this_insn_cc0_mode
= mode
;
5824 if (FLOAT_MODE_P (mode
))
5825 this_insn_cc0
= gen_rtx_COMPARE (VOIDmode
, this_insn_cc0
,
5831 /* Now enter all non-volatile source expressions in the hash table
5832 if they are not already present.
5833 Record their equivalence classes in src_elt.
5834 This way we can insert the corresponding destinations into
5835 the same classes even if the actual sources are no longer in them
5836 (having been invalidated). */
5838 if (src_eqv
&& src_eqv_elt
== 0 && sets
[0].rtl
!= 0 && ! src_eqv_volatile
5839 && ! rtx_equal_p (src_eqv
, SET_DEST (sets
[0].rtl
)))
5841 struct table_elt
*elt
;
5842 struct table_elt
*classp
= sets
[0].src_elt
;
5843 rtx dest
= SET_DEST (sets
[0].rtl
);
5844 enum machine_mode eqvmode
= GET_MODE (dest
);
5846 if (GET_CODE (dest
) == STRICT_LOW_PART
)
5848 eqvmode
= GET_MODE (SUBREG_REG (XEXP (dest
, 0)));
5851 if (insert_regs (src_eqv
, classp
, 0))
5853 rehash_using_reg (src_eqv
);
5854 src_eqv_hash
= HASH (src_eqv
, eqvmode
);
5856 elt
= insert (src_eqv
, classp
, src_eqv_hash
, eqvmode
);
5857 elt
->in_memory
= src_eqv_in_memory
;
5860 /* Check to see if src_eqv_elt is the same as a set source which
5861 does not yet have an elt, and if so set the elt of the set source
5863 for (i
= 0; i
< n_sets
; i
++)
5864 if (sets
[i
].rtl
&& sets
[i
].src_elt
== 0
5865 && rtx_equal_p (SET_SRC (sets
[i
].rtl
), src_eqv
))
5866 sets
[i
].src_elt
= src_eqv_elt
;
5869 for (i
= 0; i
< n_sets
; i
++)
5870 if (sets
[i
].rtl
&& ! sets
[i
].src_volatile
5871 && ! rtx_equal_p (SET_SRC (sets
[i
].rtl
), SET_DEST (sets
[i
].rtl
)))
5873 if (GET_CODE (SET_DEST (sets
[i
].rtl
)) == STRICT_LOW_PART
)
5875 /* REG_EQUAL in setting a STRICT_LOW_PART
5876 gives an equivalent for the entire destination register,
5877 not just for the subreg being stored in now.
5878 This is a more interesting equivalence, so we arrange later
5879 to treat the entire reg as the destination. */
5880 sets
[i
].src_elt
= src_eqv_elt
;
5881 sets
[i
].src_hash
= src_eqv_hash
;
5885 /* Insert source and constant equivalent into hash table, if not
5887 struct table_elt
*classp
= src_eqv_elt
;
5888 rtx src
= sets
[i
].src
;
5889 rtx dest
= SET_DEST (sets
[i
].rtl
);
5890 enum machine_mode mode
5891 = GET_MODE (src
) == VOIDmode
? GET_MODE (dest
) : GET_MODE (src
);
5893 /* It's possible that we have a source value known to be
5894 constant but don't have a REG_EQUAL note on the insn.
5895 Lack of a note will mean src_eqv_elt will be NULL. This
5896 can happen where we've generated a SUBREG to access a
5897 CONST_INT that is already in a register in a wider mode.
5898 Ensure that the source expression is put in the proper
5901 classp
= sets
[i
].src_const_elt
;
5903 if (sets
[i
].src_elt
== 0)
5905 /* Don't put a hard register source into the table if this is
5906 the last insn of a libcall. In this case, we only need
5907 to put src_eqv_elt in src_elt. */
5908 if (! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
5910 struct table_elt
*elt
;
5912 /* Note that these insert_regs calls cannot remove
5913 any of the src_elt's, because they would have failed to
5914 match if not still valid. */
5915 if (insert_regs (src
, classp
, 0))
5917 rehash_using_reg (src
);
5918 sets
[i
].src_hash
= HASH (src
, mode
);
5920 elt
= insert (src
, classp
, sets
[i
].src_hash
, mode
);
5921 elt
->in_memory
= sets
[i
].src_in_memory
;
5922 sets
[i
].src_elt
= classp
= elt
;
5925 sets
[i
].src_elt
= classp
;
5927 if (sets
[i
].src_const
&& sets
[i
].src_const_elt
== 0
5928 && src
!= sets
[i
].src_const
5929 && ! rtx_equal_p (sets
[i
].src_const
, src
))
5930 sets
[i
].src_elt
= insert (sets
[i
].src_const
, classp
,
5931 sets
[i
].src_const_hash
, mode
);
5934 else if (sets
[i
].src_elt
== 0)
5935 /* If we did not insert the source into the hash table (e.g., it was
5936 volatile), note the equivalence class for the REG_EQUAL value, if any,
5937 so that the destination goes into that class. */
5938 sets
[i
].src_elt
= src_eqv_elt
;
5940 invalidate_from_clobbers (x
);
5942 /* Some registers are invalidated by subroutine calls. Memory is
5943 invalidated by non-constant calls. */
5947 if (! CONST_OR_PURE_CALL_P (insn
))
5948 invalidate_memory ();
5949 invalidate_for_call ();
5952 /* Now invalidate everything set by this instruction.
5953 If a SUBREG or other funny destination is being set,
5954 sets[i].rtl is still nonzero, so here we invalidate the reg
5955 a part of which is being set. */
5957 for (i
= 0; i
< n_sets
; i
++)
5960 /* We can't use the inner dest, because the mode associated with
5961 a ZERO_EXTRACT is significant. */
5962 rtx dest
= SET_DEST (sets
[i
].rtl
);
5964 /* Needed for registers to remove the register from its
5965 previous quantity's chain.
5966 Needed for memory if this is a nonvarying address, unless
5967 we have just done an invalidate_memory that covers even those. */
5968 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
5969 invalidate (dest
, VOIDmode
);
5970 else if (MEM_P (dest
))
5971 invalidate (dest
, VOIDmode
);
5972 else if (GET_CODE (dest
) == STRICT_LOW_PART
5973 || GET_CODE (dest
) == ZERO_EXTRACT
)
5974 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
5977 /* A volatile ASM invalidates everything. */
5978 if (NONJUMP_INSN_P (insn
)
5979 && GET_CODE (PATTERN (insn
)) == ASM_OPERANDS
5980 && MEM_VOLATILE_P (PATTERN (insn
)))
5981 flush_hash_table ();
5983 /* Make sure registers mentioned in destinations
5984 are safe for use in an expression to be inserted.
5985 This removes from the hash table
5986 any invalid entry that refers to one of these registers.
5988 We don't care about the return value from mention_regs because
5989 we are going to hash the SET_DEST values unconditionally. */
5991 for (i
= 0; i
< n_sets
; i
++)
5995 rtx x
= SET_DEST (sets
[i
].rtl
);
6001 /* We used to rely on all references to a register becoming
6002 inaccessible when a register changes to a new quantity,
6003 since that changes the hash code. However, that is not
6004 safe, since after HASH_SIZE new quantities we get a
6005 hash 'collision' of a register with its own invalid
6006 entries. And since SUBREGs have been changed not to
6007 change their hash code with the hash code of the register,
6008 it wouldn't work any longer at all. So we have to check
6009 for any invalid references lying around now.
6010 This code is similar to the REG case in mention_regs,
6011 but it knows that reg_tick has been incremented, and
6012 it leaves reg_in_table as -1 . */
6013 unsigned int regno
= REGNO (x
);
6014 unsigned int endregno
6015 = regno
+ (regno
>= FIRST_PSEUDO_REGISTER
? 1
6016 : hard_regno_nregs
[regno
][GET_MODE (x
)]);
6019 for (i
= regno
; i
< endregno
; i
++)
6021 if (REG_IN_TABLE (i
) >= 0)
6023 remove_invalid_refs (i
);
6024 REG_IN_TABLE (i
) = -1;
6031 /* We may have just removed some of the src_elt's from the hash table.
6032 So replace each one with the current head of the same class. */
6034 for (i
= 0; i
< n_sets
; i
++)
6037 if (sets
[i
].src_elt
&& sets
[i
].src_elt
->first_same_value
== 0)
6038 /* If elt was removed, find current head of same class,
6039 or 0 if nothing remains of that class. */
6041 struct table_elt
*elt
= sets
[i
].src_elt
;
6043 while (elt
&& elt
->prev_same_value
)
6044 elt
= elt
->prev_same_value
;
6046 while (elt
&& elt
->first_same_value
== 0)
6047 elt
= elt
->next_same_value
;
6048 sets
[i
].src_elt
= elt
? elt
->first_same_value
: 0;
6052 /* Now insert the destinations into their equivalence classes. */
6054 for (i
= 0; i
< n_sets
; i
++)
6057 rtx dest
= SET_DEST (sets
[i
].rtl
);
6058 struct table_elt
*elt
;
6060 /* Don't record value if we are not supposed to risk allocating
6061 floating-point values in registers that might be wider than
6063 if ((flag_float_store
6065 && FLOAT_MODE_P (GET_MODE (dest
)))
6066 /* Don't record BLKmode values, because we don't know the
6067 size of it, and can't be sure that other BLKmode values
6068 have the same or smaller size. */
6069 || GET_MODE (dest
) == BLKmode
6070 /* Don't record values of destinations set inside a libcall block
6071 since we might delete the libcall. Things should have been set
6072 up so we won't want to reuse such a value, but we play it safe
6075 /* If we didn't put a REG_EQUAL value or a source into the hash
6076 table, there is no point is recording DEST. */
6077 || sets
[i
].src_elt
== 0
6078 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6079 or SIGN_EXTEND, don't record DEST since it can cause
6080 some tracking to be wrong.
6082 ??? Think about this more later. */
6083 || (GET_CODE (dest
) == SUBREG
6084 && (GET_MODE_SIZE (GET_MODE (dest
))
6085 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6086 && (GET_CODE (sets
[i
].src
) == SIGN_EXTEND
6087 || GET_CODE (sets
[i
].src
) == ZERO_EXTEND
)))
6090 /* STRICT_LOW_PART isn't part of the value BEING set,
6091 and neither is the SUBREG inside it.
6092 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6093 if (GET_CODE (dest
) == STRICT_LOW_PART
)
6094 dest
= SUBREG_REG (XEXP (dest
, 0));
6096 if (REG_P (dest
) || GET_CODE (dest
) == SUBREG
)
6097 /* Registers must also be inserted into chains for quantities. */
6098 if (insert_regs (dest
, sets
[i
].src_elt
, 1))
6100 /* If `insert_regs' changes something, the hash code must be
6102 rehash_using_reg (dest
);
6103 sets
[i
].dest_hash
= HASH (dest
, GET_MODE (dest
));
6106 elt
= insert (dest
, sets
[i
].src_elt
,
6107 sets
[i
].dest_hash
, GET_MODE (dest
));
6109 elt
->in_memory
= (MEM_P (sets
[i
].inner_dest
)
6110 && !MEM_READONLY_P (sets
[i
].inner_dest
));
6112 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6113 narrower than M2, and both M1 and M2 are the same number of words,
6114 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6115 make that equivalence as well.
6117 However, BAR may have equivalences for which gen_lowpart
6118 will produce a simpler value than gen_lowpart applied to
6119 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6120 BAR's equivalences. If we don't get a simplified form, make
6121 the SUBREG. It will not be used in an equivalence, but will
6122 cause two similar assignments to be detected.
6124 Note the loop below will find SUBREG_REG (DEST) since we have
6125 already entered SRC and DEST of the SET in the table. */
6127 if (GET_CODE (dest
) == SUBREG
6128 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))) - 1)
6130 == (GET_MODE_SIZE (GET_MODE (dest
)) - 1) / UNITS_PER_WORD
)
6131 && (GET_MODE_SIZE (GET_MODE (dest
))
6132 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
))))
6133 && sets
[i
].src_elt
!= 0)
6135 enum machine_mode new_mode
= GET_MODE (SUBREG_REG (dest
));
6136 struct table_elt
*elt
, *classp
= 0;
6138 for (elt
= sets
[i
].src_elt
->first_same_value
; elt
;
6139 elt
= elt
->next_same_value
)
6143 struct table_elt
*src_elt
;
6146 /* Ignore invalid entries. */
6147 if (!REG_P (elt
->exp
)
6148 && ! exp_equiv_p (elt
->exp
, elt
->exp
, 1, false))
6151 /* We may have already been playing subreg games. If the
6152 mode is already correct for the destination, use it. */
6153 if (GET_MODE (elt
->exp
) == new_mode
)
6157 /* Calculate big endian correction for the SUBREG_BYTE.
6158 We have already checked that M1 (GET_MODE (dest))
6159 is not narrower than M2 (new_mode). */
6160 if (BYTES_BIG_ENDIAN
)
6161 byte
= (GET_MODE_SIZE (GET_MODE (dest
))
6162 - GET_MODE_SIZE (new_mode
));
6164 new_src
= simplify_gen_subreg (new_mode
, elt
->exp
,
6165 GET_MODE (dest
), byte
);
6168 /* The call to simplify_gen_subreg fails if the value
6169 is VOIDmode, yet we can't do any simplification, e.g.
6170 for EXPR_LISTs denoting function call results.
6171 It is invalid to construct a SUBREG with a VOIDmode
6172 SUBREG_REG, hence a zero new_src means we can't do
6173 this substitution. */
6177 src_hash
= HASH (new_src
, new_mode
);
6178 src_elt
= lookup (new_src
, src_hash
, new_mode
);
6180 /* Put the new source in the hash table is if isn't
6184 if (insert_regs (new_src
, classp
, 0))
6186 rehash_using_reg (new_src
);
6187 src_hash
= HASH (new_src
, new_mode
);
6189 src_elt
= insert (new_src
, classp
, src_hash
, new_mode
);
6190 src_elt
->in_memory
= elt
->in_memory
;
6192 else if (classp
&& classp
!= src_elt
->first_same_value
)
6193 /* Show that two things that we've seen before are
6194 actually the same. */
6195 merge_equiv_classes (src_elt
, classp
);
6197 classp
= src_elt
->first_same_value
;
6198 /* Ignore invalid entries. */
6200 && !REG_P (classp
->exp
)
6201 && ! exp_equiv_p (classp
->exp
, classp
->exp
, 1, false))
6202 classp
= classp
->next_same_value
;
6207 /* Special handling for (set REG0 REG1) where REG0 is the
6208 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6209 be used in the sequel, so (if easily done) change this insn to
6210 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6211 that computed their value. Then REG1 will become a dead store
6212 and won't cloud the situation for later optimizations.
6214 Do not make this change if REG1 is a hard register, because it will
6215 then be used in the sequel and we may be changing a two-operand insn
6216 into a three-operand insn.
6218 Also do not do this if we are operating on a copy of INSN.
6220 Also don't do this if INSN ends a libcall; this would cause an unrelated
6221 register to be set in the middle of a libcall, and we then get bad code
6222 if the libcall is deleted. */
6224 if (n_sets
== 1 && sets
[0].rtl
&& REG_P (SET_DEST (sets
[0].rtl
))
6225 && NEXT_INSN (PREV_INSN (insn
)) == insn
6226 && REG_P (SET_SRC (sets
[0].rtl
))
6227 && REGNO (SET_SRC (sets
[0].rtl
)) >= FIRST_PSEUDO_REGISTER
6228 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets
[0].rtl
))))
6230 int src_q
= REG_QTY (REGNO (SET_SRC (sets
[0].rtl
)));
6231 struct qty_table_elem
*src_ent
= &qty_table
[src_q
];
6233 if ((src_ent
->first_reg
== REGNO (SET_DEST (sets
[0].rtl
)))
6234 && ! find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6237 /* Scan for the previous nonnote insn, but stop at a basic
6241 prev
= PREV_INSN (prev
);
6243 while (prev
&& NOTE_P (prev
)
6244 && NOTE_LINE_NUMBER (prev
) != NOTE_INSN_BASIC_BLOCK
);
6246 /* Do not swap the registers around if the previous instruction
6247 attaches a REG_EQUIV note to REG1.
6249 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6250 from the pseudo that originally shadowed an incoming argument
6251 to another register. Some uses of REG_EQUIV might rely on it
6252 being attached to REG1 rather than REG2.
6254 This section previously turned the REG_EQUIV into a REG_EQUAL
6255 note. We cannot do that because REG_EQUIV may provide an
6256 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6258 if (prev
!= 0 && NONJUMP_INSN_P (prev
)
6259 && GET_CODE (PATTERN (prev
)) == SET
6260 && SET_DEST (PATTERN (prev
)) == SET_SRC (sets
[0].rtl
)
6261 && ! find_reg_note (prev
, REG_EQUIV
, NULL_RTX
))
6263 rtx dest
= SET_DEST (sets
[0].rtl
);
6264 rtx src
= SET_SRC (sets
[0].rtl
);
6267 validate_change (prev
, &SET_DEST (PATTERN (prev
)), dest
, 1);
6268 validate_change (insn
, &SET_DEST (sets
[0].rtl
), src
, 1);
6269 validate_change (insn
, &SET_SRC (sets
[0].rtl
), dest
, 1);
6270 apply_change_group ();
6272 /* If INSN has a REG_EQUAL note, and this note mentions
6273 REG0, then we must delete it, because the value in
6274 REG0 has changed. If the note's value is REG1, we must
6275 also delete it because that is now this insn's dest. */
6276 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
6278 && (reg_mentioned_p (dest
, XEXP (note
, 0))
6279 || rtx_equal_p (src
, XEXP (note
, 0))))
6280 remove_note (insn
, note
);
6285 /* If this is a conditional jump insn, record any known equivalences due to
6286 the condition being tested. */
6289 && n_sets
== 1 && GET_CODE (x
) == SET
6290 && GET_CODE (SET_SRC (x
)) == IF_THEN_ELSE
)
6291 record_jump_equiv (insn
, 0);
6294 /* If the previous insn set CC0 and this insn no longer references CC0,
6295 delete the previous insn. Here we use the fact that nothing expects CC0
6296 to be valid over an insn, which is true until the final pass. */
6297 if (prev_insn
&& NONJUMP_INSN_P (prev_insn
)
6298 && (tem
= single_set (prev_insn
)) != 0
6299 && SET_DEST (tem
) == cc0_rtx
6300 && ! reg_mentioned_p (cc0_rtx
, x
))
6301 delete_insn (prev_insn
);
6303 prev_insn_cc0
= this_insn_cc0
;
6304 prev_insn_cc0_mode
= this_insn_cc0_mode
;
6309 /* Remove from the hash table all expressions that reference memory. */
6312 invalidate_memory (void)
6315 struct table_elt
*p
, *next
;
6317 for (i
= 0; i
< HASH_SIZE
; i
++)
6318 for (p
= table
[i
]; p
; p
= next
)
6320 next
= p
->next_same_hash
;
6322 remove_from_table (p
, i
);
6326 /* If ADDR is an address that implicitly affects the stack pointer, return
6327 1 and update the register tables to show the effect. Else, return 0. */
6330 addr_affects_sp_p (rtx addr
)
6332 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
6333 && REG_P (XEXP (addr
, 0))
6334 && REGNO (XEXP (addr
, 0)) == STACK_POINTER_REGNUM
)
6336 if (REG_TICK (STACK_POINTER_REGNUM
) >= 0)
6338 REG_TICK (STACK_POINTER_REGNUM
)++;
6339 /* Is it possible to use a subreg of SP? */
6340 SUBREG_TICKED (STACK_POINTER_REGNUM
) = -1;
6343 /* This should be *very* rare. */
6344 if (TEST_HARD_REG_BIT (hard_regs_in_table
, STACK_POINTER_REGNUM
))
6345 invalidate (stack_pointer_rtx
, VOIDmode
);
6353 /* Perform invalidation on the basis of everything about an insn
6354 except for invalidating the actual places that are SET in it.
6355 This includes the places CLOBBERed, and anything that might
6356 alias with something that is SET or CLOBBERed.
6358 X is the pattern of the insn. */
6361 invalidate_from_clobbers (rtx x
)
6363 if (GET_CODE (x
) == CLOBBER
)
6365 rtx ref
= XEXP (x
, 0);
6368 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6370 invalidate (ref
, VOIDmode
);
6371 else if (GET_CODE (ref
) == STRICT_LOW_PART
6372 || GET_CODE (ref
) == ZERO_EXTRACT
)
6373 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6376 else if (GET_CODE (x
) == PARALLEL
)
6379 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
6381 rtx y
= XVECEXP (x
, 0, i
);
6382 if (GET_CODE (y
) == CLOBBER
)
6384 rtx ref
= XEXP (y
, 0);
6385 if (REG_P (ref
) || GET_CODE (ref
) == SUBREG
6387 invalidate (ref
, VOIDmode
);
6388 else if (GET_CODE (ref
) == STRICT_LOW_PART
6389 || GET_CODE (ref
) == ZERO_EXTRACT
)
6390 invalidate (XEXP (ref
, 0), GET_MODE (ref
));
6396 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6397 and replace any registers in them with either an equivalent constant
6398 or the canonical form of the register. If we are inside an address,
6399 only do this if the address remains valid.
6401 OBJECT is 0 except when within a MEM in which case it is the MEM.
6403 Return the replacement for X. */
6406 cse_process_notes (rtx x
, rtx object
)
6408 enum rtx_code code
= GET_CODE (x
);
6409 const char *fmt
= GET_RTX_FORMAT (code
);
6426 validate_change (x
, &XEXP (x
, 0),
6427 cse_process_notes (XEXP (x
, 0), x
), 0);
6432 if (REG_NOTE_KIND (x
) == REG_EQUAL
)
6433 XEXP (x
, 0) = cse_process_notes (XEXP (x
, 0), NULL_RTX
);
6435 XEXP (x
, 1) = cse_process_notes (XEXP (x
, 1), NULL_RTX
);
6442 rtx
new = cse_process_notes (XEXP (x
, 0), object
);
6443 /* We don't substitute VOIDmode constants into these rtx,
6444 since they would impede folding. */
6445 if (GET_MODE (new) != VOIDmode
)
6446 validate_change (object
, &XEXP (x
, 0), new, 0);
6451 i
= REG_QTY (REGNO (x
));
6453 /* Return a constant or a constant register. */
6454 if (REGNO_QTY_VALID_P (REGNO (x
)))
6456 struct qty_table_elem
*ent
= &qty_table
[i
];
6458 if (ent
->const_rtx
!= NULL_RTX
6459 && (CONSTANT_P (ent
->const_rtx
)
6460 || REG_P (ent
->const_rtx
)))
6462 rtx
new = gen_lowpart (GET_MODE (x
), ent
->const_rtx
);
6468 /* Otherwise, canonicalize this register. */
6469 return canon_reg (x
, NULL_RTX
);
6475 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
6477 validate_change (object
, &XEXP (x
, i
),
6478 cse_process_notes (XEXP (x
, i
), object
), 0);
6483 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6484 since they are done elsewhere. This function is called via note_stores. */
6487 invalidate_skipped_set (rtx dest
, rtx set
, void *data ATTRIBUTE_UNUSED
)
6489 enum rtx_code code
= GET_CODE (dest
);
6492 && ! addr_affects_sp_p (dest
) /* If this is not a stack push ... */
6493 /* There are times when an address can appear varying and be a PLUS
6494 during this scan when it would be a fixed address were we to know
6495 the proper equivalences. So invalidate all memory if there is
6496 a BLKmode or nonscalar memory reference or a reference to a
6497 variable address. */
6498 && (MEM_IN_STRUCT_P (dest
) || GET_MODE (dest
) == BLKmode
6499 || cse_rtx_varies_p (XEXP (dest
, 0), 0)))
6501 invalidate_memory ();
6505 if (GET_CODE (set
) == CLOBBER
6510 if (code
== STRICT_LOW_PART
|| code
== ZERO_EXTRACT
)
6511 invalidate (XEXP (dest
, 0), GET_MODE (dest
));
6512 else if (code
== REG
|| code
== SUBREG
|| code
== MEM
)
6513 invalidate (dest
, VOIDmode
);
6516 /* Invalidate all insns from START up to the end of the function or the
6517 next label. This called when we wish to CSE around a block that is
6518 conditionally executed. */
6521 invalidate_skipped_block (rtx start
)
6525 for (insn
= start
; insn
&& !LABEL_P (insn
);
6526 insn
= NEXT_INSN (insn
))
6528 if (! INSN_P (insn
))
6533 if (! CONST_OR_PURE_CALL_P (insn
))
6534 invalidate_memory ();
6535 invalidate_for_call ();
6538 invalidate_from_clobbers (PATTERN (insn
));
6539 note_stores (PATTERN (insn
), invalidate_skipped_set
, NULL
);
6543 /* Find the end of INSN's basic block and return its range,
6544 the total number of SETs in all the insns of the block, the last insn of the
6545 block, and the branch path.
6547 The branch path indicates which branches should be followed. If a nonzero
6548 path size is specified, the block should be rescanned and a different set
6549 of branches will be taken. The branch path is only used if
6550 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6552 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6553 used to describe the block. It is filled in with the information about
6554 the current block. The incoming structure's branch path, if any, is used
6555 to construct the output branch path. */
6558 cse_end_of_basic_block (rtx insn
, struct cse_basic_block_data
*data
,
6559 int follow_jumps
, int skip_blocks
)
6563 int low_cuid
= INSN_CUID (insn
), high_cuid
= INSN_CUID (insn
);
6564 rtx next
= INSN_P (insn
) ? insn
: next_real_insn (insn
);
6565 int path_size
= data
->path_size
;
6569 /* Update the previous branch path, if any. If the last branch was
6570 previously PATH_TAKEN, mark it PATH_NOT_TAKEN.
6571 If it was previously PATH_NOT_TAKEN,
6572 shorten the path by one and look at the previous branch. We know that
6573 at least one branch must have been taken if PATH_SIZE is nonzero. */
6574 while (path_size
> 0)
6576 if (data
->path
[path_size
- 1].status
!= PATH_NOT_TAKEN
)
6578 data
->path
[path_size
- 1].status
= PATH_NOT_TAKEN
;
6585 /* If the first instruction is marked with QImode, that means we've
6586 already processed this block. Our caller will look at DATA->LAST
6587 to figure out where to go next. We want to return the next block
6588 in the instruction stream, not some branched-to block somewhere
6589 else. We accomplish this by pretending our called forbid us to
6590 follow jumps, or skip blocks. */
6591 if (GET_MODE (insn
) == QImode
)
6592 follow_jumps
= skip_blocks
= 0;
6594 /* Scan to end of this basic block. */
6595 while (p
&& !LABEL_P (p
))
6597 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6598 the regs restored by the longjmp come from
6599 a later time than the setjmp. */
6600 if (PREV_INSN (p
) && CALL_P (PREV_INSN (p
))
6601 && find_reg_note (PREV_INSN (p
), REG_SETJMP
, NULL
))
6604 /* A PARALLEL can have lots of SETs in it,
6605 especially if it is really an ASM_OPERANDS. */
6606 if (INSN_P (p
) && GET_CODE (PATTERN (p
)) == PARALLEL
)
6607 nsets
+= XVECLEN (PATTERN (p
), 0);
6608 else if (!NOTE_P (p
))
6611 /* Ignore insns made by CSE; they cannot affect the boundaries of
6614 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) > high_cuid
)
6615 high_cuid
= INSN_CUID (p
);
6616 if (INSN_UID (p
) <= max_uid
&& INSN_CUID (p
) < low_cuid
)
6617 low_cuid
= INSN_CUID (p
);
6619 /* See if this insn is in our branch path. If it is and we are to
6621 if (path_entry
< path_size
&& data
->path
[path_entry
].branch
== p
)
6623 if (data
->path
[path_entry
].status
!= PATH_NOT_TAKEN
)
6626 /* Point to next entry in path, if any. */
6630 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6631 was specified, we haven't reached our maximum path length, there are
6632 insns following the target of the jump, this is the only use of the
6633 jump label, and the target label is preceded by a BARRIER.
6635 Alternatively, we can follow the jump if it branches around a
6636 block of code and there are no other branches into the block.
6637 In this case invalidate_skipped_block will be called to invalidate any
6638 registers set in the block when following the jump. */
6640 else if ((follow_jumps
|| skip_blocks
) && path_size
< PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
) - 1
6642 && GET_CODE (PATTERN (p
)) == SET
6643 && GET_CODE (SET_SRC (PATTERN (p
))) == IF_THEN_ELSE
6644 && JUMP_LABEL (p
) != 0
6645 && LABEL_NUSES (JUMP_LABEL (p
)) == 1
6646 && NEXT_INSN (JUMP_LABEL (p
)) != 0)
6648 for (q
= PREV_INSN (JUMP_LABEL (p
)); q
; q
= PREV_INSN (q
))
6650 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
6651 || (PREV_INSN (q
) && CALL_P (PREV_INSN (q
))
6652 && find_reg_note (PREV_INSN (q
), REG_SETJMP
, NULL
)))
6653 && (!LABEL_P (q
) || LABEL_NUSES (q
) != 0))
6656 /* If we ran into a BARRIER, this code is an extension of the
6657 basic block when the branch is taken. */
6658 if (follow_jumps
&& q
!= 0 && BARRIER_P (q
))
6660 /* Don't allow ourself to keep walking around an
6661 always-executed loop. */
6662 if (next_real_insn (q
) == next
)
6668 /* Similarly, don't put a branch in our path more than once. */
6669 for (i
= 0; i
< path_entry
; i
++)
6670 if (data
->path
[i
].branch
== p
)
6673 if (i
!= path_entry
)
6676 data
->path
[path_entry
].branch
= p
;
6677 data
->path
[path_entry
++].status
= PATH_TAKEN
;
6679 /* This branch now ends our path. It was possible that we
6680 didn't see this branch the last time around (when the
6681 insn in front of the target was a JUMP_INSN that was
6682 turned into a no-op). */
6683 path_size
= path_entry
;
6686 /* Mark block so we won't scan it again later. */
6687 PUT_MODE (NEXT_INSN (p
), QImode
);
6689 /* Detect a branch around a block of code. */
6690 else if (skip_blocks
&& q
!= 0 && !LABEL_P (q
))
6694 if (next_real_insn (q
) == next
)
6700 for (i
= 0; i
< path_entry
; i
++)
6701 if (data
->path
[i
].branch
== p
)
6704 if (i
!= path_entry
)
6707 /* This is no_labels_between_p (p, q) with an added check for
6708 reaching the end of a function (in case Q precedes P). */
6709 for (tmp
= NEXT_INSN (p
); tmp
&& tmp
!= q
; tmp
= NEXT_INSN (tmp
))
6715 data
->path
[path_entry
].branch
= p
;
6716 data
->path
[path_entry
++].status
= PATH_AROUND
;
6718 path_size
= path_entry
;
6721 /* Mark block so we won't scan it again later. */
6722 PUT_MODE (NEXT_INSN (p
), QImode
);
6729 data
->low_cuid
= low_cuid
;
6730 data
->high_cuid
= high_cuid
;
6731 data
->nsets
= nsets
;
6734 /* If all jumps in the path are not taken, set our path length to zero
6735 so a rescan won't be done. */
6736 for (i
= path_size
- 1; i
>= 0; i
--)
6737 if (data
->path
[i
].status
!= PATH_NOT_TAKEN
)
6741 data
->path_size
= 0;
6743 data
->path_size
= path_size
;
6745 /* End the current branch path. */
6746 data
->path
[path_size
].branch
= 0;
6749 /* Perform cse on the instructions of a function.
6750 F is the first instruction.
6751 NREGS is one plus the highest pseudo-reg number used in the instruction.
6753 Returns 1 if jump_optimize should be redone due to simplifications
6754 in conditional jump instructions. */
6757 cse_main (rtx f
, int nregs
, FILE *file
)
6759 struct cse_basic_block_data val
;
6763 init_cse_reg_info (nregs
);
6765 val
.path
= xmalloc (sizeof (struct branch_path
)
6766 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
6768 cse_jumps_altered
= 0;
6769 recorded_label_ref
= 0;
6770 constant_pool_entries_cost
= 0;
6771 constant_pool_entries_regcost
= 0;
6773 rtl_hooks
= cse_rtl_hooks
;
6776 init_alias_analysis ();
6778 reg_eqv_table
= xmalloc (nregs
* sizeof (struct reg_eqv_elem
));
6780 /* Find the largest uid. */
6782 max_uid
= get_max_uid ();
6783 uid_cuid
= xcalloc (max_uid
+ 1, sizeof (int));
6785 /* Compute the mapping from uids to cuids.
6786 CUIDs are numbers assigned to insns, like uids,
6787 except that cuids increase monotonically through the code.
6788 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6789 between two insns is not affected by -g. */
6791 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
6794 || NOTE_LINE_NUMBER (insn
) < 0)
6795 INSN_CUID (insn
) = ++i
;
6797 /* Give a line number note the same cuid as preceding insn. */
6798 INSN_CUID (insn
) = i
;
6801 /* Loop over basic blocks.
6802 Compute the maximum number of qty's needed for each basic block
6803 (which is 2 for each SET). */
6808 cse_end_of_basic_block (insn
, &val
, flag_cse_follow_jumps
,
6809 flag_cse_skip_blocks
);
6811 /* If this basic block was already processed or has no sets, skip it. */
6812 if (val
.nsets
== 0 || GET_MODE (insn
) == QImode
)
6814 PUT_MODE (insn
, VOIDmode
);
6815 insn
= (val
.last
? NEXT_INSN (val
.last
) : 0);
6820 cse_basic_block_start
= val
.low_cuid
;
6821 cse_basic_block_end
= val
.high_cuid
;
6822 max_qty
= val
.nsets
* 2;
6825 fnotice (file
, ";; Processing block from %d to %d, %d sets.\n",
6826 INSN_UID (insn
), val
.last
? INSN_UID (val
.last
) : 0,
6829 /* Make MAX_QTY bigger to give us room to optimize
6830 past the end of this basic block, if that should prove useful. */
6834 /* If this basic block is being extended by following certain jumps,
6835 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6836 Otherwise, we start after this basic block. */
6837 if (val
.path_size
> 0)
6838 cse_basic_block (insn
, val
.last
, val
.path
);
6841 int old_cse_jumps_altered
= cse_jumps_altered
;
6844 /* When cse changes a conditional jump to an unconditional
6845 jump, we want to reprocess the block, since it will give
6846 us a new branch path to investigate. */
6847 cse_jumps_altered
= 0;
6848 temp
= cse_basic_block (insn
, val
.last
, val
.path
);
6849 if (cse_jumps_altered
== 0
6850 || (flag_cse_follow_jumps
== 0 && flag_cse_skip_blocks
== 0))
6853 cse_jumps_altered
|= old_cse_jumps_altered
;
6865 end_alias_analysis ();
6867 free (reg_eqv_table
);
6869 rtl_hooks
= general_rtl_hooks
;
6871 return cse_jumps_altered
|| recorded_label_ref
;
6874 /* Process a single basic block. FROM and TO and the limits of the basic
6875 block. NEXT_BRANCH points to the branch path when following jumps or
6876 a null path when not following jumps. */
6879 cse_basic_block (rtx from
, rtx to
, struct branch_path
*next_branch
)
6883 rtx libcall_insn
= NULL_RTX
;
6885 int no_conflict
= 0;
6887 /* Allocate the space needed by qty_table. */
6888 qty_table
= xmalloc (max_qty
* sizeof (struct qty_table_elem
));
6892 /* TO might be a label. If so, protect it from being deleted. */
6893 if (to
!= 0 && LABEL_P (to
))
6896 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
6898 enum rtx_code code
= GET_CODE (insn
);
6900 /* If we have processed 1,000 insns, flush the hash table to
6901 avoid extreme quadratic behavior. We must not include NOTEs
6902 in the count since there may be more of them when generating
6903 debugging information. If we clear the table at different
6904 times, code generated with -g -O might be different than code
6905 generated with -O but not -g.
6907 ??? This is a real kludge and needs to be done some other way.
6909 if (code
!= NOTE
&& num_insns
++ > 1000)
6911 flush_hash_table ();
6915 /* See if this is a branch that is part of the path. If so, and it is
6916 to be taken, do so. */
6917 if (next_branch
->branch
== insn
)
6919 enum taken status
= next_branch
++->status
;
6920 if (status
!= PATH_NOT_TAKEN
)
6922 if (status
== PATH_TAKEN
)
6923 record_jump_equiv (insn
, 1);
6925 invalidate_skipped_block (NEXT_INSN (insn
));
6927 /* Set the last insn as the jump insn; it doesn't affect cc0.
6928 Then follow this branch. */
6933 insn
= JUMP_LABEL (insn
);
6938 if (GET_MODE (insn
) == QImode
)
6939 PUT_MODE (insn
, VOIDmode
);
6941 if (GET_RTX_CLASS (code
) == RTX_INSN
)
6945 /* Process notes first so we have all notes in canonical forms when
6946 looking for duplicate operations. */
6948 if (REG_NOTES (insn
))
6949 REG_NOTES (insn
) = cse_process_notes (REG_NOTES (insn
), NULL_RTX
);
6951 /* Track when we are inside in LIBCALL block. Inside such a block,
6952 we do not want to record destinations. The last insn of a
6953 LIBCALL block is not considered to be part of the block, since
6954 its destination is the result of the block and hence should be
6957 if (REG_NOTES (insn
) != 0)
6959 if ((p
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
6960 libcall_insn
= XEXP (p
, 0);
6961 else if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
6963 /* Keep libcall_insn for the last SET insn of a no-conflict
6964 block to prevent changing the destination. */
6970 else if (find_reg_note (insn
, REG_NO_CONFLICT
, NULL_RTX
))
6974 cse_insn (insn
, libcall_insn
);
6976 if (no_conflict
== -1)
6982 /* If we haven't already found an insn where we added a LABEL_REF,
6984 if (NONJUMP_INSN_P (insn
) && ! recorded_label_ref
6985 && for_each_rtx (&PATTERN (insn
), check_for_label_ref
,
6987 recorded_label_ref
= 1;
6990 /* If INSN is now an unconditional jump, skip to the end of our
6991 basic block by pretending that we just did the last insn in the
6992 basic block. If we are jumping to the end of our block, show
6993 that we can have one usage of TO. */
6995 if (any_uncondjump_p (insn
))
7003 if (JUMP_LABEL (insn
) == to
)
7006 /* Maybe TO was deleted because the jump is unconditional.
7007 If so, there is nothing left in this basic block. */
7008 /* ??? Perhaps it would be smarter to set TO
7009 to whatever follows this insn,
7010 and pretend the basic block had always ended here. */
7011 if (INSN_DELETED_P (to
))
7014 insn
= PREV_INSN (to
);
7017 /* See if it is ok to keep on going past the label
7018 which used to end our basic block. Remember that we incremented
7019 the count of that label, so we decrement it here. If we made
7020 a jump unconditional, TO_USAGE will be one; in that case, we don't
7021 want to count the use in that jump. */
7023 if (to
!= 0 && NEXT_INSN (insn
) == to
7024 && LABEL_P (to
) && --LABEL_NUSES (to
) == to_usage
)
7026 struct cse_basic_block_data val
;
7029 insn
= NEXT_INSN (to
);
7031 /* If TO was the last insn in the function, we are done. */
7038 /* If TO was preceded by a BARRIER we are done with this block
7039 because it has no continuation. */
7040 prev
= prev_nonnote_insn (to
);
7041 if (prev
&& BARRIER_P (prev
))
7047 /* Find the end of the following block. Note that we won't be
7048 following branches in this case. */
7051 val
.path
= xmalloc (sizeof (struct branch_path
)
7052 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH
));
7053 cse_end_of_basic_block (insn
, &val
, 0, 0);
7056 /* If the tables we allocated have enough space left
7057 to handle all the SETs in the next basic block,
7058 continue through it. Otherwise, return,
7059 and that block will be scanned individually. */
7060 if (val
.nsets
* 2 + next_qty
> max_qty
)
7063 cse_basic_block_start
= val
.low_cuid
;
7064 cse_basic_block_end
= val
.high_cuid
;
7067 /* Prevent TO from being deleted if it is a label. */
7068 if (to
!= 0 && LABEL_P (to
))
7071 /* Back up so we process the first insn in the extension. */
7072 insn
= PREV_INSN (insn
);
7076 gcc_assert (next_qty
<= max_qty
);
7080 return to
? NEXT_INSN (to
) : 0;
7083 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7084 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7087 check_for_label_ref (rtx
*rtl
, void *data
)
7089 rtx insn
= (rtx
) data
;
7091 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7092 we must rerun jump since it needs to place the note. If this is a
7093 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7094 since no REG_LABEL will be added. */
7095 return (GET_CODE (*rtl
) == LABEL_REF
7096 && ! LABEL_REF_NONLOCAL_P (*rtl
)
7097 && LABEL_P (XEXP (*rtl
, 0))
7098 && INSN_UID (XEXP (*rtl
, 0)) != 0
7099 && ! find_reg_note (insn
, REG_LABEL
, XEXP (*rtl
, 0)));
7102 /* Count the number of times registers are used (not set) in X.
7103 COUNTS is an array in which we accumulate the count, INCR is how much
7104 we count each register usage. */
7107 count_reg_usage (rtx x
, int *counts
, int incr
)
7117 switch (code
= GET_CODE (x
))
7120 counts
[REGNO (x
)] += incr
;
7134 /* If we are clobbering a MEM, mark any registers inside the address
7136 if (MEM_P (XEXP (x
, 0)))
7137 count_reg_usage (XEXP (XEXP (x
, 0), 0), counts
, incr
);
7141 /* Unless we are setting a REG, count everything in SET_DEST. */
7142 if (!REG_P (SET_DEST (x
)))
7143 count_reg_usage (SET_DEST (x
), counts
, incr
);
7144 count_reg_usage (SET_SRC (x
), counts
, incr
);
7148 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x
), counts
, incr
);
7153 count_reg_usage (PATTERN (x
), counts
, incr
);
7155 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7158 note
= find_reg_equal_equiv_note (x
);
7161 rtx eqv
= XEXP (note
, 0);
7163 if (GET_CODE (eqv
) == EXPR_LIST
)
7164 /* This REG_EQUAL note describes the result of a function call.
7165 Process all the arguments. */
7168 count_reg_usage (XEXP (eqv
, 0), counts
, incr
);
7169 eqv
= XEXP (eqv
, 1);
7171 while (eqv
&& GET_CODE (eqv
) == EXPR_LIST
);
7173 count_reg_usage (eqv
, counts
, incr
);
7178 if (REG_NOTE_KIND (x
) == REG_EQUAL
7179 || (REG_NOTE_KIND (x
) != REG_NONNEG
&& GET_CODE (XEXP (x
,0)) == USE
)
7180 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7181 involving registers in the address. */
7182 || GET_CODE (XEXP (x
, 0)) == CLOBBER
)
7183 count_reg_usage (XEXP (x
, 0), counts
, incr
);
7185 count_reg_usage (XEXP (x
, 1), counts
, incr
);
7189 /* Iterate over just the inputs, not the constraints as well. */
7190 for (i
= ASM_OPERANDS_INPUT_LENGTH (x
) - 1; i
>= 0; i
--)
7191 count_reg_usage (ASM_OPERANDS_INPUT (x
, i
), counts
, incr
);
7201 fmt
= GET_RTX_FORMAT (code
);
7202 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7205 count_reg_usage (XEXP (x
, i
), counts
, incr
);
7206 else if (fmt
[i
] == 'E')
7207 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7208 count_reg_usage (XVECEXP (x
, i
, j
), counts
, incr
);
7212 /* Return true if set is live. */
7214 set_live_p (rtx set
, rtx insn ATTRIBUTE_UNUSED
, /* Only used with HAVE_cc0. */
7221 if (set_noop_p (set
))
7225 else if (GET_CODE (SET_DEST (set
)) == CC0
7226 && !side_effects_p (SET_SRC (set
))
7227 && ((tem
= next_nonnote_insn (insn
)) == 0
7229 || !reg_referenced_p (cc0_rtx
, PATTERN (tem
))))
7232 else if (!REG_P (SET_DEST (set
))
7233 || REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
7234 || counts
[REGNO (SET_DEST (set
))] != 0
7235 || side_effects_p (SET_SRC (set
)))
7240 /* Return true if insn is live. */
7243 insn_live_p (rtx insn
, int *counts
)
7246 if (flag_non_call_exceptions
&& may_trap_p (PATTERN (insn
)))
7248 else if (GET_CODE (PATTERN (insn
)) == SET
)
7249 return set_live_p (PATTERN (insn
), insn
, counts
);
7250 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7252 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
7254 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7256 if (GET_CODE (elt
) == SET
)
7258 if (set_live_p (elt
, insn
, counts
))
7261 else if (GET_CODE (elt
) != CLOBBER
&& GET_CODE (elt
) != USE
)
7270 /* Return true if libcall is dead as a whole. */
7273 dead_libcall_p (rtx insn
, int *counts
)
7277 /* See if there's a REG_EQUAL note on this insn and try to
7278 replace the source with the REG_EQUAL expression.
7280 We assume that insns with REG_RETVALs can only be reg->reg
7281 copies at this point. */
7282 note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
7286 set
= single_set (insn
);
7290 new = simplify_rtx (XEXP (note
, 0));
7292 new = XEXP (note
, 0);
7294 /* While changing insn, we must update the counts accordingly. */
7295 count_reg_usage (insn
, counts
, -1);
7297 if (validate_change (insn
, &SET_SRC (set
), new, 0))
7299 count_reg_usage (insn
, counts
, 1);
7300 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7301 remove_note (insn
, note
);
7305 if (CONSTANT_P (new))
7307 new = force_const_mem (GET_MODE (SET_DEST (set
)), new);
7308 if (new && validate_change (insn
, &SET_SRC (set
), new, 0))
7310 count_reg_usage (insn
, counts
, 1);
7311 remove_note (insn
, find_reg_note (insn
, REG_RETVAL
, NULL_RTX
));
7312 remove_note (insn
, note
);
7317 count_reg_usage (insn
, counts
, 1);
7321 /* Scan all the insns and delete any that are dead; i.e., they store a register
7322 that is never used or they copy a register to itself.
7324 This is used to remove insns made obviously dead by cse, loop or other
7325 optimizations. It improves the heuristics in loop since it won't try to
7326 move dead invariants out of loops or make givs for dead quantities. The
7327 remaining passes of the compilation are also sped up. */
7330 delete_trivially_dead_insns (rtx insns
, int nreg
)
7334 int in_libcall
= 0, dead_libcall
= 0;
7337 timevar_push (TV_DELETE_TRIVIALLY_DEAD
);
7338 /* First count the number of times each register is used. */
7339 counts
= xcalloc (nreg
, sizeof (int));
7340 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
7342 count_reg_usage (insn
, counts
, 1);
7344 /* Go from the last insn to the first and delete insns that only set unused
7345 registers or copy a register to itself. As we delete an insn, remove
7346 usage counts for registers it uses.
7348 The first jump optimization pass may leave a real insn as the last
7349 insn in the function. We must not skip that insn or we may end
7350 up deleting code that is not really dead. */
7351 for (insn
= get_last_insn (); insn
; insn
= prev
)
7355 prev
= PREV_INSN (insn
);
7359 /* Don't delete any insns that are part of a libcall block unless
7360 we can delete the whole libcall block.
7362 Flow or loop might get confused if we did that. Remember
7363 that we are scanning backwards. */
7364 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
7368 dead_libcall
= dead_libcall_p (insn
, counts
);
7370 else if (in_libcall
)
7371 live_insn
= ! dead_libcall
;
7373 live_insn
= insn_live_p (insn
, counts
);
7375 /* If this is a dead insn, delete it and show registers in it aren't
7380 count_reg_usage (insn
, counts
, -1);
7381 delete_insn_and_edges (insn
);
7385 if (in_libcall
&& find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
7392 if (dump_file
&& ndead
)
7393 fprintf (dump_file
, "Deleted %i trivially dead insns\n",
7397 timevar_pop (TV_DELETE_TRIVIALLY_DEAD
);
7401 /* This function is called via for_each_rtx. The argument, NEWREG, is
7402 a condition code register with the desired mode. If we are looking
7403 at the same register in a different mode, replace it with
7407 cse_change_cc_mode (rtx
*loc
, void *data
)
7409 struct change_cc_mode_args
* args
= (struct change_cc_mode_args
*)data
;
7413 && REGNO (*loc
) == REGNO (args
->newreg
)
7414 && GET_MODE (*loc
) != GET_MODE (args
->newreg
))
7416 validate_change (args
->insn
, loc
, args
->newreg
, 1);
7423 /* Change the mode of any reference to the register REGNO (NEWREG) to
7424 GET_MODE (NEWREG) in INSN. */
7427 cse_change_cc_mode_insn (rtx insn
, rtx newreg
)
7429 struct change_cc_mode_args args
;
7436 args
.newreg
= newreg
;
7438 for_each_rtx (&PATTERN (insn
), cse_change_cc_mode
, &args
);
7439 for_each_rtx (®_NOTES (insn
), cse_change_cc_mode
, &args
);
7441 /* If the following assertion was triggered, there is most probably
7442 something wrong with the cc_modes_compatible back end function.
7443 CC modes only can be considered compatible if the insn - with the mode
7444 replaced by any of the compatible modes - can still be recognized. */
7445 success
= apply_change_group ();
7446 gcc_assert (success
);
7449 /* Change the mode of any reference to the register REGNO (NEWREG) to
7450 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7451 any instruction which modifies NEWREG. */
7454 cse_change_cc_mode_insns (rtx start
, rtx end
, rtx newreg
)
7458 for (insn
= start
; insn
!= end
; insn
= NEXT_INSN (insn
))
7460 if (! INSN_P (insn
))
7463 if (reg_set_p (newreg
, insn
))
7466 cse_change_cc_mode_insn (insn
, newreg
);
7470 /* BB is a basic block which finishes with CC_REG as a condition code
7471 register which is set to CC_SRC. Look through the successors of BB
7472 to find blocks which have a single predecessor (i.e., this one),
7473 and look through those blocks for an assignment to CC_REG which is
7474 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7475 permitted to change the mode of CC_SRC to a compatible mode. This
7476 returns VOIDmode if no equivalent assignments were found.
7477 Otherwise it returns the mode which CC_SRC should wind up with.
7479 The main complexity in this function is handling the mode issues.
7480 We may have more than one duplicate which we can eliminate, and we
7481 try to find a mode which will work for multiple duplicates. */
7483 static enum machine_mode
7484 cse_cc_succs (basic_block bb
, rtx cc_reg
, rtx cc_src
, bool can_change_mode
)
7487 enum machine_mode mode
;
7488 unsigned int insn_count
;
7491 enum machine_mode modes
[2];
7497 /* We expect to have two successors. Look at both before picking
7498 the final mode for the comparison. If we have more successors
7499 (i.e., some sort of table jump, although that seems unlikely),
7500 then we require all beyond the first two to use the same
7503 found_equiv
= false;
7504 mode
= GET_MODE (cc_src
);
7506 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
7511 if (e
->flags
& EDGE_COMPLEX
)
7514 if (EDGE_COUNT (e
->dest
->preds
) != 1
7515 || e
->dest
== EXIT_BLOCK_PTR
)
7518 end
= NEXT_INSN (BB_END (e
->dest
));
7519 for (insn
= BB_HEAD (e
->dest
); insn
!= end
; insn
= NEXT_INSN (insn
))
7523 if (! INSN_P (insn
))
7526 /* If CC_SRC is modified, we have to stop looking for
7527 something which uses it. */
7528 if (modified_in_p (cc_src
, insn
))
7531 /* Check whether INSN sets CC_REG to CC_SRC. */
7532 set
= single_set (insn
);
7534 && REG_P (SET_DEST (set
))
7535 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7538 enum machine_mode set_mode
;
7539 enum machine_mode comp_mode
;
7542 set_mode
= GET_MODE (SET_SRC (set
));
7543 comp_mode
= set_mode
;
7544 if (rtx_equal_p (cc_src
, SET_SRC (set
)))
7546 else if (GET_CODE (cc_src
) == COMPARE
7547 && GET_CODE (SET_SRC (set
)) == COMPARE
7549 && rtx_equal_p (XEXP (cc_src
, 0),
7550 XEXP (SET_SRC (set
), 0))
7551 && rtx_equal_p (XEXP (cc_src
, 1),
7552 XEXP (SET_SRC (set
), 1)))
7555 comp_mode
= targetm
.cc_modes_compatible (mode
, set_mode
);
7556 if (comp_mode
!= VOIDmode
7557 && (can_change_mode
|| comp_mode
== mode
))
7564 if (insn_count
< ARRAY_SIZE (insns
))
7566 insns
[insn_count
] = insn
;
7567 modes
[insn_count
] = set_mode
;
7568 last_insns
[insn_count
] = end
;
7571 if (mode
!= comp_mode
)
7573 gcc_assert (can_change_mode
);
7576 /* The modified insn will be re-recognized later. */
7577 PUT_MODE (cc_src
, mode
);
7582 if (set_mode
!= mode
)
7584 /* We found a matching expression in the
7585 wrong mode, but we don't have room to
7586 store it in the array. Punt. This case
7590 /* INSN sets CC_REG to a value equal to CC_SRC
7591 with the right mode. We can simply delete
7596 /* We found an instruction to delete. Keep looking,
7597 in the hopes of finding a three-way jump. */
7601 /* We found an instruction which sets the condition
7602 code, so don't look any farther. */
7606 /* If INSN sets CC_REG in some other way, don't look any
7608 if (reg_set_p (cc_reg
, insn
))
7612 /* If we fell off the bottom of the block, we can keep looking
7613 through successors. We pass CAN_CHANGE_MODE as false because
7614 we aren't prepared to handle compatibility between the
7615 further blocks and this block. */
7618 enum machine_mode submode
;
7620 submode
= cse_cc_succs (e
->dest
, cc_reg
, cc_src
, false);
7621 if (submode
!= VOIDmode
)
7623 gcc_assert (submode
== mode
);
7625 can_change_mode
= false;
7633 /* Now INSN_COUNT is the number of instructions we found which set
7634 CC_REG to a value equivalent to CC_SRC. The instructions are in
7635 INSNS. The modes used by those instructions are in MODES. */
7638 for (i
= 0; i
< insn_count
; ++i
)
7640 if (modes
[i
] != mode
)
7642 /* We need to change the mode of CC_REG in INSNS[i] and
7643 subsequent instructions. */
7646 if (GET_MODE (cc_reg
) == mode
)
7649 newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7651 cse_change_cc_mode_insns (NEXT_INSN (insns
[i
]), last_insns
[i
],
7655 delete_insn (insns
[i
]);
7661 /* If we have a fixed condition code register (or two), walk through
7662 the instructions and try to eliminate duplicate assignments. */
7665 cse_condition_code_reg (void)
7667 unsigned int cc_regno_1
;
7668 unsigned int cc_regno_2
;
7673 if (! targetm
.fixed_condition_code_regs (&cc_regno_1
, &cc_regno_2
))
7676 cc_reg_1
= gen_rtx_REG (CCmode
, cc_regno_1
);
7677 if (cc_regno_2
!= INVALID_REGNUM
)
7678 cc_reg_2
= gen_rtx_REG (CCmode
, cc_regno_2
);
7680 cc_reg_2
= NULL_RTX
;
7689 enum machine_mode mode
;
7690 enum machine_mode orig_mode
;
7692 /* Look for blocks which end with a conditional jump based on a
7693 condition code register. Then look for the instruction which
7694 sets the condition code register. Then look through the
7695 successor blocks for instructions which set the condition
7696 code register to the same value. There are other possible
7697 uses of the condition code register, but these are by far the
7698 most common and the ones which we are most likely to be able
7701 last_insn
= BB_END (bb
);
7702 if (!JUMP_P (last_insn
))
7705 if (reg_referenced_p (cc_reg_1
, PATTERN (last_insn
)))
7707 else if (cc_reg_2
&& reg_referenced_p (cc_reg_2
, PATTERN (last_insn
)))
7712 cc_src_insn
= NULL_RTX
;
7714 for (insn
= PREV_INSN (last_insn
);
7715 insn
&& insn
!= PREV_INSN (BB_HEAD (bb
));
7716 insn
= PREV_INSN (insn
))
7720 if (! INSN_P (insn
))
7722 set
= single_set (insn
);
7724 && REG_P (SET_DEST (set
))
7725 && REGNO (SET_DEST (set
)) == REGNO (cc_reg
))
7728 cc_src
= SET_SRC (set
);
7731 else if (reg_set_p (cc_reg
, insn
))
7738 if (modified_between_p (cc_src
, cc_src_insn
, NEXT_INSN (last_insn
)))
7741 /* Now CC_REG is a condition code register used for a
7742 conditional jump at the end of the block, and CC_SRC, in
7743 CC_SRC_INSN, is the value to which that condition code
7744 register is set, and CC_SRC is still meaningful at the end of
7747 orig_mode
= GET_MODE (cc_src
);
7748 mode
= cse_cc_succs (bb
, cc_reg
, cc_src
, true);
7749 if (mode
!= VOIDmode
)
7751 gcc_assert (mode
== GET_MODE (cc_src
));
7752 if (mode
!= orig_mode
)
7754 rtx newreg
= gen_rtx_REG (mode
, REGNO (cc_reg
));
7756 cse_change_cc_mode_insn (cc_src_insn
, newreg
);
7758 /* Do the same in the following insns that use the
7759 current value of CC_REG within BB. */
7760 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn
),
7761 NEXT_INSN (last_insn
),