RISC-V: Enable basic VLS modes support
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / rvv / autovec / zve64f_zvl128b-2.c
blob64caef5c6ef52f3d86b89fe5809452227bdb5f4a
1 /* { dg-do compile } */
2 /* { dg-options "-march=rv32gc_zve64f_zvl128b -mabi=ilp32d -fno-vect-cost-model --param riscv-autovec-preference=fixed-vlmax -fdump-tree-vect-details" } */
4 #include "template-1.h"
6 /* { dg-final { scan-tree-dump-times "vectorized 1 loops in function" 5 "vect" } } */