1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2016 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
37 #include "diagnostic.h"
39 #include "fold-const.h"
40 #include "stor-layout.h"
44 #include "insn-attr.h"
49 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
51 #include "optabs-tree.h"
54 #include "langhooks.h"
55 #include "common/common-target.h"
56 #include "tree-ssa-live.h"
57 #include "tree-outof-ssa.h"
58 #include "tree-ssa-address.h"
60 #include "tree-chkp.h"
65 /* If this is nonzero, we do not bother generating VOLATILE
66 around volatile memory references, and we are willing to
67 output indirect addresses. If cse is to follow, we reject
68 indirect addresses so a useful potential cse is generated;
69 if it is used only once, instruction combination will produce
70 the same indirect address eventually. */
73 /* This structure is used by move_by_pieces to describe the move to
75 struct move_by_pieces_d
84 int explicit_inc_from
;
85 unsigned HOST_WIDE_INT len
;
90 /* This structure is used by store_by_pieces to describe the clear to
93 struct store_by_pieces_d
99 unsigned HOST_WIDE_INT len
;
100 HOST_WIDE_INT offset
;
101 rtx (*constfun
) (void *, HOST_WIDE_INT
, machine_mode
);
106 static void move_by_pieces_1 (insn_gen_fn
, machine_mode
,
107 struct move_by_pieces_d
*);
108 static bool block_move_libcall_safe_for_call_parm (void);
109 static bool emit_block_move_via_movmem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
110 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
111 unsigned HOST_WIDE_INT
);
112 static tree
emit_block_move_libcall_fn (int);
113 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
114 static rtx
clear_by_pieces_1 (void *, HOST_WIDE_INT
, machine_mode
);
115 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
116 static void store_by_pieces_1 (struct store_by_pieces_d
*, unsigned int);
117 static void store_by_pieces_2 (insn_gen_fn
, machine_mode
,
118 struct store_by_pieces_d
*);
119 static tree
clear_storage_libcall_fn (int);
120 static rtx_insn
*compress_float_constant (rtx
, rtx
);
121 static rtx
get_subtarget (rtx
);
122 static void store_constructor_field (rtx
, unsigned HOST_WIDE_INT
,
123 HOST_WIDE_INT
, machine_mode
,
124 tree
, int, alias_set_type
, bool);
125 static void store_constructor (tree
, rtx
, int, HOST_WIDE_INT
, bool);
126 static rtx
store_field (rtx
, HOST_WIDE_INT
, HOST_WIDE_INT
,
127 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
128 machine_mode
, tree
, alias_set_type
, bool, bool);
130 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
132 static int is_aligning_offset (const_tree
, const_tree
);
133 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
134 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
136 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
138 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
, int);
139 static rtx
const_vector_from_tree (tree
);
140 static rtx
const_scalar_mask_from_tree (tree
);
141 static tree
tree_expr_size (const_tree
);
142 static HOST_WIDE_INT
int_expr_size (tree
);
145 /* This is run to set up which modes can be used
146 directly in memory and to initialize the block move optab. It is run
147 at the beginning of compilation and when the target is reinitialized. */
150 init_expr_target (void)
158 /* Try indexing by frame ptr and try by stack ptr.
159 It is known that on the Convex the stack ptr isn't a valid index.
160 With luck, one or the other is valid on any machine. */
161 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
162 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
164 /* A scratch register we can modify in-place below to avoid
165 useless RTL allocations. */
166 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
168 insn
= rtx_alloc (INSN
);
169 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
170 PATTERN (insn
) = pat
;
172 for (mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
173 mode
= (machine_mode
) ((int) mode
+ 1))
177 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
178 PUT_MODE (mem
, mode
);
179 PUT_MODE (mem1
, mode
);
181 /* See if there is some register that can be used in this mode and
182 directly loaded or stored from memory. */
184 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
185 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
186 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
189 if (! HARD_REGNO_MODE_OK (regno
, mode
))
192 set_mode_and_regno (reg
, mode
, regno
);
195 SET_DEST (pat
) = reg
;
196 if (recog (pat
, insn
, &num_clobbers
) >= 0)
197 direct_load
[(int) mode
] = 1;
199 SET_SRC (pat
) = mem1
;
200 SET_DEST (pat
) = reg
;
201 if (recog (pat
, insn
, &num_clobbers
) >= 0)
202 direct_load
[(int) mode
] = 1;
205 SET_DEST (pat
) = mem
;
206 if (recog (pat
, insn
, &num_clobbers
) >= 0)
207 direct_store
[(int) mode
] = 1;
210 SET_DEST (pat
) = mem1
;
211 if (recog (pat
, insn
, &num_clobbers
) >= 0)
212 direct_store
[(int) mode
] = 1;
216 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
218 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
219 mode
= GET_MODE_WIDER_MODE (mode
))
221 machine_mode srcmode
;
222 for (srcmode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); srcmode
!= mode
;
223 srcmode
= GET_MODE_WIDER_MODE (srcmode
))
227 ic
= can_extend_p (mode
, srcmode
, 0);
228 if (ic
== CODE_FOR_nothing
)
231 PUT_MODE (mem
, srcmode
);
233 if (insn_operand_matches (ic
, 1, mem
))
234 float_extend_from_mem
[mode
][srcmode
] = true;
239 /* This is run at the start of compiling a function. */
244 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
247 /* Copy data from FROM to TO, where the machine modes are not the same.
248 Both modes may be integer, or both may be floating, or both may be
250 UNSIGNEDP should be nonzero if FROM is an unsigned type.
251 This causes zero-extension instead of sign-extension. */
254 convert_move (rtx to
, rtx from
, int unsignedp
)
256 machine_mode to_mode
= GET_MODE (to
);
257 machine_mode from_mode
= GET_MODE (from
);
258 int to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
259 int from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
263 /* rtx code for making an equivalent value. */
264 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
265 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
268 gcc_assert (to_real
== from_real
);
269 gcc_assert (to_mode
!= BLKmode
);
270 gcc_assert (from_mode
!= BLKmode
);
272 /* If the source and destination are already the same, then there's
277 /* If FROM is a SUBREG that indicates that we have already done at least
278 the required extension, strip it. We don't handle such SUBREGs as
281 if (GET_CODE (from
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (from
)
282 && (GET_MODE_PRECISION (GET_MODE (SUBREG_REG (from
)))
283 >= GET_MODE_PRECISION (to_mode
))
284 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
285 from
= gen_lowpart (to_mode
, from
), from_mode
= to_mode
;
287 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
289 if (to_mode
== from_mode
290 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
292 emit_move_insn (to
, from
);
296 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
298 gcc_assert (GET_MODE_BITSIZE (from_mode
) == GET_MODE_BITSIZE (to_mode
));
300 if (VECTOR_MODE_P (to_mode
))
301 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
303 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
305 emit_move_insn (to
, from
);
309 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
311 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
312 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
322 gcc_assert ((GET_MODE_PRECISION (from_mode
)
323 != GET_MODE_PRECISION (to_mode
))
324 || (DECIMAL_FLOAT_MODE_P (from_mode
)
325 != DECIMAL_FLOAT_MODE_P (to_mode
)));
327 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
328 /* Conversion between decimal float and binary float, same size. */
329 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
330 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
335 /* Try converting directly if the insn is supported. */
337 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
338 if (code
!= CODE_FOR_nothing
)
340 emit_unop_insn (code
, to
, from
,
341 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
345 /* Otherwise use a libcall. */
346 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
348 /* Is this conversion implemented yet? */
349 gcc_assert (libcall
);
352 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
354 insns
= get_insns ();
356 emit_libcall_block (insns
, to
, value
,
357 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
359 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
363 /* Handle pointer conversion. */ /* SPEE 900220. */
364 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
368 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
375 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
378 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
384 /* Targets are expected to provide conversion insns between PxImode and
385 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
386 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
388 machine_mode full_mode
389 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode
), MODE_INT
);
391 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
392 != CODE_FOR_nothing
);
394 if (full_mode
!= from_mode
)
395 from
= convert_to_mode (full_mode
, from
, unsignedp
);
396 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
400 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
403 machine_mode full_mode
404 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode
), MODE_INT
);
405 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
406 enum insn_code icode
;
408 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
409 gcc_assert (icode
!= CODE_FOR_nothing
);
411 if (to_mode
== full_mode
)
413 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
417 new_from
= gen_reg_rtx (full_mode
);
418 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
420 /* else proceed to integer conversions below. */
421 from_mode
= full_mode
;
425 /* Make sure both are fixed-point modes or both are not. */
426 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
427 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
428 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
430 /* If we widen from_mode to to_mode and they are in the same class,
431 we won't saturate the result.
432 Otherwise, always saturate the result to play safe. */
433 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
434 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
435 expand_fixed_convert (to
, from
, 0, 0);
437 expand_fixed_convert (to
, from
, 0, 1);
441 /* Now both modes are integers. */
443 /* Handle expanding beyond a word. */
444 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
445 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
452 machine_mode lowpart_mode
;
453 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
455 /* Try converting directly if the insn is supported. */
456 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
459 /* If FROM is a SUBREG, put it into a register. Do this
460 so that we always generate the same set of insns for
461 better cse'ing; if an intermediate assignment occurred,
462 we won't be doing the operation directly on the SUBREG. */
463 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
464 from
= force_reg (from_mode
, from
);
465 emit_unop_insn (code
, to
, from
, equiv_code
);
468 /* Next, try converting via full word. */
469 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
470 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
471 != CODE_FOR_nothing
))
473 rtx word_to
= gen_reg_rtx (word_mode
);
476 if (reg_overlap_mentioned_p (to
, from
))
477 from
= force_reg (from_mode
, from
);
480 convert_move (word_to
, from
, unsignedp
);
481 emit_unop_insn (code
, to
, word_to
, equiv_code
);
485 /* No special multiword conversion insn; do it by hand. */
488 /* Since we will turn this into a no conflict block, we must ensure
489 the source does not overlap the target so force it into an isolated
490 register when maybe so. Likewise for any MEM input, since the
491 conversion sequence might require several references to it and we
492 must ensure we're getting the same value every time. */
494 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
495 from
= force_reg (from_mode
, from
);
497 /* Get a copy of FROM widened to a word, if necessary. */
498 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
499 lowpart_mode
= word_mode
;
501 lowpart_mode
= from_mode
;
503 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
505 lowpart
= gen_lowpart (lowpart_mode
, to
);
506 emit_move_insn (lowpart
, lowfrom
);
508 /* Compute the value to put in each remaining word. */
510 fill_value
= const0_rtx
;
512 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
513 LT
, lowfrom
, const0_rtx
,
514 lowpart_mode
, 0, -1);
516 /* Fill the remaining words. */
517 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
519 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
520 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
522 gcc_assert (subword
);
524 if (fill_value
!= subword
)
525 emit_move_insn (subword
, fill_value
);
528 insns
= get_insns ();
535 /* Truncating multi-word to a word or less. */
536 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
537 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
540 && ! MEM_VOLATILE_P (from
)
541 && direct_load
[(int) to_mode
]
542 && ! mode_dependent_address_p (XEXP (from
, 0),
543 MEM_ADDR_SPACE (from
)))
545 || GET_CODE (from
) == SUBREG
))
546 from
= force_reg (from_mode
, from
);
547 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
551 /* Now follow all the conversions between integers
552 no more than a word long. */
554 /* For truncation, usually we can just refer to FROM in a narrower mode. */
555 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
556 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
559 && ! MEM_VOLATILE_P (from
)
560 && direct_load
[(int) to_mode
]
561 && ! mode_dependent_address_p (XEXP (from
, 0),
562 MEM_ADDR_SPACE (from
)))
564 || GET_CODE (from
) == SUBREG
))
565 from
= force_reg (from_mode
, from
);
566 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
567 && ! HARD_REGNO_MODE_OK (REGNO (from
), to_mode
))
568 from
= copy_to_reg (from
);
569 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
573 /* Handle extension. */
574 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
576 /* Convert directly if that works. */
577 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
580 emit_unop_insn (code
, to
, from
, equiv_code
);
585 machine_mode intermediate
;
589 /* Search for a mode to convert via. */
590 for (intermediate
= from_mode
; intermediate
!= VOIDmode
;
591 intermediate
= GET_MODE_WIDER_MODE (intermediate
))
592 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
594 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
595 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, intermediate
)))
596 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
597 != CODE_FOR_nothing
))
599 convert_move (to
, convert_to_mode (intermediate
, from
,
600 unsignedp
), unsignedp
);
604 /* No suitable intermediate mode.
605 Generate what we need with shifts. */
606 shift_amount
= (GET_MODE_PRECISION (to_mode
)
607 - GET_MODE_PRECISION (from_mode
));
608 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
609 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
611 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
614 emit_move_insn (to
, tmp
);
619 /* Support special truncate insns for certain modes. */
620 if (convert_optab_handler (trunc_optab
, to_mode
,
621 from_mode
) != CODE_FOR_nothing
)
623 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
628 /* Handle truncation of volatile memrefs, and so on;
629 the things that couldn't be truncated directly,
630 and for which there was no special instruction.
632 ??? Code above formerly short-circuited this, for most integer
633 mode pairs, with a force_reg in from_mode followed by a recursive
634 call to this routine. Appears always to have been wrong. */
635 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
637 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
638 emit_move_insn (to
, temp
);
642 /* Mode combination is not recognized. */
646 /* Return an rtx for a value that would result
647 from converting X to mode MODE.
648 Both X and MODE may be floating, or both integer.
649 UNSIGNEDP is nonzero if X is an unsigned value.
650 This can be done by referring to a part of X in place
651 or by copying to a new temporary with conversion. */
654 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
656 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
659 /* Return an rtx for a value that would result
660 from converting X from mode OLDMODE to mode MODE.
661 Both modes may be floating, or both integer.
662 UNSIGNEDP is nonzero if X is an unsigned value.
664 This can be done by referring to a part of X in place
665 or by copying to a new temporary with conversion.
667 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
670 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
674 /* If FROM is a SUBREG that indicates that we have already done at least
675 the required extension, strip it. */
677 if (GET_CODE (x
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (x
)
678 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) >= GET_MODE_SIZE (mode
)
679 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
680 x
= gen_lowpart (mode
, SUBREG_REG (x
));
682 if (GET_MODE (x
) != VOIDmode
)
683 oldmode
= GET_MODE (x
);
688 if (CONST_SCALAR_INT_P (x
) && GET_MODE_CLASS (mode
) == MODE_INT
)
690 /* If the caller did not tell us the old mode, then there is not
691 much to do with respect to canonicalization. We have to
692 assume that all the bits are significant. */
693 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
694 oldmode
= MAX_MODE_INT
;
695 wide_int w
= wide_int::from (std::make_pair (x
, oldmode
),
696 GET_MODE_PRECISION (mode
),
697 unsignedp
? UNSIGNED
: SIGNED
);
698 return immed_wide_int_const (w
, mode
);
701 /* We can do this with a gen_lowpart if both desired and current modes
702 are integer, and this is either a constant integer, a register, or a
704 if (GET_MODE_CLASS (mode
) == MODE_INT
705 && GET_MODE_CLASS (oldmode
) == MODE_INT
706 && GET_MODE_PRECISION (mode
) <= GET_MODE_PRECISION (oldmode
)
707 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) mode
])
709 && (!HARD_REGISTER_P (x
)
710 || HARD_REGNO_MODE_OK (REGNO (x
), mode
))
711 && TRULY_NOOP_TRUNCATION_MODES_P (mode
, GET_MODE (x
)))))
713 return gen_lowpart (mode
, x
);
715 /* Converting from integer constant into mode is always equivalent to an
717 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
719 gcc_assert (GET_MODE_BITSIZE (mode
) == GET_MODE_BITSIZE (oldmode
));
720 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
723 temp
= gen_reg_rtx (mode
);
724 convert_move (temp
, x
, unsignedp
);
728 /* Return the largest alignment we can use for doing a move (or store)
729 of MAX_PIECES. ALIGN is the largest alignment we could use. */
732 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
736 tmode
= mode_for_size (max_pieces
* BITS_PER_UNIT
, MODE_INT
, 1);
737 if (align
>= GET_MODE_ALIGNMENT (tmode
))
738 align
= GET_MODE_ALIGNMENT (tmode
);
741 machine_mode tmode
, xmode
;
743 for (tmode
= GET_CLASS_NARROWEST_MODE (MODE_INT
), xmode
= tmode
;
745 xmode
= tmode
, tmode
= GET_MODE_WIDER_MODE (tmode
))
746 if (GET_MODE_SIZE (tmode
) > max_pieces
747 || SLOW_UNALIGNED_ACCESS (tmode
, align
))
750 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
756 /* Return the widest integer mode no wider than SIZE. If no such mode
757 can be found, return VOIDmode. */
760 widest_int_mode_for_size (unsigned int size
)
762 machine_mode tmode
, mode
= VOIDmode
;
764 for (tmode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
765 tmode
!= VOIDmode
; tmode
= GET_MODE_WIDER_MODE (tmode
))
766 if (GET_MODE_SIZE (tmode
) < size
)
772 /* Determine whether the LEN bytes can be moved by using several move
773 instructions. Return nonzero if a call to move_by_pieces should
777 can_move_by_pieces (unsigned HOST_WIDE_INT len
,
780 return targetm
.use_by_pieces_infrastructure_p (len
, align
, MOVE_BY_PIECES
,
781 optimize_insn_for_speed_p ());
784 /* Generate several move instructions to copy LEN bytes from block FROM to
785 block TO. (These are MEM rtx's with BLKmode).
787 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
788 used to push FROM to the stack.
790 ALIGN is maximum stack alignment we can assume.
792 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
793 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
797 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
798 unsigned int align
, int endp
)
800 struct move_by_pieces_d data
;
801 machine_mode to_addr_mode
;
802 machine_mode from_addr_mode
= get_address_mode (from
);
803 rtx to_addr
, from_addr
= XEXP (from
, 0);
804 unsigned int max_size
= MOVE_MAX_PIECES
+ 1;
805 enum insn_code icode
;
807 align
= MIN (to
? MEM_ALIGN (to
) : align
, MEM_ALIGN (from
));
810 data
.from_addr
= from_addr
;
813 to_addr_mode
= get_address_mode (to
);
814 to_addr
= XEXP (to
, 0);
817 = (GET_CODE (to_addr
) == PRE_INC
|| GET_CODE (to_addr
) == PRE_DEC
818 || GET_CODE (to_addr
) == POST_INC
|| GET_CODE (to_addr
) == POST_DEC
);
820 = (GET_CODE (to_addr
) == PRE_DEC
|| GET_CODE (to_addr
) == POST_DEC
);
824 to_addr_mode
= VOIDmode
;
828 if (STACK_GROWS_DOWNWARD
)
833 data
.to_addr
= to_addr
;
836 = (GET_CODE (from_addr
) == PRE_INC
|| GET_CODE (from_addr
) == PRE_DEC
837 || GET_CODE (from_addr
) == POST_INC
838 || GET_CODE (from_addr
) == POST_DEC
);
840 data
.explicit_inc_from
= 0;
841 data
.explicit_inc_to
= 0;
842 if (data
.reverse
) data
.offset
= len
;
845 /* If copying requires more than two move insns,
846 copy addresses to registers (to make displacements shorter)
847 and use post-increment if available. */
848 if (!(data
.autinc_from
&& data
.autinc_to
)
849 && move_by_pieces_ninsns (len
, align
, max_size
) > 2)
851 /* Find the mode of the largest move...
852 MODE might not be used depending on the definitions of the
853 USE_* macros below. */
854 machine_mode mode ATTRIBUTE_UNUSED
855 = widest_int_mode_for_size (max_size
);
857 if (USE_LOAD_PRE_DECREMENT (mode
) && data
.reverse
&& ! data
.autinc_from
)
859 data
.from_addr
= copy_to_mode_reg (from_addr_mode
,
860 plus_constant (from_addr_mode
,
862 data
.autinc_from
= 1;
863 data
.explicit_inc_from
= -1;
865 if (USE_LOAD_POST_INCREMENT (mode
) && ! data
.autinc_from
)
867 data
.from_addr
= copy_to_mode_reg (from_addr_mode
, from_addr
);
868 data
.autinc_from
= 1;
869 data
.explicit_inc_from
= 1;
871 if (!data
.autinc_from
&& CONSTANT_P (from_addr
))
872 data
.from_addr
= copy_to_mode_reg (from_addr_mode
, from_addr
);
873 if (USE_STORE_PRE_DECREMENT (mode
) && data
.reverse
&& ! data
.autinc_to
)
875 data
.to_addr
= copy_to_mode_reg (to_addr_mode
,
876 plus_constant (to_addr_mode
,
879 data
.explicit_inc_to
= -1;
881 if (USE_STORE_POST_INCREMENT (mode
) && ! data
.reverse
&& ! data
.autinc_to
)
883 data
.to_addr
= copy_to_mode_reg (to_addr_mode
, to_addr
);
885 data
.explicit_inc_to
= 1;
887 if (!data
.autinc_to
&& CONSTANT_P (to_addr
))
888 data
.to_addr
= copy_to_mode_reg (to_addr_mode
, to_addr
);
891 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
893 /* First move what we can in the largest integer mode, then go to
894 successively smaller modes. */
896 while (max_size
> 1 && data
.len
> 0)
898 machine_mode mode
= widest_int_mode_for_size (max_size
);
900 if (mode
== VOIDmode
)
903 icode
= optab_handler (mov_optab
, mode
);
904 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
905 move_by_pieces_1 (GEN_FCN (icode
), mode
, &data
);
907 max_size
= GET_MODE_SIZE (mode
);
910 /* The code above should have handled everything. */
911 gcc_assert (!data
.len
);
917 gcc_assert (!data
.reverse
);
922 if (HAVE_POST_INCREMENT
&& data
.explicit_inc_to
> 0)
923 emit_insn (gen_add2_insn (data
.to_addr
, constm1_rtx
));
925 data
.to_addr
= copy_to_mode_reg (to_addr_mode
,
926 plus_constant (to_addr_mode
,
930 to1
= adjust_automodify_address (data
.to
, QImode
, data
.to_addr
,
937 to1
= adjust_address (data
.to
, QImode
, data
.offset
);
945 /* Return number of insns required to move L bytes by pieces.
946 ALIGN (in bits) is maximum alignment we can assume. */
948 unsigned HOST_WIDE_INT
949 move_by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
950 unsigned int max_size
)
952 unsigned HOST_WIDE_INT n_insns
= 0;
954 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
956 while (max_size
> 1 && l
> 0)
959 enum insn_code icode
;
961 mode
= widest_int_mode_for_size (max_size
);
963 if (mode
== VOIDmode
)
966 icode
= optab_handler (mov_optab
, mode
);
967 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
968 n_insns
+= l
/ GET_MODE_SIZE (mode
), l
%= GET_MODE_SIZE (mode
);
970 max_size
= GET_MODE_SIZE (mode
);
977 /* Subroutine of move_by_pieces. Move as many bytes as appropriate
978 with move instructions for mode MODE. GENFUN is the gen_... function
979 to make a move insn for that mode. DATA has all the other info. */
982 move_by_pieces_1 (insn_gen_fn genfun
, machine_mode mode
,
983 struct move_by_pieces_d
*data
)
985 unsigned int size
= GET_MODE_SIZE (mode
);
986 rtx to1
= NULL_RTX
, from1
;
988 while (data
->len
>= size
)
991 data
->offset
-= size
;
996 to1
= adjust_automodify_address (data
->to
, mode
, data
->to_addr
,
999 to1
= adjust_address (data
->to
, mode
, data
->offset
);
1002 if (data
->autinc_from
)
1003 from1
= adjust_automodify_address (data
->from
, mode
, data
->from_addr
,
1006 from1
= adjust_address (data
->from
, mode
, data
->offset
);
1008 if (HAVE_PRE_DECREMENT
&& data
->explicit_inc_to
< 0)
1009 emit_insn (gen_add2_insn (data
->to_addr
,
1010 gen_int_mode (-(HOST_WIDE_INT
) size
,
1011 GET_MODE (data
->to_addr
))));
1012 if (HAVE_PRE_DECREMENT
&& data
->explicit_inc_from
< 0)
1013 emit_insn (gen_add2_insn (data
->from_addr
,
1014 gen_int_mode (-(HOST_WIDE_INT
) size
,
1015 GET_MODE (data
->from_addr
))));
1018 emit_insn ((*genfun
) (to1
, from1
));
1021 #ifdef PUSH_ROUNDING
1022 emit_single_push_insn (mode
, from1
, NULL
);
1028 if (HAVE_POST_INCREMENT
&& data
->explicit_inc_to
> 0)
1029 emit_insn (gen_add2_insn (data
->to_addr
,
1031 GET_MODE (data
->to_addr
))));
1032 if (HAVE_POST_INCREMENT
&& data
->explicit_inc_from
> 0)
1033 emit_insn (gen_add2_insn (data
->from_addr
,
1035 GET_MODE (data
->from_addr
))));
1037 if (! data
->reverse
)
1038 data
->offset
+= size
;
1044 /* Emit code to move a block Y to a block X. This may be done with
1045 string-move instructions, with multiple scalar move instructions,
1046 or with a library call.
1048 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1049 SIZE is an rtx that says how long they are.
1050 ALIGN is the maximum alignment we can assume they have.
1051 METHOD describes what kind of copy this is, and what mechanisms may be used.
1052 MIN_SIZE is the minimal size of block to move
1053 MAX_SIZE is the maximal size of block to move, if it can not be represented
1054 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1056 Return the address of the new block, if memcpy is called and returns it,
1060 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1061 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1062 unsigned HOST_WIDE_INT min_size
,
1063 unsigned HOST_WIDE_INT max_size
,
1064 unsigned HOST_WIDE_INT probable_max_size
)
1071 if (CONST_INT_P (size
)
1072 && INTVAL (size
) == 0)
1077 case BLOCK_OP_NORMAL
:
1078 case BLOCK_OP_TAILCALL
:
1079 may_use_call
= true;
1082 case BLOCK_OP_CALL_PARM
:
1083 may_use_call
= block_move_libcall_safe_for_call_parm ();
1085 /* Make inhibit_defer_pop nonzero around the library call
1086 to force it to pop the arguments right away. */
1090 case BLOCK_OP_NO_LIBCALL
:
1091 may_use_call
= false;
1098 gcc_assert (MEM_P (x
) && MEM_P (y
));
1099 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1100 gcc_assert (align
>= BITS_PER_UNIT
);
1102 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1103 block copy is more efficient for other large modes, e.g. DCmode. */
1104 x
= adjust_address (x
, BLKmode
, 0);
1105 y
= adjust_address (y
, BLKmode
, 0);
1107 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1108 can be incorrect is coming from __builtin_memcpy. */
1109 if (CONST_INT_P (size
))
1111 x
= shallow_copy_rtx (x
);
1112 y
= shallow_copy_rtx (y
);
1113 set_mem_size (x
, INTVAL (size
));
1114 set_mem_size (y
, INTVAL (size
));
1117 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1118 move_by_pieces (x
, y
, INTVAL (size
), align
, 0);
1119 else if (emit_block_move_via_movmem (x
, y
, size
, align
,
1120 expected_align
, expected_size
,
1121 min_size
, max_size
, probable_max_size
))
1123 else if (may_use_call
1124 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1125 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1127 /* Since x and y are passed to a libcall, mark the corresponding
1128 tree EXPR as addressable. */
1129 tree y_expr
= MEM_EXPR (y
);
1130 tree x_expr
= MEM_EXPR (x
);
1132 mark_addressable (y_expr
);
1134 mark_addressable (x_expr
);
1135 retval
= emit_block_move_via_libcall (x
, y
, size
,
1136 method
== BLOCK_OP_TAILCALL
);
1140 emit_block_move_via_loop (x
, y
, size
, align
);
1142 if (method
== BLOCK_OP_CALL_PARM
)
1149 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1151 unsigned HOST_WIDE_INT max
, min
= 0;
1152 if (GET_CODE (size
) == CONST_INT
)
1153 min
= max
= UINTVAL (size
);
1155 max
= GET_MODE_MASK (GET_MODE (size
));
1156 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1160 /* A subroutine of emit_block_move. Returns true if calling the
1161 block move libcall will not clobber any parameters which may have
1162 already been placed on the stack. */
1165 block_move_libcall_safe_for_call_parm (void)
1167 #if defined (REG_PARM_STACK_SPACE)
1171 /* If arguments are pushed on the stack, then they're safe. */
1175 /* If registers go on the stack anyway, any argument is sure to clobber
1176 an outgoing argument. */
1177 #if defined (REG_PARM_STACK_SPACE)
1178 fn
= emit_block_move_libcall_fn (false);
1179 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1180 depend on its argument. */
1182 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1183 && REG_PARM_STACK_SPACE (fn
) != 0)
1187 /* If any argument goes in memory, then it might clobber an outgoing
1190 CUMULATIVE_ARGS args_so_far_v
;
1191 cumulative_args_t args_so_far
;
1194 fn
= emit_block_move_libcall_fn (false);
1195 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1196 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1198 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1199 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1201 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1202 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1204 if (!tmp
|| !REG_P (tmp
))
1206 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1208 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1215 /* A subroutine of emit_block_move. Expand a movmem pattern;
1216 return true if successful. */
1219 emit_block_move_via_movmem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1220 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1221 unsigned HOST_WIDE_INT min_size
,
1222 unsigned HOST_WIDE_INT max_size
,
1223 unsigned HOST_WIDE_INT probable_max_size
)
1225 int save_volatile_ok
= volatile_ok
;
1228 if (expected_align
< align
)
1229 expected_align
= align
;
1230 if (expected_size
!= -1)
1232 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1233 expected_size
= probable_max_size
;
1234 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1235 expected_size
= min_size
;
1238 /* Since this is a move insn, we don't care about volatility. */
1241 /* Try the most limited insn first, because there's no point
1242 including more than one in the machine description unless
1243 the more limited one has some advantage. */
1245 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1246 mode
= GET_MODE_WIDER_MODE (mode
))
1248 enum insn_code code
= direct_optab_handler (movmem_optab
, mode
);
1250 if (code
!= CODE_FOR_nothing
1251 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1252 here because if SIZE is less than the mode mask, as it is
1253 returned by the macro, it will definitely be less than the
1254 actual mode mask. Since SIZE is within the Pmode address
1255 space, we limit MODE to Pmode. */
1256 && ((CONST_INT_P (size
)
1257 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1258 <= (GET_MODE_MASK (mode
) >> 1)))
1259 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1260 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1262 struct expand_operand ops
[9];
1265 /* ??? When called via emit_block_move_for_call, it'd be
1266 nice if there were some way to inform the backend, so
1267 that it doesn't fail the expansion because it thinks
1268 emitting the libcall would be more efficient. */
1269 nops
= insn_data
[(int) code
].n_generator_args
;
1270 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1272 create_fixed_operand (&ops
[0], x
);
1273 create_fixed_operand (&ops
[1], y
);
1274 /* The check above guarantees that this size conversion is valid. */
1275 create_convert_operand_to (&ops
[2], size
, mode
, true);
1276 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1279 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1280 create_integer_operand (&ops
[5], expected_size
);
1284 create_integer_operand (&ops
[6], min_size
);
1285 /* If we can not represent the maximal size,
1286 make parameter NULL. */
1287 if ((HOST_WIDE_INT
) max_size
!= -1)
1288 create_integer_operand (&ops
[7], max_size
);
1290 create_fixed_operand (&ops
[7], NULL
);
1294 /* If we can not represent the maximal size,
1295 make parameter NULL. */
1296 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1297 create_integer_operand (&ops
[8], probable_max_size
);
1299 create_fixed_operand (&ops
[8], NULL
);
1301 if (maybe_expand_insn (code
, nops
, ops
))
1303 volatile_ok
= save_volatile_ok
;
1309 volatile_ok
= save_volatile_ok
;
1313 /* A subroutine of emit_block_move. Expand a call to memcpy.
1314 Return the return value from memcpy, 0 otherwise. */
1317 emit_block_move_via_libcall (rtx dst
, rtx src
, rtx size
, bool tailcall
)
1319 rtx dst_addr
, src_addr
;
1320 tree call_expr
, fn
, src_tree
, dst_tree
, size_tree
;
1321 machine_mode size_mode
;
1324 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1325 pseudos. We can then place those new pseudos into a VAR_DECL and
1328 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1329 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1331 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1332 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1334 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1335 src_tree
= make_tree (ptr_type_node
, src_addr
);
1337 size_mode
= TYPE_MODE (sizetype
);
1339 size
= convert_to_mode (size_mode
, size
, 1);
1340 size
= copy_to_mode_reg (size_mode
, size
);
1342 /* It is incorrect to use the libcall calling conventions to call
1343 memcpy in this context. This could be a user call to memcpy and
1344 the user may wish to examine the return value from memcpy. For
1345 targets where libcalls and normal calls have different conventions
1346 for returning pointers, we could end up generating incorrect code. */
1348 size_tree
= make_tree (sizetype
, size
);
1350 fn
= emit_block_move_libcall_fn (true);
1351 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1352 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1354 retval
= expand_normal (call_expr
);
1359 /* A subroutine of emit_block_move_via_libcall. Create the tree node
1360 for the function we use for block copies. */
1362 static GTY(()) tree block_move_fn
;
1365 init_block_move_fn (const char *asmspec
)
1369 tree args
, fn
, attrs
, attr_args
;
1371 fn
= get_identifier ("memcpy");
1372 args
= build_function_type_list (ptr_type_node
, ptr_type_node
,
1373 const_ptr_type_node
, sizetype
,
1376 fn
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
, fn
, args
);
1377 DECL_EXTERNAL (fn
) = 1;
1378 TREE_PUBLIC (fn
) = 1;
1379 DECL_ARTIFICIAL (fn
) = 1;
1380 TREE_NOTHROW (fn
) = 1;
1381 DECL_VISIBILITY (fn
) = VISIBILITY_DEFAULT
;
1382 DECL_VISIBILITY_SPECIFIED (fn
) = 1;
1384 attr_args
= build_tree_list (NULL_TREE
, build_string (1, "1"));
1385 attrs
= tree_cons (get_identifier ("fn spec"), attr_args
, NULL
);
1387 decl_attributes (&fn
, attrs
, ATTR_FLAG_BUILT_IN
);
1393 set_user_assembler_name (block_move_fn
, asmspec
);
1397 emit_block_move_libcall_fn (int for_call
)
1399 static bool emitted_extern
;
1402 init_block_move_fn (NULL
);
1404 if (for_call
&& !emitted_extern
)
1406 emitted_extern
= true;
1407 make_decl_rtl (block_move_fn
);
1410 return block_move_fn
;
1413 /* A subroutine of emit_block_move. Copy the data via an explicit
1414 loop. This is used only when libcalls are forbidden. */
1415 /* ??? It'd be nice to copy in hunks larger than QImode. */
1418 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1419 unsigned int align ATTRIBUTE_UNUSED
)
1421 rtx_code_label
*cmp_label
, *top_label
;
1422 rtx iter
, x_addr
, y_addr
, tmp
;
1423 machine_mode x_addr_mode
= get_address_mode (x
);
1424 machine_mode y_addr_mode
= get_address_mode (y
);
1425 machine_mode iter_mode
;
1427 iter_mode
= GET_MODE (size
);
1428 if (iter_mode
== VOIDmode
)
1429 iter_mode
= word_mode
;
1431 top_label
= gen_label_rtx ();
1432 cmp_label
= gen_label_rtx ();
1433 iter
= gen_reg_rtx (iter_mode
);
1435 emit_move_insn (iter
, const0_rtx
);
1437 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1438 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1439 do_pending_stack_adjust ();
1441 emit_jump (cmp_label
);
1442 emit_label (top_label
);
1444 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1445 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1447 if (x_addr_mode
!= y_addr_mode
)
1448 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1449 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1451 x
= change_address (x
, QImode
, x_addr
);
1452 y
= change_address (y
, QImode
, y_addr
);
1454 emit_move_insn (x
, y
);
1456 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1457 true, OPTAB_LIB_WIDEN
);
1459 emit_move_insn (iter
, tmp
);
1461 emit_label (cmp_label
);
1463 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1464 true, top_label
, REG_BR_PROB_BASE
* 90 / 100);
1467 /* Copy all or part of a value X into registers starting at REGNO.
1468 The number of registers to be filled is NREGS. */
1471 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
1476 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
1477 x
= validize_mem (force_const_mem (mode
, x
));
1479 /* See if the machine can do this with a load multiple insn. */
1480 if (targetm
.have_load_multiple ())
1482 rtx_insn
*last
= get_last_insn ();
1483 rtx first
= gen_rtx_REG (word_mode
, regno
);
1484 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
1491 delete_insns_since (last
);
1494 for (int i
= 0; i
< nregs
; i
++)
1495 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
1496 operand_subword_force (x
, i
, mode
));
1499 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1500 The number of registers to be filled is NREGS. */
1503 move_block_from_reg (int regno
, rtx x
, int nregs
)
1508 /* See if the machine can do this with a store multiple insn. */
1509 if (targetm
.have_store_multiple ())
1511 rtx_insn
*last
= get_last_insn ();
1512 rtx first
= gen_rtx_REG (word_mode
, regno
);
1513 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
1520 delete_insns_since (last
);
1523 for (int i
= 0; i
< nregs
; i
++)
1525 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
1529 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
1533 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1534 ORIG, where ORIG is a non-consecutive group of registers represented by
1535 a PARALLEL. The clone is identical to the original except in that the
1536 original set of registers is replaced by a new set of pseudo registers.
1537 The new set has the same modes as the original set. */
1540 gen_group_rtx (rtx orig
)
1545 gcc_assert (GET_CODE (orig
) == PARALLEL
);
1547 length
= XVECLEN (orig
, 0);
1548 tmps
= XALLOCAVEC (rtx
, length
);
1550 /* Skip a NULL entry in first slot. */
1551 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
1556 for (; i
< length
; i
++)
1558 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
1559 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
1561 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
1564 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
1567 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
1568 except that values are placed in TMPS[i], and must later be moved
1569 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1572 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
, int ssize
)
1576 machine_mode m
= GET_MODE (orig_src
);
1578 gcc_assert (GET_CODE (dst
) == PARALLEL
);
1581 && !SCALAR_INT_MODE_P (m
)
1582 && !MEM_P (orig_src
)
1583 && GET_CODE (orig_src
) != CONCAT
)
1585 machine_mode imode
= int_mode_for_mode (GET_MODE (orig_src
));
1586 if (imode
== BLKmode
)
1587 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
1589 src
= gen_reg_rtx (imode
);
1590 if (imode
!= BLKmode
)
1591 src
= gen_lowpart (GET_MODE (orig_src
), src
);
1592 emit_move_insn (src
, orig_src
);
1593 /* ...and back again. */
1594 if (imode
!= BLKmode
)
1595 src
= gen_lowpart (imode
, src
);
1596 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
1600 /* Check for a NULL entry, used to indicate that the parameter goes
1601 both on the stack and in registers. */
1602 if (XEXP (XVECEXP (dst
, 0, 0), 0))
1607 /* Process the pieces. */
1608 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
1610 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
1611 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (dst
, 0, i
), 1));
1612 unsigned int bytelen
= GET_MODE_SIZE (mode
);
1615 /* Handle trailing fragments that run over the size of the struct. */
1616 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
1618 /* Arrange to shift the fragment to where it belongs.
1619 extract_bit_field loads to the lsb of the reg. */
1621 #ifdef BLOCK_REG_PADDING
1622 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
1623 == (BYTES_BIG_ENDIAN
? upward
: downward
)
1628 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
1629 bytelen
= ssize
- bytepos
;
1630 gcc_assert (bytelen
> 0);
1633 /* If we won't be loading directly from memory, protect the real source
1634 from strange tricks we might play; but make sure that the source can
1635 be loaded directly into the destination. */
1637 if (!MEM_P (orig_src
)
1638 && (!CONSTANT_P (orig_src
)
1639 || (GET_MODE (orig_src
) != mode
1640 && GET_MODE (orig_src
) != VOIDmode
)))
1642 if (GET_MODE (orig_src
) == VOIDmode
)
1643 src
= gen_reg_rtx (mode
);
1645 src
= gen_reg_rtx (GET_MODE (orig_src
));
1647 emit_move_insn (src
, orig_src
);
1650 /* Optimize the access just a bit. */
1652 && (! SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (src
))
1653 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
1654 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
1655 && bytelen
== GET_MODE_SIZE (mode
))
1657 tmps
[i
] = gen_reg_rtx (mode
);
1658 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
1660 else if (COMPLEX_MODE_P (mode
)
1661 && GET_MODE (src
) == mode
1662 && bytelen
== GET_MODE_SIZE (mode
))
1663 /* Let emit_move_complex do the bulk of the work. */
1665 else if (GET_CODE (src
) == CONCAT
)
1667 unsigned int slen
= GET_MODE_SIZE (GET_MODE (src
));
1668 unsigned int slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
1670 if ((bytepos
== 0 && bytelen
== slen0
)
1671 || (bytepos
!= 0 && bytepos
+ bytelen
<= slen
))
1673 /* The following assumes that the concatenated objects all
1674 have the same size. In this case, a simple calculation
1675 can be used to determine the object and the bit field
1677 tmps
[i
] = XEXP (src
, bytepos
/ slen0
);
1678 if (! CONSTANT_P (tmps
[i
])
1679 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
))
1680 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
1681 (bytepos
% slen0
) * BITS_PER_UNIT
,
1682 1, NULL_RTX
, mode
, mode
, false);
1688 gcc_assert (!bytepos
);
1689 mem
= assign_stack_temp (GET_MODE (src
), slen
);
1690 emit_move_insn (mem
, src
);
1691 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
1692 0, 1, NULL_RTX
, mode
, mode
, false);
1695 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1696 SIMD register, which is currently broken. While we get GCC
1697 to emit proper RTL for these cases, let's dump to memory. */
1698 else if (VECTOR_MODE_P (GET_MODE (dst
))
1701 int slen
= GET_MODE_SIZE (GET_MODE (src
));
1704 mem
= assign_stack_temp (GET_MODE (src
), slen
);
1705 emit_move_insn (mem
, src
);
1706 tmps
[i
] = adjust_address (mem
, mode
, (int) bytepos
);
1708 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
1709 && XVECLEN (dst
, 0) > 1)
1710 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
1711 else if (CONSTANT_P (src
))
1713 HOST_WIDE_INT len
= (HOST_WIDE_INT
) bytelen
;
1721 /* TODO: const_wide_int can have sizes other than this... */
1722 gcc_assert (2 * len
== ssize
);
1723 split_double (src
, &first
, &second
);
1730 else if (REG_P (src
) && GET_MODE (src
) == mode
)
1733 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
1734 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
1738 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
1743 /* Emit code to move a block SRC of type TYPE to a block DST,
1744 where DST is non-consecutive registers represented by a PARALLEL.
1745 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1749 emit_group_load (rtx dst
, rtx src
, tree type
, int ssize
)
1754 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
1755 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
1757 /* Copy the extracted pieces into the proper (probable) hard regs. */
1758 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
1760 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
1763 emit_move_insn (d
, tmps
[i
]);
1767 /* Similar, but load SRC into new pseudos in a format that looks like
1768 PARALLEL. This can later be fed to emit_group_move to get things
1769 in the right place. */
1772 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, int ssize
)
1777 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
1778 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
1780 /* Convert the vector to look just like the original PARALLEL, except
1781 with the computed values. */
1782 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
1784 rtx e
= XVECEXP (parallel
, 0, i
);
1785 rtx d
= XEXP (e
, 0);
1789 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
1790 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
1792 RTVEC_ELT (vec
, i
) = e
;
1795 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
1798 /* Emit code to move a block SRC to block DST, where SRC and DST are
1799 non-consecutive groups of registers, each represented by a PARALLEL. */
1802 emit_group_move (rtx dst
, rtx src
)
1806 gcc_assert (GET_CODE (src
) == PARALLEL
1807 && GET_CODE (dst
) == PARALLEL
1808 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
1810 /* Skip first entry if NULL. */
1811 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
1812 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
1813 XEXP (XVECEXP (src
, 0, i
), 0));
1816 /* Move a group of registers represented by a PARALLEL into pseudos. */
1819 emit_group_move_into_temps (rtx src
)
1821 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
1824 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
1826 rtx e
= XVECEXP (src
, 0, i
);
1827 rtx d
= XEXP (e
, 0);
1830 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
1831 RTVEC_ELT (vec
, i
) = e
;
1834 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
1837 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1838 where SRC is non-consecutive registers represented by a PARALLEL.
1839 SSIZE represents the total size of block ORIG_DST, or -1 if not
1843 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
, int ssize
)
1846 int start
, finish
, i
;
1847 machine_mode m
= GET_MODE (orig_dst
);
1849 gcc_assert (GET_CODE (src
) == PARALLEL
);
1851 if (!SCALAR_INT_MODE_P (m
)
1852 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
1854 machine_mode imode
= int_mode_for_mode (GET_MODE (orig_dst
));
1855 if (imode
== BLKmode
)
1856 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
1858 dst
= gen_reg_rtx (imode
);
1859 emit_group_store (dst
, src
, type
, ssize
);
1860 if (imode
!= BLKmode
)
1861 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
1862 emit_move_insn (orig_dst
, dst
);
1866 /* Check for a NULL entry, used to indicate that the parameter goes
1867 both on the stack and in registers. */
1868 if (XEXP (XVECEXP (src
, 0, 0), 0))
1872 finish
= XVECLEN (src
, 0);
1874 tmps
= XALLOCAVEC (rtx
, finish
);
1876 /* Copy the (probable) hard regs into pseudos. */
1877 for (i
= start
; i
< finish
; i
++)
1879 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
1880 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
1882 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
1883 emit_move_insn (tmps
[i
], reg
);
1889 /* If we won't be storing directly into memory, protect the real destination
1890 from strange tricks we might play. */
1892 if (GET_CODE (dst
) == PARALLEL
)
1896 /* We can get a PARALLEL dst if there is a conditional expression in
1897 a return statement. In that case, the dst and src are the same,
1898 so no action is necessary. */
1899 if (rtx_equal_p (dst
, src
))
1902 /* It is unclear if we can ever reach here, but we may as well handle
1903 it. Allocate a temporary, and split this into a store/load to/from
1905 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
1906 emit_group_store (temp
, src
, type
, ssize
);
1907 emit_group_load (dst
, temp
, type
, ssize
);
1910 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
1912 machine_mode outer
= GET_MODE (dst
);
1914 HOST_WIDE_INT bytepos
;
1918 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1919 dst
= gen_reg_rtx (outer
);
1921 /* Make life a bit easier for combine. */
1922 /* If the first element of the vector is the low part
1923 of the destination mode, use a paradoxical subreg to
1924 initialize the destination. */
1927 inner
= GET_MODE (tmps
[start
]);
1928 bytepos
= subreg_lowpart_offset (inner
, outer
);
1929 if (INTVAL (XEXP (XVECEXP (src
, 0, start
), 1)) == bytepos
)
1931 temp
= simplify_gen_subreg (outer
, tmps
[start
],
1935 emit_move_insn (dst
, temp
);
1942 /* If the first element wasn't the low part, try the last. */
1944 && start
< finish
- 1)
1946 inner
= GET_MODE (tmps
[finish
- 1]);
1947 bytepos
= subreg_lowpart_offset (inner
, outer
);
1948 if (INTVAL (XEXP (XVECEXP (src
, 0, finish
- 1), 1)) == bytepos
)
1950 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
1954 emit_move_insn (dst
, temp
);
1961 /* Otherwise, simply initialize the result to zero. */
1963 emit_move_insn (dst
, CONST0_RTX (outer
));
1966 /* Process the pieces. */
1967 for (i
= start
; i
< finish
; i
++)
1969 HOST_WIDE_INT bytepos
= INTVAL (XEXP (XVECEXP (src
, 0, i
), 1));
1970 machine_mode mode
= GET_MODE (tmps
[i
]);
1971 unsigned int bytelen
= GET_MODE_SIZE (mode
);
1972 unsigned int adj_bytelen
;
1975 /* Handle trailing fragments that run over the size of the struct. */
1976 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
1977 adj_bytelen
= ssize
- bytepos
;
1979 adj_bytelen
= bytelen
;
1981 if (GET_CODE (dst
) == CONCAT
)
1983 if (bytepos
+ adj_bytelen
1984 <= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
1985 dest
= XEXP (dst
, 0);
1986 else if (bytepos
>= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0))))
1988 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
1989 dest
= XEXP (dst
, 1);
1993 machine_mode dest_mode
= GET_MODE (dest
);
1994 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
1996 gcc_assert (bytepos
== 0 && XVECLEN (src
, 0));
1998 if (GET_MODE_ALIGNMENT (dest_mode
)
1999 >= GET_MODE_ALIGNMENT (tmp_mode
))
2001 dest
= assign_stack_temp (dest_mode
,
2002 GET_MODE_SIZE (dest_mode
));
2003 emit_move_insn (adjust_address (dest
,
2011 dest
= assign_stack_temp (tmp_mode
,
2012 GET_MODE_SIZE (tmp_mode
));
2013 emit_move_insn (dest
, tmps
[i
]);
2014 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2020 /* Handle trailing fragments that run over the size of the struct. */
2021 if (ssize
>= 0 && bytepos
+ (HOST_WIDE_INT
) bytelen
> ssize
)
2023 /* store_bit_field always takes its value from the lsb.
2024 Move the fragment to the lsb if it's not already there. */
2026 #ifdef BLOCK_REG_PADDING
2027 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2028 == (BYTES_BIG_ENDIAN
? upward
: downward
)
2034 int shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2035 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2039 /* Make sure not to write past the end of the struct. */
2040 store_bit_field (dest
,
2041 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2042 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2043 VOIDmode
, tmps
[i
], false);
2046 /* Optimize the access just a bit. */
2047 else if (MEM_P (dest
)
2048 && (!SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (dest
))
2049 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2050 && bytepos
* BITS_PER_UNIT
% GET_MODE_ALIGNMENT (mode
) == 0
2051 && bytelen
== GET_MODE_SIZE (mode
))
2052 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2055 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2056 0, 0, mode
, tmps
[i
], false);
2059 /* Copy from the pseudo into the (probable) hard reg. */
2060 if (orig_dst
!= dst
)
2061 emit_move_insn (orig_dst
, dst
);
2064 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2065 of the value stored in X. */
2068 maybe_emit_group_store (rtx x
, tree type
)
2070 machine_mode mode
= TYPE_MODE (type
);
2071 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2072 if (GET_CODE (x
) == PARALLEL
)
2074 rtx result
= gen_reg_rtx (mode
);
2075 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2081 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2083 This is used on targets that return BLKmode values in registers. */
2086 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2088 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2089 rtx src
= NULL
, dst
= NULL
;
2090 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2091 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2092 machine_mode mode
= GET_MODE (srcreg
);
2093 machine_mode tmode
= GET_MODE (target
);
2094 machine_mode copy_mode
;
2096 /* BLKmode registers created in the back-end shouldn't have survived. */
2097 gcc_assert (mode
!= BLKmode
);
2099 /* If the structure doesn't take up a whole number of words, see whether
2100 SRCREG is padded on the left or on the right. If it's on the left,
2101 set PADDING_CORRECTION to the number of bits to skip.
2103 In most ABIs, the structure will be returned at the least end of
2104 the register, which translates to right padding on little-endian
2105 targets and left padding on big-endian targets. The opposite
2106 holds if the structure is returned at the most significant
2107 end of the register. */
2108 if (bytes
% UNITS_PER_WORD
!= 0
2109 && (targetm
.calls
.return_in_msb (type
)
2111 : BYTES_BIG_ENDIAN
))
2113 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2115 /* We can use a single move if we have an exact mode for the size. */
2116 else if (MEM_P (target
)
2117 && (!SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (target
))
2118 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2119 && bytes
== GET_MODE_SIZE (mode
))
2121 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2125 /* And if we additionally have the same mode for a register. */
2126 else if (REG_P (target
)
2127 && GET_MODE (target
) == mode
2128 && bytes
== GET_MODE_SIZE (mode
))
2130 emit_move_insn (target
, srcreg
);
2134 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2135 into a new pseudo which is a full word. */
2136 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2138 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2142 /* Copy the structure BITSIZE bits at a time. If the target lives in
2143 memory, take care of not reading/writing past its end by selecting
2144 a copy mode suited to BITSIZE. This should always be possible given
2147 If the target lives in register, make sure not to select a copy mode
2148 larger than the mode of the register.
2150 We could probably emit more efficient code for machines which do not use
2151 strict alignment, but it doesn't seem worth the effort at the current
2154 copy_mode
= word_mode
;
2157 machine_mode mem_mode
= mode_for_size (bitsize
, MODE_INT
, 1);
2158 if (mem_mode
!= BLKmode
)
2159 copy_mode
= mem_mode
;
2161 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2164 for (bitpos
= 0, xbitpos
= padding_correction
;
2165 bitpos
< bytes
* BITS_PER_UNIT
;
2166 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2168 /* We need a new source operand each time xbitpos is on a
2169 word boundary and when xbitpos == padding_correction
2170 (the first time through). */
2171 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2172 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2174 /* We need a new destination operand each time bitpos is on
2176 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2178 else if (bitpos
% BITS_PER_WORD
== 0)
2179 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2181 /* Use xbitpos for the source extraction (right justified) and
2182 bitpos for the destination store (left justified). */
2183 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2184 extract_bit_field (src
, bitsize
,
2185 xbitpos
% BITS_PER_WORD
, 1,
2186 NULL_RTX
, copy_mode
, copy_mode
,
2192 /* Copy BLKmode value SRC into a register of mode MODE. Return the
2193 register if it contains any data, otherwise return null.
2195 This is used on targets that return BLKmode values in registers. */
2198 copy_blkmode_to_reg (machine_mode mode
, tree src
)
2201 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2202 unsigned int bitsize
;
2203 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2204 machine_mode dst_mode
;
2206 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2208 x
= expand_normal (src
);
2210 bytes
= int_size_in_bytes (TREE_TYPE (src
));
2214 /* If the structure doesn't take up a whole number of words, see
2215 whether the register value should be padded on the left or on
2216 the right. Set PADDING_CORRECTION to the number of padding
2217 bits needed on the left side.
2219 In most ABIs, the structure will be returned at the least end of
2220 the register, which translates to right padding on little-endian
2221 targets and left padding on big-endian targets. The opposite
2222 holds if the structure is returned at the most significant
2223 end of the register. */
2224 if (bytes
% UNITS_PER_WORD
!= 0
2225 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2227 : BYTES_BIG_ENDIAN
))
2228 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2231 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2232 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2233 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2235 /* Copy the structure BITSIZE bits at a time. */
2236 for (bitpos
= 0, xbitpos
= padding_correction
;
2237 bitpos
< bytes
* BITS_PER_UNIT
;
2238 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2240 /* We need a new destination pseudo each time xbitpos is
2241 on a word boundary and when xbitpos == padding_correction
2242 (the first time through). */
2243 if (xbitpos
% BITS_PER_WORD
== 0
2244 || xbitpos
== padding_correction
)
2246 /* Generate an appropriate register. */
2247 dst_word
= gen_reg_rtx (word_mode
);
2248 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2250 /* Clear the destination before we move anything into it. */
2251 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2254 /* We need a new source operand each time bitpos is on a word
2256 if (bitpos
% BITS_PER_WORD
== 0)
2257 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2259 /* Use bitpos for the source extraction (left justified) and
2260 xbitpos for the destination store (right justified). */
2261 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2263 extract_bit_field (src_word
, bitsize
,
2264 bitpos
% BITS_PER_WORD
, 1,
2265 NULL_RTX
, word_mode
, word_mode
,
2270 if (mode
== BLKmode
)
2272 /* Find the smallest integer mode large enough to hold the
2273 entire structure. */
2274 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
2276 mode
= GET_MODE_WIDER_MODE (mode
))
2277 /* Have we found a large enough mode? */
2278 if (GET_MODE_SIZE (mode
) >= bytes
)
2281 /* A suitable mode should have been found. */
2282 gcc_assert (mode
!= VOIDmode
);
2285 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2286 dst_mode
= word_mode
;
2289 dst
= gen_reg_rtx (dst_mode
);
2291 for (i
= 0; i
< n_regs
; i
++)
2292 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2294 if (mode
!= dst_mode
)
2295 dst
= gen_lowpart (mode
, dst
);
2300 /* Add a USE expression for REG to the (possibly empty) list pointed
2301 to by CALL_FUSAGE. REG must denote a hard register. */
2304 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2306 gcc_assert (REG_P (reg
));
2308 if (!HARD_REGISTER_P (reg
))
2312 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2315 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2316 to by CALL_FUSAGE. REG must denote a hard register. */
2319 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2321 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2324 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2327 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2328 starting at REGNO. All of these registers must be hard registers. */
2331 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2335 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2337 for (i
= 0; i
< nregs
; i
++)
2338 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2341 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2342 PARALLEL REGS. This is for calls that pass values in multiple
2343 non-contiguous locations. The Irix 6 ABI has examples of this. */
2346 use_group_regs (rtx
*call_fusage
, rtx regs
)
2350 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2352 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2354 /* A NULL entry means the parameter goes both on the stack and in
2355 registers. This can also be a MEM for targets that pass values
2356 partially on the stack and partially in registers. */
2357 if (reg
!= 0 && REG_P (reg
))
2358 use_reg (call_fusage
, reg
);
2362 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2363 assigment and the code of the expresion on the RHS is CODE. Return
2367 get_def_for_expr (tree name
, enum tree_code code
)
2371 if (TREE_CODE (name
) != SSA_NAME
)
2374 def_stmt
= get_gimple_for_ssa_name (name
);
2376 || gimple_assign_rhs_code (def_stmt
) != code
)
2382 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2383 assigment and the class of the expresion on the RHS is CLASS. Return
2387 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2391 if (TREE_CODE (name
) != SSA_NAME
)
2394 def_stmt
= get_gimple_for_ssa_name (name
);
2396 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2403 /* Determine whether the LEN bytes generated by CONSTFUN can be
2404 stored to memory using several move instructions. CONSTFUNDATA is
2405 a pointer which will be passed as argument in every CONSTFUN call.
2406 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2407 a memset operation and false if it's a copy of a constant string.
2408 Return nonzero if a call to store_by_pieces should succeed. */
2411 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
2412 rtx (*constfun
) (void *, HOST_WIDE_INT
, machine_mode
),
2413 void *constfundata
, unsigned int align
, bool memsetp
)
2415 unsigned HOST_WIDE_INT l
;
2416 unsigned int max_size
;
2417 HOST_WIDE_INT offset
= 0;
2419 enum insn_code icode
;
2421 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
2422 rtx cst ATTRIBUTE_UNUSED
;
2427 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
2431 optimize_insn_for_speed_p ()))
2434 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
2436 /* We would first store what we can in the largest integer mode, then go to
2437 successively smaller modes. */
2440 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
2444 max_size
= STORE_MAX_PIECES
+ 1;
2445 while (max_size
> 1 && l
> 0)
2447 mode
= widest_int_mode_for_size (max_size
);
2449 if (mode
== VOIDmode
)
2452 icode
= optab_handler (mov_optab
, mode
);
2453 if (icode
!= CODE_FOR_nothing
2454 && align
>= GET_MODE_ALIGNMENT (mode
))
2456 unsigned int size
= GET_MODE_SIZE (mode
);
2463 cst
= (*constfun
) (constfundata
, offset
, mode
);
2464 if (!targetm
.legitimate_constant_p (mode
, cst
))
2474 max_size
= GET_MODE_SIZE (mode
);
2477 /* The code above should have handled everything. */
2484 /* Generate several move instructions to store LEN bytes generated by
2485 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2486 pointer which will be passed as argument in every CONSTFUN call.
2487 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2488 a memset operation and false if it's a copy of a constant string.
2489 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2490 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2494 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
2495 rtx (*constfun
) (void *, HOST_WIDE_INT
, machine_mode
),
2496 void *constfundata
, unsigned int align
, bool memsetp
, int endp
)
2498 machine_mode to_addr_mode
= get_address_mode (to
);
2499 struct store_by_pieces_d data
;
2503 gcc_assert (endp
!= 2);
2507 gcc_assert (targetm
.use_by_pieces_infrastructure_p
2512 optimize_insn_for_speed_p ()));
2514 data
.constfun
= constfun
;
2515 data
.constfundata
= constfundata
;
2518 store_by_pieces_1 (&data
, align
);
2523 gcc_assert (!data
.reverse
);
2528 if (HAVE_POST_INCREMENT
&& data
.explicit_inc_to
> 0)
2529 emit_insn (gen_add2_insn (data
.to_addr
, constm1_rtx
));
2531 data
.to_addr
= copy_to_mode_reg (to_addr_mode
,
2532 plus_constant (to_addr_mode
,
2536 to1
= adjust_automodify_address (data
.to
, QImode
, data
.to_addr
,
2543 to1
= adjust_address (data
.to
, QImode
, data
.offset
);
2551 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2552 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2555 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
2557 struct store_by_pieces_d data
;
2562 data
.constfun
= clear_by_pieces_1
;
2563 data
.constfundata
= NULL
;
2566 store_by_pieces_1 (&data
, align
);
2569 /* Callback routine for clear_by_pieces.
2570 Return const0_rtx unconditionally. */
2573 clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED
,
2574 HOST_WIDE_INT offset ATTRIBUTE_UNUSED
,
2575 machine_mode mode ATTRIBUTE_UNUSED
)
2580 /* Subroutine of clear_by_pieces and store_by_pieces.
2581 Generate several move instructions to store LEN bytes of block TO. (A MEM
2582 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2585 store_by_pieces_1 (struct store_by_pieces_d
*data ATTRIBUTE_UNUSED
,
2586 unsigned int align ATTRIBUTE_UNUSED
)
2588 machine_mode to_addr_mode
= get_address_mode (data
->to
);
2589 rtx to_addr
= XEXP (data
->to
, 0);
2590 unsigned int max_size
= STORE_MAX_PIECES
+ 1;
2591 enum insn_code icode
;
2594 data
->to_addr
= to_addr
;
2596 = (GET_CODE (to_addr
) == PRE_INC
|| GET_CODE (to_addr
) == PRE_DEC
2597 || GET_CODE (to_addr
) == POST_INC
|| GET_CODE (to_addr
) == POST_DEC
);
2599 data
->explicit_inc_to
= 0;
2601 = (GET_CODE (to_addr
) == PRE_DEC
|| GET_CODE (to_addr
) == POST_DEC
);
2603 data
->offset
= data
->len
;
2605 /* If storing requires more than two move insns,
2606 copy addresses to registers (to make displacements shorter)
2607 and use post-increment if available. */
2608 if (!data
->autinc_to
2609 && move_by_pieces_ninsns (data
->len
, align
, max_size
) > 2)
2611 /* Determine the main mode we'll be using.
2612 MODE might not be used depending on the definitions of the
2613 USE_* macros below. */
2614 machine_mode mode ATTRIBUTE_UNUSED
2615 = widest_int_mode_for_size (max_size
);
2617 if (USE_STORE_PRE_DECREMENT (mode
) && data
->reverse
&& ! data
->autinc_to
)
2619 data
->to_addr
= copy_to_mode_reg (to_addr_mode
,
2620 plus_constant (to_addr_mode
,
2623 data
->autinc_to
= 1;
2624 data
->explicit_inc_to
= -1;
2627 if (USE_STORE_POST_INCREMENT (mode
) && ! data
->reverse
2628 && ! data
->autinc_to
)
2630 data
->to_addr
= copy_to_mode_reg (to_addr_mode
, to_addr
);
2631 data
->autinc_to
= 1;
2632 data
->explicit_inc_to
= 1;
2635 if ( !data
->autinc_to
&& CONSTANT_P (to_addr
))
2636 data
->to_addr
= copy_to_mode_reg (to_addr_mode
, to_addr
);
2639 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
2641 /* First store what we can in the largest integer mode, then go to
2642 successively smaller modes. */
2644 while (max_size
> 1 && data
->len
> 0)
2646 machine_mode mode
= widest_int_mode_for_size (max_size
);
2648 if (mode
== VOIDmode
)
2651 icode
= optab_handler (mov_optab
, mode
);
2652 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
2653 store_by_pieces_2 (GEN_FCN (icode
), mode
, data
);
2655 max_size
= GET_MODE_SIZE (mode
);
2658 /* The code above should have handled everything. */
2659 gcc_assert (!data
->len
);
2662 /* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2663 with move instructions for mode MODE. GENFUN is the gen_... function
2664 to make a move insn for that mode. DATA has all the other info. */
2667 store_by_pieces_2 (insn_gen_fn genfun
, machine_mode mode
,
2668 struct store_by_pieces_d
*data
)
2670 unsigned int size
= GET_MODE_SIZE (mode
);
2673 while (data
->len
>= size
)
2676 data
->offset
-= size
;
2678 if (data
->autinc_to
)
2679 to1
= adjust_automodify_address (data
->to
, mode
, data
->to_addr
,
2682 to1
= adjust_address (data
->to
, mode
, data
->offset
);
2684 if (HAVE_PRE_DECREMENT
&& data
->explicit_inc_to
< 0)
2685 emit_insn (gen_add2_insn (data
->to_addr
,
2686 gen_int_mode (-(HOST_WIDE_INT
) size
,
2687 GET_MODE (data
->to_addr
))));
2689 cst
= (*data
->constfun
) (data
->constfundata
, data
->offset
, mode
);
2690 emit_insn ((*genfun
) (to1
, cst
));
2692 if (HAVE_POST_INCREMENT
&& data
->explicit_inc_to
> 0)
2693 emit_insn (gen_add2_insn (data
->to_addr
,
2695 GET_MODE (data
->to_addr
))));
2697 if (! data
->reverse
)
2698 data
->offset
+= size
;
2704 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2705 its length in bytes. */
2708 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2709 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2710 unsigned HOST_WIDE_INT min_size
,
2711 unsigned HOST_WIDE_INT max_size
,
2712 unsigned HOST_WIDE_INT probable_max_size
)
2714 machine_mode mode
= GET_MODE (object
);
2717 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
2719 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2720 just move a zero. Otherwise, do this a piece at a time. */
2722 && CONST_INT_P (size
)
2723 && INTVAL (size
) == (HOST_WIDE_INT
) GET_MODE_SIZE (mode
))
2725 rtx zero
= CONST0_RTX (mode
);
2728 emit_move_insn (object
, zero
);
2732 if (COMPLEX_MODE_P (mode
))
2734 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
2737 write_complex_part (object
, zero
, 0);
2738 write_complex_part (object
, zero
, 1);
2744 if (size
== const0_rtx
)
2747 align
= MEM_ALIGN (object
);
2749 if (CONST_INT_P (size
)
2750 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
2752 optimize_insn_for_speed_p ()))
2753 clear_by_pieces (object
, INTVAL (size
), align
);
2754 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
2755 expected_align
, expected_size
,
2756 min_size
, max_size
, probable_max_size
))
2758 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
2759 return set_storage_via_libcall (object
, size
, const0_rtx
,
2760 method
== BLOCK_OP_TAILCALL
);
2768 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
2770 unsigned HOST_WIDE_INT max
, min
= 0;
2771 if (GET_CODE (size
) == CONST_INT
)
2772 min
= max
= UINTVAL (size
);
2774 max
= GET_MODE_MASK (GET_MODE (size
));
2775 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
2779 /* A subroutine of clear_storage. Expand a call to memset.
2780 Return the return value of memset, 0 otherwise. */
2783 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
2785 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
2786 machine_mode size_mode
;
2789 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2790 place those into new pseudos into a VAR_DECL and use them later. */
2792 object
= copy_addr_to_reg (XEXP (object
, 0));
2794 size_mode
= TYPE_MODE (sizetype
);
2795 size
= convert_to_mode (size_mode
, size
, 1);
2796 size
= copy_to_mode_reg (size_mode
, size
);
2798 /* It is incorrect to use the libcall calling conventions to call
2799 memset in this context. This could be a user call to memset and
2800 the user may wish to examine the return value from memset. For
2801 targets where libcalls and normal calls have different conventions
2802 for returning pointers, we could end up generating incorrect code. */
2804 object_tree
= make_tree (ptr_type_node
, object
);
2805 if (!CONST_INT_P (val
))
2806 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
2807 size_tree
= make_tree (sizetype
, size
);
2808 val_tree
= make_tree (integer_type_node
, val
);
2810 fn
= clear_storage_libcall_fn (true);
2811 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
2812 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
2814 retval
= expand_normal (call_expr
);
2819 /* A subroutine of set_storage_via_libcall. Create the tree node
2820 for the function we use for block clears. */
2822 tree block_clear_fn
;
2825 init_block_clear_fn (const char *asmspec
)
2827 if (!block_clear_fn
)
2831 fn
= get_identifier ("memset");
2832 args
= build_function_type_list (ptr_type_node
, ptr_type_node
,
2833 integer_type_node
, sizetype
,
2836 fn
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
, fn
, args
);
2837 DECL_EXTERNAL (fn
) = 1;
2838 TREE_PUBLIC (fn
) = 1;
2839 DECL_ARTIFICIAL (fn
) = 1;
2840 TREE_NOTHROW (fn
) = 1;
2841 DECL_VISIBILITY (fn
) = VISIBILITY_DEFAULT
;
2842 DECL_VISIBILITY_SPECIFIED (fn
) = 1;
2844 block_clear_fn
= fn
;
2848 set_user_assembler_name (block_clear_fn
, asmspec
);
2852 clear_storage_libcall_fn (int for_call
)
2854 static bool emitted_extern
;
2856 if (!block_clear_fn
)
2857 init_block_clear_fn (NULL
);
2859 if (for_call
&& !emitted_extern
)
2861 emitted_extern
= true;
2862 make_decl_rtl (block_clear_fn
);
2865 return block_clear_fn
;
2868 /* Expand a setmem pattern; return true if successful. */
2871 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
2872 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2873 unsigned HOST_WIDE_INT min_size
,
2874 unsigned HOST_WIDE_INT max_size
,
2875 unsigned HOST_WIDE_INT probable_max_size
)
2877 /* Try the most limited insn first, because there's no point
2878 including more than one in the machine description unless
2879 the more limited one has some advantage. */
2883 if (expected_align
< align
)
2884 expected_align
= align
;
2885 if (expected_size
!= -1)
2887 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
2888 expected_size
= max_size
;
2889 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
2890 expected_size
= min_size
;
2893 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
2894 mode
= GET_MODE_WIDER_MODE (mode
))
2896 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
2898 if (code
!= CODE_FOR_nothing
2899 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
2900 here because if SIZE is less than the mode mask, as it is
2901 returned by the macro, it will definitely be less than the
2902 actual mode mask. Since SIZE is within the Pmode address
2903 space, we limit MODE to Pmode. */
2904 && ((CONST_INT_P (size
)
2905 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
2906 <= (GET_MODE_MASK (mode
) >> 1)))
2907 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
2908 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
2910 struct expand_operand ops
[9];
2913 nops
= insn_data
[(int) code
].n_generator_args
;
2914 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
2916 create_fixed_operand (&ops
[0], object
);
2917 /* The check above guarantees that this size conversion is valid. */
2918 create_convert_operand_to (&ops
[1], size
, mode
, true);
2919 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
2920 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
2923 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
2924 create_integer_operand (&ops
[5], expected_size
);
2928 create_integer_operand (&ops
[6], min_size
);
2929 /* If we can not represent the maximal size,
2930 make parameter NULL. */
2931 if ((HOST_WIDE_INT
) max_size
!= -1)
2932 create_integer_operand (&ops
[7], max_size
);
2934 create_fixed_operand (&ops
[7], NULL
);
2938 /* If we can not represent the maximal size,
2939 make parameter NULL. */
2940 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
2941 create_integer_operand (&ops
[8], probable_max_size
);
2943 create_fixed_operand (&ops
[8], NULL
);
2945 if (maybe_expand_insn (code
, nops
, ops
))
2954 /* Write to one of the components of the complex value CPLX. Write VAL to
2955 the real part if IMAG_P is false, and the imaginary part if its true. */
2958 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
2964 if (GET_CODE (cplx
) == CONCAT
)
2966 emit_move_insn (XEXP (cplx
, imag_p
), val
);
2970 cmode
= GET_MODE (cplx
);
2971 imode
= GET_MODE_INNER (cmode
);
2972 ibitsize
= GET_MODE_BITSIZE (imode
);
2974 /* For MEMs simplify_gen_subreg may generate an invalid new address
2975 because, e.g., the original address is considered mode-dependent
2976 by the target, which restricts simplify_subreg from invoking
2977 adjust_address_nv. Instead of preparing fallback support for an
2978 invalid address, we call adjust_address_nv directly. */
2981 emit_move_insn (adjust_address_nv (cplx
, imode
,
2982 imag_p
? GET_MODE_SIZE (imode
) : 0),
2987 /* If the sub-object is at least word sized, then we know that subregging
2988 will work. This special case is important, since store_bit_field
2989 wants to operate on integer modes, and there's rarely an OImode to
2990 correspond to TCmode. */
2991 if (ibitsize
>= BITS_PER_WORD
2992 /* For hard regs we have exact predicates. Assume we can split
2993 the original object if it spans an even number of hard regs.
2994 This special case is important for SCmode on 64-bit platforms
2995 where the natural size of floating-point regs is 32-bit. */
2997 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
2998 && REG_NREGS (cplx
) % 2 == 0))
3000 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3001 imag_p
? GET_MODE_SIZE (imode
) : 0);
3004 emit_move_insn (part
, val
);
3008 /* simplify_gen_subreg may fail for sub-word MEMs. */
3009 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3012 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3016 /* Extract one of the components of the complex value CPLX. Extract the
3017 real part if IMAG_P is false, and the imaginary part if it's true. */
3020 read_complex_part (rtx cplx
, bool imag_p
)
3022 machine_mode cmode
, imode
;
3025 if (GET_CODE (cplx
) == CONCAT
)
3026 return XEXP (cplx
, imag_p
);
3028 cmode
= GET_MODE (cplx
);
3029 imode
= GET_MODE_INNER (cmode
);
3030 ibitsize
= GET_MODE_BITSIZE (imode
);
3032 /* Special case reads from complex constants that got spilled to memory. */
3033 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3035 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3036 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3038 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3039 if (CONSTANT_CLASS_P (part
))
3040 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3044 /* For MEMs simplify_gen_subreg may generate an invalid new address
3045 because, e.g., the original address is considered mode-dependent
3046 by the target, which restricts simplify_subreg from invoking
3047 adjust_address_nv. Instead of preparing fallback support for an
3048 invalid address, we call adjust_address_nv directly. */
3050 return adjust_address_nv (cplx
, imode
,
3051 imag_p
? GET_MODE_SIZE (imode
) : 0);
3053 /* If the sub-object is at least word sized, then we know that subregging
3054 will work. This special case is important, since extract_bit_field
3055 wants to operate on integer modes, and there's rarely an OImode to
3056 correspond to TCmode. */
3057 if (ibitsize
>= BITS_PER_WORD
3058 /* For hard regs we have exact predicates. Assume we can split
3059 the original object if it spans an even number of hard regs.
3060 This special case is important for SCmode on 64-bit platforms
3061 where the natural size of floating-point regs is 32-bit. */
3063 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3064 && REG_NREGS (cplx
) % 2 == 0))
3066 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3067 imag_p
? GET_MODE_SIZE (imode
) : 0);
3071 /* simplify_gen_subreg may fail for sub-word MEMs. */
3072 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3075 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3076 true, NULL_RTX
, imode
, imode
, false);
3079 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3080 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3081 represented in NEW_MODE. If FORCE is true, this will never happen, as
3082 we'll force-create a SUBREG if needed. */
3085 emit_move_change_mode (machine_mode new_mode
,
3086 machine_mode old_mode
, rtx x
, bool force
)
3090 if (push_operand (x
, GET_MODE (x
)))
3092 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3093 MEM_COPY_ATTRIBUTES (ret
, x
);
3097 /* We don't have to worry about changing the address since the
3098 size in bytes is supposed to be the same. */
3099 if (reload_in_progress
)
3101 /* Copy the MEM to change the mode and move any
3102 substitutions from the old MEM to the new one. */
3103 ret
= adjust_address_nv (x
, new_mode
, 0);
3104 copy_replacements (x
, ret
);
3107 ret
= adjust_address (x
, new_mode
, 0);
3111 /* Note that we do want simplify_subreg's behavior of validating
3112 that the new mode is ok for a hard register. If we were to use
3113 simplify_gen_subreg, we would create the subreg, but would
3114 probably run into the target not being able to implement it. */
3115 /* Except, of course, when FORCE is true, when this is exactly what
3116 we want. Which is needed for CCmodes on some targets. */
3118 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3120 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3126 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3127 an integer mode of the same size as MODE. Returns the instruction
3128 emitted, or NULL if such a move could not be generated. */
3131 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3134 enum insn_code code
;
3136 /* There must exist a mode of the exact size we require. */
3137 imode
= int_mode_for_mode (mode
);
3138 if (imode
== BLKmode
)
3141 /* The target must support moves in this mode. */
3142 code
= optab_handler (mov_optab
, imode
);
3143 if (code
== CODE_FOR_nothing
)
3146 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3149 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3152 return emit_insn (GEN_FCN (code
) (x
, y
));
3155 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3156 Return an equivalent MEM that does not use an auto-increment. */
3159 emit_move_resolve_push (machine_mode mode
, rtx x
)
3161 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3162 HOST_WIDE_INT adjust
;
3165 adjust
= GET_MODE_SIZE (mode
);
3166 #ifdef PUSH_ROUNDING
3167 adjust
= PUSH_ROUNDING (adjust
);
3169 if (code
== PRE_DEC
|| code
== POST_DEC
)
3171 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3173 rtx expr
= XEXP (XEXP (x
, 0), 1);
3176 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3177 gcc_assert (CONST_INT_P (XEXP (expr
, 1)));
3178 val
= INTVAL (XEXP (expr
, 1));
3179 if (GET_CODE (expr
) == MINUS
)
3181 gcc_assert (adjust
== val
|| adjust
== -val
);
3185 /* Do not use anti_adjust_stack, since we don't want to update
3186 stack_pointer_delta. */
3187 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3188 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3189 0, OPTAB_LIB_WIDEN
);
3190 if (temp
!= stack_pointer_rtx
)
3191 emit_move_insn (stack_pointer_rtx
, temp
);
3198 temp
= stack_pointer_rtx
;
3203 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3209 return replace_equiv_address (x
, temp
);
3212 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3213 X is known to satisfy push_operand, and MODE is known to be complex.
3214 Returns the last instruction emitted. */
3217 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3219 machine_mode submode
= GET_MODE_INNER (mode
);
3222 #ifdef PUSH_ROUNDING
3223 unsigned int submodesize
= GET_MODE_SIZE (submode
);
3225 /* In case we output to the stack, but the size is smaller than the
3226 machine can push exactly, we need to use move instructions. */
3227 if (PUSH_ROUNDING (submodesize
) != submodesize
)
3229 x
= emit_move_resolve_push (mode
, x
);
3230 return emit_move_insn (x
, y
);
3234 /* Note that the real part always precedes the imag part in memory
3235 regardless of machine's endianness. */
3236 switch (GET_CODE (XEXP (x
, 0)))
3250 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3251 read_complex_part (y
, imag_first
));
3252 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3253 read_complex_part (y
, !imag_first
));
3256 /* A subroutine of emit_move_complex. Perform the move from Y to X
3257 via two moves of the parts. Returns the last instruction emitted. */
3260 emit_move_complex_parts (rtx x
, rtx y
)
3262 /* Show the output dies here. This is necessary for SUBREGs
3263 of pseudos since we cannot track their lifetimes correctly;
3264 hard regs shouldn't appear here except as return values. */
3265 if (!reload_completed
&& !reload_in_progress
3266 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3269 write_complex_part (x
, read_complex_part (y
, false), false);
3270 write_complex_part (x
, read_complex_part (y
, true), true);
3272 return get_last_insn ();
3275 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3276 MODE is known to be complex. Returns the last instruction emitted. */
3279 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3283 /* Need to take special care for pushes, to maintain proper ordering
3284 of the data, and possibly extra padding. */
3285 if (push_operand (x
, mode
))
3286 return emit_move_complex_push (mode
, x
, y
);
3288 /* See if we can coerce the target into moving both values at once, except
3289 for floating point where we favor moving as parts if this is easy. */
3290 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3291 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3293 && HARD_REGISTER_P (x
)
3294 && REG_NREGS (x
) == 1)
3296 && HARD_REGISTER_P (y
)
3297 && REG_NREGS (y
) == 1))
3299 /* Not possible if the values are inherently not adjacent. */
3300 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3302 /* Is possible if both are registers (or subregs of registers). */
3303 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3305 /* If one of the operands is a memory, and alignment constraints
3306 are friendly enough, we may be able to do combined memory operations.
3307 We do not attempt this if Y is a constant because that combination is
3308 usually better with the by-parts thing below. */
3309 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3310 && (!STRICT_ALIGNMENT
3311 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3320 /* For memory to memory moves, optimal behavior can be had with the
3321 existing block move logic. */
3322 if (MEM_P (x
) && MEM_P (y
))
3324 emit_block_move (x
, y
, GEN_INT (GET_MODE_SIZE (mode
)),
3325 BLOCK_OP_NO_LIBCALL
);
3326 return get_last_insn ();
3329 ret
= emit_move_via_integer (mode
, x
, y
, true);
3334 return emit_move_complex_parts (x
, y
);
3337 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3338 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3341 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3345 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3348 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3349 if (code
!= CODE_FOR_nothing
)
3351 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3352 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3353 return emit_insn (GEN_FCN (code
) (x
, y
));
3357 /* Otherwise, find the MODE_INT mode of the same width. */
3358 ret
= emit_move_via_integer (mode
, x
, y
, false);
3359 gcc_assert (ret
!= NULL
);
3363 /* Return true if word I of OP lies entirely in the
3364 undefined bits of a paradoxical subreg. */
3367 undefined_operand_subword_p (const_rtx op
, int i
)
3369 machine_mode innermode
, innermostmode
;
3371 if (GET_CODE (op
) != SUBREG
)
3373 innermode
= GET_MODE (op
);
3374 innermostmode
= GET_MODE (SUBREG_REG (op
));
3375 offset
= i
* UNITS_PER_WORD
+ SUBREG_BYTE (op
);
3376 /* The SUBREG_BYTE represents offset, as if the value were stored in
3377 memory, except for a paradoxical subreg where we define
3378 SUBREG_BYTE to be 0; undo this exception as in
3380 if (SUBREG_BYTE (op
) == 0
3381 && GET_MODE_SIZE (innermostmode
) < GET_MODE_SIZE (innermode
))
3383 int difference
= (GET_MODE_SIZE (innermostmode
) - GET_MODE_SIZE (innermode
));
3384 if (WORDS_BIG_ENDIAN
)
3385 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
3386 if (BYTES_BIG_ENDIAN
)
3387 offset
+= difference
% UNITS_PER_WORD
;
3389 if (offset
>= GET_MODE_SIZE (innermostmode
)
3390 || offset
<= -GET_MODE_SIZE (word_mode
))
3395 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3396 MODE is any multi-word or full-word mode that lacks a move_insn
3397 pattern. Note that you will get better code if you define such
3398 patterns, even if they must turn into multiple assembler instructions. */
3401 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3403 rtx_insn
*last_insn
= 0;
3409 gcc_assert (GET_MODE_SIZE (mode
) >= UNITS_PER_WORD
);
3411 /* If X is a push on the stack, do the push now and replace
3412 X with a reference to the stack pointer. */
3413 if (push_operand (x
, mode
))
3414 x
= emit_move_resolve_push (mode
, x
);
3416 /* If we are in reload, see if either operand is a MEM whose address
3417 is scheduled for replacement. */
3418 if (reload_in_progress
&& MEM_P (x
)
3419 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3420 x
= replace_equiv_address_nv (x
, inner
);
3421 if (reload_in_progress
&& MEM_P (y
)
3422 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3423 y
= replace_equiv_address_nv (y
, inner
);
3427 need_clobber
= false;
3429 i
< (GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
;
3432 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3435 /* Do not generate code for a move if it would come entirely
3436 from the undefined bits of a paradoxical subreg. */
3437 if (undefined_operand_subword_p (y
, i
))
3440 ypart
= operand_subword (y
, i
, 1, mode
);
3442 /* If we can't get a part of Y, put Y into memory if it is a
3443 constant. Otherwise, force it into a register. Then we must
3444 be able to get a part of Y. */
3445 if (ypart
== 0 && CONSTANT_P (y
))
3447 y
= use_anchored_address (force_const_mem (mode
, y
));
3448 ypart
= operand_subword (y
, i
, 1, mode
);
3450 else if (ypart
== 0)
3451 ypart
= operand_subword_force (y
, i
, mode
);
3453 gcc_assert (xpart
&& ypart
);
3455 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3457 last_insn
= emit_move_insn (xpart
, ypart
);
3463 /* Show the output dies here. This is necessary for SUBREGs
3464 of pseudos since we cannot track their lifetimes correctly;
3465 hard regs shouldn't appear here except as return values.
3466 We never want to emit such a clobber after reload. */
3468 && ! (reload_in_progress
|| reload_completed
)
3469 && need_clobber
!= 0)
3477 /* Low level part of emit_move_insn.
3478 Called just like emit_move_insn, but assumes X and Y
3479 are basically valid. */
3482 emit_move_insn_1 (rtx x
, rtx y
)
3484 machine_mode mode
= GET_MODE (x
);
3485 enum insn_code code
;
3487 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3489 code
= optab_handler (mov_optab
, mode
);
3490 if (code
!= CODE_FOR_nothing
)
3491 return emit_insn (GEN_FCN (code
) (x
, y
));
3493 /* Expand complex moves by moving real part and imag part. */
3494 if (COMPLEX_MODE_P (mode
))
3495 return emit_move_complex (mode
, x
, y
);
3497 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3498 || ALL_FIXED_POINT_MODE_P (mode
))
3500 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3502 /* If we can't find an integer mode, use multi words. */
3506 return emit_move_multi_word (mode
, x
, y
);
3509 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3510 return emit_move_ccmode (mode
, x
, y
);
3512 /* Try using a move pattern for the corresponding integer mode. This is
3513 only safe when simplify_subreg can convert MODE constants into integer
3514 constants. At present, it can only do this reliably if the value
3515 fits within a HOST_WIDE_INT. */
3516 if (!CONSTANT_P (y
) || GET_MODE_BITSIZE (mode
) <= HOST_BITS_PER_WIDE_INT
)
3518 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3522 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3527 return emit_move_multi_word (mode
, x
, y
);
3530 /* Generate code to copy Y into X.
3531 Both Y and X must have the same mode, except that
3532 Y can be a constant with VOIDmode.
3533 This mode cannot be BLKmode; use emit_block_move for that.
3535 Return the last instruction emitted. */
3538 emit_move_insn (rtx x
, rtx y
)
3540 machine_mode mode
= GET_MODE (x
);
3541 rtx y_cst
= NULL_RTX
;
3542 rtx_insn
*last_insn
;
3545 gcc_assert (mode
!= BLKmode
3546 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3551 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3552 && (last_insn
= compress_float_constant (x
, y
)))
3557 if (!targetm
.legitimate_constant_p (mode
, y
))
3559 y
= force_const_mem (mode
, y
);
3561 /* If the target's cannot_force_const_mem prevented the spill,
3562 assume that the target's move expanders will also take care
3563 of the non-legitimate constant. */
3567 y
= use_anchored_address (y
);
3571 /* If X or Y are memory references, verify that their addresses are valid
3574 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3576 && ! push_operand (x
, GET_MODE (x
))))
3577 x
= validize_mem (x
);
3580 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3581 MEM_ADDR_SPACE (y
)))
3582 y
= validize_mem (y
);
3584 gcc_assert (mode
!= BLKmode
);
3586 last_insn
= emit_move_insn_1 (x
, y
);
3588 if (y_cst
&& REG_P (x
)
3589 && (set
= single_set (last_insn
)) != NULL_RTX
3590 && SET_DEST (set
) == x
3591 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3592 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3597 /* Generate the body of an instruction to copy Y into X.
3598 It may be a list of insns, if one insn isn't enough. */
3601 gen_move_insn (rtx x
, rtx y
)
3606 emit_move_insn_1 (x
, y
);
3612 /* If Y is representable exactly in a narrower mode, and the target can
3613 perform the extension directly from constant or memory, then emit the
3614 move as an extension. */
3617 compress_float_constant (rtx x
, rtx y
)
3619 machine_mode dstmode
= GET_MODE (x
);
3620 machine_mode orig_srcmode
= GET_MODE (y
);
3621 machine_mode srcmode
;
3622 const REAL_VALUE_TYPE
*r
;
3623 int oldcost
, newcost
;
3624 bool speed
= optimize_insn_for_speed_p ();
3626 r
= CONST_DOUBLE_REAL_VALUE (y
);
3628 if (targetm
.legitimate_constant_p (dstmode
, y
))
3629 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3631 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3633 for (srcmode
= GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode
));
3634 srcmode
!= orig_srcmode
;
3635 srcmode
= GET_MODE_WIDER_MODE (srcmode
))
3639 rtx_insn
*last_insn
;
3641 /* Skip if the target can't extend this way. */
3642 ic
= can_extend_p (dstmode
, srcmode
, 0);
3643 if (ic
== CODE_FOR_nothing
)
3646 /* Skip if the narrowed value isn't exact. */
3647 if (! exact_real_truncate (srcmode
, r
))
3650 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3652 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3654 /* Skip if the target needs extra instructions to perform
3656 if (!insn_operand_matches (ic
, 1, trunc_y
))
3658 /* This is valid, but may not be cheaper than the original. */
3659 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3661 if (oldcost
< newcost
)
3664 else if (float_extend_from_mem
[dstmode
][srcmode
])
3666 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3667 /* This is valid, but may not be cheaper than the original. */
3668 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3670 if (oldcost
< newcost
)
3672 trunc_y
= validize_mem (trunc_y
);
3677 /* For CSE's benefit, force the compressed constant pool entry
3678 into a new pseudo. This constant may be used in different modes,
3679 and if not, combine will put things back together for us. */
3680 trunc_y
= force_reg (srcmode
, trunc_y
);
3682 /* If x is a hard register, perform the extension into a pseudo,
3683 so that e.g. stack realignment code is aware of it. */
3685 if (REG_P (x
) && HARD_REGISTER_P (x
))
3686 target
= gen_reg_rtx (dstmode
);
3688 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3689 last_insn
= get_last_insn ();
3692 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3695 return emit_move_insn (x
, target
);
3702 /* Pushing data onto the stack. */
3704 /* Push a block of length SIZE (perhaps variable)
3705 and return an rtx to address the beginning of the block.
3706 The value may be virtual_outgoing_args_rtx.
3708 EXTRA is the number of bytes of padding to push in addition to SIZE.
3709 BELOW nonzero means this padding comes at low addresses;
3710 otherwise, the padding comes at high addresses. */
3713 push_block (rtx size
, int extra
, int below
)
3717 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3718 if (CONSTANT_P (size
))
3719 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3720 else if (REG_P (size
) && extra
== 0)
3721 anti_adjust_stack (size
);
3724 temp
= copy_to_mode_reg (Pmode
, size
);
3726 temp
= expand_binop (Pmode
, add_optab
, temp
,
3727 gen_int_mode (extra
, Pmode
),
3728 temp
, 0, OPTAB_LIB_WIDEN
);
3729 anti_adjust_stack (temp
);
3732 if (STACK_GROWS_DOWNWARD
)
3734 temp
= virtual_outgoing_args_rtx
;
3735 if (extra
!= 0 && below
)
3736 temp
= plus_constant (Pmode
, temp
, extra
);
3740 if (CONST_INT_P (size
))
3741 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3742 -INTVAL (size
) - (below
? 0 : extra
));
3743 else if (extra
!= 0 && !below
)
3744 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3745 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3748 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3749 negate_rtx (Pmode
, size
));
3752 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT
), temp
);
3755 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3758 mem_autoinc_base (rtx mem
)
3762 rtx addr
= XEXP (mem
, 0);
3763 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3764 return XEXP (addr
, 0);
3769 /* A utility routine used here, in reload, and in try_split. The insns
3770 after PREV up to and including LAST are known to adjust the stack,
3771 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3772 placing notes as appropriate. PREV may be NULL, indicating the
3773 entire insn sequence prior to LAST should be scanned.
3775 The set of allowed stack pointer modifications is small:
3776 (1) One or more auto-inc style memory references (aka pushes),
3777 (2) One or more addition/subtraction with the SP as destination,
3778 (3) A single move insn with the SP as destination,
3779 (4) A call_pop insn,
3780 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3782 Insns in the sequence that do not modify the SP are ignored,
3783 except for noreturn calls.
3785 The return value is the amount of adjustment that can be trivially
3786 verified, via immediate operand or auto-inc. If the adjustment
3787 cannot be trivially extracted, the return value is INT_MIN. */
3790 find_args_size_adjust (rtx_insn
*insn
)
3795 pat
= PATTERN (insn
);
3798 /* Look for a call_pop pattern. */
3801 /* We have to allow non-call_pop patterns for the case
3802 of emit_single_push_insn of a TLS address. */
3803 if (GET_CODE (pat
) != PARALLEL
)
3806 /* All call_pop have a stack pointer adjust in the parallel.
3807 The call itself is always first, and the stack adjust is
3808 usually last, so search from the end. */
3809 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
3811 set
= XVECEXP (pat
, 0, i
);
3812 if (GET_CODE (set
) != SET
)
3814 dest
= SET_DEST (set
);
3815 if (dest
== stack_pointer_rtx
)
3818 /* We'd better have found the stack pointer adjust. */
3821 /* Fall through to process the extracted SET and DEST
3822 as if it was a standalone insn. */
3824 else if (GET_CODE (pat
) == SET
)
3826 else if ((set
= single_set (insn
)) != NULL
)
3828 else if (GET_CODE (pat
) == PARALLEL
)
3830 /* ??? Some older ports use a parallel with a stack adjust
3831 and a store for a PUSH_ROUNDING pattern, rather than a
3832 PRE/POST_MODIFY rtx. Don't force them to update yet... */
3833 /* ??? See h8300 and m68k, pushqi1. */
3834 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
3836 set
= XVECEXP (pat
, 0, i
);
3837 if (GET_CODE (set
) != SET
)
3839 dest
= SET_DEST (set
);
3840 if (dest
== stack_pointer_rtx
)
3843 /* We do not expect an auto-inc of the sp in the parallel. */
3844 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
3845 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
3846 != stack_pointer_rtx
);
3854 dest
= SET_DEST (set
);
3856 /* Look for direct modifications of the stack pointer. */
3857 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
3859 /* Look for a trivial adjustment, otherwise assume nothing. */
3860 /* Note that the SPU restore_stack_block pattern refers to
3861 the stack pointer in V4SImode. Consider that non-trivial. */
3862 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
3863 && GET_CODE (SET_SRC (set
)) == PLUS
3864 && XEXP (SET_SRC (set
), 0) == stack_pointer_rtx
3865 && CONST_INT_P (XEXP (SET_SRC (set
), 1)))
3866 return INTVAL (XEXP (SET_SRC (set
), 1));
3867 /* ??? Reload can generate no-op moves, which will be cleaned
3868 up later. Recognize it and continue searching. */
3869 else if (rtx_equal_p (dest
, SET_SRC (set
)))
3872 return HOST_WIDE_INT_MIN
;
3878 /* Otherwise only think about autoinc patterns. */
3879 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
3882 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
3883 != stack_pointer_rtx
);
3885 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
3886 mem
= SET_SRC (set
);
3890 addr
= XEXP (mem
, 0);
3891 switch (GET_CODE (addr
))
3895 return GET_MODE_SIZE (GET_MODE (mem
));
3898 return -GET_MODE_SIZE (GET_MODE (mem
));
3901 addr
= XEXP (addr
, 1);
3902 gcc_assert (GET_CODE (addr
) == PLUS
);
3903 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
3904 gcc_assert (CONST_INT_P (XEXP (addr
, 1)));
3905 return INTVAL (XEXP (addr
, 1));
3913 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
, int end_args_size
)
3915 int args_size
= end_args_size
;
3916 bool saw_unknown
= false;
3919 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
3921 HOST_WIDE_INT this_delta
;
3923 if (!NONDEBUG_INSN_P (insn
))
3926 this_delta
= find_args_size_adjust (insn
);
3927 if (this_delta
== 0)
3930 || ACCUMULATE_OUTGOING_ARGS
3931 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
3935 gcc_assert (!saw_unknown
);
3936 if (this_delta
== HOST_WIDE_INT_MIN
)
3939 add_reg_note (insn
, REG_ARGS_SIZE
, GEN_INT (args_size
));
3940 if (STACK_GROWS_DOWNWARD
)
3941 this_delta
= -(unsigned HOST_WIDE_INT
) this_delta
;
3943 args_size
-= this_delta
;
3946 return saw_unknown
? INT_MIN
: args_size
;
3949 #ifdef PUSH_ROUNDING
3950 /* Emit single push insn. */
3953 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
3956 unsigned rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
3958 enum insn_code icode
;
3960 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
3961 /* If there is push pattern, use it. Otherwise try old way of throwing
3962 MEM representing push operation to move expander. */
3963 icode
= optab_handler (push_optab
, mode
);
3964 if (icode
!= CODE_FOR_nothing
)
3966 struct expand_operand ops
[1];
3968 create_input_operand (&ops
[0], x
, mode
);
3969 if (maybe_expand_insn (icode
, 1, ops
))
3972 if (GET_MODE_SIZE (mode
) == rounded_size
)
3973 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
3974 /* If we are to pad downward, adjust the stack pointer first and
3975 then store X into the stack location using an offset. This is
3976 because emit_move_insn does not know how to pad; it does not have
3978 else if (FUNCTION_ARG_PADDING (mode
, type
) == downward
)
3980 unsigned padding_size
= rounded_size
- GET_MODE_SIZE (mode
);
3981 HOST_WIDE_INT offset
;
3983 emit_move_insn (stack_pointer_rtx
,
3984 expand_binop (Pmode
,
3985 STACK_GROWS_DOWNWARD
? sub_optab
3988 gen_int_mode (rounded_size
, Pmode
),
3989 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
3991 offset
= (HOST_WIDE_INT
) padding_size
;
3992 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
3993 /* We have already decremented the stack pointer, so get the
3995 offset
+= (HOST_WIDE_INT
) rounded_size
;
3997 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
3998 /* We have already incremented the stack pointer, so get the
4000 offset
-= (HOST_WIDE_INT
) rounded_size
;
4002 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4003 gen_int_mode (offset
, Pmode
));
4007 if (STACK_GROWS_DOWNWARD
)
4008 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4009 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4010 gen_int_mode (-(HOST_WIDE_INT
) rounded_size
,
4013 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4014 dest_addr
= gen_rtx_PLUS (Pmode
, stack_pointer_rtx
,
4015 gen_int_mode (rounded_size
, Pmode
));
4017 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4020 dest
= gen_rtx_MEM (mode
, dest_addr
);
4024 set_mem_attributes (dest
, type
, 1);
4026 if (cfun
->tail_call_marked
)
4027 /* Function incoming arguments may overlap with sibling call
4028 outgoing arguments and we cannot allow reordering of reads
4029 from function arguments with stores to outgoing arguments
4030 of sibling calls. */
4031 set_mem_alias_set (dest
, 0);
4033 emit_move_insn (dest
, x
);
4036 /* Emit and annotate a single push insn. */
4039 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4041 int delta
, old_delta
= stack_pointer_delta
;
4042 rtx_insn
*prev
= get_last_insn ();
4045 emit_single_push_insn_1 (mode
, x
, type
);
4047 last
= get_last_insn ();
4049 /* Notice the common case where we emitted exactly one insn. */
4050 if (PREV_INSN (last
) == prev
)
4052 add_reg_note (last
, REG_ARGS_SIZE
, GEN_INT (stack_pointer_delta
));
4056 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4057 gcc_assert (delta
== INT_MIN
|| delta
== old_delta
);
4061 /* If reading SIZE bytes from X will end up reading from
4062 Y return the number of bytes that overlap. Return -1
4063 if there is no overlap or -2 if we can't determine
4064 (for example when X and Y have different base registers). */
4067 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4069 rtx tmp
= plus_constant (Pmode
, x
, size
);
4070 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4072 if (!CONST_INT_P (sub
))
4075 HOST_WIDE_INT val
= INTVAL (sub
);
4077 return IN_RANGE (val
, 1, size
) ? val
: -1;
4080 /* Generate code to push X onto the stack, assuming it has mode MODE and
4082 MODE is redundant except when X is a CONST_INT (since they don't
4084 SIZE is an rtx for the size of data to be copied (in bytes),
4085 needed only if X is BLKmode.
4086 Return true if successful. May return false if asked to push a
4087 partial argument during a sibcall optimization (as specified by
4088 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4091 ALIGN (in bits) is maximum alignment we can assume.
4093 If PARTIAL and REG are both nonzero, then copy that many of the first
4094 bytes of X into registers starting with REG, and push the rest of X.
4095 The amount of space pushed is decreased by PARTIAL bytes.
4096 REG must be a hard register in this case.
4097 If REG is zero but PARTIAL is not, take any all others actions for an
4098 argument partially in registers, but do not actually load any
4101 EXTRA is the amount in bytes of extra space to leave next to this arg.
4102 This is ignored if an argument block has already been allocated.
4104 On a machine that lacks real push insns, ARGS_ADDR is the address of
4105 the bottom of the argument block for this call. We use indexing off there
4106 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4107 argument block has not been preallocated.
4109 ARGS_SO_FAR is the size of args previously pushed for this call.
4111 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4112 for arguments passed in registers. If nonzero, it will be the number
4113 of bytes required. */
4116 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4117 unsigned int align
, int partial
, rtx reg
, int extra
,
4118 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4119 rtx alignment_pad
, bool sibcall_p
)
4122 enum direction stack_direction
= STACK_GROWS_DOWNWARD
? downward
: upward
;
4124 /* Decide where to pad the argument: `downward' for below,
4125 `upward' for above, or `none' for don't pad it.
4126 Default is below for small data on big-endian machines; else above. */
4127 enum direction where_pad
= FUNCTION_ARG_PADDING (mode
, type
);
4129 /* Invert direction if stack is post-decrement.
4131 if (STACK_PUSH_CODE
== POST_DEC
)
4132 if (where_pad
!= none
)
4133 where_pad
= (where_pad
== downward
? upward
: downward
);
4137 int nregs
= partial
/ UNITS_PER_WORD
;
4138 rtx
*tmp_regs
= NULL
;
4139 int overlapping
= 0;
4142 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4144 /* Copy a block into the stack, entirely or partially. */
4151 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4152 used
= partial
- offset
;
4154 if (mode
!= BLKmode
)
4156 /* A value is to be stored in an insufficiently aligned
4157 stack slot; copy via a suitably aligned slot if
4159 size
= GEN_INT (GET_MODE_SIZE (mode
));
4160 if (!MEM_P (xinner
))
4162 temp
= assign_temp (type
, 1, 1);
4163 emit_move_insn (temp
, xinner
);
4170 /* USED is now the # of bytes we need not copy to the stack
4171 because registers will take care of them. */
4174 xinner
= adjust_address (xinner
, BLKmode
, used
);
4176 /* If the partial register-part of the arg counts in its stack size,
4177 skip the part of stack space corresponding to the registers.
4178 Otherwise, start copying to the beginning of the stack space,
4179 by setting SKIP to 0. */
4180 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4182 #ifdef PUSH_ROUNDING
4183 /* Do it with several push insns if that doesn't take lots of insns
4184 and if there is no difficulty with push insns that skip bytes
4185 on the stack for alignment purposes. */
4188 && CONST_INT_P (size
)
4190 && MEM_ALIGN (xinner
) >= align
4191 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4192 /* Here we avoid the case of a structure whose weak alignment
4193 forces many pushes of a small amount of data,
4194 and such small pushes do rounding that causes trouble. */
4195 && ((! SLOW_UNALIGNED_ACCESS (word_mode
, align
))
4196 || align
>= BIGGEST_ALIGNMENT
4197 || (PUSH_ROUNDING (align
/ BITS_PER_UNIT
)
4198 == (align
/ BITS_PER_UNIT
)))
4199 && (HOST_WIDE_INT
) PUSH_ROUNDING (INTVAL (size
)) == INTVAL (size
))
4201 /* Push padding now if padding above and stack grows down,
4202 or if padding below and stack grows up.
4203 But if space already allocated, this has already been done. */
4204 if (extra
&& args_addr
== 0
4205 && where_pad
!= none
&& where_pad
!= stack_direction
)
4206 anti_adjust_stack (GEN_INT (extra
));
4208 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
, 0);
4211 #endif /* PUSH_ROUNDING */
4215 /* Otherwise make space on the stack and copy the data
4216 to the address of that space. */
4218 /* Deduct words put into registers from the size we must copy. */
4221 if (CONST_INT_P (size
))
4222 size
= GEN_INT (INTVAL (size
) - used
);
4224 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4225 gen_int_mode (used
, GET_MODE (size
)),
4226 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4229 /* Get the address of the stack space.
4230 In this case, we do not deal with EXTRA separately.
4231 A single stack adjust will do. */
4234 temp
= push_block (size
, extra
, where_pad
== downward
);
4237 else if (CONST_INT_P (args_so_far
))
4238 temp
= memory_address (BLKmode
,
4239 plus_constant (Pmode
, args_addr
,
4240 skip
+ INTVAL (args_so_far
)));
4242 temp
= memory_address (BLKmode
,
4243 plus_constant (Pmode
,
4244 gen_rtx_PLUS (Pmode
,
4249 if (!ACCUMULATE_OUTGOING_ARGS
)
4251 /* If the source is referenced relative to the stack pointer,
4252 copy it to another register to stabilize it. We do not need
4253 to do this if we know that we won't be changing sp. */
4255 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4256 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4257 temp
= copy_to_reg (temp
);
4260 target
= gen_rtx_MEM (BLKmode
, temp
);
4262 /* We do *not* set_mem_attributes here, because incoming arguments
4263 may overlap with sibling call outgoing arguments and we cannot
4264 allow reordering of reads from function arguments with stores
4265 to outgoing arguments of sibling calls. We do, however, want
4266 to record the alignment of the stack slot. */
4267 /* ALIGN may well be better aligned than TYPE, e.g. due to
4268 PARM_BOUNDARY. Assume the caller isn't lying. */
4269 set_mem_align (target
, align
);
4271 /* If part should go in registers and pushing to that part would
4272 overwrite some of the values that need to go into regs, load the
4273 overlapping values into temporary pseudos to be moved into the hard
4274 regs at the end after the stack pushing has completed.
4275 We cannot load them directly into the hard regs here because
4276 they can be clobbered by the block move expansions.
4279 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4280 && GET_CODE (reg
) != PARALLEL
)
4282 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4283 if (overlapping
> 0)
4285 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4286 overlapping
/= UNITS_PER_WORD
;
4288 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4290 for (int i
= 0; i
< overlapping
; i
++)
4291 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4293 for (int i
= 0; i
< overlapping
; i
++)
4294 emit_move_insn (tmp_regs
[i
],
4295 operand_subword_force (target
, i
, mode
));
4297 else if (overlapping
== -1)
4299 /* Could not determine whether there is overlap.
4300 Fail the sibcall. */
4308 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4311 else if (partial
> 0)
4313 /* Scalar partly in registers. */
4315 int size
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
;
4318 /* # bytes of start of argument
4319 that we must make space for but need not store. */
4320 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4321 int args_offset
= INTVAL (args_so_far
);
4324 /* Push padding now if padding above and stack grows down,
4325 or if padding below and stack grows up.
4326 But if space already allocated, this has already been done. */
4327 if (extra
&& args_addr
== 0
4328 && where_pad
!= none
&& where_pad
!= stack_direction
)
4329 anti_adjust_stack (GEN_INT (extra
));
4331 /* If we make space by pushing it, we might as well push
4332 the real data. Otherwise, we can leave OFFSET nonzero
4333 and leave the space uninitialized. */
4337 /* Now NOT_STACK gets the number of words that we don't need to
4338 allocate on the stack. Convert OFFSET to words too. */
4339 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4340 offset
/= UNITS_PER_WORD
;
4342 /* If the partial register-part of the arg counts in its stack size,
4343 skip the part of stack space corresponding to the registers.
4344 Otherwise, start copying to the beginning of the stack space,
4345 by setting SKIP to 0. */
4346 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4348 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4349 x
= validize_mem (force_const_mem (mode
, x
));
4351 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4352 SUBREGs of such registers are not allowed. */
4353 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4354 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4355 x
= copy_to_reg (x
);
4357 /* Loop over all the words allocated on the stack for this arg. */
4358 /* We can do it by words, because any scalar bigger than a word
4359 has a size a multiple of a word. */
4360 for (i
= size
- 1; i
>= not_stack
; i
--)
4361 if (i
>= not_stack
+ offset
)
4362 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4363 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4365 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4367 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4375 /* Push padding now if padding above and stack grows down,
4376 or if padding below and stack grows up.
4377 But if space already allocated, this has already been done. */
4378 if (extra
&& args_addr
== 0
4379 && where_pad
!= none
&& where_pad
!= stack_direction
)
4380 anti_adjust_stack (GEN_INT (extra
));
4382 #ifdef PUSH_ROUNDING
4383 if (args_addr
== 0 && PUSH_ARGS
)
4384 emit_single_push_insn (mode
, x
, type
);
4388 if (CONST_INT_P (args_so_far
))
4390 = memory_address (mode
,
4391 plus_constant (Pmode
, args_addr
,
4392 INTVAL (args_so_far
)));
4394 addr
= memory_address (mode
, gen_rtx_PLUS (Pmode
, args_addr
,
4396 dest
= gen_rtx_MEM (mode
, addr
);
4398 /* We do *not* set_mem_attributes here, because incoming arguments
4399 may overlap with sibling call outgoing arguments and we cannot
4400 allow reordering of reads from function arguments with stores
4401 to outgoing arguments of sibling calls. We do, however, want
4402 to record the alignment of the stack slot. */
4403 /* ALIGN may well be better aligned than TYPE, e.g. due to
4404 PARM_BOUNDARY. Assume the caller isn't lying. */
4405 set_mem_align (dest
, align
);
4407 emit_move_insn (dest
, x
);
4411 /* Move the partial arguments into the registers and any overlapping
4412 values that we moved into the pseudos in tmp_regs. */
4413 if (partial
> 0 && reg
!= 0)
4415 /* Handle calls that pass values in multiple non-contiguous locations.
4416 The Irix 6 ABI has examples of this. */
4417 if (GET_CODE (reg
) == PARALLEL
)
4418 emit_group_load (reg
, x
, type
, -1);
4421 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4422 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4424 for (int i
= 0; i
< overlapping
; i
++)
4425 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4426 + nregs
- overlapping
+ i
),
4432 if (extra
&& args_addr
== 0 && where_pad
== stack_direction
)
4433 anti_adjust_stack (GEN_INT (extra
));
4435 if (alignment_pad
&& args_addr
== 0)
4436 anti_adjust_stack (alignment_pad
);
4441 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4445 get_subtarget (rtx x
)
4449 /* Only registers can be subtargets. */
4451 /* Don't use hard regs to avoid extending their life. */
4452 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4456 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4457 FIELD is a bitfield. Returns true if the optimization was successful,
4458 and there's nothing else to do. */
4461 optimize_bitfield_assignment_op (unsigned HOST_WIDE_INT bitsize
,
4462 unsigned HOST_WIDE_INT bitpos
,
4463 unsigned HOST_WIDE_INT bitregion_start
,
4464 unsigned HOST_WIDE_INT bitregion_end
,
4465 machine_mode mode1
, rtx str_rtx
,
4466 tree to
, tree src
, bool reverse
)
4468 machine_mode str_mode
= GET_MODE (str_rtx
);
4469 unsigned int str_bitsize
= GET_MODE_BITSIZE (str_mode
);
4474 enum tree_code code
;
4476 if (mode1
!= VOIDmode
4477 || bitsize
>= BITS_PER_WORD
4478 || str_bitsize
> BITS_PER_WORD
4479 || TREE_SIDE_EFFECTS (to
)
4480 || TREE_THIS_VOLATILE (to
))
4484 if (TREE_CODE (src
) != SSA_NAME
)
4486 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4489 srcstmt
= get_gimple_for_ssa_name (src
);
4491 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4494 code
= gimple_assign_rhs_code (srcstmt
);
4496 op0
= gimple_assign_rhs1 (srcstmt
);
4498 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4499 to find its initialization. Hopefully the initialization will
4500 be from a bitfield load. */
4501 if (TREE_CODE (op0
) == SSA_NAME
)
4503 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4505 /* We want to eventually have OP0 be the same as TO, which
4506 should be a bitfield. */
4508 || !is_gimple_assign (op0stmt
)
4509 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4511 op0
= gimple_assign_rhs1 (op0stmt
);
4514 op1
= gimple_assign_rhs2 (srcstmt
);
4516 if (!operand_equal_p (to
, op0
, 0))
4519 if (MEM_P (str_rtx
))
4521 unsigned HOST_WIDE_INT offset1
;
4523 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4524 str_mode
= word_mode
;
4525 str_mode
= get_best_mode (bitsize
, bitpos
,
4526 bitregion_start
, bitregion_end
,
4527 MEM_ALIGN (str_rtx
), str_mode
, 0);
4528 if (str_mode
== VOIDmode
)
4530 str_bitsize
= GET_MODE_BITSIZE (str_mode
);
4533 bitpos
%= str_bitsize
;
4534 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4535 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4537 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4540 gcc_assert (!reverse
);
4542 /* If the bit field covers the whole REG/MEM, store_field
4543 will likely generate better code. */
4544 if (bitsize
>= str_bitsize
)
4547 /* We can't handle fields split across multiple entities. */
4548 if (bitpos
+ bitsize
> str_bitsize
)
4551 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4552 bitpos
= str_bitsize
- bitpos
- bitsize
;
4558 /* For now, just optimize the case of the topmost bitfield
4559 where we don't need to do any masking and also
4560 1 bit bitfields where xor can be used.
4561 We might win by one instruction for the other bitfields
4562 too if insv/extv instructions aren't used, so that
4563 can be added later. */
4564 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4565 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4568 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4569 value
= convert_modes (str_mode
,
4570 TYPE_MODE (TREE_TYPE (op1
)), value
,
4571 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4573 /* We may be accessing data outside the field, which means
4574 we can alias adjacent data. */
4575 if (MEM_P (str_rtx
))
4577 str_rtx
= shallow_copy_rtx (str_rtx
);
4578 set_mem_alias_set (str_rtx
, 0);
4579 set_mem_expr (str_rtx
, 0);
4582 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4584 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4588 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4590 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4592 value
= flip_storage_order (str_mode
, value
);
4593 result
= expand_binop (str_mode
, binop
, str_rtx
,
4594 value
, str_rtx
, 1, OPTAB_WIDEN
);
4595 if (result
!= str_rtx
)
4596 emit_move_insn (str_rtx
, result
);
4601 if (TREE_CODE (op1
) != INTEGER_CST
)
4603 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4604 value
= convert_modes (str_mode
,
4605 TYPE_MODE (TREE_TYPE (op1
)), value
,
4606 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4608 /* We may be accessing data outside the field, which means
4609 we can alias adjacent data. */
4610 if (MEM_P (str_rtx
))
4612 str_rtx
= shallow_copy_rtx (str_rtx
);
4613 set_mem_alias_set (str_rtx
, 0);
4614 set_mem_expr (str_rtx
, 0);
4617 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4618 if (bitpos
+ bitsize
!= str_bitsize
)
4620 rtx mask
= gen_int_mode (((unsigned HOST_WIDE_INT
) 1 << bitsize
) - 1,
4622 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4624 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4626 value
= flip_storage_order (str_mode
, value
);
4627 result
= expand_binop (str_mode
, binop
, str_rtx
,
4628 value
, str_rtx
, 1, OPTAB_WIDEN
);
4629 if (result
!= str_rtx
)
4630 emit_move_insn (str_rtx
, result
);
4640 /* In the C++ memory model, consecutive bit fields in a structure are
4641 considered one memory location.
4643 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4644 returns the bit range of consecutive bits in which this COMPONENT_REF
4645 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4646 and *OFFSET may be adjusted in the process.
4648 If the access does not need to be restricted, 0 is returned in both
4649 *BITSTART and *BITEND. */
4652 get_bit_range (unsigned HOST_WIDE_INT
*bitstart
,
4653 unsigned HOST_WIDE_INT
*bitend
,
4655 HOST_WIDE_INT
*bitpos
,
4658 HOST_WIDE_INT bitoffset
;
4661 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4663 field
= TREE_OPERAND (exp
, 1);
4664 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4665 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4666 need to limit the range we can access. */
4669 *bitstart
= *bitend
= 0;
4673 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4674 part of a larger bit field, then the representative does not serve any
4675 useful purpose. This can occur in Ada. */
4676 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4679 HOST_WIDE_INT rbitsize
, rbitpos
;
4681 int unsignedp
, reversep
, volatilep
= 0;
4682 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4683 &roffset
, &rmode
, &unsignedp
, &reversep
,
4685 if ((rbitpos
% BITS_PER_UNIT
) != 0)
4687 *bitstart
= *bitend
= 0;
4692 /* Compute the adjustment to bitpos from the offset of the field
4693 relative to the representative. DECL_FIELD_OFFSET of field and
4694 repr are the same by construction if they are not constants,
4695 see finish_bitfield_layout. */
4696 if (tree_fits_uhwi_p (DECL_FIELD_OFFSET (field
))
4697 && tree_fits_uhwi_p (DECL_FIELD_OFFSET (repr
)))
4698 bitoffset
= (tree_to_uhwi (DECL_FIELD_OFFSET (field
))
4699 - tree_to_uhwi (DECL_FIELD_OFFSET (repr
))) * BITS_PER_UNIT
;
4702 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4703 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4705 /* If the adjustment is larger than bitpos, we would have a negative bit
4706 position for the lower bound and this may wreak havoc later. Adjust
4707 offset and bitpos to make the lower bound non-negative in that case. */
4708 if (bitoffset
> *bitpos
)
4710 HOST_WIDE_INT adjust
= bitoffset
- *bitpos
;
4711 gcc_assert ((adjust
% BITS_PER_UNIT
) == 0);
4714 if (*offset
== NULL_TREE
)
4715 *offset
= size_int (-adjust
/ BITS_PER_UNIT
);
4718 = size_binop (MINUS_EXPR
, *offset
, size_int (adjust
/ BITS_PER_UNIT
));
4722 *bitstart
= *bitpos
- bitoffset
;
4724 *bitend
= *bitstart
+ tree_to_uhwi (DECL_SIZE (repr
)) - 1;
4727 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4728 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4729 DECL_RTL was not set yet, return NORTL. */
4732 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4734 if (TREE_CODE (addr
) != ADDR_EXPR
)
4737 tree base
= TREE_OPERAND (addr
, 0);
4740 || TREE_ADDRESSABLE (base
)
4741 || DECL_MODE (base
) == BLKmode
)
4744 if (!DECL_RTL_SET_P (base
))
4747 return (!MEM_P (DECL_RTL (base
)));
4750 /* Returns true if the MEM_REF REF refers to an object that does not
4751 reside in memory and has non-BLKmode. */
4754 mem_ref_refers_to_non_mem_p (tree ref
)
4756 tree base
= TREE_OPERAND (ref
, 0);
4757 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4760 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4761 is true, try generating a nontemporal store. */
4764 expand_assignment (tree to
, tree from
, bool nontemporal
)
4770 enum insn_code icode
;
4772 /* Don't crash if the lhs of the assignment was erroneous. */
4773 if (TREE_CODE (to
) == ERROR_MARK
)
4775 expand_normal (from
);
4779 /* Optimize away no-op moves without side-effects. */
4780 if (operand_equal_p (to
, from
, 0))
4783 /* Handle misaligned stores. */
4784 mode
= TYPE_MODE (TREE_TYPE (to
));
4785 if ((TREE_CODE (to
) == MEM_REF
4786 || TREE_CODE (to
) == TARGET_MEM_REF
)
4788 && !mem_ref_refers_to_non_mem_p (to
)
4789 && ((align
= get_object_alignment (to
))
4790 < GET_MODE_ALIGNMENT (mode
))
4791 && (((icode
= optab_handler (movmisalign_optab
, mode
))
4792 != CODE_FOR_nothing
)
4793 || SLOW_UNALIGNED_ACCESS (mode
, align
)))
4797 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
4798 reg
= force_not_mem (reg
);
4799 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4800 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
4801 reg
= flip_storage_order (mode
, reg
);
4803 if (icode
!= CODE_FOR_nothing
)
4805 struct expand_operand ops
[2];
4807 create_fixed_operand (&ops
[0], mem
);
4808 create_input_operand (&ops
[1], reg
, mode
);
4809 /* The movmisalign<mode> pattern cannot fail, else the assignment
4810 would silently be omitted. */
4811 expand_insn (icode
, 2, ops
);
4814 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
4819 /* Assignment of a structure component needs special treatment
4820 if the structure component's rtx is not simply a MEM.
4821 Assignment of an array element at a constant index, and assignment of
4822 an array element in an unaligned packed structure field, has the same
4823 problem. Same for (partially) storing into a non-memory object. */
4824 if (handled_component_p (to
)
4825 || (TREE_CODE (to
) == MEM_REF
4826 && (REF_REVERSE_STORAGE_ORDER (to
)
4827 || mem_ref_refers_to_non_mem_p (to
)))
4828 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
4831 HOST_WIDE_INT bitsize
, bitpos
;
4832 unsigned HOST_WIDE_INT bitregion_start
= 0;
4833 unsigned HOST_WIDE_INT bitregion_end
= 0;
4835 int unsignedp
, reversep
, volatilep
= 0;
4839 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
4840 &unsignedp
, &reversep
, &volatilep
, true);
4842 /* Make sure bitpos is not negative, it can wreak havoc later. */
4845 gcc_assert (offset
== NULL_TREE
);
4846 offset
= size_int (bitpos
>> (BITS_PER_UNIT
== 8
4847 ? 3 : exact_log2 (BITS_PER_UNIT
)));
4848 bitpos
&= BITS_PER_UNIT
- 1;
4851 if (TREE_CODE (to
) == COMPONENT_REF
4852 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
4853 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
4854 /* The C++ memory model naturally applies to byte-aligned fields.
4855 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
4856 BITSIZE are not byte-aligned, there is no need to limit the range
4857 we can access. This can occur with packed structures in Ada. */
4858 else if (bitsize
> 0
4859 && bitsize
% BITS_PER_UNIT
== 0
4860 && bitpos
% BITS_PER_UNIT
== 0)
4862 bitregion_start
= bitpos
;
4863 bitregion_end
= bitpos
+ bitsize
- 1;
4866 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
4868 /* If the field has a mode, we want to access it in the
4869 field's mode, not the computed mode.
4870 If a MEM has VOIDmode (external with incomplete type),
4871 use BLKmode for it instead. */
4874 if (mode1
!= VOIDmode
)
4875 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
4876 else if (GET_MODE (to_rtx
) == VOIDmode
)
4877 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
4882 machine_mode address_mode
;
4885 if (!MEM_P (to_rtx
))
4887 /* We can get constant negative offsets into arrays with broken
4888 user code. Translate this to a trap instead of ICEing. */
4889 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
4890 expand_builtin_trap ();
4891 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
4894 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
4895 address_mode
= get_address_mode (to_rtx
);
4896 if (GET_MODE (offset_rtx
) != address_mode
)
4898 /* We cannot be sure that the RTL in offset_rtx is valid outside
4899 of a memory address context, so force it into a register
4900 before attempting to convert it to the desired mode. */
4901 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
4902 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
4905 /* If we have an expression in OFFSET_RTX and a non-zero
4906 byte offset in BITPOS, adding the byte offset before the
4907 OFFSET_RTX results in better intermediate code, which makes
4908 later rtl optimization passes perform better.
4910 We prefer intermediate code like this:
4912 r124:DI=r123:DI+0x18
4917 r124:DI=r123:DI+0x10
4918 [r124:DI+0x8]=r121:DI
4920 This is only done for aligned data values, as these can
4921 be expected to result in single move instructions. */
4922 if (mode1
!= VOIDmode
4925 && (bitpos
% bitsize
) == 0
4926 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
4927 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
4929 to_rtx
= adjust_address (to_rtx
, mode1
, bitpos
/ BITS_PER_UNIT
);
4930 bitregion_start
= 0;
4931 if (bitregion_end
>= (unsigned HOST_WIDE_INT
) bitpos
)
4932 bitregion_end
-= bitpos
;
4936 to_rtx
= offset_address (to_rtx
, offset_rtx
,
4937 highest_pow2_factor_for_target (to
,
4941 /* No action is needed if the target is not a memory and the field
4942 lies completely outside that target. This can occur if the source
4943 code contains an out-of-bounds access to a small array. */
4945 && GET_MODE (to_rtx
) != BLKmode
4946 && (unsigned HOST_WIDE_INT
) bitpos
4947 >= GET_MODE_PRECISION (GET_MODE (to_rtx
)))
4949 expand_normal (from
);
4952 /* Handle expand_expr of a complex value returning a CONCAT. */
4953 else if (GET_CODE (to_rtx
) == CONCAT
)
4955 unsigned short mode_bitsize
= GET_MODE_BITSIZE (GET_MODE (to_rtx
));
4956 if (COMPLEX_MODE_P (TYPE_MODE (TREE_TYPE (from
)))
4958 && bitsize
== mode_bitsize
)
4959 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
4960 else if (bitsize
== mode_bitsize
/ 2
4961 && (bitpos
== 0 || bitpos
== mode_bitsize
/ 2))
4962 result
= store_expr (from
, XEXP (to_rtx
, bitpos
!= 0), false,
4963 nontemporal
, reversep
);
4964 else if (bitpos
+ bitsize
<= mode_bitsize
/ 2)
4965 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
4966 bitregion_start
, bitregion_end
,
4967 mode1
, from
, get_alias_set (to
),
4968 nontemporal
, reversep
);
4969 else if (bitpos
>= mode_bitsize
/ 2)
4970 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
4971 bitpos
- mode_bitsize
/ 2,
4972 bitregion_start
, bitregion_end
,
4973 mode1
, from
, get_alias_set (to
),
4974 nontemporal
, reversep
);
4975 else if (bitpos
== 0 && bitsize
== mode_bitsize
)
4978 result
= expand_normal (from
);
4979 from_rtx
= simplify_gen_subreg (GET_MODE (to_rtx
), result
,
4980 TYPE_MODE (TREE_TYPE (from
)), 0);
4981 emit_move_insn (XEXP (to_rtx
, 0),
4982 read_complex_part (from_rtx
, false));
4983 emit_move_insn (XEXP (to_rtx
, 1),
4984 read_complex_part (from_rtx
, true));
4988 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
4989 GET_MODE_SIZE (GET_MODE (to_rtx
)));
4990 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
4991 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
4992 result
= store_field (temp
, bitsize
, bitpos
,
4993 bitregion_start
, bitregion_end
,
4994 mode1
, from
, get_alias_set (to
),
4995 nontemporal
, reversep
);
4996 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
4997 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5004 /* If the field is at offset zero, we could have been given the
5005 DECL_RTX of the parent struct. Don't munge it. */
5006 to_rtx
= shallow_copy_rtx (to_rtx
);
5007 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5009 MEM_VOLATILE_P (to_rtx
) = 1;
5012 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5013 bitregion_start
, bitregion_end
,
5014 mode1
, to_rtx
, to
, from
,
5018 result
= store_field (to_rtx
, bitsize
, bitpos
,
5019 bitregion_start
, bitregion_end
,
5020 mode1
, from
, get_alias_set (to
),
5021 nontemporal
, reversep
);
5025 preserve_temp_slots (result
);
5030 /* If the rhs is a function call and its value is not an aggregate,
5031 call the function before we start to compute the lhs.
5032 This is needed for correct code for cases such as
5033 val = setjmp (buf) on machines where reference to val
5034 requires loading up part of an address in a separate insn.
5036 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5037 since it might be a promoted variable where the zero- or sign- extension
5038 needs to be done. Handling this in the normal way is safe because no
5039 computation is done before the call. The same is true for SSA names. */
5040 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5041 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5042 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5043 && ! (((TREE_CODE (to
) == VAR_DECL
5044 || TREE_CODE (to
) == PARM_DECL
5045 || TREE_CODE (to
) == RESULT_DECL
)
5046 && REG_P (DECL_RTL (to
)))
5047 || TREE_CODE (to
) == SSA_NAME
))
5053 value
= expand_normal (from
);
5055 /* Split value and bounds to store them separately. */
5056 chkp_split_slot (value
, &value
, &bounds
);
5059 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5061 /* Handle calls that return values in multiple non-contiguous locations.
5062 The Irix 6 ABI has examples of this. */
5063 if (GET_CODE (to_rtx
) == PARALLEL
)
5065 if (GET_CODE (value
) == PARALLEL
)
5066 emit_group_move (to_rtx
, value
);
5068 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5069 int_size_in_bytes (TREE_TYPE (from
)));
5071 else if (GET_CODE (value
) == PARALLEL
)
5072 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5073 int_size_in_bytes (TREE_TYPE (from
)));
5074 else if (GET_MODE (to_rtx
) == BLKmode
)
5076 /* Handle calls that return BLKmode values in registers. */
5078 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5080 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5084 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5085 value
= convert_memory_address_addr_space
5086 (GET_MODE (to_rtx
), value
,
5087 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5089 emit_move_insn (to_rtx
, value
);
5092 /* Store bounds if required. */
5094 && (BOUNDED_P (to
) || chkp_type_has_pointer (TREE_TYPE (to
))))
5096 gcc_assert (MEM_P (to_rtx
));
5097 chkp_emit_bounds_store (bounds
, value
, to_rtx
);
5100 preserve_temp_slots (to_rtx
);
5105 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5106 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5108 /* Don't move directly into a return register. */
5109 if (TREE_CODE (to
) == RESULT_DECL
5110 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5116 /* If the source is itself a return value, it still is in a pseudo at
5117 this point so we can move it back to the return register directly. */
5119 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5120 && TREE_CODE (from
) != CALL_EXPR
)
5121 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5123 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5125 /* Handle calls that return values in multiple non-contiguous locations.
5126 The Irix 6 ABI has examples of this. */
5127 if (GET_CODE (to_rtx
) == PARALLEL
)
5129 if (GET_CODE (temp
) == PARALLEL
)
5130 emit_group_move (to_rtx
, temp
);
5132 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5133 int_size_in_bytes (TREE_TYPE (from
)));
5136 emit_move_insn (to_rtx
, temp
);
5138 preserve_temp_slots (to_rtx
);
5143 /* In case we are returning the contents of an object which overlaps
5144 the place the value is being stored, use a safe function when copying
5145 a value through a pointer into a structure value return block. */
5146 if (TREE_CODE (to
) == RESULT_DECL
5147 && TREE_CODE (from
) == INDIRECT_REF
5148 && ADDR_SPACE_GENERIC_P
5149 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5150 && refs_may_alias_p (to
, from
)
5151 && cfun
->returns_struct
5152 && !cfun
->returns_pcc_struct
)
5157 size
= expr_size (from
);
5158 from_rtx
= expand_normal (from
);
5160 emit_library_call (memmove_libfunc
, LCT_NORMAL
,
5161 VOIDmode
, 3, XEXP (to_rtx
, 0), Pmode
,
5162 XEXP (from_rtx
, 0), Pmode
,
5163 convert_to_mode (TYPE_MODE (sizetype
),
5164 size
, TYPE_UNSIGNED (sizetype
)),
5165 TYPE_MODE (sizetype
));
5167 preserve_temp_slots (to_rtx
);
5172 /* Compute FROM and store the value in the rtx we got. */
5175 result
= store_expr_with_bounds (from
, to_rtx
, 0, nontemporal
, false, to
);
5176 preserve_temp_slots (result
);
5181 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5182 succeeded, false otherwise. */
5185 emit_storent_insn (rtx to
, rtx from
)
5187 struct expand_operand ops
[2];
5188 machine_mode mode
= GET_MODE (to
);
5189 enum insn_code code
= optab_handler (storent_optab
, mode
);
5191 if (code
== CODE_FOR_nothing
)
5194 create_fixed_operand (&ops
[0], to
);
5195 create_input_operand (&ops
[1], from
, mode
);
5196 return maybe_expand_insn (code
, 2, ops
);
5199 /* Generate code for computing expression EXP,
5200 and storing the value into TARGET.
5202 If the mode is BLKmode then we may return TARGET itself.
5203 It turns out that in BLKmode it doesn't cause a problem.
5204 because C has no operators that could combine two different
5205 assignments into the same BLKmode object with different values
5206 with no sequence point. Will other languages need this to
5209 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5210 stack, and block moves may need to be treated specially.
5212 If NONTEMPORAL is true, try using a nontemporal store instruction.
5214 If REVERSE is true, the store is to be done in reverse order.
5216 If BTARGET is not NULL then computed bounds of EXP are
5217 associated with BTARGET. */
5220 store_expr_with_bounds (tree exp
, rtx target
, int call_param_p
,
5221 bool nontemporal
, bool reverse
, tree btarget
)
5224 rtx alt_rtl
= NULL_RTX
;
5225 location_t loc
= curr_insn_location ();
5227 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5229 /* C++ can generate ?: expressions with a throw expression in one
5230 branch and an rvalue in the other. Here, we resolve attempts to
5231 store the throw expression's nonexistent result. */
5232 gcc_assert (!call_param_p
);
5233 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5236 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5238 /* Perform first part of compound expression, then assign from second
5240 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5241 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5242 return store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
,
5243 call_param_p
, nontemporal
, reverse
,
5246 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5248 /* For conditional expression, get safe form of the target. Then
5249 test the condition, doing the appropriate assignment on either
5250 side. This avoids the creation of unnecessary temporaries.
5251 For non-BLKmode, it is more efficient not to do this. */
5253 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5255 do_pending_stack_adjust ();
5257 jumpifnot (TREE_OPERAND (exp
, 0), lab1
, -1);
5258 store_expr_with_bounds (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5259 nontemporal
, reverse
, btarget
);
5260 emit_jump_insn (targetm
.gen_jump (lab2
));
5263 store_expr_with_bounds (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5264 nontemporal
, reverse
, btarget
);
5270 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5271 /* If this is a scalar in a register that is stored in a wider mode
5272 than the declared mode, compute the result into its declared mode
5273 and then convert to the wider mode. Our value is the computed
5276 rtx inner_target
= 0;
5278 /* We can do the conversion inside EXP, which will often result
5279 in some optimizations. Do the conversion in two steps: first
5280 change the signedness, if needed, then the extend. But don't
5281 do this if the type of EXP is a subtype of something else
5282 since then the conversion might involve more than just
5283 converting modes. */
5284 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5285 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5286 && GET_MODE_PRECISION (GET_MODE (target
))
5287 == TYPE_PRECISION (TREE_TYPE (exp
)))
5289 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5290 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5292 /* Some types, e.g. Fortran's logical*4, won't have a signed
5293 version, so use the mode instead. */
5295 = (signed_or_unsigned_type_for
5296 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5298 ntype
= lang_hooks
.types
.type_for_mode
5299 (TYPE_MODE (TREE_TYPE (exp
)),
5300 SUBREG_PROMOTED_SIGN (target
));
5302 exp
= fold_convert_loc (loc
, ntype
, exp
);
5305 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5306 (GET_MODE (SUBREG_REG (target
)),
5307 SUBREG_PROMOTED_SIGN (target
)),
5310 inner_target
= SUBREG_REG (target
);
5313 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5314 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5316 /* Handle bounds returned by call. */
5317 if (TREE_CODE (exp
) == CALL_EXPR
)
5320 chkp_split_slot (temp
, &temp
, &bounds
);
5321 if (bounds
&& btarget
)
5323 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5324 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5325 chkp_set_rtl_bounds (btarget
, tmp
);
5329 /* If TEMP is a VOIDmode constant, use convert_modes to make
5330 sure that we properly convert it. */
5331 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5333 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5334 temp
, SUBREG_PROMOTED_SIGN (target
));
5335 temp
= convert_modes (GET_MODE (SUBREG_REG (target
)),
5336 GET_MODE (target
), temp
,
5337 SUBREG_PROMOTED_SIGN (target
));
5340 convert_move (SUBREG_REG (target
), temp
,
5341 SUBREG_PROMOTED_SIGN (target
));
5345 else if ((TREE_CODE (exp
) == STRING_CST
5346 || (TREE_CODE (exp
) == MEM_REF
5347 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5348 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5350 && integer_zerop (TREE_OPERAND (exp
, 1))))
5351 && !nontemporal
&& !call_param_p
5354 /* Optimize initialization of an array with a STRING_CST. */
5355 HOST_WIDE_INT exp_len
, str_copy_len
;
5357 tree str
= TREE_CODE (exp
) == STRING_CST
5358 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5360 exp_len
= int_expr_size (exp
);
5364 if (TREE_STRING_LENGTH (str
) <= 0)
5367 str_copy_len
= strlen (TREE_STRING_POINTER (str
));
5368 if (str_copy_len
< TREE_STRING_LENGTH (str
) - 1)
5371 str_copy_len
= TREE_STRING_LENGTH (str
);
5372 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0
5373 && TREE_STRING_POINTER (str
)[TREE_STRING_LENGTH (str
) - 1] == '\0')
5375 str_copy_len
+= STORE_MAX_PIECES
- 1;
5376 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5378 str_copy_len
= MIN (str_copy_len
, exp_len
);
5379 if (!can_store_by_pieces (str_copy_len
, builtin_strncpy_read_str
,
5380 CONST_CAST (char *, TREE_STRING_POINTER (str
)),
5381 MEM_ALIGN (target
), false))
5386 dest_mem
= store_by_pieces (dest_mem
,
5387 str_copy_len
, builtin_strncpy_read_str
,
5389 TREE_STRING_POINTER (str
)),
5390 MEM_ALIGN (target
), false,
5391 exp_len
> str_copy_len
? 1 : 0);
5392 if (exp_len
> str_copy_len
)
5393 clear_storage (adjust_address (dest_mem
, BLKmode
, 0),
5394 GEN_INT (exp_len
- str_copy_len
),
5403 /* If we want to use a nontemporal or a reverse order store, force the
5404 value into a register first. */
5405 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5406 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5408 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5411 /* Handle bounds returned by call. */
5412 if (TREE_CODE (exp
) == CALL_EXPR
)
5415 chkp_split_slot (temp
, &temp
, &bounds
);
5416 if (bounds
&& btarget
)
5418 gcc_assert (TREE_CODE (btarget
) == SSA_NAME
);
5419 rtx tmp
= targetm
.calls
.load_returned_bounds (bounds
);
5420 chkp_set_rtl_bounds (btarget
, tmp
);
5425 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5426 the same as that of TARGET, adjust the constant. This is needed, for
5427 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5428 only a word-sized value. */
5429 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5430 && TREE_CODE (exp
) != ERROR_MARK
5431 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5432 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5433 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5435 /* If value was not generated in the target, store it there.
5436 Convert the value to TARGET's type first if necessary and emit the
5437 pending incrementations that have been queued when expanding EXP.
5438 Note that we cannot emit the whole queue blindly because this will
5439 effectively disable the POST_INC optimization later.
5441 If TEMP and TARGET compare equal according to rtx_equal_p, but
5442 one or both of them are volatile memory refs, we have to distinguish
5444 - expand_expr has used TARGET. In this case, we must not generate
5445 another copy. This can be detected by TARGET being equal according
5447 - expand_expr has not used TARGET - that means that the source just
5448 happens to have the same RTX form. Since temp will have been created
5449 by expand_expr, it will compare unequal according to == .
5450 We must generate a copy in this case, to reach the correct number
5451 of volatile memory references. */
5453 if ((! rtx_equal_p (temp
, target
)
5454 || (temp
!= target
&& (side_effects_p (temp
)
5455 || side_effects_p (target
))))
5456 && TREE_CODE (exp
) != ERROR_MARK
5457 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5458 but TARGET is not valid memory reference, TEMP will differ
5459 from TARGET although it is really the same location. */
5461 && rtx_equal_p (alt_rtl
, target
)
5462 && !side_effects_p (alt_rtl
)
5463 && !side_effects_p (target
))
5464 /* If there's nothing to copy, don't bother. Don't call
5465 expr_size unless necessary, because some front-ends (C++)
5466 expr_size-hook must not be given objects that are not
5467 supposed to be bit-copied or bit-initialized. */
5468 && expr_size (exp
) != const0_rtx
)
5470 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5472 if (GET_MODE (target
) == BLKmode
)
5474 /* Handle calls that return BLKmode values in registers. */
5475 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5476 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5478 store_bit_field (target
,
5479 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5480 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5483 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5486 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5488 /* Handle copying a string constant into an array. The string
5489 constant may be shorter than the array. So copy just the string's
5490 actual length, and clear the rest. First get the size of the data
5491 type of the string, which is actually the size of the target. */
5492 rtx size
= expr_size (exp
);
5494 if (CONST_INT_P (size
)
5495 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5496 emit_block_move (target
, temp
, size
,
5498 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5501 machine_mode pointer_mode
5502 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5503 machine_mode address_mode
= get_address_mode (target
);
5505 /* Compute the size of the data to copy from the string. */
5507 = size_binop_loc (loc
, MIN_EXPR
,
5508 make_tree (sizetype
, size
),
5509 size_int (TREE_STRING_LENGTH (exp
)));
5511 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5513 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5514 rtx_code_label
*label
= 0;
5516 /* Copy that much. */
5517 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5518 TYPE_UNSIGNED (sizetype
));
5519 emit_block_move (target
, temp
, copy_size_rtx
,
5521 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5523 /* Figure out how much is left in TARGET that we have to clear.
5524 Do all calculations in pointer_mode. */
5525 if (CONST_INT_P (copy_size_rtx
))
5527 size
= plus_constant (address_mode
, size
,
5528 -INTVAL (copy_size_rtx
));
5529 target
= adjust_address (target
, BLKmode
,
5530 INTVAL (copy_size_rtx
));
5534 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5535 copy_size_rtx
, NULL_RTX
, 0,
5538 if (GET_MODE (copy_size_rtx
) != address_mode
)
5539 copy_size_rtx
= convert_to_mode (address_mode
,
5541 TYPE_UNSIGNED (sizetype
));
5543 target
= offset_address (target
, copy_size_rtx
,
5544 highest_pow2_factor (copy_size
));
5545 label
= gen_label_rtx ();
5546 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5547 GET_MODE (size
), 0, label
);
5550 if (size
!= const0_rtx
)
5551 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5557 /* Handle calls that return values in multiple non-contiguous locations.
5558 The Irix 6 ABI has examples of this. */
5559 else if (GET_CODE (target
) == PARALLEL
)
5561 if (GET_CODE (temp
) == PARALLEL
)
5562 emit_group_move (target
, temp
);
5564 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5565 int_size_in_bytes (TREE_TYPE (exp
)));
5567 else if (GET_CODE (temp
) == PARALLEL
)
5568 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5569 int_size_in_bytes (TREE_TYPE (exp
)));
5570 else if (GET_MODE (temp
) == BLKmode
)
5571 emit_block_move (target
, temp
, expr_size (exp
),
5573 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5574 /* If we emit a nontemporal store, there is nothing else to do. */
5575 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5580 temp
= flip_storage_order (GET_MODE (target
), temp
);
5581 temp
= force_operand (temp
, target
);
5583 emit_move_insn (target
, temp
);
5590 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5592 store_expr (tree exp
, rtx target
, int call_param_p
, bool nontemporal
,
5595 return store_expr_with_bounds (exp
, target
, call_param_p
, nontemporal
,
5599 /* Return true if field F of structure TYPE is a flexible array. */
5602 flexible_array_member_p (const_tree f
, const_tree type
)
5607 return (DECL_CHAIN (f
) == NULL
5608 && TREE_CODE (tf
) == ARRAY_TYPE
5610 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5611 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5612 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5613 && int_size_in_bytes (type
) >= 0);
5616 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5617 must have in order for it to completely initialize a value of type TYPE.
5618 Return -1 if the number isn't known.
5620 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5622 static HOST_WIDE_INT
5623 count_type_elements (const_tree type
, bool for_ctor_p
)
5625 switch (TREE_CODE (type
))
5631 nelts
= array_type_nelts (type
);
5632 if (nelts
&& tree_fits_uhwi_p (nelts
))
5634 unsigned HOST_WIDE_INT n
;
5636 n
= tree_to_uhwi (nelts
) + 1;
5637 if (n
== 0 || for_ctor_p
)
5640 return n
* count_type_elements (TREE_TYPE (type
), false);
5642 return for_ctor_p
? -1 : 1;
5647 unsigned HOST_WIDE_INT n
;
5651 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5652 if (TREE_CODE (f
) == FIELD_DECL
)
5655 n
+= count_type_elements (TREE_TYPE (f
), false);
5656 else if (!flexible_array_member_p (f
, type
))
5657 /* Don't count flexible arrays, which are not supposed
5658 to be initialized. */
5666 case QUAL_UNION_TYPE
:
5671 gcc_assert (!for_ctor_p
);
5672 /* Estimate the number of scalars in each field and pick the
5673 maximum. Other estimates would do instead; the idea is simply
5674 to make sure that the estimate is not sensitive to the ordering
5677 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5678 if (TREE_CODE (f
) == FIELD_DECL
)
5680 m
= count_type_elements (TREE_TYPE (f
), false);
5681 /* If the field doesn't span the whole union, add an extra
5682 scalar for the rest. */
5683 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5684 TYPE_SIZE (type
)) != 1)
5696 return TYPE_VECTOR_SUBPARTS (type
);
5700 case FIXED_POINT_TYPE
:
5705 case REFERENCE_TYPE
:
5721 /* Helper for categorize_ctor_elements. Identical interface. */
5724 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5725 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5727 unsigned HOST_WIDE_INT idx
;
5728 HOST_WIDE_INT nz_elts
, init_elts
, num_fields
;
5729 tree value
, purpose
, elt_type
;
5731 /* Whether CTOR is a valid constant initializer, in accordance with what
5732 initializer_constant_valid_p does. If inferred from the constructor
5733 elements, true until proven otherwise. */
5734 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
5735 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
5740 elt_type
= NULL_TREE
;
5742 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
5744 HOST_WIDE_INT mult
= 1;
5746 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
5748 tree lo_index
= TREE_OPERAND (purpose
, 0);
5749 tree hi_index
= TREE_OPERAND (purpose
, 1);
5751 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
5752 mult
= (tree_to_uhwi (hi_index
)
5753 - tree_to_uhwi (lo_index
) + 1);
5756 elt_type
= TREE_TYPE (value
);
5758 switch (TREE_CODE (value
))
5762 HOST_WIDE_INT nz
= 0, ic
= 0;
5764 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &ic
,
5767 nz_elts
+= mult
* nz
;
5768 init_elts
+= mult
* ic
;
5770 if (const_from_elts_p
&& const_p
)
5771 const_p
= const_elt_p
;
5778 if (!initializer_zerop (value
))
5784 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
5785 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
5789 if (!initializer_zerop (TREE_REALPART (value
)))
5791 if (!initializer_zerop (TREE_IMAGPART (value
)))
5799 for (i
= 0; i
< VECTOR_CST_NELTS (value
); ++i
)
5801 tree v
= VECTOR_CST_ELT (value
, i
);
5802 if (!initializer_zerop (v
))
5811 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
5812 nz_elts
+= mult
* tc
;
5813 init_elts
+= mult
* tc
;
5815 if (const_from_elts_p
&& const_p
)
5817 = initializer_constant_valid_p (value
,
5819 TYPE_REVERSE_STORAGE_ORDER
5827 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
5828 num_fields
, elt_type
))
5829 *p_complete
= false;
5831 *p_nz_elts
+= nz_elts
;
5832 *p_init_elts
+= init_elts
;
5837 /* Examine CTOR to discover:
5838 * how many scalar fields are set to nonzero values,
5839 and place it in *P_NZ_ELTS;
5840 * how many scalar fields in total are in CTOR,
5841 and place it in *P_ELT_COUNT.
5842 * whether the constructor is complete -- in the sense that every
5843 meaningful byte is explicitly given a value --
5844 and place it in *P_COMPLETE.
5846 Return whether or not CTOR is a valid static constant initializer, the same
5847 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
5850 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
5851 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
5857 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_init_elts
, p_complete
);
5860 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
5861 of which had type LAST_TYPE. Each element was itself a complete
5862 initializer, in the sense that every meaningful byte was explicitly
5863 given a value. Return true if the same is true for the constructor
5867 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
5868 const_tree last_type
)
5870 if (TREE_CODE (type
) == UNION_TYPE
5871 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
5876 gcc_assert (num_elts
== 1 && last_type
);
5878 /* ??? We could look at each element of the union, and find the
5879 largest element. Which would avoid comparing the size of the
5880 initialized element against any tail padding in the union.
5881 Doesn't seem worth the effort... */
5882 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
5885 return count_type_elements (type
, true) == num_elts
;
5888 /* Return 1 if EXP contains mostly (3/4) zeros. */
5891 mostly_zeros_p (const_tree exp
)
5893 if (TREE_CODE (exp
) == CONSTRUCTOR
)
5895 HOST_WIDE_INT nz_elts
, init_elts
;
5898 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
5899 return !complete_p
|| nz_elts
< init_elts
/ 4;
5902 return initializer_zerop (exp
);
5905 /* Return 1 if EXP contains all zeros. */
5908 all_zeros_p (const_tree exp
)
5910 if (TREE_CODE (exp
) == CONSTRUCTOR
)
5912 HOST_WIDE_INT nz_elts
, init_elts
;
5915 categorize_ctor_elements (exp
, &nz_elts
, &init_elts
, &complete_p
);
5916 return nz_elts
== 0;
5919 return initializer_zerop (exp
);
5922 /* Helper function for store_constructor.
5923 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
5924 CLEARED is as for store_constructor.
5925 ALIAS_SET is the alias set to use for any stores.
5926 If REVERSE is true, the store is to be done in reverse order.
5928 This provides a recursive shortcut back to store_constructor when it isn't
5929 necessary to go through store_field. This is so that we can pass through
5930 the cleared field to let store_constructor know that we may not have to
5931 clear a substructure if the outer structure has already been cleared. */
5934 store_constructor_field (rtx target
, unsigned HOST_WIDE_INT bitsize
,
5935 HOST_WIDE_INT bitpos
, machine_mode mode
,
5936 tree exp
, int cleared
,
5937 alias_set_type alias_set
, bool reverse
)
5939 if (TREE_CODE (exp
) == CONSTRUCTOR
5940 /* We can only call store_constructor recursively if the size and
5941 bit position are on a byte boundary. */
5942 && bitpos
% BITS_PER_UNIT
== 0
5943 && (bitsize
> 0 && bitsize
% BITS_PER_UNIT
== 0)
5944 /* If we have a nonzero bitpos for a register target, then we just
5945 let store_field do the bitfield handling. This is unlikely to
5946 generate unnecessary clear instructions anyways. */
5947 && (bitpos
== 0 || MEM_P (target
)))
5951 = adjust_address (target
,
5952 GET_MODE (target
) == BLKmode
5954 % GET_MODE_ALIGNMENT (GET_MODE (target
)))
5955 ? BLKmode
: VOIDmode
, bitpos
/ BITS_PER_UNIT
);
5958 /* Update the alias set, if required. */
5959 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
5960 && MEM_ALIAS_SET (target
) != 0)
5962 target
= copy_rtx (target
);
5963 set_mem_alias_set (target
, alias_set
);
5966 store_constructor (exp
, target
, cleared
, bitsize
/ BITS_PER_UNIT
,
5970 store_field (target
, bitsize
, bitpos
, 0, 0, mode
, exp
, alias_set
, false,
5975 /* Returns the number of FIELD_DECLs in TYPE. */
5978 fields_length (const_tree type
)
5980 tree t
= TYPE_FIELDS (type
);
5983 for (; t
; t
= DECL_CHAIN (t
))
5984 if (TREE_CODE (t
) == FIELD_DECL
)
5991 /* Store the value of constructor EXP into the rtx TARGET.
5992 TARGET is either a REG or a MEM; we know it cannot conflict, since
5993 safe_from_p has been called.
5994 CLEARED is true if TARGET is known to have been zero'd.
5995 SIZE is the number of bytes of TARGET we are allowed to modify: this
5996 may not be the same as the size of EXP if we are assigning to a field
5997 which has been packed to exclude padding bits.
5998 If REVERSE is true, the store is to be done in reverse order. */
6001 store_constructor (tree exp
, rtx target
, int cleared
, HOST_WIDE_INT size
,
6004 tree type
= TREE_TYPE (exp
);
6005 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6007 switch (TREE_CODE (type
))
6011 case QUAL_UNION_TYPE
:
6013 unsigned HOST_WIDE_INT idx
;
6016 /* The storage order is specified for every aggregate type. */
6017 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6019 /* If size is zero or the target is already cleared, do nothing. */
6020 if (size
== 0 || cleared
)
6022 /* We either clear the aggregate or indicate the value is dead. */
6023 else if ((TREE_CODE (type
) == UNION_TYPE
6024 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6025 && ! CONSTRUCTOR_ELTS (exp
))
6026 /* If the constructor is empty, clear the union. */
6028 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6032 /* If we are building a static constructor into a register,
6033 set the initial value as zero so we can fold the value into
6034 a constant. But if more than one register is involved,
6035 this probably loses. */
6036 else if (REG_P (target
) && TREE_STATIC (exp
)
6037 && GET_MODE_SIZE (GET_MODE (target
)) <= UNITS_PER_WORD
)
6039 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6043 /* If the constructor has fewer fields than the structure or
6044 if we are initializing the structure to mostly zeros, clear
6045 the whole structure first. Don't do this if TARGET is a
6046 register whose mode size isn't equal to SIZE since
6047 clear_storage can't handle this case. */
6049 && (((int)vec_safe_length (CONSTRUCTOR_ELTS (exp
))
6050 != fields_length (type
))
6051 || mostly_zeros_p (exp
))
6053 || ((HOST_WIDE_INT
) GET_MODE_SIZE (GET_MODE (target
))
6056 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6060 if (REG_P (target
) && !cleared
)
6061 emit_clobber (target
);
6063 /* Store each element of the constructor into the
6064 corresponding field of TARGET. */
6065 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6068 HOST_WIDE_INT bitsize
;
6069 HOST_WIDE_INT bitpos
= 0;
6071 rtx to_rtx
= target
;
6073 /* Just ignore missing fields. We cleared the whole
6074 structure, above, if any fields are missing. */
6078 if (cleared
&& initializer_zerop (value
))
6081 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6082 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6086 mode
= DECL_MODE (field
);
6087 if (DECL_BIT_FIELD (field
))
6090 offset
= DECL_FIELD_OFFSET (field
);
6091 if (tree_fits_shwi_p (offset
)
6092 && tree_fits_shwi_p (bit_position (field
)))
6094 bitpos
= int_bit_position (field
);
6098 bitpos
= tree_to_shwi (DECL_FIELD_BIT_OFFSET (field
));
6102 machine_mode address_mode
;
6106 = SUBSTITUTE_PLACEHOLDER_IN_EXPR (offset
,
6107 make_tree (TREE_TYPE (exp
),
6110 offset_rtx
= expand_normal (offset
);
6111 gcc_assert (MEM_P (to_rtx
));
6113 address_mode
= get_address_mode (to_rtx
);
6114 if (GET_MODE (offset_rtx
) != address_mode
)
6115 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
6117 to_rtx
= offset_address (to_rtx
, offset_rtx
,
6118 highest_pow2_factor (offset
));
6121 /* If this initializes a field that is smaller than a
6122 word, at the start of a word, try to widen it to a full
6123 word. This special case allows us to output C++ member
6124 function initializations in a form that the optimizers
6126 if (WORD_REGISTER_OPERATIONS
6128 && bitsize
< BITS_PER_WORD
6129 && bitpos
% BITS_PER_WORD
== 0
6130 && GET_MODE_CLASS (mode
) == MODE_INT
6131 && TREE_CODE (value
) == INTEGER_CST
6133 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6135 tree type
= TREE_TYPE (value
);
6137 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6139 type
= lang_hooks
.types
.type_for_mode
6140 (word_mode
, TYPE_UNSIGNED (type
));
6141 value
= fold_convert (type
, value
);
6144 if (BYTES_BIG_ENDIAN
)
6146 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6147 build_int_cst (type
,
6148 BITS_PER_WORD
- bitsize
));
6149 bitsize
= BITS_PER_WORD
;
6153 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6154 && DECL_NONADDRESSABLE_P (field
))
6156 to_rtx
= copy_rtx (to_rtx
);
6157 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6160 store_constructor_field (to_rtx
, bitsize
, bitpos
, mode
,
6162 get_alias_set (TREE_TYPE (field
)),
6170 unsigned HOST_WIDE_INT i
;
6173 tree elttype
= TREE_TYPE (type
);
6175 HOST_WIDE_INT minelt
= 0;
6176 HOST_WIDE_INT maxelt
= 0;
6178 /* The storage order is specified for every aggregate type. */
6179 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6181 domain
= TYPE_DOMAIN (type
);
6182 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6183 && TYPE_MAX_VALUE (domain
)
6184 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6185 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6187 /* If we have constant bounds for the range of the type, get them. */
6190 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6191 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6194 /* If the constructor has fewer elements than the array, clear
6195 the whole array first. Similarly if this is static
6196 constructor of a non-BLKmode object. */
6199 else if (REG_P (target
) && TREE_STATIC (exp
))
6203 unsigned HOST_WIDE_INT idx
;
6205 HOST_WIDE_INT count
= 0, zero_count
= 0;
6206 need_to_clear
= ! const_bounds_p
;
6208 /* This loop is a more accurate version of the loop in
6209 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6210 is also needed to check for missing elements. */
6211 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6213 HOST_WIDE_INT this_node_count
;
6218 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6220 tree lo_index
= TREE_OPERAND (index
, 0);
6221 tree hi_index
= TREE_OPERAND (index
, 1);
6223 if (! tree_fits_uhwi_p (lo_index
)
6224 || ! tree_fits_uhwi_p (hi_index
))
6230 this_node_count
= (tree_to_uhwi (hi_index
)
6231 - tree_to_uhwi (lo_index
) + 1);
6234 this_node_count
= 1;
6236 count
+= this_node_count
;
6237 if (mostly_zeros_p (value
))
6238 zero_count
+= this_node_count
;
6241 /* Clear the entire array first if there are any missing
6242 elements, or if the incidence of zero elements is >=
6245 && (count
< maxelt
- minelt
+ 1
6246 || 4 * zero_count
>= 3 * count
))
6250 if (need_to_clear
&& size
> 0)
6253 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6255 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6259 if (!cleared
&& REG_P (target
))
6260 /* Inform later passes that the old value is dead. */
6261 emit_clobber (target
);
6263 /* Store each element of the constructor into the
6264 corresponding element of TARGET, determined by counting the
6266 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6269 HOST_WIDE_INT bitsize
;
6270 HOST_WIDE_INT bitpos
;
6271 rtx xtarget
= target
;
6273 if (cleared
&& initializer_zerop (value
))
6276 mode
= TYPE_MODE (elttype
);
6277 if (mode
== BLKmode
)
6278 bitsize
= (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6279 ? tree_to_uhwi (TYPE_SIZE (elttype
))
6282 bitsize
= GET_MODE_BITSIZE (mode
);
6284 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6286 tree lo_index
= TREE_OPERAND (index
, 0);
6287 tree hi_index
= TREE_OPERAND (index
, 1);
6288 rtx index_r
, pos_rtx
;
6289 HOST_WIDE_INT lo
, hi
, count
;
6292 /* If the range is constant and "small", unroll the loop. */
6294 && tree_fits_shwi_p (lo_index
)
6295 && tree_fits_shwi_p (hi_index
)
6296 && (lo
= tree_to_shwi (lo_index
),
6297 hi
= tree_to_shwi (hi_index
),
6298 count
= hi
- lo
+ 1,
6301 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6302 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6305 lo
-= minelt
; hi
-= minelt
;
6306 for (; lo
<= hi
; lo
++)
6308 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6311 && !MEM_KEEP_ALIAS_SET_P (target
)
6312 && TREE_CODE (type
) == ARRAY_TYPE
6313 && TYPE_NONALIASED_COMPONENT (type
))
6315 target
= copy_rtx (target
);
6316 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6319 store_constructor_field
6320 (target
, bitsize
, bitpos
, mode
, value
, cleared
,
6321 get_alias_set (elttype
), reverse
);
6326 rtx_code_label
*loop_start
= gen_label_rtx ();
6327 rtx_code_label
*loop_end
= gen_label_rtx ();
6330 expand_normal (hi_index
);
6332 index
= build_decl (EXPR_LOCATION (exp
),
6333 VAR_DECL
, NULL_TREE
, domain
);
6334 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6335 SET_DECL_RTL (index
, index_r
);
6336 store_expr (lo_index
, index_r
, 0, false, reverse
);
6338 /* Build the head of the loop. */
6339 do_pending_stack_adjust ();
6340 emit_label (loop_start
);
6342 /* Assign value to element index. */
6344 fold_convert (ssizetype
,
6345 fold_build2 (MINUS_EXPR
,
6348 TYPE_MIN_VALUE (domain
)));
6351 size_binop (MULT_EXPR
, position
,
6352 fold_convert (ssizetype
,
6353 TYPE_SIZE_UNIT (elttype
)));
6355 pos_rtx
= expand_normal (position
);
6356 xtarget
= offset_address (target
, pos_rtx
,
6357 highest_pow2_factor (position
));
6358 xtarget
= adjust_address (xtarget
, mode
, 0);
6359 if (TREE_CODE (value
) == CONSTRUCTOR
)
6360 store_constructor (value
, xtarget
, cleared
,
6361 bitsize
/ BITS_PER_UNIT
, reverse
);
6363 store_expr (value
, xtarget
, 0, false, reverse
);
6365 /* Generate a conditional jump to exit the loop. */
6366 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6368 jumpif (exit_cond
, loop_end
, -1);
6370 /* Update the loop counter, and jump to the head of
6372 expand_assignment (index
,
6373 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6374 index
, integer_one_node
),
6377 emit_jump (loop_start
);
6379 /* Build the end of the loop. */
6380 emit_label (loop_end
);
6383 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6384 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6389 index
= ssize_int (1);
6392 index
= fold_convert (ssizetype
,
6393 fold_build2 (MINUS_EXPR
,
6396 TYPE_MIN_VALUE (domain
)));
6399 size_binop (MULT_EXPR
, index
,
6400 fold_convert (ssizetype
,
6401 TYPE_SIZE_UNIT (elttype
)));
6402 xtarget
= offset_address (target
,
6403 expand_normal (position
),
6404 highest_pow2_factor (position
));
6405 xtarget
= adjust_address (xtarget
, mode
, 0);
6406 store_expr (value
, xtarget
, 0, false, reverse
);
6411 bitpos
= ((tree_to_shwi (index
) - minelt
)
6412 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6414 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6416 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6417 && TREE_CODE (type
) == ARRAY_TYPE
6418 && TYPE_NONALIASED_COMPONENT (type
))
6420 target
= copy_rtx (target
);
6421 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6423 store_constructor_field (target
, bitsize
, bitpos
, mode
, value
,
6424 cleared
, get_alias_set (elttype
),
6433 unsigned HOST_WIDE_INT idx
;
6434 constructor_elt
*ce
;
6437 int icode
= CODE_FOR_nothing
;
6438 tree elttype
= TREE_TYPE (type
);
6439 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6440 machine_mode eltmode
= TYPE_MODE (elttype
);
6441 HOST_WIDE_INT bitsize
;
6442 HOST_WIDE_INT bitpos
;
6443 rtvec vector
= NULL
;
6445 alias_set_type alias
;
6447 gcc_assert (eltmode
!= BLKmode
);
6449 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6450 if (REG_P (target
) && VECTOR_MODE_P (GET_MODE (target
)))
6452 machine_mode mode
= GET_MODE (target
);
6454 icode
= (int) optab_handler (vec_init_optab
, mode
);
6455 /* Don't use vec_init<mode> if some elements have VECTOR_TYPE. */
6456 if (icode
!= CODE_FOR_nothing
)
6460 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6461 if (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
)
6463 icode
= CODE_FOR_nothing
;
6467 if (icode
!= CODE_FOR_nothing
)
6471 vector
= rtvec_alloc (n_elts
);
6472 for (i
= 0; i
< n_elts
; i
++)
6473 RTVEC_ELT (vector
, i
) = CONST0_RTX (GET_MODE_INNER (mode
));
6477 /* If the constructor has fewer elements than the vector,
6478 clear the whole array first. Similarly if this is static
6479 constructor of a non-BLKmode object. */
6482 else if (REG_P (target
) && TREE_STATIC (exp
))
6486 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6489 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6491 int n_elts_here
= tree_to_uhwi
6492 (int_const_binop (TRUNC_DIV_EXPR
,
6493 TYPE_SIZE (TREE_TYPE (value
)),
6494 TYPE_SIZE (elttype
)));
6496 count
+= n_elts_here
;
6497 if (mostly_zeros_p (value
))
6498 zero_count
+= n_elts_here
;
6501 /* Clear the entire vector first if there are any missing elements,
6502 or if the incidence of zero elements is >= 75%. */
6503 need_to_clear
= (count
< n_elts
|| 4 * zero_count
>= 3 * count
);
6506 if (need_to_clear
&& size
> 0 && !vector
)
6509 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6511 clear_storage (target
, GEN_INT (size
), BLOCK_OP_NORMAL
);
6515 /* Inform later passes that the old value is dead. */
6516 if (!cleared
&& !vector
&& REG_P (target
))
6517 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6520 alias
= MEM_ALIAS_SET (target
);
6522 alias
= get_alias_set (elttype
);
6524 /* Store each element of the constructor into the corresponding
6525 element of TARGET, determined by counting the elements. */
6526 for (idx
= 0, i
= 0;
6527 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6528 idx
++, i
+= bitsize
/ elt_size
)
6530 HOST_WIDE_INT eltpos
;
6531 tree value
= ce
->value
;
6533 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6534 if (cleared
&& initializer_zerop (value
))
6538 eltpos
= tree_to_uhwi (ce
->index
);
6544 /* vec_init<mode> should not be used if there are VECTOR_TYPE
6546 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6547 RTVEC_ELT (vector
, eltpos
)
6548 = expand_normal (value
);
6552 machine_mode value_mode
=
6553 TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6554 ? TYPE_MODE (TREE_TYPE (value
))
6556 bitpos
= eltpos
* elt_size
;
6557 store_constructor_field (target
, bitsize
, bitpos
, value_mode
,
6558 value
, cleared
, alias
, reverse
);
6563 emit_insn (GEN_FCN (icode
)
6565 gen_rtx_PARALLEL (GET_MODE (target
), vector
)));
6574 /* Store the value of EXP (an expression tree)
6575 into a subfield of TARGET which has mode MODE and occupies
6576 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6577 If MODE is VOIDmode, it means that we are storing into a bit-field.
6579 BITREGION_START is bitpos of the first bitfield in this region.
6580 BITREGION_END is the bitpos of the ending bitfield in this region.
6581 These two fields are 0, if the C++ memory model does not apply,
6582 or we are not interested in keeping track of bitfield regions.
6584 Always return const0_rtx unless we have something particular to
6587 ALIAS_SET is the alias set for the destination. This value will
6588 (in general) be different from that for TARGET, since TARGET is a
6589 reference to the containing structure.
6591 If NONTEMPORAL is true, try generating a nontemporal store.
6593 If REVERSE is true, the store is to be done in reverse order. */
6596 store_field (rtx target
, HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitpos
,
6597 unsigned HOST_WIDE_INT bitregion_start
,
6598 unsigned HOST_WIDE_INT bitregion_end
,
6599 machine_mode mode
, tree exp
,
6600 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6602 if (TREE_CODE (exp
) == ERROR_MARK
)
6605 /* If we have nothing to store, do nothing unless the expression has
6608 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6610 if (GET_CODE (target
) == CONCAT
)
6612 /* We're storing into a struct containing a single __complex. */
6614 gcc_assert (!bitpos
);
6615 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6618 /* If the structure is in a register or if the component
6619 is a bit field, we cannot use addressing to access it.
6620 Use bit-field techniques or SUBREG to store in it. */
6622 if (mode
== VOIDmode
6623 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6624 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6625 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6627 || GET_CODE (target
) == SUBREG
6628 /* If the field isn't aligned enough to store as an ordinary memref,
6629 store it as a bit field. */
6631 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6632 || bitpos
% GET_MODE_ALIGNMENT (mode
))
6633 && SLOW_UNALIGNED_ACCESS (mode
, MEM_ALIGN (target
)))
6634 || (bitpos
% BITS_PER_UNIT
!= 0)))
6635 || (bitsize
>= 0 && mode
!= BLKmode
6636 && GET_MODE_BITSIZE (mode
) > bitsize
)
6637 /* If the RHS and field are a constant size and the size of the
6638 RHS isn't the same size as the bitfield, we must use bitfield
6641 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
6642 && compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)), bitsize
) != 0
6643 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6644 we will handle specially below. */
6645 && !(TREE_CODE (exp
) == CONSTRUCTOR
6646 && bitsize
% BITS_PER_UNIT
== 0)
6647 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6648 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6649 includes some extra padding. store_expr / expand_expr will in
6650 that case call get_inner_reference that will have the bitsize
6651 we check here and thus the block move will not clobber the
6652 padding that shouldn't be clobbered. In the future we could
6653 replace the TREE_ADDRESSABLE check with a check that
6654 get_base_address needs to live in memory. */
6655 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6656 || TREE_CODE (exp
) != COMPONENT_REF
6657 || TREE_CODE (DECL_SIZE (TREE_OPERAND (exp
, 1))) != INTEGER_CST
6658 || (bitsize
% BITS_PER_UNIT
!= 0)
6659 || (bitpos
% BITS_PER_UNIT
!= 0)
6660 || (compare_tree_int (DECL_SIZE (TREE_OPERAND (exp
, 1)), bitsize
)
6662 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6663 decl we must use bitfield operations. */
6665 && TREE_CODE (exp
) == MEM_REF
6666 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
6667 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6668 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
6669 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
6674 /* If EXP is a NOP_EXPR of precision less than its mode, then that
6675 implies a mask operation. If the precision is the same size as
6676 the field we're storing into, that mask is redundant. This is
6677 particularly common with bit field assignments generated by the
6679 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
6682 tree type
= TREE_TYPE (exp
);
6683 if (INTEGRAL_TYPE_P (type
)
6684 && TYPE_PRECISION (type
) < GET_MODE_BITSIZE (TYPE_MODE (type
))
6685 && bitsize
== TYPE_PRECISION (type
))
6687 tree op
= gimple_assign_rhs1 (nop_def
);
6688 type
= TREE_TYPE (op
);
6689 if (INTEGRAL_TYPE_P (type
) && TYPE_PRECISION (type
) >= bitsize
)
6694 temp
= expand_normal (exp
);
6696 /* If the value has a record type and an integral mode then, if BITSIZE
6697 is narrower than this mode and this is for big-endian data, we must
6698 first put the value into the low-order bits. Moreover, the field may
6699 be not aligned on a byte boundary; in this case, if it has reverse
6700 storage order, it needs to be accessed as a scalar field with reverse
6701 storage order and we must first put the value into target order. */
6702 if (TREE_CODE (TREE_TYPE (exp
)) == RECORD_TYPE
6703 && GET_MODE_CLASS (GET_MODE (temp
)) == MODE_INT
)
6705 HOST_WIDE_INT size
= GET_MODE_BITSIZE (GET_MODE (temp
));
6707 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
6710 temp
= flip_storage_order (GET_MODE (temp
), temp
);
6713 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
6714 temp
= expand_shift (RSHIFT_EXPR
, GET_MODE (temp
), temp
,
6715 size
- bitsize
, NULL_RTX
, 1);
6718 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
6719 if (mode
!= VOIDmode
&& mode
!= BLKmode
6720 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
6721 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
6723 /* If TEMP is not a PARALLEL (see below) and its mode and that of TARGET
6724 are both BLKmode, both must be in memory and BITPOS must be aligned
6725 on a byte boundary. If so, we simply do a block copy. Likewise for
6726 a BLKmode-like TARGET. */
6727 if (GET_CODE (temp
) != PARALLEL
6728 && GET_MODE (temp
) == BLKmode
6729 && (GET_MODE (target
) == BLKmode
6731 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
6732 && (bitpos
% BITS_PER_UNIT
) == 0
6733 && (bitsize
% BITS_PER_UNIT
) == 0)))
6735 gcc_assert (MEM_P (target
) && MEM_P (temp
)
6736 && (bitpos
% BITS_PER_UNIT
) == 0);
6738 target
= adjust_address (target
, VOIDmode
, bitpos
/ BITS_PER_UNIT
);
6739 emit_block_move (target
, temp
,
6740 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
6747 /* Handle calls that return values in multiple non-contiguous locations.
6748 The Irix 6 ABI has examples of this. */
6749 if (GET_CODE (temp
) == PARALLEL
)
6751 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6753 if (mode
== BLKmode
|| mode
== VOIDmode
)
6754 mode
= smallest_mode_for_size (size
* BITS_PER_UNIT
, MODE_INT
);
6755 temp_target
= gen_reg_rtx (mode
);
6756 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
6759 else if (mode
== BLKmode
)
6761 /* Handle calls that return BLKmode values in registers. */
6762 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
6764 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
6765 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
6770 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
6772 mode
= smallest_mode_for_size (size
* BITS_PER_UNIT
, MODE_INT
);
6773 temp_target
= gen_reg_rtx (mode
);
6775 = extract_bit_field (temp
, size
* BITS_PER_UNIT
, 0, 1,
6776 temp_target
, mode
, mode
, false);
6781 /* Store the value in the bitfield. */
6782 store_bit_field (target
, bitsize
, bitpos
,
6783 bitregion_start
, bitregion_end
,
6784 mode
, temp
, reverse
);
6790 /* Now build a reference to just the desired component. */
6791 rtx to_rtx
= adjust_address (target
, mode
, bitpos
/ BITS_PER_UNIT
);
6793 if (to_rtx
== target
)
6794 to_rtx
= copy_rtx (to_rtx
);
6796 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
6797 set_mem_alias_set (to_rtx
, alias_set
);
6799 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
6800 into a target smaller than its type; handle that case now. */
6801 if (TREE_CODE (exp
) == CONSTRUCTOR
&& bitsize
>= 0)
6803 gcc_assert (bitsize
% BITS_PER_UNIT
== 0);
6804 store_constructor (exp
, to_rtx
, 0, bitsize
/ BITS_PER_UNIT
, reverse
);
6808 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
6812 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
6813 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
6814 codes and find the ultimate containing object, which we return.
6816 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
6817 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
6818 storage order of the field.
6819 If the position of the field is variable, we store a tree
6820 giving the variable offset (in units) in *POFFSET.
6821 This offset is in addition to the bit position.
6822 If the position is not variable, we store 0 in *POFFSET.
6824 If any of the extraction expressions is volatile,
6825 we store 1 in *PVOLATILEP. Otherwise we don't change that.
6827 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
6828 Otherwise, it is a mode that can be used to access the field.
6830 If the field describes a variable-sized object, *PMODE is set to
6831 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
6832 this case, but the address of the object can be found.
6834 If KEEP_ALIGNING is true and the target is STRICT_ALIGNMENT, we don't
6835 look through nodes that serve as markers of a greater alignment than
6836 the one that can be deduced from the expression. These nodes make it
6837 possible for front-ends to prevent temporaries from being created by
6838 the middle-end on alignment considerations. For that purpose, the
6839 normal operating mode at high-level is to always pass FALSE so that
6840 the ultimate containing object is really returned; moreover, the
6841 associated predicate handled_component_p will always return TRUE
6842 on these nodes, thus indicating that they are essentially handled
6843 by get_inner_reference. TRUE should only be passed when the caller
6844 is scanning the expression in order to build another representation
6845 and specifically knows how to handle these nodes; as such, this is
6846 the normal operating mode in the RTL expanders. */
6849 get_inner_reference (tree exp
, HOST_WIDE_INT
*pbitsize
,
6850 HOST_WIDE_INT
*pbitpos
, tree
*poffset
,
6851 machine_mode
*pmode
, int *punsignedp
,
6852 int *preversep
, int *pvolatilep
, bool keep_aligning
)
6855 machine_mode mode
= VOIDmode
;
6856 bool blkmode_bitfield
= false;
6857 tree offset
= size_zero_node
;
6858 offset_int bit_offset
= 0;
6860 /* First get the mode, signedness, storage order and size. We do this from
6861 just the outermost expression. */
6863 if (TREE_CODE (exp
) == COMPONENT_REF
)
6865 tree field
= TREE_OPERAND (exp
, 1);
6866 size_tree
= DECL_SIZE (field
);
6867 if (flag_strict_volatile_bitfields
> 0
6868 && TREE_THIS_VOLATILE (exp
)
6869 && DECL_BIT_FIELD_TYPE (field
)
6870 && DECL_MODE (field
) != BLKmode
)
6871 /* Volatile bitfields should be accessed in the mode of the
6872 field's type, not the mode computed based on the bit
6874 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
6875 else if (!DECL_BIT_FIELD (field
))
6876 mode
= DECL_MODE (field
);
6877 else if (DECL_MODE (field
) == BLKmode
)
6878 blkmode_bitfield
= true;
6880 *punsignedp
= DECL_UNSIGNED (field
);
6882 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
6884 size_tree
= TREE_OPERAND (exp
, 1);
6885 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
6886 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
6888 /* For vector types, with the correct size of access, use the mode of
6890 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
6891 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
6892 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
6893 mode
= TYPE_MODE (TREE_TYPE (exp
));
6897 mode
= TYPE_MODE (TREE_TYPE (exp
));
6898 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
6900 if (mode
== BLKmode
)
6901 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
6903 *pbitsize
= GET_MODE_BITSIZE (mode
);
6908 if (! tree_fits_uhwi_p (size_tree
))
6909 mode
= BLKmode
, *pbitsize
= -1;
6911 *pbitsize
= tree_to_uhwi (size_tree
);
6914 *preversep
= reverse_storage_order_for_component_p (exp
);
6916 /* Compute cumulative bit-offset for nested component-refs and array-refs,
6917 and find the ultimate containing object. */
6920 switch (TREE_CODE (exp
))
6923 bit_offset
+= wi::to_offset (TREE_OPERAND (exp
, 2));
6928 tree field
= TREE_OPERAND (exp
, 1);
6929 tree this_offset
= component_ref_field_offset (exp
);
6931 /* If this field hasn't been filled in yet, don't go past it.
6932 This should only happen when folding expressions made during
6933 type construction. */
6934 if (this_offset
== 0)
6937 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
6938 bit_offset
+= wi::to_offset (DECL_FIELD_BIT_OFFSET (field
));
6940 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
6945 case ARRAY_RANGE_REF
:
6947 tree index
= TREE_OPERAND (exp
, 1);
6948 tree low_bound
= array_ref_low_bound (exp
);
6949 tree unit_size
= array_ref_element_size (exp
);
6951 /* We assume all arrays have sizes that are a multiple of a byte.
6952 First subtract the lower bound, if any, in the type of the
6953 index, then convert to sizetype and multiply by the size of
6954 the array element. */
6955 if (! integer_zerop (low_bound
))
6956 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
6959 offset
= size_binop (PLUS_EXPR
, offset
,
6960 size_binop (MULT_EXPR
,
6961 fold_convert (sizetype
, index
),
6970 bit_offset
+= *pbitsize
;
6973 case VIEW_CONVERT_EXPR
:
6974 if (keep_aligning
&& STRICT_ALIGNMENT
6975 && (TYPE_ALIGN (TREE_TYPE (exp
))
6976 > TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp
, 0))))
6977 && (TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (exp
, 0)))
6978 < BIGGEST_ALIGNMENT
)
6979 && (TYPE_ALIGN_OK (TREE_TYPE (exp
))
6980 || TYPE_ALIGN_OK (TREE_TYPE (TREE_OPERAND (exp
, 0)))))
6985 /* Hand back the decl for MEM[&decl, off]. */
6986 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
6988 tree off
= TREE_OPERAND (exp
, 1);
6989 if (!integer_zerop (off
))
6991 offset_int boff
, coff
= mem_ref_offset (exp
);
6992 boff
= coff
<< LOG2_BITS_PER_UNIT
;
6995 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7003 /* If any reference in the chain is volatile, the effect is volatile. */
7004 if (TREE_THIS_VOLATILE (exp
))
7007 exp
= TREE_OPERAND (exp
, 0);
7011 /* If OFFSET is constant, see if we can return the whole thing as a
7012 constant bit position. Make sure to handle overflow during
7014 if (TREE_CODE (offset
) == INTEGER_CST
)
7016 offset_int tem
= wi::sext (wi::to_offset (offset
),
7017 TYPE_PRECISION (sizetype
));
7018 tem
<<= LOG2_BITS_PER_UNIT
;
7020 if (wi::fits_shwi_p (tem
))
7022 *pbitpos
= tem
.to_shwi ();
7023 *poffset
= offset
= NULL_TREE
;
7027 /* Otherwise, split it up. */
7030 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7031 if (wi::neg_p (bit_offset
) || !wi::fits_shwi_p (bit_offset
))
7033 offset_int mask
= wi::mask
<offset_int
> (LOG2_BITS_PER_UNIT
, false);
7034 offset_int tem
= bit_offset
.and_not (mask
);
7035 /* TEM is the bitpos rounded to BITS_PER_UNIT towards -Inf.
7036 Subtract it to BIT_OFFSET and add it (scaled) to OFFSET. */
7038 tem
>>= LOG2_BITS_PER_UNIT
;
7039 offset
= size_binop (PLUS_EXPR
, offset
,
7040 wide_int_to_tree (sizetype
, tem
));
7043 *pbitpos
= bit_offset
.to_shwi ();
7047 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7048 if (mode
== VOIDmode
7050 && (*pbitpos
% BITS_PER_UNIT
) == 0
7051 && (*pbitsize
% BITS_PER_UNIT
) == 0)
7059 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7061 static unsigned HOST_WIDE_INT
7062 target_align (const_tree target
)
7064 /* We might have a chain of nested references with intermediate misaligning
7065 bitfields components, so need to recurse to find out. */
7067 unsigned HOST_WIDE_INT this_align
, outer_align
;
7069 switch (TREE_CODE (target
))
7075 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7076 outer_align
= target_align (TREE_OPERAND (target
, 0));
7077 return MIN (this_align
, outer_align
);
7080 case ARRAY_RANGE_REF
:
7081 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7082 outer_align
= target_align (TREE_OPERAND (target
, 0));
7083 return MIN (this_align
, outer_align
);
7086 case NON_LVALUE_EXPR
:
7087 case VIEW_CONVERT_EXPR
:
7088 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7089 outer_align
= target_align (TREE_OPERAND (target
, 0));
7090 return MAX (this_align
, outer_align
);
7093 return TYPE_ALIGN (TREE_TYPE (target
));
7098 /* Given an rtx VALUE that may contain additions and multiplications, return
7099 an equivalent value that just refers to a register, memory, or constant.
7100 This is done by generating instructions to perform the arithmetic and
7101 returning a pseudo-register containing the value.
7103 The returned value may be a REG, SUBREG, MEM or constant. */
7106 force_operand (rtx value
, rtx target
)
7109 /* Use subtarget as the target for operand 0 of a binary operation. */
7110 rtx subtarget
= get_subtarget (target
);
7111 enum rtx_code code
= GET_CODE (value
);
7113 /* Check for subreg applied to an expression produced by loop optimizer. */
7115 && !REG_P (SUBREG_REG (value
))
7116 && !MEM_P (SUBREG_REG (value
)))
7119 = simplify_gen_subreg (GET_MODE (value
),
7120 force_reg (GET_MODE (SUBREG_REG (value
)),
7121 force_operand (SUBREG_REG (value
),
7123 GET_MODE (SUBREG_REG (value
)),
7124 SUBREG_BYTE (value
));
7125 code
= GET_CODE (value
);
7128 /* Check for a PIC address load. */
7129 if ((code
== PLUS
|| code
== MINUS
)
7130 && XEXP (value
, 0) == pic_offset_table_rtx
7131 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7132 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7133 || GET_CODE (XEXP (value
, 1)) == CONST
))
7136 subtarget
= gen_reg_rtx (GET_MODE (value
));
7137 emit_move_insn (subtarget
, value
);
7141 if (ARITHMETIC_P (value
))
7143 op2
= XEXP (value
, 1);
7144 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7146 if (code
== MINUS
&& CONST_INT_P (op2
))
7149 op2
= negate_rtx (GET_MODE (value
), op2
);
7152 /* Check for an addition with OP2 a constant integer and our first
7153 operand a PLUS of a virtual register and something else. In that
7154 case, we want to emit the sum of the virtual register and the
7155 constant first and then add the other value. This allows virtual
7156 register instantiation to simply modify the constant rather than
7157 creating another one around this addition. */
7158 if (code
== PLUS
&& CONST_INT_P (op2
)
7159 && GET_CODE (XEXP (value
, 0)) == PLUS
7160 && REG_P (XEXP (XEXP (value
, 0), 0))
7161 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7162 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7164 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7165 XEXP (XEXP (value
, 0), 0), op2
,
7166 subtarget
, 0, OPTAB_LIB_WIDEN
);
7167 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7168 force_operand (XEXP (XEXP (value
,
7170 target
, 0, OPTAB_LIB_WIDEN
);
7173 op1
= force_operand (XEXP (value
, 0), subtarget
);
7174 op2
= force_operand (op2
, NULL_RTX
);
7178 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7180 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7181 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7182 target
, 1, OPTAB_LIB_WIDEN
);
7184 return expand_divmod (0,
7185 FLOAT_MODE_P (GET_MODE (value
))
7186 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7187 GET_MODE (value
), op1
, op2
, target
, 0);
7189 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7192 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7195 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7198 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7199 target
, 0, OPTAB_LIB_WIDEN
);
7201 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7202 target
, 1, OPTAB_LIB_WIDEN
);
7205 if (UNARY_P (value
))
7208 target
= gen_reg_rtx (GET_MODE (value
));
7209 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7216 case FLOAT_TRUNCATE
:
7217 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7222 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7226 case UNSIGNED_FLOAT
:
7227 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7231 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7235 #ifdef INSN_SCHEDULING
7236 /* On machines that have insn scheduling, we want all memory reference to be
7237 explicit, so we need to deal with such paradoxical SUBREGs. */
7238 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7240 = simplify_gen_subreg (GET_MODE (value
),
7241 force_reg (GET_MODE (SUBREG_REG (value
)),
7242 force_operand (SUBREG_REG (value
),
7244 GET_MODE (SUBREG_REG (value
)),
7245 SUBREG_BYTE (value
));
7251 /* Subroutine of expand_expr: return nonzero iff there is no way that
7252 EXP can reference X, which is being modified. TOP_P is nonzero if this
7253 call is going to be used to determine whether we need a temporary
7254 for EXP, as opposed to a recursive call to this function.
7256 It is always safe for this routine to return zero since it merely
7257 searches for optimization opportunities. */
7260 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7266 /* If EXP has varying size, we MUST use a target since we currently
7267 have no way of allocating temporaries of variable size
7268 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7269 So we assume here that something at a higher level has prevented a
7270 clash. This is somewhat bogus, but the best we can do. Only
7271 do this when X is BLKmode and when we are at the top level. */
7272 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7273 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7274 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7275 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7276 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7278 && GET_MODE (x
) == BLKmode
)
7279 /* If X is in the outgoing argument area, it is always safe. */
7281 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7282 || (GET_CODE (XEXP (x
, 0)) == PLUS
7283 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7286 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7287 find the underlying pseudo. */
7288 if (GET_CODE (x
) == SUBREG
)
7291 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7295 /* Now look at our tree code and possibly recurse. */
7296 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7298 case tcc_declaration
:
7299 exp_rtl
= DECL_RTL_IF_SET (exp
);
7305 case tcc_exceptional
:
7306 if (TREE_CODE (exp
) == TREE_LIST
)
7310 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7312 exp
= TREE_CHAIN (exp
);
7315 if (TREE_CODE (exp
) != TREE_LIST
)
7316 return safe_from_p (x
, exp
, 0);
7319 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7321 constructor_elt
*ce
;
7322 unsigned HOST_WIDE_INT idx
;
7324 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7325 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7326 || !safe_from_p (x
, ce
->value
, 0))
7330 else if (TREE_CODE (exp
) == ERROR_MARK
)
7331 return 1; /* An already-visited SAVE_EXPR? */
7336 /* The only case we look at here is the DECL_INITIAL inside a
7338 return (TREE_CODE (exp
) != DECL_EXPR
7339 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7340 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7341 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7344 case tcc_comparison
:
7345 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7350 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7352 case tcc_expression
:
7355 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7356 the expression. If it is set, we conflict iff we are that rtx or
7357 both are in memory. Otherwise, we check all operands of the
7358 expression recursively. */
7360 switch (TREE_CODE (exp
))
7363 /* If the operand is static or we are static, we can't conflict.
7364 Likewise if we don't conflict with the operand at all. */
7365 if (staticp (TREE_OPERAND (exp
, 0))
7366 || TREE_STATIC (exp
)
7367 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7370 /* Otherwise, the only way this can conflict is if we are taking
7371 the address of a DECL a that address if part of X, which is
7373 exp
= TREE_OPERAND (exp
, 0);
7376 if (!DECL_RTL_SET_P (exp
)
7377 || !MEM_P (DECL_RTL (exp
)))
7380 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7386 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7387 get_alias_set (exp
)))
7392 /* Assume that the call will clobber all hard registers and
7394 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7399 case WITH_CLEANUP_EXPR
:
7400 case CLEANUP_POINT_EXPR
:
7401 /* Lowered by gimplify.c. */
7405 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7411 /* If we have an rtx, we do not need to scan our operands. */
7415 nops
= TREE_OPERAND_LENGTH (exp
);
7416 for (i
= 0; i
< nops
; i
++)
7417 if (TREE_OPERAND (exp
, i
) != 0
7418 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7424 /* Should never get a type here. */
7428 /* If we have an rtl, find any enclosed object. Then see if we conflict
7432 if (GET_CODE (exp_rtl
) == SUBREG
)
7434 exp_rtl
= SUBREG_REG (exp_rtl
);
7436 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7440 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7441 are memory and they conflict. */
7442 return ! (rtx_equal_p (x
, exp_rtl
)
7443 || (MEM_P (x
) && MEM_P (exp_rtl
)
7444 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7447 /* If we reach here, it is safe. */
7452 /* Return the highest power of two that EXP is known to be a multiple of.
7453 This is used in updating alignment of MEMs in array references. */
7455 unsigned HOST_WIDE_INT
7456 highest_pow2_factor (const_tree exp
)
7458 unsigned HOST_WIDE_INT ret
;
7459 int trailing_zeros
= tree_ctz (exp
);
7460 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7461 return BIGGEST_ALIGNMENT
;
7462 ret
= (unsigned HOST_WIDE_INT
) 1 << trailing_zeros
;
7463 if (ret
> BIGGEST_ALIGNMENT
)
7464 return BIGGEST_ALIGNMENT
;
7468 /* Similar, except that the alignment requirements of TARGET are
7469 taken into account. Assume it is at least as aligned as its
7470 type, unless it is a COMPONENT_REF in which case the layout of
7471 the structure gives the alignment. */
7473 static unsigned HOST_WIDE_INT
7474 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7476 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7477 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7479 return MAX (factor
, talign
);
7482 /* Convert the tree comparison code TCODE to the rtl one where the
7483 signedness is UNSIGNEDP. */
7485 static enum rtx_code
7486 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7498 code
= unsignedp
? LTU
: LT
;
7501 code
= unsignedp
? LEU
: LE
;
7504 code
= unsignedp
? GTU
: GT
;
7507 code
= unsignedp
? GEU
: GE
;
7509 case UNORDERED_EXPR
:
7540 /* Subroutine of expand_expr. Expand the two operands of a binary
7541 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7542 The value may be stored in TARGET if TARGET is nonzero. The
7543 MODIFIER argument is as documented by expand_expr. */
7546 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7547 enum expand_modifier modifier
)
7549 if (! safe_from_p (target
, exp1
, 1))
7551 if (operand_equal_p (exp0
, exp1
, 0))
7553 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7554 *op1
= copy_rtx (*op0
);
7558 /* If we need to preserve evaluation order, copy exp0 into its own
7559 temporary variable so that it can't be clobbered by exp1. */
7560 if (flag_evaluation_order
&& TREE_SIDE_EFFECTS (exp1
))
7561 exp0
= save_expr (exp0
);
7562 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7563 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7568 /* Return a MEM that contains constant EXP. DEFER is as for
7569 output_constant_def and MODIFIER is as for expand_expr. */
7572 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7576 mem
= output_constant_def (exp
, defer
);
7577 if (modifier
!= EXPAND_INITIALIZER
)
7578 mem
= use_anchored_address (mem
);
7582 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7583 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7586 expand_expr_addr_expr_1 (tree exp
, rtx target
, machine_mode tmode
,
7587 enum expand_modifier modifier
, addr_space_t as
)
7589 rtx result
, subtarget
;
7591 HOST_WIDE_INT bitsize
, bitpos
;
7592 int unsignedp
, reversep
, volatilep
= 0;
7595 /* If we are taking the address of a constant and are at the top level,
7596 we have to use output_constant_def since we can't call force_const_mem
7598 /* ??? This should be considered a front-end bug. We should not be
7599 generating ADDR_EXPR of something that isn't an LVALUE. The only
7600 exception here is STRING_CST. */
7601 if (CONSTANT_CLASS_P (exp
))
7603 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7604 if (modifier
< EXPAND_SUM
)
7605 result
= force_operand (result
, target
);
7609 /* Everything must be something allowed by is_gimple_addressable. */
7610 switch (TREE_CODE (exp
))
7613 /* This case will happen via recursion for &a->b. */
7614 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7618 tree tem
= TREE_OPERAND (exp
, 0);
7619 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7620 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7621 return expand_expr (tem
, target
, tmode
, modifier
);
7625 /* Expand the initializer like constants above. */
7626 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7628 if (modifier
< EXPAND_SUM
)
7629 result
= force_operand (result
, target
);
7633 /* The real part of the complex number is always first, therefore
7634 the address is the same as the address of the parent object. */
7637 inner
= TREE_OPERAND (exp
, 0);
7641 /* The imaginary part of the complex number is always second.
7642 The expression is therefore always offset by the size of the
7645 bitpos
= GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)));
7646 inner
= TREE_OPERAND (exp
, 0);
7649 case COMPOUND_LITERAL_EXPR
:
7650 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7651 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7652 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7653 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7654 the initializers aren't gimplified. */
7655 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7656 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7657 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7658 target
, tmode
, modifier
, as
);
7661 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7662 expand_expr, as that can have various side effects; LABEL_DECLs for
7663 example, may not have their DECL_RTL set yet. Expand the rtl of
7664 CONSTRUCTORs too, which should yield a memory reference for the
7665 constructor's contents. Assume language specific tree nodes can
7666 be expanded in some interesting way. */
7667 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7669 || TREE_CODE (exp
) == CONSTRUCTOR
7670 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7672 result
= expand_expr (exp
, target
, tmode
,
7673 modifier
== EXPAND_INITIALIZER
7674 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
7676 /* If the DECL isn't in memory, then the DECL wasn't properly
7677 marked TREE_ADDRESSABLE, which will be either a front-end
7678 or a tree optimizer bug. */
7680 gcc_assert (MEM_P (result
));
7681 result
= XEXP (result
, 0);
7683 /* ??? Is this needed anymore? */
7685 TREE_USED (exp
) = 1;
7687 if (modifier
!= EXPAND_INITIALIZER
7688 && modifier
!= EXPAND_CONST_ADDRESS
7689 && modifier
!= EXPAND_SUM
)
7690 result
= force_operand (result
, target
);
7694 /* Pass FALSE as the last argument to get_inner_reference although
7695 we are expanding to RTL. The rationale is that we know how to
7696 handle "aligning nodes" here: we can just bypass them because
7697 they won't change the final object whose address will be returned
7698 (they actually exist only for that purpose). */
7699 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
7700 &unsignedp
, &reversep
, &volatilep
, false);
7704 /* We must have made progress. */
7705 gcc_assert (inner
!= exp
);
7707 subtarget
= offset
|| bitpos
? NULL_RTX
: target
;
7708 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
7709 inner alignment, force the inner to be sufficiently aligned. */
7710 if (CONSTANT_CLASS_P (inner
)
7711 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
7713 inner
= copy_node (inner
);
7714 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
7715 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
7716 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
7718 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
7724 if (modifier
!= EXPAND_NORMAL
)
7725 result
= force_operand (result
, NULL
);
7726 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
7727 modifier
== EXPAND_INITIALIZER
7728 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
7730 /* expand_expr is allowed to return an object in a mode other
7731 than TMODE. If it did, we need to convert. */
7732 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
7733 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
7734 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
7735 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7736 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
7738 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
7739 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
7742 subtarget
= bitpos
? NULL_RTX
: target
;
7743 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
7744 1, OPTAB_LIB_WIDEN
);
7750 /* Someone beforehand should have rejected taking the address
7751 of such an object. */
7752 gcc_assert ((bitpos
% BITS_PER_UNIT
) == 0);
7754 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7755 result
= plus_constant (tmode
, result
, bitpos
/ BITS_PER_UNIT
);
7756 if (modifier
< EXPAND_SUM
)
7757 result
= force_operand (result
, target
);
7763 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
7764 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7767 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
7768 enum expand_modifier modifier
)
7770 addr_space_t as
= ADDR_SPACE_GENERIC
;
7771 machine_mode address_mode
= Pmode
;
7772 machine_mode pointer_mode
= ptr_mode
;
7776 /* Target mode of VOIDmode says "whatever's natural". */
7777 if (tmode
== VOIDmode
)
7778 tmode
= TYPE_MODE (TREE_TYPE (exp
));
7780 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
7782 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
7783 address_mode
= targetm
.addr_space
.address_mode (as
);
7784 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
7787 /* We can get called with some Weird Things if the user does silliness
7788 like "(short) &a". In that case, convert_memory_address won't do
7789 the right thing, so ignore the given target mode. */
7790 if (tmode
!= address_mode
&& tmode
!= pointer_mode
)
7791 tmode
= address_mode
;
7793 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
7794 tmode
, modifier
, as
);
7796 /* Despite expand_expr claims concerning ignoring TMODE when not
7797 strictly convenient, stuff breaks if we don't honor it. Note
7798 that combined with the above, we only do this for pointer modes. */
7799 rmode
= GET_MODE (result
);
7800 if (rmode
== VOIDmode
)
7803 result
= convert_memory_address_addr_space (tmode
, result
, as
);
7808 /* Generate code for computing CONSTRUCTOR EXP.
7809 An rtx for the computed value is returned. If AVOID_TEMP_MEM
7810 is TRUE, instead of creating a temporary variable in memory
7811 NULL is returned and the caller needs to handle it differently. */
7814 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
7815 bool avoid_temp_mem
)
7817 tree type
= TREE_TYPE (exp
);
7818 machine_mode mode
= TYPE_MODE (type
);
7820 /* Try to avoid creating a temporary at all. This is possible
7821 if all of the initializer is zero.
7822 FIXME: try to handle all [0..255] initializers we can handle
7824 if (TREE_STATIC (exp
)
7825 && !TREE_ADDRESSABLE (exp
)
7826 && target
!= 0 && mode
== BLKmode
7827 && all_zeros_p (exp
))
7829 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
7833 /* All elts simple constants => refer to a constant in memory. But
7834 if this is a non-BLKmode mode, let it store a field at a time
7835 since that should make a CONST_INT, CONST_WIDE_INT or
7836 CONST_DOUBLE when we fold. Likewise, if we have a target we can
7837 use, it is best to store directly into the target unless the type
7838 is large enough that memcpy will be used. If we are making an
7839 initializer and all operands are constant, put it in memory as
7842 FIXME: Avoid trying to fill vector constructors piece-meal.
7843 Output them with output_constant_def below unless we're sure
7844 they're zeros. This should go away when vector initializers
7845 are treated like VECTOR_CST instead of arrays. */
7846 if ((TREE_STATIC (exp
)
7847 && ((mode
== BLKmode
7848 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
7849 || TREE_ADDRESSABLE (exp
)
7850 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
7851 && (! can_move_by_pieces
7852 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
7854 && ! mostly_zeros_p (exp
))))
7855 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
7856 && TREE_CONSTANT (exp
)))
7863 constructor
= expand_expr_constant (exp
, 1, modifier
);
7865 if (modifier
!= EXPAND_CONST_ADDRESS
7866 && modifier
!= EXPAND_INITIALIZER
7867 && modifier
!= EXPAND_SUM
)
7868 constructor
= validize_mem (constructor
);
7873 /* Handle calls that pass values in multiple non-contiguous
7874 locations. The Irix 6 ABI has examples of this. */
7875 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
7876 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
7881 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
7884 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
7889 /* expand_expr: generate code for computing expression EXP.
7890 An rtx for the computed value is returned. The value is never null.
7891 In the case of a void EXP, const0_rtx is returned.
7893 The value may be stored in TARGET if TARGET is nonzero.
7894 TARGET is just a suggestion; callers must assume that
7895 the rtx returned may not be the same as TARGET.
7897 If TARGET is CONST0_RTX, it means that the value will be ignored.
7899 If TMODE is not VOIDmode, it suggests generating the
7900 result in mode TMODE. But this is done only when convenient.
7901 Otherwise, TMODE is ignored and the value generated in its natural mode.
7902 TMODE is just a suggestion; callers must assume that
7903 the rtx returned may not have mode TMODE.
7905 Note that TARGET may have neither TMODE nor MODE. In that case, it
7906 probably will not be used.
7908 If MODIFIER is EXPAND_SUM then when EXP is an addition
7909 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
7910 or a nest of (PLUS ...) and (MINUS ...) where the terms are
7911 products as above, or REG or MEM, or constant.
7912 Ordinarily in such cases we would output mul or add instructions
7913 and then return a pseudo reg containing the sum.
7915 EXPAND_INITIALIZER is much like EXPAND_SUM except that
7916 it also marks a label as absolutely required (it can't be dead).
7917 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
7918 This is used for outputting expressions used in initializers.
7920 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
7921 with a constant address even if that address is not normally legitimate.
7922 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
7924 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
7925 a call parameter. Such targets require special care as we haven't yet
7926 marked TARGET so that it's safe from being trashed by libcalls. We
7927 don't want to use TARGET for anything but the final result;
7928 Intermediate values must go elsewhere. Additionally, calls to
7929 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
7931 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
7932 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
7933 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
7934 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
7937 If INNER_REFERENCE_P is true, we are expanding an inner reference.
7938 In this case, we don't adjust a returned MEM rtx that wouldn't be
7939 sufficiently aligned for its mode; instead, it's up to the caller
7940 to deal with it afterwards. This is used to make sure that unaligned
7941 base objects for which out-of-bounds accesses are supported, for
7942 example record types with trailing arrays, aren't realigned behind
7943 the back of the caller.
7944 The normal operating mode is to pass FALSE for this parameter. */
7947 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
7948 enum expand_modifier modifier
, rtx
*alt_rtl
,
7949 bool inner_reference_p
)
7953 /* Handle ERROR_MARK before anybody tries to access its type. */
7954 if (TREE_CODE (exp
) == ERROR_MARK
7955 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
7957 ret
= CONST0_RTX (tmode
);
7958 return ret
? ret
: const0_rtx
;
7961 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
7966 /* Try to expand the conditional expression which is represented by
7967 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
7968 return the rtl reg which represents the result. Otherwise return
7972 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
7973 tree treeop1 ATTRIBUTE_UNUSED
,
7974 tree treeop2 ATTRIBUTE_UNUSED
)
7977 rtx op00
, op01
, op1
, op2
;
7978 enum rtx_code comparison_code
;
7979 machine_mode comparison_mode
;
7982 tree type
= TREE_TYPE (treeop1
);
7983 int unsignedp
= TYPE_UNSIGNED (type
);
7984 machine_mode mode
= TYPE_MODE (type
);
7985 machine_mode orig_mode
= mode
;
7987 /* If we cannot do a conditional move on the mode, try doing it
7988 with the promoted mode. */
7989 if (!can_conditionally_move_p (mode
))
7991 mode
= promote_mode (type
, mode
, &unsignedp
);
7992 if (!can_conditionally_move_p (mode
))
7994 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
7997 temp
= assign_temp (type
, 0, 1);
8000 expand_operands (treeop1
, treeop2
,
8001 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8003 if (TREE_CODE (treeop0
) == SSA_NAME
8004 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8006 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8007 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8008 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8009 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8010 comparison_mode
= TYPE_MODE (type
);
8011 unsignedp
= TYPE_UNSIGNED (type
);
8012 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8014 else if (COMPARISON_CLASS_P (treeop0
))
8016 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8017 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8018 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8019 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8020 unsignedp
= TYPE_UNSIGNED (type
);
8021 comparison_mode
= TYPE_MODE (type
);
8022 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8026 op00
= expand_normal (treeop0
);
8028 comparison_code
= NE
;
8029 comparison_mode
= GET_MODE (op00
);
8030 if (comparison_mode
== VOIDmode
)
8031 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8034 if (GET_MODE (op1
) != mode
)
8035 op1
= gen_lowpart (mode
, op1
);
8037 if (GET_MODE (op2
) != mode
)
8038 op2
= gen_lowpart (mode
, op2
);
8040 /* Try to emit the conditional move. */
8041 insn
= emit_conditional_move (temp
, comparison_code
,
8042 op00
, op01
, comparison_mode
,
8046 /* If we could do the conditional move, emit the sequence,
8050 rtx_insn
*seq
= get_insns ();
8053 return convert_modes (orig_mode
, mode
, temp
, 0);
8056 /* Otherwise discard the sequence and fall back to code with
8063 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8064 enum expand_modifier modifier
)
8066 rtx op0
, op1
, op2
, temp
;
8067 rtx_code_label
*lab
;
8071 enum tree_code code
= ops
->code
;
8073 rtx subtarget
, original_target
;
8075 bool reduce_bit_field
;
8076 location_t loc
= ops
->location
;
8077 tree treeop0
, treeop1
, treeop2
;
8078 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8079 ? reduce_to_bit_field_precision ((expr), \
8085 mode
= TYPE_MODE (type
);
8086 unsignedp
= TYPE_UNSIGNED (type
);
8092 /* We should be called only on simple (binary or unary) expressions,
8093 exactly those that are valid in gimple expressions that aren't
8094 GIMPLE_SINGLE_RHS (or invalid). */
8095 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8096 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8097 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8099 ignore
= (target
== const0_rtx
8100 || ((CONVERT_EXPR_CODE_P (code
)
8101 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8102 && TREE_CODE (type
) == VOID_TYPE
));
8104 /* We should be called only if we need the result. */
8105 gcc_assert (!ignore
);
8107 /* An operation in what may be a bit-field type needs the
8108 result to be reduced to the precision of the bit-field type,
8109 which is narrower than that of the type's mode. */
8110 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8111 && GET_MODE_PRECISION (mode
) > TYPE_PRECISION (type
));
8113 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8116 /* Use subtarget as the target for operand 0 of a binary operation. */
8117 subtarget
= get_subtarget (target
);
8118 original_target
= target
;
8122 case NON_LVALUE_EXPR
:
8125 if (treeop0
== error_mark_node
)
8128 if (TREE_CODE (type
) == UNION_TYPE
)
8130 tree valtype
= TREE_TYPE (treeop0
);
8132 /* If both input and output are BLKmode, this conversion isn't doing
8133 anything except possibly changing memory attribute. */
8134 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8136 rtx result
= expand_expr (treeop0
, target
, tmode
,
8139 result
= copy_rtx (result
);
8140 set_mem_attributes (result
, type
, 0);
8146 if (TYPE_MODE (type
) != BLKmode
)
8147 target
= gen_reg_rtx (TYPE_MODE (type
));
8149 target
= assign_temp (type
, 1, 1);
8153 /* Store data into beginning of memory target. */
8154 store_expr (treeop0
,
8155 adjust_address (target
, TYPE_MODE (valtype
), 0),
8156 modifier
== EXPAND_STACK_PARM
,
8157 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8161 gcc_assert (REG_P (target
)
8162 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8164 /* Store this field into a union of the proper type. */
8165 store_field (target
,
8166 MIN ((int_size_in_bytes (TREE_TYPE
8169 (HOST_WIDE_INT
) GET_MODE_BITSIZE (mode
)),
8170 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8174 /* Return the entire union. */
8178 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8180 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8183 /* If the signedness of the conversion differs and OP0 is
8184 a promoted SUBREG, clear that indication since we now
8185 have to do the proper extension. */
8186 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8187 && GET_CODE (op0
) == SUBREG
)
8188 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8190 return REDUCE_BIT_FIELD (op0
);
8193 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8194 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8195 if (GET_MODE (op0
) == mode
)
8198 /* If OP0 is a constant, just convert it into the proper mode. */
8199 else if (CONSTANT_P (op0
))
8201 tree inner_type
= TREE_TYPE (treeop0
);
8202 machine_mode inner_mode
= GET_MODE (op0
);
8204 if (inner_mode
== VOIDmode
)
8205 inner_mode
= TYPE_MODE (inner_type
);
8207 if (modifier
== EXPAND_INITIALIZER
)
8208 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8210 op0
= convert_modes (mode
, inner_mode
, op0
,
8211 TYPE_UNSIGNED (inner_type
));
8214 else if (modifier
== EXPAND_INITIALIZER
)
8215 op0
= gen_rtx_fmt_e (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8217 else if (target
== 0)
8218 op0
= convert_to_mode (mode
, op0
,
8219 TYPE_UNSIGNED (TREE_TYPE
8223 convert_move (target
, op0
,
8224 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8228 return REDUCE_BIT_FIELD (op0
);
8230 case ADDR_SPACE_CONVERT_EXPR
:
8232 tree treeop0_type
= TREE_TYPE (treeop0
);
8234 gcc_assert (POINTER_TYPE_P (type
));
8235 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8237 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8238 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8240 /* Conversions between pointers to the same address space should
8241 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8242 gcc_assert (as_to
!= as_from
);
8244 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8246 /* Ask target code to handle conversion between pointers
8247 to overlapping address spaces. */
8248 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8249 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8251 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8255 /* For disjoint address spaces, converting anything but a null
8256 pointer invokes undefined behavior. We truncate or extend the
8257 value as if we'd converted via integers, which handles 0 as
8258 required, and all others as the programmer likely expects. */
8259 #ifndef POINTERS_EXTEND_UNSIGNED
8260 const int POINTERS_EXTEND_UNSIGNED
= 1;
8262 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8263 op0
, POINTERS_EXTEND_UNSIGNED
);
8269 case POINTER_PLUS_EXPR
:
8270 /* Even though the sizetype mode and the pointer's mode can be different
8271 expand is able to handle this correctly and get the correct result out
8272 of the PLUS_EXPR code. */
8273 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8274 if sizetype precision is smaller than pointer precision. */
8275 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8276 treeop1
= fold_convert_loc (loc
, type
,
8277 fold_convert_loc (loc
, ssizetype
,
8279 /* If sizetype precision is larger than pointer precision, truncate the
8280 offset to have matching modes. */
8281 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8282 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8285 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8286 something else, make sure we add the register to the constant and
8287 then to the other thing. This case can occur during strength
8288 reduction and doing it this way will produce better code if the
8289 frame pointer or argument pointer is eliminated.
8291 fold-const.c will ensure that the constant is always in the inner
8292 PLUS_EXPR, so the only case we need to do anything about is if
8293 sp, ap, or fp is our second argument, in which case we must swap
8294 the innermost first argument and our second argument. */
8296 if (TREE_CODE (treeop0
) == PLUS_EXPR
8297 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8298 && TREE_CODE (treeop1
) == VAR_DECL
8299 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8300 || DECL_RTL (treeop1
) == stack_pointer_rtx
8301 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8306 /* If the result is to be ptr_mode and we are adding an integer to
8307 something, we might be forming a constant. So try to use
8308 plus_constant. If it produces a sum and we can't accept it,
8309 use force_operand. This allows P = &ARR[const] to generate
8310 efficient code on machines where a SYMBOL_REF is not a valid
8313 If this is an EXPAND_SUM call, always return the sum. */
8314 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8315 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8317 if (modifier
== EXPAND_STACK_PARM
)
8319 if (TREE_CODE (treeop0
) == INTEGER_CST
8320 && GET_MODE_PRECISION (mode
) <= HOST_BITS_PER_WIDE_INT
8321 && TREE_CONSTANT (treeop1
))
8325 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8327 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8329 /* Use wi::shwi to ensure that the constant is
8330 truncated according to the mode of OP1, then sign extended
8331 to a HOST_WIDE_INT. Using the constant directly can result
8332 in non-canonical RTL in a 64x32 cross compile. */
8333 wc
= TREE_INT_CST_LOW (treeop0
);
8335 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8336 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8337 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8338 op1
= force_operand (op1
, target
);
8339 return REDUCE_BIT_FIELD (op1
);
8342 else if (TREE_CODE (treeop1
) == INTEGER_CST
8343 && GET_MODE_PRECISION (mode
) <= HOST_BITS_PER_WIDE_INT
8344 && TREE_CONSTANT (treeop0
))
8348 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8350 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8351 (modifier
== EXPAND_INITIALIZER
8352 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8353 if (! CONSTANT_P (op0
))
8355 op1
= expand_expr (treeop1
, NULL_RTX
,
8356 VOIDmode
, modifier
);
8357 /* Return a PLUS if modifier says it's OK. */
8358 if (modifier
== EXPAND_SUM
8359 || modifier
== EXPAND_INITIALIZER
)
8360 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8363 /* Use wi::shwi to ensure that the constant is
8364 truncated according to the mode of OP1, then sign extended
8365 to a HOST_WIDE_INT. Using the constant directly can result
8366 in non-canonical RTL in a 64x32 cross compile. */
8367 wc
= TREE_INT_CST_LOW (treeop1
);
8369 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8370 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8371 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8372 op0
= force_operand (op0
, target
);
8373 return REDUCE_BIT_FIELD (op0
);
8377 /* Use TER to expand pointer addition of a negated value
8378 as pointer subtraction. */
8379 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8380 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8381 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8382 && TREE_CODE (treeop1
) == SSA_NAME
8383 && TYPE_MODE (TREE_TYPE (treeop0
))
8384 == TYPE_MODE (TREE_TYPE (treeop1
)))
8386 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8389 treeop1
= gimple_assign_rhs1 (def
);
8395 /* No sense saving up arithmetic to be done
8396 if it's all in the wrong mode to form part of an address.
8397 And force_operand won't know whether to sign-extend or
8399 if (modifier
!= EXPAND_INITIALIZER
8400 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8402 expand_operands (treeop0
, treeop1
,
8403 subtarget
, &op0
, &op1
, modifier
);
8404 if (op0
== const0_rtx
)
8406 if (op1
== const0_rtx
)
8411 expand_operands (treeop0
, treeop1
,
8412 subtarget
, &op0
, &op1
, modifier
);
8413 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8417 /* For initializers, we are allowed to return a MINUS of two
8418 symbolic constants. Here we handle all cases when both operands
8420 /* Handle difference of two symbolic constants,
8421 for the sake of an initializer. */
8422 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8423 && really_constant_p (treeop0
)
8424 && really_constant_p (treeop1
))
8426 expand_operands (treeop0
, treeop1
,
8427 NULL_RTX
, &op0
, &op1
, modifier
);
8429 /* If the last operand is a CONST_INT, use plus_constant of
8430 the negated constant. Else make the MINUS. */
8431 if (CONST_INT_P (op1
))
8432 return REDUCE_BIT_FIELD (plus_constant (mode
, op0
,
8435 return REDUCE_BIT_FIELD (gen_rtx_MINUS (mode
, op0
, op1
));
8438 /* No sense saving up arithmetic to be done
8439 if it's all in the wrong mode to form part of an address.
8440 And force_operand won't know whether to sign-extend or
8442 if (modifier
!= EXPAND_INITIALIZER
8443 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8446 expand_operands (treeop0
, treeop1
,
8447 subtarget
, &op0
, &op1
, modifier
);
8449 /* Convert A - const to A + (-const). */
8450 if (CONST_INT_P (op1
))
8452 op1
= negate_rtx (mode
, op1
);
8453 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8458 case WIDEN_MULT_PLUS_EXPR
:
8459 case WIDEN_MULT_MINUS_EXPR
:
8460 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8461 op2
= expand_normal (treeop2
);
8462 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8466 case WIDEN_MULT_EXPR
:
8467 /* If first operand is constant, swap them.
8468 Thus the following special case checks need only
8469 check the second operand. */
8470 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8471 std::swap (treeop0
, treeop1
);
8473 /* First, check if we have a multiplication of one signed and one
8474 unsigned operand. */
8475 if (TREE_CODE (treeop1
) != INTEGER_CST
8476 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8477 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8479 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8480 this_optab
= usmul_widen_optab
;
8481 if (find_widening_optab_handler (this_optab
, mode
, innermode
, 0)
8482 != CODE_FOR_nothing
)
8484 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8485 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8488 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8490 /* op0 and op1 might still be constant, despite the above
8491 != INTEGER_CST check. Handle it. */
8492 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8494 op0
= convert_modes (innermode
, mode
, op0
, true);
8495 op1
= convert_modes (innermode
, mode
, op1
, false);
8496 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8497 target
, unsignedp
));
8502 /* Check for a multiplication with matching signedness. */
8503 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8504 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8505 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8506 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8508 tree op0type
= TREE_TYPE (treeop0
);
8509 machine_mode innermode
= TYPE_MODE (op0type
);
8510 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8511 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8512 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8514 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8516 if (find_widening_optab_handler (this_optab
, mode
, innermode
, 0)
8517 != CODE_FOR_nothing
)
8519 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8521 /* op0 and op1 might still be constant, despite the above
8522 != INTEGER_CST check. Handle it. */
8523 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8526 op0
= convert_modes (innermode
, mode
, op0
, zextend_p
);
8528 = convert_modes (innermode
, mode
, op1
,
8529 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8530 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8534 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8535 unsignedp
, this_optab
);
8536 return REDUCE_BIT_FIELD (temp
);
8538 if (find_widening_optab_handler (other_optab
, mode
, innermode
, 0)
8540 && innermode
== word_mode
)
8543 op0
= expand_normal (treeop0
);
8544 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8545 op1
= convert_modes (innermode
, mode
,
8546 expand_normal (treeop1
),
8547 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8549 op1
= expand_normal (treeop1
);
8550 /* op0 and op1 might still be constant, despite the above
8551 != INTEGER_CST check. Handle it. */
8552 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8553 goto widen_mult_const
;
8554 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8555 unsignedp
, OPTAB_LIB_WIDEN
);
8556 hipart
= gen_highpart (innermode
, temp
);
8557 htem
= expand_mult_highpart_adjust (innermode
, hipart
,
8561 emit_move_insn (hipart
, htem
);
8562 return REDUCE_BIT_FIELD (temp
);
8566 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8567 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8568 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8569 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8573 optab opt
= fma_optab
;
8574 gimple
*def0
, *def2
;
8576 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8578 if (optab_handler (fma_optab
, mode
) == CODE_FOR_nothing
)
8580 tree fn
= mathfn_built_in (TREE_TYPE (treeop0
), BUILT_IN_FMA
);
8583 gcc_assert (fn
!= NULL_TREE
);
8584 call_expr
= build_call_expr (fn
, 3, treeop0
, treeop1
, treeop2
);
8585 return expand_builtin (call_expr
, target
, subtarget
, mode
, false);
8588 def0
= get_def_for_expr (treeop0
, NEGATE_EXPR
);
8589 /* The multiplication is commutative - look at its 2nd operand
8590 if the first isn't fed by a negate. */
8593 def0
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8594 /* Swap operands if the 2nd operand is fed by a negate. */
8596 std::swap (treeop0
, treeop1
);
8598 def2
= get_def_for_expr (treeop2
, NEGATE_EXPR
);
8603 && optab_handler (fnms_optab
, mode
) != CODE_FOR_nothing
)
8606 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8607 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8610 && optab_handler (fnma_optab
, mode
) != CODE_FOR_nothing
)
8613 op0
= expand_normal (gimple_assign_rhs1 (def0
));
8616 && optab_handler (fms_optab
, mode
) != CODE_FOR_nothing
)
8619 op2
= expand_normal (gimple_assign_rhs1 (def2
));
8623 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
, EXPAND_NORMAL
);
8625 op2
= expand_normal (treeop2
);
8626 op1
= expand_normal (treeop1
);
8628 return expand_ternary_op (TYPE_MODE (type
), opt
,
8629 op0
, op1
, op2
, target
, 0);
8633 /* If this is a fixed-point operation, then we cannot use the code
8634 below because "expand_mult" doesn't support sat/no-sat fixed-point
8636 if (ALL_FIXED_POINT_MODE_P (mode
))
8639 /* If first operand is constant, swap them.
8640 Thus the following special case checks need only
8641 check the second operand. */
8642 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8643 std::swap (treeop0
, treeop1
);
8645 /* Attempt to return something suitable for generating an
8646 indexed address, for machines that support that. */
8648 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8649 && tree_fits_shwi_p (treeop1
))
8651 tree exp1
= treeop1
;
8653 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8657 op0
= force_operand (op0
, NULL_RTX
);
8659 op0
= copy_to_mode_reg (mode
, op0
);
8661 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8662 gen_int_mode (tree_to_shwi (exp1
),
8663 TYPE_MODE (TREE_TYPE (exp1
)))));
8666 if (modifier
== EXPAND_STACK_PARM
)
8669 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8670 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8672 case TRUNC_DIV_EXPR
:
8673 case FLOOR_DIV_EXPR
:
8675 case ROUND_DIV_EXPR
:
8676 case EXACT_DIV_EXPR
:
8677 /* If this is a fixed-point operation, then we cannot use the code
8678 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8680 if (ALL_FIXED_POINT_MODE_P (mode
))
8683 if (modifier
== EXPAND_STACK_PARM
)
8685 /* Possible optimization: compute the dividend with EXPAND_SUM
8686 then if the divisor is constant can optimize the case
8687 where some terms of the dividend have coeffs divisible by it. */
8688 expand_operands (treeop0
, treeop1
,
8689 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8690 return expand_divmod (0, code
, mode
, op0
, op1
, target
, unsignedp
);
8695 case MULT_HIGHPART_EXPR
:
8696 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8697 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
8701 case TRUNC_MOD_EXPR
:
8702 case FLOOR_MOD_EXPR
:
8704 case ROUND_MOD_EXPR
:
8705 if (modifier
== EXPAND_STACK_PARM
)
8707 expand_operands (treeop0
, treeop1
,
8708 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8709 return expand_divmod (1, code
, mode
, op0
, op1
, target
, unsignedp
);
8711 case FIXED_CONVERT_EXPR
:
8712 op0
= expand_normal (treeop0
);
8713 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8714 target
= gen_reg_rtx (mode
);
8716 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
8717 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8718 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
8719 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
8721 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
8724 case FIX_TRUNC_EXPR
:
8725 op0
= expand_normal (treeop0
);
8726 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8727 target
= gen_reg_rtx (mode
);
8728 expand_fix (target
, op0
, unsignedp
);
8732 op0
= expand_normal (treeop0
);
8733 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
8734 target
= gen_reg_rtx (mode
);
8735 /* expand_float can't figure out what to do if FROM has VOIDmode.
8736 So give it the correct mode. With -O, cse will optimize this. */
8737 if (GET_MODE (op0
) == VOIDmode
)
8738 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
8740 expand_float (target
, op0
,
8741 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8745 op0
= expand_expr (treeop0
, subtarget
,
8746 VOIDmode
, EXPAND_NORMAL
);
8747 if (modifier
== EXPAND_STACK_PARM
)
8749 temp
= expand_unop (mode
,
8750 optab_for_tree_code (NEGATE_EXPR
, type
,
8754 return REDUCE_BIT_FIELD (temp
);
8757 op0
= expand_expr (treeop0
, subtarget
,
8758 VOIDmode
, EXPAND_NORMAL
);
8759 if (modifier
== EXPAND_STACK_PARM
)
8762 /* ABS_EXPR is not valid for complex arguments. */
8763 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
8764 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
8766 /* Unsigned abs is simply the operand. Testing here means we don't
8767 risk generating incorrect code below. */
8768 if (TYPE_UNSIGNED (type
))
8771 return expand_abs (mode
, op0
, target
, unsignedp
,
8772 safe_from_p (target
, treeop0
, 1));
8776 target
= original_target
;
8778 || modifier
== EXPAND_STACK_PARM
8779 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
8780 || GET_MODE (target
) != mode
8782 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
8783 target
= gen_reg_rtx (mode
);
8784 expand_operands (treeop0
, treeop1
,
8785 target
, &op0
, &op1
, EXPAND_NORMAL
);
8787 /* First try to do it with a special MIN or MAX instruction.
8788 If that does not win, use a conditional jump to select the proper
8790 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
8791 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
8796 /* At this point, a MEM target is no longer useful; we will get better
8799 if (! REG_P (target
))
8800 target
= gen_reg_rtx (mode
);
8802 /* If op1 was placed in target, swap op0 and op1. */
8803 if (target
!= op0
&& target
== op1
)
8804 std::swap (op0
, op1
);
8806 /* We generate better code and avoid problems with op1 mentioning
8807 target by forcing op1 into a pseudo if it isn't a constant. */
8808 if (! CONSTANT_P (op1
))
8809 op1
= force_reg (mode
, op1
);
8812 enum rtx_code comparison_code
;
8815 if (code
== MAX_EXPR
)
8816 comparison_code
= unsignedp
? GEU
: GE
;
8818 comparison_code
= unsignedp
? LEU
: LE
;
8820 /* Canonicalize to comparisons against 0. */
8821 if (op1
== const1_rtx
)
8823 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
8824 or (a != 0 ? a : 1) for unsigned.
8825 For MIN we are safe converting (a <= 1 ? a : 1)
8826 into (a <= 0 ? a : 1) */
8827 cmpop1
= const0_rtx
;
8828 if (code
== MAX_EXPR
)
8829 comparison_code
= unsignedp
? NE
: GT
;
8831 if (op1
== constm1_rtx
&& !unsignedp
)
8833 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
8834 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
8835 cmpop1
= const0_rtx
;
8836 if (code
== MIN_EXPR
)
8837 comparison_code
= LT
;
8840 /* Use a conditional move if possible. */
8841 if (can_conditionally_move_p (mode
))
8847 /* Try to emit the conditional move. */
8848 insn
= emit_conditional_move (target
, comparison_code
,
8853 /* If we could do the conditional move, emit the sequence,
8857 rtx_insn
*seq
= get_insns ();
8863 /* Otherwise discard the sequence and fall back to code with
8869 emit_move_insn (target
, op0
);
8871 lab
= gen_label_rtx ();
8872 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
8873 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
8876 emit_move_insn (target
, op1
);
8881 op0
= expand_expr (treeop0
, subtarget
,
8882 VOIDmode
, EXPAND_NORMAL
);
8883 if (modifier
== EXPAND_STACK_PARM
)
8885 /* In case we have to reduce the result to bitfield precision
8886 for unsigned bitfield expand this as XOR with a proper constant
8888 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
8890 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
8891 false, GET_MODE_PRECISION (mode
));
8893 temp
= expand_binop (mode
, xor_optab
, op0
,
8894 immed_wide_int_const (mask
, mode
),
8895 target
, 1, OPTAB_LIB_WIDEN
);
8898 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
8902 /* ??? Can optimize bitwise operations with one arg constant.
8903 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
8904 and (a bitwise1 b) bitwise2 b (etc)
8905 but that is probably not worth while. */
8914 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
8915 || (GET_MODE_PRECISION (TYPE_MODE (type
))
8916 == TYPE_PRECISION (type
)));
8922 /* If this is a fixed-point operation, then we cannot use the code
8923 below because "expand_shift" doesn't support sat/no-sat fixed-point
8925 if (ALL_FIXED_POINT_MODE_P (mode
))
8928 if (! safe_from_p (subtarget
, treeop1
, 1))
8930 if (modifier
== EXPAND_STACK_PARM
)
8932 op0
= expand_expr (treeop0
, subtarget
,
8933 VOIDmode
, EXPAND_NORMAL
);
8935 /* Left shift optimization when shifting across word_size boundary.
8937 If mode == GET_MODE_WIDER_MODE (word_mode), then normally there isn't
8938 native instruction to support this wide mode left shift. Given below
8941 Type A = (Type) B << C
8944 | dest_high | dest_low |
8948 If the shift amount C caused we shift B to across the word size
8949 boundary, i.e part of B shifted into high half of destination
8950 register, and part of B remains in the low half, then GCC will use
8951 the following left shift expand logic:
8953 1. Initialize dest_low to B.
8954 2. Initialize every bit of dest_high to the sign bit of B.
8955 3. Logic left shift dest_low by C bit to finalize dest_low.
8956 The value of dest_low before this shift is kept in a temp D.
8957 4. Logic left shift dest_high by C.
8958 5. Logic right shift D by (word_size - C).
8959 6. Or the result of 4 and 5 to finalize dest_high.
8961 While, by checking gimple statements, if operand B is coming from
8962 signed extension, then we can simplify above expand logic into:
8964 1. dest_high = src_low >> (word_size - C).
8965 2. dest_low = src_low << C.
8967 We can use one arithmetic right shift to finish all the purpose of
8968 steps 2, 4, 5, 6, thus we reduce the steps needed from 6 into 2. */
8971 if (code
== LSHIFT_EXPR
8975 && mode
== GET_MODE_WIDER_MODE (word_mode
)
8976 && GET_MODE_SIZE (mode
) == 2 * GET_MODE_SIZE (word_mode
)
8977 && TREE_CONSTANT (treeop1
)
8978 && TREE_CODE (treeop0
) == SSA_NAME
)
8980 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
8981 if (is_gimple_assign (def
)
8982 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
8984 machine_mode rmode
= TYPE_MODE
8985 (TREE_TYPE (gimple_assign_rhs1 (def
)));
8987 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (mode
)
8988 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
8989 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
8990 >= GET_MODE_BITSIZE (word_mode
)))
8992 rtx_insn
*seq
, *seq_old
;
8993 unsigned int high_off
= subreg_highpart_offset (word_mode
,
8995 rtx low
= lowpart_subreg (word_mode
, op0
, mode
);
8996 rtx dest_low
= lowpart_subreg (word_mode
, target
, mode
);
8997 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
8999 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9000 - TREE_INT_CST_LOW (treeop1
));
9001 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9004 /* dest_high = src_low >> (word_size - C). */
9005 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9006 rshift
, dest_high
, unsignedp
);
9007 if (temp
!= dest_high
)
9008 emit_move_insn (dest_high
, temp
);
9010 /* dest_low = src_low << C. */
9011 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9012 treeop1
, dest_low
, unsignedp
);
9013 if (temp
!= dest_low
)
9014 emit_move_insn (dest_low
, temp
);
9020 if (have_insn_for (ASHIFT
, mode
))
9022 bool speed_p
= optimize_insn_for_speed_p ();
9024 rtx ret_old
= expand_variable_shift (code
, mode
, op0
,
9028 seq_old
= get_insns ();
9030 if (seq_cost (seq
, speed_p
)
9031 >= seq_cost (seq_old
, speed_p
))
9042 if (temp
== NULL_RTX
)
9043 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9045 if (code
== LSHIFT_EXPR
)
9046 temp
= REDUCE_BIT_FIELD (temp
);
9050 /* Could determine the answer when only additive constants differ. Also,
9051 the addition of one can be handled by changing the condition. */
9058 case UNORDERED_EXPR
:
9067 temp
= do_store_flag (ops
,
9068 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9069 tmode
!= VOIDmode
? tmode
: mode
);
9073 /* Use a compare and a jump for BLKmode comparisons, or for function
9074 type comparisons is have_canonicalize_funcptr_for_compare. */
9077 || modifier
== EXPAND_STACK_PARM
9078 || ! safe_from_p (target
, treeop0
, 1)
9079 || ! safe_from_p (target
, treeop1
, 1)
9080 /* Make sure we don't have a hard reg (such as function's return
9081 value) live across basic blocks, if not optimizing. */
9082 || (!optimize
&& REG_P (target
)
9083 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9084 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9086 emit_move_insn (target
, const0_rtx
);
9088 rtx_code_label
*lab1
= gen_label_rtx ();
9089 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
, -1);
9091 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9092 emit_move_insn (target
, constm1_rtx
);
9094 emit_move_insn (target
, const1_rtx
);
9100 /* Get the rtx code of the operands. */
9101 op0
= expand_normal (treeop0
);
9102 op1
= expand_normal (treeop1
);
9105 target
= gen_reg_rtx (TYPE_MODE (type
));
9107 /* If target overlaps with op1, then either we need to force
9108 op1 into a pseudo (if target also overlaps with op0),
9109 or write the complex parts in reverse order. */
9110 switch (GET_CODE (target
))
9113 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9115 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9117 complex_expr_force_op1
:
9118 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9119 emit_move_insn (temp
, op1
);
9123 complex_expr_swap_order
:
9124 /* Move the imaginary (op1) and real (op0) parts to their
9126 write_complex_part (target
, op1
, true);
9127 write_complex_part (target
, op0
, false);
9133 temp
= adjust_address_nv (target
,
9134 GET_MODE_INNER (GET_MODE (target
)), 0);
9135 if (reg_overlap_mentioned_p (temp
, op1
))
9137 machine_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9138 temp
= adjust_address_nv (target
, imode
,
9139 GET_MODE_SIZE (imode
));
9140 if (reg_overlap_mentioned_p (temp
, op0
))
9141 goto complex_expr_force_op1
;
9142 goto complex_expr_swap_order
;
9146 if (reg_overlap_mentioned_p (target
, op1
))
9148 if (reg_overlap_mentioned_p (target
, op0
))
9149 goto complex_expr_force_op1
;
9150 goto complex_expr_swap_order
;
9155 /* Move the real (op0) and imaginary (op1) parts to their location. */
9156 write_complex_part (target
, op0
, false);
9157 write_complex_part (target
, op1
, true);
9161 case WIDEN_SUM_EXPR
:
9163 tree oprnd0
= treeop0
;
9164 tree oprnd1
= treeop1
;
9166 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9167 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9172 case REDUC_MAX_EXPR
:
9173 case REDUC_MIN_EXPR
:
9174 case REDUC_PLUS_EXPR
:
9176 op0
= expand_normal (treeop0
);
9177 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9178 machine_mode vec_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9180 struct expand_operand ops
[2];
9181 enum insn_code icode
= optab_handler (this_optab
, vec_mode
);
9183 create_output_operand (&ops
[0], target
, mode
);
9184 create_input_operand (&ops
[1], op0
, vec_mode
);
9185 expand_insn (icode
, 2, ops
);
9186 target
= ops
[0].value
;
9187 if (GET_MODE (target
) != mode
)
9188 return gen_lowpart (tmode
, target
);
9192 case VEC_UNPACK_HI_EXPR
:
9193 case VEC_UNPACK_LO_EXPR
:
9195 op0
= expand_normal (treeop0
);
9196 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9202 case VEC_UNPACK_FLOAT_HI_EXPR
:
9203 case VEC_UNPACK_FLOAT_LO_EXPR
:
9205 op0
= expand_normal (treeop0
);
9206 /* The signedness is determined from input operand. */
9207 temp
= expand_widen_pattern_expr
9208 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9209 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9215 case VEC_WIDEN_MULT_HI_EXPR
:
9216 case VEC_WIDEN_MULT_LO_EXPR
:
9217 case VEC_WIDEN_MULT_EVEN_EXPR
:
9218 case VEC_WIDEN_MULT_ODD_EXPR
:
9219 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9220 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9221 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9222 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9224 gcc_assert (target
);
9227 case VEC_PACK_TRUNC_EXPR
:
9228 case VEC_PACK_SAT_EXPR
:
9229 case VEC_PACK_FIX_TRUNC_EXPR
:
9230 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9234 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9235 op2
= expand_normal (treeop2
);
9237 /* Careful here: if the target doesn't support integral vector modes,
9238 a constant selection vector could wind up smooshed into a normal
9239 integral constant. */
9240 if (CONSTANT_P (op2
) && GET_CODE (op2
) != CONST_VECTOR
)
9242 tree sel_type
= TREE_TYPE (treeop2
);
9244 = mode_for_vector (TYPE_MODE (TREE_TYPE (sel_type
)),
9245 TYPE_VECTOR_SUBPARTS (sel_type
));
9246 gcc_assert (GET_MODE_CLASS (vmode
) == MODE_VECTOR_INT
);
9247 op2
= simplify_subreg (vmode
, op2
, TYPE_MODE (sel_type
), 0);
9248 gcc_assert (op2
&& GET_CODE (op2
) == CONST_VECTOR
);
9251 gcc_assert (GET_MODE_CLASS (GET_MODE (op2
)) == MODE_VECTOR_INT
);
9253 temp
= expand_vec_perm (mode
, op0
, op1
, op2
, target
);
9259 tree oprnd0
= treeop0
;
9260 tree oprnd1
= treeop1
;
9261 tree oprnd2
= treeop2
;
9264 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9265 op2
= expand_normal (oprnd2
);
9266 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9273 tree oprnd0
= treeop0
;
9274 tree oprnd1
= treeop1
;
9275 tree oprnd2
= treeop2
;
9278 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9279 op2
= expand_normal (oprnd2
);
9280 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9285 case REALIGN_LOAD_EXPR
:
9287 tree oprnd0
= treeop0
;
9288 tree oprnd1
= treeop1
;
9289 tree oprnd2
= treeop2
;
9292 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9293 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9294 op2
= expand_normal (oprnd2
);
9295 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9303 /* A COND_EXPR with its type being VOID_TYPE represents a
9304 conditional jump and is handled in
9305 expand_gimple_cond_expr. */
9306 gcc_assert (!VOID_TYPE_P (type
));
9308 /* Note that COND_EXPRs whose type is a structure or union
9309 are required to be constructed to contain assignments of
9310 a temporary variable, so that we can evaluate them here
9311 for side effect only. If type is void, we must do likewise. */
9313 gcc_assert (!TREE_ADDRESSABLE (type
)
9315 && TREE_TYPE (treeop1
) != void_type_node
9316 && TREE_TYPE (treeop2
) != void_type_node
);
9318 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9322 /* If we are not to produce a result, we have no target. Otherwise,
9323 if a target was specified use it; it will not be used as an
9324 intermediate target unless it is safe. If no target, use a
9327 if (modifier
!= EXPAND_STACK_PARM
9329 && safe_from_p (original_target
, treeop0
, 1)
9330 && GET_MODE (original_target
) == mode
9331 && !MEM_P (original_target
))
9332 temp
= original_target
;
9334 temp
= assign_temp (type
, 0, 1);
9336 do_pending_stack_adjust ();
9338 rtx_code_label
*lab0
= gen_label_rtx ();
9339 rtx_code_label
*lab1
= gen_label_rtx ();
9340 jumpifnot (treeop0
, lab0
, -1);
9341 store_expr (treeop1
, temp
,
9342 modifier
== EXPAND_STACK_PARM
,
9345 emit_jump_insn (targetm
.gen_jump (lab1
));
9348 store_expr (treeop2
, temp
,
9349 modifier
== EXPAND_STACK_PARM
,
9358 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9365 /* Here to do an ordinary binary operator. */
9367 expand_operands (treeop0
, treeop1
,
9368 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9370 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9372 if (modifier
== EXPAND_STACK_PARM
)
9374 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9375 unsignedp
, OPTAB_LIB_WIDEN
);
9377 /* Bitwise operations do not need bitfield reduction as we expect their
9378 operands being properly truncated. */
9379 if (code
== BIT_XOR_EXPR
9380 || code
== BIT_AND_EXPR
9381 || code
== BIT_IOR_EXPR
)
9383 return REDUCE_BIT_FIELD (temp
);
9385 #undef REDUCE_BIT_FIELD
9388 /* Return TRUE if expression STMT is suitable for replacement.
9389 Never consider memory loads as replaceable, because those don't ever lead
9390 into constant expressions. */
9393 stmt_is_replaceable_p (gimple
*stmt
)
9395 if (ssa_is_replaceable_p (stmt
))
9397 /* Don't move around loads. */
9398 if (!gimple_assign_single_p (stmt
)
9399 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9406 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9407 enum expand_modifier modifier
, rtx
*alt_rtl
,
9408 bool inner_reference_p
)
9410 rtx op0
, op1
, temp
, decl_rtl
;
9413 machine_mode mode
, dmode
;
9414 enum tree_code code
= TREE_CODE (exp
);
9415 rtx subtarget
, original_target
;
9418 bool reduce_bit_field
;
9419 location_t loc
= EXPR_LOCATION (exp
);
9420 struct separate_ops ops
;
9421 tree treeop0
, treeop1
, treeop2
;
9422 tree ssa_name
= NULL_TREE
;
9425 type
= TREE_TYPE (exp
);
9426 mode
= TYPE_MODE (type
);
9427 unsignedp
= TYPE_UNSIGNED (type
);
9429 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9430 if (!VL_EXP_CLASS_P (exp
))
9431 switch (TREE_CODE_LENGTH (code
))
9434 case 3: treeop2
= TREE_OPERAND (exp
, 2);
9435 case 2: treeop1
= TREE_OPERAND (exp
, 1);
9436 case 1: treeop0
= TREE_OPERAND (exp
, 0);
9446 ignore
= (target
== const0_rtx
9447 || ((CONVERT_EXPR_CODE_P (code
)
9448 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9449 && TREE_CODE (type
) == VOID_TYPE
));
9451 /* An operation in what may be a bit-field type needs the
9452 result to be reduced to the precision of the bit-field type,
9453 which is narrower than that of the type's mode. */
9454 reduce_bit_field
= (!ignore
9455 && INTEGRAL_TYPE_P (type
)
9456 && GET_MODE_PRECISION (mode
) > TYPE_PRECISION (type
));
9458 /* If we are going to ignore this result, we need only do something
9459 if there is a side-effect somewhere in the expression. If there
9460 is, short-circuit the most common cases here. Note that we must
9461 not call expand_expr with anything but const0_rtx in case this
9462 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9466 if (! TREE_SIDE_EFFECTS (exp
))
9469 /* Ensure we reference a volatile object even if value is ignored, but
9470 don't do this if all we are doing is taking its address. */
9471 if (TREE_THIS_VOLATILE (exp
)
9472 && TREE_CODE (exp
) != FUNCTION_DECL
9473 && mode
!= VOIDmode
&& mode
!= BLKmode
9474 && modifier
!= EXPAND_CONST_ADDRESS
)
9476 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9482 if (TREE_CODE_CLASS (code
) == tcc_unary
9483 || code
== BIT_FIELD_REF
9484 || code
== COMPONENT_REF
9485 || code
== INDIRECT_REF
)
9486 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9489 else if (TREE_CODE_CLASS (code
) == tcc_binary
9490 || TREE_CODE_CLASS (code
) == tcc_comparison
9491 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9493 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9494 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9501 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9504 /* Use subtarget as the target for operand 0 of a binary operation. */
9505 subtarget
= get_subtarget (target
);
9506 original_target
= target
;
9512 tree function
= decl_function_context (exp
);
9514 temp
= label_rtx (exp
);
9515 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9517 if (function
!= current_function_decl
9519 LABEL_REF_NONLOCAL_P (temp
) = 1;
9521 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9526 /* ??? ivopts calls expander, without any preparation from
9527 out-of-ssa. So fake instructions as if this was an access to the
9528 base variable. This unnecessarily allocates a pseudo, see how we can
9529 reuse it, if partition base vars have it set already. */
9530 if (!currently_expanding_to_rtl
)
9532 tree var
= SSA_NAME_VAR (exp
);
9533 if (var
&& DECL_RTL_SET_P (var
))
9534 return DECL_RTL (var
);
9535 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9536 LAST_VIRTUAL_REGISTER
+ 1);
9539 g
= get_gimple_for_ssa_name (exp
);
9540 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9542 && modifier
== EXPAND_INITIALIZER
9543 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9544 && (optimize
|| !SSA_NAME_VAR (exp
)
9545 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9546 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9547 g
= SSA_NAME_DEF_STMT (exp
);
9551 location_t saved_loc
= curr_insn_location ();
9552 location_t loc
= gimple_location (g
);
9553 if (loc
!= UNKNOWN_LOCATION
)
9554 set_curr_insn_location (loc
);
9555 ops
.code
= gimple_assign_rhs_code (g
);
9556 switch (get_gimple_rhs_class (ops
.code
))
9558 case GIMPLE_TERNARY_RHS
:
9559 ops
.op2
= gimple_assign_rhs3 (g
);
9561 case GIMPLE_BINARY_RHS
:
9562 ops
.op1
= gimple_assign_rhs2 (g
);
9564 /* Try to expand conditonal compare. */
9565 if (targetm
.gen_ccmp_first
)
9567 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9568 r
= expand_ccmp_expr (g
);
9573 case GIMPLE_UNARY_RHS
:
9574 ops
.op0
= gimple_assign_rhs1 (g
);
9575 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9577 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9579 case GIMPLE_SINGLE_RHS
:
9581 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9582 tmode
, modifier
, NULL
, inner_reference_p
);
9588 set_curr_insn_location (saved_loc
);
9589 if (REG_P (r
) && !REG_EXPR (r
))
9590 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9595 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9596 exp
= SSA_NAME_VAR (ssa_name
);
9597 goto expand_decl_rtl
;
9601 /* If a static var's type was incomplete when the decl was written,
9602 but the type is complete now, lay out the decl now. */
9603 if (DECL_SIZE (exp
) == 0
9604 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9605 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9606 layout_decl (exp
, 0);
9608 /* ... fall through ... */
9612 decl_rtl
= DECL_RTL (exp
);
9614 gcc_assert (decl_rtl
);
9616 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9617 settings for VECTOR_TYPE_P that might switch for the function. */
9618 if (currently_expanding_to_rtl
9619 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9620 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9621 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
9623 decl_rtl
= copy_rtx (decl_rtl
);
9625 /* Record writes to register variables. */
9626 if (modifier
== EXPAND_WRITE
9628 && HARD_REGISTER_P (decl_rtl
))
9629 add_to_hard_reg_set (&crtl
->asm_clobbers
,
9630 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
9632 /* Ensure variable marked as used even if it doesn't go through
9633 a parser. If it hasn't be used yet, write out an external
9636 TREE_USED (exp
) = 1;
9638 /* Show we haven't gotten RTL for this yet. */
9641 /* Variables inherited from containing functions should have
9642 been lowered by this point. */
9644 context
= decl_function_context (exp
);
9646 || SCOPE_FILE_SCOPE_P (context
)
9647 || context
== current_function_decl
9648 || TREE_STATIC (exp
)
9649 || DECL_EXTERNAL (exp
)
9650 /* ??? C++ creates functions that are not TREE_STATIC. */
9651 || TREE_CODE (exp
) == FUNCTION_DECL
);
9653 /* This is the case of an array whose size is to be determined
9654 from its initializer, while the initializer is still being parsed.
9655 ??? We aren't parsing while expanding anymore. */
9657 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
9658 temp
= validize_mem (decl_rtl
);
9660 /* If DECL_RTL is memory, we are in the normal case and the
9661 address is not valid, get the address into a register. */
9663 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
9666 *alt_rtl
= decl_rtl
;
9667 decl_rtl
= use_anchored_address (decl_rtl
);
9668 if (modifier
!= EXPAND_CONST_ADDRESS
9669 && modifier
!= EXPAND_SUM
9670 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
9671 : GET_MODE (decl_rtl
),
9673 MEM_ADDR_SPACE (decl_rtl
)))
9674 temp
= replace_equiv_address (decl_rtl
,
9675 copy_rtx (XEXP (decl_rtl
, 0)));
9678 /* If we got something, return it. But first, set the alignment
9679 if the address is a register. */
9682 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
9683 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
9689 dmode
= DECL_MODE (exp
);
9691 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
9693 /* If the mode of DECL_RTL does not match that of the decl,
9694 there are two cases: we are dealing with a BLKmode value
9695 that is returned in a register, or we are dealing with
9696 a promoted value. In the latter case, return a SUBREG
9697 of the wanted mode, but mark it so that we know that it
9698 was already extended. */
9699 if (REG_P (decl_rtl
)
9701 && GET_MODE (decl_rtl
) != dmode
)
9705 /* Get the signedness to be used for this variable. Ensure we get
9706 the same mode we got when the variable was declared. */
9707 if (code
!= SSA_NAME
)
9708 pmode
= promote_decl_mode (exp
, &unsignedp
);
9709 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
9710 && gimple_code (g
) == GIMPLE_CALL
9711 && !gimple_call_internal_p (g
))
9712 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
9713 gimple_call_fntype (g
),
9716 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
9717 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
9719 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
9720 SUBREG_PROMOTED_VAR_P (temp
) = 1;
9721 SUBREG_PROMOTED_SET (temp
, unsignedp
);
9728 /* Given that TYPE_PRECISION (type) is not always equal to
9729 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
9730 the former to the latter according to the signedness of the
9732 temp
= immed_wide_int_const (wi::to_wide
9734 GET_MODE_PRECISION (TYPE_MODE (type
))),
9740 tree tmp
= NULL_TREE
;
9741 if (GET_MODE_CLASS (mode
) == MODE_VECTOR_INT
9742 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FLOAT
9743 || GET_MODE_CLASS (mode
) == MODE_VECTOR_FRACT
9744 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UFRACT
9745 || GET_MODE_CLASS (mode
) == MODE_VECTOR_ACCUM
9746 || GET_MODE_CLASS (mode
) == MODE_VECTOR_UACCUM
)
9747 return const_vector_from_tree (exp
);
9748 if (GET_MODE_CLASS (mode
) == MODE_INT
)
9750 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
9751 return const_scalar_mask_from_tree (exp
);
9754 tree type_for_mode
= lang_hooks
.types
.type_for_mode (mode
, 1);
9756 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
9757 type_for_mode
, exp
);
9762 vec
<constructor_elt
, va_gc
> *v
;
9764 vec_alloc (v
, VECTOR_CST_NELTS (exp
));
9765 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
9766 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
9767 tmp
= build_constructor (type
, v
);
9769 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
9774 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
9777 /* If optimized, generate immediate CONST_DOUBLE
9778 which will be turned into memory by reload if necessary.
9780 We used to force a register so that loop.c could see it. But
9781 this does not allow gen_* patterns to perform optimizations with
9782 the constants. It also produces two insns in cases like "x = 1.0;".
9783 On most machines, floating-point constants are not permitted in
9784 many insns, so we'd end up copying it to a register in any case.
9786 Now, we do the copying in expand_binop, if appropriate. */
9787 return const_double_from_real_value (TREE_REAL_CST (exp
),
9788 TYPE_MODE (TREE_TYPE (exp
)));
9791 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
9792 TYPE_MODE (TREE_TYPE (exp
)));
9795 /* Handle evaluating a complex constant in a CONCAT target. */
9796 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
9798 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
9801 rtarg
= XEXP (original_target
, 0);
9802 itarg
= XEXP (original_target
, 1);
9804 /* Move the real and imaginary parts separately. */
9805 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
9806 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
9809 emit_move_insn (rtarg
, op0
);
9811 emit_move_insn (itarg
, op1
);
9813 return original_target
;
9816 /* ... fall through ... */
9819 temp
= expand_expr_constant (exp
, 1, modifier
);
9821 /* temp contains a constant address.
9822 On RISC machines where a constant address isn't valid,
9823 make some insns to get that address into a register. */
9824 if (modifier
!= EXPAND_CONST_ADDRESS
9825 && modifier
!= EXPAND_INITIALIZER
9826 && modifier
!= EXPAND_SUM
9827 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
9828 MEM_ADDR_SPACE (temp
)))
9829 return replace_equiv_address (temp
,
9830 copy_rtx (XEXP (temp
, 0)));
9836 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
9839 if (!SAVE_EXPR_RESOLVED_P (exp
))
9841 /* We can indeed still hit this case, typically via builtin
9842 expanders calling save_expr immediately before expanding
9843 something. Assume this means that we only have to deal
9844 with non-BLKmode values. */
9845 gcc_assert (GET_MODE (ret
) != BLKmode
);
9847 val
= build_decl (curr_insn_location (),
9848 VAR_DECL
, NULL
, TREE_TYPE (exp
));
9849 DECL_ARTIFICIAL (val
) = 1;
9850 DECL_IGNORED_P (val
) = 1;
9852 TREE_OPERAND (exp
, 0) = treeop0
;
9853 SAVE_EXPR_RESOLVED_P (exp
) = 1;
9855 if (!CONSTANT_P (ret
))
9856 ret
= copy_to_reg (ret
);
9857 SET_DECL_RTL (val
, ret
);
9865 /* If we don't need the result, just ensure we evaluate any
9869 unsigned HOST_WIDE_INT idx
;
9872 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
9873 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
9878 return expand_constructor (exp
, target
, modifier
, false);
9880 case TARGET_MEM_REF
:
9883 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
9884 enum insn_code icode
;
9887 op0
= addr_for_mem_ref (exp
, as
, true);
9888 op0
= memory_address_addr_space (mode
, op0
, as
);
9889 temp
= gen_rtx_MEM (mode
, op0
);
9890 set_mem_attributes (temp
, exp
, 0);
9891 set_mem_addr_space (temp
, as
);
9892 align
= get_object_alignment (exp
);
9893 if (modifier
!= EXPAND_WRITE
9894 && modifier
!= EXPAND_MEMORY
9896 && align
< GET_MODE_ALIGNMENT (mode
)
9897 /* If the target does not have special handling for unaligned
9898 loads of mode then it can use regular moves for them. */
9899 && ((icode
= optab_handler (movmisalign_optab
, mode
))
9900 != CODE_FOR_nothing
))
9902 struct expand_operand ops
[2];
9904 /* We've already validated the memory, and we're creating a
9905 new pseudo destination. The predicates really can't fail,
9906 nor can the generator. */
9907 create_output_operand (&ops
[0], NULL_RTX
, mode
);
9908 create_fixed_operand (&ops
[1], temp
);
9909 expand_insn (icode
, 2, ops
);
9910 temp
= ops
[0].value
;
9917 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
9919 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
9920 machine_mode address_mode
;
9921 tree base
= TREE_OPERAND (exp
, 0);
9923 enum insn_code icode
;
9925 /* Handle expansion of non-aliased memory with non-BLKmode. That
9926 might end up in a register. */
9927 if (mem_ref_refers_to_non_mem_p (exp
))
9929 HOST_WIDE_INT offset
= mem_ref_offset (exp
).to_short_addr ();
9930 base
= TREE_OPERAND (base
, 0);
9933 && tree_fits_uhwi_p (TYPE_SIZE (type
))
9934 && (GET_MODE_BITSIZE (DECL_MODE (base
))
9935 == tree_to_uhwi (TYPE_SIZE (type
))))
9936 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
9937 target
, tmode
, modifier
);
9938 if (TYPE_MODE (type
) == BLKmode
)
9940 temp
= assign_stack_temp (DECL_MODE (base
),
9941 GET_MODE_SIZE (DECL_MODE (base
)));
9942 store_expr (base
, temp
, 0, false, false);
9943 temp
= adjust_address (temp
, BLKmode
, offset
);
9944 set_mem_size (temp
, int_size_in_bytes (type
));
9947 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
9948 bitsize_int (offset
* BITS_PER_UNIT
));
9949 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
9950 return expand_expr (exp
, target
, tmode
, modifier
);
9952 address_mode
= targetm
.addr_space
.address_mode (as
);
9953 base
= TREE_OPERAND (exp
, 0);
9954 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
9956 tree mask
= gimple_assign_rhs2 (def_stmt
);
9957 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
9958 gimple_assign_rhs1 (def_stmt
), mask
);
9959 TREE_OPERAND (exp
, 0) = base
;
9961 align
= get_object_alignment (exp
);
9962 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
9963 op0
= memory_address_addr_space (mode
, op0
, as
);
9964 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
9966 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
9967 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
9968 op0
= memory_address_addr_space (mode
, op0
, as
);
9970 temp
= gen_rtx_MEM (mode
, op0
);
9971 set_mem_attributes (temp
, exp
, 0);
9972 set_mem_addr_space (temp
, as
);
9973 if (TREE_THIS_VOLATILE (exp
))
9974 MEM_VOLATILE_P (temp
) = 1;
9975 if (modifier
!= EXPAND_WRITE
9976 && modifier
!= EXPAND_MEMORY
9977 && !inner_reference_p
9979 && align
< GET_MODE_ALIGNMENT (mode
))
9981 if ((icode
= optab_handler (movmisalign_optab
, mode
))
9982 != CODE_FOR_nothing
)
9984 struct expand_operand ops
[2];
9986 /* We've already validated the memory, and we're creating a
9987 new pseudo destination. The predicates really can't fail,
9988 nor can the generator. */
9989 create_output_operand (&ops
[0], NULL_RTX
, mode
);
9990 create_fixed_operand (&ops
[1], temp
);
9991 expand_insn (icode
, 2, ops
);
9992 temp
= ops
[0].value
;
9994 else if (SLOW_UNALIGNED_ACCESS (mode
, align
))
9995 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
9996 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
9997 (modifier
== EXPAND_STACK_PARM
9998 ? NULL_RTX
: target
),
10002 && modifier
!= EXPAND_MEMORY
10003 && modifier
!= EXPAND_WRITE
)
10004 temp
= flip_storage_order (mode
, temp
);
10011 tree array
= treeop0
;
10012 tree index
= treeop1
;
10015 /* Fold an expression like: "foo"[2].
10016 This is not done in fold so it won't happen inside &.
10017 Don't fold if this is for wide characters since it's too
10018 difficult to do correctly and this is a very rare case. */
10020 if (modifier
!= EXPAND_CONST_ADDRESS
10021 && modifier
!= EXPAND_INITIALIZER
10022 && modifier
!= EXPAND_MEMORY
)
10024 tree t
= fold_read_from_constant_string (exp
);
10027 return expand_expr (t
, target
, tmode
, modifier
);
10030 /* If this is a constant index into a constant array,
10031 just get the value from the array. Handle both the cases when
10032 we have an explicit constructor and when our operand is a variable
10033 that was declared const. */
10035 if (modifier
!= EXPAND_CONST_ADDRESS
10036 && modifier
!= EXPAND_INITIALIZER
10037 && modifier
!= EXPAND_MEMORY
10038 && TREE_CODE (array
) == CONSTRUCTOR
10039 && ! TREE_SIDE_EFFECTS (array
)
10040 && TREE_CODE (index
) == INTEGER_CST
)
10042 unsigned HOST_WIDE_INT ix
;
10045 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10047 if (tree_int_cst_equal (field
, index
))
10049 if (!TREE_SIDE_EFFECTS (value
))
10050 return expand_expr (fold (value
), target
, tmode
, modifier
);
10055 else if (optimize
>= 1
10056 && modifier
!= EXPAND_CONST_ADDRESS
10057 && modifier
!= EXPAND_INITIALIZER
10058 && modifier
!= EXPAND_MEMORY
10059 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10060 && TREE_CODE (index
) == INTEGER_CST
10061 && (TREE_CODE (array
) == VAR_DECL
10062 || TREE_CODE (array
) == CONST_DECL
)
10063 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10065 if (init
== NULL_TREE
)
10067 tree value
= build_zero_cst (type
);
10068 if (TREE_CODE (value
) == CONSTRUCTOR
)
10070 /* If VALUE is a CONSTRUCTOR, this optimization is only
10071 useful if this doesn't store the CONSTRUCTOR into
10072 memory. If it does, it is more efficient to just
10073 load the data from the array directly. */
10074 rtx ret
= expand_constructor (value
, target
,
10076 if (ret
== NULL_RTX
)
10081 return expand_expr (value
, target
, tmode
, modifier
);
10083 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10085 unsigned HOST_WIDE_INT ix
;
10088 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10090 if (tree_int_cst_equal (field
, index
))
10092 if (TREE_SIDE_EFFECTS (value
))
10095 if (TREE_CODE (value
) == CONSTRUCTOR
)
10097 /* If VALUE is a CONSTRUCTOR, this
10098 optimization is only useful if
10099 this doesn't store the CONSTRUCTOR
10100 into memory. If it does, it is more
10101 efficient to just load the data from
10102 the array directly. */
10103 rtx ret
= expand_constructor (value
, target
,
10105 if (ret
== NULL_RTX
)
10110 expand_expr (fold (value
), target
, tmode
, modifier
);
10113 else if (TREE_CODE (init
) == STRING_CST
)
10115 tree low_bound
= array_ref_low_bound (exp
);
10116 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10118 /* Optimize the special case of a zero lower bound.
10120 We convert the lower bound to sizetype to avoid problems
10121 with constant folding. E.g. suppose the lower bound is
10122 1 and its mode is QI. Without the conversion
10123 (ARRAY + (INDEX - (unsigned char)1))
10125 (ARRAY + (-(unsigned char)1) + INDEX)
10127 (ARRAY + 255 + INDEX). Oops! */
10128 if (!integer_zerop (low_bound
))
10129 index1
= size_diffop_loc (loc
, index1
,
10130 fold_convert_loc (loc
, sizetype
,
10133 if (compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10135 tree type
= TREE_TYPE (TREE_TYPE (init
));
10136 machine_mode mode
= TYPE_MODE (type
);
10138 if (GET_MODE_CLASS (mode
) == MODE_INT
10139 && GET_MODE_SIZE (mode
) == 1)
10140 return gen_int_mode (TREE_STRING_POINTER (init
)
10141 [TREE_INT_CST_LOW (index1
)],
10147 goto normal_inner_ref
;
10149 case COMPONENT_REF
:
10150 /* If the operand is a CONSTRUCTOR, we can just extract the
10151 appropriate field if it is present. */
10152 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10154 unsigned HOST_WIDE_INT idx
;
10157 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10159 if (field
== treeop1
10160 /* We can normally use the value of the field in the
10161 CONSTRUCTOR. However, if this is a bitfield in
10162 an integral mode that we can fit in a HOST_WIDE_INT,
10163 we must mask only the number of bits in the bitfield,
10164 since this is done implicitly by the constructor. If
10165 the bitfield does not meet either of those conditions,
10166 we can't do this optimization. */
10167 && (! DECL_BIT_FIELD (field
)
10168 || ((GET_MODE_CLASS (DECL_MODE (field
)) == MODE_INT
)
10169 && (GET_MODE_PRECISION (DECL_MODE (field
))
10170 <= HOST_BITS_PER_WIDE_INT
))))
10172 if (DECL_BIT_FIELD (field
)
10173 && modifier
== EXPAND_STACK_PARM
)
10175 op0
= expand_expr (value
, target
, tmode
, modifier
);
10176 if (DECL_BIT_FIELD (field
))
10178 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10179 machine_mode imode
= TYPE_MODE (TREE_TYPE (field
));
10181 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10183 op1
= gen_int_mode (((HOST_WIDE_INT
) 1 << bitsize
) - 1,
10185 op0
= expand_and (imode
, op0
, op1
, target
);
10189 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10191 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10193 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10201 goto normal_inner_ref
;
10203 case BIT_FIELD_REF
:
10204 case ARRAY_RANGE_REF
:
10207 machine_mode mode1
, mode2
;
10208 HOST_WIDE_INT bitsize
, bitpos
;
10210 int reversep
, volatilep
= 0, must_force_mem
;
10212 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10213 &unsignedp
, &reversep
, &volatilep
, true);
10214 rtx orig_op0
, memloc
;
10215 bool clear_mem_expr
= false;
10217 /* If we got back the original object, something is wrong. Perhaps
10218 we are evaluating an expression too early. In any event, don't
10219 infinitely recurse. */
10220 gcc_assert (tem
!= exp
);
10222 /* If TEM's type is a union of variable size, pass TARGET to the inner
10223 computation, since it will need a temporary and TARGET is known
10224 to have to do. This occurs in unchecked conversion in Ada. */
10226 = expand_expr_real (tem
,
10227 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10228 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10229 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10231 && modifier
!= EXPAND_STACK_PARM
10232 ? target
: NULL_RTX
),
10234 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10237 /* If the field has a mode, we want to access it in the
10238 field's mode, not the computed mode.
10239 If a MEM has VOIDmode (external with incomplete type),
10240 use BLKmode for it instead. */
10243 if (mode1
!= VOIDmode
)
10244 op0
= adjust_address (op0
, mode1
, 0);
10245 else if (GET_MODE (op0
) == VOIDmode
)
10246 op0
= adjust_address (op0
, BLKmode
, 0);
10250 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10252 /* If we have either an offset, a BLKmode result, or a reference
10253 outside the underlying object, we must force it to memory.
10254 Such a case can occur in Ada if we have unchecked conversion
10255 of an expression from a scalar type to an aggregate type or
10256 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10257 passed a partially uninitialized object or a view-conversion
10258 to a larger size. */
10259 must_force_mem
= (offset
10260 || mode1
== BLKmode
10261 || bitpos
+ bitsize
> GET_MODE_BITSIZE (mode2
));
10263 /* Handle CONCAT first. */
10264 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10267 && bitsize
== GET_MODE_BITSIZE (GET_MODE (op0
)))
10270 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10274 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
10277 op0
= XEXP (op0
, 0);
10278 mode2
= GET_MODE (op0
);
10280 else if (bitpos
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0)))
10281 && bitsize
== GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1)))
10285 op0
= XEXP (op0
, 1);
10287 mode2
= GET_MODE (op0
);
10290 /* Otherwise force into memory. */
10291 must_force_mem
= 1;
10294 /* If this is a constant, put it in a register if it is a legitimate
10295 constant and we don't need a memory reference. */
10296 if (CONSTANT_P (op0
)
10297 && mode2
!= BLKmode
10298 && targetm
.legitimate_constant_p (mode2
, op0
)
10299 && !must_force_mem
)
10300 op0
= force_reg (mode2
, op0
);
10302 /* Otherwise, if this is a constant, try to force it to the constant
10303 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10304 is a legitimate constant. */
10305 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10306 op0
= validize_mem (memloc
);
10308 /* Otherwise, if this is a constant or the object is not in memory
10309 and need be, put it there. */
10310 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10312 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10313 emit_move_insn (memloc
, op0
);
10315 clear_mem_expr
= true;
10320 machine_mode address_mode
;
10321 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10324 gcc_assert (MEM_P (op0
));
10326 address_mode
= get_address_mode (op0
);
10327 if (GET_MODE (offset_rtx
) != address_mode
)
10329 /* We cannot be sure that the RTL in offset_rtx is valid outside
10330 of a memory address context, so force it into a register
10331 before attempting to convert it to the desired mode. */
10332 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10333 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10336 /* See the comment in expand_assignment for the rationale. */
10337 if (mode1
!= VOIDmode
10340 && (bitpos
% bitsize
) == 0
10341 && (bitsize
% GET_MODE_ALIGNMENT (mode1
)) == 0
10342 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10344 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10348 op0
= offset_address (op0
, offset_rtx
,
10349 highest_pow2_factor (offset
));
10352 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10353 record its alignment as BIGGEST_ALIGNMENT. */
10354 if (MEM_P (op0
) && bitpos
== 0 && offset
!= 0
10355 && is_aligning_offset (offset
, tem
))
10356 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10358 /* Don't forget about volatility even if this is a bitfield. */
10359 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10361 if (op0
== orig_op0
)
10362 op0
= copy_rtx (op0
);
10364 MEM_VOLATILE_P (op0
) = 1;
10367 /* In cases where an aligned union has an unaligned object
10368 as a field, we might be extracting a BLKmode value from
10369 an integer-mode (e.g., SImode) object. Handle this case
10370 by doing the extract into an object as wide as the field
10371 (which we know to be the width of a basic mode), then
10372 storing into memory, and changing the mode to BLKmode. */
10373 if (mode1
== VOIDmode
10374 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10375 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10376 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10377 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10378 && modifier
!= EXPAND_CONST_ADDRESS
10379 && modifier
!= EXPAND_INITIALIZER
10380 && modifier
!= EXPAND_MEMORY
)
10381 /* If the bitfield is volatile and the bitsize
10382 is narrower than the access size of the bitfield,
10383 we need to extract bitfields from the access. */
10384 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10385 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10386 && mode1
!= BLKmode
10387 && bitsize
< GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
)
10388 /* If the field isn't aligned enough to fetch as a memref,
10389 fetch it as a bit field. */
10390 || (mode1
!= BLKmode
10391 && (((TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10392 || (bitpos
% GET_MODE_ALIGNMENT (mode
) != 0)
10394 && (MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10395 || (bitpos
% GET_MODE_ALIGNMENT (mode1
) != 0))))
10396 && modifier
!= EXPAND_MEMORY
10397 && ((modifier
== EXPAND_CONST_ADDRESS
10398 || modifier
== EXPAND_INITIALIZER
)
10400 : SLOW_UNALIGNED_ACCESS (mode1
, MEM_ALIGN (op0
))))
10401 || (bitpos
% BITS_PER_UNIT
!= 0)))
10402 /* If the type and the field are a constant size and the
10403 size of the type isn't the same size as the bitfield,
10404 we must use bitfield operations. */
10406 && TYPE_SIZE (TREE_TYPE (exp
))
10407 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) == INTEGER_CST
10408 && 0 != compare_tree_int (TYPE_SIZE (TREE_TYPE (exp
)),
10411 machine_mode ext_mode
= mode
;
10413 if (ext_mode
== BLKmode
10414 && ! (target
!= 0 && MEM_P (op0
)
10416 && bitpos
% BITS_PER_UNIT
== 0))
10417 ext_mode
= mode_for_size (bitsize
, MODE_INT
, 1);
10419 if (ext_mode
== BLKmode
)
10422 target
= assign_temp (type
, 1, 1);
10424 /* ??? Unlike the similar test a few lines below, this one is
10425 very likely obsolete. */
10429 /* In this case, BITPOS must start at a byte boundary and
10430 TARGET, if specified, must be a MEM. */
10431 gcc_assert (MEM_P (op0
)
10432 && (!target
|| MEM_P (target
))
10433 && !(bitpos
% BITS_PER_UNIT
));
10435 emit_block_move (target
,
10436 adjust_address (op0
, VOIDmode
,
10437 bitpos
/ BITS_PER_UNIT
),
10438 GEN_INT ((bitsize
+ BITS_PER_UNIT
- 1)
10440 (modifier
== EXPAND_STACK_PARM
10441 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10446 /* If we have nothing to extract, the result will be 0 for targets
10447 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10448 return 0 for the sake of consistency, as reading a zero-sized
10449 bitfield is valid in Ada and the value is fully specified. */
10453 op0
= validize_mem (op0
);
10455 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10456 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10458 /* If the result has a record type and the extraction is done in
10459 an integral mode, then the field may be not aligned on a byte
10460 boundary; in this case, if it has reverse storage order, it
10461 needs to be extracted as a scalar field with reverse storage
10462 order and put back into memory order afterwards. */
10463 if (TREE_CODE (type
) == RECORD_TYPE
10464 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10465 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10467 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10468 (modifier
== EXPAND_STACK_PARM
10469 ? NULL_RTX
: target
),
10470 ext_mode
, ext_mode
, reversep
);
10472 /* If the result has a record type and the mode of OP0 is an
10473 integral mode then, if BITSIZE is narrower than this mode
10474 and this is for big-endian data, we must put the field
10475 into the high-order bits. And we must also put it back
10476 into memory order if it has been previously reversed. */
10477 if (TREE_CODE (type
) == RECORD_TYPE
10478 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_INT
)
10480 HOST_WIDE_INT size
= GET_MODE_BITSIZE (GET_MODE (op0
));
10483 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10484 op0
= expand_shift (LSHIFT_EXPR
, GET_MODE (op0
), op0
,
10485 size
- bitsize
, op0
, 1);
10488 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10491 /* If the result type is BLKmode, store the data into a temporary
10492 of the appropriate type, but with the mode corresponding to the
10493 mode for the data we have (op0's mode). */
10494 if (mode
== BLKmode
)
10497 = assign_stack_temp_for_type (ext_mode
,
10498 GET_MODE_BITSIZE (ext_mode
),
10500 emit_move_insn (new_rtx
, op0
);
10501 op0
= copy_rtx (new_rtx
);
10502 PUT_MODE (op0
, BLKmode
);
10508 /* If the result is BLKmode, use that to access the object
10510 if (mode
== BLKmode
)
10513 /* Get a reference to just this component. */
10514 if (modifier
== EXPAND_CONST_ADDRESS
10515 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10516 op0
= adjust_address_nv (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10518 op0
= adjust_address (op0
, mode1
, bitpos
/ BITS_PER_UNIT
);
10520 if (op0
== orig_op0
)
10521 op0
= copy_rtx (op0
);
10523 /* Don't set memory attributes if the base expression is
10524 SSA_NAME that got expanded as a MEM. In that case, we should
10525 just honor its original memory attributes. */
10526 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10527 set_mem_attributes (op0
, exp
, 0);
10529 if (REG_P (XEXP (op0
, 0)))
10530 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10532 /* If op0 is a temporary because the original expressions was forced
10533 to memory, clear MEM_EXPR so that the original expression cannot
10534 be marked as addressable through MEM_EXPR of the temporary. */
10535 if (clear_mem_expr
)
10536 set_mem_expr (op0
, NULL_TREE
);
10538 MEM_VOLATILE_P (op0
) |= volatilep
;
10541 && modifier
!= EXPAND_MEMORY
10542 && modifier
!= EXPAND_WRITE
)
10543 op0
= flip_storage_order (mode1
, op0
);
10545 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10546 || modifier
== EXPAND_CONST_ADDRESS
10547 || modifier
== EXPAND_INITIALIZER
)
10551 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10553 convert_move (target
, op0
, unsignedp
);
10558 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
10561 /* All valid uses of __builtin_va_arg_pack () are removed during
10563 if (CALL_EXPR_VA_ARG_PACK (exp
))
10564 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
10566 tree fndecl
= get_callee_fndecl (exp
), attr
;
10569 && (attr
= lookup_attribute ("error",
10570 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10571 error ("%Kcall to %qs declared with attribute error: %s",
10572 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10573 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10575 && (attr
= lookup_attribute ("warning",
10576 DECL_ATTRIBUTES (fndecl
))) != NULL
)
10577 warning_at (tree_nonartificial_location (exp
),
10578 0, "%Kcall to %qs declared with attribute warning: %s",
10579 exp
, identifier_to_locale (lang_hooks
.decl_printable_name (fndecl
, 1)),
10580 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
10582 /* Check for a built-in function. */
10583 if (fndecl
&& DECL_BUILT_IN (fndecl
))
10585 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
10586 if (CALL_WITH_BOUNDS_P (exp
))
10587 return expand_builtin_with_bounds (exp
, target
, subtarget
,
10590 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
10593 return expand_call (exp
, target
, ignore
);
10595 case VIEW_CONVERT_EXPR
:
10598 /* If we are converting to BLKmode, try to avoid an intermediate
10599 temporary by fetching an inner memory reference. */
10600 if (mode
== BLKmode
10601 && TREE_CODE (TYPE_SIZE (type
)) == INTEGER_CST
10602 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
10603 && handled_component_p (treeop0
))
10605 machine_mode mode1
;
10606 HOST_WIDE_INT bitsize
, bitpos
;
10608 int unsignedp
, reversep
, volatilep
= 0;
10610 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
10611 &unsignedp
, &reversep
, &volatilep
, true);
10614 /* ??? We should work harder and deal with non-zero offsets. */
10616 && (bitpos
% BITS_PER_UNIT
) == 0
10619 && compare_tree_int (TYPE_SIZE (type
), bitsize
) == 0)
10621 /* See the normal_inner_ref case for the rationale. */
10623 = expand_expr_real (tem
,
10624 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10625 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10627 && modifier
!= EXPAND_STACK_PARM
10628 ? target
: NULL_RTX
),
10630 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10633 if (MEM_P (orig_op0
))
10637 /* Get a reference to just this component. */
10638 if (modifier
== EXPAND_CONST_ADDRESS
10639 || modifier
== EXPAND_SUM
10640 || modifier
== EXPAND_INITIALIZER
)
10641 op0
= adjust_address_nv (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10643 op0
= adjust_address (op0
, mode
, bitpos
/ BITS_PER_UNIT
);
10645 if (op0
== orig_op0
)
10646 op0
= copy_rtx (op0
);
10648 set_mem_attributes (op0
, treeop0
, 0);
10649 if (REG_P (XEXP (op0
, 0)))
10650 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10652 MEM_VOLATILE_P (op0
) |= volatilep
;
10658 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
10659 NULL
, inner_reference_p
);
10661 /* If the input and output modes are both the same, we are done. */
10662 if (mode
== GET_MODE (op0
))
10664 /* If neither mode is BLKmode, and both modes are the same size
10665 then we can use gen_lowpart. */
10666 else if (mode
!= BLKmode
&& GET_MODE (op0
) != BLKmode
10667 && (GET_MODE_PRECISION (mode
)
10668 == GET_MODE_PRECISION (GET_MODE (op0
)))
10669 && !COMPLEX_MODE_P (GET_MODE (op0
)))
10671 if (GET_CODE (op0
) == SUBREG
)
10672 op0
= force_reg (GET_MODE (op0
), op0
);
10673 temp
= gen_lowpart_common (mode
, op0
);
10678 if (!REG_P (op0
) && !MEM_P (op0
))
10679 op0
= force_reg (GET_MODE (op0
), op0
);
10680 op0
= gen_lowpart (mode
, op0
);
10683 /* If both types are integral, convert from one mode to the other. */
10684 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
10685 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
10686 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
10687 /* If the output type is a bit-field type, do an extraction. */
10688 else if (reduce_bit_field
)
10689 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
10690 TYPE_UNSIGNED (type
), NULL_RTX
,
10691 mode
, mode
, false);
10692 /* As a last resort, spill op0 to memory, and reload it in a
10694 else if (!MEM_P (op0
))
10696 /* If the operand is not a MEM, force it into memory. Since we
10697 are going to be changing the mode of the MEM, don't call
10698 force_const_mem for constants because we don't allow pool
10699 constants to change mode. */
10700 tree inner_type
= TREE_TYPE (treeop0
);
10702 gcc_assert (!TREE_ADDRESSABLE (exp
));
10704 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
10706 = assign_stack_temp_for_type
10707 (TYPE_MODE (inner_type
),
10708 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
10710 emit_move_insn (target
, op0
);
10714 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
10715 output type is such that the operand is known to be aligned, indicate
10716 that it is. Otherwise, we need only be concerned about alignment for
10717 non-BLKmode results. */
10720 enum insn_code icode
;
10722 if (TYPE_ALIGN_OK (type
))
10724 /* ??? Copying the MEM without substantially changing it might
10725 run afoul of the code handling volatile memory references in
10726 store_expr, which assumes that TARGET is returned unmodified
10727 if it has been used. */
10728 op0
= copy_rtx (op0
);
10729 set_mem_align (op0
, MAX (MEM_ALIGN (op0
), TYPE_ALIGN (type
)));
10731 else if (modifier
!= EXPAND_WRITE
10732 && modifier
!= EXPAND_MEMORY
10733 && !inner_reference_p
10735 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
10737 /* If the target does have special handling for unaligned
10738 loads of mode then use them. */
10739 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10740 != CODE_FOR_nothing
)
10744 op0
= adjust_address (op0
, mode
, 0);
10745 /* We've already validated the memory, and we're creating a
10746 new pseudo destination. The predicates really can't
10748 reg
= gen_reg_rtx (mode
);
10750 /* Nor can the insn generator. */
10751 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
10755 else if (STRICT_ALIGNMENT
)
10757 tree inner_type
= TREE_TYPE (treeop0
);
10758 HOST_WIDE_INT temp_size
10759 = MAX (int_size_in_bytes (inner_type
),
10760 (HOST_WIDE_INT
) GET_MODE_SIZE (mode
));
10762 = assign_stack_temp_for_type (mode
, temp_size
, type
);
10763 rtx new_with_op0_mode
10764 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
10766 gcc_assert (!TREE_ADDRESSABLE (exp
));
10768 if (GET_MODE (op0
) == BLKmode
)
10769 emit_block_move (new_with_op0_mode
, op0
,
10770 GEN_INT (GET_MODE_SIZE (mode
)),
10771 (modifier
== EXPAND_STACK_PARM
10772 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10774 emit_move_insn (new_with_op0_mode
, op0
);
10780 op0
= adjust_address (op0
, mode
, 0);
10787 tree lhs
= treeop0
;
10788 tree rhs
= treeop1
;
10789 gcc_assert (ignore
);
10791 /* Check for |= or &= of a bitfield of size one into another bitfield
10792 of size 1. In this case, (unless we need the result of the
10793 assignment) we can do this more efficiently with a
10794 test followed by an assignment, if necessary.
10796 ??? At this point, we can't get a BIT_FIELD_REF here. But if
10797 things change so we do, this code should be enhanced to
10799 if (TREE_CODE (lhs
) == COMPONENT_REF
10800 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
10801 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
10802 && TREE_OPERAND (rhs
, 0) == lhs
10803 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
10804 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
10805 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
10807 rtx_code_label
*label
= gen_label_rtx ();
10808 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
10809 do_jump (TREE_OPERAND (rhs
, 1),
10811 value
? 0 : label
, -1);
10812 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
10814 do_pending_stack_adjust ();
10815 emit_label (label
);
10819 expand_assignment (lhs
, rhs
, false);
10824 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
10826 case REALPART_EXPR
:
10827 op0
= expand_normal (treeop0
);
10828 return read_complex_part (op0
, false);
10830 case IMAGPART_EXPR
:
10831 op0
= expand_normal (treeop0
);
10832 return read_complex_part (op0
, true);
10839 /* Expanded in cfgexpand.c. */
10840 gcc_unreachable ();
10842 case TRY_CATCH_EXPR
:
10844 case EH_FILTER_EXPR
:
10845 case TRY_FINALLY_EXPR
:
10846 /* Lowered by tree-eh.c. */
10847 gcc_unreachable ();
10849 case WITH_CLEANUP_EXPR
:
10850 case CLEANUP_POINT_EXPR
:
10852 case CASE_LABEL_EXPR
:
10857 case COMPOUND_EXPR
:
10858 case PREINCREMENT_EXPR
:
10859 case PREDECREMENT_EXPR
:
10860 case POSTINCREMENT_EXPR
:
10861 case POSTDECREMENT_EXPR
:
10864 case COMPOUND_LITERAL_EXPR
:
10865 /* Lowered by gimplify.c. */
10866 gcc_unreachable ();
10869 /* Function descriptors are not valid except for as
10870 initialization constants, and should not be expanded. */
10871 gcc_unreachable ();
10873 case WITH_SIZE_EXPR
:
10874 /* WITH_SIZE_EXPR expands to its first argument. The caller should
10875 have pulled out the size to use in whatever context it needed. */
10876 return expand_expr_real (treeop0
, original_target
, tmode
,
10877 modifier
, alt_rtl
, inner_reference_p
);
10880 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
10884 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
10885 signedness of TYPE), possibly returning the result in TARGET. */
10887 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
10889 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
10890 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
10892 /* For constant values, reduce using build_int_cst_type. */
10893 if (CONST_INT_P (exp
))
10895 HOST_WIDE_INT value
= INTVAL (exp
);
10896 tree t
= build_int_cst_type (type
, value
);
10897 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
10899 else if (TYPE_UNSIGNED (type
))
10901 machine_mode mode
= GET_MODE (exp
);
10902 rtx mask
= immed_wide_int_const
10903 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
10904 return expand_and (mode
, exp
, mask
, target
);
10908 int count
= GET_MODE_PRECISION (GET_MODE (exp
)) - prec
;
10909 exp
= expand_shift (LSHIFT_EXPR
, GET_MODE (exp
),
10910 exp
, count
, target
, 0);
10911 return expand_shift (RSHIFT_EXPR
, GET_MODE (exp
),
10912 exp
, count
, target
, 0);
10916 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
10917 when applied to the address of EXP produces an address known to be
10918 aligned more than BIGGEST_ALIGNMENT. */
10921 is_aligning_offset (const_tree offset
, const_tree exp
)
10923 /* Strip off any conversions. */
10924 while (CONVERT_EXPR_P (offset
))
10925 offset
= TREE_OPERAND (offset
, 0);
10927 /* We must now have a BIT_AND_EXPR with a constant that is one less than
10928 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
10929 if (TREE_CODE (offset
) != BIT_AND_EXPR
10930 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
10931 || compare_tree_int (TREE_OPERAND (offset
, 1),
10932 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
10933 || exact_log2 (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1) < 0)
10936 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
10937 It must be NEGATE_EXPR. Then strip any more conversions. */
10938 offset
= TREE_OPERAND (offset
, 0);
10939 while (CONVERT_EXPR_P (offset
))
10940 offset
= TREE_OPERAND (offset
, 0);
10942 if (TREE_CODE (offset
) != NEGATE_EXPR
)
10945 offset
= TREE_OPERAND (offset
, 0);
10946 while (CONVERT_EXPR_P (offset
))
10947 offset
= TREE_OPERAND (offset
, 0);
10949 /* This must now be the address of EXP. */
10950 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
10953 /* Return the tree node if an ARG corresponds to a string constant or zero
10954 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
10955 in bytes within the string that ARG is accessing. The type of the
10956 offset will be `sizetype'. */
10959 string_constant (tree arg
, tree
*ptr_offset
)
10961 tree array
, offset
, lower_bound
;
10964 if (TREE_CODE (arg
) == ADDR_EXPR
)
10966 if (TREE_CODE (TREE_OPERAND (arg
, 0)) == STRING_CST
)
10968 *ptr_offset
= size_zero_node
;
10969 return TREE_OPERAND (arg
, 0);
10971 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == VAR_DECL
)
10973 array
= TREE_OPERAND (arg
, 0);
10974 offset
= size_zero_node
;
10976 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == ARRAY_REF
)
10978 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
10979 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
10980 if (TREE_CODE (array
) != STRING_CST
10981 && TREE_CODE (array
) != VAR_DECL
)
10984 /* Check if the array has a nonzero lower bound. */
10985 lower_bound
= array_ref_low_bound (TREE_OPERAND (arg
, 0));
10986 if (!integer_zerop (lower_bound
))
10988 /* If the offset and base aren't both constants, return 0. */
10989 if (TREE_CODE (lower_bound
) != INTEGER_CST
)
10991 if (TREE_CODE (offset
) != INTEGER_CST
)
10993 /* Adjust offset by the lower bound. */
10994 offset
= size_diffop (fold_convert (sizetype
, offset
),
10995 fold_convert (sizetype
, lower_bound
));
10998 else if (TREE_CODE (TREE_OPERAND (arg
, 0)) == MEM_REF
)
11000 array
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 0);
11001 offset
= TREE_OPERAND (TREE_OPERAND (arg
, 0), 1);
11002 if (TREE_CODE (array
) != ADDR_EXPR
)
11004 array
= TREE_OPERAND (array
, 0);
11005 if (TREE_CODE (array
) != STRING_CST
11006 && TREE_CODE (array
) != VAR_DECL
)
11012 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11014 tree arg0
= TREE_OPERAND (arg
, 0);
11015 tree arg1
= TREE_OPERAND (arg
, 1);
11020 if (TREE_CODE (arg0
) == ADDR_EXPR
11021 && (TREE_CODE (TREE_OPERAND (arg0
, 0)) == STRING_CST
11022 || TREE_CODE (TREE_OPERAND (arg0
, 0)) == VAR_DECL
))
11024 array
= TREE_OPERAND (arg0
, 0);
11027 else if (TREE_CODE (arg1
) == ADDR_EXPR
11028 && (TREE_CODE (TREE_OPERAND (arg1
, 0)) == STRING_CST
11029 || TREE_CODE (TREE_OPERAND (arg1
, 0)) == VAR_DECL
))
11031 array
= TREE_OPERAND (arg1
, 0);
11040 if (TREE_CODE (array
) == STRING_CST
)
11042 *ptr_offset
= fold_convert (sizetype
, offset
);
11045 else if (TREE_CODE (array
) == VAR_DECL
11046 || TREE_CODE (array
) == CONST_DECL
)
11049 tree init
= ctor_for_folding (array
);
11051 /* Variables initialized to string literals can be handled too. */
11052 if (init
== error_mark_node
11054 || TREE_CODE (init
) != STRING_CST
)
11057 /* Avoid const char foo[4] = "abcde"; */
11058 if (DECL_SIZE_UNIT (array
) == NULL_TREE
11059 || TREE_CODE (DECL_SIZE_UNIT (array
)) != INTEGER_CST
11060 || (length
= TREE_STRING_LENGTH (init
)) <= 0
11061 || compare_tree_int (DECL_SIZE_UNIT (array
), length
) < 0)
11064 /* If variable is bigger than the string literal, OFFSET must be constant
11065 and inside of the bounds of the string literal. */
11066 offset
= fold_convert (sizetype
, offset
);
11067 if (compare_tree_int (DECL_SIZE_UNIT (array
), length
) > 0
11068 && (! tree_fits_uhwi_p (offset
)
11069 || compare_tree_int (offset
, length
) >= 0))
11072 *ptr_offset
= offset
;
11079 /* Generate code to calculate OPS, and exploded expression
11080 using a store-flag instruction and return an rtx for the result.
11081 OPS reflects a comparison.
11083 If TARGET is nonzero, store the result there if convenient.
11085 Return zero if there is no suitable set-flag instruction
11086 available on this machine.
11088 Once expand_expr has been called on the arguments of the comparison,
11089 we are committed to doing the store flag, since it is not safe to
11090 re-evaluate the expression. We emit the store-flag insn by calling
11091 emit_store_flag, but only expand the arguments if we have a reason
11092 to believe that emit_store_flag will be successful. If we think that
11093 it will, but it isn't, we have to simulate the store-flag with a
11094 set/jump/set sequence. */
11097 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11099 enum rtx_code code
;
11100 tree arg0
, arg1
, type
;
11101 machine_mode operand_mode
;
11104 rtx subtarget
= target
;
11105 location_t loc
= ops
->location
;
11110 /* Don't crash if the comparison was erroneous. */
11111 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11114 type
= TREE_TYPE (arg0
);
11115 operand_mode
= TYPE_MODE (type
);
11116 unsignedp
= TYPE_UNSIGNED (type
);
11118 /* We won't bother with BLKmode store-flag operations because it would mean
11119 passing a lot of information to emit_store_flag. */
11120 if (operand_mode
== BLKmode
)
11123 /* We won't bother with store-flag operations involving function pointers
11124 when function pointers must be canonicalized before comparisons. */
11125 if (targetm
.have_canonicalize_funcptr_for_compare ()
11126 && ((TREE_CODE (TREE_TYPE (arg0
)) == POINTER_TYPE
11127 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg0
)))
11129 || (TREE_CODE (TREE_TYPE (arg1
)) == POINTER_TYPE
11130 && (TREE_CODE (TREE_TYPE (TREE_TYPE (arg1
)))
11131 == FUNCTION_TYPE
))))
11137 /* For vector typed comparisons emit code to generate the desired
11138 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11139 expander for this. */
11140 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
11142 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
11143 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
11144 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
))
11145 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
11148 tree if_true
= constant_boolean_node (true, ops
->type
);
11149 tree if_false
= constant_boolean_node (false, ops
->type
);
11150 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
11155 /* Get the rtx comparison code to use. We know that EXP is a comparison
11156 operation of some type. Some comparisons against 1 and -1 can be
11157 converted to comparisons with zero. Do so here so that the tests
11158 below will be aware that we have a comparison with zero. These
11159 tests will not catch constants in the first operand, but constants
11160 are rarely passed as the first operand. */
11171 if (integer_onep (arg1
))
11172 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
11174 code
= unsignedp
? LTU
: LT
;
11177 if (! unsignedp
&& integer_all_onesp (arg1
))
11178 arg1
= integer_zero_node
, code
= LT
;
11180 code
= unsignedp
? LEU
: LE
;
11183 if (! unsignedp
&& integer_all_onesp (arg1
))
11184 arg1
= integer_zero_node
, code
= GE
;
11186 code
= unsignedp
? GTU
: GT
;
11189 if (integer_onep (arg1
))
11190 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
11192 code
= unsignedp
? GEU
: GE
;
11195 case UNORDERED_EXPR
:
11221 gcc_unreachable ();
11224 /* Put a constant second. */
11225 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
11226 || TREE_CODE (arg0
) == FIXED_CST
)
11228 std::swap (arg0
, arg1
);
11229 code
= swap_condition (code
);
11232 /* If this is an equality or inequality test of a single bit, we can
11233 do this by shifting the bit being tested to the low-order bit and
11234 masking the result with the constant 1. If the condition was EQ,
11235 we xor it with 1. This does not require an scc insn and is faster
11236 than an scc insn even if we have it.
11238 The code to make this transformation was moved into fold_single_bit_test,
11239 so we just call into the folder and expand its result. */
11241 if ((code
== NE
|| code
== EQ
)
11242 && integer_zerop (arg1
)
11243 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
11245 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
11247 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
11249 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
11250 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
11251 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
11252 gimple_assign_rhs1 (srcstmt
),
11253 gimple_assign_rhs2 (srcstmt
));
11254 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
11256 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
11260 if (! get_subtarget (target
)
11261 || GET_MODE (subtarget
) != operand_mode
)
11264 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
11267 target
= gen_reg_rtx (mode
);
11269 /* Try a cstore if possible. */
11270 return emit_store_flag_force (target
, code
, op0
, op1
,
11271 operand_mode
, unsignedp
,
11272 (TYPE_PRECISION (ops
->type
) == 1
11273 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
11276 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11277 0 otherwise (i.e. if there is no casesi instruction).
11279 DEFAULT_PROBABILITY is the probability of jumping to the default
11282 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
11283 rtx table_label
, rtx default_label
, rtx fallback_label
,
11284 int default_probability
)
11286 struct expand_operand ops
[5];
11287 machine_mode index_mode
= SImode
;
11288 rtx op1
, op2
, index
;
11290 if (! targetm
.have_casesi ())
11293 /* Convert the index to SImode. */
11294 if (GET_MODE_BITSIZE (TYPE_MODE (index_type
)) > GET_MODE_BITSIZE (index_mode
))
11296 machine_mode omode
= TYPE_MODE (index_type
);
11297 rtx rangertx
= expand_normal (range
);
11299 /* We must handle the endpoints in the original mode. */
11300 index_expr
= build2 (MINUS_EXPR
, index_type
,
11301 index_expr
, minval
);
11302 minval
= integer_zero_node
;
11303 index
= expand_normal (index_expr
);
11305 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
11306 omode
, 1, default_label
,
11307 default_probability
);
11308 /* Now we can safely truncate. */
11309 index
= convert_to_mode (index_mode
, index
, 0);
11313 if (TYPE_MODE (index_type
) != index_mode
)
11315 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
11316 index_expr
= fold_convert (index_type
, index_expr
);
11319 index
= expand_normal (index_expr
);
11322 do_pending_stack_adjust ();
11324 op1
= expand_normal (minval
);
11325 op2
= expand_normal (range
);
11327 create_input_operand (&ops
[0], index
, index_mode
);
11328 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
11329 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
11330 create_fixed_operand (&ops
[3], table_label
);
11331 create_fixed_operand (&ops
[4], (default_label
11333 : fallback_label
));
11334 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
11338 /* Attempt to generate a tablejump instruction; same concept. */
11339 /* Subroutine of the next function.
11341 INDEX is the value being switched on, with the lowest value
11342 in the table already subtracted.
11343 MODE is its expected mode (needed if INDEX is constant).
11344 RANGE is the length of the jump table.
11345 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11347 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11348 index value is out of range.
11349 DEFAULT_PROBABILITY is the probability of jumping to
11350 the default label. */
11353 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
11354 rtx default_label
, int default_probability
)
11358 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
11359 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
11361 /* Do an unsigned comparison (in the proper mode) between the index
11362 expression and the value which represents the length of the range.
11363 Since we just finished subtracting the lower bound of the range
11364 from the index expression, this comparison allows us to simultaneously
11365 check that the original index expression value is both greater than
11366 or equal to the minimum value of the range and less than or equal to
11367 the maximum value of the range. */
11370 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
11371 default_label
, default_probability
);
11374 /* If index is in range, it must fit in Pmode.
11375 Convert to Pmode so we can index with it. */
11377 index
= convert_to_mode (Pmode
, index
, 1);
11379 /* Don't let a MEM slip through, because then INDEX that comes
11380 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11381 and break_out_memory_refs will go to work on it and mess it up. */
11382 #ifdef PIC_CASE_VECTOR_ADDRESS
11383 if (flag_pic
&& !REG_P (index
))
11384 index
= copy_to_mode_reg (Pmode
, index
);
11387 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11388 GET_MODE_SIZE, because this indicates how large insns are. The other
11389 uses should all be Pmode, because they are addresses. This code
11390 could fail if addresses and insns are not the same size. */
11391 index
= simplify_gen_binary (MULT
, Pmode
, index
,
11392 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
11394 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
11395 gen_rtx_LABEL_REF (Pmode
, table_label
));
11397 #ifdef PIC_CASE_VECTOR_ADDRESS
11399 index
= PIC_CASE_VECTOR_ADDRESS (index
);
11402 index
= memory_address (CASE_VECTOR_MODE
, index
);
11403 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
11404 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
11405 convert_move (temp
, vector
, 0);
11407 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
11409 /* If we are generating PIC code or if the table is PC-relative, the
11410 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11411 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
11416 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
11417 rtx table_label
, rtx default_label
, int default_probability
)
11421 if (! targetm
.have_tablejump ())
11424 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
11425 fold_convert (index_type
, index_expr
),
11426 fold_convert (index_type
, minval
));
11427 index
= expand_normal (index_expr
);
11428 do_pending_stack_adjust ();
11430 do_tablejump (index
, TYPE_MODE (index_type
),
11431 convert_modes (TYPE_MODE (index_type
),
11432 TYPE_MODE (TREE_TYPE (range
)),
11433 expand_normal (range
),
11434 TYPE_UNSIGNED (TREE_TYPE (range
))),
11435 table_label
, default_label
, default_probability
);
11439 /* Return a CONST_VECTOR rtx representing vector mask for
11440 a VECTOR_CST of booleans. */
11442 const_vector_mask_from_tree (tree exp
)
11448 machine_mode inner
, mode
;
11450 mode
= TYPE_MODE (TREE_TYPE (exp
));
11451 units
= GET_MODE_NUNITS (mode
);
11452 inner
= GET_MODE_INNER (mode
);
11454 v
= rtvec_alloc (units
);
11456 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11458 elt
= VECTOR_CST_ELT (exp
, i
);
11460 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11461 if (integer_zerop (elt
))
11462 RTVEC_ELT (v
, i
) = CONST0_RTX (inner
);
11463 else if (integer_onep (elt
)
11464 || integer_minus_onep (elt
))
11465 RTVEC_ELT (v
, i
) = CONSTM1_RTX (inner
);
11467 gcc_unreachable ();
11470 return gen_rtx_CONST_VECTOR (mode
, v
);
11473 /* Return a CONST_INT rtx representing vector mask for
11474 a VECTOR_CST of booleans. */
11476 const_scalar_mask_from_tree (tree exp
)
11478 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
11479 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
11483 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11485 elt
= VECTOR_CST_ELT (exp
, i
);
11486 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
11487 if (integer_all_onesp (elt
))
11488 res
= wi::set_bit (res
, i
);
11490 gcc_assert (integer_zerop (elt
));
11493 return immed_wide_int_const (res
, mode
);
11496 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11498 const_vector_from_tree (tree exp
)
11504 machine_mode inner
, mode
;
11506 mode
= TYPE_MODE (TREE_TYPE (exp
));
11508 if (initializer_zerop (exp
))
11509 return CONST0_RTX (mode
);
11511 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
11512 return const_vector_mask_from_tree (exp
);
11514 units
= GET_MODE_NUNITS (mode
);
11515 inner
= GET_MODE_INNER (mode
);
11517 v
= rtvec_alloc (units
);
11519 for (i
= 0; i
< VECTOR_CST_NELTS (exp
); ++i
)
11521 elt
= VECTOR_CST_ELT (exp
, i
);
11523 if (TREE_CODE (elt
) == REAL_CST
)
11524 RTVEC_ELT (v
, i
) = const_double_from_real_value (TREE_REAL_CST (elt
),
11526 else if (TREE_CODE (elt
) == FIXED_CST
)
11527 RTVEC_ELT (v
, i
) = CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
11530 RTVEC_ELT (v
, i
) = immed_wide_int_const (elt
, inner
);
11533 return gen_rtx_CONST_VECTOR (mode
, v
);
11536 /* Build a decl for a personality function given a language prefix. */
11539 build_personality_function (const char *lang
)
11541 const char *unwind_and_version
;
11545 switch (targetm_common
.except_unwind_info (&global_options
))
11550 unwind_and_version
= "_sj0";
11554 unwind_and_version
= "_v0";
11557 unwind_and_version
= "_seh0";
11560 gcc_unreachable ();
11563 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
11565 type
= build_function_type_list (integer_type_node
, integer_type_node
,
11566 long_long_unsigned_type_node
,
11567 ptr_type_node
, ptr_type_node
, NULL_TREE
);
11568 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
11569 get_identifier (name
), type
);
11570 DECL_ARTIFICIAL (decl
) = 1;
11571 DECL_EXTERNAL (decl
) = 1;
11572 TREE_PUBLIC (decl
) = 1;
11574 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
11575 are the flags assigned by targetm.encode_section_info. */
11576 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
11581 /* Extracts the personality function of DECL and returns the corresponding
11585 get_personality_function (tree decl
)
11587 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
11588 enum eh_personality_kind pk
;
11590 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
11591 if (pk
== eh_personality_none
)
11595 && pk
== eh_personality_any
)
11596 personality
= lang_hooks
.eh_personality ();
11598 if (pk
== eh_personality_lang
)
11599 gcc_assert (personality
!= NULL_TREE
);
11601 return XEXP (DECL_RTL (personality
), 0);
11604 /* Returns a tree for the size of EXP in bytes. */
11607 tree_expr_size (const_tree exp
)
11610 && DECL_SIZE_UNIT (exp
) != 0)
11611 return DECL_SIZE_UNIT (exp
);
11613 return size_in_bytes (TREE_TYPE (exp
));
11616 /* Return an rtx for the size in bytes of the value of EXP. */
11619 expr_size (tree exp
)
11623 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11624 size
= TREE_OPERAND (exp
, 1);
11627 size
= tree_expr_size (exp
);
11629 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
11632 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
11635 /* Return a wide integer for the size in bytes of the value of EXP, or -1
11636 if the size can vary or is larger than an integer. */
11638 static HOST_WIDE_INT
11639 int_expr_size (tree exp
)
11643 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
11644 size
= TREE_OPERAND (exp
, 1);
11647 size
= tree_expr_size (exp
);
11651 if (size
== 0 || !tree_fits_shwi_p (size
))
11654 return tree_to_shwi (size
);
11657 #include "gt-expr.h"