PR target/84064
[official-gcc.git] / gcc / config / arm / crypto.md
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1 ;; ARMv8-A crypto patterns.
2 ;; Copyright (C) 2013-2018 Free Software Foundation, Inc.
3 ;; Contributed by ARM Ltd.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 3, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3.  If not see
19 ;; <http://www.gnu.org/licenses/>.
22 ;; When AES/AESMC fusion is enabled we want the register allocation to
23 ;; look like:
24 ;;    AESE Vn, _
25 ;;    AESMC Vn, Vn
26 ;; So prefer to tie operand 1 to operand 0 when fusing.
28 (define_insn "crypto_<crypto_pattern>"
29   [(set (match_operand:<crypto_mode> 0 "register_operand" "=w,w")
30         (unspec:<crypto_mode> [(match_operand:<crypto_mode> 1
31                        "register_operand" "0,w")]
32          CRYPTO_UNARY))]
33   "TARGET_CRYPTO"
34   "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q1"
35   [(set_attr "type" "<crypto_type>")
36    (set_attr_alternative "enabled"
37      [(if_then_else (match_test
38                        "arm_fusion_enabled_p (tune_params::FUSE_AES_AESMC)")
39                      (const_string "yes" )
40                      (const_string "no"))
41       (const_string "yes")])]
44 (define_insn "crypto_<crypto_pattern>"
45   [(set (match_operand:<crypto_mode> 0 "register_operand" "=w")
46         (unspec:<crypto_mode> [(match_operand:<crypto_mode> 1 "register_operand" "0")
47                       (match_operand:<crypto_mode> 2 "register_operand" "w")]
48          CRYPTO_BINARY))]
49   "TARGET_CRYPTO"
50   "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q2"
51   [(set_attr "type" "<crypto_type>")]
54 (define_insn "crypto_<crypto_pattern>"
55   [(set (match_operand:<crypto_mode> 0 "register_operand" "=w")
56         (unspec:<crypto_mode> [(match_operand:<crypto_mode> 1 "register_operand" "0")
57                       (match_operand:<crypto_mode> 2 "register_operand" "w")
58                       (match_operand:<crypto_mode> 3 "register_operand" "w")]
59          CRYPTO_TERNARY))]
60   "TARGET_CRYPTO"
61   "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q2, %q3"
62   [(set_attr "type" "<crypto_type>")]
65 (define_insn "crypto_sha1h"
66   [(set (match_operand:V4SI 0 "register_operand" "=w")
67         (zero_extend:V4SI
68           (unspec:SI [(vec_select:SI
69                         (match_operand:V4SI 1 "register_operand" "w")
70                         (parallel [(match_operand:SI 2 "immediate_operand" "i")]))]
71            UNSPEC_SHA1H)))]
72   "TARGET_CRYPTO"
73   "sha1h.32\\t%q0, %q1"
74   [(set_attr "type" "crypto_sha1_fast")]
77 (define_insn "crypto_vmullp64"
78   [(set (match_operand:TI 0 "register_operand" "=w")
79         (unspec:TI [(match_operand:DI 1 "register_operand" "w")
80                     (match_operand:DI 2 "register_operand" "w")]
81          UNSPEC_VMULLP64))]
82   "TARGET_CRYPTO"
83   "vmull.p64\\t%q0, %P1, %P2"
84   [(set_attr "type" "crypto_pmull")]
87 (define_insn "crypto_<crypto_pattern>"
88   [(set (match_operand:V4SI 0 "register_operand" "=w")
89         (unspec:<crypto_mode>
90                      [(match_operand:<crypto_mode> 1 "register_operand" "0")
91                       (vec_select:SI
92                         (match_operand:<crypto_mode> 2 "register_operand" "w")
93                         (parallel [(match_operand:SI 4 "immediate_operand" "i")]))
94                       (match_operand:<crypto_mode> 3 "register_operand" "w")]
95          CRYPTO_SELECTING))]
96   "TARGET_CRYPTO"
97   "<crypto_pattern>.<crypto_size_sfx>\\t%q0, %q2, %q3"
98   [(set_attr "type" "<crypto_type>")]